Re: [PATCH v3 3/3] pinctrl: single: Add tests for request API
+Bharat Gooty
On Tue, Oct 5, 2021 at 9:50 AM Roman Bacik wrote:
>
> Add request tests to dm_test_pinctrl_single with corresponding node in
> test.dts
>
> Signed-off-by: Roman Bacik
>
> ---
>
> Changes in v3:
> - Add request API test to dm_test_pinctrl_single
>
> arch/sandbox/dts/test.dts | 17 +
> test/dm/pinmux.c | 13 +
> 2 files changed, 30 insertions(+)
>
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> index e27d106466b4..0a9f24092eb6 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -1517,6 +1517,23 @@
> };
> };
>
> + pinctrl-single-gpio-range {
> + compatible = "pinctrl-single";
> + reg = <0x 0x238>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <7>;
> +
> + pinctrl-single,gpio-range = < 0 2 1 2 3 0>;
> +
> + range: gpio-range {
> + #pinctrl-single,gpio-range-cells = <3>;
> + };
> + };
> +
> hwspinlock@0 {
> compatible = "sandbox,hwspinlock";
> };
> diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c
> index 265df4ccb979..d4a8a7907006 100644
> --- a/test/dm/pinmux.c
> +++ b/test/dm/pinmux.c
> @@ -132,6 +132,19 @@ static int dm_test_pinctrl_single(struct unit_test_state
> *uts)
> test_muxing(159, "0x004c 0x UNCLAIMED");
> ret = pinctrl_get_pin_muxing(dev, 160, buf, sizeof(buf));
> ut_asserteq(-EINVAL, ret);
> + ut_assertok(uclass_get_device_by_name(UCLASS_PINCTRL,
> + "pinctrl-single-gpio-range",
> ));
> + ut_asserteq(142, pinctrl_get_pins_count(dev));
> + ut_assertok(pinctrl_request(dev, 0, 0));
> + test_muxing(0, "0x 0x0001 UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 1, 0));
> + test_muxing(1, "0x0004 0x0001 UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 2, 0));
> + test_muxing(2, "0x0008 0x UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 3, 0));
> + test_muxing(3, "0x000c 0x UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 4, 0));
> + test_muxing(4, "0x0010 0x UNCLAIMED");
> return 0;
> }
>
> --
> 2.17.1
>
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Description: S/MIME Cryptographic Signature
[PATCH] pytest: Show a message when sandbox crashes
When a test hands on a real board there is no way on the console to obtain
any information about why it hung.
With sandbox we can actually find out that it died and get a signal or
exit code. Add this to make it easier to figure out what happened.
So instead of:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E OSError: [Errno 5] Input/output error
We get:
test/py/u_boot_spawn.py:171: in expect
c = os.read(self.fd, 1024).decode(errors='replace')
E ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)
Signed-off-by: Simon Glass
---
doc/develop/py_testing.rst | 8 ++
test/py/u_boot_spawn.py| 56 ++
2 files changed, 52 insertions(+), 12 deletions(-)
diff --git a/doc/develop/py_testing.rst b/doc/develop/py_testing.rst
index 52238ca54d3..06f919609b5 100644
--- a/doc/develop/py_testing.rst
+++ b/doc/develop/py_testing.rst
@@ -103,6 +103,14 @@ will be written to `${build_dir}/test-log.html`. This is
best viewed in a web
browser, but may be read directly as plain text, perhaps with the aid of the
`html2text` utility.
+If sandbox crashes (e.g. with a segfault) you will see message like this::
+
+
+test/py/u_boot_spawn.py:171: in expect
+c = os.read(self.fd, 1024).decode(errors='replace')
+E ValueError: U-Boot exited with signal 11 (Signals.SIGSEGV)
+
+
Controlling output
~~
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 6991b78cca8..b6ab544eaa1 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -35,6 +35,8 @@ class Spawn(object):
"""
self.waited = False
+self.exit_code = 0
+self.exit_info = ''
self.buf = ''
self.output = ''
self.logfile_read = None
@@ -80,25 +82,44 @@ class Spawn(object):
os.kill(self.pid, sig)
-def isalive(self):
+def checkalive(self):
"""Determine whether the child process is still running.
-Args:
-None.
-
Returns:
-Boolean indicating whether process is alive.
+tuple:
+True if process is alive, else False
+0 if process is alive, else exit code of process
+string describing what happened ('' or 'status/signal n')
"""
if self.waited:
-return False
+return False, exit_code, self.exit_info
w = os.waitpid(self.pid, os.WNOHANG)
if w[0] == 0:
-return True
-
+return True, 0, 'running'
+status = w[1]
+
+if os.WIFEXITED(status):
+self.exit_code = os.WEXITSTATUS(status)
+self.exit_info = 'status %d' % self.exit_code
+elif os.WIFSIGNALED(status):
+signum = os.WTERMSIG(status)
+self.exit_code = -signum
+self.exit_info = 'signal %d (%s)' % (signum,
signal.Signals(signum))
self.waited = True
-return False
+return False, self.exit_code, self.exit_info
+
+def isalive(self):
+"""Determine whether the child process is still running.
+
+Args:
+None.
+
+Returns:
+Boolean indicating whether process is alive.
+"""
+return self.checkalive()[0]
def send(self, data):
"""Send data to the sub-process's stdin.
@@ -168,9 +189,20 @@ class Spawn(object):
events = self.poll.poll(poll_maxwait)
if not events:
raise Timeout()
-c = os.read(self.fd, 1024).decode(errors='replace')
-if not c:
-raise EOFError()
+try:
+c = os.read(self.fd, 1024).decode(errors='replace')
+except OSError as err:
+# With sandbox, try to detect when U-Boot exits when it
+# shouldn't and explain why. This is much more friendly
than
+# just dying with an I/O error
+if err.errno == 5: # Input/output error
+alive, exit_code, info = self.checkalive()
+if alive:
+raise
+else:
+raise ValueError('U-Boot exited with %s' % info)
+else:
+raise
if self.logfile_read:
self.logfile_read.write(c)
self.buf += c
--
2.33.0.800.g4c38ced690-goog
[PATCH] pytest: Shorten traceback length by default
This produces a lot of code output which is not very helpful and is quite
annoying to wade through. Use the short format by default.
Signed-off-by: Simon Glass
---
doc/develop/py_testing.rst | 7 +++
test/py/test.py| 5 +
2 files changed, 12 insertions(+)
diff --git a/doc/develop/py_testing.rst b/doc/develop/py_testing.rst
index 4f1e1f66e76..52238ca54d3 100644
--- a/doc/develop/py_testing.rst
+++ b/doc/develop/py_testing.rst
@@ -103,6 +103,13 @@ will be written to `${build_dir}/test-log.html`. This is
best viewed in a web
browser, but may be read directly as plain text, perhaps with the aid of the
`html2text` utility.
+Controlling output
+~~
+
+By default a short backtrace is reported. If you would like a longer one,
+pass ``--tb=long`` when running the test. See the pytest documentation for
+more options.
+
Running tests in parallel
~
diff --git a/test/py/test.py b/test/py/test.py
index 285fda54258..95859a66e29 100755
--- a/test/py/test.py
+++ b/test/py/test.py
@@ -17,4 +17,9 @@ if __name__ == '__main__':
# argv; py.test test_directory_name user-supplied-arguments
args = [os.path.dirname(__file__) + '/tests']
args.extend(sys.argv)
+
+# Use short format by default
+if not [arg for arg in args if '--tb=' in arg]:
+args.append('--tb=short')
+
sys.exit(pytest.main(args))
--
2.33.0.800.g4c38ced690-goog
Re: [PATCH 2/2] clk: sunxi: Add drivers for A31 and H6 PRCM CCUs
On Sun, 12 Sep 2021 09:47:25 -0500
Samuel Holland wrote:
> Add a driver so the clocks/resets for these peripherals (especially I2C,
> RSB, and UART) can be enabled using the normal uclass methods.
>
Compared against the respective Linux bits.
> Signed-off-by: Samuel Holland
Reviewed-by: Andre Przywara
Cheers,
Andre
> ---
>
> drivers/clk/sunxi/Kconfig | 14
> drivers/clk/sunxi/Makefile| 2 ++
> drivers/clk/sunxi/clk_a31_r.c | 59 +
> drivers/clk/sunxi/clk_h6_r.c | 61 +++
> 4 files changed, 136 insertions(+)
> create mode 100644 drivers/clk/sunxi/clk_a31_r.c
> create mode 100644 drivers/clk/sunxi/clk_h6_r.c
>
> diff --git a/drivers/clk/sunxi/Kconfig b/drivers/clk/sunxi/Kconfig
> index bf084fa7a84..f89c7ffd42a 100644
> --- a/drivers/clk/sunxi/Kconfig
> +++ b/drivers/clk/sunxi/Kconfig
> @@ -30,6 +30,13 @@ config CLK_SUN6I_A31
> This enables common clock driver support for platforms based
> on Allwinner A31/A31s SoC.
>
> +config CLK_SUN6I_A31_R
> + bool "Clock driver for Allwinner A31 generation PRCM"
> + default SUNXI_GEN_SUN6I
> + help
> + This enables common clock driver support for the PRCM
> + in Allwinner A31/A31s/A23/A33/A83T/H3/A64/H5 SoCs.
> +
> config CLK_SUN8I_A23
> bool "Clock driver for Allwinner A23/A33"
> default MACH_SUN8I_A23 || MACH_SUN8I_A33
> @@ -79,6 +86,13 @@ config CLK_SUN50I_H6
> This enables common clock driver support for platforms based
> on Allwinner H6 SoC.
>
> +config CLK_SUN50I_H6_R
> + bool "Clock driver for Allwinner H6 generation PRCM"
> + default SUN50I_GEN_H6
> + help
> + This enables common clock driver support for the PRCM
> + in Allwinner H6/H616 SoCs.
> +
> config CLK_SUN50I_H616
> bool "Clock driver for Allwinner H616"
> default MACH_SUN50I_H616
> diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
> index 4f9282a8b9b..48a48a2f000 100644
> --- a/drivers/clk/sunxi/Makefile
> +++ b/drivers/clk/sunxi/Makefile
> @@ -11,6 +11,7 @@ obj-$(CONFIG_CLK_SUNXI) += clk_sun6i_rtc.o
> obj-$(CONFIG_CLK_SUN4I_A10) += clk_a10.o
> obj-$(CONFIG_CLK_SUN5I_A10S) += clk_a10s.o
> obj-$(CONFIG_CLK_SUN6I_A31) += clk_a31.o
> +obj-$(CONFIG_CLK_SUN6I_A31_R) += clk_a31_r.o
> obj-$(CONFIG_CLK_SUN8I_A23) += clk_a23.o
> obj-$(CONFIG_CLK_SUN8I_A83T) += clk_a83t.o
> obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
> @@ -18,5 +19,6 @@ obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
> obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o
> obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
> obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o
> +obj-$(CONFIG_CLK_SUN50I_H6_R) += clk_h6_r.o
> obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o
> obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o
> diff --git a/drivers/clk/sunxi/clk_a31_r.c b/drivers/clk/sunxi/clk_a31_r.c
> new file mode 100644
> index 000..57ff98aa52b
> --- /dev/null
> +++ b/drivers/clk/sunxi/clk_a31_r.c
> @@ -0,0 +1,59 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) Samuel Holland
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +static struct ccu_clk_gate a31_r_gates[] = {
> + [CLK_APB0_PIO] = GATE(0x028, BIT(0)),
> + [CLK_APB0_IR] = GATE(0x028, BIT(1)),
> + [CLK_APB0_TIMER]= GATE(0x028, BIT(2)),
> + [CLK_APB0_RSB] = GATE(0x028, BIT(3)),
> + [CLK_APB0_UART] = GATE(0x028, BIT(4)),
> + [CLK_APB0_I2C] = GATE(0x028, BIT(6)),
> + [CLK_APB0_TWD] = GATE(0x028, BIT(7)),
> +};
> +
> +static struct ccu_reset a31_r_resets[] = {
> + [RST_APB0_IR] = RESET(0x0b0, BIT(1)),
> + [RST_APB0_TIMER]= RESET(0x0b0, BIT(2)),
> + [RST_APB0_RSB] = RESET(0x0b0, BIT(3)),
> + [RST_APB0_UART] = RESET(0x0b0, BIT(4)),
> + [RST_APB0_I2C] = RESET(0x0b0, BIT(6)),
> +};
> +
> +static const struct ccu_desc a31_r_ccu_desc = {
> + .gates = a31_r_gates,
> + .resets = a31_r_resets,
> +};
> +
> +static int a31_r_clk_bind(struct udevice *dev)
> +{
> + return sunxi_reset_bind(dev, ARRAY_SIZE(a31_r_resets));
> +}
> +
> +static const struct udevice_id a31_r_clk_ids[] = {
> + { .compatible = "allwinner,sun8i-a83t-r-ccu",
> + .data = (ulong)_r_ccu_desc },
> + { .compatible = "allwinner,sun8i-h3-r-ccu",
> + .data = (ulong)_r_ccu_desc },
> + { .compatible = "allwinner,sun50i-a64-r-ccu",
> + .data = (ulong)_r_ccu_desc },
> + { }
> +};
> +
> +U_BOOT_DRIVER(clk_sun6i_a31_r) = {
> + .name = "sun6i_a31_r_ccu",
> + .id = UCLASS_CLK,
> + .of_match = a31_r_clk_ids,
> + .priv_auto = sizeof(struct ccu_priv),
> + .ops= _clk_ops,
> + .probe = sunxi_clk_probe,
> + .bind = a31_r_clk_bind,
> +};
> diff --git a/drivers/clk/sunxi/clk_h6_r.c b/drivers/clk/sunxi/clk_h6_r.c
Re: [PATCH 1/2] clk: sunxi: Add support for I2C gates/resets
On Sun, 12 Sep 2021 09:47:24 -0500
Samuel Holland wrote:
> Currently, the I2C clocks are configured in the sunxi board code. Add
> the I2C clocks to the DM clock driver so they can be enabled from the
> DM I2C driver using the normal uclass methods.
>
> Signed-off-by: Samuel Holland
Compared against the kernel's drivers/clk/sunxi-ng/ccu-*.c.
Reviewed-by: Andre Przywara
Thanks,
Andre
> ---
>
> drivers/clk/sunxi/clk_a10.c | 5 +
> drivers/clk/sunxi/clk_a10s.c | 3 +++
> drivers/clk/sunxi/clk_a23.c | 6 ++
> drivers/clk/sunxi/clk_a31.c | 8
> drivers/clk/sunxi/clk_a64.c | 6 ++
> drivers/clk/sunxi/clk_a80.c | 10 ++
> drivers/clk/sunxi/clk_a83t.c | 6 ++
> drivers/clk/sunxi/clk_h3.c | 6 ++
> drivers/clk/sunxi/clk_h6.c | 10 ++
> drivers/clk/sunxi/clk_h616.c | 12
> drivers/clk/sunxi/clk_r40.c | 10 ++
> drivers/clk/sunxi/clk_v3s.c | 4
> 12 files changed, 86 insertions(+)
>
> diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c
> index 1b5de86e204..20006925f1e 100644
> --- a/drivers/clk/sunxi/clk_a10.c
> +++ b/drivers/clk/sunxi/clk_a10.c
> @@ -31,6 +31,11 @@ static struct ccu_clk_gate a10_gates[] = {
>
> [CLK_AHB_GMAC] = GATE(0x064, BIT(17)),
>
> + [CLK_APB1_I2C0] = GATE(0x06c, BIT(0)),
> + [CLK_APB1_I2C1] = GATE(0x06c, BIT(1)),
> + [CLK_APB1_I2C2] = GATE(0x06c, BIT(2)),
> + [CLK_APB1_I2C3] = GATE(0x06c, BIT(3)),
> + [CLK_APB1_I2C4] = GATE(0x06c, BIT(15)),
> [CLK_APB1_UART0]= GATE(0x06c, BIT(16)),
> [CLK_APB1_UART1]= GATE(0x06c, BIT(17)),
> [CLK_APB1_UART2]= GATE(0x06c, BIT(18)),
> diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c
> index 184f61ab234..7e7b2bf7009 100644
> --- a/drivers/clk/sunxi/clk_a10s.c
> +++ b/drivers/clk/sunxi/clk_a10s.c
> @@ -25,6 +25,9 @@ static struct ccu_clk_gate a10s_gates[] = {
> [CLK_AHB_SPI1] = GATE(0x060, BIT(21)),
> [CLK_AHB_SPI2] = GATE(0x060, BIT(22)),
>
> + [CLK_APB1_I2C0] = GATE(0x06c, BIT(0)),
> + [CLK_APB1_I2C1] = GATE(0x06c, BIT(1)),
> + [CLK_APB1_I2C2] = GATE(0x06c, BIT(2)),
> [CLK_APB1_UART0]= GATE(0x06c, BIT(16)),
> [CLK_APB1_UART1]= GATE(0x06c, BIT(17)),
> [CLK_APB1_UART2]= GATE(0x06c, BIT(18)),
> diff --git a/drivers/clk/sunxi/clk_a23.c b/drivers/clk/sunxi/clk_a23.c
> index 5750514a74f..87011525dcf 100644
> --- a/drivers/clk/sunxi/clk_a23.c
> +++ b/drivers/clk/sunxi/clk_a23.c
> @@ -23,6 +23,9 @@ static struct ccu_clk_gate a23_gates[] = {
> [CLK_BUS_EHCI] = GATE(0x060, BIT(26)),
> [CLK_BUS_OHCI] = GATE(0x060, BIT(29)),
>
> + [CLK_BUS_I2C0] = GATE(0x06c, BIT(0)),
> + [CLK_BUS_I2C1] = GATE(0x06c, BIT(1)),
> + [CLK_BUS_I2C2] = GATE(0x06c, BIT(2)),
> [CLK_BUS_UART0] = GATE(0x06c, BIT(16)),
> [CLK_BUS_UART1] = GATE(0x06c, BIT(17)),
> [CLK_BUS_UART2] = GATE(0x06c, BIT(18)),
> @@ -53,6 +56,9 @@ static struct ccu_reset a23_resets[] = {
> [RST_BUS_EHCI] = RESET(0x2c0, BIT(26)),
> [RST_BUS_OHCI] = RESET(0x2c0, BIT(29)),
>
> + [RST_BUS_I2C0] = RESET(0x2d8, BIT(0)),
> + [RST_BUS_I2C1] = RESET(0x2d8, BIT(1)),
> + [RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
> [RST_BUS_UART0] = RESET(0x2d8, BIT(16)),
> [RST_BUS_UART1] = RESET(0x2d8, BIT(17)),
> [RST_BUS_UART2] = RESET(0x2d8, BIT(18)),
> diff --git a/drivers/clk/sunxi/clk_a31.c b/drivers/clk/sunxi/clk_a31.c
> index 9226112f4af..2554762df9d 100644
> --- a/drivers/clk/sunxi/clk_a31.c
> +++ b/drivers/clk/sunxi/clk_a31.c
> @@ -30,6 +30,10 @@ static struct ccu_clk_gate a31_gates[] = {
> [CLK_AHB1_OHCI1]= GATE(0x060, BIT(30)),
> [CLK_AHB1_OHCI2]= GATE(0x060, BIT(31)),
>
> + [CLK_APB2_I2C0] = GATE(0x06c, BIT(0)),
> + [CLK_APB2_I2C1] = GATE(0x06c, BIT(1)),
> + [CLK_APB2_I2C2] = GATE(0x06c, BIT(2)),
> + [CLK_APB2_I2C3] = GATE(0x06c, BIT(3)),
> [CLK_APB2_UART0]= GATE(0x06c, BIT(16)),
> [CLK_APB2_UART1]= GATE(0x06c, BIT(17)),
> [CLK_APB2_UART2]= GATE(0x06c, BIT(18)),
> @@ -71,6 +75,10 @@ static struct ccu_reset a31_resets[] = {
> [RST_AHB1_OHCI1]= RESET(0x2c0, BIT(30)),
> [RST_AHB1_OHCI2]= RESET(0x2c0, BIT(31)),
>
> + [RST_APB2_I2C0] = RESET(0x2d8, BIT(0)),
> + [RST_APB2_I2C1] = RESET(0x2d8, BIT(1)),
> + [RST_APB2_I2C2] = RESET(0x2d8, BIT(2)),
> + [RST_APB2_I2C3] = RESET(0x2d8, BIT(3)),
> [RST_APB2_UART0]= RESET(0x2d8, BIT(16)),
> [RST_APB2_UART1]= RESET(0x2d8, BIT(17)),
> [RST_APB2_UART2]= RESET(0x2d8, BIT(18)),
> diff
Re: [RESEND PATCH v2 4/4] doc: test: Explain how to run pytests in parallel
On Sun, Sep 19, 2021 at 03:14:51PM -0600, Simon Glass wrote: > Add documentation for this so people can try it out. At present it does > not fully work. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [RESEND PATCH v2 3/4] test: Allow tpm2 tests to run in parallel
On Sun, Sep 19, 2021 at 03:14:50PM -0600, Simon Glass wrote: > These tests currently run in a particular sequence, with some of them > depending on the actions of earlier tests. > > Add a check for sandbox and reset to a known state at the start of each > test, so that all tests can run in parallel. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [RESEND PATCH v2 2/4] test: Allow hush tests to run in parallel
On Sun, Sep 19, 2021 at 03:14:49PM -0600, Simon Glass wrote: > The -z tests don't really need to be part of the main set. Separate them > out so we can drop the test setup/cleans functions and thus run all tests > in parallel. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [RESEND PATCH v2 1/4] test: Allow vboot tests to run in parallel
On Sun, Sep 19, 2021 at 03:14:48PM -0600, Simon Glass wrote: > Update the tests to use separate working directories, so we can run them > in parallel. It also makes it possible to see the individual output files > after the tests have completed. > > Signed-off-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [RFC PATCH] test/py: Check hashes produced by mkimage against known values
On Wed, Sep 15, 2021 at 02:33:01PM -0500, Alexandru Gagniuc wrote:
> Target code and mkimage share the same hashing infrastructure. If one
> is wrong, it's very likely that both are wrong in the same way. Thus
> testing won't catch hash regressions. This already happened in
> commit 92055e138f28 ("image: Drop if/elseif hash selection in
> calculate_hash()"). None of the tests caught that CRC32 was broken.
>
> Instead of testing hash_calculate() against itself, create a FIT with
> containing a kernel with pre-calculated hashes. Then check the hashes
> produced against the known good hashes.
>
> Signed-off-by: Alexandru Gagniuc
> Reviewed-by: Simon Glass
Applied to u-boot/master, thanks!
--
Tom
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Re: [PATCH v1 2/2] pinctrl: single: Add request() api
On Tue, Aug 24, 2021 at 03:46:32PM +0530, Bharat Kumar Reddy Gooty wrote: > From: Bharat Gooty > > Add pinctrl_ops->request api to configure pctrl > pad register in gpio mode. > > Signed-off-by: Rayagonda Kokatanur > Signed-off-by: Bharat Gooty > Acked-by: Rayagonda Kokatanur > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v1 1/2] pinctrl: single: Parse gpio details from dt
On Tue, Aug 24, 2021 at 03:46:31PM +0530, Bharat Kumar Reddy Gooty wrote: > From: Bharat Gooty > > Parse different gpio properties from dt as part of probe > function. This detail is required to enable pinctrl pad > later when gpio lines are requested. > > Signed-off-by: Rayagonda Kokatanur > Signed-off-by: Bharat Gooty > Acked-by: Rayagonda Kokatanur Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] reboot-mode: migrate uclass to livetree
On Mon, Sep 20, 2021 at 06:27:20PM +0200, Patrick Delaunay wrote: > Use dev_ function to support a live tree. > > Signed-off-by: Patrick Delaunay > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] demo: migrate uclass to livetree
On Mon, Sep 20, 2021 at 05:58:33PM +0200, Patrick Delaunay wrote: > Use dev_ function to read the sides and colour to support a live tree. > > Signed-off-by: Patrick Delaunay > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] gpio: Factor out DT flag translation
On Sat, Sep 11, 2021 at 05:05:53PM -0500, Samuel Holland wrote: > The generic GPIO flags binding is shared across many drivers, some of > which need their own xlate function. Factor out the flag translation > code from gpio_xlate_offs_flags so it does not need to be duplicated. > > Signed-off-by: Samuel Holland > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] remoteproc: migrate uclass to livetree
On Mon, Sep 20, 2021 at 05:56:06PM +0200, Patrick Delaunay wrote: > Use dev_ function to read the name and boolean to support a live tree. > > Signed-off-by: Patrick Delaunay > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] gpio: Verify validity of pin offsets from device trees
On Sat, Sep 11, 2021 at 05:05:52PM -0500, Samuel Holland wrote: > Translation of an OF GPIO specifier should fail if the pin offset is > larger than the number of pins in the GPIO bank. > > Signed-off-by: Samuel Holland > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] gpio: Verify validity of pin offsets from device trees
On Sat, Sep 11, 2021 at 05:05:52PM -0500, Samuel Holland wrote: > Translation of an OF GPIO specifier should fail if the pin offset is > larger than the number of pins in the GPIO bank. > > Signed-off-by: Samuel Holland > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/4] arm: imx: mx7: Move CONFIG_OPTEE_TZDRAM_SIZE from lib/optee
On Tue, Sep 07, 2021 at 12:07:09PM -0500, Alexandru Gagniuc wrote: > This config is only used by three boards with this SOC. Most other > platforms derive this information from devicetree, and are unlikely > to ever need this config. > > Moreover, it is confusing when Kconfig asks for this value under > "Support OPTEE images", but does not do anything with the value. > Move it to imx7 for those boards who still make use of it. > > Signed-off-by: Alexandru Gagniuc Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] gpio: Verify validity of pin offsets when looking up names
On Sat, Sep 11, 2021 at 05:05:51PM -0500, Samuel Holland wrote: > Translation of a pin name to a device+offset should fail if the offset > is larger than the number of pins in the GPIO bank. > > Signed-off-by: Samuel Holland > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/4] lib: optee: Remove CONFIG_OPTEE_LOAD_ADDR
On Tue, Sep 07, 2021 at 12:07:08PM -0500, Alexandru Gagniuc wrote:
> This value is not used by u-boot, and it should not. The load address
> of an OPTEE image is defined by said image. Either a uImage or a FIT
> will have a defined load address and entry point. Those values are the
> correct ones, not CONFIG_OPTEE_LOAD_ADDR.
>
> Commit f25006b96e9f ("optee: Add CONFIG_OPTEE_LOAD_ADDR") justifies
> this config by requiring its presence in u-boot's .config for other
> images as part of a larger build, claiming it is "the best way".
>
> This argument is not persuasive. U-boot's configuration is driven by
> platform requirements, not the other way around. It seems more likely
> that the argument is conflating tooling issues with Kconfig. Yocto and
> buildroot have excellent mechanisms for defining values across the
> board (pun intended). u-boot's Kconfig is the wrong place to do it.
>
> Furthermore, it is not "best" for u-boot because it hardcodes a value
> which is then not used. In fact the load address that u-boot uses is
> the one derived from the OPTEE image.
>
> Confused yet? I sure was. To prevent future confusion, remove
> CONFIG_OPTEE_LOAD_ADDR.
>
> Signed-off-by: Alexandru Gagniuc
Applied to u-boot/master, thanks!
--
Tom
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Description: PGP signature
Re: [PATCH 2/4] lib: optee: Remove CONFIG_OPTEE_TZDRAM_BASE
On Tue, Sep 07, 2021 at 12:07:07PM -0500, Alexandru Gagniuc wrote: > It is no longer used in u-boot. Information about the TZDRAM location > is usually available in the devicetree as "/reserved-memory/" nodes. > Because this isn't used, remove it. > > Signed-off-by: Alexandru Gagniuc Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/4] lib: optee: Avoid CONFIG_TZDRAM_* in optee_verify_bootm_image()
On Tue, Sep 07, 2021 at 12:07:06PM -0500, Alexandru Gagniuc wrote:
> The configs TZDRAM_BASE and TZDRAM_SIZE are expected to describe the
> memory allocated to the OPTEE region. according to according to commit
> c5a6e8bd00cc ("optee: Add optee_verify_bootm_image()"). The TZDRAM is
> with some limitations, described by "/reserved-memory" nodes in the
> devicetree.
>
> Consequently TZDRAM_BASE and TZDRAM_SIZE can point to imaginary
> regions which have nothing to do with actual DRAM. They are not used
> to configure the hardware or set up the Trust Zone Controller (TZC)
> for OP-TEE -- the devicetree values are used instead.
>
> When a valid OP-TEE image does not fall within the region described by
> these configs, u-boot will refuse to load it. In fact, it mostly
> serves to cause "bootm" to reject perfectly good OP-TEE images.
>
> Ironically, someone has to correctly configure the devicetree for
> TZDRAM, then go back and enter the same information in Kconfig for
> "bootm". To remedy this, do not use TZDRAM_BASE and TZDRAM_SIZE in the
> verification of OPTEE images.
>
> Signed-off-by: Alexandru Gagniuc
Applied to u-boot/master, thanks!
--
Tom
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Description: PGP signature
Re: [PATCH 2/2] tee: add a stub for tee_find_device
On Thu, Sep 02, 2021 at 11:56:17AM +0200, Patrick Delaunay wrote: > Add stub for tee_find_device function when CONFIG_TEE is not activated > to simplify the caller code. > > This patch allows to remove the CONFIG_IS_ENABLED(OPTEE) tests > for stm32 platform. > > Signed-off-by: Patrick Delaunay > Acked-by: Etienne Carriere > Reviewed-by: Jens Wiklander Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/2] lib: optee: remove the duplicate CONFIG_OPTEE
On Thu, Sep 02, 2021 at 11:56:16AM +0200, Patrick Delaunay wrote: > The configuration CONFIG_OPTEE is defined 2 times: > 1- in lib/optee/Kconfig for support of OPTEE images loaded by bootm command > 2- in drivers/tee/optee/Kconfig for support of OP-TEE driver. > > It is abnormal to have the same CONFIG define for 2 purpose; > and it is difficult to managed correctly their dependencies. > > Moreover CONFIG_SPL_OPTEE is defined in common/spl/Kconfig > to manage OPTEE image load in SPL. > > This definition causes an issue with the macro CONFIG_IS_ENABLED(OPTEE) > to test the availability of the OP-TEE driver. > > This patch cleans the configuration dependency with: > - CONFIG_OPTEE_IMAGE (renamed) => support of OP-TEE image in U-Boot > - CONFIG_SPL_OPTEE_IMAGE (renamed) => support of OP-TEE image in SPL > - CONFIG_OPTEE (same) => support of OP-TEE driver in U-Boot > - CONFIG_OPTEE_LIB (new) => support of OP-TEE library > > After this patch, the macro have the correct behavior: > - CONFIG_IS_ENABLED(OPTEE_IMAGE) => Load of OP-TEE image is supported > - CONFIG_IS_ENABLED(OPTEE) => OP-TEE driver is supported > > Signed-off-by: Patrick Delaunay Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH u-boot-marvell v2 2/6] arm: a37xx: pci: Add support for accessing PCI Bridge on root bus
On Sunday 26 September 2021 00:54:42 Marek Behún wrote:
> @@ -355,20 +369,55 @@ static int pcie_advk_read_config(const struct udevice
> *bus, pci_dev_t bdf,
>enum pci_size_t size)
> {
> struct pcie_advk *pcie = dev_get_priv(bus);
> + int busno = PCI_BUS(bdf) - dev_seq(bus);
> int retry_count;
> bool allow_crs;
> + ulong data;
> uint reg;
> int ret;
>
> dev_dbg(pcie->dev, "PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ",
> PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf));
>
> - if (!pcie_advk_addr_valid(bdf, pcie->first_busno)) {
> + if (!pcie_advk_addr_valid(pcie, busno, PCI_DEV(bdf), PCI_FUNC(bdf))) {
> dev_dbg(pcie->dev, "- out of range\n");
> *valuep = pci_get_ff(size);
> return 0;
> }
>
> + /*
> + * The configuration space of the PCI Bridge on primary (local) bus is
> + * not accessible via PIO transfers like all other PCIe devices. PCI
> + * Bridge config registers are available directly in Aardvark memory
> + * space starting at offset zero. Moreover PCI Bridge registers in the
> + * range 0x10 - 0x34 are not available and register 0x38 (Expansion ROM
> + * Base Address) is at offset 0x30.
> + * We therefore read configuration space content of the primary PCI
> + * Bridge from our virtual cache.
> + */
> + if (busno == pcie->first_busno) {
> + if (offset >= 0x10 && offset < 0x34)
> + data = pcie->cfgcache[(offset - 0x10) / 4];
> + else if ((offset & ~3) == PCI_ROM_ADDRESS1)
> + data = advk_readl(pcie, PCIE_CORE_EXP_ROM_BAR_REG);
> + else
> + data = advk_readl(pcie, offset & ~3);
> +
> + if ((offset & ~3) == (PCI_HEADER_TYPE & ~3)) {
> + /*
> + * Change Header Type of PCI Bridge device to Type 1
> + * (0x01, used by PCI Bridges) because hardwired value
> + * is Type 0 (0x00, used by Endpoint devices).
> + */
> + data &= ~0x00ff;
^^
There is a small mistake. Header Type is 7-bit value. Upper 8th bit
indicates if device is multifunction. So correct mask should be:
data &= ~0x007f;
> + data |= PCI_HEADER_TYPE_BRIDGE << 16;
> + }
> +
> + *valuep = pci_conv_32_to_size(data, offset, size);
> +
> + return 0;
> + }
> +
> /*
>* Returning fabricated CRS value (0x0001) by PCIe Root Complex to
>* OS is allowed only for 4-byte PCI_VENDOR_ID config read request and
Re: [PATCH v5 15/29] image: Drop IMAGE_ENABLE_IGNORE
On 9/25/21 8:43 PM, Simon Glass wrote:
We can use the new host_build() function for this, so drop it.
s/host_build/tools_build/
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
(no changes since v1)
common/image-fit.c | 2 +-
include/image.h| 3 ---
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index 17c6d4e7813..f44f5527b9f 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -1277,7 +1277,7 @@ static int fit_image_check_hash(const void *fit, int
noffset, const void *data,
}
printf("%s", algo);
- if (IMAGE_ENABLE_IGNORE) {
+ if (!tools_build()) {
fit_image_hash_get_ignore(fit, noffset, );
if (ignore) {
printf("-skipped ");
diff --git a/include/image.h b/include/image.h
index e190f59232d..a236180ccdd 100644
--- a/include/image.h
+++ b/include/image.h
@@ -27,7 +27,6 @@ struct fdt_region;
#include
#include
-#define IMAGE_ENABLE_IGNORE 0
#define IMAGE_INDENT_STRING ""
#else
@@ -37,8 +36,6 @@ struct fdt_region;
#include
#include
-/* Take notice of the 'ignore' property for hashes */
-#define IMAGE_ENABLE_IGNORE1
#define IMAGE_INDENT_STRING " "
#endif /* USE_HOSTCC */
Re: [PATCH v5 14/29] image: Drop IMAGE_OF_SYSTEM_SETUP
On 9/25/21 8:43 PM, Simon Glass wrote:
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough. Drop it.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
(no changes since v1)
common/image-fdt.c | 2 +-
include/image.h| 6 --
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/common/image-fdt.c b/common/image-fdt.c
index cd664649e2c..cf87e455230 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -597,7 +597,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
}
}
}
- if (IMAGE_OF_SYSTEM_SETUP) {
+ if (IS_ENABLED(CONFIG_OF_SYSTEM_SETUP)) {
fdt_ret = ft_system_setup(blob, gd->bd);
if (fdt_ret) {
printf("ERROR: system-specific fdt fixup failed: %s\n",
diff --git a/include/image.h b/include/image.h
index e1e4148e4c8..e190f59232d 100644
--- a/include/image.h
+++ b/include/image.h
@@ -49,12 +49,6 @@ struct fdt_region;
#include
#endif /* FIT */
-#ifdef CONFIG_OF_SYSTEM_SETUP
-# define IMAGE_OF_SYSTEM_SETUP 1
-#else
-# define IMAGE_OF_SYSTEM_SETUP 0
-#endif
-
extern ulong image_load_addr; /* Default Load Address */
extern ulong image_save_addr; /* Default Save Address */
extern ulong image_save_size; /* Default Save Size */
Re: [PATCH v5 13/29] image: Drop IMAGE_OF_BOARD_SETUP
On 9/25/21 8:43 PM, Simon Glass wrote:
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough. Drop it.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
(no changes since v1)
common/image-fdt.c | 4 ++--
include/image.h| 6 --
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/common/image-fdt.c b/common/image-fdt.c
index 9441e63a3d4..cd664649e2c 100644
--- a/common/image-fdt.c
+++ b/common/image-fdt.c
@@ -582,7 +582,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
/* Append PStore configuration */
fdt_fixup_pstore(blob);
#endif
- if (IMAGE_OF_BOARD_SETUP) {
+ if (IS_ENABLED(CONFIG_OF_BOARD_SETUP)) {
const char *skip_board_fixup;
skip_board_fixup = env_get("skip_board_fixup");
@@ -629,7 +629,7 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob,
goto err;
#if defined(CONFIG_SOC_KEYSTONE)
- if (IMAGE_OF_BOARD_SETUP)
+ if (IS_ENABLED(CONFIG_OF_BOARD_SETUP))
ft_board_setup_ex(blob, gd->bd);
#endif
diff --git a/include/image.h b/include/image.h
index 00a80999584..e1e4148e4c8 100644
--- a/include/image.h
+++ b/include/image.h
@@ -49,12 +49,6 @@ struct fdt_region;
#include
#endif /* FIT */
-#ifdef CONFIG_OF_BOARD_SETUP
-# define IMAGE_OF_BOARD_SETUP 1
-#else
-# define IMAGE_OF_BOARD_SETUP 0
-#endif
-
#ifdef CONFIG_OF_SYSTEM_SETUP
# define IMAGE_OF_SYSTEM_SETUP1
#else
Re: [PATCH v5 12/29] image: Drop IMAGE_BOOT_GET_CMDLINE
On 9/25/21 8:43 PM, Simon Glass wrote:
This is not needed with Kconfig, since we can use IS_ENABLED() easily
enough and the board code is now in a separate file. Update the only place
where this is used and drop it.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Update commit message to indicate that the code is in a separate file
common/image-board.c | 2 +-
include/image.h | 6 --
2 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/common/image-board.c b/common/image-board.c
index a9a6011ce02..599d6779df5 100644
--- a/common/image-board.c
+++ b/common/image-board.c
@@ -898,7 +898,7 @@ int image_setup_linux(bootm_headers_t *images)
if (CONFIG_IS_ENABLED(OF_LIBFDT))
boot_fdt_add_mem_rsv_regions(lmb, *of_flat_tree);
- if (IMAGE_BOOT_GET_CMDLINE) {
+ if (IS_ENABLED(CONFIG_SYS_BOOT_GET_CMDLINE)) {
This would return 0 on a tools build, right?
ret = boot_get_cmdline(lmb, >cmdline_start,
>cmdline_end);
if (ret) {
diff --git a/include/image.h b/include/image.h
index dc872ef5b24..00a80999584 100644
--- a/include/image.h
+++ b/include/image.h
@@ -49,12 +49,6 @@ struct fdt_region;
#include
#endif /* FIT */
-#ifdef CONFIG_SYS_BOOT_GET_CMDLINE
-# define IMAGE_BOOT_GET_CMDLINE1
-#else
-# define IMAGE_BOOT_GET_CMDLINE0
-#endif
-
#ifdef CONFIG_OF_BOARD_SETUP
# define IMAGE_OF_BOARD_SETUP 1
#else
Re: [PATCH v5 11/29] image: Use the correct checks for CRC32
On 9/25/21 8:43 PM, Simon Glass wrote:
Add a host Kconfig for CRC32. With this we can use CONFIG_IS_ENABLED(CRC32)
directly in the host build, so drop the unnecessary indirection.
Add a few more conditions to SPL_CRC32 to avoid build failures as well as
TPL_CRC32. Also update hash.c to make crc32 optional and to actually take
notice of SPL_CRC32.
Signed-off-by: Simon Glass
I'm not entirely convinced, but it does make CRC32 more consistent with
other hashes.
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Rebase to next
- Use TOOLS_ instead of HOST_
common/hash.c | 13 -
common/spl/Kconfig | 13 -
lib/Kconfig| 5 +
lib/Makefile | 4 +---
tools/Kconfig | 5 +
5 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index e92f9a9594f..b4b01c193b6 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -178,7 +178,7 @@ static int hash_finish_crc16_ccitt(struct hash_algo *algo,
void *ctx,
return 0;
}
-static int hash_init_crc32(struct hash_algo *algo, void **ctxp)
+static int __maybe_unused hash_init_crc32(struct hash_algo *algo, void **ctxp)
{
uint32_t *ctx = malloc(sizeof(uint32_t));
*ctx = 0;
@@ -186,15 +186,16 @@ static int hash_init_crc32(struct hash_algo *algo, void
**ctxp)
return 0;
}
-static int hash_update_crc32(struct hash_algo *algo, void *ctx,
-const void *buf, unsigned int size, int is_last)
+static int __maybe_unused hash_update_crc32(struct hash_algo *algo, void *ctx,
+ const void *buf, unsigned int size,
+ int is_last)
{
*((uint32_t *)ctx) = crc32(*((uint32_t *)ctx), buf, size);
return 0;
}
-static int hash_finish_crc32(struct hash_algo *algo, void *ctx, void *dest_buf,
-int size)
+static int __maybe_unused hash_finish_crc32(struct hash_algo *algo, void *ctx,
+ void *dest_buf, int size)
{
if (size < algo->digest_size)
return -1;
@@ -311,6 +312,7 @@ static struct hash_algo hash_algo[] = {
.hash_update= hash_update_crc16_ccitt,
.hash_finish= hash_finish_crc16_ccitt,
},
+#if CONFIG_IS_ENABLED(CRC32)
{
.name = "crc32",
.digest_size= 4,
@@ -320,6 +322,7 @@ static struct hash_algo hash_algo[] = {
.hash_update= hash_update_crc32,
.hash_finish= hash_finish_crc32,
},
+#endif
};
/* Try to minimize code size for boards that don't want much hashing */
diff --git a/common/spl/Kconfig b/common/spl/Kconfig
index 34f6fc2cfad..91bb6c89fb4 100644
--- a/common/spl/Kconfig
+++ b/common/spl/Kconfig
@@ -419,7 +419,8 @@ config SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION
config SPL_CRC32
bool "Support CRC32"
- default y if SPL_LEGACY_IMAGE_SUPPORT
+ default y if SPL_LEGACY_IMAGE_SUPPORT || SPL_EFI_PARTITION
+ default y if SPL_ENV_SUPPORT || TPL_BLOBLIST
help
Enable this to support CRC32 in uImages or FIT images within SPL.
This is a 32-bit checksum value that can be used to verify images.
@@ -1419,6 +1420,16 @@ config TPL_BOOTROM_SUPPORT
BOOT_DEVICE_BOOTROM (or fall-through to the next boot device in the
boot device list, if not implemented for a given board)
+config TPL_CRC32
+ bool "Support CRC32 in TPL"
+ default y if TPL_ENV_SUPPORT || TPL_BLOBLIST
+ help
+ Enable this to support CRC32 in uImages or FIT images within SPL.
+ This is a 32-bit checksum value that can be used to verify images.
+ For FIT images, this is the least secure type of checksum, suitable
+ for detected accidental image corruption. For secure applications you
+ should consider SHA1 or SHA256.
+
config TPL_DRIVERS_MISC
bool "Support misc drivers in TPL"
help
diff --git a/lib/Kconfig b/lib/Kconfig
index 64765acfa61..70bf8e7a464 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -496,6 +496,11 @@ config SPL_MD5
security applications, but it can be useful for providing a quick
checksum of a block of data.
+config CRC32
+ def_bool y
+ help
+ Enables CRC32 support in U-Boot. This is normally required.
+
config CRC32C
bool
diff --git a/lib/Makefile b/lib/Makefile
index 9c0373e2955..c523bb74119 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -99,9 +99,7 @@ obj-y += display_options.o
CFLAGS_display_options.o := $(if $(BUILD_TAG),-DBUILD_TAG='"$(BUILD_TAG)"')
obj-$(CONFIG_BCH) += bch.o
obj-$(CONFIG_MMC_SPI) += crc7.o
-#ifndef CONFIG_TPL_BUILD
-obj-y += crc32.o
-#endif
+obj-$(CONFIG_$(SPL_TPL_)CRC32) += crc32.o
obj-$(CONFIG_CRC32C) += crc32c.o
obj-y += ctype.o
obj-y += div64.o
diff --git
Re: [PATCH v5 10/29] image: Use Kconfig to enable FIT_RSASSA_PSS on host
On 9/25/21 8:43 PM, Simon Glass wrote:
Add a host Kconfig for FIT_RSASSA_PSS. With this we can use
CONFIG_IS_ENABLED(FIT_RSASSA_PSS) directly in the host build, so drop the
forcing of this in the image.h header.
Drop the #ifdef around padding_pss_verify() too since it is not needed.
Use the compiler to check the config where possible, instead of the
preprocessor.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Avoid preprocessor in a few more places
- Use TOOLS_ instead of HOST_
include/image.h | 3 ---
include/u-boot/rsa.h | 2 --
lib/rsa/rsa-sign.c | 5 ++---
lib/rsa/rsa-verify.c | 16 +++-
tools/Kconfig| 5 +
5 files changed, 10 insertions(+), 21 deletions(-)
Now that's what I'm talking about! deletions > insertions
diff --git a/include/image.h b/include/image.h
index 6efbef06e64..dc872ef5b24 100644
--- a/include/image.h
+++ b/include/image.h
@@ -27,9 +27,6 @@ struct fdt_region;
#include
#include
-/* new uImage format support enabled on host */
-#define CONFIG_FIT_RSASSA_PSS 1
-
#define IMAGE_ENABLE_IGNORE 0
#define IMAGE_INDENT_STRING ""
diff --git a/include/u-boot/rsa.h b/include/u-boot/rsa.h
index 89a9c4caa0a..7556aa5b4b7 100644
--- a/include/u-boot/rsa.h
+++ b/include/u-boot/rsa.h
@@ -103,11 +103,9 @@ int padding_pkcs_15_verify(struct image_sign_info *info,
uint8_t *msg, int msg_len,
const uint8_t *hash, int hash_len);
-#ifdef CONFIG_FIT_RSASSA_PSS
int padding_pss_verify(struct image_sign_info *info,
uint8_t *msg, int msg_len,
const uint8_t *hash, int hash_len);
-#endif /* CONFIG_FIT_RSASSA_PSS */
#define RSA_DEFAULT_PADDING_NAME "pkcs-1.5"
diff --git a/lib/rsa/rsa-sign.c b/lib/rsa/rsa-sign.c
index c27a784c429..0579e5294ee 100644
--- a/lib/rsa/rsa-sign.c
+++ b/lib/rsa/rsa-sign.c
@@ -401,15 +401,14 @@ static int rsa_sign_with_key(EVP_PKEY *pkey, struct
padding_algo *padding_algo,
goto err_sign;
}
-#ifdef CONFIG_FIT_RSASSA_PSS
- if (padding_algo && !strcmp(padding_algo->name, "pss")) {
+ if (CONFIG_IS_ENABLED(FIT_RSASSA_PSS) && padding_algo &&
+ !strcmp(padding_algo->name, "pss")) {
if (EVP_PKEY_CTX_set_rsa_padding(ckey,
RSA_PKCS1_PSS_PADDING) <= 0) {
ret = rsa_err("Signer padding setup failed");
goto err_sign;
}
}
-#endif /* CONFIG_FIT_RSASSA_PSS */
for (i = 0; i < region_count; i++) {
if (!EVP_DigestSignUpdate(context, region[i].data,
diff --git a/lib/rsa/rsa-verify.c b/lib/rsa/rsa-verify.c
index ad6d33d043a..9e522d210d7 100644
--- a/lib/rsa/rsa-verify.c
+++ b/lib/rsa/rsa-verify.c
@@ -102,7 +102,6 @@ U_BOOT_PADDING_ALGO(pkcs_15) = {
};
#endif
-#ifdef CONFIG_FIT_RSASSA_PSS
static void u32_i2osp(uint32_t val, uint8_t *buf)
{
buf[0] = (uint8_t)((val >> 24) & 0xff);
@@ -311,9 +310,6 @@ U_BOOT_PADDING_ALGO(pss) = {
};
#endif
-#endif
-
-#if CONFIG_IS_ENABLED(FIT_SIGNATURE) || CONFIG_IS_ENABLED(RSA_VERIFY_WITH_PKEY)
/**
* rsa_verify_key() - Verify a signature against some data using RSA Key
*
@@ -385,9 +381,7 @@ static int rsa_verify_key(struct image_sign_info *info,
return 0;
}
-#endif
-#if CONFIG_IS_ENABLED(RSA_VERIFY_WITH_PKEY)
/**
* rsa_verify_with_pkey() - Verify a signature against some data using
* only modulus and exponent as RSA key properties.
@@ -408,6 +402,9 @@ int rsa_verify_with_pkey(struct image_sign_info *info,
struct key_prop *prop;
int ret;
+ if (!CONFIG_IS_ENABLED(RSA_VERIFY_WITH_PKEY))
+ return -EACCES;
+
/* Public key is self-described to fill key_prop */
ret = rsa_gen_key_prop(info->key, info->keylen, );
if (ret) {
@@ -422,13 +419,6 @@ int rsa_verify_with_pkey(struct image_sign_info *info,
return ret;
}
-#else
-int rsa_verify_with_pkey(struct image_sign_info *info,
-const void *hash, uint8_t *sig, uint sig_len)
-{
- return -EACCES;
-}
-#endif
#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
/**
diff --git a/tools/Kconfig b/tools/Kconfig
index 9d1c0efd40c..8685c800f93 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -35,6 +35,11 @@ config TOOLS_FIT_PRINT
help
Print the content of the FIT verbosely in the tools builds
+config TOOLS_FIT_RSASSA_PSS
+ def_bool y
+ help
+ Support the rsassa-pss signature scheme in the tools builds
If we're going to have these TOOLS_ configs always on, what's the point
in adding a help text?
+
config TOOLS_FIT_SIGNATURE
def_bool y
help
Re: [PATCH v5 09/29] image: Use Kconfig to enable CONFIG_FIT_VERBOSE on host
On 9/25/21 8:43 PM, Simon Glass wrote:
Add a host Kconfig for FIT_VERBOSE. With this we can use
CONFIG_IS_ENABLED(FIT_VERBOSE) directly in the host build, so drop the
s/host build/ tools build/
forcing of this in the image.h header.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Use TOOLS_ instead of HOST_
include/image.h | 5 ++---
tools/Kconfig | 5 +
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/include/image.h b/include/image.h
index f09eb9de516..6efbef06e64 100644
--- a/include/image.h
+++ b/include/image.h
@@ -28,7 +28,6 @@ struct fdt_region;
#include
/* new uImage format support enabled on host */
-#define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */
#define CONFIG_FIT_RSASSA_PSS 1
#define IMAGE_ENABLE_IGNORE 0
@@ -1458,7 +1457,7 @@ int fit_image_cipher_get_algo(const void *fit, int
noffset, char **algo);
struct cipher_algo *image_get_cipher_algo(const char *full_name);
-#ifdef CONFIG_FIT_VERBOSE
+#if CONFIG_IS_ENABLED(FIT_VERBOSE)
#define fit_unsupported(msg) printf("! %s:%d " \
"FIT images not supported for '%s'\n", \
__FILE__, __LINE__, (msg))
I think if we made this a higher level message, like debug, or spew. we
wouldn't need to #ifdef it out with a CONFIG in the first place.
@@ -1470,7 +1469,7 @@ struct cipher_algo *image_get_cipher_algo(const char
*full_name);
#else
#define fit_unsupported(msg)
#define fit_unsupported_reset(msg)
-#endif /* CONFIG_FIT_VERBOSE */
+#endif /* FIT_VERBOSE */
#endif /* CONFIG_FIT */
#if !defined(USE_HOSTCC)
diff --git a/tools/Kconfig b/tools/Kconfig
index 747d221803f..9d1c0efd40c 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -45,6 +45,11 @@ config TOOLS_FIT_SIGNATURE_MAX_SIZE
depends on TOOLS_FIT_SIGNATURE
default 0x1000
+config TOOLS_FIT_VERBOSE
+ def_bool y
+ help
+ Support verbose FIT output in the tools builds
+
config TOOLS_MD5
def_bool y
help
Re: [PATCH v5 08/29] image: Drop IMAGE_ENABLE_OF_LIBFDT
On 9/25/21 8:43 PM, Simon Glass wrote:
Add a host Kconfig for OF_LIBFDT. With this we can use
CONFIG_IS_ENABLED(OF_LIBFDT) directly in the host build, so drop the
s/host build/tools build/
unnecessary indirection.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Use TOOLS_ instead of HOST_
arch/arc/lib/bootm.c| 2 +-
arch/arm/lib/bootm.c| 4 ++--
arch/microblaze/lib/bootm.c | 2 +-
arch/nds32/lib/bootm.c | 4 ++--
arch/riscv/lib/bootm.c | 4 ++--
board/synopsys/hsdk/hsdk.c | 2 +-
common/bootm.c | 4 ++--
common/image-board.c| 8
common/image.c | 2 +-
include/image.h | 3 ---
lib/lmb.c | 2 +-
tools/Kconfig | 5 +
12 files changed, 22 insertions(+), 20 deletions(-)
I would have hoped deletions > insertions
diff --git a/arch/arc/lib/bootm.c b/arch/arc/lib/bootm.c
index 41408c2b460..ed6c5dfa584 100644
--- a/arch/arc/lib/bootm.c
+++ b/arch/arc/lib/bootm.c
@@ -63,7 +63,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
r0 = 2;
r2 = (unsigned int)images->ft_addr;
} else {
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index dd6a69315ac..a59a5e6c0ea 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -199,7 +199,7 @@ static void boot_prep_linux(bootm_headers_t *images)
{
char *commandline = env_get("bootargs");
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
#ifdef CONFIG_OF_LIBFDT
debug("using: FDT\n");
if (image_setup_linux(images)) {
@@ -356,7 +356,7 @@ static void boot_jump_linux(bootm_headers_t *images, int
flag)
bootstage_mark(BOOTSTAGE_ID_RUN_OS);
announce_and_cleanup(fake);
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len)
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len)
r2 = (unsigned long)images->ft_addr;
else
r2 = gd->bd->bi_boot_params;
diff --git a/arch/microblaze/lib/bootm.c b/arch/microblaze/lib/bootm.c
index 3a6da6e29ff..12ea32488e6 100644
--- a/arch/microblaze/lib/bootm.c
+++ b/arch/microblaze/lib/bootm.c
@@ -75,7 +75,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
static void boot_prep_linux(bootm_headers_t *images)
{
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
debug("using: FDT\n");
if (image_setup_linux(images)) {
printf("FDT creation failed! hanging...");
diff --git a/arch/nds32/lib/bootm.c b/arch/nds32/lib/bootm.c
index 1c7f7856999..71ebfb4225b 100644
--- a/arch/nds32/lib/bootm.c
+++ b/arch/nds32/lib/bootm.c
@@ -69,7 +69,7 @@ int do_bootm_linux(int flag, int argc, char *argv[],
bootm_headers_t *images)
debug("## Transferring control to Linux (at address %08lx) ...\n",
(ulong)theKernel);
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
#ifdef CONFIG_OF_LIBFDT
debug("using: FDT\n");
if (image_setup_linux(images)) {
@@ -110,7 +110,7 @@ int do_bootm_linux(int flag, int argc, char *argv[],
bootm_headers_t *images)
#endif
}
cleanup_before_linux();
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len)
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len)
theKernel(0, machid, (unsigned long)images->ft_addr);
else
theKernel(0, machid, bd->bi_boot_params);
diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c
index ff1bdf71318..2e1e286c8ef 100644
--- a/arch/riscv/lib/bootm.c
+++ b/arch/riscv/lib/bootm.c
@@ -64,7 +64,7 @@ static void announce_and_cleanup(int fake)
static void boot_prep_linux(bootm_headers_t *images)
{
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
#ifdef CONFIG_OF_LIBFDT
debug("using: FDT\n");
if (image_setup_linux(images)) {
@@ -96,7 +96,7 @@ static void boot_jump_linux(bootm_headers_t *images, int flag)
announce_and_cleanup(fake);
if (!fake) {
- if (IMAGE_ENABLE_OF_LIBFDT && images->ft_len) {
+ if (CONFIG_IS_ENABLED(OF_LIBFDT) && images->ft_len) {
#ifdef CONFIG_SMP
ret = smp_call_function(images->ep,
(ulong)images->ft_addr, 0, 0);
diff --git a/board/synopsys/hsdk/hsdk.c b/board/synopsys/hsdk/hsdk.c
index 892b94bb083..226fbba6296 100644
Re: [PATCH v5 07/29] image: Drop IMAGE_ENABLE_FIT
On 9/25/21 8:43 PM, Simon Glass wrote:
Make use of the host Kconfig for FIT. With this we can use
CONFIG_IS_ENABLED(FIT) directly in the host build, so drop the unnecessary
indirection.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Rebase to next
arch/arm/mach-imx/hab.c | 2 +-
common/bootm.c | 10 +-
common/image-board.c| 16
common/image.c | 2 +-
include/fdt_support.h | 2 +-
include/image.h | 17 -
6 files changed, 24 insertions(+), 25 deletions(-)
diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index cc39e6bf569..55317abba23 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -591,7 +591,7 @@ static ulong get_image_ivt_offset(ulong img_addr)
return (image_get_image_size((image_header_t *)img_addr)
+ 0x1000 - 1) & ~(0x1000 - 1);
#endif
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
case IMAGE_FORMAT_FIT:
return (fit_get_size(buf) + 0x1000 - 1) & ~(0x1000 - 1);
#endif
diff --git a/common/bootm.c b/common/bootm.c
index fe17d1da9e5..8d614fe140e 100644
--- a/common/bootm.c
+++ b/common/bootm.c
@@ -115,7 +115,7 @@ static int bootm_find_os(struct cmd_tbl *cmdtp, int flag,
int argc,
images.os.arch = image_get_arch(os_hdr);
break;
#endif
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
case IMAGE_FORMAT_FIT:
if (fit_image_get_type(images.fit_hdr_os,
images.fit_noffset_os,
@@ -187,7 +187,7 @@ static int bootm_find_os(struct cmd_tbl *cmdtp, int flag,
int argc,
/* Kernel entry point is the setup.bin */
} else if (images.legacy_hdr_valid) {
images.ep = image_get_ep(_hdr_os_copy);
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
} else if (images.fit_uname_os) {
int ret;
@@ -295,7 +295,7 @@ int bootm_find_images(int flag, int argc, char *const argv[], ulong start,
set_working_fdt_addr(map_to_sysmem(images.ft_addr));
#endif
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
if (IS_ENABLED(CONFIG_FPGA)) {
/* find bitstreams */
ret = boot_get_fpga(argc, argv, , IH_ARCH_DEFAULT,
@@ -858,7 +858,7 @@ static const void *boot_get_kernel(struct cmd_tbl *cmdtp,
int flag, int argc,
const void *buf;
const char *fit_uname_config = NULL;
const char *fit_uname_kernel = NULL;
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
int os_noffset;
#endif
@@ -916,7 +916,7 @@ static const void *boot_get_kernel(struct cmd_tbl *cmdtp, int flag, int argc,
bootstage_mark(BOOTSTAGE_ID_DECOMP_IMAGE);
break;
#endif
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
case IMAGE_FORMAT_FIT:
os_noffset = fit_image_load(images, img_addr,
_uname_kernel, _uname_config,
diff --git a/common/image-board.c b/common/image-board.c
index c13d0493ca3..c699232ba13 100644
--- a/common/image-board.c
+++ b/common/image-board.c
@@ -282,7 +282,7 @@ int genimg_get_format(const void *img_addr)
if (image_check_magic(hdr))
return IMAGE_FORMAT_LEGACY;
#endif
-#if IMAGE_ENABLE_FIT || IMAGE_ENABLE_OF_LIBFDT
+#if CONFIG_IS_ENABLED(FIT) || IMAGE_ENABLE_OF_LIBFDT
if (fdt_check_header(img_addr) == 0)
return IMAGE_FORMAT_FIT;
#endif
@@ -307,7 +307,7 @@ int genimg_get_format(const void *img_addr)
*/
int genimg_has_config(bootm_headers_t *images)
{
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
if (images->fit_uname_cfg)
return 1;
#endif
@@ -348,7 +348,7 @@ int boot_get_ramdisk(int argc, char *const argv[],
bootm_headers_t *images,
#ifdef CONFIG_SUPPORT_RAW_INITRD
char *end;
#endif
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
const char *fit_uname_config = images->fit_uname_cfg;
const char *fit_uname_ramdisk = NULL;
ulong default_addr;
@@ -380,7 +380,7 @@ int boot_get_ramdisk(int argc, char *const argv[],
bootm_headers_t *images,
rd_len = 0;
rd_data = 0;
} else if (select || genimg_has_config(images)) {
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
if (select) {
/*
* If the init ramdisk comes from the FIT image and
@@ -409,7 +409,7 @@ int boot_get_ramdisk(int argc, char *const argv[],
bootm_headers_t *images,
debug("* ramdisk: cmdline image address =
0x%08lx\n",
rd_addr);
}
-#if IMAGE_ENABLE_FIT
+#if CONFIG_IS_ENABLED(FIT)
} else {
/* use FIT configuration provided in first bootm
Re: [PATCH v5 06/29] hash: Drop some #ifdefs in hash.c
On 9/25/21 8:43 PM, Simon Glass wrote:
We can use the __maybe_unused attribute to avoid some of the #ifdefs in
this file. Update the functions accordingly.
Note: The actual hashing interface is still a mess, with four separate
combinations and lots of #ifdefs. This should really use a driver
approach, e.g. as is done with partition drivers.
Signed-off-by: Simon Glass
---
I'm not too excited about a qualifier that maybe tells me something
about the function.
Assuming we move these to linker lists in the near (not far) future,
Reviewed-by: Alexandru Gagniuc
Changes in v5:
- Rebase to next
common/hash.c | 54 ---
1 file changed, 25 insertions(+), 29 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index 0fe65c959d0..e92f9a9594f 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -24,6 +24,7 @@
#include
#else
#include "mkimage.h"
+#include
#include
#include
#endif /* !USE_HOSTCC*/
@@ -42,8 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
static void reloc_update(void);
-#if CONFIG_IS_ENABLED(SHA1) && !CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
-static int hash_init_sha1(struct hash_algo *algo, void **ctxp)
+static int __maybe_unused hash_init_sha1(struct hash_algo *algo, void **ctxp)
{
sha1_context *ctx = malloc(sizeof(sha1_context));
sha1_starts(ctx);
@@ -51,15 +51,16 @@ static int hash_init_sha1(struct hash_algo *algo, void
**ctxp)
return 0;
}
-static int hash_update_sha1(struct hash_algo *algo, void *ctx, const void *buf,
- unsigned int size, int is_last)
+static int __maybe_unused hash_update_sha1(struct hash_algo *algo, void *ctx,
+ const void *buf, unsigned int size,
+ int is_last)
{
sha1_update((sha1_context *)ctx, buf, size);
return 0;
}
-static int hash_finish_sha1(struct hash_algo *algo, void *ctx, void *dest_buf,
- int size)
+static int __maybe_unused hash_finish_sha1(struct hash_algo *algo, void *ctx,
+ void *dest_buf, int size)
{
if (size < algo->digest_size)
return -1;
@@ -68,10 +69,8 @@ static int hash_finish_sha1(struct hash_algo *algo, void
*ctx, void *dest_buf,
free(ctx);
return 0;
}
-#endif
-#if CONFIG_IS_ENABLED(SHA256) && !CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
-static int hash_init_sha256(struct hash_algo *algo, void **ctxp)
+static int __maybe_unused hash_init_sha256(struct hash_algo *algo, void **ctxp)
{
sha256_context *ctx = malloc(sizeof(sha256_context));
sha256_starts(ctx);
@@ -79,15 +78,16 @@ static int hash_init_sha256(struct hash_algo *algo, void
**ctxp)
return 0;
}
-static int hash_update_sha256(struct hash_algo *algo, void *ctx,
- const void *buf, unsigned int size, int is_last)
+static int __maybe_unused hash_update_sha256(struct hash_algo *algo, void *ctx,
+const void *buf, uint size,
+int is_last)
{
sha256_update((sha256_context *)ctx, buf, size);
return 0;
}
-static int hash_finish_sha256(struct hash_algo *algo, void *ctx, void
- *dest_buf, int size)
+static int __maybe_unused hash_finish_sha256(struct hash_algo *algo, void *ctx,
+void *dest_buf, int size)
{
if (size < algo->digest_size)
return -1;
@@ -96,10 +96,8 @@ static int hash_finish_sha256(struct hash_algo *algo, void
*ctx, void
free(ctx);
return 0;
}
-#endif
-#if CONFIG_IS_ENABLED(SHA384) && !CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
-static int hash_init_sha384(struct hash_algo *algo, void **ctxp)
+static int __maybe_unused hash_init_sha384(struct hash_algo *algo, void **ctxp)
{
sha512_context *ctx = malloc(sizeof(sha512_context));
sha384_starts(ctx);
@@ -107,15 +105,16 @@ static int hash_init_sha384(struct hash_algo *algo, void
**ctxp)
return 0;
}
-static int hash_update_sha384(struct hash_algo *algo, void *ctx,
- const void *buf, unsigned int size, int is_last)
+static int __maybe_unused hash_update_sha384(struct hash_algo *algo, void *ctx,
+const void *buf, uint size,
+int is_last)
{
sha384_update((sha512_context *)ctx, buf, size);
return 0;
}
-static int hash_finish_sha384(struct hash_algo *algo, void *ctx, void
- *dest_buf, int size)
+static int __maybe_unused hash_finish_sha384(struct hash_algo *algo, void *ctx,
+void *dest_buf, int size)
{
if (size < algo->digest_size)
return -1;
@@ -124,10 +123,8 @@ static
Re: [PATCH v5 05/29] hash: Use Kconfig to enable hashing in host tools and SPL
On 9/25/21 8:43 PM, Simon Glass wrote:
At present when building host tools, we force CONFIG_SHAxxx to be enabled
regardless of the board Kconfig setting. This is done in the image.h
header file.
For SPL we currently just assume the algorithm is desired if U-Boot proper
enables it.
Clean this up by adding new Kconfig options to enable hashing on the host,
relying on CONFIG_IS_ENABLED() to deal with the different builds.
Add new SPL Kconfigs for hardware-accelerated hashing, to maintain the
current settings.
This allows us to drop the image.h code and the I_WANT_MD5 hack.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Drop I_WANT_MD5
- Use TOOLS_ instead of HOST_
Changes in v2:
- Add SPL_ Kconfigs also, since otherwise hashing algorithms drop from SPL
common/hash.c | 49 +++--
include/image.h | 5 -
lib/Kconfig | 18 ++
tools/Kconfig | 25 +
4 files changed, 66 insertions(+), 31 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index 6277fe65b3e..0fe65c959d0 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -25,6 +25,7 @@
#else
#include "mkimage.h"
#include
+#include
#endif /* !USE_HOSTCC*/
#include
@@ -41,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
static void reloc_update(void);
-#if defined(CONFIG_SHA1) && !defined(CONFIG_SHA_PROG_HW_ACCEL)
+#if CONFIG_IS_ENABLED(SHA1) && !CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
static int hash_init_sha1(struct hash_algo *algo, void **ctxp)
{
sha1_context *ctx = malloc(sizeof(sha1_context));
@@ -69,7 +70,7 @@ static int hash_finish_sha1(struct hash_algo *algo, void
*ctx, void *dest_buf,
}
#endif
One day, I'd like to make these init__ functions part of
linker lists and move each to their respective .c
One day.
-#if defined(CONFIG_SHA256) && !defined(CONFIG_SHA_PROG_HW_ACCEL)
+#if CONFIG_IS_ENABLED(SHA256) && !CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
static int hash_init_sha256(struct hash_algo *algo, void **ctxp)
{
sha256_context *ctx = malloc(sizeof(sha256_context));
@@ -97,7 +98,7 @@ static int hash_finish_sha256(struct hash_algo *algo, void
*ctx, void
}
#endif
-#if defined(CONFIG_SHA384) && !defined(CONFIG_SHA_PROG_HW_ACCEL)
+#if CONFIG_IS_ENABLED(SHA384) && !CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
static int hash_init_sha384(struct hash_algo *algo, void **ctxp)
{
sha512_context *ctx = malloc(sizeof(sha512_context));
@@ -125,7 +126,7 @@ static int hash_finish_sha384(struct hash_algo *algo, void
*ctx, void
}
#endif
-#if defined(CONFIG_SHA512) && !defined(CONFIG_SHA_PROG_HW_ACCEL)
+#if CONFIG_IS_ENABLED(SHA512) && !CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
static int hash_init_sha512(struct hash_algo *algo, void **ctxp)
{
sha512_context *ctx = malloc(sizeof(sha512_context));
@@ -207,18 +208,13 @@ static int hash_finish_crc32(struct hash_algo *algo, void
*ctx, void *dest_buf,
return 0;
}
-#ifdef USE_HOSTCC
-# define I_WANT_MD51
-#else
-# define I_WANT_MD5CONFIG_IS_ENABLED(MD5)
-#endif
/*
* These are the hash algorithms we support. If we have hardware acceleration
* is enable we will use that, otherwise a software version of the algorithm.
* Note that algorithm names must be in lower case.
*/
static struct hash_algo hash_algo[] = {
-#if I_WANT_MD5
+#if CONFIG_IS_ENABLED(MD5)
{
.name = "md5",
.digest_size= MD5_SUM_LEN,
@@ -226,17 +222,17 @@ static struct hash_algo hash_algo[] = {
.hash_func_ws = md5_wd,
},
#endif
-#ifdef CONFIG_SHA1
+#if CONFIG_IS_ENABLED(SHA1)
{
.name = "sha1",
.digest_size= SHA1_SUM_LEN,
.chunk_size = CHUNKSZ_SHA1,
-#ifdef CONFIG_SHA_HW_ACCEL
+#if CONFIG_IS_ENABLED(SHA_HW_ACCEL)
.hash_func_ws = hw_sha1,
#else
.hash_func_ws = sha1_csum_wd,
#endif
-#ifdef CONFIG_SHA_PROG_HW_ACCEL
+#if CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
.hash_init = hw_sha_init,
.hash_update= hw_sha_update,
.hash_finish= hw_sha_finish,
@@ -247,17 +243,17 @@ static struct hash_algo hash_algo[] = {
#endif
},
#endif
-#ifdef CONFIG_SHA256
+#if CONFIG_IS_ENABLED(SHA256)
{
.name = "sha256",
.digest_size= SHA256_SUM_LEN,
.chunk_size = CHUNKSZ_SHA256,
-#ifdef CONFIG_SHA_HW_ACCEL
+#if CONFIG_IS_ENABLED(SHA_HW_ACCEL)
.hash_func_ws = hw_sha256,
#else
.hash_func_ws = sha256_csum_wd,
#endif
-#ifdef CONFIG_SHA_PROG_HW_ACCEL
+#if CONFIG_IS_ENABLED(SHA_PROG_HW_ACCEL)
.hash_init = hw_sha_init,
.hash_update= hw_sha_update,
.hash_finish= hw_sha_finish,
@@ -268,17 +264,17 @@ static struct
Re: [PATCH v5 04/29] spl: cypto: Bring back SPL_ versions of SHA
On 9/25/21 8:43 PM, Simon Glass wrote:
Unfortunately these were removed by mistake. This means that adding hash
support to SPL brings in all software algorithms, with a substantial
increase in code size.
The origin of the problem was renaming them to SPL_FIT_xxx and then these
were removed altogether in a later commit.
Add them back. This aligns with CONFIG_MD5, for example, which has an SPL
variant.
Signed-off-by: Simon Glass
Fixes: f5bc9c25f31 ("image: Rename SPL_SHAxxx_SUPPORT to SPL_FIT_SHAxxx")
Fixes: eb5171ddec9 ("common: Remove unused CONFIG_FIT_SHAxxx selectors")
Reviewed-by: Alexandru Gagniuc
I don't think these ever worked as intended. I had issues disabling SHA1
in SPL before either of the suspect patches were merged.
---
For now this has no effect but the next patch updates hash.c to deal with
this condition for both SPL and tools.
Changes in v5:
- Add new patch to bring back SPL_ versions of SHA
lib/Kconfig | 43 ++-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/lib/Kconfig b/lib/Kconfig
index 034af724b5d..7899e756f99 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -373,7 +373,6 @@ config SHA256
The SHA256 algorithm produces a 256-bit (32-byte) hash value
(digest).
-
config SHA512
bool "Enable SHA512 support"
help
@@ -399,6 +398,48 @@ config SHA_HW_ACCEL
hashing algorithms. This affects the 'hash' command and also the
hash_lookup_algo() function.
+if SPL
+
+config SPL_SHA1
+ bool "Enable SHA1 support in SPL"
+ default y if SHA1
+ help
+ This option enables support of hashing using SHA1 algorithm.
+ The hash is calculated in software.
+ The SHA1 algorithm produces a 160-bit (20-byte) hash value
+ (digest).
+
+config SPL_SHA256
+ bool "Enable SHA256 support in SPL"
+ default y if SHA256
+ help
+ This option enables support of hashing using SHA256 algorithm.
+ The hash is calculated in software.
+ The SHA256 algorithm produces a 256-bit (32-byte) hash value
+ (digest).
+
+config SPL_SHA512
+ bool "Enable SHA512 support in SPL"
+ default y if SHA512
+ help
+ This option enables support of hashing using SHA512 algorithm.
+ The hash is calculated in software.
+ The SHA512 algorithm produces a 512-bit (64-byte) hash value
+ (digest).
+
+config SPL_SHA384
+ bool "Enable SHA384 support in SPL"
+ default y if SHA384
+ select SPL_SHA512
+ help
+ This option enables support of hashing using SHA384 algorithm.
+ The hash is calculated in software. This is also selects SHA512,
+ because these implementations share the bulk of the code..
+ The SHA384 algorithm produces a 384-bit (48-byte) hash value
+ (digest).
+
+endif
+
if SHA_HW_ACCEL
config SHA512_HW_ACCEL
Re: [PATCH v5 03/29] image: Add Kconfig options for FIT in the tools build
On 9/25/21 8:43 PM, Simon Glass wrote:
In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
some options to enable the various FIT options expected in these tools.
This will ensure that the code builds correctly when CONFIG_TOOLS_xxx
is distinct from CONFIG_xxx.
Drop some #ifdefs which are immediately unnecessary (many more are in
later patches).
Signed-off-by: Simon Glass
Under protest,
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Drop changes to tools/Makefile since they already use TOOLS_ Kconfigs
- Use TOOLS_ instead of HOST_
common/image-fit-sig.c | 3 ++-
common/image-fit.c | 4 ++--
tools/Kconfig | 25 +
3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c
index b979cd2a4b6..e95e64bd2fe 100644
--- a/common/image-fit-sig.c
+++ b/common/image-fit-sig.c
@@ -72,11 +72,12 @@ static int fit_image_setup_verify(struct image_sign_info
*info,
char *algo_name;
const char *padding_name;
+#ifndef USE_HOSTCC
if (fdt_totalsize(fit) > CONFIG_FIT_SIGNATURE_MAX_SIZE) {
If you set CONFIG_FIT_SIGNATURE_MAX_SIZE to 0x1000, then this
comparison will always be false.
*err_msgp = "Total size too large";
return 1;
}
-
+#endif
if (fit_image_hash_get_algo(fit, noffset, _name)) {
*err_msgp = "Can't get hash algo property";
return -1;
diff --git a/common/image-fit.c b/common/image-fit.c
index 6f8e67e4158..17c6d4e7813 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -170,7 +170,7 @@ int fit_get_subimage_count(const void *fit, int
images_noffset)
return count;
}
-#if CONFIG_IS_ENABLED(FIT_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT)
+#if CONFIG_IS_ENABLED(FIT_PRINT)
/**
* fit_image_print_data() - prints out the hash node details
* @fit: pointer to the FIT format image header
@@ -578,7 +578,7 @@ void fit_image_print(const void *fit, int image_noffset,
const char *p)
#else
void fit_print_contents(const void *fit) { }
void fit_image_print(const void *fit, int image_noffset, const char *p) { }
-#endif /* CONFIG_IS_ENABLED(FIR_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT) */
+#endif /* CONFIG_IS_ENABLED(FIT_PRINT) */
/**
* fit_get_desc - get node description property
diff --git a/tools/Kconfig b/tools/Kconfig
index d6f82cd949b..ea986ab0479 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -20,4 +20,29 @@ config TOOLS_LIBCRYPTO
This selection does not affect target features, such as runtime FIT
signature verification.
+config TOOLS_FIT
+config TOOLS_FIT_FULL_CHECK
+config TOOLS_FIT_PRINT
+config TOOLS_FIT_SIGNATURE
Besides FIT_PRINT, I'm confused as to where the others are used by the
tools build.
+
+config TOOLS_FIT_SIGNATURE_MAX_SIZE
On the other hand, if you #ifdef out the check in image-fit-sig.c, then
it doesn't make sense to have this config on the tools.
+ hex
+ depends on TOOLS_FIT_SIGNATURE
+ default 0x1000
+
endmenu
Re: [PATCH v5 03/29] image: Add Kconfig options for FIT in the tools build
On 9/25/21 8:43 PM, Simon Glass wrote:
In preparation for enabling CONFIG_IS_ENABLED() on the host build, add
some options to enable the various FIT options expected in these tools.
This will ensure that the code builds correctly when CONFIG_TOOLS_xxx
is distinct from CONFIG_xxx.
Drop some #ifdefs which are immediately unnecessary (many more are in
later patches).
Signed-off-by: Simon Glass
Under protest,
Reviewed-by: Alexandru Gagniuc
---
Changes in v5:
- Drop changes to tools/Makefile since they already use TOOLS_ Kconfigs
- Use TOOLS_ instead of HOST_
common/image-fit-sig.c | 3 ++-
common/image-fit.c | 4 ++--
tools/Kconfig | 25 +
3 files changed, 29 insertions(+), 3 deletions(-)
diff --git a/common/image-fit-sig.c b/common/image-fit-sig.c
index b979cd2a4b6..e95e64bd2fe 100644
--- a/common/image-fit-sig.c
+++ b/common/image-fit-sig.c
@@ -72,11 +72,12 @@ static int fit_image_setup_verify(struct image_sign_info
*info,
char *algo_name;
const char *padding_name;
+#ifndef USE_HOSTCC
if (fdt_totalsize(fit) > CONFIG_FIT_SIGNATURE_MAX_SIZE) {
If you set CONFIG_FIT_SIGNATURE_MAX_SIZE to 0x1000, then this
comparison will always be false.
*err_msgp = "Total size too large";
return 1;
}
-
+#endif
if (fit_image_hash_get_algo(fit, noffset, _name)) {
*err_msgp = "Can't get hash algo property";
return -1;
diff --git a/common/image-fit.c b/common/image-fit.c
index 6f8e67e4158..17c6d4e7813 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -170,7 +170,7 @@ int fit_get_subimage_count(const void *fit, int
images_noffset)
return count;
}
-#if CONFIG_IS_ENABLED(FIT_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT)
+#if CONFIG_IS_ENABLED(FIT_PRINT)
/**
* fit_image_print_data() - prints out the hash node details
* @fit: pointer to the FIT format image header
@@ -578,7 +578,7 @@ void fit_image_print(const void *fit, int image_noffset,
const char *p)
#else
void fit_print_contents(const void *fit) { }
void fit_image_print(const void *fit, int image_noffset, const char *p) { }
-#endif /* CONFIG_IS_ENABLED(FIR_PRINT) || CONFIG_IS_ENABLED(SPL_FIT_PRINT) */
+#endif /* CONFIG_IS_ENABLED(FIT_PRINT) */
/**
* fit_get_desc - get node description property
diff --git a/tools/Kconfig b/tools/Kconfig
index d6f82cd949b..ea986ab0479 100644
--- a/tools/Kconfig
+++ b/tools/Kconfig
@@ -20,4 +20,29 @@ config TOOLS_LIBCRYPTO
This selection does not affect target features, such as runtime FIT
signature verification.
+config TOOLS_FIT
+config TOOLS_FIT_FULL_CHECK
+config TOOLS_FIT_PRINT
+config TOOLS_FIT_SIGNATURE
Besides FIT_PRINT, I'm confused as to where the others are used by the
tools build.
+
+config TOOLS_FIT_SIGNATURE_MAX_SIZE
On the other hand, if you #ifdef out the check in image-fit-sig.c, then
it doesn't make sense to have this config on the tools.
+ hex
+ depends on TOOLS_FIT_SIGNATURE
+ default 0x1000
+
endmenu
Re: [PATCH v5 02/29] kconfig: Add tools support to CONFIG_IS_ENABLED()
On 9/25/21 8:43 PM, Simon Glass wrote: At present we must separately test for the host build for many options, since we force them to be enabled. For example, CONFIG_FIT is always enabled in the host tools, even if CONFIG_FIT is not enabled by the board itself. It would be more convenient if we could use, for example, CONFIG_IS_ENABLED(FIT) and get CONFIG_HOST_FIT, when building for the host. Add support for this. With this and the tools_build() function, we should be able to remove all the #ifdefs currently needed in code that is build by tools and targets. This will be even nicer when we move to using CONFIG(xxx) everywhere, since all the #ifdef and IS_ENABLED/CONFIG_IS_ENABLED stuff will go away. Signed-off-by: Simon Glass Suggested-by: Rasmus Villemoes # b4f73886 Under protest, Reviewed-by: Alexandru Gagniuc --- Changes in v5: - Update commit message - Use TOOLS_ instead of HOST_ Changes in v2: - Correct comment about USE_HOSTCC being undefined in CONFIG_VAL() - Fix up comment to put an underscore after every CONFIG include/linux/kconfig.h | 13 ++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/include/linux/kconfig.h b/include/linux/kconfig.h index d109ed3119e..a1d1a298426 100644 --- a/include/linux/kconfig.h +++ b/include/linux/kconfig.h @@ -31,11 +31,14 @@ (config_enabled(option)) /* - * U-Boot add-on: Helper macros to reference to different macros - * (CONFIG_ or CONFIG_SPL_ prefixed), depending on the build context. + * U-Boot add-on: Helper macros to reference to different macros (prefixed by + * CONFIG_, CONFIG_SPL_, CONFIG_TPL_ or CONFIG_TOOLS_), depending on the build + * context. */ -#if defined(CONFIG_TPL_BUILD) +#ifdef USE_HOSTCC +#define _CONFIG_PREFIX TOOLS_ +#elif defined(CONFIG_TPL_BUILD) #define _CONFIG_PREFIX TPL_ #elif defined(CONFIG_SPL_BUILD) #define _CONFIG_PREFIX SPL_ @@ -49,6 +52,7 @@ /* * CONFIG_VAL(FOO) evaluates to the value of + * CONFIG_TOOLS_FOO if USE_HOSTCC is defined, * CONFIG_FOO if CONFIG_SPL_BUILD is undefined, * CONFIG_SPL_FOO if CONFIG_SPL_BUILD is defined. * CONFIG_TPL_FOO if CONFIG_TPL_BUILD is defined. @@ -76,18 +80,21 @@ /* * CONFIG_IS_ENABLED(FOO) expands to + * 1 if USE_HOSTCC is defined and CONFIG_TOOLS_FOO is set to 'y', * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y', * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y', * 1 if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y', * 0 otherwise. * * CONFIG_IS_ENABLED(FOO, (abc)) expands to + * abc if USE_HOSTCC is defined and CONFIG_TOOLS_FOO is set to 'y', * abc if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y', * abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y', * abc if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y', * nothing otherwise. * * CONFIG_IS_ENABLED(FOO, (abc), (def)) expands to + * abc if USE_HOSTCC is defined and CONFIG_TOOLS_FOO is set to 'y', * abc if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y', * abc if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y', * abc if CONFIG_TPL_BUILD is defined and CONFIG_TPL_FOO is set to 'y',
Re: [PATCH v5 01/29] compiler: Rename host_build() to tools_build()
On 9/25/21 8:43 PM, Simon Glass wrote:
With the new TOOLS_LIBCRYPTO and some other changes, it seems that we are
heading towards calling this a tools build rather than a host build,
although of course it does happen on the host.
I cannot think of anything built by the host which cannot be described as
a tool, so rename this function.
Signed-off-by: Simon Glass
Reviewed-by: Alexandru Gagniuc
I think this change makes sense. The code becomes clearer, as we remove
the ambiguity of what host means.
---
Changes in v5:
- Add a new patch to rename host_build() to tools_build()
common/image-fit.c | 8
common/image.c | 12 ++--
include/compiler.h | 5 +++--
3 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/common/image-fit.c b/common/image-fit.c
index 5a0a0cc2007..6f8e67e4158 100644
--- a/common/image-fit.c
+++ b/common/image-fit.c
@@ -509,7 +509,7 @@ void fit_image_print(const void *fit, int image_noffset,
const char *p)
ret = fit_image_get_data_and_size(fit, image_noffset, , );
- if (!host_build()) {
+ if (!tools_build()) {
printf("%s Data Start: ", p);
if (ret) {
printf("unavailable\n");
@@ -1845,7 +1845,7 @@ int fit_conf_get_node(const void *fit, const char
*conf_uname)
if (conf_uname == NULL) {
/* get configuration unit name from the default property */
debug("No configuration specified, trying default...\n");
- if (!host_build() && IS_ENABLED(CONFIG_MULTI_DTB_FIT)) {
+ if (!tools_build() && IS_ENABLED(CONFIG_MULTI_DTB_FIT)) {
noffset = fit_find_config_node(fit);
if (noffset < 0)
return noffset;
@@ -2093,7 +2093,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
}
bootstage_mark(bootstage_id + BOOTSTAGE_SUB_CHECK_ARCH);
- if (!host_build() && IS_ENABLED(CONFIG_SANDBOX)) {
+ if (!tools_build() && IS_ENABLED(CONFIG_SANDBOX)) {
if (!fit_image_check_target_arch(fit, noffset)) {
puts("Unsupported Architecture\n");
bootstage_error(bootstage_id +
BOOTSTAGE_SUB_CHECK_ARCH);
@@ -2158,7 +2158,7 @@ int fit_image_load(bootm_headers_t *images, ulong addr,
}
/* perform any post-processing on the image data */
- if (!host_build() && IS_ENABLED(CONFIG_FIT_IMAGE_POST_PROCESS))
+ if (!tools_build() && IS_ENABLED(CONFIG_FIT_IMAGE_POST_PROCESS))
board_fit_image_post_process(fit, noffset, , );
len = (ulong)size;
diff --git a/common/image.c b/common/image.c
index 2f2fd052c50..66685b4ba99 100644
--- a/common/image.c
+++ b/common/image.c
@@ -460,11 +460,11 @@ int image_decomp(int comp, ulong load, ulong image_start,
int type,
ret = -ENOSPC;
break;
case IH_COMP_GZIP:
- if (!host_build() && CONFIG_IS_ENABLED(GZIP))
+ if (!tools_build() && CONFIG_IS_ENABLED(GZIP))
ret = gunzip(load_buf, unc_len, image_buf, _len);
break;
case IH_COMP_BZIP2:
- if (!host_build() && CONFIG_IS_ENABLED(BZIP2)) {
+ if (!tools_build() && CONFIG_IS_ENABLED(BZIP2)) {
uint size = unc_len;
/*
@@ -478,7 +478,7 @@ int image_decomp(int comp, ulong load, ulong image_start,
int type,
}
break;
case IH_COMP_LZMA:
- if (!host_build() && CONFIG_IS_ENABLED(LZMA)) {
+ if (!tools_build() && CONFIG_IS_ENABLED(LZMA)) {
SizeT lzma_len = unc_len;
ret = lzmaBuffToBuffDecompress(load_buf, _len,
@@ -487,7 +487,7 @@ int image_decomp(int comp, ulong load, ulong image_start,
int type,
}
break;
case IH_COMP_LZO:
- if (!host_build() && CONFIG_IS_ENABLED(LZO)) {
+ if (!tools_build() && CONFIG_IS_ENABLED(LZO)) {
size_t size = unc_len;
ret = lzop_decompress(image_buf, image_len, load_buf, );
@@ -495,7 +495,7 @@ int image_decomp(int comp, ulong load, ulong image_start,
int type,
}
break;
case IH_COMP_LZ4:
- if (!host_build() && CONFIG_IS_ENABLED(LZ4)) {
+ if (!tools_build() && CONFIG_IS_ENABLED(LZ4)) {
size_t size = unc_len;
ret = ulz4fn(image_buf, image_len, load_buf, );
@@ -503,7 +503,7 @@ int image_decomp(int comp, ulong load, ulong image_start,
int type,
}
break;
case IH_COMP_ZSTD:
- if (!host_build() && CONFIG_IS_ENABLED(ZSTD)) {
+ if (!tools_build() && CONFIG_IS_ENABLED(ZSTD)) {
struct abuf in, out;
abuf_init_set(, image_buf, image_len);
diff --git a/include/compiler.h
[PATCH] CI: Update to LLVM-13
- Switch sources and CI scripts to install and use LLVM-13 - Update to latest "focal" tag. Signed-off-by: Tom Rini --- .azure-pipelines.yml| 4 ++-- .gitlab-ci.yml | 4 ++-- tools/docker/Dockerfile | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 53f86f5184c5..2ca146c0fdf4 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -2,7 +2,7 @@ variables: windows_vm: vs2017-win2016 ubuntu_vm: ubuntu-18.04 macos_vm: macOS-10.15 - ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20210827-30Sep2021 + ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20210921-05Oct2021 # Add '-u 0' options for Azure pipelines, otherwise we get "permission # denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer", # since our $(ci_runner_image) user is not root. @@ -183,7 +183,7 @@ jobs: TEST_PY_BD: "sandbox" sandbox_clang: TEST_PY_BD: "sandbox" - OVERRIDE: "-O clang-12" + OVERRIDE: "-O clang-13" sandbox_spl: TEST_PY_BD: "sandbox_spl" TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff or test_spl" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 5a3e2f0ceb85..699ce991fb37 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -2,7 +2,7 @@ # Grab our configured image. The source for this is found at: # https://source.denx.de/u-boot/gitlab-ci-runner -image: trini/u-boot-gitlab-ci-runner:focal-20210827-30Sep2021 +image: trini/u-boot-gitlab-ci-runner:focal-20210921-05Oct2021 # We run some tests in different order, to catch some failures quicker. stages: @@ -190,7 +190,7 @@ sandbox test.py: sandbox with clang test.py: variables: TEST_PY_BD: "sandbox" -OVERRIDE: "-O clang-12" +OVERRIDE: "-O clang-13" <<: *buildman_and_testpy_dfn sandbox_spl test.py: diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile index 92113dcb72f9..1a44423d77b7 100644 --- a/tools/docker/Dockerfile +++ b/tools/docker/Dockerfile @@ -2,7 +2,7 @@ # This Dockerfile is used to build an image containing basic stuff to be used # to build U-Boot and run our test suites. -FROM ubuntu:focal-20210827 +FROM ubuntu:focal-20210921 MAINTAINER Tom Rini LABEL Description=" This image is for building U-Boot inside a container" @@ -12,7 +12,7 @@ ENV DEBIAN_FRONTEND=noninteractive # Add LLVM repository RUN apt-get update && apt-get install -y gnupg2 wget xz-utils && rm -rf /var/lib/apt/lists/* RUN wget -O - https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add - -RUN echo deb http://apt.llvm.org/focal/ llvm-toolchain-focal-12 main | tee /etc/apt/sources.list.d/llvm.list +RUN echo deb http://apt.llvm.org/focal/ llvm-toolchain-focal-13 main | tee /etc/apt/sources.list.d/llvm.list # Manually install the kernel.org "Crosstool" based toolchains for gcc-11.1.0 RUN wget -O - https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin/x86_64/11.1.0/x86_64-gcc-11.1.0-nolibc-aarch64-linux.tar.xz | tar -C /opt -xJ @@ -39,7 +39,7 @@ RUN apt-get update && apt-get install -y \ binutils-dev \ bison \ build-essential \ - clang-12 \ + clang-13 \ coreutils \ cpio \ cppcheck \ -- 2.17.1
Re: [PATCH v5 3/5] env: Allow U-Boot scripts to be placed in a .env file
Hi Tom, On Tue, 5 Oct 2021 at 09:52, Tom Rini wrote: > > On Tue, Oct 05, 2021 at 09:33:18AM -0600, Simon Glass wrote: > > Hi Wolfgang, > > > > On Tue, 5 Oct 2021 at 08:56, Wolfgang Denk wrote: > > > > > > Dear Simon, > > > > > > In message > > > you > > > wrote: > > > > > > > > > > Add a feature that brings in a .env file associated with the board > > > > > > config, if present. To use it, create a file in a board//env > > > > > > directory called .env (or common.env if you want the same > > > > > > environment for all boards). > > > > > > > > > > This should be no exclusive "or" here. If a common.env exists, it > > > > > should be used for all boards, and if additionally one ore more > > > > > .env files exist, these should ALSO be applied to the > > > > > respective boards. > > > > > > > > Is it not enough to use #include in the main file? We have a similar > > > > feature with the u-boot.dtsi files and in that case we only choose the > > > > most specific. > > > > > > 1) This requires that the .env files are run through CPP, which is > > >only added in a later patch. > > > > OK perhaps I should just merge the patches. It is a bit artificial > > having two and it seems that people agree we need the += syntax. > > It's important to maintain bisectability, yes. But functionality > should be evaluated at the end of the series, not intermediate steps. I > don't have a strong opinion either way on if these two patches are > merged, or not. So on a similar note, all of the feedback about the > current env documentation is good and helpful, but I think a txt -> rST > then enhance the rST makes the most sense so that we don't "hide" > improvements within the migration. OK. I added Wolfgang's comments in the patch where he made them but will split them out. Regards, Simon
Re: [PATCH] usb: xhci-brcm: Include header file needed for dev_err
Hi Stefan,
On Tue, 5 Oct 2021 at 09:21, Stefan Agner wrote:
>
> dev_err seems to be moved to different header file. Include
> dm/device_compat.h file to compile properly.
>
> Fixes: 69dae8902b16 ("linux/compat.h: Remove redefinition of dev_xxx macros")
> Signed-off-by: Stefan Agner
> ---
>
> drivers/usb/host/xhci-brcm.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c
> index 27c4bbfcba..ee3b55242e 100644
> --- a/drivers/usb/host/xhci-brcm.c
> +++ b/drivers/usb/host/xhci-brcm.c
> @@ -5,6 +5,7 @@
>
> #include
> #include
> +#include
> #include
> #include
> #include
Should go here. Please see https://www.denx.de/wiki/U-Boot/CodingStyle
> --
> 2.33.0
>
Regards,
Simon
Re: [PATCH 2/6 v3] spmi: msm: add arbiter version 5 support
On Thu, Sep 23, 2021 at 09:57:28PM +0300, dsankou...@gmail.com wrote:
> From: Dzmitry Sankouski
>
> Currently driver supports only version 1 and 2.
> Version 5 has slightly different registers structure
>
> Signed-off-by: Dzmitry Sankouski
> Cc: Ramon Fried
> Cc: Tom Rini
When building for the new platform, we get warnings such as:
In file included from /home/trini/work/u-boot/u-boot/drivers/spmi/spmi-msm.c:16:
/home/trini/work/u-boot/u-boot/drivers/spmi/spmi-msm.c: In function
'msm_spmi_probe':
/home/trini/work/u-boot/u-boot/arch/arm/include/asm/io.h:45:43: warning: cast
to pointer from integer of different size [-Wint-to-pointer-cast]
45 | #define __arch_getl(a) (*(volatile unsigned int *)(a))
| ^
/home/trini/work/u-boot/u-boot/arch/arm/include/asm/io.h:127:38: note: in
expansion of macro '__arch_getl'
127 | #define readl(c)({ u32 __v = __arch_getl(c); __iormb(); __v; })
| ^~~
/home/trini/work/u-boot/u-boot/drivers/spmi/spmi-msm.c:202:18: note: in
expansion of macro 'readl'
202 | hw_ver = readl(config_addr + PMIC_ARB_VERSION);
| ^
/home/trini/work/u-boot/u-boot/drivers/serial/serial_msm_geni.c: In function
'qcom_geni_serial_poll_bit':
/home/trini/work/u-boot/u-boot/drivers/serial/serial_msm_geni.c:290:17:
warning: implicit declaration of function 'udelay'
[-Wimplicit-function-declaration]
290 | udelay(10);
| ^~
Please fix, thanks.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH 6/6 v3] board: samsung: add Samsung Galaxy S9/S9+(SM-G96x0) board
On Thu, Sep 23, 2021 at 09:57:32PM +0300, dsankou...@gmail.com wrote: > From: Dzmitry Sankouski > > Samsung S9 SM-G9600 - Snapdragon SDM845 version of the phone, > for China \ Hong Kong markets. > Has unlockable bootloader, unlike SM-G960U (American market version), > which allows running u-boot as a chain-loaded bootloader. > > Signed-off-by: Dzmitry Sankouski > Cc: Ramon Fried > Cc: Tom Rini > --- > Changes for v2: > - Create documentation file for SDM845 boards > - Add starqltechn board documentation > Changes for v3: > - fix comment in starqltechn.c A few things. Aside from needing to migrate a few symbols to Kconfig, to build on current master, we need to: > diff --git a/include/configs/starqltechn.h b/include/configs/starqltechn.h > new file mode 100644 > index 00..c9736a443b > --- /dev/null > +++ b/include/configs/starqltechn.h > @@ -0,0 +1,16 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + * Board configuration file for Samsung S9(SM-G9600)(starqltechn) > + * > + * (C) Copyright 2017 Jorge Ramirez-Ortiz > + */ > + > +#ifndef __CONFIGS_STARQLTECHN_H > +#define __CONFIGS_STARQLTECHN_H > + > +#include > + > +#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASECONFIG_SYS_LOAD_ADDR > +#define CONFIG_LINUX_KERNEL_IMAGE_HEADER These two symbols need to be handled via Kconfig (xenguest_arm64 gets this wrong as well, I see) as done for example on Tegra. At that point, we can delete this file entirely and just use configs/sdm845.h. -- Tom signature.asc Description: PGP signature
[PATCH v3 3/3] pinctrl: single: Add tests for request API
Add request tests to dm_test_pinctrl_single with corresponding node in
test.dts
Signed-off-by: Roman Bacik
---
Changes in v3:
- Add request API test to dm_test_pinctrl_single
arch/sandbox/dts/test.dts | 17 +
test/dm/pinmux.c | 13 +
2 files changed, 30 insertions(+)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e27d106466b4..0a9f24092eb6 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1517,6 +1517,23 @@
};
};
+ pinctrl-single-gpio-range {
+ compatible = "pinctrl-single";
+ reg = <0x 0x238>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <7>;
+
+ pinctrl-single,gpio-range = < 0 2 1 2 3 0>;
+
+ range: gpio-range {
+ #pinctrl-single,gpio-range-cells = <3>;
+ };
+ };
+
hwspinlock@0 {
compatible = "sandbox,hwspinlock";
};
diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c
index 265df4ccb979..d4a8a7907006 100644
--- a/test/dm/pinmux.c
+++ b/test/dm/pinmux.c
@@ -132,6 +132,19 @@ static int dm_test_pinctrl_single(struct unit_test_state
*uts)
test_muxing(159, "0x004c 0x UNCLAIMED");
ret = pinctrl_get_pin_muxing(dev, 160, buf, sizeof(buf));
ut_asserteq(-EINVAL, ret);
+ ut_assertok(uclass_get_device_by_name(UCLASS_PINCTRL,
+ "pinctrl-single-gpio-range",
));
+ ut_asserteq(142, pinctrl_get_pins_count(dev));
+ ut_assertok(pinctrl_request(dev, 0, 0));
+ test_muxing(0, "0x 0x0001 UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 1, 0));
+ test_muxing(1, "0x0004 0x0001 UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 2, 0));
+ test_muxing(2, "0x0008 0x UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 3, 0));
+ test_muxing(3, "0x000c 0x UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 4, 0));
+ test_muxing(4, "0x0010 0x UNCLAIMED");
return 0;
}
--
2.17.1
--
This electronic communication and the information and any files transmitted
with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
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please return the e-mail to the sender, delete it from your computer, and
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smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH v3 2/3] pinctrl: single: Add request() api
From: Bharat Gooty
Add pinctrl_ops->request api to configure pctrl
pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Reviewed-by: Simon Glass
Signed-off-by: Roman Bacik
---
(no changes since v2)
Changes in v2:
- simplify comment before struct single_gpiofunc_range
- add pinctrl-single binding document from Linux
- return error code from single-probe()
drivers/pinctrl/pinctrl-single.c | 34
1 file changed, 34 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 5ed225f2a839..a4ec6a54fdcd 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -250,6 +250,39 @@ static int single_get_pin_muxing(struct udevice *dev,
unsigned int pin,
return 0;
}
+static int single_request(struct udevice *dev, int pin, int flags)
+{
+ struct single_priv *priv = dev_get_priv(dev);
+ struct single_pdata *pdata = dev_get_plat(dev);
+ struct single_gpiofunc_range *frange = NULL;
+ struct list_head *pos, *tmp;
+ phys_addr_t reg;
+ int mux_bytes = 0;
+ u32 data;
+
+ /* If function mask is null, needn't enable it. */
+ if (!pdata->mask)
+ return -ENOTSUPP;
+
+ list_for_each_safe(pos, tmp, >gpiofuncs) {
+ frange = list_entry(pos, struct single_gpiofunc_range, node);
+ if ((pin >= frange->offset + frange->npins) ||
+ pin < frange->offset)
+ continue;
+
+ mux_bytes = pdata->width / BITS_PER_BYTE;
+ reg = pdata->base + pin * mux_bytes;
+
+ data = single_read(dev, reg);
+ data &= ~pdata->mask;
+ data |= frange->gpiofunc;
+ single_write(dev, data, reg);
+ break;
+ }
+
+ return 0;
+}
+
static struct single_func *single_allocate_function(struct udevice *dev,
unsigned int group_pins)
{
@@ -591,6 +624,7 @@ const struct pinctrl_ops single_pinctrl_ops = {
.get_pin_name = single_get_pin_name,
.set_state = single_set_state,
.get_pin_muxing = single_get_pin_muxing,
+ .request = single_request,
};
static const struct udevice_id single_pinctrl_match[] = {
--
2.17.1
--
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with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
copying, distributing, dissemination, forwarding, printing, or copying of
this e-mail is strictly prohibited. If you received this e-mail in error,
please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH v3 1/3] pinctrl: single: Parse gpio details from dt
From: Bharat Gooty Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- (no changes since v1) .../pinctrl/pinctrl-single.txt| 255 ++ drivers/pinctrl/pinctrl-single.c | 56 2 files changed, 311 insertions(+) create mode 100644 doc/device-tree-bindings/pinctrl/pinctrl-single.txt diff --git a/doc/device-tree-bindings/pinctrl/pinctrl-single.txt b/doc/device-tree-bindings/pinctrl/pinctrl-single.txt new file mode 100644 index ..e705acd3612c --- /dev/null +++ b/doc/device-tree-bindings/pinctrl/pinctrl-single.txt @@ -0,0 +1,255 @@ +One-register-per-pin type device tree based pinctrl driver + +Required properties: +- compatible : "pinctrl-single" or "pinconf-single". + "pinctrl-single" means that pinconf isn't supported. + "pinconf-single" means that generic pinconf is supported. + +- reg : offset and length of the register set for the mux registers + +- #pinctrl-cells : number of cells in addition to the index, set to 1 + for pinctrl-single,pins and 2 for pinctrl-single,bits + +- pinctrl-single,register-width : pinmux register access width in bits + +- pinctrl-single,function-mask : mask of allowed pinmux function bits + in the pinmux register + +Optional properties: +- pinctrl-single,function-off : function off mode for disabled state if + available and same for all registers; if not specified, disabling of + pin functions is ignored + +- pinctrl-single,bit-per-mux : boolean to indicate that one register controls + more than one pin, for which "pinctrl-single,function-mask" property specifies + position mask of pin. + +- pinctrl-single,drive-strength : array of value that are used to configure + drive strength in the pinmux register. They're value of drive strength + current and drive strength mask. + + /* drive strength current, mask */ + pinctrl-single,power-source = <0x30 0xf0>; + +- pinctrl-single,bias-pullup : array of value that are used to configure the + input bias pullup in the pinmux register. + + /* input, enabled pullup bits, disabled pullup bits, mask */ + pinctrl-single,bias-pullup = <0 1 0 1>; + +- pinctrl-single,bias-pulldown : array of value that are used to configure the + input bias pulldown in the pinmux register. + + /* input, enabled pulldown bits, disabled pulldown bits, mask */ + pinctrl-single,bias-pulldown = <2 2 0 2>; + + * Two bits to control input bias pullup and pulldown: User should use +pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means +pullup, and the other one bit means pulldown. + * Three bits to control input bias enable, pullup and pulldown. User should +use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias +enable bit should be included in pullup or pulldown bits. + * Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no property as +pinctrl-single,bias-disable. Because pinctrl single driver could implement +it by calling pulldown, pullup disabled. + +- pinctrl-single,input-schmitt : array of value that are used to configure + input schmitt in the pinmux register. In some silicons, there're two input + schmitt value (rising-edge & falling-edge) in the pinmux register. + + /* input schmitt value, mask */ + pinctrl-single,input-schmitt = <0x30 0x70>; + +- pinctrl-single,input-schmitt-enable : array of value that are used to + configure input schmitt enable or disable in the pinmux register. + + /* input, enable bits, disable bits, mask */ + pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>; + +- pinctrl-single,low-power-mode : array of value that are used to configure + low power mode of this pin. For some silicons, the low power mode will + control the output of the pin when the pad including the pin enter low + power mode. + /* low power mode value, mask */ + pinctrl-single,low-power-mode = <0x288 0x388>; + +- pinctrl-single,gpio-range : list of value that are used to configure a GPIO + range. They're value of subnode phandle, pin base in pinctrl device, pin + number in this range, GPIO function value of this GPIO range. + The number of parameters is depend on #pinctrl-single,gpio-range-cells + property. + + /* pin base, nr pins & gpio function */ + pinctrl-single,gpio-range = < 0 3 0 3 9 1>; + +- interrupt-controller : standard interrupt controller binding if using + interrupts for wake-up events for example. In this case pinctrl-single + is set up as a chained interrupt controller and the wake-up interrupts + can be requested by the drivers using request_irq(). + +-
[PATCH] buildman: Add gcc-11.1.0 to the directory list
While CI has been using gcc-11.1.0 for a long time, we have not updated buildman to match. Correct this omission. Signed-off-by: Tom Rini --- tools/buildman/toolchain.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index fd137f7300e7..4e2471f3e370 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -498,7 +498,7 @@ class Toolchains: if arch == 'aarch64': arch = 'arm64' base = 'https://www.kernel.org/pub/tools/crosstool/files/bin' -versions = ['9.2.0', '7.3.0', '6.4.0', '4.9.4'] +versions = ['11.1.0', '9.2.0', '7.3.0', '6.4.0', '4.9.4'] links = [] for version in versions: url = '%s/%s/%s/' % (base, arch, version) -- 2.17.1
[PATCH v2] sunxi: h3: enable clock support for r_pio gpios
This patch enables clock for the r_pio gpios for the h3
r_pio is required to access gpios from port L
Signed-off-by: Manuel Dipolt
---
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_h3-r.c | 51
drivers/gpio/sunxi_gpio.c| 8 ++
3 files changed, 60 insertions(+)
create mode 100644 drivers/clk/sunxi/clk_h3-r.c
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index 4f9282a8b9..92414c8217 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_CLK_SUN8I_R40) += clk_r40.o
obj-$(CONFIG_CLK_SUN8I_V3S) += clk_v3s.o
obj-$(CONFIG_CLK_SUN9I_A80) += clk_a80.o
obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3.o
+obj-$(CONFIG_CLK_SUN8I_H3) += clk_h3-r.o
obj-$(CONFIG_CLK_SUN50I_H6) += clk_h6.o
obj-$(CONFIG_CLK_SUN50I_H616) += clk_h616.o
obj-$(CONFIG_CLK_SUN50I_A64) += clk_a64.o
diff --git a/drivers/clk/sunxi/clk_h3-r.c b/drivers/clk/sunxi/clk_h3-r.c
new file mode 100644
index 00..aed35149bf
--- /dev/null
+++ b/drivers/clk/sunxi/clk_h3-r.c
@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2021 RobArt GmbH
+ * Author: Manuel Dipolt
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static struct ccu_clk_gate h3_r_gates[] = {
+ [CLK_APB0_PIO] = GATE(0x28, BIT(0)),
+};
+
+static struct ccu_reset h3_r_resets[] = {
+ [RST_APB0_IR] = RESET(0x0b0, BIT(2)),
+ [RST_APB0_TIMER] = RESET(0x0b0, BIT(3)),
+ [RST_APB0_UART] = RESET(0x0b0, BIT(4)),
+ [RST_APB0_I2C] = RESET(0x0b0, BIT(6)),
+};
+
+static const struct ccu_desc h3_r_ccu_desc = {
+ .gates = h3_r_gates,
+ .resets = h3_r_resets,
+};
+
+static int h3_r_clk_bind(struct udevice *dev)
+{
+ return sunxi_reset_bind(dev, ARRAY_SIZE(h3_r_resets));
+}
+
+static const struct udevice_id h3_r_ccu_ids[] = {
+ { .compatible = "allwinner,sun8i-h3-r-ccu",
+ .data = (ulong)_r_ccu_desc },
+ { }
+};
+
+U_BOOT_DRIVER(clk_sun8i_h3_r) = {
+ .name = "sun8i_h3-r_ccu",
+ .id = UCLASS_CLK,
+ .of_match = h3_r_ccu_ids,
+ .priv_auto = sizeof(struct ccu_priv),
+ .ops = _clk_ops,
+ .probe = sunxi_clk_probe,
+ .bind = h3_r_clk_bind,
+};
+
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 24cb604e3e..884955368f 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -262,6 +263,13 @@ static int gpio_sunxi_probe(struct udevice *dev)
{
struct sunxi_gpio_plat *plat = dev_get_plat(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct clk gate_clk;
+ int ret;
+
+ ret = clk_get_by_name(dev, "apb", _clk);
+
+ if (!ret)
+ clk_enable(_clk);
/* Tell the uclass how many GPIOs we have */
if (plat) {
--
2.20.1
Re: [PATCH v5 3/5] env: Allow U-Boot scripts to be placed in a .env file
On Tue, Oct 05, 2021 at 09:33:18AM -0600, Simon Glass wrote: > Hi Wolfgang, > > On Tue, 5 Oct 2021 at 08:56, Wolfgang Denk wrote: > > > > Dear Simon, > > > > In message > > you > > wrote: > > > > > > > > Add a feature that brings in a .env file associated with the board > > > > > config, if present. To use it, create a file in a board//env > > > > > directory called .env (or common.env if you want the same > > > > > environment for all boards). > > > > > > > > This should be no exclusive "or" here. If a common.env exists, it > > > > should be used for all boards, and if additionally one ore more > > > > .env files exist, these should ALSO be applied to the > > > > respective boards. > > > > > > Is it not enough to use #include in the main file? We have a similar > > > feature with the u-boot.dtsi files and in that case we only choose the > > > most specific. > > > > 1) This requires that the .env files are run through CPP, which is > >only added in a later patch. > > OK perhaps I should just merge the patches. It is a bit artificial > having two and it seems that people agree we need the += syntax. It's important to maintain bisectability, yes. But functionality should be evaluated at the end of the series, not intermediate steps. I don't have a strong opinion either way on if these two patches are merged, or not. So on a similar note, all of the feedback about the current env documentation is good and helpful, but I think a txt -> rST then enhance the rST makes the most sense so that we don't "hide" improvements within the migration. -- Tom signature.asc Description: PGP signature
Re: [PATCH v5 3/5] env: Allow U-Boot scripts to be placed in a .env file
Hi Wolfgang, On Tue, 5 Oct 2021 at 08:56, Wolfgang Denk wrote: > > Dear Simon, > > In message > you > wrote: > > > > > > Add a feature that brings in a .env file associated with the board > > > > config, if present. To use it, create a file in a board//env > > > > directory called .env (or common.env if you want the same > > > > environment for all boards). > > > > > > This should be no exclusive "or" here. If a common.env exists, it > > > should be used for all boards, and if additionally one ore more > > > .env files exist, these should ALSO be applied to the > > > respective boards. > > > > Is it not enough to use #include in the main file? We have a similar > > feature with the u-boot.dtsi files and in that case we only choose the > > most specific. > > 1) This requires that the .env files are run through CPP, which is >only added in a later patch. OK perhaps I should just merge the patches. It is a bit artificial having two and it seems that people agree we need the += syntax. > > 2) Even if I add an "#include board//env/common.env" in my >.env files, your logic would trigger on the existence of >the common.env file and ignore the .env files. OK, so I if reverse that, are you happy? What do you think about my explanation above? Regards, Simon
[PATCH] usb: xhci-brcm: Include header file needed for dev_err
dev_err seems to be moved to different header file. Include
dm/device_compat.h file to compile properly.
Fixes: 69dae8902b16 ("linux/compat.h: Remove redefinition of dev_xxx macros")
Signed-off-by: Stefan Agner
---
drivers/usb/host/xhci-brcm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c
index 27c4bbfcba..ee3b55242e 100644
--- a/drivers/usb/host/xhci-brcm.c
+++ b/drivers/usb/host/xhci-brcm.c
@@ -5,6 +5,7 @@
#include
#include
+#include
#include
#include
#include
--
2.33.0
Re: [RFC PATCH 2/2] fpga: xilinx: allow loading authenticated images (DDR)
On 10/5/21 4:03 PM, Jorge Ramirez-Ortiz, Foundries wrote:
> On 05/10/21, Michal Simek wrote:
>>
>>
>> On 10/5/21 1:13 PM, Jorge Ramirez-Ortiz wrote:
>>> Add new compatible string u-boot,zynqmp-fpga-ddrauth to handle this
>>> use case.
>>>
>>> Signed-off-by: Jorge Ramirez-Ortiz
>>> ---
>>> drivers/fpga/xilinx.c | 29 +
>>> drivers/fpga/zynqmppl.c | 4 ++--
>>> include/xilinx.h| 2 +-
>>> 3 files changed, 28 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
>>> index cbebefb55f..c8035105e2 100644
>>> --- a/drivers/fpga/xilinx.c
>>> +++ b/drivers/fpga/xilinx.c
>>> @@ -135,23 +135,44 @@ int fpga_loadbitstream(int devnum, char *fpgadata,
>>> size_t size,
>>> dataptr += 4;
>>> printf(" bytes in bitstream = %d\n", swapsize);
>>>
>>> - return fpga_load(devnum, dataptr, swapsize, bstype);
>>> + return fpga_load(devnum, dataptr, swapsize, bstype, NULL);
>>> }
>>>
>>> int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
>>> - bitstream_type bstype)
>>> + bitstream_type bstype, const char *compatible)
>>> {
>>> + struct fpga_secure_info info = { 0 };
>>> +
>>> if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
>>> printf ("%s: Invalid device descriptor\n", __FUNCTION__);
>>> return FPGA_FAIL;
>>> }
>>>
>>> - if (!desc->operations || !desc->operations->load) {
>>> + if (!desc->operations) {
>>> printf("%s: Missing load operation\n", __func__);
>>> return FPGA_FAIL;
>>> }
>>>
>>> - return desc->operations->load(desc, buf, bsize, bstype);
>>> + if (!compatible || !strcmp(compatible, "u-boot,fpga-legacy")) {
>>> + if (!desc->operations->load) {
>>> + printf("%s: Missing load operation\n", __func__);
>>> + return FPGA_FAIL;
>>> + }
>>> + return desc->operations->load(desc, buf, bsize, bstype);
>>> + }
>>> +
>>> + if (!strcmp(compatible, "u-boot,zynqmp-fpga-ddrauth")) {
>>> + if (!desc->operations->loads) {
>>> + printf("%s: Missing load operation\n", __func__);
>>> + return FPGA_FAIL;
>>> + }
>>> + /* DDR authentication */
>>> + info.authflag = 1;
>>> + return desc->operations->loads(desc, buf, bsize, );
>>> + }
>>
>> I am not sure about this solution. First of all it forces SPL to have
>> additional code which just extending size. It means there must be a way
>> to enable/disable it.
>
> that can be contained of course...so not really an issue (ie compile
> out either fpga_load or fpga_loads depending on needs).
>
>>
>> The next thing is that you have zynqmp string in generic xilinx file
>> which doesn't look right. It would be better to deal with image types
>> directly in driver which is capable to handle it.
>
> sure that is easy..but the idea is the same
We just need to find out how this should be properly propagated and stored.
>
>> It means record fit image compatible string in the driver with
>> hooks/flags and determined what should be called.
>
> what about the compatible names? will you define those? or should I do
> it?
Just define it and let's see if this fits.
>
> For our use case, we need DDR authentication so that must be
> defined. I can add others and someone else can add the support needed?
>
Sure. None is asking you to support everything. Just add support for
regular bitstreams and your case. And adding support for something else
will be just +1 if interface is right.
Thanks,
Michal
Re: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
Hi,
On 10/5/21 3:41 PM, patrick.delau...@foss.st.com wrote:
Hi,
ST Restricted
-Original Message-
From: Marek Vasut
Sent: mardi 5 octobre 2021 15:33
To: patrick.delau...@foss.st.com; u-boot@lists.denx.de
Cc: 'Lukasz Majewski'
Subject: Re: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
On 10/5/21 2:50 PM, patrick.delau...@foss.st.com wrote:
Hi Marek,
ST Restricted
-Original Message-
From: U-Boot On Behalf Of Marek Vasut
Sent: mardi 5 octobre 2021 14:40
To: u-boot@lists.denx.de
Cc: Marek Vasut ; Lukasz Majewski
Subject: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
Add dfu_alt_info option which allows specifying multiple SPI flashes
as an
alt info.
The syntax is as follows:
altname sf bus:cs[:speed[:mode]]
Example:
dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1
Signed-off-by: Marek Vasut
Cc: Lukasz Majewski
---
V2: Fix device string parsing in all cases
---
drivers/dfu/dfu_sf.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index
b72493ced86..6d33497990a 100644
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -168,30 +168,46 @@ static struct spi_flash *parse_dev(char
*devstr)
int
dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s) {
char *st;
- char *devstr_bkup = strdup(devstr);
-
- dfu->data.sf.dev = parse_dev(devstr_bkup);
- free(devstr_bkup);
- if (!dfu->data.sf.dev)
- return -ENODEV;
dfu->dev_type = DFU_DEV_SF;
- dfu->max_buf_size = dfu->data.sf.dev->sector_size;
st = strsep(, " ");
if (!strcmp(st, "raw")) {
+ char *devstr_bkup = strdup(devstr);
+ dfu->data.sf.dev = parse_dev(devstr_bkup);
+ free(devstr_bkup);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
dfu->layout = DFU_RAW_ADDR;
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
dfu->data.sf.start = hextoul(s, );
s++;
dfu->data.sf.size = hextoul(s, );
+ } else if (!strcmp(st, "sf")) {
+ st = strsep(, " ");
+ dfu->data.sf.dev = parse_dev(st);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
+ dfu->layout = DFU_RAW_ADDR;
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
+ dfu->data.sf.start = 0;
+ dfu->data.sf.size = dfu->data.sf.dev->size;
} else if (CONFIG_IS_ENABLED(DFU_SF_PART) &&
(!strcmp(st, "part") || !strcmp(st, "partubi"))) {
+ char *devstr_bkup = strdup(devstr);
char mtd_id[32];
struct mtd_device *mtd_dev;
u8 part_num;
struct part_info *pi;
int ret, dev, part;
+ dfu->data.sf.dev = parse_dev(devstr_bkup);
+ free(devstr_bkup);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
dfu->layout = DFU_RAW_ADDR;
dev = dectoul(s, );
@@ -208,6 +224,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu,
char
*devstr,
char *s)
printf("Could not locate '%s'\n", mtd_id);
return -1;
}
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
dfu->data.sf.start = pi->offset;
dfu->data.sf.size = pi->size;
if (!strcmp(st, "partubi"))
--
2.33.0
The same use case can be supported with mtd backend
https://elixir.bootlin.com/u-boot/latest/source/doc/usage/dfu.rst
U-Boot> env set dfu_alt_info \
"mtd nor0=spl part 1;u-boot part 2;u-boot-env part 3&"\
"mtd nand0=UBI partubi 1"
Does it work for multiple SPI NORs at the same time ?
If it is support on mtd side, yes it is supported in dfu...
And I think it is supported now (with u-class UCLASS_SPI_FLASH).
I need to check.deeper
Patrick
with '&' in dfu_alt_info you can have several dfu backend...
something as (not tested) :
U-Boot> env set dfu_alt_info "sf 0:0=raw 0x0 0:1=raw 0x0 "
'&' It is working for ANY existing backend
=> used today in STM32MP15x
+ stm32prog command as backend when flashlayout is parsed to update any
device.
+ for dfu command (board/st/common/stm32mp_dfu.c) => all devices are
exported (mtd nand0 and mtd nor0)
Patrick
Test with dfu MTD backend + export of all device present on STM32MP157C-EV1
dfu_alt_info=ram 0=uImage ram 0xc200 0x200;devicetree.dtb ram
0xc400 0x10;uramdisk.image.gz ram 0xc440 0x1000
0=mmc0_fsbl1 part 0 1;mmc0_fsbl2 part 0 2;mmc0_fip part 0 3;mmc0_boot
part 0 4;mmc0_vendorfs part 0 5;mmc0_rootfs part 0 6;mmc0_userfs part 0
7 1=mmc1_boot1 raw 0x0 0x20 mmcpart 1;mmc1_boot2 raw 0x0
0x20 mmcpart 2;mmc1_fip part 1 1;mmc1_bootfs part 1 2;mmc1_vendorfs
part 1
Re: [PATCH v5 3/5] env: Allow U-Boot scripts to be placed in a .env file
Dear Simon, In message you wrote: > > > > Add a feature that brings in a .env file associated with the board > > > config, if present. To use it, create a file in a board//env > > > directory called .env (or common.env if you want the same > > > environment for all boards). > > > > This should be no exclusive "or" here. If a common.env exists, it > > should be used for all boards, and if additionally one ore more > > .env files exist, these should ALSO be applied to the > > respective boards. > > Is it not enough to use #include in the main file? We have a similar > feature with the u-boot.dtsi files and in that case we only choose the > most specific. 1) This requires that the .env files are run through CPP, which is only added in a later patch. 2) Even if I add an "#include board//env/common.env" in my .env files, your logic would trigger on the existence of the common.env file and ignore the .env files. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Work 8 hours, sleep 8 hours; but not the same 8 hours.
Re: [ANN] U-Boot v2021.10 released
Dear Matthias, In message <9dd349a3-75ff-ecce-4f4d-957d15a15...@suse.com> you wrote: > > I wasn't able to find any commits from Novell email addresses. I wonder if > SUSE > still maps to Novell, which would be a long-time oversight :) The fllowing domain names are mapped to Novell: novell.com Novell suse.comNovell suse.cz Novell suse.de Novell > Are the script to generate this email available somewhere? It is... ...oh, it was. It's still on our gitlab.denx.de server. It was not moved to source.denx.de I will fix this ASAP... Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Chapter 1 -- The story so far: In the beginning the Universe was created. This has made a lot of people very angry and been widely regarded as a bad move.
Re: [PATCH v5 3/5] env: Allow U-Boot scripts to be placed in a .env file
Hi Rasmus, On Mon, 4 Oct 2021 at 01:28, Rasmus Villemoes wrote: > > On 02/10/2021 02.38, Simon Glass wrote: > > At present U-Boot environment variables, and thus scripts, are defined > > by CONFIG_EXTRA_ENV_SETTINGS. It is painful to add large amounts of text > > to this file and dealing with quoting and newlines is harder than it > > should be. It would be better if we could just type the script into a > > text file and have it included by U-Boot. > > Indeed, the pain of CONFIG_EXTRA_ENV_SETTINGS was part of the motivation > for introducing CONFIG_USE_DEFAULT_ENV_FILE. > > > Add a feature that brings in a .env file associated with the board > > config, if present. To use it, create a file in a board//env > > directory called .env (or common.env if you want the same > > environment for all boards). > > > > The environment variables should be of the form "var=value". Values can > > extend to multiple lines. See the README under 'Environment Variables:' > > for more information and an example. > > > > Comments are not permitted in the environment with this commit. > > Perhaps some remarks on how this compares/relates to > CONFIG_USE_DEFAULT_ENV_FILE and CONFIG_ENV_IMPORT_FDT would be in order? > In particular, the latter seems like it could already do the "amend the > environent per vendor/board" with appropriate settings in the > -u-boot.dtsi files? > > I don't think either of those currently support using CONFIG_ variables > in the definitions, but perhaps that could be fixed. > > I don't have anything against these patches as such, I'd just like to > understand precisely what they bring that cannot already be done with > existing mechanisms. Yes I forgot about that. I will take a look. Regards, Simon
Re: [PATCH v5 3/5] env: Allow U-Boot scripts to be placed in a .env file
Hi Wolfgang, On Mon, 4 Oct 2021 at 06:08, Wolfgang Denk wrote: > > Dear Simon, > > In message > <20211001183842.v5.3.If789ba3e2667c46c03eda3386ca84a863baeda55@changeid> you > wrote: > > > > Add a feature that brings in a .env file associated with the board > > config, if present. To use it, create a file in a board//env > > directory called .env (or common.env if you want the same > > environment for all boards). > > This should be no exclusive "or" here. If a common.env exists, it > should be used for all boards, and if additionally one ore more > .env files exist, these should ALSO be applied to the > respective boards. Is it not enough to use #include in the main file? We have a similar feature with the u-boot.dtsi files and in that case we only choose the most specific. Regards, Simon
Re: [ANN] U-Boot v2021.10 released
Hi Wolfgang, On 05/10/2021 13:01, Wolfgang Denk wrote: Dear Tom, In message <20211004151108.GR31748@bill-the-cat> you wrote: In terms of a changelog, git log --merges v2021.10-rc4..v2021.10-rc5 contains what I've pulled since the last RC or: git log --merges v2021.07..v2021.10 for changes since the last full release. As always, more details in pull requests (or the tags referenced by them) will result in more details here. ...and as usual, the release statistics can be fount at [1] [1] http://www.denx.de/wiki/U-Boot/UbootStat_2021_10 Here is the abbreviated version: (Changes since v2021.07) * Processed 1509 csets from 176 developers * 27 employers found * A total of 98664 lines added, 74614 removed (delta 24050) [...] Employers with the most signoffs (total 325) Texas Instruments 137 (42.2%) Xilinx 44 (13.5%) (Unknown) 39 (12.0%) BayLibre SAS35 (10.8%) NXP 15 (4.6%) Konsulko Group 13 (4.0%) ARM 10 (3.1%) Rockchip 6 (1.8%) Toradex 4 (1.2%) Novell 4 (1.2%) ... I wasn't able to find any commits from Novell email addresses. I wonder if SUSE still maps to Novell, which would be a long-time oversight :) Are the script to generate this email available somewhere? Regards, Matthias
Re: [RFC PATCH 2/2] fpga: xilinx: allow loading authenticated images (DDR)
On 05/10/21, Michal Simek wrote:
>
>
> On 10/5/21 1:13 PM, Jorge Ramirez-Ortiz wrote:
> > Add new compatible string u-boot,zynqmp-fpga-ddrauth to handle this
> > use case.
> >
> > Signed-off-by: Jorge Ramirez-Ortiz
> > ---
> > drivers/fpga/xilinx.c | 29 +
> > drivers/fpga/zynqmppl.c | 4 ++--
> > include/xilinx.h| 2 +-
> > 3 files changed, 28 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
> > index cbebefb55f..c8035105e2 100644
> > --- a/drivers/fpga/xilinx.c
> > +++ b/drivers/fpga/xilinx.c
> > @@ -135,23 +135,44 @@ int fpga_loadbitstream(int devnum, char *fpgadata,
> > size_t size,
> > dataptr += 4;
> > printf(" bytes in bitstream = %d\n", swapsize);
> >
> > - return fpga_load(devnum, dataptr, swapsize, bstype);
> > + return fpga_load(devnum, dataptr, swapsize, bstype, NULL);
> > }
> >
> > int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
> > - bitstream_type bstype)
> > + bitstream_type bstype, const char *compatible)
> > {
> > + struct fpga_secure_info info = { 0 };
> > +
> > if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
> > printf ("%s: Invalid device descriptor\n", __FUNCTION__);
> > return FPGA_FAIL;
> > }
> >
> > - if (!desc->operations || !desc->operations->load) {
> > + if (!desc->operations) {
> > printf("%s: Missing load operation\n", __func__);
> > return FPGA_FAIL;
> > }
> >
> > - return desc->operations->load(desc, buf, bsize, bstype);
> > + if (!compatible || !strcmp(compatible, "u-boot,fpga-legacy")) {
> > + if (!desc->operations->load) {
> > + printf("%s: Missing load operation\n", __func__);
> > + return FPGA_FAIL;
> > + }
> > + return desc->operations->load(desc, buf, bsize, bstype);
> > + }
> > +
> > + if (!strcmp(compatible, "u-boot,zynqmp-fpga-ddrauth")) {
> > + if (!desc->operations->loads) {
> > + printf("%s: Missing load operation\n", __func__);
> > + return FPGA_FAIL;
> > + }
> > + /* DDR authentication */
> > + info.authflag = 1;
> > + return desc->operations->loads(desc, buf, bsize, );
> > + }
>
> I am not sure about this solution. First of all it forces SPL to have
> additional code which just extending size. It means there must be a way
> to enable/disable it.
that can be contained of course...so not really an issue (ie compile
out either fpga_load or fpga_loads depending on needs).
>
> The next thing is that you have zynqmp string in generic xilinx file
> which doesn't look right. It would be better to deal with image types
> directly in driver which is capable to handle it.
sure that is easy..but the idea is the same
> It means record fit image compatible string in the driver with
> hooks/flags and determined what should be called.
what about the compatible names? will you define those? or should I do
it?
For our use case, we need DDR authentication so that must be
defined. I can add others and someone else can add the support needed?
>
> And the same style should work for SPL and also for U-Boot proper.
sure.
thanks for the quick response.
>
> Thanks,
> Michal
[PATCH u-boot-spi v3 10/10] mtd: Remove mtd_erase_callback() entirely
From: Marek Behún
The original purpose of mtd_erase_callback() in Linux at the time it was
imported to U-Boot, was to inform the caller that erasing is done (since
it was an asynchronous operation).
All supplied callback methods in U-Boot do nothing, but the
mtd_erase_callback() function was (until previous patch) grossly abused
in U-Boot's mtdpart implementation for completely different purpose.
Since we got rid of the abusement, remove the mtd_erase_callback()
function and the .callback member from struct erase_info entirely, in
order to avoid such problems in the future.
Signed-off-by: Marek Behún
---
cmd/onenand.c | 9 ++---
drivers/mtd/altera_qspi.c | 3 ---
drivers/mtd/cfi_mtd.c | 1 -
drivers/mtd/mtdconcat.c| 11 ---
drivers/mtd/mtdcore.c | 8
drivers/mtd/mtdpart.c | 21 -
drivers/mtd/nand/raw/nand_base.c | 4
drivers/mtd/onenand/onenand_base.c | 3 ---
drivers/mtd/spi/sf_mtd.c | 1 -
drivers/mtd/spi/spi-nor-core.c | 5 ++---
drivers/mtd/ubi/io.c | 13 -
env/onenand.c | 4 +---
fs/yaffs2/yaffs_mtdif.c| 1 -
include/linux/mtd/mtd.h| 11 ---
include/nand.h | 1 -
15 files changed, 5 insertions(+), 91 deletions(-)
diff --git a/cmd/onenand.c b/cmd/onenand.c
index 852ed5c7b2..592985a7ee 100644
--- a/cmd/onenand.c
+++ b/cmd/onenand.c
@@ -186,9 +186,7 @@ next:
static int onenand_block_erase(u32 start, u32 size, int force)
{
struct onenand_chip *this = mtd->priv;
- struct erase_info instr = {
- .callback = NULL,
- };
+ struct erase_info instr = {};
loff_t ofs;
int ret;
int blocksize = 1 << this->erase_shift;
@@ -219,10 +217,7 @@ static int onenand_block_erase(u32 start, u32 size, int
force)
static int onenand_block_test(u32 start, u32 size)
{
struct onenand_chip *this = mtd->priv;
- struct erase_info instr = {
- .callback = NULL,
- .priv = 0,
- };
+ struct erase_info instr = {};
int blocks;
loff_t ofs;
diff --git a/drivers/mtd/altera_qspi.c b/drivers/mtd/altera_qspi.c
index 7bac599a54..d31391f36a 100644
--- a/drivers/mtd/altera_qspi.c
+++ b/drivers/mtd/altera_qspi.c
@@ -153,7 +153,6 @@ static int altera_qspi_erase(struct mtd_info *mtd, struct
erase_info *instr)
putc('\n');
instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
instr->state = MTD_ERASE_FAILED;
- mtd_erase_callback(instr);
return -EIO;
}
flash = pdata->base + addr;
@@ -177,7 +176,6 @@ static int altera_qspi_erase(struct mtd_info *mtd, struct
erase_info *instr)
writel(stat, >isr); /* clear isr */
instr->fail_addr = addr;
instr->state = MTD_ERASE_FAILED;
- mtd_erase_callback(instr);
return -EIO;
}
if (flash_verbose)
@@ -189,7 +187,6 @@ static int altera_qspi_erase(struct mtd_info *mtd, struct
erase_info *instr)
addr += mtd->erasesize;
}
instr->state = MTD_ERASE_DONE;
- mtd_erase_callback(instr);
return 0;
}
diff --git a/drivers/mtd/cfi_mtd.c b/drivers/mtd/cfi_mtd.c
index 78293caa2f..2295bb7220 100644
--- a/drivers/mtd/cfi_mtd.c
+++ b/drivers/mtd/cfi_mtd.c
@@ -58,7 +58,6 @@ static int cfi_mtd_erase(struct mtd_info *mtd, struct
erase_info *instr)
}
instr->state = MTD_ERASE_DONE;
- mtd_erase_callback(instr);
return 0;
}
diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c
index 684bc94998..af3c4765c4 100644
--- a/drivers/mtd/mtdconcat.c
+++ b/drivers/mtd/mtdconcat.c
@@ -338,14 +338,6 @@ concat_write_oob(struct mtd_info *mtd, loff_t to, struct
mtd_oob_ops *ops)
return -EINVAL;
}
-static void concat_erase_callback(struct erase_info *instr)
-{
- /* Nothing to do here in U-Boot */
-#ifndef __UBOOT__
- wake_up((wait_queue_head_t *) instr->priv);
-#endif
-}
-
static int concat_dev_erase(struct mtd_info *mtd, struct erase_info *erase)
{
int err;
@@ -358,7 +350,6 @@ static int concat_dev_erase(struct mtd_info *mtd, struct
erase_info *erase)
init_waitqueue_head();
erase->mtd = mtd;
- erase->callback = concat_erase_callback;
erase->priv = (unsigned long)
/*
@@ -498,8 +489,6 @@ static int concat_erase(struct mtd_info *mtd, struct
erase_info *instr)
if (err)
return err;
- if (instr->callback)
- instr->callback(instr);
return 0;
}
[PATCH u-boot-spi v3 08/10] mtd: spi-nor-core: Check for ctrlc() in spi_nor_erase()
From: Marek Behún
May it possible to interrupt the spi_nor_erase() function.
Signed-off-by: Marek Behún
Reviewed-by: Simon Glass
Tested-by: Masami Hiramatsu
---
drivers/mtd/spi/spi-nor-core.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 451f289339..1e30b6cb27 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -929,6 +929,11 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
while (len) {
WATCHDOG_RESET();
+ if (ctrlc()) {
+ addr_known = false;
+ ret = -EINTR;
+ goto erase_err;
+ }
#ifdef CONFIG_SPI_FLASH_BAR
ret = write_bar(nor, addr);
if (ret < 0)
--
2.32.0
[PATCH u-boot-spi v3 09/10] mtd: mtdpart: Make mtdpart's _erase method sane
From: Marek Behún
The _erase() method of the mtdpart driver, part_erase(), currently
implements offset shifting (for given mtdpart partition) in a weird way:
1. part_erase() adds partition offset to block address
2. parent driver's _erase() method is called
3. parent driver's _erase() method calls mtd_erase_callback()
4. mtd_erase_callback() subtracts partition offset from block address
so that the callback function is given correct address
The problem here is that if the parent's driver does not call
mtd_erase_callback() in some scenario (this was recently a case for
spi_nor_erase(), which did not call mtd_erase_callback() at all), the
offset is not shifted back.
Moreover the code would be more readable if part_erase() not only added
partition offset before calling parent's _erase(), but also subtracted
it back afterwards. Currently the mtd_erase_callback() is expected to do
this subtracting since it does have to do it anyway.
Add the more steps to this procedure:
5. mtd_erase_callback() adds partition offset to block address so that
it returns the the erase_info structure members as it received them
6. part_erase() subtracts partition offset from block address
This makes the code more logical and also prevents errors in case
parent's driver does not call mtd_erase_callback() for some reason.
(BTW, the purpose of mtd_erase_callback() in Linux is to inform the
caller that it is done, since in Linux erasing is done asynchronously.
We are abusing the purpose of mtd_erase_callback() in U-Boot for
completely different purpose. The callback function itself has empty
implementation in all cases in U-Boot.)
Signed-off-by: Marek Behún
Reviewed-by: Simon Glass
Tested-by: Masami Hiramatsu
---
drivers/mtd/mtdpart.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index aa58f722da..6ab481a7b1 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -446,24 +446,34 @@ static int part_erase(struct mtd_info *mtd, struct
erase_info *instr)
int ret;
instr->addr += mtd->offset;
+
ret = mtd->parent->_erase(mtd->parent, instr);
- if (ret) {
- if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN)
- instr->fail_addr -= mtd->offset;
- instr->addr -= mtd->offset;
- }
+ if (ret && instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN)
+ instr->fail_addr -= mtd->offset;
+
+ instr->addr -= mtd->offset;
+
return ret;
}
void mtd_erase_callback(struct erase_info *instr)
{
- if (instr->mtd->_erase == part_erase) {
+ if (!instr->callback)
+ return;
+
+ if (instr->mtd->_erase == part_erase && instr->len) {
if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN)
instr->fail_addr -= instr->mtd->offset;
instr->addr -= instr->mtd->offset;
}
- if (instr->callback)
- instr->callback(instr);
+
+ instr->callback(instr);
+
+ if (instr->mtd->_erase == part_erase && instr->len) {
+ if (instr->fail_addr != MTD_FAIL_ADDR_UNKNOWN)
+ instr->fail_addr += instr->mtd->offset;
+ instr->addr += instr->mtd->offset;
+ }
}
EXPORT_SYMBOL_GPL(mtd_erase_callback);
--
2.32.0
[PATCH u-boot-spi v3 07/10] mtd: spi-nor-core: Call mtd_erase_callback() from spi_nor_erase()
From: Marek Behún
The spi_nor_erase() function does not call mtd_erase_callback() as it
should.
The mtdpart code currently implements the subtraction of partition
offset in mtd_erase_callback().
This results in partition offset being added prior calling
spi_nor_erase(), but not subtracted back on return. The result is that
the `mtd erase` command does not erase the whole partition, only some of
it's blocks:
=> mtd erase "Rescue system"
Erasing 0x ... 0x006f (1792 eraseblock(s))
jedec_spi_nor spi-nor@0: at 0x10, len 4096
jedec_spi_nor spi-nor@0: at 0x201000, len 4096
jedec_spi_nor spi-nor@0: at 0x302000, len 4096
jedec_spi_nor spi-nor@0: at 0x403000, len 4096
jedec_spi_nor spi-nor@0: at 0x504000, len 4096
jedec_spi_nor spi-nor@0: at 0x605000, len 4096
jedec_spi_nor spi-nor@0: at 0x706000, len 4096
This is obviously wrong.
Add proper calling of mtd_erase_callback() into the spi_nor_erase()
function.
Signed-off-by: Marek Behún
Reviewed-by: Simon Glass
Reported-by: Masami Hiramatsu
Tested-by: Masami Hiramatsu
---
drivers/mtd/spi/spi-nor-core.c | 20 ++--
1 file changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 4c2590d0c5..451f289339 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -908,6 +908,7 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32
addr)
static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
{
struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ bool addr_known = false;
u32 addr, len, rem;
int ret, err;
@@ -915,12 +916,17 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
(long long)instr->len);
div_u64_rem(instr->len, mtd->erasesize, );
- if (rem)
- return -EINVAL;
+ if (rem) {
+ ret = -EINVAL;
+ goto erase_err_callback;
+ }
addr = instr->addr;
len = instr->len;
+ instr->state = MTD_ERASING;
+ addr_known = true;
+
while (len) {
WATCHDOG_RESET();
#ifdef CONFIG_SPI_FLASH_BAR
@@ -944,6 +950,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
goto erase_err;
}
+ addr_known = false;
erase_err:
#ifdef CONFIG_SPI_FLASH_BAR
err = clean_bar(nor);
@@ -954,6 +961,15 @@ erase_err:
if (!ret)
ret = err;
+erase_err_callback:
+ if (ret) {
+ instr->fail_addr = addr_known ? addr : MTD_FAIL_ADDR_UNKNOWN;
+ instr->state = MTD_ERASE_FAILED;
+ } else {
+ instr->state = MTD_ERASE_DONE;
+ }
+ mtd_erase_callback(instr);
+
return ret;
}
--
2.32.0
[PATCH u-boot-spi v3 06/10] mtd: spi-nor-core: Don't check for zero length in spi_nor_write() / spi_nor_erase()
From: Marek Behún
This check is already done in all callers: mtdcore's mtd_write() /
mtd_erase(), legacy spi_nor_write() / spi_flash_erase(). No reason to do
this here as well.
Signed-off-by: Marek Behún
---
Changes since v2:
- remove check for zero length also from spi_nor_write()
---
drivers/mtd/spi/spi-nor-core.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index d49f7faf99..4c2590d0c5 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -914,9 +914,6 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr,
(long long)instr->len);
- if (!instr->len)
- return 0;
-
div_u64_rem(instr->len, mtd->erasesize, );
if (rem)
return -EINVAL;
@@ -1671,9 +1668,6 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t to,
size_t len,
dev_dbg(nor->dev, "to 0x%08x, len %zd\n", (u32)to, len);
- if (!len)
- return 0;
-
for (i = 0; i < len; ) {
ssize_t written;
loff_t addr = to + i;
--
2.32.0
[PATCH u-boot-spi v3 05/10] mtd: spi-flash: Check for zero length in legacy spi_flash_*()
From: Marek Behún Check for zero length in the legacy spi_flash_read() / spi_flash_write() / spi_flash_erase() functions. On zero length, return 0 immediately, don't call the underlying method. Rationale: - these legacy functions call the _read(), _write() and _erase() methods of struct mtd - the DM callers of these methods already check for zero length - making all callers of these methods check for zero length makes it possible to remove the check from implementations of these _read(), _write() and _erase() methods Signed-off-by: Marek Behún --- include/spi_flash.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/spi_flash.h b/include/spi_flash.h index 3d747c925b..4d4ae89c19 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -165,6 +165,9 @@ static inline int spi_flash_read(struct spi_flash *flash, u32 offset, struct mtd_info *mtd = >mtd; size_t retlen; + if (!len) + return 0; + return mtd->_read(mtd, offset, len, , buf); } @@ -174,6 +177,9 @@ static inline int spi_flash_write(struct spi_flash *flash, u32 offset, struct mtd_info *mtd = >mtd; size_t retlen; + if (!len) + return 0; + return mtd->_write(mtd, offset, len, , buf); } @@ -188,6 +194,9 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, return -EINVAL; } + if (!len) + return 0; + memset(, 0, sizeof(instr)); instr.addr = offset; instr.len = len; -- 2.32.0
[PATCH u-boot-spi v3 03/10] mtd: spi-nor-core: Don't overwrite return value if it is non-zero
From: Marek Behún
The cleanup code of the spi_nor_erase() function overwrites the ret
variable with return value of clean_bar(), even if the ret variable is
already set. Fix this.
Signed-off-by: Marek Behún
Reviewed-by: Simon Glass
Tested-by: Masami Hiramatsu
---
drivers/mtd/spi/spi-nor-core.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 11255aaab0..a6007acd1a 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -909,7 +909,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
{
struct spi_nor *nor = mtd_to_spi_nor(mtd);
u32 addr, len, rem;
- int ret;
+ int ret, err;
dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr,
(long long)instr->len);
@@ -949,7 +949,9 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
erase_err:
#ifdef CONFIG_SPI_FLASH_BAR
- ret = clean_bar(nor);
+ err = clean_bar(nor);
+ if (!ret)
+ ret = err;
#endif
write_disable(nor);
--
2.32.0
[PATCH u-boot-spi v3 02/10] mtd: spi-nor-core: Check return value of write_enable() in spi_nor_erase()
From: Marek Behún The spi_nor_erase() function does not check return value of the write_enable() call. Fix this. Signed-off-by: Marek Behún Reviewed-by: Simon Glass Reviewed-by: Jagan Teki Reviewed-by: Pratyush Yadav Tested-by: Masami Hiramatsu --- drivers/mtd/spi/spi-nor-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index d1e2bb47f7..11255aaab0 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -931,7 +931,9 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) if (ret < 0) goto erase_err; #endif - write_enable(nor); + ret = write_enable(nor); + if (ret < 0) + goto erase_err; ret = spi_nor_erase_sector(nor, addr); if (ret < 0) -- 2.32.0
[PATCH u-boot-spi v3 04/10] mtd: spi-nor-core: Check return value of write_disable() in spi_nor_erase()
From: Marek Behún The cleanup code of spi_nor_erase() function calls write_disable(), but does not return it's return value even in case of failure. Fix this. Signed-off-by: Marek Behún Reviewed-by: Simon Glass Tested-by: Masami Hiramatsu --- drivers/mtd/spi/spi-nor-core.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index a6007acd1a..d49f7faf99 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -953,7 +953,9 @@ erase_err: if (!ret) ret = err; #endif - write_disable(nor); + err = write_disable(nor); + if (!ret) + ret = err; return ret; } -- 2.32.0
[PATCH u-boot-spi v3 01/10] mtd: spi-nor-core: Try cleaning up in case writing BAR failed
From: Marek Behún Use the cleanup codepath of spi_nor_erase() also in the event of failure of writing the BAR register. Signed-off-by: Marek Behún Reviewed-by: Simon Glass Reviewed-by: Jagan Teki Reviewed-by: Pratyush Yadav Tested-by: Masami Hiramatsu --- drivers/mtd/spi/spi-nor-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f1b4e5ea8e..d1e2bb47f7 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -929,7 +929,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) #ifdef CONFIG_SPI_FLASH_BAR ret = write_bar(nor, addr); if (ret < 0) - return ret; + goto erase_err; #endif write_enable(nor); -- 2.32.0
[PATCH u-boot-spi v3 00/10] Fix `mtd erase` when used with mtdpart
From: Marek Behún The original cover letter said: this patch series fixes the `mtd erase` command when used with mtdpart with a partition of non-zero offset. Currently when the `mtd erase` command is used for such a partition, it does not erase all blocks. Instead after a block is erased, the next block address not current block address + block size, but current block address + block size + partition offset, due to spi_nor_erase() not calling mtd_erase_callback(): => mtd erase "Rescue system".. Erasing 0x ... 0x006f (1792 eraseblock(s)) jedec_spi_nor spi-nor@0: at 0x10, len 4096 jedec_spi_nor spi-nor@0: at 0x201000, len 4096 jedec_spi_nor spi-nor@0: at 0x302000, len 4096 jedec_spi_nor spi-nor@0: at 0x403000, len 4096 jedec_spi_nor spi-nor@0: at 0x504000, len 4096 jedec_spi_nor spi-nor@0: at 0x605000, len 4096 jedec_spi_nor spi-nor@0: at 0x706000, len 4096 This series adds some fixes to spi_nor_erase() function, then adds calling of mtd_erase_callback() to fix this bug. The series also contains an improvement - adding the posibility to interrupt spi_nor_erase() with Ctrl+C; and another one - making mtdpart's _erase() method more sane so that the above mentioned bug will not occur even if underlying driver does not call mtd_erase_callback(). Finally the last patch removes mtd_erase_callback() entirely, since: - all provided callbacks across U-Boot are no-ops - mtd_erase_callback() is abused for completely different purpose than the original one (as explained in last commit message) Marek Changes since v2: - added patch (5) adding check for zero length into legacy spi_flash_*() functions - changes patch (6, previously 5) to remove check for zero length also from spi_nor_write() Changes since v1: - fixed CI bugs (by removing mtd_erase_callback() entirely) Marek Behún (10): mtd: spi-nor-core: Try cleaning up in case writing BAR failed mtd: spi-nor-core: Check return value of write_enable() in spi_nor_erase() mtd: spi-nor-core: Don't overwrite return value if it is non-zero mtd: spi-nor-core: Check return value of write_disable() in spi_nor_erase() mtd: spi-flash: Check for zero length in legacy spi_flash_*() mtd: spi-nor-core: Don't check for zero length in spi_nor_write() / spi_nor_erase() mtd: spi-nor-core: Call mtd_erase_callback() from spi_nor_erase() mtd: spi-nor-core: Check for ctrlc() in spi_nor_erase() mtd: mtdpart: Make mtdpart's _erase method sane mtd: Remove mtd_erase_callback() entirely cmd/onenand.c | 9 ++ drivers/mtd/altera_qspi.c | 3 -- drivers/mtd/cfi_mtd.c | 1 - drivers/mtd/mtdconcat.c| 11 --- drivers/mtd/mtdcore.c | 8 -- drivers/mtd/mtdpart.c | 23 --- drivers/mtd/nand/raw/nand_base.c | 4 --- drivers/mtd/onenand/onenand_base.c | 3 -- drivers/mtd/spi/sf_mtd.c | 1 - drivers/mtd/spi/spi-nor-core.c | 46 +- drivers/mtd/ubi/io.c | 13 - env/onenand.c | 4 +-- fs/yaffs2/yaffs_mtdif.c| 1 - include/linux/mtd/mtd.h| 11 --- include/nand.h | 1 - include/spi_flash.h| 9 ++ 16 files changed, 51 insertions(+), 97 deletions(-) -- 2.32.0
RE: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
Hi,
ST Restricted
> -Original Message-
> From: Marek Vasut
> Sent: mardi 5 octobre 2021 15:33
> To: patrick.delau...@foss.st.com; u-boot@lists.denx.de
> Cc: 'Lukasz Majewski'
> Subject: Re: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
>
> On 10/5/21 2:50 PM, patrick.delau...@foss.st.com wrote:
> > Hi Marek,
> >
> >
> > ST Restricted
> >
> >> -Original Message-
> >> From: U-Boot On Behalf Of Marek Vasut
> >> Sent: mardi 5 octobre 2021 14:40
> >> To: u-boot@lists.denx.de
> >> Cc: Marek Vasut ; Lukasz Majewski
> >> Subject: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
> >>
> >> Add dfu_alt_info option which allows specifying multiple SPI flashes
> >> as an
> > alt info.
> >> The syntax is as follows:
> >>
> >> altname sf bus:cs[:speed[:mode]]
> >>
> >> Example:
> >> dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1
> >>
> >> Signed-off-by: Marek Vasut
> >> Cc: Lukasz Majewski
> >> ---
> >> V2: Fix device string parsing in all cases
> >> ---
> >> drivers/dfu/dfu_sf.c | 31 ---
> >> 1 file changed, 24 insertions(+), 7 deletions(-)
> >>
> >> diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index
> >> b72493ced86..6d33497990a 100644
> >> --- a/drivers/dfu/dfu_sf.c
> >> +++ b/drivers/dfu/dfu_sf.c
> >> @@ -168,30 +168,46 @@ static struct spi_flash *parse_dev(char
> >> *devstr)
> > int
> >> dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s) {
> >>char *st;
> >> - char *devstr_bkup = strdup(devstr);
> >> -
> >> - dfu->data.sf.dev = parse_dev(devstr_bkup);
> >> - free(devstr_bkup);
> >> - if (!dfu->data.sf.dev)
> >> - return -ENODEV;
> >>
> >>dfu->dev_type = DFU_DEV_SF;
> >> - dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> >>
> >>st = strsep(, " ");
> >>if (!strcmp(st, "raw")) {
> >> + char *devstr_bkup = strdup(devstr);
> >> + dfu->data.sf.dev = parse_dev(devstr_bkup);
> >> + free(devstr_bkup);
> >> + if (!dfu->data.sf.dev)
> >> + return -ENODEV;
> >> +
> >>dfu->layout = DFU_RAW_ADDR;
> >> + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> >>dfu->data.sf.start = hextoul(s, );
> >>s++;
> >>dfu->data.sf.size = hextoul(s, );
> >> + } else if (!strcmp(st, "sf")) {
> >> + st = strsep(, " ");
> >> + dfu->data.sf.dev = parse_dev(st);
> >> + if (!dfu->data.sf.dev)
> >> + return -ENODEV;
> >> +
> >> + dfu->layout = DFU_RAW_ADDR;
> >> + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> >> + dfu->data.sf.start = 0;
> >> + dfu->data.sf.size = dfu->data.sf.dev->size;
> >>} else if (CONFIG_IS_ENABLED(DFU_SF_PART) &&
> >> (!strcmp(st, "part") || !strcmp(st, "partubi"))) {
> >> + char *devstr_bkup = strdup(devstr);
> >>char mtd_id[32];
> >>struct mtd_device *mtd_dev;
> >>u8 part_num;
> >>struct part_info *pi;
> >>int ret, dev, part;
> >>
> >> + dfu->data.sf.dev = parse_dev(devstr_bkup);
> >> + free(devstr_bkup);
> >> + if (!dfu->data.sf.dev)
> >> + return -ENODEV;
> >> +
> >>dfu->layout = DFU_RAW_ADDR;
> >>
> >>dev = dectoul(s, );
> >> @@ -208,6 +224,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu,
> >> char
> > *devstr,
> >> char *s)
> >>printf("Could not locate '%s'\n", mtd_id);
> >>return -1;
> >>}
> >> + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> >>dfu->data.sf.start = pi->offset;
> >>dfu->data.sf.size = pi->size;
> >>if (!strcmp(st, "partubi"))
> >> --
> >> 2.33.0
> >
> > The same use case can be supported with mtd backend
> >
> > https://elixir.bootlin.com/u-boot/latest/source/doc/usage/dfu.rst
> >
> >
> > U-Boot> env set dfu_alt_info \
> > "mtd nor0=spl part 1;u-boot part 2;u-boot-env part 3&"\
> > "mtd nand0=UBI partubi 1"
>
> Does it work for multiple SPI NORs at the same time ?
If it is support on mtd side, yes it is supported in dfu...
And I think it is supported now (with u-class UCLASS_SPI_FLASH).
I need to check.deeper
Patrick
Re: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
On 10/5/21 2:50 PM, patrick.delau...@foss.st.com wrote:
Hi Marek,
ST Restricted
-Original Message-
From: U-Boot On Behalf Of Marek Vasut
Sent: mardi 5 octobre 2021 14:40
To: u-boot@lists.denx.de
Cc: Marek Vasut ; Lukasz Majewski
Subject: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
Add dfu_alt_info option which allows specifying multiple SPI flashes as an
alt info.
The syntax is as follows:
altname sf bus:cs[:speed[:mode]]
Example:
dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1
Signed-off-by: Marek Vasut
Cc: Lukasz Majewski
---
V2: Fix device string parsing in all cases
---
drivers/dfu/dfu_sf.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index
b72493ced86..6d33497990a 100644
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -168,30 +168,46 @@ static struct spi_flash *parse_dev(char *devstr)
int
dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s) {
char *st;
- char *devstr_bkup = strdup(devstr);
-
- dfu->data.sf.dev = parse_dev(devstr_bkup);
- free(devstr_bkup);
- if (!dfu->data.sf.dev)
- return -ENODEV;
dfu->dev_type = DFU_DEV_SF;
- dfu->max_buf_size = dfu->data.sf.dev->sector_size;
st = strsep(, " ");
if (!strcmp(st, "raw")) {
+ char *devstr_bkup = strdup(devstr);
+ dfu->data.sf.dev = parse_dev(devstr_bkup);
+ free(devstr_bkup);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
dfu->layout = DFU_RAW_ADDR;
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
dfu->data.sf.start = hextoul(s, );
s++;
dfu->data.sf.size = hextoul(s, );
+ } else if (!strcmp(st, "sf")) {
+ st = strsep(, " ");
+ dfu->data.sf.dev = parse_dev(st);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
+ dfu->layout = DFU_RAW_ADDR;
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
+ dfu->data.sf.start = 0;
+ dfu->data.sf.size = dfu->data.sf.dev->size;
} else if (CONFIG_IS_ENABLED(DFU_SF_PART) &&
(!strcmp(st, "part") || !strcmp(st, "partubi"))) {
+ char *devstr_bkup = strdup(devstr);
char mtd_id[32];
struct mtd_device *mtd_dev;
u8 part_num;
struct part_info *pi;
int ret, dev, part;
+ dfu->data.sf.dev = parse_dev(devstr_bkup);
+ free(devstr_bkup);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
dfu->layout = DFU_RAW_ADDR;
dev = dectoul(s, );
@@ -208,6 +224,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu, char
*devstr,
char *s)
printf("Could not locate '%s'\n", mtd_id);
return -1;
}
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
dfu->data.sf.start = pi->offset;
dfu->data.sf.size = pi->size;
if (!strcmp(st, "partubi"))
--
2.33.0
The same use case can be supported with mtd backend
https://elixir.bootlin.com/u-boot/latest/source/doc/usage/dfu.rst
U-Boot> env set dfu_alt_info \
"mtd nor0=spl part 1;u-boot part 2;u-boot-env part 3&"\
"mtd nand0=UBI partubi 1"
Does it work for multiple SPI NORs at the same time ?
RE: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
Hi,
ST Restricted
> -Original Message-
> From: patrick.delau...@foss.st.com
> Sent: mardi 5 octobre 2021 14:50
> To: 'Marek Vasut' ; 'u-boot@lists.denx.de' b...@lists.denx.de>
> Cc: 'Lukasz Majewski'
> Subject: RE: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
>
> Hi Marek,
>
>
> ST Restricted
>
> > -Original Message-
> > From: U-Boot On Behalf Of Marek Vasut
> > Sent: mardi 5 octobre 2021 14:40
> > To: u-boot@lists.denx.de
> > Cc: Marek Vasut ; Lukasz Majewski
> > Subject: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
> >
> > Add dfu_alt_info option which allows specifying multiple SPI flashes as
an alt
> info.
> > The syntax is as follows:
> >
> > altname sf bus:cs[:speed[:mode]]
> >
> > Example:
> > dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1
> >
> > Signed-off-by: Marek Vasut
> > Cc: Lukasz Majewski
> > ---
> > V2: Fix device string parsing in all cases
> > ---
> > drivers/dfu/dfu_sf.c | 31 ---
> > 1 file changed, 24 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index
> > b72493ced86..6d33497990a 100644
> > --- a/drivers/dfu/dfu_sf.c
> > +++ b/drivers/dfu/dfu_sf.c
> > @@ -168,30 +168,46 @@ static struct spi_flash *parse_dev(char *devstr)
> > int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s) {
> > char *st;
> > - char *devstr_bkup = strdup(devstr);
> > -
> > - dfu->data.sf.dev = parse_dev(devstr_bkup);
> > - free(devstr_bkup);
> > - if (!dfu->data.sf.dev)
> > - return -ENODEV;
> >
> > dfu->dev_type = DFU_DEV_SF;
> > - dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> >
> > st = strsep(, " ");
> > if (!strcmp(st, "raw")) {
> > + char *devstr_bkup = strdup(devstr);
> > + dfu->data.sf.dev = parse_dev(devstr_bkup);
> > + free(devstr_bkup);
> > + if (!dfu->data.sf.dev)
> > + return -ENODEV;
> > +
> > dfu->layout = DFU_RAW_ADDR;
> > + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> > dfu->data.sf.start = hextoul(s, );
> > s++;
> > dfu->data.sf.size = hextoul(s, );
> > + } else if (!strcmp(st, "sf")) {
> > + st = strsep(, " ");
> > + dfu->data.sf.dev = parse_dev(st);
> > + if (!dfu->data.sf.dev)
> > + return -ENODEV;
> > +
> > + dfu->layout = DFU_RAW_ADDR;
> > + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> > + dfu->data.sf.start = 0;
> > + dfu->data.sf.size = dfu->data.sf.dev->size;
> > } else if (CONFIG_IS_ENABLED(DFU_SF_PART) &&
> >(!strcmp(st, "part") || !strcmp(st, "partubi"))) {
> > + char *devstr_bkup = strdup(devstr);
> > char mtd_id[32];
> > struct mtd_device *mtd_dev;
> > u8 part_num;
> > struct part_info *pi;
> > int ret, dev, part;
> >
> > + dfu->data.sf.dev = parse_dev(devstr_bkup);
> > + free(devstr_bkup);
> > + if (!dfu->data.sf.dev)
> > + return -ENODEV;
> > +
> > dfu->layout = DFU_RAW_ADDR;
> >
> > dev = dectoul(s, );
> > @@ -208,6 +224,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu,
> > char *devstr, char *s)
> > printf("Could not locate '%s'\n", mtd_id);
> > return -1;
> > }
> > + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> > dfu->data.sf.start = pi->offset;
> > dfu->data.sf.size = pi->size;
> > if (!strcmp(st, "partubi"))
> > --
> > 2.33.0
>
> The same use case can be supported with mtd backend
>
> https://elixir.bootlin.com/u-boot/latest/source/doc/usage/dfu.rst
>
>
> U-Boot> env set dfu_alt_info \
> "mtd nor0=spl part 1;u-boot part 2;u-boot-env part 3&"\
> "mtd nand0=UBI partubi 1"
with '&' in dfu_alt_info you can have several dfu backend...
something as (not tested) :
U-Boot> env set dfu_alt_info "sf 0:0=raw 0x0 0:1=raw 0x0 "
'&' It is working for ANY existing backend
=> used today in STM32MP15x
+ stm32prog command as backend when flashlayout is parsed to update any
device.
+ for dfu command (board/st/common/stm32mp_dfu.c) => all devices are
exported (mtd nand0 and mtd nor0)
Patrick
RE: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
Hi Marek,
ST Restricted
> -Original Message-
> From: U-Boot On Behalf Of Marek Vasut
> Sent: mardi 5 octobre 2021 14:40
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Lukasz Majewski
> Subject: [PATCH v2] dfu: dfu_sf: Add support for multiple flashes
>
> Add dfu_alt_info option which allows specifying multiple SPI flashes as an
alt info.
> The syntax is as follows:
>
> altname sf bus:cs[:speed[:mode]]
>
> Example:
> dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1
>
> Signed-off-by: Marek Vasut
> Cc: Lukasz Majewski
> ---
> V2: Fix device string parsing in all cases
> ---
> drivers/dfu/dfu_sf.c | 31 ---
> 1 file changed, 24 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index
> b72493ced86..6d33497990a 100644
> --- a/drivers/dfu/dfu_sf.c
> +++ b/drivers/dfu/dfu_sf.c
> @@ -168,30 +168,46 @@ static struct spi_flash *parse_dev(char *devstr)
int
> dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s) {
> char *st;
> - char *devstr_bkup = strdup(devstr);
> -
> - dfu->data.sf.dev = parse_dev(devstr_bkup);
> - free(devstr_bkup);
> - if (!dfu->data.sf.dev)
> - return -ENODEV;
>
> dfu->dev_type = DFU_DEV_SF;
> - dfu->max_buf_size = dfu->data.sf.dev->sector_size;
>
> st = strsep(, " ");
> if (!strcmp(st, "raw")) {
> + char *devstr_bkup = strdup(devstr);
> + dfu->data.sf.dev = parse_dev(devstr_bkup);
> + free(devstr_bkup);
> + if (!dfu->data.sf.dev)
> + return -ENODEV;
> +
> dfu->layout = DFU_RAW_ADDR;
> + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> dfu->data.sf.start = hextoul(s, );
> s++;
> dfu->data.sf.size = hextoul(s, );
> + } else if (!strcmp(st, "sf")) {
> + st = strsep(, " ");
> + dfu->data.sf.dev = parse_dev(st);
> + if (!dfu->data.sf.dev)
> + return -ENODEV;
> +
> + dfu->layout = DFU_RAW_ADDR;
> + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> + dfu->data.sf.start = 0;
> + dfu->data.sf.size = dfu->data.sf.dev->size;
> } else if (CONFIG_IS_ENABLED(DFU_SF_PART) &&
> (!strcmp(st, "part") || !strcmp(st, "partubi"))) {
> + char *devstr_bkup = strdup(devstr);
> char mtd_id[32];
> struct mtd_device *mtd_dev;
> u8 part_num;
> struct part_info *pi;
> int ret, dev, part;
>
> + dfu->data.sf.dev = parse_dev(devstr_bkup);
> + free(devstr_bkup);
> + if (!dfu->data.sf.dev)
> + return -ENODEV;
> +
> dfu->layout = DFU_RAW_ADDR;
>
> dev = dectoul(s, );
> @@ -208,6 +224,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu, char
*devstr,
> char *s)
> printf("Could not locate '%s'\n", mtd_id);
> return -1;
> }
> + dfu->max_buf_size = dfu->data.sf.dev->sector_size;
> dfu->data.sf.start = pi->offset;
> dfu->data.sf.size = pi->size;
> if (!strcmp(st, "partubi"))
> --
> 2.33.0
The same use case can be supported with mtd backend
https://elixir.bootlin.com/u-boot/latest/source/doc/usage/dfu.rst
U-Boot> env set dfu_alt_info \
"mtd nor0=spl part 1;u-boot part 2;u-boot-env part 3&"\
"mtd nand0=UBI partubi 1"
[PATCH v2] dfu: dfu_sf: Add support for multiple flashes
Add dfu_alt_info option which allows specifying multiple SPI flashes
as an alt info. The syntax is as follows:
altname sf bus:cs[:speed[:mode]]
Example:
dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1
Signed-off-by: Marek Vasut
Cc: Lukasz Majewski
---
V2: Fix device string parsing in all cases
---
drivers/dfu/dfu_sf.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c
index b72493ced86..6d33497990a 100644
--- a/drivers/dfu/dfu_sf.c
+++ b/drivers/dfu/dfu_sf.c
@@ -168,30 +168,46 @@ static struct spi_flash *parse_dev(char *devstr)
int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s)
{
char *st;
- char *devstr_bkup = strdup(devstr);
-
- dfu->data.sf.dev = parse_dev(devstr_bkup);
- free(devstr_bkup);
- if (!dfu->data.sf.dev)
- return -ENODEV;
dfu->dev_type = DFU_DEV_SF;
- dfu->max_buf_size = dfu->data.sf.dev->sector_size;
st = strsep(, " ");
if (!strcmp(st, "raw")) {
+ char *devstr_bkup = strdup(devstr);
+ dfu->data.sf.dev = parse_dev(devstr_bkup);
+ free(devstr_bkup);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
dfu->layout = DFU_RAW_ADDR;
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
dfu->data.sf.start = hextoul(s, );
s++;
dfu->data.sf.size = hextoul(s, );
+ } else if (!strcmp(st, "sf")) {
+ st = strsep(, " ");
+ dfu->data.sf.dev = parse_dev(st);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
+ dfu->layout = DFU_RAW_ADDR;
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
+ dfu->data.sf.start = 0;
+ dfu->data.sf.size = dfu->data.sf.dev->size;
} else if (CONFIG_IS_ENABLED(DFU_SF_PART) &&
(!strcmp(st, "part") || !strcmp(st, "partubi"))) {
+ char *devstr_bkup = strdup(devstr);
char mtd_id[32];
struct mtd_device *mtd_dev;
u8 part_num;
struct part_info *pi;
int ret, dev, part;
+ dfu->data.sf.dev = parse_dev(devstr_bkup);
+ free(devstr_bkup);
+ if (!dfu->data.sf.dev)
+ return -ENODEV;
+
dfu->layout = DFU_RAW_ADDR;
dev = dectoul(s, );
@@ -208,6 +224,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu, char
*devstr, char *s)
printf("Could not locate '%s'\n", mtd_id);
return -1;
}
+ dfu->max_buf_size = dfu->data.sf.dev->sector_size;
dfu->data.sf.start = pi->offset;
dfu->data.sf.size = pi->size;
if (!strcmp(st, "partubi"))
--
2.33.0
Re: [RFC PATCH 2/2] fpga: xilinx: allow loading authenticated images (DDR)
On 10/5/21 1:13 PM, Jorge Ramirez-Ortiz wrote:
> Add new compatible string u-boot,zynqmp-fpga-ddrauth to handle this
> use case.
>
> Signed-off-by: Jorge Ramirez-Ortiz
> ---
> drivers/fpga/xilinx.c | 29 +
> drivers/fpga/zynqmppl.c | 4 ++--
> include/xilinx.h| 2 +-
> 3 files changed, 28 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
> index cbebefb55f..c8035105e2 100644
> --- a/drivers/fpga/xilinx.c
> +++ b/drivers/fpga/xilinx.c
> @@ -135,23 +135,44 @@ int fpga_loadbitstream(int devnum, char *fpgadata,
> size_t size,
> dataptr += 4;
> printf(" bytes in bitstream = %d\n", swapsize);
>
> - return fpga_load(devnum, dataptr, swapsize, bstype);
> + return fpga_load(devnum, dataptr, swapsize, bstype, NULL);
> }
>
> int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
> - bitstream_type bstype)
> + bitstream_type bstype, const char *compatible)
> {
> + struct fpga_secure_info info = { 0 };
> +
> if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
> printf ("%s: Invalid device descriptor\n", __FUNCTION__);
> return FPGA_FAIL;
> }
>
> - if (!desc->operations || !desc->operations->load) {
> + if (!desc->operations) {
> printf("%s: Missing load operation\n", __func__);
> return FPGA_FAIL;
> }
>
> - return desc->operations->load(desc, buf, bsize, bstype);
> + if (!compatible || !strcmp(compatible, "u-boot,fpga-legacy")) {
> + if (!desc->operations->load) {
> + printf("%s: Missing load operation\n", __func__);
> + return FPGA_FAIL;
> + }
> + return desc->operations->load(desc, buf, bsize, bstype);
> + }
> +
> + if (!strcmp(compatible, "u-boot,zynqmp-fpga-ddrauth")) {
> + if (!desc->operations->loads) {
> + printf("%s: Missing load operation\n", __func__);
> + return FPGA_FAIL;
> + }
> + /* DDR authentication */
> + info.authflag = 1;
> + return desc->operations->loads(desc, buf, bsize, );
> + }
I am not sure about this solution. First of all it forces SPL to have
additional code which just extending size. It means there must be a way
to enable/disable it.
The next thing is that you have zynqmp string in generic xilinx file
which doesn't look right. It would be better to deal with image types
directly in driver which is capable to handle it.
It means record fit image compatible string in the driver with
hooks/flags and determined what should be called.
And the same style should work for SPL and also for U-Boot proper.
Thanks,
Michal
RE: [PATCH] Revert "configs: stm32mp1: only support SD card after NOR in bootcmd_stm32mp"
Hi,
ST Restricted
> -Original Message-
> From: Marek Vasut
> Sent: lundi 4 octobre 2021 18:45
> To: Patrick DELAUNAY ; u-boot@lists.denx.de
> Cc: Patrice Chotard
> Subject: Re: [PATCH] Revert "configs: stm32mp1: only support SD card after
> NOR in bootcmd_stm32mp"
>
> On 10/4/21 6:34 PM, Patrick DELAUNAY wrote:
> > Hi,
>
> Hi,
>
> > On 10/4/21 1:48 PM, Marek Vasut wrote:
> >> This reverts commit d5d726d3cc47691ace3c68fa31147ad104aaf579,
> >> which breaks boards which ship with multiple SD/eMMC sockets.
> >>
> >> This stm32mp1.h config is not used only by the ST reference boards,
> >> but all the other STM32MP1 based boards in U-Boot, so changes to this
> >> stm32mp1.h cannot break the other boards.
> >>
> >> Signed-off-by: Marek Vasut
> >> Cc: Patrice Chotard
> >> Cc: Patrick Delaunay
> >> ---
> >> NOTE: I think we might need to split out the env for different
> >>boards into different headers instead. Thoughts ?
> >> ---
> >> include/configs/stm32mp1.h | 4 +---
> >> 1 file changed, 1 insertion(+), 3 deletions(-)
> >>
> >> diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h
> >> index 973a4f1d4b8..a75ed693f57 100644
> >> --- a/include/configs/stm32mp1.h
> >> +++ b/include/configs/stm32mp1.h
> >> @@ -120,7 +120,7 @@
> >>* for serial/usb: execute the stm32prog command
> >>* for mmc boot (eMMC, SD card), boot only on the same device
> >>* for nand or spi-nand boot, boot with on ubifs partition on UBI
> >> partition
> >> - * for nor boot, use SD card = mmc0
> >> + * for nor boot, use the default order
> >>*/
> >> #define STM32MP_BOOTCMD "bootcmd_stm32mp=" \
> >> "echo \"Boot over ${boot_device}${boot_instance}!\";" \ @@
> >> -133,8 +133,6 @@
> >> "if test ${boot_device} = nand ||" \
> >> " test ${boot_device} = spi-nand ;" \
> >> "then env set boot_targets ubifs0; fi;" \
> >> -"if test ${boot_device} = nor;" \
> >> -"then env set boot_targets mmc0; fi;" \
> >> "run distro_bootcmd;" \
> >> "fi;\0"
> >
> >
> > Reviewed-by: Patrick Delaunay
> >
> >
> > Sorry to break your board, but I assumed the "stm32mp1.h" was only the
> > default ST configuration
>
> No worries really. No, it isn't only for the ST evalboards, and I don't know
> whether
> this is the right approach.
>
> > for ST boards and other boards need to be overridden it if it is not
> > align with their needs
> >
> > as I don't know the expected boot sequence.
> >
> > for example with:
> >
> > CONFIG_BOOTCOMMAND="run bootcmd_dh_stm32mp"
> >
> > with bootcmd_dh_stm32mp to be defined
> >
> >
> > but today this file is a mix between SOC configuration (generic) and
> > ST boards needs.
> >
> >
> > So I will merge your revert and I will push a other solution to only
> > support SD card
> >
> > after NOR in bootcmd_stm32mp but only for STMicroelectronics boards
> >
> > (because the revert now break the EV1 boot from NOR).
> >
> > 1) stm32mp1.h = common for SOC STMP15x (as today)
> >
> > 2) st_stm32mp1.h = ST boards configuration (override common)
>
> Maybe the naming should be the other way around, so we have some sort of
> namespacing, like this:
>
> stm32mp1_common.h
> ... common stuff for all boards and SoM and all ...
>
> stm32mp1_st_evalboard.h (or whatever you want to call it) #include
> #define custom ST env ...
>
> stm32mp1_dh_dhsom.h
> #include
> #define custom DH env ...
>
> That's what imx does , except for the namespacing, so the file names are a
> mess.
> I think we can do better there. So anything related to stm32mp1 should have
> stm32mp1_* filename prefix, and then some vendor_ or board_ suffix.
Agree it is better and more coherent.
I wasn't want to change the dh files,
but I will do it:
configs/stm32mp1_common.h or
stm32mp15_common.h
configs/stm32mp1_dh_dhsom.h (as you proposed) or
stm32mp15_dh_dhsom.h
configs/stm32mp1_st_stm32mp15.h or
stm32mp15_st_common.h or
stm32mp15_st_boards.h (name to be confirmed)
with
- stm32mp1_* filename prefix for STM32MP1 Series (Cortex arm v7)
- stm32mp15_* filename prefix for STM32MP15x lines
- stm32mp13_* filename prefix for STM32MP13x lines (coming soon =>
https://lwn.net/Articles/864174/)
Regards
Patrick
Re: [PATCH V2 1/6] ARM: rmobile: Enable board detection when FIT is enabled
On Mon, Sep 20, 2021 at 11:14 AM Adam Ford wrote:
>
> There are three boards from Beacon, RZ/G2 M/N/H which all
> use the same board file, but different device trees.
> Add code to automatically select the proper device tree
> based on the CPU type.
>
> Signed-off-by: Adam Ford
Marek,
You previously asked me to remind you after 2 weeks, so it doesn't get
too stale. I rebased at the time I did the V2. Can you give
feedback?
thank you,
adam
> ---
> board/beacon/beacon-rzg2m/beacon-rzg2m.c | 16
> 1 file changed, 16 insertions(+)
>
> diff --git a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> index c12ff77fb2..b3521fcbc1 100644
> --- a/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> +++ b/board/beacon/beacon-rzg2m/beacon-rzg2m.c
> @@ -36,3 +36,19 @@ void reset_cpu(void)
> {
> writel(RST_CODE, RST_CA57RESCNT);
> }
> +
> +#if IS_ENABLED(CONFIG_MULTI_DTB_FIT)
> +int board_fit_config_name_match(const char *name)
> +{
> + if (!strcmp(rzg_get_cpu_name(), "R8A774A1") && !strcmp(name,
> "r8a774a1-beacon-rzg2m-kit"))
> + return 0;
> +
> + if (!strcmp(rzg_get_cpu_name(), "R8A774B1") && !strcmp(name,
> "r8a774b1-beacon-rzg2n-kit"))
> + return 0;
> +
> + if (!strcmp(rzg_get_cpu_name(), "R8A774E1") && !strcmp(name,
> "r8a774e1-beacon-rzg2h-kit"))
> + return 0;
> +
> + return -1;
> +}
> +#endif
> --
> 2.25.1
>
Re: [PATCH] arm64: zynqmp: Print the secure boot status information in EL3
On 10/5/21 1:13 PM, Jorge Ramirez-Ortiz wrote:
> Confirm the secure boot configuration on the console.
>
> Signed-off-by: Jorge Ramirez-Ortiz
> ---
> arch/arm/mach-zynqmp/include/mach/hardware.h | 3 ++-
> board/xilinx/zynqmp/zynqmp.c | 16 +++-
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h
> b/arch/arm/mach-zynqmp/include/mach/hardware.h
> index 3776499070..3d3ffa086e 100644
> --- a/arch/arm/mach-zynqmp/include/mach/hardware.h
> +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
> @@ -139,7 +139,8 @@ struct apu_regs {
> #define ZYNQMP_SILICON_VER_SHIFT 0
>
> struct csu_regs {
> - u32 reserved0[4];
> + u32 status;
> + u32 reserved0[3];
> u32 multi_boot;
> u32 reserved1[11];
> u32 idcode;
> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
> index 1748fec2e4..b7d11630d1 100644
> --- a/board/xilinx/zynqmp/zynqmp.c
> +++ b/board/xilinx/zynqmp/zynqmp.c
> @@ -355,6 +355,18 @@ static int multi_boot(void)
> return 0;
> }
>
> +static void secure_boot(void)
> +{
> + u32 status;
> +
> + status = readl(_base->status);
I would prefer to use zynqmp_mmio_read instead to make sure that we can
call this function also from regular u-boot not running in EL3.
For SPL it will be just readl what you have here too.
> + if (status & (BIT(0) | BIT(1))) {
> + printf("Secure Boot:\t%s%s\n",
> +status & BIT(0) ? "authenticated" : "not authenticated",
> +status & BIT(1) ? ", encrypted" : ", not encrypted");
It is pretty much visible that instead of BIT(X) you should use macros.
> + }
> +}
> +
> #define PS_SYSMON_ANALOG_BUS_VAL 0x3210
> #define PS_SYSMON_ANALOG_BUS_REG 0xFFA50914
>
> @@ -391,8 +403,10 @@ int board_init(void)
> fpga_add(fpga_xilinx, );
> #endif
>
> - if (current_el() == 3)
> + if (current_el() == 3) {
> multi_boot();
This code has changed a little bit. Please use the latest u-boot version.
> + secure_boot();
Is it useful to get information only for SPL in EL3? Just asking.
> + }
>
> return 0;
> }
>
Thanks,
Michal
Re: FIT image: load secure FPGA
Hi,
On 10/5/21 8:08 AM, Jorge Ramirez-Ortiz, Foundries wrote:
> On 05/10/21, Jorge Ramirez-Ortiz, Foundries wrote:
>> On 04/10/21, Alex G. wrote:
>>> On 10/4/21 3:32 PM, Jorge Ramirez-Ortiz, Foundries wrote:
Hello,
>>
>> hi Alex,
>>
We are enabling secure boot on Zynqmp with SPL.
The issue however is that during secure boot, the bootrom not only
validates the first loader (SPL and PMUFW combo) but it will also
expect a signed bitstream during load(FPGA).
Since currently the SPL load of an FPGA image from FIT does not
support loading images for authentication (fpga_loads), I'd like to
discuss how to best implement such support.
>>>
>>> What do you mean by "loading images for authentication" ?
>>
>> right, it eventually means executing fpga_loads insted of fpga_load (
>> a function that will provide additional params to the PMUFW.
>>
>> "loads" will load FPGA bitstreams that are either signed, encrypted or
>> both. When they are only signed, they are first authenticated by the
>> PMUFW and then loaded.
>>
A pretty standard file.its description of the FPGA loadable looks like
this:
fpga {
description = "FPGA binary";
data = /incbin/("${DEPLOY_DIR_IMAGE}/${SPL_FPGA_BINARY}");
type = "fpga";
arch = "${UBOOT_ARCH}";
compression = "none";
load = <${fpgaloadaddr}>;
hash-1 {
algo = "${FIT_HASH_ALG}";
};
};
We could extend imagetool.h struct image_tool_params to add more
params or perhpas just define different 'types' of fpga?
>>>
>>>
>>> Check "4) '/images' node"
>>> in doc/uImage.FIT/source_file_format.txt
>>>
>>> The intent is to give either:
>>>* loadaddr="$(addr)" : copy image to $(addr), Done
>>>* compatible="": Use this driver to upload the FPGA
>>>
>>> It seems to me like the right way to go is to make a new compatible="" FPGA
>>> loader is for fpga_load():
>>>
>>> fpga {
>>> description = "FPGA binary";
>>> data = /incbin/("${YOCTO_BS_PATH}");
>>> type = "fpga";
>>> compression = "none";
>>> compatible = "zynqmp-fancy-fpga",
>>
>> so you think we should capture on compatible the characteristics of the FPGA
>> image?
>
>
> um, right, makes sense then, thanks.
>
> - compatible : compatible method for loading image.
>
> Mandatory for types: "fpga", and images that do not specify a load
> address.
> To use the generic fpga loading routine, use "u-boot,fpga-legacy"
>
>>
>>> hash-1 {
>>> algo = "${FIT_HASHISH}";
>>> };
>>> };
>>>
>>>
Something like:
"fpga"
"fpga-auth" : authenticated
"fpga-enc" : encrypted
"fpga-sec" : encrypted and authenticated
>>>
>>> Can these properties be inferred from the FPGA image? If not, they could be
>>> required when using a new fpga loader. I don't think they should be added to
>>> "fpga-legacy".
>>
>> maybe.. with a bit of boot header parsing... But doing so would
>> deviate from the current approach making it somewhat inconsistent: ie,
>> there is no a common "fpga load" command but instead we have "fpga
>> load" and "fpga loads" as separate commands so perhaps the parsing is
>> not that obvious or it would have been done differently.
>> I'd rather follow the current approach and just explicitly qualify the
>> bitstream.
>>
In past when I was adding support for bitstreams in 2016 by commit
62afc601883e ("image: Add boot_get_fpga() to load fpga with bootm")
you can see that the problem was sort of the same as this one. But with
handling different bitstream types. Because there are two types of
bistreams in bin format and bit format.
At that time I solved it by calling function in bit format first. If
failed in bin format. And by comparing sizes it was determined if
bitstream is in bit or bin format.
I would say that this algorithm is not valid anymore because you can
also have compressed bistreams which are smaller then device itself but
still they are full bistreams.
That being said I think when new types should be defined we should also
optimized origin code for fpga loading to cover also partial bistreams
and bistreams in bin and bit formats.
Thanks,
Michal
[PATCH] ARM: amlogic: add sm efuse write support and cmd for read/write efuse
This adds support for amlogic efuse write and provides two subcommands
of "sm" command: "efuseread" and "efusewrite" to read/write bytes between
memory and efuse.
Signed-off-by: Vyacheslav Bocharov
---
arch/arm/mach-meson/sm.c | 68 +++-
1 file changed, 67 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index 1a8f23cb1fa..fb437b94d14 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -68,6 +68,26 @@ ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer,
size_t size)
return regs.regs[0];
}
+ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size)
+{
+ struct pt_regs regs;
+
+ meson_init_shmem();
+
+memcpy(shmem_input, buffer, size);
+
+ regs.regs[0] = FN_EFUSE_WRITE;
+ regs.regs[1] = offset;
+ regs.regs[2] = size;
+
+ smc_call();
+
+ if (regs.regs[0] == 0)
+ return -1;
+
+ return 0;
+}
+
#define SM_CHIP_ID_LENGTH 119
#define SM_CHIP_ID_OFFSET 4
#define SM_CHIP_ID_SIZE12
@@ -187,9 +207,53 @@ static int do_sm_reboot_reason(struct cmd_tbl *cmdtp, int
flag, int argc,
return CMD_RET_SUCCESS;
}
+static int do_efuse_read(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong address, offset, size;
+ int ret;
+
+ if (argc < 4)
+ return CMD_RET_USAGE;
+
+offset = simple_strtoul(argv[1], NULL, 0);
+size = simple_strtoul(argv[2], NULL, 0);
+
+address = simple_strtoul(argv[3], NULL, 0);
+
+ ret = meson_sm_read_efuse(offset, (void *)address, size);
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+}
+
+static int do_efuse_write(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong address, offset, size;
+ int ret;
+
+ if (argc < 4)
+ return CMD_RET_USAGE;
+
+offset = simple_strtoul(argv[1], NULL, 0);
+size = simple_strtoul(argv[2], NULL, 0);
+
+address = simple_strtoul(argv[3], NULL, 0);
+
+ ret = meson_sm_write_efuse(offset, (void *)address, size);
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+}
+
static struct cmd_tbl cmd_sm_sub[] = {
U_BOOT_CMD_MKENT(serial, 2, 1, do_sm_serial, "", ""),
U_BOOT_CMD_MKENT(reboot_reason, 1, 1, do_sm_reboot_reason, "", ""),
+U_BOOT_CMD_MKENT(efuseread, 4, 1, do_efuse_read, "", ""),
+U_BOOT_CMD_MKENT(efusewrite, 4, 0, do_efuse_write, "", ""),
};
static int do_sm(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -216,5 +280,7 @@ U_BOOT_CMD(
sm, 5, 0, do_sm,
"Secure Monitor Control",
"serial - read chip unique id to memory address\n"
- "sm reboot_reason [name] - get reboot reason and store to to
environment"
+ "sm reboot_reason [name] - get reboot reason and store to to
environment\n"
+"sm efuseread- read efuse to memory
address\n"
+"sm efusewrite- write into efuse from
memory address"
);
--
2.30.2
Re: [PATCH 1/2] board: siemens: iot2050: Adjust to changes in DT and configuration
On 05.10.21 13:37, Tom Rini wrote: > On Tue, Oct 05, 2021 at 12:04:49PM +0200, Jan Kiszka wrote: > >> From: Jan Kiszka >> >> Account for the changes done between merge proposal and the final merge. >> >> Signed-off-by: Jan Kiszka > > Ah, the navss name thing, sorry I didn't remember that yesterday. > Yeah, and my first experiment to revert the DT changes somehow didn't apply which sent me needlessly into an extra bisection loop. > Reviewed-by: Tom Rini > Thanks, Jan -- Siemens AG, T RDA IOT Corporate Competence Center Embedded Linux
Re: [PATCH 1/2] board: siemens: iot2050: Adjust to changes in DT and configuration
On Tue, Oct 05, 2021 at 12:04:49PM +0200, Jan Kiszka wrote: > From: Jan Kiszka > > Account for the changes done between merge proposal and the final merge. > > Signed-off-by: Jan Kiszka Ah, the navss name thing, sorry I didn't remember that yesterday. Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [PATCH] arm64: zynqmp: Print the secure boot status information in EL3
On Tue, Oct 5, 2021 at 2:13 PM Jorge Ramirez-Ortiz wrote:
>
> Confirm the secure boot configuration on the console.
>
> Signed-off-by: Jorge Ramirez-Ortiz
Acked-by: Oleksandr Suvorov
> ---
> arch/arm/mach-zynqmp/include/mach/hardware.h | 3 ++-
> board/xilinx/zynqmp/zynqmp.c | 16 +++-
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h
> b/arch/arm/mach-zynqmp/include/mach/hardware.h
> index 3776499070..3d3ffa086e 100644
> --- a/arch/arm/mach-zynqmp/include/mach/hardware.h
> +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
> @@ -139,7 +139,8 @@ struct apu_regs {
> #define ZYNQMP_SILICON_VER_SHIFT 0
>
> struct csu_regs {
> - u32 reserved0[4];
> + u32 status;
> + u32 reserved0[3];
> u32 multi_boot;
> u32 reserved1[11];
> u32 idcode;
> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
> index 1748fec2e4..b7d11630d1 100644
> --- a/board/xilinx/zynqmp/zynqmp.c
> +++ b/board/xilinx/zynqmp/zynqmp.c
> @@ -355,6 +355,18 @@ static int multi_boot(void)
> return 0;
> }
>
> +static void secure_boot(void)
> +{
> + u32 status;
> +
> + status = readl(_base->status);
> + if (status & (BIT(0) | BIT(1))) {
> + printf("Secure Boot:\t%s%s\n",
> + status & BIT(0) ? "authenticated" : "not
> authenticated",
> + status & BIT(1) ? ", encrypted" : ", not encrypted");
> + }
> +}
> +
> #define PS_SYSMON_ANALOG_BUS_VAL 0x3210
> #define PS_SYSMON_ANALOG_BUS_REG 0xFFA50914
>
> @@ -391,8 +403,10 @@ int board_init(void)
> fpga_add(fpga_xilinx, );
> #endif
>
> - if (current_el() == 3)
> + if (current_el() == 3) {
> multi_boot();
> + secure_boot();
> + }
>
> return 0;
> }
> --
> 2.31.1
>
--
Best regards
Oleksandr
Oleksandr Suvorov
cryo...@gmail.com
Re: [PATCH] arm64: zynqmp: Print the secure boot status information in EL3
Hi Jorge,
On Tue, Oct 5, 2021 at 2:13 PM Jorge Ramirez-Ortiz wrote:
>
> Confirm the secure boot configuration on the console.
>
> Signed-off-by: Jorge Ramirez-Ortiz
> ---
> arch/arm/mach-zynqmp/include/mach/hardware.h | 3 ++-
> board/xilinx/zynqmp/zynqmp.c | 16 +++-
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h
> b/arch/arm/mach-zynqmp/include/mach/hardware.h
> index 3776499070..3d3ffa086e 100644
> --- a/arch/arm/mach-zynqmp/include/mach/hardware.h
> +++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
> @@ -139,7 +139,8 @@ struct apu_regs {
> #define ZYNQMP_SILICON_VER_SHIFT 0
>
> struct csu_regs {
> - u32 reserved0[4];
> + u32 status;
> + u32 reserved0[3];
> u32 multi_boot;
> u32 reserved1[11];
> u32 idcode;
> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
> index 1748fec2e4..b7d11630d1 100644
> --- a/board/xilinx/zynqmp/zynqmp.c
> +++ b/board/xilinx/zynqmp/zynqmp.c
> @@ -355,6 +355,18 @@ static int multi_boot(void)
> return 0;
> }
>
> +static void secure_boot(void)
> +{
> + u32 status;
> +
> + status = readl(_base->status);
> + if (status & (BIT(0) | BIT(1))) {
> + printf("Secure Boot:\t%s%s\n",
> + status & BIT(0) ? "authenticated" : "not
> authenticated",
> + status & BIT(1) ? ", encrypted" : ", not encrypted");
> + }
> +}
> +
> #define PS_SYSMON_ANALOG_BUS_VAL 0x3210
> #define PS_SYSMON_ANALOG_BUS_REG 0xFFA50914
>
> @@ -391,8 +403,10 @@ int board_init(void)
> fpga_add(fpga_xilinx, );
> #endif
>
> - if (current_el() == 3)
> + if (current_el() == 3) {
> multi_boot();
> + secure_boot();
> + }
>
> return 0;
> }
> --
> 2.31.1
>
Reviewed-by: Igor Opaniuk
--
Best regards - Freundliche Grüsse - Meilleures salutations
Igor Opaniuk
Embedded Software Engineer
T: +380 938364067
E: igor.opan...@foundries.io
W: www.foundries.io
[RFC PATCH 2/2] fpga: xilinx: allow loading authenticated images (DDR)
Add new compatible string u-boot,zynqmp-fpga-ddrauth to handle this
use case.
Signed-off-by: Jorge Ramirez-Ortiz
---
drivers/fpga/xilinx.c | 29 +
drivers/fpga/zynqmppl.c | 4 ++--
include/xilinx.h| 2 +-
3 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index cbebefb55f..c8035105e2 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -135,23 +135,44 @@ int fpga_loadbitstream(int devnum, char *fpgadata, size_t
size,
dataptr += 4;
printf(" bytes in bitstream = %d\n", swapsize);
- return fpga_load(devnum, dataptr, swapsize, bstype);
+ return fpga_load(devnum, dataptr, swapsize, bstype, NULL);
}
int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
- bitstream_type bstype)
+ bitstream_type bstype, const char *compatible)
{
+ struct fpga_secure_info info = { 0 };
+
if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
printf ("%s: Invalid device descriptor\n", __FUNCTION__);
return FPGA_FAIL;
}
- if (!desc->operations || !desc->operations->load) {
+ if (!desc->operations) {
printf("%s: Missing load operation\n", __func__);
return FPGA_FAIL;
}
- return desc->operations->load(desc, buf, bsize, bstype);
+ if (!compatible || !strcmp(compatible, "u-boot,fpga-legacy")) {
+ if (!desc->operations->load) {
+ printf("%s: Missing load operation\n", __func__);
+ return FPGA_FAIL;
+ }
+ return desc->operations->load(desc, buf, bsize, bstype);
+ }
+
+ if (!strcmp(compatible, "u-boot,zynqmp-fpga-ddrauth")) {
+ if (!desc->operations->loads) {
+ printf("%s: Missing load operation\n", __func__);
+ return FPGA_FAIL;
+ }
+ /* DDR authentication */
+ info.authflag = 1;
+ return desc->operations->loads(desc, buf, bsize, );
+ }
+
+ printf("%s: compatible support not implemented\n", __func__);
+ return FPGA_FAIL;
}
#if defined(CONFIG_CMD_FPGA_LOADFS)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 6b394869db..65a9412123 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -245,7 +245,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf,
size_t bsize,
return ret;
}
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
struct fpga_secure_info *fpga_sec_info)
{
@@ -306,7 +306,7 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load,
-#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_CMD_FPGA_LOAD_SECURE)
.loads = zynqmp_loads,
#endif
.info = zynqmp_pcap_info,
diff --git a/include/xilinx.h b/include/xilinx.h
index ab4537becf..ae78009e6b 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -59,7 +59,7 @@ struct xilinx_fpga_op {
/* Generic Xilinx Functions
*/
int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
- bitstream_type bstype);
+ bitstream_type bstype, const char *compatible);
int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
int xilinx_info(xilinx_desc *desc);
int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
--
2.31.1
[RFC PATCH 1/2] fpga_load: pass compatible string
Instead of ignoring the mandatory fpga compatible string, let the
different implementations decide how to handle it
Signed-off-by: Jorge Ramirez-Ortiz
---
cmd/fpga.c | 8
common/image.c | 4 ++--
common/spl/spl_fit.c | 4 +---
drivers/fpga/fpga.c | 11 +--
include/fpga.h | 2 +-
5 files changed, 17 insertions(+), 12 deletions(-)
diff --git a/cmd/fpga.c b/cmd/fpga.c
index 3fdd0b35e8..f3ed1fcdff 100644
--- a/cmd/fpga.c
+++ b/cmd/fpga.c
@@ -178,7 +178,7 @@ static int do_fpga_load(struct cmd_tbl *cmdtp, int flag,
int argc,
if (ret)
return ret;
- return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL);
+ return fpga_load(dev, (void *)fpga_data, data_size, BIT_FULL, NULL);
}
static int do_fpga_loadb(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -209,7 +209,7 @@ static int do_fpga_loadp(struct cmd_tbl *cmdtp, int flag,
int argc,
if (ret)
return ret;
- return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL);
+ return fpga_load(dev, (void *)fpga_data, data_size, BIT_PARTIAL, NULL);
}
#endif
@@ -315,7 +315,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag,
int argc,
data_size = image_get_data_size(hdr);
}
return fpga_load(dev, (void *)data, data_size,
- BIT_FULL);
+ BIT_FULL, NULL);
}
#endif
#if defined(CONFIG_FIT)
@@ -355,7 +355,7 @@ static int do_fpga_loadmk(struct cmd_tbl *cmdtp, int flag,
int argc,
return CMD_RET_FAILURE;
}
- return fpga_load(dev, fit_data, data_size, BIT_FULL);
+ return fpga_load(dev, fit_data, data_size, BIT_FULL, NULL);
}
#endif
default:
diff --git a/common/image.c b/common/image.c
index e199d61a4c..97f3deda24 100644
--- a/common/image.c
+++ b/common/image.c
@@ -1516,14 +1516,14 @@ int boot_get_fpga(int argc, char *const argv[],
bootm_headers_t *images,
img_len, BIT_FULL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
- img_len, BIT_FULL);
+ img_len, BIT_FULL, NULL);
} else {
name = "partial";
err = fpga_loadbitstream(devnum, (char *)img_data,
img_len, BIT_PARTIAL);
if (err)
err = fpga_load(devnum, (const void *)img_data,
- img_len, BIT_PARTIAL);
+ img_len, BIT_PARTIAL, NULL);
}
if (err)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index f41abca0cc..4db22efd8c 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -566,11 +566,9 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx,
int node,
compatible = fdt_getprop(ctx->fit, node, "compatible", NULL);
if (!compatible)
warn_deprecated("'fpga' image without 'compatible' property");
- else if (strcmp(compatible, "u-boot,fpga-legacy"))
- printf("Ignoring compatible = %s property\n", compatible);
ret = fpga_load(0, (void *)fpga_image->load_addr, fpga_image->size,
- BIT_FULL);
+ BIT_FULL, compatible);
if (ret) {
printf("%s: Cannot load the image to the FPGA\n", __func__);
return ret;
diff --git a/drivers/fpga/fpga.c b/drivers/fpga/fpga.c
index fe3dfa1233..00aa4190b4 100644
--- a/drivers/fpga/fpga.c
+++ b/drivers/fpga/fpga.c
@@ -252,7 +252,8 @@ int fpga_loads(int devnum, const void *buf, size_t size,
/*
* Generic multiplexing code
*/
-int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype)
+int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype,
+ const char *compatible)
{
int ret_val = FPGA_FAIL; /* assume failure */
const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
@@ -263,13 +264,16 @@ int fpga_load(int devnum, const void *buf, size_t bsize,
bitstream_type bstype)
case fpga_xilinx:
#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load(desc->devdesc, buf, bsize,
- bstype);
+ bstype, compatible);
#else
fpga_no_sup((char *)__func__, "Xilinx devices");
#endif
break;
case fpga_altera:
#if defined(CONFIG_FPGA_ALTERA)
+ if (strcmp(compatible, "u-boot,fpga-legacy"))
+
[PATCH] arm64: zynqmp: Print the secure boot status information in EL3
Confirm the secure boot configuration on the console.
Signed-off-by: Jorge Ramirez-Ortiz
---
arch/arm/mach-zynqmp/include/mach/hardware.h | 3 ++-
board/xilinx/zynqmp/zynqmp.c | 16 +++-
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h
b/arch/arm/mach-zynqmp/include/mach/hardware.h
index 3776499070..3d3ffa086e 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -139,7 +139,8 @@ struct apu_regs {
#define ZYNQMP_SILICON_VER_SHIFT 0
struct csu_regs {
- u32 reserved0[4];
+ u32 status;
+ u32 reserved0[3];
u32 multi_boot;
u32 reserved1[11];
u32 idcode;
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 1748fec2e4..b7d11630d1 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -355,6 +355,18 @@ static int multi_boot(void)
return 0;
}
+static void secure_boot(void)
+{
+ u32 status;
+
+ status = readl(_base->status);
+ if (status & (BIT(0) | BIT(1))) {
+ printf("Secure Boot:\t%s%s\n",
+ status & BIT(0) ? "authenticated" : "not authenticated",
+ status & BIT(1) ? ", encrypted" : ", not encrypted");
+ }
+}
+
#define PS_SYSMON_ANALOG_BUS_VAL 0x3210
#define PS_SYSMON_ANALOG_BUS_REG 0xFFA50914
@@ -391,8 +403,10 @@ int board_init(void)
fpga_add(fpga_xilinx, );
#endif
- if (current_el() == 3)
+ if (current_el() == 3) {
multi_boot();
+ secure_boot();
+ }
return 0;
}
--
2.31.1
[PATCH] ARM: amlogic: add SYS_LOAD_ADDR to JetHub D1/H1 configs
Late fix for 49c8ef0e45a91ec894ef15e7d043dafe8f1c5efd commit by Tom Rini. Signed-off-by: Vyacheslav Bocharov --- configs/jethub_j100_defconfig | 1 + configs/jethub_j80_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig index 290ce4db850..25aee5a1471 100644 --- a/configs/jethub_j100_defconfig +++ b/configs/jethub_j100_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="jethub" CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x0100 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig index 7db05af3b0d..524d4cc9b7b 100644 --- a/configs/jethub_j80_defconfig +++ b/configs/jethub_j80_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_BOARD="jethub-j80" CONFIG_SYS_CONFIG_NAME="jethub" CONFIG_ARCH_MESON=y CONFIG_SYS_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x0100 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -- 2.30.2
Re: [ANN] U-Boot v2021.10 released
Dear Tom, In message <20211004151108.GR31748@bill-the-cat> you wrote: > > In terms of a changelog, > git log --merges v2021.10-rc4..v2021.10-rc5 > contains what I've pulled since the last RC or: > git log --merges v2021.07..v2021.10 > for changes since the last full release. As always, more details in > pull requests (or the tags referenced by them) will result in more > details here. ...and as usual, the release statistics can be fount at [1] [1] http://www.denx.de/wiki/U-Boot/UbootStat_2021_10 Here is the abbreviated version: (Changes since v2021.07) * Processed 1509 csets from 176 developers * 27 employers found * A total of 98664 lines added, 74614 removed (delta 24050) Developers with the most changesets Simon Glass191 (12.7%) Tom Rini92 (6.1%) Michal Simek91 (6.0%) Pali Rohár 80 (5.3%) Patrick Delaunay70 (4.6%) Tim Harvey 54 (3.6%) Heinrich Schuchardt 51 (3.4%) Marek Vasut 38 (2.5%) Aswath Govindraju 37 (2.5%) Alexandru Gagniuc 29 (1.9%) ... Developers with the most changed lines Tom Rini 48665 (30.6%) Simon Glass 14052 (8.8%) Peng Fan 8037 (5.1%) Marek Vasut 6463 (4.1%) Joseph Chen 5161 (3.2%) Tim Harvey4466 (2.8%) Elaine Zhang 4389 (2.8%) Zong Li 3994 (2.5%) Patrick Delaunay 3410 (2.1%) Aswath Govindraju 3202 (2.0%) ... Developers with the most lines removed Tom Rini 46519 (62.3%) Simon Glass 1414 (1.9%) Linus Walleij 667 (0.9%) Patrick Delaunay 331 (0.4%) Ilias Apalodimas 293 (0.4%) Sean Anderson 274 (0.4%) Ilko Iliev 124 (0.2%) Stephen Carlson 56 (0.1%) Suman Anna 40 (0.1%) Derald D. Woods 34 (0.0%) ... Developers with the most signoffs (total 325) Lokesh Vutla 108 (33.2%) Michal Simek37 (11.4%) Neil Armstrong 28 (8.6%) Tom Rini13 (4.0%) Peng Fan12 (3.7%) Kishon Vijay Abraham I 10 (3.1%) Andre Przywara 10 (3.1%) Alexandru Gagniuc8 (2.5%) Marek Vasut 7 (2.2%) Heinrich Schuchardt 6 (1.8%) ... Developers with the most reviews (total 832) Stefan Roese 124 (14.9%) Simon Glass120 (14.4%) Patrice Chotard 52 (6.2%) Jagan Teki 50 (6.0%) Marek Behún45 (5.4%) Jaehoon Chung 42 (5.0%) Ramon Fried 38 (4.6%) Kever Yang 36 (4.3%) Chris Packham 31 (3.7%) Bin Meng30 (3.6%) ... Developers with the most test credits (total 67) Chris Packham 26 (38.8%) Patrice Chotard 14 (20.9%) Simon Glass 10 (14.9%) Patrick Wildt3 (4.5%) Michal Simek 2 (3.0%) Jaehoon Chung1 (1.5%) Pali Rohár 1 (1.5%) Tom Rini 1 (1.5%) Andre Przywara 1 (1.5%) Suman Anna 1 (1.5%) ... Developers who gave the most tested-by credits (total 67) Pali Rohár 24 (35.8%) Marek Behún13 (19.4%) Bin Meng 7 (10.4%) Stephan Gerhold 4 (6.0%) Ye Li3 (4.5%) Joao Marcos Costa3 (4.5%) Ashok Reddy Soma 2 (3.0%) Ilias Apalodimas 2 (3.0%) Alexandru Gagniuc1 (1.5%) Jernej Skrabec 1 (1.5%) ... Developers with the most report credits (total 10) Tom Rini 3 (30.0%) Marek Behún 1 (10.0%) Keerthy 1 (10.0%) Walter Lozano1 (10.0%) Minkyu Kang 1 (10.0%) Jan Kiszka 1 (10.0%) Andreas Schwab 1 (10.0%) Fu Wei 1 (10.0%) Developers who gave the most report credits (total 10) Simon Glass 4 (40.0%) Tom Rini 3 (30.0%) Dave Gerlach 1 (10.0%) Dimitri John Ledkov 1 (10.0%) Tianrui Wei 1 (10.0%) Top changeset contributors by employer (Unknown) 598 (39.6%) Google, Inc. 191 (12.7%) Texas Instruments 141 (9.3%) Xilinx 126 (8.3%) Konsulko Group 93 (6.2%) NXP 86 (5.7%) ST Microelectronics 74 (4.9%) Linaro 44 (2.9%) ARM 24 (1.6%) DENX Software Engineering 22 (1.5%) ... Top lines changed by employer Konsulko Group48671 (30.6%) (Unknown) 38761 (24.4%) Google, Inc. 14052 (8.8%) Texas Instruments 13223 (8.3%) Rockchip 11240 (7.1%) NXP
[PATCH 2/2] arm: dts: Update IOT2050 device tree files
From: Jan Kiszka
This fixes the usage of the USB 3.0-capable port under U-Boot as USB
2.0-only port.
Original patch by Chao Zeng.
Signed-off-by: Jan Kiszka
---
.../k3-am65-iot2050-common-pg2-u-boot.dtsi| 27 +++
arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 4 ++-
2 files changed, 30 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi
diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi
b/arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi
new file mode 100644
index 00..64dddce648
--- /dev/null
+++ b/arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) Siemens AG, 2018-2021
+ *
+ * Authors:
+ * Chao Zeng
+ *
+ * U-Boot bits of the IOT2050 Advanced PG2 variants
+ * (downgrade of usb0 to USB 2.0 mode)
+ */
+
+ {
+ status = "disabled";
+};
+
+_0 {
+ assigned-clock-parents = <_clks 151 4>, /* set REF_CLK to 20MHz
i.e. PER0_PLL/48 */
+<_clks 151 9>; /* set PIPE3_TXB_CLK to
CLK_12M_RC/256 (for HS only) */
+ /delete-property/ phys;
+ /delete-property/ phy-names;
+};
+
+ {
+ maximum-speed = "high-speed";
+ /delete-property/ snps,dis-u1-entry-quirk;
+ /delete-property/ snps,dis-u2-entry-quirk;
+};
diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
index c25bce7339..e7e0ca4159 100644
--- a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi
@@ -44,8 +44,10 @@
phy-names = "usb3-phy";
};
-_phy {
+ {
maximum-speed = "super-speed";
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
};
+
+#include "k3-am65-iot2050-common-pg2-u-boot.dtsi"
--
2.31.1
[PATCH 0/2] Updates for IOT2050 board
This fixes the freshly merged IOT2050 board and also enables the usage of the USB 3.0 port under U-Boot (as USB 2.0). Jan Jan Kiszka (2): board: siemens: iot2050: Adjust to changes in DT and configuration arm: dts: Update IOT2050 device tree files .../k3-am65-iot2050-common-pg2-u-boot.dtsi| 27 +++ arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 4 ++- .../dts/k3-am65-iot2050-common-u-boot.dtsi| 2 +- configs/iot2050_defconfig | 6 +++-- include/configs/iot2050.h | 2 -- 5 files changed, 35 insertions(+), 6 deletions(-) create mode 100644 arch/arm/dts/k3-am65-iot2050-common-pg2-u-boot.dtsi -- 2.31.1
[PATCH 1/2] board: siemens: iot2050: Adjust to changes in DT and configuration
From: Jan Kiszka
Account for the changes done between merge proposal and the final merge.
Signed-off-by: Jan Kiszka
---
arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi | 2 +-
configs/iot2050_defconfig | 6 --
include/configs/iot2050.h | 2 --
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
index 88c36fcf43..286e25f379 100644
--- a/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
+++ b/arch/arm/dts/k3-am65-iot2050-common-u-boot.dtsi
@@ -35,7 +35,7 @@
_main {
u-boot,dm-spl;
- main-navss {
+ main_navss: bus@3080 {
u-boot,dm-spl;
};
};
diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig
index 72ee5c83f1..84e387a099 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_defconfig
@@ -1,4 +1,5 @@
CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_ARCH_K3=y
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
@@ -10,15 +11,16 @@ CONFIG_TARGET_IOT2050_A53=y
CONFIG_ENV_SIZE=0x2
CONFIG_ENV_OFFSET=0x68
CONFIG_ENV_SECT_SIZE=0x2
+CONFIG_SYS_MALLOC_LEN=0x200
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-am6528-iot2050-basic"
CONFIG_SPL_TEXT_BASE=0x8008
-CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_SERIAL=y
CONFIG_SPL_STACK_R_ADDR=0x8200
CONFIG_ENV_OFFSET_REDUND=0x6a
CONFIG_SPL_SPI_FLASH_SUPPORT=y
-CONFIG_SPL_SPI_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_DISTRO_DEFAULTS=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h
index ddb4cfcc8e..91ed76bb40 100644
--- a/include/configs/iot2050.h
+++ b/include/configs/iot2050.h
@@ -17,8 +17,6 @@
#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SPL_TEXT_BASE + \
CONFIG_SYS_K3_NON_SECURE_MSRAM_SIZE)
-#define CONFIG_SKIP_LOWLEVEL_INIT
-
#define CONFIG_SPL_MAX_SIZECONFIG_SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
#define CONFIG_SYS_BOOTM_LEN SZ_64M
--
2.31.1
Re: [PATCH v2] mtd: spi-nor-ids: Reinstate Micron MT25QL02G
On 05.10.21 10:58, Marek Vasut wrote:
This ID disappeared in 5b66fdb29dc ("mtd: spi: Remove unused files"),
add the ID back, since the chip is used on devices supported by U-Boot.
Fixes: 5b66fdb29dc ("mtd: spi: Remove unused files")
Signed-off-by: Marek Vasut
Cc: Horatiu Vultur
Cc: Jagan Teki
Cc: Simon Goldschmidt
Cc: Stefan Roese
Cc: Vignesh R
---
V2: Enable 4B opcodes which are supported by this chip
Reviewed-by: Stefan Roese
Thanks,
Stefan
---
drivers/mtd/spi/spi-nor-ids.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 4aef1ddd6e2..39af04cf795 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -195,6 +195,7 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25ql01g", 0x21ba20, 0, 64 * 1024, 2048, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+ { INFO("mt25ql02g", 0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE | SPI_NOR_4B_OPCODES) },
#ifdef CONFIG_SPI_FLASH_MT35XU
{ INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR |
SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) },
#endif /* CONFIG_SPI_FLASH_MT35XU */
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH v2] mtd: spi-nor-ids: Reinstate Micron MT25QL02G
This ID disappeared in 5b66fdb29dc ("mtd: spi: Remove unused files"),
add the ID back, since the chip is used on devices supported by U-Boot.
Fixes: 5b66fdb29dc ("mtd: spi: Remove unused files")
Signed-off-by: Marek Vasut
Cc: Horatiu Vultur
Cc: Jagan Teki
Cc: Simon Goldschmidt
Cc: Stefan Roese
Cc: Vignesh R
---
V2: Enable 4B opcodes which are supported by this chip
---
drivers/mtd/spi/spi-nor-ids.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 4aef1ddd6e2..39af04cf795 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -195,6 +195,7 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("n25q00a", 0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25ql01g", 0x21ba20, 0, 64 * 1024, 2048, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
{ INFO("mt25qu02g", 0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+ { INFO("mt25ql02g", 0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR |
SPI_NOR_QUAD_READ | NO_CHIP_ERASE | SPI_NOR_4B_OPCODES) },
#ifdef CONFIG_SPI_FLASH_MT35XU
{ INFO("mt35xu512aba", 0x2c5b1a, 0, 128 * 1024, 512, USE_FSR |
SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES | SPI_NOR_OCTAL_DTR_READ) },
#endif /* CONFIG_SPI_FLASH_MT35XU */
--
2.33.0
[PATCH v4 28/29] arm: dts: ls1028a: sync the fsl-ls1028a.dtsi with linux
Now that everything is prepared, copy the fsl-ls1028a.dtsi from the
linux kernel v5.14.
Notable changes:
- second watchdog added
- the number of chip selects of the SPI controller is now correct and
reflects what the hardware offers
- the LPUARTs have the correct clock parent
- USB controllers are enabled by default, which was already the case
before this sync because all board enabled all the USB controller
nodes. A linux patch to fix this is pending.
- the eSDHC controller changes from big-endian to little-endian, but
that property seems to be not used at all.
Signed-off-by: Michael Walle
Reviewed-by: Vladimir Oltean
---
arch/arm/dts/fsl-ls1028a.dtsi | 861 --
.../dt-bindings/clock/fsl,qoriq-clockgen.h| 15 +
2 files changed, 786 insertions(+), 90 deletions(-)
create mode 100644 include/dt-bindings/clock/fsl,qoriq-clockgen.h
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index af6dabe847..343ecf0e89 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -1,12 +1,16 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * NXP ls1028a SOC common device tree source
+ * Device Tree Include file for NXP Layerscape-1028A family SoC.
*
- * Copyright 2019-2020 NXP
+ * Copyright 2018-2020 NXP
+ *
+ * Harninder Rai
*
*/
+#include
#include
+#include
/ {
compatible = "fsl,ls1028a";
@@ -14,6 +18,54 @@
#address-cells = <2>;
#size-cells = <2>;
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x0>;
+ enable-method = "psci";
+ clocks = < QORIQ_CLK_CMUX 0>;
+ next-level-cache = <>;
+ cpu-idle-states = <_PW20>;
+ #cooling-cells = <2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x1>;
+ enable-method = "psci";
+ clocks = < QORIQ_CLK_CMUX 0>;
+ next-level-cache = <>;
+ cpu-idle-states = <_PW20>;
+ #cooling-cells = <2>;
+ };
+
+ l2: l2-cache {
+ compatible = "cache";
+ };
+ };
+
+ idle-states {
+ /*
+* PSCI node is not added default, U-boot will add missing
+* parts if it determines to use PSCI.
+*/
+ entry-method = "psci";
+
+ CPU_PW20: cpu-pw20 {
+ compatible = "arm,idle-state";
+ idle-state-name = "PW20";
+ arm,psci-suspend-param = <0x0>;
+ entry-latency-us = <2000>;
+ exit-latency-us = <2000>;
+ min-residency-us = <6000>;
+ };
+ };
+
sysclk: sysclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -21,14 +73,33 @@
clock-output-names = "sysclk";
};
- gic: interrupt-controller@600 {
- compatible = "arm,gic-v3";
- reg = <0x0 0x0600 0 0x1>, /* GIC Dist */
- <0x0 0x0604 0 0x4>;
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = ;
+ osc_27m: clock-osc-27m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2700>;
+ clock-output-names = "phy_27m";
+ };
+
+ dpclk: clock-controller@f1f {
+ compatible = "fsl,ls1028a-plldig";
+ reg = <0x0 0xf1f 0x0 0x>;
+ #clock-cells = <0>;
+ clocks = <_27m>;
+ };
+
+ firmware {
+ optee: optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ status = "disabled";
+ };
+ };
+
+ reboot {
+ compatible ="syscon-reboot";
+ regmap = <>;
+ offset = <0>;
+ mask = <0x02>;
};
timer {
@@ -43,13 +114,123 @@
IRQ_TYPE_LEVEL_LOW)>;
};
+ pmu {
+ compatible = "arm,cortex-a72-pmu";
+ interrupts = ;
+ };
+
+ gic: interrupt-controller@600 {
+ compatible= "arm,gic-v3";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
