[PATCH 2/2 v2] test: Add more test cases for rejecting an EFI image
The previous patch adds support for rejecting images when the sha384/512
of an x.509 certificate is present in dbx. Update the sandbox selftests
Signed-off-by: Ilias Apalodimas
---
changes since v1:
- new patch
test/py/tests/test_efi_secboot/conftest.py| 6 +++
test/py/tests/test_efi_secboot/test_signed.py | 50 +++
2 files changed, 56 insertions(+)
diff --git a/test/py/tests/test_efi_secboot/conftest.py
b/test/py/tests/test_efi_secboot/conftest.py
index 69a498ca003c..8a53dabe5414 100644
--- a/test/py/tests/test_efi_secboot/conftest.py
+++ b/test/py/tests/test_efi_secboot/conftest.py
@@ -80,6 +80,12 @@ def efi_boot_env(request, u_boot_config):
check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 256 db.crt
dbx_hash.crl; %ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key dbx
dbx_hash.crl dbx_hash.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
shell=True)
+check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 384 db.crt
dbx_hash384.crl; %ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key dbx
dbx_hash384.crl dbx_hash384.auth'
+ % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
+ shell=True)
+check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 512 db.crt
dbx_hash512.crl; %ssign-efi-sig-list -t "2020-04-05" -c KEK.crt -k KEK.key dbx
dbx_hash512.crl dbx_hash512.auth'
+ % (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
+ shell=True)
# dbx_hash1 (digest of TEST_db1 certificate)
check_call('cd %s; %scert-to-efi-hash-list -g %s -t 0 -s 256 db1.crt
dbx_hash1.crl; %ssign-efi-sig-list -t "2020-04-06" -c KEK.crt -k KEK.key dbx
dbx_hash1.crl dbx_hash1.auth'
% (mnt_point, EFITOOLS_PATH, GUID, EFITOOLS_PATH),
diff --git a/test/py/tests/test_efi_secboot/test_signed.py
b/test/py/tests/test_efi_secboot/test_signed.py
index cc9396a11d48..80d5eff74be3 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -235,6 +235,56 @@ class TestEfiSignedImage(object):
assert '\'HELLO\' failed' in ''.join(output)
assert 'efi_start_image() returned: 26' in ''.join(output)
+# sha384 of an x509 cert in dbx
+u_boot_console.restart_uboot()
+with u_boot_console.log.section('Test Case 5e'):
+# Test Case 5f, authenticated even if only one of signatures
+# is verified. Same as before but reject dbx_hash1.auth only
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'fatload host 0:1 400 db.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize db',
+'fatload host 0:1 400 KEK.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize KEK',
+'fatload host 0:1 400 PK.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize PK',
+'fatload host 0:1 400 db1.auth',
+'setenv -e -nv -bs -rt -at -a -i 400:$filesize db',
+'fatload host 0:1 400 dbx_hash384.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize dbx'])
+assert 'Failed to set EFI variable' not in ''.join(output)
+output = u_boot_console.run_command_list([
+'efidebug boot add -b 1 HELLO host 0:1
/helloworld.efi.signed_2sigs -s ""',
+'efidebug boot next 1',
+'efidebug test bootmgr'])
+assert '\'HELLO\' failed' in ''.join(output)
+assert 'efi_start_image() returned: 26' in ''.join(output)
+
+# sha512 of an x509 cert in dbx
+u_boot_console.restart_uboot()
+with u_boot_console.log.section('Test Case 5e'):
+# Test Case 5G, authenticated even if only one of signatures
+# is verified. Same as before but reject dbx_hash1.auth only
+output = u_boot_console.run_command_list([
+'host bind 0 %s' % disk_img,
+'fatload host 0:1 400 db.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize db',
+'fatload host 0:1 400 KEK.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize KEK',
+'fatload host 0:1 400 PK.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize PK',
+'fatload host 0:1 400 db1.auth',
+'setenv -e -nv -bs -rt -at -a -i 400:$filesize db',
+'fatload host 0:1 400 dbx_hash512.auth',
+'setenv -e -nv -bs -rt -at -i 400:$filesize dbx'])
+assert 'Failed to set EFI variable' not in ''.join(output)
+output = u_boot_console.run_command_list([
+'efidebug boot add -b 1 HELLO host 0:1
[PATCH 1/2 v2] efi_loader: add sha384/512 on certificate revocation
Currently we don't support sha384/512 for the X.509
certificate To-Be-Signed contents. Moreover if we come across such a
hash we skip the check and approve the image, although the image
might needs to be rejected.
It's worth noting here that efi_hash_regions() can now be reused from
efi_signature_lookup_digest() and add sha348/512 support there as well
Signed-off-by: Ilias Apalodimas
---
changes since v1:
- add an array of structs with the algo info info of a function
- checking hash_calculate result in efi_hash_regions()
include/efi_api.h | 6 +++
include/efi_loader.h | 7 +++
lib/efi_loader/efi_helper.c| 85 ++
lib/efi_loader/efi_signature.c | 76 +-
4 files changed, 151 insertions(+), 23 deletions(-)
diff --git a/include/efi_api.h b/include/efi_api.h
index 982c2001728d..b9a04958f9ba 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -1873,6 +1873,12 @@ struct efi_system_resource_table {
#define EFI_CERT_X509_SHA256_GUID \
EFI_GUID(0x3bd2a492, 0x96c0, 0x4079, 0xb4, 0x20, \
0xfc, 0xf9, 0x8e, 0xf1, 0x03, 0xed)
+#define EFI_CERT_X509_SHA384_GUID \
+ EFI_GUID(0x7076876e, 0x80c2, 0x4ee6,\
+0xaa, 0xd2, 0x28, 0xb3, 0x49, 0xa6, 0x86, 0x5b)
+#define EFI_CERT_X509_SHA512_GUID \
+ EFI_GUID(0x446dbf63, 0x2502, 0x4cda,\
+0xbc, 0xfa, 0x24, 0x65, 0xd2, 0xb0, 0xfe, 0x9d)
#define EFI_CERT_TYPE_PKCS7_GUID \
EFI_GUID(0x4aafd29d, 0x68df, 0x49ee, 0x8a, 0xa9, \
0x34, 0x7d, 0x37, 0x56, 0x65, 0xa7)
diff --git a/include/efi_loader.h b/include/efi_loader.h
index af36639ec6a7..ce221ee9317b 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -300,6 +300,8 @@ extern const efi_guid_t efi_guid_image_security_database;
extern const efi_guid_t efi_guid_sha256;
extern const efi_guid_t efi_guid_cert_x509;
extern const efi_guid_t efi_guid_cert_x509_sha256;
+extern const efi_guid_t efi_guid_cert_x509_sha384;
+extern const efi_guid_t efi_guid_cert_x509_sha512;
extern const efi_guid_t efi_guid_cert_type_pkcs7;
/* GUID of RNG protocol */
@@ -671,6 +673,11 @@ efi_status_t efi_file_size(struct efi_file_handle *fh,
efi_uintn_t *size);
/* get a device path from a Boot option */
struct efi_device_path *efi_get_dp_from_boot(const efi_guid_t guid);
+/* get len, string (used in u-boot crypto from a guid */
+const char *guid_to_sha_str(const efi_guid_t *guid);
+int guid_to_sha_len(const efi_guid_t *guid);
+int algo_to_len(const char *algo);
+
/**
* efi_size_in_pages() - convert size in bytes to size in pages
*
diff --git a/lib/efi_loader/efi_helper.c b/lib/efi_loader/efi_helper.c
index 802d39ed97b6..c186ba4a3c01 100644
--- a/lib/efi_loader/efi_helper.c
+++ b/lib/efi_loader/efi_helper.c
@@ -92,3 +92,88 @@ err:
free(var_value);
return NULL;
}
+
+const struct guid_to_hash_map {
+ efi_guid_t guid;
+ const char algo[32];
+ u32 bits;
+} guid_to_hash[] = {
+ {
+ EFI_CERT_X509_SHA256_GUID,
+ "sha256",
+ 256,
+ },
+ {
+ EFI_CERT_SHA256_GUID,
+ "sha256",
+ 256,
+ },
+ {
+ EFI_CERT_X509_SHA384_GUID,
+ "sha384",
+ 384,
+ },
+ {
+ EFI_CERT_X509_SHA512_GUID,
+ "sha512",
+ 512,
+ },
+};
+
+#define MAX_GUID_TO_HASH_COUNT ARRAY_SIZE(guid_to_hash)
+
+/** guid_to_sha_str - return the sha string e.g "sha256" for a given guid
+ *used on EFI security databases
+ *
+ * @guid: guid to check
+ *
+ * Return: len or 0 if no match is found
+ */
+const char *guid_to_sha_str(const efi_guid_t *guid)
+{
+ size_t i;
+
+ for (i = 0; i < MAX_GUID_TO_HASH_COUNT; i++) {
+ if (!guidcmp(guid, _to_hash[i].guid))
+ return guid_to_hash[i].algo;
+ }
+
+ return NULL;
+}
+
+/** guid_to_sha_len - return the sha size in bytes for a given guid
+ *used on EFI security databases
+ *
+ * @guid: guid to check
+ *
+ * Return: len or 0 if no match is found
+ */
+int guid_to_sha_len(const efi_guid_t *guid)
+{
+ size_t i;
+
+ for (i = 0; i < MAX_GUID_TO_HASH_COUNT; i++) {
+ if (!guidcmp(guid, _to_hash[i].guid))
+ return guid_to_hash[i].bits / 8;
+ }
+
+ return 0;
+}
+
+/** algo_to_len - return the sha size in bytes for a given string
+ *
+ * @guid: string to check
+ *
+ * Return: len or 0 if no match is found
+ */
+int algo_to_len(const char *algo)
+{
+ size_t i;
+
+ for (i = 0; i < MAX_GUID_TO_HASH_COUNT; i++) {
+ if (!strcmp(algo, guid_to_hash[i].algo))
+ return guid_to_hash[i].bits / 8;
+ }
+
+ return 0;
+}
diff --git a/lib/efi_loader/efi_signature.c b/lib/efi_loader/efi_signature.c
index
Re: [PATCH v1] rockchip: video: mipi: add more compatible strings for rk3288/rk3399
On 2022/4/16 16:25, Johan Jonker wrote:
The rk3288/RK3399 DT synced from Linux contains some different
compatible strings in the mipi node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi and rk3399.dtsi files.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Fix for rk3288.dtsi and rk3399.dtsi sync from Linux.
Not tested with hardware.
---
drivers/video/rockchip/rk3288_mipi.c | 1 +
drivers/video/rockchip/rk3399_mipi.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/video/rockchip/rk3288_mipi.c
b/drivers/video/rockchip/rk3288_mipi.c
index 7e48dd83..c0dffa3c 100644
--- a/drivers/video/rockchip/rk3288_mipi.c
+++ b/drivers/video/rockchip/rk3288_mipi.c
@@ -174,6 +174,7 @@ static const struct dm_display_ops rk_mipi_dsi_ops = {
};
static const struct udevice_id rk_mipi_dsi_ids[] = {
+ { .compatible = "rockchip,rk3288-mipi-dsi" },
{ .compatible = "rockchip,rk3288_mipi_dsi" },
{ }
};
diff --git a/drivers/video/rockchip/rk3399_mipi.c
b/drivers/video/rockchip/rk3399_mipi.c
index 91733504..7fc79ba9 100644
--- a/drivers/video/rockchip/rk3399_mipi.c
+++ b/drivers/video/rockchip/rk3399_mipi.c
@@ -165,6 +165,7 @@ static const struct dm_display_ops rk_mipi_dsi_ops = {
};
static const struct udevice_id rk_mipi_dsi_ids[] = {
+ { .compatible = "rockchip,rk3399-mipi-dsi" },
{ .compatible = "rockchip,rk3399_mipi_dsi" },
{ }
};
Re: [PATCH v1] rockchip: video: rk_edp: add more rk3288 edp node options
On 2022/4/16 15:45, Johan Jonker wrote:
The rk3288 DT synced from Linux contains some different
properties in the edp node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi files.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Fix for rk3288.dtsi sync from Linux.
Not tested with hardware.
---
drivers/video/rockchip/rk_edp.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/video/rockchip/rk_edp.c b/drivers/video/rockchip/rk_edp.c
index 0ddf5e02..3697d582 100644
--- a/drivers/video/rockchip/rk_edp.c
+++ b/drivers/video/rockchip/rk_edp.c
@@ -1070,8 +1070,11 @@ static int rk_edp_probe(struct udevice *dev)
ret = reset_get_by_name(dev, "dp", _rst);
if (ret) {
- dev_err(dev, "failed to get dp reset (ret=%d)\n", ret);
- return ret;
+ ret = reset_get_by_name(dev, "edp", _rst);
+ if (ret) {
+ dev_err(dev, "failed to get dp reset (ret=%d)\n", ret);
+ return ret;
+ }
}
ret = reset_assert(_rst);
@@ -1156,6 +1159,7 @@ static const struct rockchip_dp_data rk3288_dp = {
};
static const struct udevice_id rockchip_dp_ids[] = {
+ { .compatible = "rockchip,rk3288-dp", .data = (ulong)_dp },
{ .compatible = "rockchip,rk3288-edp", .data = (ulong)_dp },
{ .compatible = "rockchip,rk3399-edp", .data = (ulong)_edp },
{ }
Re: [PATCH v4 14/14] board: rk3288: add more DT files to MAINTAINERS
On 2022/4/16 05:21, Johan Jonker wrote: A number of rk3229/rk3288 DT files are synced from Linux. Add a maintainer to look after them and to help with review and testing. Signed-off-by: Johan Jonker Reviewed-by: Kever Yang Thanks, - Kever --- board/chipspark/popmetal_rk3288/MAINTAINERS | 2 ++ board/mqmaker/miqi_rk3288/MAINTAINERS | 2 ++ board/phytec/phycore_rk3288/MAINTAINERS | 3 +++ board/radxa/rock2/MAINTAINERS | 3 +++ board/rockchip/evb_rk3229/MAINTAINERS | 2 ++ board/rockchip/evb_rk3288/MAINTAINERS | 3 +++ board/rockchip/tinker_rk3288/MAINTAINERS| 5 + 7 files changed, 20 insertions(+) diff --git a/board/chipspark/popmetal_rk3288/MAINTAINERS b/board/chipspark/popmetal_rk3288/MAINTAINERS index 1a6a1bb2..e12f128d 100644 --- a/board/chipspark/popmetal_rk3288/MAINTAINERS +++ b/board/chipspark/popmetal_rk3288/MAINTAINERS @@ -1,6 +1,8 @@ POPMETAL-RK3288 M:Lin Huang S:Maintained +F: arch/arm/dts/rk3288-popmetal.dts +F: arch/arm/dts/rk3288-popmetal-u-boot.dtsi F:board/chipspark/popmetal_rk3288 F:include/configs/popmetal_rk3288.h F:configs/popmetal-rk3288_defconfig diff --git a/board/mqmaker/miqi_rk3288/MAINTAINERS b/board/mqmaker/miqi_rk3288/MAINTAINERS index 053a5e60..1cb5f790 100644 --- a/board/mqmaker/miqi_rk3288/MAINTAINERS +++ b/board/mqmaker/miqi_rk3288/MAINTAINERS @@ -1,6 +1,8 @@ MIQI M:Jernej Skrabec S:Maintained +F: arch/arm/dts/rk3288-miqi.dts +F: arch/arm/dts/rk3288-miqi-u-boot.dtsi F:board/mqmaker/miqi_rk3288 F:include/configs/miqi_rk3288.h F:configs/miqi-rk3288_defconfig diff --git a/board/phytec/phycore_rk3288/MAINTAINERS b/board/phytec/phycore_rk3288/MAINTAINERS index 9c0de3cc..60471d47 100644 --- a/board/phytec/phycore_rk3288/MAINTAINERS +++ b/board/phytec/phycore_rk3288/MAINTAINERS @@ -1,6 +1,9 @@ phyCORE-RK3288 M:Wadim Egorov S:Maintained +F: arch/arm/dts/rk3288-phycore-rdk.dts +F: arch/arm/dts/rk3288-phycore-rdk-u-boot.dtsi +F: arch/arm/dts/rk3288-phycore-som.dtsi F:board/phytec/phycore_rk3288 F:include/configs/phycore_rk3288.h F:configs/phycore-rk3288_defconfig diff --git a/board/radxa/rock2/MAINTAINERS b/board/radxa/rock2/MAINTAINERS index a697e682..5328fd76 100644 --- a/board/radxa/rock2/MAINTAINERS +++ b/board/radxa/rock2/MAINTAINERS @@ -1,6 +1,9 @@ FIREFLY M:Simon Glass S:Maintained +F: arch/arm/dts/rk3288-rock2-som.dtsi +F: arch/arm/dts/rk3288-rock2-square.dts +F: arch/arm/dts/rk3288-rock2-square-u-boot.dtsi F:board/radxa/rock2 F:include/configs/rock2.h F:configs/rock2_defconfig diff --git a/board/rockchip/evb_rk3229/MAINTAINERS b/board/rockchip/evb_rk3229/MAINTAINERS index dfa1090c..4de97dbb 100644 --- a/board/rockchip/evb_rk3229/MAINTAINERS +++ b/board/rockchip/evb_rk3229/MAINTAINERS @@ -1,6 +1,8 @@ EVB-RK3229 M: Kever Yang S: Maintained +F: arch/arm/dts/rk3229-evb.dts +F: arch/arm/dts/rk3229-evb-u-boot.dtsi F: board/rockchip/evb_rk3229 F: include/configs/evb_rk3229.h F: configs/evb-rk3229_defconfig diff --git a/board/rockchip/evb_rk3288/MAINTAINERS b/board/rockchip/evb_rk3288/MAINTAINERS index 9bd6b1e8..9857ae33 100644 --- a/board/rockchip/evb_rk3288/MAINTAINERS +++ b/board/rockchip/evb_rk3288/MAINTAINERS @@ -1,6 +1,9 @@ EVB-RK3288 M:Lin Huang S:Maintained +F: arch/arm/dts/rk3288-evb.dts +F: arch/arm/dts/rk3288-evb.dtsi +F: arch/arm/dts/rk3288-evb-u-boot.dtsi F:board/rockchip/evb_rk3288 F:include/configs/evb_rk3288.h F:configs/evb-rk3288_defconfig diff --git a/board/rockchip/tinker_rk3288/MAINTAINERS b/board/rockchip/tinker_rk3288/MAINTAINERS index ed5de682..3869d5dc 100644 --- a/board/rockchip/tinker_rk3288/MAINTAINERS +++ b/board/rockchip/tinker_rk3288/MAINTAINERS @@ -1,6 +1,11 @@ TINKER-RK3288 M:Lin Huang S:Maintained +F: arch/arm/dts/rk3288-tinker.dts +F: arch/arm/dts/rk3288-tinker.dtsi +F: arch/arm/dts/rk3288-tinker-s.dts +F: arch/arm/dts/rk3288-tinker-s-u-boot.dtsi +F: arch/arm/dts/rk3288-tinker-u-boot.dtsi F:board/rockchip/tinker_rk3288 F:include/configs/tinker_rk3288.h F:configs/tinker-rk3288_defconfig
Re: [PATCH v4 13/14] board: google: veyron: add more DT files to MAINTAINERS
On 2022/4/16 05:21, Johan Jonker wrote: The Google Veyron rk3288 DT files are synced from Linux. Add a maintainer to look after them and to help with review and testing. Signed-off-by: Johan Jonker Reviewed-by: Kever Yang Thanks, - Kever --- board/google/veyron/MAINTAINERS | 17 + 1 file changed, 17 insertions(+) diff --git a/board/google/veyron/MAINTAINERS b/board/google/veyron/MAINTAINERS index d9797807..67341b5d 100644 --- a/board/google/veyron/MAINTAINERS +++ b/board/google/veyron/MAINTAINERS @@ -1,6 +1,8 @@ CHROMEBOOK JERRY BOARD M:Simon Glass S:Maintained +F: arch/arm/dts/rk3288-veyron-jerry.dts +F: arch/arm/dts/rk3288-veyron-jerry-u-boot.dtsi F:board/google/veyron/ F:include/configs/veyron.h F:configs/chromebook_jerry_defconfig @@ -8,6 +10,8 @@ F: configs/chromebook_jerry_defconfig CHROMEBIT MICKEY BOARD M:Simon Glass S:Maintained +F: arch/arm/dts/rk3288-veyron-mickey.dts +F: arch/arm/dts/rk3288-veyron-mickey-u-boot.dtsi F:board/google/veyron/ F:include/configs/veyron.h F:configs/chromebit_mickey_defconfig @@ -15,6 +19,8 @@ F:configs/chromebit_mickey_defconfig CHROMEBOOK MINNIE BOARD M:Simon Glass S:Maintained +F: arch/arm/dts/rk3288-veyron-minnie.dts +F: arch/arm/dts/rk3288-veyron-minnie-u-boot.dtsi F:board/google/veyron/ F:include/configs/veyron.h F:configs/chromebook_minnie_defconfig @@ -22,6 +28,17 @@ F: configs/chromebook_minnie_defconfig CHROMEBOOK SPEEDY BOARD M:Simon Glass S:Maintained +F: arch/arm/dts/rk3288-veyron-speedy.dts +F: arch/arm/dts/rk3288-veyron-speedy-u-boot.dtsi F:board/google/veyron/ F:include/configs/veyron.h F:configs/chromebook_speedy_defconfig + +CHROMEBOOK VEYRON COMMON FILES +M: Simon Glass +S: Maintained +F: arch/arm/dts/rk3288-veyron.dtsi +F: arch/arm/dts/rk3288-veyron-analog-audio.dtsi +F: arch/arm/dts/rk3288-veyron-broadcom-bluetooth.dtsi +F: arch/arm/dts/rk3288-veyron-chromebook.dtsi +F: arch/arm/dts/rk3288-veyron-edp.dtsi
Re: [PATCH v4 09/14] arm: dts: rockchip: sync rk3288.dtsi from Linux
On 2022/4/16 05:21, Johan Jonker wrote:
Sync rk3288.dtsi from Linux version 5.17.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changed V4:
move some current edp node properties to rk3288-u-boot.dtsi
rk_epd.c is not compatible with Linux DT
move some current mipi_dsi node properties to rk3288-u-boot.dtsi
compatible string is not identical with Linux DT
Changed V3:
change reg size
Changed V2:
rename mipi_dsi0 label
move io_domains
remove hdmi_audio veyron node
change memory@0 reg size
---
arch/arm/dts/rk3288-evb.dtsi |2 +-
arch/arm/dts/rk3288-miqi.dtsi| 28 +-
arch/arm/dts/rk3288-phycore-som.dtsi | 30 +-
arch/arm/dts/rk3288-popmetal.dtsi| 30 +-
arch/arm/dts/rk3288-thermal.dtsi | 87 --
arch/arm/dts/rk3288-u-boot.dtsi | 13 +
arch/arm/dts/rk3288-veyron-jerry.dts |6 -
arch/arm/dts/rk3288-veyron.dtsi | 33 +-
arch/arm/dts/rk3288.dtsi | 1367 +-
9 files changed, 983 insertions(+), 613 deletions(-)
delete mode 100644 arch/arm/dts/rk3288-thermal.dtsi
diff --git a/arch/arm/dts/rk3288-evb.dtsi b/arch/arm/dts/rk3288-evb.dtsi
index 04902c0b..72da8847 100644
--- a/arch/arm/dts/rk3288-evb.dtsi
+++ b/arch/arm/dts/rk3288-evb.dtsi
@@ -448,7 +448,7 @@
status = "okay";
};
-_dsi0 {
+_dsi {
status = "disabled";
rockchip,panel = <>;
display-timings {
diff --git a/arch/arm/dts/rk3288-miqi.dtsi b/arch/arm/dts/rk3288-miqi.dtsi
index cb80cbf2..b1c286c9 100644
--- a/arch/arm/dts/rk3288-miqi.dtsi
+++ b/arch/arm/dts/rk3288-miqi.dtsi
@@ -18,21 +18,6 @@
clock-output-names = "ext_gmac";
};
- io_domains: io-domains {
- compatible = "rockchip,rk3288-io-voltage-domain";
- rockchip,grf = <>;
-
- audio-supply = <_33>;
- flash0-supply = <_flash>;
- flash1-supply = <_lan>;
- gpio30-supply = <_io>;
- gpio1830-supply = <_io>;
- lcdc-supply = <_io>;
- sdcard-supply = <_sd>;
- wifi-supply = <_18>;
- };
-
-
leds {
compatible = "gpio-leds";
@@ -277,6 +262,19 @@
status = "okay";
};
+_domains {
+ status = "okay";
+
+ audio-supply = <_33>;
+ flash0-supply = <_flash>;
+ flash1-supply = <_lan>;
+ gpio30-supply = <_io>;
+ gpio1830-supply = <_io>;
+ lcdc-supply = <_io>;
+ sdcard-supply = <_sd>;
+ wifi-supply = <_18>;
+};
+
{
pcfg_output_high: pcfg-output-high {
output-high;
diff --git a/arch/arm/dts/rk3288-phycore-som.dtsi
b/arch/arm/dts/rk3288-phycore-som.dtsi
index 821525f7..8ac695c8 100644
--- a/arch/arm/dts/rk3288-phycore-som.dtsi
+++ b/arch/arm/dts/rk3288-phycore-som.dtsi
@@ -71,22 +71,6 @@
clock-output-names = "ext_gmac";
};
- io_domains: io_domains {
- compatible = "rockchip,rk3288-io-voltage-domain";
-
- status = "okay";
- sdcard-supply = <_io_sd>;
- flash0-supply = <_emmc_io>;
- flash1-supply = <_misc_1v8>;
- gpio1830-supply = <_3v3_io>;
- gpio30-supply = <_3v3_io>;
- bb-supply = <_3v3_io>;
- dvp-supply = <_3v3_io>;
- lcdc-supply = <_3v3_io>;
- wifi-supply = <_3v3_io>;
- audio-supply = <_3v3_io>;
- };
-
leds: user-leds {
compatible = "gpio-leds";
pinctrl-names = "default";
@@ -197,6 +181,20 @@
ddc-i2c-bus = <>;
};
+_domains {
+ status = "okay";
+ sdcard-supply = <_io_sd>;
+ flash0-supply = <_emmc_io>;
+ flash1-supply = <_misc_1v8>;
+ gpio1830-supply = <_3v3_io>;
+ gpio30-supply = <_3v3_io>;
+ bb-supply = <_3v3_io>;
+ dvp-supply = <_3v3_io>;
+ lcdc-supply = <_3v3_io>;
+ wifi-supply = <_3v3_io>;
+ audio-supply = <_3v3_io>;
+};
+
{
status = "okay";
clock-frequency = <40>;
diff --git a/arch/arm/dts/rk3288-popmetal.dtsi
b/arch/arm/dts/rk3288-popmetal.dtsi
index 63785eb5..bcd8fded 100644
--- a/arch/arm/dts/rk3288-popmetal.dtsi
+++ b/arch/arm/dts/rk3288-popmetal.dtsi
@@ -69,22 +69,6 @@
};
};
- io_domains: io-domains {
- compatible = "rockchip,rk3288-io-voltage-domain";
- rockchip,grf = <>;
-
- audio-supply = <_33>;
- bb-supply = <_io>;
- dvp-supply = <_dvp>;
- flash0-supply = <_flash>;
- flash1-supply = <_lan>;
- gpio30-supply = <_io>;
- gpio1830-supply = <_io>;
- lcdc-supply = <_io>;
- sdcard-supply = <_sd>;
- wifi-supply = <_wl>;
- };
-
ir: ir-receiver {
compatible = "gpio-ir-receiver";
Re: [PATCH v4 05/14] arm: dts: rockchip: sync rk3229-evb.dts from Linux
On 2022/4/16 05:21, Johan Jonker wrote:
Sync rk3229-evb.dts from Linux version 5.17.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changed V4:
alias has moved to board file
remove alias from rk322x.dtsi
---
arch/arm/dts/rk3229-evb.dts | 212 +---
arch/arm/dts/rk3229.dtsi| 52 +
arch/arm/dts/rk322x.dtsi| 2 -
3 files changed, 249 insertions(+), 17 deletions(-)
create mode 100644 arch/arm/dts/rk3229.dtsi
diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index d2681d1a..797476e8 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -1,21 +1,32 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
-#include "rk322x.dtsi"
+#include
+#include "rk3229.dtsi"
/ {
model = "Rockchip RK3229 Evaluation board";
compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
+ aliases {
+ mmc0 =
+ };
+
memory@6000 {
device_type = "memory";
reg = <0x6000 0x4000>;
};
+ dc_12v: dc-12v-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "dc_12v";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ };
+
ext_gmac: ext_gmac {
compatible = "fixed-clock";
clock-frequency = <12500>;
@@ -23,6 +34,18 @@
#clock-cells = <0>;
};
+ vcc_host: vcc-host-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpio = < RK_PC4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_vbus_drv>;
+ regulator-name = "vcc_host";
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <_sys>;
+ };
+
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
enable-active-high;
@@ -31,7 +54,95 @@
regulator-max-microvolt = <180>;
regulator-always-on;
regulator-boot-on;
+ vin-supply = <_1v8>;
+ };
+
+ vcc_sys: vcc-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <_12v>;
+ };
+
+ vccio_1v8: vccio-1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_1v8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-always-on;
+ vin-supply = <_sys>;
+ };
+
+ vccio_3v3: vccio-3v3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vccio_3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-always-on;
+ vin-supply = <_sys>;
+ };
+
+ vdd_arm: vdd-arm-regulator {
+ compatible = "pwm-regulator";
+ pwms = < 0 25000 1>;
+ pwm-supply = <_sys>;
+ regulator-name = "vdd_arm";
+ regulator-min-microvolt = <95>;
+ regulator-max-microvolt = <140>;
+ regulator-always-on;
+ regulator-boot-on;
};
+
+ vdd_log: vdd-log-regulator {
+ compatible = "pwm-regulator";
+ pwms = < 0 25000 1>;
+ pwm-supply = <_sys>;
+ regulator-name = "vdd_log";
+ regulator-min-microvolt = <100>;
+ regulator-max-microvolt = <130>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ autorepeat;
+ pinctrl-names = "default";
+ pinctrl-0 = <_key>;
+
+ power_key: power-key {
+ label = "GPIO Key Power";
+ gpios = < 23 GPIO_ACTIVE_LOW>;
+ linux,code = ;
+ debounce-interval = <100>;
+ wakeup-source;
+ };
+ };
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cpu-supply = <_arm>;
+};
+
+ {
+ cap-mmc-highspeed;
+ non-removable;
+ status = "okay";
};
{
Re: [PATCH v4 04/14] arm: dts: rockchip: sync rk322x.dtsi from Linux
On 2022/4/16 05:21, Johan Jonker wrote:
Sync rk322x.dtsi from Linux version 5.17.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changed V4:
keep mmc alias
Changed V2:
update
rename usb20_otg label
---
arch/arm/dts/rk3229-evb.dts | 2 +-
arch/arm/dts/rk322x.dtsi| 844 +---
2 files changed, 695 insertions(+), 151 deletions(-)
diff --git a/arch/arm/dts/rk3229-evb.dts b/arch/arm/dts/rk3229-evb.dts
index 66a3ba23..d2681d1a 100644
--- a/arch/arm/dts/rk3229-evb.dts
+++ b/arch/arm/dts/rk3229-evb.dts
@@ -69,6 +69,6 @@
status = "okay";
};
-_otg {
+_otg {
status = "okay";
};
diff --git a/arch/arm/dts/rk322x.dtsi b/arch/arm/dts/rk322x.dtsi
index 3245da3c..c5330c19 100644
--- a/arch/arm/dts/rk322x.dtsi
+++ b/arch/arm/dts/rk322x.dtsi
@@ -1,7 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
#include
#include
@@ -9,6 +6,7 @@
#include
#include
#include
+#include
/ {
#address-cells = <1>;
@@ -22,6 +20,7 @@
serial2 =
mmc0 =
mmc1 =
+ spi0 =
};
cpus {
@@ -33,13 +32,11 @@
compatible = "arm,cortex-a7";
reg = <0xf00>;
resets = < SRST_CORE0>;
- operating-points = <
- /* KHzuV */
-816000 100
- >;
+ operating-points-v2 = <_opp_table>;
#cooling-cells = <2>; /* min followed by max */
clock-latency = <4>;
clocks = < ARMCLK>;
+ enable-method = "psci";
};
cpu1: cpu@f01 {
@@ -47,6 +44,9 @@
compatible = "arm,cortex-a7";
reg = <0xf01>;
resets = < SRST_CORE1>;
+ operating-points-v2 = <_opp_table>;
+ #cooling-cells = <2>; /* min followed by max */
+ enable-method = "psci";
};
cpu2: cpu@f02 {
@@ -54,6 +54,9 @@
compatible = "arm,cortex-a7";
reg = <0xf02>;
resets = < SRST_CORE2>;
+ operating-points-v2 = <_opp_table>;
+ #cooling-cells = <2>; /* min followed by max */
+ enable-method = "psci";
};
cpu3: cpu@f03 {
@@ -61,23 +64,37 @@
compatible = "arm,cortex-a7";
reg = <0xf03>;
resets = < SRST_CORE3>;
+ operating-points-v2 = <_opp_table>;
+ #cooling-cells = <2>; /* min followed by max */
+ enable-method = "psci";
};
};
- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
+ cpu0_opp_table: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
- pdma: pdma@110f {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x110f 0x4000>;
- interrupts = ,
-;
- #dma-cells = <1>;
- clocks = < ACLK_DMAC>;
- clock-names = "apb_pclk";
+ opp-40800 {
+ opp-hz = /bits/ 64 <40800>;
+ opp-microvolt = <95>;
+ clock-latency-ns = <4>;
+ opp-suspend;
+ };
+ opp-6 {
+ opp-hz = /bits/ 64 <6>;
+ opp-microvolt = <975000>;
+ };
+ opp-81600 {
+ opp-hz = /bits/ 64 <81600>;
+ opp-microvolt = <100>;
+ };
+ opp-100800 {
+ opp-hz = /bits/ 64 <100800>;
+ opp-microvolt = <1175000>;
+ };
+ opp-12 {
+ opp-hz = /bits/ 64 <12>;
+ opp-microvolt = <1275000>;
};
};
@@ -90,6 +107,11 @@
interrupt-affinity = <>, <>, <>, <>;
};
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
timer {
compatible = "arm,armv7-timer";
arm,cpu-registers-not-fw-configured;
@@ -107,12 +129,15 @@
#clock-cells = <0>;
};
+
Re: [PATCH] arm: imx8m: Enable CLK_IMX8M[MNQP] where applicable
Hi Adam, On Sun, Apr 17, 2022 at 7:16 PM Adam Ford wrote: > > Most, if not all of the imx8m[mnp] boards enable the SoC clock > driver. The CLK_IMX8MQ isn't necessarily required yet, but as > the new power domain driver will assume it is present. To simply > this, enable the respective clock drivers when a given imx8m SoC > is selected. This will also shink the board defconfig files a bit. s/shink/shrink > Suggested-by: Marek Vasut > Signed-off-by: Adam Ford Reviewed-by: Fabio Estevam
Re: [PATCH v2 14/23] imx: power-domain: Inline arch-imx8m/power-domain.h
On 4/12/22 04:45, Marek Vasut wrote:
> The arch/arm/include/asm/arch-imx8m/power-domain.h is not included
> anywhere except in drivers/power/domain/imx8m-power-domain.c, just
> inline the content and drop the header. No functional change.
>
> Tested-By: Tim Harvey #imx8mp-venice-defconfig
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> V2: Add TB by Tim
> ---
> arch/arm/include/asm/arch-imx8m/power-domain.h | 15 ---
> drivers/power/domain/imx8m-power-domain.c | 7 ++-
> 2 files changed, 6 insertions(+), 16 deletions(-)
> delete mode 100644 arch/arm/include/asm/arch-imx8m/power-domain.h
>
> diff --git a/arch/arm/include/asm/arch-imx8m/power-domain.h
> b/arch/arm/include/asm/arch-imx8m/power-domain.h
> deleted file mode 100644
> index 7a833e564b5..000
> --- a/arch/arm/include/asm/arch-imx8m/power-domain.h
> +++ /dev/null
> @@ -1,15 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0 */
> -/*
> - * Copyright 2017 NXP
> - */
> -
> -#ifndef _ASM_ARCH_IMX8M_POWER_DOMAIN_H
> -#define _ASM_ARCH_IMX8M_POWER_DOMAIN_H
> -
> -struct imx8m_power_domain_plat {
> - int resource_id;
> - int has_pd;
> - struct power_domain pd;
> -};
> -
> -#endif
> diff --git a/drivers/power/domain/imx8m-power-domain.c
> b/drivers/power/domain/imx8m-power-domain.c
> index ac7411f8327..c32dbcc31ae 100644
> --- a/drivers/power/domain/imx8m-power-domain.c
> +++ b/drivers/power/domain/imx8m-power-domain.c
> @@ -9,7 +9,6 @@
> #include
> #include
> #include
> -#include
> #include
> #include
> #include
> @@ -18,6 +17,12 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +struct imx8m_power_domain_plat {
> + int resource_id;
> + int has_pd;
> + struct power_domain pd;
> +};
> +
> static int imx8m_power_domain_on(struct power_domain *power_domain)
> {
> struct udevice *dev = power_domain->dev;
Re: [PATCH v2 12/23] power-domain: Return 0 if ops unimplemented and remove empty functions
On 4/12/22 04:45, Marek Vasut wrote:
> In case the ops is not implemented, return 0 in the core right away.
> This is better than having multiple copies of functions which just
> return 0 in each power domain driver. Drop all those empty functions.
>
> Signed-off-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Simon Glass
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/power/domain/apple-pmgr.c | 30 ---
> drivers/power/domain/bcm6328-power-domain.c | 6
> .../power/domain/imx8-power-domain-legacy.c | 16 --
> drivers/power/domain/imx8-power-domain.c | 24 ---
> drivers/power/domain/imx8m-power-domain.c | 18 ---
> drivers/power/domain/meson-ee-pwrc.c | 12
> drivers/power/domain/meson-gx-pwrc-vpu.c | 12
> drivers/power/domain/mtk-power-domain.c | 6
> drivers/power/domain/power-domain-uclass.c| 8 ++---
> drivers/power/domain/tegra186-power-domain.c | 26
> drivers/power/domain/ti-power-domain.c| 13
> drivers/power/domain/ti-sci-power-domain.c| 14 -
> 12 files changed, 4 insertions(+), 181 deletions(-)
>
> diff --git a/drivers/power/domain/apple-pmgr.c
> b/drivers/power/domain/apple-pmgr.c
> index 4d06e76ff5e..402c5b1fd18 100644
> --- a/drivers/power/domain/apple-pmgr.c
> +++ b/drivers/power/domain/apple-pmgr.c
> @@ -42,16 +42,6 @@ static int apple_reset_of_xlate(struct reset_ctl
> *reset_ctl,
> return 0;
> }
>
> -static int apple_reset_request(struct reset_ctl *reset_ctl)
> -{
> - return 0;
> -}
> -
> -static int apple_reset_free(struct reset_ctl *reset_ctl)
> -{
> - return 0;
> -}
> -
> static int apple_reset_assert(struct reset_ctl *reset_ctl)
> {
> struct apple_pmgr_priv *priv = dev_get_priv(reset_ctl->dev->parent);
> @@ -80,8 +70,6 @@ static int apple_reset_deassert(struct reset_ctl *reset_ctl)
>
> struct reset_ops apple_reset_ops = {
> .of_xlate = apple_reset_of_xlate,
> - .request = apple_reset_request,
> - .rfree = apple_reset_free,
> .rst_assert = apple_reset_assert,
> .rst_deassert = apple_reset_deassert,
> };
> @@ -92,16 +80,6 @@ static struct driver apple_reset_driver = {
> .ops = _reset_ops,
> };
>
> -static int apple_pmgr_request(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> -static int apple_pmgr_rfree(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
> {
> struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
> @@ -121,11 +99,6 @@ static int apple_pmgr_on(struct power_domain
> *power_domain)
> return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
> }
>
> -static int apple_pmgr_off(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> static int apple_pmgr_of_xlate(struct power_domain *power_domain,
> struct ofnode_phandle_args *args)
> {
> @@ -167,10 +140,7 @@ static int apple_pmgr_probe(struct udevice *dev)
> }
>
> struct power_domain_ops apple_pmgr_ops = {
> - .request = apple_pmgr_request,
> - .rfree = apple_pmgr_rfree,
> .on = apple_pmgr_on,
> - .off = apple_pmgr_off,
> .of_xlate = apple_pmgr_of_xlate,
> };
>
> diff --git a/drivers/power/domain/bcm6328-power-domain.c
> b/drivers/power/domain/bcm6328-power-domain.c
> index 6e720e0798c..80144dd9772 100644
> --- a/drivers/power/domain/bcm6328-power-domain.c
> +++ b/drivers/power/domain/bcm6328-power-domain.c
> @@ -24,11 +24,6 @@ static int bcm6328_power_domain_request(struct
> power_domain *power_domain)
> return 0;
> }
>
> -static int bcm6328_power_domain_free(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> static int bcm6328_power_domain_on(struct power_domain *power_domain)
> {
> struct bcm6328_power_domain *priv = dev_get_priv(power_domain->dev);
> @@ -64,7 +59,6 @@ static const struct udevice_id bcm6328_power_domain_ids[] =
> {
> };
>
> struct power_domain_ops bcm6328_power_domain_ops = {
> - .rfree = bcm6328_power_domain_free,
> .off = bcm6328_power_domain_off,
> .on = bcm6328_power_domain_on,
> .request = bcm6328_power_domain_request,
> diff --git a/drivers/power/domain/imx8-power-domain-legacy.c
> b/drivers/power/domain/imx8-power-domain-legacy.c
> index e2fae2dbc86..bf45891bccd 100644
> --- a/drivers/power/domain/imx8-power-domain-legacy.c
> +++ b/drivers/power/domain/imx8-power-domain-legacy.c
> @@ -84,20 +84,6 @@ int imx8_power_domain_lookup_name(const char *name,
> return 0;
> }
>
> -static int imx8_power_domain_request(struct power_domain *power_domain)
> -{
> - debug("%s(power_domain=%p)\n", __func__, power_domain);
> -
> - return 0;
> -}
> -
> -static int imx8_power_domain_free(struct power_domain *power_domain)
> -{
> -
Re: [PATCH v2 07/23] pmic: pca9450: Add regulator driver
On 4/12/22 04:45, Marek Vasut wrote:
> Add PCA9450 regulator driver. This is complementary driver for the BUCKn
> and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
> driver permits reading the settngs and configuring the BUCKn and LDOn
> regulators.
>
> Reviewed-by: Fabio Estevam
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> V2: Add RB by Fabio
> ---
> drivers/power/pmic/pca9450.c | 6 +-
> drivers/power/regulator/Kconfig | 15 ++
> drivers/power/regulator/Makefile | 1 +
> drivers/power/regulator/pca9450.c | 333 ++
> include/power/pca9450.h | 11 +
> 5 files changed, 363 insertions(+), 3 deletions(-)
> create mode 100644 drivers/power/regulator/pca9450.c
>
> diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c
> index 26c876c9c45..116ac49a8db 100644
> --- a/drivers/power/pmic/pca9450.c
> +++ b/drivers/power/pmic/pca9450.c
> @@ -83,9 +83,9 @@ static struct dm_pmic_ops pca9450_ops = {
> };
>
> static const struct udevice_id pca9450_ids[] = {
> - { .compatible = "nxp,pca9450a", .data = 0x25, },
> - { .compatible = "nxp,pca9450b", .data = 0x25, },
> - { .compatible = "nxp,pca9450c", .data = 0x25, },
> + { .compatible = "nxp,pca9450a", .data = NXP_CHIP_TYPE_PCA9450A, },
> + { .compatible = "nxp,pca9450b", .data = NXP_CHIP_TYPE_PCA9450BC, },
> + { .compatible = "nxp,pca9450c", .data = NXP_CHIP_TYPE_PCA9450BC, },
> { }
> };
>
> diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
> index cd253b95f2f..d486bad6bdc 100644
> --- a/drivers/power/regulator/Kconfig
> +++ b/drivers/power/regulator/Kconfig
> @@ -60,6 +60,21 @@ config SPL_DM_REGULATOR_BD71837
> This config enables implementation of driver-model regulator uclass
> features for regulators on ROHM BD71837 and BD71847 in SPL.
>
> +config DM_REGULATOR_PCA9450
> + bool "Enable Driver Model for NXP PCA9450 regulators"
> + depends on DM_REGULATOR && DM_PMIC_PCA9450
> + help
> + This config enables implementation of driver-model regulator uclass
> + features for regulators on NXP PCA9450 PMICs. PCA9450 contains 6 bucks
> + and 5 LDOS. The driver implements get/set api for value and enable.
> +
> +config SPL_DM_REGULATOR_PCA9450
> + bool "Enable Driver Model for NXP PCA9450 regulators in SPL"
> + depends on DM_REGULATOR_PCA9450
> + help
> + This config enables implementation of driver-model regulator uclass
> + features for regulators on ROHM PCA9450 in SPL.
> +
> config DM_REGULATOR_DA9063
> bool "Enable Driver Model for REGULATOR DA9063"
> depends on DM_REGULATOR && DM_PMIC_DA9063
> diff --git a/drivers/power/regulator/Makefile
> b/drivers/power/regulator/Makefile
> index 4efb32a3228..d2d17f7aed0 100644
> --- a/drivers/power/regulator/Makefile
> +++ b/drivers/power/regulator/Makefile
> @@ -11,6 +11,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o
> obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
> obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
> obj-$(CONFIG_$(SPL_)DM_REGULATOR_BD71837) += bd71837.o
> +obj-$(CONFIG_$(SPL_)DM_REGULATOR_PCA9450) += pca9450.o
> obj-$(CONFIG_$(SPL_)REGULATOR_PWM) += pwm_regulator.o
> obj-$(CONFIG_$(SPL_)DM_REGULATOR_FAN53555) += fan53555.o
> obj-$(CONFIG_$(SPL_)DM_REGULATOR_COMMON) += regulator_common.o
> diff --git a/drivers/power/regulator/pca9450.c
> b/drivers/power/regulator/pca9450.c
> new file mode 100644
> index 000..4847c9f90f0
> --- /dev/null
> +++ b/drivers/power/regulator/pca9450.c
> @@ -0,0 +1,333 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * NXP PCA9450 regulator driver
> + * Copyright (C) 2022 Marek Vasut
> + *
> + * Largely based on:
> + * ROHM BD71837 regulator driver
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define HW_STATE_CONTROL 0
> +#define DEBUG
> +
> +/**
> + * struct pca9450_vrange - describe linear range of voltages
> + *
> + * @min_volt:smallest voltage in range
> + * @step:how much voltage changes at each selector step
> + * @min_sel: smallest selector in the range
> + * @max_sel: maximum selector in the range
> + */
> +struct pca9450_vrange {
> + unsigned intmin_volt;
> + unsigned intstep;
> + u8 min_sel;
> + u8 max_sel;
> +};
> +
> +/**
> + * struct pca9450_plat - describe regulator control registers
> + *
> + * @name:name of the regulator. Used for matching the dt-entry
> + * @enable_reg: register address used to enable/disable regulator
> + * @enablemask: register mask used to enable/disable regulator
> + * @volt_reg:register address used to configure regulator voltage
> + * @volt_mask: register mask used to configure regulator voltage
> + * @ranges: pointer to
Re: [PATCH v2 06/23] pmic: pca9450: Add upstream regulators subnode match
On 4/12/22 04:45, Marek Vasut wrote:
> The upstream DT regulators node subnodes are named BUCKn and LDOn,
> the downstream DT regulators node subnodes are named buckn and ldon,
> add the upstream match.
>
> Reviewed-by: Fabio Estevam
> Signed-off-by: Marek Vasut
> Cc: Fabio Estevam
> Cc: Peng Fan
> Cc: Stefano Babic
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> V2: Add RB by Fabio
> ---
> drivers/power/pmic/pca9450.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c
> index 2394b196c56..26c876c9c45 100644
> --- a/drivers/power/pmic/pca9450.c
> +++ b/drivers/power/pmic/pca9450.c
> @@ -19,8 +19,10 @@ DECLARE_GLOBAL_DATA_PTR;
> static const struct pmic_child_info pmic_children_info[] = {
> /* buck */
> { .prefix = "b", .driver = PCA9450_REGULATOR_DRIVER},
> + { .prefix = "B", .driver = PCA9450_REGULATOR_DRIVER},
> /* ldo */
> { .prefix = "l", .driver = PCA9450_REGULATOR_DRIVER},
> + { .prefix = "L", .driver = PCA9450_REGULATOR_DRIVER},
> { },
> };
>
Re: [PATCH] power-domain: Return 0 if ops unimplemented and remove empty functions
On 3/31/22 11:54, Marek Vasut wrote:
> In case the ops is not implemented, return 0 in the core right away.
> This is better than having multiple copies of functions which just
> return 0 in each power domain driver. Drop all those empty functions.
>
> Signed-off-by: Marek Vasut
> Cc: Patrick Delaunay
> Cc: Simon Glass
Reviewed-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
> ---
> drivers/power/domain/apple-pmgr.c | 30 ---
> drivers/power/domain/bcm6328-power-domain.c | 6
> .../power/domain/imx8-power-domain-legacy.c | 16 --
> drivers/power/domain/imx8-power-domain.c | 24 ---
> drivers/power/domain/imx8m-power-domain.c | 18 ---
> drivers/power/domain/meson-ee-pwrc.c | 12
> drivers/power/domain/meson-gx-pwrc-vpu.c | 12
> drivers/power/domain/mtk-power-domain.c | 6
> drivers/power/domain/power-domain-uclass.c| 8 ++---
> drivers/power/domain/tegra186-power-domain.c | 26
> drivers/power/domain/ti-power-domain.c| 13
> drivers/power/domain/ti-sci-power-domain.c| 14 -
> 12 files changed, 4 insertions(+), 181 deletions(-)
>
> diff --git a/drivers/power/domain/apple-pmgr.c
> b/drivers/power/domain/apple-pmgr.c
> index 4d06e76ff5e..402c5b1fd18 100644
> --- a/drivers/power/domain/apple-pmgr.c
> +++ b/drivers/power/domain/apple-pmgr.c
> @@ -42,16 +42,6 @@ static int apple_reset_of_xlate(struct reset_ctl
> *reset_ctl,
> return 0;
> }
>
> -static int apple_reset_request(struct reset_ctl *reset_ctl)
> -{
> - return 0;
> -}
> -
> -static int apple_reset_free(struct reset_ctl *reset_ctl)
> -{
> - return 0;
> -}
> -
> static int apple_reset_assert(struct reset_ctl *reset_ctl)
> {
> struct apple_pmgr_priv *priv = dev_get_priv(reset_ctl->dev->parent);
> @@ -80,8 +70,6 @@ static int apple_reset_deassert(struct reset_ctl *reset_ctl)
>
> struct reset_ops apple_reset_ops = {
> .of_xlate = apple_reset_of_xlate,
> - .request = apple_reset_request,
> - .rfree = apple_reset_free,
> .rst_assert = apple_reset_assert,
> .rst_deassert = apple_reset_deassert,
> };
> @@ -92,16 +80,6 @@ static struct driver apple_reset_driver = {
> .ops = _reset_ops,
> };
>
> -static int apple_pmgr_request(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> -static int apple_pmgr_rfree(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> static int apple_pmgr_ps_set(struct power_domain *power_domain, u32 pstate)
> {
> struct apple_pmgr_priv *priv = dev_get_priv(power_domain->dev);
> @@ -121,11 +99,6 @@ static int apple_pmgr_on(struct power_domain
> *power_domain)
> return apple_pmgr_ps_set(power_domain, APPLE_PMGR_PS_ACTIVE);
> }
>
> -static int apple_pmgr_off(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> static int apple_pmgr_of_xlate(struct power_domain *power_domain,
> struct ofnode_phandle_args *args)
> {
> @@ -167,10 +140,7 @@ static int apple_pmgr_probe(struct udevice *dev)
> }
>
> struct power_domain_ops apple_pmgr_ops = {
> - .request = apple_pmgr_request,
> - .rfree = apple_pmgr_rfree,
> .on = apple_pmgr_on,
> - .off = apple_pmgr_off,
> .of_xlate = apple_pmgr_of_xlate,
> };
>
> diff --git a/drivers/power/domain/bcm6328-power-domain.c
> b/drivers/power/domain/bcm6328-power-domain.c
> index 6e720e0798c..80144dd9772 100644
> --- a/drivers/power/domain/bcm6328-power-domain.c
> +++ b/drivers/power/domain/bcm6328-power-domain.c
> @@ -24,11 +24,6 @@ static int bcm6328_power_domain_request(struct
> power_domain *power_domain)
> return 0;
> }
>
> -static int bcm6328_power_domain_free(struct power_domain *power_domain)
> -{
> - return 0;
> -}
> -
> static int bcm6328_power_domain_on(struct power_domain *power_domain)
> {
> struct bcm6328_power_domain *priv = dev_get_priv(power_domain->dev);
> @@ -64,7 +59,6 @@ static const struct udevice_id bcm6328_power_domain_ids[] =
> {
> };
>
> struct power_domain_ops bcm6328_power_domain_ops = {
> - .rfree = bcm6328_power_domain_free,
> .off = bcm6328_power_domain_off,
> .on = bcm6328_power_domain_on,
> .request = bcm6328_power_domain_request,
> diff --git a/drivers/power/domain/imx8-power-domain-legacy.c
> b/drivers/power/domain/imx8-power-domain-legacy.c
> index e2fae2dbc86..bf45891bccd 100644
> --- a/drivers/power/domain/imx8-power-domain-legacy.c
> +++ b/drivers/power/domain/imx8-power-domain-legacy.c
> @@ -84,20 +84,6 @@ int imx8_power_domain_lookup_name(const char *name,
> return 0;
> }
>
> -static int imx8_power_domain_request(struct power_domain *power_domain)
> -{
> - debug("%s(power_domain=%p)\n", __func__, power_domain);
> -
> - return 0;
> -}
> -
> -static int imx8_power_domain_free(struct power_domain *power_domain)
> -{
> -
[PATCH v2] arm: kirkwood: Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
The Globalscale Technologies Sheevaplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.
- Remove CONFIG_RESET_PHY_R symbol from all board files
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup
comments.
Signed-off-by: Tony Dinh
---
Changes in v2:
- Remove CONFIG_RESET_PHY_R from configs file and it is no longer needed
to undefine it in include board file.
- Misceslanous changes: enable CONFIG_SYS_64BIT_LBA (for large HDD & USB),
CONFIG_CMD_FS_GENERIC (generic load cmd), CONFIG_CMD_SETEXPR (enhance
shell expression).
board/Marvell/sheevaplug/sheevaplug.c | 83 +--
board/Marvell/sheevaplug/sheevaplug.h | 24
configs/sheevaplug_defconfig | 4 +-
include/configs/sheevaplug.h | 19 ++
4 files changed, 20 insertions(+), 110 deletions(-)
delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
diff --git a/board/Marvell/sheevaplug/sheevaplug.c
b/board/Marvell/sheevaplug/sheevaplug.c
index 5952d158b2..26ee39ef77 100644
--- a/board/Marvell/sheevaplug/sheevaplug.c
+++ b/board/Marvell/sheevaplug/sheevaplug.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2021 Tony Dinh
+ * Copyright (C) 2021-2022 Tony Dinh
* (C) Copyright 2009
* Marvell Semiconductor
* Written-by: Prafulla Wadaskar
@@ -8,17 +8,21 @@
#include
#include
-#include
-#include
+#include
#include
#include
#include
#include
#include
-#include "sheevaplug.h"
+#include
DECLARE_GLOBAL_DATA_PTR;
+#define SHEEVAPLUG_OE_LOW (~(0))
+#define SHEEVAPLUG_OE_HIGH (~(0))
+#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */
+#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
+
int board_early_init_f(void)
{
/*
@@ -88,6 +92,11 @@ int board_early_init_f(void)
return 0;
}
+int board_eth_init(struct bd_info *bis)
+{
+ return cpu_eth_init(bis);
+}
+
int board_init(void)
{
/*
@@ -95,72 +104,8 @@ int board_init(void)
*/
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
- /* adress of boot parameters */
+ /* address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
-
-static int fdt_get_phy_addr(const char *path)
-{
- const void *fdt = gd->fdt_blob;
- const u32 *reg;
- const u32 *val;
- int node, phandle, addr;
-
- /* Find the node by its full path */
- node = fdt_path_offset(fdt, path);
- if (node >= 0) {
- /* Look up phy-handle */
- val = fdt_getprop(fdt, node, "phy-handle", NULL);
- if (val) {
- phandle = fdt32_to_cpu(*val);
- if (!phandle)
- return -1;
- /* Follow it to its node */
- node = fdt_node_offset_by_phandle(fdt, phandle);
- if (node) {
- /* Look up reg */
- reg = fdt_getprop(fdt, node, "reg", NULL);
- if (reg) {
- addr = fdt32_to_cpu(*reg);
- return addr;
- }
- }
- }
- }
- return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
-{
- u16 reg;
- int phyaddr;
- char *name = "ethernet-controller@72000";
- char *eth0_path =
"/ocp@f100/ethernet-controller@72000/ethernet0-port@0";
-
- if (miiphy_set_current_dev(name))
- return;
-
- phyaddr = fdt_get_phy_addr(eth0_path);
- if (phyaddr < 0)
- return;
-
- /*
-* Enable RGMII delay on Tx and Rx for CPU port
-* Ref: sec 4.7.2 of chip datasheet
-*/
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
- miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, );
- reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
- miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
-
- /* reset the phy */
- miiphy_reset(name, phyaddr);
-
- printf("88E1116 Initialized on %s\n", name);
-}
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/sheevaplug/sheevaplug.h
b/board/Marvell/sheevaplug/sheevaplug.h
deleted file mode 100644
index e026c1b53b..00
--- a/board/Marvell/sheevaplug/sheevaplug.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009
- *
[PATCH] arm: imx8m: Enable CLK_IMX8M[MNQP] where applicable
Most, if not all of the imx8m[mnp] boards enable the SoC clock driver. The CLK_IMX8MQ isn't necessarily required yet, but as the new power domain driver will assume it is present. To simply this, enable the respective clock drivers when a given imx8m SoC is selected. This will also shink the board defconfig files a bit. Suggested-by: Marek Vasut Signed-off-by: Adam Ford diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 55db25062a..4b0d126a71 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -8,18 +8,22 @@ config IMX8M config IMX8MQ bool select IMX8M + select CLK_IMX8MQ config IMX8MM bool select IMX8M + select CLK_IMX8MM config IMX8MN bool select IMX8M + select CLK_IMX8MN config IMX8MP bool select IMX8M + select CLK_IMX8MP config SYS_SOC default "imx8m" -- 2.34.1
Re: [PATCH 3/3] imx: power-domain: Get rid of SMCCC dependency
On Tue, Apr 5, 2022 at 3:14 PM Tim Harvey wrote: > > On Mon, Apr 4, 2022 at 7:25 AM Marek Vasut wrote: > > > > On 4/4/22 16:15, Adam Ford wrote: > > > On Mon, Apr 4, 2022 at 8:01 AM Marek Vasut wrote: > > >> > > >> On 4/4/22 14:51, Adam Ford wrote: > > >>> On Wed, Mar 30, 2022 at 10:04 PM Marek Vasut wrote: > > > > This driver is the only SMCCC dependency in iMX8M U-Boot port. Rework > > the driver based on Linux GPCv2 driver to directly control the GPCv2 > > block instead of using SMCCC calls. This way, U-Boot can operate the > > i.MX8M power domains without depending on anything else. > > > > This is losely based on Linux GPCv2 driver. The GPU, VPU, MIPI power > > domains are not supported to save space, since they are not useful in > > the bootloader. The only domains kept are ones for HSIO, PCIe, USB. > > >>> > > >>> I thought there were people who were using video in U-Boot, but maybe > > >>> I am wrong. > > >> > > >> There are no video drivers for MX8M in U-Boot, it's all USB and maybe > > >> sometimes in the future PCIe. > > > > > > Oh good. > > > > > > I'll try to test it on an imx8mq when I get some time. > > > > The entire stack of patches is at: > > > > https://source.denx.de/u-boot/custodians/u-boot-usb/-/commits/imx-8mp > > For the series: > > Tested-By: Tim Harvey #imx8mp-venice-defconfig > > This was tested on an IMX8MP board that I'm bringing up > (imx8mp-venice-defconfig) but have not yet submitted. > There needs to be a subsequent patch because the 8MQ clocks and CCF stuff don't appear to be enabled by default, but Kconfig looks like it should. Once I have figured it out, I'll send a subsequent patch to address that. For the series: Tested-by: Adam Ford #imx8mq-evk adam > Best Regards, > > Tim
Re: [PATCH 3/3] imx: power-domain: Get rid of SMCCC dependency
On 4/17/22 20:24, Adam Ford wrote: Hi, When I just reverted all three of those, it still hangs. However, when I removed CONFIG_CLK, it recovered. I'll examine which clocks may be missing or if there is some other clock dependency. Hum, clock sounds indeed more plausible cause of the hang because the SMC calls (or the power domain driver) does not come up so early in the process. (the other possibility is that you're running of MALLOC_F space due to the extra clock). The obvious other question I have would be -- does it hang if you only enable CONFIG_CLK=y without these patches here ? It appears that I just needed to enable the CCF, CCF composite, and the IMX8MQ clock driver which were previously disabled by default. With those enabled, it booted just fine. Once it booted, I was able to start the USB system and it detected a USB thumb drive. I did not enable them in SPL, but I can try it if you want. Oh, right, now you actually can bring up USB in SPL, that's a nice bonus. Should we expand the power domain dependency to include these clocks, or should these clocks just turn on by default if/when the 8MQ is the target SOC? Probably add something like this into the Kconfig file: select CLK_IMX8MQ if IMX8MQ for all four MX8M variants and for all SPL variants (so 8 entries total) and that should fix the clock dependency in general. At this point, I don't think it's a MALLOC_F issue, but I considered that. I can mark your patch with a t-b, but I am not sure if you want to do a V2 with these clocks enabled or do something different. Maybe just send a subsequent patch. That's likely easier on Stefano, since this series is already buries deep in his master-next branch.
[PATCH] arm: kirkwood: nsa310s: Use Marvell uclass mvgbe and PHY driver for DM Ethernet
The Zyxel NSA310s board has the network chip Marvell Alaska 88E1318S.
Use uclass mvgbe and the compatible driver M88E1310 driver to bring
up Ethernet.
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Remove CONFIG_RESET_PHY_R.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Add phy mode RGMII to kirkwood-nsa310s.dts
- Miscellaneous changes: Move constants to .c file and remove header file
board/zyxel/nsa310s/nsa310s.h, add support for large USB and SATA HDDs,
use BIT macro, add/cleanup comments, and cosmetic changes.
Note that this patch is depended on the following patch:
https://patchwork.ozlabs.org/project/uboot/patch/20220412201820.10291-1-mibo...@gmail.com/
Signed-off-by: Tony Dinh
---
arch/arm/dts/kirkwood-nsa310s.dts | 1 +
board/zyxel/nsa310s/nsa310s.c | 119 +-
board/zyxel/nsa310s/nsa310s.h | 46
configs/nsa310s_defconfig | 6 +-
include/configs/nsa310s.h | 11 +--
5 files changed, 41 insertions(+), 142 deletions(-)
delete mode 100644 board/zyxel/nsa310s/nsa310s.h
diff --git a/arch/arm/dts/kirkwood-nsa310s.dts
b/arch/arm/dts/kirkwood-nsa310s.dts
index e1c9c9080c..09ee76c2a2 100644
--- a/arch/arm/dts/kirkwood-nsa310s.dts
+++ b/arch/arm/dts/kirkwood-nsa310s.dts
@@ -306,6 +306,7 @@
status = "okay";
ethernet0-port@0 {
phy-handle = <>;
+ phy-mode = "rgmii";
};
};
diff --git a/board/zyxel/nsa310s/nsa310s.c b/board/zyxel/nsa310s/nsa310s.c
index b71de4e11f..b3ea660891 100644
--- a/board/zyxel/nsa310s/nsa310s.c
+++ b/board/zyxel/nsa310s/nsa310s.c
@@ -1,22 +1,49 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2015, 2021 Tony Dinh
+ * Copyright (C) 2015, 2021-2022 Tony Dinh
* Copyright (C) 2015 Gerald Kerma
*/
#include
#include
-#include
-#include
+#include
#include
#include
#include
#include
#include
-#include "nsa310s.h"
+#include
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * low GPIO's
+ */
+#define HDD1_GREEN_LED BIT(16)
+#define HDD1_RED_LED BIT(13)
+#define USB_GREEN_LED BIT(15)
+#define USB_POWER BIT(21)
+#define SYS_GREEN_LED BIT(28)
+#define SYS_ORANGE_LED BIT(29)
+
+#define COPY_GREEN_LED BIT(22)
+#define COPY_RED_LED BIT(23)
+
+#define PIN_USB_GREEN_LED 15
+#define PIN_USB_POWER 21
+
+#define NSA310S_OE_LOW (~(0))
+#define NSA310S_VAL_LOW(SYS_GREEN_LED | USB_POWER)
+
+/*
+ * high GPIO's
+ */
+#define HDD2_GREEN_LED BIT(2)
+#define HDD2_POWER BIT(1)
+
+#define NSA310S_OE_HIGH(~(0))
+#define NSA310S_VAL_HIGH (HDD2_POWER)
+
int board_early_init_f(void)
{
/*
@@ -80,87 +107,7 @@ int board_init(void)
return 0;
}
-static int fdt_get_phy_addr(const char *path)
-{
- const void *fdt = gd->fdt_blob;
- const u32 *reg;
- const u32 *val;
- int node, phandle, addr;
-
- /* Find the node by its full path */
- node = fdt_path_offset(fdt, path);
- if (node >= 0) {
- /* Look up phy-handle */
- val = fdt_getprop(fdt, node, "phy-handle", NULL);
- if (val) {
- phandle = fdt32_to_cpu(*val);
- if (!phandle)
- return -1;
- /* Follow it to its node */
- node = fdt_node_offset_by_phandle(fdt, phandle);
- if (node) {
- /* Look up reg */
- reg = fdt_getprop(fdt, node, "reg", NULL);
- if (reg) {
- addr = fdt32_to_cpu(*reg);
- return addr;
- }
- }
- }
- }
- return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-void reset_phy(void)
+int board_eth_init(struct bd_info *bis)
{
- u16 reg;
- u16 phyaddr;
- char *name = "ethernet-controller@72000";
- char *eth0_path =
"/ocp@f100/ethernet-controller@72000/ethernet0-port@0";
-
- if (miiphy_set_current_dev(name))
- return;
-
- phyaddr = fdt_get_phy_addr(eth0_path);
- if (phyaddr < 0)
- return;
-
- /* set RGMII delay */
- miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, MV88E1318_MAC_CTRL_PG);
- miiphy_read(name, phyaddr, MV88E1318_MAC_CTRL_REG, );
- reg |= (MV88E1318_RGMII_RX_CTRL | MV88E1318_RGMII_TX_CTRL);
- miiphy_write(name, phyaddr, MV88E1318_MAC_CTRL_REG, reg);
- miiphy_write(name, phyaddr, MV88E1318_PGADR_REG, 0);
-
- /* reset PHY */
- if (miiphy_reset(name, phyaddr))
- return;
-
- /*
-* ZyXEL NSA310S uses the 88E1310S Alaska (interface identical to
88E1318)
-* and has an MCU attached to the
[PATCH 1/2] imx: Add support for i.MX8MM Beacon SOM 4GB variant
The Beacon Embedded has a new variant with a different LPDDR4 chip.
This new chip has 4GB of RAM. Because the DDR timings are loaded
SPL, and there doesn't appear to be a way to determine which
chip timings are needed at runtime, a new config option is created to
enable the 4GB of memory and load the proper timings.
Signed-off-by: Adam Ford
diff --git a/board/beacon/imx8mm/Kconfig b/board/beacon/imx8mm/Kconfig
index 63f064e8cb..70f93102e0 100644
--- a/board/beacon/imx8mm/Kconfig
+++ b/board/beacon/imx8mm/Kconfig
@@ -12,6 +12,10 @@ config SYS_CONFIG_NAME
config IMX_CONFIG
default "board/beacon/imx8mm/imximage-8mm-lpddr4.cfg"
+config IMX8MM_BEACON_4GB_LPDDR
+ bool "Enable 4GB LPDDR"
+ default n
+
source "board/freescale/common/Kconfig"
endif
diff --git a/board/beacon/imx8mm/MAINTAINERS b/board/beacon/imx8mm/MAINTAINERS
index e887db20a2..85b830f2df 100644
--- a/board/beacon/imx8mm/MAINTAINERS
+++ b/board/beacon/imx8mm/MAINTAINERS
@@ -5,3 +5,4 @@ S: Maintained
F: board/beacon/imx8mm/
F: include/configs/imx8mm_beacon.h
F: configs/imx8mm_beacon_defconfig
+F: configs/imx8mm_beacon_4g_defconfig
diff --git a/board/beacon/imx8mm/Makefile b/board/beacon/imx8mm/Makefile
index 7d3bd3112c..2a9677fbf2 100644
--- a/board/beacon/imx8mm/Makefile
+++ b/board/beacon/imx8mm/Makefile
@@ -9,5 +9,9 @@ obj-y += ../../freescale/common/
ifdef CONFIG_SPL_BUILD
obj-y += spl.o
+ifdef IMX8MM_BEACON_4GB_LPDDR
+obj-y += lpddr4_timing_4g.o
+else
obj-y += lpddr4_timing.o
endif
+endif
diff --git a/board/beacon/imx8mm/lpddr4_timing_4g.c
b/board/beacon/imx8mm/lpddr4_timing_4g.c
new file mode 100644
index 00..9e98b28d87
--- /dev/null
+++ b/board/beacon/imx8mm/lpddr4_timing_4g.c
@@ -0,0 +1,1840 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include
+#include
+
+struct dram_cfg_param ddr_ddrc_cfg[] = {
+ /** Initialize DDRC registers **/
+ { 0x3d400304, 0x1 },
+ { 0x3d400030, 0x1 },
+ { 0x3d40, 0xa1080020 },
+ { 0x3d400020, 0x202 },
+ { 0x3d400024, 0x3a980 },
+ { 0x3d400064, 0x2d00d2 },
+ { 0x3d4000d0, 0xc00305ba },
+ { 0x3d4000d4, 0x94 },
+ { 0x3d4000dc, 0xd4002d },
+ { 0x3d4000e0, 0x31 },
+ { 0x3d4000e8, 0x66004d },
+ { 0x3d4000ec, 0x16004d },
+ { 0x3d400100, 0x191e0c20 },
+ { 0x3d400104, 0x60630 },
+ { 0x3d40010c, 0xb0b000 },
+ { 0x3d400110, 0xe04080e },
+ { 0x3d400114, 0x2040c0c },
+ { 0x3d400118, 0x1010007 },
+ { 0x3d40011c, 0x401 },
+ { 0x3d400130, 0x20600 },
+ { 0x3d400134, 0xc12 },
+ { 0x3d400138, 0xd8 },
+ { 0x3d400144, 0x96004b },
+ { 0x3d400180, 0x2ee0017 },
+ { 0x3d400184, 0x2605b8e },
+ { 0x3d400188, 0x0 },
+ { 0x3d400190, 0x497820a },
+ { 0x3d400194, 0x80303 },
+ { 0x3d4001b4, 0x170a },
+ { 0x3d4001a0, 0xe0400018 },
+ { 0x3d4001a4, 0xdf00e4 },
+ { 0x3d4001a8, 0x8000 },
+ { 0x3d4001b0, 0x11 },
+ { 0x3d4001c0, 0x1 },
+ { 0x3d4001c4, 0x1 },
+ { 0x3d4000f4, 0xc99 },
+ { 0x3d400108, 0x70e1617 },
+ { 0x3d400200, 0x1f },
+ { 0x3d40020c, 0x0 },
+ { 0x3d400210, 0x1f1f },
+ { 0x3d400204, 0x80808 },
+ { 0x3d400214, 0x7070707 },
+ { 0x3d400218, 0x7070707 },
+ { 0x3d40021c, 0xf07 },
+ { 0x3d400250, 0x29001701 },
+ { 0x3d400254, 0x2c },
+ { 0x3d40025c, 0x430 },
+ { 0x3d400264, 0x900093e7 },
+ { 0x3d40026c, 0x2005574 },
+ { 0x3d400400, 0x111 },
+ { 0x3d400408, 0x72ff },
+ { 0x3d400494, 0x2100e07 },
+ { 0x3d400498, 0x620096 },
+ { 0x3d40049c, 0x1100e07 },
+ { 0x3d4004a0, 0xc8012c },
+ { 0x3d402020, 0x0 },
+ { 0x3d402024, 0x7d00 },
+ { 0x3d402050, 0x20d040 },
+ { 0x3d402064, 0x6001c },
+ { 0x3d4020dc, 0x84 },
+ { 0x3d4020e0, 0x31 },
+ { 0x3d4020e8, 0x66004d },
+ { 0x3d4020ec, 0x16004d },
+ { 0x3d402100, 0xa040105 },
+ { 0x3d402104, 0x30407 },
+ { 0x3d402108, 0x203060b },
+ { 0x3d40210c, 0x505000 },
+ { 0x3d402110, 0x2040202 },
+ { 0x3d402114, 0x2030202 },
+ { 0x3d402118, 0x1010004 },
+ { 0x3d40211c, 0x301 },
+ { 0x3d402130, 0x20300 },
+ { 0x3d402134, 0xa12 },
+ { 0x3d402138, 0x1d },
+ { 0x3d402144, 0x14000a },
+ { 0x3d402180, 0x640004 },
+ { 0x3d402190, 0x3818200 },
+ { 0x3d402194, 0x80303 },
+ { 0x3d4021b4, 0x100 },
+ { 0x3d4020f4, 0xc99 },
+ { 0x3d403020, 0x0 },
+ { 0x3d403024, 0x1f40 },
+ { 0x3d403050, 0x20d040 },
+ { 0x3d403064, 0x30007 },
+ { 0x3d4030dc, 0x84 },
+ { 0x3d4030e0, 0x31 },
+ { 0x3d4030e8, 0x66004d },
+ { 0x3d4030ec, 0x16004d },
+ { 0x3d403100, 0xa010102 },
+ { 0x3d403104, 0x30404 },
+ { 0x3d403108, 0x203060b },
+ { 0x3d40310c, 0x505000 },
+ { 0x3d403110, 0x2040202
[PATCH 2/2] imx: imx8mm_beacon: Enable Micrel PHY
Due part shortages, there is a second variant of the Beacon i.MX8M Mini SOM which contains a Micrel PHY. Signed-off-by: Adam Ford diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 403934a1ac..e8b29da92c 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -92,6 +92,8 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y +CONFIG_PHY_MICREL=y +CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y -- 2.34.1
Re: [PATCH 3/3] imx: power-domain: Get rid of SMCCC dependency
On Sun, Apr 17, 2022 at 1:15 PM Marek Vasut wrote: > > On 4/17/22 18:37, Adam Ford wrote: > > [...] > > > When I just reverted all three of those, it still hangs. However, > > when I removed CONFIG_CLK, it recovered. I'll examine which clocks > > may be missing or if there is some other clock dependency. > > Hum, clock sounds indeed more plausible cause of the hang because the > SMC calls (or the power domain driver) does not come up so early in the > process. (the other possibility is that you're running of MALLOC_F space > due to the extra clock). > > The obvious other question I have would be -- does it hang if you only > enable CONFIG_CLK=y without these patches here ? It appears that I just needed to enable the CCF, CCF composite, and the IMX8MQ clock driver which were previously disabled by default. With those enabled, it booted just fine. Once it booted, I was able to start the USB system and it detected a USB thumb drive. I did not enable them in SPL, but I can try it if you want. Should we expand the power domain dependency to include these clocks, or should these clocks just turn on by default if/when the 8MQ is the target SOC? At this point, I don't think it's a MALLOC_F issue, but I considered that. I can mark your patch with a t-b, but I am not sure if you want to do a V2 with these clocks enabled or do something different. As a side note, after I enabled those clocks, U-Boot generated some new splat. It's unrelated to your patch. I think it bears some investigation as a separate thread in itself, but I don't think it should stop your patch series. U-Boot 2022.04-00822-g70faebd20c (Apr 17 2022 - 13:12:53 -0500) CPU: Freescale i.MX8MQ rev2.1 at 1000 MHz Reset cause: POR Model: NXP i.MX8MQ EVK DRAM: 3 GiB clk_register: failed to get device (parent of ckil) clk_register: failed to get device (parent of clock-osc-27m) clk_register: failed to get device (parent of sys1_pll) clk_register: failed to get device (parent of sys2_pll) clk_register: failed to get device (parent of sys3_pll) Core: 134 devices, 17 uclasses, devicetree: separate MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial SEC0: RNG instantiated Net: eth0: ethernet@30be Hit any key to stop autoboot: 0 u-boot=> usb start starting USB... Bus usb@3820: Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@3820 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found u-boot=>
Re: [PATCH 3/3] imx: power-domain: Get rid of SMCCC dependency
On 4/17/22 18:37, Adam Ford wrote: [...] When I just reverted all three of those, it still hangs. However, when I removed CONFIG_CLK, it recovered. I'll examine which clocks may be missing or if there is some other clock dependency. Hum, clock sounds indeed more plausible cause of the hang because the SMC calls (or the power domain driver) does not come up so early in the process. (the other possibility is that you're running of MALLOC_F space due to the extra clock). The obvious other question I have would be -- does it hang if you only enable CONFIG_CLK=y without these patches here ?
Re: [PATCH 3/3] imx: power-domain: Get rid of SMCCC dependency
On Sun, Apr 17, 2022 at 10:16 AM Marek Vasut wrote:
>
> On 4/17/22 15:21, Adam Ford wrote:
> > On Sat, Apr 16, 2022 at 9:13 PM Marek Vasut wrote:
> >>
> >> On 4/17/22 03:01, Adam Ford wrote:
> >>
> >> Hi,
> >>
> > After the patch:
> >
> > U-Boot SPL 2022.04-00822-gc2a24a7ce5 (Apr 16 2022 - 15:45:29 -0500)
> > PMIC: PFUZE100 ID=0x10
> > SEC0: RNG instantiated
> > Normal Boot
> > Trying to boot from MMC2
>
> There should be some sort of output from ATF here, which version did you
> use during your tests ?
> >
> > When I look at the ATF from NXP, it appears the debug console is
> > disabled by default. I think it's because the 8MQ has less OCRAM than
> > the rest of the 8M family, but I don't know.
>
> Hum, I see. I never used the NXP fork, I only ever used upstream.
>
> >>> I used the version from the imx8mq_evk.rst:
> >>>
> >>> Note: srctree is U-Boot source directory
> >>> Get ATF from: https://source.codeaurora.org/external/imx/imx-atf
> >>> branch: imx_5.4.47_2.2.0
> >>>
> >>> This works with U-Boot master. I realize it has the ATF power domain
> >>> code, but with the SMCC stuff removed, it should be irrelevant.
> >>>
>
> Did you set IMX_BOOT_UART_BASE correctly ?
>
> >
> > 0x3086
> >
> Did you set ATF_LOAD_ADDR correctly ?
> >
> > ATF_LOAD_ADDR=0x0091
>
> This should be OK.
>
> >>> If I didn't build it right, I don't think 'master' would have booted,
> >>> but it did. I think I built it correctly.
> >>
> >> I find it odd that there is no print from the ATF, do check these
> >> twoU-Boot SPL 2022.04-00822-ge5aeb301b2 (Apr 17 2022 - 08:18:32 -0500)
> >
> > With the console enabled and your patch series applied:
> >
> > PMIC: PFUZE100 ID=0x10
> > SEC0: RNG instantiated
> > Normal Boot
> > Trying to boot from MMC2
> > NOTICE: BL31: v2.2(release):rel_imx_5.4.47_2.2.0-0-gc949a888e-dirty
> > NOTICE: BL31: Built : 08:16:33, Apr 17 2022
> >
> >
> >
> > It appears to me that both SPL and ATF are running.
> >
> > See below for bisect conversation...
> >> variables, I have seen hangs in ATF like this when they were not set right.
> >>
> Do you get a hang when you revert only this specific patch ?
> >>>
> >>> When I reverted the series, it booted again, but I can do a bisect
> >>> tomorrow to narrow down the specific patch in the series that causes
> >>> the issue.
> >>
> >> Please do, thanks.
> >
> > 28e5debc019b347436bdebd8978a971ce5a6582c is the first bad commit
> > commit 28e5debc019b347436bdebd8978a971ce5a6582c
>
> This commit does not exist in upstream ?
>
> u-boot$ git describe 28e5debc019b347436bdebd8978a971ce5a6582c
> fatal: 28e5debc019b347436bdebd8978a971ce5a6582c is neither a commit nor blob
>
I took your patch series from patchwork and applied it with git am on
top of the master. I am guessing the number generated won't match
something upstream because we have different starting points. I left
the description so you could see it corresponded to the patch in
question. Would you prefer I use a specific branch instead?
> Can you try and force-deselect CONFIG_CLK=y (and possibly the same for
> SPL) ? I think that gets pulled in by this commit too, it might've not
> been selected on your board before. And if that's not easily possible,
> try and revert these three:
>
> 129f5102d29 ("clk: imx8m: reduce rate table duplication")
> 11c8ab01f3e ("clk: imx8mq: Add a clock driver for the imx8mq")
> a375c6f3fbe ("dt-bindings: imx8mq-clock: add mainline definitions")
>
> I would like to know whether pulling in the clock support might be the
> actual source of problems.
When I just reverted all three of those, it still hangs. However,
when I removed CONFIG_CLK, it recovered. I'll examine which clocks
may be missing or if there is some other clock dependency.
adam
Re: [PATCH 3/3] imx: power-domain: Get rid of SMCCC dependency
On 4/17/22 15:21, Adam Ford wrote:
On Sat, Apr 16, 2022 at 9:13 PM Marek Vasut wrote:
On 4/17/22 03:01, Adam Ford wrote:
Hi,
After the patch:
U-Boot SPL 2022.04-00822-gc2a24a7ce5 (Apr 16 2022 - 15:45:29 -0500)
PMIC: PFUZE100 ID=0x10
SEC0: RNG instantiated
Normal Boot
Trying to boot from MMC2
There should be some sort of output from ATF here, which version did you
use during your tests ?
When I look at the ATF from NXP, it appears the debug console is
disabled by default. I think it's because the 8MQ has less OCRAM than
the rest of the 8M family, but I don't know.
Hum, I see. I never used the NXP fork, I only ever used upstream.
I used the version from the imx8mq_evk.rst:
Note: srctree is U-Boot source directory
Get ATF from: https://source.codeaurora.org/external/imx/imx-atf
branch: imx_5.4.47_2.2.0
This works with U-Boot master. I realize it has the ATF power domain
code, but with the SMCC stuff removed, it should be irrelevant.
Did you set IMX_BOOT_UART_BASE correctly ?
0x3086
Did you set ATF_LOAD_ADDR correctly ?
ATF_LOAD_ADDR=0x0091
This should be OK.
If I didn't build it right, I don't think 'master' would have booted,
but it did. I think I built it correctly.
I find it odd that there is no print from the ATF, do check these twoU-Boot SPL
2022.04-00822-ge5aeb301b2 (Apr 17 2022 - 08:18:32 -0500)
With the console enabled and your patch series applied:
PMIC: PFUZE100 ID=0x10
SEC0: RNG instantiated
Normal Boot
Trying to boot from MMC2
NOTICE: BL31: v2.2(release):rel_imx_5.4.47_2.2.0-0-gc949a888e-dirty
NOTICE: BL31: Built : 08:16:33, Apr 17 2022
It appears to me that both SPL and ATF are running.
See below for bisect conversation...
variables, I have seen hangs in ATF like this when they were not set right.
Do you get a hang when you revert only this specific patch ?
When I reverted the series, it booted again, but I can do a bisect
tomorrow to narrow down the specific patch in the series that causes
the issue.
Please do, thanks.
28e5debc019b347436bdebd8978a971ce5a6582c is the first bad commit
commit 28e5debc019b347436bdebd8978a971ce5a6582c
This commit does not exist in upstream ?
u-boot$ git describe 28e5debc019b347436bdebd8978a971ce5a6582c
fatal: 28e5debc019b347436bdebd8978a971ce5a6582c is neither a commit nor blob
Can you try and force-deselect CONFIG_CLK=y (and possibly the same for
SPL) ? I think that gets pulled in by this commit too, it might've not
been selected on your board before. And if that's not easily possible,
try and revert these three:
129f5102d29 ("clk: imx8m: reduce rate table duplication")
11c8ab01f3e ("clk: imx8mq: Add a clock driver for the imx8mq")
a375c6f3fbe ("dt-bindings: imx8mq-clock: add mainline definitions")
I would like to know whether pulling in the clock support might be the
actual source of problems.
Re: [PATCH 3/3] imx: power-domain: Get rid of SMCCC dependency
On Sat, Apr 16, 2022 at 9:13 PM Marek Vasut wrote: > > On 4/17/22 03:01, Adam Ford wrote: > > Hi, > > >>> After the patch: > >>> > >>> U-Boot SPL 2022.04-00822-gc2a24a7ce5 (Apr 16 2022 - 15:45:29 -0500) > >>> PMIC: PFUZE100 ID=0x10 > >>> SEC0: RNG instantiated > >>> Normal Boot > >>> Trying to boot from MMC2 > >> > >> There should be some sort of output from ATF here, which version did you > >> use during your tests ? When I look at the ATF from NXP, it appears the debug console is disabled by default. I think it's because the 8MQ has less OCRAM than the rest of the 8M family, but I don't know. > > > > I used the version from the imx8mq_evk.rst: > > > > Note: srctree is U-Boot source directory > > Get ATF from: https://source.codeaurora.org/external/imx/imx-atf > > branch: imx_5.4.47_2.2.0 > > > > This works with U-Boot master. I realize it has the ATF power domain > > code, but with the SMCC stuff removed, it should be irrelevant. > > > >> > >> Did you set IMX_BOOT_UART_BASE correctly ? > >> 0x3086 > >> Did you set ATF_LOAD_ADDR correctly ? ATF_LOAD_ADDR=0x0091 > >> > > If I didn't build it right, I don't think 'master' would have booted, > > but it did. I think I built it correctly. > > I find it odd that there is no print from the ATF, do check these twoU-Boot > SPL 2022.04-00822-ge5aeb301b2 (Apr 17 2022 - 08:18:32 -0500) With the console enabled and your patch series applied: PMIC: PFUZE100 ID=0x10 SEC0: RNG instantiated Normal Boot Trying to boot from MMC2 NOTICE: BL31: v2.2(release):rel_imx_5.4.47_2.2.0-0-gc949a888e-dirty NOTICE: BL31: Built : 08:16:33, Apr 17 2022 It appears to me that both SPL and ATF are running. See below for bisect conversation... > variables, I have seen hangs in ATF like this when they were not set right. > > >> Do you get a hang when you revert only this specific patch ? > > > > When I reverted the series, it booted again, but I can do a bisect > > tomorrow to narrow down the specific patch in the series that causes > > the issue. > > Please do, thanks. 28e5debc019b347436bdebd8978a971ce5a6582c is the first bad commit commit 28e5debc019b347436bdebd8978a971ce5a6582c Author: Marek Vasut Date: Wed Apr 13 00:42:51 2022 +0200 imx: power-domain: Get rid of SMCCC dependency This driver is the only SMCCC dependency in iMX8M U-Boot port. Rework the driver based on Linux GPCv2 driver to directly control the GPCv2 block instead of using SMCCC calls. This way, U-Boot can operate the i.MX8M power domains without depending on anything else. This is losely based on Linux GPCv2 driver. The GPU, VPU, MIPI power domains are not supported to save space, since they are not useful in the bootloader. The only domains kept are ones for HSIO, PCIe, USB.
Re: USB init before using usb_serial_acm gadget?
> So I think the right place to call usb_gadget_initialize is probably
> before registering the acm gadget function into acm_stdio_start(). Can
> you try this? and submit a follow_up fix patch if working?
It's required for `usb_gadget_initialize` to provide a "USB
controller index" as an argument. It's pretty obvious how to do it in
"interactive world" (e.g. to ask user for this number via CLI, like
it was in commands mentioned in my previous message) but in our case
we need to provide this number in non-interactive manner.
There is not an elegant solution with hardcoding '0' as a controller
index like it was done in `ether` gadget [1], but it seems that it
was a temporary fix ("This is a preparatory work for DM support for
UDC drivers") that occasionaly became a permament solution.
So, that's why I suggested to add a new subcommand to `usb` for OTG
initialization: in my opinion, it's better to require an explicit
call of something like `usb otgstart 0` than hardcoding a '0' into
the code. One more option is to add a new environment variable to
explictly specify a controller index, and read this variable from all
places when it requires.
P.S. I already put `usb_gadget_intiialize(0)` to my board code, and
ACM gadget started working; so the remaining problem is only to
decide where is the best place for this call.
[1]:
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/usb/gadget/ether.c#L2355
