[PATCH] image: fit: Use stack allocation macro

[Joel Stanley]

The documentation above the DEFINE_ALIGN_BUFFER says it's for use
outside functions, but we're inside one.

Instead use ALLOC_CACHE_ALIGN_BUFFER, the stack based macro, which also
includes the cache alignment.

Fixes: b583348ca8c8 ("image: fit: Align hash output buffers")
Signed-off-by: Joel Stanley 
---
This fixes booting the ast2600-evb image in qemu, which was getting all
zeroes for the output of the FIT hash check.

The 'static' buffer was in BSS but the output image didn't contain a BSS
section. The pointer was left pointing to the text, so the code was
trying to write to the (read only?) text area in SPI NOR memory space.

 tools/mkimage.h  | 3 +--
 boot/image-fit.c | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/tools/mkimage.h b/tools/mkimage.h
index 7652c8b001c3..f5ca65e2edfd 100644
--- a/tools/mkimage.h
+++ b/tools/mkimage.h
@@ -41,8 +41,7 @@ static inline ulong map_to_sysmem(void *ptr)
return (ulong)(uintptr_t)ptr;
 }
 
-#define ARCH_DMA_MINALIGN 1
-#define DEFINE_ALIGN_BUFFER(type, name, size, alugn) type name[size]
+#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) type name[size]
 
 #define MKIMAGE_TMPFILE_SUFFIX ".tmp"
 #define MKIMAGE_MAX_TMPFILE_LEN256
diff --git a/boot/image-fit.c b/boot/image-fit.c
index f57d97f55229..df3e5df8836a 100644
--- a/boot/image-fit.c
+++ b/boot/image-fit.c
@@ -1264,8 +1264,7 @@ int calculate_hash(const void *data, int data_len, const 
char *name,
 static int fit_image_check_hash(const void *fit, int noffset, const void *data,
size_t size, char **err_msgp)
 {
-   DEFINE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN,
-   ARCH_DMA_MINALIGN);
+   ALLOC_CACHE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN);
int value_len;
const char *algo;
uint8_t *fit_value;
-- 
2.35.1

Re: [PATCH 04/13] watchdog: designware: Make this depend on WDT

[Stefan Roese]

On 15.06.22 18:03, Tom Rini wrote:

As this driver can dynamically determine the values set in
CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather
than migrate CONFIG_DW_WDT_BASE to Kconfig.

Cc: Chee Tien Fong 
Cc: Chin-Liang See 
Cc: Dinh Nguyen 
Cc: Holger Brunck 
Cc: Ley Foon Tan 
Cc: Marek Vasut 
Cc: Siew Chin Lim 
Cc: Stefan Roese 
Cc: hee Hong Ang 
Signed-off-by: Tom Rini 


Reviewed-by: Stefan Roese 

Thanks,
Stefan


---
  drivers/watchdog/Kconfig   |  4 ++--
  drivers/watchdog/designware_wdt.c  | 21 -
  include/configs/socfpga_common.h   |  1 -
  include/configs/socfpga_soc64_common.h |  1 -
  4 files changed, 2 insertions(+), 25 deletions(-)

diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index c3eb8a8aec1b..532ada89c1b2 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -64,8 +64,8 @@ config ULP_WATCHDOG
  
  config DESIGNWARE_WATCHDOG

bool "Designware watchdog timer support"
-   select HW_WATCHDOG if !WDT
-   default y if WDT && ROCKCHIP_RK3399
+   depends on WDT
+   default y if ROCKCHIP_RK3399
help
  Enable this to support Designware Watchdog Timer IP, present e.g.
  on Altera SoCFPGA SoCs.
diff --git a/drivers/watchdog/designware_wdt.c 
b/drivers/watchdog/designware_wdt.c
index cfec29bd158c..cad756aeaf20 100644
--- a/drivers/watchdog/designware_wdt.c
+++ b/drivers/watchdog/designware_wdt.c
@@ -60,26 +60,6 @@ static void designware_wdt_reset_common(void __iomem *base)
writel(DW_WDT_CRR_RESTART_VAL, base + DW_WDT_CRR);
  }
  
-#if !CONFIG_IS_ENABLED(WDT)

-void hw_watchdog_reset(void)
-{
-   designware_wdt_reset_common((void __iomem *)CONFIG_DW_WDT_BASE);
-}
-
-void hw_watchdog_init(void)
-{
-   /* reset to disable the watchdog */
-   hw_watchdog_reset();
-   /* set timer in miliseconds */
-   designware_wdt_settimeout((void __iomem *)CONFIG_DW_WDT_BASE,
- CONFIG_DW_WDT_CLOCK_KHZ,
- CONFIG_WATCHDOG_TIMEOUT_MSECS);
-   /* enable the watchdog */
-   designware_wdt_enable((void __iomem *)CONFIG_DW_WDT_BASE);
-   /* reset the watchdog */
-   hw_watchdog_reset();
-}
-#else
  static int designware_wdt_reset(struct udevice *dev)
  {
struct designware_wdt_priv *priv = dev_get_priv(dev);
@@ -195,4 +175,3 @@ U_BOOT_DRIVER(designware_wdt) = {
.ops = &designware_wdt_ops,
.flags = DM_FLAG_PRE_RELOC,
  };
-#endif
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index d1efba29fc40..4a7da76e51e6 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -66,7 +66,6 @@
  /*
   * L4 Watchdog
   */
-#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
  #define CONFIG_DW_WDT_CLOCK_KHZ   25000
  
  /*

diff --git a/include/configs/socfpga_soc64_common.h 
b/include/configs/socfpga_soc64_common.h
index c1037ab595fa..a3e8d5492919 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -92,7 +92,6 @@
  /*
   * L4 Watchdog
   */
-#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS
  #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
  #ifndef __ASSEMBLY__
  unsigned int cm_get_l4_sys_free_clk_hz(void);


Viele Grüße,
Stefan Roese

--
DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de

Re: [PATCH 09/10] tools: zynqmp_psu_init_minimize: Add serdes_illcalib forward declaration

[Stefan Herbrechtsmeier]

Am 16.06.2022 um 17:13 schrieb Michal Simek:

On 6/8/22 18:20, Stefan Herbrechtsmeier wrote:

[CAUTION: External Email]

From: Stefan Herbrechtsmeier 

A forward declaration for the serdes_illcalib function.

Signed-off-by: Stefan Herbrechtsmeier 


---

  tools/zynqmp_psu_init_minimize.sh | 5 +
  1 file changed, 5 insertions(+)

diff --git a/tools/zynqmp_psu_init_minimize.sh 
b/tools/zynqmp_psu_init_minimize.sh

index 31fbeac327..8411065e13 100755
--- a/tools/zynqmp_psu_init_minimize.sh
+++ b/tools/zynqmp_psu_init_minimize.sh
@@ -108,6 +108,11 @@ cat << EOF >${TMP}
  #include 
  #include 

+static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate,
+  u32 lane2_protocol, u32 lane2_rate,
+  u32 lane1_protocol, u32 lane1_rate,
+  u32 lane0_protocol, u32 lane0_rate);
+


Better to resort that functions to avoid these additional lines.


Do you propose to move the serdes_illcalib and serdes_illcalib_pcie_gen1 
functions via sed?


The psu_init_gpl.c for e-a2197-00-revA, zcu208-revA and zcu216-revA 
already use a forward declaration. Would it be okay to add the forward 
declaration if the function is used inside the source file?


Regards
  Stefan

Re: [PATCH] mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not selected ecc.mode

[Peng Fan (OSS)]

在 2022/5/12 2:24, Pali Rohár 写道:

ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.

Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.

This change fixes usage of none ecc mode if it is specified in DTS file.

Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device 
tree")
Signed-off-by: Pali Rohár 


   powerpc:  +   ids8313
+= WARNING ==
+This board does not use CONFIG_WDT (Driver Model
+for DM watchdog). Please update the board to use
+CONFIG_WDT before the v2019.10 release. Failure to
+update by the deadline may result in board removal.
+See doc/develop/driver-model/migration.rst for more info.
+
+This board does not use CONFIG_DM_ETH (Driver Model
+for Ethernet drivers). Please update the board to use
+CONFIG_DM_ETH before the v2020.07 release. Failure to
+This board does not use CONFIG_DM_I2C (Driver Model
+for I2C drivers). Please update the board to use
+CONFIG_DM_I2C before the v2022.04 release. Failure to
+This board does not use CONFIG_DM_SERIAL (Driver Model
+for Serial drivers). Please update the board to use
+CONFIG_DM_SERIAL before the v2023.04 release. Failure to
+powerpc-linux-ld.bfd: drivers/mtd/nand/raw/fsl_elbc_nand.o: in function 
`fsl_elbc_chip_init':
+drivers/mtd/nand/raw/fsl_elbc_nand.c:749: undefined reference to 
`ofnode_read_string'

+make[1]: *** [Makefile:1813: u-boot] Error 1
+make: *** [Makefile:177: sub-make] Error 2

Build fail.

Regards,
Peng.


---
  drivers/mtd/nand/raw/fsl_elbc_nand.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c 
b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index b0e3eb607ed4..8e14739b3ee9 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -745,7 +745,8 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, struct 
udevice *dev)
return ret;
  
  	/* If nand_scan_ident() has not selected ecc.mode, do it now */

-   if (nand->ecc.mode == NAND_ECC_NONE) {
+   if (nand->ecc.mode == 0 &&
+   !ofnode_read_string(nand->flash_node, "nand-ecc-mode")) {
/* If CS Base Register selects full hardware ECC then use it */
if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
nand->ecc.mode = NAND_ECC_HW;

Re: [PATCH 09/10] tools: zynqmp_psu_init_minimize: Add serdes_illcalib forward declaration

[Michal Simek]

On 6/20/22 09:07, Stefan Herbrechtsmeier wrote:

Am 16.06.2022 um 17:13 schrieb Michal Simek:

On 6/8/22 18:20, Stefan Herbrechtsmeier wrote:

[CAUTION: External Email]

From: Stefan Herbrechtsmeier 

A forward declaration for the serdes_illcalib function.

Signed-off-by: Stefan Herbrechtsmeier 
---

  tools/zynqmp_psu_init_minimize.sh | 5 +
  1 file changed, 5 insertions(+)

diff --git a/tools/zynqmp_psu_init_minimize.sh 
b/tools/zynqmp_psu_init_minimize.sh

index 31fbeac327..8411065e13 100755
--- a/tools/zynqmp_psu_init_minimize.sh
+++ b/tools/zynqmp_psu_init_minimize.sh
@@ -108,6 +108,11 @@ cat << EOF >${TMP}
  #include 
  #include 

+static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate,
+  u32 lane2_protocol, u32 lane2_rate,
+  u32 lane1_protocol, u32 lane1_rate,
+  u32 lane0_protocol, u32 lane0_rate);
+


Better to resort that functions to avoid these additional lines.


Do you propose to move the serdes_illcalib and serdes_illcalib_pcie_gen1 
functions via sed?


swapping that functions should be enough. Whatever tool which does this job is 
fine.



The psu_init_gpl.c for e-a2197-00-revA, zcu208-revA and zcu216-revA already use 
a forward declaration. Would it be okay to add the forward declaration if the 
function is used inside the source file?


Better to just fix this. Can you please send the patch?

Thanks,
Michal

[PATCH 00/10] i2c: Improvements for aspeed boards

[Joel Stanley]

This set of patches clean up the aspeed i2c support for the ast2500 and
enable the ast2600.

It has been tested in qemu and on the ast2600-evb.

Eddie James (1):
  ARM: dts: ast2600: Add I2C pinctrl

Joel Stanley (9):
  ARM: dts: ast2600: Add I2C reset properties
  ARM: dts: ast2600: Dsiable I2C nodes by default
  ARM: dts: ast2500-evb: Add I2C devices
  ARM: dts: ast2600-evb: Add I2C devices
  reset/aspeed: Implement status callback
  i2c/aspeed: Fix reset control
  i2c/aspeed: Add AST2600 compatible
  config/ast2600: Enable I2C driver
  config/aspeed: Enable EEPROM options

 drivers/i2c/ast_i2c.c | 23 +-
 drivers/reset/reset-ast2500.c | 19 
 drivers/reset/reset-ast2600.c | 17 +++
 arch/arm/dts/ast2500-evb.dts  | 19 
 arch/arm/dts/ast2600-evb.dts  | 11 +++
 arch/arm/dts/ast2600.dtsi | 56 +++
 configs/evb-ast2500_defconfig |  3 ++
 configs/evb-ast2600_defconfig |  3 ++
 8 files changed, 144 insertions(+), 7 deletions(-)

-- 
2.35.1

[PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl

[Joel Stanley]

From: Eddie James 

Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.

Signed-off-by: Eddie James 
Signed-off-by: Joel Stanley 
---
 arch/arm/dts/ast2600.dtsi | 33 +
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 64074309b7b2..ef5b131ac0af 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -833,6 +833,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c1_default>;
status = "disabled";
};
 
@@ -846,6 +848,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c2_default>;
status = "disabled";
};
 
@@ -859,6 +863,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c3_default>;
};
 
i2c3: i2c@200 {
@@ -871,6 +877,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c4_default>;
};
 
i2c4: i2c@280 {
@@ -883,6 +891,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c5_default>;
};
 
i2c5: i2c@300 {
@@ -895,6 +905,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c6_default>;
};
 
i2c6: i2c@380 {
@@ -907,6 +919,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c7_default>;
};
 
i2c7: i2c@400 {
@@ -919,6 +933,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c8_default>;
};
 
i2c8: i2c@480 {
@@ -931,6 +947,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c9_default>;
};
 
i2c9: i2c@500 {
@@ -943,6 +961,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c10_default>;
status = "disabled";
};
 
@@ -956,6 +976,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c11_default>;
status = "disabled";
};
 
@@ -969,6 +991,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c12_default>;
status = "disabled";
};
 
@@ -982,6 +1006,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c13_default>;
status = "disabled";
};
 
@@ -995,6 +1021,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c14_default>;
status = "disabled";
};
 
@@ -1008,6 +1036,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c15_default>;
status = "disabled";
};
 
@@ -1021,6 +1051,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = <&scu ASPEED_CLK_APB2>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_i2c16_default>;
status = "disabled";
};
 
@@ -1246,6 +1278,7 @@

[PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties

[Joel Stanley]

The same as the upstream Linux device tree, each i2c bus has a property
specifying the reset line.

Signed-off-by: Joel Stanley 
---
 arch/arm/dts/ast2600.dtsi | 16 
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index ef5b131ac0af..4b23d25ede0a 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -832,6 +832,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_default>;
@@ -847,6 +848,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_default>;
@@ -862,6 +864,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_default>;
@@ -876,6 +879,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_default>;
@@ -890,6 +894,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_default>;
@@ -904,6 +909,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_default>;
@@ -918,6 +924,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c7_default>;
@@ -932,6 +939,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
@@ -946,6 +954,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
@@ -960,6 +969,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c10_default>;
@@ -975,6 +985,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c11_default>;
@@ -990,6 +1001,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c12_default>;
@@ -1005,6 +1017,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts = ;
+   resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c13_default>;
@@ -1020,6 +1033,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <10>;
interrupts

[PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default

[Joel Stanley]

Allow boards to enable the buses they use.

Signed-off-by: Joel Stanley 
---
 arch/arm/dts/ast2600.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 4b23d25ede0a..a37d062bcad7 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -868,6 +868,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_default>;
+   status = "disabled";
};
 
i2c3: i2c@200 {
@@ -883,6 +884,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_default>;
+   status = "disabled";
};
 
i2c4: i2c@280 {
@@ -898,6 +900,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_default>;
+   status = "disabled";
};
 
i2c5: i2c@300 {
@@ -913,6 +916,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_default>;
+   status = "disabled";
};
 
i2c6: i2c@380 {
@@ -928,6 +932,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c7_default>;
+   status = "disabled";
};
 
i2c7: i2c@400 {
@@ -943,6 +948,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
+   status = "disabled";
};
 
i2c8: i2c@480 {
@@ -958,6 +964,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
+   status = "disabled";
};
 
i2c9: i2c@500 {
-- 
2.35.1

[PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices

[Joel Stanley]

The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.

Signed-off-by: Joel Stanley 
---
 arch/arm/dts/ast2500-evb.dts | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index 4796ed445f57..874e042bc4cb 100644
--- a/arch/arm/dts/ast2500-evb.dts
+++ b/arch/arm/dts/ast2500-evb.dts
@@ -73,3 +73,22 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd2_default>;
 };
+
+&i2c3 {
+status = "okay";
+
+eeprom@50 {
+compatible = "atmel,24c08";
+reg = <0x50>;
+pagesize = <16>;
+};
+};
+
+&i2c7 {
+   status = "okay";
+
+lm75@4d {
+compatible = "national,lm75";
+reg = <0x4d>;
+};
+};
-- 
2.35.1

[PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices

[Joel Stanley]

The EVB has an EEPROM on bus 7 and a LM75 temp sensor on bus 8. Enable
those busses we can test the I2C driver.

Signed-off-by: Joel Stanley 
---
 arch/arm/dts/ast2600-evb.dts | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index 0d650543134a..cee787ecc0eb 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -174,6 +174,11 @@
 
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
+
+   temp@2e {
+   compatible = "adi,adt7490";
+   reg = <0x2e>;
+   };
 };
 
 &i2c8 {
@@ -181,6 +186,12 @@
 
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
+
+   eeprom@50 {
+   compatible = "atmel,24c08";
+   reg = <0x50>;
+   pagesize = <16>;
+   };
 };
 
 &mdio0 {
-- 
2.35.1

[PATCH 06/10] reset/aspeed: Implement status callback

[Joel Stanley]

The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.

Signed-off-by: Joel Stanley 
---
 drivers/reset/reset-ast2500.c | 19 +++
 drivers/reset/reset-ast2600.c | 17 +
 2 files changed, 36 insertions(+)

diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c
index 0a1dd236aff3..d9cecf3a72e8 100644
--- a/drivers/reset/reset-ast2500.c
+++ b/drivers/reset/reset-ast2500.c
@@ -48,6 +48,24 @@ static int ast2500_reset_deassert(struct reset_ctl 
*reset_ctl)
return 0;
 }
 
+static int ast2500_reset_status(struct reset_ctl *reset_ctl)
+{
+   struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+   struct ast2500_scu *scu = priv->scu;
+   int status;
+
+   debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
+
+   if (reset_ctl->id < 32)
+   status = BIT(reset_ctl->id) & readl(&scu->sysreset_ctrl1);
+   else
+   status = BIT(reset_ctl->id - 32) & readl(&scu->sysreset_ctrl2);
+
+   return !!status;
+}
+
+
+
 static int ast2500_reset_probe(struct udevice *dev)
 {
int rc;
@@ -79,6 +97,7 @@ static const struct udevice_id ast2500_reset_ids[] = {
 struct reset_ops ast2500_reset_ops = {
.rst_assert = ast2500_reset_assert,
.rst_deassert = ast2500_reset_deassert,
+   .rst_status = ast2500_reset_status,
 };
 
 U_BOOT_DRIVER(ast2500_reset) = {
diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c
index 985235a3ac46..1732a450efc0 100644
--- a/drivers/reset/reset-ast2600.c
+++ b/drivers/reset/reset-ast2600.c
@@ -47,6 +47,22 @@ static int ast2600_reset_deassert(struct reset_ctl 
*reset_ctl)
return 0;
 }
 
+static int ast2600_reset_status(struct reset_ctl *reset_ctl)
+{
+   struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+   struct ast2600_scu *scu = priv->scu;
+   int status;
+
+   debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
+
+   if (reset_ctl->id < 32)
+   status = BIT(reset_ctl->id) & readl(&scu->modrst_ctrl1);
+   else
+   status = BIT(reset_ctl->id - 32) & readl(&scu->modrst_ctrl2);
+
+   return !!status;
+}
+
 static int ast2600_reset_probe(struct udevice *dev)
 {
int rc;
@@ -78,6 +94,7 @@ static const struct udevice_id ast2600_reset_ids[] = {
 struct reset_ops ast2600_reset_ops = {
.rst_assert = ast2600_reset_assert,
.rst_deassert = ast2600_reset_deassert,
+   .rst_status = ast2600_reset_status,
 };
 
 U_BOOT_DRIVER(ast2600_reset) = {
-- 
2.35.1

[PATCH 07/10] i2c/aspeed: Fix reset control

[Joel Stanley]

The reset control was written for the ast2500 and directly programs the
clocking register.

So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.

Signed-off-by: Joel Stanley 
---
 drivers/i2c/ast_i2c.c | 22 +++---
 1 file changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index 2d3fecaa14ea..0a93d7c82911 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "ast_i2c.h"
 
@@ -108,19 +109,26 @@ static int ast_i2c_of_to_plat(struct udevice *dev)
 
 static int ast_i2c_probe(struct udevice *dev)
 {
-   struct ast2500_scu *scu;
+   struct reset_ctl reset_ctl;
+   int rc;
 
debug("Enabling I2C%u\n", dev_seq(dev));
 
/*
 * Get all I2C devices out of Reset.
-* Only needs to be done once, but doing it for every
-* device does not hurt.
+*
+* Only needs to be done once so test before performing reset.
 */
-   scu = ast_get_scu();
-   ast_scu_unlock(scu);
-   clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C);
-   ast_scu_lock(scu);
+   rc = reset_get_by_index(dev, 0, &reset_ctl);
+   if (rc) {
+   printf("%s: Failed to get reset signal\n", __func__);
+   return rc;
+   }
+
+   if (reset_status(&reset_ctl) > 0) {
+   reset_assert(&reset_ctl);
+   reset_deassert(&reset_ctl);
+   }
 
ast_i2c_init_bus(dev);
 
-- 
2.35.1

[PATCH 08/10] i2c/aspeed: Add AST2600 compatible

[Joel Stanley]

Signed-off-by: Joel Stanley 
---
 drivers/i2c/ast_i2c.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index 0a93d7c82911..c9ffe2d62820 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -351,6 +351,7 @@ static const struct dm_i2c_ops ast_i2c_ops = {
 static const struct udevice_id ast_i2c_ids[] = {
{ .compatible = "aspeed,ast2400-i2c-bus" },
{ .compatible = "aspeed,ast2500-i2c-bus" },
+   { .compatible = "aspeed,ast2600-i2c-bus" },
{ },
 };
 
-- 
2.35.1

[PATCH 09/10] config/ast2600: Enable I2C driver

[Joel Stanley]

Signed-off-by: Joel Stanley 
---
 configs/evb-ast2600_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 160bccff48e2..8f34546235a4 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -61,6 +61,7 @@ CONFIG_CLK=y
 CONFIG_SPL_CLK=y
 CONFIG_ASPEED_GPIO=y
 CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_ASPEED=y
 CONFIG_MISC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ASPEED=y
-- 
2.35.1

[PATCH 10/10] config/aspeed: Enable EEPROM options

[Joel Stanley]

To allow testing of the I2C driver, enable the eprom command and the
misc driver.

Signed-off-by: Joel Stanley 
---
 configs/evb-ast2500_defconfig | 3 +++
 configs/evb-ast2600_defconfig | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 2371cc2742cf..3ae07bd4e9e1 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -18,6 +18,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
+CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -33,6 +34,8 @@ CONFIG_CLK=y
 CONFIG_ASPEED_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_ASPEED=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ASPEED=y
 CONFIG_PHY_REALTEK=y
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 8f34546235a4..f2ef84c90c5c 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -42,6 +42,7 @@ CONFIG_SPL_DM_RESET=y
 CONFIG_SPL_RAM_SUPPORT=y
 CONFIG_SPL_RAM_DEVICE=y
 CONFIG_HUSH_PARSER=y
+CONFIG_CMD_EEPROM=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
@@ -63,6 +64,7 @@ CONFIG_ASPEED_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_ASPEED=y
 CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ASPEED=y
 CONFIG_PHY_REALTEK=y
-- 
2.35.1

RE: [PATCH] image: fit: Use stack allocation macro

[ChiaWei Wang]

Tested-by: Chia-Wei Wang 

Thanks for the fix.

Driven by the same issue, We also sent another patch moving .BSS section into 
DRAM.
You may also check it out and any feedback is appreciated.
https://patchwork.ozlabs.org/project/uboot/patch/20220601082115.10799-1-chiawei_w...@aspeedtech.com/

Chiawei

> From: joel.s...@gmail.com  On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:01 PM
> 
> The documentation above the DEFINE_ALIGN_BUFFER says it's for use outside
> functions, but we're inside one.
> 
> Instead use ALLOC_CACHE_ALIGN_BUFFER, the stack based macro, which also
> includes the cache alignment.
> 
> Fixes: b583348ca8c8 ("image: fit: Align hash output buffers")
> Signed-off-by: Joel Stanley 
> ---
> This fixes booting the ast2600-evb image in qemu, which was getting all zeroes
> for the output of the FIT hash check.
> 
> The 'static' buffer was in BSS but the output image didn't contain a BSS 
> section.
> The pointer was left pointing to the text, so the code was trying to write to 
> the
> (read only?) text area in SPI NOR memory space.
> 
>  tools/mkimage.h  | 3 +--
>  boot/image-fit.c | 3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/tools/mkimage.h b/tools/mkimage.h index
> 7652c8b001c3..f5ca65e2edfd 100644
> --- a/tools/mkimage.h
> +++ b/tools/mkimage.h
> @@ -41,8 +41,7 @@ static inline ulong map_to_sysmem(void *ptr)
>   return (ulong)(uintptr_t)ptr;
>  }
> 
> -#define ARCH_DMA_MINALIGN 1
> -#define DEFINE_ALIGN_BUFFER(type, name, size, alugn) type name[size]
> +#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) type name[size]
> 
>  #define MKIMAGE_TMPFILE_SUFFIX   ".tmp"
>  #define MKIMAGE_MAX_TMPFILE_LEN  256
> diff --git a/boot/image-fit.c b/boot/image-fit.c index
> f57d97f55229..df3e5df8836a 100644
> --- a/boot/image-fit.c
> +++ b/boot/image-fit.c
> @@ -1264,8 +1264,7 @@ int calculate_hash(const void *data, int data_len,
> const char *name,  static int fit_image_check_hash(const void *fit, int 
> noffset,
> const void *data,
>   size_t size, char **err_msgp)
>  {
> - DEFINE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN,
> - ARCH_DMA_MINALIGN);
> + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN);
>   int value_len;
>   const char *algo;
>   uint8_t *fit_value;
> --
> 2.35.1

[PATCH] stm32mp: simplify the STM32MP15x package parsing code

[Patrick Delaunay]

Simplify the package parsing code for STM32MP15X as package can be
affected with get_cpu_package() result.

Signed-off-by: Patrick Delaunay 
---

 arch/arm/mach-stm32mp/stm32mp15x.c | 15 +++
 1 file changed, 3 insertions(+), 12 deletions(-)

diff --git a/arch/arm/mach-stm32mp/stm32mp15x.c 
b/arch/arm/mach-stm32mp/stm32mp15x.c
index a093e6163e6..660c907a6ba 100644
--- a/arch/arm/mach-stm32mp/stm32mp15x.c
+++ b/arch/arm/mach-stm32mp/stm32mp15x.c
@@ -274,7 +274,6 @@ static void get_cpu_string_offsets(unsigned int *type, 
unsigned int *pkg,
u32 cpu_type = get_cpu_type();
u32 ct = cpu_type & ~(BIT(7) | BIT(0));
u32 cm = ((cpu_type & BIT(7)) >> 6) | (cpu_type & BIT(0));
-   u32 cp = get_cpu_package();
 
/* Bits 0 and 7 are the ACDF, 00:C 01:A 10:F 11:D */
switch (ct) {
@@ -293,17 +292,9 @@ static void get_cpu_string_offsets(unsigned int *type, 
unsigned int *pkg,
}
 
/* Package */
-   switch (cp) {
-   case STM32MP15_PKG_AA_LBGA448:
-   case STM32MP15_PKG_AB_LBGA354:
-   case STM32MP15_PKG_AC_TFBGA361:
-   case STM32MP15_PKG_AD_TFBGA257:
-   *pkg = cp;
-   break;
-   default:
-   *pkg = 0;
-   break;
-   }
+   *pkg = get_cpu_package();
+   if (*pkg > STM32MP15_PKG_AA_LBGA448)
+   *pkg = STM32MP15_PKG_UNKNOWN;
 
/* Revision */
switch (get_cpu_rev()) {
-- 
2.25.1

[PATCH] led: pwm: Use NOP uclass driver for top-level node

[Stefan Herbrechtsmeier]

From: Stefan Herbrechtsmeier 

The top level DT node of pwm-leds is not a LED itself, bind NOP uclass
driver to it, and bind different LED uclass driver to its subnodes which
represent the actual LEDs. This change removes the top-level node from
the 'led list' command output and is based on the commit 01074697801b
("led: gpio: Use NOP uclass driver for top-level node").

Signed-off-by: Stefan Herbrechtsmeier 

---

 drivers/led/led_pwm.c | 17 +++--
 1 file changed, 7 insertions(+), 10 deletions(-)

diff --git a/drivers/led/led_pwm.c b/drivers/led/led_pwm.c
index 10bd1636c3..7d2f7686be 100644
--- a/drivers/led/led_pwm.c
+++ b/drivers/led/led_pwm.c
@@ -97,10 +97,6 @@ static int led_pwm_probe(struct udevice *dev)
struct led_pwm_priv *priv = dev_get_priv(dev);
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
 
-   /* Ignore the top-level LED node */
-   if (!uc_plat->label)
-   return 0;
-
return led_pwm_set_state(dev, (priv->enabled) ? LEDST_ON : LEDST_OFF);
 }
 
@@ -112,10 +108,6 @@ static int led_pwm_of_to_plat(struct udevice *dev)
uint def_brightness, max_brightness;
int ret;
 
-   /* Ignore the top-level LED node */
-   if (!uc_plat->label)
-   return 0;
-
ret = dev_read_phandle_with_args(dev, "pwms", "#pwm-cells", 0, 0, 
&args);
if (ret)
return ret;
@@ -173,10 +165,15 @@ static const struct udevice_id led_pwm_ids[] = {
 U_BOOT_DRIVER(led_pwm) = {
.name = LEDS_PWM_DRIVER_NAME,
.id = UCLASS_LED,
-   .of_match = led_pwm_ids,
.ops = &led_pwm_ops,
.priv_auto = sizeof(struct led_pwm_priv),
-   .bind = led_pwm_bind,
.probe = led_pwm_probe,
.of_to_plat = led_pwm_of_to_plat,
 };
+
+U_BOOT_DRIVER(led_pwm_wrap) = {
+   .name = LEDS_PWM_DRIVER_NAME "_wrap",
+   .id = UCLASS_NOP,
+   .of_match = led_pwm_ids,
+   .bind = led_pwm_bind,
+};
-- 
2.30.2

Re: [PATCH v5 19/23] FWU: synquacer: Add FWU Multi bank update support for DeveloperBox

[Michal Simek]

On 6/9/22 14:30, Sughosh Ganu wrote:

From: Masami Hiramatsu 

The DeveloperBox platform can support the FWU Multi bank
update. SCP firmware will switch the boot mode by DSW3-4
and load the Multi bank update supported TF-A BL2 from
0x60 offset on the SPI flash. Thus it can co-exist
with the legacy boot mode (legacy U-Boot or EDK2).

Signed-off-by: Masami Hiramatsu 


I am looking at this code again while trying on xilinx HW.


---
  Changes in v3:
   - Change devicetree to add partitions.
   - Update fwu_plat_get_alt_num() to find the alt number from the bank index.
   - Use only 2 partitions for AB update.
   - Clear platform-mdata's boot_count to finish platform trial boot.

Signed-off-by: Sughosh Ganu 
---
  .../synquacer-sc2a11-developerbox-u-boot.dtsi |  15 +-
  board/socionext/developerbox/Kconfig  |  13 ++
  board/socionext/developerbox/Makefile |   1 +
  board/socionext/developerbox/fwu_plat.c   | 207 ++
  include/configs/synquacer.h   |   8 +
  5 files changed, 241 insertions(+), 3 deletions(-)
  create mode 100644 board/socionext/developerbox/fwu_plat.c

diff --git a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi 
b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
index 095727e03c..ab4e3d1c2b 100644
--- a/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
+++ b/arch/arm/dts/synquacer-sc2a11-developerbox-u-boot.dtsi
@@ -23,7 +23,7 @@
active_clk_edges;
chipselect_num = <1>;
  
-		spi-flash@0 {

+   spi_flash: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -84,11 +84,15 @@
label = "UBoot-Env";
reg = <0x58 0x8>;
};
-
+   /* FWU Multi bank update partitions */
partition@60 {
-   label = "FIP";
+   label = "FIP-Bank0";
reg = <0x60 0x40>;
};
+   partition@a0 {
+   label = "FIP-Bank1";
+   reg = <0xa0 0x40>;
+   };
};
};
};
@@ -114,6 +118,11 @@
optee {
status = "okay";
};
+   fwu-mdata {
+   compatible = "u-boot,fwu-mdata-mtd";
+   fwu-mdata-store = <&spi_flash>;
+   mdata-offsets = <0x50 0x53>;
+   };
};
  };
  
diff --git a/board/socionext/developerbox/Kconfig b/board/socionext/developerbox/Kconfig

index c181d26a44..7df6750baf 100644
--- a/board/socionext/developerbox/Kconfig
+++ b/board/socionext/developerbox/Kconfig
@@ -32,4 +32,17 @@ config SYS_CONFIG_NAME
default "synquacer"
  
  endif

+
+config FWU_MULTI_BANK_UPDATE
+   select FWU_MDATA_MTD
+   select DM_SPI_FLASH
+   select DM_FWU_MDATA
+   select BOARD_LATE_INIT
+
+config FWU_NUM_BANKS
+   default 2
+
+config FWU_NUM_IMAGES_PER_BANK
+   default 1
+
  endif
diff --git a/board/socionext/developerbox/Makefile 
b/board/socionext/developerbox/Makefile
index 4a46de995a..9b80ee38e7 100644
--- a/board/socionext/developerbox/Makefile
+++ b/board/socionext/developerbox/Makefile
@@ -7,3 +7,4 @@
  #
  
  obj-y	:= developerbox.o

+obj-$(CONFIG_FWU_MULTI_BANK_UPDATE) += fwu_plat.o
diff --git a/board/socionext/developerbox/fwu_plat.c 
b/board/socionext/developerbox/fwu_plat.c
new file mode 100644
index 00..fd6d0e3659
--- /dev/null
+++ b/board/socionext/developerbox/fwu_plat.c
@@ -0,0 +1,207 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021, Linaro Limited
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+/* SPI Flash accessors */
+static struct spi_flash *plat_spi_flash;
+
+static int __plat_sf_get_flash(void)
+{
+   /* TODO: define platform spi-flash somewhere. */
+   plat_spi_flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
+CONFIG_SF_DEFAULT_CS,
+CONFIG_SF_DEFAULT_SPEED,
+CONFIG_SF_DEFAULT_MODE);
+
+   return 0;


What about if spi_flash_probe() fails?

You are returning 0 here all the time and below you are propagating it that 
everything is fine.






+}
+
+static int plat_sf_get_flash(struct spi_flash **flash)
+{
+   int ret = 0;
+
+   if (!plat_spi_flash)
+   ret = __plat_sf_get_flash();
+
+   *flash = plat_spi_flash;
+
+   return ret;
+}
+
+static 

RE: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy waiting in cm_full_cfg

[Chee, Tien Fong]

Hi,

> -Original Message-
> From: Paweł Anikiel 
> Sent: Friday, 17 June, 2022 6:47 PM
> To: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> Chee, Tien Fong ; michal.si...@xilinx.com
> Cc: u-boot@lists.denx.de; s...@chromium.org; feste...@denx.de;
> ja...@amarulasolutions.com; andre.przyw...@arm.com; Armstrong, Neil
> ; pbrobin...@gmail.com;
> thar...@gateworks.com; paul@linaro.org; christianshew...@gmail.com;
> adrian.fiergol...@fastree3d.com; marek.be...@nic.cz; Denk, Wolfgang
> ; Lim, Elly Siew Chin ;
> upstr...@semihalf.com; ams...@chromium.org; Paweł Anikiel
> 
> Subject: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy waiting
> in cm_full_cfg
> 
> Using udelay while the clocks aren't fully configured causes the timer system
> to save the wrong clock rate. Use sdelay and wait_on_value instead (the
> values used in these functions were found experimentally).
> 
> Signed-off-by: Paweł Anikiel 
> ---
>  arch/arm/mach-socfpga/clock_manager_arria10.c | 31 +-
> -
>  1 file changed, 22 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c
> b/arch/arm/mach-socfpga/clock_manager_arria10.c
> index 58d5d3fd8a..b48a2b47bc 100644
> --- a/arch/arm/mach-socfpga/clock_manager_arria10.c
> +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c

Did you try to call timer_init() after cm_basic_init() in board_init_f? If 
that's working, then no change is required to fix this clock issue.

Thanks.

Best regards,
Tien Fong.

Re: Extend binman to generate boot headers

[Alper Nebi Yasak]

On 16/06/2022 11:45, Peng Fan wrote:
> Hi all,
> 
> I am thinking to extend binman to generate i.MX container
> header and IVT header, that means to replace mkimage to generate header.
> 
> There is an NXP downstream imx-mkimage that diverge from upstream that
> double effort. There are still require quite effort to migrate downstream
> imx-mkimage to upstream. But the good news is that we are trying binman
> in imx-mkimage to pack images. So if we could support binman to generate
> container/IVT headers, NXP downstream and upstream will align the effort
> to focus on binman, not a diverge imx-mkimage.
> 
> How do you think?

Personally I would like this, because I think binman should move towards
a complete understanding of the file formats it has to use and produce.
But I'm not sure what Simon would say here, AFAIK (from some remarks in
binman.rst) he didn't intend binman to replace mkimage. Definitely worth
more discussion.

[PATCH v2 0/6] imx8 ROM API cleanup

[Rasmus Villemoes]

The meat of this is patch 3, and the main simplification it offers is
patch 4.

I have private board code where I will need to fetch some data over
USB during bootstrapping, so having a more convenient API would be
useful. But I do believe these patches make sense in their own right.

v2: The original patches were accidentally not sent to the main U-Boot
list, but only uboot-...@nxp.com and a few individuals.

Peng Fan replied with a R-b for the series, which I've included here
for the first five patches. In patch 6, I missed a place to convert in
the same file, so this is done here, but since the patch is not
identical I've elided the R-b.

Rasmus Villemoes (6):
  imx8: add hidden IMX8_ROMAPI Kconfig symbol
  imx8: sys_proto.h: change guard logic around ROM API
  imx8: add rom api wrappers
  imx8: use ROM API wrappers in spl_imx_romapi.c
  imx8m: soc.c: use rom_api_query_boot_infor() wrapper
  imx8ulp: soc.c: use rom_api_query_boot_infor() wrapper

 arch/arm/include/asm/mach-imx/sys_proto.h |  6 ++-
 arch/arm/mach-imx/Kconfig |  6 ++-
 arch/arm/mach-imx/Makefile|  1 +
 arch/arm/mach-imx/imx8m/soc.c |  5 +--
 arch/arm/mach-imx/imx8ulp/soc.c   | 10 +
 arch/arm/mach-imx/romapi.c| 30 +++
 arch/arm/mach-imx/spl_imx_romapi.c| 47 ++-
 7 files changed, 55 insertions(+), 50 deletions(-)
 create mode 100644 arch/arm/mach-imx/romapi.c

-- 
2.31.1

[PATCH v2 1/6] imx8: add hidden IMX8_ROMAPI Kconfig symbol

[Rasmus Villemoes]

In order not to repeat the IMX8MN || IMX8MP || IMX8ULP logic in
multiple places where we need to know if the SOC exposes the ROM API,
add a "def_bool y" Kconfig symbol.

Reviewed-by: Peng Fan 
Signed-off-by: Rasmus Villemoes 
---
 arch/arm/mach-imx/Kconfig | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index ad0fb36502..50f4c08ea3 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -164,9 +164,13 @@ config DDRMC_VF610_CALIBRATION
  shall perform it on a new PCB and then use those values to program
  the ddrmc_cr_setting on relevant board file.
 
+config IMX8_ROMAPI
+   def_bool y
+   depends on IMX8MN || IMX8MP || IMX8ULP
+
 config SPL_IMX_ROMAPI_LOADADDR
hex "Default load address to load image through ROM API"
-   depends on IMX8MN || IMX8MP || IMX8ULP
+   depends on IMX8_ROMAPI
 
 config IMX_DCD_ADDR
hex "DCD Blocks location on the image"
-- 
2.31.1

[PATCH v2 2/6] imx8: sys_proto.h: change guard logic around ROM API

[Rasmus Villemoes]

This exposes the struct rom_api, the g_rom_api variable declaration
and the associated #defines to slightly fewer boards: namely, those
IMX8M which are not IMX8MN or IMX8MP. But the latter two are the only
IMX8M* ones where the g_rom_api variable is defined (in imx8m/soc.c),
so that should be fine.

Reviewed-by: Peng Fan 
Signed-off-by: Rasmus Villemoes 
---
 arch/arm/include/asm/mach-imx/sys_proto.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h 
b/arch/arm/include/asm/mach-imx/sys_proto.h
index fdbbfb169c..02816197c1 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -146,7 +146,7 @@ struct rproc_att {
u32 size; /* size of reg range */
 };
 
-#if defined(CONFIG_IMX8M) || defined(CONFIG_IMX8ULP)
+#if defined(CONFIG_IMX8_ROMAPI)
 struct rom_api {
u16 ver;
u16 tag;
-- 
2.31.1

[PATCH v2 3/6] imx8: add rom api wrappers

[Rasmus Villemoes]

The ROM API is thoroughly undocumented, but apparently passing the xor
of the real arguments as an extra argument is required [1]. Also, we
need to do the "save gd/restore gd" dance. These are both error-prone,
and lead to a lot of code duplication.

Since both imx8m[np] and imx8ulp SOCs have this, add a separate
translation unit which is included precisely when the new
CONFIG_IMX8_ROMAPI symbol is set, which provide convenience wrappers
that take care of computing the xor value as well as doing the gd
dance, and that thus have a more intuitive API. Subsequent patches
will make use of these to reduce boilerplate.

[1] One wonders, for example, if the check is only applied to the
lower 32 bits, or if we're implicitly relying on all 64-bit pointer
values we're passing effectively have 0 in the upper 32 bits.

Reviewed-by: Peng Fan 
Signed-off-by: Rasmus Villemoes 
---
 arch/arm/include/asm/mach-imx/sys_proto.h |  4 +++
 arch/arm/mach-imx/Makefile|  1 +
 arch/arm/mach-imx/romapi.c| 30 +++
 3 files changed, 35 insertions(+)
 create mode 100644 arch/arm/mach-imx/romapi.c

diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h 
b/arch/arm/include/asm/mach-imx/sys_proto.h
index 02816197c1..fadb67d04a 100644
--- a/arch/arm/include/asm/mach-imx/sys_proto.h
+++ b/arch/arm/include/asm/mach-imx/sys_proto.h
@@ -178,6 +178,10 @@ enum boot_dev_type_e {
 #define ROM_API_OKAY   0xF0
 
 extern struct rom_api *g_rom_api;
+
+u32 rom_api_download_image(u8 *dest, u32 offset, u32 size);
+u32 rom_api_query_boot_infor(u32 info_type, u32 *info);
+
 #endif
 
 /* For i.MX ULP */
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index aa0b6447f1..3cbcb151b8 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -243,3 +243,4 @@ obj-$(CONFIG_ARCH_IMX8) += imx8/
 obj-$(CONFIG_ARCH_IMXRT) += imxrt/
 
 obj-$(CONFIG_SPL_BOOTROM_SUPPORT) += spl_imx_romapi.o
+obj-$(CONFIG_IMX8_ROMAPI) += romapi.o
diff --git a/arch/arm/mach-imx/romapi.c b/arch/arm/mach-imx/romapi.c
new file mode 100644
index 00..0e7b1d1a00
--- /dev/null
+++ b/arch/arm/mach-imx/romapi.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+u32 rom_api_download_image(u8 *dest, u32 offset, u32 size)
+{
+   u32 xor = (uintptr_t)dest ^ offset ^ size;
+   volatile gd_t *sgd = gd;
+   u32 ret;
+
+   ret = g_rom_api->download_image(dest, offset, size, xor);
+   set_gd(sgd);
+
+   return ret;
+}
+
+u32 rom_api_query_boot_infor(u32 info_type, u32 *info)
+{
+   u32 xor = info_type ^ (uintptr_t)info;
+   volatile gd_t *sgd = gd;
+   u32 ret;
+
+   ret = g_rom_api->query_boot_infor(info_type, info, xor);
+   set_gd(sgd);
+
+   return ret;
+}
-- 
2.31.1

[PATCH v2 6/6] imx8ulp: soc.c: use rom_api_query_boot_infor() wrapper

[Rasmus Villemoes]

Signed-off-by: Rasmus Villemoes 
---
 arch/arm/mach-imx/imx8ulp/soc.c | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c
index 35020c9714..c0f0df356e 100644
--- a/arch/arm/mach-imx/imx8ulp/soc.c
+++ b/arch/arm/mach-imx/imx8ulp/soc.c
@@ -36,16 +36,13 @@ struct rom_api *g_rom_api = (struct rom_api *)0x1980;
 
 enum boot_device get_boot_device(void)
 {
-   volatile gd_t *pgd = gd;
int ret;
u32 boot;
u16 boot_type;
u8 boot_instance;
enum boot_device boot_dev = SD1_BOOT;
 
-   ret = g_rom_api->query_boot_infor(QUERY_BT_DEV, &boot,
- ((uintptr_t)&boot) ^ QUERY_BT_DEV);
-   set_gd(pgd);
+   ret = rom_api_query_boot_infor(QUERY_BT_DEV, &boot);
 
if (ret != ROM_API_OKAY) {
puts("ROMAPI: failure at query_boot_info\n");
@@ -91,15 +88,12 @@ __weak int board_mmc_get_env_dev(int devno)
 
 int mmc_get_env_dev(void)
 {
-   volatile gd_t *pgd = gd;
int ret;
u32 boot;
u16 boot_type;
u8 boot_instance;
 
-   ret = g_rom_api->query_boot_infor(QUERY_BT_DEV, &boot,
- ((uintptr_t)&boot) ^ QUERY_BT_DEV);
-   set_gd(pgd);
+   ret = rom_api_query_boot_infor(QUERY_BT_DEV, &boot);
 
if (ret != ROM_API_OKAY) {
puts("ROMAPI: failure at query_boot_info\n");
-- 
2.31.1

[PATCH v2 4/6] imx8: use ROM API wrappers in spl_imx_romapi.c

[Rasmus Villemoes]

Simplify the use of the ROM API by using the wrappers that take care
of saving/restoring gd and computing the xor value. This makes the
generated code smaller and the C code easier to read.

Reviewed-by: Peng Fan 
Signed-off-by: Rasmus Villemoes 
---
 arch/arm/mach-imx/spl_imx_romapi.c | 47 +++---
 1 file changed, 11 insertions(+), 36 deletions(-)

diff --git a/arch/arm/mach-imx/spl_imx_romapi.c 
b/arch/arm/mach-imx/spl_imx_romapi.c
index c47f5a6bdb..cc3c1251dc 100644
--- a/arch/arm/mach-imx/spl_imx_romapi.c
+++ b/arch/arm/mach-imx/spl_imx_romapi.c
@@ -18,15 +18,11 @@ DECLARE_GLOBAL_DATA_PTR;
 /* Caller need ensure the offset and size to align with page size */
 ulong spl_romapi_raw_seekable_read(u32 offset, u32 size, void *buf)
 {
-   volatile gd_t *pgd = gd;
int ret;
 
debug("%s 0x%x, size 0x%x\n", __func__, offset, size);
 
-   ret = g_rom_api->download_image(buf, offset, size,
-   ((uintptr_t)buf) ^ offset ^ size);
-
-   set_gd(pgd);
+   ret = rom_api_download_image(buf, offset, size);
 
if (ret == ROM_API_OKAY)
return size;
@@ -73,21 +69,15 @@ static int spl_romapi_load_image_seekable(struct 
spl_image_info *spl_image,
  struct spl_boot_device *bootdev,
  u32 rom_bt_dev)
 {
-   volatile gd_t *pgd = gd;
int ret;
u32 offset;
u32 pagesize, size;
struct image_header *header;
u32 image_offset;
 
-   ret = g_rom_api->query_boot_infor(QUERY_IVT_OFF, &offset,
- ((uintptr_t)&offset) ^ QUERY_IVT_OFF);
-   ret |= g_rom_api->query_boot_infor(QUERY_PAGE_SZ, &pagesize,
-  ((uintptr_t)&pagesize) ^ 
QUERY_PAGE_SZ);
-   ret |= g_rom_api->query_boot_infor(QUERY_IMG_OFF, &image_offset,
-  ((uintptr_t)&image_offset) ^ 
QUERY_IMG_OFF);
-
-   set_gd(pgd);
+   ret = rom_api_query_boot_infor(QUERY_IVT_OFF, &offset);
+   ret |= rom_api_query_boot_infor(QUERY_PAGE_SZ, &pagesize);
+   ret |= rom_api_query_boot_infor(QUERY_IMG_OFF, &image_offset);
 
if (ret != ROM_API_OKAY) {
puts("ROMAPI: Failure query boot infor pagesize/offset\n");
@@ -102,9 +92,7 @@ static int spl_romapi_load_image_seekable(struct 
spl_image_info *spl_image,
offset = spl_romapi_get_uboot_base(image_offset, rom_bt_dev);
 
size = ALIGN(sizeof(struct image_header), pagesize);
-   ret = g_rom_api->download_image((u8 *)header, offset, size,
-   ((uintptr_t)header) ^ offset ^ size);
-   set_gd(pgd);
+   ret = rom_api_download_image((u8 *)header, offset, size);
 
if (ret != ROM_API_OKAY) {
printf("ROMAPI: download failure offset 0x%x size 0x%x\n",
@@ -251,7 +239,6 @@ static int spl_romapi_load_image_stream(struct 
spl_image_info *spl_image,
struct spl_boot_device *bootdev)
 {
struct spl_load_info load;
-   volatile gd_t *pgd = gd;
u32 pagesize, pg;
int ret;
int i = 0;
@@ -260,9 +247,7 @@ static int spl_romapi_load_image_stream(struct 
spl_image_info *spl_image,
int imagesize;
int total;
 
-   ret = g_rom_api->query_boot_infor(QUERY_PAGE_SZ, &pagesize,
- ((uintptr_t)&pagesize) ^ 
QUERY_PAGE_SZ);
-   set_gd(pgd);
+   ret = rom_api_query_boot_infor(QUERY_PAGE_SZ, &pagesize);
 
if (ret != ROM_API_OKAY)
puts("failure at query_boot_info\n");
@@ -272,9 +257,7 @@ static int spl_romapi_load_image_stream(struct 
spl_image_info *spl_image,
pg = 1024;
 
for (i = 0; i < 640; i++) {
-   ret = g_rom_api->download_image(p, 0, pg,
-   ((uintptr_t)p) ^ pg);
-   set_gd(pgd);
+   ret = rom_api_download_image(p, 0, pg);
 
if (ret != ROM_API_OKAY) {
puts("Steam(USB) download failure\n");
@@ -294,8 +277,7 @@ static int spl_romapi_load_image_stream(struct 
spl_image_info *spl_image,
}
 
if (p - phdr < img_header_size()) {
-   ret = g_rom_api->download_image(p, 0, pg,  ((uintptr_t)p) ^ pg);
-   set_gd(pgd);
+   ret = rom_api_download_image(p, 0, pg);
 
if (ret != ROM_API_OKAY) {
puts("Steam(USB) download failure\n");
@@ -317,9 +299,7 @@ static int spl_romapi_load_image_stream(struct 
spl_image_info *spl_image,
 
printf("Need continue download %d\n", imagesize);
 
-   ret = g_rom_api->download_image(p, 0, imagesize,
-   ((uintptr_t)p) ^ imagesize);
-   set_gd(pgd);
+   ret = rom_api_download_image(p, 0, images

[PATCH v2 5/6] imx8m: soc.c: use rom_api_query_boot_infor() wrapper

[Rasmus Villemoes]

Reviewed-by: Peng Fan 
Signed-off-by: Rasmus Villemoes 
---
 arch/arm/mach-imx/imx8m/soc.c | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 59335356b5..d5eb50143c 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -602,16 +602,13 @@ struct rom_api *g_rom_api = (struct rom_api *)0x980;
 
 enum boot_device get_boot_device(void)
 {
-   volatile gd_t *pgd = gd;
int ret;
u32 boot;
u16 boot_type;
u8 boot_instance;
enum boot_device boot_dev = SD1_BOOT;
 
-   ret = g_rom_api->query_boot_infor(QUERY_BT_DEV, &boot,
- ((uintptr_t)&boot) ^ QUERY_BT_DEV);
-   set_gd(pgd);
+   ret = rom_api_query_boot_infor(QUERY_BT_DEV, &boot);
 
if (ret != ROM_API_OKAY) {
puts("ROMAPI: failure at query_boot_info\n");
-- 
2.31.1

Re: [PATCH 03/10] soc: xilinx: zynqmp: Add machine identification support

[Stefan Herbrechtsmeier]

Am 17.06.2022 um 12:41 schrieb Michal Simek:

On 6/8/22 18:20, Stefan Herbrechtsmeier wrote:

[CAUTION: External Email]

From: Stefan Herbrechtsmeier 

Add machine identification support based on the
zynqmp_get_silicon_idcode_name function in board/xilinx/zynqmp/zynqmp.c.

Signed-off-by: Stefan Herbrechtsmeier 


---

  drivers/soc/soc_xilinx_zynqmp.c | 289 +++-
  1 file changed, 286 insertions(+), 3 deletions(-)

diff --git a/drivers/soc/soc_xilinx_zynqmp.c 
b/drivers/soc/soc_xilinx_zynqmp.c

index a71115b17c..45592ed534 100644
--- a/drivers/soc/soc_xilinx_zynqmp.c
+++ b/drivers/soc/soc_xilinx_zynqmp.c


@@ -54,8 +318,7 @@ static int soc_xilinx_zynqmp_probe(struct udevice 
*dev)


 priv->family = zynqmp_family;

-   if (IS_ENABLED(CONFIG_SPL_BUILD) || current_el() == 3 ||
-   !IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE))
+   if (!IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE))
 ret = zynqmp_mmio_read(ZYNQMP_PS_VERSION, 
&ret_payload[2]);

 else
 ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,


I was looking at code and this change is very interesting.
I think that it can be just
ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0,...
because message can be sent via IPI directly.


Without zynqmp_mmio_read this driver depends on the 
CONFIG_ZYNQMP_FIRMWARE driver.



That means that this should be completely separate patch.


I will add a separate patch.




@@ -65,6 +328,26 @@ static int soc_xilinx_zynqmp_probe(struct udevice 
*dev)


 priv->revision = ret_payload[2] & ZYNQMP_PS_VER_MASK;

+   if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) {


When above change is there you should be able to remove this checking 
because

you should get all payloads back in proper shape.




+   /*
+    * Firmware returns:
+    * payload[0][31:0] = status of the operation
+    * payload[1] = IDCODE
+    * payload[2][19:0] = Version
+    * payload[2][28:20] = EXTENDED_IDCODE
+    * payload[2][29] = PL_INIT
+    */
+   u32 idcode = ret_payload[1];
+   u32 idcode2 = ret_payload[2] >>
+  ZYNQMP_CSU_VERSION_EMPTY_SHIFT;
+   dev_dbg(dev, "IDCODE: 0x%0x, IDCODE2: 0x%0x\n", idcode,
+   idcode2);
+
+   ret = soc_xilinx_zynqmp_detect_machine(dev, idcode, 
idcode2);

+   if (ret)
+   return ret;
+   }
+
 return 0;
  }

--
2.30.2



Regards
  Stefan

[PATCH 03/10] stm32mp: add support of STM32MP13x Rev.Y

[Patrick Delaunay]

Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1002.

Signed-off-by: Patrick Delaunay 
---

 arch/arm/mach-stm32mp/include/mach/sys_proto.h | 1 +
 arch/arm/mach-stm32mp/stm32mp13x.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h 
b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 4b564e86dc5..02debea5469 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -41,6 +41,7 @@ u32 get_cpu_dev(void);
 
 #define CPU_REV1   0x1000
 #define CPU_REV1_1 0x1001
+#define CPU_REV1_2 0x1002
 #define CPU_REV2   0x2000
 #define CPU_REV2_1 0x2001
 
diff --git a/arch/arm/mach-stm32mp/stm32mp13x.c 
b/arch/arm/mach-stm32mp/stm32mp13x.c
index bd3f24c349a..845d973ad1b 100644
--- a/arch/arm/mach-stm32mp/stm32mp13x.c
+++ b/arch/arm/mach-stm32mp/stm32mp13x.c
@@ -126,6 +126,9 @@ void get_soc_name(char name[SOC_NAME_SIZE])
case CPU_REV1_1:
cpu_r = "Z";
break;
+   case CPU_REV1_2:
+   cpu_r = "Y";
+   break;
default:
cpu_r = "?";
break;
-- 
2.25.1

[PATCH 01/10] i2c: stm32: add support for the st,stm32mp13 SOC

[Patrick Delaunay]

The stm32mp13 soc differs from the stm32mp15 in terms of
clear register offset for controlling the FMP (Fast Mode Plus).

Signed-off-by: Patrick Delaunay 
---

 drivers/i2c/stm32f7_i2c.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index c6ae65badb7..bf2a6c9b4bd 100644
--- a/drivers/i2c/stm32f7_i2c.c
+++ b/drivers/i2c/stm32f7_i2c.c
@@ -267,6 +267,10 @@ static const struct stm32_i2c_data stm32mp15_data = {
.fmp_clr_offset = 0x40,
 };
 
+static const struct stm32_i2c_data stm32mp13_data = {
+   .fmp_clr_offset = 0x4,
+};
+
 static int stm32_i2c_check_device_busy(struct stm32_i2c_priv *i2c_priv)
 {
struct stm32_i2c_regs *regs = i2c_priv->regs;
@@ -957,6 +961,7 @@ static const struct dm_i2c_ops stm32_i2c_ops = {
 static const struct udevice_id stm32_i2c_of_match[] = {
{ .compatible = "st,stm32f7-i2c", .data = (ulong)&stm32f7_data },
{ .compatible = "st,stm32mp15-i2c", .data = (ulong)&stm32mp15_data },
+   { .compatible = "st,stm32mp13-i2c", .data = (ulong)&stm32mp13_data },
{}
 };
 
-- 
2.25.1

[PATCH 05/10] ARM: dts: stm32mp13: activate led on STM32MP13F-DK

[Patrick Delaunay]

Activate the led managed in stm32mp1 board for U-Boot indication
in STM32MP13F-DK device tree.

Signed-off-by: Patrick Delaunay 
---

 arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi 
b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
index dfe5bbb2e34..cbe4eb56083 100644
--- a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
@@ -11,8 +11,18 @@
};
 
config {
+   u-boot,boot-led = "led-blue";
+   u-boot,error-led = "led-red";
u-boot,mmc-env-partition = "u-boot-env";
};
+
+   leds {
+   led-red {
+   color = ;
+   gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
+   default-state = "off";
+   };
+   };
 };
 
 &uart4 {
-- 
2.25.1

[PATCH 04/10] ARM: dts: stm32mp13: alignment with v5.19

[Patrick Delaunay]

Device tree alignment with Linux kernel v5.19-rc1 with:
- ARM: dts: stm32: add UserPA13 button on stm32mp135f-dk
- ARM: dts: stm32: add blue led (Linux heartbeat) on stm32mp135f-dk
- ARM: dts: stm32: add EXTI interrupt-parent to pinctrl node on stm32mp131
- ARM: dts: stm32: enable RTC support on stm32mp135f-dk
- ARM: dts: stm32: add RTC node on stm32mp131
- ARM: dts: stm32: fix pinctrl node name warnings (MPU soc)

Signed-off-by: Patrick Delaunay 
---

 arch/arm/dts/stm32mp131.dtsi| 19 ++-
 arch/arm/dts/stm32mp135f-dk.dts | 29 +
 2 files changed, 47 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
index 950e172e455..a30989f287e 100644
--- a/arch/arm/dts/stm32mp131.dtsi
+++ b/arch/arm/dts/stm32mp131.dtsi
@@ -75,6 +75,12 @@
compatible = "fixed-clock";
clock-frequency = <9900>;
};
+
+   clk_rtc_k: clk-rtc-k {
+   #clock-cells = <0>;
+   compatible = "fixed-clock";
+   clock-frequency = <32768>;
+   };
};
 
intc: interrupt-controller@a0021000 {
@@ -218,6 +224,15 @@
status = "disabled";
};
 
+   rtc: rtc@5c004000 {
+   compatible = "st,stm32mp1-rtc";
+   reg = <0x5c004000 0x400>;
+   interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
+   clocks = <&clk_pclk4>, <&clk_rtc_k>;
+   clock-names = "pclk", "rtc_ck";
+   status = "disabled";
+   };
+
bsec: efuse@5c005000 {
compatible = "st,stm32mp13-bsec";
reg = <0x5c005000 0x400>;
@@ -239,11 +254,13 @@
 * Break node order to solve dependency probe issue between
 * pinctrl and exti.
 */
-   pinctrl: pin-controller@50002000 {
+   pinctrl: pinctrl@50002000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "st,stm32mp135-pinctrl";
ranges = <0 0x50002000 0x8400>;
+   interrupt-parent = <&exti>;
+   st,syscfg = <&exti 0x60 0xff>;
pins-are-numbered;
 
gpioa: gpio@50002000 {
diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts
index ee100d108ea..09d6226d598 100644
--- a/arch/arm/dts/stm32mp135f-dk.dts
+++ b/arch/arm/dts/stm32mp135f-dk.dts
@@ -6,6 +6,9 @@
 
 /dts-v1/;
 
+#include 
+#include 
+#include 
 #include "stm32mp135.dtsi"
 #include "stm32mp13xf.dtsi"
 #include "stm32mp13-pinctrl.dtsi"
@@ -23,6 +26,28 @@
reg = <0xc000 0x2000>;
};
 
+   gpio-keys {
+   compatible = "gpio-keys";
+
+   user-pa13 {
+   label = "User-PA13";
+   linux,code = ;
+   gpios = <&gpioa 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+   };
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   led-blue {
+   function = LED_FUNCTION_HEARTBEAT;
+   color = ;
+   gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+   };
+
vdd_sd: vdd-sd {
compatible = "regulator-fixed";
regulator-name = "vdd_sd";
@@ -37,6 +62,10 @@
status = "okay";
 };
 
+&rtc {
+   status = "okay";
+};
+
 &sdmmc1 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
-- 
2.25.1

[PATCH 02/10] rng: stm32mp1_rng: add conditional reset feature for STM32MP13x

[Patrick Delaunay]

From: Lionel Debieve 

New IP adds a conditional reset that impact the clock
error management. It is now linked to a new compatible.

Signed-off-by: Lionel Debieve 
Signed-off-by: Patrick Delaunay 
---

 drivers/rng/stm32mp1_rng.c | 61 +-
 1 file changed, 47 insertions(+), 14 deletions(-)

diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c
index 8ea00e3e890..89da78c6c8b 100644
--- a/drivers/rng/stm32mp1_rng.c
+++ b/drivers/rng/stm32mp1_rng.c
@@ -18,22 +18,28 @@
 #include 
 #include 
 
-#define RNG_CR 0x00
-#define RNG_CR_RNGEN BIT(2)
-#define RNG_CR_CED BIT(5)
+#define RNG_CR 0x00
+#define RNG_CR_RNGEN   BIT(2)
+#define RNG_CR_CED BIT(5)
+#define RNG_CR_CONDRST BIT(30)
 
-#define RNG_SR 0x04
-#define RNG_SR_SEIS BIT(6)
-#define RNG_SR_CEIS BIT(5)
-#define RNG_SR_SECS BIT(2)
-#define RNG_SR_DRDY BIT(0)
+#define RNG_SR 0x04
+#define RNG_SR_SEISBIT(6)
+#define RNG_SR_CEISBIT(5)
+#define RNG_SR_SECSBIT(2)
+#define RNG_SR_DRDYBIT(0)
 
-#define RNG_DR 0x08
+#define RNG_DR 0x08
+
+struct stm32_rng_data {
+   bool has_cond_reset;
+};
 
 struct stm32_rng_plat {
fdt_addr_t base;
struct clk clk;
struct reset_ctl rst;
+   const struct stm32_rng_data *data;
 };
 
 static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
@@ -83,18 +89,36 @@ static int stm32_rng_read(struct udevice *dev, void *data, 
size_t len)
 static int stm32_rng_init(struct stm32_rng_plat *pdata)
 {
int err;
+   u32 cr, sr;
 
err = clk_enable(&pdata->clk);
if (err)
return err;
 
+   cr = readl(pdata->base + RNG_CR);
+
/* Disable CED */
-   writel(RNG_CR_RNGEN | RNG_CR_CED, pdata->base + RNG_CR);
+   cr |= RNG_CR_CED;
+   if (pdata->data->has_cond_reset) {
+   cr |= RNG_CR_CONDRST;
+   writel(cr, pdata->base + RNG_CR);
+   cr &= ~RNG_CR_CONDRST;
+   writel(cr, pdata->base + RNG_CR);
+   err = readl_poll_timeout(pdata->base + RNG_CR, cr,
+(!(cr & RNG_CR_CONDRST)), 1);
+   if (err)
+   return err;
+   }
 
/* clear error indicators */
writel(0, pdata->base + RNG_SR);
 
-   return 0;
+   cr |= RNG_CR_RNGEN;
+   writel(cr, pdata->base + RNG_CR);
+
+   err = readl_poll_timeout(pdata->base + RNG_SR, sr,
+sr & RNG_SR_DRDY, 1);
+   return err;
 }
 
 static int stm32_rng_cleanup(struct stm32_rng_plat *pdata)
@@ -108,6 +132,8 @@ static int stm32_rng_probe(struct udevice *dev)
 {
struct stm32_rng_plat *pdata = dev_get_plat(dev);
 
+   pdata->data = (struct stm32_rng_data *)dev_get_driver_data(dev);
+
reset_assert(&pdata->rst);
udelay(20);
reset_deassert(&pdata->rst);
@@ -146,10 +172,17 @@ static const struct dm_rng_ops stm32_rng_ops = {
.read = stm32_rng_read,
 };
 
+static const struct stm32_rng_data stm32mp13_rng_data = {
+   .has_cond_reset = true,
+};
+
+static const struct stm32_rng_data stm32_rng_data = {
+   .has_cond_reset = false,
+};
+
 static const struct udevice_id stm32_rng_match[] = {
-   {
-   .compatible = "st,stm32-rng",
-   },
+   {.compatible = "st,stm32mp13-rng", .data = (ulong)&stm32mp13_rng_data},
+   {.compatible = "st,stm32-rng", .data = (ulong)&stm32_rng_data},
{},
 };
 
-- 
2.25.1

[PATCH 06/10] configs: stm32mp13: Add support for baudrates higher than 115200

[Patrick Delaunay]

On STM32MP13x STMicroelectronics boards, the UART can reliably go up to
400 bauds when connected to the external ST-LINKV3.

This patch adds the support of higher baudrates on STMicroelectronics
STM32MP13x boards with ST-LINKV3.

Signed-off-by: Patrick Delaunay 
---

 include/configs/stm32mp13_st_common.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/configs/stm32mp13_st_common.h 
b/include/configs/stm32mp13_st_common.h
index ec64b12f7ab..c51022b40d2 100644
--- a/include/configs/stm32mp13_st_common.h
+++ b/include/configs/stm32mp13_st_common.h
@@ -14,4 +14,9 @@
 
 #include 
 
+/* uart with on-board st-link */
+#define CONFIG_SYS_BAUDRATE_TABLE  { 9600, 19200, 38400, 57600, 115200, \
+230400, 460800, 921600, \
+100, 200, 400}
+
 #endif
-- 
2.25.1

[PATCH 07/10] configs: stm32mp13: activate RNG support

[Patrick Delaunay]

Activate the RNG driver provided by OP-TEE.

Signed-off-by: Patrick Delaunay 
---

 configs/stm32mp13_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index b5dcec78f51..3fa1642b2e4 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -27,6 +27,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
+CONFIG_CMD_RNG=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_LOG=y
 CONFIG_OF_LIVE=y
@@ -44,6 +45,8 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_REGULATOR_SCMI=y
 CONFIG_RESET_SCMI=y
+CONFIG_DM_RNG=y
+CONFIG_RNG_OPTEE=y
 CONFIG_SERIAL_RX_BUFFER=y
 CONFIG_SYSRESET_PSCI=y
 CONFIG_TEE=y
-- 
2.25.1

[PATCH 08/10] configs: stm32mp13: activate RTC support

[Patrick Delaunay]

Activate the RTC driver in STM32MP13x config.

Signed-off-by: Patrick Delaunay 
---

 configs/stm32mp13_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index 3fa1642b2e4..9b0c5a36b04 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -47,6 +47,8 @@ CONFIG_DM_REGULATOR_SCMI=y
 CONFIG_RESET_SCMI=y
 CONFIG_DM_RNG=y
 CONFIG_RNG_OPTEE=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_STM32=y
 CONFIG_SERIAL_RX_BUFFER=y
 CONFIG_SYSRESET_PSCI=y
 CONFIG_TEE=y
-- 
2.25.1

[PATCH 09/10] configs: stm32mp13: activate I2C support

[Patrick Delaunay]

Activate the I2C driver in STM32MP13x config.

Signed-off-by: Patrick Delaunay 
---

 configs/stm32mp13_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index 9b0c5a36b04..f58c73b7c79 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -24,6 +24,7 @@ CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
@@ -37,6 +38,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=-1
 CONFIG_CLK_SCMI=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_STM32F7=y
 CONFIG_STM32_SDMMC2=y
 CONFIG_DM_ETH=y
 CONFIG_PINCONF=y
-- 
2.25.1

[PATCH 10/10] configs: stm32mp13: activate some command

[Patrick Delaunay]

Activate useful commands in STM32MP13x config, already activated in
stm32mp15_defconfig.

Signed-off-by: Patrick Delaunay 
---

 configs/stm32mp13_defconfig | 16 
 1 file changed, 16 insertions(+)

diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index f58c73b7c79..f94798a9ff8 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -20,17 +20,25 @@ CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
 CONFIG_SYS_PROMPT="STM32MP> "
 CONFIG_CMD_ADTIMG=y
 CONFIG_CMD_ERASEENV=y
+CONFIG_CMD_NVEDIT_EFI=y
 CONFIG_CMD_MEMINFO=y
 CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_UNZIP=y
 CONFIG_CMD_CLK=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
+CONFIG_CMD_LSBLK=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_CACHE=y
+CONFIG_CMD_EFIDEBUG=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_RNG=y
 CONFIG_CMD_TIMER=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_MTDPARTS=y
 CONFIG_CMD_LOG=y
+CONFIG_CMD_UBI=y
 CONFIG_OF_LIVE=y
 CONFIG_ENV_IS_NOWHERE=y
 CONFIG_ENV_IS_IN_MMC=y
@@ -38,9 +46,16 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SYS_MMC_ENV_DEV=-1
 CONFIG_CLK_SCMI=y
+CONFIG_GPIO_HOG=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_STM32F7=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SUPPORT_EMMC_BOOT=y
 CONFIG_STM32_SDMMC2=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_SYS_MTDPARTS_RUNTIME=y
 CONFIG_DM_ETH=y
 CONFIG_PINCONF=y
 CONFIG_DM_REGULATOR=y
@@ -58,6 +73,7 @@ CONFIG_TEE=y
 CONFIG_OPTEE=y
 # CONFIG_OPTEE_TA_AVB is not set
 CONFIG_ERRNO_STR=y
+CONFIG_FDT_FIXUP_PARTITIONS=y
 # CONFIG_LMB_USE_MAX_REGIONS is not set
 CONFIG_LMB_MEMORY_REGIONS=2
 CONFIG_LMB_RESERVED_REGIONS=16
-- 
2.25.1

[PULL] Pull request for u-boot next / v2022.10 = u-boot-stm32-20220620

[Patrick DELAUNAY]

I Tom,

Please pull the STM32 related fixes for u-boot/next, v2022.10: 
u-boot-stm32-20220620


- Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards

CI status: 
https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/12393


Thanks,
Patrick

git request-pull 
origin/nexthttps://source.denx.de/u-boot/custodians/u-boot-stm.git/ 
u-boot-stm32-20220620


The following changes since commit 98c4828740f4944462b7d9608b95d5b73850c7b0:

  Merge branch 'next' of 
https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next 
(2022-06-16 09:27:43 -0400)


are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-stm.git/ 
tags/u-boot-stm32-20220620


for you to fetch changes up to eae488b77906692627622abc61f5b7160b6eb2a4:

  stm32mp1: fix reference for STMicroelectronics (2022-06-17 14:12:27 
+0200)



- Add STM32MP13 SoCs support with associated board STM32M135F-DK
- Correct livetree support in stm32mp1 boards
- Activate livetree for stm32mp15 DHSOM boards


Patrick Delaunay (27):
  ARM: dts: stm32: add STM32MP13 SoCs support
  configs: stm32mp1: move SUPPORT_SPL in STM32MP15x
  arm: stm32mp: move the get_otp helper function in bsec
  arm: stm32mp: move code for STM32MP15x
  arm: stm32mp: add choice for STM32MP SOC family
  arm: stm32mp: add sub config Kconfig.15x
  arm: stm32mp: add CONFIG_STM32MP15_PWR
  arm: stm32mp: add support of STM32MP13x
  arm: stm32mp: support 2 MAC address for STM32MP13
  pinctrl: stm32: add support of STM32MP135
  board: stm32pm1: add stm32mp13 board support
  ram: stm32mp1: add support of STM32MP13x
  mmc: stm32_sdmmc2: make reset property optional
  arm: dts: stm32mp: add stm32mp13 device tree for U-Boot
  configs: add stm32mp13 defconfig
  doc: st: stm32mp1: add STM32MP13x support
  stm32mp: fdt: update etzpc for STM32MP15x
  stm32mp: fdt: update etzpc for STM32MP13x
  clk: Add directory for STM32 clock drivers
  misc: stm32mp13: introduce STM32MP13 RCC driver
  board: stm32mp1: convert to livetree
  board: engicam: stm32mp1: convert to livetree
  board: dhelectronics: stm32mp1: convert to livetree
  ARM: stm32: activate OF_LIVE for DHSOM
  stm32mp: stpmic1: remove the debug unit request by debugger
  configs: stm32mp: cleanup the stm32mp15 file
  stm32mp1: fix reference for STMicroelectronics

 MAINTAINERS |   2 +-
 arch/arm/Kconfig |   3 +-
 arch/arm/cpu/armv7/stv0991/lowlevel.S |   2 +-
 arch/arm/dts/Makefile |   3 ++
 arch/arm/dts/stm32mp13-pinctrl.dtsi | 123 
+++

 arch/arm/dts/stm32mp13-u-boot.dtsi |  91 
 arch/arm/dts/stm32mp131.dtsi    | 358 


 arch/arm/dts/stm32mp133.dtsi |  37 +
 arch/arm/dts/stm32mp135.dtsi |  12 +
 arch/arm/dts/stm32mp135f-dk-u-boot.dtsi |  30 +++
 arch/arm/dts/stm32mp135f-dk.dts |  57 
 arch/arm/dts/stm32mp13xc.dtsi |  17 ++
 arch/arm/dts/stm32mp13xf.dtsi |  17 ++
 arch/arm/mach-sti/Kconfig |   2 +-
 arch/arm/mach-stm32mp/Kconfig   | 146 
+--

 arch/arm/mach-stm32mp/Kconfig.13x |  57 
 arch/arm/mach-stm32mp/Kconfig.15x   | 135 
+++

 arch/arm/mach-stm32mp/Makefile |   5 +-
 arch/arm/mach-stm32mp/bsec.c |  17 ++
 arch/arm/mach-stm32mp/cpu.c | 392 

 arch/arm/mach-stm32mp/fdt.c | 277 


 arch/arm/mach-stm32mp/include/mach/stm32.h |  27 +-
 arch/arm/mach-stm32mp/include/mach/sys_proto.h |  34 ++--
 arch/arm/mach-stm32mp/spl.c |   1 +
 arch/arm/mach-stm32mp/stm32mp13x.c  | 135 
+++
 arch/arm/mach-stm32mp/stm32mp15x.c  | 350 
+

 board/dhelectronics/dh_stm32mp1/board.c |  38 ++
 board/engicam/stm32mp1/stm32mp1.c |   6 +--
 board/st/common/stpmic1.c |  14 -
 board/st/stm32mp1/Kconfig |  15 ++
 board/st/stm32mp1/MAINTAINERS |   4 ++
 board/st/stm32mp1/

Re: [PATCH 02/10] firmware: firmware-zynqmp: Probe driver before use

[Stefan Herbrechtsmeier]

Am 20.06.2022 um 08:51 schrieb Michal Simek:

Hi,

On 6/20/22 08:40, Stefan Herbrechtsmeier wrote:

Am 16.06.2022 um 16:22 schrieb Michal Simek:

On 6/8/22 18:20, Stefan Herbrechtsmeier wrote:

[CAUTION: External Email]

From: Stefan Herbrechtsmeier 

Probe the driver before use to ensure that the global data are valid.


It is not clear what the issue is. And this function is called in SPL 
or EL3 and likely multiple times.

Can you please clarify?


The driver only works if it is used after u-boot,dm-pre-reloc. This 
change is needed to support a usage by other drivers like 
xlnx,zynqmp-firmware.


Can you please describe the case, execution path where it is used before?


I released the problem with the soc_xilinx_zynqmp driver. The driver was 
probed before the firmware-zynqmp driver.


At the moment every user of xilinx_pm_request function have to ensure 
that the firmware-zynqmp driver was probed.




Also that calling multiple times is just adding overhead for boot up 
time. We should try to avoid it as much as possible.


Should I zero zynqmp_power and only probe if it is zero?

The solution is based on the psci driver.

Regards
  Stefan

Re: [PATCH 10/10] xilinx: zynqmp: Support vendor specific board_init

[Stefan Herbrechtsmeier]

Am 20.06.2022 um 08:53 schrieb Michal Simek:

On 6/20/22 08:48, Stefan Herbrechtsmeier wrote:

Am 16.06.2022 um 17:12 schrieb Michal Simek:



On 6/8/22 18:20, Stefan Herbrechtsmeier wrote:

[CAUTION: External Email]

From: Stefan Herbrechtsmeier 

Add a board_init_xilinx function to allow foreign vendors to reuse the
xilinx zynqmp board code and add addition code to the board_init
function.


Do you plan to add support for that board who will be using it?


Yes. You could drop the patch for now but it will be good to know if 
this is the right direction to reuse common code from the xilinx board 
files.


Hard to say without seeing what others need to do at this stage.
I am not saying it is bad directly but question I have is what you have 
there that you need it. Maybe this is something what others want to use 
too and we can integrated it directly to common xilinx files.


I will drop it for now. Let's discuss it together with code that use it.

Regards
  Stefan

Please pull u-boot-fsl-qoirq: next

[Peng Fan (OSS)]

Hi Tom,

Please pull u-boot-fsl-qoriq for next

CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/12429

--
Layerscape: 
 add sfp driver
 Kconfig cleanup
 sl28 board update
 support hdp firmware loading
powerpc:
 dts update for p2020
 p1_p2_rdb_pc board update
 fsl_esdhc fallback to 1-bit mode support
--

Thanks,
Peng.

The following changes since commit 98c4828740f4944462b7d9608b95d5b73850c7b0:

  Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx 
into next (2022-06-16 09:27:43 -0400)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git 
tags/fsl-qoriq-2022-6-20-v2

for you to fetch changes up to 7bc683afda5ede82cfcace77cecab1891d6d93ff:

  board: sl28: rename include guard macro (2022-06-20 15:52:45 +0800)


Alison Wang (1):
  ls1028a: hdp: Add config support for HDP firmware loading

Michael Walle (5):
  armv8: layerscape: add missing RCW source defines
  board: sl28: set CPO value
  board: sl28: remove unneeded ddr config parameter
  board: sl28: support 8 GiB memory
  board: sl28: rename include guard macro

Pali Rohár (16):
  powerpc: dts: p2020: Define MPIC nodes
  powerpc: dts: p2020: Define crypto node
  powerpc: dts: p2020: Define DMA nodes
  powerpc: dts: p2020: Define ecm, memory and guts nodes
  powerpc: mpc85xx: Fix compilation with CONFIG_WDT
  board: freescale: p1_p2_rdb_pc: Enable TDM function only for P1010
  board: freescale: p1_p2_rdb_pc: Implement board_reset()
  powerpc: fsl_law: Add definition for first PCIe target interface
  powerpc: mmu: Fix FSL_BOOKE_MAS2() macro
  mtd: rawnand: fsl_elbc: Fix DM support in DTS code path
  powerpc: mpc85xx: Set default SYS_IMMR value for P1/P2 CPUs
  mmc: fsl_esdhc: Set fallback mode to 1-bit
  mmc: fsl_esdhc: Add new config option for default fallback mode
  powerpc: dts: p2020: Define PMC node
  board: freescale: p1_p2_rdb_pc: Move boot reset macros to p1_p2_bootsrc.h
  powerpc: bootm: Fix sizes in memory adjusting warning

Sean Anderson (4):
  arm: layerscape: Add sfp driver
  ARM: dts: ls1021a: update the clockgen node
  arch: layerscape: Add SFP binding
  ARM: layerscape: Use ARCH_LS104?A insead of TARGET_LS104?ARDB

 MAINTAINERS|   5 ++
 arch/Kconfig   |   3 ++
 arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c|  10 ++--
 arch/arm/dts/fsl-ls1012a.dtsi  |   7 +++
 arch/arm/dts/fsl-ls1043a.dtsi  |   7 +++
 arch/arm/dts/fsl-ls1046a.dtsi  |   7 +++
 arch/arm/dts/ls1021a.dtsi  |  87 
--
 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h |   4 ++
 arch/powerpc/cpu/mpc85xx/cpu.c |   2 +
 arch/powerpc/dts/p2020-post.dtsi   |  36 +
 arch/powerpc/dts/pq3-dma-0.dtsi|  66 
+++
 arch/powerpc/dts/pq3-dma-1.dtsi|  66 
+++
 arch/powerpc/dts/pq3-mpic-timer-B.dtsi |  42 +++
 arch/powerpc/dts/pq3-mpic.dtsi |  79 
+++
 arch/powerpc/dts/pq3-sec3.1-0.dtsi |  45 
 arch/powerpc/include/asm/fsl_law.h |   1 +
 arch/powerpc/include/asm/mmu.h |   2 +-
 arch/powerpc/lib/bootm.c   |   3 +-
 board/freescale/ls1028a/ls1028a.c  |   7 ++-
 board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c|   8 +++
 board/kontron/sl28/ddr.c   |  12 -
 configs/ls1028aqds_tfa_SECURE_BOOT_defconfig   |   2 +
 configs/ls1028aqds_tfa_defconfig   |   2 +
 configs/ls1028ardb_tfa_SECURE_BOOT_defconfig   |   2 +
 configs/ls1028ardb_tfa_defconfig   |   2 +
 drivers/misc/Kconfig   |  14 +
 drivers/misc/Makefile  |   1 +
 drivers/misc/ls2_sfp.c | 350 
++
 drivers/mmc/Kconfig|   5 ++
 drivers/mmc/fsl_esdhc.c|   6 +--
 drivers/mtd/nand/raw/fsl_elbc_nand.c   |   9 ++--
 include/configs/kontron_sl28.h |   6 +--
 include/configs/p1_p2_bootsrc.h|  59 

 include/configs/p1_p2_rdb_pc.h |  41 --
 34 files changed,

[PATCH] video: stm32: remove test on CONFIG_DM_REGULATOR

[Patrick Delaunay]

The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b439
("power: regulator: add dummy helper").

Signed-off-by: Patrick Delaunay 
---

 drivers/video/stm32/stm32_dsi.c | 25 +++--
 1 file changed, 11 insertions(+), 14 deletions(-)

diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index 134abd93e19..5871ac7c4ff 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -433,19 +433,17 @@ static int stm32_dsi_probe(struct udevice *dev)
return -EINVAL;
}
 
-   if (IS_ENABLED(CONFIG_DM_REGULATOR)) {
-   ret =  device_get_supply_regulator(dev, "phy-dsi-supply",
-  &priv->vdd_reg);
-   if (ret && ret != -ENOENT) {
-   dev_err(dev, "Warning: cannot get phy dsi supply\n");
-   return -ENODEV;
-   }
+   ret =  device_get_supply_regulator(dev, "phy-dsi-supply",
+  &priv->vdd_reg);
+   if (ret && ret != -ENOENT) {
+   dev_err(dev, "Warning: cannot get phy dsi supply\n");
+   return -ENODEV;
+   }
 
-   if (ret != -ENOENT) {
-   ret = regulator_set_enable(priv->vdd_reg, true);
-   if (ret)
-   return ret;
-   }
+   if (ret != -ENOENT) {
+   ret = regulator_set_enable(priv->vdd_reg, true);
+   if (ret)
+   return ret;
}
 
ret = clk_get_by_name(device->dev, "pclk", &clk);
@@ -493,8 +491,7 @@ static int stm32_dsi_probe(struct udevice *dev)
 err_clk:
clk_disable(&clk);
 err_reg:
-   if (IS_ENABLED(CONFIG_DM_REGULATOR))
-   regulator_set_enable(priv->vdd_reg, false);
+   regulator_set_enable(priv->vdd_reg, false);
 
return ret;
 }
-- 
2.25.1

[PATCH] board: stm32mp1: remove test on CONFIG_DM_REGULATOR

[Patrick Delaunay]

The tests on CONFIG_DM_REGULATOR, added to avoid compilation issues, can
now be removed, they are no more needed since the commit 16cc5ad0b439
("power: regulator: add dummy helper").

Signed-off-by: Patrick Delaunay 
---

 board/st/stm32mp1/stm32mp1.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 9496890d164..8c162b42a59 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -494,7 +494,7 @@ static void sysconf_init(void)
ret = uclass_get_device_by_driver(UCLASS_PMIC,
  DM_DRIVER_GET(stm32mp_pwr_pmic),
  &pwr_dev);
-   if (!ret && IS_ENABLED(CONFIG_DM_REGULATOR)) {
+   if (!ret) {
ret = uclass_get_device_by_driver(UCLASS_MISC,
  DM_DRIVER_GET(stm32mp_bsec),
  &dev);
@@ -555,9 +555,6 @@ static int board_stm32mp15x_dk2_init(void)
struct gpio_desc hdmi, audio;
int ret = 0;
 
-   if (!IS_ENABLED(CONFIG_DM_REGULATOR))
-   return -ENODEV;
-
/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
if (!ofnode_valid(node)) {
@@ -658,8 +655,7 @@ int board_init(void)
if (board_is_stm32mp15x_dk2())
board_stm32mp15x_dk2_init();
 
-   if (IS_ENABLED(CONFIG_DM_REGULATOR))
-   regulators_enable_boot_on(_DEBUG);
+   regulators_enable_boot_on(_DEBUG);
 
/*
 * sysconf initialisation done only when U-Boot is running in secure
-- 
2.25.1

[PATCH v2] mmc: fsl_esdhc_spl: Add support for loading proper U-Boot from unaligned location

[Pali Rohár]

This allows to concatenate SPL and proper U-Boot without extra alignment.

Signed-off-by: Pali Rohár 
---
Changes in v2:
* Rebased on top of the U-Boot next branch, commit 
98c4828740f4944462b7d9608b95d5b73850c7b0
---
 drivers/mmc/fsl_esdhc_spl.c | 27 +++
 1 file changed, 23 insertions(+), 4 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c
index 760f13d24018..54bf8152ca7a 100644
--- a/drivers/mmc/fsl_esdhc_spl.c
+++ b/drivers/mmc/fsl_esdhc_spl.c
@@ -58,10 +58,10 @@ void __noreturn mmc_boot(void)
 {
__attribute__((noreturn)) void (*uboot)(void);
uint blk_start, blk_cnt, err;
+   u32 blk_off;
 #ifndef CONFIG_FSL_CORENET
uchar *tmp_buf;
u32 blklen;
-   u32 blk_off;
uchar val;
 #ifndef CONFIG_SPL_FSL_PBL
u32 val32;
@@ -155,10 +155,21 @@ again:
* Load U-Boot image from mmc into RAM
*/
code_len = CONFIG_SYS_MMC_U_BOOT_SIZE;
-   blk_start = ALIGN(offset, mmc->read_bl_len) / mmc->read_bl_len;
-   blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len;
+   blk_start = offset / mmc->read_bl_len;
+   blk_off = offset % mmc->read_bl_len;
+   blk_cnt = ALIGN(code_len, mmc->read_bl_len) / mmc->read_bl_len + 1;
+   if (blk_off) {
+   err = mmc->block_dev.block_read(&mmc->block_dev,
+   blk_start, 1, tmp_buf);
+   if (err != 1) {
+   puts("spl: mmc read failed!!\n");
+   hang();
+   }
+   blk_start++;
+   }
err = mmc->block_dev.block_read(&mmc->block_dev, blk_start, blk_cnt,
-   (uchar *)CONFIG_SYS_MMC_U_BOOT_DST);
+   (uchar *)CONFIG_SYS_MMC_U_BOOT_DST +
+   (blk_off ? (mmc->read_bl_len - blk_off) 
: 0));
if (err != blk_cnt) {
puts("spl: mmc read failed!!\n");
 #ifndef CONFIG_FSL_CORENET
@@ -166,6 +177,14 @@ again:
 #endif
hang();
}
+   /*
+* SDHC DMA may erase bytes at dst + bl_len - blk_off - 8
+* due to unaligned access. So copy leading bytes from tmp_buf
+* after SDHC DMA transfer.
+*/
+   if (blk_off)
+   memcpy((uchar *)CONFIG_SYS_MMC_U_BOOT_DST,
+  tmp_buf + blk_off, mmc->read_bl_len - blk_off);
 
/*
* Clean d-cache and invalidate i-cache, to
-- 
2.20.1

Re: [PATCH] mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not selected ecc.mode

[Pali Rohár]

On Monday 20 June 2022 15:08:43 Peng Fan (OSS) wrote:
> 在 2022/5/12 2:24, Pali Rohár 写道:
> > ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
> > nand_scan_ident() has not selected ecc.mode or when it selected it to none
> > ecc mode.
> > 
> > Distinguish between these two states by checking of node property
> > "nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.
> > 
> > This change fixes usage of none ecc mode if it is specified in DTS file.
> > 
> > Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from 
> > device tree")
> > Signed-off-by: Pali Rohár 
> 
>    powerpc:  +   ids8313
> += WARNING ==
> +This board does not use CONFIG_WDT (Driver Model
> +for DM watchdog). Please update the board to use
> +CONFIG_WDT before the v2019.10 release. Failure to
> +update by the deadline may result in board removal.
> +See doc/develop/driver-model/migration.rst for more info.
> +
> +This board does not use CONFIG_DM_ETH (Driver Model
> +for Ethernet drivers). Please update the board to use
> +CONFIG_DM_ETH before the v2020.07 release. Failure to
> +This board does not use CONFIG_DM_I2C (Driver Model
> +for I2C drivers). Please update the board to use
> +CONFIG_DM_I2C before the v2022.04 release. Failure to
> +This board does not use CONFIG_DM_SERIAL (Driver Model
> +for Serial drivers). Please update the board to use
> +CONFIG_DM_SERIAL before the v2023.04 release. Failure to
> +powerpc-linux-ld.bfd: drivers/mtd/nand/raw/fsl_elbc_nand.o: in function
> `fsl_elbc_chip_init':
> +drivers/mtd/nand/raw/fsl_elbc_nand.c:749: undefined reference to
> `ofnode_read_string'

Uff... I see that other nand code guards ofnode_read_string() calls via
#if CONFIG_IS_ENABLED(OF_CONTROL). And seems that same preprocessor
guard is needed also here in fsl driver.

I will send v2 patch with this guard.

> +make[1]: *** [Makefile:1813: u-boot] Error 1
> +make: *** [Makefile:177: sub-make] Error 2
> 
> Build fail.
> 
> Regards,
> Peng.
> 
> > ---
> >   drivers/mtd/nand/raw/fsl_elbc_nand.c | 3 ++-
> >   1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c 
> > b/drivers/mtd/nand/raw/fsl_elbc_nand.c
> > index b0e3eb607ed4..8e14739b3ee9 100644
> > --- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
> > +++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
> > @@ -745,7 +745,8 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, 
> > struct udevice *dev)
> > return ret;
> > /* If nand_scan_ident() has not selected ecc.mode, do it now */
> > -   if (nand->ecc.mode == NAND_ECC_NONE) {
> > +   if (nand->ecc.mode == 0 &&
> > +   !ofnode_read_string(nand->flash_node, "nand-ecc-mode")) {
> > /* If CS Base Register selects full hardware ECC then use it */
> > if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
> > nand->ecc.mode = NAND_ECC_HW;
> 

[PATCH v2] mtd: rawnand: fsl_elbc: Fix detection when nand_scan_ident() has not selected ecc.mode

[Pali Rohár]

ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.

Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.

This change fixes usage of none ecc mode if it is specified in DTS file.

Fixes: c9ea9019c5aa ("mtd: rawnand: fsl_elbc: Use ECC configuration from device 
tree")
Signed-off-by: Pali Rohár 

---
Changes in v2:
* Add guard for ofnode_read_string()
---
 drivers/mtd/nand/raw/fsl_elbc_nand.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/fsl_elbc_nand.c 
b/drivers/mtd/nand/raw/fsl_elbc_nand.c
index e734139b5ea5..5d50302eefbe 100644
--- a/drivers/mtd/nand/raw/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/raw/fsl_elbc_nand.c
@@ -744,7 +744,11 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr, ofnode 
flash_node)
return ret;
 
/* If nand_scan_ident() has not selected ecc.mode, do it now */
-   if (nand->ecc.mode == NAND_ECC_NONE) {
+   if (nand->ecc.mode == 0
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+   && !ofnode_read_string(nand->flash_node, "nand-ecc-mode")
+#endif
+  ) {
/* If CS Base Register selects full hardware ECC then use it */
if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
nand->ecc.mode = NAND_ECC_HW;
-- 
2.20.1

[PATCH] dfu: add CONFIG_DFU_NAME_MAX_SIZE configuration

[Jaehoon Chung]

Add CONFIG_DFU_NAME_MAX_SIZE to change the proper size.
If name is longer than default size, it can do wrong behavior during updating
image. So it need to change the proper maximum size.

This patch is proviced the solution to change value with configuration.

Signed-off-by: Jaehoon Chung 
---
 drivers/dfu/Kconfig | 9 +
 include/dfu.h   | 2 +-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index 8d7f13dcb0b5..a181f0b8d7ba 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -111,5 +111,14 @@ config SYS_DFU_MAX_FILE_SIZE
  the buffer once we've been given the whole file.  Define
  this to the maximum filesize (in bytes) for the buffer.
  If undefined it defaults to the CONFIG_SYS_DFU_DATA_BUF_SIZE.
+
+config DFU_NAME_MAX_SIZE
+   int "Size of the name to be added in dfu entity"
+   default 32
+   depends on DFU
+   help
+ This value is used to maximum size. If name is longer than default 
size,
+ we need to change the proper maximum size.
+
 endif
 endmenu
diff --git a/include/dfu.h b/include/dfu.h
index dcb9cd9d799a..948596f367d9 100644
--- a/include/dfu.h
+++ b/include/dfu.h
@@ -99,7 +99,7 @@ struct virt_internal_data {
int dev_num;
 };
 
-#define DFU_NAME_SIZE  32
+#define DFU_NAME_SIZE  CONFIG_DFU_NAME_MAX_SIZE
 #ifndef DFU_DEFAULT_POLL_TIMEOUT
 #define DFU_DEFAULT_POLL_TIMEOUT 0
 #endif
-- 
2.25.1

Re: [PATCH] dfu: add CONFIG_DFU_NAME_MAX_SIZE configuration

[Lukasz Majewski]

Hi Jaehoon,

> Add CONFIG_DFU_NAME_MAX_SIZE to change the proper size.
> If name is longer than default size, it can do wrong behavior during
> updating image. So it need to change the proper maximum size.
> 
> This patch is proviced the solution to change value with
> configuration.
> 
> Signed-off-by: Jaehoon Chung 
> ---
>  drivers/dfu/Kconfig | 9 +
>  include/dfu.h   | 2 +-
>  2 files changed, 10 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
> index 8d7f13dcb0b5..a181f0b8d7ba 100644
> --- a/drivers/dfu/Kconfig
> +++ b/drivers/dfu/Kconfig
> @@ -111,5 +111,14 @@ config SYS_DFU_MAX_FILE_SIZE
> the buffer once we've been given the whole file.  Define
> this to the maximum filesize (in bytes) for the buffer.
> If undefined it defaults to the
> CONFIG_SYS_DFU_DATA_BUF_SIZE. +
> +config DFU_NAME_MAX_SIZE
> + int "Size of the name to be added in dfu entity"
> + default 32
> + depends on DFU
> + help
> +   This value is used to maximum size. If name is longer than
> default size,
> +   we need to change the proper maximum size.
> +
>  endif
>  endmenu
> diff --git a/include/dfu.h b/include/dfu.h
> index dcb9cd9d799a..948596f367d9 100644
> --- a/include/dfu.h
> +++ b/include/dfu.h
> @@ -99,7 +99,7 @@ struct virt_internal_data {
>   int dev_num;
>  };
>  
> -#define DFU_NAME_SIZE32
> +#define DFU_NAME_SIZECONFIG_DFU_NAME_MAX_SIZE
>  #ifndef DFU_DEFAULT_POLL_TIMEOUT
>  #define DFU_DEFAULT_POLL_TIMEOUT 0
>  #endif

Reviewed-by: Lukasz Majewski 


Best regards,

Lukasz Majewski

--

DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de


pgpm4HoRBWnwD.pgp
Description: OpenPGP digital signature

Re: [PATCH v3 8/8] board: gw_ventana: enable MV88E61XX DSA support

[Vladimir Oltean]

On Mon, May 23, 2022 at 11:25:49AM -0700, Tim Harvey wrote:
> Add MV88E61XX DSA support:
>  - update dt: U-Boot dsa driver requires different device-tree syntax
>than the linux driver in order to link the dsa ports to the mdio bus.
>  - update defconfig
>  - replace mv88e61xx_hw_reset weak override with board_phy_config support
>for mv88e61xx configuration that is outside the scope of the DSA driver
> 
> Signed-off-by: Tim Harvey 
> ---
> v3:
>  - move mdio's mdio@0 subnode
> v2: no changes
> ---
>  arch/arm/dts/imx6qdl-gw5904.dtsi| 41 
>  board/gateworks/gw_ventana/gw_ventana.c | 50 +
>  configs/gwventana_gw5904_defconfig  |  7 ++--
>  3 files changed, 62 insertions(+), 36 deletions(-)
> 
> diff --git a/arch/arm/dts/imx6qdl-gw5904.dtsi 
> b/arch/arm/dts/imx6qdl-gw5904.dtsi
> index 286c7a9924c2..1b2f70d1ccb2 100644
> --- a/arch/arm/dts/imx6qdl-gw5904.dtsi
> +++ b/arch/arm/dts/imx6qdl-gw5904.dtsi
> @@ -219,6 +219,33 @@
>   compatible = "marvell,mv88e6085";
>   reg = <0>;
>  
> + mdios {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + mdio@0 {
> + reg = <0>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + sw_phy0: ethernet-phy@0 {
> + reg = <0x0>;
> + };
> +
> + sw_phy1: ethernet-phy@1 {
> + reg = <0x1>;
> + };
> +
> + sw_phy2: ethernet-phy@2 {
> + reg = <0x2>;
> + };
> +
> + sw_phy3: ethernet-phy@3 {
> + reg = <0x3>;
> + };
> + };
> + };
> +
>   ports {
>   #address-cells = <1>;
>   #size-cells = <0>;
> @@ -226,27 +253,41 @@
>   port@0 {
>   reg = <0>;
>   label = "lan4";
> + phy-mode = "internal";
> + phy-handle = <&sw_phy0>;
>   };
>  
>   port@1 {
>   reg = <1>;
>   label = "lan3";
> + phy-mode = "internal";
> + phy-handle = <&sw_phy1>;
>   };
>  
>   port@2 {
>   reg = <2>;
>   label = "lan2";
> + phy-mode = "internal";
> + phy-handle = <&sw_phy2>;
>   };
>  
>   port@3 {
>   reg = <3>;
>   label = "lan1";
> + phy-mode = "internal";
> + phy-handle = <&sw_phy3>;
>   };
>  
>   port@5 {
>   reg = <5>;
>   label = "cpu";
>   ethernet = <&fec>;
> + phy-mode = "rgmii-id";
> +
> + fixed-link {
> + speed = <1000>;
> + full-duplex;
> + };
>   };
>   };
>   };
> diff --git a/board/gateworks/gw_ventana/gw_ventana.c 
> b/board/gateworks/gw_ventana/gw_ventana.c
> index c06630a66b66..bef3f7ef0d2b 100644
> --- a/board/gateworks/gw_ventana/gw_ventana.c
> +++ b/board/gateworks/gw_ventana/gw_ventana.c
> @@ -68,44 +68,30 @@ int board_phy_config(struct phy_device *phydev)
>   phy_write(phydev, MDIO_DEVAD_NONE, 14, val);
>   }
>  
> + /* Fixed PHY: for GW5904/GW5909 this is Marvell 88E6176 GbE Switch */
> + else if (phydev->phy_id == 0xa5a55a5a &&

PHY_FIXED_ID, but see below.

> +  ((board_type == GW5904) || (board_type == GW5909))) {
> + struct mii_dev *bus = miiphy_get_dev_by_name("mdio");
> +
> + puts("MV88E61XX ");
> + /* GPIO[0] output CLK125 for RGMII_REFCLK */
> +

Re: [PATCH v4] ARM: imx: Switch Data Modul i.MX8M Mini eDM SBC to USB251x Hub driver

[Fabio Estevam]

On Wed, Jun 15, 2022 at 8:07 AM Marek Vasut  wrote:
>
> Replace the ad-hoc I2C register programming scripted in board
> environment with U-Boot DM driver.
>
> Signed-off-by: Marek Vasut 
> Cc: Fabio Estevam 
> Cc: Peng Fan 
> Cc: Stefano Babic 

Reviewed-by: Fabio Estevam 

Re: [PATCH v3 7/8] net: add MV88E61xx DSA driver

[Vladimir Oltean]

On Mon, May 23, 2022 at 11:25:48AM -0700, Tim Harvey wrote:
> Add a DSA driver for the MV88E61xx compatible GbE Ethernet switches.
> 
> Cc: Marek BehĂșn 
> Cc: Vladimir Oltean 
> Signed-off-by: Tim Harvey 
> Reviewed-by: Vladimir Oltean 
> ---
> v3:
>  - Added Vladimir's rb tag
> v2:
>  - rebase on v2022.07-rc1 (use ofnode_get_phy_node)
>  - remove unused commented out fields from struct
>  - remove unused PORT_MASK macro
>  - remove phy from priv struct name
>  - refactor code from original drivers/net/phy/mv88e61xx with
>suggestions from review to consolidate some functions
>into mv88e61xx_dsa_port_enable
>  - remove unecessary skiping of disabling of CPU port
>  - remove unecessary dev_set_parent_priv
>  - remove unnecessary static init flag
>  - replace debug with a dev_warn if switch device-id unsupported
>  - remove unnecessary xmit/recv functions as we rely on the fact that
>only a single port is active instead of mangling packets

This looks good, but my opinion remains that we can rename mv88e61xx to
mv88e6xxx for consistency with Linux. Users will know that the drivers
are expected to support the same hardware models (even if the compatible
list is now incomplete and does not cover an actual 61xx device).

> ---
>  drivers/net/Kconfig |   7 +
>  drivers/net/Makefile|   1 +
>  drivers/net/mv88e61xx.c | 843 
>  3 files changed, 851 insertions(+)
>  create mode 100644 drivers/net/mv88e61xx.c
> 
> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> index 7fe0e00649cf..edb1a0898986 100644
> --- a/drivers/net/Kconfig
> +++ b/drivers/net/Kconfig
> @@ -433,6 +433,13 @@ config LPC32XX_ETH
>   depends on ARCH_LPC32XX
>   default y
>  
> +config MV88E61XX
> + bool "Marvell MV88E61xx GbE switch DSA driver"
> + depends on DM_DSA && DM_MDIO
> + help
> +   This driver implements a DSA switch driver for the MV88E61xx family
> +   of GbE switches using the MDIO interface
> +
>  config MVGBE
>   bool "Marvell Orion5x/Kirkwood network interface support"
>   depends on ARCH_KIRKWOOD || ARCH_ORION5X
> diff --git a/drivers/net/Makefile b/drivers/net/Makefile
> index 69fb3bbbf7cb..36b4c279430a 100644
> --- a/drivers/net/Makefile
> +++ b/drivers/net/Makefile
> @@ -59,6 +59,7 @@ obj-$(CONFIG_MEDIATEK_ETH) += mtk_eth.o
>  obj-$(CONFIG_MPC8XX_FEC) += mpc8xx_fec.o
>  obj-$(CONFIG_MT7620_ETH) += mt7620-eth.o
>  obj-$(CONFIG_MT7628_ETH) += mt7628-eth.o
> +obj-$(CONFIG_MV88E61XX) += mv88e61xx.o
>  obj-$(CONFIG_MVGBE) += mvgbe.o
>  obj-$(CONFIG_MVMDIO) += mvmdio.o
>  obj-$(CONFIG_MVNETA) += mvneta.o
> diff --git a/drivers/net/mv88e61xx.c b/drivers/net/mv88e61xx.c
> new file mode 100644
> index ..514835bf03b9
> --- /dev/null
> +++ b/drivers/net/mv88e61xx.c
> @@ -0,0 +1,843 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2022
> + * Gateworks Corporation 
> + * Tim Harvey 
> + *
> + * (C) Copyright 2015
> + * Elecsys Corporation 
> + * Kevin Smith 
> + *
> + * Original driver:
> + * (C) Copyright 2009
> + * Marvell Semiconductor 
> + * Prafulla Wadaskar 
> + */
> +
> +/*
> + * DSA driver for mv88e61xx ethernet switches.
> + *
> + * This driver configures the mv88e61xx for basic use as a DSA switch.
> + *
> + * This driver was adapted from drivers/net/phy/mv88e61xx and tested
> + * on the mv88e6176 via an SGMII interface.
> + */
> +
> +#include 
> +#include 
> +#include 

Alphabetic ordering please.

> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +/* Device addresses */
> +#define DEVADDR_PHY(p)   (p)
> +#define DEVADDR_SERDES   0x0F
> +
> +/* SMI indirection registers for multichip addressing mode */
> +#define SMI_CMD_REG  0x00
> +#define SMI_DATA_REG 0x01
> +
> +/* Global registers */
> +#define GLOBAL1_STATUS   0x00
> +#define GLOBAL1_CTRL 0x04
> +#define GLOBAL1_MON_CTRL 0x1A
> +
> +/* Global 2 registers */
> +#define GLOBAL2_REG_PHY_CMD  0x18
> +#define GLOBAL2_REG_PHY_DATA 0x19
> +#define GLOBAL2_REG_SCRATCH  0x1A
> +
> +/* Port registers */
> +#define PORT_REG_STATUS  0x00
> +#define PORT_REG_PHYS_CTRL   0x01
> +#define PORT_REG_SWITCH_ID   0x03
> +#define PORT_REG_CTRL0x04
> +#define PORT_REG_VLAN_MAP0x06
> +#define PORT_REG_VLAN_ID 0x07
> +#define PORT_REG_LED_CTRL0x16
> +
> +/* Phy registers */
> +#define PHY_REG_CTRL10x10
> +#define PHY_REG_STATUS1  0x11
> +#define PHY_REG_PAGE 0x16
> +
> +/* Serdes registers */
> +#define SERDES_REG_CTRL_10x10
> +
> +/* Phy page numbers */
> +#define PHY_PAGE_COPPER  0
> +#define PHY_PAGE_SERDES 

[PATCH 01/17] Convert CONFIG_FSL_FIXED_MMC_LOCATION et al to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_FSL_FIXED_MMC_LOCATION
   CONFIG_ESDHC_HC_BLK_ADDR

Signed-off-by: Tom Rini 
---
 arch/powerpc/include/asm/config_mpc85xx.h  |  3 ---
 boot/Kconfig   | 13 +
 configs/P1010RDB-PA_36BIT_NOR_defconfig|  1 +
 configs/P1010RDB-PA_36BIT_SDCARD_defconfig |  1 +
 configs/P1010RDB-PA_NOR_defconfig  |  1 +
 configs/P1010RDB-PA_SDCARD_defconfig   |  1 +
 configs/P1010RDB-PB_36BIT_NOR_defconfig|  1 +
 configs/P1010RDB-PB_36BIT_SDCARD_defconfig |  1 +
 configs/P1010RDB-PB_NOR_defconfig  |  1 +
 configs/P1010RDB-PB_SDCARD_defconfig   |  1 +
 configs/P1020RDB-PC_36BIT_SDCARD_defconfig |  1 +
 configs/P1020RDB-PC_36BIT_defconfig|  1 +
 configs/P1020RDB-PC_SDCARD_defconfig   |  1 +
 configs/P1020RDB-PC_defconfig  |  1 +
 configs/P1020RDB-PD_SDCARD_defconfig   |  1 +
 configs/P1020RDB-PD_defconfig  |  1 +
 configs/P2020RDB-PC_36BIT_SDCARD_defconfig |  1 +
 configs/P2020RDB-PC_36BIT_defconfig|  1 +
 configs/P2020RDB-PC_SDCARD_defconfig   |  1 +
 configs/P2020RDB-PC_defconfig  |  1 +
 include/configs/P1010RDB.h |  4 +---
 include/configs/P2041RDB.h |  5 -
 include/configs/corenet_ds.h   |  5 -
 include/configs/p1_p2_rdb_pc.h |  4 +---
 24 files changed, 33 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index e82adc6b4545..ce3a776c7e88 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -33,7 +33,6 @@
 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
 #define CONFIG_SYS_FSL_USB1_PHY_ENABLE
-#define CONFIG_ESDHC_HC_BLK_ADDR
 
 /* P1011 is single core version of P1020 */
 #elif defined(CONFIG_ARCH_P1011)
@@ -148,7 +147,6 @@
 #define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb000
 #define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff60
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  3
-#define CONFIG_ESDHC_HC_BLK_ADDR
 
 #elif defined(CONFIG_ARCH_BSC9132)
 #define CONFIG_FSL_SDHC_V2_3
@@ -160,7 +158,6 @@
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT  3
 #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
 #define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
-#define CONFIG_ESDHC_HC_BLK_ADDR
 
 #elif defined(CONFIG_ARCH_T4240)
 #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
diff --git a/boot/Kconfig b/boot/Kconfig
index 63dacc0d14f4..ee0dc90e93cc 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -575,6 +575,19 @@ config SPIFLASH
 
 endchoice
 
+config FSL_FIXED_MMC_LOCATION
+   bool "PBL MMC is at a fixed location"
+   depends on SDCARD && !RAMBOOT_PBL
+
+config ESDHC_HC_BLK_ADDR
+   def_bool y
+   depends on FSL_FIXED_MMC_LOCATION && (ARCH_BSC9131 || ARCH_BSC9132 || 
ARCH_P1010)
+   help
+ In High Capacity SD Cards (> 2 GBytes), the 32-bit source address and
+ code length of these soc specify the memory address in block address
+ format. Block length is fixed to 512 bytes as per the SD High
+ Capacity specification.
+
 config SYS_FSL_PBL_PBI
string "PBI(pre-boot instructions) commands for the PBL image"
depends on RAMBOOT_PBL
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig 
b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 81bfd7ae518c..481c69d2d33b 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -16,6 +16,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_FSL_FIXED_MMC_LOCATION=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw 
console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp 
$ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm 
$loadaddr $ramdiskaddr $fdtaddr"
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig 
b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index 1ebfdec719e8..92bb8cdedf66 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -22,6 +22,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_FSL_FIXED_MMC_LOCATION=y
 CONFIG_BOOTDELAY=10
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/ram rw 
console=$consoledev,$baudrate $othbootargs ramdisk_size=$ramdisk_size;tftp 
$ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm 
$loadaddr $ramdiskaddr $fdtaddr"
diff --git a/configs/P1010RDB-PA_NOR_defconfig 
b/configs/P1010RDB-PA_NOR_defconfig
index 9240c38c164a..9c93d653748b 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -15,6 +15,7 @@ CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONF

[PATCH 02/17] lcd: Remove legacy CONFIG_FB_ADDR code

[Tom Rini]

No platforms set both CONFIG_LCD and CONFIG_FB_ADDR at this time, drop
this legacy code.

Signed-off-by: Tom Rini 
---
 README | 14 --
 common/board_f.c   |  4 
 include/configs/at91sam9rlek.h |  2 --
 include/configs/trats.h|  1 -
 include/configs/trats2.h   |  1 -
 5 files changed, 22 deletions(-)

diff --git a/README b/README
index a8d43f63b7e3..40069ed17993 100644
--- a/README
+++ b/README
@@ -1509,20 +1509,6 @@ The following options need to be configured:
overwriting the architecture dependent default
settings.
 
-- Frame Buffer Address:
-   CONFIG_FB_ADDR
-
-   Define CONFIG_FB_ADDR if you want to use specific
-   address for frame buffer.  This is typically the case
-   when using a graphics controller has separate video
-   memory.  U-Boot will then place the frame buffer at
-   the given address instead of dynamically reserving it
-   in system RAM by calling lcd_setmem(), which grabs
-   the memory for the frame buffer depending on the
-   configured panel size.
-
-   Please see board_init_f function.
-
 - Automatic software updates via TFTP server
CONFIG_UPDATE_TFTP
CONFIG_UPDATE_TFTP_CNT_MAX
diff --git a/common/board_f.c b/common/board_f.c
index 51d2f3c365e9..cbfd42ce1235 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -400,13 +400,9 @@ static int reserve_video(void)
  ((unsigned long)gd->relocaddr - addr) >> 10, addr);
gd->relocaddr = addr;
 #elif defined(CONFIG_LCD)
-#  ifdef CONFIG_FB_ADDR
-   gd->fb_base = CONFIG_FB_ADDR;
-#  else
/* reserve memory for LCD display (always full pages) */
gd->relocaddr = lcd_setmem(gd->relocaddr);
gd->fb_base = gd->relocaddr;
-#  endif /* CONFIG_FB_ADDR */
 #endif
 
return 0;
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index e3350282bcf6..e418edddfbe5 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -22,8 +22,6 @@
 
 /* LCD */
 #define LCD_BPPLCD_COLOR8
-/* Let board_init_f handle the framebuffer allocation */
-#undef CONFIG_FB_ADDR
 
 /* SDRAM */
 #define CONFIG_SYS_SDRAM_BASE  ATMEL_BASE_CS1
diff --git a/include/configs/trats.h b/include/configs/trats.h
index bca239ae817e..53f5a6996bd7 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -149,7 +149,6 @@
 #define LCD_BPPLCD_COLOR16
 
 /* LCD */
-#define CONFIG_FB_ADDR 0x52504000
 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 20bd116c9e3d..b7449dab8bdb 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -139,7 +139,6 @@
 #define LCD_BPP LCD_COLOR16
 
 /* LCD */
-#define CONFIG_FB_ADDR 0x52504000
 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
 
 #endif /* __CONFIG_H */
-- 
2.25.1

[PATCH 05/17] Convert CONFIG_PCIE_IMX to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_PCIE_IMX

Signed-off-by: Tom Rini 
---
 configs/ge_bx50v3_defconfig| 1 +
 configs/gwventana_emmc_defconfig   | 1 +
 configs/gwventana_gw5904_defconfig | 1 +
 configs/gwventana_nand_defconfig   | 1 +
 configs/mx6sabresd_defconfig   | 1 +
 configs/mx6sxsabresd_defconfig | 1 +
 configs/novena_defconfig   | 1 +
 configs/tbs2910_defconfig  | 1 +
 configs/vining_2000_defconfig  | 1 +
 drivers/pci/Kconfig| 4 
 include/configs/ge_bx50v3.h| 1 -
 include/configs/gw_ventana.h   | 3 ---
 include/configs/mx6sabresd.h   | 1 -
 include/configs/mx6sxsabresd.h | 1 -
 include/configs/nitrogen6x.h   | 1 -
 include/configs/novena.h   | 1 -
 include/configs/tbs2910.h  | 1 -
 include/configs/vining_2000.h  | 1 -
 18 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index c9e4ee8f93d1..114a361a1843 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -74,6 +74,7 @@ CONFIG_CMD_E1000=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_PMIC=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 0044d893128e..ea9e7e2cbf0a 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -114,6 +114,7 @@ CONFIG_E1000=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_POWER_LEGACY=y
diff --git a/configs/gwventana_gw5904_defconfig 
b/configs/gwventana_gw5904_defconfig
index 08580255f79d..c0c7c0daf134 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -118,6 +118,7 @@ CONFIG_E1000=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_POWER_LEGACY=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index e2eab2bb3815..7ce02fef8a2c 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -124,6 +124,7 @@ CONFIG_E1000=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_POWER_LEGACY=y
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index 15dbaf848cd7..f5ad3664db72 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -97,6 +97,7 @@ CONFIG_FEC_MXC=y
 CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_POWER_LEGACY=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index c41b2d9264ea..9a9e0da5140b 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -60,6 +60,7 @@ CONFIG_DM_ETH=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_PMIC=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index 6b0f17628dcd..f156296adabb 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -75,6 +75,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_FEC_MXC=y
 CONFIG_RGMII=y
 CONFIG_MII=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_POWER_LEGACY=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 4b304f8c7f58..0401dc6142d3 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -83,6 +83,7 @@ CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
 # CONFIG_PCI_PNP is not set
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_DM_RTC=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index da782889a1bc..ad534ab58605 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -84,6 +84,7 @@ CONFIG_DM_ETH=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
 CONFIG_POWER_LEGACY=y
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index fd2203420c3b..0c74f95f6041 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -254,6 +254,10 @@ config FSL_PCIE_EP_COMPAT
  This compatible is used to find pci controller ep node in Kernel DT
  to complete fixup.
 
+config PCIE_IMX
+   bool "i.MX PCIe support"
+   depends on ARCH_MX6
+
 config PCIE_INTEL_FPGA
bool "Intel FPGA PCIe support"
help
diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h
index d813c6c22e78..b4638a2b9d82 100644
--- a/include/configs/ge_bx50v3.h
+++ b/include/configs/ge_bx50v3.h
@@ -110,6 +110,5 @@
 #define CONFIG_IMX6_PWM_PER_CLK6600
 
 #define CONFIG_PCI_SCAN_SHOW
-#define CONFIG_PCIE_IMX
 
 #endif /* __GE_BX50V3_CONFIG_H */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 47a72fc8fce5..4a0aaf4da583 100644
--- a/include/c

[PATCH 08/17] Convert CONFIG_PCI_GT64120 to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_PCI_GT64120

Signed-off-by: Tom Rini 
---
 configs/malta64_defconfig   | 1 +
 configs/malta64el_defconfig | 1 +
 configs/malta_defconfig | 1 +
 configs/maltael_defconfig   | 1 +
 drivers/pci/Kconfig | 4 
 include/configs/malta.h | 1 -
 6 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index cbea4fadff7e..a2d938c0dc74 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -38,5 +38,6 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
+CONFIG_PCI_GT64120=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index b268e33a379f..f7345b2484a4 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -40,5 +40,6 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
+CONFIG_PCI_GT64120=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index 7b1b50547a4d..ae9cad857e2c 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -37,5 +37,6 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
+CONFIG_PCI_GT64120=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index 540864b57327..963b9be59ea0 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -39,5 +39,6 @@ CONFIG_FLASH_CFI_DRIVER=y
 CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
+CONFIG_PCI_GT64120=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index f4c4aece58d7..0ef5c2923378 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -101,6 +101,10 @@ config PCIE_ECAM_SYNQUACER
  Note that this must be configured when boot because Linux driver
  expects the PCIe RC has been configured in the bootloader.
 
+config PCI_GT64120
+   bool "GT64120 PCI support"
+   depends on MIPS
+
 config PCI_PHYTIUM
bool "Phytium PCIe support"
help
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 225ed7cd5cdc..75f38000f6ba 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -13,7 +13,6 @@
 
 #define CONFIG_MEMSIZE_IN_BYTES
 
-#define CONFIG_PCI_GT64120
 #define CONFIG_PCI_MSC01
 
 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
-- 
2.25.1

[PATCH 06/17] pci: Remove pci_sh4 and related defines.

[Tom Rini]

This driver is not enabled anywhere, remove it.  Also remove definitions
of symbols only used in this driver, on platforms that did not enable
it.

Signed-off-by: Tom Rini 
---
 drivers/pci/Makefile |  1 -
 drivers/pci/pci_sh4.c| 82 
 include/configs/x86-chromebook.h | 12 -
 3 files changed, 95 deletions(-)
 delete mode 100644 drivers/pci/pci_sh4.c

diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 04f623652f09..cfcd6fd6c52f 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -20,7 +20,6 @@ obj-$(CONFIG_PCIE_IMX) += pcie_imx.o
 obj-$(CONFIG_PCI_MVEBU) += pci_mvebu.o
 obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
 obj-$(CONFIG_PCI_RCAR_GEN3) += pci-rcar-gen3.o
-obj-$(CONFIG_SH4_PCI) += pci_sh4.o
 obj-$(CONFIG_SH7751_PCI) +=pci_sh7751.o
 obj-$(CONFIG_SH7780_PCI) +=pci_sh7780.o
 obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o
diff --git a/drivers/pci/pci_sh4.c b/drivers/pci/pci_sh4.c
deleted file mode 100644
index aac9be055e2c..
--- a/drivers/pci/pci_sh4.c
+++ /dev/null
@@ -1,82 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * SH4 PCI Controller (PCIC) for U-Boot.
- * (C) Dustin McIntire (dus...@sensoria.com)
- * (C) 2007,2008 Nobuhiro Iwamatsu 
- * (C) 2008 Yusuke Goda 
- *
- * u-boot/arch/sh/cpu/sh4/pci-sh4.c
- */
-
-#include 
-#include 
-
-#include 
-#include 
-#include 
-#include 
-
-int pci_sh4_init(struct pci_controller *hose)
-{
-   hose->first_busno = 0;
-   hose->region_count = 0;
-   hose->last_busno = 0xff;
-
-   /* PCI memory space */
-   pci_set_region(hose->regions + 0,
-   CONFIG_PCI_MEM_BUS,
-   CONFIG_PCI_MEM_PHYS,
-   CONFIG_PCI_MEM_SIZE,
-   PCI_REGION_MEM);
-   hose->region_count++;
-
-   /* PCI IO space */
-   pci_set_region(hose->regions + 1,
-   CONFIG_PCI_IO_BUS,
-   CONFIG_PCI_IO_PHYS,
-   CONFIG_PCI_IO_SIZE,
-   PCI_REGION_IO);
-   hose->region_count++;
-
-#if defined(CONFIG_PCI_SYS_BUS)
-   /* PCI System Memory space */
-   pci_set_region(hose->regions + 2,
-   CONFIG_PCI_SYS_BUS,
-   CONFIG_PCI_SYS_PHYS,
-   CONFIG_PCI_SYS_SIZE,
-   PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-   hose->region_count++;
-#endif
-
-   udelay(1000);
-
-   pci_set_ops(hose,
-   pci_hose_read_config_byte_via_dword,
-   pci_hose_read_config_word_via_dword,
-   pci_sh4_read_config_dword,
-   pci_hose_write_config_byte_via_dword,
-   pci_hose_write_config_word_via_dword,
-   pci_sh4_write_config_dword);
-
-   pci_register_hose(hose);
-
-   udelay(1000);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
-   printf("PCI:   Bus Dev VenId DevId Class Int\n");
-#endif
-   hose->last_busno = pci_hose_scan(hose);
-   return 0;
-}
-
-int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
-{
-   return 0;
-}
-
-#ifdef CONFIG_PCI_SCAN_SHOW
-int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
-{
-   return 1;
-}
-#endif /* CONFIG_PCI_SCAN_SHOW */
diff --git a/include/configs/x86-chromebook.h b/include/configs/x86-chromebook.h
index b45d2bbd6266..4109af7d8511 100644
--- a/include/configs/x86-chromebook.h
+++ b/include/configs/x86-chromebook.h
@@ -12,18 +12,6 @@
 #define CONFIG_X86_REFCODE_ADDR0xffea
 #define CONFIG_X86_REFCODE_RUN_ADDR0
 
-#define CONFIG_PCI_MEM_BUS 0xe000
-#define CONFIG_PCI_MEM_PHYSCONFIG_PCI_MEM_BUS
-#define CONFIG_PCI_MEM_SIZE0x1000
-
-#define CONFIG_PCI_PREF_BUS0xd000
-#define CONFIG_PCI_PREF_PHYS   CONFIG_PCI_PREF_BUS
-#define CONFIG_PCI_PREF_SIZE   0x1000
-
-#define CONFIG_PCI_IO_BUS  0x1000
-#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
-#define CONFIG_PCI_IO_SIZE 0xefff
-
 #define VIDEO_IO_OFFSET0
 #define CONFIG_X86EMU_RAW_IO
 
-- 
2.25.1

[PATCH 09/17] Convert CONFIG_PCI_CONFIG_HOST_BRIDGE to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_PCI_CONFIG_HOST_BRIDGE

Signed-off-by: Tom Rini 
---
 drivers/pci/Kconfig  | 4 
 include/configs/x86-common.h | 5 -
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 0ef5c2923378..53d0ebd745e7 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -48,6 +48,10 @@ config PCI_REGION_MULTI_ENTRY
  region type. This helps to add support for SoC's like OcteonTX/TX2
  where every peripheral is on the PCI bus.
 
+config PCI_CONFIG_HOST_BRIDGE
+   bool "Configure PCI host bridges"
+   default y if X86
+
 config PCI_MAP_SYSTEM_MEMORY
bool "Map local system memory from a virtual base address"
depends on MIPS
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index f28fafe15c63..1366f623aa25 100644
--- a/include/configs/x86-common.h
+++ b/include/configs/x86-common.h
@@ -44,11 +44,6 @@
  * Environment configuration
  */
 
-/*---
- * PCI configuration
- */
-#define CONFIG_PCI_CONFIG_HOST_BRIDGE
-
 /*---
  * USB configuration
  */
-- 
2.25.1

[PATCH 10/17] m68k: Remove unused PCI code

[Tom Rini]

The only mcf5445x platform does not enable PCI, drop this code.

Signed-off-by: Tom Rini 
---
 arch/m68k/cpu/mcf5445x/Makefile |   2 +-
 arch/m68k/cpu/mcf5445x/pci.c| 151 
 2 files changed, 1 insertion(+), 152 deletions(-)
 delete mode 100644 arch/m68k/cpu/mcf5445x/pci.c

diff --git a/arch/m68k/cpu/mcf5445x/Makefile b/arch/m68k/cpu/mcf5445x/Makefile
index ba90fc3c34a3..6a38c4838e99 100644
--- a/arch/m68k/cpu/mcf5445x/Makefile
+++ b/arch/m68k/cpu/mcf5445x/Makefile
@@ -6,4 +6,4 @@
 # ccflags-y += -DET_DEBUG
 
 extra-y= start.o
-obj-y  = cpu.o speed.o cpu_init.o interrupts.o pci.o dspi.o
+obj-y  = cpu.o speed.o cpu_init.o interrupts.o dspi.o
diff --git a/arch/m68k/cpu/mcf5445x/pci.c b/arch/m68k/cpu/mcf5445x/pci.c
deleted file mode 100644
index d487468d0bfa..
--- a/arch/m68k/cpu/mcf5445x/pci.c
+++ /dev/null
@@ -1,151 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
- * TsiChung Liew (tsi-chung.l...@freescale.com)
- */
-
-/*
- * PCI Configuration space access support
- */
-#include 
-#include 
-#include 
-#include 
-#include 
-
-#if defined(CONFIG_PCI)
-/* System RAM mapped over PCI */
-#define CONFIG_SYS_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_PCI_SYS_MEM_PHYSCONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_PCI_SYS_MEM_SIZE(1024 * 1024 * 1024)
-
-#define cfg_read(val, addr, type, op)  *val = op((type)(addr));
-#define cfg_write(val, addr, type, op) op((type *)(addr), (val));
-
-#define PCI_OP(rw, size, type, op, mask)   \
-int pci_##rw##_cfg_##size(struct pci_controller *hose, \
-   pci_dev_t dev, int offset, type val)\
-{  \
-   u32 addr = PCI_CONF1_ADDRESS(PCI_BUS(dev), PCI_DEV(dev),\
-PCI_FUNC(dev), offset);\
-   out_be32(hose->cfg_addr, addr); \
-   cfg_##rw(val, hose->cfg_data + (offset & mask), type, op);  \
-   out_be32(hose->cfg_addr, addr & ~PCI_CONF1_ENABLE); \
-   return 0;   \
-}
-
-PCI_OP(read, byte, u8 *, in_8, 3)
-PCI_OP(read, word, u16 *, in_le16, 2)
-PCI_OP(read, dword, u32 *, in_le32, 0)
-PCI_OP(write, byte, u8, out_8, 3)
-PCI_OP(write, word, u16, out_le16, 2)
-PCI_OP(write, dword, u32, out_le32, 0)
-
-void pci_mcf5445x_init(struct pci_controller *hose)
-{
-   pci_t *pci = (pci_t *)MMAP_PCI;
-   pciarb_t *pciarb = (pciarb_t *)MMAP_PCIARB;
-   gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-   u32 barEn = 0;
-
-   out_be32(&pciarb->acr, 0x001f001f);
-
-   /* Set PCIGNT1, PCIREQ1, PCIREQ0/PCIGNTIN, PCIGNT0/PCIREQOUT,
-  PCIREQ2, PCIGNT2 */
-   out_be16(&gpio->par_pci,
-   GPIO_PAR_PCI_GNT3_GNT3 | GPIO_PAR_PCI_GNT2 |
-   GPIO_PAR_PCI_GNT1 | GPIO_PAR_PCI_GNT0 |
-   GPIO_PAR_PCI_REQ3_REQ3 | GPIO_PAR_PCI_REQ2 |
-   GPIO_PAR_PCI_REQ1 | GPIO_PAR_PCI_REQ0);
-
-   /* Assert reset bit */
-   setbits_be32(&pci->gscr, PCI_GSCR_PR);
-
-   setbits_be32(&pci->tcr1, PCI_TCR1_P);
-
-   /* Initiator windows */
-   out_be32(&pci->iw0btar,
-   CONFIG_SYS_PCI_MEM_PHYS | (CONFIG_SYS_PCI_MEM_PHYS >> 16));
-   out_be32(&pci->iw1btar,
-   CONFIG_SYS_PCI_IO_PHYS | (CONFIG_SYS_PCI_IO_PHYS >> 16));
-   out_be32(&pci->iw2btar,
-   CONFIG_SYS_PCI_CFG_PHYS | (CONFIG_SYS_PCI_CFG_PHYS >> 16));
-
-   out_be32(&pci->iwcr,
-   PCI_IWCR_W0C_EN | PCI_IWCR_W1C_EN | PCI_IWCR_W1C_IO |
-   PCI_IWCR_W2C_EN | PCI_IWCR_W2C_IO);
-
-   out_be32(&pci->icr, 0);
-
-   /* Enable bus master and mem access */
-   out_be32(&pci->scr, PCI_SCR_B | PCI_SCR_M);
-
-   /* Cache line size and master latency */
-   out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xF8));
-   out_be32(&pci->cr2, 0);
-
-#ifdef CONFIG_SYS_PCI_BAR0
-   out_be32(&pci->bar0, PCI_BAR_BAR0(CONFIG_SYS_PCI_BAR0));
-   out_be32(&pci->tbatr0, CONFIG_SYS_PCI_TBATR0 | PCI_TBATR_EN);
-   barEn |= PCI_TCR2_B0E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR1
-   out_be32(&pci->bar1, PCI_BAR_BAR1(CONFIG_SYS_PCI_BAR1));
-   out_be32(&pci->tbatr1, CONFIG_SYS_PCI_TBATR1 | PCI_TBATR_EN);
-   barEn |= PCI_TCR2_B1E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR2
-   out_be32(&pci->bar2, PCI_BAR_BAR2(CONFIG_SYS_PCI_BAR2));
-   out_be32(&pci->tbatr2, CONFIG_SYS_PCI_TBATR2 | PCI_TBATR_EN);
-   barEn |= PCI_TCR2_B2E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR3
-   out_be32(&pci->bar3, PCI_BAR_BAR3(CONFIG_SYS_PCI_BAR3));
-   out_be32(&pci->tbatr3, CONFIG_SYS_PCI_TBATR3 | PCI_TBATR_EN);
-   barEn |= PCI_TCR2_B3E;
-#endif
-#ifdef CONFIG_SYS_PCI_BAR4
-   out_be32(&pci->bar4, PCI_BAR_BAR4(CONFIG_SYS_PCI_BAR4));
-   out_

[PATCH 03/17] Convert CONFIG_LAYERSCAPE_NS_ACCESS to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_LAYERSCAPE_NS_ACCESS

Signed-off-by: Tom Rini 
---
 arch/Kconfig.nxp| 4 
 configs/ls1012a2g5rdb_qspi_defconfig| 1 +
 configs/ls1012a2g5rdb_tfa_defconfig | 1 +
 configs/ls1012afrdm_qspi_defconfig  | 1 +
 configs/ls1012afrdm_tfa_defconfig   | 1 +
 configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig  | 1 +
 configs/ls1012afrwy_qspi_defconfig  | 1 +
 configs/ls1012afrwy_tfa_SECURE_BOOT_defconfig   | 1 +
 configs/ls1012afrwy_tfa_defconfig   | 1 +
 configs/ls1012aqds_qspi_defconfig   | 1 +
 configs/ls1012aqds_tfa_SECURE_BOOT_defconfig| 1 +
 configs/ls1012aqds_tfa_defconfig| 1 +
 configs/ls1012ardb_qspi_SECURE_BOOT_defconfig   | 1 +
 configs/ls1012ardb_qspi_defconfig   | 1 +
 configs/ls1012ardb_tfa_SECURE_BOOT_defconfig| 1 +
 configs/ls1012ardb_tfa_defconfig| 1 +
 configs/ls1021aiot_qspi_defconfig   | 1 +
 configs/ls1021aiot_sdcard_defconfig | 1 +
 configs/ls1021aqds_ddr4_nor_defconfig   | 1 +
 configs/ls1021aqds_ddr4_nor_lpuart_defconfig| 1 +
 configs/ls1021aqds_nand_defconfig   | 1 +
 configs/ls1021aqds_nor_SECURE_BOOT_defconfig| 1 +
 configs/ls1021aqds_nor_defconfig| 1 +
 configs/ls1021aqds_nor_lpuart_defconfig | 1 +
 configs/ls1021aqds_qspi_defconfig   | 1 +
 configs/ls1021aqds_sdcard_ifc_defconfig | 1 +
 configs/ls1021aqds_sdcard_qspi_defconfig| 1 +
 configs/ls1021atsn_qspi_defconfig   | 1 +
 configs/ls1021atsn_sdcard_defconfig | 1 +
 configs/ls1021atwr_nor_SECURE_BOOT_defconfig| 1 +
 configs/ls1021atwr_nor_defconfig| 1 +
 configs/ls1021atwr_nor_lpuart_defconfig | 1 +
 configs/ls1021atwr_qspi_defconfig   | 1 +
 configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 1 +
 configs/ls1021atwr_sdcard_ifc_defconfig | 1 +
 configs/ls1021atwr_sdcard_qspi_defconfig| 1 +
 configs/ls1043aqds_defconfig| 1 +
 configs/ls1043aqds_lpuart_defconfig | 1 +
 configs/ls1043aqds_nand_defconfig   | 1 +
 configs/ls1043aqds_nor_ddr3_defconfig   | 1 +
 configs/ls1043aqds_qspi_defconfig   | 1 +
 configs/ls1043aqds_sdcard_ifc_defconfig | 1 +
 configs/ls1043aqds_sdcard_qspi_defconfig| 1 +
 configs/ls1043aqds_tfa_SECURE_BOOT_defconfig| 1 +
 configs/ls1043aqds_tfa_defconfig| 1 +
 configs/ls1043ardb_SECURE_BOOT_defconfig| 1 +
 configs/ls1043ardb_defconfig| 1 +
 configs/ls1043ardb_nand_SECURE_BOOT_defconfig   | 1 +
 configs/ls1043ardb_nand_defconfig   | 1 +
 configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 1 +
 configs/ls1043ardb_sdcard_defconfig | 1 +
 configs/ls1043ardb_tfa_SECURE_BOOT_defconfig| 1 +
 configs/ls1043ardb_tfa_defconfig| 1 +
 configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig   | 1 +
 configs/ls1046afrwy_tfa_defconfig   | 1 +
 configs/ls1046aqds_SECURE_BOOT_defconfig| 1 +
 configs/ls1046aqds_defconfig| 1 +
 configs/ls1046aqds_lpuart_defconfig | 1 +
 configs/ls1046aqds_nand_defconfig   | 1 +
 configs/ls1046aqds_qspi_defconfig   | 1 +
 configs/ls1046aqds_sdcard_ifc_defconfig | 1 +
 configs/ls1046aqds_sdcard_qspi_defconfig| 1 +
 configs/ls1046aqds_tfa_SECURE_BOOT_defconfig| 1 +
 configs/ls1046aqds_tfa_defconfig| 1 +
 configs/ls1046ardb_emmc_defconfig   | 1 +
 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig   | 1 +
 configs/ls1046ardb_qspi_defconfig   | 1 +
 configs/ls1046ardb_qspi_spl_defconfig   | 1 +
 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 1 +
 configs/ls1046ardb_sdcard_defconfig | 1 +
 configs/ls1046ardb_tfa_SECURE_BOOT_defconfig| 1 +
 configs/ls1046ardb_tfa_defconfig| 1 +
 configs/pg_wcom_expu1_defconfig | 1 +
 configs/pg_wcom_expu1_update_defconfig  | 1 +
 configs/pg_wcom_seli8_defconfig | 1 +
 configs/pg_wcom_seli8_update_defconfig  | 1 +
 include/configs/km/pg-wcom-ls102xa.h| 1 -
 include/configs/ls1012a_common.h| 3 ---
 include/configs/ls1021aiot.h| 1 -
 include/configs/ls1021aqds.h| 1 -
 include/configs/ls1021atsn.h| 2 --
 include/configs/ls1021atwr.h| 1 -
 include/configs/ls1043aqds.h|

[PATCH 07/17] Convert CONFIG_PCI_SCAN_SHOW to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_PCI_SCAN_SHOW

Signed-off-by: Tom Rini 
---
 configs/ge_bx50v3_defconfig   | 1 +
 configs/mx6sabresd_defconfig  | 1 +
 configs/mx6sxsabresd_defconfig| 1 +
 configs/novena_defconfig  | 1 +
 configs/tbs2910_defconfig | 1 +
 configs/vining_2000_defconfig | 1 +
 drivers/pci/Kconfig   | 4 
 include/configs/MPC837XERDB.h | 4 
 include/configs/MPC8548CDS.h  | 4 
 include/configs/P1010RDB.h| 2 --
 include/configs/P2041RDB.h| 4 
 include/configs/T102xRDB.h| 2 --
 include/configs/T104xRDB.h| 2 --
 include/configs/T208xQDS.h| 4 
 include/configs/T208xRDB.h| 4 
 include/configs/T4240RDB.h| 4 
 include/configs/apalis-tk1.h  | 3 ---
 include/configs/clearfog.h| 3 ---
 include/configs/controlcenterdc.h | 3 ---
 include/configs/corenet_ds.h  | 4 
 include/configs/db-88f6820-amc.h  | 3 ---
 include/configs/db-88f6820-gp.h   | 3 ---
 include/configs/db-mv784mp-gp.h   | 3 ---
 include/configs/ds414.h   | 3 ---
 include/configs/durian.h  | 3 ---
 include/configs/ge_bx50v3.h   | 2 --
 include/configs/helios4.h | 3 ---
 include/configs/ls1012afrwy.h | 2 --
 include/configs/ls1012aqds.h  | 2 --
 include/configs/ls1012ardb.h  | 2 --
 include/configs/ls1021aiot.h  | 4 
 include/configs/ls1021aqds.h  | 4 
 include/configs/ls1021atsn.h  | 3 ---
 include/configs/ls1021atwr.h  | 4 
 include/configs/ls1043a_common.h  | 7 ---
 include/configs/ls1046a_common.h  | 4 
 include/configs/ls2080aqds.h  | 4 
 include/configs/ls2080ardb.h  | 4 
 include/configs/lx2160a_common.h  | 5 -
 include/configs/mx6sabresd.h  | 1 -
 include/configs/mx6sxsabresd.h| 1 -
 include/configs/nitrogen6x.h  | 7 ---
 include/configs/novena.h  | 1 -
 include/configs/p1_p2_rdb_pc.h| 2 --
 include/configs/tbs2910.h | 1 -
 include/configs/vining_2000.h | 1 -
 include/configs/x530.h| 3 ---
 47 files changed, 10 insertions(+), 125 deletions(-)

diff --git a/configs/ge_bx50v3_defconfig b/configs/ge_bx50v3_defconfig
index 114a361a1843..c33287812663 100644
--- a/configs/ge_bx50v3_defconfig
+++ b/configs/ge_bx50v3_defconfig
@@ -74,6 +74,7 @@ CONFIG_CMD_E1000=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCI_SCAN_SHOW=y
 CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig
index f5ad3664db72..ea0c76467462 100644
--- a/configs/mx6sabresd_defconfig
+++ b/configs/mx6sabresd_defconfig
@@ -97,6 +97,7 @@ CONFIG_FEC_MXC=y
 CONFIG_RGMII=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCI_SCAN_SHOW=y
 CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig
index 9a9e0da5140b..1985ff96dec3 100644
--- a/configs/mx6sxsabresd_defconfig
+++ b/configs/mx6sxsabresd_defconfig
@@ -60,6 +60,7 @@ CONFIG_DM_ETH=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCI_SCAN_SHOW=y
 CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/novena_defconfig b/configs/novena_defconfig
index f156296adabb..d4ab93850c4a 100644
--- a/configs/novena_defconfig
+++ b/configs/novena_defconfig
@@ -75,6 +75,7 @@ CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_FEC_MXC=y
 CONFIG_RGMII=y
 CONFIG_MII=y
+CONFIG_PCI_SCAN_SHOW=y
 CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig
index 0401dc6142d3..892d7c60d283 100644
--- a/configs/tbs2910_defconfig
+++ b/configs/tbs2910_defconfig
@@ -83,6 +83,7 @@ CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
 # CONFIG_PCI_PNP is not set
+CONFIG_PCI_SCAN_SHOW=y
 CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/configs/vining_2000_defconfig b/configs/vining_2000_defconfig
index ad534ab58605..8d87857ba0a4 100644
--- a/configs/vining_2000_defconfig
+++ b/configs/vining_2000_defconfig
@@ -84,6 +84,7 @@ CONFIG_DM_ETH=y
 CONFIG_FEC_MXC=y
 CONFIG_MII=y
 CONFIG_PCI=y
+CONFIG_PCI_SCAN_SHOW=y
 CONFIG_PCIE_IMX=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_IMX6=y
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 0c74f95f6041..f4c4aece58d7 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -81,6 +81,10 @@ config PCI_ARID
   support on PCI devices. This helps to skip some devices in BDF
   scan that are not present.
 
+config PCI_SCAN_SHOW
+   bool "Show PCI devices during startup"
+   depends on PCIE_IMX
+
 config PCIE_ECAM_GENERIC
bool "Generic ECAM-based PCI host controller support"
help
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 8e75d779c418..e8e0a1c66999 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -232,10 +232,6 @@
 #define CONFIG_SYS_PCIE2_IO_PHYS   0

[PATCH 12/17] Convert CONFIG_SH7751_PCI to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_SH7751_PCI

Signed-off-by: Tom Rini 
---
 configs/r2dplus_defconfig | 1 +
 drivers/pci/Kconfig   | 6 ++
 include/configs/r2dplus.h | 5 -
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig
index 5a38b070437d..2beda3a2fe0a 100644
--- a/configs/r2dplus_defconfig
+++ b/configs/r2dplus_defconfig
@@ -52,6 +52,7 @@ CONFIG_PCNET=y
 CONFIG_RTL8139=y
 CONFIG_TULIP=y
 CONFIG_PCI=y
+CONFIG_SH7751_PCI=y
 CONFIG_SPECIFY_CONSOLE_INDEX=y
 CONFIG_DM_SERIAL=y
 CONFIG_SERIAL_RX_BUFFER=y
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 53d0ebd745e7..680d5baa8029 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -171,6 +171,12 @@ config PCI_SANDBOX
  the device tree but the normal PCI scan technique is used to find
  then.
 
+config SH7751_PCI
+   bool "SH7751 PCI controller support"
+   depends on SH
+   help
+ SuperH PCI Bridge Configuration
+
 config PCI_TEGRA
bool "Tegra PCI support"
depends on ARCH_TEGRA
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index ae712629df34..409d5af0241d 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -25,9 +25,4 @@
  */
 #defineCONFIG_SYS_PLL_SETTLING_TIME100/* in us */
 
-/*
- * SuperH PCI Bridge Configration
- */
-#define CONFIG_SH7751_PCI
-
 #endif /* __CONFIG_H */
-- 
2.25.1

[PATCH 13/17] socrates: Rework CONFIG_PCI_CLK_FREQ

[Tom Rini]

The symbol CONFIG_PCI_CLK_FREQ is local to this board.  Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.

Signed-off-by: Tom Rini 
---
 board/socrates/socrates.c  | 3 ++-
 include/configs/socrates.h | 2 --
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 3430a1ed0178..27aad4eaae3a 100644
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -59,7 +59,8 @@ int checkboard (void)
f = get_board_sys_clk();
} else {
src = "PCI_CLK";
-   f = CONFIG_PCI_CLK_FREQ;
+   /* PCI is clocked by the external source at 33 MHz */
+   f = 3300;
}
printf ("PCI1:  32 bit, %d MHz (%s)\n", f/100, src);
 #else
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 14f7bb9f7132..6a78cb1f2648 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -123,8 +123,6 @@
  * Memory space is mapped 1-1.
  */
 
-/* PCI is clocked by the external source at 33 MHz */
-#define CONFIG_PCI_CLK_FREQ3300
 #define CONFIG_SYS_PCI1_MEM_BASE   0x8000
 #define CONFIG_SYS_PCI1_MEM_PHYS   CONFIG_SYS_PCI1_MEM_BASE
 #define CONFIG_SYS_PCI1_MEM_SIZE   0x2000  /* 512M 
*/
-- 
2.25.1

[PATCH 14/17] Convert CONFIG_PCI_MSC01 to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_PCI_MSC01

Signed-off-by: Tom Rini 
---
 configs/malta64_defconfig   | 1 +
 configs/malta64el_defconfig | 1 +
 configs/malta_defconfig | 1 +
 configs/maltael_defconfig   | 1 +
 drivers/pci/Kconfig | 4 
 include/configs/malta.h | 2 --
 6 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/configs/malta64_defconfig b/configs/malta64_defconfig
index a2d938c0dc74..be8689071665 100644
--- a/configs/malta64_defconfig
+++ b/configs/malta64_defconfig
@@ -39,5 +39,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
+CONFIG_PCI_MSC01=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/malta64el_defconfig b/configs/malta64el_defconfig
index f7345b2484a4..436bae8af87c 100644
--- a/configs/malta64el_defconfig
+++ b/configs/malta64el_defconfig
@@ -41,5 +41,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
+CONFIG_PCI_MSC01=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/malta_defconfig b/configs/malta_defconfig
index ae9cad857e2c..88c0d5628dee 100644
--- a/configs/malta_defconfig
+++ b/configs/malta_defconfig
@@ -38,5 +38,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
+CONFIG_PCI_MSC01=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/configs/maltael_defconfig b/configs/maltael_defconfig
index 963b9be59ea0..58d31d6a4432 100644
--- a/configs/maltael_defconfig
+++ b/configs/maltael_defconfig
@@ -40,5 +40,6 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
 CONFIG_SYS_FLASH_CFI=y
 CONFIG_PCNET=y
 CONFIG_PCI_GT64120=y
+CONFIG_PCI_MSC01=y
 CONFIG_RTC_MC146818=y
 CONFIG_SYS_NS16550=y
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 680d5baa8029..e4c60561ee5d 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -146,6 +146,10 @@ config PCI_MPC85XX
  Say Y here if you want to enable PCI controller support on FSL
  PowerPC MPC85xx SoC.
 
+config PCI_MSC01
+   bool "MSC01 PCI support"
+   depends on TARGET_MALTA
+
 config PCI_RCAR_GEN2
bool "Renesas RCar Gen2 PCIe driver"
depends on RCAR_32
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 75f38000f6ba..affee0069402 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -13,8 +13,6 @@
 
 #define CONFIG_MEMSIZE_IN_BYTES
 
-#define CONFIG_PCI_MSC01
-
 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
 
 /*
-- 
2.25.1

[PATCH 15/17] Convert CONFIG_SYS_FSL_PCI_VER_3_X to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_SYS_FSL_PCI_VER_3_X

Signed-off-by: Tom Rini 
---
 arch/powerpc/include/asm/config_mpc85xx.h | 2 --
 drivers/pci/Kconfig   | 4 
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h 
b/arch/powerpc/include/asm/config_mpc85xx.h
index ce3a776c7e88..a43e6e5e538b 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -195,7 +195,6 @@
 #define CONFIG_SYS_FSL_SRIO_LIODN
 #define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
 #define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
-#define CONFIG_SYS_FSL_PCI_VER_3_X
 
 #elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
 #define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
@@ -293,7 +292,6 @@
 #define CONFIG_SYS_NUM_FMAN1
 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS  { 1, 4, 4, 4 }
 #define CONFIG_SYS_FSL_SRDS_1
-#define CONFIG_SYS_FSL_PCI_VER_3_X
 #if defined(CONFIG_ARCH_T2080)
 #define CONFIG_SYS_NUM_FM1_DTSEC   8
 #define CONFIG_SYS_NUM_FM1_10GEC   4
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index e4c60561ee5d..436acca898e4 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -133,8 +133,12 @@ config PCIE_DW_SIFIVE
  Say Y here if you want to enable PCIe controller support on
  FU740.
 
+config SYS_FSL_PCI_VER_3_X
+   bool
+
 config PCIE_FSL
bool "FSL PowerPC PCIe support"
+   select SYS_FSL_PCI_VER_3_X if ARCH_T2080 || ARCH_T4240
help
  Say Y here if you want to enable PCIe controller support on FSL
  PowerPC MPC85xx, MPC86xx, B series, P series and T series SoCs.
-- 
2.25.1

[PATCH 04/17] Convert CONFIG_PCIE1 et al to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_PCIE1
   CONFIG_PCIE2
   CONFIG_PCIE3
   CONFIG_PCIE4
   CONFIG_PCI1

Signed-off-by: Tom Rini 
---
 arch/Kconfig.nxp | 16 
 board/freescale/mpc8548cds/Kconfig   |  3 +++
 configs/MPC8548CDS_36BIT_defconfig   |  1 +
 configs/MPC8548CDS_defconfig |  1 +
 configs/MPC8548CDS_legacy_defconfig  |  1 +
 configs/P1010RDB-PA_36BIT_NAND_defconfig |  2 ++
 configs/P1010RDB-PA_36BIT_NOR_defconfig  |  2 ++
 configs/P1010RDB-PA_36BIT_SDCARD_defconfig   |  2 ++
 configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig |  2 ++
 configs/P1010RDB-PA_NAND_defconfig   |  2 ++
 configs/P1010RDB-PA_NOR_defconfig|  2 ++
 configs/P1010RDB-PA_SDCARD_defconfig |  2 ++
 configs/P1010RDB-PA_SPIFLASH_defconfig   |  2 ++
 configs/P1010RDB-PB_36BIT_NAND_defconfig |  2 ++
 configs/P1010RDB-PB_36BIT_NOR_defconfig  |  2 ++
 configs/P1010RDB-PB_36BIT_SDCARD_defconfig   |  2 ++
 configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig |  2 ++
 configs/P1010RDB-PB_NAND_defconfig   |  2 ++
 configs/P1010RDB-PB_NOR_defconfig|  2 ++
 configs/P1010RDB-PB_SDCARD_defconfig |  2 ++
 configs/P1010RDB-PB_SPIFLASH_defconfig   |  2 ++
 configs/P1020RDB-PC_36BIT_NAND_defconfig |  2 ++
 configs/P1020RDB-PC_36BIT_SDCARD_defconfig   |  2 ++
 configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig |  2 ++
 configs/P1020RDB-PC_36BIT_defconfig  |  2 ++
 configs/P1020RDB-PC_NAND_defconfig   |  2 ++
 configs/P1020RDB-PC_SDCARD_defconfig |  2 ++
 configs/P1020RDB-PC_SPIFLASH_defconfig   |  2 ++
 configs/P1020RDB-PC_defconfig|  2 ++
 configs/P1020RDB-PD_NAND_defconfig   |  2 ++
 configs/P1020RDB-PD_SDCARD_defconfig |  2 ++
 configs/P1020RDB-PD_SPIFLASH_defconfig   |  2 ++
 configs/P1020RDB-PD_defconfig|  2 ++
 configs/P2020RDB-PC_36BIT_NAND_defconfig |  2 ++
 configs/P2020RDB-PC_36BIT_SDCARD_defconfig   |  2 ++
 configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig |  2 ++
 configs/P2020RDB-PC_36BIT_defconfig  |  2 ++
 configs/P2020RDB-PC_NAND_defconfig   |  2 ++
 configs/P2020RDB-PC_SDCARD_defconfig |  2 ++
 configs/P2020RDB-PC_SPIFLASH_defconfig   |  2 ++
 configs/P2020RDB-PC_defconfig|  2 ++
 configs/P2041RDB_NAND_defconfig  |  3 +++
 configs/P2041RDB_SDCARD_defconfig|  3 +++
 configs/P2041RDB_SPIFLASH_defconfig  |  3 +++
 configs/P2041RDB_defconfig   |  3 +++
 configs/P3041DS_NAND_defconfig   |  4 
 configs/P3041DS_SDCARD_defconfig |  4 
 configs/P3041DS_SPIFLASH_defconfig   |  4 
 configs/P3041DS_defconfig|  4 
 configs/P4080DS_SDCARD_defconfig |  3 +++
 configs/P4080DS_SPIFLASH_defconfig   |  3 +++
 configs/P4080DS_defconfig|  3 +++
 configs/P5040DS_NAND_defconfig   |  3 +++
 configs/P5040DS_SDCARD_defconfig |  3 +++
 configs/P5040DS_SPIFLASH_defconfig   |  3 +++
 configs/P5040DS_defconfig|  3 +++
 configs/T1024RDB_NAND_defconfig  |  3 +++
 configs/T1024RDB_SDCARD_defconfig|  3 +++
 configs/T1024RDB_SPIFLASH_defconfig  |  3 +++
 configs/T1024RDB_defconfig   |  3 +++
 configs/T1042D4RDB_NAND_defconfig|  4 
 configs/T1042D4RDB_SDCARD_defconfig  |  4 
 configs/T1042D4RDB_SPIFLASH_defconfig|  4 
 configs/T1042D4RDB_defconfig |  4 
 configs/T2080QDS_NAND_defconfig  |  4 
 configs/T2080QDS_SDCARD_defconfig|  4 
 configs/T2080QDS_SECURE_BOOT_defconfig   |  4 
 configs/T2080QDS_SPIFLASH_defconfig  |  4 
 configs/T2080QDS_SRIO_PCIE_BOOT_defconfig|  4 
 configs/T2080QDS_defconfig   |  4 
 configs/T2080RDB_NAND_defconfig  |  4 
 configs/T2080RDB_SDCARD_defconfig|  4 
 configs/T2080RDB_SPIFLASH_defconfig  |  4 
 configs/T2080RDB_defconfig   |  4 
 configs/T2080RDB_revD_NAND_defconfig |  4 
 configs/T2080RDB_revD_SDCARD_defconfig   |  4 
 configs/T2080RDB_revD_SPIFLASH_defconfig |  4 
 configs/T2080RDB_revD_defconfig  |  4 
 configs/T4240RDB_SDCARD_defconfig|  4 
 configs/T4240RDB_defconfig   |  4 
 configs/kmcent2_defconfig|  1 +
 configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig   |  1 +
 configs/ls1012afrwy_

[PATCH 11/17] MPC837XERDB: Remove unused PCI defines

[Tom Rini]

These defines aren't referenced in code today, remove them.

Signed-off-by: Tom Rini 
---
 include/configs/MPC837XERDB.h | 24 
 1 file changed, 24 deletions(-)

diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index e8e0a1c66999..3e4d66874df4 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -198,39 +198,15 @@
  * General PCI
  * Addresses are mapped 1-1.
  */
-#define CONFIG_SYS_PCI_MEM_BASE0x8000
-#define CONFIG_SYS_PCI_MEM_PHYSCONFIG_SYS_PCI_MEM_BASE
-#define CONFIG_SYS_PCI_MEM_SIZE0x1000 /* 256M */
-#define CONFIG_SYS_PCI_MMIO_BASE   0x9000
-#define CONFIG_SYS_PCI_MMIO_PHYS   CONFIG_SYS_PCI_MMIO_BASE
-#define CONFIG_SYS_PCI_MMIO_SIZE   0x1000 /* 256M */
-#define CONFIG_SYS_PCI_IO_BASE 0x
-#define CONFIG_SYS_PCI_IO_PHYS 0xE030
-#define CONFIG_SYS_PCI_IO_SIZE 0x10 /* 1M */
-
-#define CONFIG_SYS_PCI_SLV_MEM_LOCAL   CONFIG_SYS_SDRAM_BASE
-#define CONFIG_SYS_PCI_SLV_MEM_BUS 0x
-#define CONFIG_SYS_PCI_SLV_MEM_SIZE0x8000
-
-#define CONFIG_SYS_PCIE1_BASE  0xA000
 #define CONFIG_SYS_PCIE1_CFG_BASE  0xA000
 #define CONFIG_SYS_PCIE1_CFG_SIZE  0x0800
-#define CONFIG_SYS_PCIE1_MEM_BASE  0xA800
 #define CONFIG_SYS_PCIE1_MEM_PHYS  0xA800
-#define CONFIG_SYS_PCIE1_MEM_SIZE  0x1000
-#define CONFIG_SYS_PCIE1_IO_BASE   0x
 #define CONFIG_SYS_PCIE1_IO_PHYS   0xB800
-#define CONFIG_SYS_PCIE1_IO_SIZE   0x0080
 
-#define CONFIG_SYS_PCIE2_BASE  0xC000
 #define CONFIG_SYS_PCIE2_CFG_BASE  0xC000
 #define CONFIG_SYS_PCIE2_CFG_SIZE  0x0800
-#define CONFIG_SYS_PCIE2_MEM_BASE  0xC800
 #define CONFIG_SYS_PCIE2_MEM_PHYS  0xC800
-#define CONFIG_SYS_PCIE2_MEM_SIZE  0x1000
-#define CONFIG_SYS_PCIE2_IO_BASE   0x
 #define CONFIG_SYS_PCIE2_IO_PHYS   0xD800
-#define CONFIG_SYS_PCIE2_IO_SIZE   0x0080
 
 /*
  * TSEC
-- 
2.25.1

[PATCH 17/17] Convert CONFIG_KIRKWOOD_PCIE_INIT et al to Kconfig

[Tom Rini]

This converts the following to Kconfig:
   CONFIG_KIRKWOOD_EGIGA_INIT
   CONFIG_KIRKWOOD_PCIE_INIT
   CONFIG_KIRKWOOD_RGMII_PAD_1V8
   CONFIG_KM_DISABLE_PCIE

Signed-off-by: Tom Rini 
---
 arch/arm/mach-kirkwood/Kconfig   | 12 
 arch/arm/mach-kirkwood/include/mach/config.h |  3 ---
 configs/km_kirkwood_128m16_defconfig |  1 +
 configs/km_kirkwood_defconfig|  1 +
 configs/kmcoge5un_defconfig  |  1 +
 include/configs/SBx81LIFKW.h |  4 
 include/configs/SBx81LIFXCAT.h   |  4 
 include/configs/km_kirkwood.h|  7 ---
 8 files changed, 15 insertions(+), 18 deletions(-)

diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index ca2da003b65b..98bb10c2dee3 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -121,6 +121,18 @@ endchoice
 config SYS_SOC
default "kirkwood"
 
+config KIRKWOOD_RGMII_PAD_1V8
+   bool "Configures the I/O voltage of the pads connected gigabit 
interface to 1.8V"
+   default y
+
+config KIRKWOOD_EGIGA_INIT
+   bool "Enable GbePort0/1 for kernel"
+   default y
+
+config KIRKWOOD_PCIE_INIT
+   bool "Enable PCIe Port0 for kernel"
+   default y
+
 source "board/Marvell/openrd/Kconfig"
 source "board/Marvell/dreamplug/Kconfig"
 source "board/Synology/ds109/Kconfig"
diff --git a/arch/arm/mach-kirkwood/include/mach/config.h 
b/arch/arm/mach-kirkwood/include/mach/config.h
index ca341570544b..90e86ab99b41 100644
--- a/arch/arm/mach-kirkwood/include/mach/config.h
+++ b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -23,9 +23,6 @@
 #endif /* CONFIG_KW88F6281 */
 
 #include 
-#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
-#define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */
-#define CONFIG_KIRKWOOD_PCIE_INIT   /* Enable PCIE Port0 for kernel */
 
 #define CONFIG_I2C_MVTWSI_BASE0KW_TWSI_BASE
 #define MV_UART_CONSOLE_BASE   KW_UART0_BASE
diff --git a/configs/km_kirkwood_128m16_defconfig 
b/configs/km_kirkwood_128m16_defconfig
index 1d8ae5876b90..655759b09ce7 100644
--- a/configs/km_kirkwood_128m16_defconfig
+++ b/configs/km_kirkwood_128m16_defconfig
@@ -7,6 +7,7 @@ 
CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_128M16_1.cfg"
 CONFIG_SYS_TEXT_BASE=0x07d0
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_TARGET_KM_KIRKWOOD=y
+# CONFIG_KIRKWOOD_PCIE_INIT is not set
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x0
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood"
diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig
index d2f2ff4e23e7..65378d3cec16 100644
--- a/configs/km_kirkwood_defconfig
+++ b/configs/km_kirkwood_defconfig
@@ -7,6 +7,7 @@ CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage.cfg"
 CONFIG_SYS_TEXT_BASE=0x07d0
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_TARGET_KM_KIRKWOOD=y
+# CONFIG_KIRKWOOD_PCIE_INIT is not set
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0x0
 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood"
diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig
index 9654b8d8060c..8b54f9c7c842 100644
--- a/configs/kmcoge5un_defconfig
+++ b/configs/kmcoge5un_defconfig
@@ -7,6 +7,7 @@ 
CONFIG_SYS_KWD_CONFIG="board/keymile/km_arm/kwbimage_256M8_1.cfg"
 CONFIG_SYS_TEXT_BASE=0x07d0
 CONFIG_SYS_MALLOC_F_LEN=0x400
 CONFIG_TARGET_KM_KIRKWOOD=y
+# CONFIG_KIRKWOOD_PCIE_INIT is not set
 CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_OFFSET=0xC
 CONFIG_ENV_SECT_SIZE=0x1
diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h
index 8114373655f3..e42e6d56532f 100644
--- a/include/configs/SBx81LIFKW.h
+++ b/include/configs/SBx81LIFKW.h
@@ -9,10 +9,6 @@
 /* additions for new ARM relocation support */
 #define CONFIG_SYS_SDRAM_BASE  0x
 
-#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
-#define CONFIG_KIRKWOOD_PCIE_INIT  /* Enable PCIE Port0 */
-#define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */
-
 /*
  * NS16550 Configuration
  */
diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h
index b70829c09d58..8926c26b0bdf 100644
--- a/include/configs/SBx81LIFXCAT.h
+++ b/include/configs/SBx81LIFXCAT.h
@@ -9,10 +9,6 @@
 /* additions for new ARM relocation support */
 #define CONFIG_SYS_SDRAM_BASE  0x
 
-#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
-#define CONFIG_KIRKWOOD_PCIE_INIT  /* Enable PCIE Port0 */
-#define CONFIG_KIRKWOOD_RGMII_PAD_1V8  /* Set RGMII Pad voltage to 1.8V */
-
 /*
  * NS16550 Configuration
  */
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index e58a69501b33..01482d531996 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -23,7 +23,6 @@
 /* KM_KIRKWOOD */
 #if defined(CONFIG_KM_KIRKWOOD)
 #define CONFIG_HOSTNAME"km_kirkwood"
-#define CONFIG_KM_DISABLE_PCIE
 
 /* KM_KI

[PATCH 16/17] qemu-ppce500: Move CONFIG_SYS_PCI_MAP_{START, END} to board code

[Tom Rini]

These CONFIG options are only used on this board, in the board file
itself.  Remove these from the CONFIG namespace and define in the board
file.

Signed-off-by: Tom Rini 
---
 board/emulation/qemu-ppce500/qemu-ppce500.c | 8 ++--
 include/configs/qemu-ppce500.h  | 4 
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/board/emulation/qemu-ppce500/qemu-ppce500.c 
b/board/emulation/qemu-ppce500/qemu-ppce500.c
index 348fcf3bb099..99edaa3b4215 100644
--- a/board/emulation/qemu-ppce500/qemu-ppce500.c
+++ b/board/emulation/qemu-ppce500/qemu-ppce500.c
@@ -32,6 +32,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+/* Virtual address range for PCI region maps */
+#define SYS_PCI_MAP_START  0x8000
+#define SYS_PCI_MAP_END0xe000
+
 static void *get_fdt_virt(void)
 {
if (gd->flags & GD_FLG_RELOC)
@@ -101,7 +105,7 @@ static int pci_map_region(phys_addr_t paddr, phys_size_t 
size, ulong *pmap_addr)
map_addr += size - 1;
map_addr &= ~(size - 1);
 
-   if (map_addr + size >= CONFIG_SYS_PCI_MAP_END)
+   if (map_addr + size >= SYS_PCI_MAP_END)
return -1;
 
/* Map virtual memory for range */
@@ -137,7 +141,7 @@ int misc_init_r(void)
pci_get_regions(dev, &io, &mem, &pre);
 
/* Start MMIO and PIO range maps above RAM */
-   map_addr = CONFIG_SYS_PCI_MAP_START;
+   map_addr = SYS_PCI_MAP_START;
 
/* Map MMIO range */
ret = pci_map_region(mem->phys_start, mem->size, &map_addr);
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 006593acfddd..451ae0e1e6df 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -25,10 +25,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
 #endif
 
-/* Virtual address range for PCI region maps */
-#define CONFIG_SYS_PCI_MAP_START   0x8000
-#define CONFIG_SYS_PCI_MAP_END 0xe000
-
 /* Virtual address to a temporary map if we need it (max 128MB) */
 #define CONFIG_SYS_TMPVIRT 0xe800
 
-- 
2.25.1

Re: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy waiting in cm_full_cfg

[Paweł Anikiel]

On Mon, Jun 20, 2022 at 10:40 AM Chee, Tien Fong
 wrote:
>
> Hi,
>
> > -Original Message-
> > From: Paweł Anikiel 
> > Sent: Friday, 17 June, 2022 6:47 PM
> > To: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> > Chee, Tien Fong ; michal.si...@xilinx.com
> > Cc: u-boot@lists.denx.de; s...@chromium.org; feste...@denx.de;
> > ja...@amarulasolutions.com; andre.przyw...@arm.com; Armstrong, Neil
> > ; pbrobin...@gmail.com;
> > thar...@gateworks.com; paul@linaro.org; christianshew...@gmail.com;
> > adrian.fiergol...@fastree3d.com; marek.be...@nic.cz; Denk, Wolfgang
> > ; Lim, Elly Siew Chin ;
> > upstr...@semihalf.com; ams...@chromium.org; Paweł Anikiel
> > 
> > Subject: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy waiting
> > in cm_full_cfg
> >
> > Using udelay while the clocks aren't fully configured causes the timer 
> > system
> > to save the wrong clock rate. Use sdelay and wait_on_value instead (the
> > values used in these functions were found experimentally).
> >
> > Signed-off-by: Paweł Anikiel 
> > ---
> >  arch/arm/mach-socfpga/clock_manager_arria10.c | 31 +-
> > -
> >  1 file changed, 22 insertions(+), 9 deletions(-)
> >
> > diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c
> > b/arch/arm/mach-socfpga/clock_manager_arria10.c
> > index 58d5d3fd8a..b48a2b47bc 100644
> > --- a/arch/arm/mach-socfpga/clock_manager_arria10.c
> > +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
>
> Did you try to call timer_init() after cm_basic_init() in board_init_f? If 
> that's working, then no change is required to fix this clock issue.

Seems like timer_init() isn't implemented on Arria 10 (it defaults to
the return 0 stub). I also tried dm_timer_init(), no luck.

I did some code digging, the clock rate is read by clk_get_rate(), and
the timer rate is set by dw_apb_timer_probe()
(drivers/timer/dw-apb-timer.c:77), and there doesn't seem to be a good
way of updating that value later.

The only other function I could find that sets the timer rate is
timer_pre_probe() from drivers/timer/timer-uclass.c, which very much
looks like what we need, but it's static and the name suggests it
shouldn't be called manually anyway.

Regards,
Paweł

RE: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy waiting in cm_full_cfg

[Chee, Tien Fong]

> -Original Message-
> From: Paweł Anikiel 
> Sent: Monday, 20 June, 2022 8:14 PM
> To: Chee, Tien Fong 
> Cc: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> michal.si...@xilinx.com; u-boot@lists.denx.de; s...@chromium.org;
> feste...@denx.de; ja...@amarulasolutions.com;
> andre.przyw...@arm.com; Armstrong, Neil ;
> pbrobin...@gmail.com; thar...@gateworks.com; paul@linaro.org;
> christianshew...@gmail.com; adrian.fiergol...@fastree3d.com;
> marek.be...@nic.cz; Denk, Wolfgang ; Lim, Elly Siew Chin
> ; upstr...@semihalf.com;
> ams...@chromium.org
> Subject: Re: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy
> waiting in cm_full_cfg
> 
> On Mon, Jun 20, 2022 at 10:40 AM Chee, Tien Fong
>  wrote:
> >
> > Hi,
> >
> > > -Original Message-
> > > From: Paweł Anikiel 
> > > Sent: Friday, 17 June, 2022 6:47 PM
> > > To: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> > > Chee, Tien Fong ; michal.si...@xilinx.com
> > > Cc: u-boot@lists.denx.de; s...@chromium.org; feste...@denx.de;
> > > ja...@amarulasolutions.com; andre.przyw...@arm.com; Armstrong,
> Neil
> > > ; pbrobin...@gmail.com;
> > > thar...@gateworks.com; paul@linaro.org;
> > > christianshew...@gmail.com; adrian.fiergol...@fastree3d.com;
> > > marek.be...@nic.cz; Denk, Wolfgang ; Lim, Elly Siew
> Chin
> > > ; upstr...@semihalf.com;
> > > ams...@chromium.org; Paweł Anikiel 
> > > Subject: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy
> > > waiting in cm_full_cfg
> > >
> > > Using udelay while the clocks aren't fully configured causes the
> > > timer system to save the wrong clock rate. Use sdelay and
> > > wait_on_value instead (the values used in these functions were found
> experimentally).
> > >
> > > Signed-off-by: Paweł Anikiel 
> > > ---
> > >  arch/arm/mach-socfpga/clock_manager_arria10.c | 31
> > > +-
> > > -
> > >  1 file changed, 22 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c
> > > b/arch/arm/mach-socfpga/clock_manager_arria10.c
> > > index 58d5d3fd8a..b48a2b47bc 100644
> > > --- a/arch/arm/mach-socfpga/clock_manager_arria10.c
> > > +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
> >
> > Did you try to call timer_init() after cm_basic_init() in board_init_f? If 
> > that's
> working, then no change is required to fix this clock issue.
> 
> Seems like timer_init() isn't implemented on Arria 10 (it defaults to the
> return 0 stub). I also tried dm_timer_init(), no luck.
> 
> I did some code digging, the clock rate is read by clk_get_rate(), and the
> timer rate is set by dw_apb_timer_probe() (drivers/timer/dw-apb-
> timer.c:77), and there doesn't seem to be a good way of updating that value
> later.
> 
> The only other function I could find that sets the timer rate is
> timer_pre_probe() from drivers/timer/timer-uclass.c, which very much looks
> like what we need, but it's static and the name suggests it shouldn't be 
> called
> manually anyway.
> 

Thanks for the details finding.

I found that both Cyclone 5 and S10 (including all AARCH64 devices) having own 
timer_init() as solution for this issue.
Cyclone 5 : 
https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-socfpga/timer.c
S10: 
https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-socfpga/timer_s10.c

Do you think this is good idea having the same for A10 device?

Best regards,
Tien Fong.

Re: [PATCH v5 10/23] FWU: cmd: Add a command to read FWU metadata

[Michal Simek]

On 6/9/22 14:29, Sughosh Ganu wrote:

Add a command to read the metadata as specified in the FWU
specification and print the fields of the metadata.

Signed-off-by: Sughosh Ganu 
---
  cmd/Kconfig |  7 +
  cmd/Makefile|  1 +
  cmd/fwu_mdata.c | 74 +
  3 files changed, 82 insertions(+)
  create mode 100644 cmd/fwu_mdata.c

diff --git a/cmd/Kconfig b/cmd/Kconfig
index 09193b61b9..275becd837 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -144,6 +144,13 @@ config CMD_CPU
  internal name) and clock frequency. Other information may be
  available depending on the CPU driver.
  
+config CMD_FWU_METADATA

+   bool "fwu metadata read"
+   depends on FWU_MULTI_BANK_UPDATE
+   default y if FWU_MULTI_BANK_UPDATE
+   help
+ Command to read the metadata and dump it's contents
+
  config CMD_LICENSE
bool "license"
select BUILD_BIN2C
diff --git a/cmd/Makefile b/cmd/Makefile
index 5e43a1e022..259a93bc65 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -76,6 +76,7 @@ obj-$(CONFIG_CMD_FPGA) += fpga.o
  obj-$(CONFIG_CMD_FPGAD) += fpgad.o
  obj-$(CONFIG_CMD_FS_GENERIC) += fs.o
  obj-$(CONFIG_CMD_FUSE) += fuse.o
+obj-$(CONFIG_CMD_FWU_METADATA) += fwu_mdata.o
  obj-$(CONFIG_CMD_GETTIME) += gettime.o
  obj-$(CONFIG_CMD_GPIO) += gpio.o
  obj-$(CONFIG_CMD_HVC) += smccc.o
diff --git a/cmd/fwu_mdata.c b/cmd/fwu_mdata.c
new file mode 100644
index 00..bc20ca26a3
--- /dev/null
+++ b/cmd/fwu_mdata.c
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2022, Linaro Limited
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+static void print_mdata(struct fwu_mdata *mdata)
+{
+   int i, j;
+   struct fwu_image_entry *img_entry;
+   struct fwu_image_bank_info *img_info;
+   u32 nimages, nbanks;
+
+   printf("\tFWU Metadata\n");
+   printf("crc32: %#x\n", mdata->crc32);
+   printf("version: %#x\n", mdata->version);
+   printf("active_index: %#x\n", mdata->active_index);
+   printf("previous_active_index: %#x\n", mdata->previous_active_index);
+
+   nimages = CONFIG_FWU_NUM_IMAGES_PER_BANK;
+   nbanks = CONFIG_FWU_NUM_BANKS;
+   printf("\tImage Info\n");
+   for (i = 0; i < nimages; i++) {
+   img_entry = &mdata->img_entry[i];
+   printf("\nImage Type Guid: %pUL\n", 
&img_entry->image_type_uuid);
+   printf("Location Guid: %pUL\n", &img_entry->location_uuid);
+   for (j = 0; j < nbanks; j++) {
+   img_info = &img_entry->img_bank_info[j];
+   printf("Image Guid:  %pUL\n", &img_info->image_uuid);
+   printf("Image Acceptance: %#x\n", img_info->accepted);
+   }
+   }
+}
+
+int do_fwu_mdata_read(struct cmd_tbl *cmdtp, int flag,
+int argc, char * const argv[])
+{
+   struct udevice *dev;
+   int ret = CMD_RET_SUCCESS;
+   struct fwu_mdata *mdata = NULL;
+
+   if (uclass_get_device(UCLASS_FWU_MDATA, 0, &dev) || !dev) {
+   log_err("Unable to get FWU metadata device\n");
+   return CMD_RET_FAILURE;
+   }
+
+   ret = fwu_get_mdata(&mdata);
+   if (ret < 0) {
+   log_err("Unable to get valid FWU metadata\n");
+   ret = CMD_RET_FAILURE;
+   goto out;
+   }


I think here would be a need to also check data you get back.
I am playing with it and if I rewrite one copy and second copy is different I 
don't get any error message and I think it is wrong.
You should IMHO use mdata_check hooks to check that what you get is correct and 
aligned.


Thanks,
Michal

Re: [RFC] Data structure for information handoff between firmware boot stages

[Simon Glass]

Hi Jose,

Thank you for that and good to talk to you the other day.

This looks very close to me. My comments are mostly on the terminology
/ level of detail:

1. 'Board controller' may not exist so really should be in dotted lines
2. The Producer / Consumer terminology seems off to me. The Transfer
List is passed through multiple firmware stages which may add to it,
use bits of it, etc. They don't really consume it. Nor does one stage
produce the whole thing. I suggest calling it sender / receiver.
3. Figure 2 is so small it is illegible. Please can you expand it?
4. Can you use lower-case hex in the tables? Let's break with Intel
:-) Or is that an ARM standard?
5. In 2.3 for the alignment sum can use use ~15 instead of 0xff00
so it works on 64-bit machines also?
6. The need for a TPM log is that this log may start in VPL before
DRAM is running. The ACPI tables are not created until U-Boot starts.
Also, the TPM log needs to be available with non-ACPI devices.
7. Section 2.5.6. s/etiher an RSDT or XSDT/either or both of an RSDT
or XSDT/ since this is commonly done
8. We can't really have a platform-specific CPU ID in a doc like this.
Can you add some detail about what it means and an example of how to
find it out and how to use it? Also. please add a description of why
this needs to be in a register. You told me this verbally but I think
it is important.
9. Re 2.5.5 - is it actually useful to create a single ACPI-table
entry? Can you add some text about why it would be used?
10. Need to describe how to allocate a new tag. Also let's give each
tag a name, like XFERLISTT_FDT so we can find it in source code.
11. I cannot find any problem with using x2 the AArch64 entry, but I
do wonder about the 'signature'. How about a 1 in the last nibble so
we can use it as a version number in future if needed? See context at
[1, although. I suspect you already have.
12. I believe we need a device tree offset in the registers also,
since we may need to access the device tree before we access the
bloblist. So I think x0 and r2 should always be set to the DT address.
13. Can we note that x30/lr must be set to the return address? That
allows firmware to fail to start and return an error code in r0/x0.
See this doc [2]
14. We should note that the data structures in TL should be simple C
structures and not complex things, for which devicetree should be
used, since it has a basic structure on which a schema can be built.
The exception to this is historical, custom, binary formats which I
hope that Intel is now moving past.

[1] https://lists.denx.de/pipermail/u-boot/2021-November/466543.html
[2] 
https://patchwork.ozlabs.org/project/uboot/patch/20220117080353.v2.12.I91d5b9ae45e8d1081b1e165620ad1946bd69af00@changeid/

Regards,
Simon


On Mon, 30 May 2022 at 03:24, Jose Marinho  wrote:
>
> Good morning Simon,
>
> Thank you for reviewing the FW handoff ALP0 spec proposal, and for your 
> comments.
>
> We have integrated your comments and iterated the spec proposal to ALP1.
> The ALP1 document can be obtained here: 
> https://developer.arm.com/documentation/den0135/a
>
> A quick summary of the comments you made:
> - rename handoff list since it can easily be confused with the HOB list (HOB 
> list = HandOff Block list): we've adopted the term "Transfer List".
> - rename node to entry.
> - rename Host to Application Processor (Host for embedded developers is the 
> development host and so was a confusing term to denote the main processor on 
> the target/board)
> - rename payload to data.
> - don't use CRC-32 for the checksum (it requires 1Kb of constants for a SW 
> implementation): adopted a simple sum to 0 scheme (similar to ACPI tables).
> - mandate entry and list alignment to 16-bytes rather than 8-bytes.
> - allow entries to have arbitrary size instead of mandating multiples of 8 
> bytes. (this requires a small padding area at the end of each entry whose 
> size is not a multiple of 16 bytes).
> - Create a new entry for a full set of ACPI tables: this requirement does not 
> originate in ACPI, but it's rather a result of the legacy u-boot ACPI table 
> creation code.
>
> Hopefully this is a complete recount 😊. Please let us know if something is 
> missing.
>
> Note that for the ACPI table aggregate, we opted to mandate an RSDP at the 
> start of the entry. The RSDP then points to a RSDT or XSDT (or both).
>
> Also, In your comments you requested an entry type specific for the TCPA or 
> TPM2 ACPI tables.  This makes for a quicker TPM log retrieval.
> For this release we were asked to keep the number of ACPI entry types to a 
> minimum.
> For now, we can leverage the generic ACPI table entry (tag_id=4) to carry the 
> TCPA or TPM2 tables.
> Having said this, the intent is for communities to request the entry 
> definitions that they require.
> Hopefully this more specific TPM2/TCPA entry can be soon integrated as a 
> community contribution!
>
> Please let us know if you (and the u-boot community) have additional comments 

[PATCH v2] clk: update clk_clean_rate_cache to use private clk struct

[Patrick Delaunay]

In clk_clean_rate_cache, clk->rate should update the private clock
struct, in particular when CCF is activated, to save the cached
rate value.

When clk_get_parent_rate is called, the cached information
is read from pclk->rate, with pclk = clk_get_parent(clk).

As the cached is read from private clk data, the update should
be done also on it.

Fixes: 6b7fd3128f7 ("clk: fix set_rate to clean up cached rates for the 
hierarchy")
Signed-off-by: Patrick Delaunay 
---

Changes in v2:
- set *clkp = clk when CCF is not activated and when the clock is not found

 drivers/clk/clk-uclass.c | 18 +-
 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c
index b89c77bf794..5cfa022a6dc 100644
--- a/drivers/clk/clk-uclass.c
+++ b/drivers/clk/clk-uclass.c
@@ -544,6 +544,19 @@ ulong clk_round_rate(struct clk *clk, ulong rate)
return ops->round_rate(clk, rate);
 }
 
+static void clk_get_priv(struct clk *clk, struct clk **clkp)
+{
+   *clkp = clk;
+
+   /* get private clock struct associated to the provided clock */
+   if (CONFIG_IS_ENABLED(CLK_CCF)) {
+   /* Take id 0 as a non-valid clk, such as dummy */
+   if (clk->id)
+   clk_get_by_id(clk->id, clkp);
+   }
+}
+
+/* clean cache, called with private clock struct */
 static void clk_clean_rate_cache(struct clk *clk)
 {
struct udevice *child_dev;
@@ -563,6 +576,7 @@ static void clk_clean_rate_cache(struct clk *clk)
 ulong clk_set_rate(struct clk *clk, ulong rate)
 {
const struct clk_ops *ops;
+   struct clk *clkp;
 
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
if (!clk_valid(clk))
@@ -572,8 +586,10 @@ ulong clk_set_rate(struct clk *clk, ulong rate)
if (!ops->set_rate)
return -ENOSYS;
 
+   /* get private clock struct used for cache */
+   clk_get_priv(clk, &clkp);
/* Clean up cached rates for us and all child clocks */
-   clk_clean_rate_cache(clk);
+   clk_clean_rate_cache(clkp);
 
return ops->set_rate(clk, rate);
 }
-- 
2.25.1

Re: [PATCH 09/10] tools: zynqmp_psu_init_minimize: Add serdes_illcalib forward declaration

[Stefan Herbrechtsmeier]

Am 20.06.2022 um 09:18 schrieb Michal Simek:

On 6/20/22 09:07, Stefan Herbrechtsmeier wrote:

Am 16.06.2022 um 17:13 schrieb Michal Simek:

On 6/8/22 18:20, Stefan Herbrechtsmeier wrote:

[CAUTION: External Email]

From: Stefan Herbrechtsmeier 

A forward declaration for the serdes_illcalib function.

Signed-off-by: Stefan Herbrechtsmeier 


---

  tools/zynqmp_psu_init_minimize.sh | 5 +
  1 file changed, 5 insertions(+)

diff --git a/tools/zynqmp_psu_init_minimize.sh 
b/tools/zynqmp_psu_init_minimize.sh

index 31fbeac327..8411065e13 100755
--- a/tools/zynqmp_psu_init_minimize.sh
+++ b/tools/zynqmp_psu_init_minimize.sh
@@ -108,6 +108,11 @@ cat << EOF >${TMP}
  #include 
  #include 

+static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate,
+  u32 lane2_protocol, u32 lane2_rate,
+  u32 lane1_protocol, u32 lane1_rate,
+  u32 lane0_protocol, u32 lane0_rate);
+


Better to resort that functions to avoid these additional lines.


Do you propose to move the serdes_illcalib and 
serdes_illcalib_pcie_gen1 functions via sed?


swapping that functions should be enough. Whatever tool which does this 
job is fine.


Does the swap need to check for the serdes_illcalib function inside the 
psu_serdes_init_data function or is a general reorder okay?


The psu_init_gpl.c for e-a2197-00-revA, zcu208-revA and zcu216-revA 
already use a forward declaration. Would it be okay to add the forward 
declaration if the function is used inside the source file?


Better to just fix this. Can you please send the patch?


The e-a2197-00-revA/psu_init_gpl.c file has an additional forward 
declaration of the dpll_prog function.


Regards
  Stefan

[PATCH] arm64: zynqmp: Used fixed-partitions for QSPI in k26

[Michal Simek]

Using fixed partitions is recommended way how to describe QSPI. Also add
label for qspi flash memory to be able to reference it in future.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-sm-k26-revA.dts | 163 +++-
 1 file changed, 85 insertions(+), 78 deletions(-)

diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts 
b/arch/arm/dts/zynqmp-sm-k26-revA.dts
index 7c2bfa395da7..ac349a9dcc5d 100644
--- a/arch/arm/dts/zynqmp-sm-k26-revA.dts
+++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts
@@ -130,7 +130,7 @@
 
 &qspi { /* MIO 0-5 - U143 */
status = "okay";
-   flash@0 { /* MT25QU512A */
+   spi_flash: flash@0 { /* MT25QU512A */
compatible = "mt25qu512a", "jedec,spi-nor"; /* 64MB */
#address-cells = <1>;
#size-cells = <1>;
@@ -138,83 +138,90 @@
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-max-frequency = <4000>; /* 40MHz */
-   partition@0 {
-   label = "Image Selector";
-   reg = <0x0 0x8>; /* 512KB */
-   read-only;
-   lock;
-   };
-   partition@8 {
-   label = "Image Selector Golden";
-   reg = <0x8 0x8>; /* 512KB */
-   read-only;
-   lock;
-   };
-   partition@10 {
-   label = "Persistent Register";
-   reg = <0x10 0x2>; /* 128KB */
-   };
-   partition@12 {
-   label = "Persistent Register Backup";
-   reg = <0x12 0x2>; /* 128KB */
-   };
-   partition@14 {
-   label = "Open_1";
-   reg = <0x14 0xC>; /* 768KB */
-   };
-   partition@20 {
-   label = "Image A (FSBL, PMU, ATF, U-Boot)";
-   reg = <0x20 0xD0>; /* 13MB */
-   };
-   partition@f0 {
-   label = "ImgSel Image A Catch";
-   reg = <0xF0 0x8>; /* 512KB */
-   read-only;
-   lock;
-   };
-   partition@f8 {
-   label = "Image B (FSBL, PMU, ATF, U-Boot)";
-   reg = <0xF8 0xD0>; /* 13MB */
-   };
-   partition@1c8 {
-   label = "ImgSel Image B Catch";
-   reg = <0x1C8 0x8>; /* 512KB */
-   read-only;
-   lock;
-   };
-   partition@1d0 {
-   label = "Open_2";
-   reg = <0x1D0 0x10>; /* 1MB */
-   };
-   partition@1e0 {
-   label = "Recovery Image";
-   reg = <0x1E0 0x20>; /* 2MB */
-   read-only;
-   lock;
-   };
-   partition@200 {
-   label = "Recovery Image Backup";
-   reg = <0x200 0x20>; /* 2MB */
-   read-only;
-   lock;
-   };
-   partition@220 {
-   label = "U-Boot storage variables";
-   reg = <0x220 0x2>; /* 128KB */
-   };
-   partition@222 {
-   label = "U-Boot storage variables backup";
-   reg = <0x222 0x2>; /* 128KB */
-   };
-   partition@224 {
-   label = "SHA256";
-   reg = <0x224 0x1>; /* 256B but 64KB sector */
-   read-only;
-   lock;
-   };
-   partition@225 {
-   label = "User";
-   reg = <0x225 0x1db>; /* 29.5 MB */
+
+   partitions {
+   compatible = "fixed-partitions";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   partition@0 {
+   label = "Image Selector";
+   reg = <0x0 0x8>; /* 512KB */
+   read-only;
+   lock;
+   };
+   partition@8 {
+   label = "Image Selector Golden";
+   reg = <0x8 0x8>; /* 512KB */
+   read-only;
+   lock;
+   };
+   partition@10 {
+   label = "Persistent Register";
+  

Re: [PATCH 09/10] tools: zynqmp_psu_init_minimize: Add serdes_illcalib forward declaration

[Michal Simek]

On 6/20/22 15:38, Stefan Herbrechtsmeier wrote:

Am 20.06.2022 um 09:18 schrieb Michal Simek:

On 6/20/22 09:07, Stefan Herbrechtsmeier wrote:

Am 16.06.2022 um 17:13 schrieb Michal Simek:

On 6/8/22 18:20, Stefan Herbrechtsmeier wrote:

[CAUTION: External Email]

From: Stefan Herbrechtsmeier 

A forward declaration for the serdes_illcalib function.

Signed-off-by: Stefan Herbrechtsmeier 
---

  tools/zynqmp_psu_init_minimize.sh | 5 +
  1 file changed, 5 insertions(+)

diff --git a/tools/zynqmp_psu_init_minimize.sh 
b/tools/zynqmp_psu_init_minimize.sh

index 31fbeac327..8411065e13 100755
--- a/tools/zynqmp_psu_init_minimize.sh
+++ b/tools/zynqmp_psu_init_minimize.sh
@@ -108,6 +108,11 @@ cat << EOF >${TMP}
  #include 
  #include 

+static int serdes_illcalib(u32 lane3_protocol, u32 lane3_rate,
+  u32 lane2_protocol, u32 lane2_rate,
+  u32 lane1_protocol, u32 lane1_rate,
+  u32 lane0_protocol, u32 lane0_rate);
+


Better to resort that functions to avoid these additional lines.


Do you propose to move the serdes_illcalib and serdes_illcalib_pcie_gen1 
functions via sed?


swapping that functions should be enough. Whatever tool which does this job is 
fine.


Does the swap need to check for the serdes_illcalib function inside the 
psu_serdes_init_data function or is a general reorder okay?


Everybody should call checkpatch and compile it. Tool is prepares that files but 
at the end it is up to user to fix the rest.

Taht's why general reorder is fine for me.



The psu_init_gpl.c for e-a2197-00-revA, zcu208-revA and zcu216-revA already 
use a forward declaration. Would it be okay to add the forward declaration if 
the function is used inside the source file?


Better to just fix this. Can you please send the patch?


The e-a2197-00-revA/psu_init_gpl.c file has an additional forward declaration of 
the dpll_prog function.


Please fix all of these.

Thanks,
Michal

[PATCH 1/3] doc: environment: Drop u-boot_addr_r

[Tom Rini]

This variable is never set nor explained why it would be set, drop it.

Signed-off-by: Tom Rini 
---
 doc/usage/environment.rst | 1 -
 1 file changed, 1 deletion(-)

diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst
index 28a8952b7528..a3f23d4e4e22 100644
--- a/doc/usage/environment.rst
+++ b/doc/usage/environment.rst
@@ -390,7 +390,6 @@ in U-Boot code.
 = ==  ==
 Image File Name  RAM Address  Flash Location
 = ==  ==
-u-bootu-boot u-boot_addr_ru-boot_addr
 Linux kernel  bootfile   kernel_addr_rkernel_addr
 device tree blob  fdtfilefdt_addr_r   fdt_addr
 ramdisk   ramdiskfileramdisk_addr_r   ramdisk_addr
-- 
2.25.1

[PATCH 2/3] doc: environment: Expand on fdt_addr, initrd_addr and loadaddr

[Tom Rini]

- Explain why fdt_addr and initrd_addr should not be set to disable
  relocation normally.
- Provide some advice on the typical loadaddr default value.

Signed-off-by: Tom Rini 
---
 doc/usage/environment.rst | 15 ---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst
index a3f23d4e4e22..a9a4702632d2 100644
--- a/doc/usage/environment.rst
+++ b/doc/usage/environment.rst
@@ -204,7 +204,9 @@ fdt_high
 to work it must reside in writable memory, have
 sufficient padding on the end of it for u-boot to
 add the information it needs into it, and the memory
-must be accessible by the kernel.
+must be accessible by the kernel.  This usage is strongly discouraged
+however as it also stops U-Boot from ensuring the device tree starting
+address is properly aligned and a misaligned tree will cause OS failures.
 
 fdtcontroladdr
 if set this is the address of the control flattened
@@ -240,14 +242,21 @@ initrd_high
 memory. In this case U-Boot will NOT COPY the
 ramdisk at all. This may be useful to reduce the
 boot time on your system, but requires that this
-feature is supported by your Linux kernel.
+feature is supported by your Linux kernel.  This usage however requires
+that the user ensure that there will be no overlap with other parts of the
+iamge such as the Linux kernel BSS.  It should not be enabled by default
+and only done as part of optimizing a deployment.
 
 ipaddr
 IP address; needed for tftpboot command
 
 loadaddr
 Default load address for commands like "bootp",
-"rarpboot", "tftpboot", "loadb" or "diskboot"
+"rarpboot", "tftpboot", "loadb" or "diskboot".  Note that the optimal
+default values here will vary between architectures.  On 32bit ARM for
+example, some offset from start of memory is used as the Linux kernel
+zImage has a self decompressor and it's best if we stay out of where that
+will be working.
 
 loads_echo
 see CONFIG_LOADS_ECHO
-- 
2.25.1

[PATCH 3/3] doc: environment: Further expand on Image locations and provide example

[Tom Rini]

Start by elaborating on what some of our constraints tend to be with
image location values, and document where these external constraints
come from.  Provide a new subsection, an example based on the TI ARMv7
OMAP2PLUS families of chips, that gives sample values and explains why
we use these particular values.  This is based on what is in
include/configs/ti_armv7_common.h as of fb3ad9bd923d ("TI: Add, use a
DEFAULT_LINUX_BOOT_ENV environment string") as this contains just the
values referenced in this document now and not some of the further
additions that are less generic.

Signed-off-by: Tom Rini 
---
 doc/usage/environment.rst | 39 +++
 1 file changed, 39 insertions(+)

diff --git a/doc/usage/environment.rst b/doc/usage/environment.rst
index a9a4702632d2..f70ccd6a58ee 100644
--- a/doc/usage/environment.rst
+++ b/doc/usage/environment.rst
@@ -404,6 +404,42 @@ device tree blob  fdtfilefdt_addr_r   fdt_addr
 ramdisk   ramdiskfileramdisk_addr_r   ramdisk_addr
 = ==  ==
 
+When setting the RAM addresses for `kernel_addr_r`, `fdt_addr_r` and
+`ramdisk_addr_r` there are several constraints to keep in mind. When booting
+Linux, the `Booting ARM Linux`_ and `Booting AArch64 Linux`_ documents lay out
+the requirements for booting all ARM platforms, including both alignment and
+where within memory various things must be.  These guidelines tend to also be
+correct for other OSes and unless specifically contradicted by documentation
+specific to another architecture, are good rules to follow for other
+architectures as well.
+
+Example Image locations
+^^^
+
+If we take the Texas Instruments OMAP2PLUS family of ARMv7 processors as an
+example for the above listed variables, we would do::
+
+loadaddr=0x8200
+kernel_addr_r=${loadaddr}
+fdt_addr_r=0x8800
+ramdisk_addr_r=0x8808
+bootm_size=0x1000
+
+To explain this, we start by noting that DRAM starts at 0x8000.  A 32MiB
+buffer from the start of memory as our default load address, and so where the
+kernel would also be loaded to.  This will hopefully allow for us to have the
+whole of the compressed kernel image exist in memory above where the whole of
+the decompressed kernel image will be, and allow for a quicker boot.  Next, we
+say that the device tree will be placed at 128MiB offset from the start of
+memory.  This is suggested by the kernel documment as it is exceedingly
+unlikely to be overwritten by the kernel itself given other architectural
+constraints.  We then allow for the device tree to be up to 512KiB in size
+before placing the ramdisk in memory.  We then say that everything should be
+within the first 256MiB of memory so that U-Boot can relocate things as needed
+to ensure proper alignment.  We pick 256MiB as our value here because we know
+there are very few platforms on in this family with less memory.  It could be
+as high as 768MiB and still ensure that everything would be visible to the
+kernel, but again we go with what we assume is the safest assumption.
 
 Automatically updated variables
 ---
@@ -472,3 +508,6 @@ Implementation
 --
 
 See :doc:`../develop/environment` for internal development details.
+
+.. _`Booting ARM Linux`: 
https://www.kernel.org/doc/html/latest/arm/booting.html
+.. _`Booting AArch64 Linux`: 
https://www.kernel.org/doc/html/latest/arm64/booting.html
-- 
2.25.1

Re: [PATCH] image: fit: Use stack allocation macro

[Sean Anderson]

On 6/20/22 3:01 AM, Joel Stanley wrote:
> The documentation above the DEFINE_ALIGN_BUFFER says it's for use
> outside functions, but we're inside one.
> 
> Instead use ALLOC_CACHE_ALIGN_BUFFER, the stack based macro, which also
> includes the cache alignment.
> 
> Fixes: b583348ca8c8 ("image: fit: Align hash output buffers")
> Signed-off-by: Joel Stanley 
> ---
> This fixes booting the ast2600-evb image in qemu, which was getting all
> zeroes for the output of the FIT hash check.
> 
> The 'static' buffer was in BSS but the output image didn't contain a BSS
> section. The pointer was left pointing to the text, so the code was
> trying to write to the (read only?) text area in SPI NOR memory space.
> 
>  tools/mkimage.h  | 3 +--
>  boot/image-fit.c | 3 +--
>  2 files changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/tools/mkimage.h b/tools/mkimage.h
> index 7652c8b001c3..f5ca65e2edfd 100644
> --- a/tools/mkimage.h
> +++ b/tools/mkimage.h
> @@ -41,8 +41,7 @@ static inline ulong map_to_sysmem(void *ptr)
>   return (ulong)(uintptr_t)ptr;
>  }
>  
> -#define ARCH_DMA_MINALIGN 1
> -#define DEFINE_ALIGN_BUFFER(type, name, size, alugn) type name[size]
> +#define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) type name[size]
>  
>  #define MKIMAGE_TMPFILE_SUFFIX   ".tmp"
>  #define MKIMAGE_MAX_TMPFILE_LEN  256
> diff --git a/boot/image-fit.c b/boot/image-fit.c
> index f57d97f55229..df3e5df8836a 100644
> --- a/boot/image-fit.c
> +++ b/boot/image-fit.c
> @@ -1264,8 +1264,7 @@ int calculate_hash(const void *data, int data_len, 
> const char *name,
>  static int fit_image_check_hash(const void *fit, int noffset, const void 
> *data,
>   size_t size, char **err_msgp)
>  {
> - DEFINE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN,
> - ARCH_DMA_MINALIGN);
> + ALLOC_CACHE_ALIGN_BUFFER(uint8_t, value, FIT_MAX_HASH_LEN);
>   int value_len;
>   const char *algo;
>   uint8_t *fit_value;
> 

Reviewed-by: Sean Anderson 

RE: [RFC PATCH v4 28/28] board: keymile: common: Use environment to store IVM_* variables.

[Aleksandar Gerasimovski]

On Fri, Jun 17, 2022 at 12:31:58AM +0200, Francis Laniel wrote:

> These boards used set_local_var() to store some variables as local shell.
> They then used get_local_var() to retrieve the variables values.
> 
> Instead of using local shell variables, they should use environment 
> ones (like a majority of board).
> So, this patch converts using local variables to environment ones.
> 
> Signed-off-by: Francis Laniel 
> ---
>  board/keymile/common/common.c | 8 
>  board/keymile/common/ivm.c| 9 +
>  2 files changed, 5 insertions(+), 12 deletions(-)
> 
> diff --git a/board/keymile/common/common.c 
> b/board/keymile/common/common.c index 3999f48719..72939af36e 100644
> --- a/board/keymile/common/common.c
> +++ b/board/keymile/common/common.c
> @@ -219,7 +219,7 @@ static int do_setboardid(struct cmd_tbl *cmdtp, int flag, 
> int argc,
>   unsigned char buf[32];
>   char *p;
>  
> - p = get_local_var("IVM_BoardId");
> + p = env_get("IVM_BoardId");
>   if (!p) {
>   printf("can't get the IVM_Boardid\n");
>   return 1;
> @@ -228,7 +228,7 @@ static int do_setboardid(struct cmd_tbl *cmdtp, int flag, 
> int argc,
>   env_set("boardid", (char *)buf);
>   printf("set boardid=%s\n", buf);
>  
> - p = get_local_var("IVM_HWKey");
> + p = env_get("IVM_HWKey");
>   if (!p) {
>   printf("can't get the IVM_HWKey\n");
>   return 1;
> @@ -272,14 +272,14 @@ static int do_checkboardidhwk(struct cmd_tbl *cmdtp, 
> int flag, int argc,
>* first read out the real inventory values, these values are
>* already stored in the local hush variables
>*/
> - p = get_local_var("IVM_BoardId");
> + p = env_get("IVM_BoardId");
>   if (!p) {
>   printf("can't get the IVM_Boardid\n");
>   return 1;
>   }
>   rc = strict_strtoul(p, 16, &ivmbid);
>  
> - p = get_local_var("IVM_HWKey");
> + p = env_get("IVM_HWKey");
>   if (!p) {
>   printf("can't get the IVM_HWKey\n");
>   return 1;
> diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c 
> index 67db0c50f4..e266d7ce81 100644
> --- a/board/keymile/common/ivm.c
> +++ b/board/keymile/common/ivm.c
> @@ -44,14 +44,7 @@ static int ivm_calc_crc(unsigned char *buf, int 
> len)
>  
>  static int ivm_set_value(char *name, char *value)  {
> - char tempbuf[256];
> -
> - if (value) {
> - sprintf(tempbuf, "%s=%s", name, value);
> - return set_local_var(tempbuf, 0);
> - }
> - unset_local_var(name);
> - return 0;
> + return env_set(name, value);
>  }
>  
>  static int ivm_get_value(unsigned char *buf, int len, char *name, int 
> off,

Adding in the maintainer, but seems reasonable to me.

Reviewed-by: Tom Rini 

--
Tom

Reviewed-by: Aleksandar Gerasimovski 

--
Aleksandar

Re: [PATCH] pmic: pca9450: permit config on all bucks and LDOs

[Fabio Estevam]

On 20/06/2022 00:49, Heiko Thiery wrote:

In order to have the possibility to configure the regulators at system
startup through DM support, all LDOs and bucks must be able to be
changeable. Currently there is a limitation to change the values when
the output is enabled. Since the driver is based on the ROHM BD71837 
and a

comment that describes a limitation about switching while the output is
enabled can also be found there, the limitation probably comes from 
this type.


Signed-off-by: Heiko Thiery 


Reviewed-by: Fabio Estevam 

Re: [PATCH v2] watchdog: add amlogic watchdog support

[Stefan Roese]

On 13.06.22 16:00, Philippe Boos wrote:

Add support for hardware watchdog timer for Amlogic SoCs.
This driver has been heavily inspired by his Linux equivalent
(meson_gxbb_wdt.c).

Reviewed-by: Jerome Brunet 
Reviewed-by: Neil Armstrong 

Signed-off-by: Philippe Boos 



Reviewed-by: Stefan Roese 

Thanks,
Stefan


---

Your recommendations have been implemented. I let you check this version 2.
The reset works well when triggered by the wdt command in u-boot.

This watchdog driver has been tested on a GXL libretech-cc board and also on
a custom G12a board. I did the following test cases:
  * boot with a faulty boot command, then we reach watchdog reset successfully,
  * boot a Linux kernel with and without watchdog support, and check if it is
working as expected.


  MAINTAINERS   |   1 +
  doc/board/amlogic/index.rst   |   2 +
  drivers/watchdog/Kconfig  |   7 ++
  drivers/watchdog/Makefile |   1 +
  drivers/watchdog/meson_gxbb_wdt.c | 136 ++
  5 files changed, 147 insertions(+)
  create mode 100644 drivers/watchdog/meson_gxbb_wdt.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 28e4d38238..ab3ef041f7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -160,6 +160,7 @@ F:  drivers/spi/meson_spifc.c
  F:drivers/pinctrl/meson/
  F:drivers/power/domain/meson-gx-pwrc-vpu.c
  F:drivers/video/meson/
+F: drivers/watchdog/meson_gxbb_wdt.c
  F:include/configs/meson64.h
  F:include/configs/meson64_android.h
  F:doc/board/amlogic/
diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst
index 9c7fadf2c0..cc2ba50889 100644
--- a/doc/board/amlogic/index.rst
+++ b/doc/board/amlogic/index.rst
@@ -73,6 +73,8 @@ This matrix concerns the actual source code version.
  
+---+---+-+--+-++-+--+
  | PCIe (+NVMe)  | *N/A* | *N/A*   | *N/A*
| **Yes** | **Yes**| **Yes** | **Yes**  |
  
+---+---+-+--+-++-+--+
+| Watchdog  | *N/A* | **Yes** | *N/A*| 
*N/A*   | *N/A*  | *N/A*   | *N/A*|
++---+---+-+--+-++-+--+
  
  Boot Documentation

  --
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index c3eb8a8aec..da0fa5396f 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -175,6 +175,13 @@ config WDT_MAX6370
help
  Select this to enable max6370 watchdog timer.
  
+config WDT_MESON_GXBB

+   bool "Amlogic watchdog timer support"
+   depends on WDT
+   help
+ Select this to enable Meson watchdog timer,
+ which can be found on some Amlogic platforms.
+
  config WDT_MPC8xx
bool "MPC8xx watchdog timer support"
depends on WDT && MPC8xx
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 1f6199beca..0e2f582a5f 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_WDT_ORION) += orion_wdt.o
  obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
  obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
  obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
+obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
  obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
  obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
  obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
diff --git a/drivers/watchdog/meson_gxbb_wdt.c 
b/drivers/watchdog/meson_gxbb_wdt.c
new file mode 100644
index 00..6ab005813f
--- /dev/null
+++ b/drivers/watchdog/meson_gxbb_wdt.c
@@ -0,0 +1,136 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022 BayLibre, SAS.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define GXBB_WDT_CTRL_REG  0x0
+#define GXBB_WDT_TCNT_REG  0x8
+#define GXBB_WDT_RSET_REG  0xc
+
+#define GXBB_WDT_CTRL_SYS_RESET_NOWBIT(26)
+#define GXBB_WDT_CTRL_CLKDIV_ENBIT(25)
+#define GXBB_WDT_CTRL_CLK_EN   BIT(24)
+#define GXBB_WDT_CTRL_EE_RESET BIT(21)
+#define GXBB_WDT_CTRL_EN   BIT(18)
+
+#define GXBB_WDT_CTRL_DIV_MASK GENMASK(17, 0)
+#define GXBB_WDT_TCNT_SETUP_MASK   GENMASK(15, 0)
+
+
+struct amlogic_wdt_priv {
+   void __iomem *reg_base;
+};
+
+static int amlogic_wdt_set_timeout(struct udevice *dev, u64 timeout_ms)
+{
+   struct amlogic_wdt_priv *data = dev_get_priv(dev);
+
+   if (timeout_ms > GXBB_WDT_TCNT_SETUP_MASK) {
+   dev_warn(dev, "%s: timeout_ms=%llu: maximum watchdog timeout 
exceeded\n",
+__func__, timeout_ms);
+   tim

[PATCH] toradex: tdx-cfg-block: add new toradex oui range

[Philippe Schenker]

From: Philippe Schenker 

Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:

For serial-numbers -16777215 OUI 00:14:2d is taken
For serial-numbers 16777216-33554431 OUI 8c:06:cb is taken

Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.

Signed-off-by: Philippe Schenker 
Reviewed-by: Francesco Dolcini 

---

 board/toradex/common/tdx-cfg-block.c | 42 +---
 board/toradex/common/tdx-cfg-block.h |  2 ++
 board/toradex/common/tdx-common.c|  5 +---
 3 files changed, 41 insertions(+), 8 deletions(-)

diff --git a/board/toradex/common/tdx-cfg-block.c 
b/board/toradex/common/tdx-cfg-block.c
index 6c8cf4592d..053c03ddf2 100644
--- a/board/toradex/common/tdx-cfg-block.c
+++ b/board/toradex/common/tdx-cfg-block.c
@@ -159,6 +159,42 @@ const char * const toradex_display_adapters[] = {
[159] = "Verdin DSI to LVDS Adapter",
 };
 
+const u32 toradex_ouis[] = {
+   [0] = 0x00142dUL,
+   [1] = 0x8c06cbUL,
+};
+
+static u32 get_serial_from_mac(struct toradex_eth_addr *eth_addr)
+{
+   int i;
+   u32 oui = ntohl(eth_addr->oui) >> 8;
+   u32 nic = ntohl(eth_addr->nic) >> 8;
+
+   for (i = 0; i < ARRAY_SIZE(toradex_ouis); i++) {
+   if (toradex_ouis[i] == oui)
+   break;
+   }
+
+   return (u32)((i << 24) + nic);
+}
+
+void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr)
+{
+   u8 oui_index = tdx_serial >> 24;
+   u32 nic = tdx_serial & GENMASK(23, 0);
+   u32 oui;
+
+   if (oui_index >= ARRAY_SIZE(toradex_ouis)) {
+   puts("Can't find OUI for this serial#\n");
+   oui_index = 0;
+   }
+
+   oui = toradex_ouis[oui_index];
+
+   eth_addr->oui = htonl(oui << 8);
+   eth_addr->nic = htonl(nic << 8);
+}
+
 #ifdef CONFIG_TDX_CFG_BLOCK_IS_IN_MMC
 static int tdx_cfg_block_mmc_storage(u8 *config_block, int write)
 {
@@ -331,8 +367,7 @@ int read_tdx_cfg_block(void)
memcpy(&tdx_eth_addr, config_block + offset,
   6);
 
-   /* NIC part of MAC address is serial number */
-   tdx_serial = ntohl(tdx_eth_addr.nic) >> 8;
+   tdx_serial = get_serial_from_mac(&tdx_eth_addr);
break;
case TAG_HW:
memcpy(&tdx_hw_tag, config_block + offset, 8);
@@ -950,8 +985,7 @@ static int do_cfgblock_create(struct cmd_tbl *cmdtp, int 
flag, int argc,
}
 
/* Convert serial number to MAC address (the storage format) */
-   tdx_eth_addr.oui = htonl(0x00142dUL << 8);
-   tdx_eth_addr.nic = htonl(tdx_serial << 8);
+   get_mac_from_serial(tdx_serial, &tdx_eth_addr);
 
/* Valid Tag */
write_tag(config_block, &offset, TAG_VALID, NULL, 0);
diff --git a/board/toradex/common/tdx-cfg-block.h 
b/board/toradex/common/tdx-cfg-block.h
index 43e662e41d..1790698486 100644
--- a/board/toradex/common/tdx-cfg-block.h
+++ b/board/toradex/common/tdx-cfg-block.h
@@ -114,4 +114,6 @@ int read_tdx_cfg_block_carrier(void);
 
 int try_migrate_tdx_cfg_block_carrier(void);
 
+void get_mac_from_serial(u32 tdx_serial, struct toradex_eth_addr *eth_addr);
+
 #endif /* _TDX_CFG_BLOCK_H */
diff --git a/board/toradex/common/tdx-common.c 
b/board/toradex/common/tdx-common.c
index 9db4553e0f..211d3c35e0 100644
--- a/board/toradex/common/tdx-common.c
+++ b/board/toradex/common/tdx-common.c
@@ -20,8 +20,6 @@
 #include 
 #include "tdx-common.h"
 
-#define TORADEX_OUI 0x00142dUL
-
 #ifdef CONFIG_TDX_CFG_BLOCK
 static char tdx_serial_str[9];
 static char tdx_board_rev_str[6];
@@ -85,8 +83,7 @@ int show_board_info(void)
 
if (read_tdx_cfg_block()) {
printf("MISSING TORADEX CONFIG BLOCK\n");
-   tdx_eth_addr.oui = htonl(TORADEX_OUI << 8);
-   tdx_eth_addr.nic = htonl(tdx_serial << 8);
+   get_mac_from_serial(tdx_serial, &tdx_eth_addr);
checkboard();
} else {
sprintf(tdx_serial_str, "%08u", tdx_serial);
-- 
2.36.1

Re: Please pull u-boot-fsl-qoirq: next

[Tom Rini]

On Mon, Jun 20, 2022 at 09:46:37AM +, Peng Fan (OSS) wrote:

> Hi Tom,
> 
> Please pull u-boot-fsl-qoriq for next
> 
> CI: 
> https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/12429
> 

Applied to u-boot/next, thanks!

-- 
Tom


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Description: PGP signature

Re: [PULL] Pull request for u-boot next / v2022.10 = u-boot-stm32-20220620

[Tom Rini]

On Mon, Jun 20, 2022 at 11:32:20AM +0200, Patrick DELAUNAY wrote:

> I Tom,
> 
> Please pull the STM32 related fixes for u-boot/next, v2022.10:
> u-boot-stm32-20220620
> 
> - Add STM32MP13 SoCs support with associated board STM32M135F-DK
> - Correct livetree support in stm32mp1 boards
> - Activate livetree for stm32mp15 DHSOM boards
> 
> CI status:
> https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/12393
> 
> Thanks,
> Patrick
> 
> git request-pull
> origin/nexthttps://source.denx.de/u-boot/custodians/u-boot-stm.git/
> u-boot-stm32-20220620
> 
> The following changes since commit 98c4828740f4944462b7d9608b95d5b73850c7b0:
> 
>   Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
> into next (2022-06-16 09:27:43 -0400)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-stm.git/
> tags/u-boot-stm32-20220620
> 
> for you to fetch changes up to eae488b77906692627622abc61f5b7160b6eb2a4:
> 
>   stm32mp1: fix reference for STMicroelectronics (2022-06-17 14:12:27 +0200)
> 

Applied to u-boot/next, thanks!

-- 
Tom


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Description: PGP signature

Re: [PATCH] drivers: usb: dwc3: Add support for AM62 USB wrapper driver

[Guillaume LA ROQUE]

Hi,

Le 07/04/2022 à 09:28, Aswath Govindraju a écrit :

Add support for AM62 USB wrapper for DWC3 Controller in AM62 SoC.

Signed-off-by: Aswath Govindraju 
---

Link to corresponding kernel dt-bindings and driver patches,
- https://patchwork.kernel.org/project/linux-usb/list/?series=629613

  drivers/usb/dwc3/Kconfig |   7 +
  drivers/usb/dwc3/Makefile|   1 +
  drivers/usb/dwc3/dwc3-am62.c | 284 +++
  3 files changed, 292 insertions(+)
  create mode 100644 drivers/usb/dwc3/dwc3-am62.c

diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 62aa65bf0cd2..87e19720ab84 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -63,6 +63,13 @@ config USB_DWC3_LAYERSCAPE
  Host and Peripheral operation modes are supported. OTG is not
  supported.
  
+config USB_DWC3_AM62

+   tristate "Texas Instruments AM62 Platforms"
+   depends on ARCH_K3 || COMPILE_TEST
+   default USB_DWC3



some depend or select are missing , driver need to have SYSCON, MISC and 
DWC3_GENERIC  to compile.



Regards
Guillaume


+   help
+ Support of USB2 functionality in TI's AM62 platforms
+
  menu "PHY Subsystem"
  
  config USB_DWC3_PHY_OMAP

diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 0dd1ba87cd94..26bc3a7379b7 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -7,6 +7,7 @@ dwc3-y  := core.o
  obj-$(CONFIG_USB_DWC3_GADGET) += gadget.o ep0.o
  
  obj-$(CONFIG_USB_DWC3_OMAP)		+= dwc3-omap.o

+obj-$(CONFIG_USB_DWC3_AM62)+= dwc3-am62.o
  obj-$(CONFIG_USB_DWC3_MESON_G12A) += dwc3-meson-g12a.o
  obj-$(CONFIG_USB_DWC3_MESON_GXL)  += dwc3-meson-gxl.o
  obj-$(CONFIG_USB_DWC3_GENERIC)+= dwc3-generic.o
diff --git a/drivers/usb/dwc3/dwc3-am62.c b/drivers/usb/dwc3/dwc3-am62.c
new file mode 100644
index ..a3ad609036e2
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-am62.c
@@ -0,0 +1,284 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dwc3-am62.c - TI specific Glue layer for AM62 DWC3 USB Controller
+ *
+ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* USB WRAPPER register offsets */
+#define USBSS_PID  0x0
+#define USBSS_OVERCURRENT_CTRL 0x4
+#define USBSS_PHY_CONFIG   0x8
+#define USBSS_PHY_TEST 0xc
+#define USBSS_CORE_STAT0x14
+#define USBSS_HOST_VBUS_CTRL   0x18
+#define USBSS_MODE_CONTROL 0x1c
+#define USBSS_WAKEUP_CONFIG0x30
+#define USBSS_WAKEUP_STAT  0x34
+#define USBSS_OVERRIDE_CONFIG  0x38
+#define USBSS_IRQ_MISC_STATUS_RAW  0x430
+#define USBSS_IRQ_MISC_STATUS  0x434
+#define USBSS_IRQ_MISC_ENABLE_SET  0x438
+#define USBSS_IRQ_MISC_ENABLE_CLR  0x43c
+#define USBSS_IRQ_MISC_EOI 0x440
+#define USBSS_INTR_TEST0x490
+#define USBSS_VBUS_FILTER  0x614
+#define USBSS_VBUS_STAT0x618
+#define USBSS_DEBUG_CFG0x708
+#define USBSS_DEBUG_DATA   0x70c
+#define USBSS_HOST_HUB_CTRL0x714
+
+/* PHY CONFIG register bits */
+#define USBSS_PHY_VBUS_SEL_MASKGENMASK(2, 1)
+#define USBSS_PHY_VBUS_SEL_SHIFT   1
+#define USBSS_PHY_LANE_REVERSE BIT(0)
+
+/* MODE CONTROL register bits */
+#define USBSS_MODE_VALID   BIT(0)
+
+/* IRQ_MISC_STATUS_RAW register bits */
+#define USBSS_IRQ_MISC_RAW_VBUSVALID   BIT(22)
+#define USBSS_IRQ_MISC_RAW_SESSVALID   BIT(20)
+
+/* IRQ_MISC_STATUS register bits */
+#define USBSS_IRQ_MISC_VBUSVALID   BIT(22)
+#define USBSS_IRQ_MISC_SESSVALID   BIT(20)
+
+/* IRQ_MISC_ENABLE_SET register bits */
+#define USBSS_IRQ_MISC_ENABLE_SET_VBUSVALIDBIT(22)
+#define USBSS_IRQ_MISC_ENABLE_SET_SESSVALIDBIT(20)
+
+/* IRQ_MISC_ENABLE_CLR register bits */
+#define USBSS_IRQ_MISC_ENABLE_CLR_VBUSVALIDBIT(22)
+#define USBSS_IRQ_MISC_ENABLE_CLR_SESSVALIDBIT(20)
+
+/* VBUS_STAT register bits */
+#define USBSS_VBUS_STAT_SESSVALID  BIT(2)
+#define USBSS_VBUS_STAT_VBUSVALID  BIT(0)
+
+/* Mask for PHY PLL REFCLK */
+#define PHY_PLL_REFCLK_MASKGENMASK(3, 0)
+
+struct dwc3_data {
+   struct udevice *dev;
+   void __iomem *usbss;
+   struct regmap *syscon;
+   unsigned int offset;
+   unsigned int vbus_divider;
+};
+
+static inline u32 dwc3_ti_readl(struct dwc3_data *data, u32 offset)
+{
+   return readl(data->usbss + offset);
+}
+
+static inline void dwc3_ti_writel(struct dwc3_data *data, u32 offset, u32 
value)
+{
+   writel(value, data->usbss + offset);
+}
+
+static const int dwc3_ti_rate_table[] = {  /* in KHZ */
+   9600,
+   1,
+

RE: [RFC PATCH v4 28/28] board: keymile: common: Use environment to store IVM_* variables.

[Holger Brunck]

Hi Francis,

> On Fri, Jun 17, 2022 at 12:31:58AM +0200, Francis Laniel wrote:
> 
> > These boards used set_local_var() to store some variables as local shell.
> > They then used get_local_var() to retrieve the variables values.
> >
> > Instead of using local shell variables, they should use environment
> > ones (like a majority of board).
> > So, this patch converts using local variables to environment ones.
> >

why do we need to change that? It is intended that we use this hush variable
infrastructure from u-boot (common/hush.c) for our IVM data and not the
standard env. We read the IVM at boot time and store these values in
RAM. It is not intended to store them permanently in the flash or wherever
the environment is saved. Especially in our case we have some boards where
the environment is in a i2c EEPROM and we don't want to write down to
the EEPROM each time when the board is starting.

> > Signed-off-by: Francis Laniel 
> > ---
> >  board/keymile/common/common.c | 8 
> >  board/keymile/common/ivm.c| 9 +
> >  2 files changed, 5 insertions(+), 12 deletions(-)
> >
> > diff --git a/board/keymile/common/common.c
> > b/board/keymile/common/common.c index 3999f48719..72939af36e 100644
> > --- a/board/keymile/common/common.c
> > +++ b/board/keymile/common/common.c
> > @@ -219,7 +219,7 @@ static int do_setboardid(struct cmd_tbl *cmdtp, int
> flag, int argc,
> > unsigned char buf[32];
> > char *p;
> >
> > -   p = get_local_var("IVM_BoardId");
> > +   p = env_get("IVM_BoardId");
> > if (!p) {
> > printf("can't get the IVM_Boardid\n");
> > return 1;
> > @@ -228,7 +228,7 @@ static int do_setboardid(struct cmd_tbl *cmdtp, int
> flag, int argc,
> > env_set("boardid", (char *)buf);
> > printf("set boardid=%s\n", buf);
> >
> > -   p = get_local_var("IVM_HWKey");
> > +   p = env_get("IVM_HWKey");
> > if (!p) {
> > printf("can't get the IVM_HWKey\n");
> > return 1;
> > @@ -272,14 +272,14 @@ static int do_checkboardidhwk(struct cmd_tbl
> *cmdtp, int flag, int argc,
> >  * first read out the real inventory values, these values are
> >  * already stored in the local hush variables
> >  */
> > -   p = get_local_var("IVM_BoardId");
> > +   p = env_get("IVM_BoardId");
> > if (!p) {
> > printf("can't get the IVM_Boardid\n");
> > return 1;
> > }
> > rc = strict_strtoul(p, 16, &ivmbid);
> >
> > -   p = get_local_var("IVM_HWKey");
> > +   p = env_get("IVM_HWKey");
> > if (!p) {
> > printf("can't get the IVM_HWKey\n");
> > return 1;
> > diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
> > index 67db0c50f4..e266d7ce81 100644
> > --- a/board/keymile/common/ivm.c
> > +++ b/board/keymile/common/ivm.c
> > @@ -44,14 +44,7 @@ static int ivm_calc_crc(unsigned char *buf, int
> > len)
> >
> >  static int ivm_set_value(char *name, char *value)  {
> > -   char tempbuf[256];
> > -
> > -   if (value) {
> > -   sprintf(tempbuf, "%s=%s", name, value);
> > -   return set_local_var(tempbuf, 0);
> > -   }
> > -   unset_local_var(name);
> > -   return 0;
> > +   return env_set(name, value);

this means we are now writing always down to the permanent
environment or? And this I would really like to avoid in our case.

Best regards
Holger

Re: [RFC PATCH v4 28/28] board: keymile: common: Use environment to store IVM_* variables.

[Tom Rini]

On Mon, Jun 20, 2022 at 03:27:34PM +, Holger Brunck wrote:
> Hi Francis,
> 
> > On Fri, Jun 17, 2022 at 12:31:58AM +0200, Francis Laniel wrote:
> > 
> > > These boards used set_local_var() to store some variables as local shell.
> > > They then used get_local_var() to retrieve the variables values.
> > >
> > > Instead of using local shell variables, they should use environment
> > > ones (like a majority of board).
> > > So, this patch converts using local variables to environment ones.
> > >
> 
> why do we need to change that? It is intended that we use this hush variable
> infrastructure from u-boot (common/hush.c) for our IVM data and not the
> standard env. We read the IVM at boot time and store these values in
> RAM. It is not intended to store them permanently in the flash or wherever
> the environment is saved. Especially in our case we have some boards where
> the environment is in a i2c EEPROM and we don't want to write down to
> the EEPROM each time when the board is starting.

So, the whole series is about updating hush to bring in a new baseline
version of the shell, from busybox.

> > > Signed-off-by: Francis Laniel 
> > > ---
> > >  board/keymile/common/common.c | 8 
> > >  board/keymile/common/ivm.c| 9 +
> > >  2 files changed, 5 insertions(+), 12 deletions(-)
> > >
> > > diff --git a/board/keymile/common/common.c
> > > b/board/keymile/common/common.c index 3999f48719..72939af36e 100644
> > > --- a/board/keymile/common/common.c
> > > +++ b/board/keymile/common/common.c
> > > @@ -219,7 +219,7 @@ static int do_setboardid(struct cmd_tbl *cmdtp, int
> > flag, int argc,
> > >   unsigned char buf[32];
> > >   char *p;
> > >
> > > - p = get_local_var("IVM_BoardId");
> > > + p = env_get("IVM_BoardId");
> > >   if (!p) {
> > >   printf("can't get the IVM_Boardid\n");
> > >   return 1;
> > > @@ -228,7 +228,7 @@ static int do_setboardid(struct cmd_tbl *cmdtp, int
> > flag, int argc,
> > >   env_set("boardid", (char *)buf);
> > >   printf("set boardid=%s\n", buf);
> > >
> > > - p = get_local_var("IVM_HWKey");
> > > + p = env_get("IVM_HWKey");
> > >   if (!p) {
> > >   printf("can't get the IVM_HWKey\n");
> > >   return 1;
> > > @@ -272,14 +272,14 @@ static int do_checkboardidhwk(struct cmd_tbl
> > *cmdtp, int flag, int argc,
> > >* first read out the real inventory values, these values are
> > >* already stored in the local hush variables
> > >*/
> > > - p = get_local_var("IVM_BoardId");
> > > + p = env_get("IVM_BoardId");
> > >   if (!p) {
> > >   printf("can't get the IVM_Boardid\n");
> > >   return 1;
> > >   }
> > >   rc = strict_strtoul(p, 16, &ivmbid);
> > >
> > > - p = get_local_var("IVM_HWKey");
> > > + p = env_get("IVM_HWKey");
> > >   if (!p) {
> > >   printf("can't get the IVM_HWKey\n");
> > >   return 1;
> > > diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c
> > > index 67db0c50f4..e266d7ce81 100644
> > > --- a/board/keymile/common/ivm.c
> > > +++ b/board/keymile/common/ivm.c
> > > @@ -44,14 +44,7 @@ static int ivm_calc_crc(unsigned char *buf, int
> > > len)
> > >
> > >  static int ivm_set_value(char *name, char *value)  {
> > > - char tempbuf[256];
> > > -
> > > - if (value) {
> > > - sprintf(tempbuf, "%s=%s", name, value);
> > > - return set_local_var(tempbuf, 0);
> > > - }
> > > - unset_local_var(name);
> > > - return 0;
> > > + return env_set(name, value);
> 
> this means we are now writing always down to the permanent
> environment or? And this I would really like to avoid in our case.

Note that "env_set" does not force a save of the running environment.
These variables will be exposed to the CLI run-time, which I am not sure
if they are today, so if the user then does "saveenv" they will be
written.  That I think would be a functional difference.

-- 
Tom


signature.asc
Description: PGP signature

Re: [PATCH 03/10] stm32mp: add support of STM32MP13x Rev.Y

[Patrick DELAUNAY]

Hi,

On 6/20/22 11:17, Patrick Delaunay wrote:

Add support of STM32MP13x Rev.Y for the Silicon revision REV_ID = 0x1002.

Signed-off-by: Patrick Delaunay 
---

  arch/arm/mach-stm32mp/include/mach/sys_proto.h | 1 +
  arch/arm/mach-stm32mp/stm32mp13x.c | 3 +++
  2 files changed, 4 insertions(+)

diff --git a/arch/arm/mach-stm32mp/include/mach/sys_proto.h 
b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
index 4b564e86dc5..02debea5469 100644
--- a/arch/arm/mach-stm32mp/include/mach/sys_proto.h
+++ b/arch/arm/mach-stm32mp/include/mach/sys_proto.h
@@ -41,6 +41,7 @@ u32 get_cpu_dev(void);
  
  #define CPU_REV1	0x1000

  #define CPU_REV1_10x1001
+#define CPU_REV1_2 0x1002


Bad value for register decoding, REV_ID[15:0]: Silicon revision

as minor version is a bitfield:

#define CPU_REV1_2  0x1003


I will update this value in V2.



  #define CPU_REV2  0x2000
  #define CPU_REV2_10x2001
  
diff --git a/arch/arm/mach-stm32mp/stm32mp13x.c b/arch/arm/mach-stm32mp/stm32mp13x.c

index bd3f24c349a..845d973ad1b 100644
--- a/arch/arm/mach-stm32mp/stm32mp13x.c
+++ b/arch/arm/mach-stm32mp/stm32mp13x.c
@@ -126,6 +126,9 @@ void get_soc_name(char name[SOC_NAME_SIZE])
case CPU_REV1_1:
cpu_r = "Z";
break;
+   case CPU_REV1_2:
+   cpu_r = "Y";
+   break;
default:
cpu_r = "?";
break;



Regards


Patrick

Re: [PATCH v2 0/2] board/armltd: add support for corstone1000

[Rui Miguel Silva]

Hey Tom,
On Wed, May 11, 2022 at 10:55:39AM +0100, Rui Miguel Silva wrote:
> This series add support for arm's corstone1000 platform (see
> specific commit changelog for references to documentation),
> but first introduce a command (loadm which will integrate with
> efi subsystem) used in one of the boot sequence in this
> platform.
> 
> v1 [0] -> v2:
> Tom:
>   - device tree status (now on kernel next [1])
>   - loadm add documentation, testing, change the default value
>   - kconfig extra line
>   - dm_eth, dm_serial cleanups in platform code and headers
>   - moving bootcommand to defconfig
> 

Just notice that this series even though got yours reviewed-by tag
never got applied. Do I need to do something from my side for this to
be merged?

Thanks in advance.
Cheers,
 Rui
> 
> [0]: https://lore.kernel.org/all/20220322104118.573537-1-rui.si...@linaro.org/
> [1]: 
> https://lore.kernel.org/all/165089291072.1036016.13574796454085073736.b4...@arm.com/
> 
> Rui Miguel Silva (2):
>   cmd: load: add load command for memory mapped
>   arm: add support to corstone1000 platform
> 
>  README   |   1 +
>  arch/arm/Kconfig |   8 +-
>  arch/arm/dts/Makefile|   3 +
>  arch/arm/dts/corstone1000-fvp.dts|  51 +++
>  arch/arm/dts/corstone1000-mps3.dts   |  32 +
>  arch/arm/dts/corstone1000.dtsi   | 164 +++
>  board/armltd/corstone1000/Kconfig|  12 ++
>  board/armltd/corstone1000/MAINTAINERS|   7 +
>  board/armltd/corstone1000/Makefile   |   7 +
>  board/armltd/corstone1000/corstone1000.c |  91 +
>  cmd/Kconfig  |   5 +
>  cmd/bootefi.c|  12 ++
>  cmd/load.c   |  48 +++
>  configs/corstone1000_defconfig   |  48 +++
>  configs/sandbox64_defconfig  |   1 +
>  configs/sandbox_defconfig|   1 +
>  doc/usage/loadm.rst  |  49 +++
>  include/configs/corstone1000.h   |  52 +++
>  include/efi_loader.h |   2 +
>  include/test/suites.h|   1 +
>  lib/efi_loader/efi_device_path.c |   9 ++
>  test/cmd/Makefile|   1 +
>  test/cmd/loadm.c |  72 ++
>  test/cmd_ut.c|   6 +
>  24 files changed, 682 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/dts/corstone1000-fvp.dts
>  create mode 100644 arch/arm/dts/corstone1000-mps3.dts
>  create mode 100644 arch/arm/dts/corstone1000.dtsi
>  create mode 100644 board/armltd/corstone1000/Kconfig
>  create mode 100644 board/armltd/corstone1000/MAINTAINERS
>  create mode 100644 board/armltd/corstone1000/Makefile
>  create mode 100644 board/armltd/corstone1000/corstone1000.c
>  create mode 100644 configs/corstone1000_defconfig
>  create mode 100644 doc/usage/loadm.rst
>  create mode 100644 include/configs/corstone1000.h
>  create mode 100644 test/cmd/loadm.c
> 
> -- 
> 2.36.1
> 

Re: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy waiting in cm_full_cfg

[Paweł Anikiel]

On Mon, Jun 20, 2022 at 2:29 PM Chee, Tien Fong
 wrote:
>
>
>
> > -Original Message-
> > From: Paweł Anikiel 
> > Sent: Monday, 20 June, 2022 8:14 PM
> > To: Chee, Tien Fong 
> > Cc: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> > michal.si...@xilinx.com; u-boot@lists.denx.de; s...@chromium.org;
> > feste...@denx.de; ja...@amarulasolutions.com;
> > andre.przyw...@arm.com; Armstrong, Neil ;
> > pbrobin...@gmail.com; thar...@gateworks.com; paul@linaro.org;
> > christianshew...@gmail.com; adrian.fiergol...@fastree3d.com;
> > marek.be...@nic.cz; Denk, Wolfgang ; Lim, Elly Siew Chin
> > ; upstr...@semihalf.com;
> > ams...@chromium.org
> > Subject: Re: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy
> > waiting in cm_full_cfg
> >
> > On Mon, Jun 20, 2022 at 10:40 AM Chee, Tien Fong
> >  wrote:
> > >
> > > Hi,
> > >
> > > > -Original Message-
> > > > From: Paweł Anikiel 
> > > > Sent: Friday, 17 June, 2022 6:47 PM
> > > > To: Vasut, Marek ; simon.k.r.goldschm...@gmail.com;
> > > > Chee, Tien Fong ; michal.si...@xilinx.com
> > > > Cc: u-boot@lists.denx.de; s...@chromium.org; feste...@denx.de;
> > > > ja...@amarulasolutions.com; andre.przyw...@arm.com; Armstrong,
> > Neil
> > > > ; pbrobin...@gmail.com;
> > > > thar...@gateworks.com; paul@linaro.org;
> > > > christianshew...@gmail.com; adrian.fiergol...@fastree3d.com;
> > > > marek.be...@nic.cz; Denk, Wolfgang ; Lim, Elly Siew
> > Chin
> > > > ; upstr...@semihalf.com;
> > > > ams...@chromium.org; Paweł Anikiel 
> > > > Subject: [PATCH v3 08/11] socfpga: arria10: Replace delays with busy
> > > > waiting in cm_full_cfg
> > > >
> > > > Using udelay while the clocks aren't fully configured causes the
> > > > timer system to save the wrong clock rate. Use sdelay and
> > > > wait_on_value instead (the values used in these functions were found
> > experimentally).
> > > >
> > > > Signed-off-by: Paweł Anikiel 
> > > > ---
> > > >  arch/arm/mach-socfpga/clock_manager_arria10.c | 31
> > > > +-
> > > > -
> > > >  1 file changed, 22 insertions(+), 9 deletions(-)
> > > >
> > > > diff --git a/arch/arm/mach-socfpga/clock_manager_arria10.c
> > > > b/arch/arm/mach-socfpga/clock_manager_arria10.c
> > > > index 58d5d3fd8a..b48a2b47bc 100644
> > > > --- a/arch/arm/mach-socfpga/clock_manager_arria10.c
> > > > +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
> > >
> > > Did you try to call timer_init() after cm_basic_init() in board_init_f? 
> > > If that's
> > working, then no change is required to fix this clock issue.
> >
> > Seems like timer_init() isn't implemented on Arria 10 (it defaults to the
> > return 0 stub). I also tried dm_timer_init(), no luck.
> >
> > I did some code digging, the clock rate is read by clk_get_rate(), and the
> > timer rate is set by dw_apb_timer_probe() (drivers/timer/dw-apb-
> > timer.c:77), and there doesn't seem to be a good way of updating that value
> > later.
> >
> > The only other function I could find that sets the timer rate is
> > timer_pre_probe() from drivers/timer/timer-uclass.c, which very much looks
> > like what we need, but it's static and the name suggests it shouldn't be 
> > called
> > manually anyway.
> >
>
> Thanks for the details finding.
>
> I found that both Cyclone 5 and S10 (including all AARCH64 devices) having 
> own timer_init() as solution for this issue.
> Cyclone 5 : 
> https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-socfpga/timer.c
> S10: 
> https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-socfpga/timer_s10.c
>
> Do you think this is good idea having the same for A10 device?

I don't think overriding timer_init() alone is going to help.
(Re)initializing the timer after cm_basic_init() won't help the fact
that xdelay() divides the clock ticks (which are correct) by
gd->timer->uclass_priv_->clock_rate
(https://source.denx.de/u-boot/u-boot/-/blob/master/lib/time.c#L81)
(which was incorrectly set by a call to udelay() from cm_full_cfg()).

I honestly don't see how Cyclone/Arria 5 solve this problem, as they
don't implement a __udelay(), and their cm_basic_init() also uses
timer-based delays
(https://source.denx.de/u-boot/u-boot/-/blob/master/arch/arm/mach-socfpga/clock_manager_gen5.c#L98,
eventually calls udelay(1) in include/wait_bit.h). I don't have any
board on which I could test this on, but I suspect they may also save
the wrong clock rate value (causing xdelay() to delay for wrong
amounts of time).

Stratix 10 looks okay to me, as it implements its own __udelay() and
__usec_to_tick() in SPL.

So a solution would be to implement a __udelay() and a
__usec_to_tick(). I don't really know how to do that though, S10 uses
the built-in armv8 timer for that.

Regards,
Paweł

Re: [PATCH v3 0/3] usb: add isp1760 hcd support

[Rui Miguel Silva]

Hi Tom,
On Tue Jun 14, 2022 at 6:45 PM WEST, Rui Miguel Silva wrote:
> Hi *,
> On Wed, May 25, 2022 at 02:22:48PM +0100, Rui Miguel Silva wrote:
> > Add support for the usb isp1760 host controller family, which
> > for example is present in MPS3 FPGA board from Arm (isp1763).
> > 
> > First we move some helper functions and defines to a more
> > common place to be shared by several urb users. (patch 1/3)
> > 
> > Then add the driver itself, is a ported version of the kernel
> > actual driver, which I am also the maintainer. (patch 2/3)
> > 
> > And last, enable it for the corstone1000 platform that uses
> > that MPS3 board for its implementation (patch 3/3).
> >
>
> Any chance this series get some feedback?

Am I missing something here? to get some comments on this series?

Thanks,
Cheers,
  Rui
>
> Thanks in advance,
>
> Cheers,
>   Rui
>
> > 
> > Cheers,
> >Rui
> > 
> > v2[3] -> v3:
> > - when you think you have amend commit and fix stay
> >   uncommitted.
> >   s/[HC_FIELD_MAX] = {};/[HC_FIELD_MAX] = {},/
> > v1[0] -> v2:
> > - gentle ping
> > - merge fix from kernel upstream [1]
> > 
> > PS: This should go on top of the corstone1000 platform enable
> > series [2]
> > 
> > 0: 
> > https://lore.kernel.org/u-boot/20220512142016.2025129-1-rui.si...@linaro.org/
> > 1: 
> > https://lore.kernel.org/linux-usb/20220516091424.391209-1-linus.wall...@linaro.org/
> > 2: 
> > https://lore.kernel.org/u-boot/20220511095541.1461937-1-rui.si...@linaro.org/T/#t
> > 3: 
> > https://lore.kernel.org/u-boot/20220523090119.1212016-1-rui.si...@linaro.org/
> > 
> > Rui Miguel Silva (3):
> >   usb: common: move urb code to common
> >   usb: add isp1760 family driver
> >   corstone1000: enable isp1763 usb controller and mmc
> > 
> >  Makefile  |1 +
> >  configs/corstone1000_defconfig|3 +
> >  drivers/usb/Kconfig   |2 +
> >  drivers/usb/common/Makefile   |3 +
> >  drivers/usb/common/usb_urb.c  |  160 ++
> >  drivers/usb/host/r8a66597-hcd.c   |   30 +-
> >  drivers/usb/isp1760/Kconfig   |   12 +
> >  drivers/usb/isp1760/Makefile  |6 +
> >  drivers/usb/isp1760/isp1760-core.c|  380 +++
> >  drivers/usb/isp1760/isp1760-core.h|   96 +
> >  drivers/usb/isp1760/isp1760-hcd.c | 2477 +
> >  drivers/usb/isp1760/isp1760-hcd.h |   81 +
> >  drivers/usb/isp1760/isp1760-if.c  |  125 +
> >  drivers/usb/isp1760/isp1760-regs.h|  292 ++
> >  drivers/usb/isp1760/isp1760-uboot.c   |   75 +
> >  drivers/usb/isp1760/isp1760-uboot.h   |   27 +
> >  drivers/usb/musb-new/musb_core.c  |2 +-
> >  drivers/usb/musb-new/musb_host.c  |2 +-
> >  drivers/usb/musb-new/musb_host.h  |2 +-
> >  drivers/usb/musb-new/musb_uboot.c |   38 +-
> >  drivers/usb/musb-new/musb_uboot.h |2 +-
> >  include/configs/corstone1000.h|6 +
> >  .../linux/usb/usb_urb_compat.h|   47 +-
> >  include/usb_defs.h|   32 +
> >  24 files changed, 3825 insertions(+), 76 deletions(-)
> >  create mode 100644 drivers/usb/common/usb_urb.c
> >  create mode 100644 drivers/usb/isp1760/Kconfig
> >  create mode 100644 drivers/usb/isp1760/Makefile
> >  create mode 100644 drivers/usb/isp1760/isp1760-core.c
> >  create mode 100644 drivers/usb/isp1760/isp1760-core.h
> >  create mode 100644 drivers/usb/isp1760/isp1760-hcd.c
> >  create mode 100644 drivers/usb/isp1760/isp1760-hcd.h
> >  create mode 100644 drivers/usb/isp1760/isp1760-if.c
> >  create mode 100644 drivers/usb/isp1760/isp1760-regs.h
> >  create mode 100644 drivers/usb/isp1760/isp1760-uboot.c
> >  create mode 100644 drivers/usb/isp1760/isp1760-uboot.h
> >  rename drivers/usb/musb-new/usb-compat.h => 
> > include/linux/usb/usb_urb_compat.h (59%)
> > 
> > -- 
> > 2.36.1
> > 

RE: [RFC PATCH v4 28/28] board: keymile: common: Use environment to store IVM_* variables.

[Holger Brunck]

> > > On Fri, Jun 17, 2022 at 12:31:58AM +0200, Francis Laniel wrote:
> > >
> > > > These boards used set_local_var() to store some variables as local 
> > > > shell.
> > > > They then used get_local_var() to retrieve the variables values.
> > > >
> > > > Instead of using local shell variables, they should use
> > > > environment ones (like a majority of board).
> > > > So, this patch converts using local variables to environment ones.
> > > >
> >
> > why do we need to change that? It is intended that we use this hush
> > variable infrastructure from u-boot (common/hush.c) for our IVM data
> > and not the standard env. We read the IVM at boot time and store these
> > values in RAM. It is not intended to store them permanently in the
> > flash or wherever the environment is saved. Especially in our case we
> > have some boards where the environment is in a i2c EEPROM and we don't
> > want to write down to the EEPROM each time when the board is starting.
> 
> So, the whole series is about updating hush to bring in a new baseline 
> version of
> the shell, from busybox.
> 

Ok.

> > > > Signed-off-by: Francis Laniel
> > > > 
> > > > ---
> > > >  board/keymile/common/common.c | 8 
> > > >  board/keymile/common/ivm.c| 9 +
> > > >  2 files changed, 5 insertions(+), 12 deletions(-)
> > > >
> > > > diff --git a/board/keymile/common/common.c
> > > > b/board/keymile/common/common.c index 3999f48719..72939af36e
> > > > 100644
> > > > --- a/board/keymile/common/common.c
> > > > +++ b/board/keymile/common/common.c
> > > > @@ -219,7 +219,7 @@ static int do_setboardid(struct cmd_tbl
> > > > *cmdtp, int
> > > flag, int argc,
> > > > unsigned char buf[32];
> > > > char *p;
> > > >
> > > > -   p = get_local_var("IVM_BoardId");
> > > > +   p = env_get("IVM_BoardId");
> > > > if (!p) {
> > > > printf("can't get the IVM_Boardid\n");
> > > > return 1;
> > > > @@ -228,7 +228,7 @@ static int do_setboardid(struct cmd_tbl
> > > > *cmdtp, int
> > > flag, int argc,
> > > > env_set("boardid", (char *)buf);
> > > > printf("set boardid=%s\n", buf);
> > > >
> > > > -   p = get_local_var("IVM_HWKey");
> > > > +   p = env_get("IVM_HWKey");
> > > > if (!p) {
> > > > printf("can't get the IVM_HWKey\n");
> > > > return 1;
> > > > @@ -272,14 +272,14 @@ static int do_checkboardidhwk(struct cmd_tbl
> > > *cmdtp, int flag, int argc,
> > > >  * first read out the real inventory values, these values are
> > > >  * already stored in the local hush variables
> > > >  */
> > > > -   p = get_local_var("IVM_BoardId");
> > > > +   p = env_get("IVM_BoardId");
> > > > if (!p) {
> > > > printf("can't get the IVM_Boardid\n");
> > > > return 1;
> > > > }
> > > > rc = strict_strtoul(p, 16, &ivmbid);
> > > >
> > > > -   p = get_local_var("IVM_HWKey");
> > > > +   p = env_get("IVM_HWKey");
> > > > if (!p) {
> > > > printf("can't get the IVM_HWKey\n");
> > > > return 1;
> > > > diff --git a/board/keymile/common/ivm.c
> > > > b/board/keymile/common/ivm.c index 67db0c50f4..e266d7ce81 100644
> > > > --- a/board/keymile/common/ivm.c
> > > > +++ b/board/keymile/common/ivm.c
> > > > @@ -44,14 +44,7 @@ static int ivm_calc_crc(unsigned char *buf, int
> > > > len)
> > > >
> > > >  static int ivm_set_value(char *name, char *value)  {
> > > > -   char tempbuf[256];
> > > > -
> > > > -   if (value) {
> > > > -   sprintf(tempbuf, "%s=%s", name, value);
> > > > -   return set_local_var(tempbuf, 0);
> > > > -   }
> > > > -   unset_local_var(name);
> > > > -   return 0;
> > > > +   return env_set(name, value);
> >
> > this means we are now writing always down to the permanent environment
> > or? And this I would really like to avoid in our case.
> 
> Note that "env_set" does not force a save of the running environment.

Ah yes you are right. But still for the first boot of our board we will call 
saveenv
to store an initial environment and with this change it would also write down
the IVM data which is currently only stored temporary in RAM.

> These variables will be exposed to the CLI run-time, which I am not sure if 
> they
> are today, so if the user then does "saveenv" they will be written.  That I 
> think
> would be a functional difference.
> 

yes exactly and I wonder if this functionality will be also possible after the 
rework.
I mean our use case (even it seems we are the only ones using it) is quite 
useful
I think. We read out inventory data from an EEPROM and they are parsed and
temporary stored in RAM and then we are able to use them as any other
environment variables without the need to store them permanently. I also would
like to avoid this as the data should be permanently in the IVM only and not 
stored
a second time permanently  in f

[PATCH 1/3] mmc: stm32_sdmmc2: cosmetic: rename stm32_sdmmc_bind

[Patrick Delaunay]

Rename stm32_sdmmc_bind to stm32_sdmmc2_bind as all oter function
in SDMMCv2 driver

Signed-off-by: Patrick Delaunay 
---

 drivers/mmc/stm32_sdmmc2.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index 81b07609a91..e3853b7fbfb 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -763,7 +763,7 @@ clk_free:
return ret;
 }
 
-static int stm32_sdmmc_bind(struct udevice *dev)
+static int stm32_sdmmc2_bind(struct udevice *dev)
 {
struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
 
@@ -781,7 +781,7 @@ U_BOOT_DRIVER(stm32_sdmmc2) = {
.of_match = stm32_sdmmc2_ids,
.ops = &stm32_sdmmc2_ops,
.probe = stm32_sdmmc2_probe,
-   .bind = stm32_sdmmc_bind,
+   .bind = stm32_sdmmc2_bind,
.priv_auto  = sizeof(struct stm32_sdmmc2_priv),
.plat_auto  = sizeof(struct stm32_sdmmc2_plat),
 };
-- 
2.25.1

[PATCH 2/3] mmc: stm32_sdmmc2: remove privdata

[Patrick Delaunay]

All the elements of privdata are static and build from device tree,
they are moved in platdata to prepare the support of ops
of_to_plat.

Signed-off-by: Patrick Delaunay 
---

 drivers/mmc/stm32_sdmmc2.c | 145 ++---
 1 file changed, 70 insertions(+), 75 deletions(-)

diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index e3853b7fbfb..41f375b9d32 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -30,9 +30,6 @@
 struct stm32_sdmmc2_plat {
struct mmc_config cfg;
struct mmc mmc;
-};
-
-struct stm32_sdmmc2_priv {
fdt_addr_t base;
struct clk clk;
struct reset_ctl reset_ctl;
@@ -208,7 +205,7 @@ static void stm32_sdmmc2_start_data(struct udevice *dev,
struct mmc_data *data,
struct stm32_sdmmc2_ctx *ctx)
 {
-   struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
+   struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
u32 data_ctrl, idmabase0;
 
/* Configure the SDMMC DPSM (Data Path State Machine) */
@@ -224,10 +221,10 @@ static void stm32_sdmmc2_start_data(struct udevice *dev,
}
 
/* Set the SDMMC DataLength value */
-   writel(ctx->data_length, priv->base + SDMMC_DLEN);
+   writel(ctx->data_length, plat->base + SDMMC_DLEN);
 
/* Write to SDMMC DCTRL */
-   writel(data_ctrl, priv->base + SDMMC_DCTRL);
+   writel(data_ctrl, plat->base + SDMMC_DCTRL);
 
/* Cache align */
ctx->cache_start = rounddown(idmabase0, ARCH_DMA_MINALIGN);
@@ -242,19 +239,19 @@ static void stm32_sdmmc2_start_data(struct udevice *dev,
flush_dcache_range(ctx->cache_start, ctx->cache_end);
 
/* Enable internal DMA */
-   writel(idmabase0, priv->base + SDMMC_IDMABASE0);
-   writel(SDMMC_IDMACTRL_IDMAEN, priv->base + SDMMC_IDMACTRL);
+   writel(idmabase0, plat->base + SDMMC_IDMABASE0);
+   writel(SDMMC_IDMACTRL_IDMAEN, plat->base + SDMMC_IDMACTRL);
 }
 
 static void stm32_sdmmc2_start_cmd(struct udevice *dev,
   struct mmc_cmd *cmd, u32 cmd_param,
   struct stm32_sdmmc2_ctx *ctx)
 {
-   struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
+   struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
u32 timeout = 0;
 
-   if (readl(priv->base + SDMMC_CMD) & SDMMC_CMD_CPSMEN)
-   writel(0, priv->base + SDMMC_CMD);
+   if (readl(plat->base + SDMMC_CMD) & SDMMC_CMD_CPSMEN)
+   writel(0, plat->base + SDMMC_CMD);
 
cmd_param |= cmd->cmdidx | SDMMC_CMD_CPSMEN;
if (cmd->resp_type & MMC_RSP_PRESENT) {
@@ -277,30 +274,30 @@ static void stm32_sdmmc2_start_cmd(struct udevice *dev,
if (ctx->data_length) {
timeout = SDMMC_CMD_TIMEOUT;
} else {
-   writel(0, priv->base + SDMMC_DCTRL);
+   writel(0, plat->base + SDMMC_DCTRL);
 
if (cmd->resp_type & MMC_RSP_BUSY)
timeout = SDMMC_CMD_TIMEOUT;
}
 
/* Set the SDMMC Data TimeOut value */
-   writel(timeout, priv->base + SDMMC_DTIMER);
+   writel(timeout, plat->base + SDMMC_DTIMER);
 
/* Clear flags */
-   writel(SDMMC_ICR_STATIC_FLAGS, priv->base + SDMMC_ICR);
+   writel(SDMMC_ICR_STATIC_FLAGS, plat->base + SDMMC_ICR);
 
/* Set SDMMC argument value */
-   writel(cmd->cmdarg, priv->base + SDMMC_ARG);
+   writel(cmd->cmdarg, plat->base + SDMMC_ARG);
 
/* Set SDMMC command parameters */
-   writel(cmd_param, priv->base + SDMMC_CMD);
+   writel(cmd_param, plat->base + SDMMC_CMD);
 }
 
 static int stm32_sdmmc2_end_cmd(struct udevice *dev,
struct mmc_cmd *cmd,
struct stm32_sdmmc2_ctx *ctx)
 {
-   struct stm32_sdmmc2_priv *priv = dev_get_priv(dev);
+   struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
u32 mask = SDMMC_STA_CTIMEOUT;
u32 status;
int ret;
@@ -314,7 +311,7 @@ static int stm32_sdmmc2_end_cmd(struct udevice *dev,
}
 
/* Polling status register */
-   ret = readl_poll_timeout(priv->base + SDMMC_STA, status, status & mask,
+   ret = readl_poll_timeout(plat->base + SDMMC_STA, status, status & mask,
 1);
 
if (ret < 0) {
@@ -339,11 +336,11 @@ static int stm32_sdmmc2_end_cmd(struct udevice *dev,
}
 
if (status & SDMMC_STA_CMDREND && cmd->resp_type & MMC_RSP_PRESENT) {
-   cmd->response[0] = readl(priv->base + SDMMC_RESP1);
+   cmd->response[0] = readl(plat->base + SDMMC_RESP1);
if (cmd->resp_type & MMC_RSP_136) {
-   cmd->response[1] = readl(priv->base + SDMMC_RESP2);
-   cmd->response[2] = readl(priv->base + SDMMC_RESP3);
-   cmd->response[3] = readl(priv->base

[PATCH 3/3] mmc: stm32_sdmmc2: introduce of_to_plat ops

[Patrick Delaunay]

Add the uclass ops of_to_plat to parse the device tree properties
to respect the expected sequence by the driver model.

Signed-off-by: Patrick Delaunay 
---

 drivers/mmc/stm32_sdmmc2.c | 95 --
 1 file changed, 50 insertions(+), 45 deletions(-)

diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
index 41f375b9d32..bfce8a2e4a6 100644
--- a/drivers/mmc/stm32_sdmmc2.c
+++ b/drivers/mmc/stm32_sdmmc2.c
@@ -645,6 +645,47 @@ static const struct dm_mmc_ops stm32_sdmmc2_ops = {
.host_power_cycle = stm32_sdmmc2_host_power_cycle,
 };
 
+static int stm32_sdmmc2_of_to_plat(struct udevice *dev)
+{
+   struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
+   struct mmc_config *cfg = &plat->cfg;
+   int ret;
+
+   plat->base = dev_read_addr(dev);
+   if (plat->base == FDT_ADDR_T_NONE)
+   return -EINVAL;
+
+   if (dev_read_bool(dev, "st,neg-edge"))
+   plat->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE;
+   if (dev_read_bool(dev, "st,sig-dir"))
+   plat->pwr_reg_msk |= SDMMC_POWER_DIRPOL;
+   if (dev_read_bool(dev, "st,use-ckin"))
+   plat->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN;
+
+   cfg->f_min = 40;
+   cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
+   cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
+   cfg->name = "STM32 SD/MMC";
+   cfg->host_caps = 0;
+   cfg->f_max = 5200;
+   ret = mmc_of_parse(dev, cfg);
+   if (ret)
+   return ret;
+
+   ret = clk_get_by_index(dev, 0, &plat->clk);
+   if (ret)
+   return ret;
+
+   ret = reset_get_by_index(dev, 0, &plat->reset_ctl);
+   if (ret)
+   dev_dbg(dev, "No reset provided\n");
+
+   gpio_request_by_name(dev, "cd-gpios", 0, &plat->cd_gpio,
+GPIOD_IS_IN);
+
+   return 0;
+}
+
 static int stm32_sdmmc2_probe_level_translator(struct udevice *dev)
 {
struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
@@ -653,12 +694,6 @@ static int stm32_sdmmc2_probe_level_translator(struct 
udevice *dev)
struct gpio_desc ckin_gpio;
int clk_hi, clk_lo, ret;
 
-   /*
-* Assume the level translator is present if st,use-ckin is set.
-* This is to cater for DTs which do not implement this test.
-*/
-   plat->clk_reg_msk |= SDMMC_CLKCR_SELCLKRX_CKIN;
-
ret = gpio_request_by_name(dev, "st,cmd-gpios", 0, &cmd_gpio,
   GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
if (ret)
@@ -709,54 +744,23 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
 {
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct stm32_sdmmc2_plat *plat = dev_get_plat(dev);
-   struct mmc_config *cfg = &plat->cfg;
int ret;
 
-   plat->base = dev_read_addr(dev);
-   if (plat->base == FDT_ADDR_T_NONE)
-   return -EINVAL;
-
-   if (dev_read_bool(dev, "st,neg-edge"))
-   plat->clk_reg_msk |= SDMMC_CLKCR_NEGEDGE;
-   if (dev_read_bool(dev, "st,sig-dir"))
-   plat->pwr_reg_msk |= SDMMC_POWER_DIRPOL;
-   if (dev_read_bool(dev, "st,use-ckin"))
-   stm32_sdmmc2_probe_level_translator(dev);
-
-   ret = clk_get_by_index(dev, 0, &plat->clk);
-   if (ret)
-   return ret;
-
ret = clk_enable(&plat->clk);
-   if (ret)
-   goto clk_free;
-
-   ret = reset_get_by_index(dev, 0, &plat->reset_ctl);
-   if (ret)
-   dev_dbg(dev, "No reset provided\n");
-
-   gpio_request_by_name(dev, "cd-gpios", 0, &plat->cd_gpio,
-GPIOD_IS_IN);
-
-   cfg->f_min = 40;
-   cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
-   cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
-   cfg->name = "STM32 SD/MMC";
-
-   cfg->host_caps = 0;
-   cfg->f_max = 5200;
-   mmc_of_parse(dev, cfg);
+   if (ret) {
+   clk_free(&plat->clk);
+   return ret;
+   }
 
upriv->mmc = &plat->mmc;
 
+   if (plat->clk_reg_msk & SDMMC_CLKCR_SELCLKRX_CKIN)
+   stm32_sdmmc2_probe_level_translator(dev);
+
/* SDMMC init */
stm32_sdmmc2_reset(plat);
-   return 0;
-
-clk_free:
-   clk_free(&plat->clk);
 
-   return ret;
+   return 0;
 }
 
 static int stm32_sdmmc2_bind(struct udevice *dev)
@@ -778,5 +782,6 @@ U_BOOT_DRIVER(stm32_sdmmc2) = {
.ops = &stm32_sdmmc2_ops,
.probe = stm32_sdmmc2_probe,
.bind = stm32_sdmmc2_bind,
+   .of_to_plat = stm32_sdmmc2_of_to_plat,
.plat_auto  = sizeof(struct stm32_sdmmc2_plat),
 };
-- 
2.25.1