[PATCH v4] i2c: nuvoton: Add NPCM7xx i2c driver
Add Nuvoton BMC NPCM750 i2c driver
Signed-off-by: Jim Liu
---
changes for v4:
- remove i2c doc
changes for v3:
- add i2c doc
Changes for v2:
- use debug output in reset function
- use clr/setbits_8
---
drivers/i2c/Kconfig| 5 +
drivers/i2c/Makefile | 1 +
drivers/i2c/npcm-i2c.c | 631 +
3 files changed, 637 insertions(+)
create mode 100644 drivers/i2c/npcm-i2c.c
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index d25c5736ef..7e113b289e 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -447,6 +447,11 @@ config SYS_I2C_NEXELL
have several I2C ports and all are provided, controlled by the
device tree.
+config SYS_I2C_NPCM
+ bool "Nuvoton NPCM I2C driver"
+ help
+ Support for Nuvoton I2C controller driver.
+
config SYS_I2C_OCORES
bool "ocores I2C driver"
depends on DM_I2C
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 9d41f379bb..7e046f809a 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_SYS_I2C_MV) += mv_i2c.o
obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_NEXELL) += nx_i2c.o
+obj-$(CONFIG_SYS_I2C_NPCM) += npcm_i2c.o
obj-$(CONFIG_SYS_I2C_OCORES) += ocores_i2c.o
obj-$(CONFIG_SYS_I2C_OCTEON) += octeon_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/npcm-i2c.c b/drivers/i2c/npcm-i2c.c
new file mode 100644
index 00..dfac6483de
--- /dev/null
+++ b/drivers/i2c/npcm-i2c.c
@@ -0,0 +1,631 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021 Nuvoton Technology Corp.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define I2C_FREQ_100K 10
+#define NPCM_I2C_TIMEOUT_MS10
+#define NPCM7XX_I2CSEGCTL_INIT_VAL 0x0333F000
+#define NPCM8XX_I2CSEGCTL_INIT_VAL 0x9333F000
+
+/* SCLFRQ min/max field values */
+#define SCLFRQ_MIN 10
+#define SCLFRQ_MAX 511
+
+/* SMBCTL1 */
+#define SMBCTL1_START BIT(0)
+#define SMBCTL1_STOP BIT(1)
+#define SMBCTL1_INTEN BIT(2)
+#define SMBCTL1_ACKBIT(4)
+#define SMBCTL1_STASTREBIT(7)
+
+/* SMBCTL2 */
+#define SMBCTL2_ENABLE BIT(0)
+
+/* SMBCTL3 */
+#define SMBCTL3_SCL_LVLBIT(7)
+#define SMBCTL3_SDA_LVLBIT(6)
+
+/* SMBCST */
+#define SMBCST_BB BIT(1)
+#define SMBCST_TGSCL BIT(5)
+
+/* SMBST */
+#define SMBST_XMIT BIT(0)
+#define SMBST_MASTER BIT(1)
+#define SMBST_STASTR BIT(3)
+#define SMBST_NEGACK BIT(4)
+#define SMBST_BER BIT(5)
+#define SMBST_SDASTBIT(6)
+
+/* SMBCST3 in bank0 */
+#define SMBCST3_EO_BUSYBIT(7)
+
+/* SMBFIF_CTS in bank1 */
+#define SMBFIF_CTS_CLR_FIFOBIT(6)
+
+#define SMBFIF_CTL_FIFO_EN BIT(4)
+#define SMBCTL3_BNK_SELBIT(5)
+
+enum {
+ I2C_ERR_NACK = 1,
+ I2C_ERR_BER,
+ I2C_ERR_TIMEOUT,
+};
+
+struct smb_bank0_regs {
+ u8 addr3;
+ u8 addr7;
+ u8 addr4;
+ u8 addr8;
+ u16 addr5;
+ u16 addr6;
+ u8 cst2;
+ u8 cst3;
+ u8 ctl4;
+ u8 ctl5;
+ u8 scllt;
+ u8 fif_ctl;
+ u8 sclht;
+};
+
+struct smb_bank1_regs {
+ u8 fif_cts;
+ u8 fair_per;
+ u16 txf_ctl;
+ u32 t_out;
+ u8 cst2;
+ u8 cst3;
+ u16 txf_sts;
+ u16 rxf_sts;
+ u8 rxf_ctl;
+};
+
+struct npcm_i2c_regs {
+ u16 sda;
+ u16 st;
+ u16 cst;
+ u16 ctl1;
+ u16 addr;
+ u16 ctl2;
+ u16 addr2;
+ u16 ctl3;
+ union {
+ struct smb_bank0_regs bank0;
+ struct smb_bank1_regs bank1;
+ };
+
+};
+
+struct npcm_i2c_bus {
+ struct npcm_i2c_regs *reg;
+ int num;
+ u32 apb_clk;
+ u32 freq;
+ bool started;
+};
+
+static void npcm_dump_regs(struct npcm_i2c_bus *bus)
+{
+ struct npcm_i2c_regs *reg = bus->reg;
+
+ printf("\n");
+ printf("SMBST=0x%x\n", readb(>st));
+ printf("SMBCST=0x%x\n", readb(>cst));
+ printf("SMBCTL1=0x%x\n", readb(>ctl1));
+ printf("\n");
+}
+
+static int npcm_i2c_check_sda(struct npcm_i2c_bus *bus)
+{
+ struct npcm_i2c_regs *reg = bus->reg;
+ ulong start_time;
+ int err = I2C_ERR_TIMEOUT;
+ u8 val;
+
+ start_time = get_timer(0);
+ /* wait SDAST to be 1 */
+ while (get_timer(start_time) < NPCM_I2C_TIMEOUT_MS) {
+ val = readb(>st);
+ if (val & SMBST_NEGACK) {
+ err = I2C_ERR_NACK;
+ break;
+ }
+ if (val & SMBST_BER) {
+ err = I2C_ERR_BER;
+ break;
+ }
+ if (val & SMBST_SDAST) {
+
[PATCH v2 11/11] config/aspeed: Enable EEPROM options
To allow testing of the I2C driver, enable the eprom command and the misc driver. Signed-off-by: Joel Stanley --- configs/evb-ast2500_defconfig | 3 +++ configs/evb-ast2600_defconfig | 2 ++ 2 files changed, 5 insertions(+) diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 2371cc2742cf..3ae07bd4e9e1 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -18,6 +18,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set +CONFIG_CMD_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -33,6 +34,8 @@ CONFIG_CLK=y CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_ASPEED=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y CONFIG_PHY_REALTEK=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 5c298939da6d..caf0db58e640 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -40,6 +40,7 @@ CONFIG_SPL_DM_RESET=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_HUSH_PARSER=y +CONFIG_CMD_EEPROM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -64,6 +65,7 @@ CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_ASPEED=y CONFIG_MISC=y +CONFIG_I2C_EEPROM=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y CONFIG_PHY_REALTEK=y -- 2.35.1
[PATCH v2 10/11] config/ast2600: Enable I2C driver
Signed-off-by: Joel Stanley --- configs/evb-ast2600_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index f84b723bbba3..5c298939da6d 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -62,6 +62,7 @@ CONFIG_HASH_ASPEED=y CONFIG_ASPEED_ACRY=y CONFIG_ASPEED_GPIO=y CONFIG_DM_I2C=y +CONFIG_SYS_I2C_ASPEED=y CONFIG_MISC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ASPEED=y -- 2.35.1
[PATCH v2 09/11] i2c/aspeed: Add AST2600 compatible
Signed-off-by: Joel Stanley
Reviewed-by: Ryan Chen
---
drivers/i2c/ast_i2c.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index 0a93d7c82911..c9ffe2d62820 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -351,6 +351,7 @@ static const struct dm_i2c_ops ast_i2c_ops = {
static const struct udevice_id ast_i2c_ids[] = {
{ .compatible = "aspeed,ast2400-i2c-bus" },
{ .compatible = "aspeed,ast2500-i2c-bus" },
+ { .compatible = "aspeed,ast2600-i2c-bus" },
{ },
};
--
2.35.1
[PATCH v2 08/11] i2c/aspeed: Fix reset control
The reset control was written for the ast2500 and directly programs the
clocking register.
So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.
Signed-off-by: Joel Stanley
Reviewed-by: Ryan Chen
---
drivers/i2c/ast_i2c.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index 2d3fecaa14ea..0a93d7c82911 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -16,6 +16,7 @@
#include
#include
#include
+#include
#include "ast_i2c.h"
@@ -108,19 +109,26 @@ static int ast_i2c_of_to_plat(struct udevice *dev)
static int ast_i2c_probe(struct udevice *dev)
{
- struct ast2500_scu *scu;
+ struct reset_ctl reset_ctl;
+ int rc;
debug("Enabling I2C%u\n", dev_seq(dev));
/*
* Get all I2C devices out of Reset.
-* Only needs to be done once, but doing it for every
-* device does not hurt.
+*
+* Only needs to be done once so test before performing reset.
*/
- scu = ast_get_scu();
- ast_scu_unlock(scu);
- clrbits_le32(>sysreset_ctrl1, SCU_SYSRESET_I2C);
- ast_scu_lock(scu);
+ rc = reset_get_by_index(dev, 0, _ctl);
+ if (rc) {
+ printf("%s: Failed to get reset signal\n", __func__);
+ return rc;
+ }
+
+ if (reset_status(_ctl) > 0) {
+ reset_assert(_ctl);
+ reset_deassert(_ctl);
+ }
ast_i2c_init_bus(dev);
--
2.35.1
[PATCH v2 07/11] reset/aspeed: Implement status callback
The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.
Signed-off-by: Joel Stanley
Reviewed-by: Ryan Chen
---
drivers/reset/reset-ast2500.c | 19 +++
drivers/reset/reset-ast2600.c | 17 +
2 files changed, 36 insertions(+)
diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c
index 0a1dd236aff3..d9cecf3a72e8 100644
--- a/drivers/reset/reset-ast2500.c
+++ b/drivers/reset/reset-ast2500.c
@@ -48,6 +48,24 @@ static int ast2500_reset_deassert(struct reset_ctl
*reset_ctl)
return 0;
}
+static int ast2500_reset_status(struct reset_ctl *reset_ctl)
+{
+ struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ struct ast2500_scu *scu = priv->scu;
+ int status;
+
+ debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
+
+ if (reset_ctl->id < 32)
+ status = BIT(reset_ctl->id) & readl(>sysreset_ctrl1);
+ else
+ status = BIT(reset_ctl->id - 32) & readl(>sysreset_ctrl2);
+
+ return !!status;
+}
+
+
+
static int ast2500_reset_probe(struct udevice *dev)
{
int rc;
@@ -79,6 +97,7 @@ static const struct udevice_id ast2500_reset_ids[] = {
struct reset_ops ast2500_reset_ops = {
.rst_assert = ast2500_reset_assert,
.rst_deassert = ast2500_reset_deassert,
+ .rst_status = ast2500_reset_status,
};
U_BOOT_DRIVER(ast2500_reset) = {
diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c
index 985235a3ac46..1732a450efc0 100644
--- a/drivers/reset/reset-ast2600.c
+++ b/drivers/reset/reset-ast2600.c
@@ -47,6 +47,22 @@ static int ast2600_reset_deassert(struct reset_ctl
*reset_ctl)
return 0;
}
+static int ast2600_reset_status(struct reset_ctl *reset_ctl)
+{
+ struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ struct ast2600_scu *scu = priv->scu;
+ int status;
+
+ debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
+
+ if (reset_ctl->id < 32)
+ status = BIT(reset_ctl->id) & readl(>modrst_ctrl1);
+ else
+ status = BIT(reset_ctl->id - 32) & readl(>modrst_ctrl2);
+
+ return !!status;
+}
+
static int ast2600_reset_probe(struct udevice *dev)
{
int rc;
@@ -78,6 +94,7 @@ static const struct udevice_id ast2600_reset_ids[] = {
struct reset_ops ast2600_reset_ops = {
.rst_assert = ast2600_reset_assert,
.rst_deassert = ast2600_reset_deassert,
+ .rst_status = ast2600_reset_status,
};
U_BOOT_DRIVER(ast2600_reset) = {
--
2.35.1
[PATCH v2 06/11] ARM: dts: ast2600-evb: Add I2C devices
The EVB has an EEPROM and ADT8490 temp sensor/fan controller on bus 7,
and a LM75 temp sensor on bus 8.
Signed-off-by: Joel Stanley
---
v2: Place devices under correct bus
---
arch/arm/dts/ast2600-evb.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index 806b76029ac7..bb438d57cb6d 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -162,10 +162,26 @@
{
status = "okay";
+
+ temp@2e {
+ compatible = "adi,adt7490";
+ reg = <0x2e>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
};
{
status = "okay";
+
+ lm75@4d {
+ compatible = "national,lm75";
+ reg = <0x4d>;
+ };
};
{
--
2.35.1
[PATCH v2 04/11] ARM: dts: ast2600-evb: Remove redundant pinctrl
Now that these are in the dtsi we don't need them in the EVB device
tree.
Signed-off-by: Joel Stanley
---
arch/arm/dts/ast2600-evb.dts | 15 ---
1 file changed, 15 deletions(-)
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index 0d650543134a..806b76029ac7 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -150,37 +150,22 @@
{
status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <_i2c5_default>;
};
{
status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <_i2c6_default>;
};
{
status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <_i2c7_default>;
};
{
status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <_i2c8_default>;
};
{
status = "okay";
-
- pinctrl-names = "default";
- pinctrl-0 = <_i2c9_default>;
};
{
--
2.35.1
[PATCH v2 05/11] ARM: dts: ast2500-evb: Add I2C devices
The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.
Signed-off-by: Joel Stanley
Reviewed-by: Ryan Chen
---
arch/arm/dts/ast2500-evb.dts | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index 4796ed445f57..874e042bc4cb 100644
--- a/arch/arm/dts/ast2500-evb.dts
+++ b/arch/arm/dts/ast2500-evb.dts
@@ -73,3 +73,22 @@
pinctrl-names = "default";
pinctrl-0 = <_sd2_default>;
};
+
+ {
+status = "okay";
+
+eeprom@50 {
+compatible = "atmel,24c08";
+reg = <0x50>;
+pagesize = <16>;
+};
+};
+
+ {
+ status = "okay";
+
+lm75@4d {
+compatible = "national,lm75";
+reg = <0x4d>;
+};
+};
--
2.35.1
[PATCH v2 02/11] ARM: dts: ast2600: Add I2C reset properties
The same as the upstream Linux device tree, each i2c bus has a property specifying the reset line. Signed-off-by: Joel Stanley Reviewed-by: Ryan Chen --- arch/arm/dts/ast2600.dtsi | 16 1 file changed, 16 insertions(+) diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index ef5b131ac0af..4b23d25ede0a 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -832,6 +832,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c1_default>; @@ -847,6 +848,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c2_default>; @@ -862,6 +864,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c3_default>; @@ -876,6 +879,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c4_default>; @@ -890,6 +894,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c5_default>; @@ -904,6 +909,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c6_default>; @@ -918,6 +924,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c7_default>; @@ -932,6 +939,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c8_default>; @@ -946,6 +954,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c9_default>; @@ -960,6 +969,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c10_default>; @@ -975,6 +985,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c11_default>; @@ -990,6 +1001,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c12_default>; @@ -1005,6 +1017,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 = <_i2c13_default>; @@ -1020,6 +1033,7 @@ compatible = "aspeed,ast2600-i2c-bus"; bus-frequency = <10>; interrupts = ; + resets = < ASPEED_RESET_I2C>; clocks = < ASPEED_CLK_APB2>; pinctrl-names = "default"; pinctrl-0 =
[PATCH v2 03/11] ARM: dts: ast2600: Disable I2C nodes by default
Allow boards to enable the buses they use.
Signed-off-by: Joel Stanley
Reviewed-by: Ryan Chen
---
v2: Fix spelling
---
arch/arm/dts/ast2600.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 4b23d25ede0a..a37d062bcad7 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -868,6 +868,7 @@
clocks = < ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <_i2c3_default>;
+ status = "disabled";
};
i2c3: i2c@200 {
@@ -883,6 +884,7 @@
clocks = < ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <_i2c4_default>;
+ status = "disabled";
};
i2c4: i2c@280 {
@@ -898,6 +900,7 @@
clocks = < ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <_i2c5_default>;
+ status = "disabled";
};
i2c5: i2c@300 {
@@ -913,6 +916,7 @@
clocks = < ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <_i2c6_default>;
+ status = "disabled";
};
i2c6: i2c@380 {
@@ -928,6 +932,7 @@
clocks = < ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <_i2c7_default>;
+ status = "disabled";
};
i2c7: i2c@400 {
@@ -943,6 +948,7 @@
clocks = < ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <_i2c8_default>;
+ status = "disabled";
};
i2c8: i2c@480 {
@@ -958,6 +964,7 @@
clocks = < ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <_i2c9_default>;
+ status = "disabled";
};
i2c9: i2c@500 {
--
2.35.1
[PATCH v2 01/11] ARM: dts: ast2600: Add I2C pinctrl
From: Eddie James
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.
Signed-off-by: Eddie James
Reviewed-by: Ryan Chen
Signed-off-by: Joel Stanley
---
arch/arm/dts/ast2600.dtsi | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 64074309b7b2..ef5b131ac0af 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -833,6 +833,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c1_default>;
status = "disabled";
};
@@ -846,6 +848,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c2_default>;
status = "disabled";
};
@@ -859,6 +863,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c3_default>;
};
i2c3: i2c@200 {
@@ -871,6 +877,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c4_default>;
};
i2c4: i2c@280 {
@@ -883,6 +891,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c5_default>;
};
i2c5: i2c@300 {
@@ -895,6 +905,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c6_default>;
};
i2c6: i2c@380 {
@@ -907,6 +919,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c7_default>;
};
i2c7: i2c@400 {
@@ -919,6 +933,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c8_default>;
};
i2c8: i2c@480 {
@@ -931,6 +947,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c9_default>;
};
i2c9: i2c@500 {
@@ -943,6 +961,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c10_default>;
status = "disabled";
};
@@ -956,6 +976,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c11_default>;
status = "disabled";
};
@@ -969,6 +991,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c12_default>;
status = "disabled";
};
@@ -982,6 +1006,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c13_default>;
status = "disabled";
};
@@ -995,6 +1021,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c14_default>;
status = "disabled";
};
@@ -1008,6 +1036,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c15_default>;
status = "disabled";
};
@@ -1021,6 +1051,8 @@
bus-frequency = <10>;
interrupts = ;
clocks = < ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_i2c16_default>;
status = "disabled";
};
@@ -1246,6 +1278,7 @@
function = "I2C1";
groups = "I2C1";
};
+
pinctrl_i2c2_default: i2c2_default {
function = "I2C2";
[PATCH v2 00/11] i2c: Improvements for aspeed boards
This set of patches clean up the aspeed i2c support for the ast2500 and enable the ast2600. v2: - fixes the device tree - adds a new patch that cleans up unnecessary pinctrl nodes - Adds Ryan's r-b from v1 to the relevant patches It has been tested in qemu and on the ast2600-evb. Eddie James (1): ARM: dts: ast2600: Add I2C pinctrl Joel Stanley (10): ARM: dts: ast2600: Add I2C reset properties ARM: dts: ast2600: Disable I2C nodes by default ARM: dts: ast2600-evb: Remove redundant pinctrl ARM: dts: ast2500-evb: Add I2C devices ARM: dts: ast2600-evb: Add I2C devices reset/aspeed: Implement status callback i2c/aspeed: Fix reset control i2c/aspeed: Add AST2600 compatible config/ast2600: Enable I2C driver config/aspeed: Enable EEPROM options drivers/i2c/ast_i2c.c | 23 +- drivers/reset/reset-ast2500.c | 19 drivers/reset/reset-ast2600.c | 17 +++ arch/arm/dts/ast2500-evb.dts | 19 arch/arm/dts/ast2600-evb.dts | 27 + arch/arm/dts/ast2600.dtsi | 56 +++ configs/evb-ast2500_defconfig | 3 ++ configs/evb-ast2600_defconfig | 3 ++ 8 files changed, 147 insertions(+), 20 deletions(-) -- 2.35.1
Re: [PATCH v2 0/8] spl: binman: Fixes for BINMAN_SYMBOLS
Hi Alper, 在 2022/6/18 20:13, Alper Nebi Yasak 写道: There's some trouble with an i.MX8M series [1] trying to use binman symbols. The crux of it is the 'u_boot_any' symbols BINMAN_SYMBOLS configs declare, and the boards creating partial binman images including an SPL without a U-Boot the symbol is referring to. Normally this should be easy to resolve by disabling BINMAN_SYMBOLS configs, but that causes a build error. Apparently some parts of the SPL code (RAW_IMAGE_SUPPORT, RAM_DEVICE) use the symbols directly without guarding them by BINMAN_SYMBOLS, implicitly requiring it. The first patch fixes the issue above, the rest are related things I tinkered with while trying to understand the issue and the i.MX8M use case. Part of this is splitting binman symbols support from enabling binman and from the u-boot-any symbols declarations. Another is to add a new macro people can use to check if they can use binman symbols safely. These apply onto u-boot/next. I have also triggered an Azure CI run [2] via a Github pull request. I have tested your patchset with branch : imx-ddr-binman-symbols Tested-by: Peng Fan #i.MX8MP-EVK Would you send out the i.MX patches? or you need me to send a V7 version based on your patchset? Thanks, Peng. [1] arm64: binman: use binman symbols for imx https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.kernel.org%2Fu-boot%2F20220603071715.15212-1-peng.fan%40oss.nxp.com%2Fdata=05%7C01%7Cpeng.fan%40nxp.com%7C762c5e7536d8472a0eb308da51240074%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637911512361561438%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7Csdata=1swOCCJNBUj5kgGx2RsWLZqnXhtdV6V3xZ%2BfzDkESVU%3Dreserved=0 [2] #20220616.1 spl: binman: Fixes for BINMAN_SYMBOLS https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdev.azure.com%2Fu-boot%2Fu-boot%2F_build%2Fresults%3FbuildId%3D4490%26view%3Dresultsdata=05%7C01%7Cpeng.fan%40nxp.com%7C762c5e7536d8472a0eb308da51240074%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637911512361561438%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7Csdata=ipiBvgKIx8nNIvZFgSZKzRxuyWFD0EZzHHJnPrzbqMA%3Dreserved=0 Changes in v2: - Split binman symbols support from enabling binman - Move U-Boot phase symbol declarations to BINMAN_UBOOT_SYMBOLS configs - Merge in Peng's patch for binman_sym.h changes - Update VPL configs for the new BINMAN_UBOOT_SYMBOLS - Add new patch to check binman symbols at runtime - Add new patch to disable u_boot_any symbols for i.MX8M boards - Pick Peng's __image_copy_start fix Alper Nebi Yasak (7): spl: binman: Fix use of undeclared u_boot_any symbols spl: binman: Make TPL_BINMAN_SYMBOLS depend on TPL_FRAMEWORK spl: binman: Declare extern symbols for VPL as well spl: binman: Split binman symbols support from enabling binman spl: binman: Add config options for binman symbols in VPL spl: binman: Check at runtime if binman symbols were filled in spl: binman: Disable u_boot_any symbols for i.MX8M boards Peng Fan (1): armv8: u-boot-spl.lds: mark __image_copy_start as symbol arch/arm/cpu/armv8/u-boot-spl.lds | 2 +- common/spl/Kconfig | 23 -- common/spl/Kconfig.tpl | 27 --- common/spl/Kconfig.vpl | 25 ++ common/spl/spl.c| 16 +-- common/spl/spl_ram.c| 2 +- include/binman_sym.h| 51 +++-- include/spl.h | 2 + tools/binman/elf.py | 12 +++-- tools/binman/elf_test.py| 12 +++-- tools/binman/ftest.py | 33 ++--- tools/binman/test/021_image_pad.dts | 2 +- tools/binman/test/024_sorted.dts| 2 +- tools/binman/test/028_pack_4gb_outside.dts | 2 +- tools/binman/test/029_x86_rom.dts | 6 +-- tools/binman/test/053_symbols.dts | 2 +- tools/binman/test/149_symbols_tpl.dts | 4 +- tools/binman/test/155_symbols_tpl_x86.dts | 4 +- tools/binman/test/187_symbols_sub.dts | 2 +- tools/binman/test/Makefile | 2 +- tools/binman/test/generated/autoconf.h | 3 ++ tools/binman/test/u_boot_binman_syms.c | 6 ++- tools/binman/test/u_boot_binman_syms_size.c | 6 ++- 23 files changed, 183 insertions(+), 63 deletions(-) create mode 100644 tools/binman/test/generated/autoconf.h
Re: [PATCH v3] i2c: nuvoton: Add NPCM7xx i2c driver
Hi Andre
Thanks for your reply and review
you are right.
i am followed upstream kernel document and copy sub describe to uboot.
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/i2c/nuvoton%2Cnpcm7xx-i2c.yaml
i will remove this document next i2c version.
if Ardre or hs have any question or concern please let me know.
Cheers,
Jim
On Wed, Jun 15, 2022 at 5:48 PM Andre Przywara wrote:
>
> On 14/06/2022 02:46, Jim Liu wrote:
>
> Hi,
>
> > Add Nuvoton BMC NPCM750 i2c driver
> >
> > Signed-off-by: Jim Liu
> > ---
> > changes for v3:
> > - add i2c doc
>
> I don't think this is needed. For a start, it's an old-style text
> binding. But more importantly I see that the kernel's I2C maintainer
> seemed to have merged the proper binding into his -next tree already.
>
> https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git/commit/?h=i2c/for-next=29d2bff1c34ad3e413bcdaa81b88e209b308031d
>
> So there is no need to duplicate this binding document in the U-Boot
> tree, so you can just drop it here (again).
>
> I haven't looked at the driver in detail, and I don't know the hardware
> nor can I test it, but at least I checked the devicetree aspect, and
> this is now in line with the accepted Linux kernel driver and DT
> changes, so it looks fine to me.
>
> Cheers,
> Andre
>
> > Changes for v2:
> > - use debug output in reset function
> > - use clr/setbits_8
> > ---
> > .../i2c/nuvoton,npcm7xx-i2c.txt | 28 +
> > drivers/i2c/Kconfig | 5 +
> > drivers/i2c/Makefile | 1 +
> > drivers/i2c/npcm-i2c.c| 631 ++
> > 4 files changed, 665 insertions(+)
> > create mode 100644 doc/device-tree-bindings/i2c/nuvoton,npcm7xx-i2c.txt
> > create mode 100644 drivers/i2c/npcm-i2c.c
> >
> > diff --git a/doc/device-tree-bindings/i2c/nuvoton,npcm7xx-i2c.txt
> > b/doc/device-tree-bindings/i2c/nuvoton,npcm7xx-i2c.txt
> > new file mode 100644
> > index 00..d120490b32
> > --- /dev/null
> > +++ b/doc/device-tree-bindings/i2c/nuvoton,npcm7xx-i2c.txt
> > @@ -0,0 +1,28 @@
> > +* The NPCM750x includes sixteen I2C bus controllers.
> > +
> > +Required properties :
> > +- compatible : Must be "nuvoton,npcm750-i2c"
> > +- reg : Offset and length of the register set for the device
> > +- clocks: Reference clock for the I2C bus
> > +- A pinctrl state named "default" must be defined to set pins in mode of
> > + operation for I2C transfer
> > +- #address-cells = <1>;
> > +- #size-cells = <0>;
> > +
> > +Optional properties :
> > +- clock-frequency : Desired I2C bus clock frequency in Hz. If not
> > specified,
> > + the default 100 kHz frequency will be used.
> > + possible values are 10, 40 and 100.
> > +
> > +Example :
> > + #include
> > + #include
> > + i2c0: i2c@8 {
> > + reg = <0x8 0x1000>;
> > + compatible = "nuvoton,npcm750-i2c";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + clocks = < NPCM7XX_CLK_APB2>;
> > + interrupts = ;
> > + status = "disabled";
> > + };
> > diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
> > index d25c5736ef..7e113b289e 100644
> > --- a/drivers/i2c/Kconfig
> > +++ b/drivers/i2c/Kconfig
> > @@ -447,6 +447,11 @@ config SYS_I2C_NEXELL
> > have several I2C ports and all are provided, controlled by the
> > device tree.
> >
> > +config SYS_I2C_NPCM
> > + bool "Nuvoton NPCM I2C driver"
> > + help
> > + Support for Nuvoton I2C controller driver.
> > +
> > config SYS_I2C_OCORES
> > bool "ocores I2C driver"
> > depends on DM_I2C
> > diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
> > index 9d41f379bb..7e046f809a 100644
> > --- a/drivers/i2c/Makefile
> > +++ b/drivers/i2c/Makefile
> > @@ -33,6 +33,7 @@ obj-$(CONFIG_SYS_I2C_MV) += mv_i2c.o
> > obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
> > obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
> > obj-$(CONFIG_SYS_I2C_NEXELL) += nx_i2c.o
> > +obj-$(CONFIG_SYS_I2C_NPCM) += npcm_i2c.o
> > obj-$(CONFIG_SYS_I2C_OCORES) += ocores_i2c.o
> > obj-$(CONFIG_SYS_I2C_OCTEON) += octeon_i2c.o
> > obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
> > diff --git a/drivers/i2c/npcm-i2c.c b/drivers/i2c/npcm-i2c.c
> > new file mode 100644
> > index 00..dfac6483de
> > --- /dev/null
> > +++ b/drivers/i2c/npcm-i2c.c
> > @@ -0,0 +1,631 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright (c) 2021 Nuvoton Technology Corp.
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#define I2C_FREQ_100K10
> > +#define NPCM_I2C_TIMEOUT_MS 10
> > +#define NPCM7XX_I2CSEGCTL_INIT_VAL 0x0333F000
> > +#define NPCM8XX_I2CSEGCTL_INIT_VAL 0x9333F000
> > +
> > +/* SCLFRQ min/max field values */
> > +#define SCLFRQ_MIN 10
>
Re: [PATCH V2 16/17] imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPL
在 2022/6/22 22:25, Frieder Schrempf 写道: Am 14.06.22 um 12:18 schrieb Frieder Schrempf: Am 11.06.22 um 14:21 schrieb Peng Fan (OSS): From: Peng Fan Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, The set_wdog_reset() function is not necessary as this is handled by the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property being set. Signed-off-by: Peng Fan Thanks for the cleanup!!! The subject line should probably be: imx: kontron-sl-mx8mm: enable pinctrl_wdog in SPL Otherwise: Reviewed-by: Frieder Schrempf Tested-by: Frieder Schrempf Stefano, I see that my tags have been picked up in next, but the subject line hasn't been fixed. Especially mx8mm instead of mx8mn would be a meaningful correction. Just for your information. If this is difficult to fix before merging to master, then it's probably fine to leave it as it is. oops, I overlooked your reply. Regards, Peng.
Re: [PATCH] cmd/misc: Stop using a function pointer
On 6/22/22 4:10 PM, Tom Rini wrote:
Currently, enabling CMD_MISC gives:
cmd/misc.c:67:25: warning: assignment to 'int (*)(struct udevice *, int, void
*, int)' from incompatible pointer type 'int (*)(struct udevice *, int, const
void *, int)' [-Wincompatible-pointer-types]
Because 'misc_read' takes a void * and 'misc_write' takes a const void
*, both of which make sense for their operation. Given there's one
place we make use of the function pointer, just call read or write
directly for the operation we're called with.
Cc: Bin Meng
Signed-off-by: Tom Rini
---
cmd/misc.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/cmd/misc.c b/cmd/misc.c
index bcd8d960ee06..ec32b41ed1e9 100644
--- a/cmd/misc.c
+++ b/cmd/misc.c
@@ -44,7 +44,6 @@ static int do_misc_list(struct cmd_tbl *cmdtp, int flag,
static int do_misc_op(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[], enum misc_op op)
{
- int (*misc_op)(struct udevice *, int, void *, int);
struct udevice *dev;
int offset;
void *buf;
@@ -62,11 +61,10 @@ static int do_misc_op(struct cmd_tbl *cmdtp, int flag,
size = hextoul(argv[3], NULL);
if (op == MISC_OP_READ)
- misc_op = misc_read;
+ ret = misc_read(dev, offset, buf, size);
else
- misc_op = misc_write;
+ ret = misc_write(dev, offset, buf, size);
- ret = misc_op(dev, offset, buf, size);
if (ret < 0) {
if (ret == -ENOSYS) {
printf("The device does not support %s\n",
Reviewed-by: Sean Anderson
Re: [PATCH] cmd/misc: Stop using a function pointer
On Thu, Jun 23, 2022 at 4:10 AM Tom Rini wrote: > > Currently, enabling CMD_MISC gives: > cmd/misc.c:67:25: warning: assignment to 'int (*)(struct udevice *, int, > void *, int)' from incompatible pointer type 'int (*)(struct udevice *, int, > const void *, int)' [-Wincompatible-pointer-types] > > Because 'misc_read' takes a void * and 'misc_write' takes a const void > *, both of which make sense for their operation. Given there's one > place we make use of the function pointer, just call read or write > directly for the operation we're called with. > > Cc: Bin Meng > Signed-off-by: Tom Rini > --- > cmd/misc.c | 6 ++ > 1 file changed, 2 insertions(+), 4 deletions(-) > Reviewed-by: Bin Meng
[PATCH] cmd/misc: Stop using a function pointer
Currently, enabling CMD_MISC gives:
cmd/misc.c:67:25: warning: assignment to 'int (*)(struct udevice *, int, void
*, int)' from incompatible pointer type 'int (*)(struct udevice *, int, const
void *, int)' [-Wincompatible-pointer-types]
Because 'misc_read' takes a void * and 'misc_write' takes a const void
*, both of which make sense for their operation. Given there's one
place we make use of the function pointer, just call read or write
directly for the operation we're called with.
Cc: Bin Meng
Signed-off-by: Tom Rini
---
cmd/misc.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/cmd/misc.c b/cmd/misc.c
index bcd8d960ee06..ec32b41ed1e9 100644
--- a/cmd/misc.c
+++ b/cmd/misc.c
@@ -44,7 +44,6 @@ static int do_misc_list(struct cmd_tbl *cmdtp, int flag,
static int do_misc_op(struct cmd_tbl *cmdtp, int flag,
int argc, char *const argv[], enum misc_op op)
{
- int (*misc_op)(struct udevice *, int, void *, int);
struct udevice *dev;
int offset;
void *buf;
@@ -62,11 +61,10 @@ static int do_misc_op(struct cmd_tbl *cmdtp, int flag,
size = hextoul(argv[3], NULL);
if (op == MISC_OP_READ)
- misc_op = misc_read;
+ ret = misc_read(dev, offset, buf, size);
else
- misc_op = misc_write;
+ ret = misc_write(dev, offset, buf, size);
- ret = misc_op(dev, offset, buf, size);
if (ret < 0) {
if (ret == -ENOSYS) {
printf("The device does not support %s\n",
--
2.25.1
Re: [PATCH v2 0/9] Introduce HPE GXP Architecture
On Wed, Jun 22, 2022 at 07:41:56PM +, Hawkins, Nick wrote: > Greetings All, > I just wanted to make sure I did not make a mistake with how I submitted the > second version of this patch as I am still learning the u-boot patch > submission process. Thanks ahead of time for any feedback. I'm reviewing it for next currently and aside from some Kconfig migrations have posted: https://patchwork.ozlabs.org/project/uboot/patch/20220622192145.3696770-1-tr...@konsulko.com/ As a follow-up cleanup. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 0/9] Introduce HPE GXP Architecture
Greetings All, I just wanted to make sure I did not make a mistake with how I submitted the second version of this patch as I am still learning the u-boot patch submission process. Thanks ahead of time for any feedback. Thanks for your time, -Nick Hawkins
[PATCH 2/2] corstone1000: Convert to text file environment
Convert this platform to using the text file environment rather than
defining CONFIG_EXTRA_ENV_SETTINGS.
Signed-off-by: Tom Rini
---
board/armltd/corstone1000/corstone1000.env | 13 +
include/configs/corstone1000.h | 14 --
2 files changed, 13 insertions(+), 14 deletions(-)
create mode 100644 board/armltd/corstone1000/corstone1000.env
diff --git a/board/armltd/corstone1000/corstone1000.env
b/board/armltd/corstone1000/corstone1000.env
new file mode 100644
index ..b24ff07fc6bd
--- /dev/null
+++ b/board/armltd/corstone1000/corstone1000.env
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+usb_pgood_delay=250
+boot_bank_flag=0x08002000
+kernel_addr_bank_0=0x083EE000
+kernel_addr_bank_1=0x0936E000
+retrieve_kernel_load_addr=
+ if itest.l *${boot_bank_flag} == 0; then
+ setenv kernel_addr $kernel_addr_bank_0;
+ else
+ setenv kernel_addr $kernel_addr_bank_1;
+ fi;
+kernel_addr_r=0x8820
diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h
index eba5cba0fba8..38d7fe8d0d42 100644
--- a/include/configs/corstone1000.h
+++ b/include/configs/corstone1000.h
@@ -24,18 +24,4 @@
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_EXTRA_ENV_SETTINGS
\
- "usb_pgood_delay=250\0"
\
- "boot_bank_flag=0x08002000\0"
\
- "kernel_addr_bank_0=0x083EE000\0"
\
- "kernel_addr_bank_1=0x0936E000\0"
\
- "retrieve_kernel_load_addr="
\
- "if itest.l *${boot_bank_flag} == 0;
then " \
- "setenv kernel_addr
$kernel_addr_bank_0;" \
- "else "
\
- "setenv kernel_addr
$kernel_addr_bank_1;" \
- "fi;"
\
- "\0"
\
- "kernel_addr_r=0x8820\0"
-
#endif
--
2.25.1
[PATCH 1/2] gxp: Convert to text file environment
Convert this platform to using the text file environment rather than defining CONFIG_EXTRA_ENV_SETTINGS. Signed-off-by: Tom Rini --- board/hpe/gxp/gxp.env | 27 +++ include/configs/gxp.h | 28 2 files changed, 27 insertions(+), 28 deletions(-) create mode 100644 board/hpe/gxp/gxp.env diff --git a/board/hpe/gxp/gxp.env b/board/hpe/gxp/gxp.env new file mode 100644 index ..4760bf1663a7 --- /dev/null +++ b/board/hpe/gxp/gxp.env @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +recover_file=openbmc-hpe-recovery-image.mtd +recover_cmd=usb start; mw.b 0xD10D 0x40; + if fatload usb 0 0x5000 $recover_file 0x4C 0x8; then + setenv bootargs console=ttyS0,115200 recovery; + setenv force_recovery; + saveenv; + bootm 0x5000; + else + while itest 0 < 1; do + mw.b 0xd105 0xc0; + sleep .1; + mw.b 0xd105 0x00; + sleep .1; + done; + fi; + reset; +spiboot=if itest.b *0xD1B2 == 6; then + run recover_cmd; + fi; + if printenv force_recovery; then + run recover_cmd; + else + bootm 0xfc08; + run recover_cmd; + fi; diff --git a/include/configs/gxp.h b/include/configs/gxp.h index ae46126399f8..e3c97b20d51e 100644 --- a/include/configs/gxp.h +++ b/include/configs/gxp.h @@ -12,32 +12,4 @@ #define CONFIG_SYS_SDRAM_BASE 0x4000 -#define CONFIG_EXTRA_ENV_SETTINGS \ - "recover_file=openbmc-hpe-recovery-image.mtd\0" \ - "recover_cmd=usb start; " \ - "mw.b 0xD10D 0x40; " \ - "if fatload usb 0 0x5000 $recover_file 0x4C 0x8; then " \ - "setenv bootargs console=ttyS0,115200 recovery; " \ - "setenv force_recovery; " \ - "saveenv; " \ - "bootm 0x5000; " \ - "else " \ - "while itest 0 < 1; do " \ - "mw.b 0xd105 0xc0; " \ - "sleep .1; " \ - "mw.b 0xd105 0x00; " \ - "sleep .1; " \ - "done; " \ - "fi; " \ - "reset;\0" \ - "spiboot=if itest.b *0xD1B2 == 6; then " \ - "run recover_cmd;" \ - "fi;" \ - "if printenv force_recovery; then " \ - "run recover_cmd; " \ - "else " \ - "bootm 0xfc08; " \ - "run recover_cmd; " \ - "fi;\0" - #endif -- 2.25.1
Re: [PATCH v1] misc: nuvoton: Add host interface configuartion driver
On Tue, Jun 07, 2022 at 04:34:30PM +0800, Jim Liu wrote: > add nuvoton BMC npcm750 host configuartion driver > > Signed-off-by: Jim Liu > --- > drivers/misc/Makefile | 1 + > drivers/misc/npcm_host_intf.c | 110 ++ > 2 files changed, 111 insertions(+) > create mode 100644 drivers/misc/npcm_host_intf.c This needs to add a Kconfig option and that in turn needs to select or depends on the infrastructure it needs: arm-linux-gnueabi-ld.bfd: drivers/misc/npcm_host_intf.o: in function `npcm_host_intf_bind': drivers/misc/npcm_host_intf.c:56: undefined reference to `syscon_regmap_lookup_by_phandle' arm-linux-gnueabi-ld.bfd: drivers/misc/npcm_host_intf.c:64: undefined reference to `regmap_write' arm-linux-gnueabi-ld.bfd: drivers/misc/npcm_host_intf.c:80: undefined reference to `regmap_update_bits' arm-linux-gnueabi-ld.bfd: drivers/misc/npcm_host_intf.c:81: undefined reference to `regmap_update_bits' arm-linux-gnueabi-ld.bfd: drivers/misc/npcm_host_intf.c:92: undefined reference to `regmap_update_bits' arm-linux-gnueabi-ld.bfd: drivers/misc/npcm_host_intf.c:93: undefined reference to `regmap_update_bits' make[1]: *** [Makefile:1813: u-boot] Error 1 -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/2] ARM: imx: imx8mn-evk: use one common u-boot.dtsi for the evk boards
On 10/06/2022 00:38, Heiko Thiery wrote:
> Hi Tim, Hi Simon,
>
> [SNIP]
>
>>
>> Heiko,
>>
>> You can add multi-dtb support to this so that it's usable by the other
>> imx8mn boards with the following:
>>
>> [...]
>>
>> I don't mind sending this as a follow-up to your patch here.
>
> Since this patch moves the parts from the 2 imx8mn-evk boards to one
> "common" file it would be better to do more changes on that in a
> separate patch.
>
>> It looks like there are only the following boards in mainline that
>> would benefit from using this shared include:
>> imx8mn-beacon-kit-u-boot.dtsi
>> imx8mn-var-som-symphony-u-boot.dtsi
>> imx8mn-venice-u-boot.dtsi
There's also 'imx8mn-bsh-smm-s2-u-boot-common.dtsi'. Slightly different
because only half of the blobs are there with IMX8M_DDR3L.
>> Have you compared the binman portions of imx8m{m,n,p}-u-boot.dtsi?
>
> No not yet.
I looked a bit and they look very much alike. I suspect it's possible to
eventually unify everything into a shared 'imx8m-u-boot.dtsi', but I
didn't actually try.
>> There are a lot of differences due to different property ordering and
>> label/node naming conventions. I would like to see these normalized
>> but i'm not clear which is the best example to normalize to.
>> Specifically I don't know:
>> 1. what is the convention for property ordering in dt... is it simply
>> alphabetical order?
AFAIK property order doesn't matter for binman. Node order is very
significant though. For names, I think we should:
- Prefer hyphens to underscores
- Prefer lowercase to uppercase
- Prefer meaningful names to things like 'blob-ext@1'
- Avoid first char being a number (because labels can't have that)
>> 2. have we settled on a convention for the blob naming, if so what is
>> the best example?
I had suggested 'ddr-1d-imem-fw' etc. on a series from Peng, see latest
version of it [1].
[1] arm: dts: imx8m: update binman ddr firmware node name
https://lore.kernel.org/u-boot/20220603071715.15212-4-peng@oss.nxp.com/
> I am not aware that there is a conventional here. But maybe simon can
> give some hints here.
>
Re: [PATCH v2 2/2] ARM: imx: imx8mn-evk: use one common u-boot.dtsi for the evk boards
On 09/06/2022 23:49, Heiko Thiery wrote:
> To have only one place to describe the binman images us the
> imx8mn-u-boot.dtsi. To have support for different DDR firmwares this
> nodes are included dependent on the used DDR config option.
>
> Signed-off-by: Heiko Thiery
> Reviewed-by: Fabio Estevam
> ---
> v2: sync with current master and fix merge conflict
>
> arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 125 +-
> arch/arm/dts/imx8mn-evk-u-boot.dtsi | 120 +
> arch/arm/dts/imx8mn-u-boot.dtsi | 156 +++
I see most of this is moving existing definitions, but I'm adding
comments in a general sense, partially for future reference.
> 3 files changed, 159 insertions(+), 242 deletions(-)
> create mode 100644 arch/arm/dts/imx8mn-u-boot.dtsi
>
> diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> index 4d0ecb07d4..3d0e817313 100644
> --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
> @@ -3,11 +3,9 @@
> * Copyright 2019, 2021 NXP
> */
>
> -/ {
> - binman: binman {
> - multiple-images;
> - };
> +#include "imx8mn-u-boot.dtsi"
>
> +/ {
> wdt-reboot {
> compatible = "wdt-reboot";
> wdt = <>;
> @@ -143,122 +141,3 @@
> [...]
> diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> index d1427941eb..339c3dd681 100644
> --- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> @@ -3,6 +3,7 @@
> * Copyright 2019 NXP
> */
>
> +#include "imx8mn-u-boot.dtsi"
> #include "imx8mn-ddr4-evk-u-boot.dtsi"
"imx8mn-ddr4-evk-u-boot.dtsi" already includes "imx8mn-u-boot.dtsi". I
think it should only be included once.
I don't know why these are structured this way, but I think common parts
of the two boards should've been in a "imx8mn-evk-common-u-boot.dtsi" or
something which the board -u-boot.dtsi files would include.
>
> {
> @@ -24,122 +25,3 @@
> [...]
> diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
> new file mode 100644
> index 00..7b591085a0
> --- /dev/null
> +++ b/arch/arm/dts/imx8mn-u-boot.dtsi
> @@ -0,0 +1,156 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2019 NXP
> + */
> +
> +/ {
> + binman: binman {
> + multiple-images;
> + };
> +};
> +
> + {
> + u_boot_spl_ddr: u-boot-spl-ddr {
> + filename = "u-boot-spl-ddr.bin";
> + pad-byte = <0xff>;
> + align-size = <4>;
> + align = <4>;
> +
> + u-boot-spl {
> + align-end = <4>;
> + };
Maybe it's better to add an empty 'ddr-fw' section here, and populate
that below.
> + };
> +
> + spl {
> + filename = "spl.bin";
> +
> + mkimage {
> + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
> 0x912000";
> +
> + blob {
> + filename = "u-boot-spl-ddr.bin";
> + };
> + };
> + };
> +
> + itb {
> + filename = "u-boot.itb";
> +
> + fit {
> + description = "Configuration to load ATF before U-Boot";
> + #address-cells = <1>;
> + fit,external-offset = ;
> +
> + images {
> + uboot {
> + description = "U-Boot (64-bit)";
> + type = "standalone";
> + arch = "arm64";
> + compression = "none";
> + load = ;
> +
> + uboot_blob: blob-ext {
> + filename = "u-boot-nodtb.bin";
> + };
> + };
> +
> + atf {
> + description = "ARM Trusted Firmware";
> + type = "firmware";
> + arch = "arm64";
> + compression = "none";
> + load = <0x96>;
> + entry = <0x96>;
> +
> + atf_blob: blob-ext {
> + filename = "bl31.bin";
> + };
> + };
> +
> + fdt {
> + description = "NAME";
> + type = "flat_dt";
> + compression = "none";
> +
> + uboot_fdt_blob: blob-ext {
> +
Re: [PATCH v2 1/2] ARM: imx: imx8mn-evk: generate a single bootable flash.bin
On 09/06/2022 23:49, Heiko Thiery wrote:
> To have a flash.bin file that also contains the U-Boot and TF-A/ATF
> create this like already done for other imx8 boards.
>
> Signed-off-by: Heiko Thiery
> Reviewed-by: Fabio Estevam
> Reviewed-by: Peng Fan
> ---
> v2: sync with current master and fix merge conflict
>
> arch/arm/dts/imx8mn-evk-u-boot.dtsi | 19 ++-
> 1 file changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> index 3db46d4cbc..d1427941eb 100644
> --- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
> @@ -58,7 +58,9 @@
> };
>
>
> - flash {
> + spl {
> + filename = "spl.bin";
> +
> mkimage {
> args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
> 0x912000";
>
This change got applied in the meantime via another patch [1].
[1] imx8mn_evk: Add the missing spl.bin entry
https://lore.kernel.org/u-boot/20220503190304.413968-1-feste...@gmail.com/
> @@ -125,4 +127,19 @@
> };
> };
> };
> +
> + imx-boot {
> + filename = "flash.bin";
> + pad-byte = <0x00>;
> +
> + spl: blob-ext@1 {
> + offset = <0x0>;
> + filename = "spl.bin";
> + };
> +
> + uboot: blob-ext@2 {
> + offset = <0x58000>;
> + filename = "u-boot.itb";
> + };
> + };
> };
This is already inherited from an #included dtsi, so not strictly
necessary. I think it would be clearer to include this here as well, but
since you're removing it in the next patch anyway you can drop this
patch entirely.
Re: [PATCH v4 3/3] drivers: rng: optee_rng: register to CONFIG_OPTEE_SERVICE_DISCOVERY
Hi, On 6/17/22 17:36, Etienne Carriere wrote: Changes optee_rng driver to register itself has a OP-TEE service so that a device is bound for the driver when OP-TEE enumerates the PTA RNG service. Cc: Sughosh Ganu Cc: Patrick Delaunay Signed-off-by: Etienne Carriere --- Changes since v3: - Unconditionally register driver with OPTEE_SERVICE_DRIVER() since the macro is now stubbed when CONFIG_OPTEE_SERVICE_DISCOVERY is disable. No change since v2. No change since v1. --- drivers/rng/Kconfig | 1 + drivers/rng/optee_rng.c | 7 ++- 2 files changed, 7 insertions(+), 1 deletion(-) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH v4 2/3] drivers: tee: optee: discover OP-TEE services
Hi, On 6/17/22 17:36, Etienne Carriere wrote: This change defines resources for OP-TEE service drivers to register themselves for being bound to when OP-TEE firmware reports the related service is supported. OP-TEE services are discovered during optee driver probe sequence which mandates optee driver is always probe once bound. Discovery of optee services and binding to related U-Boot drivers is embedded upon configuration switch CONFIG_OPTEE_SERVICE_DISCOVERY. Cc: Jens Wiklander Cc: Patrick Delaunay Signed-off-by: Etienne Carriere --- Changes since v3: - Stub OPTEE_SERVICE_DRIVER() macro when CONFIG_OPTEE_SERVICE_DISCOVERY is disable. Changes since v2: - Release allocated shared memory from bind_service_drivers() only. - Remove definition of useless macro OPTEE_SERVICE_DRIVER_GET(). Changes since v1: - Remove all #ifdef CONFIG_OPTEE_SERVICE_DISCOVERY directives and replace with if (IS_ENABLED()) where applicable. - Incidentally rename local function open_session() to open_enum_session() and remove local function close_session() for clarity. - Update commit log to highlight that "optee driver is always probe once bound" when CONFIG_OPTEE_SERVICE_DISCOVERY is enable. --- drivers/tee/optee/Kconfig | 8 ++ drivers/tee/optee/core.c| 171 ++-- include/tee/optee_service.h | 34 +++ 3 files changed, 208 insertions(+), 5 deletions(-) create mode 100644 include/tee/optee_service.h Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH] arm: dts: imx8m{m,p}-verdin: use IT temperatures
On Wed, 2022-06-22 at 12:26 -0400, Tom Rini wrote: > On Wed, Jun 22, 2022 at 05:43:31PM +0200, Philippe Schenker wrote: > > > From: Philippe Schenker > > > > Use IT temperature threshold for critical/passive trip point > > on Verdin iMX8M Plus and Mini. > > > > Signed-off-by: Philippe Schenker > > Reviewed-by: Francesco Dolcini > > > > --- > > > > arch/arm/dts/imx8mm-verdin.dts | 8 > > arch/arm/dts/imx8mp-verdin.dts | 8 > > 2 files changed, 16 insertions(+) > > > > Since these changes are to the core dts files, are they also submitted > to, or being back ported from, a specific Linux kernel tag? Just submitted the patches also to the kernel for 5.20. Sorry for the gap. https://lore.kernel.org/linux-arm-kernel/20220622164410.457249-1-...@pschenker.ch/ Philippe
Re: [PATCH] arm: dts: imx8m{m,p}-verdin: use IT temperatures
On Wed, Jun 22, 2022 at 05:43:31PM +0200, Philippe Schenker wrote: > From: Philippe Schenker > > Use IT temperature threshold for critical/passive trip point > on Verdin iMX8M Plus and Mini. > > Signed-off-by: Philippe Schenker > Reviewed-by: Francesco Dolcini > > --- > > arch/arm/dts/imx8mm-verdin.dts | 8 > arch/arm/dts/imx8mp-verdin.dts | 8 > 2 files changed, 16 insertions(+) > Since these changes are to the core dts files, are they also submitted to, or being back ported from, a specific Linux kernel tag? -- Tom signature.asc Description: PGP signature
[PATCH] arm: dts: imx8m{m,p}-verdin: use IT temperatures
From: Philippe Schenker
Use IT temperature threshold for critical/passive trip point
on Verdin iMX8M Plus and Mini.
Signed-off-by: Philippe Schenker
Reviewed-by: Francesco Dolcini
---
arch/arm/dts/imx8mm-verdin.dts | 8
arch/arm/dts/imx8mp-verdin.dts | 8
2 files changed, 16 insertions(+)
diff --git a/arch/arm/dts/imx8mm-verdin.dts b/arch/arm/dts/imx8mm-verdin.dts
index a2331627d7..bc6f0bfec8 100644
--- a/arch/arm/dts/imx8mm-verdin.dts
+++ b/arch/arm/dts/imx8mm-verdin.dts
@@ -101,6 +101,14 @@
assigned-clock-rates = <786432000>, <722534400>;
};
+_alert0 {
+ temperature = <95000>;
+};
+
+_crit0 {
+ temperature = <105000>;
+};
+
/* Verdin SPI_1 */
{
#address-cells = <1>;
diff --git a/arch/arm/dts/imx8mp-verdin.dts b/arch/arm/dts/imx8mp-verdin.dts
index bc8bf4dad5..b9c6b924e4 100644
--- a/arch/arm/dts/imx8mp-verdin.dts
+++ b/arch/arm/dts/imx8mp-verdin.dts
@@ -52,6 +52,14 @@
};
};
+_alert0 {
+ temperature = <95000>;
+};
+
+_crit0 {
+ temperature = <105000>;
+};
+
{
phy-handle = <>;
phy-mode = "rgmii-id";
--
2.36.1
Re: come back to old version of U-Boot denx web site
On Wed, Jun 22, 2022 at 02:42:55PM +0200, Patrick DELAUNAY wrote: > Hi, > > For information, > > It seens the content of all the site "https://www.denx.de/wiki/U-Boot; come > back with the 2019/2020 content since few days. > > > In particular, I don't found the history in "Previous Release" of > https://www.denx.de/wiki/U-Boot/ReleaseCycle > > > after check on https://web.archive.org/web/*/https://www.denx.de/wiki/U-Boot > > this page was OK the 22th January > (https://web.archive.org/web/20220122003218/https://www.denx.de/wiki/U-Boot/ReleaseCycle) > > > other example = https://www.denx.de/wiki/U-Boot/SourceCode > > "git.denx.de" instead of "source.denx.de" > > OK the 21th > January(https://web.archive.org/web/20220121124624/https://www.denx.de/wiki/U-Boot/SourceCode) The denx website has been undergoing some updates recently and the wiki part that we use should be restored and up to date again in time for v2022.07. -- Tom signature.asc Description: PGP signature
Re: [PATCH V2 16/17] imx: imx8mn-kontron-n801x: enable pinctrl_wdog in SPL
Am 14.06.22 um 12:18 schrieb Frieder Schrempf: > Am 11.06.22 um 14:21 schrieb Peng Fan (OSS): >> From: Peng Fan >> >> Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, >> >> The set_wdog_reset() function is not necessary as this is handled by >> the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property >> being set. >> >> Signed-off-by: Peng Fan > > Thanks for the cleanup!!! > > The subject line should probably be: > > imx: kontron-sl-mx8mm: enable pinctrl_wdog in SPL > > Otherwise: > > Reviewed-by: Frieder Schrempf > Tested-by: Frieder Schrempf Stefano, I see that my tags have been picked up in next, but the subject line hasn't been fixed. Especially mx8mm instead of mx8mn would be a meaningful correction. Just for your information. If this is difficult to fix before merging to master, then it's probably fine to leave it as it is.
come back to old version of U-Boot denx web site
Hi, For information, It seens the content of all the site "https://www.denx.de/wiki/U-Boot; come back with the 2019/2020 content since few days. In particular, I don't found the history in "Previous Release" of https://www.denx.de/wiki/U-Boot/ReleaseCycle after check on https://web.archive.org/web/*/https://www.denx.de/wiki/U-Boot this page was OK the 22th January (https://web.archive.org/web/20220122003218/https://www.denx.de/wiki/U-Boot/ReleaseCycle) other example = https://www.denx.de/wiki/U-Boot/SourceCode "git.denx.de" instead of "source.denx.de" OK the 21th January(https://web.archive.org/web/20220121124624/https://www.denx.de/wiki/U-Boot/SourceCode) Regards Patrick
Re: [PATCH v5 03/23] FWU: Add FWU metadata access driver for GPT partitioned block devices
Hi On 6/21/22 11:34, Patrick DELAUNAY wrote: Hi, On 6/9/22 14:29, Sughosh Ganu wrote: In the FWU Multi Bank Update feature, the information about the updatable images is stored as part of the metadata, on a separate partition. Add a driver for reading from and writing to the metadata when the updatable images and the metadata are stored on a block device which is formated with GPT based partition scheme. Signed-off-by: Sughosh Ganu --- drivers/fwu-mdata/Kconfig | 9 + drivers/fwu-mdata/Makefile | 1 + drivers/fwu-mdata/fwu_mdata_gpt_blk.c | 404 ++ include/fwu.h | 2 + 4 files changed, 416 insertions(+) create mode 100644 drivers/fwu-mdata/fwu_mdata_gpt_blk.c diff --git a/drivers/fwu-mdata/Kconfig b/drivers/fwu-mdata/Kconfig index d6a21c8e19..d5edef19d6 100644 --- a/drivers/fwu-mdata/Kconfig +++ b/drivers/fwu-mdata/Kconfig @@ -5,3 +5,12 @@ config DM_FWU_MDATA Enable support for accessing FWU Metadata partitions. The FWU Metadata partitions reside on the same storage device which contains the other FWU updatable firmware images. + +config FWU_MDATA_GPT_BLK + bool "FWU Metadata access for GPT partitioned Block devices" + select PARTITION_TYPE_GUID + select PARTITION_UUIDS + depends on DM && HAVE_BLOCK_DEVICE && EFI_PARTITION + help + Enable support for accessing FWU Metadata on GPT partitioned + block devices. diff --git a/drivers/fwu-mdata/Makefile b/drivers/fwu-mdata/Makefile index 7fec7171f4..12a5b4fe04 100644 --- a/drivers/fwu-mdata/Makefile +++ b/drivers/fwu-mdata/Makefile @@ -4,3 +4,4 @@ # obj-$(CONFIG_DM_FWU_MDATA) += fwu-mdata-uclass.o +obj-$(CONFIG_FWU_MDATA_GPT_BLK) += fwu_mdata_gpt_blk.o It is strange to have '_' and '-' in file name for the same directory => to be coherent = fwu-mdata-gpt-blk.c diff --git a/drivers/fwu-mdata/fwu_mdata_gpt_blk.c b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c new file mode 100644 index 00..329bd3779b --- /dev/null +++ b/drivers/fwu-mdata/fwu_mdata_gpt_blk.c @@ -0,0 +1,404 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2022, Linaro Limited + */ + #define LOG_CATEGORY UCLASS_FWU_MDATA For command log filtering by uclass +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + [...] Regards Patrick
[PATCH 6/8] Convert CONFIG_SYS_DISCOVER_PHY to Kconfig
This converts the following to Kconfig: CONFIG_SYS_DISCOVER_PHY Signed-off-by: Tom Rini --- drivers/net/Kconfig | 5 + drivers/net/fsl_mcdmafec.c | 8 drivers/net/mcffec.c | 8 include/configs/M5208EVBE.h | 9 - include/configs/M5235EVB.h | 9 - include/configs/M5272C3.h| 9 - include/configs/M5275EVB.h | 9 - include/configs/M5282EVB.h | 9 - include/configs/M53017EVB.h | 7 --- include/configs/M5329EVB.h | 9 - include/configs/M5373EVB.h | 9 - include/configs/MCR3000.h| 1 - include/configs/cobra5272.h | 10 -- include/configs/eb_cpu5282.h | 1 - include/configs/stmark2.h| 8 15 files changed, 5 insertions(+), 106 deletions(-) diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index cb891f5dbede..b671e72580e2 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -400,11 +400,14 @@ config FTGMAC100 offers high-priority transmit queue for QoS and CoS applications. +config SYS_DISCOVER_PHY + bool config MCFFEC bool "ColdFire Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. @@ -417,6 +420,7 @@ config FSLDMAFEC bool "ColdFire DMA Ethernet Support" depends on DM_ETH select PHYLIB + select SYS_DISCOVER_PHY help This driver supports the network interface units in the ColdFire family. @@ -732,6 +736,7 @@ config MPC8XX_FEC bool "Fast Ethernet Controller on MPC8XX" depends on MPC8xx select MII + select SYS_DISCOVER_PHY help This driver implements support for the Fast Ethernet Controller on MPC8XX diff --git a/drivers/net/fsl_mcdmafec.c b/drivers/net/fsl_mcdmafec.c index e103f79305e7..6825f9e27c06 100644 --- a/drivers/net/fsl_mcdmafec.c +++ b/drivers/net/fsl_mcdmafec.c @@ -243,16 +243,8 @@ static int fec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_halt(dev); -#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init(); set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c index cef9eecac214..4dd848932b96 100644 --- a/drivers/net/mcffec.c +++ b/drivers/net/mcffec.c @@ -278,17 +278,9 @@ int mcffec_init(struct udevice *dev) fecpin_setclear(info, 1); fec_reset(info); -#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \ - defined (CONFIG_SYS_DISCOVER_PHY) - mii_init(); set_fec_duplex_speed(fecp, info->dup_spd); -#else -#ifndef CONFIG_SYS_DISCOVER_PHY - set_fec_duplex_speed(fecp, (FECDUPLEX << 16) | FECSPEED); -#endif /* ifndef CONFIG_SYS_DISCOVER_PHY */ -#endif /* CONFIG_CMD_MII || CONFIG_MII */ /* We use strictly polling mode only */ fecp->eimr = 0; diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index fec73ba3426a..14b35d7ef507 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -17,15 +17,6 @@ #define CONFIG_WATCHDOG_TIMEOUT5000 -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEXFULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */ #ifdef CONFIG_MCFFEC diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index ea89b03c66e3..762d1dd94b1c 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -22,15 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT5000/* timeout in milliseconds, max timeout is 6.71sec */ -#ifdef CONFIG_MCFFEC -# define CONFIG_SYS_DISCOVER_PHY -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEXFULL -# define FECSPEED _100BASET -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - /* I2C */ #define CONFIG_SYS_I2C_PINMUX_REG (gpio->par_qspi) #define CONFIG_SYS_I2C_PINMUX_CLR ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 4a2b37653e08..2fa1e4356e3e 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -31,15 +31,6 @@
[PATCH 8/8] Convert CONFIG_PALMAS_POWER to Kconfig
This converts the following to Kconfig: CONFIG_PALMAS_POWER Signed-off-by: Tom Rini --- configs/am57xx_evm_defconfig| 1 + configs/am57xx_hs_evm_defconfig | 1 + configs/am57xx_hs_evm_usb_defconfig | 1 + configs/dra7xx_evm_defconfig| 1 + configs/dra7xx_hs_evm_defconfig | 1 + configs/dra7xx_hs_evm_usb_defconfig | 1 + configs/omap5_uevm_defconfig| 1 + drivers/power/Kconfig | 4 include/configs/ti_omap5_common.h | 2 -- 9 files changed, 11 insertions(+), 2 deletions(-) diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index d82c66572cce..a077ef8ae24b 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -107,6 +107,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 332091773015..e22c11d9807d 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -97,6 +97,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index 014a3830df7e..fc1bc01c0629 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -106,6 +106,7 @@ CONFIG_DM_PMIC=y CONFIG_PMIC_PALMAS=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_PALMAS=y +CONFIG_PALMAS_POWER=y CONFIG_SCSI_AHCI_PLAT=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index aae84dc6adef..bd3ce11b79ff 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -130,6 +130,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 51ffd2779c13..63b8f2b6fe77 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -124,6 +124,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 34dcdede9233..cd4b8bbce0a9 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -113,6 +113,7 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_PALMAS=y CONFIG_DM_REGULATOR_LP873X=y +CONFIG_PALMAS_POWER=y CONFIG_DM_SCSI=y CONFIG_DM_SERIAL=y CONFIG_SPI=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 73d742ea1d2b..912dd91259c1 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_OMAP_HS=y CONFIG_DM_ETH=y +CONFIG_PALMAS_POWER=y CONFIG_SCSI=y CONFIG_SCSI_AHCI_PLAT=y CONFIG_CONS_INDEX=3 diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 0af53a6c67fe..bc47cf144dd0 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -426,6 +426,10 @@ config POWER_MT6323 This adds poweroff driver for mt6323 this pmic is used on mt7623 / Bananapi R2 +config PALMAS_POWER + bool "Palmas power support" + depends on OMAP54XX + config POWER_I2C bool "I2C-based power control for legacy power" depends on POWER_LEGACY diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index a9d4cf905f8b..24bbf9e7c2c6 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -19,8 +19,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE -#define CONFIG_PALMAS_POWER - #include #include -- 2.25.1
[PATCH 7/8] Convert CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS et al to Kconfig
This converts the following to Kconfig: CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS Signed-off-by: Tom Rini --- arch/arm/mach-omap2/Kconfig | 21 + include/configs/ti_omap4_common.h | 11 --- include/configs/ti_omap5_common.h | 11 --- 3 files changed, 21 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 51d1db4a87b0..fa4104747673 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -169,6 +169,27 @@ config TI_SECURE_EMIF_PROTECTED_REGION_SIZE using hardware memory firewalls. This value must be smaller than the TI_SECURE_EMIF_TOTAL_REGION_SIZE value. +config SYS_AUTOMATIC_SDRAM_DETECTION + bool + +choice + depends on OMAP44XX || OMAP54XX + prompt "Static or dynamic DDR timing calculations" + default SYS_EMIF_PRECALCULATED_TIMING_REGS + help + For the DDR timing information we can either dynamically determine + the timings to use or use pre-determined timings (based on using the + dynamic method). Default to the static timing information. + +config SYS_EMIF_PRECALCULATED_TIMING_REGS + bool "Use precalcualted timing values" + +config SYS_DEFAULT_LPDDR2_TIMINGS + bool "Use default LPDDR2 timing values" + select SYS_AUTOMATIC_SDRAM_DETECTION + +endchoice + source "arch/arm/mach-omap2/omap3/Kconfig" source "arch/arm/mach-omap2/omap4/Kconfig" diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index fcf282bc4c18..3d78972bfebb 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -23,17 +23,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE -/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - #include /* diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index f7f17d0f502c..a9d4cf905f8b 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -19,17 +19,6 @@ /* Use General purpose timer 1 */ #define CONFIG_SYS_TIMERBASE GPT2_BASE -/* - * For the DDR timing information we can either dynamically determine - * the timings to use or use pre-determined timings (based on using the - * dynamic method. Default to the static timing infomation. - */ -#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS -#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION -#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS -#endif - #define CONFIG_PALMAS_POWER #include -- 2.25.1
[PATCH 5/8] Convert CONFIG_SYS_UNIFY_CACHE to Kconfig
This converts the following to Kconfig: CONFIG_SYS_UNIFY_CACHE Signed-off-by: Tom Rini --- configs/M53017EVB_defconfig | 1 + configs/M5329AFEE_defconfig | 1 + configs/M5329BFEE_defconfig | 1 + configs/M5373EVB_defconfig | 1 + drivers/net/Kconfig | 4 include/configs/M53017EVB.h | 2 -- include/configs/M5329EVB.h | 2 -- include/configs/M5373EVB.h | 2 -- include/configs/astro_mcf5373l.h | 2 -- 9 files changed, 8 insertions(+), 8 deletions(-) diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig index 901a15d5061a..cec2520bdd78 100644 --- a/configs/M53017EVB_defconfig +++ b/configs/M53017EVB_defconfig @@ -42,6 +42,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig index 0bce9d8f4229..9d55d5058e57 100644 --- a/configs/M5329AFEE_defconfig +++ b/configs/M5329AFEE_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig index efc7733b44c2..bd0cbddfb89c 100644 --- a/configs/M5329BFEE_defconfig +++ b/configs/M5329BFEE_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig index 920a86fa9aa7..0a159eb170e2 100644 --- a/configs/M5373EVB_defconfig +++ b/configs/M5373EVB_defconfig @@ -43,6 +43,7 @@ CONFIG_SYS_FLASH_CFI=y CONFIG_MTD_RAW_NAND=y CONFIG_DM_ETH=y CONFIG_MCFFEC=y +CONFIG_SYS_UNIFY_CACHE=y CONFIG_MII=y CONFIG_MCFRTC=y CONFIG_SYS_MCFRTC_BASE=0xFC0A8000 diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 40b5c8274e9e..cb891f5dbede 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -409,6 +409,10 @@ config MCFFEC This driver supports the network interface units in the ColdFire family. +config SYS_UNIFY_CACHE + depends on MCFFEC + bool "Invalidate icache during ethernet operations" + config FSLDMAFEC bool "ColdFire DMA Ethernet Support" depends on DM_ETH diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index b38260ed09aa..fd6aee127d87 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -22,8 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT5000 -#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY # define CONFIG_SYS_TX_ETH_BUFFER 8 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index c65f26cc091d..b7ccdd08ac4f 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -22,8 +22,6 @@ #define CONFIG_WATCHDOG_TIMEOUT5000/* timeout in milliseconds, max timeout is 6.71sec */ -#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 7e45d3587979..06ee0748b930 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -24,8 +24,6 @@ #define CONFIG_WATCHDOG_TIMEOUT3360/* timeout in ms, max is 3.36 sec */ -#define CONFIG_SYS_UNIFY_CACHE - #ifdef CONFIG_MCFFEC # define CONFIG_SYS_DISCOVER_PHY /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 18e06076a4ab..a8265e961a26 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -65,8 +65,6 @@ #define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 #define CONFIG_SYS_CORE_SRAM 0x8000 -#define CONFIG_SYS_UNIFY_CACHE - /* * Define baudrate for UART1 (console output, tftp, ...) * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud -- 2.25.1
[PATCH 4/8] layerscape: Remove some unused CONFIG symbols
All of these symbols are not referenced anywhere else in the code, so remove them. Cc: Peng Fan Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h | 4 arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 1 - arch/arm/include/asm/arch-ls102xa/config.h | 6 +- include/configs/MPC837XERDB.h | 1 - include/configs/ids8313.h | 1 - include/configs/mx6ullevk.h| 6 -- 6 files changed, 1 insertion(+), 18 deletions(-) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h index 4b0f554e3363..f2dbcdc8164f 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h @@ -13,10 +13,8 @@ #define CONFIG_SYS_DCSRBAR 0x2000 #define CONFIG_SYS_DCSR_DCFG_ADDR (CONFIG_SYS_DCSRBAR + 0x0014) -#define CONFIG_SYS_DCSR_COP_CCP_ADDR (CONFIG_SYS_DCSRBAR + 0x02008040) #define CONFIG_SYS_FSL_DDR_ADDR(CONFIG_SYS_IMMR + 0x0008) -#define CONFIG_SYS_GIC400_ADDR (CONFIG_SYS_IMMR + 0x0040) #define CONFIG_SYS_IFC_ADDR(CONFIG_SYS_IMMR + 0x0053) #define SYS_FSL_QSPI_ADDR (CONFIG_SYS_IMMR + 0x0055) #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x0056) @@ -26,9 +24,7 @@ #define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x0057) #define CONFIG_SYS_FSL_BMAN_ADDR (CONFIG_SYS_IMMR + 0x0089) #define CONFIG_SYS_FSL_QMAN_ADDR (CONFIG_SYS_IMMR + 0x0088) -#define CONFIG_SYS_FSL_FMAN_ADDR (CONFIG_SYS_IMMR + 0x00a0) #define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea) -#define CONFIG_SYS_FSL_DCFG_ADDR (CONFIG_SYS_IMMR + 0x00ee) #define CONFIG_SYS_FSL_CLK_ADDR(CONFIG_SYS_IMMR + 0x00ee1000) #define CONFIG_SYS_NS16550_COM1(CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2(CONFIG_SYS_IMMR + 0x011c0600) diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 304cd7980a66..570397b3c04c 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -52,7 +52,6 @@ #define CONFIG_SYS_FSL_DCSR_DDR_ADDR 0x70012c000ULL #define CONFIG_SYS_FSL_DCSR_DDR2_ADDR 0x70012d000ULL #define CONFIG_SYS_FSL_DCSR_DDR3_ADDR 0x700132000ULL -#define CONFIG_SYS_FSL_DCSR_DDR4_ADDR 0x700133000ULL #define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x0100) #define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x0101) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index 796e2b218e56..e5f61ea4a6ee 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -32,14 +32,11 @@ #define CONFIG_SYS_FSL_RCPM_ADDR (CONFIG_SYS_IMMR + 0x00ee2000) #define CONFIG_SYS_NS16550_COM1(CONFIG_SYS_IMMR + 0x011c0500) #define CONFIG_SYS_NS16550_COM2(CONFIG_SYS_IMMR + 0x011d0500) -#define CONFIG_SYS_DCU_ADDR(CONFIG_SYS_IMMR + 0x01ce) #define CONFIG_SYS_XHCI_USB1_ADDR (CONFIG_SYS_IMMR + 0x0210) #define CONFIG_SYS_FSL_SEC_OFFSET 0x0070 #define CONFIG_SYS_FSL_JR0_OFFSET 0x0071 #define CONFIG_SYS_TSEC1_OFFSET0x01d1 -#define CONFIG_SYS_TSEC2_OFFSET0x01d5 -#define CONFIG_SYS_TSEC3_OFFSET0x01d9 #define CONFIG_SYS_MDIO1_OFFSET0x01d24000 #define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) @@ -79,8 +76,7 @@ #define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x0220) #ifdef CONFIG_DDR_SPD #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) -#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE +#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) #endif #define CONFIG_SYS_FSL_IFC_BE diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 3e4d66874df4..8517b0330f52 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -227,7 +227,6 @@ #ifdef CONFIG_TSEC2 #define CONFIG_TSEC2_NAME "TSEC1" -#define CONFIG_SYS_TSEC2_OFFSET0x25000 #define TSEC2_PHY_ADDR 0x1c #define TSEC2_FLAGS(TSEC_GIGABIT | TSEC_REDUCED) #define TSEC2_PHYIDX 0 diff
[PATCH 3/8] usb: Remove some unused CONFIG settings
On platforms that use CONFIG_USB_OHCI_NEW we do not need to set CONFIG_SYS_USB_OHCI_REGS_BASE nor CONFIG_SYS_USB_OHCI_SLOT_NAME. Drop these from platforms that we can. Signed-off-by: Tom Rini --- include/configs/at91sam9n12ek.h| 5 - include/configs/at91sam9x5ek.h | 7 --- include/configs/ethernut5.h| 5 - include/configs/sama5d3_xplained.h | 5 - include/configs/sama5d3xek.h | 5 - include/configs/smartweb.h | 3 --- include/configs/snapper9260.h | 3 --- include/configs/taurus.h | 3 --- include/configs/usb_a9263.h| 5 - 9 files changed, 41 deletions(-) diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 4fac0aad42c5..4d492988eba7 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -39,11 +39,6 @@ "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\ "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0" -/* USB host */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif - /* SPL */ #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 758a91cdaa97..0e7665843dba 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -38,13 +38,6 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#ifndef CONFIG_USB_EHCI_HCD -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif -#endif - /* SPL */ #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h index 529b9837318f..88a702f1af27 100644 --- a/include/configs/ethernut5.h +++ b/include/configs/ethernut5.h @@ -59,11 +59,6 @@ #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x0050 -#endif - /* RTC */ #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP) #define CONFIG_SYS_I2C_RTC_ADDR0x51 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 22839d544a50..fad65cb11234 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -37,11 +37,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x0060 -#endif - /* SPL */ /* size of u-boot.bin to load */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index dc89148a0450..7bc3f91e77a8 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -50,11 +50,6 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI -#endif - /* SPL */ #define CONFIG_SYS_MONITOR_LEN (512 << 10) diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index 65bc3c672eed..1a3ac817fbfc 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -66,9 +66,6 @@ #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_IDATMEL_ID_SYS -/* USB configuration */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE - /* USB DFU support */ #define CONFIG_USB_GADGET_AT91 diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h index 2b7afb5d25e5..7adb349f9a54 100644 --- a/include/configs/snapper9260.h +++ b/include/configs/snapper9260.h @@ -37,9 +37,6 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 -/* USB */ -#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE - /* GPIOs and IO expander */ #define CONFIG_PCA953X #define CONFIG_SYS_I2C_PCA953X_ADDR0x28 diff --git a/include/configs/taurus.h b/include/configs/taurus.h index ab2dc3d7146b..4758e23f5572 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -63,10 +63,7 @@ #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 #endif -/* USB */ #if defined(CONFIG_BOARD_TAURUS) -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x0050 - /* USB DFU support */ #define CONFIG_USB_GADGET_AT91 diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h index 8cb8c609d052..e0dde1cc8365 100644 --- a/include/configs/usb_a9263.h +++ b/include/configs/usb_a9263.h @@ -43,11 +43,6 @@ #define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) #endif -/* USB */ -#ifdef CONFIG_CMD_USB -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a0 -#endif - /* bootstrap + u-boot + env + linux in dataflash on CS0 */ #define CONFIG_EXTRA_ENV_SETTINGS \ -- 2.25.1
[PATCH 1/8] Convert CONFIG_USB_OHCI_NEW et al to Kconfig
This converts the following to Kconfig: CONFIG_SYS_OHCI_SWAP_REG_ACCESS CONFIG_SYS_USB_OHCI_CPU_INIT CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS CONFIG_SYS_USB_OHCI_SLOT_NAME CONFIG_USB_ATMEL CONFIG_USB_ATMEL_CLK_SEL_PLLB CONFIG_USB_ATMEL_CLK_SEL_UPLL CONFIG_USB_OHCI_LPC32XX CONFIG_USB_OHCI_NEW Signed-off-by: Tom Rini --- arch/arm/include/asm/arch-lpc32xx/config.h| 4 -- configs/at91sam9260ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9260ek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9260ek_nandflash_defconfig | 3 ++ configs/at91sam9261ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9261ek_dataflash_cs3_defconfig | 3 ++ configs/at91sam9261ek_nandflash_defconfig | 3 ++ configs/at91sam9263ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9263ek_dataflash_defconfig | 3 ++ configs/at91sam9263ek_nandflash_defconfig | 3 ++ configs/at91sam9263ek_norflash_boot_defconfig | 3 ++ configs/at91sam9263ek_norflash_defconfig | 3 ++ configs/at91sam9g10ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9g10ek_dataflash_cs3_defconfig | 3 ++ configs/at91sam9g10ek_nandflash_defconfig | 3 ++ configs/at91sam9g20ek_2mmc_defconfig | 3 ++ .../at91sam9g20ek_2mmc_nandflash_defconfig| 3 ++ configs/at91sam9g20ek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9g20ek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9g20ek_nandflash_defconfig | 3 ++ configs/at91sam9xeek_dataflash_cs0_defconfig | 3 ++ configs/at91sam9xeek_dataflash_cs1_defconfig | 3 ++ configs/at91sam9xeek_nandflash_defconfig | 3 ++ configs/axs103_defconfig | 1 + configs/chromebook_bob_defconfig | 1 + configs/chromebook_kevin_defconfig| 1 + configs/comtrend_ar5315u_ram_defconfig| 2 + configs/comtrend_ar5387un_ram_defconfig | 2 + configs/comtrend_ct5361_ram_defconfig | 2 + configs/comtrend_vr3032u_ram_defconfig| 2 + configs/comtrend_wap5813n_ram_defconfig | 2 + configs/da850evm_defconfig| 1 + configs/da850evm_direct_nor_defconfig | 1 + configs/da850evm_nand_defconfig | 1 + configs/devkit3250_defconfig | 3 ++ configs/elgin-rv1108_defconfig| 1 + configs/evb-rk3128_defconfig | 1 + configs/evb-rk3328_defconfig | 1 + configs/evb-rv1108_defconfig | 1 + configs/hsdk_4xd_defconfig| 1 + configs/hsdk_defconfig| 1 + configs/huawei_hg556a_ram_defconfig | 2 + configs/khadas-edge-captain-rk3399_defconfig | 1 + configs/khadas-edge-rk3399_defconfig | 1 + configs/khadas-edge-v-rk3399_defconfig| 1 + configs/nanopi-r2s-rk3328_defconfig | 1 + configs/netgear_dgnd3700v2_ram_defconfig | 2 + configs/omapl138_lcdk_defconfig | 1 + configs/pinebook-pro-rk3399_defconfig | 1 + configs/pm9261_defconfig | 3 ++ configs/pm9263_defconfig | 3 ++ configs/roc-cc-rk3328_defconfig | 1 + configs/rock-pi-e-rk3328_defconfig| 1 + configs/rock64-rk3328_defconfig | 1 + configs/rock960-rk3399_defconfig | 1 + configs/rockpro64-rk3399_defconfig| 1 + configs/sama5d3_xplained_mmc_defconfig| 3 ++ configs/sama5d3_xplained_nandflash_defconfig | 3 ++ configs/sfr_nb4-ser_ram_defconfig | 2 + configs/smartweb_defconfig| 2 + configs/socrates_defconfig| 2 + configs/stih410-b2260_defconfig | 1 + configs/taurus_defconfig | 2 + configs/vexpress_aemv8a_juno_defconfig| 1 + drivers/usb/host/Kconfig | 44 +++ drivers/usb/host/ohci-at91.c | 5 --- drivers/usb/host/ohci-generic.c | 4 -- drivers/usb/host/ohci.h | 2 +- include/configs/at91sam9260ek.h | 6 --- include/configs/at91sam9261ek.h | 10 - include/configs/at91sam9263ek.h | 6 --- include/configs/at91sam9n12ek.h | 6 --- include/configs/at91sam9x5ek.h| 6 --- include/configs/axs10x.h | 2 - include/configs/bmips_bcm6318.h | 7 --- include/configs/bmips_bcm63268.h | 7 --- include/configs/bmips_bcm6328.h | 7 --- include/configs/bmips_bcm6348.h | 7 --- include/configs/bmips_bcm6358.h | 7 --- include/configs/bmips_bcm6362.h | 7 --- include/configs/bmips_bcm6368.h | 7 --- include/configs/da850evm.h| 4 -- include/configs/devkit3250.h | 1 - include/configs/ethernut5.h | 6 --- include/configs/evb_rk3399.h
[PATCH 2/8] usb: ohci-hcd: Remove some unused legacy code
At this point, the only user of ohci-hcd that also uses PCI is using DM,
so we can drop CONFIG_PCI_OHCI* usage. No platforms set either of
CONFIG_SYS_USB_OHCI_BOARD_INIT or CONFIG_SYS_USB_OHCI_CPU_INIT so those
hooks can be removed as well.
Signed-off-by: Tom Rini
---
doc/README.generic_usb_ohci | 30
drivers/usb/host/ohci-hcd.c | 93 -
include/configs/socrates.h | 3 --
3 files changed, 126 deletions(-)
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci
index 65b0896c7fd2..a7da4bcb836e 100644
--- a/doc/README.generic_usb_ohci
+++ b/doc/README.generic_usb_ohci
@@ -11,18 +11,6 @@ Configuration options
CONFIG_USB_OHCI_NEW: enable the new OHCI driver
- CONFIG_SYS_USB_OHCI_BOARD_INIT: call the board dependant hooks:
-
- - extern int board_usb_init(void);
- - extern int usb_board_stop(void);
- - extern int usb_cpu_init_fail(void);
-
- CONFIG_SYS_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
-
- - extern int usb_cpu_init(void);
- - extern int usb_cpu_stop(void);
- - extern int usb_cpu_init_fail(void);
-
CONFIG_SYS_USB_OHCI_REGS_BASE: defines the base address of the OHCI
registers
@@ -43,21 +31,3 @@ config option
needs to be defined.
-
-PCI Controllers
-
-
-You'll need to define
-
- CONFIG_PCI_OHCI
-
-If you have several USB PCI controllers, define
-
- CONFIG_PCI_OHCI_DEVNO: number of the OHCI device in PCI list
-
-If undefined, the first instance found in PCI space will be used.
-
-PCI Controllers need to do byte swapping on register accesses, so they
-should to define:
-
- CONFIG_SYS_OHCI_SWAP_REG_ACCESS
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index fedf0db9c7e4..9acef5ee4f84 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -35,13 +35,6 @@
#include
#include
-#if defined(CONFIG_PCI_OHCI)
-# include
-#if !defined(CONFIG_PCI_OHCI_DEVNO)
-#define CONFIG_PCI_OHCI_DEVNO 0
-#endif
-#endif
-
#include
#include
#include
@@ -53,7 +46,6 @@
#endif
#if defined(CONFIG_CPU_ARM920T) || \
- defined(CONFIG_PCI_OHCI) || \
defined(CONFIG_PCI) || \
defined(CONFIG_SYS_OHCI_USE_NPS)
# define OHCI_USE_NPS /* force NoPowerSwitching mode */
@@ -68,26 +60,6 @@
#define OHCI_CONTROL_INIT \
(OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
-#if !CONFIG_IS_ENABLED(DM_USB)
-#ifdef CONFIG_PCI_OHCI
-static struct pci_device_id ohci_pci_ids[] = {
- {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
- {0x1033, 0x0035}, /* NEC PCI OHCI module ids */
- {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */
- /* Please add supported PCI OHCI controller ids here */
- {0, 0}
-};
-#endif
-#endif
-
-#ifdef CONFIG_PCI_EHCI_DEVNO
-static struct pci_device_id ehci_pci_ids[] = {
- {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */
- /* Please add supported PCI EHCI controller ids here */
- {0, 0}
-};
-#endif
-
#ifdef DEBUG
#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
#else
@@ -2007,21 +1979,6 @@ static char ohci_inited = 0;
int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
{
-#ifdef CONFIG_PCI_OHCI
- pci_dev_t pdev;
-#endif
-
-#ifdef CONFIG_SYS_USB_OHCI_CPU_INIT
- /* cpu dependant init */
- if (usb_cpu_init())
- return -1;
-#endif
-
-#ifdef CONFIG_SYS_USB_OHCI_BOARD_INIT
- /* board dependant init */
- if (board_usb_init(index, USB_INIT_HOST))
- return -1;
-#endif
memset(, 0, sizeof(ohci_t));
/* align the storage */
@@ -2036,28 +1993,7 @@ int usb_lowlevel_init(int index, enum usb_init_type
init, void **controller)
gohci.disabled = 1;
gohci.sleeping = 0;
gohci.irq = -1;
-#ifdef CONFIG_PCI_OHCI
- pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
-
- if (pdev != -1) {
- u16 vid, did;
- u32 base;
- pci_read_config_word(pdev, PCI_VENDOR_ID, );
- pci_read_config_word(pdev, PCI_DEVICE_ID, );
- printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
- vid, did, (pdev >> 16) & 0xff,
- (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
- pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, );
- printf("OHCI regs address 0x%08x\n", base);
- gohci.regs = (struct ohci_regs *)base;
- } else {
- printf("%s: OHCI devnr: %d not found\n", __func__,
- CONFIG_PCI_OHCI_DEVNO);
- return -1;
- }
-#else
gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
-#endif
gohci.flags =
Re: OHCI: What is the current status with Driver Model
On Wed, Jun 22, 2022 at 06:34:58AM +, eugen.hris...@microchip.com wrote: > On 6/14/22 6:01 PM, sergiu.m...@microchip.com wrote: > > On 07.06.2022 18:27, Sergiu Moga wrote: > >> Hello, > >> > >> I want to convert our AT91 OHCI driver to Driver Model, but I am not > >> sure whether OHCI is fully supported or not in Driver Model. From what > >> I can see in `drivers/usb/host/` there are some OHCI drivers > >> registered into Driver Model, but the documentation[1] (perhaps > >> outdated) seems to specify that OHCI is not supported. > >> > >> Could you please tell me what is the current status of OHCI with > >> Driver Model? > >> > >> > >> [1] > >> https://u-boot.readthedocs.io/en/latest/develop/driver-model/usb-info.html > >> > >> > >> Regards, > >> > >> Sergiu > >> > > Hello, > > > > My apologies, Simon, I forgot to add you to cc. Do you happen to know > > the answer to my question? > > > > Regards, > > > > Sergiu > > > > + Tom > > Hi Tom, > > You have been asking about this Yes, I guess the documentation is out of date. With the exception of ohci-at91 and ohci-lpc32xx all of the other drivers support DM. The ohci-da8xx implementation is likely the easiest one to follow as it didn't do any rewriting but rather added a probe function and data structures to otherwise make use of the existing callers. It would be better to do a bigger re-org of the code as at this point DM_USB migration deadline has passed so all boards should be fixed up when updating the ohci-at91 driver. Thanks. -- Tom signature.asc Description: PGP signature
[PATCH v2] mtd: rawnand: Add support to dedicated function to set timings
From: Kory Maincent
With the current code if the board has an ONFI compliant NAND without
support to the get and set features, U-boot returns an ENOTSUP error when
trying to tune the timings which prevents the probe of the device.
Indeed onfi_set_features() return ENOTSUP error if set/get features is not
supported. In the case of timings we should not return ENOTSUP because we
can use the default timings. The NAND is already capable of listening at
its highest supported rate, so we assume in this case that it is fine to
skip the operation.
Fix it by adding an intermediate nand_onfi_set_timings() function which
does not error out if set/get feature is not supported.
Signed-off-by: Kory Maincent
---
Change since v1:
- Update commit message
drivers/mtd/nand/raw/nand_base.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 6f81257cf1..e8ece0a4a0 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -974,6 +974,22 @@ static int nand_reset_data_interface(struct nand_chip
*chip, int chipnr)
return ret;
}
+static int nand_onfi_set_timings(struct mtd_info *mtd, struct nand_chip *chip)
+{
+ if (!chip->onfi_version ||
+ !(le16_to_cpu(chip->onfi_params.opt_cmd)
+ & ONFI_OPT_CMD_SET_GET_FEATURES))
+ return 0;
+
+ u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
+ chip->onfi_timing_mode_default,
+ };
+
+ return chip->onfi_set_features(mtd, chip,
+ ONFI_FEATURE_ADDR_TIMING_MODE,
+ tmode_param);
+}
+
/**
* nand_setup_data_interface - Setup the best data interface and timings
* @chip: The NAND chip
@@ -999,17 +1015,9 @@ static int nand_setup_data_interface(struct nand_chip
*chip, int chipnr)
* Ensure the timing mode has been changed on the chip side
* before changing timings on the controller side.
*/
- if (chip->onfi_version) {
- u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {
- chip->onfi_timing_mode_default,
- };
-
- ret = chip->onfi_set_features(mtd, chip,
- ONFI_FEATURE_ADDR_TIMING_MODE,
- tmode_param);
- if (ret)
- goto err;
- }
+ ret = nand_onfi_set_timings(mtd, chip);
+ if (ret)
+ goto err;
ret = chip->setup_data_interface(mtd, chipnr, chip->data_interface);
err:
--
2.25.1
[PATCH] usb: kbd: allow probing even if usbkbd not in stdin
From: Kory Maincent
For now the driver does not probe if usbkbd was not present in stdin.
This presents two issues, we can not probe the driver before setting stdin
and we can not use this driver in other manner than stdin console.
This patch fixes this by adding an else statement. It simply probes the
driver without console management in the case "usbkbd" is not in stdin.
Signed-off-by: Kory Maincent
---
common/usb_kbd.c | 25 +
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 352d86fb2e..d385bea532 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -581,21 +581,22 @@ static int probe_usb_keyboard(struct usb_device *dev)
stdinname = env_get("stdin");
#if CONFIG_IS_ENABLED(CONSOLE_MUX)
- error = iomux_doenv(stdin, stdinname);
- if (error)
- return error;
+ if (strstr(stdinname, DEVNAME) != NULL) {
+ error = iomux_doenv(stdin, stdinname);
+ if (error)
+ return error;
+ }
#else
/* Check if this is the standard input device. */
- if (strcmp(stdinname, DEVNAME))
- return 1;
-
- /* Reassign the console */
- if (overwrite_console())
- return 1;
+ if (!strcmp(stdinname, DEVNAME)) {
+ /* Reassign the console */
+ if (overwrite_console())
+ return 1;
- error = console_assign(stdin, DEVNAME);
- if (error)
- return error;
+ error = console_assign(stdin, DEVNAME);
+ if (error)
+ return error;
+ }
#endif
return 0;
--
2.25.1
[PATCH 4/4] spi: spi-mem.c : Allow address 0 for SPI mem operations
Trying to boot my Rock Pi 4B from its XTX SPI NOR Flash failed when my
custom compiled TF-A had a load address of 0.
The same TF-A booted correctly from MMC.
Add a local variable to spi_mem_exec_op() to determine operation
direction, instead of testing rx_buf or tx_buf for null value, so that
a buffer at RAM address 0 is accepted.
This commit also cuts short a debug dump of the image loaded to show
only the first 0x1000 and the last 0x100 bytes, and not swamping the
serial log. When adding the #define DEBUG to the .c file one can
change these limits at the same time if they don't fit.
Cc: Jagan Teki
Signed-off-by: Xavier Drudis Ferran
---
drivers/spi/spi-mem.c | 34 ++
1 file changed, 26 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c
index 9c1ede1b61..4dc90addb3 100644
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -21,6 +21,8 @@
#include
#include
#include
+#define DEBUG_DUMP_START_LENGTH0x1000
+#define DEBUG_DUMP_END_LENGTH 0x100
#endif
#ifndef __UBOOT__
@@ -373,12 +375,21 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct
spi_mem_op *op)
if (msg.actual_length != totalxferlen)
return -EIO;
#else
+ enum spi_mem_data_dir dir = SPI_MEM_NO_DATA;
if (op->data.nbytes) {
- if (op->data.dir == SPI_MEM_DATA_IN)
+ dir = op->data.dir;
+ if (dir == SPI_MEM_DATA_IN) {
rx_buf = op->data.buf.in;
- else
+ } else {
tx_buf = op->data.buf.out;
+ /**
+* keep old behaviour, to assume SPI_MEM_DATA_OUT
+* if ever data.nbytes!=0 but data.dir==SPI_MEM_NO_DATA
+* (hopefully never)
+*/
+ dir = SPI_MEM_DATA_OUT;
+ }
}
op_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes;
@@ -410,7 +421,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct
spi_mem_op *op)
/* 1st transfer: opcode + address + dummy cycles */
flag = SPI_XFER_BEGIN;
/* Make sure to set END bit if no tx or rx data messages follow */
- if (!tx_buf && !rx_buf)
+ if (dir == SPI_MEM_NO_DATA)
flag |= SPI_XFER_END;
ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag);
@@ -418,7 +429,7 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct
spi_mem_op *op)
return ret;
/* 2nd transfer: rx or tx data path */
- if (tx_buf || rx_buf) {
+ if (dir != SPI_MEM_NO_DATA) {
ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
rx_buf, SPI_XFER_END);
if (ret)
@@ -430,10 +441,17 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct
spi_mem_op *op)
for (i = 0; i < pos; i++)
debug("%02x ", op_buf[i]);
debug("| [%dB %s] ",
- tx_buf || rx_buf ? op->data.nbytes : 0,
- tx_buf || rx_buf ? (tx_buf ? "out" : "in") : "-");
- for (i = 0; i < op->data.nbytes; i++)
- debug("%02x ", tx_buf ? tx_buf[i] : rx_buf[i]);
+ op->data.nbytes,
+ dir == SPI_MEM_DATA_IN ? "in" : (dir == SPI_MEM_DATA_OUT ? "out"
: "-"));
+ for (i = 0; i < op->data.nbytes && i < DEBUG_DUMP_START_LENGTH ; i++)
+ debug("%02x ", dir == SPI_MEM_DATA_OUT ? tx_buf[i] : rx_buf[i]);
+ if (op->data.nbytes > DEBUG_DUMP_END_LENGTH && op->data.nbytes >
DEBUG_DUMP_START_LENGTH &&
+ i < op->data.nbytes - DEBUG_DUMP_END_LENGTH) {
+ debug(" ... ");
+ i = op->data.nbytes - DEBUG_DUMP_END_LENGTH;
+ }
+ for (; i < op->data.nbytes ; i++)
+ debug("%02x ", dir == SPI_MEM_DATA_OUT ? tx_buf[i] : rx_buf[i]);
debug("[ret %d]\n", ret);
if (ret < 0)
--
2.20.1
[PATCH 3/4] mtd: spi: spi-nor: Adapt soft reset to XTX25F32B in Rock Pi 4 rev 1.4
This Flash part does not use octal mode. But soft reset seems to
be required to boot from SPI NOR Flash in Rock Pi 4B.
Cc: Jagan Teki
Cc: Vignesh R
Signed-off-by: Xavier Drudis Ferran
---
drivers/mtd/spi/spi-nor-core.c | 54 ++
include/linux/mtd/spi-nor.h| 5
2 files changed, 53 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 3b7c817c02..d6e7067320 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3526,6 +3526,19 @@ static struct spi_nor_fixups mt35xu512aba_fixups = {
};
#endif /* CONFIG_SPI_FLASH_MT35XU */
+#ifdef CONFIG_SPI_FLASH_XTX
+static void xtx25f32b_post_sfdp_fixup(struct spi_nor *nor,
+ struct spi_nor_flash_parameter *params)
+{
+ nor->flags |= SNOR_F_SOFT_RESET;
+ nor->reset_proto = SNOR_PROTO_1_1_1; /* at least for Rock Pi 4 */
+}
+
+static struct spi_nor_fixups xtx25f32b_fixups = {
+ .post_sfdp = xtx25f32b_post_sfdp_fixup,
+};
+#endif
+
/** spi_nor_octal_dtr_enable() - enable Octal DTR I/O if needed
* @nor: pointer to a 'struct spi_nor'
*
@@ -3625,7 +3638,7 @@ static int spi_nor_soft_reset(struct spi_nor *nor)
SPI_MEM_OP_NO_DUMMY,
SPI_MEM_OP_NO_ADDR,
SPI_MEM_OP_NO_DATA);
- spi_nor_setup_op(nor, , SNOR_PROTO_8_8_8_DTR);
+ spi_nor_setup_op(nor, , nor->reset_proto ? nor->reset_proto :
SNOR_PROTO_8_8_8_DTR);
ret = spi_mem_exec_op(nor->spi, );
if (ret) {
dev_warn(nor->dev, "Software reset enable failed: %d\n", ret);
@@ -3636,7 +3649,7 @@ static int spi_nor_soft_reset(struct spi_nor *nor)
SPI_MEM_OP_NO_DUMMY,
SPI_MEM_OP_NO_ADDR,
SPI_MEM_OP_NO_DATA);
- spi_nor_setup_op(nor, , SNOR_PROTO_8_8_8_DTR);
+ spi_nor_setup_op(nor, , nor->reset_proto ? nor->reset_proto :
SNOR_PROTO_8_8_8_DTR);
ret = spi_mem_exec_op(nor->spi, );
if (ret) {
dev_warn(nor->dev, "Software reset failed: %d\n", ret);
@@ -3656,16 +3669,34 @@ out:
}
#endif /* CONFIG_SPI_FLASH_SOFT_RESET */
+#ifdef CONFIG_SPI_FLASH_SOFT_RESET
+static bool flash_supports_proto(const struct flash_info *flash, enum
spi_nor_protocol proto)
+{
+ switch (spi_nor_get_protocol_data_nbits(proto)) {
+ case 8:
+ return flash->flags & (spi_nor_protocol_is_dtr(proto)
+ ? SPI_NOR_OCTAL_DTR_READ
+ : SPI_NOR_OCTAL_READ);
+ case 4: return flash->flags & SPI_NOR_QUAD_READ;
+ case 2: return flash->flags & SPI_NOR_DUAL_READ;
+ default:
+ return 1;
+ }
+}
+
int spi_nor_remove(struct spi_nor *nor)
{
-#ifdef CONFIG_SPI_FLASH_SOFT_RESET
- if (nor->info->flags & SPI_NOR_OCTAL_DTR_READ &&
+ if (flash_supports_proto(nor->info, nor->reset_proto) &&
nor->flags & SNOR_F_SOFT_RESET)
return spi_nor_soft_reset(nor);
-#endif
-
return 0;
}
+#else
+int spi_nor_remove(struct spi_nor *nor)
+{
+ return 0;
+}
+#endif
void spi_nor_set_fixups(struct spi_nor *nor)
{
@@ -3696,6 +3727,11 @@ void spi_nor_set_fixups(struct spi_nor *nor)
if (!strcmp(nor->info->name, "mt35xu512aba"))
nor->fixups = _fixups;
#endif
+
+#ifdef CONFIG_SPI_FLASH_XTX
+ if (!strcmp(nor->info->name, "xt25f32b"))
+ nor->fixups = _fixups;
+#endif
}
int spi_nor_scan(struct spi_nor *nor)
@@ -3715,6 +3751,12 @@ int spi_nor_scan(struct spi_nor *nor)
nor->reg_proto = SNOR_PROTO_1_1_1;
nor->read_proto = SNOR_PROTO_1_1_1;
nor->write_proto = SNOR_PROTO_1_1_1;
+ /**
+* XTX25F32B in RockPi 4 seems to need soft reset and can't do octal,
+* but we don't know yet whether we have it, and it seems to tolerate
+* it until we do. We'll change it later.
+*/
+ nor->reset_proto = SNOR_PROTO_8_8_8_DTR;
nor->read = spi_nor_read_data;
nor->write = spi_nor_write_data;
nor->read_reg = spi_nor_read_reg;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 4ceeae623d..a0d6c19468 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -490,6 +490,8 @@ struct spi_flash {
* @read_proto:the SPI protocol for read operations
* @write_proto: the SPI protocol for write operations
* @reg_proto the SPI protocol for read_reg/write_reg/erase operations
+ * @reset_proto: The SPI protocol for soft reset to return to state
expected
+ * by OS before running the OS (at remove time)
* @cmd_buf: used by the write_reg
* @cmd_ext_type: the command opcode extension for DTR mode.
* @fixups:flash-specific fixup hooks.
@@ -535,6 +537,9 @@ struct
[PATCH 2/4] arm: rockchip: rk3399: rock-pi-4: Add XTX SPI NOR 4MiB Flash chip in Rock Pi 4 boards from rev 1.4 on.
Configure Rock Pi 4 to boot from SPI NOR Flash.
Based on flash chip, board documentation and tests, this is the
fastest I could use it.
This seems to be the minimum necessary configuration for Rock Pi 4 to
be able to boot from SPI NOR Flash.
With the next patch, it works to sf probe 1:0, sf read, sf erase, sf
write, sf read and then boot linux and flashrom can write to
it. Sometimes flashrom seems to fail to write when at U-Boot stage
there was no sf read or write, not sure why.
Cc: Simon Glass
Cc: Philipp Tomsich
Cc: Kever Yang
Signed-off-by: Xavier Drudis Ferran
---
arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi | 18 ++
configs/rock-pi-4-rk3399_defconfig| 22 ++
2 files changed, 40 insertions(+)
diff --git a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
index c17e769f64..0755fa4ed6 100644
--- a/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi
@@ -15,3 +15,21 @@
_log {
regulator-init-microvolt = <95>;
};
+
+ {
+ status = "okay";
+ spi-max-frequency = <4000>;
+ spi-activate-delay = <12000>; /* 12 ms */
+
+ norflash: flash@0 {
+ compatible = "rockchip,spidev", "jedec,spi-nor";
+ reg = <0>;
+
+ spi-max-frequency = <4000>;
+ spi-cpha;
+ spi-cpol;
+
+ status = "okay";
+ u-boot,dm-pre-reloc;
+ };
+};
\ No newline at end of file
diff --git a/configs/rock-pi-4-rk3399_defconfig
b/configs/rock-pi-4-rk3399_defconfig
index eb5778dc17..7c3a2a3c5c 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -13,6 +13,8 @@ CONFIG_BOOTSTAGE_STASH_ADDR=0x3fbd
CONFIG_DEBUG_UART_BASE=0xFF1A
CONFIG_DEBUG_UART_CLOCK=2400
CONFIG_ENV_OFFSET_REDUND=0x3e
+CONFIG_SPL_SPI_FLASH_SUPPORT=y
+CONFIG_SPL_SPI=y
CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
@@ -36,6 +38,12 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
CONFIG_SPL_STACK=0x40
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
+CONFIG_SPL_MTD_SUPPORT=y
+# CONFIG_SPL_SPI_FLASH_TINY is not set
+CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPL_SPI_FLASH_MTD=y
+CONFIG_SPL_SPI_LOAD=y
+CONFIG_SYS_SPI_U_BOOT_OFFS=0xb
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
@@ -57,21 +65,35 @@ CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_SF_DEFAULT_MODE=0x3
+CONFIG_SF_DEFAULT_SPEED=4000
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SPI_FLASH_SOFT_RESET=y
+CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
+CONFIG_SPI_FLASH_XTX=y
+CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME_PCI=y
CONFIG_PCI=y
+CONFIG_SPL_PHY=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
+CONFIG_DM_PMIC_FAN53555=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
+CONFIG_SPL_REGULATOR_PWM=y
+CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=150
CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_ROCKCHIP_SPI=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
--
2.20.1
[PATCH 1/4] mtd: si: spi-nor: Add Rock pi 4b new flash chip
Radxa Rock Pi 4B from version 1.4 on carries a 4MiB XTX Technology Inc
25F32B SPI NOR Flash. (previous versions had pads where users could
solder different chips).
Add its parameters to spi-nor-ids.c so U-Boot can discover it and
(after further changes) we can boot from SPI.
Note that the Flash is declared to be dual and quad capable because
the datasheet [4] says so but I couldn't try it because in Rock Pi 4
it is not wired for QuadSPI, and rk3399 does not seem to support dual
SPI either (or I couldn't find any register to configure spi1tx and
spi1rx as bidirectional).
But the same Flash part could be used as in quad or dual model in some
other board.
Likewise locks are in the datasheet but untested.
The part has been added to downstream U-Boot [1] and linux [2] [3].
Cc: Jagan Teki
Cc: Vignesh R
Link: [1]
https://github.com/armbian/build/commit/c41cb4c454570127ad3238f6b901fbf3aa773c
Link: [2]
https://github.com/radxa/kernel/blob/release-4.4-rockpi4/drivers/mtd/spi-nor/spi-nor.c
Link: [3]
https://github.com/radxa/kernel/commit/8216f17965de7bc7ced7092aab0e2bfe16838a4
Link: [4] https://www.xtxtech.com/download/?AId=157
Signed-off-by: Xavier Drudis Ferran
---
drivers/mtd/spi/spi-nor-ids.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 20cd4d7fc9..e65c8e7dfc 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -388,6 +388,9 @@ const struct flash_info spi_nor_ids[] = {
#ifdef CONFIG_SPI_FLASH_XTX
/* XTX Technology (Shenzhen) Limited */
{ INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K |
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { INFO("xt25f32b", 0x0b4016, 0, 64 * 1024, 64,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ
+ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_SST26LOCK) },
#endif
{ },
};
--
2.20.1
[PATCH 0/4] mtd: spi: arm: rk3399: rock-pi-4: u-boot/next Support SPI NOR Flash in Rock Pi 4 (XTX xt25f32b)
The Radxa Rock Pi 4 board is sold from revision 1.4 with a soldered
4Mb SPI NOR Flash. This series allows to use it from U-Boot and boot
from it.
This series applies to u-boot/next. I have patches for master I can
send if requested. I can for custodian trees, but i'd need to adapt
and retest.
I'm not sure other people will need all of the patches. It may depend
on what other components are in use. I needed them and I'm sending
them thinking they'd improve U-Boot, but I'm new here so it's likely
I'm overseeing something. You may of course take all, some or none of
them.
I've tested with flashrom on linux-libre 5.15.42 (/dev/mtd0) with this
patch applied to the kernel. (not all of it would be needed, just for
"full disclosure" on tests)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
index 100a76916..7fdb22a85 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi
@@ -14,6 +14,13 @@
aliases {
mmc0 =
mmc1 =
+spi0 =
+spi1 =
+spi2 =
+spi3 =
+spi4 =
+spi5 =
+
};
chosen {
@@ -128,6 +135,12 @@
regulator-max-microvolt = <140>;
vin-supply = <_sys>;
};
+
+sound {
+ compatible = "audio-graph-card";
+ label = "rockchip,rk33999";
+ dais = <_p0>;
+ };
};
_l0 {
@@ -419,9 +432,28 @@
};
{
- i2c-scl-rising-time-ns = <300>;
i2c-scl-falling-time-ns = <15>;
- status = "okay";
+i2c-scl-rising-time-ns = <300>;
+ status = "okay";
+
+ es8316: codec@11 {
+ compatible = "everest,es8316";
+ reg = <0x11>;
+ clocks = < SCLK_I2S_8CH_OUT>;
+ clock-names = "mclk";
+ pinctrl-names = "default";
+ pinctrl-0 = <_det_pin>;
+ interrupt-parent = <>;
+ interrupts = ;
+ #sound-dai-cells = <0>;
+
+ port {
+ es8316_p0_0: endpoint {
+ remote-endpoint = <_p0_0>;
+ };
+ };
+ };
+
};
{
@@ -441,6 +473,15 @@
rockchip,capture-channels = <2>;
rockchip,playback-channels = <2>;
status = "okay";
+
+i2s0_p0: port {
+ i2s0_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <_p0_0>;
+ };
+ };
+
};
{
@@ -481,6 +522,7 @@
vpcie1v8-supply = <_1v8>;
vpcie3v3-supply = <_pcie>;
status = "okay";
+ max-link-speed = <2>;
};
{
@@ -500,7 +542,7 @@
pcie {
pcie_pwr_en: pcie-pwr-en {
- rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO _pull_none>;
+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO
_pull_up_20ma>;
};
};
@@ -556,6 +598,20 @@
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO _pull_none>;
};
};
+
+es8316 {
+hp_det_pin: hp-det-pin {
+rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO _pull_up>;
+ };
+ };
+
+ i2s0 {
+ i2s_8ch_mclk_pin: i2s-8ch-mclk-pin {
+ rockchip,pins = <4 RK_PA0 1 _pull_none>;
+ };
+ };
+
+
};
{
@@ -596,6 +652,7 @@
};
{
+max-frequency = <15000>;
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
index 6c63e6170..c04fee0f5 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
@@ -44,3 +44,29 @@
pinctrl-0 = <_host_wake_l _wake_l _enable_h>;
};
};
+
+ {
+ max-freq = <4000>;
+ status = "okay";
+
+ spiflash: spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-max-frequency = <4000>;
+ spi-cpol;
+ spi-cpha;
+
+ status = "okay";
+
+ partitions {
+ compatible = "fixed-partitions";
+
+ loader@0 {
+ label = "loader";
+ reg = <0x0 0x40>;
+ };
+ };
+ };
+};
\ No newline at end of file
diff --git
