[PATCH v5 0/1] kconfig: Add some new macros
This series adds a few more macros to kconfig, along with a bit of refactoring of what is there. It also adds some basic tests for the kconfig macros. Finally, to make the tests work, it enhances buildman to support changing CONFIG options on the fly when building. Changes in v5: - Correct a problem with azure not supporting buildman's parent directory - Don't run the tests on sandbox_vpl Changes in v4: - Expand the series with tests and buildman changes Simon Glass (1): test: Add some tests for kconfig.h test/Kconfig | 3 +- test/Makefile | 4 ++- test/lib/Kconfig | 23 ++ test/lib/Makefile | 5 +++ test/lib/kconfig.c| 58 +++ test/lib/kconfig_spl.c| 44 ++ test/py/tests/test_kconfig.py | 39 +++ 7 files changed, 174 insertions(+), 2 deletions(-) create mode 100644 test/lib/Kconfig create mode 100644 test/lib/kconfig.c create mode 100644 test/lib/kconfig_spl.c create mode 100644 test/py/tests/test_kconfig.py -- 2.37.1.455.g008518b4e5-goog
Re: [PATCH v2 5/5] test: add test for full FAT16 directory
On Sun, Jul 31, 2022 at 01:58:37PM +0200, Heinrich Schuchardt wrote:
> Add a unit test checking that a full FAT16 directory leads to an error
> when trying to add an additional entry.
Thank you for adding this test case, but
why do you restrict this test to fat16 and the root directory?
The root directory on fat16 is a very much special case and differently
implemented from others. So the test scenario doesn't do what we expect
for fulfilling the whole disk.
I think we should use other sub directories (and other file systems as well).
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> new patch
> ---
> test/py/tests/test_fs/test_mkdir.py | 17 +
> 1 file changed, 17 insertions(+)
>
> diff --git a/test/py/tests/test_fs/test_mkdir.py
> b/test/py/tests/test_fs/test_mkdir.py
> index f5cc308362..e3a9e3ed27 100644
> --- a/test/py/tests/test_fs/test_mkdir.py
> +++ b/test/py/tests/test_fs/test_mkdir.py
> @@ -119,3 +119,20 @@ class TestMkdir(object):
> assert('0123456789abcdef00/' in output)
> assert('0123456789abcdef13/' in output)
> assert_fs_integrity(fs_ubtype, fs_img)
> +
> +def test_mkdir7(self, u_boot_console, fs_obj_mkdir):
> +""" Test Case 7 - max out number of root directory entries
> +"""
> +_, _, fs_type = fs_obj_mkdir
Why not use fs_ubtype, _, fs_type = ..., then
> +if fs_type != 'fat16':
> +return
> +with u_boot_console.log.section('Test Case 7 - mkdir (max out)'):
> +for i in range(0, 512):
> +output = u_boot_console.run_command(
> +f'fatmkdir host 0:0
> /U-Boot-mkdir-max-out-test-directory-{i:05d}')
'%smkdir ...'.format(fs_ubtype, i)
-Takahiro Akashi
> +if 'Can\'t create directory entry' in output:
> +break
> +# A directory was created
> +assert i > 0
> +# The FAT16 root directory has only 512 directory entries
> +assert i <= 512 / 5
> --
> 2.36.1
>
[PATCH] configs: imx8mn_beacon_fspi: Add config for booting from QSPI
The imx8mn-beacon SOM has a QSPI part on it connected to the
FlexSPI controller. Add a defconfig option which supports
booting from the QSPI NOR flash instead of sd/mmc.
Signed-off-by: Adam Ford
---
This won't fully function without this series:
https://patchwork.ozlabs.org/project/uboot/list/?series=312016
diff --git a/configs/imx8mn_beacon_fspi_defconfig
b/configs/imx8mn_beacon_fspi_defconfig
new file mode 100644
index 00..ecaefd8930
--- /dev/null
+++ b/configs/imx8mn_beacon_fspi_defconfig
@@ -0,0 +1,156 @@
+CONFIG_ARM=y
+CONFIG_ARCH_IMX8M=y
+CONFIG_SYS_TEXT_BASE=0x4020
+CONFIG_SYS_MALLOC_LEN=0x200
+CONFIG_SPL_GPIO=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x2000
+CONFIG_ENV_OFFSET=0xDE00
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit"
+CONFIG_SPL_TEXT_BASE=0x912000
+CONFIG_TARGET_IMX8MN_BEACON=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_DRIVERS_MISC=y
+CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000
+CONFIG_SPL=y
+CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x4800
+CONFIG_SYS_LOAD_ADDR=0x4048
+CONFIG_SYS_MEMTEST_START=0x4000
+CONFIG_SYS_MEMTEST_END=0x4400
+CONFIG_LTO=y
+CONFIG_REMAKE_ELF=y
+CONFIG_FIT=y
+CONFIG_FIT_EXTERNAL_OFFSET=0x3000
+CONFIG_SPL_LOAD_FIT=y
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
+CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_USE_BOOTCOMMAND=y
+CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run
loadbootscript; then run bootscript; else if run loadimage; then run mmcboot;
else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi"
+CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb"
+CONFIG_ARCH_MISC_INIT=y
+CONFIG_SPL_MAX_SIZE=0x25000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x95e000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
+CONFIG_SPL_BOARD_INIT=y
+CONFIG_SPL_BOOTROM_SUPPORT=y
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK=0x187ff0
+CONFIG_SYS_SPL_MALLOC=y
+CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
+CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4220
+CONFIG_SYS_SPL_MALLOC_SIZE=0x8
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
+CONFIG_SPL_I2C=y
+CONFIG_SPL_POWER=y
+CONFIG_SPL_WATCHDOG=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="u-boot=> "
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_CBSIZE=2048
+CONFIG_SYS_PBSIZE=2074
+# CONFIG_BOOTM_NETBSD is not set
+CONFIG_SYS_BOOTM_LEN=0x80
+# CONFIG_CMD_EXPORTENV is not set
+# CONFIG_CMD_IMPORTENV is not set
+CONFIG_CMD_ERASEENV=y
+# CONFIG_CMD_CRC32 is not set
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_CLK=y
+CONFIG_CMD_FUSE=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PART=y
+CONFIG_CMD_SPI=y
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_CACHE=y
+CONFIG_CMD_REGULATOR=y
+CONFIG_CMD_EXT2=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_EXT4_WRITE=y
+CONFIG_CMD_FAT=y
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_NOWHERE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SYS_MMC_ENV_DEV=2
+CONFIG_SYS_MMC_ENV_PART=2
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_USE_ETHPRIME=y
+CONFIG_ETHPRIME="FEC"
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SPL_DM=y
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_SPL_CLK_IMX8MN=y
+CONFIG_CLK_IMX8MN=y
+CONFIG_USB_FUNCTION_FASTBOOT=y
+CONFIG_FASTBOOT_BUF_ADDR=0x4280
+CONFIG_FASTBOOT_BUF_SIZE=0x4000
+CONFIG_FASTBOOT_FLASH=y
+CONFIG_FASTBOOT_FLASH_MMC_DEV=0
+CONFIG_MXC_GPIO=y
+CONFIG_DM_PCA953X=y
+CONFIG_DM_I2C=y
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_MMC_IO_VOLTAGE=y
+CONFIG_MMC_UHS_SUPPORT=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_FSL_USDHC=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=4000
+CONFIG_SPI_FLASH_BAR=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
+CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
+CONFIG_FEC_MXC=y
+CONFIG_MII=y
+CONFIG_PINCTRL=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_PINCTRL_IMX8M=y
+CONFIG_DM_PMIC=y
+# CONFIG_SPL_PMIC_CHILDREN is not set
+CONFIG_DM_PMIC_BD71837=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_BD71837=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_RESET=y
+CONFIG_DM_SERIAL=y
+CONFIG_MXC_UART=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_NXP_FSPI=y
+CONFIG_SYSRESET=y
+CONFIG_SPL_SYSRESET=y
+CONFIG_SYSRESET_PSCI=y
+CONFIG_SYSRESET_WATCHDOG=y
+CONFIG_DM_THERMAL=y
+CONFIG_USB=y
+# CONFIG_SPL_DM_USB is not set
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_MANUFACTURER="FSL"
+CONFIG_USB_GADGET_VENDOR_NUM=0x0525
+CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
+CONFIG_CI_UDC=y
+CONFIG_SDP_LOADADDR=0x0
+CONFIG_IMX_WATCHDOG=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_FSPI_CONF_HEADER=y
+CONFIG_FSPI_CONF_FILE="fspi_header.bin"
--
2.34.1
[PATCH 8/8] Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig
This converts the following to Kconfig: CONFIG_FSL_NGPIXIS CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY Signed-off-by: Tom Rini --- README| 6 -- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 2 + .../include/asm/arch-fsl-layerscape/config.h | 2 - arch/powerpc/cpu/mpc85xx/Kconfig | 70 +++ arch/powerpc/cpu/mpc85xx/cpu.c| 3 - arch/powerpc/cpu/mpc85xx/spl_minimal.c| 4 -- arch/powerpc/include/asm/config_mpc85xx.h | 42 --- drivers/net/Kconfig | 4 ++ drivers/usb/host/Kconfig | 6 ++ include/configs/P3041DS.h | 2 - include/configs/P4080DS.h | 1 - include/configs/P5040DS.h | 3 - 12 files changed, 82 insertions(+), 63 deletions(-) diff --git a/README b/README index 4ef9e8c3ac7e..a6c306149c73 100644 --- a/README +++ b/README @@ -294,12 +294,6 @@ The following options need to be configured: the "64" category of the Power ISA). This is necessary for ePAPR compliance, among other possible reasons. - CONFIG_SYS_FSL_TBCLK_DIV - - Defines the core time base clock divider ratio compared to the - system clock. On most PQ3 devices this is 8, on newer QorIQ - devices it can be 16 or 32. The ratio varies from SoC to Soc. - CONFIG_SYS_FSL_ERRATUM_A004510 Enables a workaround for erratum A004510. If set, diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 91a5863c97fb..8a7bbb4a6559 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -85,6 +85,7 @@ config ARCH_LS1043A select SYS_FSL_ERRATUM_A010539 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_DDR4 + select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC @@ -123,6 +124,7 @@ config ARCH_LS1046A select SYS_FSL_ERRATUM_A010539 select SYS_FSL_HAS_DDR4 select SYS_FSL_SRDS_2 + select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h index 1850008a6d16..5824778ca286 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/config.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h @@ -209,7 +209,6 @@ /* SoC related */ #ifdef CONFIG_ARCH_LS1043A -#define CONFIG_SYS_FSL_QMAN_V3 #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 7 #define CONFIG_SYS_NUM_FM1_10GEC 1 @@ -256,7 +255,6 @@ #define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE #elif defined(CONFIG_ARCH_LS1046A) -#define CONFIG_SYS_FSL_QMAN_V3 #define CONFIG_SYS_NUM_FMAN1 #define CONFIG_SYS_NUM_FM1_DTSEC 8 #define CONFIG_SYS_NUM_FM1_10GEC 2 diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 796a5477b0e6..65db15085712 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -25,6 +25,7 @@ config TARGET_P3041DS select PHYS_64BIT select ARCH_P3041 select BOARD_LATE_INIT if CHAIN_OF_TRUST + select FSL_NGPIXIS imply CMD_SATA imply PANIC_HANG @@ -33,6 +34,7 @@ config TARGET_P4080DS select PHYS_64BIT select ARCH_P4080 select BOARD_LATE_INIT if CHAIN_OF_TRUST + select FSL_NGPIXIS imply CMD_SATA imply PANIC_HANG @@ -41,6 +43,8 @@ config TARGET_P5040DS select PHYS_64BIT select ARCH_P5040 select BOARD_LATE_INIT if CHAIN_OF_TRUST + select FSL_NGPIXIS + select SYS_FSL_RAID_ENGINE imply CMD_SATA imply PANIC_HANG @@ -209,6 +213,8 @@ config ARCH_B4420 select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN + select SYS_FSL_USB1_PHY_ENABLE select SYS_PPC64 select FSL_IFC imply CMD_EEPROM @@ -240,6 +246,9 @@ config ARCH_B4860 select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 + select SYS_FSL_SRIO_LIODN + select SYS_FSL_QMAN_V3 if SYS_DPAA_QBMAN + select SYS_FSL_USB1_PHY_ENABLE select SYS_PPC64 select FSL_IFC
[PATCH 6/8] Convert CONFIG_SYS_FSL_NUM_CC_PLLS to Kconfig
This converts the following to Kconfig: CONFIG_SYS_FSL_NUM_CC_PLLS Signed-off-by: Tom Rini --- arch/Kconfig.nxp | 6 ++ arch/arm/cpu/armv7/ls102xa/clock.c | 4 arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c | 4 arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c | 5 - arch/arm/include/asm/arch-fsl-layerscape/config.h| 3 --- arch/powerpc/cpu/mpc85xx/speed.c | 4 arch/powerpc/include/asm/config_mpc85xx.h| 8 configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig| 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig| 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig| 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig| 1 + configs/T1042D4RDB_NAND_defconfig| 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig| 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig| 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig| 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig| 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig| 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig| 1 + configs/kontron_sl28_defconfig | 1 + configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028aqds_tfa_defconfig | 1 + configs/ls1028aqds_tfa_lpuart_defconfig | 1 + configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1028ardb_tfa_defconfig | 1 + configs/ls1088aqds_defconfig | 1 + configs/ls1088aqds_qspi_SECURE_BOOT_defconfig| 1 + configs/ls1088aqds_qspi_defconfig| 1 + configs/ls1088aqds_sdcard_ifc_defconfig | 1 + configs/ls1088aqds_sdcard_qspi_defconfig | 1 + configs/ls1088aqds_tfa_defconfig | 1 + configs/ls1088ardb_qspi_SECURE_BOOT_defconfig| 1 + configs/ls1088ardb_qspi_defconfig| 1 + configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_sdcard_qspi_defconfig | 1 + configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1088ardb_tfa_defconfig | 1 + configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160aqds_tfa_defconfig | 1 + configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2160ardb_tfa_defconfig | 1 + configs/lx2160ardb_tfa_stmm_defconfig| 1 + configs/lx2162aqds_tfa_SECURE_BOOT_defconfig | 1 + configs/lx2162aqds_tfa_defconfig | 1 + configs/lx2162aqds_tfa_verified_boot_defconfig | 1 + configs/ten64_tfa_defconfig | 1 + 70 files changed, 69 insertions(+), 28 deletions(-) diff --git a/arch/Kconfig.nxp b/arch/Kconfig.nxp index a96245c37230..8c5a6f63a9a5 100644 --- a/arch/Kconfig.nxp +++ b/arch/Kconfig.nxp @@ -227,6 +227,12 @@ config VOL_MONITOR_ISL68233_SET endif +config SYS_FSL_NUM_CC_PLLS + int "Number of clock control PLLs" + depends on MPC85xx || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A || ARCH_LS1028A + default 2 if ARCH_LS1021A || ARCH_LS1028A || FSL_LSCH2 + default 6 if FSL_LSCH3 || MPC85xx + config SYS_FSL_ESDHC_BE bool diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c index
[PATCH 7/8] Convert CONFIG_SYS_FSL_PCIE_COMPAT to Kconfig
This converts the following to Kconfig: CONFIG_SYS_FSL_PCIE_COMPAT To do this, introduce a choice and option for each of the strings used and set CONFIG_SYS_FSL_PCIE_COMPAT based on that. Signed-off-by: Tom Rini --- README| 5 --- arch/powerpc/cpu/mpc85xx/Kconfig | 37 +++ arch/powerpc/include/asm/config_mpc85xx.h | 12 3 files changed, 37 insertions(+), 17 deletions(-) diff --git a/README b/README index 05c84141ebbe..4ef9e8c3ac7e 100644 --- a/README +++ b/README @@ -300,11 +300,6 @@ The following options need to be configured: system clock. On most PQ3 devices this is 8, on newer QorIQ devices it can be 16 or 32. The ratio varies from SoC to Soc. - CONFIG_SYS_FSL_PCIE_COMPAT - - Defines the string to utilize when trying to match PCIe device - tree nodes for the given platform. - CONFIG_SYS_FSL_ERRATUM_A004510 Enables a workaround for erratum A004510. If set, diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index a1704c211564..796a5477b0e6 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -206,6 +206,7 @@ config ARCH_B4420 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 @@ -236,6 +237,7 @@ config ARCH_B4860 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 @@ -273,6 +275,7 @@ config ARCH_BSC9132 select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB @@ -381,6 +384,7 @@ config ARCH_P1010 select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC_E500_USE_DEBUG_TLB @@ -462,6 +466,7 @@ config ARCH_P1023 select FSL_PCIE_RESET select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC @@ -549,6 +554,7 @@ config ARCH_P2041 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS1 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC @@ -578,6 +584,7 @@ config ARCH_P3041 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS1 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v22 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select FSL_ELBC @@ -611,6 +618,7 @@ config ARCH_P4080 select SYS_FSL_ERRATUM_I2C_A004447 select SYS_FSL_ERRATUM_NMG_CPU_A011 select SYS_FSL_ERRATUM_SRIO_A004034 + select SYS_FSL_PCIE_COMPAT_P4080_PCIE select SYS_P4080_ERRATUM_CPU22 select SYS_P4080_ERRATUM_PCIE_A003 select SYS_P4080_ERRATUM_SERDES8 @@ -647,6 +655,7 @@ config ARCH_P5040 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS1 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 @@ -677,6 +686,7 @@ config ARCH_T1024 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC @@ -704,6 +714,7 @@ config ARCH_T1040 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC @@ -730,6 +741,7 @@ config ARCH_T1042 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v24 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_5 select FSL_IFC @@ -758,6 +770,7 @@ config ARCH_T2080 select SYS_FSL_HAS_DDR3 select SYS_FSL_HAS_SEC select SYS_FSL_QORIQ_CHASSIS2 + select SYS_FSL_PCIE_COMPAT_QORIQ_PCIE_v30 select SYS_FSL_SEC_BE select SYS_FSL_SEC_COMPAT_4 select SYS_PPC64 @@ -790,6 +803,7 @@ config
[PATCH 5/8] Convert CONFIG_SYS_FSL_MAX_NUM_OF_SEC to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_FSL_MAX_NUM_OF_SEC
Signed-off-by: Tom Rini
---
arch/arm/include/asm/arch-fsl-layerscape/config.h | 11 ---
arch/arm/include/asm/arch-imx8/imx-regs.h | 1 -
arch/arm/include/asm/arch-imx8m/imx-regs.h| 1 -
arch/arm/include/asm/arch-ls102xa/config.h| 1 -
arch/arm/include/asm/arch-mx6/imx-regs.h | 1 -
arch/arm/include/asm/arch-mx7/imx-regs.h | 1 -
arch/arm/include/asm/arch-mx7ulp/imx-regs.h | 1 -
arch/powerpc/include/asm/config_mpc85xx.h | 5 -
drivers/crypto/fsl/Kconfig| 5 +
9 files changed, 5 insertions(+), 22 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 587d585412bb..1b108dde5355 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -94,8 +94,6 @@
#define EPU_EPCTR5 0x700060a14ULL
#define EPU_EPGCR 0x70006ULL
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
-
#elif defined(CONFIG_ARCH_LS1088A)
#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
@@ -129,7 +127,6 @@
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
/* DCFG - GUR */
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#define CONFIG_SYS_FSL_OCRAM_BASE 0x1800 /* initial RAM */
#define SYS_FSL_OCRAM_SPACE_SIZE 0x0020 /* 2M space */
#define CONFIG_SYS_FSL_OCRAM_SIZE 0x0002 /* Real size 128K */
@@ -165,8 +162,6 @@
/* DCFG - GUR */
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
-
#elif defined(CONFIG_ARCH_LS1028A)
#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
@@ -204,7 +199,6 @@
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
/* SEC */
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
/* DCFG - GUR */
@@ -258,12 +252,9 @@
#define GIC_ADDR_BIT 31
#define SCFG_GIC400_ALIGN 0x1570188
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
-
#elif defined(CONFIG_ARCH_LS1012A)
#define GICD_BASE 0x01401000
#define GICC_BASE 0x01402000
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
@@ -281,8 +272,6 @@
/* Generic Interrupt Controller Definitions */
#define GICD_BASE 0x0141
#define GICC_BASE 0x0142
-
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#else
#error SoC not defined
#endif
diff --git a/arch/arm/include/asm/arch-imx8/imx-regs.h
b/arch/arm/include/asm/arch-imx8/imx-regs.h
index 2d64b0604b92..3d32b7a02a18 100644
--- a/arch/arm/include/asm/arch-imx8/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8/imx-regs.h
@@ -48,6 +48,5 @@
#define USB_PHY0_BASE_ADDR 0x5b10
#define CONFIG_SYS_FSL_SEC_ADDR (0x3140)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#endif /* __ASM_ARCH_IMX8_REGS_H__ */
diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h
b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 6969cde26cc8..ff3b9ddd9f77 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -92,7 +92,6 @@
#define CONFIG_SYS_FSL_JR0_OFFSET (0x1000)
#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \
CONFIG_SYS_FSL_JR0_OFFSET)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#if !defined(__ASSEMBLY__)
#include
#include
diff --git a/arch/arm/include/asm/arch-ls102xa/config.h
b/arch/arm/include/asm/arch-ls102xa/config.h
index 1b2be8fcde79..0e32828b4f1e 100644
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -82,7 +82,6 @@
#define DCU_LAYER_MAX_NUM 16
#ifdef CONFIG_ARCH_LS1021A
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#else
#error SoC not defined
#endif
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index a8a5bf7a5754..56b3a58d478a 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -244,7 +244,6 @@
#define CONFIG_SYS_FSL_JR0_OFFSET 0x1000
#define CONFIG_SYS_FSL_JR0_ADDR (CAAM_BASE_ADDR + \
CONFIG_SYS_FSL_JR0_OFFSET)
-#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#define USB_PL301_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x)
#define USB_BASE_ADDR (AIPS2_OFF_BASE_ADDR + 0x4000)
diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h
b/arch/arm/include/asm/arch-mx7/imx-regs.h
index 5cab12f30d88..1e9d11b7a5c1 100644
--- a/arch/arm/include/asm/arch-mx7/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
@@ -221,7 +221,6 @@
#define
[PATCH 3/8] Remove CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR et al
This removes the following symbols:
CONFIG_SYS_FSL_DSPI_BE
CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
CONFIG_SYS_FSL_DSP_CCSR_DDR_ADDR
CONFIG_SYS_FSL_DSP_CCSR_DDR_OFFSET
CONFIG_SYS_FSL_DSP_DDR_ADDR
CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
CONFIG_SYS_FSL_ERRATUM_A008751
CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
CONFIG_SYS_FSL_ESDHC_NUM
CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX1_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX2_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX3_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX4_1G_OFFSET
CONFIG_SYS_FSL_FM1_RX5_1G_OFFSET
CONFIG_SYS_FSL_ISBC_VER
CONFIG_SYS_FSL_QSPI_LE
CONFIG_SYS_FSL_SCFG_IODSECR1_ADDR
CONFIG_SYS_FSL_SCFG_IODSECR1_OFFSET
CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET
CONFIG_SYS_FSL_SCFG_PIXCLK_ADDR
CONFIG_SYS_FSL_SRDS_NUM_PLLS
CONFIG_SYS_FSL_WDOG_BE
CONFIG_SYS_GP1DIR
CONFIG_SYS_GP1ODR
CONFIG_SYS_GP2DIR
CONFIG_SYS_GP2ODR
CONFIG_SYS_HALT_BEFOR_RAM_JUMP
CONFIG_SYS_HMI_BASE
FSL_QSPI_FLASH_NUM
FSL_QSPI_FLASH_SIZE
Signed-off-by: Tom Rini
---
README| 15 ---
arch/arm/include/asm/arch-fsl-layerscape/config.h | 5 -
.../include/asm/arch-fsl-layerscape/immap_lsch2.h | 6 --
arch/arm/include/asm/arch-ls102xa/config.h| 3 ---
arch/m68k/cpu/mcf52x2/start.S | 4
arch/m68k/cpu/mcf530x/start.S | 4
arch/powerpc/include/asm/config_mpc85xx.h | 10 --
arch/powerpc/include/asm/immap_85xx.h | 13 -
include/configs/P2041RDB.h| 1 -
include/configs/T208xQDS.h| 1 -
include/configs/T208xRDB.h| 1 -
include/configs/T4240RDB.h| 1 -
include/configs/bk4r1.h | 7 ---
include/configs/corenet_ds.h | 1 -
include/configs/eb_cpu5282.h | 2 --
include/configs/km/km-mpc8309.h | 5 -
include/configs/ls1021atsn.h | 4
include/configs/m53menlo.h| 1 -
include/configs/mx51evk.h | 1 -
include/configs/mx53cx9020.h | 1 -
include/configs/mx53loco.h| 1 -
include/configs/socrates.h| 1 -
include/configs/usbarmory.h | 1 -
include/configs/vf610twr.h| 1 -
24 files changed, 90 deletions(-)
diff --git a/README b/README
index ff0534137716..05c84141ebbe 100644
--- a/README
+++ b/README
@@ -330,21 +330,6 @@ The following options need to be configured:
This is the value to write into CCSR offset 0x18600
according to the A004510 workaround.
- CONFIG_SYS_FSL_DSP_DDR_ADDR
- This value denotes start offset of DDR memory which is
- connected exclusively to the DSP cores.
-
- CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
- This value denotes start offset of M2 memory
- which is directly connected to the DSP core.
-
- CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
- This value denotes start offset of M3 memory which is directly
- connected to the DSP core.
-
- CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
- This value denotes start offset of DSP CCSR space.
-
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
Single Source Clock is clocking mode present in some of FSL
SoC's.
In this mode, a single differential clock is used to supply
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h
b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 1791b978704d..587d585412bb 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -94,8 +94,6 @@
#define EPU_EPCTR5 0x700060a14ULL
#define EPU_EPGCR 0x70006ULL
-#define CONFIG_SYS_FSL_ERRATUM_A008751
-
#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
#elif defined(CONFIG_ARCH_LS1088A)
@@ -218,9 +216,6 @@
#define DCSR_DCFG_SBEESR2 0x20140534
#define DCSR_DCFG_MBEESR2 0x20140544
-#define CONFIG_SYS_FSL_WDOG_BE
-#define CONFIG_SYS_FSL_DSPI_BE
-
/* SoC related */
#ifdef CONFIG_ARCH_LS1043A
#define CONFIG_SYS_FSL_QMAN_V3
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
index f2dbcdc8164f..1fb1191a65ea 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch2.h
@@ -166,12 +166,6 @@ struct sys_info {
};
#define CONFIG_SYS_FSL_FM1_OFFSET 0xa0
-#define CONFIG_SYS_FSL_FM1_RX0_1G_OFFSET 0xa88000
-#define
[PATCH 4/8] Convert CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE to Kconfig
This converts the following to Kconfig: CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE Signed-off-by: Tom Rini --- configs/pico-imx6_defconfig | 1 + configs/warp7_bl33_defconfig | 1 + configs/warp7_defconfig | 1 + configs/warp_defconfig | 1 + drivers/mmc/Kconfig | 4 include/configs/pico-imx6.h | 1 - include/configs/warp.h | 1 - include/configs/warp7.h | 1 - 8 files changed, 8 insertions(+), 3 deletions(-) diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index 086b3ee3ab25..45f72d7e1e61 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -72,6 +72,7 @@ CONFIG_FASTBOOT_BUF_SIZE=0x1000 CONFIG_FASTBOOT_FLASH=y CONFIG_FASTBOOT_FLASH_MMC_DEV=0 CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_ATHEROS=y diff --git a/configs/warp7_bl33_defconfig b/configs/warp7_bl33_defconfig index a50a1c8bc770..d1c049925411 100644 --- a/configs/warp7_bl33_defconfig +++ b/configs/warp7_bl33_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PINCTRL=y diff --git a/configs/warp7_defconfig b/configs/warp7_defconfig index 40f9e502e92f..d0b4e747dd23 100644 --- a/configs/warp7_defconfig +++ b/configs/warp7_defconfig @@ -54,6 +54,7 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100 CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_MTD=y CONFIG_PINCTRL=y diff --git a/configs/warp_defconfig b/configs/warp_defconfig index 4c9f7051fefc..63f2f21a1e60 100644 --- a/configs/warp_defconfig +++ b/configs/warp_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_DFU_DATA_BUF_SIZE=0x100 CONFIG_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MXC=y CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE=y CONFIG_FSL_USDHC=y CONFIG_POWER_LEGACY=y CONFIG_POWER_I2C=y diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index c5e1a1b09817..0dcec8adcee8 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -864,6 +864,10 @@ config FSL_ESDHC_IMX This selects support for the i.MX eSDHC (Enhanced Secure Digital Host Controller) found on numerous Freescale/NXP SoCs. +config SYS_FSL_ESDHC_HAS_DDR_MODE + bool "i.MX eSDHC controller supports DDR mode" + depends on FSL_ESDHC_IMX + config FSL_USDHC bool "Freescale/NXP i.MX uSDHC controller support" depends on MX6 || MX7 ||ARCH_MX7ULP || IMX8 || IMX8M || IMX8ULP || IMX9 || IMXRT diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index df4dc4d496c6..dcbcd8d24495 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -22,7 +22,6 @@ /* MMC Configuration */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/warp.h b/include/configs/warp.h index 7cb9743fddb3..d2c4391935eb 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -18,7 +18,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE /* Watchdog */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index c00ca4a11172..7e9b25b07b20 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -15,7 +15,6 @@ /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ -- 2.25.1
[PATCH 1/8] Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig
This converts the following to Kconfig: CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS And we remove the entries from the README for a number of already converted items. Signed-off-by: Tom Rini --- README| 51 --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + configs/ls2080aqds_SECURE_BOOT_defconfig | 1 + configs/ls2080aqds_defconfig | 1 + configs/ls2080aqds_nand_defconfig | 1 + configs/ls2080aqds_qspi_defconfig | 1 + configs/ls2080aqds_sdcard_defconfig | 1 + configs/ls2080ardb_SECURE_BOOT_defconfig | 1 + configs/ls2080ardb_defconfig | 1 + configs/ls2080ardb_nand_defconfig | 1 + configs/ls2081ardb_defconfig | 1 + configs/ls2088aqds_tfa_defconfig | 1 + configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_qspi_defconfig | 1 + configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls2088ardb_tfa_defconfig | 1 + drivers/ddr/fsl/Kconfig | 7 +++ include/configs/kontron_sl28.h| 1 - include/configs/ls1028a_common.h | 1 - include/configs/ls1088a_common.h | 1 - include/configs/ls2080a_common.h | 3 -- include/configs/lx2160a_common.h | 1 - include/fsl_ddr.h | 5 -- 23 files changed, 22 insertions(+), 63 deletions(-) diff --git a/README b/README index 6b6f7227336a..ebfdced4a725 100644 --- a/README +++ b/README @@ -363,68 +363,17 @@ The following options need to be configured: CONFIG_SYS_FSL_DDR_ADDR Freescale DDR memory-mapped register base. - CONFIG_SYS_FSL_DDRC_GEN1 - Freescale DDR1 controller. - - CONFIG_SYS_FSL_DDRC_GEN2 - Freescale DDR2 controller. - - CONFIG_SYS_FSL_DDRC_GEN3 - Freescale DDR3 controller. - - CONFIG_SYS_FSL_DDRC_GEN4 - Freescale DDR4 controller. - - CONFIG_SYS_FSL_DDRC_ARM_GEN3 - Freescale DDR3 controller for ARM-based SoCs. - - CONFIG_SYS_FSL_DDR1 - Board config to use DDR1. It can be enabled for SoCs with - Freescale DDR1 or DDR2 controllers, depending on the board - implemetation. - - CONFIG_SYS_FSL_DDR2 - Board config to use DDR2. It can be enabled for SoCs with - Freescale DDR2 or DDR3 controllers, depending on the board - implementation. - - CONFIG_SYS_FSL_DDR3 - Board config to use DDR3. It can be enabled for SoCs with - Freescale DDR3 or DDR3L controllers. - - CONFIG_SYS_FSL_DDR3L - Board config to use DDR3L. It can be enabled for SoCs with - DDR3L controllers. - CONFIG_SYS_FSL_IFC_CLK_DIV Defines divider of platform clock(clock input to IFC controller). CONFIG_SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller). - CONFIG_SYS_FSL_DDR_BE - Defines the DDR controller register space as Big Endian - - CONFIG_SYS_FSL_DDR_LE - Defines the DDR controller register space as Little Endian - CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY Physical address from the view of DDR controllers. It is the same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But it could be different for ARM SoCs. - CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS - Number of controllers used as main memory. - - CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS - Number of controllers used for other than main memory. - - CONFIG_SYS_FSL_SEC_BE - Defines the SEC controller register space as Big Endian - - CONFIG_SYS_FSL_SEC_LE - Defines the SEC controller register space as Little Endian - - MIPS CPU options: CONFIG_XWAY_SWAP_BYTES diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 1f86070b8a2c..91a5863c97fb 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -193,6 +193,7 @@ config ARCH_LS2080A select FSL_IFC select FSL_LAYERSCAPE select FSL_LSCH3 + select SYS_FSL_OTHER_DDR_NUM_CTRLS select GICV3 select SKIP_LOWLEVEL_INIT select SYS_FSL_SRDS_1 diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index afb4e48e7e85..034f15760b43 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@
[PATCH 2/8] arc: Move SYS_LITTLE_ENDIAN / SYS_BIG_ENDIAN selection to Kconfig
We can determine which of these we need given CPU_BIG_ENDIAN being enabled or not, so move that logic to Kconfig from config.mk. Cc: Alexey Brodkin Cc: Eugeniy Paltsev Signed-off-by: Tom Rini --- This is not a size neutral patch as apparently before we were not fully populating SYS_BIG_ENDIAN to all of the codebase, so testing this on nsim_700be or nsim_hs38be would be a good idea. --- README | 4 arch/Kconfig | 2 ++ arch/arc/config.mk | 6 -- 3 files changed, 2 insertions(+), 10 deletions(-) diff --git a/README b/README index ebfdced4a725..ff0534137716 100644 --- a/README +++ b/README @@ -351,10 +351,6 @@ The following options need to be configured: clocks to the sysclock, ddrclock and usbclock. - Generic CPU options: - CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN - - Defines the endianess of the CPU. Implementation of those - values is arch specific. CONFIG_SYS_FSL_DDR Freescale DDR driver in use. This type of DDR controller is diff --git a/arch/Kconfig b/arch/Kconfig index 6495e780fec9..c4dc47dccb43 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -53,6 +53,8 @@ config ARC select SUPPORT_OF_CONTROL select SYS_CACHE_SHIFT_7 select TIMER + select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN + select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN config ARM bool "ARM architecture" diff --git a/arch/arc/config.mk b/arch/arc/config.mk index 118472b2d0ba..2b70945ac342 100644 --- a/arch/arc/config.mk +++ b/arch/arc/config.mk @@ -2,12 +2,6 @@ # # Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved. -ifndef CONFIG_CPU_BIG_ENDIAN -CONFIG_SYS_LITTLE_ENDIAN = 1 -else -CONFIG_SYS_BIG_ENDIAN = 1 -endif - ifdef CONFIG_SYS_LITTLE_ENDIAN KBUILD_LDFLAGS += -EL PLATFORM_CPPFLAGS += -mlittle-endian -- 2.25.1
Re: [PATCH v2 1/5] fs: fat: finding an empty FAT cluster
On Sun, Jul 31, 2022 at 01:58:33PM +0200, Heinrich Schuchardt wrote:
> Currently we have two functions with redundant coding to find an empty
> cluster:
>
> * find_empty_cluster() seeks from the beginning of the FAT table
> * determine_fatent() seeks after a given entry
>
> Both do not detect the end of the FAT table correctly and return an invalid
> cluster number if no empty entry if found.
>
> find_empty_cluster() is replaced by an invocation of determine_fatent().
>
> determine_fatent() is changed to seek in a second round from the beginning
> of the FAT table and to return an error code if no free entry is found.
> With this patch we will always find an empty cluster if it exists.
>
> Further patches are needed to handle the disk full error gracefully.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> no change
I made this comment before:
https://lists.denx.de/pipermail/u-boot/2022-July/488827.html
-Takahiro Akashi
> ---
> fs/fat/fat_write.c | 56 --
> 1 file changed, 29 insertions(+), 27 deletions(-)
>
> diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
> index 8ff2f6def0..a137e14f41 100644
> --- a/fs/fat/fat_write.c
> +++ b/fs/fat/fat_write.c
> @@ -536,22 +536,41 @@ static int set_fatent_value(fsdata *mydata, __u32
> entry, __u32 entry_value)
> return 0;
> }
>
> -/*
> - * Determine the next free cluster after 'entry' in a FAT (12/16/32) table
> - * and link it to 'entry'. EOC marker is not set on returned entry.
> +/**
> + * determine_fatent() - get next free FAT cluster
> + *
> + * The parameter @entry indicates the current cluster. To reduce
> fragementation
> + * the function first searches for a free cluster after the current cluster.
> + * If none is found, the search is repeated from the beginning of the FAT
> table.
> + *
> + * If @entry is set, the new FAT entry is appended to the given one.
> + * If @entry is zero, only the number of the first free cluster is returned.
> + *
> + * @entry: current entry
> + * Return: next free cluster or negative error
> */
> -static __u32 determine_fatent(fsdata *mydata, __u32 entry)
> +static int determine_fatent(fsdata *mydata, __u32 entry)
> {
> - __u32 next_fat, next_entry = entry + 1;
> + __u32 next_fat, next_entry = entry;
> + int second_round = 0;
>
> while (1) {
> + ++next_entry;
> + if (CHECK_CLUST(next_entry, mydata->fatsize)) {
> + if (!second_round) {
> + second_round = 1;
> + next_entry = 3;
> + } else {
> + return -ENOSPC;
> + }
> + }
> next_fat = get_fatent(mydata, next_entry);
> - if (next_fat == 0) {
> + if (!next_fat) {
> /* found free entry, link to entry */
> - set_fatent_value(mydata, entry, next_entry);
> + if (entry)
> + set_fatent_value(mydata, entry, next_entry);
> break;
> }
> - next_entry++;
> }
> debug("FAT%d: entry: %08x, entry_value: %04x\n",
> mydata->fatsize, entry, next_entry);
> @@ -794,23 +813,6 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t
> pos, __u8 *buffer,
> return 0;
> }
>
> -/*
> - * Find the first empty cluster
> - */
> -static int find_empty_cluster(fsdata *mydata)
> -{
> - __u32 fat_val, entry = 3;
> -
> - while (1) {
> - fat_val = get_fatent(mydata, entry);
> - if (fat_val == 0)
> - break;
> - entry++;
> - }
> -
> - return entry;
> -}
> -
> /**
> * new_dir_table() - allocate a cluster for additional directory entries
> *
> @@ -824,7 +826,7 @@ static int new_dir_table(fat_itr *itr)
> int dir_oldclust = itr->clust;
> unsigned int bytesperclust = mydata->clust_size * mydata->sect_size;
>
> - dir_newclust = find_empty_cluster(mydata);
> + dir_newclust = determine_fatent(mydata, 0);
>
> /*
>* Flush before updating FAT to ensure valid directory structure
> @@ -1066,7 +1068,7 @@ set_clusters:
>
> /* Assure that curclust is valid */
> if (!curclust) {
> - curclust = find_empty_cluster(mydata);
> + curclust = determine_fatent(mydata, 0);
> set_start_cluster(mydata, dentptr, curclust);
> } else {
> newclust = get_fatent(mydata, curclust);
> --
> 2.36.1
>
[GIT PULL] please pull fsl-qoirq-2022-7-29
Hi Tom, Please pull fsl-qoriq-2022-7-29 mpc85xx: support for generating QorIQ pre-PBL eSDHC boot sector p1_p2_rdb_pc: Remove I-flag from second L2 SRAM mapping p1_p2_rdb_pc: Fix parsing inverted bits from boot input data p1_p2_rdb_pc: Simplify SPL offset macros CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/12929 Thanks, Peng. The following changes since commit 87069c79e830b2ab909537946a1e1db0e5fe7d8c: Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mmc (2022-07-27 07:00:54 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq.git tags/fsl-qoriq-2022-7-29 for you to fetch changes up to 3982e761dcdec45db17207dee3851397fe23f45d: board: freescale: p1_p2_rdb_pc: Simplify SPL offset macros (2022-07-29 19:49:13 +0800) Pali Rohár (4): powerpc: mpc85xx: Add support for generating QorIQ pre-PBL eSDHC boot sector board: freescale: p1_p2_rdb_pc: Remove I-flag from second L2 SRAM mapping board: freescale: p1_p2_rdb_pc: Fix parsing inverted bits from boot input data board: freescale: p1_p2_rdb_pc: Simplify SPL offset macros arch/powerpc/cpu/mpc85xx/Kconfig| 53 + arch/powerpc/cpu/mpc85xx/start.S| 94 ++ arch/powerpc/cpu/mpc85xx/u-boot-spl.lds | 8 arch/powerpc/cpu/mpc85xx/u-boot.lds | 8 board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 6 -- board/freescale/p1_p2_rdb_pc/tlb.c | 4 ++-- include/configs/p1_p2_rdb_pc.h | 12 ++-- 7 files changed, 175 insertions(+), 10 deletions(-)
[PATCH 7/7] arm: dts: imx8mn-venice: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index 9fb3871452..aea48f2d79 100644
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -3,52 +3,7 @@
* Copyright 2022 Gateworks Corporation
*/
-/ {
- binman: binman {
- multiple-images;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <>;
- u-boot,dm-spl;
- };
-};
-
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
+#include "imx8mn-u-boot.dtsi"
{
u-boot,dm-spl;
@@ -106,147 +61,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-spl;
-};
-
_wdog {
u-boot,dm-spl;
};
-
- {
- u-boot-spl-ddr {
- align = <4>;
- align-size = <4>;
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
-
- u-boot-spl {
- align-end = <4>;
- filename = "u-boot-spl.bin";
- };
-
- ddr-1d-imem-fw {
- filename = "lpddr4_pmu_train_1d_imem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-1d-dmem-fw {
- filename = "lpddr4_pmu_train_1d_dmem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-2d-imem-fw {
- filename = "lpddr4_pmu_train_2d_imem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-2d-dmem-fw {
- filename = "lpddr4_pmu_train_2d_dmem.bin";
- align-end = <4>;
- type = "blob-ext";
- };
- };
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- fit,external-offset = ;
- fit,fdt-list = "of-list";
- #address-cells = <1>;
-
- images {
- uboot {
- arch = "arm64";
- compression = "none";
- description = "U-Boot (64-bit)";
- load = ;
- type = "standalone";
-
- uboot_blob {
- filename = "u-boot-nodtb.bin";
- type = "blob-ext";
- };
- };
-
- atf {
- arch = "arm64";
- compression = "none";
- description = "ARM Trusted Firmware";
- entry = <0x96>;
- load = <0x96>;
- type = "firmware";
-
- atf_blob {
- filename = "bl31.bin";
- type = "blob-ext";
- };
- };
-
- binman_fip: fip {
- arch = "arm64";
- compression = "none";
- description = "Trusted Firmware FIP";
- load = <0x4031>;
- type = "firmware";
- };
-
- @fdt-SEQ {
- compression = "none";
-
[PATCH 6/7] arm: dts: imx8mn-var-som-symphony: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
index ed1ab10ded..a20683155c 100644
--- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
@@ -3,22 +3,7 @@
* Copyright 2021 Collabora Ltd.
*/
-/ {
- binman: binman {
- multiple-images;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <>;
- u-boot,dm-spl;
- };
-};
-
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
+#include "imx8mn-u-boot.dtsi"
&{/soc@0/bus@3080/i2c@30a2/pmic@4b} {
u-boot,dm-spl;
@@ -28,27 +13,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
{
u-boot,dm-spl;
};
@@ -65,15 +29,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-spl;
-};
-
-_24m {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
_i2c1 {
u-boot,dm-spl;
};
@@ -113,144 +68,3 @@
{
u-boot,dm-spl;
};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot-spl-ddr {
- align = <4>;
- align-size = <4>;
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
-
- u-boot-spl {
- align-end = <4>;
- filename = "u-boot-spl.bin";
- };
-
- ddr-1d-imem-fw {
- filename = "ddr4_imem_1d.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-1d-dmem-fw {
- filename = "ddr4_dmem_1d.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-2d-imem-fw {
- filename = "ddr4_imem_2d.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-2d-dmem-fw {
- filename = "ddr4_dmem_2d.bin";
- align-end = <4>;
- type = "blob-ext";
- };
- };
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- fit,external-offset = ;
- fit,fdt-list = "of-list";
- #address-cells = <1>;
-
- images {
- uboot {
- arch = "arm64";
- compression = "none";
- description = "U-Boot (64-bit)";
- load = ;
- type = "standalone";
-
- uboot_blob {
- filename = "u-boot-nodtb.bin";
- type = "blob-ext";
- };
- };
-
- atf {
- arch = "arm64";
- compression = "none";
- description = "ARM Trusted Firmware";
- entry = <0x96>;
- load = <0x96>;
- type = "firmware";
-
- atf_blob {
- filename = "bl31.bin";
- type = "atf-bl31";
- };
- };
-
- binman_fip: fip {
- arch = "arm64";
- compression = "none";
- description = "Trusted Firmware FIP";
- load = <0x4031>;
- type = "firmware";
-
[PATCH 5/7] arm: dts: imx8mn-evk: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index c4b83d3f7e..6c6c949f43 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -24,111 +24,3 @@
_pmic {
u-boot,dm-spl;
};
-
- {
-u-boot-spl-ddr {
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
-
- u-boot-spl {
- align-end = <4>;
- };
-
- ddr-1d-imem-fw {
- filename = "lpddr4_pmu_train_1d_imem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-1d-dmem-fw {
- filename = "lpddr4_pmu_train_1d_dmem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-imem-fw {
- filename = "lpddr4_pmu_train_2d_imem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-dmem-fw {
- filename = "lpddr4_pmu_train_2d_dmem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
- };
-
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
- fit,external-offset = ;
-
- images {
- uboot {
- description = "U-Boot (64-bit)";
- type = "standalone";
- arch = "arm64";
- compression = "none";
- load = ;
-
- uboot_blob: blob-ext {
- filename = "u-boot-nodtb.bin";
- };
- };
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- load = <0x96>;
- entry = <0x96>;
-
- atf_blob: blob-ext {
- filename = "bl31.bin";
- };
- };
-
- fdt {
- description = "NAME";
- type = "flat_dt";
- compression = "none";
-
- uboot_fdt_blob: blob-ext {
- filename = "u-boot.dtb";
- };
- };
- };
-
- configurations {
- default = "conf";
-
- conf {
- description = "NAME";
- firmware = "uboot";
- loadables = "atf";
- fdt = "fdt";
- };
- };
- };
- };
-};
--
2.34.1
[PATCH 4/7] arm: dts: imx8mn-ddr4-evk: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 78773c198e..54f3ebe88b 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -3,58 +3,7 @@
* Copyright 2019, 2021 NXP
*/
-/ {
- binman: binman {
- multiple-images;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <>;
- u-boot,dm-spl;
- };
- firmware {
- optee {
- compatible = "linaro,optee-tz";
- method = "smc";
- };
- };
-};
-
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
+#include "imx8mn-u-boot.dtsi"
_reg_usdhc2_vmmc {
u-boot,dm-spl;
@@ -139,130 +88,3 @@
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
};
-
- {
- u-boot,dm-spl;
-};
-
- {
-u-boot-spl-ddr {
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
-
- u-boot-spl {
- align-end = <4>;
- };
-
- ddr-1d-imem-fw {
- filename = "ddr4_imem_1d_201810.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-1d-dmem-fw {
- filename = "ddr4_dmem_1d_201810.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-imem-fw {
- filename = "ddr4_imem_2d_201810.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-dmem-fw {
- filename = "ddr4_dmem_2d_201810.bin";
- type = "blob-ext";
- align-end = <4>;
- };
- };
-
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
- fit,external-offset = ;
-
- images {
- uboot {
- description = "U-Boot (64-bit)";
- type = "standalone";
- arch = "arm64";
- compression = "none";
- load = ;
-
- uboot_blob: blob-ext {
- filename = "u-boot-nodtb.bin";
- };
- };
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- load = <0x96>;
- entry = <0x96>;
-
- atf_blob: blob-ext {
- filename = "bl31.bin";
- };
- };
-
- fdt {
- description = "NAME";
- type = "flat_dt";
- compression = "none";
-
- uboot_fdt_blob: blob-ext {
- filename = "u-boot.dtb";
- };
- };
- };
-
- configurations {
- default = "conf";
-
-
[PATCH 3/7] arm: dts: imx8mn-bsh-smm-s2: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
index c4ae7ca4f3..3967e0bd15 100644
--- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
@@ -4,22 +4,7 @@
* Copyright 2021 BSH Hausgeraete GmbH
*/
-/ {
- binman: binman {
- multiple-images;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <>;
- u-boot,dm-spl;
- };
-};
-
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
+#include "imx8mn-u-boot.dtsi"
&{/soc@0/bus@3080/i2c@30a2/pmic@4b} {
u-boot,dm-spl;
@@ -29,27 +14,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
{
u-boot,dm-spl;
};
@@ -66,15 +30,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-spl;
-};
-
-_24m {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
_i2c1 {
u-boot,dm-spl;
};
@@ -98,128 +53,3 @@
{
u-boot,dm-spl;
};
-
- {
- u-boot-spl-ddr {
- align = <4>;
- align-size = <4>;
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
-
- u-boot-spl {
- align-end = <4>;
- filename = "u-boot-spl.bin";
- };
-
- ddr-1d-imem-fw {
- filename = "ddr3_imem_1d.bin";
- align-end = <4>;
- type = "blob-ext";
- };
-
- ddr-1d-dmem-fw {
- filename = "ddr3_dmem_1d.bin";
- align-end = <4>;
- type = "blob-ext";
- };
- };
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- fit,external-offset = ;
- fit,fdt-list = "of-list";
- #address-cells = <1>;
-
- images {
- uboot {
- arch = "arm64";
- compression = "none";
- description = "U-Boot (64-bit)";
- load = ;
- type = "standalone";
-
- uboot_blob {
- filename = "u-boot-nodtb.bin";
- type = "blob-ext";
- };
- };
-
- atf {
- arch = "arm64";
- compression = "none";
- description = "ARM Trusted Firmware";
- entry = <0x96>;
- load = <0x96>;
- type = "firmware";
-
- atf_blob {
- filename = "bl31.bin";
- type = "atf-bl31";
- };
- };
-
- binman_fip: fip {
- arch = "arm64";
- compression = "none";
- description = "Trusted Firmware FIP";
- load = <0x4031>;
- type = "firmware";
- };
-
- @fdt-SEQ {
- compression = "none";
- description = "NAME";
- type = "flat_dt";
-
- uboot_fdt_blob {
- filename = "u-boot.dtb";
-
[PATCH 2/7] arm: dts: imx8mn-beacon-kit: Consolidate with imx8mn-u-boot
Now that a unified imx8mn-u-boot is available, remove duplicated
code for generating flash.bin and other common imx8mn peripherals.
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index 0efa6862eb..3180d57239 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -1,24 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2020 Compass Electronics Group, LLC
+ * Copyright 2022 Logic PD, Inc. dba Beacon EmbeddedWorks
*/
-/ {
- binman: binman {
- multiple-images;
- };
-
- wdt-reboot {
- compatible = "wdt-reboot";
- wdt = <>;
- u-boot,dm-spl;
- };
-};
-
-&{/soc@0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
+#include "imx8mn-u-boot.dtsi"
&{/soc@0/bus@3080/i2c@30a2/pmic@4b} {
u-boot,dm-spl;
@@ -28,27 +13,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
-};
-
- {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
{
u-boot,dm-spl;
};
@@ -61,15 +25,6 @@
u-boot,dm-spl;
};
- {
- u-boot,dm-spl;
-};
-
-_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
_0 {
compatible = "ti,tca6416";
};
@@ -106,10 +61,6 @@
u-boot,off-on-delay-us = <2>;
};
- {
- u-boot,dm-spl;
-};
-
{
u-boot,dm-spl;
};
@@ -132,133 +83,6 @@
mmc-hs400-enhanced-strobe;
};
- {
- u-boot,dm-spl;
-};
-
_wdog {
u-boot,dm-spl;
};
-
- {
-u-boot-spl-ddr {
- filename = "u-boot-spl-ddr.bin";
- pad-byte = <0xff>;
- align-size = <4>;
- align = <4>;
-
- u-boot-spl {
- align-end = <4>;
- };
-
- ddr-1d-imem-fw {
- filename = "lpddr4_pmu_train_1d_imem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-1d-dmem-fw {
- filename = "lpddr4_pmu_train_1d_dmem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-imem-fw {
- filename = "lpddr4_pmu_train_2d_imem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
-
- ddr-2d-dmem-fw {
- filename = "lpddr4_pmu_train_2d_dmem.bin";
- type = "blob-ext";
- align-end = <4>;
- };
- };
-
-
- spl {
- filename = "spl.bin";
-
- mkimage {
- args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
-
- blob {
- filename = "u-boot-spl-ddr.bin";
- };
- };
- };
-
- itb {
- filename = "u-boot.itb";
-
- fit {
- description = "Configuration to load ATF before U-Boot";
- #address-cells = <1>;
- fit,external-offset = ;
-
- images {
- uboot {
- description = "U-Boot (64-bit)";
- type = "standalone";
- arch = "arm64";
- compression = "none";
- load = ;
-
- uboot_blob: blob-ext {
- filename = "u-boot-nodtb.bin";
- };
- };
-
- atf {
- description = "ARM Trusted Firmware";
- type = "firmware";
- arch = "arm64";
- compression = "none";
- load = <0x96>;
- entry = <0x96>;
-
- atf_blob: blob-ext {
- filename = "bl31.bin";
- };
- };
-
- fdt {
- description = "NAME";
- type = "flat_dt";
- compression = "none";
-
-
[PATCH 1/7] arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi
Multiple boards create duplicate entries in their respective
-u-boot.dtsi files which all basically do the same thing.
To consolidate these and make it easier to make improvements
going forward, consolidate them all into one place.
This file creates a flash.bin image using binman, and supports
LPDDR4, DDR4 and DDR3. Since individual boards use different
peripherals and different UART ports, those entries were kept
in their respective board files, but the spba1 node was addded
which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
Individual users will still need to include their respective
UART and pinctrl nodes for those UARTS.
This consolidated file also supports generating a flash.bin file
which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
enabled.
Signed-off-by: Adam Ford
---
Patches on top of [1]
[1] -
https://patchwork.ozlabs.org/project/uboot/patch/20220731171610.487086-1-aford...@gmail.com/
diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
new file mode 100644
index 00..327d4070fc
--- /dev/null
+++ b/arch/arm/dts/imx8mn-u-boot.dtsi
@@ -0,0 +1,248 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc dba Beacon EmbeddedWorks
+ */
+
+/ {
+ binman: binman {
+ multiple-images;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ u-boot,dm-spl;
+ };
+};
+
+&{/soc@0} {
+ u-boot,dm-pre-reloc;
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+_24m {
+ u-boot,dm-spl;
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+u-boot-spl-ddr {
+ filename = "u-boot-spl-ddr.bin";
+ pad-byte = <0xff>;
+ align-size = <4>;
+ align = <4>;
+
+ u-boot-spl {
+ align-end = <4>;
+ filename = "u-boot-spl.bin";
+ };
+
+ ddr-1d-imem-fw {
+#ifdef CONFIG_IMX8M_LPDDR4
+ filename = "lpddr4_pmu_train_1d_imem.bin";
+#elif CONFIG_IMX8M_DDR4
+ filename = "ddr4_imem_1d.bin";
+#else
+ filename = "ddr3_imem_1d.bin";
+#endif
+ type = "blob-ext";
+ align-end = <4>;
+ };
+
+ ddr-1d-dmem-fw {
+#ifdef CONFIG_IMX8M_LPDDR4
+ filename = "lpddr4_pmu_train_1d_dmem.bin";
+#elif CONFIG_IMX8M_DDR4
+ filename = "ddr4_dmem_1d.bin";
+#else
+ filename = "ddr3_dmem_1d.bin";
+#endif
+ type = "blob-ext";
+ align-end = <4>;
+ };
+
+ ddr-2d-imem-fw {
+#ifdef CONFIG_IMX8M_LPDDR4
+ filename = "lpddr4_pmu_train_2d_imem.bin";
+#elif CONFIG_IMX8M_DDR4
+ filename = "ddr4_imem_2d.bin";
+#endif
+ type = "blob-ext";
+ align-end = <4>;
+ };
+
+ ddr-2d-dmem-fw {
+#ifdef CONFIG_IMX8M_LPDDR4
+ filename = "lpddr4_pmu_train_2d_dmem.bin";
+#elif CONFIG_IMX8M_DDR4
+ filename = "ddr4_dmem_2d.bin";
+#endif
+ type = "blob-ext";
+ align-end = <4>;
+ };
+ };
+
+ spl {
+ filename = "spl.bin";
+
+ mkimage {
+ args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e
0x912000";
+
+ blob {
+ filename = "u-boot-spl-ddr.bin";
+ };
+ };
+ };
+
+ itb {
+ filename = "u-boot.itb";
+
+ fit {
+ description = "Configuration to load ATF before U-Boot";
+ fit,external-offset = ;
+ fit,fdt-list = "of-list";
+ #address-cells = <1>;
+
+ images {
+ uboot {
+ arch = "arm64";
+ compression = "none";
+ description = "U-Boot (64-bit)";
+ load = ;
+ type = "standalone";
+
+
[PATCH 0/7] arm: dts: Create common imx8mn-u-boot
Every imx8mn board has a bunch of similar entries on their respective board-u-boot.dtsi file to make the board bootable. Instead of maintaining multiple files with duplicate code, have them all point to a new, common file. This file includes the necessary nodes that were common to nearly all boards and added spba1 to help faciliate SPL_DM_SERIAL. This also adds support for CONFIG_FSPI_CONF_HEADER which can be used to generate flash.bin files for booting from FlexSPI. Adam Ford (7): arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi arm: dts: imx8mn-beacon-kit: Consolidate with imx8mn-u-boot arm: dts: imx8mn-bsh-smm-s2: Consolidate with imx8mn-u-boot arm: dts: imx8mn-ddr4-evk: Consolidate with imx8mn-u-boot arm: dts: imx8mn-evk: Consolidate with imx8mn-u-boot arm: dts: imx8mn-var-som-symphony: Consolidate with imx8mn-u-boot arm: dts: imx8mn-venice: Consolidate with imx8mn-u-boot arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi| 180 + .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 172 +--- arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 180 + arch/arm/dts/imx8mn-evk-u-boot.dtsi | 108 arch/arm/dts/imx8mn-u-boot.dtsi | 248 ++ .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 188 + arch/arm/dts/imx8mn-venice-u-boot.dtsi| 188 + 7 files changed, 254 insertions(+), 1010 deletions(-) create mode 100644 arch/arm/dts/imx8mn-u-boot.dtsi -- 2.34.1
Re: [PATCH 1/1] fs/erofs: silence erofs_probe()
On Sun, Jul 31, 2022 at 10:53:52PM +0200, Heinrich Schuchardt wrote:
>
>
> On 7/31/22 20:41, Simon Glass wrote:
> > On Sun, 31 Jul 2022 at 03:10, Heinrich Schuchardt
> > wrote:
> > >
> > > fs_set_blk_dev() probes all file-systems until it finds one that matches
> > > the volume. We do not expect any console output for non-matching
> > > file-systems.
> > >
> > > Convert error messages in erofs_read_superblock() to debug output.
> > >
> > > Fixes: 830613f8f5bb ("fs/erofs: add erofs filesystem support")
> > > Signed-off-by: Heinrich Schuchardt
> > > ---
> > > fs/erofs/super.c | 6 +++---
> > > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > Reviewed-by: Simon Glass
> >
> > >
> > > diff --git a/fs/erofs/super.c b/fs/erofs/super.c
> > > index 4cca322b9e..095754dc28 100644
> > > --- a/fs/erofs/super.c
> > > +++ b/fs/erofs/super.c
> > > @@ -65,14 +65,14 @@ int erofs_read_superblock(void)
> > >
> > > ret = erofs_blk_read(data, 0, 1);
> > > if (ret < 0) {
> > > - erofs_err("cannot read erofs superblock: %d", ret);
> > > + erofs_dbg("cannot read erofs superblock: %d", ret);
> > > return -EIO;
> > > }
> > > dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET);
> > >
> > > ret = -EINVAL;
> > > if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) {
> > > - erofs_err("cannot find valid erofs superblock");
> > > + erofs_dbg("cannot find valid erofs superblock");
> > > return ret;
> > > }
> >
> > > @@ -81,7 +81,7 @@ int erofs_read_superblock(void)
> > > blkszbits = dsb->blkszbits;
> > > /* 9(512 bytes) + LOG_SECTORS_PER_BLOCK == LOG_BLOCK_SIZE */
> > > if (blkszbits != LOG_BLOCK_SIZE) {
> > > - erofs_err("blksize %u isn't supported on this platform",
> > > + erofs_dbg("blksize %u isn't supported on this platform",
> > >1 << blkszbits);
> >
> > Does this message appear in normal scanning, or is it a genuine error?
>
> The erofs driver on Linux only supports LOG_BLOCK_SIZE == 12. So if we see
> this message we don't have a valid erofs file system.
>
> @linux-erofs:
>
> The Linux driver requires EROFS_BLKSIZ == PAGE_SIZE == 4096.
> The page size on arm64 can be 4 KiB, 16 KiB, or 64 KiB.
> The page size on amd64 can be 4 KiB, 2 MiB or 4 MiB.
> Requiring EROFS_BLKSIZ == PAGE_SIZE is obviously a restriction that should
> be lifted.
Yeah, EROFS doesn't support EROFS_BLKSIZ != PAGE_SIZE explicitly for now,
please help error out this message. Thanks!
Thanks,
Gao Xiang
>
> Best regards
>
> Heinrich
[PATCH v3] common: Drop display_options.h from common header
Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass --- Changes in v3: - Rebase to master Changes in v2: - Rebase to master arch/arm/cpu/armv7/s5p-common/cpu_info.c | 1 + arch/arm/mach-at91/arm926ejs/eflash.c| 1 + arch/arm/mach-imx/hab.c | 1 + arch/powerpc/cpu/mpc85xx/cpu.c | 1 + arch/powerpc/cpu/mpc85xx/cpu_init.c | 1 + arch/powerpc/cpu/mpc85xx/tlb.c | 1 + arch/powerpc/cpu/mpc8xx/cpu.c| 1 + arch/powerpc/cpu/mpc8xxx/law.c | 1 + arch/x86/cpu/broadwell/refcode.c | 1 + board/freescale/ls1028a/ls1028a.c| 1 + board/freescale/ls1088a/ls1088a.c| 1 + board/freescale/ls2080aqds/ls2080aqds.c | 1 + board/freescale/ls2080ardb/ls2080ardb.c | 1 + board/freescale/lx2160a/lx2160a.c| 1 + board/freescale/mpc8548cds/mpc8548cds.c | 1 + board/kosagi/novena/novena.c | 1 + board/traverse/ten64/ten64.c | 1 + boot/image-board.c | 1 + boot/image.c | 1 + cmd/acpi.c | 1 + cmd/axi.c| 1 + cmd/bcb.c| 1 + cmd/cpu.c| 1 + cmd/fpgad.c | 1 + cmd/io.c | 1 + cmd/mem.c| 1 + cmd/mmc.c| 1 + cmd/rtc.c| 1 + cmd/sf.c | 1 + cmd/version.c| 1 + common/bloblist.c| 1 + common/board_f.c | 1 + common/board_r.c | 1 + common/console.c | 1 + common/log.c | 1 + common/splash.c | 1 + drivers/core/acpi.c | 1 + drivers/cpu/bmips_cpu.c | 1 + drivers/ddr/fsl/main.c | 1 + drivers/mmc/gen_atmel_mci.c | 1 + drivers/mtd/onenand/onenand_uboot.c | 1 + drivers/mtd/spi/sf_dataflash.c | 1 + drivers/mtd/spi/spi-nor-core.c | 1 + drivers/net/xilinx_axi_emac.c| 1 + drivers/tpm/tpm_atmel_twi.c | 1 + drivers/tpm/tpm_tis_sandbox.c| 1 + fs/fs.c | 1 + include/common.h | 1 - include/display_options.h| 1 + lib/aes.c| 1 + lib/display_options.c| 1 + lib/fdtdec.c | 1 + net/nfs.c| 1 + net/tftp.c | 1 + 54 files changed, 53 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/s5p-common/cpu_info.c b/arch/arm/cpu/armv7/s5p-common/cpu_info.c index d910282e2b2..fb2920950d4 100644 --- a/arch/arm/cpu/armv7/s5p-common/cpu_info.c +++ b/arch/arm/cpu/armv7/s5p-common/cpu_info.c @@ -4,6 +4,7 @@ * Minkyu Kang */ #include +#include #include #include #include diff --git a/arch/arm/mach-at91/arm926ejs/eflash.c b/arch/arm/mach-at91/arm926ejs/eflash.c index 043f06a8271..aade13cc014 100644 --- a/arch/arm/mach-at91/arm926ejs/eflash.c +++ b/arch/arm/mach-at91/arm926ejs/eflash.c @@ -43,6 +43,7 @@ * do a read-modify-write for partially programmed pages */ #include +#include #include #include #include diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c index 55317abba23..0d1a7766be8 100644 --- a/arch/arm/mach-imx/hab.c +++ b/arch/arm/mach-imx/hab.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index ba9736ebef4..ffa8b602426 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 5fa4234fd09..92a7e608ceb 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index 4f6778c720d..ab616497fa0 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -7,6 +7,7 @@ */ #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c index 6d16ed084e6..892283436de 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu.c +++ b/arch/powerpc/cpu/mpc8xx/cpu.c @@ -18,6 +18,7 @@ #include #include +#include #include #include #include diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index 713ff172bce..198b5b10a52 100644 ---
Re: [PATCH 1/1] fs/erofs: silence erofs_probe()
On 7/31/22 20:41, Simon Glass wrote:
On Sun, 31 Jul 2022 at 03:10, Heinrich Schuchardt
wrote:
fs_set_blk_dev() probes all file-systems until it finds one that matches
the volume. We do not expect any console output for non-matching
file-systems.
Convert error messages in erofs_read_superblock() to debug output.
Fixes: 830613f8f5bb ("fs/erofs: add erofs filesystem support")
Signed-off-by: Heinrich Schuchardt
---
fs/erofs/super.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glass
diff --git a/fs/erofs/super.c b/fs/erofs/super.c
index 4cca322b9e..095754dc28 100644
--- a/fs/erofs/super.c
+++ b/fs/erofs/super.c
@@ -65,14 +65,14 @@ int erofs_read_superblock(void)
ret = erofs_blk_read(data, 0, 1);
if (ret < 0) {
- erofs_err("cannot read erofs superblock: %d", ret);
+ erofs_dbg("cannot read erofs superblock: %d", ret);
return -EIO;
}
dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET);
ret = -EINVAL;
if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) {
- erofs_err("cannot find valid erofs superblock");
+ erofs_dbg("cannot find valid erofs superblock");
return ret;
}
@@ -81,7 +81,7 @@ int erofs_read_superblock(void)
blkszbits = dsb->blkszbits;
/* 9(512 bytes) + LOG_SECTORS_PER_BLOCK == LOG_BLOCK_SIZE */
if (blkszbits != LOG_BLOCK_SIZE) {
- erofs_err("blksize %u isn't supported on this platform",
+ erofs_dbg("blksize %u isn't supported on this platform",
1 << blkszbits);
Does this message appear in normal scanning, or is it a genuine error?
The erofs driver on Linux only supports LOG_BLOCK_SIZE == 12. So if we
see this message we don't have a valid erofs file system.
@linux-erofs:
The Linux driver requires EROFS_BLKSIZ == PAGE_SIZE == 4096.
The page size on arm64 can be 4 KiB, 16 KiB, or 64 KiB.
The page size on amd64 can be 4 KiB, 2 MiB or 4 MiB.
Requiring EROFS_BLKSIZ == PAGE_SIZE is obviously a restriction that
should be lifted.
Best regards
Heinrich
return ret;
}
--
2.36.1
Re: [PATCH 1/1] Makefile: avoid false positive -Wmaybe-uninitialized
On Sun, 31 Jul 2022 at 02:06, Heinrich Schuchardt wrote: > > When compiling with -Og gcc reports false positive -Wmaybe-uninitialized as > reported in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394. > > Silence these warnings when building with CONFIG_CC_OPTIMIZE_FOR_DEBUG. > > Signed-off-by: Heinrich Schuchardt > --- > Makefile | 8 +++- > 1 file changed, 7 insertions(+), 1 deletion(-) Reviewed-by: Simon Glass
Re: [Bug] Buidling sandbox_vpl_defconfig is unstable
Hi, On Sun, 31 Jul 2022 at 06:29, Tom Rini wrote: > > On Sun, Jul 31, 2022 at 02:08:13PM +0200, Heinrich Schuchardt wrote: > > On 7/31/22 13:47, Tom Rini wrote: > > > On Sun, Jul 31, 2022 at 12:51:51PM +0200, Heinrich Schuchardt wrote: > > > > Hello Simon, > > > > > > > > Something is wrong with building sandbox_vpl_defconfig on Gitlab: > > > > > > > > The following build job failed: > > > > https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475640 > > > > > > > > The following build job succeeded: > > > > https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475673 > > > > > > It's not vpl related, it's just one of the odd gitlab specific races > > > that pops up from time to time. > > > > I can't imagine that building TPL leading to a race condition is Gitlab > > specific. There must be some fundamental issue in our build system. > > Never seen it outside of Gitlab, unlike the RTC race. Not sure what > trips it up but any of the sandbox builds can do it. I mean gitlab > specific here in that whatever conditions need to occur for the race to > happen, it's only seen under gitlab. Almost seems like some stale > object directory problem, which shouldn't happen. Yes I've not seen it either. We did have a problem of building with and without SPL_OF_PLATDATA_INST. With that symbol defined, we have struct udevice objects in the linker list, otherwise we don't. There was a race on this, if we built sandbox_spl and sandbox_noinst in the same build directory. The race happened because in one build the dt-plat.c file had devices and in another it was empty. I believe I fixed it by separating out the files, so that a separate dt-device.c file is used for the SPL_OF_PLATDATA_INST case. But perhaps my fix was not sufficient. I don't have any good ideas. It might be possible to track what was previously built in that thread's directory (.bm-work/00 etc.) and get some info that way. The missing symbols in the failed build are supposed to be in dt-uclass.c but perhaps that file is empty. See Makefile.spl around line 143 for this. Also see the multiple-file rule at 361 which is what actually calls dtoc to all generate the files at once. In fact if I try building sandbox_spl and then sandbox_noinst in the same output directory (with a 'make sandbox_noinst_defconfig' in between) then files in that build rule are not actually removed. Also I believe there is supposed to be a FORCE on that rule, not that it helps in this case. Looking at it again now, the 'rm' part is clearly not working since the 'all' variable isn't present. I'll send a patch for that in the hope that it might help. More broadly I wonder if we can test for this sort of thing. Is there a way to run make with infinite threads, so that absolutely everything happens in parallel, or in every combination of ordering? I suppose that would be infeasible. A 'make' expert could usefully spend some time digging into how things work at present. Obviously the breakages are very rare, but even one every month can be a pain. Regards, Simon 143: # Files we need to generate u-boot-spl-platdata_c := $(patsubst %.o,%.c,$(u-boot-spl-platdata)) # Files we won't generate and should remove u-boot-spl-old-platdata_c := $(patsubst %.o,%.c,$(u-boot-spl-old-platdata)) 361: # Don't use dts_dir here, since it forces running this expensive rule every time $(platdata-hdr) $(u-boot-spl-platdata_c) &: $(obj)/$(SPL_BIN).dtb @[ -d $(obj)/dts ] || mkdir -p $(obj)/dts @# Remove old files since which ones we generate depends on the setting @# of OF_PLATDATA_INST and this might change between builds. Leaving old @# ones around is confusing and it is possible that switching the @# setting again will use the old one instead of regenerating it. @rm -f $(u-boot-spl-all-platdata_c) $(u-boot-spl-all-platdata) $(call if_changed,dtoc)
Re: [RFCv1] doc: develop: Describe using CONFIG vs CFG for values
Hi Tom,
On Sun, 31 Jul 2022 at 05:46, Tom Rini wrote:
>
> On Sat, Jul 30, 2022 at 07:27:31PM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Thu, 28 Jul 2022 at 07:20, Tom Rini wrote:
> > >
> > > Document how and when to use CONFIG or CFG namespace for options. There
> > > are times where Kconfig is not a great fit for our needs, so we want to
> > > use the CFG namespace instead.
> > >
> > > Signed-off-by: Tom Rini
> > > ---
> > > RFCv1:
> > > - This is essentially my idea on how to better handle the problem of
> > > CONFIG values that just don't fit in Kconfig because it makes much
> > > more sense to define them statically for a given SoC or calculate them
> > > from other values, and so on. One example here would be to revert
> > > c7fad78ec0ee ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig") and
> > > re-name these to CFG_SYS_.. instead. Another big example here would be
> > > a global search-and-replace of 's/CONFIG_HPS_/CFG_HPS_/g' as that's
> > > all tool-generated. Not all CONFIG_SYS_ options would get this as
> > > boolean choices are well handled in Kconfig, and that may not be clear
> > > enough in what I wrote here?
> > > ---
> > > doc/develop/build_configuration.rst | 36 +
> > > doc/develop/index.rst | 1 +
> > > 2 files changed, 37 insertions(+)
> > > create mode 100644 doc/develop/build_configuration.rst
> >
> > I worry that CFG is confusing as it is too similar to CONFIG. Could we
> > have an entirely different prefix, e.g. SYS_? Also, why is a prefix
> > needed?
>
> We need a prefix here for consistency. I don't want to use just SYS_
> here as that's not always used for some of the values to be converted.
We could add it. I feel that people new to the code base will find it
confusing that we have CONFIG and CFG.
>
> > I have certainly seen things that are named CONFIG_... but are really
> > just SoC values. If they are addresses they should be in the
> > devicetree, but perhaps for early code in SPL that is not practical.
>
> I tried to elaborate on this more in the later revs of the document.
> But yes, we have some legacy code that's just not going to get a massive
> rewrite to use device tree more, but also has an active enough user base
> that we aren't just going to drop it. So long as it's not going to make
> life harder in the rest of the code base, this feels like a good enough
> compromise.
OK I see.
>
> > Re the revert, why? Are you worried that we are bloating Kconfig too
> > much with all these internal SoC settings?
>
> As Pali explained in other threads, there was a problem with the values
> in that commit, prior to conversion. But turning the series of ORs and
> shifts into a single magic value made it much harder to see and address.
> Yes, if it was written to pull from the device tree, it would have been
> easier to read and fix there. But no one is going to rewrite all of the
> core PowerPC code.
OK.
>
> > What is the policy on using such things for a board? I would very much
> > like to avoid board-specific #defines like this.
>
> The policy is better laid out in later revs of the document I think.
>
> > Is your hope to drop all remaining ad-hoc CONFIGs in this way?
>
> A large chunk, yes. I'm auditing CONFIG_SYS_* still, but there's
> probably going a few hundred symbols that just get resolved this way.
Reviewed-by: Simon Glass
Regards,
Simon
Re: [PATCH 1/1] fs/erofs: silence erofs_probe()
On Sun, 31 Jul 2022 at 03:10, Heinrich Schuchardt
wrote:
>
> fs_set_blk_dev() probes all file-systems until it finds one that matches
> the volume. We do not expect any console output for non-matching
> file-systems.
>
> Convert error messages in erofs_read_superblock() to debug output.
>
> Fixes: 830613f8f5bb ("fs/erofs: add erofs filesystem support")
> Signed-off-by: Heinrich Schuchardt
> ---
> fs/erofs/super.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Simon Glass
>
> diff --git a/fs/erofs/super.c b/fs/erofs/super.c
> index 4cca322b9e..095754dc28 100644
> --- a/fs/erofs/super.c
> +++ b/fs/erofs/super.c
> @@ -65,14 +65,14 @@ int erofs_read_superblock(void)
>
> ret = erofs_blk_read(data, 0, 1);
> if (ret < 0) {
> - erofs_err("cannot read erofs superblock: %d", ret);
> + erofs_dbg("cannot read erofs superblock: %d", ret);
> return -EIO;
> }
> dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET);
>
> ret = -EINVAL;
> if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) {
> - erofs_err("cannot find valid erofs superblock");
> + erofs_dbg("cannot find valid erofs superblock");
> return ret;
> }
>
> @@ -81,7 +81,7 @@ int erofs_read_superblock(void)
> blkszbits = dsb->blkszbits;
> /* 9(512 bytes) + LOG_SECTORS_PER_BLOCK == LOG_BLOCK_SIZE */
> if (blkszbits != LOG_BLOCK_SIZE) {
> - erofs_err("blksize %u isn't supported on this platform",
> + erofs_dbg("blksize %u isn't supported on this platform",
> 1 << blkszbits);
Does this message appear in normal scanning, or is it a genuine error?
> return ret;
> }
> --
> 2.36.1
>
Re: [PATCH] arm: dts: imx8mn-beacon-kit-u-boot: Fix broken booting
On Sun, Jul 31, 2022 at 12:36 PM Adam Ford wrote:
>
> On Sun, Jul 31, 2022 at 12:28 PM Michael Nazzareno Trimarchi
> wrote:
> >
> > Hi Adam
> >
> > On Sun, Jul 31, 2022 at 7:16 PM Adam Ford wrote:
> > >
> > > When the imx8mm.dtsi file was pulled in from Linux, the UARTs
> > > were moved into an spba sub-node which wasn't being included
> > > in the SPL device tree. This meant the references to the UART
> > > weren't being handled properly and when booting the system would
> > > constantly reboot. Fix this by adding the spba node to the spl
> > > device tree to restore normal booting.
> > >
> > > Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
> > > Signed-off-by: Adam Ford
> > >
> > > diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > > b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > > index 5f83952402..0efa6862eb 100644
> > > --- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > > +++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > > @@ -106,6 +106,10 @@
> > > u-boot,off-on-delay-us = <2>;
> > > };
> > >
> > > + {
> > > + u-boot,dm-spl;
> > > +};
> > > +
> > > {
> > > u-boot,dm-spl;
> > > };
> > > --
> > > 2.34.1
> > >
> >
> > Are you going to include it in imx8mn-u-boot.dtsi or do we need to
> > patch every single board?
>
> This is a temporary fix until I generate the common imx8mn-u-boot.dtsi
> which will include this.
I was hoping to finish this this afternoon, but a family emergency
came up. I'm going to try to finish it later tonight or tomorrow.
It's taking a bit longer because there are some boards with DDR4,
LPDDR4 and DDR3. I don't have most of them, but I plan to at least
generate a flash.bin file before posting it.
adam
>
> >
> > Michael
[PATCH] dm: rtc: Avoid a race in the rtc_reset test
Since resetting the RTC on sandbox causes it to read the base time from the system, we cannot rely on this being unchanged since it was last read. Allow for a one-second delay. Fixes: https://source.denx.de/u-boot/u-boot/-/issues/4 Reported-by: Bin Meng Reported-by: Tom Rini Suggested-by: Rasmus Villemoes Signed-off-by: Simon Glass --- test/dm/rtc.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/test/dm/rtc.c b/test/dm/rtc.c index c7f9f8f0ce7..403bf5c640a 100644 --- a/test/dm/rtc.c +++ b/test/dm/rtc.c @@ -245,16 +245,21 @@ static int dm_test_rtc_reset(struct unit_test_state *uts) ut_assertok(dm_rtc_get(dev, )); ut_assertok(i2c_emul_find(dev, )); - ut_assert(emul != NULL); + ut_assertnonnull(emul); old_base_time = sandbox_i2c_rtc_get_set_base_time(emul, 0); ut_asserteq(0, sandbox_i2c_rtc_get_set_base_time(emul, -1)); - /* Resetting the RTC should put he base time back to normal */ + /* +* Resetting the RTC should put the base time back to normal. Allow for +* a one-second adjustment in case the time flips over while this +* test process is pre-empted, since reset_time() in i2c_rtc_emul.c +* reads the time from the OS. +*/ ut_assertok(dm_rtc_reset(dev)); base_time = sandbox_i2c_rtc_get_set_base_time(emul, -1); - ut_asserteq(old_base_time, base_time); + ut_assert(base_time - old_base_time <= 1); return 0; } -- 2.37.1.455.g008518b4e5-goog
Re: [PATCH] arm: dts: imx8mn-beacon-kit-u-boot: Fix broken booting
On Sun, Jul 31, 2022 at 12:28 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi Adam
>
> On Sun, Jul 31, 2022 at 7:16 PM Adam Ford wrote:
> >
> > When the imx8mm.dtsi file was pulled in from Linux, the UARTs
> > were moved into an spba sub-node which wasn't being included
> > in the SPL device tree. This meant the references to the UART
> > weren't being handled properly and when booting the system would
> > constantly reboot. Fix this by adding the spba node to the spl
> > device tree to restore normal booting.
> >
> > Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
> > Signed-off-by: Adam Ford
> >
> > diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > index 5f83952402..0efa6862eb 100644
> > --- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > +++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> > @@ -106,6 +106,10 @@
> > u-boot,off-on-delay-us = <2>;
> > };
> >
> > + {
> > + u-boot,dm-spl;
> > +};
> > +
> > {
> > u-boot,dm-spl;
> > };
> > --
> > 2.34.1
> >
>
> Are you going to include it in imx8mn-u-boot.dtsi or do we need to
> patch every single board?
This is a temporary fix until I generate the common imx8mn-u-boot.dtsi
which will include this.
>
> Michael
Re: [PATCH] arm: dts: imx8mn-beacon-kit-u-boot: Fix broken booting
Hi Adam
On Sun, Jul 31, 2022 at 7:16 PM Adam Ford wrote:
>
> When the imx8mm.dtsi file was pulled in from Linux, the UARTs
> were moved into an spba sub-node which wasn't being included
> in the SPL device tree. This meant the references to the UART
> weren't being handled properly and when booting the system would
> constantly reboot. Fix this by adding the spba node to the spl
> device tree to restore normal booting.
>
> Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> index 5f83952402..0efa6862eb 100644
> --- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> +++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
> @@ -106,6 +106,10 @@
> u-boot,off-on-delay-us = <2>;
> };
>
> + {
> + u-boot,dm-spl;
> +};
> +
> {
> u-boot,dm-spl;
> };
> --
> 2.34.1
>
Are you going to include it in imx8mn-u-boot.dtsi or do we need to
patch every single board?
Michael
[PATCH] arm: dts: imx8mn-beacon-kit-u-boot: Fix broken booting
When the imx8mm.dtsi file was pulled in from Linux, the UARTs
were moved into an spba sub-node which wasn't being included
in the SPL device tree. This meant the references to the UART
weren't being handled properly and when booting the system would
constantly reboot. Fix this by adding the spba node to the spl
device tree to restore normal booting.
Fixes: 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
Signed-off-by: Adam Ford
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index 5f83952402..0efa6862eb 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -106,6 +106,10 @@
u-boot,off-on-delay-us = <2>;
};
+ {
+ u-boot,dm-spl;
+};
+
{
u-boot,dm-spl;
};
--
2.34.1
Re: [PATCH v1 21/26] imx8mn: synchronise device tree with linux
On Thu, Jul 21, 2022 at 8:44 AM Marcel Ziswiler wrote:
>
> From: Marcel Ziswiler
>
> Synchronise device tree with linux v5.19-rc5.
>
> Signed-off-by: Marcel Ziswiler
For what it's worth to others who may have been impacted, this patch
broke my nano booting because the imx8mn.dtsi now has the UART's as
subnodes to spba1 which wasn't being included in SPL's device tree.
It's likely to impact others who are booting with DM_SERIAL enabled on
their Nano.
To fix, I had to add a small line of code to my
imx8mn-beacon-kit-u-boot.dtsi file with the following:
{
u-boot,dm-spl;
};
With that, my board boots again. If anyone else is using DM_SERIAL
and having issues no longer starting, give that a try.
Since there are few nano boards with common -u-boot.dtsi entries, it
seems like it makes sense to have a common imx8mn-u-boot.dtsi file
like we do for Mini and Plus. I'll try to work on that as I have
time. (hopefully today)
adam
> ---
>
> arch/arm/dts/imx8mn-beacon-baseboard.dtsi | 4 +-
> arch/arm/dts/imx8mn-beacon-som.dtsi| 12 +-
> arch/arm/dts/imx8mn-bsh-smm-s2-common.dtsi | 113 -
> arch/arm/dts/imx8mn-bsh-smm-s2pro.dts | 90 +++
> arch/arm/dts/imx8mn-ddr4-evk.dts | 4 +
> arch/arm/dts/imx8mn-evk-u-boot.dtsi| 4 +-
> arch/arm/dts/imx8mn-evk.dts| 56 ++---
> arch/arm/dts/imx8mn-evk.dtsi | 121 +
> arch/arm/dts/imx8mn-var-som.dtsi | 15 +-
> arch/arm/dts/imx8mn-venice-gw7902.dts | 80 --
> arch/arm/dts/imx8mn.dtsi | 270 ++---
> board/freescale/imx8mn_evk/spl.c | 2 +-
> include/dt-bindings/clock/imx8mn-clock.h | 25 +-
> include/dt-bindings/power/imx8mn-power.h | 5 +
> include/dt-bindings/sound/tlv320aic31xx.h | 14 ++
> 15 files changed, 607 insertions(+), 208 deletions(-)
> create mode 100644 include/dt-bindings/sound/tlv320aic31xx.h
>
> --
> 2.35.1
>
Re: [PATCH 1/1] fs/erofs: silence erofs_probe()
在 2022/7/31 17:10, Heinrich Schuchardt 写道:
fs_set_blk_dev() probes all file-systems until it finds one that matches
the volume. We do not expect any console output for non-matching
file-systems.
Convert error messages in erofs_read_superblock() to debug output.
Fixes: 830613f8f5bb ("fs/erofs: add erofs filesystem support")
Signed-off-by: Heinrich Schuchardt
---
fs/erofs/super.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/fs/erofs/super.c b/fs/erofs/super.c
index 4cca322b9e..095754dc28 100644
--- a/fs/erofs/super.c
+++ b/fs/erofs/super.c
@@ -65,14 +65,14 @@ int erofs_read_superblock(void)
ret = erofs_blk_read(data, 0, 1);
if (ret < 0) {
- erofs_err("cannot read erofs superblock: %d", ret);
+ erofs_dbg("cannot read erofs superblock: %d", ret);
return -EIO;
}
dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET);
ret = -EINVAL;
if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) {
- erofs_err("cannot find valid erofs superblock");
+ erofs_dbg("cannot find valid erofs superblock");
return ret;
}
@@ -81,7 +81,7 @@ int erofs_read_superblock(void)
blkszbits = dsb->blkszbits;
/* 9(512 bytes) + LOG_SECTORS_PER_BLOCK == LOG_BLOCK_SIZE */
if (blkszbits != LOG_BLOCK_SIZE) {
- erofs_err("blksize %u isn't supported on this platform",
+ erofs_dbg("blksize %u isn't supported on this platform",
1 << blkszbits);
return ret;
}
Reviewed-by: Huang Jianan
Thanks,
Jianan
Re: [PATCH] Revert "fdtdec: drop needlessly convoluted CONFIG_PHANDLE_CHECK_SEQ"
On Sat, Jul 30, 2022 at 07:27:26PM -0600, Simon Glass wrote: > Hi Tom, > > On Tue, 5 Jul 2022 at 10:42, Simon Glass wrote: > > > > Hi Rasmus, > > > > On Tue, 5 Jul 2022 at 07:47, Rasmus Villemoes > > wrote: > > > > > > On 05/07/2022 11.47, Simon Glass wrote: > > > > Hi Tom, > > > > > > > > On Sun, 3 Jul 2022 at 06:43, Tom Rini wrote: > > > >> > > > >> On Sun, Jul 03, 2022 at 02:32:42AM -0600, Simon Glass wrote: > > > >>> Hi, > > > >>> > > > >>> On Sun, 3 Jul 2022 at 02:25, Simon Glass wrote: > > > > > > The fdt_path_offset() function is slow since it must scan the tree. > > > This substantial overhead now applies to all boards. > > > > > > The original code may not be ideal but it is fit for purpose and is > > > only > > > needed on a few boards. > > > > > > We should revert this in time for the release. > > > > > > This reverts commit 26f981f295d00351b6f0c69b5317b254b2361cc0. > > > > > > Signed-off-by: Simon Glass > > > --- > > > > > > configs/am65x_evm_a53_defconfig | 1 + > > > configs/evb-ast2600_defconfig| 1 + > > > configs/sama7g5ek_mmc1_defconfig | 1 + > > > configs/sama7g5ek_mmc_defconfig | 1 + > > > lib/Kconfig | 7 +++ > > > lib/fdtdec.c | 7 +-- > > > 6 files changed, 16 insertions(+), 2 deletions(-) > > > >>> > > > >>> Please also see the context here: > > > >>> > > > >>> https://patchwork.ozlabs.org/project/uboot/patch/2020142605.17034-1-a-govindr...@ti.com/ > > > >> > > > >> Previously when we've had issues of making the fast path slow, people > > > >> have posted measurements of before/after in order to demonstrate the > > > >> problem. Can we please get some logs of before/after and various > > > >> possible solutions? Thanks. > > > > > > > > Well this code is not needed at all for all but four boards. > > > > > > Three. One board seems to enable that config for no reason at all. And > > > it wouldn't work on that board, because the code was fragile and error > > > prone. See my detailed explanations in the original patch thread. > > > > > > It does a > > > > very expensive check of the DT and this can happen before relocation, > > > > or is SPL. I don't have a board to test with at present, but I expect > > > > it would cost 10s of milliseconds on AT91, for example. > > > > > > As I've said before, I prefer code which is correct out-of-the-box. I > > > also prefer simpler code with less ifdefs (yeah yeah, IS_ENABLED...) and > > > fewer configuration options to worry about. The three boards which have > > > aliases where the leaf nodes have duplicate names also happen to enable > > > some other unrelated magic config knob which happens to make the phandle > > > comparison work. So at the very least the code should stop comparing > > > phandles and just compare the node offsets; whether that check should be > > > > I don't disagree that this is a bit odd, but it is efficient. > > > > Another approach here would be to add better documentation since the > > option doesn't quite work as advertised. > > > > > under a config knob can be discussed (certainly that config knob should > > > not have PHANDLE in it), but, again, as I've said, it should be opt-out, > > > and preferably with a build-time check that verifies that no two aliases > > > point at same basenames. > > > > Opt-out means that everything pays the penalty, though. This is real > > corner case. Arguably the device tree should be updated to avoid this > > problem. > > > > > > > > _If_ that 10s of milliseconds figure is true, there are other things one > > > could do at build time. Say have some pass over the dtb which simply > > > adds "u-boot,seq" properties to the target nodes of aliases, using that > > > if present, or add a "back pointer" "u-boot,alias" property one could > > > compare to name. > > > > That's a nice idea. > > > > The point of my revert was to get something in for the release. I > > fully expect some sort of change to go in afterwards, but I don't > > think people were aware of the impact of your patch (see context link > > above). > > > > So I still favour a revert, for now. > > It looks like this didn't make it for the release. I'm not sure if > this is causing problems. > > Shall I pick it up for the upcoming release? I don't think we should pick up the revert as I don't think there's agreement that reverting this is the right step forward among all of the interested parties. One thing I want to know at this point is, was the problematic device tree accepted upstream, or did they also say that 2 nodes with the same name but different paths is wrong, don't do that? -- Tom signature.asc Description: PGP signature
Re: [Bug] Buidling sandbox_vpl_defconfig is unstable
On Sun, Jul 31, 2022 at 02:08:13PM +0200, Heinrich Schuchardt wrote: > On 7/31/22 13:47, Tom Rini wrote: > > On Sun, Jul 31, 2022 at 12:51:51PM +0200, Heinrich Schuchardt wrote: > > > Hello Simon, > > > > > > Something is wrong with building sandbox_vpl_defconfig on Gitlab: > > > > > > The following build job failed: > > > https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475640 > > > > > > The following build job succeeded: > > > https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475673 > > > > It's not vpl related, it's just one of the odd gitlab specific races > > that pops up from time to time. > > I can't imagine that building TPL leading to a race condition is Gitlab > specific. There must be some fundamental issue in our build system. Never seen it outside of Gitlab, unlike the RTC race. Not sure what trips it up but any of the sandbox builds can do it. I mean gitlab specific here in that whatever conditions need to occur for the race to happen, it's only seen under gitlab. Almost seems like some stale object directory problem, which shouldn't happen. -- Tom signature.asc Description: PGP signature
Re: [Bug] Buidling sandbox_vpl_defconfig is unstable
On 7/31/22 13:47, Tom Rini wrote: On Sun, Jul 31, 2022 at 12:51:51PM +0200, Heinrich Schuchardt wrote: Hello Simon, Something is wrong with building sandbox_vpl_defconfig on Gitlab: The following build job failed: https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475640 The following build job succeeded: https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475673 It's not vpl related, it's just one of the odd gitlab specific races that pops up from time to time. I can't imagine that building TPL leading to a race condition is Gitlab specific. There must be some fundamental issue in our build system. Best regards Heinrich
[PATCH v2 4/5] test: let fs_obj_mkdir() provide full file system type
The fixuture fs_obj_mkdir() up to now only supplies an abbreviated file
system type (e.g. fat). Provide the full file system type too (e.g. fat32).
Signed-off-by: Heinrich Schuchardt
---
v2:
new patch
---
test/py/tests/test_fs/conftest.py | 6 ++--
test/py/tests/test_fs/test_mkdir.py | 54 ++---
2 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/test/py/tests/test_fs/conftest.py
b/test/py/tests/test_fs/conftest.py
index b638284e07..efe8be06eb 100644
--- a/test/py/tests/test_fs/conftest.py
+++ b/test/py/tests/test_fs/conftest.py
@@ -489,8 +489,8 @@ def fs_obj_mkdir(request, u_boot_config):
u_boot_config: U-boot configuration.
Return:
-A fixture for mkdir test, i.e. a duplet of file system type and
-volume file name.
+A fixture for mkdir test, i.e. a triplet of file system type (e.g.
fat),
+volume file name and full file system type (e.g. fat32).
"""
fs_type = request.param
fs_img = ''
@@ -505,7 +505,7 @@ def fs_obj_mkdir(request, u_boot_config):
pytest.skip('Setup failed for filesystem: ' + fs_type)
return
else:
-yield [fs_ubtype, fs_img]
+yield [fs_ubtype, fs_img, fs_type]
call('rm -f %s' % fs_img, shell=True)
#
diff --git a/test/py/tests/test_fs/test_mkdir.py
b/test/py/tests/test_fs/test_mkdir.py
index fa9561ec35..f5cc308362 100644
--- a/test/py/tests/test_fs/test_mkdir.py
+++ b/test/py/tests/test_fs/test_mkdir.py
@@ -18,104 +18,104 @@ class TestMkdir(object):
"""
Test Case 1 - create a directory under a root
"""
-fs_type,fs_img = fs_obj_mkdir
+fs_ubtype, fs_img, _ = fs_obj_mkdir
with u_boot_console.log.section('Test Case 1 - mkdir'):
output = u_boot_console.run_command_list([
'host bind 0 %s' % fs_img,
-'%smkdir host 0:0 dir1' % fs_type,
-'%sls host 0:0 /' % fs_type])
+'%smkdir host 0:0 dir1' % fs_ubtype,
+'%sls host 0:0 /' % fs_ubtype])
assert('dir1/' in ''.join(output))
output = u_boot_console.run_command(
-'%sls host 0:0 dir1' % fs_type)
+'%sls host 0:0 dir1' % fs_ubtype)
assert('./' in output)
assert('../' in output)
-assert_fs_integrity(fs_type, fs_img)
+assert_fs_integrity(fs_ubtype, fs_img)
def test_mkdir2(self, u_boot_console, fs_obj_mkdir):
"""
Test Case 2 - create a directory under a sub-directory
"""
-fs_type,fs_img = fs_obj_mkdir
+fs_ubtype, fs_img, _ = fs_obj_mkdir
with u_boot_console.log.section('Test Case 2 - mkdir (sub-sub
directory)'):
output = u_boot_console.run_command_list([
'host bind 0 %s' % fs_img,
-'%smkdir host 0:0 dir1/dir2' % fs_type,
-'%sls host 0:0 dir1' % fs_type])
+'%smkdir host 0:0 dir1/dir2' % fs_ubtype,
+'%sls host 0:0 dir1' % fs_ubtype])
assert('dir2/' in ''.join(output))
output = u_boot_console.run_command(
-'%sls host 0:0 dir1/dir2' % fs_type)
+'%sls host 0:0 dir1/dir2' % fs_ubtype)
assert('./' in output)
assert('../' in output)
-assert_fs_integrity(fs_type, fs_img)
+assert_fs_integrity(fs_ubtype, fs_img)
def test_mkdir3(self, u_boot_console, fs_obj_mkdir):
"""
Test Case 3 - trying to create a directory with a non-existing
path should fail
"""
-fs_type,fs_img = fs_obj_mkdir
+fs_ubtype, fs_img, _ = fs_obj_mkdir
with u_boot_console.log.section('Test Case 3 - mkdir (non-existing
path)'):
output = u_boot_console.run_command_list([
'host bind 0 %s' % fs_img,
-'%smkdir host 0:0 none/dir3' % fs_type])
+'%smkdir host 0:0 none/dir3' % fs_ubtype])
assert('Unable to create a directory' in ''.join(output))
-assert_fs_integrity(fs_type, fs_img)
+assert_fs_integrity(fs_ubtype, fs_img)
def test_mkdir4(self, u_boot_console, fs_obj_mkdir):
"""
Test Case 4 - trying to create "." should fail
"""
-fs_type,fs_img = fs_obj_mkdir
+fs_ubtype, fs_img, _ = fs_obj_mkdir
with u_boot_console.log.section('Test Case 4 - mkdir (".")'):
output = u_boot_console.run_command_list([
'host bind 0 %s' % fs_img,
-'%smkdir host 0:0 .' % fs_type])
+'%smkdir host 0:0 .' % fs_ubtype])
assert('Unable to create a directory' in ''.join(output))
-assert_fs_integrity(fs_type, fs_img)
+assert_fs_integrity(fs_ubtype, fs_img)
def test_mkdir5(self, u_boot_console, fs_obj_mkdir):
"""
Test Case 5 -
[PATCH v2 5/5] test: add test for full FAT16 directory
Add a unit test checking that a full FAT16 directory leads to an error
when trying to add an additional entry.
Signed-off-by: Heinrich Schuchardt
---
v2:
new patch
---
test/py/tests/test_fs/test_mkdir.py | 17 +
1 file changed, 17 insertions(+)
diff --git a/test/py/tests/test_fs/test_mkdir.py
b/test/py/tests/test_fs/test_mkdir.py
index f5cc308362..e3a9e3ed27 100644
--- a/test/py/tests/test_fs/test_mkdir.py
+++ b/test/py/tests/test_fs/test_mkdir.py
@@ -119,3 +119,20 @@ class TestMkdir(object):
assert('0123456789abcdef00/' in output)
assert('0123456789abcdef13/' in output)
assert_fs_integrity(fs_ubtype, fs_img)
+
+def test_mkdir7(self, u_boot_console, fs_obj_mkdir):
+""" Test Case 7 - max out number of root directory entries
+"""
+_, _, fs_type = fs_obj_mkdir
+if fs_type != 'fat16':
+return
+with u_boot_console.log.section('Test Case 7 - mkdir (max out)'):
+for i in range(0, 512):
+output = u_boot_console.run_command(
+f'fatmkdir host 0:0
/U-Boot-mkdir-max-out-test-directory-{i:05d}')
+if 'Can\'t create directory entry' in output:
+break
+# A directory was created
+assert i > 0
+# The FAT16 root directory has only 512 directory entries
+assert i <= 512 / 5
--
2.36.1
[PATCH v2 3/5] fs: fat: carve out fat_create_dir_entry()
fat_mkdir() and file_fat_write_at() use identical code to create a new
directory entry. Carve out a new function fat_create_dir_entry() to avoid
this code duplication.
Signed-off-by: Heinrich Schuchardt
---
v2:
handle errors returned by fat_create_dir_entry()
---
fs/fat/fat_write.c | 93 ++
1 file changed, 44 insertions(+), 49 deletions(-)
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 57522f96a8..ccdacd22c2 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -1314,6 +1314,43 @@ static int normalize_longname(char *l_filename, const
char *filename)
return 0;
}
+/**
+ * fat_create_dir_entry() - create directory entry
+ *
+ * @itr: directory iterator
+ * @basename: name of file or directory to be created
+ * @size: file size
+ * @attr: file or directory attributes
+ * Return: 0 for success, -EIO on error
+ */
+static int fat_create_dir_entry(fat_itr *itr, const char *basename,
+ loff_t size, u8 attr)
+{
+ /* Create a new file */
+ char shortname[SHORT_NAME_SIZE];
+ int ndent;
+ int ret;
+
+ /* Check if long name is needed */
+ ndent = set_name(itr, basename, shortname);
+ if (ndent < 0)
+ return ndent;
+ ret = fat_find_empty_dentries(itr, ndent);
+ if (ret)
+ return ret;
+ if (ndent > 1) {
+ /* Set long name entries */
+ ret = fill_dir_slot(itr, basename, shortname);
+ if (ret)
+ return ret;
+ }
+
+ /* Set short name entry */
+ fill_dentry(itr->fsdata, itr->dent, shortname, 0, size, attr);
+
+ return 0;
+}
+
int file_fat_write_at(const char *filename, loff_t pos, void *buffer,
loff_t size, loff_t *actwrite)
{
@@ -1383,8 +1420,6 @@ int file_fat_write_at(const char *filename, loff_t pos,
void *buffer,
retdent->size = cpu_to_le32(pos + size);
} else {
/* Create a new file */
- char shortname[SHORT_NAME_SIZE];
- int ndent;
if (pos) {
/* No hole allowed */
@@ -1392,26 +1427,12 @@ int file_fat_write_at(const char *filename, loff_t pos,
void *buffer,
goto exit;
}
- /* Check if long name is needed */
- ndent = set_name(itr, basename, shortname);
- if (ndent < 0) {
- ret = ndent;
- goto exit;
- }
- ret = fat_find_empty_dentries(itr, ndent);
- if (ret)
+ ret = fat_create_dir_entry(itr, basename, size, ATTR_ARCH);
+ if (ret < 0) {
+ log_err("Can't create directory entry\n");
goto exit;
- if (ndent > 1) {
- /* Set long name entries */
- ret = fill_dir_slot(itr, basename, shortname);
- if (ret)
- goto exit;
}
- /* Set short name entry */
- fill_dentry(itr->fsdata, itr->dent, shortname, 0, size,
- ATTR_ARCH);
-
retdent = itr->dent;
}
@@ -1693,38 +1714,12 @@ int fat_mkdir(const char *dirname)
ret = -EEXIST;
goto exit;
} else {
- char shortname[SHORT_NAME_SIZE];
- int ndent;
-
- if (itr->is_root) {
- /* root dir cannot have "." or ".." */
- if (!strcmp(l_dirname, ".") ||
- !strcmp(l_dirname, "..")) {
- ret = -EINVAL;
- goto exit;
- }
- }
-
- /* Check if long name is needed */
- ndent = set_name(itr, basename, shortname);
- if (ndent < 0) {
- ret = ndent;
- goto exit;
- }
- ret = fat_find_empty_dentries(itr, ndent);
- if (ret)
+ ret = fat_create_dir_entry(itr, basename, 0,
+ ATTR_DIR | ATTR_ARCH);
+ if (ret < 0) {
+ log_err("Can't create directory entry\n");
goto exit;
- if (ndent > 1) {
- /* Set long name entries */
- ret = fill_dir_slot(itr, basename, shortname);
- if (ret)
- goto exit;
}
-
- /* Set attribute as archive for regular file */
- fill_dentry(itr->fsdata, itr->dent, shortname, 0, 0,
- ATTR_DIR | ATTR_ARCH);
-
retdent = itr->dent;
}
--
2.36.1
[PATCH v2 2/5] fs: fat: determine_fatent() error handling
Handle disk full errors.
Signed-off-by: Heinrich Schuchardt
---
v2:
no change
---
fs/fat/fat_write.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index a137e14f41..57522f96a8 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -827,6 +827,8 @@ static int new_dir_table(fat_itr *itr)
unsigned int bytesperclust = mydata->clust_size * mydata->sect_size;
dir_newclust = determine_fatent(mydata, 0);
+ if (dir_newclust < 0)
+ return dir_newclust;
/*
* Flush before updating FAT to ensure valid directory structure
@@ -927,8 +929,8 @@ set_contents(fsdata *mydata, dir_entry *dentptr, loff_t
pos, __u8 *buffer,
loff_t maxsize, loff_t *gotsize)
{
unsigned int bytesperclust = mydata->clust_size * mydata->sect_size;
- __u32 curclust = START(dentptr);
- __u32 endclust = 0, newclust = 0;
+ int curclust = START(dentptr);
+ int endclust = 0, newclust = 0;
u64 cur_pos, filesize;
loff_t offset, actsize, wsize;
@@ -1069,12 +1071,16 @@ set_clusters:
/* Assure that curclust is valid */
if (!curclust) {
curclust = determine_fatent(mydata, 0);
+ if (curclust < 0)
+ return -1;
set_start_cluster(mydata, dentptr, curclust);
} else {
newclust = get_fatent(mydata, curclust);
if (IS_LAST_CLUST(newclust, mydata->fatsize)) {
newclust = determine_fatent(mydata, curclust);
+ if (newclust < 0)
+ return -1;
set_fatent_value(mydata, curclust, newclust);
curclust = newclust;
} else {
@@ -1095,6 +1101,8 @@ set_clusters:
/* search for consecutive clusters */
while (actsize < filesize) {
newclust = determine_fatent(mydata, endclust);
+ if (newclust < 0)
+ return -1;
if ((newclust - 1) != endclust)
/* write to */
--
2.36.1
[PATCH v2 1/5] fs: fat: finding an empty FAT cluster
Currently we have two functions with redundant coding to find an empty
cluster:
* find_empty_cluster() seeks from the beginning of the FAT table
* determine_fatent() seeks after a given entry
Both do not detect the end of the FAT table correctly and return an invalid
cluster number if no empty entry if found.
find_empty_cluster() is replaced by an invocation of determine_fatent().
determine_fatent() is changed to seek in a second round from the beginning
of the FAT table and to return an error code if no free entry is found.
With this patch we will always find an empty cluster if it exists.
Further patches are needed to handle the disk full error gracefully.
Signed-off-by: Heinrich Schuchardt
---
v2:
no change
---
fs/fat/fat_write.c | 56 --
1 file changed, 29 insertions(+), 27 deletions(-)
diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
index 8ff2f6def0..a137e14f41 100644
--- a/fs/fat/fat_write.c
+++ b/fs/fat/fat_write.c
@@ -536,22 +536,41 @@ static int set_fatent_value(fsdata *mydata, __u32 entry,
__u32 entry_value)
return 0;
}
-/*
- * Determine the next free cluster after 'entry' in a FAT (12/16/32) table
- * and link it to 'entry'. EOC marker is not set on returned entry.
+/**
+ * determine_fatent() - get next free FAT cluster
+ *
+ * The parameter @entry indicates the current cluster. To reduce fragementation
+ * the function first searches for a free cluster after the current cluster.
+ * If none is found, the search is repeated from the beginning of the FAT
table.
+ *
+ * If @entry is set, the new FAT entry is appended to the given one.
+ * If @entry is zero, only the number of the first free cluster is returned.
+ *
+ * @entry: current entry
+ * Return: next free cluster or negative error
*/
-static __u32 determine_fatent(fsdata *mydata, __u32 entry)
+static int determine_fatent(fsdata *mydata, __u32 entry)
{
- __u32 next_fat, next_entry = entry + 1;
+ __u32 next_fat, next_entry = entry;
+ int second_round = 0;
while (1) {
+ ++next_entry;
+ if (CHECK_CLUST(next_entry, mydata->fatsize)) {
+ if (!second_round) {
+ second_round = 1;
+ next_entry = 3;
+ } else {
+ return -ENOSPC;
+ }
+ }
next_fat = get_fatent(mydata, next_entry);
- if (next_fat == 0) {
+ if (!next_fat) {
/* found free entry, link to entry */
- set_fatent_value(mydata, entry, next_entry);
+ if (entry)
+ set_fatent_value(mydata, entry, next_entry);
break;
}
- next_entry++;
}
debug("FAT%d: entry: %08x, entry_value: %04x\n",
mydata->fatsize, entry, next_entry);
@@ -794,23 +813,6 @@ get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t
pos, __u8 *buffer,
return 0;
}
-/*
- * Find the first empty cluster
- */
-static int find_empty_cluster(fsdata *mydata)
-{
- __u32 fat_val, entry = 3;
-
- while (1) {
- fat_val = get_fatent(mydata, entry);
- if (fat_val == 0)
- break;
- entry++;
- }
-
- return entry;
-}
-
/**
* new_dir_table() - allocate a cluster for additional directory entries
*
@@ -824,7 +826,7 @@ static int new_dir_table(fat_itr *itr)
int dir_oldclust = itr->clust;
unsigned int bytesperclust = mydata->clust_size * mydata->sect_size;
- dir_newclust = find_empty_cluster(mydata);
+ dir_newclust = determine_fatent(mydata, 0);
/*
* Flush before updating FAT to ensure valid directory structure
@@ -1066,7 +1068,7 @@ set_clusters:
/* Assure that curclust is valid */
if (!curclust) {
- curclust = find_empty_cluster(mydata);
+ curclust = determine_fatent(mydata, 0);
set_start_cluster(mydata, dentptr, curclust);
} else {
newclust = get_fatent(mydata, curclust);
--
2.36.1
[PATCH v2 0/5] fs/fat: fix handling of full disk
Currently we have two functions with redundant coding to find an empty cluster: * find_empty_cluster() seeks from the beginning of the FAT table * determine_fatent() seeks after a given entry Both do not detect the end of the FAT table correctly and return an invalid cluster number if no empty entry if found. Correctly determine empty FAT entries and full disk correctly. Carve out a function for creating directory entries to avoid code duplication. Provide a unit test checking that a full FAT16 root directory is recognized. For other file systems testing is too time consuming. FAT32 allows 65536 entries per directory. v2: Handle errors returned by fat_create_dir_entry() Add unit test Heinrich Schuchardt (5): fs: fat: finding an empty FAT cluster fs: fat: determine_fatent() error handling fs: fat: carve out fat_create_dir_entry() test: let fs_obj_mkdir() provide full file system type test: add test for full FAT16 directory fs/fat/fat_write.c | 161 ++-- test/py/tests/test_fs/conftest.py | 6 +- test/py/tests/test_fs/test_mkdir.py | 72 - 3 files changed, 131 insertions(+), 108 deletions(-) -- 2.36.1
Re: [Bug] Buidling sandbox_vpl_defconfig is unstable
On Sun, Jul 31, 2022 at 12:51:51PM +0200, Heinrich Schuchardt wrote: > Hello Simon, > > Something is wrong with building sandbox_vpl_defconfig on Gitlab: > > The following build job failed: > https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475640 > > The following build job succeeded: > https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475673 It's not vpl related, it's just one of the odd gitlab specific races that pops up from time to time. -- Tom signature.asc Description: PGP signature
Re: [RFCv1] doc: develop: Describe using CONFIG vs CFG for values
On Sat, Jul 30, 2022 at 07:27:31PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Thu, 28 Jul 2022 at 07:20, Tom Rini wrote:
> >
> > Document how and when to use CONFIG or CFG namespace for options. There
> > are times where Kconfig is not a great fit for our needs, so we want to
> > use the CFG namespace instead.
> >
> > Signed-off-by: Tom Rini
> > ---
> > RFCv1:
> > - This is essentially my idea on how to better handle the problem of
> > CONFIG values that just don't fit in Kconfig because it makes much
> > more sense to define them statically for a given SoC or calculate them
> > from other values, and so on. One example here would be to revert
> > c7fad78ec0ee ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig") and
> > re-name these to CFG_SYS_.. instead. Another big example here would be
> > a global search-and-replace of 's/CONFIG_HPS_/CFG_HPS_/g' as that's
> > all tool-generated. Not all CONFIG_SYS_ options would get this as
> > boolean choices are well handled in Kconfig, and that may not be clear
> > enough in what I wrote here?
> > ---
> > doc/develop/build_configuration.rst | 36 +
> > doc/develop/index.rst | 1 +
> > 2 files changed, 37 insertions(+)
> > create mode 100644 doc/develop/build_configuration.rst
>
> I worry that CFG is confusing as it is too similar to CONFIG. Could we
> have an entirely different prefix, e.g. SYS_? Also, why is a prefix
> needed?
We need a prefix here for consistency. I don't want to use just SYS_
here as that's not always used for some of the values to be converted.
> I have certainly seen things that are named CONFIG_... but are really
> just SoC values. If they are addresses they should be in the
> devicetree, but perhaps for early code in SPL that is not practical.
I tried to elaborate on this more in the later revs of the document.
But yes, we have some legacy code that's just not going to get a massive
rewrite to use device tree more, but also has an active enough user base
that we aren't just going to drop it. So long as it's not going to make
life harder in the rest of the code base, this feels like a good enough
compromise.
> Re the revert, why? Are you worried that we are bloating Kconfig too
> much with all these internal SoC settings?
As Pali explained in other threads, there was a problem with the values
in that commit, prior to conversion. But turning the series of ORs and
shifts into a single magic value made it much harder to see and address.
Yes, if it was written to pull from the device tree, it would have been
easier to read and fix there. But no one is going to rewrite all of the
core PowerPC code.
> What is the policy on using such things for a board? I would very much
> like to avoid board-specific #defines like this.
The policy is better laid out in later revs of the document I think.
> Is your hope to drop all remaining ad-hoc CONFIGs in this way?
A large chunk, yes. I'm auditing CONFIG_SYS_* still, but there's
probably going a few hundred symbols that just get resolved this way.
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] nvme: Do a clean NVMe shutdown
> From: Hector Martin
> Date: Sun, 31 Jul 2022 15:31:31 +0900
>
> The brute-force controller disable method can end up racing controller
> initilization and causing a crash when we shut down Apple ANS2 NVMe
> controllers. Do a proper controlled shutdown, which does block until
> things are quiesced properly. This is nicer in general for all
> controllers.
>
> Signed-off-by: Hector Martin
Tested-by: Mark Kettenis [firefly-rk3399]
> ---
> drivers/nvme/nvme.c | 25 -
> 1 file changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
> index a305305885ec..5fd2fb9ed6a6 100644
> --- a/drivers/nvme/nvme.c
> +++ b/drivers/nvme/nvme.c
> @@ -27,9 +27,8 @@
> #define IO_TIMEOUT 30
> #define MAX_PRP_POOL 512
>
> -static int nvme_wait_ready(struct nvme_dev *dev, bool enabled)
> +static int nvme_wait_csts(struct nvme_dev *dev, u32 mask, u32 val)
> {
> - u32 bit = enabled ? NVME_CSTS_RDY : 0;
> int timeout;
> ulong start;
>
> @@ -38,7 +37,7 @@ static int nvme_wait_ready(struct nvme_dev *dev, bool
> enabled)
>
> start = get_timer(0);
> while (get_timer(start) < timeout) {
> - if ((readl(>bar->csts) & NVME_CSTS_RDY) == bit)
> + if ((readl(>bar->csts) & mask) == val)
> return 0;
> }
>
> @@ -295,7 +294,7 @@ static int nvme_enable_ctrl(struct nvme_dev *dev)
> dev->ctrl_config |= NVME_CC_ENABLE;
> writel(dev->ctrl_config, >bar->cc);
>
> - return nvme_wait_ready(dev, true);
> + return nvme_wait_csts(dev, NVME_CSTS_RDY, NVME_CSTS_RDY);
> }
>
> static int nvme_disable_ctrl(struct nvme_dev *dev)
> @@ -304,7 +303,16 @@ static int nvme_disable_ctrl(struct nvme_dev *dev)
> dev->ctrl_config &= ~NVME_CC_ENABLE;
> writel(dev->ctrl_config, >bar->cc);
>
> - return nvme_wait_ready(dev, false);
> + return nvme_wait_csts(dev, NVME_CSTS_RDY, 0);
> +}
> +
> +static int nvme_shutdown_ctrl(struct nvme_dev *dev)
> +{
> + dev->ctrl_config &= ~NVME_CC_SHN_MASK;
> + dev->ctrl_config |= NVME_CC_SHN_NORMAL;
> + writel(dev->ctrl_config, >bar->cc);
> +
> + return nvme_wait_csts(dev, NVME_CSTS_SHST_MASK, NVME_CSTS_SHST_CMPLT);
> }
>
> static void nvme_free_queue(struct nvme_queue *nvmeq)
> @@ -904,6 +912,13 @@ free_nvme:
> int nvme_shutdown(struct udevice *udev)
> {
> struct nvme_dev *ndev = dev_get_priv(udev);
> + int ret;
> +
> + ret = nvme_shutdown_ctrl(ndev);
> + if (ret < 0) {
> + printf("Error: %s: Shutdown timed out!\n", udev->name);
> + return ret;
> + }
>
> return nvme_disable_ctrl(ndev);
> }
> --
> 2.35.1
>
>
[Bug] Buidling sandbox_vpl_defconfig is unstable
Hello Simon, Something is wrong with building sandbox_vpl_defconfig on Gitlab: The following build job failed: https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475640 The following build job succeeded: https://source.denx.de/u-boot/custodians/u-boot-efi/-/jobs/475673 Best regards Heinrich 000 /1 -1 (starting) sandbox: + sandbox_vpl +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o: in function `spl_common_init.constprop.0': +drivers/core/root.c:178: undefined reference to `uclass_head' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_emul0+0x40): undefined reference to `_u_boot_list_2_uclass_2_i2c_emul' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_emul0+0x58): undefined reference to `_u_boot_list_2_uclass_2_i2c_emul' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_emul0+0x60): undefined reference to `_u_boot_list_2_uclass_2_i2c_emul' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_rtc_at_43+0x40): undefined reference to `_u_boot_list_2_uclass_2_rtc' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_rtc_at_43+0x58): undefined reference to `_u_boot_list_2_uclass_2_rtc' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_rtc_at_43+0x60): undefined reference to `_u_boot_list_2_uclass_2_rtc' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_emul+0x40): undefined reference to `_u_boot_list_2_uclass_2_i2c_emul_parent' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_emul+0x58): undefined reference to `_u_boot_list_2_uclass_2_i2c_emul_parent' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_emul+0x60): undefined reference to `_u_boot_list_2_uclass_2_i2c_emul_parent' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_clk_test+0x40): undefined reference to `_u_boot_list_2_uclass_2_misc' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_clk_test+0x58): undefined reference to `_u_boot_list_2_uclass_2_misc' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_clk_test+0x60): undefined reference to `_u_boot_list_2_uclass_2_misc' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_i2c_at_0+0x40): undefined reference to `_u_boot_list_2_uclass_2_i2c' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_i2c_at_0+0x58): undefined reference to `_u_boot_list_2_uclass_2_i2c' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_i2c_at_0+0x60): undefined reference to `_u_boot_list_2_uclass_2_i2c' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_clk_sbox+0x40): undefined reference to `_u_boot_list_2_uclass_2_clk' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_clk_sbox+0x58): undefined reference to `_u_boot_list_2_uclass_2_clk' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_serial+0x40): undefined reference to `_u_boot_list_2_uclass_2_serial' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_serial+0x58): undefined reference to `_u_boot_list_2_uclass_2_serial' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_serial+0x60): undefined reference to `_u_boot_list_2_uclass_2_serial' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_clk_fixed+0x40): undefined reference to `_u_boot_list_2_uclass_2_clk' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_clk_fixed+0x60): undefined reference to `_u_boot_list_2_uclass_2_clk' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_root+0x40): undefined reference to `_u_boot_list_2_uclass_2_root' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_root+0x58): undefined reference to `_u_boot_list_2_uclass_2_root' +/usr/bin/ld: /tmp/u-boot-tpl.zgGiog.ltrans0.ltrans.o:(__u_boot_list_2_udevice_2_root+0x60): undefined reference to `_u_boot_list_2_uclass_2_root' +collect2: error: ld returned 1 exit status +make[2]: *** [scripts/Makefile.spl:525: tpl/u-boot-tpl] Error 1 +make[1]: *** [Makefile:2130: tpl/u-boot-tpl] Error 2 +make: *** [Makefile:177: sub-make] Error 2
[PATCH] nvme: Do a clean NVMe shutdown
The brute-force controller disable method can end up racing controller
initilization and causing a crash when we shut down Apple ANS2 NVMe
controllers. Do a proper controlled shutdown, which does block until
things are quiesced properly. This is nicer in general for all
controllers.
Signed-off-by: Hector Martin
---
drivers/nvme/nvme.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/drivers/nvme/nvme.c b/drivers/nvme/nvme.c
index a305305885ec..5fd2fb9ed6a6 100644
--- a/drivers/nvme/nvme.c
+++ b/drivers/nvme/nvme.c
@@ -27,9 +27,8 @@
#define IO_TIMEOUT 30
#define MAX_PRP_POOL 512
-static int nvme_wait_ready(struct nvme_dev *dev, bool enabled)
+static int nvme_wait_csts(struct nvme_dev *dev, u32 mask, u32 val)
{
- u32 bit = enabled ? NVME_CSTS_RDY : 0;
int timeout;
ulong start;
@@ -38,7 +37,7 @@ static int nvme_wait_ready(struct nvme_dev *dev, bool enabled)
start = get_timer(0);
while (get_timer(start) < timeout) {
- if ((readl(>bar->csts) & NVME_CSTS_RDY) == bit)
+ if ((readl(>bar->csts) & mask) == val)
return 0;
}
@@ -295,7 +294,7 @@ static int nvme_enable_ctrl(struct nvme_dev *dev)
dev->ctrl_config |= NVME_CC_ENABLE;
writel(dev->ctrl_config, >bar->cc);
- return nvme_wait_ready(dev, true);
+ return nvme_wait_csts(dev, NVME_CSTS_RDY, NVME_CSTS_RDY);
}
static int nvme_disable_ctrl(struct nvme_dev *dev)
@@ -304,7 +303,16 @@ static int nvme_disable_ctrl(struct nvme_dev *dev)
dev->ctrl_config &= ~NVME_CC_ENABLE;
writel(dev->ctrl_config, >bar->cc);
- return nvme_wait_ready(dev, false);
+ return nvme_wait_csts(dev, NVME_CSTS_RDY, 0);
+}
+
+static int nvme_shutdown_ctrl(struct nvme_dev *dev)
+{
+ dev->ctrl_config &= ~NVME_CC_SHN_MASK;
+ dev->ctrl_config |= NVME_CC_SHN_NORMAL;
+ writel(dev->ctrl_config, >bar->cc);
+
+ return nvme_wait_csts(dev, NVME_CSTS_SHST_MASK, NVME_CSTS_SHST_CMPLT);
}
static void nvme_free_queue(struct nvme_queue *nvmeq)
@@ -904,6 +912,13 @@ free_nvme:
int nvme_shutdown(struct udevice *udev)
{
struct nvme_dev *ndev = dev_get_priv(udev);
+ int ret;
+
+ ret = nvme_shutdown_ctrl(ndev);
+ if (ret < 0) {
+ printf("Error: %s: Shutdown timed out!\n", udev->name);
+ return ret;
+ }
return nvme_disable_ctrl(ndev);
}
--
2.35.1
[PATCH 1/1] sunxi: support half DQ width memory on R40
Half DQ width memory configuration is detected in the same way as rank:
by trying to access memory in full-width configuration and checking for
timeout error code.
The code is modeled after time_out_detect() routine from a leaked
vendor lib-dram u-boot source code. It's very fragile and accessing the
wrong memory location in a wrong order will leave the DRAM controller
stuck.
Tested on Allwinner A40i-based Wiren Board 7 automation controller,
for the following memory configurations:
* 1x 16-bit 4Gbit DDR3, 512 MiB total RAM
* 2x 16-bit 4Gbit DDR3, 1024 MiB total RAM
* 2x 16-bit 8Gbit DDR3, 2048 MiB total RAM
Signed-off-by: Evgeny Boger
---
.../include/asm/arch-sunxi/dram_sunxi_dw.h| 1 +
arch/arm/mach-sunxi/dram_sunxi_dw.c | 115 --
2 files changed, 79 insertions(+), 37 deletions(-)
diff --git a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
index e843c14202..90fec96c5c 100644
--- a/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
+++ b/arch/arm/include/asm/arch-sunxi/dram_sunxi_dw.h
@@ -193,6 +193,7 @@ struct sunxi_mctl_ctl_reg {
#define PIR_INIT (0x1 << 0) /* PHY initialization trigger */
#define PGSR_INIT_DONE (0x1 << 0) /* PHY init done */
+#define PGSR_TIMEOUT (0x1 << 13) /* Timeout error status */
#define ZQCR_PWRDOWN (1U << 31) /* ZQ power down */
diff --git a/arch/arm/mach-sunxi/dram_sunxi_dw.c
b/arch/arm/mach-sunxi/dram_sunxi_dw.c
index 9107b114df..574c60a3f6 100644
--- a/arch/arm/mach-sunxi/dram_sunxi_dw.c
+++ b/arch/arm/mach-sunxi/dram_sunxi_dw.c
@@ -417,9 +417,38 @@ static void mctl_set_cr(uint16_t socid, struct dram_para
*para)
/* Mux pin to A15 address line for single rank memory. */
if (!para->dual_rank)
setbits_le32(_com->cr_r1, MCTL_CR_R1_MUX_A15);
+ else
+ clrbits_le32(_com->cr_r1, MCTL_CR_R1_MUX_A15);
}
}
+static void mctl_set_bus_width(struct dram_para *para)
+{
+ struct sunxi_mctl_ctl_reg * const mctl_ctl =
+ (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
+
+ /* set half DQ */
+ if (!para->bus_full_width) {
+#if defined CONFIG_SUNXI_DRAM_DW_32BIT
+ writel(0x0, _ctl->dx[2].gcr);
+ writel(0x0, _ctl->dx[3].gcr);
+#elif defined CONFIG_SUNXI_DRAM_DW_16BIT
+ writel(0x0, _ctl->dx[1].gcr);
+#else
+#error Unsupported DRAM bus width!
+#endif
+ }
+}
+
+static void mctl_set_training_cfg(struct dram_para *para)
+{
+ struct sunxi_mctl_ctl_reg * const mctl_ctl =
+ (struct sunxi_mctl_ctl_reg *)SUNXI_DRAM_CTL0_BASE;
+
+ clrsetbits_le32(_ctl->dtcr, 0xf << 24,
+ (para->dual_rank ? 0x03 : 0x01) << 24);
+}
+
static void mctl_sys_init(uint16_t socid, struct dram_para *para)
{
struct sunxi_ccm_reg * const ccm =
@@ -550,22 +579,8 @@ static int mctl_channel_init(uint16_t socid, struct
dram_para *para)
(0x0 << 10) | (0x3 << 8));
}
- /* set half DQ */
- if (!para->bus_full_width) {
-#if defined CONFIG_SUNXI_DRAM_DW_32BIT
- writel(0x0, _ctl->dx[2].gcr);
- writel(0x0, _ctl->dx[3].gcr);
-#elif defined CONFIG_SUNXI_DRAM_DW_16BIT
- writel(0x0, _ctl->dx[1].gcr);
-#else
-#error Unsupported DRAM bus width!
-#endif
- }
-
- /* data training configuration */
- clrsetbits_le32(_ctl->dtcr, 0xf << 24,
- (para->dual_rank ? 0x3 : 0x1) << 24);
-
+ mctl_set_bus_width(para);
+ mctl_set_training_cfg(para);
mctl_set_bit_delays(para);
udelay(50);
@@ -600,25 +615,23 @@ static int mctl_channel_init(uint16_t socid, struct
dram_para *para)
|| ((readl(_ctl->dx[1].gsr[0]) >> 24) & 0x2)
#endif
) {
- clrsetbits_le32(_ctl->dtcr, 0xf << 24, 0x1 << 24);
para->dual_rank = 0;
+ mctl_set_training_cfg(para);
}
/* only half DQ width */
#if defined CONFIG_SUNXI_DRAM_DW_32BIT
if (((readl(_ctl->dx[2].gsr[0]) >> 24) & 0x1) ||
((readl(_ctl->dx[3].gsr[0]) >> 24) & 0x1)) {
- writel(0x0, _ctl->dx[2].gcr);
- writel(0x0, _ctl->dx[3].gcr);
para->bus_full_width = 0;
}
#elif defined CONFIG_SUNXI_DRAM_DW_16BIT
if ((readl(_ctl->dx[1].gsr[0]) >> 24) & 0x1) {
- writel(0x0, _ctl->dx[1].gcr);
para->bus_full_width = 0;
}
#endif
+ mctl_set_bus_width(para);
mctl_set_cr(socid, para);
udelay(20);
@@ -693,6 +706,8 @@ static void mctl_auto_detect_dram_size_rank(uint16_t socid,
struct dram_para *pa
for (rank->page_size = 512;
[PATCH 0/1] sunxi: support half DQ width memory on R40
On Allwinner boards memory configuration is detected by bootloader. However, R40 (A40i/T3) is somewhat unique because the detection by the DRAM controller via PIR_QSGATE is broken (either in U-Boot or in the controller). So the memory configuration must be detected by other means. Dual rank detection has been already implemented by Icenowy earlier. This patch extends the automation detection so it can detect half-width DQ configuration (i.e. single x16 DDR3 IC). Tested on Allwinner A40i-based Wiren Board 7 automation controller, for the following memory configurations: * 1x 16-bit 4Gbit DDR3, 512 MiB total RAM * 2x 16-bit 4Gbit DDR3, 1024 MiB total RAM * 2x 16-bit 8Gbit DDR3, 2048 MiB total RAM Unfortunately it has NOT been tested with dual-rank configuration yet, as I don't have any dual-rank boards at hand. I will really appreciate if someone could help me with that. Evgeny Boger (1): sunxi: support half DQ width memory on R40 .../include/asm/arch-sunxi/dram_sunxi_dw.h| 1 + arch/arm/mach-sunxi/dram_sunxi_dw.c | 115 -- 2 files changed, 79 insertions(+), 37 deletions(-) -- 2.25.1
[PATCH v2] spl: fit: Report fdt error for loading u-boot
Commit 71551055cbdb ("spl: fit: Load devicetree when a Linux payload is
found") made a change to not report the spl_fit_append_fdt error at all
if next-stage image is u-boot.
However for u-boot image without CONFIG_OF_EMBED, the error should be
reported to uplevel caller. Otherwise, uplevel caller would think the
fdt is already loaded which is obviously not true.
Signed-off-by: Baocheng Su
---
Changes in v2:
- Fix the wrong wrapping
common/spl/spl_fit.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index a35be52965..00404935cb 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -770,8 +770,12 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
*/
if (os_takes_devicetree(spl_image->os)) {
ret = spl_fit_append_fdt(spl_image, info, sector, );
- if (ret < 0 && spl_image->os != IH_OS_U_BOOT)
- return ret;
+ if (ret < 0) {
+ if (spl_image->os != IH_OS_U_BOOT)
+ return ret;
+ else if (!IS_ENABLED(CONFIG_OF_EMBED))
+ return ret;
+ }
}
firmware_node = node;
--
2.30.2
[PATCH] spl: fit: Report fdt error for loading u-boot
Commit 71551055cbdb ("spl: fit: Load devicetree when a Linux payload is
found") made a change to not report the spl_fit_append_fdt error at all
if next-stage image is u-boot.
However for u-boot image without CONFIG_OF_EMBED, the error should be
reported to uplevel caller. Otherwise, uplevel caller would think the
fdt is already loaded which is obviously not true.
Signed-off-by: Baocheng Su
---
common/spl/spl_fit.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index a35be52965..00404935cb 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -770,8 +770,12 @@ int spl_load_simple_fit(struct spl_image_info
*spl_image,
*/
if (os_takes_devicetree(spl_image->os)) {
ret = spl_fit_append_fdt(spl_image, info, sector,
);
- if (ret < 0 && spl_image->os != IH_OS_U_BOOT)
- return ret;
+ if (ret < 0) {
+ if (spl_image->os != IH_OS_U_BOOT)
+ return ret;
+ else if (!IS_ENABLED(CONFIG_OF_EMBED))
+ return ret;
+ }
}
firmware_node = node;
--
2.30.2
[PATCH 1/1] fs/erofs: silence erofs_probe()
fs_set_blk_dev() probes all file-systems until it finds one that matches
the volume. We do not expect any console output for non-matching
file-systems.
Convert error messages in erofs_read_superblock() to debug output.
Fixes: 830613f8f5bb ("fs/erofs: add erofs filesystem support")
Signed-off-by: Heinrich Schuchardt
---
fs/erofs/super.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/fs/erofs/super.c b/fs/erofs/super.c
index 4cca322b9e..095754dc28 100644
--- a/fs/erofs/super.c
+++ b/fs/erofs/super.c
@@ -65,14 +65,14 @@ int erofs_read_superblock(void)
ret = erofs_blk_read(data, 0, 1);
if (ret < 0) {
- erofs_err("cannot read erofs superblock: %d", ret);
+ erofs_dbg("cannot read erofs superblock: %d", ret);
return -EIO;
}
dsb = (struct erofs_super_block *)(data + EROFS_SUPER_OFFSET);
ret = -EINVAL;
if (le32_to_cpu(dsb->magic) != EROFS_SUPER_MAGIC_V1) {
- erofs_err("cannot find valid erofs superblock");
+ erofs_dbg("cannot find valid erofs superblock");
return ret;
}
@@ -81,7 +81,7 @@ int erofs_read_superblock(void)
blkszbits = dsb->blkszbits;
/* 9(512 bytes) + LOG_SECTORS_PER_BLOCK == LOG_BLOCK_SIZE */
if (blkszbits != LOG_BLOCK_SIZE) {
- erofs_err("blksize %u isn't supported on this platform",
+ erofs_dbg("blksize %u isn't supported on this platform",
1 << blkszbits);
return ret;
}
--
2.36.1
[PATCH 1/1] Makefile: avoid false positive -Wmaybe-uninitialized
When compiling with -Og gcc reports false positive -Wmaybe-uninitialized as reported in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394. Silence these warnings when building with CONFIG_CC_OPTIMIZE_FOR_DEBUG. Signed-off-by: Heinrich Schuchardt --- Makefile | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index ff25f92974..e6c9ced399 100644 --- a/Makefile +++ b/Makefile @@ -676,6 +676,9 @@ endif # $(dot-config) ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG KBUILD_HOSTCFLAGS := -Wall -Wstrict-prototypes -Og -g -fomit-frame-pointer \ $(HOST_LFS_CFLAGS) $(HOSTCFLAGS) +# Avoid false positives -Wmaybe-uninitialized +# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394 +KBUILD_HOSTCFLAGS += -Wno-maybe-uninitialized KBUILD_HOSTCXXFLAGS := -Og -g $(HOST_LFS_CFLAGS) $(HOSTCXXFLAGS) endif @@ -696,7 +699,10 @@ KBUILD_CFLAGS += -O2 endif ifdef CONFIG_CC_OPTIMIZE_FOR_DEBUG -KBUILD_CFLAGS += -Og +KBUILD_CFLAGS += -Og -Wno-maybe-uninitialized +# Avoid false positives -Wmaybe-uninitialized +# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78394 +KBUILD_CFLAGS += -Wno-maybe-uninitialized endif LTO_CFLAGS := -- 2.36.1
