Re: [PATCH v3 0/8] Enable CONFIG_TIMER for all Kirkwood / MVEBU boards
On 15.09.22 16:20, Stefan Roese wrote: This patchset enhaces the recently added Orion Timer driver to support all other Kirkwood & 32bit MVEBU Armada platforms. Additionally, this timer support is then enabled per default for those platforms, so that the board config files don't need to be changed. Also necessary is some dts hacking, so that the timer DT node is available in early U-Boot stages. I've successfully tested this patchset on an Armada XP board. Additional test on other boards and platforms are very welcome and necessary. Thanks, Stefan Stefan Roese (8): timer: orion-timer: Use timer_conv_64() to fix timer wrap around timer: orion-timer: Add support for other Armada SoC's timer: orion-timer: Add timer_get_boot_us() for BOOTSTAGE support arm: mvebu: Use CONFIG_TIMER on all MVEBU & KIRKWOOD platforms arm: mvebu: dts: Makefile: Compile Armada 375 dtb in a separate step arm: mvebu: dts: armada-375.dtsi: Add timer0 & timer1 arm: mvebu: dts: mvebu-u-boot.dtsi: Add "u-boot,dm-pre-reloc" to timer DT node kirkwood: lsxl: Sync defconfigs arch/arm/Kconfig | 4 + arch/arm/dts/Makefile | 6 +- arch/arm/dts/armada-375.dtsi | 4 +- arch/arm/dts/mvebu-u-boot.dtsi| 11 +++ arch/arm/mach-mvebu/include/mach/config.h | 5 -- configs/lschlv2_defconfig | 2 - configs/lsxhl_defconfig | 2 - drivers/timer/Kconfig | 5 +- drivers/timer/orion-timer.c | 103 +++--- 9 files changed, 118 insertions(+), 24 deletions(-) Applied to u-boot-marvell/next Thanks, Stefan
Re: [PATCH 2/2] arm: mvebu: theadorable: Update eth & mdio DT nodes
On 15.09.22 15:21, Stefan Roese wrote: With the recent changes in the Marvel mvneta network driver, the MDIO bus is not connected any more. This patch updates the DT nodes to use the nodes from the dtsi files instead of creating ad-hoc nodes. Signed-off-by: Stefan Roese Applied to u-boot-marvell/next Thanks, Stefan --- arch/arm/dts/armada-xp-theadorable.dts | 27 -- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts index ba73386d4f0a..7d833640b6d6 100644 --- a/arch/arm/dts/armada-xp-theadorable.dts +++ b/arch/arm/dts/armada-xp-theadorable.dts @@ -107,20 +107,6 @@ status = "okay"; }; - mdio { - #address-cells = <1>; - #size-cells = <0>; - phy0: ethernet-phy@0 { - reg = <0>; - }; - }; - - ethernet@7 { - status = "okay"; - phy = <&phy0>; - phy-mode = "sgmii"; - }; - usb@5 { status = "okay"; }; @@ -166,6 +152,18 @@ clock-frequency = <10>; }; +&mdio { + phy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +ð0 { + status = "okay"; + phy = <&phy0>; + phy-mode = "sgmii"; +}; + &spi0 { status = "okay"; @@ -198,7 +196,6 @@ }; }; - &pciec { status = "okay"; Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 1/2] arm: mvebu: theadorable: Misc defconfig changes
On 15.09.22 15:21, Stefan Roese wrote: - Remove EFI support as it's not used on this board - Disable CONFIG_FIT_PRINT to reduce the serial output (minimal speedup) Signed-off-by: Stefan Roese Applied to u-boot-marvell/next Thanks, Stefan --- configs/theadorable_debug_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 9074ca1620ba..3d84bf9d57af 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -22,6 +22,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y +# CONFIG_FIT_PRINT is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y # CONFIG_CONSOLE_MUX is not set @@ -98,3 +99,5 @@ CONFIG_VIDEO_MVEBU=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y +CONFIG_FAT_WRITE=y +# CONFIG_EFI_LOADER is not set Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH] Makefile: Add missing CONFIG_BOARD_SIZE_LIMIT check for u-boot-spl.kwb
On 19.09.22 09:02, Stefan Roese wrote: On 14.09.22 15:06, Pali Rohár wrote: Currently CONFIG_BOARD_SIZE_LIMIT check is ignored for u-boot-spl.kwb target. Fix it by adding missing $(BOARD_SIZE_CHECK) macro. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese Applied to u-boot-marvell/next Thanks, Stefan
Re: [PATCH] arm: mvebu: Add default SPL_SIZE_LIMIT for 32-bit SoCs
On 16.09.22 18:01, Marek Behún wrote: On Wed, 14 Sep 2022 18:48:16 +0200 Pali Rohár wrote: 32-bit Marvell Armada BootROMs limit maximal size of SPL image to 192 kB. So define 192 kB (= 0x3) limit as default value for SPL_SIZE_LIMIT. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Applied to u-boot-marvell/next Thanks, Stefan
Re: [PATCH] arm: mvebu: turris_omnia: Add CONFIG_BOARD_SIZE_LIMIT
On 14.09.22 15:06, Pali Rohár wrote: Maximal size of u-boot kwb image binary is $CONFIG_ENV_OFFSET which is 0xF = 983040 bytes. So add missing CONFIG_BOARD_SIZE_LIMIT definition to ensure that u-boot binary does not overflow to the u-boot env storage. Signed-off-by: Pali Rohár Applied to u-boot-marvell/next Thanks, Stefan --- configs/turris_omnia_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index ba635feb44b2..6698f2313550 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -28,6 +28,8 @@ CONFIG_SYS_MEMTEST_END=0x00ff CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff +CONFIG_HAS_BOARD_SIZE_LIMIT=y +CONFIG_BOARD_SIZE_LIMIT=983040 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 2/2] imx8mm_evk: Add Serial Download Protocol support
Hi Fabio, Just have a question, the tcpci driver is not supported, so how do you manage to make SDP work? Regards, Peng. On 9/20/2022 8:20 AM, Fabio Estevam wrote: Add Serial Download Protocol support as it is a useful method to load flash.bin to RAM and run it via 'uuu'. With this patch, it is possible to start both U-Boot SPL and U-Boot proper using the following 'uuu'command: $ uuu -brun spl flash.bin Based on a patch from Marek Vasut for the imx8mm-mx8menlo board. Also, to fit the SPL binary into the internal RAM, select CONFIG_LTO to reduce its size. Signed-off-by: Fabio Estevam --- arch/arm/dts/imx8mm-evk-u-boot.dtsi | 16 configs/imx8mm_evk_defconfig| 21 + 2 files changed, 37 insertions(+) diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 36fbf56bc5..d82428f8fe 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -20,6 +20,10 @@ }; }; +&aips4 { + u-boot,dm-spl; +}; + ®_usdhc2_vmmc { u-boot,off-on-delay-us = <2>; }; @@ -84,6 +88,18 @@ u-boot,dm-spl; }; +&usbmisc1 { + u-boot,dm-spl; +}; + +&usbphynop1 { + u-boot,dm-spl; +}; + +&usbotg1 { + u-boot,dm-spl; +}; + &usdhc1 { u-boot,dm-spl; }; diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 7bcedcd51f..2dff26b3eb 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x4048 +CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -38,6 +39,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_USB_HOST=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 @@ -50,6 +54,8 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y @@ -80,9 +86,13 @@ CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_SPL_PHY=y +CONFIG_SPL_NOP_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_PMIC=y CONFIG_SPL_DM_PMIC_PCA9450=y CONFIG_DM_REGULATOR=y @@ -97,4 +107,15 @@ CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +# CONFIG_USB_STORAGE is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x4040 +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_IMX_WATCHDOG=y
Re: [PATCH 2/2] imx8mm_evk: Add Serial Download Protocol support
HI On Tue, Sep 20, 2022 at 8:31 AM ZHIZHIKIN Andrey wrote: > > Hello Michael, > > > -Original Message- > > From: U-Boot On Behalf Of Michael Nazzareno > > Trimarchi > > Sent: Tuesday, September 20, 2022 7:46 AM > > To: Fabio Estevam > > Cc: sba...@denx.de; peng@nxp.com; ma...@denx.de; u-boot@lists.denx.de > > Subject: Re: [PATCH 2/2] imx8mm_evk: Add Serial Download Protocol support > > > > Hi > > > > On Tue, Sep 20, 2022 at 2:21 AM Fabio Estevam wrote: > > > > > > Add Serial Download Protocol support as it is a useful method to > > > load flash.bin to RAM and run it via 'uuu'. > > > > > > With this patch, it is possible to start both U-Boot SPL and U-Boot > > > proper using the following 'uuu'command: > > > > > > $ uuu -brun spl flash.bin > > > > > > Based on a patch from Marek Vasut for the imx8mm-mx8menlo board. > > > > > > Also, to fit the SPL binary into the internal RAM, select CONFIG_LTO > > > to reduce its size. > > > > > > Signed-off-by: Fabio Estevam > > > --- > > > arch/arm/dts/imx8mm-evk-u-boot.dtsi | 16 > > > configs/imx8mm_evk_defconfig| 21 + > > > 2 files changed, 37 insertions(+) > > > > > > diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > > b/arch/arm/dts/imx8mm-evk-u- > > boot.dtsi > > > index 36fbf56bc5..d82428f8fe 100644 > > > --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > > +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > > @@ -20,6 +20,10 @@ > > > }; > > > }; > > > > > > +&aips4 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > ®_usdhc2_vmmc { > > > u-boot,off-on-delay-us = <2>; > > > }; > > > @@ -84,6 +88,18 @@ > > > u-boot,dm-spl; > > > }; > > > > > > +&usbmisc1 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&usbphynop1 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > +&usbotg1 { > > > + u-boot,dm-spl; > > > +}; > > > + > > > &usdhc1 { > > > u-boot,dm-spl; > > > }; > > > diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig > > > index 7bcedcd51f..2dff26b3eb 100644 > > > --- a/configs/imx8mm_evk_defconfig > > > +++ b/configs/imx8mm_evk_defconfig > > > @@ -17,6 +17,7 @@ CONFIG_SPL_SERIAL=y > > > CONFIG_SPL_DRIVERS_MISC=y > > > CONFIG_SPL=y > > > CONFIG_SYS_LOAD_ADDR=0x4048 > > > +CONFIG_LTO=y > > > > Is the entry required? or part of the series. If so could you explain > > in the commit message? > > While not being strictly part of the series, Fabio did explained the > LTO enablement in the commit message above. This reduces the size of > SPL, which in turn allows it to fit into IRAM. > Sorry too early. I was thinking that I was read this comment in marek review for other patch but was reported even here Michael > -- andrey > > > > > Michael > > > > > CONFIG_DISTRO_DEFAULTS=y > > > CONFIG_FIT=y > > > CONFIG_FIT_EXTERNAL_OFFSET=0x3000 > > > @@ -38,6 +39,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y > > > CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 > > > CONFIG_SPL_I2C=y > > > CONFIG_SPL_POWER=y > > > +CONFIG_SPL_USB_HOST=y > > > +CONFIG_SPL_USB_GADGET=y > > > +CONFIG_SPL_USB_SDP_SUPPORT=y > > > CONFIG_SPL_WATCHDOG=y > > > CONFIG_SYS_MAXARGS=64 > > > CONFIG_SYS_CBSIZE=2048 > > > @@ -50,6 +54,8 @@ CONFIG_CMD_FUSE=y > > > CONFIG_CMD_GPIO=y > > > CONFIG_CMD_I2C=y > > > CONFIG_CMD_MMC=y > > > +CONFIG_CMD_USB_SDP=y > > > +CONFIG_CMD_USB_MASS_STORAGE=y > > > CONFIG_CMD_CACHE=y > > > CONFIG_CMD_REGULATOR=y > > > CONFIG_CMD_EXT4_WRITE=y > > > @@ -80,9 +86,13 @@ CONFIG_PHY_ATHEROS=y > > > CONFIG_PHY_GIGE=y > > > CONFIG_FEC_MXC=y > > > CONFIG_MII=y > > > +CONFIG_SPL_PHY=y > > > +CONFIG_SPL_NOP_PHY=y > > > CONFIG_PINCTRL=y > > > CONFIG_SPL_PINCTRL=y > > > CONFIG_PINCTRL_IMX8M=y > > > +CONFIG_POWER_DOMAIN=y > > > +CONFIG_IMX8M_POWER_DOMAIN=y > > > CONFIG_DM_PMIC=y > > > CONFIG_SPL_DM_PMIC_PCA9450=y > > > CONFIG_DM_REGULATOR=y > > > @@ -97,4 +107,15 @@ CONFIG_SPL_SYSRESET=y > > > CONFIG_SYSRESET_PSCI=y > > > CONFIG_SYSRESET_WATCHDOG=y > > > CONFIG_DM_THERMAL=y > > > +CONFIG_USB=y > > > +CONFIG_USB_EHCI_HCD=y > > > +CONFIG_MXC_USB_OTG_HACTIVE=y > > > +# CONFIG_USB_STORAGE is not set > > > +CONFIG_USB_GADGET=y > > > +CONFIG_USB_GADGET_MANUFACTURER="FSL" > > > +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > > +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > > +CONFIG_CI_UDC=y > > > +CONFIG_SDP_LOADADDR=0x4040 > > > +CONFIG_USB_GADGET_DOWNLOAD=y > > > CONFIG_IMX_WATCHDOG=y > > > -- > > > 2.25.1 > > > > > > > > > -- > > Michael Nazzareno Trimarchi > > Co-Founder & Chief Executive Officer > > M. +39 347 913 2170 > > mich...@amarulasolutions.com > > __ > > > > Amarula Solutions BV > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL > > T. +31 (0)85 111 9172 > > i...@amarulasolutions.com > > www.amarulasolutions.com -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 mich...@amarulasolutions.com __ Amarula Solutions BV Joo
RE: [PATCH 2/2] imx8mm_evk: Add Serial Download Protocol support
Hello Michael, > -Original Message- > From: U-Boot On Behalf Of Michael Nazzareno > Trimarchi > Sent: Tuesday, September 20, 2022 7:46 AM > To: Fabio Estevam > Cc: sba...@denx.de; peng@nxp.com; ma...@denx.de; u-boot@lists.denx.de > Subject: Re: [PATCH 2/2] imx8mm_evk: Add Serial Download Protocol support > > Hi > > On Tue, Sep 20, 2022 at 2:21 AM Fabio Estevam wrote: > > > > Add Serial Download Protocol support as it is a useful method to > > load flash.bin to RAM and run it via 'uuu'. > > > > With this patch, it is possible to start both U-Boot SPL and U-Boot > > proper using the following 'uuu'command: > > > > $ uuu -brun spl flash.bin > > > > Based on a patch from Marek Vasut for the imx8mm-mx8menlo board. > > > > Also, to fit the SPL binary into the internal RAM, select CONFIG_LTO > > to reduce its size. > > > > Signed-off-by: Fabio Estevam > > --- > > arch/arm/dts/imx8mm-evk-u-boot.dtsi | 16 > > configs/imx8mm_evk_defconfig| 21 + > > 2 files changed, 37 insertions(+) > > > > diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > b/arch/arm/dts/imx8mm-evk-u- > boot.dtsi > > index 36fbf56bc5..d82428f8fe 100644 > > --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > > @@ -20,6 +20,10 @@ > > }; > > }; > > > > +&aips4 { > > + u-boot,dm-spl; > > +}; > > + > > ®_usdhc2_vmmc { > > u-boot,off-on-delay-us = <2>; > > }; > > @@ -84,6 +88,18 @@ > > u-boot,dm-spl; > > }; > > > > +&usbmisc1 { > > + u-boot,dm-spl; > > +}; > > + > > +&usbphynop1 { > > + u-boot,dm-spl; > > +}; > > + > > +&usbotg1 { > > + u-boot,dm-spl; > > +}; > > + > > &usdhc1 { > > u-boot,dm-spl; > > }; > > diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig > > index 7bcedcd51f..2dff26b3eb 100644 > > --- a/configs/imx8mm_evk_defconfig > > +++ b/configs/imx8mm_evk_defconfig > > @@ -17,6 +17,7 @@ CONFIG_SPL_SERIAL=y > > CONFIG_SPL_DRIVERS_MISC=y > > CONFIG_SPL=y > > CONFIG_SYS_LOAD_ADDR=0x4048 > > +CONFIG_LTO=y > > Is the entry required? or part of the series. If so could you explain > in the commit message? While not being strictly part of the series, Fabio did explained the LTO enablement in the commit message above. This reduces the size of SPL, which in turn allows it to fit into IRAM. -- andrey > > Michael > > > CONFIG_DISTRO_DEFAULTS=y > > CONFIG_FIT=y > > CONFIG_FIT_EXTERNAL_OFFSET=0x3000 > > @@ -38,6 +39,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y > > CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 > > CONFIG_SPL_I2C=y > > CONFIG_SPL_POWER=y > > +CONFIG_SPL_USB_HOST=y > > +CONFIG_SPL_USB_GADGET=y > > +CONFIG_SPL_USB_SDP_SUPPORT=y > > CONFIG_SPL_WATCHDOG=y > > CONFIG_SYS_MAXARGS=64 > > CONFIG_SYS_CBSIZE=2048 > > @@ -50,6 +54,8 @@ CONFIG_CMD_FUSE=y > > CONFIG_CMD_GPIO=y > > CONFIG_CMD_I2C=y > > CONFIG_CMD_MMC=y > > +CONFIG_CMD_USB_SDP=y > > +CONFIG_CMD_USB_MASS_STORAGE=y > > CONFIG_CMD_CACHE=y > > CONFIG_CMD_REGULATOR=y > > CONFIG_CMD_EXT4_WRITE=y > > @@ -80,9 +86,13 @@ CONFIG_PHY_ATHEROS=y > > CONFIG_PHY_GIGE=y > > CONFIG_FEC_MXC=y > > CONFIG_MII=y > > +CONFIG_SPL_PHY=y > > +CONFIG_SPL_NOP_PHY=y > > CONFIG_PINCTRL=y > > CONFIG_SPL_PINCTRL=y > > CONFIG_PINCTRL_IMX8M=y > > +CONFIG_POWER_DOMAIN=y > > +CONFIG_IMX8M_POWER_DOMAIN=y > > CONFIG_DM_PMIC=y > > CONFIG_SPL_DM_PMIC_PCA9450=y > > CONFIG_DM_REGULATOR=y > > @@ -97,4 +107,15 @@ CONFIG_SPL_SYSRESET=y > > CONFIG_SYSRESET_PSCI=y > > CONFIG_SYSRESET_WATCHDOG=y > > CONFIG_DM_THERMAL=y > > +CONFIG_USB=y > > +CONFIG_USB_EHCI_HCD=y > > +CONFIG_MXC_USB_OTG_HACTIVE=y > > +# CONFIG_USB_STORAGE is not set > > +CONFIG_USB_GADGET=y > > +CONFIG_USB_GADGET_MANUFACTURER="FSL" > > +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > > +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > +CONFIG_CI_UDC=y > > +CONFIG_SDP_LOADADDR=0x4040 > > +CONFIG_USB_GADGET_DOWNLOAD=y > > CONFIG_IMX_WATCHDOG=y > > -- > > 2.25.1 > > > > > -- > Michael Nazzareno Trimarchi > Co-Founder & Chief Executive Officer > M. +39 347 913 2170 > mich...@amarulasolutions.com > __ > > Amarula Solutions BV > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL > T. +31 (0)85 111 9172 > i...@amarulasolutions.com > www.amarulasolutions.com
Re: [PATCH 2/2] imx8mm_evk: Add Serial Download Protocol support
Hi On Tue, Sep 20, 2022 at 2:21 AM Fabio Estevam wrote: > > Add Serial Download Protocol support as it is a useful method to > load flash.bin to RAM and run it via 'uuu'. > > With this patch, it is possible to start both U-Boot SPL and U-Boot > proper using the following 'uuu'command: > > $ uuu -brun spl flash.bin > > Based on a patch from Marek Vasut for the imx8mm-mx8menlo board. > > Also, to fit the SPL binary into the internal RAM, select CONFIG_LTO > to reduce its size. > > Signed-off-by: Fabio Estevam > --- > arch/arm/dts/imx8mm-evk-u-boot.dtsi | 16 > configs/imx8mm_evk_defconfig| 21 + > 2 files changed, 37 insertions(+) > > diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > index 36fbf56bc5..d82428f8fe 100644 > --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi > +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi > @@ -20,6 +20,10 @@ > }; > }; > > +&aips4 { > + u-boot,dm-spl; > +}; > + > ®_usdhc2_vmmc { > u-boot,off-on-delay-us = <2>; > }; > @@ -84,6 +88,18 @@ > u-boot,dm-spl; > }; > > +&usbmisc1 { > + u-boot,dm-spl; > +}; > + > +&usbphynop1 { > + u-boot,dm-spl; > +}; > + > +&usbotg1 { > + u-boot,dm-spl; > +}; > + > &usdhc1 { > u-boot,dm-spl; > }; > diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig > index 7bcedcd51f..2dff26b3eb 100644 > --- a/configs/imx8mm_evk_defconfig > +++ b/configs/imx8mm_evk_defconfig > @@ -17,6 +17,7 @@ CONFIG_SPL_SERIAL=y > CONFIG_SPL_DRIVERS_MISC=y > CONFIG_SPL=y > CONFIG_SYS_LOAD_ADDR=0x4048 > +CONFIG_LTO=y Is the entry required? or part of the series. If so could you explain in the commit message? Michael > CONFIG_DISTRO_DEFAULTS=y > CONFIG_FIT=y > CONFIG_FIT_EXTERNAL_OFFSET=0x3000 > @@ -38,6 +39,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y > CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 > CONFIG_SPL_I2C=y > CONFIG_SPL_POWER=y > +CONFIG_SPL_USB_HOST=y > +CONFIG_SPL_USB_GADGET=y > +CONFIG_SPL_USB_SDP_SUPPORT=y > CONFIG_SPL_WATCHDOG=y > CONFIG_SYS_MAXARGS=64 > CONFIG_SYS_CBSIZE=2048 > @@ -50,6 +54,8 @@ CONFIG_CMD_FUSE=y > CONFIG_CMD_GPIO=y > CONFIG_CMD_I2C=y > CONFIG_CMD_MMC=y > +CONFIG_CMD_USB_SDP=y > +CONFIG_CMD_USB_MASS_STORAGE=y > CONFIG_CMD_CACHE=y > CONFIG_CMD_REGULATOR=y > CONFIG_CMD_EXT4_WRITE=y > @@ -80,9 +86,13 @@ CONFIG_PHY_ATHEROS=y > CONFIG_PHY_GIGE=y > CONFIG_FEC_MXC=y > CONFIG_MII=y > +CONFIG_SPL_PHY=y > +CONFIG_SPL_NOP_PHY=y > CONFIG_PINCTRL=y > CONFIG_SPL_PINCTRL=y > CONFIG_PINCTRL_IMX8M=y > +CONFIG_POWER_DOMAIN=y > +CONFIG_IMX8M_POWER_DOMAIN=y > CONFIG_DM_PMIC=y > CONFIG_SPL_DM_PMIC_PCA9450=y > CONFIG_DM_REGULATOR=y > @@ -97,4 +107,15 @@ CONFIG_SPL_SYSRESET=y > CONFIG_SYSRESET_PSCI=y > CONFIG_SYSRESET_WATCHDOG=y > CONFIG_DM_THERMAL=y > +CONFIG_USB=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_MXC_USB_OTG_HACTIVE=y > +# CONFIG_USB_STORAGE is not set > +CONFIG_USB_GADGET=y > +CONFIG_USB_GADGET_MANUFACTURER="FSL" > +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > +CONFIG_CI_UDC=y > +CONFIG_SDP_LOADADDR=0x4040 > +CONFIG_USB_GADGET_DOWNLOAD=y > CONFIG_IMX_WATCHDOG=y > -- > 2.25.1 > -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 mich...@amarulasolutions.com __ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 i...@amarulasolutions.com www.amarulasolutions.com
Re: [PATCH] gpio: Get rid of gpio_hog_probe_all()
On 9/19/22 14:45, Marek Vasut wrote: > The gpio_hog_probe_all() functionality can be perfectly well replaced by > DM_FLAG_PROBE_AFTER_BIND DM flag, which would trigger .probe() callback > of each GPIO hog driver instance after .bind() and thus configure the > hogged GPIO accordingly. > > Signed-off-by: Marek Vasut > --- > Cc: Heinrich Schuchardt > Cc: Samuel Holland > Cc: Simon Glass > --- > common/board_r.c | 3 --- > common/spl/spl.c | 3 --- > doc/README.gpio| 6 ++ > drivers/gpio/gpio-uclass.c | 25 ++--- > include/asm-generic/gpio.h | 8 > 5 files changed, 4 insertions(+), 41 deletions(-) Reviewed-by: Samuel Holland
Re: [PATCH v3 1/1] blk: Rename if_type to uclass_id
On Sat, Sep 17, 2022 at 11:27:09AM -0600, Simon Glass wrote: > Hi Takahiro, > > On Sat, 17 Sept 2022 at 04:52, AKASHI Takahiro > wrote: > > > > On Sat, Sep 17, 2022 at 02:25:50AM -0600, Simon Glass wrote: > > > Use the word 'uclass' instead of 'if_type' to complete the conversion. > > > > NAK. > > You seem to have missed out some of my comments. > > See: > > https://lists.denx.de/pipermail/u-boot/2022-September/494583.html > > (against efi_api.h, efi_device_path.c, efi_device_path_to_text.c and > > efi_net.c) > > OK yes I missed that, sorry. > > I sent a new version. > > Also, are you planning to do another series to better integrate EFI > with driver model? No, I'm not. -Takahiro Akashi > Regards, > Simon
[PATCH 2/2] imx8mm_evk: Add Serial Download Protocol support
Add Serial Download Protocol support as it is a useful method to load flash.bin to RAM and run it via 'uuu'. With this patch, it is possible to start both U-Boot SPL and U-Boot proper using the following 'uuu'command: $ uuu -brun spl flash.bin Based on a patch from Marek Vasut for the imx8mm-mx8menlo board. Also, to fit the SPL binary into the internal RAM, select CONFIG_LTO to reduce its size. Signed-off-by: Fabio Estevam --- arch/arm/dts/imx8mm-evk-u-boot.dtsi | 16 configs/imx8mm_evk_defconfig| 21 + 2 files changed, 37 insertions(+) diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 36fbf56bc5..d82428f8fe 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -20,6 +20,10 @@ }; }; +&aips4 { + u-boot,dm-spl; +}; + ®_usdhc2_vmmc { u-boot,off-on-delay-us = <2>; }; @@ -84,6 +88,18 @@ u-boot,dm-spl; }; +&usbmisc1 { + u-boot,dm-spl; +}; + +&usbphynop1 { + u-boot,dm-spl; +}; + +&usbotg1 { + u-boot,dm-spl; +}; + &usdhc1 { u-boot,dm-spl; }; diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 7bcedcd51f..2dff26b3eb 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x4048 +CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -38,6 +39,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_USB_HOST=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 @@ -50,6 +54,8 @@ CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y @@ -80,9 +86,13 @@ CONFIG_PHY_ATHEROS=y CONFIG_PHY_GIGE=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_SPL_PHY=y +CONFIG_SPL_NOP_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y +CONFIG_POWER_DOMAIN=y +CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_DM_PMIC=y CONFIG_SPL_DM_PMIC_PCA9450=y CONFIG_DM_REGULATOR=y @@ -97,4 +107,15 @@ CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +# CONFIG_USB_STORAGE is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="FSL" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x4040 +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_IMX_WATCHDOG=y -- 2.25.1
[PATCH 1/2] imx8mm_evk: Add an entry for USB boot
Add an entry for USB boot so that U-Boot could be loaded via the Serial Download Protocol. Signed-off-by: Fabio Estevam --- board/freescale/imx8mm_evk/spl.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index e2eb1426c8..c827ed5546 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -33,6 +33,8 @@ DECLARE_GLOBAL_DATA_PTR; int spl_board_boot_device(enum boot_device boot_dev_spl) { switch (boot_dev_spl) { + case USB_BOOT: + return BOOT_DEVICE_BOARD; case SD2_BOOT: case MMC2_BOOT: return BOOT_DEVICE_MMC1; -- 2.25.1
bootelf unable to boot
Hello Simon, In 78398652723b ("bootm: Tidy up use of autostart env var") you rationalised the checking of autoboot in the bootelf command handling. This changed the bootelf default behaviour from "autostart by default" to "autostart only when autostart=on". The issue is with boards that have a flow where they dhcp or tftp an image and then load it with bootelf. If they set autostart=on, the dhcp command will try to use the bootm flow to load the elf, which fails. If they set autostart=off, there's no way to reach do_bootelf_exec. There seems to be two use cases for bootelf in the tree: an ELF-loading version of bootm (x86/sebios testing, and a way to load an arbitrary ELF into memory for another processor to run (Zynq). I was using it for the former, for a powerpc platform. The following change would restore the existing behaviour, and fix my use case: diff --git a/cmd/elf.c b/cmd/elf.c index 2b33c50bd026..d3beb818e53f 100644 --- a/cmd/elf.c +++ b/cmd/elf.c @@ -68,7 +68,7 @@ int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) else addr = load_elf_image_shdr(addr); - if (!env_get_autostart()) + if (env_get_no("autostart") == 1) return rcode; printf("## Starting application at 0x%08lx ...\n", addr); diff --git a/env/common.c b/env/common.c index f9226e0690d0..7d6e4386e08d 100644 --- a/env/common.c +++ b/env/common.c @@ -235,6 +235,16 @@ int env_get_yesno(const char *var) 1 : 0; } +int env_get_no(const char *var) +{ + char *s = env_get(var); + + if (s == NULL) + return -1; + return (*s == '0' || *s == 'n' || *s == 'N' || *s == 'f' || *s == 'F') ? + 1 : 0; +} + Do you have any alternative suggestions? Cheers, Joel
Re: [PATCH] usb: Add missing guard around env_get() in usb_hub
Hi Marek, On Mon, Sep 19, 2022 at 4:19 PM Marek Vasut wrote: > > The env_get() might be undefined in case ENV_SUPPORT is disabled, > which may happen e.g. in SPL. Add missing ifdef guard around the > env_get() to prevent build failure. Yes, this fixes a build failure when adding imx8mm-evk SDP SPL support, thanks: Tested-by: Fabio Estevam
Re: u-boot 2022-07 on STM32F746G-DISCO
Hi Simon, Simon Glass wrote, > Hi Waldemar, > > On Mon, 19 Sept 2022 at 13:48, Waldemar Brodkorb wrote: > > > > Hi again, > > > > Waldemar Brodkorb wrote, > > > > > Hi, > > > > > > I am trying to run u-boot on a STM32F746G-DISCO device. > > > I am configuring u-boot with stm32f746-disco_spl_defconfig. > > > > > > But nothing happens on the LCD nor on the serial console. > > > I use screen /dev/ttyACM0 115200 under Linux to connect. > > > > It seems my USB port on my laptop was buggy, after reboot I get > > following output via serial console: > > > > U-Boot SPL 2022.07 (Sep 19 2022 - 13:20:08 +0200) > > Trying to boot from XIP > > > > > > U-Boot 2022.07 (Sep 19 2022 - 13:20:08 +0200) > > > > Model: STMicroelectronics STM32F746-DISCO board > > DRAM: 8 MiB > > Hard fault > > pc : 080087d6lr : c05aa775xPSR : a100 > > r12 : 0010 r3 : 080087c1r2 : 0805344d > > r1 : 08008001r0 : c05aa000 > > Resetting CPU ... > > > > resetting ... > > > > I get a Hard fault. I then tried an older version of u-boot using > > the information from https://github.com/fdu/STM32F746G-disco_Buildroot > > as a hint. With U-Boot 2018.11 I get a working binary (I had to > > disable Falcon mode): > > > > U-Boot SPL 2018.11 (Sep 19 2022 - 13:41:50 +0200) > > Trying to boot from XIP > > > > > > U-Boot 2018.11 (Sep 19 2022 - 13:41:50 +0200) > > > > Model: STMicroelectronics STM32F746-DISCO board > > DRAM: 8 MiB > > Flash: 1 MiB > > MMC: sdio@40012c00: 0 > > In:serial > > Out: serial > > Err: serial > > usr button is at LOW LEVEL > > Net: > > Warning: ethernet@40028000 (eth0) using random MAC address - > > fe:f8:94:5f:5e:26 > > eth0: ethernet@40028000 > > Hit SPACE in 3 seconds to stop autoboot. > > Wrong Image Format for bootm command > > ERROR: can't get kernel image! > > U-Boot > > > > > Seems like a regression to me. > > Yes, can you use git bisect to find it? cd82f199852d88218e1f17f5ec07cdd9112a89c4 is the first bad commit. When I revert this commit on master I get: U-Boot SPL 2022.10-rc5-1-gdbcc7add19-dirty (Sep 20 2022 - 00:59:21 +0200) Trying to boot from XIP U-Boot 2022.10-rc5-1-gdbcc7add19-dirty (Sep 20 2022 - 00:59:21 +0200) Model: STMicroelectronics STM32F746-DISCO board DRAM: 8 MiB stm32fx_rcc_clock rcc@40023800: set_rate not implemented for clock index 4 stm32fx_rcc_clock rcc@40023800: set_rate not implemented for clock index 4 stm32fx_rcc_clock rcc@40023800: set_rate not implemented for clock index 4 Core: 38 devices, 22 uclasses, devicetree: separate Flash: 1 MiB MMC: sdio1@40012c00: 0 Loading Environment from nowhere... OK In:serial Out: serial Err: serial usr button is at LOW LEVEL Net: Warning: ethernet@40028000 (eth0) using random MAC address - 7e:cf:cf:fc:30:4a eth0: ethernet@40028000 Hit SPACE in 3 seconds to stop autoboot. MMC: no card present looks good without the problematic commit. best regards Waldemar
Re: [PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
Hi Marek, On 19/09/2022 16:41, Marek Vasut wrote: Enable DM USB, DM PHY and USB gadget support in imx8mm-mx8menlo SPL to let the board continue SDP loading of second stage after the first stage was loaded by BootROM SDP implementation. It is not possible to jump back into BootROM v1 and let the BootROM implementation continue the SDP loading, all this has to be performed by the U-Boot CI HDRC controller driver and SDP protocol implementation, both of which fit into the SPL just barely. With this patch, it is possible to start both U-Boot SPL and U-Boot using e.g. uuu on this board as follows: $ uuu -brun spl flash.bin Signed-off-by: Marek Vasut This is great, I was able to test SPL SDP on an imx8mm-evk after applying these same changes to imx8mm-evk and reducing the SPL size. For the series: Reviewed-by: Fabio Estevam
Re: [PULL] u-boot-usb/master
On Mon, Sep 19, 2022 at 08:18:35PM +0200, Marek Vasut wrote: > Typo fix and unused driver removal. > > The following changes since commit 59f6141362cc28e6c0638f16ef6cdb024231e13f: > > imx8m*_venice_defconfig: fix default bootcmd (2022-09-19 08:53:50 -0400) > > are available in the Git repository at: > > git://source.denx.de/u-boot-usb.git master > > for you to fetch changes up to c34edb893aca45b81460fc6ce341b4304f08f0f3: > > usb: gadget: designware-udc: Drop the driver (2022-09-19 17:45:51 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v10 15/15] FWU: doc: Add documentation for the FWU feature
On Thu, 15 Sept 2022 at 03:16, Sughosh Ganu wrote: > diff --git a/doc/develop/uefi/fwu_updates.rst > b/doc/develop/uefi/fwu_updates.rst > new file mode 100644 > index 00..fad3fbb3a8 > --- /dev/null > +++ b/doc/develop/uefi/fwu_updates.rst > @@ -0,0 +1,165 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > +.. Copyright (c) 2022 Linaro Limited > + > +FWU Multi Bank Updates in U-Boot > + > + > +The FWU Multi Bank Update feature implements the firmware update > +mechanism described in the PSA Firmware Update for A-profile Arm > +Architecture specification [1]. Certain aspects of the Dependable > +Boot specification [2] are also implemented. The feature provides a > +mechanism to have multiple banks of updatable firmware images and for > +updating the firmware images on the non-booted bank. On a successful > +update, the platform boots from the updated bank on subsequent > +boot. The UEFI capsule-on-disk update feature is used for performing > +the actual updates of the updatable firmware images. > + > +The bookkeeping of the updatable images is done through a structure > +called metadata. Currently, the FWU metadata supports identification > +of images based on image GUIDs stored on a GPT partitioned storage > +media. There are plans to extend the metadata structure for non GPT > +partitioned devices as well. > + > +Accessing the FWU metadata is done through generic API's which are > +defined in a driver which complies with the U-Boot's driver model. A > +new uclass UCLASS_FWU_MDATA has been added for accessing the FWU > +metadata. Individual drivers can be added based on the type of storage > +media, and it's partitioning method. Details of the storage device > +containing the FWU metadata partitions are specified through a U-Boot > +specific device tree property `fwu-mdata-store`. Please refer to > +U-Boot `doc `__ > +for the device tree bindings. > + > +Enabling the FWU Multi Bank Update feature > +-- > + > +The feature can be enabled by specifying the following configs:: > + > +CONFIG_EFI_CAPSULE_ON_DISK=y > +CONFIG_EFI_CAPSULE_FIRMWARE_MANAGEMENT=y > +CONFIG_EFI_CAPSULE_FIRMWARE=y > +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y > + > +CONFIG_FWU_MULTI_BANK_UPDATE=y > +CONFIG_CMD_FWU_METADATA=y > +CONFIG_DM_FWU_MDATA=y > s/CONFIG_DM_FWU_MDATA/CONFIG_FWU_MDATA
Re: [PATCH] board_f: show_dram_config: Print also real DRAM size
Hi Pali, On Sun, 18 Sept 2022 at 13:30, Pali Rohár wrote: > > On Monday 12 September 2022 17:58:09 Sean Anderson wrote: > > You can use TEST_STATIC from test/export.h this case. > > Now I sent new patch version where I extended comment. > > I have still issue with test framework. Could you help me how to write > that unit test and run it? Scenario should really simple, just check > like this: > > sizes_near(87654321, 87654320) == true; > sizes_near(87654321, 1000) == false; I suggest copying something like test/lib/sscanf.c and then you can run it in sandbox with 'ut lib ' Regards, Simon
Re: u-boot 2022-07 on STM32F746G-DISCO
Hi Waldemar, On Mon, 19 Sept 2022 at 13:48, Waldemar Brodkorb wrote: > > Hi again, > > Waldemar Brodkorb wrote, > > > Hi, > > > > I am trying to run u-boot on a STM32F746G-DISCO device. > > I am configuring u-boot with stm32f746-disco_spl_defconfig. > > > > But nothing happens on the LCD nor on the serial console. > > I use screen /dev/ttyACM0 115200 under Linux to connect. > > It seems my USB port on my laptop was buggy, after reboot I get > following output via serial console: > > U-Boot SPL 2022.07 (Sep 19 2022 - 13:20:08 +0200) > Trying to boot from XIP > > > U-Boot 2022.07 (Sep 19 2022 - 13:20:08 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Hard fault > pc : 080087d6lr : c05aa775xPSR : a100 > r12 : 0010 r3 : 080087c1r2 : 0805344d > r1 : 08008001r0 : c05aa000 > Resetting CPU ... > > resetting ... > > I get a Hard fault. I then tried an older version of u-boot using > the information from https://github.com/fdu/STM32F746G-disco_Buildroot > as a hint. With U-Boot 2018.11 I get a working binary (I had to > disable Falcon mode): > > U-Boot SPL 2018.11 (Sep 19 2022 - 13:41:50 +0200) > Trying to boot from XIP > > > U-Boot 2018.11 (Sep 19 2022 - 13:41:50 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Flash: 1 MiB > MMC: sdio@40012c00: 0 > In:serial > Out: serial > Err: serial > usr button is at LOW LEVEL > Net: > Warning: ethernet@40028000 (eth0) using random MAC address - > fe:f8:94:5f:5e:26 > eth0: ethernet@40028000 > Hit SPACE in 3 seconds to stop autoboot. > Wrong Image Format for bootm command > ERROR: can't get kernel image! > U-Boot > > > Seems like a regression to me. Yes, can you use git bisect to find it? Regards, Simon
Re: u-boot 2022-07 on STM32F746G-DISCO
Hi Patrice, Patrice CHOTARD wrote, > Waldemar, > > You can applied the following series on current U-Boot master > branch (a0759684e015bd7252be3af508c0fcfdbb8ec5dc): > > https://patchwork.ozlabs.org/project/uboot/list/?series=318991 > I applied the patches on top of u-boot master and the non-SPL build still works fine. It seems only 2022.07 is broken, master is fine. The SPL build compiles, but I get no output via serial console after flashing. I changed the openocd command to use 0x8009000 for u-boot. /home/wbx/openadk/host_x86_64-linux-gnu/usr/bin/openocd \ -f interface/stlink.cfg -f board/stm32f7discovery.cfg \ -c "init" \ -c "reset init" \ -c "flash probe 0" \ -c "flash info 0" \ -c "flash write_image erase spl/u-boot-spl.bin 0x0800" \ -c "flash write_image erase u-boot-dtb.bin 0x08009000" \ -c "reset run" \ -c "shutdown" Is this change correct or do I misread your patches? BTW: Do you have a working Linux configuration file you can share with me? Which Linux version do you use on the device? best regards Waldemar
[RFC][PATCH] spl: Turn spl_board_init() into weak symbol
Make spl_board_init() a weak symbol and get rid of Kconfig symbols and ifdeffery guarding this function. Since the spl_board_init() is now a weak symbol, boards can either use the default implementation which is empty and gets inlined with zero text increase, or override the implementation with their own as needed. Signed-off-by: Marek Vasut --- Cc: Simon Glass Cc: Tom Rini --- common/spl/Kconfig| 7 --- common/spl/Kconfig.tpl| 7 --- common/spl/Kconfig.vpl| 7 --- common/spl/spl.c | 6 -- configs/alt_defconfig | 1 - configs/am64x_evm_a53_defconfig | 1 - configs/am64x_evm_r5_defconfig| 1 - configs/brppt2_defconfig | 1 - configs/cgtqmx8_defconfig | 1 - configs/cl-som-imx7_defconfig | 1 - configs/controlcenterdc_defconfig | 1 - configs/deneb_defconfig | 1 - configs/devkit3250_defconfig | 1 - configs/giedi_defconfig | 1 - configs/gose_defconfig| 1 - configs/gwventana_emmc_defconfig | 1 - configs/gwventana_gw5904_defconfig| 1 - configs/gwventana_nand_defconfig | 1 - configs/imx28_xea_defconfig | 1 - configs/imx28_xea_sb_defconfig| 1 - configs/imx6q_bosch_acc_defconfig | 1 - configs/imx8mm-cl-iot-gate-optee_defconfig| 1 - configs/imx8mm-cl-iot-gate_defconfig | 1 - configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 - configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 1 - configs/imx8mm-mx8menlo_defconfig | 1 - configs/imx8mm_beacon_defconfig | 1 - configs/imx8mm_evk_defconfig | 1 - configs/imx8mm_evk_fspi_defconfig | 1 - configs/imx8mn_beacon_2g_defconfig| 1 - configs/imx8mn_beacon_defconfig | 1 - configs/imx8mn_bsh_smm_s2_defconfig | 1 - configs/imx8mn_bsh_smm_s2pro_defconfig| 1 - configs/imx8mn_ddr4_evk_defconfig | 1 - configs/imx8mn_evk_defconfig | 1 - configs/imx8mn_var_som_defconfig | 1 - configs/imx8mp_evk_defconfig | 1 - configs/imx8mp_rsb3720a1_4G_defconfig | 1 - configs/imx8mp_rsb3720a1_6G_defconfig | 1 - configs/imx8mq_cm_defconfig | 1 - configs/imx8mq_evk_defconfig | 1 - configs/imx8mq_phanbell_defconfig | 1 - configs/imx8qm_mek_defconfig | 1 - configs/imx8qm_rom7720_a1_4G_defconfig| 1 - configs/imx8qxp_mek_defconfig | 1 - configs/imx8ulp_evk_defconfig | 1 - configs/imx93_11x11_evk_defconfig | 1 - configs/imxrt1020-evk_defconfig | 1 - configs/imxrt1050-evk_defconfig | 1 - configs/imxrt1170-evk_defconfig | 1 - configs/iot2050_defconfig | 1 - configs/j7200_evm_a72_defconfig | 1 - configs/j7200_evm_r5_defconfig| 1 - configs/j721e_evm_a72_defconfig | 1 - configs/j721e_evm_r5_defconfig| 1 - configs/j721e_hs_evm_a72_defconfig| 1 - configs/j721e_hs_evm_r5_defconfig | 1 - configs/j721s2_evm_a72_defconfig | 1 - configs/j721s2_evm_r5_defconfig | 1 - configs/koelsch_defconfig | 1 - configs/kontron-sl-mx8mm_defconfig| 1 - configs/kontron_sl28_defconfig| 1 - configs/lager_defconfig | 1 - configs/librem5_defconfig | 1 - configs/ls1043ardb_nand_defconfig | 1 - configs/ls1043ardb_sdcard_defconfig | 1 - configs/ls1046aqds_nand_defconfig | 1 - configs/ls1046aqds_sdcard_ifc_defconfig | 1 - configs/ls1046aqds_sdcard_qspi_defconfig | 1 - configs/ls1046ardb_emmc_defconfig | 1 - configs/ls1046ardb_qspi_spl_defconfig | 1 - configs/ls1046ardb_sdcard_defconfig | 1 - configs/m53menlo_defconfig| 1 - configs/mccmon6_nor_defconfig | 1 - configs/mccmon6_sd_defconfig | 1 - configs/microblaze-generic_defconfig | 1 - configs/opos6uldev_defconfig | 1 - configs/pcm058_defconfig | 1 - configs/phycore-imx8mp_defconfig | 1 - configs/pico-imx8mq_defconfig | 1 - configs/porter_defconfig | 1 - configs/sandbox_noinst_defconfig | 1 - configs/sandbox_spl_defconfig | 1 - configs/sandbox_vpl_defconfig | 1 - configs/silk_defconfig| 1 - configs/stm32746g-eval_spl_defconfig | 1 - configs/stm32f746-disco_spl_defc
[PATCH] gpio: Get rid of gpio_hog_probe_all()
The gpio_hog_probe_all() functionality can be perfectly well replaced by DM_FLAG_PROBE_AFTER_BIND DM flag, which would trigger .probe() callback of each GPIO hog driver instance after .bind() and thus configure the hogged GPIO accordingly. Signed-off-by: Marek Vasut --- Cc: Heinrich Schuchardt Cc: Samuel Holland Cc: Simon Glass --- common/board_r.c | 3 --- common/spl/spl.c | 3 --- doc/README.gpio| 6 ++ drivers/gpio/gpio-uclass.c | 25 ++--- include/asm-generic/gpio.h | 8 5 files changed, 4 insertions(+), 41 deletions(-) diff --git a/common/board_r.c b/common/board_r.c index 56eb60fa275..c556aa5a073 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -750,9 +750,6 @@ static init_fnc_t init_sequence_r[] = { initr_status_led, #endif /* PPC has a udelay(20) here dating from 2002. Why? */ -#if defined(CONFIG_GPIO_HOG) - gpio_hog_probe_all, -#endif #ifdef CONFIG_BOARD_LATE_INIT board_late_init, #endif diff --git a/common/spl/spl.c b/common/spl/spl.c index 29e0898f03d..683e0dfc526 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -770,9 +770,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2) } } - if (CONFIG_IS_ENABLED(GPIO_HOG)) - gpio_hog_probe_all(); - #if CONFIG_IS_ENABLED(BOARD_INIT) spl_board_init(); #endif diff --git a/doc/README.gpio b/doc/README.gpio index 548ff37b8cc..d253f654fad 100644 --- a/doc/README.gpio +++ b/doc/README.gpio @@ -2,10 +2,8 @@ GPIO hog (CONFIG_GPIO_HOG) -All the GPIO hog are initialized in gpio_hog_probe_all() function called in -board_r.c just before board_late_init() but you can also acces directly to -the gpio with gpio_hog_lookup_name(). - +All the GPIO hog are initialized using DM_FLAG_PROBE_AFTER_BIND DM flag +after bind(). Example, for the device tree: diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c index 0ed32b72170..32df0448a7b 100644 --- a/drivers/gpio/gpio-uclass.c +++ b/drivers/gpio/gpio-uclass.c @@ -315,34 +315,11 @@ static int gpio_hog_probe(struct udevice *dev) return 0; } -int gpio_hog_probe_all(void) -{ - struct udevice *dev; - int ret; - int retval = 0; - - for (uclass_first_device(UCLASS_NOP, &dev); -dev; -uclass_find_next_device(&dev)) { - if (dev->driver == DM_DRIVER_GET(gpio_hog)) { - ret = device_probe(dev); - if (ret) { - printf("Failed to probe device %s err: %d\n", - dev->name, ret); - retval = ret; - } - } - } - - return retval; -} - int gpio_hog_lookup_name(const char *name, struct gpio_desc **desc) { struct udevice *dev; *desc = NULL; - gpio_hog_probe_all(); if (!uclass_get_device_by_name(UCLASS_NOP, name, &dev)) { struct gpio_hog_priv *priv = dev_get_priv(dev); @@ -1503,6 +1480,8 @@ static int gpio_post_bind(struct udevice *dev) &child); if (ret) return ret; + + dev_or_flags(child, DM_FLAG_PROBE_AFTER_BIND); } } } diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h index 81f63f06f15..e56d3777ae5 100644 --- a/include/asm-generic/gpio.h +++ b/include/asm-generic/gpio.h @@ -460,14 +460,6 @@ int dm_gpio_lookup_name(const char *name, struct gpio_desc *desc); */ int gpio_hog_lookup_name(const char *name, struct gpio_desc **desc); -/** - * gpio_hog_probe_all() - probe all gpio devices with - * gpio-hog subnodes. - * - * @return:Returns return value from device_probe() - */ -int gpio_hog_probe_all(void); - /** * gpio_lookup_name - Look up a GPIO name and return its details * -- 2.35.1
[PATCH 4/4] ARM: dts: imx8m: imx8mm-mx8menlo: Enable SPL SDP support
Enable DM USB, DM PHY and USB gadget support in imx8mm-mx8menlo SPL to let the board continue SDP loading of second stage after the first stage was loaded by BootROM SDP implementation. It is not possible to jump back into BootROM v1 and let the BootROM implementation continue the SDP loading, all this has to be performed by the U-Boot CI HDRC controller driver and SDP protocol implementation, both of which fit into the SPL just barely. With this patch, it is possible to start both U-Boot SPL and U-Boot using e.g. uuu on this board as follows: $ uuu -brun spl flash.bin Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Marcel Ziswiler Cc: Max Krummenacher Cc: Peng Fan Cc: Stefano Babic --- arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi | 20 configs/imx8mm-mx8menlo_defconfig| 17 - 2 files changed, 36 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi index 484d493e33c..7f5f8c384e8 100644 --- a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi @@ -17,6 +17,26 @@ }; }; +&aips4 { + u-boot,dm-spl; +}; + &i2c4 { /delete-node/ codec@1a; }; + +®_usb_otg1_vbus { + u-boot,dm-spl; +}; + +&usbmisc1 { + u-boot,dm-spl; +}; + +&usbphynop1 { + u-boot,dm-spl; +}; + +&usbotg1 { + u-boot,dm-spl; +}; diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 929ff382f27..ad6885942d3 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -50,6 +50,9 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300 CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y +CONFIG_SPL_USB_HOST=y +CONFIG_SPL_USB_GADGET=y +CONFIG_SPL_USB_SDP_SUPPORT=y CONFIG_SPL_WATCHDOG=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=2048 @@ -65,6 +68,8 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_USB=y +CONFIG_CMD_USB_SDP=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_CACHE=y CONFIG_CMD_UUID=y @@ -106,6 +111,8 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_FEC_MXC=y CONFIG_MII=y +CONFIG_SPL_PHY=y +CONFIG_SPL_NOP_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y @@ -125,7 +132,15 @@ CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_USB=y -# CONFIG_SPL_DM_USB is not set CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y +# CONFIG_USB_STORAGE is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Menlo" +CONFIG_USB_GADGET_VENDOR_NUM=0x0525 +CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 +CONFIG_CI_UDC=y +CONFIG_SDP_LOADADDR=0x4040 +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_IMX_WATCHDOG=y CONFIG_OF_LIBFDT_OVERLAY=y -- 2.35.1
[PATCH 3/4] ARM: imx8m: verdin-imx8mm: Drop bogus content from spl_board_init()
The current implementation of spl_board_init() USB boot handling is not correct, the MX8MM BootROM v1 does not support SDP load when re-entered from U-Boot SPL, it is up to U-Boot to perform the next stage load using its own internal CI gadget driver and SDP protocol implementation. Drop the spl_board_init() to let SPL continue with normal load in case the SDP support is enabled. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Marcel Ziswiler Cc: Max Krummenacher Cc: Peng Fan Cc: Stefano Babic --- board/toradex/verdin-imx8mm/spl.c | 7 --- 1 file changed, 7 deletions(-) diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c index 59a3d9e0cae..210665bd6a9 100644 --- a/board/toradex/verdin-imx8mm/spl.c +++ b/board/toradex/verdin-imx8mm/spl.c @@ -54,13 +54,6 @@ void spl_dram_init(void) void spl_board_init(void) { arch_misc_init(); - - /* Serial download mode */ - if (is_usb_boot()) { - puts("Back to ROM, SDP\n"); - restore_boot_params(); - } - puts("Normal Boot\n"); } #ifdef CONFIG_SPL_LOAD_FIT -- 2.35.1
[PATCH 2/4] ARM: imx8m: phycore_imx8mm: Drop bogus spl_board_init()
The current implementation of spl_board_init() is not correct, the MX8MM BootROM v1 does not support SDP load when re-entered from U-Boot SPL, it is up to U-Boot to perform the next stage load using its own internal CI gadget driver and SDP protocol implementation. Drop the spl_board_init() to let SPL continue with normal load in case the SDP support is enabled. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Cc: Teresa Remmet --- board/phytec/phycore_imx8mm/spl.c | 10 -- configs/phycore-imx8mm_defconfig | 1 - 2 files changed, 11 deletions(-) diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c index d87ab6d4497..1bae9b1170d 100644 --- a/board/phytec/phycore_imx8mm/spl.c +++ b/board/phytec/phycore_imx8mm/spl.c @@ -42,16 +42,6 @@ static void spl_dram_init(void) ddr_init(&dram_timing); } -void spl_board_init(void) -{ - /* Serial download mode */ - if (is_usb_boot()) { - puts("Back to ROM, SDP\n"); - restore_boot_params(); - } - puts("Normal Boot\n"); -} - int board_fit_config_name_match(const char *name) { return 0; diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index 9b8c09a73ab..e8d7905bb4a 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -30,7 +30,6 @@ CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x91 CONFIG_SPL_BSS_MAX_SIZE=0x2000 -CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_STACK=0x92 CONFIG_SYS_SPL_MALLOC=y -- 2.35.1
[PATCH 1/4] ARM: imx8m: Deduplicate CAAM init with arch_misc_init() call
Instead of duplicating code implemented by i.MX8M version of arch_misc_init() in every board, enable CONFIG_ARCH_MISC_INIT and call arch_misc_init() from spl_board_init(). This removes the duplication. No functional change. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Frieder Schrempf Cc: Marcel Ziswiler Cc: Max Krummenacher Cc: Peng Fan Cc: Stefano Babic Cc: Teresa Remmet --- board/freescale/imx8mm_evk/spl.c | 10 +- board/freescale/imx8mn_evk/spl.c | 7 ++- board/freescale/imx8mp_evk/spl.c | 8 +--- board/kontron/sl-mx8mm/spl.c | 6 +- board/toradex/verdin-imx8mm/spl.c | 9 + configs/imx8mm-mx8menlo_defconfig | 1 + configs/imx8mm_evk_defconfig | 1 + configs/imx8mm_evk_fspi_defconfig | 1 + configs/imx8mp_evk_defconfig | 1 + configs/kontron-sl-mx8mm_defconfig | 1 + configs/verdin-imx8mm_defconfig| 1 + 11 files changed, 12 insertions(+), 34 deletions(-) diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index e2eb1426c83..e0e97c7fd9a 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -53,15 +53,7 @@ static void spl_dram_init(void) void spl_board_init(void) { - if (IS_ENABLED(CONFIG_FSL_CAAM)) { - struct udevice *dev; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); - if (ret) - printf("Failed to initialize caam_jr: %d\n", ret); - } - puts("Normal Boot\n"); + arch_misc_init(); } #ifdef CONFIG_SPL_LOAD_FIT diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c index c0bfb67199a..380abecd746 100644 --- a/board/freescale/imx8mn_evk/spl.c +++ b/board/freescale/imx8mn_evk/spl.c @@ -49,11 +49,8 @@ void spl_board_init(void) struct udevice *dev; int ret; - if (IS_ENABLED(CONFIG_FSL_CAAM)) { - ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); - if (ret) - printf("Failed to initialize caam_jr: %d\n", ret); - } + arch_misc_init(); + puts("Normal Boot\n"); ret = uclass_get_device_by_name(UCLASS_CLK, diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index 719b1f6d7da..f1b285417d0 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -37,14 +37,8 @@ void spl_dram_init(void) void spl_board_init(void) { - if (IS_ENABLED(CONFIG_FSL_CAAM)) { - struct udevice *dev; - int ret; + arch_misc_init(); - ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); - if (ret) - printf("Failed to initialize caam_jr: %d\n", ret); - } /* * Set GIC clock to 500Mhz for OD VDD_SOC. Kernel driver does * not allow to change it. Should set the clock after PMIC diff --git a/board/kontron/sl-mx8mm/spl.c b/board/kontron/sl-mx8mm/spl.c index 09f81351dd4..b884c91aef9 100644 --- a/board/kontron/sl-mx8mm/spl.c +++ b/board/kontron/sl-mx8mm/spl.c @@ -205,11 +205,7 @@ void spl_board_init(void) struct udevice *dev; int ret; - if (IS_ENABLED(CONFIG_FSL_CAAM)) { - ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); - if (ret) - printf("Failed to initialize %s: %d\n", dev->name, ret); - } + arch_misc_init(); puts("Normal Boot\n"); diff --git a/board/toradex/verdin-imx8mm/spl.c b/board/toradex/verdin-imx8mm/spl.c index fb9aae6c9c8..59a3d9e0cae 100644 --- a/board/toradex/verdin-imx8mm/spl.c +++ b/board/toradex/verdin-imx8mm/spl.c @@ -53,14 +53,7 @@ void spl_dram_init(void) void spl_board_init(void) { - if (IS_ENABLED(CONFIG_FSL_CAAM)) { - struct udevice *dev; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(caam_jr), &dev); - if (ret) - printf("Failed to initialize %s: %d\n", dev->name, ret); - } + arch_misc_init(); /* Serial download mode */ if (is_usb_boot()) { diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index 702162f86de..929ff382f27 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -34,6 +34,7 @@ CONFIG_DEFAULT_FDT_FILE="imx8mm-mx8menlo.dtb" CONFIG_LOG=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x91 diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 7bcedcd51f5..58b5e468a58 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -23,6 +23
[PATCH v2] ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlock
Pull this LPGPR unlock into common code, since it is used in multiple systems already. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Cc: Ye Li Cc: uboot-imx --- V2: Reinstate empty board_init() in DM eDM SBC board to fix build error --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 5 + arch/arm/mach-imx/imx8m/soc.c | 12 .../imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c | 17 - .../dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c | 17 - board/menlo/mx8menlo/mx8menlo.c | 17 - 5 files changed, 17 insertions(+), 51 deletions(-) diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index ff3b9ddd9f7..29d5baaab8b 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -27,6 +27,7 @@ #define IOMUXC_GPR_BASE_ADDR 0x3034 #define OCOTP_BASE_ADDR0x3035 #define ANATOP_BASE_ADDR 0x3036 +#define SNVS_BASE_ADDR 0x3037 #define CCM_BASE_ADDR 0x3038 #define SRC_BASE_ADDR 0x3039 #define GPC_BASE_ADDR 0x303A @@ -113,6 +114,10 @@ #define SRC_DDR1_RCR_CORE_RESET_N_MASK BIT(1) #define SRC_DDR1_RCR_PRESET_N_MASK BIT(0) +#define SNVS_LPSR 0x4c +#define SNVS_LPLVDR0x64 +#define SNVS_LPPGDR_INIT 0x41736166 + struct iomuxc_gpr_base_regs { u32 gpr[47]; }; diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index d115b25a5b6..5739546c022 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -544,6 +544,16 @@ static int imx8m_check_clock(void *ctx, struct event *event) } EVENT_SPY(EVT_DM_POST_INIT, imx8m_check_clock); +static void imx8m_setup_snvs(void) +{ + /* Enable SNVS clock */ + clock_enable(CCGR_SNVS, 1); + /* Initialize glitch detect */ + writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); + /* Clear interrupt status */ + writel(0x, SNVS_BASE_ADDR + SNVS_LPSR); +} + int arch_cpu_init(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; @@ -594,6 +604,8 @@ int arch_cpu_init(void) writel(0x200, &ocotp->ctrl_clr); } + imx8m_setup_snvs(); + return 0; } diff --git a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c index 6dc4e6a9a2b..dc0883002c8 100644 --- a/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c +++ b/board/data_modul/imx8mm_edm_sbc/imx8mm_data_modul_edm_sbc.c @@ -34,22 +34,6 @@ int board_phys_sdram_size(phys_size_t *size) return 0; } -/* IMX8M SNVS registers needed for the bootcount functionality */ -#define SNVS_BASE_ADDR 0x3037 -#define SNVS_LPSR 0x4c -#define SNVS_LPLVDR0x64 -#define SNVS_LPPGDR_INIT 0x41736166 - -static void setup_snvs(void) -{ - /* Enable SNVS clock */ - clock_enable(CCGR_SNVS, 1); - /* Initialize glitch detect */ - writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); - /* Clear interrupt status */ - writel(0x, SNVS_BASE_ADDR + SNVS_LPSR); -} - static void setup_mac_address(void) { unsigned char enetaddr[6]; @@ -99,7 +83,6 @@ static void setup_boot_device(void) int board_init(void) { - setup_snvs(); return 0; } diff --git a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c index 6f06daf86f7..9d8e19d994a 100644 --- a/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c +++ b/board/dhelectronics/dh_imx8mp/imx8mp_dhcom_pdk2.c @@ -37,22 +37,6 @@ int board_phys_sdram_size(phys_size_t *size) return 0; } -/* IMX8M SNVS registers needed for the bootcount functionality */ -#define SNVS_BASE_ADDR 0x3037 -#define SNVS_LPSR 0x4c -#define SNVS_LPLVDR0x64 -#define SNVS_LPPGDR_INIT 0x41736166 - -static void setup_snvs(void) -{ - /* Enable SNVS clock */ - clock_enable(CCGR_SNVS, 1); - /* Initialize glitch detect */ - writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); - /* Clear interrupt status */ - writel(0x, SNVS_BASE_ADDR + SNVS_LPSR); -} - static void setup_eqos(void) { struct iomuxc_gpr_base_regs *gpr = @@ -145,7 +129,6 @@ int board_init(void) { setup_eqos(); setup_fec(); - setup_snvs(); return 0; } diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c index 9d3708a3637..61fc4ec85f0 100644 --- a/board/menlo/mx8menlo/mx8menlo.c +++ b/board/menlo/mx8menlo/mx8menlo.c @@ -12,24 +12,7 @@ #include #include -#define SNVS_BASE_ADDR
[PATCH] ARM: dts: imx8mm: Swap i.MX8M Mini Menlo board UARTs back
The first production revision of the MX8M Mini Menlo board implements a hardware change which swaps console UART and another UART connector. Implement the swap, which maps the console UART back to the way Verdin console is mapped. Signed-off-by: Marek Vasut --- Cc: Fabio Estevam Cc: Marcel Ziswiler Cc: Max Krummenacher Cc: Peng Fan Cc: Stefano Babic --- arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi | 18 +- board/menlo/mx8menlo/mx8menlo.c | 2 +- include/configs/imx8mm-mx8menlo.h| 2 +- 3 files changed, 3 insertions(+), 19 deletions(-) diff --git a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi index 66cc97842c0..484d493e33c 100644 --- a/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-mx8menlo-u-boot.dtsi @@ -6,7 +6,7 @@ / { chosen { - stdout-path = &uart2; + stdout-path = &uart1; }; aliases { @@ -20,19 +20,3 @@ &i2c4 { /delete-node/ codec@1a; }; - -&pinctrl_uart1 { - /delete-property/ u-boot,dm-spl; -}; - -&pinctrl_uart2 { - u-boot,dm-spl; -}; - -&uart1 { - /delete-property/ u-boot,dm-spl; -}; - -&uart2 { - u-boot,dm-spl; -}; diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c index 61fc4ec85f0..18f5fd5c5ee 100644 --- a/board/menlo/mx8menlo/mx8menlo.c +++ b/board/menlo/mx8menlo/mx8menlo.c @@ -14,5 +14,5 @@ void board_early_init(void) { - init_uart_clk(1); + init_uart_clk(0); } diff --git a/include/configs/imx8mm-mx8menlo.h b/include/configs/imx8mm-mx8menlo.h index 530ecd1d460..938c5406b82 100644 --- a/include/configs/imx8mm-mx8menlo.h +++ b/include/configs/imx8mm-mx8menlo.h @@ -25,7 +25,7 @@ "fi ; " \ "boot\0"\ "boot_file=fitImage\0" \ - "console=ttymxc1\0" \ + "console=ttymxc0\0" \ "fdt_addr=0x4300\0" \ "initrd_addr=0x4380\0" \ "kernel_image=fitImage\0" -- 2.35.1
[PATCH] usb: Add missing guard around env_get() in usb_hub
The env_get() might be undefined in case ENV_SUPPORT is disabled, which may happen e.g. in SPL. Add missing ifdef guard around the env_get() to prevent build failure. Signed-off-by: Marek Vasut --- Cc: Simon Glass Cc: Tom Rini --- common/usb_hub.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/common/usb_hub.c b/common/usb_hub.c index d73638950b9..95f1449b5cb 100644 --- a/common/usb_hub.c +++ b/common/usb_hub.c @@ -168,7 +168,7 @@ static void usb_hub_power_on(struct usb_hub_device *hub) int i; struct usb_device *dev; unsigned pgood_delay = hub->desc.bPwrOn2PwrGood * 2; - const char *env; + const char __maybe_unused *env; dev = hub->pusb_dev; @@ -193,10 +193,12 @@ static void usb_hub_power_on(struct usb_hub_device *hub) * but allow this time to be increased via env variable as some * devices break the spec and require longer warm-up times */ +#if CONFIG_IS_ENABLED(ENV_SUPPORT) env = env_get("usb_pgood_delay"); if (env) pgood_delay = max(pgood_delay, (unsigned)simple_strtol(env, NULL, 0)); +#endif debug("pgood_delay=%dms\n", pgood_delay); /* -- 2.35.1
[PATCH] cmd: pxe: add alias devicetree-overlay for fdtoverlays
This adds keyword devicetree-overlay as an alias for fdtoverlays in extlinux (sysboot) and pxe to better follow the Boot Loader Specification, improves documentation around them by adding an example for both fdtoverlays and devicetree-overlay and the environment variable required for this feature. Signed-off-by: Edoardo Tomelleri --- boot/pxe_utils.c | 2 ++ doc/README.pxe | 4 doc/develop/distro.rst | 26 ++ 3 files changed, 32 insertions(+) diff --git a/boot/pxe_utils.c b/boot/pxe_utils.c index a364fa8bb5..d5c215ae2c 100644 --- a/boot/pxe_utils.c +++ b/boot/pxe_utils.c @@ -380,6 +380,7 @@ err: /** * label_boot_fdtoverlay() - Loads fdt overlays specified in 'fdtoverlays' + * or 'devicetree-overlay' * * @ctx: PXE context * @label: Label to process @@ -809,6 +810,7 @@ static const struct token keywords[] = { {"devicetreedir", T_FDTDIR}, {"fdtdir", T_FDTDIR}, {"fdtoverlays", T_FDTOVERLAYS}, + {"devicetree-overlay", T_FDTOVERLAYS}, {"ontimeout", T_ONTIMEOUT,}, {"ipappend", T_IPAPPEND,}, {"background", T_BACKGROUND,}, diff --git a/doc/README.pxe b/doc/README.pxe index 75caa01c4a..14aa078d52 100644 --- a/doc/README.pxe +++ b/doc/README.pxe @@ -163,6 +163,8 @@ fdtoverlays [...] - if this label is chosen, use tftp to retrieve the DT and then applied in the load order to the fdt blob stored at the address indicated in the fdt_addr_r environment variable. +devicetree-overlay [...] - alias for fdtoverlays, see above. + kaslrseed - set this label to request random number from hwrng as kaslr seed. append - use as the kernel command line when booting this @@ -178,6 +180,8 @@ fdt - if this label is chosen, use tftp to retrieve the fdt blob the fdt_addr_r environment variable, and that address will be passed to bootm. +devicetree- alias for fdt, see above. + fdtdir - if this label is chosen, use tftp to retrieve a fdt blob relative to . If the fdtfile environment variable is set, / is retrieved. Otherwise, the diff --git a/doc/develop/distro.rst b/doc/develop/distro.rst index 3ee3dac6a2..920e173548 100644 --- a/doc/develop/distro.rst +++ b/doc/develop/distro.rst @@ -81,6 +81,8 @@ as specified at BootLoaderSpec_: * Does not document the fdtdir option, which automatically selects the DTB to pass to the kernel. +See also doc/README.pxe under 'pxe file format'. + One example extlinux.conf generated by the Fedora installer is:: # extlinux.conf generated by anaconda @@ -115,6 +117,25 @@ One example extlinux.conf generated by the Fedora installer is:: fdtdir /boot/dtb-3.16.0-0.rc6.git1.1.fc22.armv7hl+lpae +One example of hand-crafted extlinux.conf:: + + menu title Select kernel + timeout 100 + + label Arch with uart devicetree overlay + kernel /arch/Image.gz + initrd /arch/initramfs-linux.img + fdt /dtbs/arch/board.dtb + fdtoverlays /dtbs/arch/overlay/uart0-gpio0-1.dtbo + append console=ttyS0,115200 console=tty1 rw root=UUID=fc0d0284-ca84-4194-bf8a-4b9da8d66908 + + label Arch with uart devicetree overlay but with Boot Loader Specification keys + kernel /arch/Image.gz + initrd /arch/initramfs-linux.img + devicetree /dtbs/arch/board.dtb + devicetree-overlay /dtbs/arch/overlay/uart0-gpio0-1.dtbo + append console=ttyS0,115200 console=tty1 rw root=UUID=fc0d0284-ca84-4194-bf8a-4b9da8d66908 + Another hand-crafted network boot configuration file is:: TIMEOUT 100 @@ -214,6 +235,11 @@ fdt_addr_r: A size of 1MB for the FDT/DTB seems reasonable. +fdtoverlay_addr_r: + Mandatory. The location in RAM where DTB overlays will be temporarily + stored and then applied in the load order to the fdt blob stored at the + address indicated in the fdt_addr_r environment variable. + fdtfile: Mandatory. the name of the DTB file for the specific board for instance the espressobin v5 board the value is "marvell/armada-3720-espressobin.dtb" -- 2.37.3
Re: [PATCH] cmd: fdt: Add support for reading stringlist property values
On 7/17/22 10:12, Simon Glass wrote: Hi Marek, Hi, [...] Applied to u-boot-dm, thanks! This patch is still not in u-boot/master ?
[PULL] u-boot-usb/master
Typo fix and unused driver removal. The following changes since commit 59f6141362cc28e6c0638f16ef6cdb024231e13f: imx8m*_venice_defconfig: fix default bootcmd (2022-09-19 08:53:50 -0400) are available in the Git repository at: git://source.denx.de/u-boot-usb.git master for you to fetch changes up to c34edb893aca45b81460fc6ce341b4304f08f0f3: usb: gadget: designware-udc: Drop the driver (2022-09-19 17:45:51 +0200) Fabio Estevam (1): usb: Kconfig: Fix typo in SPL_DM_USB text Marek Vasut (1): usb: gadget: designware-udc: Drop the driver drivers/serial/usbtty.h |2 - drivers/usb/Kconfig |2 +- drivers/usb/gadget/Makefile |1 - drivers/usb/gadget/designware_udc.c | 1021 include/usb/designware_udc.h| 183 -- 5 files changed, 1 insertion(+), 1208 deletions(-) delete mode 100644 drivers/usb/gadget/designware_udc.c delete mode 100644 include/usb/designware_udc.h
[ANN] U-Boot v2022.10-rc5 released
Hey all, It's release day and so here's v2022.10-rc5. Probably a bit bigger of a set of updates than I really would have preferred, but they're all contained within specific SoCs / arches and tested by their respective custodians. I really do hope for fairly wide testing of this rc as well as minimal changes on top. In terms of a changelog, git log --merges v2022.10-rc4..v2022.10-rc5 contains what I've pulled but as always, better PR messages and tags will provide better results here. As I was reminded on IRC recently, I haven't merged master in to next since it opened, so I will take care of that today. Things are looking on track for release to be two weeks from today on October 3rd, 2022. Thanks all! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/2] dt-bindings: mtd: partitions: add binding for U-Boot bootloader
On Mon, 2022-07-11 at 15:30:40 UTC, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= wrote: > From: Rafał Miłecki > > Right now there is no (known) real reason for a custom binding for > standard U-Boot partitions. Broadcom's U-Boot however requires extra > handling - looking for environment variables subblocks. This commit adds > Broadcom specific binding. > > Signed-off-by: Rafał Miłecki > Reviewed-by: Rob Herring Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/next, thanks. Miquel
Re: [PATCH 2/2] mtd: parsers: add Broadcom's U-Boot parser
On Mon, 2022-07-11 at 15:30:41 UTC, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= wrote: > From: Rafał Miłecki > > Broadcom stores environment variables blocks inside U-Boot partition > itself. This driver finds & registers them. > > Signed-off-by: Rafał Miłecki Applied to https://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux.git mtd/next, thanks. Miquel
Re: [PATCH v3 3/3] i2c: stm32: do not set the STOP condition on error
Hi Jorge, On 9/12/22 10:35, Jorge Ramirez-Ortiz, Foundries wrote: On 12/09/22, Patrick DELAUNAY wrote: Hi Alain, On 9/9/22 18:06, Alain Volmat wrote: Current function stm32_i2c_message_xfer is sending a STOP whatever the result of the transaction is. This can cause issues such as making the bus busy since the controller itself is already sending automatically a STOP when a NACK is generated. Thanks to Jorge Ramirez-Ortiz for diagnosing and proposing a first fix for this. [1] [1] https://lore.kernel.org/u-boot/20220815145211.31342-2-jo...@foundries.io/ Reported-by: Jorge Ramirez-Ortiz, Foundries Signed-off-by: Jorge Ramirez-Ortiz Signed-off-by: Alain Volmat --- drivers/i2c/stm32f7_i2c.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c index 0ec67b5c12..2db7f44d44 100644 --- a/drivers/i2c/stm32f7_i2c.c +++ b/drivers/i2c/stm32f7_i2c.c @@ -483,9 +483,9 @@ static int stm32_i2c_message_xfer(struct stm32_i2c_priv *i2c_priv, } } - /* End of transfer, send stop condition */ - mask = STM32_I2C_CR2_STOP; - setbits_le32(®s->cr2, mask); + /* End of transfer, send stop condition if appropriate */ + if (!ret && !(status & (STM32_I2C_ISR_NACKF | STM32_I2C_ISR_ERRORS))) + setbits_le32(®s->cr2, STM32_I2C_CR2_STOP); return stm32_i2c_check_end_of_message(i2c_priv); } Reviewed-by: Patrick Delaunay Tested-by: Patrick Delaunay [stm32mp157c-dk2] No regression detection on ST Microelectonics board. - No error trace on boot - I2C probe command is OK STM32MP> i2c probe Valid chip addresses: 28 33 - And other tests done with the 2 I2C devices STPMIC1 & STUSB1600 are ok: regulalor command pmic status command USB type C connection/deconnection @Jorge: can you test also for your use-case, thanks yes I did test a few hours ago and it is good on my end. can add my tested tag if needed Tested-by: Jorge Ramirez-Ortiz Thanks for the test but sorry I don't see your message when I made my pull request for v2022.10-rc5 so I don't add your tag "Tested-by" when I merge this commit in serie V4. btw I also sent a patch to fix the way some dts properties are handled. shall I submit separately or will it be includeed in this set? Yes pushed by Alain in V4 = http://patchwork.ozlabs.org/project/uboot/list/?series=317940&state=* See[v4,4/4] i2c: stm32: fix usage of rise/fall device tree properties http://patchwork.ozlabs.org/project/uboot/patch/20220912084201.1826979-5-alain.vol...@foss.st.com/ it is part of my last pull request = u-boot-stm32-20220915 it is now merged in master branch and part of the next v2022.10-rc5 Thanks Patrick
Re: [PATCH] imx8m*_venice_defconfig: fix default bootcmd
On Thu, Sep 08, 2022 at 09:11:13AM -0700, Tim Harvey wrote: > commit 970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig") > had an unintended side effect of resulting in a bootcmd env var change > for boards like venice that did not have CONFIG_USE_BOOTCOMMAND defined > and relied on it being defaulted in include/config_distro_bootcmd.h. > Following that patch it instead got defaulted in tools/env/fw_env_private.h > > Fix this by enabling CONFIG_USE_BOOTCOMMAND for venice. > > Fixes: commit 970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig") > Signed-off-by: Tim Harvey Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: Pull request: u-boot-imx u-boot-imx-20220919
On Mon, Sep 19, 2022 at 02:35:01PM +0200, Stefano Babic wrote: > Hi Tom, > > please pull from u-boot-imx, thanks! > > The following changes since commit 1977d72a69f3c8d97bd25a86a6be4da27cde3724: > > Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2022-09-18 > 08:27:23 -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git > tags/u-boot-imx-20220919 > > for you to fetch changes up to cc74cab86a5f32db93a9f0dc7bc46fa5e83f4f3e: > > bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards (2022-09-18 22:56:18 > +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] configs: stm32mp*: reset via CONFIG_RESET_SCMI
Hi, On 9/5/22 19:01, Oleksandr Suvorov wrote: Jorge, I think, renaming the patch to "fix" and adding a field "Fixes:" should help accept it faster. On Mon, Sep 5, 2022 at 7:32 PM Jorge Ramirez-Ortiz, Foundries wrote: On 30/08/22, Jorge Ramirez-Ortiz wrote: Enabling CONFIG_SYSRESET_PSCI prevents CONFIG_RESET_SCMI from executing. The side effect observed are I2C devices no longer being accessible from U-boot after a soft reset. I think this PR should get a bit more of attention. The current reset configuration is broken, this is a fix. Do I need to rename the PR? TIA jorge Signed-off-by: Jorge Ramirez-Ortiz --- configs/stm32mp13_defconfig | 1 - configs/stm32mp15_defconfig | 1 - configs/stm32mp15_trusted_defconfig | 1 - 3 files changed, 3 deletions(-) diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index 673b468d31..44cee2e656 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -69,7 +69,6 @@ CONFIG_RNG_OPTEE=y CONFIG_DM_RTC=y CONFIG_RTC_STM32=y CONFIG_SERIAL_RX_BUFFER=y -CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index e5a2996c2c..2ad02f3652 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -133,7 +133,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y -CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index e14668042f..9e24e82920 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -134,7 +134,6 @@ CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_STM32_QSPI=y CONFIG_STM32_SPI=y -CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set -- 2.34.1 This patch it is superseded by "configs: stm32mp*: fix system reset" http://patchwork.ozlabs.org/project/uboot/list/?series=316914&state=* http://patchwork.ozlabs.org/project/uboot/patch/20220905173357.2231466-1-jo...@foundries.io/ with the added "Fixes:" Regards Patrick
[PATCH v4] tee: optee: rework TA bus scanning code
Hi Simon, On 9/12/22 20:31, Simon Glass wrote: Hi Ilias, On Wed, 7 Sept 2022 at 15:32, Ilias Apalodimas wrote: Hi Simon, On Thu, 8 Sept 2022 at 00:11, Simon Glass wrote: Hi Ilias, On Tue, 6 Sept 2022 at 15:23, Ilias Apalodimas wrote: Hi Simon, On Tue, Sep 06, 2022 at 03:18:28PM -0600, Simon Glass wrote: Hi, On Tue, 6 Sept 2022 at 03:37, Ilias Apalodimas wrote: Late versions of OP-TEE support a pseudo bus. TAs that behave as hardware blocks (e.g TPM, RNG etc) present themselves on a bus whichwe can scan. Unfortunately U-Boot doesn't support that yet. It's worth noting that we already have a workaround for RNG. The details are in commit 70812bb83da6 ("tee: optee: bind rng optee driver") So let's add a list of devices based on U-Boot Kconfig options that we will scan until we properly implement the tee-bus functionality. While at it change the behaviour of the tee core itself wrt to device binding. If some device binding fails, print a warning instead of disabling OP-TEE. Signed-off-by: Ilias Apalodimas Reviewed-by: Jens Wiklander Reviewed-by: Etienne Carriere --- Changes since v3: - Use NULL instead of a child ptr on device_bind_driver(), since it's not really needed - Changed the style of the optee_bus_probe[] definition to {.drv_name = xxx, .dev_name = yyy } Changes since v2: - Fixed typo on driver name ftpm-tee -> ftpm_tee Changes since v1: - remove a macro and use ARRAY_SIZE directly drivers/tee/optee/core.c | 24 +++- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c index a89d62aaf0b3..c201a4635e6b 100644 --- a/drivers/tee/optee/core.c +++ b/drivers/tee/optee/core.c @@ -31,6 +31,18 @@ struct optee_pdata { optee_invoke_fn *invoke_fn; }; +static const struct { + const char *drv_name; + const char *dev_name; +} optee_bus_probe[] = { +#ifdef CONFIG_RNG_OPTEE + { .drv_name = "optee-rng", .dev_name = "optee-rng" }, +#endif +#ifdef CONFIG_TPM2_FTPM_TEE + { .drv_name = "ftpm_tee", .dev_name = "ftpm_tee" }, +#endif +}; + struct rpc_param { u32 a0; u32 a1; @@ -642,8 +654,7 @@ static int optee_probe(struct udevice *dev) { struct optee_pdata *pdata = dev_get_plat(dev); u32 sec_caps; - struct udevice *child; - int ret; + int ret, i; if (!is_optee_api(pdata->invoke_fn)) { dev_err(dev, "OP-TEE api uid mismatch\n"); @@ -672,10 +683,13 @@ static int optee_probe(struct udevice *dev) * in U-Boot, the discovery of TA on the TEE bus is not supported: * only bind the drivers associated to the supported OP-TEETA */ - if (IS_ENABLED(CONFIG_RNG_OPTEE)) { - ret = device_bind_driver(dev, "optee-rng", "optee-rng", &child); + + for (i = 0; i < ARRAY_SIZE(optee_bus_probe); i++) { + ret = device_bind_driver(dev, optee_bus_probe[i].drv_name, + optee_bus_probe[i].dev_name, NULL); if (ret) - return ret; + dev_warn(dev, "Failed to bind device %s\n", + optee_bus_probe[i].dev_name); Please add device tree nodes for these and all this code can go away. That's the exact opposite of what the commit message describes. OP-TEE supports a scannable bus ifor TAs that behave like hardware blocks and doesn't need a DT entry. Since it's really the TAs compilation decision to support that or not having them as a DT node is not always the right choice. This is continuing the perversion of how things are supposed to work in driver model. Which is not the only thing we need to keep in mind though. We need to talk about this because it is simply the wrong way to be approaching this. This is already part of other software components though, e.g it's already in the kernel. So I don't think it's the wrong approach. There is nothing wrong with putting things in the DT and this is how U-Boot works. For now, please create a binding and get it reviewed. You don't need all the internal objects but you do need an OP-TEE driver and node, as we have with PCI. Some things *are* working without a DT entry. You had similar concerns on FF-A (where you requested a DT node again) and people gave the exact same response. As long as a bus is scanable in any way, it's preferable to than adding a DT entry. Moreover this code does not prevent anyone from adding a DT entry. To make things even worse if the TA is compiled as 'scanable' and has a DT entry, it might cause issues down the road when being probed by the kernel. So really this is just a patch that makes u-boot behave and plug in properly to the rest of the ecosystem Calling device_bind() is supposed to be used in extremis. I don't see any scanning of an OP-TEE bus here. I just see it binding two child devices which are hard-coded in U-Boot. What am I missing? The tee bus is supported in Linux kernel (each TA have a UUID and is discoverable by the TEE driver). see drivers/tee/optee/core.c::optee_bus_scan() and "struct tee_client_driver" with TA UUID It wasn't supported in U-Boot is the first TEE/OP-TEE driver implementation => TA support was hardcoded, under the associated CONFI
Re: u-boot 2022-07 on STM32F746G-DISCO
Waldemar, You can applied the following series on current U-Boot master branch (a0759684e015bd7252be3af508c0fcfdbb8ec5dc): https://patchwork.ozlabs.org/project/uboot/list/?series=318991 Thanks Patrice On 9/19/22 16:36, Patrice CHOTARD wrote: > Hi Waldemar > > On 9/19/22 13:48, Waldemar Brodkorb wrote: >> Hi again, >> >> Waldemar Brodkorb wrote, >> >>> Hi, >>> >>> I am trying to run u-boot on a STM32F746G-DISCO device. >>> I am configuring u-boot with stm32f746-disco_spl_defconfig. >>> >>> But nothing happens on the LCD nor on the serial console. >>> I use screen /dev/ttyACM0 115200 under Linux to connect. >> >> It seems my USB port on my laptop was buggy, after reboot I get >> following output via serial console: >> >> U-Boot SPL 2022.07 (Sep 19 2022 - 13:20:08 +0200) >> Trying to boot from XIP >> >> >> U-Boot 2022.07 (Sep 19 2022 - 13:20:08 +0200) >> >> Model: STMicroelectronics STM32F746-DISCO board >> DRAM: 8 MiB >> Hard fault >> pc : 080087d6lr : c05aa775xPSR : a100 >> r12 : 0010 r3 : 080087c1r2 : 0805344d >> r1 : 08008001r0 : c05aa000 >> Resetting CPU ... >> >> resetting ... >> >> I get a Hard fault. I then tried an older version of u-boot using >> the information from https://github.com/fdu/STM32F746G-disco_Buildroot >> as a hint. With U-Boot 2018.11 I get a working binary (I had to >> disable Falcon mode): >> >> U-Boot SPL 2018.11 (Sep 19 2022 - 13:41:50 +0200) >> Trying to boot from XIP >> >> >> U-Boot 2018.11 (Sep 19 2022 - 13:41:50 +0200) >> >> Model: STMicroelectronics STM32F746-DISCO board >> DRAM: 8 MiB >> Flash: 1 MiB >> MMC: sdio@40012c00: 0 >> In:serial >> Out: serial >> Err: serial >> usr button is at LOW LEVEL >> Net: >> Warning: ethernet@40028000 (eth0) using random MAC address - >> fe:f8:94:5f:5e:26 >> eth0: ethernet@40028000 >> Hit SPACE in 3 seconds to stop autoboot. >> Wrong Image Format for bootm command >> ERROR: can't get kernel image! >> U-Boot > >> >> Seems like a regression to me. >> >> best regards >> Waldemar > > There are several issues with SPL with STM32F7 based boards. > I am currently working on it. > A series will be submitted very soon > > Patrice
[PATCH v1 6/6] config: stm32f769-disco: Fix internal flash size
arch-stm32f7/stm32.h file is shared between STM32F746 and STM32F769 MCUs. But STM32F769 embeds 2MB of internal flash instead of 1MB for STM32F746. The flash layout is quite similar between the 2 SoCs : STM32F746 STM32F769 4 * 32KB sectors 4 * 32KB sectors 1 * 128KB sector1 * 128KB sector 3 * 256KB sectors 7 * 256KB sectors Update sect_sz_kb[] structure and SYS_MAX_FLASH_SECT accordingly. Signed-off-by: Patrice Chotard --- arch/arm/include/asm/arch-stm32f7/stm32.h | 6 +++--- configs/stm32f769-disco_defconfig | 2 +- configs/stm32f769-disco_spl_defconfig | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h index 3451e74a3d..57db839e8d 100644 --- a/arch/arm/include/asm/arch-stm32f7/stm32.h +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h @@ -10,9 +10,9 @@ #include static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = { - [0 ... 3] = 32 * 1024, - [4] = 128 * 1024, - [5 ... 7] = 256 * 1024 + [0 ... 3] = 32 * 1024, + [4] = 128 * 1024, + [5 ... CONFIG_SYS_MAX_FLASH_SECT - 1] = 256 * 1024 }; #endif /* _ASM_ARCH_HARDWARE_H */ diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 423af7446a..5b5307ca1d 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -41,7 +41,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_STM32_FLASH=y -CONFIG_SYS_MAX_FLASH_SECT=8 +CONFIG_SYS_MAX_FLASH_SECT=12 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 22fca53821..054eb4c920 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -63,7 +63,7 @@ CONFIG_MTD=y CONFIG_DM_MTD=y CONFIG_MTD_NOR_FLASH=y CONFIG_STM32_FLASH=y -CONFIG_SYS_MAX_FLASH_SECT=8 +CONFIG_SYS_MAX_FLASH_SECT=12 CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y -- 2.25.1
[PATCH v1 5/6] configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f], fix CONFIG_SYS_SPL_ARGS_ADDR accordingly It solves hard fault when jumping from SPL to U-Boot. Signed-off-by: Patrice Chotard --- configs/stm32746g-eval_spl_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index d8d55c2d3c..28f522b15e 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y -CONFIG_SYS_SPL_ARGS_ADDR=0x81c +CONFIG_SYS_SPL_ARGS_ADDR=0x80c CONFIG_SPL_DM_RESET=y CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y -- 2.25.1
[PATCH v1 4/6] configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR
STM32F746 embeds 1 MB of internal flash [0x0800-0x080f], fix CONFIG_SYS_SPL_ARGS_ADDR accordingly It solves hard fault when jumping from SPL to U-Boot. Signed-off-by: Patrice Chotard --- configs/stm32f746-disco_spl_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 5e8a8aaf3c..d4a65bde24 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -36,7 +36,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_MTD_SUPPORT=y CONFIG_SPL_XIP_SUPPORT=y -CONFIG_SYS_SPL_ARGS_ADDR=0x81c +CONFIG_SYS_SPL_ARGS_ADDR=0x80c CONFIG_SPL_DM_RESET=y CONFIG_SYS_PBSIZE=1050 CONFIG_CMD_GPT=y -- 2.25.1
[PATCH v1 3/6] configs: stm32746g-eval: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR. As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it increases SPL size over the initial 0x8000 limit. Increase the SPL size to 0x9000 to fix SPL boot. Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future. Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' Signed-off-by: Patrice Chotard --- configs/stm32746g-eval_spl_defconfig | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index a3b7146454..d8d55c2d3c 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y -CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x10 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_SIZE_LIMIT=0x9000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x8008000 +CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_PAD_TO=0x9000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -- 2.25.1
[PATCH v1 2/6] configs: stm32f769-disco: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR. As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it increases SPL size over the initial 0x8000 limit. Increase the SPL size to 0x9000 to fix SPL boot. Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future. Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' Signed-off-by: Patrice Chotard --- configs/stm32f769-disco_spl_defconfig | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 80d411a769..22fca53821 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y -CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x10 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_SIZE_LIMIT=0x9000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x8008000 +CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -28,7 +29,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_PAD_TO=0x9000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -- 2.25.1
[PATCH v1 1/6] configs: stm32f746-disco: Fix SPL boot
Commit 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' replaces CONFIG_SYS_FDT_BASE by CONFIG_SYS_SPL_ARGS_ADDR. As CONFIG_SYS_SPL_ARGS_ADDR enables additional code when enable, it increases SPL size over the initial 0x8000 limit. Increase the SPL size to 0x9000 to fix SPL boot. Set SPL_SIZE_LIMIT to 0x9000 to avoid similar issue in the future. Fixes 'b4b9a00ed593 ("Convert CONFIG_SYS_SPL_ARGS_ADDR to Kconfig")' Signed-off-by: Patrice Chotard --- configs/stm32f746-disco_spl_defconfig | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index e7b1acc433..5e8a8aaf3c 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_STM32=y -CONFIG_SYS_TEXT_BASE=0x08008000 +CONFIG_SYS_TEXT_BASE=0x08009000 CONFIG_SYS_MALLOC_LEN=0x10 CONFIG_SYS_MALLOC_F_LEN=0xE00 CONFIG_SPL_GPIO=y @@ -13,10 +13,11 @@ CONFIG_SPL_TEXT_BASE=0x800 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_SIZE_LIMIT=0x9000 CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SPL=y -CONFIG_SYS_LOAD_ADDR=0x8008000 +CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -29,7 +30,7 @@ CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_BOARD_LATE_INIT=y -CONFIG_SPL_PAD_TO=0x8000 +CONFIG_SPL_PAD_TO=0x9000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y -- 2.25.1
[PATCH v1 0/6] SPL fixes for STM32F7 MCUs
This series is fixing issues in SPL boot mode: - SPL binary size over 0x8000 bytes for STM32F746-disco, STM32F769-DISCO and STM32746G-EVAL boards - fix embedded flash size for STM32F769-DISCO - fix CONFIG_SYS_SPL_ARGS_ADDR for STM32F746-DISCO and STM32746G-EVAL Patrice Chotard (6): configs: stm32f746-disco: Fix SPL boot configs: stm32f769-disco: Fix SPL boot configs: stm32746g-eval: Fix SPL boot configs: stm32f746-disco: Fix CONFIG_SYS_SPL_ARGS_ADDR configs: stm32746g-eval: Fix CONFIG_SYS_SPL_ARGS_ADDR config: stm32f769-disco: Fix internal flash size arch/arm/include/asm/arch-stm32f7/stm32.h | 6 +++--- configs/stm32746g-eval_spl_defconfig | 9 + configs/stm32f746-disco_spl_defconfig | 9 + configs/stm32f769-disco_defconfig | 2 +- configs/stm32f769-disco_spl_defconfig | 9 + 5 files changed, 19 insertions(+), 16 deletions(-) -- 2.25.1
Re: u-boot 2022-07 on STM32F746G-DISCO
Hi Waldemar On 9/19/22 13:48, Waldemar Brodkorb wrote: > Hi again, > > Waldemar Brodkorb wrote, > >> Hi, >> >> I am trying to run u-boot on a STM32F746G-DISCO device. >> I am configuring u-boot with stm32f746-disco_spl_defconfig. >> >> But nothing happens on the LCD nor on the serial console. >> I use screen /dev/ttyACM0 115200 under Linux to connect. > > It seems my USB port on my laptop was buggy, after reboot I get > following output via serial console: > > U-Boot SPL 2022.07 (Sep 19 2022 - 13:20:08 +0200) > Trying to boot from XIP > > > U-Boot 2022.07 (Sep 19 2022 - 13:20:08 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Hard fault > pc : 080087d6lr : c05aa775xPSR : a100 > r12 : 0010 r3 : 080087c1r2 : 0805344d > r1 : 08008001r0 : c05aa000 > Resetting CPU ... > > resetting ... > > I get a Hard fault. I then tried an older version of u-boot using > the information from https://github.com/fdu/STM32F746G-disco_Buildroot > as a hint. With U-Boot 2018.11 I get a working binary (I had to > disable Falcon mode): > > U-Boot SPL 2018.11 (Sep 19 2022 - 13:41:50 +0200) > Trying to boot from XIP > > > U-Boot 2018.11 (Sep 19 2022 - 13:41:50 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Flash: 1 MiB > MMC: sdio@40012c00: 0 > In:serial > Out: serial > Err: serial > usr button is at LOW LEVEL > Net: > Warning: ethernet@40028000 (eth0) using random MAC address - > fe:f8:94:5f:5e:26 > eth0: ethernet@40028000 > Hit SPACE in 3 seconds to stop autoboot. > Wrong Image Format for bootm command > ERROR: can't get kernel image! > U-Boot > > > Seems like a regression to me. > > best regards > Waldemar There are several issues with SPL with STM32F7 based boards. I am currently working on it. A series will be submitted very soon Patrice
Re: u-boot 2022-07 on STM32F746G-DISCO
I forgot to mention that information can be directly found in doc/board/st/stm32_MCU.rst Patrice On 9/19/22 13:48, Waldemar Brodkorb wrote: > Hi again, > > Waldemar Brodkorb wrote, > >> Hi, >> >> I am trying to run u-boot on a STM32F746G-DISCO device. >> I am configuring u-boot with stm32f746-disco_spl_defconfig. >> >> But nothing happens on the LCD nor on the serial console. >> I use screen /dev/ttyACM0 115200 under Linux to connect. > > It seems my USB port on my laptop was buggy, after reboot I get > following output via serial console: > > U-Boot SPL 2022.07 (Sep 19 2022 - 13:20:08 +0200) > Trying to boot from XIP > > > U-Boot 2022.07 (Sep 19 2022 - 13:20:08 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Hard fault > pc : 080087d6lr : c05aa775xPSR : a100 > r12 : 0010 r3 : 080087c1r2 : 0805344d > r1 : 08008001r0 : c05aa000 > Resetting CPU ... > > resetting ... > > I get a Hard fault. I then tried an older version of u-boot using > the information from https://github.com/fdu/STM32F746G-disco_Buildroot > as a hint. With U-Boot 2018.11 I get a working binary (I had to > disable Falcon mode): > > U-Boot SPL 2018.11 (Sep 19 2022 - 13:41:50 +0200) > Trying to boot from XIP > > > U-Boot 2018.11 (Sep 19 2022 - 13:41:50 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Flash: 1 MiB > MMC: sdio@40012c00: 0 > In:serial > Out: serial > Err: serial > usr button is at LOW LEVEL > Net: > Warning: ethernet@40028000 (eth0) using random MAC address - > fe:f8:94:5f:5e:26 > eth0: ethernet@40028000 > Hit SPACE in 3 seconds to stop autoboot. > Wrong Image Format for bootm command > ERROR: can't get kernel image! > U-Boot > > > Seems like a regression to me. > > best regards > Waldemar
Re: u-boot 2022-07 on STM32F746G-DISCO
Hi Waldemar On 9/19/22 13:48, Waldemar Brodkorb wrote: > Hi again, > > Waldemar Brodkorb wrote, > >> Hi, >> >> I am trying to run u-boot on a STM32F746G-DISCO device. >> I am configuring u-boot with stm32f746-disco_spl_defconfig. >> >> But nothing happens on the LCD nor on the serial console. >> I use screen /dev/ttyACM0 115200 under Linux to connect. > > It seems my USB port on my laptop was buggy, after reboot I get > following output via serial console: > > U-Boot SPL 2022.07 (Sep 19 2022 - 13:20:08 +0200) > Trying to boot from XIP > > > U-Boot 2022.07 (Sep 19 2022 - 13:20:08 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Hard fault > pc : 080087d6lr : c05aa775xPSR : a100 > r12 : 0010 r3 : 080087c1r2 : 0805344d > r1 : 08008001r0 : c05aa000 > Resetting CPU ... > > resetting ... > > I get a Hard fault. I then tried an older version of u-boot using > the information from https://github.com/fdu/STM32F746G-disco_Buildroot > as a hint. With U-Boot 2018.11 I get a working binary (I had to > disable Falcon mode): > > U-Boot SPL 2018.11 (Sep 19 2022 - 13:41:50 +0200) > Trying to boot from XIP > > > U-Boot 2018.11 (Sep 19 2022 - 13:41:50 +0200) > > Model: STMicroelectronics STM32F746-DISCO board > DRAM: 8 MiB > Flash: 1 MiB > MMC: sdio@40012c00: 0 > In:serial > Out: serial > Err: serial > usr button is at LOW LEVEL > Net: > Warning: ethernet@40028000 (eth0) using random MAC address - > fe:f8:94:5f:5e:26 > eth0: ethernet@40028000 > Hit SPACE in 3 seconds to stop autoboot. > Wrong Image Format for bootm command > ERROR: can't get kernel image! > U-Boot > > > Seems like a regression to me. > > best regards > Waldemar There are several issues with SPL with STM32F7 based boards. I am currently working on it. A series will be submitted very soon ;-) Patrice
Re: [PATCH v8] board: purism: add the Purism Librem5 phone
On 2022-09-18 13:41, sba...@denx.de wrote: Initial commit of Librem5 u-boot and SPL Signed-off-by: Angus Ainslie Co-developed-by: Sebastian Krzyszkowiak Signed-off-by: Sebastian Krzyszkowiak Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Thanks Stefano ! Cheers Angus Best regards, Stefano Babic
Re: [PATCH] rpi: Set FDT for RPi CM4 to the IO Board one
Hi Matthias, On 9/19/22 08:37, Matthias Brugger wrote: > Hi Ariel, > > On 16/09/2022 17:13, Ariel D'Alessandro wrote: >> For the RPi CM4 (Compute Module 4), we currently try to load the dtb >> file bcm2711-rpi-cm4.dtb, which is not built by the upstream kernel. >> >> Instead, the only CM4 dtb file provided by linux upstream is the >> bcm2711-rpi-cm4-io.dtb, so let's use that. >> >> Signed-off-by: Ariel D'Alessandro >> --- >> board/raspberrypi/rpi/rpi.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c >> index 17b8108cc8..b88f80ce05 100644 >> --- a/board/raspberrypi/rpi/rpi.c >> +++ b/board/raspberrypi/rpi/rpi.c >> @@ -168,8 +168,8 @@ static const struct rpi_model >> rpi_models_new_scheme[] = { >> true, >> }, >> [0x14] = { >> - "Compute Module 4", >> - DTB_DIR "bcm2711-rpi-cm4.dtb", >> + "Compute Module 4 IO Board", >> + DTB_DIR "bcm2711-rpi-cm4-io.dtb", > > We had that discussion in the past. It is supposed that most CM4s will > be used with a custom board. I don't think it's a good idea to tie the > ID of the module to a specific IO board. Ah, sorry I didn't notice that previous thread. Your point makes sense. I guess another question would be: to avoid this inconsistency, does it make sense to have a generic bcm2711-rpi-cm4.dtb built in the kernel? Thanks! Ariel
[PATCH 2/2] splash: get devpart from environment variable
By default several types of splash locations are supported and the user can select one of them through environment var (splashsource). However the devpart is still hardcoded and we cannot change it from the environment. This patch add the support of "splashdevpart" which allow the user to set the devpart though this environment variable. Example: image located in splashscreen partition (MMC as raw) ``` splashsource=mmc_raw splashdevpart=0#splashscreen ``` Signed-off-by: Julien Masson --- common/splash_source.c | 5 + 1 file changed, 5 insertions(+) diff --git a/common/splash_source.c b/common/splash_source.c index c512aa0196..a7764ff16f 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -451,6 +451,7 @@ int splash_source_load(struct splash_location *locations, uint size) { struct splash_location *splash_location; char *env_splashimage_value; + char *env_splashdevpart_value; u32 bmp_load_addr; env_splashimage_value = env_get("splashimage"); @@ -467,6 +468,10 @@ int splash_source_load(struct splash_location *locations, uint size) if (!splash_location) return -EINVAL; + env_splashdevpart_value = env_get("splashdevpart"); + if (env_splashdevpart_value) + splash_location->devpart = env_splashdevpart_value; + if (splash_location->flags == SPLASH_STORAGE_RAW) return splash_load_raw(splash_location, bmp_load_addr); else if (splash_location->flags == SPLASH_STORAGE_FS) -- 2.37.3
[PATCH 1/2] splash: support raw image from MMC
The user has now the choice to specify the splash location in the MMC as a raw storage. Signed-off-by: Julien Masson --- common/splash.c| 6 ++ common/splash_source.c | 29 + 2 files changed, 35 insertions(+) diff --git a/common/splash.c b/common/splash.c index 0e520cc103..5206e35f74 100644 --- a/common/splash.c +++ b/common/splash.c @@ -39,6 +39,12 @@ static struct splash_location default_splash_locations[] = { .flags = SPLASH_STORAGE_FS, .devpart = "0:1", }, + { + .name = "mmc_raw", + .storage = SPLASH_STORAGE_MMC, + .flags = SPLASH_STORAGE_RAW, + .devpart = "0:1", + }, { .name = "usb_fs", .storage = SPLASH_STORAGE_USB, diff --git a/common/splash_source.c b/common/splash_source.c index 2c03cbdf92..c512aa0196 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -65,6 +65,33 @@ static int splash_nand_read_raw(u32 bmp_load_addr, int offset, size_t read_size) } #endif +#ifdef CONFIG_CMD_MMC +static int splash_mmc_read_raw(u32 bmp_load_addr, struct splash_location *location, + size_t read_size) +{ + struct disk_partition partition; + struct blk_desc *desc; + lbaint_t blkcnt; + int ret, n; + + ret = part_get_info_by_dev_and_name_or_num("mmc", location->devpart, &desc, + &partition, 1); + if (ret < 0) + return ret; + + blkcnt = DIV_ROUND_UP(read_size, partition.blksz); + n = blk_dread(desc, partition.start, blkcnt, (void *)(uintptr_t)bmp_load_addr); + + return (n == blkcnt) ? 0 : -EINVAL; +} +#else +static int splash_mmc_read_raw(u32 bmp_load_addr, int offset, size_t read_size) +{ + debug("%s: mmc support not available\n", __func__); + return -ENOSYS; +} +#endif + static int splash_storage_read_raw(struct splash_location *location, u32 bmp_load_addr, size_t read_size) { @@ -75,6 +102,8 @@ static int splash_storage_read_raw(struct splash_location *location, offset = location->offset; switch (location->storage) { + case SPLASH_STORAGE_MMC: + return splash_mmc_read_raw(bmp_load_addr, location, read_size); case SPLASH_STORAGE_NAND: return splash_nand_read_raw(bmp_load_addr, offset, read_size); case SPLASH_STORAGE_SF: -- 2.37.3
[PATCH 0/2] splash: add more options/support
This patch series add several options/support for splashscreen feature: - support raw image from MMC - get devpart from environment variable With these changes the user has now more options and can change default configurations through environment variables. Example: image located in splashscreen partition (MMC as raw) ``` splashsource=mmc_raw splashdevpart=0#splashscreen ``` Julien Masson (2): splash: support raw image from MMC splash: get devpart from environment variable common/splash.c| 6 ++ common/splash_source.c | 34 ++ 2 files changed, 40 insertions(+) -- 2.37.3
[PATCH 0/2] splash: add more options/support
This patch series add several options/support for splashscreen feature: - support raw image from MMC - get devpart from environment variable With these changes the user has now more options and can change default configurations through environment variables. Example: image located in splashscreen partition (MMC as raw) ``` splashsource=mmc_raw splashdevpart=0#splashscreen ``` Julien Masson (2): splash: support raw image from MMC splash: get devpart from environment variable common/splash.c| 6 ++ common/splash_source.c | 34 ++ 2 files changed, 40 insertions(+) -- 2.37.3
Re: [PATCH] imx8m*_venice_defconfig: fix default bootcmd
On Tue, Sep 13, 2022 at 10:32:19AM -0700, Tim Harvey wrote: > On Thu, Sep 8, 2022 at 9:11 AM Tim Harvey wrote: > > > > commit 970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to Kconfig") > > had an unintended side effect of resulting in a bootcmd env var change > > for boards like venice that did not have CONFIG_USE_BOOTCOMMAND defined > > and relied on it being defaulted in include/config_distro_bootcmd.h. > > Following that patch it instead got defaulted in tools/env/fw_env_private.h > > > > Fix this by enabling CONFIG_USE_BOOTCOMMAND for venice. > > > > Fixes: commit 970bf8603b87 ("Convert CONFIG_USE_BOOTCOMMAND et al to > > Kconfig") > > Signed-off-by: Tim Harvey > > --- > > configs/imx8mm_venice_defconfig | 1 - > > configs/imx8mn_venice_defconfig | 1 - > > configs/imx8mp_venice_defconfig | 1 - > > 3 files changed, 3 deletions(-) > > > > diff --git a/configs/imx8mm_venice_defconfig > > b/configs/imx8mm_venice_defconfig > > index a2bd27ab5729..a72b9033d8a9 100644 > > --- a/configs/imx8mm_venice_defconfig > > +++ b/configs/imx8mm_venice_defconfig > > @@ -28,7 +28,6 @@ CONFIG_SPL_LOAD_FIT=y > > # CONFIG_USE_SPL_FIT_GENERATOR is not set > > CONFIG_OF_BOARD_SETUP=y > > CONFIG_OF_SYSTEM_SETUP=y > > -# CONFIG_USE_BOOTCOMMAND is not set > > CONFIG_USE_PREBOOT=y > > CONFIG_PREBOOT="gsc wd-disable" > > CONFIG_BOARD_LATE_INIT=y > > diff --git a/configs/imx8mn_venice_defconfig > > b/configs/imx8mn_venice_defconfig > > index a4e54ff50cf1..821252ad600c 100644 > > --- a/configs/imx8mn_venice_defconfig > > +++ b/configs/imx8mn_venice_defconfig > > @@ -29,7 +29,6 @@ CONFIG_SPL_LOAD_FIT=y > > # CONFIG_USE_SPL_FIT_GENERATOR is not set > > CONFIG_OF_BOARD_SETUP=y > > CONFIG_OF_SYSTEM_SETUP=y > > -# CONFIG_USE_BOOTCOMMAND is not set > > CONFIG_USE_PREBOOT=y > > CONFIG_PREBOOT="gsc wd-disable" > > CONFIG_BOARD_LATE_INIT=y > > diff --git a/configs/imx8mp_venice_defconfig > > b/configs/imx8mp_venice_defconfig > > index d1a1bfa82acf..339e740349d4 100644 > > --- a/configs/imx8mp_venice_defconfig > > +++ b/configs/imx8mp_venice_defconfig > > @@ -29,7 +29,6 @@ CONFIG_SPL_LOAD_FIT=y > > # CONFIG_USE_SPL_FIT_GENERATOR is not set > > CONFIG_OF_BOARD_SETUP=y > > CONFIG_OF_SYSTEM_SETUP=y > > -# CONFIG_USE_BOOTCOMMAND is not set > > CONFIG_USE_PREBOOT=y > > CONFIG_PREBOOT="gsc wd-disable" > > CONFIG_BOARD_LATE_INIT=y > > -- > > 2.25.1 > > > > Stefano, > > I probably needed to send this one to you as it is for imx8m board > defconfigs and has a Fixes tag that fixes a regression. With a pending > release in a few weeks, it would be nice to get fixes merged. I'm not > sure if this must go through your tree or could instead go through > Tom's tree. As this applies cleanly on top of the current imx PR, and is a Fixes, I'll take this directly. -- Tom signature.asc Description: PGP signature
Re: [PATCH] ARM: imx: Deduplicate i.MX8M SNVS LPGPR unlock
On 23.08.22 19:26, Fabio Estevam wrote: On 23/08/2022 14:05, Marek Vasut wrote: Pull this LPGPR unlock into common code, since it is used in multiple systems already. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic Cc: Ye Li Cc: uboot-imx Reviewed-by: Fabio Estevam Board is not built clean after applying this patch, I had to remove it. See: https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/498918 Best regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, 82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH v2 4/5] verdin-imx8mm: various config additions and improvements
On 18.09.22 22:41, sba...@denx.de wrote: From: Marcel Ziswiler - integrate bootcount using SNVS_LP general purpose register LPGPR0 - enable link-time optimisation - explicitly set a boot delay of one second - enable CRC32 and MD5 - enable command for low-level access to data in a partition - enable time commands - enable PMIC commands - improve ETHPRIME configuration - enable eMMC HS400 functionality - enable fixed PHY and MDIO driver model - remove stale PFUZE100 PMIC driver - enable thermal management unit driver - enable more USB host functionality - enable hexdump Signed-off-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Not yet: Patch 4/5 and 5/5 require a rebase, I avoid to do it myself as I cannot then test if it is ok. These two patches are not in my PR, I can pick them up if you repost them. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, 82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH v10 02/15] FWU: Add FWU metadata structure and driver for accessing metadata
On Mon, 19 Sept 2022 at 06:03, Jassi Brar wrote: > > On Thu, 15 Sept 2022 at 03:15, Sughosh Ganu wrote: > > > +/** > > + * fwu_get_active_index() - Get active_index from the FWU metadata > > + * @active_idxp: active_index value to be read > > + * > > + * Read the active_index field from the FWU metadata and place it in > > + * the variable pointed to be the function argument. > > + * > > + * Return: 0 if OK, -ve on error > > + * > > + */ > > +int fwu_get_active_index(u32 *active_idxp); > > + > Bank index is u32 here and uint in fwu_update_active_index(), so s/u32/uint ? Will change. Thanks. -sughosh
Pull request: u-boot-imx u-boot-imx-20220919
Hi Tom, please pull from u-boot-imx, thanks! The following changes since commit 1977d72a69f3c8d97bd25a86a6be4da27cde3724: Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2022-09-18 08:27:23 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-imx.git tags/u-boot-imx-20220919 for you to fetch changes up to cc74cab86a5f32db93a9f0dc7bc46fa5e83f4f3e: bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards (2022-09-18 22:56:18 +0200) u-boot-imx-20220919 --- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/13500 - Fix imx8mn-beacon-kit-u-boot - Merged Purism - imxrt1170 (already merged in u-boot-imx) - Fixes in crypto FSL - Toradex : fixes Verdin - Serial Driver: fixes when not used as console - DH Boards : fixes + USB - Fix CONFIG_SYS_MALLOC_F_LEN (Kconfig) - Add imx6ulz_smm_m2 Adam Ford (1): arm: dts: imx8mn-beacon-kit-u-boot: Fix broken booting Angus Ainslie (1): board: purism: add the Purism Librem5 phone Denys Drozdov (2): verdin-imx8mm: do not save environment when it's nowhere verdin-imx8mp: do not save environment when it's nowhere Fabio Estevam (1): MAINTAINERS: imx: Add an entry for the serial driver Gaurav Jain (1): crypto/fsl: fsl_hash: Fix crash in flush dcache Jesse Taube (8): imx: imxrt1170-evk: Add support for the NXP i.MXRT1170-EVK ARM: dts: imxrt11170-pinfunc: Add pinctrl binding header ARM: dts: imx: add i.MXRT1170-EVK support dt-bindings: imx: Add clock binding for i.MXRT1170 clk: imx: Add i.MXRT11xx pllv3 variant clk: imx: Add initial support for i.MXRT1170 clock driver RAM: Add changes for i.MXRT11xx series ARM: imxrt1170_defconfig: Add i.MXRT1170 defconfig Johannes Schneider (2): serial: mxc: enable the RX pipeline serial: mxc: have putc use the TXFIFO Marcel Ziswiler (5): imx: romapi: fix spurious ampersand in address print verdin-imx8mm: verdin-imx8mp: update env memory layout verdin-imx8mm: prepare for optional job ring driver model verdin-imx8mm: improve and extend boot devices verdin-imx8mm: various config additions and improvements Marek Vasut (13): doc: imx: habv4: Add Secure Boot guide for i.MX8M SPL targets ARM: imx: Enable USB ethernet on i.MX8M Plus DHCOM ARM: dts: imx: Add HW variant details to i.MX8M Plus DHCOM PDK2 ARM: dts: imx: Drop Atheros PHY header from i.MX8M Plus DHCOM PDK2 ARM: dts: imx: Add SoM compatible to i.MX8M Plus DHCOM PDK2 ARM: dts: imx: Rename imx8mp-dhcom{-pdk2,}-boot.dtsi ARM: dts: imx: Adjust ECSPI1 pinmux on i.MX8M Plus DHCOM ARM: dts: imx: Fix I2C5 GPIO assignment on i.MX8M Plus DHCOM ARM: imx: dh-imx6: Increase SF erase area for u-boot update imx8m: ddrphy_utils: Remove unused file ARM: imx: Update DDR frequency on i.MX8M Plus DHCOM ARM: imx: Enable SPL GPIO hog on i.MX8M Plus DHCOM ARM: imx: Update Data Modul i.MX8M Mini eDM SBC DRAM timing Michael Trimarchi (1): bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards Peng Fan (1): Kconfig: enlarge CONFIG_SYS_MALLOC_F_LEN Tim Harvey (1): board: gateworks: venice: add fixup for GW73xx-C+ Kconfig |3 +- MAINTAINERS |1 + arch/arm/dts/Makefile |7 +- arch/arm/dts/imx6ulz-bsh-smm-m2-u-boot.dtsi | 35 +++ arch/arm/dts/imx6ulz-bsh-smm-m2.dts | 146 + arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi|4 + arch/arm/dts/imx8mp-dhcom-pdk2-u-boot.dtsi| 137 +--- arch/arm/dts/imx8mp-dhcom-pdk2.dts|9 +- arch/arm/dts/imx8mp-dhcom-som.dtsi| 14 +- arch/arm/dts/imx8mp-dhcom-u-boot.dtsi | 141 + arch/arm/dts/imx8mq-librem5-r4-u-boot.dtsi| 24 ++ arch/arm/dts/imx8mq-librem5-r4.dts| 35 +++ arch/arm/dts/imx8mq-librem5.dtsi | 1255 ++ arch/arm/dts/imxrt1170-evk-u-boot.dtsi| 94 ++ arch/arm/dts/imxrt1170-evk.dts| 250 +++ arch/arm/dts/imxrt1170-pinfunc.h | 1561 arch/arm/dts/imxrt1170.dtsi | 257 +++ arch/arm/include/asm/arch-imx/cpu.h |1 + arch/arm/mach-imx/imx8m/Kconfig |9 + arch/arm/mach-imx/imxrt/Kconfig |9 + arch/arm/mach-imx/imxrt/soc.c
Re: [PATCH V5] bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards
Hi Stefano On Mon, Sep 19, 2022 at 2:16 PM Stefano Babic wrote: > > On 18.09.22 17:48, Fabio Estevam wrote: > > On Sun, Sep 18, 2022 at 12:09 PM Michael Trimarchi > > wrote: > >> > >> Introduce BSH SystemMaster (SMM) M2 board family, which consists of: > >> imx6ulz SMM M2 and imx6ulz SMM M2 PRO boards. > >> > >> Add support for imx6ulz BSH SMM M2 board: > >> > >> - 128 MiB DDR3 RAM > >> - 256MiB Nand > >> - USBOTG1 peripheral - fastboot. > >> > >> Signed-off-by: Michael Trimarchi > > > > Reviewed-by: Fabio Estevam > > Ok, thanks - I drop the old one and merge this into u-boot.imx (ok, I > had to rebase it, I hope this does not create many issues). I send a PR > to Tom now. Thank you Michael > > Regards, > Stefano > > > -- > = > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, 82194 Groebenzell, Germany > Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de > = -- Michael Nazzareno Trimarchi Co-Founder & Chief Executive Officer M. +39 347 913 2170 mich...@amarulasolutions.com __ Amarula Solutions BV Joop Geesinkweg 125, 1114 AB, Amsterdam, NL T. +31 (0)85 111 9172 i...@amarulasolutions.com www.amarulasolutions.com
Re: [PATCH] powerpc: mpc85xx: Fix incorrect application of patch
On Mon, Sep 19, 2022 at 11:32:08AM +0200, Marek Behún wrote: > I messed up application of patch 5a428e751044 ("mmc: fsl_esdhc_spl: Add > support for builds without CONFIG_SYS_MMC_U_BOOT_OFFS"). I took it from > a work-in-progress branch where I changed usage of > CONFIG_SDCARD to CONFIG_SD_BOOT > and refactored > SYS_MPC85XX_NO_RESETVEC > mess. > > But these changes aren't in master yet. Fix the wrong usage of these > macros. > > Fixes: 5a428e751044 ("mmc: fsl_esdhc_spl: Add support for builds without > CONFIG_SYS_MMC_U_BOOT_OFFS") > Signed-off-by: Marek Behún > Reviewed-by: Pali Rohár Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
[PATCH v2 9/9] arm64: versal-net: Add support for mini configuration
Versal NET mini configuration is designed for running memory test. Current output is on DCC but changing serial0 alias to pl011 will move console to serial port. Signed-off-by: Michal Simek --- Changes in v2: - Remove CONFIG_SYS_CBSIZE, CONFIG_BOOTP_BOOTFILESIZE, CONFIG_BOOTP_MAY_FAIL from .h file - Setup HAS_CUSTOM_SYS_INIT_SP_ADDR arch/arm/dts/Makefile| 1 + arch/arm/dts/versal-net-mini.dts | 67 ++ configs/xilinx_versal_net_mini_defconfig | 72 include/configs/xilinx_versal_net_mini.h | 21 +++ 4 files changed, 161 insertions(+) create mode 100644 arch/arm/dts/versal-net-mini.dts create mode 100644 configs/xilinx_versal_net_mini_defconfig create mode 100644 include/configs/xilinx_versal_net_mini.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a141d0de0c20..4ad526d565c9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -380,6 +380,7 @@ dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini-emmc1.dtb \ xilinx-versal-virt.dtb dtb-$(CONFIG_ARCH_VERSAL_NET) += \ + versal-net-mini.dtb \ xilinx-versal-net-virt.dtb dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \ zynqmp-r5.dtb diff --git a/arch/arm/dts/versal-net-mini.dts b/arch/arm/dts/versal-net-mini.dts new file mode 100644 index ..8c29a6ed6bfe --- /dev/null +++ b/arch/arm/dts/versal-net-mini.dts @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx Versal NET + * + * Copyright (C) 2021 - 2022, Xilinx, Inc. + * Copyright (C) 2022, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include + +/ { + compatible = "xlnx,versal-net-mini"; + model = "Xilinx Versal NET MINI"; + #address-cells = <2>; + #size-cells = <2>; + + memory: memory@0 { + reg = <0 0xBBF0 0 0x10>, <0 0 0 0x8000>; + device_type = "memory"; + }; + + aliases { + /* serial0 = &serial0; */ + serial0 = &dcc; + }; + + chosen { + stdout-path = "serial0:115200"; + }; + + clk1: clk1 { + u-boot,dm-pre-reloc; + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100>; + }; + + dcc: dcc { + compatible = "arm,dcc"; + status = "okay"; + u-boot,dm-pre-reloc; + }; + + amba: axi { + compatible = "simple-bus"; + u-boot,dm-pre-reloc; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + serial0: serial@f192 { + u-boot,dm-pre-reloc; + compatible = "arm,pl011", "arm,primecell"; + reg = <0 0xf192 0 0x1000>; + reg-io-width = <4>; + clock-names = "uartclk", "apb_pclk"; + clocks = <&clk1>, <&clk1>; + clock = <100>; + current-speed = <115200>; + skip-init; + }; + }; +}; diff --git a/configs/xilinx_versal_net_mini_defconfig b/configs/xilinx_versal_net_mini_defconfig new file mode 100644 index ..e8fa08e3ef0d --- /dev/null +++ b/configs/xilinx_versal_net_mini_defconfig @@ -0,0 +1,72 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="xilinx_versal_net_mini" +CONFIG_SYS_ICACHE_OFF=y +# CONFIG_ARM64_CRC32 is not set +# CONFIG_ARM64_SUPPORT_AARCH32 is not set +CONFIG_ARCH_VERSAL_NET=y +CONFIG_SYS_TEXT_BASE=0xBBF1 +CONFIG_SYS_MALLOC_LEN=0x2 +CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_NR_DRAM_BANKS=3 +CONFIG_ENV_SIZE=0x80 +CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini" +CONFIG_SYS_PROMPT="Versal NET> " +CONFIG_SYS_MEM_RSVD_FOR_MMU=y +# CONFIG_PSCI_RESET is not set +CONFIG_SYS_LOAD_ADDR=0x800 +CONFIG_SYS_MEMTEST_START=0x +CONFIG_SYS_MEMTEST_END=0x1000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF1 +# CONFIG_EXPERT is not set +# CONFIG_LEGACY_IMAGE_FORMAT is not set +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +# CONFIG_AUTOBOOT is not set +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_R=y +# CONFIG_BOARD_LATE_INIT is not set +# CONFIG_CMDLINE_EDITING is not set +# CONFIG_AUTO_COMPLETE is not set +# CONFIG_SYS_LONGHELP is not set +# CONFIG_CMD_CONSOLE is not set +# CONFIG_CMD_BOOTD is not set +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_BOOTI is not set +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_FDT is not set +# CONFIG_CMD_GO is not set +# CONFIG_CMD_RUN is not set +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_XIMG is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set +# CONFIG_CMD_EDITENV is not set +# CONFIG_CMD_SAVEENV is not set +# CONFIG_CMD_ENV_EXISTS is not set +# CONFIG_CMD_CRC32 is not set +CONFIG_CMD
[PATCH v2 8/9] arm64: versal-net: Add defconfig for Versal NET
Use one defconfig for supporting multiple different platforms. DTB reselection is enabled to choose DT based on SOC detection. Signed-off-by: Michal Simek --- Changes in v2: - Move symbols from .h to defconfig, enable i2c mux, dm_eth_phy, squashfs and grepenv configs/xilinx_versal_net_virt_defconfig | 131 +++ include/configs/xilinx_versal_net.h | 28 + 2 files changed, 134 insertions(+), 25 deletions(-) create mode 100644 configs/xilinx_versal_net_virt_defconfig diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig new file mode 100644 index ..4a9910b7c4fa --- /dev/null +++ b/configs/xilinx_versal_net_virt_defconfig @@ -0,0 +1,131 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 +CONFIG_ARCH_VERSAL_NET=y +CONFIG_SYS_TEXT_BASE=0x800 +CONFIG_SYS_MALLOC_F_LEN=0x10 +CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-net-virt" +CONFIG_SYS_PROMPT="Versal NET> " +CONFIG_CMD_FRU=y +CONFIG_SYS_LOAD_ADDR=0x800 +CONFIG_SYS_MEMTEST_START=0x +CONFIG_SYS_MEMTEST_END=0x1000 +CONFIG_DISTRO_DEFAULTS=y +CONFIG_REMAKE_ELF=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set +CONFIG_BOOTDELAY=5 +CONFIG_USE_PREBOOT=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_CLOCKS=y +CONFIG_SYS_MAXARGS=64 +CONFIG_SYS_PBSIZE=2073 +CONFIG_SYS_BOOTM_LEN=0x640 +CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_MEMTEST=y +CONFIG_SYS_ALT_MEMTEST=y +CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_SF_TEST=y +CONFIG_CMD_USB=y +CONFIG_BOOTP_MAY_FAIL=y +CONFIG_BOOTP_BOOTFILESIZE=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_CMD_TIME=y +CONFIG_CMD_TIMER=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y +CONFIG_CMD_MTDPARTS=y +CONFIG_CMD_UBI=y +CONFIG_PARTITION_TYPE_GUID=y +CONFIG_OF_BOARD=y +CONFIG_DTB_RESELECT=y +CONFIG_MULTI_DTB_FIT=y +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_IP_DEFRAG=y +CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y +CONFIG_TFTP_BLOCKSIZE=4096 +CONFIG_CLK_VERSAL=y +CONFIG_DFU_RAM=y +CONFIG_ZYNQ_GPIO=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_CADENCE=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_DM_MAILBOX=y +CONFIG_ZYNQMP_IPI=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x0 +CONFIG_SUPPORT_EMMC_BOOT=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_ZYNQ_SDHCI_MIN_FREQ=10 +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_NATSEMI=y +CONFIG_PHY_REALTEK=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_VITESSE=y +CONFIG_PHY_FIXED=y +CONFIG_DM_ETH_PHY=y +CONFIG_PHY_GIGE=y +CONFIG_XILINX_AXIEMAC=y +CONFIG_ZYNQ_GEM=y +CONFIG_POWER_DOMAIN=y +CONFIG_ZYNQMP_POWER_DOMAIN=y +CONFIG_DM_RESET=y +CONFIG_RESET_ZYNQMP=y +CONFIG_ARM_DCC=y +CONFIG_PL01X_SERIAL=y +CONFIG_XILINX_UARTLITE=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y +CONFIG_CADENCE_OSPI_VERSAL=y +CONFIG_ZYNQ_SPI=y +CONFIG_ZYNQMP_GQSPI=y +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="Xilinx" +CONFIG_USB_GADGET_VENDOR_NUM=0x03FD +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_USB_FUNCTION_THOR=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/include/configs/xilinx_versal_net.h b/include/configs/xilinx_versal_net.h index d9286e7f5017..0ccd38b7e692 100644 --- a/include/configs/xilinx_versal_net.h +++ b/include/configs/xilinx_versal_net.h @@ -12,8 +12,6 @@ #ifndef __XILINX_VERSAL_NET_H #define __XILINX_VERSAL_NET_H -#define CONFIG_REMAKE_ELF - /* FIXME this is causing issue at least on IPP */ /* #define CONFIG_ARMV8_SWITCH_TO_EL1 */ @@ -21,26 +19,10 @@ #define GICD_BASE 0xF900 #define GICR_BASE 0xF906 -#define CONFIG_SYS_INIT_SP_ADDRCONFIG_SYS_TEXT_BASE - /* Serial setup */ -#define CONFIG_CPU_ARMV8 - #define CONFIG_SYS_BAUDRATE_TABLE \ { 4800, 9600, 19200, 38400, 57600, 115200 } -/* BOOTP options */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_MAY_FAIL - -/* Monitor Command Prompt */ -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 2048 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ -
[PATCH v2 7/9] reset: zynqmp: Enable reset driver for Versal NET
From: Jay Buddhabhatti Enable zynqmp reset driver for Versal NET. Signed-off-by: Jay Buddhabhatti Signed-off-by: Michal Simek --- (no changes since v1) drivers/reset/reset-zynqmp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/reset/reset-zynqmp.c b/drivers/reset/reset-zynqmp.c index 52c08c4722da..87b4df5bf81a 100644 --- a/drivers/reset/reset-zynqmp.c +++ b/drivers/reset/reset-zynqmp.c @@ -80,6 +80,7 @@ const struct reset_ops zynqmp_reset_ops = { static const struct udevice_id zynqmp_reset_ids[] = { { .compatible = "xlnx,zynqmp-reset" }, { .compatible = "xlnx,versal-reset" }, + { .compatible = "xlnx,versal-net-reset" }, { } }; -- 2.36.1
[PATCH v2 6/9] mailbox: zynqmp: Enable ipi mailbox driver for Versal NET
From: Jay Buddhabhatti Enable mailbox configs for Versal NET. Signed-off-by: Jay Buddhabhatti Signed-off-by: Michal Simek --- (no changes since v1) drivers/mailbox/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index acbdce11b7c7..47f24e0a02e0 100644 --- a/drivers/mailbox/Kconfig +++ b/drivers/mailbox/Kconfig @@ -54,7 +54,7 @@ config K3_SEC_PROXY config ZYNQMP_IPI bool "Xilinx ZynqMP IPI controller support" - depends on DM_MAILBOX && (ARCH_ZYNQMP || ARCH_VERSAL) + depends on DM_MAILBOX && (ARCH_ZYNQMP || ARCH_VERSAL || ARCH_VERSAL_NET) help This enables support for the Xilinx ZynqMP Inter Processor Interrupt communication controller. -- 2.36.1
[PATCH v2 5/9] firmware: zynqmp: Add Versal NET compatible string
From: Jay Buddhabhatti Add compatible string for Versal NET. Signed-off-by: Jay Buddhabhatti Signed-off-by: Michal Simek --- (no changes since v1) drivers/firmware/firmware-zynqmp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/firmware/firmware-zynqmp.c b/drivers/firmware/firmware-zynqmp.c index 76ddc6b4f404..d8e0d79c5744 100644 --- a/drivers/firmware/firmware-zynqmp.c +++ b/drivers/firmware/firmware-zynqmp.c @@ -370,6 +370,7 @@ int __maybe_unused xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2, static const struct udevice_id zynqmp_firmware_ids[] = { { .compatible = "xlnx,zynqmp-firmware" }, { .compatible = "xlnx,versal-firmware"}, + { .compatible = "xlnx,versal-net-firmware"}, { } }; -- 2.36.1
[PATCH v2 4/9] clk: versal: Enable clock driver for Versal NET
From: Jay Buddhabhatti Add support for Versal NET compatible string in clock driver. Signed-off-by: Jay Buddhabhatti Signed-off-by: Michal Simek --- (no changes since v1) drivers/clk/Kconfig | 2 +- drivers/clk/clk_versal.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index fd9e1a80c6aa..09aa97ee8c0e 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -184,7 +184,7 @@ config CLK_VERSACLOCK config CLK_VERSAL bool "Enable clock driver support for Versal" - depends on ARCH_VERSAL + depends on (ARCH_VERSAL || ARCH_VERSAL_NET) select ZYNQMP_FIRMWARE help This clock driver adds support for clock realted settings for diff --git a/drivers/clk/clk_versal.c b/drivers/clk/clk_versal.c index a9dd57b098fe..b2f62061cea2 100644 --- a/drivers/clk/clk_versal.c +++ b/drivers/clk/clk_versal.c @@ -739,6 +739,7 @@ static struct clk_ops versal_clk_ops = { static const struct udevice_id versal_clk_ids[] = { { .compatible = "xlnx,versal-clk" }, + { .compatible = "xlnx,versal-net-clk" }, { } }; -- 2.36.1
[PATCH v2 3/9] spi: zynqmp_gqspi: Add support for Versal NET
Add support for Versal NET platform. Signed-off-by: Michal Simek --- (no changes since v1) drivers/spi/zynqmp_gqspi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c index 4e718c545c64..d3cc8554b8fb 100644 --- a/drivers/spi/zynqmp_gqspi.c +++ b/drivers/spi/zynqmp_gqspi.c @@ -308,7 +308,8 @@ void zynqmp_qspi_set_tapdelay(struct udevice *bus, u32 baudrateval) debug("%s, req_hz:%d, clk_rate:%d, baudrateval:%d\n", __func__, reqhz, clk_rate, baudrateval); - if (!IS_ENABLED(CONFIG_ARCH_VERSAL)) { + if (!(IS_ENABLED(CONFIG_ARCH_VERSAL) || + IS_ENABLED(CONFIG_ARCH_VERSAL_NET))) { if (reqhz <= GQSPI_FREQ_40MHZ) { tapdlybypass = TAP_DLY_BYPASS_LQSPI_RX_VALUE << TAP_DLY_BYPASS_LQSPI_RX_SHIFT; -- 2.36.1
[PATCH v2 2/9] spi: cadence_qspi: Add support for Versal NET platform
Trivial changes to support cadence ospi driver for Versal NET platform. Also avoid ospi flash reset for now. Signed-off-by: Michal Simek --- (no changes since v1) arch/arm/mach-versal-net/include/mach/hardware.h | 4 drivers/spi/Kconfig | 2 +- drivers/spi/cadence_ospi_versal.c| 3 ++- 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-versal-net/include/mach/hardware.h b/arch/arm/mach-versal-net/include/mach/hardware.h index 2eb549849825..808ce48fd148 100644 --- a/arch/arm/mach-versal-net/include/mach/hardware.h +++ b/arch/arm/mach-versal-net/include/mach/hardware.h @@ -25,3 +25,7 @@ enum versal_net_platform { VERSAL_NET_EMU = 2, VERSAL_NET_QEMU = 3, }; + +#define VERSAL_SLCR_BASEADDR 0xF106 +#define VERSAL_AXI_MUX_SEL (VERSAL_SLCR_BASEADDR + 0x504) +#define VERSAL_OSPI_LINEAR_MODEBIT(1) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ac91d8225821..240ff212a39f 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -148,7 +148,7 @@ config CQSPI_REF_CLK config CADENCE_OSPI_VERSAL bool "Configure Versal OSPI" - depends on ARCH_VERSAL && CADENCE_QSPI + depends on (ARCH_VERSAL || ARCH_VERSAL_NET) && CADENCE_QSPI imply DM_GPIO help This option is used to enable Versal OSPI DMA operations which diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index a25c50bc5081..a9547a820031 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -130,6 +130,7 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv) #if defined(CONFIG_DM_GPIO) int cadence_qspi_versal_flash_reset(struct udevice *dev) { +#ifndef CONFIG_ARCH_VERSAL_NET struct gpio_desc gpio; u32 reset_gpio; int ret; @@ -165,7 +166,7 @@ int cadence_qspi_versal_flash_reset(struct udevice *dev) /* Set value 1 to pin */ dm_gpio_set_value(&gpio, 1); udelay(1); - +#endif return 0; } #else -- 2.36.1
[PATCH v2 0/9] xilinx: versal-net: Add support for new Versal NET SoC
Hi, I am sending support for new Xilinx/AMD SoC called Versal NET. Versal NET is very similar to origin Versal SOC. There is different register layout, some IPs have been upgraded like i3c and some other changes in different location. Thanks, Michal Changes in v2: - Move symbols from .h to defconfig, enable i2c mux, dm_eth_phy, squashfs and grepenv - Remove CONFIG_SYS_CBSIZE, CONFIG_BOOTP_BOOTFILESIZE, CONFIG_BOOTP_MAY_FAIL from .h file - Setup HAS_CUSTOM_SYS_INIT_SP_ADDR Jay Buddhabhatti (4): clk: versal: Enable clock driver for Versal NET firmware: zynqmp: Add Versal NET compatible string mailbox: zynqmp: Enable ipi mailbox driver for Versal NET reset: zynqmp: Enable reset driver for Versal NET Michal Simek (5): arm64: versal-net: Add support for Versal NET platform spi: cadence_qspi: Add support for Versal NET platform spi: zynqmp_gqspi: Add support for Versal NET arm64: versal-net: Add defconfig for Versal NET arm64: versal-net: Add support for mini configuration Kconfig | 2 +- MAINTAINERS | 7 + arch/arm/Kconfig | 14 ++ arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 3 + arch/arm/dts/versal-net-mini.dts | 67 +++ arch/arm/dts/xilinx-versal-net-virt.dts | 11 ++ arch/arm/mach-versal-net/Kconfig | 43 + arch/arm/mach-versal-net/Makefile | 10 ++ arch/arm/mach-versal-net/clk.c| 35 arch/arm/mach-versal-net/cpu.c| 89 + .../mach-versal-net/include/mach/hardware.h | 31 .../mach-versal-net/include/mach/sys_proto.h | 16 ++ board/xilinx/Kconfig | 6 +- board/xilinx/versal-net/Kconfig | 9 + board/xilinx/versal-net/MAINTAINERS | 8 + board/xilinx/versal-net/Makefile | 9 + board/xilinx/versal-net/board.c | 170 ++ configs/xilinx_versal_net_mini_defconfig | 72 configs/xilinx_versal_net_virt_defconfig | 131 ++ drivers/clk/Kconfig | 2 +- drivers/clk/clk_versal.c | 1 + drivers/firmware/firmware-zynqmp.c| 1 + drivers/mailbox/Kconfig | 2 +- drivers/reset/reset-zynqmp.c | 1 + drivers/spi/Kconfig | 2 +- drivers/spi/cadence_ospi_versal.c | 3 +- drivers/spi/zynqmp_gqspi.c| 3 +- env/Kconfig | 6 +- include/configs/xilinx_versal_net.h | 134 ++ include/configs/xilinx_versal_net_mini.h | 21 +++ 31 files changed, 898 insertions(+), 12 deletions(-) create mode 100644 arch/arm/dts/versal-net-mini.dts create mode 100644 arch/arm/dts/xilinx-versal-net-virt.dts create mode 100644 arch/arm/mach-versal-net/Kconfig create mode 100644 arch/arm/mach-versal-net/Makefile create mode 100644 arch/arm/mach-versal-net/clk.c create mode 100644 arch/arm/mach-versal-net/cpu.c create mode 100644 arch/arm/mach-versal-net/include/mach/hardware.h create mode 100644 arch/arm/mach-versal-net/include/mach/sys_proto.h create mode 100644 board/xilinx/versal-net/Kconfig create mode 100644 board/xilinx/versal-net/MAINTAINERS create mode 100644 board/xilinx/versal-net/Makefile create mode 100644 board/xilinx/versal-net/board.c create mode 100644 configs/xilinx_versal_net_mini_defconfig create mode 100644 configs/xilinx_versal_net_virt_defconfig create mode 100644 include/configs/xilinx_versal_net.h create mode 100644 include/configs/xilinx_versal_net_mini.h -- 2.36.1
[PATCH v2 1/9] arm64: versal-net: Add support for Versal NET platform
Versal NET platform is based on Versal chip which is reusing a lot of IPs. For more information about new IPs please take a look at DT which describe currently supported devices. The patch is adding architecture and board support with soc detection algorithm. Generic setting should be very similar to Versal but it will likely diverge in longer run. Signed-off-by: Michal Simek --- (no changes since v1) Kconfig | 2 +- MAINTAINERS | 7 + arch/arm/Kconfig | 14 ++ arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/xilinx-versal-net-virt.dts | 11 ++ arch/arm/mach-versal-net/Kconfig | 43 + arch/arm/mach-versal-net/Makefile | 10 ++ arch/arm/mach-versal-net/clk.c| 35 arch/arm/mach-versal-net/cpu.c| 89 + .../mach-versal-net/include/mach/hardware.h | 27 +++ .../mach-versal-net/include/mach/sys_proto.h | 16 ++ board/xilinx/Kconfig | 6 +- board/xilinx/versal-net/Kconfig | 9 + board/xilinx/versal-net/MAINTAINERS | 8 + board/xilinx/versal-net/Makefile | 9 + board/xilinx/versal-net/board.c | 170 ++ env/Kconfig | 6 +- include/configs/xilinx_versal_net.h | 156 19 files changed, 614 insertions(+), 7 deletions(-) create mode 100644 arch/arm/dts/xilinx-versal-net-virt.dts create mode 100644 arch/arm/mach-versal-net/Kconfig create mode 100644 arch/arm/mach-versal-net/Makefile create mode 100644 arch/arm/mach-versal-net/clk.c create mode 100644 arch/arm/mach-versal-net/cpu.c create mode 100644 arch/arm/mach-versal-net/include/mach/hardware.h create mode 100644 arch/arm/mach-versal-net/include/mach/sys_proto.h create mode 100644 board/xilinx/versal-net/Kconfig create mode 100644 board/xilinx/versal-net/MAINTAINERS create mode 100644 board/xilinx/versal-net/Makefile create mode 100644 board/xilinx/versal-net/board.c create mode 100644 include/configs/xilinx_versal_net.h diff --git a/Kconfig b/Kconfig index 991b260182e8..4542ed7333d1 100644 --- a/Kconfig +++ b/Kconfig @@ -539,7 +539,7 @@ config PLATFORM_ELFENTRY config STACK_SIZE hex "Define max stack size that can be used by U-Boot" - default 0x400 if ARCH_VERSAL || ARCH_ZYNQMP + default 0x400 if ARCH_VERSAL_NET || ARCH_VERSAL || ARCH_ZYNQMP default 0x20 if MICROBLAZE default 0x100 help diff --git a/MAINTAINERS b/MAINTAINERS index 1a7a56335f6f..82b5e9edc29c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -628,6 +628,13 @@ F: arch/arm/mach-uniphier/ F: configs/uniphier_*_defconfig N: uniphier +ARM VERSAL NET +M: Michal Simek +S: Maintained +T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git +F: arch/arm/mach-versal-net/ +N: (? S: Maintained diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 03169eba8dd9..1829b836623b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1247,6 +1247,18 @@ config ARCH_VERSAL imply BOARD_LATE_INIT imply ENV_VARS_UBOOT_RUNTIME_CONFIG +config ARCH_VERSAL_NET + bool "Support Xilinx Keystone Platform" + select ARM64 + select CLK + select DM + select DM_ETH if NET + select DM_MMC if MMC + select DM_SERIAL + select OF_CONTROL + imply BOARD_LATE_INIT + imply ENV_VARS_UBOOT_RUNTIME_CONFIG + config ARCH_VF610 bool "Freescale Vybrid" select CPU_V7A @@ -2296,6 +2308,8 @@ source "arch/arm/mach-zynqmp/Kconfig" source "arch/arm/mach-versal/Kconfig" +source "arch/arm/mach-versal-net/Kconfig" + source "arch/arm/mach-zynqmp-r5/Kconfig" source "arch/arm/cpu/armv7/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 1f4a1d57883b..ac602aed9c9a 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -88,6 +88,7 @@ machine-$(CONFIG_ARCH_OCTEONTX) += octeontx machine-$(CONFIG_ARCH_OCTEONTX2) += octeontx2 machine-$(CONFIG_ARCH_UNIPHIER)+= uniphier machine-$(CONFIG_ARCH_VERSAL) += versal +machine-$(CONFIG_ARCH_VERSAL_NET) += versal-net machine-$(CONFIG_ARCH_ZYNQ)+= zynq machine-$(CONFIG_ARCH_ZYNQMP) += zynqmp machine-$(CONFIG_ARCH_ZYNQMP_R5) += zynqmp-r5 diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5bff2e65b76f..a141d0de0c20 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -379,6 +379,8 @@ dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini-emmc0.dtb \ versal-mini-emmc1.dtb \ xilinx-versal-virt.dtb +dtb-$(CONFIG_ARCH_VERSAL_NET) += \ + xilinx-versal-net-virt.dtb dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \ zynqmp-r5.dtb dtb-$(CONFIG_AM33XX) +
Re: [PATCH V5] bsh: imx6ulz_smm_m2: Add imx6ulz BSH SMM M2 boards
On 18.09.22 17:48, Fabio Estevam wrote: On Sun, Sep 18, 2022 at 12:09 PM Michael Trimarchi wrote: Introduce BSH SystemMaster (SMM) M2 board family, which consists of: imx6ulz SMM M2 and imx6ulz SMM M2 PRO boards. Add support for imx6ulz BSH SMM M2 board: - 128 MiB DDR3 RAM - 256MiB Nand - USBOTG1 peripheral - fastboot. Signed-off-by: Michael Trimarchi Reviewed-by: Fabio Estevam Ok, thanks - I drop the old one and merge this into u-boot.imx (ok, I had to rebase it, I hope this does not create many issues). I send a PR to Tom now. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, 82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v4 3/3] board: qemu-riscv: enable semihosting
To enable semihosting we also need to enable the following configs in defconfigs: CONFIG_SEMIHOSTING CONFIG_SPL_SEMIHOSTING CONFIG_SEMIHOSTING_SERIAL CONFIG_SERIAL_PROBE_ALL CONFIG_SPL_FS_EXT4 CONFIG_SPL_FS_FAT Signed-off-by: Kautuk Consul --- configs/qemu-riscv32_defconfig | 4 configs/qemu-riscv32_smode_defconfig | 4 configs/qemu-riscv32_spl_defconfig | 7 +++ configs/qemu-riscv64_defconfig | 4 configs/qemu-riscv64_smode_defconfig | 4 configs/qemu-riscv64_spl_defconfig | 7 +++ 6 files changed, 30 insertions(+) diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 9634d7f77f..4961652548 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -20,3 +21,6 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 1c5a0617aa..91e4ffebc2 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -21,4 +22,7 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 2421c9a371..5fd28fc58c 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -1,9 +1,12 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y +CONFIG_SPL_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SPL=y +CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x8020 CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y @@ -18,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x10 CONFIG_SPL_BSS_START_ADDR=0x8400 CONFIG_SYS_SPL_MALLOC=y +CONFIG_SPL_FS_EXT4=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x400 @@ -25,5 +29,8 @@ CONFIG_SYS_BOOTM_LEN=0x400 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y # CONFIG_BINMAN_FDT is not set diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index d5eae95c80..87478f4481 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -21,3 +22,6 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 2861d07f97..5e9d6af3be 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -24,4 +25,7 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 1ecfa27ce2..e5d817b783 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -1,9 +1,12 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y +CONFIG_SPL_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_SPL=y +CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x8020 CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y @@ -18,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x10 CONFIG_SPL_BSS_START_ADDR=0x8400 CONFIG_SYS_SPL_MALLOC=y +CONFIG_SPL_FS_EXT4=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x400 @@ -25,5 +29,8 @@ CONFIG_SYS_BOOTM_LEN=0x400 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y # CONFIG_BINMAN_FDT is not set -- 2.34.1
[PATCH v4 2/3] arch/riscv: add semihosting support for RISC-V
We add RISC-V semihosting based serial console for JTAG based early debugging. The RISC-V semihosting specification is available at: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Signed-off-by: Anup Patel Signed-off-by: Kautuk Consul --- arch/riscv/include/asm/spl.h | 1 + arch/riscv/lib/Makefile | 2 ++ arch/riscv/lib/interrupts.c | 11 +++ arch/riscv/lib/semihosting.c | 24 lib/Kconfig | 6 +++--- 5 files changed, 41 insertions(+), 3 deletions(-) create mode 100644 arch/riscv/lib/semihosting.c diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h index e8a94fcb1f..2898a770ee 100644 --- a/arch/riscv/include/asm/spl.h +++ b/arch/riscv/include/asm/spl.h @@ -25,6 +25,7 @@ enum { BOOT_DEVICE_DFU, BOOT_DEVICE_XIP, BOOT_DEVICE_BOOTROM, + BOOT_DEVICE_SMH, BOOT_DEVICE_NONE }; diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 06020fcc2a..64e29804c1 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -42,3 +42,5 @@ extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC) obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o + +obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index 100be2e966..bd7cd772b8 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -17,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -149,6 +150,16 @@ ulong handle_trap(ulong cause, ulong epc, ulong tval, struct pt_regs *regs) /* An UEFI application may have changed gd. Restore U-Boot's gd. */ efi_restore_gd(); + if (cause == CAUSE_BREAKPOINT && + CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)) { + /* For semihosting fallback we simply skip the ebreak +* instruction. +*/ + disable_semihosting(); + epc += 4; + return epc; + } + is_irq = (cause & MCAUSE_INT); irq = (cause & ~MCAUSE_INT); diff --git a/arch/riscv/lib/semihosting.c b/arch/riscv/lib/semihosting.c new file mode 100644 index 00..d6593b02a6 --- /dev/null +++ b/arch/riscv/lib/semihosting.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Ventana Micro Systems Inc. + */ + +#include + +long smh_trap(int sysnum, void *addr) +{ + register int ret asm ("a0") = sysnum; + register void *param0 asm ("a1") = addr; + + asm volatile (".align 4\n" + ".option push\n" + ".option norvc\n" + + "slli zero, zero, 0x1f\n" + "ebreak\n" + "srai zero, zero, 7\n" + ".option pop\n" + : "+r" (ret) : "r" (param0) : "memory"); + + return ret; +} diff --git a/lib/Kconfig b/lib/Kconfig index 97920e7552..eed3a231d9 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -85,7 +85,7 @@ config SEMIHOSTING config SEMIHOSTING_FALLBACK bool "Recover gracefully when semihosting fails" - depends on SEMIHOSTING && ARM64 + depends on SEMIHOSTING && (ARM64 || RISCV) default y help Normally, if U-Boot makes a semihosting call and no debugger is @@ -108,8 +108,8 @@ config SPL_SEMIHOSTING config SPL_SEMIHOSTING_FALLBACK bool "Recover gracefully when semihosting fails in SPL" - depends on SPL_SEMIHOSTING && ARM64 - select ARMV8_SPL_EXCEPTION_VECTORS + depends on SPL_SEMIHOSTING && (ARM64 || RISCV) + select ARMV8_SPL_EXCEPTION_VECTORS if ARM64 default y help Normally, if U-Boot makes a semihosting call and no debugger is -- 2.34.1
[PATCH v4 1/3] lib: Add common semihosting library
We factor out the arch-independent parts of the ARM semihosting implementation as a common library so that it can be shared with RISC-V. Signed-off-by: Kautuk Consul --- arch/arm/Kconfig | 46 - arch/arm/lib/semihosting.c | 181 +--- include/semihosting.h | 11 +++ lib/Kconfig| 46 + lib/Makefile | 2 + lib/semihosting.c | 186 + 6 files changed, 246 insertions(+), 226 deletions(-) create mode 100644 lib/semihosting.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 82cd456f51..ee6a9fadd9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -413,52 +413,6 @@ config ARM_SMCCC This should be enabled if U-Boot needs to communicate with system firmware (for example, PSCI) according to SMCCC. -config SEMIHOSTING - bool "Support ARM semihosting" - help - Semihosting is a method for a target to communicate with a host - debugger. It uses special instructions which the debugger will trap - on and interpret. This allows U-Boot to read/write files, print to - the console, and execute arbitrary commands on the host system. - - Enabling this option will add support for reading and writing files - on the host system. If you don't have a debugger attached then trying - to do this will likely cause U-Boot to hang. Say 'n' if you are unsure. - -config SEMIHOSTING_FALLBACK - bool "Recover gracefully when semihosting fails" - depends on SEMIHOSTING && ARM64 - default y - help - Normally, if U-Boot makes a semihosting call and no debugger is - attached, then it will panic due to a synchronous abort - exception. This config adds an exception handler which will allow - U-Boot to recover. Say 'y' if unsure. - -config SPL_SEMIHOSTING - bool "Support ARM semihosting in SPL" - depends on SPL - help - Semihosting is a method for a target to communicate with a host - debugger. It uses special instructions which the debugger will trap - on and interpret. This allows U-Boot to read/write files, print to - the console, and execute arbitrary commands on the host system. - - Enabling this option will add support for reading and writing files - on the host system. If you don't have a debugger attached then trying - to do this will likely cause U-Boot to hang. Say 'n' if you are unsure. - -config SPL_SEMIHOSTING_FALLBACK - bool "Recover gracefully when semihosting fails in SPL" - depends on SPL_SEMIHOSTING && ARM64 - select ARMV8_SPL_EXCEPTION_VECTORS - default y - help - Normally, if U-Boot makes a semihosting call and no debugger is - attached, then it will panic due to a synchronous abort - exception. This config adds an exception handler which will allow - U-Boot to recover. Say 'y' if unsure. - config SYS_THUMB_BUILD bool "Build U-Boot using the Thumb instruction set" depends on !ARM64 diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index 01d652a6b8..11e7b85ee6 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -10,25 +10,11 @@ * available in silicon now, fastmodel usage makes less sense for them. */ #include -#include -#include - -#define SYSOPEN0x01 -#define SYSCLOSE 0x02 -#define SYSWRITEC 0x03 -#define SYSWRITE0 0x04 -#define SYSWRITE 0x05 -#define SYSREAD0x06 -#define SYSREADC 0x07 -#define SYSISERROR 0x08 -#define SYSSEEK0x0A -#define SYSFLEN0x0C -#define SYSERRNO 0x13 /* * Call the handler */ -static noinline long smh_trap(unsigned int sysnum, void *addr) +long smh_trap(unsigned int sysnum, void *addr) { register long result asm("r0"); #if defined(CONFIG_ARM64) @@ -41,168 +27,3 @@ static noinline long smh_trap(unsigned int sysnum, void *addr) #endif return result; } - -#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) -static bool _semihosting_enabled = true; -static bool try_semihosting = true; - -bool semihosting_enabled(void) -{ - if (try_semihosting) { - smh_trap(SYSERRNO, NULL); - try_semihosting = false; - } - - return _semihosting_enabled; -} - -void disable_semihosting(void) -{ - _semihosting_enabled = false; -} -#endif - -/** - * smh_errno() - Read the host's errno - * - * This gets the value of the host's errno and negates it. The host's errno may - * or may not be set, so only call this function if a previous semihosting call - * has failed. - * - * Return: a negative error value - */ -static int smh_errno(void) -{ - long ret = smh_trap(SYSERRNO, NULL); - - if (ret > 0 && ret < INT_MAX) - return -ret; - return
[PATCH v4 0/3] Add riscv semihosting support in u-boot
Semihosting is a mechanism that enables code running on a target to communicate and use the Input/Output facilities on a host computer that is running a debugger. This patchset adds support for semihosting in u-boot for RISCV64 targets. CHANGES since v2 and v3: - v2: Move the arch/arm/Kconfig common *SEMIHOSTING* config options from arch/arm/Kconfig to lib/Kconfig. - v2: Improve the *SEMIHOSTING_FALLBACK config options in lib/Kconfig to depend on RISCV or ARM64. - v2: Remove the arch/riscv/include/asm/semhosting.h file. - v2: Improve the arch/riscv/lib/semihosting.c by removing the jump statement and moving the .align 4 to before the 2 .option directives. - v3: Additionally check for the RISCV config option in the "depends" of the SPL_SEMIHOSTING_FALLBACK config option in lib/Kconfig. Compilation and test commands for SPL and S-mode configurations = U-Boot S-mode on QEMU virt // Compilation of S-mode u-boot ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- make qemu-riscv64_smode_defconfig make // Run riscv 64-bit u-boot with opensbi on qemu qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\ opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\ u-boot/u-boot.bin U-Boot SPL on QEMU virt // Compilation of u-boot-spl ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- make qemu-riscv64_spl_defconfig make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin // Run 64-bit u-boot-spl in qemu qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\ u-boot/spl/u-boot-spl.bin -device\ loader,file=u-boot/u-boot.itb,addr=0x8020 Kautuk Consul (3): lib: Add common semihosting library arch/riscv: add semihosting support for RISC-V board: qemu-riscv: enable semihosting arch/arm/Kconfig | 46 --- arch/arm/lib/semihosting.c | 181 +- arch/riscv/include/asm/spl.h | 1 + arch/riscv/lib/Makefile | 2 + arch/riscv/lib/interrupts.c | 11 ++ arch/riscv/lib/semihosting.c | 24 configs/qemu-riscv32_defconfig | 4 + configs/qemu-riscv32_smode_defconfig | 4 + configs/qemu-riscv32_spl_defconfig | 7 + configs/qemu-riscv64_defconfig | 4 + configs/qemu-riscv64_smode_defconfig | 4 + configs/qemu-riscv64_spl_defconfig | 7 + include/semihosting.h| 11 ++ lib/Kconfig | 46 +++ lib/Makefile | 2 + lib/semihosting.c| 186 +++ 16 files changed, 314 insertions(+), 226 deletions(-) create mode 100644 arch/riscv/lib/semihosting.c create mode 100644 lib/semihosting.c -- 2.34.1
Re: u-boot 2022-07 on STM32F746G-DISCO
Hi again, Waldemar Brodkorb wrote, > Hi, > > I am trying to run u-boot on a STM32F746G-DISCO device. > I am configuring u-boot with stm32f746-disco_spl_defconfig. > > But nothing happens on the LCD nor on the serial console. > I use screen /dev/ttyACM0 115200 under Linux to connect. It seems my USB port on my laptop was buggy, after reboot I get following output via serial console: U-Boot SPL 2022.07 (Sep 19 2022 - 13:20:08 +0200) Trying to boot from XIP U-Boot 2022.07 (Sep 19 2022 - 13:20:08 +0200) Model: STMicroelectronics STM32F746-DISCO board DRAM: 8 MiB Hard fault pc : 080087d6lr : c05aa775xPSR : a100 r12 : 0010 r3 : 080087c1r2 : 0805344d r1 : 08008001r0 : c05aa000 Resetting CPU ... resetting ... I get a Hard fault. I then tried an older version of u-boot using the information from https://github.com/fdu/STM32F746G-disco_Buildroot as a hint. With U-Boot 2018.11 I get a working binary (I had to disable Falcon mode): U-Boot SPL 2018.11 (Sep 19 2022 - 13:41:50 +0200) Trying to boot from XIP U-Boot 2018.11 (Sep 19 2022 - 13:41:50 +0200) Model: STMicroelectronics STM32F746-DISCO board DRAM: 8 MiB Flash: 1 MiB MMC: sdio@40012c00: 0 In:serial Out: serial Err: serial usr button is at LOW LEVEL Net: Warning: ethernet@40028000 (eth0) using random MAC address - fe:f8:94:5f:5e:26 eth0: ethernet@40028000 Hit SPACE in 3 seconds to stop autoboot. Wrong Image Format for bootm command ERROR: can't get kernel image! U-Boot > Seems like a regression to me. best regards Waldemar
Re: [PATCH v3 2/3] arch/riscv: add semihosting support for RISC-V
Ugh.. made a mistake in one of the config options. Please ignore this patchset too. Will send out a v4 now. :-( On Mon, Sep 19, 2022 at 4:53 PM Kautuk Consul wrote: > > We add RISC-V semihosting based serial console for JTAG based early > debugging. > > The RISC-V semihosting specification is available at: > https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc > > Signed-off-by: Anup Patel > Signed-off-by: Kautuk Consul > --- > arch/riscv/include/asm/spl.h | 1 + > arch/riscv/lib/Makefile | 2 ++ > arch/riscv/lib/interrupts.c | 11 +++ > arch/riscv/lib/semihosting.c | 24 > lib/Kconfig | 4 ++-- > 5 files changed, 40 insertions(+), 2 deletions(-) > create mode 100644 arch/riscv/lib/semihosting.c > > diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h > index e8a94fcb1f..2898a770ee 100644 > --- a/arch/riscv/include/asm/spl.h > +++ b/arch/riscv/include/asm/spl.h > @@ -25,6 +25,7 @@ enum { > BOOT_DEVICE_DFU, > BOOT_DEVICE_XIP, > BOOT_DEVICE_BOOTROM, > + BOOT_DEVICE_SMH, > BOOT_DEVICE_NONE > }; > > diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile > index 06020fcc2a..64e29804c1 100644 > --- a/arch/riscv/lib/Makefile > +++ b/arch/riscv/lib/Makefile > @@ -42,3 +42,5 @@ extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC) > obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o > obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o > obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o > + > +obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o > diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c > index 100be2e966..bd7cd772b8 100644 > --- a/arch/riscv/lib/interrupts.c > +++ b/arch/riscv/lib/interrupts.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include > > DECLARE_GLOBAL_DATA_PTR; > > @@ -149,6 +150,16 @@ ulong handle_trap(ulong cause, ulong epc, ulong tval, > struct pt_regs *regs) > /* An UEFI application may have changed gd. Restore U-Boot's gd. */ > efi_restore_gd(); > > + if (cause == CAUSE_BREAKPOINT && > + CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)) { > + /* For semihosting fallback we simply skip the ebreak > +* instruction. > +*/ > + disable_semihosting(); > + epc += 4; > + return epc; > + } > + > is_irq = (cause & MCAUSE_INT); > irq = (cause & ~MCAUSE_INT); > > diff --git a/arch/riscv/lib/semihosting.c b/arch/riscv/lib/semihosting.c > new file mode 100644 > index 00..d6593b02a6 > --- /dev/null > +++ b/arch/riscv/lib/semihosting.c > @@ -0,0 +1,24 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * Copyright (C) 2022 Ventana Micro Systems Inc. > + */ > + > +#include > + > +long smh_trap(int sysnum, void *addr) > +{ > + register int ret asm ("a0") = sysnum; > + register void *param0 asm ("a1") = addr; > + > + asm volatile (".align 4\n" > + ".option push\n" > + ".option norvc\n" > + > + "slli zero, zero, 0x1f\n" > + "ebreak\n" > + "srai zero, zero, 7\n" > + ".option pop\n" > + : "+r" (ret) : "r" (param0) : "memory"); > + > + return ret; > +} > diff --git a/lib/Kconfig b/lib/Kconfig > index 97920e7552..d1f5262b20 100644 > --- a/lib/Kconfig > +++ b/lib/Kconfig > @@ -85,7 +85,7 @@ config SEMIHOSTING > > config SEMIHOSTING_FALLBACK > bool "Recover gracefully when semihosting fails" > - depends on SEMIHOSTING && ARM64 > + depends on SEMIHOSTING && (ARM64 || RISCV) > default y > help > Normally, if U-Boot makes a semihosting call and no debugger is > @@ -109,7 +109,7 @@ config SPL_SEMIHOSTING > config SPL_SEMIHOSTING_FALLBACK > bool "Recover gracefully when semihosting fails in SPL" > depends on SPL_SEMIHOSTING && ARM64 Not updated this depends. it should be ARM64 || RISCV. Will address this in v4. > - select ARMV8_SPL_EXCEPTION_VECTORS > + select ARMV8_SPL_EXCEPTION_VECTORS if ARM64 > default y > help > Normally, if U-Boot makes a semihosting call and no debugger is > -- > 2.34.1 >
Re: [PATCH] rpi: Set FDT for RPi CM4 to the IO Board one
Hi Ariel, On 16/09/2022 17:13, Ariel D'Alessandro wrote: For the RPi CM4 (Compute Module 4), we currently try to load the dtb file bcm2711-rpi-cm4.dtb, which is not built by the upstream kernel. Instead, the only CM4 dtb file provided by linux upstream is the bcm2711-rpi-cm4-io.dtb, so let's use that. Signed-off-by: Ariel D'Alessandro --- board/raspberrypi/rpi/rpi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/board/raspberrypi/rpi/rpi.c b/board/raspberrypi/rpi/rpi.c index 17b8108cc8..b88f80ce05 100644 --- a/board/raspberrypi/rpi/rpi.c +++ b/board/raspberrypi/rpi/rpi.c @@ -168,8 +168,8 @@ static const struct rpi_model rpi_models_new_scheme[] = { true, }, [0x14] = { - "Compute Module 4", - DTB_DIR "bcm2711-rpi-cm4.dtb", + "Compute Module 4 IO Board", + DTB_DIR "bcm2711-rpi-cm4-io.dtb", We had that discussion in the past. It is supposed that most CM4s will be used with a custom board. I don't think it's a good idea to tie the ID of the module to a specific IO board. Regards, Matthias true, }, };
Re: [PATCH 0/9] Nokia RX-51: Small cleanups and UBI boot test case
On Monday 19 September 2022 13:12:41 Alexander Dahl wrote: > Hello Pali, > > Am Sun, Sep 04, 2022 at 03:28:57AM +0200 schrieb Pali Rohár: > > Do various small fixup/cleanups and extend test script to boot kernel > > image from UBI volume. This test verifies that U-Boot UBI implementation > > is working and U-Boot can read volume with bootable kernel code > > correctly. And therefore CI prevents UBI breakage. > > > > Note that U-Boot UBIFS code on ARM is currently somehow broken and > > trying to mount UBIFS from UBI volume fails :-( I have already tried to > > debug this issue but I have no idea why it is failing. Function > > check_lpt_crc in unpack_ltab is failing. Volume is for sure correct and > > valid because Linux kernel can successfully mount it. And to make it > > more suspicious, U-Boot UBIFS is working fine on big endian powerpc > > platform. So UBIFS issue is probably endian or arch specific. > > (This is UBIFS related, not UBI related.) > > I had some trouble with UBIFS volumes created by Linux not mountable > by U-Boot myself recently. Problem was Linux gained zstd compression > support for UBIFS with version 5.3 and that was made default with > kernel 5.13. U-Boot does not support zstd compression at least up to > version 2022.04 (did not try later ones), and simply refuses to mount > those volumes. The error message however was different than yours, > but maybe you get an idea what might be wrong. I would certainly > check with what features the UBIFS is created and if U-Boot supports > that. Hello! The issue is not with zstd compression, I'm sure as I'm generating it without it. Plus it is working fine with old 2.6.28 kernel, which does not have any zstd support. The issue is with parsing UBIFS LPT, it looks like that U-Boot is trying to read it from wrong position or maybe wrong LEB. My another idea is that issue could be in u-boot onenand driver used on n900 and in qemu. Maybe it is possible that 'mtd' and 'ubi' commands do not trigger this issue and hence reading it working fine, but is triggered by ubifs code and ubifs reading fails. On powerpc platform where ubifs is working fine is present freescale nand controller / driver, not samsung/onenand. > HTH & Greets > Alex > > > > > Pali Rohár (9): > > Nokia RX-51: Remove label copy_kernel_start from lowlevel_init.S > > Nokia RX-51: Do not clear unknown memory in lowlevel_init.S > > Nokia RX-51: Set default SYS_LOAD_ADDR to 0x80008000 > > Nokia RX-51: Change UBIFS volume size to 1870 LEBs in test script > > Nokia RX-51: Call bootm in test script only when image is valid > > Nokia RX-51: Fix documentation how to enable UBI support > > Nokia RX-51: Do not set useless ARCH= in test script > > Nokia RX-51: Add comment describing kernel image type into test script > > Nokia RX-51: Add booting from UBI into test script > > > > board/nokia/rx51/lowlevel_init.S | 7 +-- > > configs/nokia_rx51_defconfig | 2 +- > > doc/board/nokia/rx51.rst | 3 +- > > test/nokia_rx51_test.sh | 97 +--- > > 4 files changed, 82 insertions(+), 27 deletions(-) > > > > -- > > 2.20.1 > >
[PATCH v3 3/3] board: qemu-riscv: enable semihosting
To enable semihosting we also need to enable the following configs in defconfigs: CONFIG_SEMIHOSTING CONFIG_SPL_SEMIHOSTING CONFIG_SEMIHOSTING_SERIAL CONFIG_SERIAL_PROBE_ALL CONFIG_SPL_FS_EXT4 CONFIG_SPL_FS_FAT Signed-off-by: Kautuk Consul --- configs/qemu-riscv32_defconfig | 4 configs/qemu-riscv32_smode_defconfig | 4 configs/qemu-riscv32_spl_defconfig | 7 +++ configs/qemu-riscv64_defconfig | 4 configs/qemu-riscv64_smode_defconfig | 4 configs/qemu-riscv64_spl_defconfig | 7 +++ 6 files changed, 30 insertions(+) diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 9634d7f77f..4961652548 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -20,3 +21,6 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 1c5a0617aa..91e4ffebc2 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -21,4 +22,7 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 2421c9a371..5fd28fc58c 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -1,9 +1,12 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y +CONFIG_SPL_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SPL=y +CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x8020 CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y @@ -18,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x10 CONFIG_SPL_BSS_START_ADDR=0x8400 CONFIG_SYS_SPL_MALLOC=y +CONFIG_SPL_FS_EXT4=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x400 @@ -25,5 +29,8 @@ CONFIG_SYS_BOOTM_LEN=0x400 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y # CONFIG_BINMAN_FDT is not set diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index d5eae95c80..87478f4481 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -21,3 +22,6 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 2861d07f97..5e9d6af3be 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -1,4 +1,5 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 @@ -24,4 +25,7 @@ CONFIG_CMD_NVEDIT_EFI=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 1ecfa27ce2..e5d817b783 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -1,9 +1,12 @@ CONFIG_RISCV=y +CONFIG_SEMIHOSTING=y +CONFIG_SPL_SEMIHOSTING=y CONFIG_SYS_MALLOC_LEN=0x80 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_SPL=y +CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x8020 CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y @@ -18,6 +21,7 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_SPL_MAX_SIZE=0x10 CONFIG_SPL_BSS_START_ADDR=0x8400 CONFIG_SYS_SPL_MALLOC=y +CONFIG_SPL_FS_EXT4=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 CONFIG_SYS_BOOTM_LEN=0x400 @@ -25,5 +29,8 @@ CONFIG_SYS_BOOTM_LEN=0x400 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y CONFIG_SYS_MAX_FLASH_BANKS=2 +# CONFIG_SERIAL_PUTS is not set +CONFIG_SERIAL_PROBE_ALL=y +CONFIG_SEMIHOSTING_SERIAL=y CONFIG_SYSRESET_SBI=y # CONFIG_BINMAN_FDT is not set -- 2.34.1
[PATCH v3 2/3] arch/riscv: add semihosting support for RISC-V
We add RISC-V semihosting based serial console for JTAG based early debugging. The RISC-V semihosting specification is available at: https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc Signed-off-by: Anup Patel Signed-off-by: Kautuk Consul --- arch/riscv/include/asm/spl.h | 1 + arch/riscv/lib/Makefile | 2 ++ arch/riscv/lib/interrupts.c | 11 +++ arch/riscv/lib/semihosting.c | 24 lib/Kconfig | 4 ++-- 5 files changed, 40 insertions(+), 2 deletions(-) create mode 100644 arch/riscv/lib/semihosting.c diff --git a/arch/riscv/include/asm/spl.h b/arch/riscv/include/asm/spl.h index e8a94fcb1f..2898a770ee 100644 --- a/arch/riscv/include/asm/spl.h +++ b/arch/riscv/include/asm/spl.h @@ -25,6 +25,7 @@ enum { BOOT_DEVICE_DFU, BOOT_DEVICE_XIP, BOOT_DEVICE_BOOTROM, + BOOT_DEVICE_SMH, BOOT_DEVICE_NONE }; diff --git a/arch/riscv/lib/Makefile b/arch/riscv/lib/Makefile index 06020fcc2a..64e29804c1 100644 --- a/arch/riscv/lib/Makefile +++ b/arch/riscv/lib/Makefile @@ -42,3 +42,5 @@ extra-$(CONFIG_EFI) += $(EFI_CRT0) $(EFI_RELOC) obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMSET) += memset.o obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMMOVE) += memmove.o obj-$(CONFIG_$(SPL_TPL_)USE_ARCH_MEMCPY) += memcpy.o + +obj-$(CONFIG_$(SPL_TPL_)SEMIHOSTING) += semihosting.o diff --git a/arch/riscv/lib/interrupts.c b/arch/riscv/lib/interrupts.c index 100be2e966..bd7cd772b8 100644 --- a/arch/riscv/lib/interrupts.c +++ b/arch/riscv/lib/interrupts.c @@ -17,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -149,6 +150,16 @@ ulong handle_trap(ulong cause, ulong epc, ulong tval, struct pt_regs *regs) /* An UEFI application may have changed gd. Restore U-Boot's gd. */ efi_restore_gd(); + if (cause == CAUSE_BREAKPOINT && + CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK)) { + /* For semihosting fallback we simply skip the ebreak +* instruction. +*/ + disable_semihosting(); + epc += 4; + return epc; + } + is_irq = (cause & MCAUSE_INT); irq = (cause & ~MCAUSE_INT); diff --git a/arch/riscv/lib/semihosting.c b/arch/riscv/lib/semihosting.c new file mode 100644 index 00..d6593b02a6 --- /dev/null +++ b/arch/riscv/lib/semihosting.c @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Ventana Micro Systems Inc. + */ + +#include + +long smh_trap(int sysnum, void *addr) +{ + register int ret asm ("a0") = sysnum; + register void *param0 asm ("a1") = addr; + + asm volatile (".align 4\n" + ".option push\n" + ".option norvc\n" + + "slli zero, zero, 0x1f\n" + "ebreak\n" + "srai zero, zero, 7\n" + ".option pop\n" + : "+r" (ret) : "r" (param0) : "memory"); + + return ret; +} diff --git a/lib/Kconfig b/lib/Kconfig index 97920e7552..d1f5262b20 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -85,7 +85,7 @@ config SEMIHOSTING config SEMIHOSTING_FALLBACK bool "Recover gracefully when semihosting fails" - depends on SEMIHOSTING && ARM64 + depends on SEMIHOSTING && (ARM64 || RISCV) default y help Normally, if U-Boot makes a semihosting call and no debugger is @@ -109,7 +109,7 @@ config SPL_SEMIHOSTING config SPL_SEMIHOSTING_FALLBACK bool "Recover gracefully when semihosting fails in SPL" depends on SPL_SEMIHOSTING && ARM64 - select ARMV8_SPL_EXCEPTION_VECTORS + select ARMV8_SPL_EXCEPTION_VECTORS if ARM64 default y help Normally, if U-Boot makes a semihosting call and no debugger is -- 2.34.1
[PATCH v3 1/3] lib: Add common semihosting library
We factor out the arch-independent parts of the ARM semihosting implementation as a common library so that it can be shared with RISC-V. Signed-off-by: Kautuk Consul --- arch/arm/Kconfig | 46 - arch/arm/lib/semihosting.c | 181 +--- include/semihosting.h | 11 +++ lib/Kconfig| 46 + lib/Makefile | 2 + lib/semihosting.c | 186 + 6 files changed, 246 insertions(+), 226 deletions(-) create mode 100644 lib/semihosting.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 82cd456f51..ee6a9fadd9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -413,52 +413,6 @@ config ARM_SMCCC This should be enabled if U-Boot needs to communicate with system firmware (for example, PSCI) according to SMCCC. -config SEMIHOSTING - bool "Support ARM semihosting" - help - Semihosting is a method for a target to communicate with a host - debugger. It uses special instructions which the debugger will trap - on and interpret. This allows U-Boot to read/write files, print to - the console, and execute arbitrary commands on the host system. - - Enabling this option will add support for reading and writing files - on the host system. If you don't have a debugger attached then trying - to do this will likely cause U-Boot to hang. Say 'n' if you are unsure. - -config SEMIHOSTING_FALLBACK - bool "Recover gracefully when semihosting fails" - depends on SEMIHOSTING && ARM64 - default y - help - Normally, if U-Boot makes a semihosting call and no debugger is - attached, then it will panic due to a synchronous abort - exception. This config adds an exception handler which will allow - U-Boot to recover. Say 'y' if unsure. - -config SPL_SEMIHOSTING - bool "Support ARM semihosting in SPL" - depends on SPL - help - Semihosting is a method for a target to communicate with a host - debugger. It uses special instructions which the debugger will trap - on and interpret. This allows U-Boot to read/write files, print to - the console, and execute arbitrary commands on the host system. - - Enabling this option will add support for reading and writing files - on the host system. If you don't have a debugger attached then trying - to do this will likely cause U-Boot to hang. Say 'n' if you are unsure. - -config SPL_SEMIHOSTING_FALLBACK - bool "Recover gracefully when semihosting fails in SPL" - depends on SPL_SEMIHOSTING && ARM64 - select ARMV8_SPL_EXCEPTION_VECTORS - default y - help - Normally, if U-Boot makes a semihosting call and no debugger is - attached, then it will panic due to a synchronous abort - exception. This config adds an exception handler which will allow - U-Boot to recover. Say 'y' if unsure. - config SYS_THUMB_BUILD bool "Build U-Boot using the Thumb instruction set" depends on !ARM64 diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index 01d652a6b8..11e7b85ee6 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -10,25 +10,11 @@ * available in silicon now, fastmodel usage makes less sense for them. */ #include -#include -#include - -#define SYSOPEN0x01 -#define SYSCLOSE 0x02 -#define SYSWRITEC 0x03 -#define SYSWRITE0 0x04 -#define SYSWRITE 0x05 -#define SYSREAD0x06 -#define SYSREADC 0x07 -#define SYSISERROR 0x08 -#define SYSSEEK0x0A -#define SYSFLEN0x0C -#define SYSERRNO 0x13 /* * Call the handler */ -static noinline long smh_trap(unsigned int sysnum, void *addr) +long smh_trap(unsigned int sysnum, void *addr) { register long result asm("r0"); #if defined(CONFIG_ARM64) @@ -41,168 +27,3 @@ static noinline long smh_trap(unsigned int sysnum, void *addr) #endif return result; } - -#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) -static bool _semihosting_enabled = true; -static bool try_semihosting = true; - -bool semihosting_enabled(void) -{ - if (try_semihosting) { - smh_trap(SYSERRNO, NULL); - try_semihosting = false; - } - - return _semihosting_enabled; -} - -void disable_semihosting(void) -{ - _semihosting_enabled = false; -} -#endif - -/** - * smh_errno() - Read the host's errno - * - * This gets the value of the host's errno and negates it. The host's errno may - * or may not be set, so only call this function if a previous semihosting call - * has failed. - * - * Return: a negative error value - */ -static int smh_errno(void) -{ - long ret = smh_trap(SYSERRNO, NULL); - - if (ret > 0 && ret < INT_MAX) - return -ret; - return
[PATCH v3 0/3] Add riscv semihosting support in u-boot
Semihosting is a mechanism that enables code running on a target to communicate and use the Input/Output facilities on a host computer that is running a debugger. This patchset adds support for semihosting in u-boot for RISCV64 targets. CHANGES since v2: - Move the arch/arm/Kconfig common *SEMIHOSTING* config options from arch/arm/Kconfig to lib/Kconfig. - Improve the *SEMIHOSTING_FALLBACK config options in lib/Kconfig to depend on RISCV or ARM64. - Remove the arch/riscv/include/asm/semhosting.h file. - Improve the arch/riscv/lib/semihosting.c by removing the jump statement and moving the .align 4 to before the 2 .option directives. Kautuk Consul (3): lib: Add common semihosting library arch/riscv: add semihosting support for RISC-V board: qemu-riscv: enable semihosting arch/arm/Kconfig | 46 --- arch/arm/lib/semihosting.c | 181 +- arch/riscv/include/asm/spl.h | 1 + arch/riscv/lib/Makefile | 2 + arch/riscv/lib/interrupts.c | 11 ++ arch/riscv/lib/semihosting.c | 24 configs/qemu-riscv32_defconfig | 4 + configs/qemu-riscv32_smode_defconfig | 4 + configs/qemu-riscv32_spl_defconfig | 7 + configs/qemu-riscv64_defconfig | 4 + configs/qemu-riscv64_smode_defconfig | 4 + configs/qemu-riscv64_spl_defconfig | 7 + include/semihosting.h| 11 ++ lib/Kconfig | 46 +++ lib/Makefile | 2 + lib/semihosting.c| 186 +++ 16 files changed, 314 insertions(+), 226 deletions(-) create mode 100644 arch/riscv/lib/semihosting.c create mode 100644 lib/semihosting.c -- 2.34.1
u-boot 2022-07 on STM32F746G-DISCO
Hi, I am trying to run u-boot on a STM32F746G-DISCO device. I am configuring u-boot with stm32f746-disco_spl_defconfig. I use following openocd command to flash the output of the build: openocd \ -f interface/stlink.cfg -f board/stm32f7discovery.cfg \ -c "init" \ -c "reset init" \ -c "flash probe 0" \ -c "flash info 0" \ -c "flash write_image erase u-boot-spl.bin 0x0800" \ -c "flash write_image erase u-boot-dtb.bin 0x08008000" \ -c "reset run" \ -c "shutdown" The output looks like: Open On-Chip Debugger 0.11.0 Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html Warn : Interface already configured, ignoring Error: already specified hl_layout stlink Info : The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD Info : clock speed 2000 kHz Info : STLINK V2J25M14 (API v2) VID:PID 0483:374B Info : Target voltage: 3.240633 Warn : Silicon bug: single stepping may enter pending exception handler! Info : stm32f7x.cpu: hardware has 8 breakpoints, 4 watchpoints Info : starting gdb server for stm32f7x.cpu on Info : Listening on port for gdb connections Info : Unable to match requested speed 2000 kHz, using 1800 kHz Info : Unable to match requested speed 2000 kHz, using 1800 kHz target halted due to debug-request, current mode: Thread xPSR: 0x0100 pc: 0x080003fc msp: 0x2005 Info : Unable to match requested speed 8000 kHz, using 4000 kHz Info : Unable to match requested speed 8000 kHz, using 4000 kHz Info : device id = 0x10016449 Info : flash size = 1024 kbytes flash 'stm32f2x' found at 0x0800 #0 : stm32f2x at 0x0800, size 0x0010, buswidth 0, chipwidth 0 # 0: 0x (0x8000 32kB) not protected # 1: 0x8000 (0x8000 32kB) not protected # 2: 0x0001 (0x8000 32kB) not protected # 3: 0x00018000 (0x8000 32kB) not protected # 4: 0x0002 (0x2 128kB) not protected # 5: 0x0004 (0x4 256kB) not protected # 6: 0x0008 (0x4 256kB) not protected # 7: 0x000c (0x4 256kB) not protected STM32F7[4|5]x - Rev: Z auto erase enabled wrote 32768 bytes from file u-boot-spl.bin in 0.802971s (39.852 KiB/s) auto erase enabled wrote 491520 bytes from file u-boot-dtb.bin in 8.638284s (55.567 KiB/s) Info : Unable to match requested speed 2000 kHz, using 1800 kHz Info : Unable to match requested speed 2000 kHz, using 1800 kHz shutdown command invoked But nothing happens on the LCD nor on the serial console. I use screen /dev/ttyACM0 115200 under Linux to connect. Is ttyACM0 the wrong device to get u-boots serial output? I have only one USB cable connected between USB ST-Link and my laptop. What I am doing wrong? best regards Waldemar
Re: U-Boot support for IMX8MP dual-role
Hello Tim, Am Freitag, 16. September 2022, 20:43:54 CEST schrieb Tim Harvey: > Greetings, > > I'm wondering if anyone has done any work to get dual-role USB working > for the IMX8MP (or any other dwc3 host based board) and how they went > about it if so. > > The imx8mp-venice-gw74xx has dual-role support through a USB Type-C > connector with a TPS25821 (driverless) that monitors the CC signals > and manages VBUS, as well as asserts gpio's: > FAULT# - pinmuxed to OC pin > SINK# - used as GPIO for role > POL# - used for SS mux to connector > > For linux this is managed with a usb-role-switch dt prop and a > connector node with compatible of gpio-usb-b-connector and id-gpios > [1]. I did not see anything like that in use in U-Boot for dwc3 hosts > but perhaps I was looking in the wrong place. > > For U-Boot I can get this type-C connector to work in host mode only > by changing dr_mode="otg" to dr_mode="host". With the default dt prop > dr_mode=otg dwc3-generic-peripheral is bound instead of > dwc3-generic-host thus no host controller is found. > > It seems to me that dwc3_glue_bind needs support added to be able to > check id-gpios or vbus-gpios if usb-role-switch and something like > gpio-usb-b-connector or linux,extcon-usb-gpio are used. Does this > sound like the correct implementation? > > I notice that drivers/usb/host/xhci-dwc3.c which is a driver for the > dwc3 core (compatible snps,dwc3) and this does look at usb-role-swich > however this driver as a subnode of fsl,imx8mp-dwc3 (glue) does not > bind and perhaps that is an issue. In that driver usb-role-switch > causes the driver to use role-switch-default-mode for the default mode > which still does not look at an id/vbus pin so that would not be > feature complete either. For imx8mp you probably need something like [1] to support usb-role-switch. But I am not aware how things are done in u-boot. Best regards, Alexander [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/ commit/?id=a102f07e4edf0f1cf06bf9825ab10e26a29dd945 > Best Regards, > > TIm > 1 > https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git/commit/? > h=for-next&id=c8a4192d238e9258ab0bc916b3c138a4722af215
[PATCH] tools: env: Fix missing closedir in ubi_get_volnum_by_name
The function calls opendir() but missing the corresponding closedir() before exit the function. Add missing closedir() to fix it. Signed-off-by: Miaoqian Lin --- tools/env/fw_env.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 2a61a5d6f049..eb138accdcbe 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -192,10 +192,13 @@ static int ubi_get_volnum_by_name(int devnum, const char *volname) &tmp_devnum, &volnum); if (ret == 2 && devnum == tmp_devnum) { if (ubi_check_volume_sysfs_name(dirent->d_name, - volname) == 0) + volname) == 0) { + closedir(sysfs_ubi); return volnum; + } } } + closedir(sysfs_ubi); return -1; } -- 2.25.1
Re: [PATCH v2 1/3] lib: Add common semihosting library
Thanks for spotting that. There was a config option selection that I was trying to avoid. Will send out a v3 patch with your suggestions. On Sat, Sep 17, 2022 at 11:10 PM Sean Anderson wrote: > > On 9/16/22 04:12, Kautuk Consul wrote: > > We factor out the arch-independent parts of the ARM semihosting > > implementation as a common library so that it can be shared > > with RISC-V. > > > > Signed-off-by: Kautuk Consul > > --- > > arch/arm/Kconfig | 2 + > > arch/arm/lib/semihosting.c | 179 +-- > > include/semihosting.h | 11 +++ > > lib/Kconfig| 3 + > > lib/Makefile | 2 + > > lib/semihosting.c | 186 + > > 6 files changed, 205 insertions(+), 178 deletions(-) > > create mode 100644 lib/semihosting.c > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > index 82cd456f51..81440ff7ea 100644 > > --- a/arch/arm/Kconfig > > +++ b/arch/arm/Kconfig > > @@ -415,6 +415,7 @@ config ARM_SMCCC > > > > config SEMIHOSTING > > bool "Support ARM semihosting" > > + select LIB_SEMIHOSTING > > help > > Semihosting is a method for a target to communicate with a host > > debugger. It uses special instructions which the debugger will trap > > @@ -437,6 +438,7 @@ config SEMIHOSTING_FALLBACK > > > > config SPL_SEMIHOSTING > > bool "Support ARM semihosting in SPL" > > + select LIB_SEMIHOSTING > > depends on SPL > > help > > Semihosting is a method for a target to communicate with a host > > Sorry if I wasn't clear enough last time. Both the code and these Kconfigs > should be moved to a common location. > > > diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c > > index 01d652a6b8..41bc5cd62b 100644 > > --- a/arch/arm/lib/semihosting.c > > +++ b/arch/arm/lib/semihosting.c > > @@ -13,22 +13,10 @@ > > #include > > #include > > > > -#define SYSOPEN 0x01 > > -#define SYSCLOSE 0x02 > > -#define SYSWRITEC0x03 > > -#define SYSWRITE00x04 > > -#define SYSWRITE 0x05 > > -#define SYSREAD 0x06 > > -#define SYSREADC 0x07 > > -#define SYSISERROR 0x08 > > -#define SYSSEEK 0x0A > > -#define SYSFLEN 0x0C > > -#define SYSERRNO 0x13 > > - > > /* > >* Call the handler > >*/ > > -static noinline long smh_trap(unsigned int sysnum, void *addr) > > +long smh_trap(unsigned int sysnum, void *addr) > > { > > register long result asm("r0"); > > #if defined(CONFIG_ARM64) > > @@ -41,168 +29,3 @@ static noinline long smh_trap(unsigned int sysnum, void > > *addr) > > #endif > > return result; > > } > > - > > -#if CONFIG_IS_ENABLED(SEMIHOSTING_FALLBACK) > > -static bool _semihosting_enabled = true; > > -static bool try_semihosting = true; > > - > > -bool semihosting_enabled(void) > > -{ > > - if (try_semihosting) { > > - smh_trap(SYSERRNO, NULL); > > - try_semihosting = false; > > - } > > - > > - return _semihosting_enabled; > > -} > > - > > -void disable_semihosting(void) > > -{ > > - _semihosting_enabled = false; > > -} > > -#endif > > - > > -/** > > - * smh_errno() - Read the host's errno > > - * > > - * This gets the value of the host's errno and negates it. The host's > > errno may > > - * or may not be set, so only call this function if a previous semihosting > > call > > - * has failed. > > - * > > - * Return: a negative error value > > - */ > > -static int smh_errno(void) > > -{ > > - long ret = smh_trap(SYSERRNO, NULL); > > - > > - if (ret > 0 && ret < INT_MAX) > > - return -ret; > > - return -EIO; > > -} > > - > > -long smh_open(const char *fname, enum smh_open_mode mode) > > -{ > > - long fd; > > - struct smh_open_s { > > - const char *fname; > > - unsigned long mode; > > - size_t len; > > - } open; > > - > > - debug("%s: file \'%s\', mode \'%u\'\n", __func__, fname, mode); > > - > > - open.fname = fname; > > - open.len = strlen(fname); > > - open.mode = mode; > > - > > - /* Open the file on the host */ > > - fd = smh_trap(SYSOPEN, &open); > > - if (fd == -1) > > - return smh_errno(); > > - return fd; > > -} > > - > > -/** > > - * struct smg_rdwr_s - Arguments for read and write > > - * @fd: A file descriptor returned from smh_open() > > - * @memp: Pointer to a buffer of memory of at least @len bytes > > - * @len: The number of bytes to read or write > > - */ > > -struct smh_rdwr_s { > > - long fd; > > - void *memp; > > - size_t len; > > -}; > > - > > -long smh_read(long fd, void *memp, size_t len) > > -{ > > - long ret; > > - struct smh_rdwr_s read; > > - > > - debug("%s: fd %ld, memp %p, len %zu\n", __func__, fd, memp, len); > > - > > - read.fd = fd; > > - read.memp = memp; > > - read.len = len; > > - > > - ret =
Re: [PATCH 0/9] Nokia RX-51: Small cleanups and UBI boot test case
Hello Pali, Am Sun, Sep 04, 2022 at 03:28:57AM +0200 schrieb Pali Rohár: > Do various small fixup/cleanups and extend test script to boot kernel > image from UBI volume. This test verifies that U-Boot UBI implementation > is working and U-Boot can read volume with bootable kernel code > correctly. And therefore CI prevents UBI breakage. > > Note that U-Boot UBIFS code on ARM is currently somehow broken and > trying to mount UBIFS from UBI volume fails :-( I have already tried to > debug this issue but I have no idea why it is failing. Function > check_lpt_crc in unpack_ltab is failing. Volume is for sure correct and > valid because Linux kernel can successfully mount it. And to make it > more suspicious, U-Boot UBIFS is working fine on big endian powerpc > platform. So UBIFS issue is probably endian or arch specific. > (This is UBIFS related, not UBI related.) I had some trouble with UBIFS volumes created by Linux not mountable by U-Boot myself recently. Problem was Linux gained zstd compression support for UBIFS with version 5.3 and that was made default with kernel 5.13. U-Boot does not support zstd compression at least up to version 2022.04 (did not try later ones), and simply refuses to mount those volumes. The error message however was different than yours, but maybe you get an idea what might be wrong. I would certainly check with what features the UBIFS is created and if U-Boot supports that. HTH & Greets Alex > > Pali Rohár (9): > Nokia RX-51: Remove label copy_kernel_start from lowlevel_init.S > Nokia RX-51: Do not clear unknown memory in lowlevel_init.S > Nokia RX-51: Set default SYS_LOAD_ADDR to 0x80008000 > Nokia RX-51: Change UBIFS volume size to 1870 LEBs in test script > Nokia RX-51: Call bootm in test script only when image is valid > Nokia RX-51: Fix documentation how to enable UBI support > Nokia RX-51: Do not set useless ARCH= in test script > Nokia RX-51: Add comment describing kernel image type into test script > Nokia RX-51: Add booting from UBI into test script > > board/nokia/rx51/lowlevel_init.S | 7 +-- > configs/nokia_rx51_defconfig | 2 +- > doc/board/nokia/rx51.rst | 3 +- > test/nokia_rx51_test.sh | 97 +--- > 4 files changed, 82 insertions(+), 27 deletions(-) > > -- > 2.20.1 >
[PATCH 2/7] fpga: cyclon2: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own definition for debug output. Signed-off-by: Alexander Dahl --- drivers/fpga/cyclon2.c | 24 ++-- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/drivers/fpga/cyclon2.c b/drivers/fpga/cyclon2.c index 3b008facb8..002fa2ca5d 100644 --- a/drivers/fpga/cyclon2.c +++ b/drivers/fpga/cyclon2.c @@ -5,18 +5,14 @@ * Based on ACE1XK.c */ +#define LOG_CATEGORY UCLASS_FS_FIRMWARE_LOADER + #include /* core U-Boot definitions */ +#include #include #include /* ACEX device family */ #include -/* Define FPGA_DEBUG to get debug printf's */ -#ifdef FPGA_DEBUG -#define PRINTF(fmt, args...) printf(fmt, ##args) -#else -#define PRINTF(fmt, args...) -#endif - /* Note: The assumption is that we cannot possibly run fast enough to * overrun the device (the Slave Parallel mode can free run at 50MHz). * If there is a need to operate slower, define CONFIG_FPGA_DELAY in @@ -42,7 +38,7 @@ int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize) switch (desc->iface) { case passive_serial: - PRINTF("%s: Launching Passive Serial Loader\n", __func__); + log_debug("%s: Launching Passive Serial Loader\n", __func__); ret_val = CYC2_ps_load(desc, buf, bsize); break; @@ -51,8 +47,8 @@ int CYC2_load(Altera_desc *desc, const void *buf, size_t bsize) * done in the write() callback. Use the existing PS load * function for FPP, too. */ - PRINTF("%s: Launching Fast Passive Parallel Loader\n", - __func__); + log_debug("%s: Launching Fast Passive Parallel Loader\n", + __func__); ret_val = CYC2_ps_load(desc, buf, bsize); break; @@ -72,7 +68,7 @@ int CYC2_dump(Altera_desc *desc, const void *buf, size_t bsize) switch (desc->iface) { case passive_serial: - PRINTF("%s: Launching Passive Serial Dump\n", __func__); + log_debug("%s: Launching Passive Serial Dump\n", __func__); ret_val = CYC2_ps_dump(desc, buf, bsize); break; @@ -99,14 +95,14 @@ static int CYC2_ps_load(Altera_desc *desc, const void *buf, size_t bsize) Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns; int ret = 0; - PRINTF("%s: start with interface functions @ 0x%p\n", - __func__, fn); + log_debug("%s: start with interface functions @ 0x%p\n", + __func__, fn); if (fn) { int cookie = desc->cookie; /* make a local copy */ unsigned long ts; /* timestamp */ - PRINTF("%s: Function Table:\n" + log_debug("%s: Function Table:\n" "ptr:\t0x%p\n" "struct: 0x%p\n" "config:\t0x%p\n" -- 2.30.2
[PATCH 6/7] fpga: spartan3: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own definition for debug output. Signed-off-by: Alexander Dahl --- drivers/fpga/spartan3.c | 34 +++--- 1 file changed, 15 insertions(+), 19 deletions(-) diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c index 918f6db506..7dd97db6ee 100644 --- a/drivers/fpga/spartan3.c +++ b/drivers/fpga/spartan3.c @@ -9,16 +9,12 @@ * on spartan2.c (Rich Ireland, rirel...@enterasys.com). */ +#define LOG_CATEGORY UCLASS_FS_FIRMWARE_LOADER + #include /* core U-Boot definitions */ +#include #include /* Spartan-II device family */ -/* Define FPGA_DEBUG to get debug printf's */ -#ifdef FPGA_DEBUG -#define PRINTF(fmt,args...)printf (fmt ,##args) -#else -#define PRINTF(fmt,args...) -#endif - #undef CONFIG_SYS_FPGA_CHECK_BUSY /* Note: The assumption is that we cannot possibly run fast enough to @@ -51,12 +47,12 @@ static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize, switch (desc->iface) { case slave_serial: - PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__); + log_debug("%s: Launching Slave Serial Load\n", __func__); ret_val = spartan3_ss_load(desc, buf, bsize); break; case slave_parallel: - PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__); + log_debug("%s: Launching Slave Parallel Load\n", __func__); ret_val = spartan3_sp_load(desc, buf, bsize); break; @@ -74,12 +70,12 @@ static int spartan3_dump(xilinx_desc *desc, const void *buf, size_t bsize) switch (desc->iface) { case slave_serial: - PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__); + log_debug("%s: Launching Slave Serial Dump\n", __func__); ret_val = spartan3_ss_dump(desc, buf, bsize); break; case slave_parallel: - PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__); + log_debug("%s: Launching Slave Parallel Dump\n", __func__); ret_val = spartan3_sp_dump(desc, buf, bsize); break; @@ -105,8 +101,8 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) int ret_val = FPGA_FAIL;/* assume the worst */ xilinx_spartan3_slave_parallel_fns *fn = desc->iface_fns; - PRINTF ("%s: start with interface functions @ 0x%p\n", - __FUNCTION__, fn); + log_debug("%s: start with interface functions @ 0x%p\n", + __func__, fn); if (fn) { size_t bytecount = 0; @@ -114,7 +110,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) int cookie = desc->cookie; /* make a local copy */ unsigned long ts; /* timestamp */ - PRINTF ("%s: Function Table:\n" + log_debug("%s: Function Table:\n" "ptr:\t0x%p\n" "struct: 0x%p\n" "pre: 0x%p\n" @@ -129,7 +125,7 @@ static int spartan3_sp_load(xilinx_desc *desc, const void *buf, size_t bsize) "busy:\t0x%p\n" "abort:\t0x%p\n", "post:\t0x%p\n\n", - __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err, + __func__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err, fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy, fn->abort, fn->post); @@ -309,8 +305,8 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) int i; unsigned char val; - PRINTF ("%s: start with interface functions @ 0x%p\n", - __FUNCTION__, fn); + log_debug("%s: start with interface functions @ 0x%p\n", + __func__, fn); if (fn) { size_t bytecount = 0; @@ -318,7 +314,7 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) int cookie = desc->cookie; /* make a local copy */ unsigned long ts; /* timestamp */ - PRINTF ("%s: Function Table:\n" + log_debug("%s: Function Table:\n" "ptr:\t0x%p\n" "struct: 0x%p\n" "pgm:\t0x%p\n" @@ -326,7 +322,7 @@ static int spartan3_ss_load(xilinx_desc *desc, const void *buf, size_t bsize) "clk:\t0x%p\n" "wr:\t0x%p\n" "done:\t0x%p\n\n", - __FUNCTION__, &fn, fn, fn->pgm, fn->init,
[PATCH 4/7] fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own definition for debug output. Signed-off-by: Alexander Dahl --- drivers/fpga/ACEX1K.c | 22 +- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/drivers/fpga/ACEX1K.c b/drivers/fpga/ACEX1K.c index aca8049c56..d6bfc26229 100644 --- a/drivers/fpga/ACEX1K.c +++ b/drivers/fpga/ACEX1K.c @@ -7,18 +7,14 @@ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com. */ +#define LOG_CATEGORY UCLASS_FS_FIRMWARE_LOADER + #include /* core U-Boot definitions */ #include +#include #include /* ACEX device family */ #include -/* Define FPGA_DEBUG to get debug printf's */ -#ifdef FPGA_DEBUG -#define PRINTF(fmt,args...)printf (fmt ,##args) -#else -#define PRINTF(fmt,args...) -#endif - /* Note: The assumption is that we cannot possibly run fast enough to * overrun the device (the Slave Parallel mode can free run at 50MHz). * If there is a need to operate slower, define CONFIG_FPGA_DELAY in @@ -44,7 +40,7 @@ int ACEX1K_load(Altera_desc *desc, const void *buf, size_t bsize) switch (desc->iface) { case passive_serial: - PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__); + log_debug("%s: Launching Passive Serial Loader\n", __func__); ret_val = ACEX1K_ps_load (desc, buf, bsize); break; @@ -64,7 +60,7 @@ int ACEX1K_dump(Altera_desc *desc, const void *buf, size_t bsize) switch (desc->iface) { case passive_serial: - PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__); + log_debug("%s: Launching Passive Serial Dump\n", __func__); ret_val = ACEX1K_ps_dump (desc, buf, bsize); break; @@ -93,8 +89,8 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize) Altera_ACEX1K_Passive_Serial_fns *fn = desc->iface_fns; int i; - PRINTF ("%s: start with interface functions @ 0x%p\n", - __FUNCTION__, fn); + log_debug("%s: start with interface functions @ 0x%p\n", + __func__, fn); if (fn) { size_t bytecount = 0; @@ -102,7 +98,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize) int cookie = desc->cookie; /* make a local copy */ unsigned long ts; /* timestamp */ - PRINTF ("%s: Function Table:\n" + log_debug("%s: Function Table:\n" "ptr:\t0x%p\n" "struct: 0x%p\n" "config:\t0x%p\n" @@ -110,7 +106,7 @@ static int ACEX1K_ps_load(Altera_desc *desc, const void *buf, size_t bsize) "clk:\t0x%p\n" "data:\t0x%p\n" "done:\t0x%p\n\n", - __FUNCTION__, &fn, fn, fn->config, fn->status, + __func__, &fn, fn, fn->config, fn->status, fn->clk, fn->data, fn->done); #ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...", cookie); -- 2.30.2
[PATCH 3/7] fpga: Add missing Kconfig symbols for old FPGA drivers
Those drivers could not be built anymore without those options present. Signed-off-by: Alexander Dahl --- drivers/fpga/Kconfig | 12 1 file changed, 12 insertions(+) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index e07a9cf80e..4d55f60ba9 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -27,6 +27,12 @@ config FPGA_STRATIX_V help Say Y here to enable the Altera Stratix V FPGA specific driver. +config FPGA_ACEX1K + bool "Enable Altera ACEX 1K driver" + depends on FPGA_ALTERA + help + Say Y here to enable the Altera ACEX 1K FPGA specific driver. + config FPGA_CYCLON2 bool "Enable Altera FPGA driver for Cyclone II" depends on FPGA_ALTERA @@ -71,6 +77,12 @@ config FPGA_VERSALPL Versal. The bitstream will only be generated as PDI for Versal platform. +config FPGA_SPARTAN2 + bool "Enable Spartan2 FPGA driver" + depends on FPGA_XILINX + help + Enable Spartan2 FPGA driver. + config FPGA_SPARTAN3 bool "Enable Spartan3 FPGA driver" depends on FPGA_XILINX -- 2.30.2
[PATCH 1/7] fpga: altera: Use logging feature instead of FPGA_DEBUG
Instead of using DEBUG or LOG_DEBUG the driver still had its own definition for debug output. Signed-off-by: Alexander Dahl --- drivers/fpga/altera.c | 13 ++--- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c index 10c0475d25..5a8fee10a5 100644 --- a/drivers/fpga/altera.c +++ b/drivers/fpga/altera.c @@ -7,6 +7,8 @@ * Rich Ireland, Enterasys Networks, rirel...@enterasys.com. */ +#define LOG_CATEGORY UCLASS_FS_FIRMWARE_LOADER + /* * Altera FPGA support */ @@ -16,9 +18,6 @@ #include #include -/* Define FPGA_DEBUG to 1 to get debug printf's */ -#define FPGA_DEBUG 0 - static const struct altera_fpga { enum altera_family family; const char *name; @@ -106,8 +105,8 @@ int altera_load(Altera_desc *desc, const void *buf, size_t bsize) if (!fpga) return FPGA_FAIL; - debug_cond(FPGA_DEBUG, "%s: Launching the %s Loader...\n", - __func__, fpga->name); + log_debug("%s: Launching the %s Loader...\n", + __func__, fpga->name); if (fpga->load) return fpga->load(desc, buf, bsize); return 0; @@ -120,8 +119,8 @@ int altera_dump(Altera_desc *desc, const void *buf, size_t bsize) if (!fpga) return FPGA_FAIL; - debug_cond(FPGA_DEBUG, "%s: Launching the %s Reader...\n", - __func__, fpga->name); + log_debug("%s: Launching the %s Reader...\n", + __func__, fpga->name); if (fpga->dump) return fpga->dump(desc, buf, bsize); return 0; -- 2.30.2