Re: [PATCH 1/1] efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE
Hi Heinrich, On Fri, 23 Dec 2022 at 03:20, Heinrich Schuchardt wrote: > > For the 64bit EFI binaries that we create set the > IMAGE_FILE_LARGE_ADDRESS_AWARE characteristic in the PE-COFF header > to indicate that they can handle addresses above 2 GiB. > Does that flag affect 64bit as well? I was under the impression it's only needed for 32bit? Thanks /Ilias > Signed-off-by: Heinrich Schuchardt > --- > arch/arm/lib/crt0_aarch64_efi.S | 1 + > arch/riscv/lib/crt0_riscv_efi.S | 17 - > 2 files changed, 13 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/lib/crt0_aarch64_efi.S b/arch/arm/lib/crt0_aarch64_efi.S > index 59fc3ed02d..d31b2b5fe9 100644 > --- a/arch/arm/lib/crt0_aarch64_efi.S > +++ b/arch/arm/lib/crt0_aarch64_efi.S > @@ -34,6 +34,7 @@ coff_header: > .short (IMAGE_FILE_EXECUTABLE_IMAGE | \ > IMAGE_FILE_LINE_NUMS_STRIPPED | \ > IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ > +IMAGE_FILE_LARGE_ADDRESS_AWARE | \ > IMAGE_FILE_DEBUG_STRIPPED) > optional_header: > .short IMAGE_NT_OPTIONAL_HDR64_MAGIC /* PE32+ format */ > diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S > index a01e08a3c6..793eefdd88 100644 > --- a/arch/riscv/lib/crt0_riscv_efi.S > +++ b/arch/riscv/lib/crt0_riscv_efi.S > @@ -16,12 +16,23 @@ > #define LOAD_LONG(reg, idx)ld reg, (idx*SIZE_LONG)(sp) > #define PE_MACHINE IMAGE_FILE_MACHINE_RISCV64 > #define PE_MAGICIMAGE_NT_OPTIONAL_HDR64_MAGIC > +#define IMG_CHARACTERISTICS \ > + (IMAGE_FILE_EXECUTABLE_IMAGE | \ > +IMAGE_FILE_LINE_NUMS_STRIPPED | \ > +IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ > +IMAGE_FILE_LARGE_ADDRESS_AWARE | \ > +IMAGE_FILE_DEBUG_STRIPPED) > #else > #define SIZE_LONG 4 > #define SAVE_LONG(reg, idx)sw reg, (idx*SIZE_LONG)(sp) > #define LOAD_LONG(reg, idx)lw reg, (idx*SIZE_LONG)(sp) > #define PE_MACHINE IMAGE_FILE_MACHINE_RISCV32 > #define PE_MAGICIMAGE_NT_OPTIONAL_HDR32_MAGIC > +#define IMG_CHARACTERISTICS \ > + (IMAGE_FILE_EXECUTABLE_IMAGE | \ > +IMAGE_FILE_LINE_NUMS_STRIPPED | \ > +IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ > +IMAGE_FILE_DEBUG_STRIPPED) > #endif > > > @@ -47,11 +58,7 @@ coff_header: > .long 0 /* PointerToSymbolTable */ > .long 0 /* NumberOfSymbols */ > .short section_table - optional_header /* SizeOfOptionalHeader */ > - /* Characteristics */ > - .short (IMAGE_FILE_EXECUTABLE_IMAGE | \ > -IMAGE_FILE_LINE_NUMS_STRIPPED | \ > -IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ > -IMAGE_FILE_DEBUG_STRIPPED) > + .short IMG_CHARACTERISTICS /* Characteristics */ > optional_header: > .short PE_MAGIC/* PE32(+) format */ > .byte 0x02/* MajorLinkerVersion */ > -- > 2.37.2 >
Re: [PATCH] Makefile: add -W for BINMAN_ALLOW_MISSING
Hello Tom! On Thu, 22 Dec 2022 09:14:59 -0500 Tom Rini wrote: > Yes, that's what BINMAN_ALLOW_MISSING=1 does. If top of tree master > doesn't work for you, can you please post a patch so that the rest of > us can replicate the failure and see what to do next? Thanks. > You are right - i accidentally got stuck right between "global: Do not default to faking missing binaries for buildman" (which broke build) and "Makefile: With BINMAN_ALLOW_MISSING=1 don't error on missing" (which i didn't have on my branch). Everything is just perfect on the top of latest master! Thank you for your patience and sorry for the noise. Yours, Nikita Shubin
Re: [PATCH 1/1] efi_loader: set UEFI specification version to 2.10
On Fri, 23 Dec 2022 at 03:33, Heinrich Schuchardt
wrote:
>
> Claim to implement UEFI 2.10 setting EFI_SPECIFICATION_VERSION accordingly.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> include/efi_api.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/efi_api.h b/include/efi_api.h
> index 00c98e0984..9bd70b0f18 100644
> --- a/include/efi_api.h
> +++ b/include/efi_api.h
> @@ -21,7 +21,7 @@
> #include
>
> /* UEFI spec version 2.9 */
> -#define EFI_SPECIFICATION_VERSION (2 << 16 | 90)
> +#define EFI_SPECIFICATION_VERSION (2 << 16 | 100)
>
> /* Types and defines for EFI CreateEvent */
> enum efi_timer_delay {
> --
> 2.37.2
>
Reviewed-by: Ilias Apalodimas
Re: Converting to DM SERIAL for Kirkwood boards
Hi Stefan,
On Thu, Dec 15, 2022 at 10:29 PM Stefan Roese wrote:
>
> Hi Tony,
>
> On 12/16/22 03:42, Tony Dinh wrote:
> > Hi all,
> >
> > On Mon, Dec 12, 2022 at 5:18 PM Tony Dinh wrote:
> >>
> >> Hi Michael,
> >>
> >> On Mon, Dec 12, 2022 at 1:03 AM Michael Walle wrote:
> >>>
> > On 12/9/22 04:55, Tony Dinh wrote:
> >> Hi Simon et al,
> >>
> >> (Resend to include u-boot mailing list)
> >>
> >> I'm in the process of converting Kirkwood boards to use DM SERIAL. I
> >> could not seem to get it to work, having tried adding
> >> CONFIG_DM_SERIAL, and also playing with various related CONFIG
> >> options (CONFIG_SPECIFY_CONSOLE_INDEX and CONFIG_CONS_INDEX ). From
> >> my reading various board configurations that were already converted to
> >> DM_SERIAL, I'm under the impression that just turning on
> >> CONFIG_DM_SERIAL would work without any other addition.
> >>
> >> The board I'm testing is Zyxel NSA310S Kirkwood 6702 (6192) SoC.
> >>
> >> diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
> >> index afa0cad041..e81d1495bd 100644
> >> --- a/configs/nsa310s_defconfig
> >> +++ b/configs/nsa310s_defconfig
> >> @@ -41,7 +41,6 @@ CONFIG_ENV_OVERWRITE=y
> >>CONFIG_ENV_IS_IN_NAND=y
> >>CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> >>CONFIG_NET_RANDOM_ETHADDR=y
> >> -CONFIG_NETCONSOLE=y
> >>CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
> >>CONFIG_SATA_MV=y
> >>CONFIG_SYS_SATA_MAX_DEVICE=1
> >> @@ -53,6 +52,7 @@ CONFIG_MTD_RAW_NAND=y
> >>CONFIG_PHY_MARVELL=y
> >>CONFIG_MVGBE=y
> >>CONFIG_MII=y
> >> +CONFIG_DM_SERIAL=y
> >>CONFIG_SYS_NS16550=y
> >>CONFIG_USB=y
> >>CONFIG_USB_EHCI_HCD=y
> >>
> >> I also added kirkwood-nsa310s-u-boot.dtsi to help in running kwboot.
> >>
> >> &uart0 {
> >> u-boot,dm-pre-reloc;
> >> };
> >>
> >> I've tried kwboot the new u-boot image, and also flashed this image to
> >> NAND, and in both cases, I got a silent serial console. It seems to
> >> hang up right off the bat. Hope you can help by giving me some
> >> pointers on how to debug this.
> >
> > Might be that the alias is missing and / or that the uart DT node is
> > not enabled. Please give this test-only patch a try:
> >
> > diff --git a/arch/arm/dts/kirkwood-nsa310s.dts
> > b/arch/arm/dts/kirkwood-nsa310s.dts
> > index 09ee76c2a2e0..ca7a49af9ba4 100644
> > --- a/arch/arm/dts/kirkwood-nsa310s.dts
> > +++ b/arch/arm/dts/kirkwood-nsa310s.dts
> > @@ -17,6 +17,10 @@
> > model = "Zyxel NSA310S";
> > compatible = "zyxel,nsa320s", "marvell,kirkwood-88f6702",
> > "marvell,kirkwood";
> >
> > + aliases {
> > + serial0 = &uart0;
> > + };
> > +
> > memory {
> > device_type = "memory";
> > reg = <0x 0x1000>;
> > @@ -317,3 +321,8 @@
> >&pcie0 {
> > status = "okay";
> >};
> > +
> > +&uart0 {
> > + status = "okay";
> > + u-boot,dm-pre-reloc;
> > +};
>
> Thanks for the patch! but the behavior is still the same (silent
> serial console and hung the board).
>
> Thanks,
> Tony
> >>>
> >>> Maybe this will help:
> >>> https://lore.kernel.org/u-boot/20220817193809.1059688-20-mich...@walle.cc/
> >>>
> >>> The lsxl is also a kirkwood based board.
> >>>
> >>
> >> Thanks! indeed that was the malloc problem. This NSA310S board is now
> >> working with DM_SERIAL.
> >>
> >> I will test a few more Kirkwood boards and keep everybody posted.
> >
> > Closing the loop on this DM_SERIAL conversion for Kirkwood.
> >
> > I've tested DM_SERIAL with Michael's malloc patches on a few other
> > Kirkwood boards. They're all working fine with u-boot-2023.01-rc3.
>
> Good to know. I assume that you will post some patches for these
> Kirkwood board soon? Or even better, making the necessary changes
> for Kirkwood in general in Kconfig (if possible).
Here is a RFC patch to convert Kirkwood boards to DM_SERIAL and also
set up the boards using Michael's approach for the
CUSTOM_SYS_INIT_SP_ADDR. I'm not sure this is the best way to do it,
so I thought I should run it by this list first to see if I'm on the
right track.
My rationale is that even though HAS_CUSTOM_SYS_INIT_SP_ADDR and
CUSTOM_SYS_INIT_SP_ADDR are already defined in top level ./Kconfig,
the value CUSTOM_SYS_INIT_SP_ADDR=0x5ff000 belongs in the
./arch/arm/mach-kirkwood/Kconfig. And note that it will work
regardless whether DM_SERIAL is enabled or not.
And since we are still converting the boards to DM_SERIAL, during the
transition it should be up to the individual maintainer to do it. Once
the mandatory deadline is over, we can turn it on wholesale in
arch/arm/mach-kirkwood/Kconfig (by enabling CONFIG_KIRKWOOD_COMMON
Re: [RFC PATCH v5 24/24] DO NOT MERGE: only to make CI happy
On 11/1/22 20:20, Francis Laniel wrote: This commit set CONFIG_HUSH_PARSER_2021 as the default to trigger the CI with this parser. Nonetheless, Some boards are not compatible with new 2021 hush parser: 1. rcar3_ulcb: When built with CONFIG_HUSH_PARSER_2021, the u-boot.img file size exceeds the 1MB file limit of 890 bytes: aarch64: + rcar3_ulcb +u-boot.img exceeds file size limit: + limit: 0x10 bytes + actual: 0x10037a bytes + excess: 0x37a bytes Some complementary work is then needed to use CONFIG_HUSH_PARSER_2021 for this board. Maybe this patch helps with ULCB ? https://patchwork.ozlabs.org/project/uboot/patch/2022111315.142860-1-marek.va...@gmail.com/
Re: [PATCH v2 0/3] Data Co-processor RNG Driver
Hi Heinrich, On Thu, Dec 22, 2022 at 9:52 PM Heinrich Schuchardt wrote: > > configs/mx6ull_14x14_evk_defconfig| 4 + > > configs/mx6ull_14x14_evk_plugin_defconfig | 4 + > > Do these boards lack the CAAM RNG supported by drivers/crypto/fsl/rng.c? imx6ull does not have CAAM.
[PATCH 1/1] efi_loader: set UEFI specification version to 2.10
Claim to implement UEFI 2.10 setting EFI_SPECIFICATION_VERSION accordingly.
Signed-off-by: Heinrich Schuchardt
---
include/efi_api.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/efi_api.h b/include/efi_api.h
index 00c98e0984..9bd70b0f18 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -21,7 +21,7 @@
#include
/* UEFI spec version 2.9 */
-#define EFI_SPECIFICATION_VERSION (2 << 16 | 90)
+#define EFI_SPECIFICATION_VERSION (2 << 16 | 100)
/* Types and defines for EFI CreateEvent */
enum efi_timer_delay {
--
2.37.2
[PATCH 1/1] efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE
For the 64bit EFI binaries that we create set the IMAGE_FILE_LARGE_ADDRESS_AWARE characteristic in the PE-COFF header to indicate that they can handle addresses above 2 GiB. Signed-off-by: Heinrich Schuchardt --- arch/arm/lib/crt0_aarch64_efi.S | 1 + arch/riscv/lib/crt0_riscv_efi.S | 17 - 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/arch/arm/lib/crt0_aarch64_efi.S b/arch/arm/lib/crt0_aarch64_efi.S index 59fc3ed02d..d31b2b5fe9 100644 --- a/arch/arm/lib/crt0_aarch64_efi.S +++ b/arch/arm/lib/crt0_aarch64_efi.S @@ -34,6 +34,7 @@ coff_header: .short (IMAGE_FILE_EXECUTABLE_IMAGE | \ IMAGE_FILE_LINE_NUMS_STRIPPED | \ IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ +IMAGE_FILE_LARGE_ADDRESS_AWARE | \ IMAGE_FILE_DEBUG_STRIPPED) optional_header: .short IMAGE_NT_OPTIONAL_HDR64_MAGIC /* PE32+ format */ diff --git a/arch/riscv/lib/crt0_riscv_efi.S b/arch/riscv/lib/crt0_riscv_efi.S index a01e08a3c6..793eefdd88 100644 --- a/arch/riscv/lib/crt0_riscv_efi.S +++ b/arch/riscv/lib/crt0_riscv_efi.S @@ -16,12 +16,23 @@ #define LOAD_LONG(reg, idx)ld reg, (idx*SIZE_LONG)(sp) #define PE_MACHINE IMAGE_FILE_MACHINE_RISCV64 #define PE_MAGICIMAGE_NT_OPTIONAL_HDR64_MAGIC +#define IMG_CHARACTERISTICS \ + (IMAGE_FILE_EXECUTABLE_IMAGE | \ +IMAGE_FILE_LINE_NUMS_STRIPPED | \ +IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ +IMAGE_FILE_LARGE_ADDRESS_AWARE | \ +IMAGE_FILE_DEBUG_STRIPPED) #else #define SIZE_LONG 4 #define SAVE_LONG(reg, idx)sw reg, (idx*SIZE_LONG)(sp) #define LOAD_LONG(reg, idx)lw reg, (idx*SIZE_LONG)(sp) #define PE_MACHINE IMAGE_FILE_MACHINE_RISCV32 #define PE_MAGICIMAGE_NT_OPTIONAL_HDR32_MAGIC +#define IMG_CHARACTERISTICS \ + (IMAGE_FILE_EXECUTABLE_IMAGE | \ +IMAGE_FILE_LINE_NUMS_STRIPPED | \ +IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ +IMAGE_FILE_DEBUG_STRIPPED) #endif @@ -47,11 +58,7 @@ coff_header: .long 0 /* PointerToSymbolTable */ .long 0 /* NumberOfSymbols */ .short section_table - optional_header /* SizeOfOptionalHeader */ - /* Characteristics */ - .short (IMAGE_FILE_EXECUTABLE_IMAGE | \ -IMAGE_FILE_LINE_NUMS_STRIPPED | \ -IMAGE_FILE_LOCAL_SYMS_STRIPPED | \ -IMAGE_FILE_DEBUG_STRIPPED) + .short IMG_CHARACTERISTICS /* Characteristics */ optional_header: .short PE_MAGIC/* PE32(+) format */ .byte 0x02/* MajorLinkerVersion */ -- 2.37.2
Re: [PATCH v2 0/3] Data Co-processor RNG Driver
On 12/22/22 09:50, Kshitiz Varshney wrote: Implemented Data Co-Processor random number generation driver. usage command: rng Kshitiz Varshney (3): Uboot RNG Driver using Data Co-processor Added dcp_rng driver initialization code Added configs required for dcp_rng driver arch/arm/mach-imx/mx6/soc.c | 10 ++ configs/mx6ull_14x14_evk_defconfig| 4 + configs/mx6ull_14x14_evk_plugin_defconfig | 4 + Do these boards lack the CAAM RNG supported by drivers/crypto/fsl/rng.c? Best regards Heinrich drivers/crypto/fsl/Kconfig| 10 ++ drivers/crypto/fsl/Makefile | 1 + drivers/crypto/fsl/dcp_rng.c | 182 ++ 6 files changed, 211 insertions(+) create mode 100644 drivers/crypto/fsl/dcp_rng.c
Re: [PATCH 2/3] eficonfig: refactor change boot order implementation
On Thu, 22 Dec 2022 at 20:54, Ilias Apalodimas
wrote:
>
> On Wed, Dec 21, 2022 at 10:50:37PM +0900, Masahisa Kojima wrote:
> > This commit removes the change boot order specific
> > menu implementation. The change boot order implementation
> > calls eficonfig_process_common() same as other menus.
> >
> > The change boot order menu requires own item_data_print
> > and item_choice implementation, but display_statusline
> > function can be a same function as other menus.
> >
> > Signed-off-by: Masahisa Kojima
> > ---
> > cmd/eficonfig.c | 236 +---
> > 1 file changed, 143 insertions(+), 93 deletions(-)
> >
> > diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
> > index 39ee766a7b..c2c6c01c3b 100644
> > --- a/cmd/eficonfig.c
> > +++ b/cmd/eficonfig.c
> > @@ -24,6 +24,11 @@ static struct efi_simple_text_input_protocol *cin;
> > char eficonfig_menu_desc[] =
> > " Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit";
> >
> > +static char eficonfig_change_boot_order_desc[] =
> > + " Press UP/DOWN to move, +/- to change orde\n"
> > + " Press SPACE to activate or deactivate the entry\n"
> > + " Select [Save] to complete, ESC/CTRL+C to quit";
> > +
>
> static const
OK.
>
> > #define EFICONFIG_DESCRIPTION_MAX 32
> > #define EFICONFIG_OPTIONAL_DATA_MAX 64
> >
> > @@ -105,6 +110,17 @@ struct eficonfig_boot_order_data {
> > bool active;
> > };
> >
> > +/**
> > + * struct eficonfig_save_boot_order_data - structure to be used to change
> > boot order
> > + *
> > + * @efi_menu:pointer to efimenu structure
> > + * @selected:flag to indicate user selects "Save" entry
> > + */
> > +struct eficonfig_save_boot_order_data {
> > + struct efimenu *efi_menu;
> > + bool selected;
> > +};
> > +
> > /**
> > * eficonfig_print_msg() - print message
> > *
> > @@ -173,10 +189,9 @@ void eficonfig_display_statusline(struct menu *m)
> > "\n%s\n"
> > ANSI_CURSOR_POSITION ANSI_CLEAR_LINE ANSI_CURSOR_POSITION
> > "%s"
> > -ANSI_CLEAR_LINE_TO_END ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
> > +ANSI_CLEAR_LINE_TO_END,
> > 1, 1, entry->efi_menu->menu_header, entry->efi_menu->count +
> > 5, 1,
> > -entry->efi_menu->count + 6, 1, entry->efi_menu->menu_desc,
> > -entry->efi_menu->count + 7, 1);
> > +entry->efi_menu->count + 6, 1, entry->efi_menu->menu_desc);
> > }
> >
> > /**
> > @@ -1841,63 +1856,44 @@ out:
> > }
> >
> > /**
> > - * eficonfig_display_change_boot_order() - display the BootOrder list
> > + * eficonfig_print_change_boot_order_entry() - print the boot option entry
> > *
> > - * @efi_menu:pointer to the efimenu structure
> > - * Return: status code
> > + * @data:pointer to the data associated with each menu entry
> > */
> > -static void eficonfig_display_change_boot_order(struct efimenu *efi_menu)
> > +static void eficonfig_print_change_boot_order_entry(void *data)
> > {
> > - bool reverse;
> > - struct list_head *pos, *n;
> > - struct eficonfig_entry *entry;
> > -
> > - printf(ANSI_CLEAR_CONSOLE ANSI_CURSOR_POSITION
> > -"\n ** Change Boot Order **\n"
> > -ANSI_CURSOR_POSITION
> > -" Press UP/DOWN to move, +/- to change order"
> > -ANSI_CURSOR_POSITION
> > -" Press SPACE to activate or deactivate the entry"
> > -ANSI_CURSOR_POSITION
> > -" Select [Save] to complete, ESC/CTRL+C to quit"
> > -ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
> > -1, 1, efi_menu->count + 5, 1, efi_menu->count + 6, 1,
> > -efi_menu->count + 7, 1, efi_menu->count + 8, 1);
> > -
> > - /* draw boot option list */
> > - list_for_each_safe(pos, n, &efi_menu->list) {
>
> So this prints one option every time now instead of all the entries?
Yes, it is the same behavior as other menus and U-Boot menu framework expects.
>
> > - entry = list_entry(pos, struct eficonfig_entry, list);
> > - reverse = (entry->num == efi_menu->active);
> > + struct eficonfig_entry *entry = data;
> > + int reverse = (entry->efi_menu->active == entry->num);
> >
> > - printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
> > + printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
> >
> > - if (reverse)
> > - puts(ANSI_COLOR_REVERSE);
> > + if (reverse)
> > + puts(ANSI_COLOR_REVERSE);
> >
> > - if (entry->num < efi_menu->count - 2) {
> > - if (((struct eficonfig_boot_order_data
> > *)entry->data)->active)
> > - printf("[*] ");
> > - else
> > - printf("[ ] ");
> > - }
> > + if (entry->num < entry->efi_menu->count - 2) {
> > + if (((struct eficonfig_boot_order_data *)entry->data)->a
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
On Thu, Dec 22, 2022 at 10:02:42PM +0100, Pali Rohár wrote: > On Thursday 22 December 2022 13:22:50 Tom Rini wrote: > > I suspect that how we fire up QEMU means that the issue you're > > noting isn't triggered since we don't boot it from flash but instead > > pass the binary. > > Yes, this sounds like that problematic part is not tested. To spot this > issue some end-to-end test is needed... For flash setup - booting > directly from the qemu flash (execute in place) without initialized RAM > and letting u-boot to do it. For SD card setup - booting via BootROM > (like it is on the real HW). Seems that SD card BootROM is not available > on internet and no idea if it can be dumped from some Freescale CPU (it > is even legal to do it?). So some alternative bootrom implementation for > such testing is needed... which is lot of work. We do some things like this already, for other QEMU platforms (the flash_impl variable is set to the shell script to create a flash image) but, it's unlikely to be worth expending the effort here, the ROM QEMU uses here isn't the Freescale one, but from openhackware. -- Tom signature.asc Description: PGP signature
[PATCH] configs: r8a77980: Condor: Enable MMC support by default
From: Andrey Dolnikov This enables MMC support, which is available on Condor board, by default. Signed-off-by: Andrey Dolnikov Signed-off-by: Valentine Barshak Signed-off-by: Hai Pham --- configs/r8a77980_condor_defconfig | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 1983c8a2db..7110d6e2ba 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -36,6 +36,7 @@ CONFIG_CMD_BOOTZ=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y @@ -63,7 +64,11 @@ CONFIG_DFU_SF=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_RCAR_I2C=y -# CONFIG_MMC is not set +CONFIG_DM_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_HS200_SUPPORT=y +CONFIG_RENESAS_SDHI=y CONFIG_MTD=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y -- 2.35.1
[PATCH] ARM: renesas: condor: switch eMMC bus to 1V8
From: Hai Pham
The eMMC card has two supplies, VCC and VCCQ. The VCC supplies the NAND
array and the VCCQ supplies the bus. On Condor, the VCC is connected to
3.3V rail, while the VCCQ is connected to 1.8V rail. Adjust the pinmux
to match the bus, which is always operating in 1.8V mode.
Based on Linux commit 69efe4bbeda50745 ("arm64: dts: renesas: condor:
Switch eMMC bus to 1V8") from Wolfram Sang
Signed-off-by: Hai Pham
---
arch/arm/dts/r8a77980-condor.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm/dts/r8a77980-condor.dts b/arch/arm/dts/r8a77980-condor.dts
index 3dde028e22..f0a0a51d73 100644
--- a/arch/arm/dts/r8a77980-condor.dts
+++ b/arch/arm/dts/r8a77980-condor.dts
@@ -212,7 +212,7 @@
&mmc0 {
pinctrl-0 = <&mmc_pins>;
- pinctrl-1 = <&mmc_pins_uhs>;
+ pinctrl-1 = <&mmc_pins>;
pinctrl-names = "default", "state_uhs";
vmmc-supply = <&d3_3v>;
@@ -253,12 +253,6 @@
};
mmc_pins: mmc {
- groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
- function = "mmc";
- power-source = <3300>;
- };
-
- mmc_pins_uhs: mmc_uhs {
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
function = "mmc";
power-source = <1800>;
--
2.35.1
Rockchip RK3328 4-byte addressing problem in SPI
Hello, I would like to let you know how i've lost about 2 weeks because of lack of Rockchip BOOTROM documentation. I tried to use Mainline Uboot to Boot NanoPI R2S using soldered SPI Winbond 25Q256 chip. I had to make some patches in Uboot core files to make it work. First one adds SPI boot device. File |arch/arm/mach-rockchip/rk3328/rk3328.c with adding: | |[BROM_BOOTSOURCE_SPINOR] "/spi@ff19", |const char * const boot_devices || Second was |arch/arm/mach-rockchip/spl-boot-order.c and last if statement:| |if (!uclass_get_device_by_of_offset(UCLASS_SPI, node, &parent)) return BOOT_DEVICE_SPI;| || This patch is added because RockChip SPI driver is using UCLASS_SPI instead of SPI_FLASH so boot device wasn't connecting with right DM Driver rk_spi.c Third one fixed SPL and it was added at the end: |drivers/spi/rk_spi.c | |DM_DRIVER_ALIAS(rockchip_rk3288_spi, rockchip_rk3328_spi);| After that board booted successfully. Second bigger problem was a mistake and lack of RockChip Bootrom documentation. I've soldered 32Mbyte Flash and didn't know that U-Boot in SPL was switching it's 3-byte address mode to 4-byte one to gain access to full 32 Mbytes. The problem was that board booted in cold-start but after issuing "reset" - it was going to MASKROM mode like no SPI was soldered or empty. After loosing two weeks i figured that RockChip bootrom talks to SPI using only 3-byte addressing. So leaving 4-byte switched by UBoot SPI chip made it unusable to RockChip Bootrom. I found this by dumping Bootrom and decompiling it. I don't know if it's enough information to make a patch to MainLine (at least for SPI boot in RK3328). Problem with 3-byte addressing is a complete different story. Sorry for my "unproffesional" mail. I am writing this type of message for a first time. Marcin || ||
Re: [PATCH] image: fit: Fix not verifying data configuration
On 11/18/22 15:50, Simon Glass wrote:
> Hi Sean,
>
> On Thu, 13 Oct 2022 at 09:41, Sean Anderson wrote:
>>
>>
>>
>> On 10/13/22 3:14 AM, Rasmus Villemoes wrote:
>> > On 12/10/2022 18.28, Sean Anderson wrote:
>> >> On 10/12/22 08:59, Simon Glass wrote:
>> >>> Hi Sean,
>> >>>
>> >>> On Tue, 11 Oct 2022 at 17:25, Sean Anderson
>> >>> wrote:
>>
>> When reading data from a FIT image, we must verify the configuration we
>> get it from. This is because when we have a key with required = "conf",
>> the image does not need any particular signature or hash. The
>> configuration is the only required verification, so we must verify it.
>>
>> Users of fit_get_data_node are liable to load unsigned data unless the
>> user has set required = "image". Even then, they are vulnerable to
>> mix-and-match attacks. This also affects other callers of
>> fit_image_verify which don't first call fit_config_verify, such as
>> source and imxtract. I don't think there is a backwards-compatible way
>> to fix these interfaces. Fundamentally, selecting data by image when
>> images are not required to be verified is unsafe.
>>
>> Fixes: 37feaf2f727 ("image: fit: Add some helpers for getting data")
>> Signed-off-by: Sean Anderson
>> ---
>>
>> boot/image-fit.c | 9 -
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/boot/image-fit.c b/boot/image-fit.c
>> index 9c04ff78a15..632fd405e29 100644
>> --- a/boot/image-fit.c
>> +++ b/boot/image-fit.c
>> @@ -1948,7 +1948,14 @@ int fit_get_data_node(const void *fit, const
>> char *image_uname,
>> int fit_get_data_conf_prop(const void *fit, const char *prop_name,
>> const void **data, size_t *size)
>> {
>> - int noffset = fit_conf_get_node(fit, NULL);
>> + int ret, noffset = fit_conf_get_node(fit, NULL);
>> +
>> + if (noffset < 0)
>> + return noffset;
>> +
>> + ret = fit_config_verify(fit, noffset);
>> + if (ret)
>> + return ret;
>>
>> noffset = fit_conf_get_prop_node(fit, noffset, prop_name);
>> return fit_get_data_tail(fit, noffset, data, size);
>> --
>> 2.35.1.1320.gc452695387.dirty
>>
>> >>>
>> >>> This is supposed to work by first verifying the configuration with
>> >>> fit_config_verify(). After that, images in that configuration can be
>> >>> freely loaded, verified by the hash that each image has.
>> >>
>> >> Well, this function was made to replaces several cases where code loaded
>> >> a FIT image from somewhere, and then wanted to get data from an image
>> >> based on the configuration. Typically they only want to extract one
>> >> image, which is the common case for e.g. loading firmware. This idea of
>> >> this function is to make the common case of "find me the image data from
>> >> the default config and verify it" easier. If you look at the existing
>> >> code which uses this function, they do not verify the configuration
>> >> first. This is mainly because the original versions of this code which I
>> >> replaced with this function did not verify the configuration either.
>> >>
>> >> So while the above process works for an integrated verification process,
>> >> like what is done by bootm, it doesn't really work for one-off loading
>> >> of image data. In particular, the requirements to make this secure
>> >> (using required = "image" for your key), are not default. When I was
>> >> trying to determine whether the source command would be OK to use to
>> >> load some configuration, I looked at it and saw that it did
>> >> fit_image_verify. I thought that was fine, but if you use required =
>> >> "config", then all that does is verify the hash.
>> >
>> > Yeah, so I've raised this problem with the "source" shell command
>> > previously, but never got a satisfactory answer:
>> >
>> > https://lore.kernel.org/u-boot/7d711133-d513-5bcb-52f2-a9dbaa9ee...@prevas.dk/
>> >
>> > So does your patch now mean that it's possible to get a
>> > bootscript-wrapped-in-a-FIT-image verified, possibly by adding some
>> > dummy (or not so dummy?) "configurations" node? Can you give a complete
>> > .its showing how I can build a verifiable boot script?
>>
>> No. I didn't convert source because it also checks to ensure that the
>> image type is correct, which fit_get_data_node doesn't check. However,
>> it still uses the image name to determine the data to source, which has
>> all the problems as discussed above.
>>
>> I think to do this right we would need either
>>
>> - A version of fit_image_verify which treats required = "config" as
>> required = "image". This could be used for cases where the caller
>> doesn't verify a config (such as in cases when the user specifies an
>> image directly).
>
> Without config verification we are subject to m
Re: [PATCH v8 06/13] binman: Support new op-tee binary format
On 12/22/22 21:23, Simon Glass wrote:
> (dropping the two bounces from cc)
>
> On Thu, 22 Dec 2022 at 13:18, Simon Glass wrote:
>>
>> Hi Jerome,
>>
>> On Thu, 22 Dec 2022 at 08:36, Jerome Forissier
>> wrote:
>>>
>>>
>>>
>>> On 12/22/22 00:07, Simon Glass wrote:
OP-TEE has a format with a binary header that can be used instead of the
ELF file. With newer versions of OP-TEE this may be required on some
platforms.
Add support for this in binman. First, add a method to obtain the ELF
sections from an entry, then use that in the FIT support. We then end up
with the ability to support both types of OP-TEE files, depending on which
one is passed in with the entry argument (TEE=xxx in the U-Boot build).
>>>
>>> So, with:
>>>
>>> BL31=/path/to/bl31.elf TEE=/path/to/tee.bin make -C u-boot \
>>> CROSS_COMPILE=aarch64-linux-gnu- CC=aarch64-linux-gnu-gcc \
>>> HOSTCC=gcc BINMAN_DEBUG=1 BINMAN_VERBOSE=4
>>>
>>>
>>> ...I get:
>>>
>>> Entry '/binman/simple-bin/fit/images/@tee-SEQ/tee-os' marked absent: uses
>>> v1 format which must be in a FIT
>>>
>>>
>>> More complete log at https://pastebin.com/UZzZeicQ
>>
>> Thanks.
>>
>> Is this file in the v1 binary format (with the custom header),
Yes
>> or is
>> is a plain binary file? At present only the former is supported, as I
>> thought that it can only be the elf or the v1 binary format these
>> days?
Correct
>> Actually can you please send me the tee.bin ?
Sure, here you go: https://ufile.io/f/ex5oy
I have added bl31.elf too, although I suppose it is handled properly
being an ELF file.
Thanks,
--
Jerome
>> Regards,
>> Simon
>>
>>
>>>
>>> Thanks,
>>> --
>>> Jerome
>>>
Signed-off-by: Simon Glass
---
(no changes since v7)
Changes in v7:
- Correct missing test coverage
Changes in v6:
- Update op-tee to support new v1 binary header
tools/binman/entries.rst | 35 -
tools/binman/entry.py| 13 +++
tools/binman/etype/fit.py| 69 +---
tools/binman/etype/section.py| 9 +++
tools/binman/etype/tee_os.py | 68 +++-
tools/binman/ftest.py| 83
tools/binman/test/263_tee_os_opt.dts | 22 ++
tools/binman/test/264_tee_os_opt_fit.dts | 33
tools/binman/test/265_tee_os_opt_fit_bad.dts | 40 ++
9 files changed, 340 insertions(+), 32 deletions(-)
create mode 100644 tools/binman/test/263_tee_os_opt.dts
create mode 100644 tools/binman/test/264_tee_os_opt_fit.dts
create mode 100644 tools/binman/test/265_tee_os_opt_fit_bad.dts
diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index b2ce7960d3b..a3e4493a44f 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1508,12 +1508,45 @@ Entry: tee-os: Entry containing an OP-TEE Trusted
OS (TEE) blob
Properties / Entry arguments:
- tee-os-path: Filename of file to read into entry. This is typically
-called tee-pager.bin
+called tee.bin or tee.elf
This entry holds the run-time firmware, typically started by U-Boot SPL.
See the U-Boot README for your architecture or board for how to use it.
See
https://github.com/OP-TEE/optee_os for more information about OP-TEE.
+Note that if the file is in ELF format, it must go in a FIT. In that case,
+this entry will mark itself as absent, providing the data only through the
+read_elf_segments() method.
+
+Marking this entry as absent means that it if is used in the wrong context
+it can be automatically dropped. Thus it is possible to add anb OP-TEE
entry
+like this::
+
+binman {
+tee-os {
+};
+};
+
+and pass either an ELF or plain binary in with -a tee-os-path
+and have binman do the right thing:
+
+ - include the entry if tee.bin is provided and it doesn't have the v1
+ header
+ - drop it otherwise
+
+When used within a FIT, we can do::
+
+binman {
+fit {
+tee-os {
+};
+};
+};
+
+which will split the ELF into separate nodes for each segment, if an ELF
+file is provide (see Flat Image Tree / FIT), or produce a single node if
+the binary v1 format is provided.
+
.. _etype_text:
diff --git a/tools/binman/entry.py b/tools/binman/entry.py
index 637aece3705..de51d295891 100644
--- a/tools/binman/entry.py
+++ b/tools/binman/entry.py
@@ -1290,3 +1290,16 @@ features to produce new behaviours.
def mark_absent(self, msg):
tout.info("Entry '%s' marked absent: %s" % (self._node.path, msg))
>>>
Re: [u-boot][PATCH v2 1/8] mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
Hi
On Tue, Dec 20, 2022 at 11:22 AM Roger Quadros wrote:
>
> The BCH detection hardware can generate ECC bytes for multiple
> sectors in one go. Use that feature.
>
> correct() only corrects one sector at a time so we need to call it
> repeatedly for each sector.
>
> Signed-off-by: Roger Quadros
> Reviewed-by: Michael Trimarchi
> ---
> drivers/mtd/nand/raw/omap_gpmc.c | 325 +--
> 1 file changed, 223 insertions(+), 102 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c
> b/drivers/mtd/nand/raw/omap_gpmc.c
> index 69fc09be097..e772a914c88 100644
> --- a/drivers/mtd/nand/raw/omap_gpmc.c
> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
> @@ -27,6 +27,9 @@
>
> #define BADBLOCK_MARKER_LENGTH 2
> #define SECTOR_BYTES 512
> +#define ECCSIZE0_SHIFT 12
> +#define ECCSIZE1_SHIFT 22
> +#define ECC1RESULTSIZE 0x1
> #define ECCCLEAR (0x1 << 8)
> #define ECCRESULTREG1 (0x1 << 0)
> /* 4 bit padding to make byte aligned, 56 = 52 + 4 */
> @@ -186,72 +189,35 @@ static int __maybe_unused omap_correct_data(struct
> mtd_info *mtd, uint8_t *dat,
> __maybe_unused
> static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
> {
> - struct nand_chip*nand = mtd_to_nand(mtd);
> - struct omap_nand_info *info = nand_get_controller_data(nand);
> + struct nand_chip *nand = mtd_to_nand(mtd);
> + struct omap_nand_info *info = nand_get_controller_data(nand);
> unsigned int dev_width = (nand->options & NAND_BUSWIDTH_16) ? 1 : 0;
> - unsigned int ecc_algo = 0;
> - unsigned int bch_type = 0;
> - unsigned int eccsize1 = 0x00, eccsize0 = 0x00, bch_wrapmode = 0x00;
> - u32 ecc_size_config_val = 0;
> - u32 ecc_config_val = 0;
> - int cs = info->cs;
> + u32 val;
>
> - /* configure GPMC for specific ecc-scheme */
> - switch (info->ecc_scheme) {
> - case OMAP_ECC_HAM1_CODE_SW:
> - return;
> - case OMAP_ECC_HAM1_CODE_HW:
> - ecc_algo = 0x0;
> - bch_type = 0x0;
> - bch_wrapmode = 0x00;
> - eccsize0 = 0xFF;
> - eccsize1 = 0xFF;
> + /* Clear ecc and enable bits */
> + writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
> +
> + /* program ecc and result sizes */
> + val = nand->ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) |
> + ECC1RESULTSIZE);
> + writel(val, &gpmc_cfg->ecc_size_config);
> +
> + switch (mode) {
> + case NAND_ECC_READ:
> + case NAND_ECC_WRITE:
> + writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
> break;
> - case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
> - case OMAP_ECC_BCH8_CODE_HW:
> - ecc_algo = 0x1;
> - bch_type = 0x1;
> - if (mode == NAND_ECC_WRITE) {
> - bch_wrapmode = 0x01;
> - eccsize0 = 0; /* extra bits in nibbles per sector */
> - eccsize1 = 28; /* OOB bits in nibbles per sector */
> - } else {
> - bch_wrapmode = 0x01;
> - eccsize0 = 26; /* ECC bits in nibbles per sector */
> - eccsize1 = 2; /* non-ECC bits in nibbles per sector
> */
> - }
> - break;
> - case OMAP_ECC_BCH16_CODE_HW:
> - ecc_algo = 0x1;
> - bch_type = 0x2;
> - if (mode == NAND_ECC_WRITE) {
> - bch_wrapmode = 0x01;
> - eccsize0 = 0; /* extra bits in nibbles per sector */
> - eccsize1 = 52; /* OOB bits in nibbles per sector */
> - } else {
> - bch_wrapmode = 0x01;
> - eccsize0 = 52; /* ECC bits in nibbles per sector */
> - eccsize1 = 0; /* non-ECC bits in nibbles per sector
> */
> - }
> + case NAND_ECC_READSYN:
> + writel(ECCCLEAR, &gpmc_cfg->ecc_control);
> break;
> default:
> - return;
> + printf("%s: error: unrecognized Mode[%d]!\n", __func__, mode);
> + break;
> }
> - /* Clear ecc and enable bits */
> - writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
> - /* Configure ecc size for BCH */
> - ecc_size_config_val = (eccsize1 << 22) | (eccsize0 << 12);
> - writel(ecc_size_config_val, &gpmc_cfg->ecc_size_config);
> -
> - /* Configure device details for BCH engine */
> - ecc_config_val = ((ecc_algo << 16) | /* HAM1 | BCHx */
> - (bch_type << 12)| /* BCH4/BCH8/BCH16 */
> - (bch_wrapmode << 8) | /* wrap mode */
> - (dev_width << 7)| /* bus width */
> - (0x0 << 4)
Re: [u-boot][PATCH v2 8/8] mtd: rawnand: omap_elm: u-boot driver model support
Hi Roger
On Wed, Dec 21, 2022 at 9:08 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi
>
> On Wed, Dec 21, 2022 at 8:57 PM Roger Quadros wrote:
> >
> > Hi Michael,
> >
> > On 21/12/2022 19:56, Michael Nazzareno Trimarchi wrote:
> > > Hi Roger
> > >
> > > On Tue, Dec 20, 2022 at 11:22 AM Roger Quadros wrote:
> > >>
> > >> Support u-boot driver model. We still retain
> > >> support legacy way of doing things if ELM_BASE
> > >> is defined in
> > >>
> > >> We could completely get rid of that if all
> > >> platforms defining ELM_BASE get rid of that definition
> > >> and enable CONFIG_SYS_NAND_SELF_INIT and are verified
> > >> to work.
> > >>
> > >> Signed-off-by: Roger Quadros
> > >> ---
> > >
> > > When you post please include the relative changelog
> >
> > I put the changelog in the cover-letter.
> >
>
> My bad, I'm always start from patch 1 and look on changes in every single
> patch
>
Pipeline is running, I have fixed another minor problem in the build
Michael
> Michael
>
> >
> > cheers,
> > -roger
> >
> > >
> > > Michael
> > >
> > >> drivers/mtd/nand/raw/omap_elm.c | 35 ++-
> > >> .../mtd => drivers/mtd/nand/raw}/omap_elm.h | 6
> > >> drivers/mtd/nand/raw/omap_gpmc.c | 12 ++-
> > >> 3 files changed, 51 insertions(+), 2 deletions(-)
> > >> rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
> > >>
> > >> diff --git a/drivers/mtd/nand/raw/omap_elm.c
> > >> b/drivers/mtd/nand/raw/omap_elm.c
> > >> index 35c6dd1f1bc..e528a5348d5 100644
> > >> --- a/drivers/mtd/nand/raw/omap_elm.c
> > >> +++ b/drivers/mtd/nand/raw/omap_elm.c
> > >> @@ -15,9 +15,14 @@
> > >> #include
> > >> #include
> > >> #include
> > >> -#include
> > >> #include
> > >>
> > >> +#include
> > >> +#include
> > >> +#include
> > >> +
> > >> +#include "omap_elm.h"
> > >> +
> > >> #define DRIVER_NAME"omap-elm"
> > >> #define ELM_DEFAULT_POLY (0)
> > >>
> > >> @@ -180,6 +185,7 @@ void elm_reset(void)
> > >> ;
> > >> }
> > >>
> > >> +#ifdef ELM_BASE
> > >> /**
> > >> * elm_init - Initialize ELM module
> > >> *
> > >> @@ -191,3 +197,30 @@ void elm_init(void)
> > >> elm_cfg = (struct elm *)ELM_BASE;
> > >> elm_reset();
> > >> }
> > >> +#endif
> > >> +
> > >> +static int elm_probe(struct udevice *dev)
> > >> +{
> > >> +#ifndef ELM_BASE
> > >> + struct resource res;
> > >> +
> > >> + dev_read_resource(dev, 0, &res);
> > >> + elm_cfg = devm_ioremap(dev, res.start, resource_size(&res));
> > >> + elm_reset();
> > >> +#endif
> > >> +
> > >> + return 0;
> > >> +}
> > >> +
> > >> +static const struct udevice_id elm_ids[] = {
> > >> + { .compatible = "ti,am3352-elm" },
> > >> + { .compatible = "ti,am64-elm" },
> > >> + { }
> > >> +};
> > >> +
> > >> +U_BOOT_DRIVER(gpmc_elm) = {
> > >> + .name = DRIVER_NAME,
> > >> + .id = UCLASS_MTD,
> > >> + .of_match = elm_ids,
> > >> + .probe = elm_probe,
> > >> +};
> > >> diff --git a/include/linux/mtd/omap_elm.h
> > >> b/drivers/mtd/nand/raw/omap_elm.h
> > >> similarity index 97%
> > >> rename from include/linux/mtd/omap_elm.h
> > >> rename to drivers/mtd/nand/raw/omap_elm.h
> > >> index f3db00d55de..a7f7bacb154 100644
> > >> --- a/include/linux/mtd/omap_elm.h
> > >> +++ b/drivers/mtd/nand/raw/omap_elm.h
> > >> @@ -74,6 +74,12 @@ int elm_check_error(u8 *syndrome, enum bch_level
> > >> bch_type, u32 *error_count,
> > >> u32 *error_locations);
> > >> int elm_config(enum bch_level level);
> > >> void elm_reset(void);
> > >> +#ifdef ELM_BASE
> > >> void elm_init(void);
> > >> +#else
> > >> +static inline void elm_init(void)
> > >> +{
> > >> +}
> > >> +#endif
> > >> #endif /* __ASSEMBLY__ */
> > >> #endif /* __ASM_ARCH_ELM_H */
> > >> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c
> > >> b/drivers/mtd/nand/raw/omap_gpmc.c
> > >> index ed6cdf93ad0..9692b78da3c 100644
> > >> --- a/drivers/mtd/nand/raw/omap_gpmc.c
> > >> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
> > >> @@ -20,7 +20,8 @@
> > >> #include
> > >> #include
> > >> #include
> > >> -#include
> > >> +
> > >> +#include "omap_elm.h"
> > >>
> > >> #ifndef GPMC_MAX_CS
> > >> #define GPMC_MAX_CS4
> > >> @@ -1249,6 +1250,15 @@ void board_nand_init(void)
> > >> struct udevice *dev;
> > >> int ret;
> > >>
> > >> +#ifdef CONFIG_NAND_OMAP_ELM
> > >> + ret = uclass_get_device_by_driver(UCLASS_MTD,
> > >> + DM_DRIVER_GET(gpmc_elm), &dev);
> > >> + if (ret && ret != -ENODEV) {
> > >> + pr_err("%s: Failed to get ELM device: %d\n", __func__,
> > >> ret);
> > >> + return;
> > >> + }
> > >> +#endif
> > >> +
> > >> ret = uclass_get_device_by_driver(UCLASS_MTD,
> > >> DM_DRIVER_GET(gpmc_nand),
> > >> &dev);
> > >> if (ret && ret != -ENODEV)
> > >> --
[PATCH] ARM: dts: renesas: condor: Enable SPI NOR fast-read
From: Marek Vasut
This board requires SPI NOR fast-read, otherwise the SPI NOR
access returns corrupted data. Enable the fast-read explicitly
in DT as it has been disabled in the MTD subsystem by commit
d008190920 ("mtd: spi-nor: Mask out fast read if not requested in DT")
Signed-off-by: Marek Vasut
---
arch/arm/dts/r8a77980-condor-u-boot.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/r8a77980-condor-u-boot.dts
b/arch/arm/dts/r8a77980-condor-u-boot.dts
index 1b22c7f0b9..576a74e603 100644
--- a/arch/arm/dts/r8a77980-condor-u-boot.dts
+++ b/arch/arm/dts/r8a77980-condor-u-boot.dts
@@ -25,6 +25,7 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "s25fs512s", "jedec,spi-nor";
+ m25p,fast-read;
spi-max-frequency = <5000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>;
--
2.35.1
[PATCH v2 13/14] rockchip: Enable bootstage on rockpro64
This board is useful for benchmarking overall U-Boot performance. Enable
the bootstage feature so we get a report.
Since this returns to the boot rom before finishing executing
board_init_r() in SPL, add a few bootstage calls so that we can collect
timing from TPL.
For the stash region, use a portion of SRAM, 64KB below the stack top.
This allows the TPL image to be up to nearly 120KB (it is typically about
64KB). SPL normally runs from SDRAM at 0, so can use the same stash
region.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop debugging statements
- Update the comment to indicate why the timer is set up first
arch/arm/mach-rockchip/tpl.c | 16 +---
configs/rockpro64-rk3399_defconfig | 8
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index ed46a9ad286..40cf9f0e79c 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -70,15 +71,15 @@ void board_init_f(ulong dummy)
U_BOOT_TIME ")\n");
#endif
#endif
+ /* Init secure timer before setting up bootstage */
+ rockchip_stimer_init();
+
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
hang();
}
- /* Init secure timer */
- rockchip_stimer_init();
-
/* Init ARM arch timer */
if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
timer_init();
@@ -93,6 +94,15 @@ void board_init_f(ulong dummy)
int board_return_to_bootrom(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
{
+#ifdef CONFIG_BOOTSTAGE_STASH
+ int ret;
+
+ bootstage_mark_name(BOOTSTAGE_ID_END_TPL, "end tpl");
+ ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
+ CONFIG_BOOTSTAGE_STASH_SIZE);
+ if (ret)
+ debug("Failed to stash bootstage: err=%d\n", ret);
+#endif
back_to_bootrom(BROM_BOOT_NEXTSTAGE);
return 0;
diff --git a/configs/rockpro64-rk3399_defconfig
b/configs/rockpro64-rk3399_defconfig
index 5b8d678f6bb..2f1ae156bd4 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x3F8000
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROCKPRO64_RK3399=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0xff8e
CONFIG_DEBUG_UART_BASE=0xFF1A
CONFIG_DEBUG_UART_CLOCK=2400
CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -17,6 +18,12 @@ CONFIG_SYS_LOAD_ADDR=0x800800
CONFIG_DEBUG_UART=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
+CONFIG_BOOTSTAGE=y
+CONFIG_SPL_BOOTSTAGE=y
+CONFIG_TPL_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10
+CONFIG_BOOTSTAGE_STASH=y
CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -40,6 +47,7 @@ CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
+CONFIG_CMD_BOOTSTAGE=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_SPI_FLASH=y
--
2.39.0.314.g84b9a713c41-goog
[PATCH 6/6] ARM: renesas: Enable LTO on R-Car3 Falcon
From: Marek Vasut Enable LTO (link time optimization) to improve optimization and reduce code size by cca. 30 kiB. Signed-off-by: Marek Vasut --- configs/r8a779a0_falcon_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 8cf2921327..28fef6f16a 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_CLK_FREQ=1666 # CONFIG_PSCI_RESET is not set CONFIG_ARMV8_PSCI=y CONFIG_SYS_LOAD_ADDR=0x5800 +CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y -- 2.35.1
[PATCH 5/6] ARM: renesas: Enable LTO on R-Car3 Draak
From: Marek Vasut Enable LTO (link time optimization) to improve optimization and reduce code size by cca. 29 kiB. Signed-off-by: Marek Vasut --- configs/r8a77995_draak_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index 9ac70cba65..e6517ea34c 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_DRAAK=y CONFIG_SYS_LOAD_ADDR=0x5800 +CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y -- 2.35.1
[PATCH 4/6] ARM: renesas: Enable LTO on R-Car3 Ebisu
From: Marek Vasut Enable LTO (link time optimization) to improve optimization and reduce code size by cca. 34 kiB. Signed-off-by: Marek Vasut --- configs/r8a77990_ebisu_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index fe2a38da99..00337e07ee 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y CONFIG_SYS_LOAD_ADDR=0x5800 +CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y -- 2.35.1
[PATCH 3/6] ARM: renesas: Enable LTO on R-Car3 Condor
From: Marek Vasut Enable LTO (link time optimization) to improve optimization and reduce code size by cca. 32 kiB. Signed-off-by: Marek Vasut --- configs/r8a77980_condor_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index d2aeb9629b..2e2bb55ba2 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y CONFIG_SYS_LOAD_ADDR=0x5800 +CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y -- 2.35.1
[PATCH 2/6] ARM: renesas: Enable LTO on R-Car3 Eagle
From: Marek Vasut Enable LTO (link time optimization) to improve optimization and reduce code size by cca. 32 kiB. Signed-off-by: Marek Vasut --- configs/r8a77970_eagle_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index fac4ab66f7..62192ad389 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y CONFIG_SYS_LOAD_ADDR=0x5800 +CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y -- 2.35.1
[PATCH 1/6] ARM: renesas: Enable LTO on R-Car3 ULCB
From: Marek Vasut Enable LTO (link time optimization) to improve optimization and reduce code size by cca. 31 kiB. Signed-off-by: Marek Vasut --- configs/rcar3_ulcb_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 729fbde18f..1e964880f6 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_ULCB=y CONFIG_SYS_LOAD_ADDR=0x5800 +CONFIG_LTO=y CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y -- 2.35.1
[PATCH] ARM: renesas: condor: Set CONFIG_TEXT_BASE=0x0 on R-Car Gen3 Condor
From: Marek Vasut
Since R-Car Gen3 already enables position independent build, also set
CONFIG_TEXT_BASE=0x0 to finalize the switch. This is possible since
534f0fbd65 ("arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y")
fixed current env_get_char() crash with CONFIG_TEXT_BASE=0x0 .
This change permits us to start U-Boot from any location in DRAM instead
of specific TEXT_BASE.
Signed-off-by: Marek Vasut
---
configs/r8a77980_condor_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/r8a77980_condor_defconfig
b/configs/r8a77980_condor_defconfig
index 7110d6e2ba..d2aeb9629b 100644
--- a/configs/r8a77980_condor_defconfig
+++ b/configs/r8a77980_condor_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=1666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_TEXT_BASE=0x5000
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x400
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x4
--
2.35.1
[PATCH] ARM: renesas: ulcb: Set CONFIG_TEXT_BASE=0x0 on R-Car Gen3 ULCB
From: Marek Vasut
Since R-Car Gen3 already enables position independent build, also set
CONFIG_TEXT_BASE=0x0 to finalize the switch. This is possible since
534f0fbd65 ("arm64: Fix relocation of env_addr if POSITION_INDEPENDENT=y")
fixed current env_get_char() crash with CONFIG_TEXT_BASE=0x0 .
This change permits us to start U-Boot from any location in DRAM instead
of specific TEXT_BASE.
Signed-off-by: Marek Vasut
---
configs/rcar3_ulcb_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig
index 43361a286f..729fbde18f 100644
--- a/configs/rcar3_ulcb_defconfig
+++ b/configs/rcar3_ulcb_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=1666
CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y
-CONFIG_TEXT_BASE=0x5000
+CONFIG_TEXT_BASE=0x0
CONFIG_SYS_MALLOC_LEN=0x400
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_ENV_SIZE=0x2
--
2.35.1
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
On Thursday 22 December 2022 13:22:50 Tom Rini wrote: > I suspect that how we fire up QEMU means that the issue you're > noting isn't triggered since we don't boot it from flash but instead > pass the binary. Yes, this sounds like that problematic part is not tested. To spot this issue some end-to-end test is needed... For flash setup - booting directly from the qemu flash (execute in place) without initialized RAM and letting u-boot to do it. For SD card setup - booting via BootROM (like it is on the real HW). Seems that SD card BootROM is not available on internet and no idea if it can be dumped from some Freescale CPU (it is even legal to do it?). So some alternative bootrom implementation for such testing is needed... which is lot of work.
Re: [PATCH] i2c: add dm_i2c_probe_chip() to detect chip presence
Hi Johan, On Mon, 19 Dec 2022 at 12:57, Johan Korsnes wrote: > > Add function to determine whether a chip is present. This check is > typically implemented by writing the chip address to the bus and > checking that the chip replies with an ACK. > > The already existing dm_i2c_probe() will attempt to bind/probe the > relevant driver if the chip is present. This makes it unsuitable for > situations where one only wants to know the presence of a chip. > > Signed-off-by: Johan Korsnes > Cc: Eirik Schultz > Cc: Heiko Schocher > Cc: Simon Glass > > --- > Previously, I've used i2c_probe() to determine whether or not an i2c > chip is present on an i2c bus. With the introduction of the driver model > this function is deprecated. Fortunately, I found dm_i2c_probe(), which > I expected to perform the same check, it was even documented to be > suitable for this purpose: > > ``` > dm_i2c_probe() - probe a particular chip address > > This can be useful to check for the existence of a chip on the bus. > It is typically implemented by writing the chip address to the bus > and checking that the chip replies with an ACK. > ``` > > Unfortunately, it does not seem to be a replacement. It seems > dm_i2c_probe() will attempt to bind/probe a driver if the chip is > present, and will in turn return the return value from the driver > probe/bind attempt. > --- > drivers/i2c/i2c-uclass.c | 11 +++ > include/i2c.h| 16 +--- > 2 files changed, 24 insertions(+), 3 deletions(-) This looks OK but please add a test to dm/test/i2c.c for your new function. https://u-boot.readthedocs.io/en/latest/develop/testing.html Regards, Simon
Re: [PATCH v8 06/13] binman: Support new op-tee binary format
(dropping the two bounces from cc)
On Thu, 22 Dec 2022 at 13:18, Simon Glass wrote:
>
> Hi Jerome,
>
> On Thu, 22 Dec 2022 at 08:36, Jerome Forissier
> wrote:
> >
> >
> >
> > On 12/22/22 00:07, Simon Glass wrote:
> > > OP-TEE has a format with a binary header that can be used instead of the
> > > ELF file. With newer versions of OP-TEE this may be required on some
> > > platforms.
> > >
> > > Add support for this in binman. First, add a method to obtain the ELF
> > > sections from an entry, then use that in the FIT support. We then end up
> > > with the ability to support both types of OP-TEE files, depending on which
> > > one is passed in with the entry argument (TEE=xxx in the U-Boot build).
> >
> > So, with:
> >
> > BL31=/path/to/bl31.elf TEE=/path/to/tee.bin make -C u-boot \
> > CROSS_COMPILE=aarch64-linux-gnu- CC=aarch64-linux-gnu-gcc \
> > HOSTCC=gcc BINMAN_DEBUG=1 BINMAN_VERBOSE=4
> >
> >
> > ...I get:
> >
> > Entry '/binman/simple-bin/fit/images/@tee-SEQ/tee-os' marked absent: uses
> > v1 format which must be in a FIT
> >
> >
> > More complete log at https://pastebin.com/UZzZeicQ
>
> Thanks.
>
> Is this file in the v1 binary format (with the custom header), or is
> is a plain binary file? At present only the former is supported, as I
> thought that it can only be the elf or the v1 binary format these
> days? Actually can you please send me the tee.bin ?
>
> Regards,
> Simon
>
>
> >
> > Thanks,
> > --
> > Jerome
> >
> > > Signed-off-by: Simon Glass
> > > ---
> > >
> > > (no changes since v7)
> > >
> > > Changes in v7:
> > > - Correct missing test coverage
> > >
> > > Changes in v6:
> > > - Update op-tee to support new v1 binary header
> > >
> > > tools/binman/entries.rst | 35 -
> > > tools/binman/entry.py| 13 +++
> > > tools/binman/etype/fit.py| 69 +---
> > > tools/binman/etype/section.py| 9 +++
> > > tools/binman/etype/tee_os.py | 68 +++-
> > > tools/binman/ftest.py| 83
> > > tools/binman/test/263_tee_os_opt.dts | 22 ++
> > > tools/binman/test/264_tee_os_opt_fit.dts | 33
> > > tools/binman/test/265_tee_os_opt_fit_bad.dts | 40 ++
> > > 9 files changed, 340 insertions(+), 32 deletions(-)
> > > create mode 100644 tools/binman/test/263_tee_os_opt.dts
> > > create mode 100644 tools/binman/test/264_tee_os_opt_fit.dts
> > > create mode 100644 tools/binman/test/265_tee_os_opt_fit_bad.dts
> > >
> > > diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
> > > index b2ce7960d3b..a3e4493a44f 100644
> > > --- a/tools/binman/entries.rst
> > > +++ b/tools/binman/entries.rst
> > > @@ -1508,12 +1508,45 @@ Entry: tee-os: Entry containing an OP-TEE Trusted
> > > OS (TEE) blob
> > >
> > > Properties / Entry arguments:
> > > - tee-os-path: Filename of file to read into entry. This is typically
> > > -called tee-pager.bin
> > > +called tee.bin or tee.elf
> > >
> > > This entry holds the run-time firmware, typically started by U-Boot SPL.
> > > See the U-Boot README for your architecture or board for how to use it.
> > > See
> > > https://github.com/OP-TEE/optee_os for more information about OP-TEE.
> > >
> > > +Note that if the file is in ELF format, it must go in a FIT. In that
> > > case,
> > > +this entry will mark itself as absent, providing the data only through
> > > the
> > > +read_elf_segments() method.
> > > +
> > > +Marking this entry as absent means that it if is used in the wrong
> > > context
> > > +it can be automatically dropped. Thus it is possible to add anb OP-TEE
> > > entry
> > > +like this::
> > > +
> > > +binman {
> > > +tee-os {
> > > +};
> > > +};
> > > +
> > > +and pass either an ELF or plain binary in with -a tee-os-path
> > > +and have binman do the right thing:
> > > +
> > > + - include the entry if tee.bin is provided and it doesn't have the v1
> > > + header
> > > + - drop it otherwise
> > > +
> > > +When used within a FIT, we can do::
> > > +
> > > +binman {
> > > +fit {
> > > +tee-os {
> > > +};
> > > +};
> > > +};
> > > +
> > > +which will split the ELF into separate nodes for each segment, if an ELF
> > > +file is provide (see Flat Image Tree / FIT), or produce a single node if
> > > +the binary v1 format is provided.
> > > +
> > >
> > >
> > > .. _etype_text:
> > > diff --git a/tools/binman/entry.py b/tools/binman/entry.py
> > > index 637aece3705..de51d295891 100644
> > > --- a/tools/binman/entry.py
> > > +++ b/tools/binman/entry.py
> > > @@ -1290,3 +1290,16 @@ features to produce new behaviours.
> > > def mark_absent(self, msg):
> > > tout.info("Entry '%s' marked absent: %s" % (self._node.path,
> > > msg))
> > > self.absent = True
> > > +
> > > +def read_elf_segments(self):
> > > +"""Read segments from
Re: [PATCH v8 06/13] binman: Support new op-tee binary format
Hi Jerome,
On Thu, 22 Dec 2022 at 08:36, Jerome Forissier
wrote:
>
>
>
> On 12/22/22 00:07, Simon Glass wrote:
> > OP-TEE has a format with a binary header that can be used instead of the
> > ELF file. With newer versions of OP-TEE this may be required on some
> > platforms.
> >
> > Add support for this in binman. First, add a method to obtain the ELF
> > sections from an entry, then use that in the FIT support. We then end up
> > with the ability to support both types of OP-TEE files, depending on which
> > one is passed in with the entry argument (TEE=xxx in the U-Boot build).
>
> So, with:
>
> BL31=/path/to/bl31.elf TEE=/path/to/tee.bin make -C u-boot \
> CROSS_COMPILE=aarch64-linux-gnu- CC=aarch64-linux-gnu-gcc \
> HOSTCC=gcc BINMAN_DEBUG=1 BINMAN_VERBOSE=4
>
>
> ...I get:
>
> Entry '/binman/simple-bin/fit/images/@tee-SEQ/tee-os' marked absent: uses v1
> format which must be in a FIT
>
>
> More complete log at https://pastebin.com/UZzZeicQ
Thanks.
Is this file in the v1 binary format (with the custom header), or is
is a plain binary file? At present only the former is supported, as I
thought that it can only be the elf or the v1 binary format these
days? Actually can you please send me the tee.bin ?
Regards,
Simon
>
> Thanks,
> --
> Jerome
>
> > Signed-off-by: Simon Glass
> > ---
> >
> > (no changes since v7)
> >
> > Changes in v7:
> > - Correct missing test coverage
> >
> > Changes in v6:
> > - Update op-tee to support new v1 binary header
> >
> > tools/binman/entries.rst | 35 -
> > tools/binman/entry.py| 13 +++
> > tools/binman/etype/fit.py| 69 +---
> > tools/binman/etype/section.py| 9 +++
> > tools/binman/etype/tee_os.py | 68 +++-
> > tools/binman/ftest.py| 83
> > tools/binman/test/263_tee_os_opt.dts | 22 ++
> > tools/binman/test/264_tee_os_opt_fit.dts | 33
> > tools/binman/test/265_tee_os_opt_fit_bad.dts | 40 ++
> > 9 files changed, 340 insertions(+), 32 deletions(-)
> > create mode 100644 tools/binman/test/263_tee_os_opt.dts
> > create mode 100644 tools/binman/test/264_tee_os_opt_fit.dts
> > create mode 100644 tools/binman/test/265_tee_os_opt_fit_bad.dts
> >
> > diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
> > index b2ce7960d3b..a3e4493a44f 100644
> > --- a/tools/binman/entries.rst
> > +++ b/tools/binman/entries.rst
> > @@ -1508,12 +1508,45 @@ Entry: tee-os: Entry containing an OP-TEE Trusted
> > OS (TEE) blob
> >
> > Properties / Entry arguments:
> > - tee-os-path: Filename of file to read into entry. This is typically
> > -called tee-pager.bin
> > +called tee.bin or tee.elf
> >
> > This entry holds the run-time firmware, typically started by U-Boot SPL.
> > See the U-Boot README for your architecture or board for how to use it. See
> > https://github.com/OP-TEE/optee_os for more information about OP-TEE.
> >
> > +Note that if the file is in ELF format, it must go in a FIT. In that case,
> > +this entry will mark itself as absent, providing the data only through the
> > +read_elf_segments() method.
> > +
> > +Marking this entry as absent means that it if is used in the wrong context
> > +it can be automatically dropped. Thus it is possible to add anb OP-TEE
> > entry
> > +like this::
> > +
> > +binman {
> > +tee-os {
> > +};
> > +};
> > +
> > +and pass either an ELF or plain binary in with -a tee-os-path
> > +and have binman do the right thing:
> > +
> > + - include the entry if tee.bin is provided and it doesn't have the v1
> > + header
> > + - drop it otherwise
> > +
> > +When used within a FIT, we can do::
> > +
> > +binman {
> > +fit {
> > +tee-os {
> > +};
> > +};
> > +};
> > +
> > +which will split the ELF into separate nodes for each segment, if an ELF
> > +file is provide (see Flat Image Tree / FIT), or produce a single node if
> > +the binary v1 format is provided.
> > +
> >
> >
> > .. _etype_text:
> > diff --git a/tools/binman/entry.py b/tools/binman/entry.py
> > index 637aece3705..de51d295891 100644
> > --- a/tools/binman/entry.py
> > +++ b/tools/binman/entry.py
> > @@ -1290,3 +1290,16 @@ features to produce new behaviours.
> > def mark_absent(self, msg):
> > tout.info("Entry '%s' marked absent: %s" % (self._node.path, msg))
> > self.absent = True
> > +
> > +def read_elf_segments(self):
> > +"""Read segments from an entry that can generate an ELF file
> > +
> > +Returns:
> > +tuple:
> > +list of segments, each:
> > +int: Segment number (0 = first)
> > +int: Start address of segment in memory
> > +bytes: Contents of segment
> > +int: entry address of ELF file
> > +"""
> > +
Re: [PATCH v8 13/13] treewide: Disable USE_SPL_FIT_GENERATOR by default
Hi Tom, On Thu, 22 Dec 2022 at 10:57, Tom Rini wrote: > > On Thu, Dec 22, 2022 at 10:41:17AM -0700, Simon Glass wrote: > > Hi Tom, > > > > On Wed, 21 Dec 2022 at 16:11, Tom Rini wrote: > > > > > > On Wed, Dec 21, 2022 at 04:07:26PM -0700, Simon Glass wrote: > > > > This option is deprecated and only used by two boards. Enable it for > > > > just > > > > those two boards, so others don't accidentally enable it. > > > > > > > > Signed-off-by: Simon Glass > > > > > > Wait, is this right? I thought when I had looked at this before the > > > outliers were two imx boards, which I believe have now been converted. > > > Is it really still in use on two xilinx platforms ? > > > > Yes I think the imx ones have gone away. > > > > For the penultimate commit: > > > > $ ./tools/moveconfig.py -f USE_SPL_FIT_GENERATOR > > 2 matches > > xilinx_zynqmp_virt avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0 > > > > So I believe this is still true. > > Enabled, yes, but is that subtool it sets actually used? > xilinx_zynqmp_virt is in qemu CI even, so that can be quickly tested. I > do wonder if the avnet board was enabling it because it was default and > not using it. When I try to disable it, I get: make[1]: *** No rule to make target 'u-boot.itb', needed by '.binman_stamp'. Stop. so I think it is needed by Regards, Simon
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
On Thu, Dec 22, 2022 at 06:56:40PM +0100, Pali Rohár wrote: > On Thursday 22 December 2022 12:33:32 Tom Rini wrote: > > I'm sorry you're frustrated here. I'm also frustrated here because the > > #ifdef games that PowerPC used, in a number of places have been very > > hard to un-wrap so that we can have something other than a home-grown > > build system. > > I was already trying to reduce it too, some patches I sent, some other I > was preparing and some other are part of turris 1.x platform, which is > waiting there for 6 months. I planned to apply removal of MMC symbols to > other P1/P2 boards, like it is in turris patch, but after turris patch > is merged... which did not happen yet. Right, and thanks for what you've done already. > > And I've tried to take your other feedback in to > > consideration, which has resulted in a large number of symbols being > > moved to CFG_... instead of Kconfig, as you're right, it wasn't the > > right mechanism for them. > > > > So, is it really just the 3 platforms that use p1_p2_rdb.h that need > > neither SDCARD nor SPIFLASH for the NAND and no extra suffix defconfigs? > > Or is it the P1010RDB ones too? > > It applies for e500 v1/v2 cores, which is cpu/mpc85xx in u-boot and > predates P3 platform. If there are not some suspicious symbol names then > it should match any board which uses ARCH_MPC85??? or ARCH_P1?? or > ARCH_P2020 symbol. > > P2040 and T do not have e500 v1/v2 cores (they have e500mc or e5500 > or e6500), so you can ignore these. OK. > Is there any tool which can list all defconfig files which defines some > of those symbols, including transitionally? With the caveat of only symbols in Kconfig, tools/moveconfig.py -b will make a database that you can consult with -f. That takes both SYMBOL and ~SYMBOL to list configs with SYMBOL enabled or disabled, respectively. And you can chain them together. For example: $ ./tools/moveconfig.py -f ARCH_P1010 SDCARD 8 matches P1010RDB-PB_36BIT_NOR P1010RDB-PA_NOR P1010RDB-PB_SDCARD P1010RDB-PB_36BIT_SDCARD P1010RDB-PA_36BIT_NOR P1010RDB-PA_36BIT_SDCARD P1010RDB-PB_NOR P1010RDB-PA_SDCARD $ ./tools/moveconfig.py -f ARCH_P1010 ~SDCARD 8 matches P1010RDB-PA_NAND P1010RDB-PB_SPIFLASH P1010RDB-PB_36BIT_SPIFLASH P1010RDB-PA_36BIT_NAND P1010RDB-PA_36BIT_SPIFLASH P1010RDB-PA_SPIFLASH P1010RDB-PB_NAND P1010RDB-PB_36BIT_NAND > It looks like that there are other boards just than P1010RDB which are > affected. For example I see there: TARGET_SOCRATES TARGET_QEMU_PPCE500. > Default boot source is FLASH and just few boards can have multiple boot > source (which means that have multiple defconfig files with those > suffixes). And obviously SD card boot source must not be enabled when > (default) FLASH is used. > > Note that u-boot for qemu e500 board can be started in qemu and hence > tested if works without need a real HW. There is also documentation for > it, recently I sent a small doc patch. > > Seems that similar CI test like test/nokia_rx51_test.sh could be useful > here. Note that we run qemu-ppce500 as part of CI normally. What makes nokia_rx51 special is (a) the specific QEMU required and then (b) the Linux boot testing. qemu-ppce500 starts up and runs our pytests only. Any updates to doc/board/emulation/qemu-ppce500.rst with more useful information would of course be appreciated too. We configure how qemu is fired off here is https://source.denx.de/u-boot/u-boot-test-hooks/-/blob/master/bin/travis-ci/conf.qemu-ppce500_na and I suspect that how we fire up QEMU means that the issue you're noting isn't triggered since we don't boot it from flash but instead pass the binary. -- Tom signature.asc Description: PGP signature
Re: [PATCH v8 13/13] treewide: Disable USE_SPL_FIT_GENERATOR by default
On Thu, Dec 22, 2022 at 10:41:17AM -0700, Simon Glass wrote: > Hi Tom, > > On Wed, 21 Dec 2022 at 16:11, Tom Rini wrote: > > > > On Wed, Dec 21, 2022 at 04:07:26PM -0700, Simon Glass wrote: > > > This option is deprecated and only used by two boards. Enable it for just > > > those two boards, so others don't accidentally enable it. > > > > > > Signed-off-by: Simon Glass > > > > Wait, is this right? I thought when I had looked at this before the > > outliers were two imx boards, which I believe have now been converted. > > Is it really still in use on two xilinx platforms ? > > Yes I think the imx ones have gone away. > > For the penultimate commit: > > $ ./tools/moveconfig.py -f USE_SPL_FIT_GENERATOR > 2 matches > xilinx_zynqmp_virt avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0 > > So I believe this is still true. Enabled, yes, but is that subtool it sets actually used? xilinx_zynqmp_virt is in qemu CI even, so that can be quickly tested. I do wonder if the avnet board was enabling it because it was default and not using it. -- Tom signature.asc Description: PGP signature
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
On Thursday 22 December 2022 12:33:32 Tom Rini wrote: > I'm sorry you're frustrated here. I'm also frustrated here because the > #ifdef games that PowerPC used, in a number of places have been very > hard to un-wrap so that we can have something other than a home-grown > build system. I was already trying to reduce it too, some patches I sent, some other I was preparing and some other are part of turris 1.x platform, which is waiting there for 6 months. I planned to apply removal of MMC symbols to other P1/P2 boards, like it is in turris patch, but after turris patch is merged... which did not happen yet. > And I've tried to take your other feedback in to > consideration, which has resulted in a large number of symbols being > moved to CFG_... instead of Kconfig, as you're right, it wasn't the > right mechanism for them. > > So, is it really just the 3 platforms that use p1_p2_rdb.h that need > neither SDCARD nor SPIFLASH for the NAND and no extra suffix defconfigs? > Or is it the P1010RDB ones too? It applies for e500 v1/v2 cores, which is cpu/mpc85xx in u-boot and predates P3 platform. If there are not some suspicious symbol names then it should match any board which uses ARCH_MPC85??? or ARCH_P1?? or ARCH_P2020 symbol. P2040 and T do not have e500 v1/v2 cores (they have e500mc or e5500 or e6500), so you can ignore these. Is there any tool which can list all defconfig files which defines some of those symbols, including transitionally? It looks like that there are other boards just than P1010RDB which are affected. For example I see there: TARGET_SOCRATES TARGET_QEMU_PPCE500. Default boot source is FLASH and just few boards can have multiple boot source (which means that have multiple defconfig files with those suffixes). And obviously SD card boot source must not be enabled when (default) FLASH is used. Note that u-boot for qemu e500 board can be started in qemu and hence tested if works without need a real HW. There is also documentation for it, recently I sent a small doc patch. Seems that similar CI test like test/nokia_rx51_test.sh could be useful here.
Re: [PATCH] cmd: mmc: Expand bkops handling
Hi Marek,
On Wed, 21 Dec 2022 at 22:11, Marek Vasut wrote:
>
> Add more capable "bkops" command which allows enabling and disabling both
> manual and automatic bkops. The existing 'mmc bkops-enable' subcommand is
> poorly named to cover all the possibilities, hence the new-ish subcommand.
> Note that both commands are wrappers around the same common code.
>
> Signed-off-by: Marek Vasut
> ---
> Cc: Jaehoon Chung
> Cc: Peng Fan
> ---
> cmd/mmc.c | 49 +++
> drivers/mmc/mmc.c | 14 +-
> include/mmc.h | 2 +-
> 3 files changed, 51 insertions(+), 14 deletions(-)
Make a start on docs for this?
>
> diff --git a/cmd/mmc.c b/cmd/mmc.c
> index c79d9407986..94deb9a1686 100644
> --- a/cmd/mmc.c
> +++ b/cmd/mmc.c
> @@ -1020,16 +1020,12 @@ static int do_mmc_setdsr(struct cmd_tbl *cmdtp, int
> flag,
> }
>
> #ifdef CONFIG_CMD_BKOPS_ENABLE
> -static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag,
> - int argc, char *const argv[])
> +static int mmc_bkops_common(char *device, bool autobkops, bool enable)
> {
> - int dev;
> struct mmc *mmc;
> + int dev;
>
> - if (argc != 2)
> - return CMD_RET_USAGE;
> -
> - dev = dectoul(argv[1], NULL);
> + dev = dectoul(device, NULL);
>
> mmc = init_mmc_device(dev, false);
> if (!mmc)
> @@ -1040,7 +1036,41 @@ static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp,
> int flag,
> return CMD_RET_FAILURE;
> }
>
> - return mmc_set_bkops_enable(mmc);
> + return mmc_set_bkops_enable(mmc, autobkops, enable);
> +}
> +
> +static int do_mmc_bkops(struct cmd_tbl *cmdtp, int flag,
> + int argc, char * const argv[])
> +{
> + bool autobkops, enable;
> +
> + if (argc != 4)
> + return CMD_RET_USAGE;
> +
> + if (!strcmp(argv[2], "manual"))
> + autobkops = false;
> + else if (!strcmp(argv[2], "auto"))
> + autobkops = true;
> + else
> + return CMD_RET_FAILURE;
> +
> + if (!strcmp(argv[3], "disable"))
> + enable = false;
> + else if (!strcmp(argv[3], "enable"))
> + enable = true;
> + else
> + return CMD_RET_FAILURE;
You could just check the first letter, perhaps, to save code space?
> +
> + return mmc_bkops_common(argv[1], autobkops, enable);
> +}
> +
> +static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag,
> + int argc, char * const argv[])
> +{
> + if (argc != 2)
> + return CMD_RET_USAGE;
> +
> + return mmc_bkops_common(argv[1], false, true);
> }
> #endif
>
> @@ -1102,6 +1132,7 @@ static struct cmd_tbl cmd_mmc[] = {
> U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""),
> #ifdef CONFIG_CMD_BKOPS_ENABLE
> U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""),
> + U_BOOT_CMD_MKENT(bkops, 4, 0, do_mmc_bkops, "", ""),
> #endif
> };
>
> @@ -1188,6 +1219,8 @@ U_BOOT_CMD(
> #ifdef CONFIG_CMD_BKOPS_ENABLE
> "mmc bkops-enable - enable background operations handshake on
> device\n"
> " WARNING: This is a write-once setting.\n"
> + "mmc bkops [auto|manual] [enable|disable]\n"
> + " - configure background operations handshake on device\n"
> #endif
> );
>
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 210703ea46b..afbc497b12c 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -3127,9 +3127,10 @@ int mmc_init_device(int num)
> #endif
>
> #ifdef CONFIG_CMD_BKOPS_ENABLE
We shouldn't really need this #ifdef, since if it is not called it
won't be included in the binary.
> -int mmc_set_bkops_enable(struct mmc *mmc)
> +int mmc_set_bkops_enable(struct mmc *mmc, bool autobkops, bool enable)
> {
> int err;
> + u32 bit = autobkops ? BIT(1) : BIT(0);
> ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
>
> err = mmc_send_ext_csd(mmc, ext_csd);
> @@ -3143,18 +3144,21 @@ int mmc_set_bkops_enable(struct mmc *mmc)
> return -EMEDIUMTYPE;
> }
>
> - if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
> + if (enable && (ext_csd[EXT_CSD_BKOPS_EN] & bit)) {
> puts("Background operations already enabled\n");
> return 0;
> }
>
> - err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
> + err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN,
> +enable ? bit : 0);
> if (err) {
> - puts("Failed to enable manual background operations\n");
> + printf("Failed to %sable manual background operations\n",
> + enable ? "en" : "dis");
> return err;
> }
>
> - puts("Enabled manual background operations\n");
> + printf("%sabled %s background ope
Re: [PATCH 13/14] rockchip: Enable bootstage on rockpro64
Hi Pali,
On Wed, 21 Dec 2022 at 16:12, Pali Rohár wrote:
>
> On Wednesday 21 December 2022 16:08:27 Simon Glass wrote:
> > This board is useful for benchmarking overall U-Boot performance. Enable
> > the bootstage feature so we get a report.
> >
> > Since this returns to the boot rom before finishing executing
> > board_init_r() in SPL, add a few bootstage calls so that we can collect
> > timing from TPL.
> >
> > For the stash region, use a portion of SRAM, 64KB below the stack top.
> > This allows the TPL image to be up to nearly 120KB (it is typically about
> > 64KB). SPL normally runs from SDRAM at 0, so can use the same stash
> > region.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/arm/mach-rockchip/tpl.c | 18 +++---
> > common/spl/spl.c | 2 +-
> > configs/rockpro64-rk3399_defconfig | 8
> > 3 files changed, 24 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
> > index ed46a9ad286..2b7f852a28f 100644
> > --- a/arch/arm/mach-rockchip/tpl.c
> > +++ b/arch/arm/mach-rockchip/tpl.c
> > @@ -4,6 +4,7 @@
> > */
> >
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -70,15 +71,17 @@ void board_init_f(ulong dummy)
> > U_BOOT_TIME ")\n");
> > #endif
> > #endif
> > + /* Init secure timer */
> > + rockchip_stimer_init();
> > +
> > + puts("u_boot_first_phase(): ");
> > + printhex8(u_boot_first_phase());
> > ret = spl_early_init();
> > if (ret) {
> > debug("spl_early_init() failed: %d\n", ret);
> > hang();
> > }
> >
> > - /* Init secure timer */
> > - rockchip_stimer_init();
> > -
> > /* Init ARM arch timer */
> > if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
> > timer_init();
> > @@ -93,6 +96,15 @@ void board_init_f(ulong dummy)
> > int board_return_to_bootrom(struct spl_image_info *spl_image,
> > struct spl_boot_device *bootdev)
> > {
> > +#ifdef CONFIG_BOOTSTAGE_STASH
> > + int ret;
> > +
> > + bootstage_mark_name(BOOTSTAGE_ID_END_TPL, "end tpl");
> > + ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
> > + CONFIG_BOOTSTAGE_STASH_SIZE);
> > + if (ret)
> > + debug("Failed to stash bootstage: err=%d\n", ret);
> > +#endif
> > back_to_bootrom(BROM_BOOT_NEXTSTAGE);
> >
> > return 0;
> > diff --git a/common/spl/spl.c b/common/spl/spl.c
> > index 1d2e8fda728..71cded774b8 100644
> > --- a/common/spl/spl.c
> > +++ b/common/spl/spl.c
> > @@ -910,7 +910,7 @@ void preloader_console_init(void)
> > gd->have_console = 1;
> >
> > #if CONFIG_IS_ENABLED(BANNER_PRINT)
> > - puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "
> > + puts("\nxU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " -
> > "
>
> Why 'x'?
>
Oops, and there is another debugging bit added also.
Regards,
Simon
Re: [PATCH v2 2/4] doc/README.gpt: Fix typo 'a optionnal'
On Thu, 22 Dec 2022 at 07:25, Enric Balletbo i Serra wrote: > > Change the string 'a optionnal' to 'an optional'. among other things > > Signed-off-by: Enric Balletbo i Serra > --- > > (no changes since v1) > > doc/README.gpt | 2 +- > doc/usage/cmd/part.rst | 6 +++--- > 2 files changed, 4 insertions(+), 4 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH v2 1/4] doc: man-page for the part command
On Thu, 22 Dec 2022 at 07:25, Enric Balletbo i Serra wrote: > > Provide a man-page for the part command. > > Signed-off-by: Enric Balletbo i Serra > --- > > Changes in v2: > - New patch (1) in the series to fix a trivial type > - New patch (2) in the series to introduce the documentation of the >part type command > - Fix typo s/partittion/partition/ in commit message > - Add gpt test for the part type command > - Add the man-page for part command in doc/usage/cmd > > doc/usage/cmd/part.rst | 97 ++ > 1 file changed, 97 insertions(+) > create mode 100644 doc/usage/cmd/part.rst Reviewed-by: Simon Glass
Re: [PATCH v2 3/4] cmd: part: Add partition-related type command
On Thu, 22 Dec 2022 at 07:26, Enric Balletbo i Serra wrote: > > This implements the following command: > > part type mmc 0:1 > -> print partition type UUID > part type mmc 0:1 uuid > -> set environment variable to partition type UUID > > "part type" can be useful when writing a bootcmd which searches for a > specific partition type to enable automatic discovery of partitions and > their intended usage or mount point. > > Signed-off-by: Enric Balletbo i Serra > --- > > (no changes since v1) > > cmd/part.c | 29 + > doc/usage/cmd/part.rst | 12 > 2 files changed, 41 insertions(+) > Reviewed-by: Simon Glass
Re: [PATCH v5 00/19] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
On 12/22/22 18:32, eugen.hris...@microchip.com wrote: On 12/22/22 18:11, Marek Vasut wrote: On 12/22/22 16:54, sergiu.m...@microchip.com wrote: On 22.12.2022 15:36, Marek Vasut wrote: On 12/22/22 11:53, Sergiu Moga wrote: This series of patches is meant to add support for USB Mass Storage on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into Driver Model. In order for this to be achieved, the respective DT nodes have been added, the USB clock has been registered into CCF and the required defconfigs have been added to the boards' defconfig. What is more, in order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY drivers were required. Please split the series into more manageable parts -- architecture and DT bits, board, clock, usb . Hi, I am sorry but I believe that they are ordered correctly and they all should be part of this series as it ensures usb across all boards and most of them depend on each other. I think the order in which they have been sent makes the most sense: adding what is needed by sam9x60, followed by sama7g5, sama5d2 and finally enabling them all in the defconfigs. I am not sure that sending multiple series that are dependent on each other would make it easier. The USB patches go through USB tree, they seem independent from the rest of the config changes and DTs. Please send them separately. Hi Marek, All previous revisions were assigned to me in patchwork. The split can be done at patchwork level if you feel they should go through different trees I can continue picking them up through at91 if you are fine, as this was the patchwork assignment. Otherwise feel free to review and take the USB patches through the usb tree (and assign those to you in patchwork ), and I will handle the DT/configs , at91 part. I don't understand the opposition to splitting drivers and architecture core patches from one massive series.
Re: [PATCH v8 13/13] treewide: Disable USE_SPL_FIT_GENERATOR by default
Hi Tom, On Wed, 21 Dec 2022 at 16:11, Tom Rini wrote: > > On Wed, Dec 21, 2022 at 04:07:26PM -0700, Simon Glass wrote: > > This option is deprecated and only used by two boards. Enable it for just > > those two boards, so others don't accidentally enable it. > > > > Signed-off-by: Simon Glass > > Wait, is this right? I thought when I had looked at this before the > outliers were two imx boards, which I believe have now been converted. > Is it really still in use on two xilinx platforms ? Yes I think the imx ones have gone away. For the penultimate commit: $ ./tools/moveconfig.py -f USE_SPL_FIT_GENERATOR 2 matches xilinx_zynqmp_virt avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0 So I believe this is still true. Regards, Simon
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
Hi Pali, On Thu, 22 Dec 2022 at 10:13, Pali Rohár wrote: > > On Thursday 22 December 2022 09:29:27 Tom Rini wrote: > > On Thu, Dec 22, 2022 at 08:49:47AM +0100, Pali Rohár wrote: > > > On Wednesday 21 December 2022 21:54:15 Tom Rini wrote: > > > > On Fri, Dec 16, 2022 at 10:56:39PM +0100, Pali Rohár wrote: > > > > > On Friday 05 August 2022 16:21:24 Pali Rohár wrote: > > > > > > Broken is also commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2. > > > > > > Seems > > > > > > that all kconfig migration changes done after that commit are > > > > > > broken. > > > > > > > > > > > > I really do not have energy to investigate what and how was broken > > > > > > due > > > > > > to incorrect kconfig migration. > > > > > > > > > > > > > > > > > > I did simple test. Applied following change: > > > > > > > > > > > > diff --git a/include/configs/p1_p2_rdb_pc.h > > > > > > b/include/configs/p1_p2_rdb_pc.h > > > > > > index a6523753d5ca..489f24df0ab1 100644 > > > > > > --- a/include/configs/p1_p2_rdb_pc.h > > > > > > +++ b/include/configs/p1_p2_rdb_pc.h > > > > > > @@ -624,3 +624,7 @@ __stringify(__PCIE_RST_CMD)"\0" > > > > > > "bootm $norbootaddr - $norfdtaddr" > > > > > > > > > > > > #endif /* __CONFIG_H */ > > > > > > + > > > > > > +#ifdef CONFIG_SDCARD > > > > > > +#error > > > > > > +#endif > > > > > > > > > > > > And then called: > > > > > > > > > > > > make CROSS_COMPILE=powerpc-linux-gnuspe- P2020RDB-PC_defconfig > > > > > > u-boot.bin > > > > > > > > > > > > And it failed, even when this defconfig file is not SD card builds. > > > > > > > > > > Tom, that commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 is yours. > > > > > Could you please look at it? Because it is a regressions which made P1 > > > > > and P2 broken. Based on the past experience it really does not make > > > > > sense to wait for somebody who promised to do something as same > > > > > situation is just repeating. > > > > > > > > > > Above diff is a simple check to verify if code conversion is correct > > > > > or > > > > > not. If _before_ conversion CONFIG_SDCARD was not defined then also > > > > > _after_ conversion this macro must not be defined. Right? > > > > > > > > I dug through all of this again. I thought I understood what the right > > > > answer was again for a moment, but I don't. You, however, understand > > > > what platforms don't use PBL and what they use instead. I understand > > > > half of the fix, which is to change: > > > > choice > > > > prompt "Freescale PBL load location" > > > > depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || > > > > TARGET_P1010RDB_PB \ > > > > || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || > > > > TARGET_P2020RDB) \ > > > > && !CMD_NAND) > > > > > > > > To, I think: > > > > choice > > > > prompt "Freescale PBL load location" > > > > depends on RAMBOOT_PBL > > > > > > > > Then introduce some new, not "SDCARD" symbol, for the P1/P2 platforms > > > > that don't use PBL but instead the FSL_PREPBL_ESDHC_BOOT_SECTOR logic > > > > you introduced before. > > > > > > P2020RDB-PC_defconfig is for booting from FLASH NOR, not from SD card. > > > CONFIG_SDCARD for P1/P2 must be defined when booting from SD card. > > > > > > Before commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 everything worked > > > fine and CONFIG_SDCARD was not defined for P2020RDB-PC_defconfig. After > > > commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2, symbol CONFIG_SDCARD is > > > defined. > > > > > > You can check it by adding into config.h: > > > > > > +#ifdef CONFIG_SDCARD > > > +#error > > > +#endif > > > > > > > I say I almost thought I had it because I thought this would work: > > > > diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig > > > > b/arch/powerpc/cpu/mpc85xx/Kconfig > > > > index 24d3f1f20c25..59740b173b11 100644 > > > > --- a/arch/powerpc/cpu/mpc85xx/Kconfig > > > > +++ b/arch/powerpc/cpu/mpc85xx/Kconfig > > > > @@ -15,7 +15,7 @@ config CMD_ERRATA > > > > config FSL_PREPBL_ESDHC_BOOT_SECTOR > > > > bool "Generate QorIQ pre-PBL eSDHC boot sector" > > > > depends on MPC85xx > > > > - depends on SDCARD > > > > + depends on TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB > > > > > > No, original code was OK. As is written in description > > > FSL_PREPBL_ESDHC_BOOT_SECTOR is for writing bootsector to SD card. And > > > it is optional as there is other way how to generate it, as described in > > > some doc/ file. > > > > > > But if you choose to compile u-boot for P2020RDB-PC_defconfig (NOR > > > FLASH) then there is no SD card booting and hence > > > FSL_PREPBL_ESDHC_BOOT_SECTOR for P2020RDB-PC_defconfig must never be > > > generated. So FSL_PREPBL_ESDHC_BOOT_SECTOR must depends on SDCARD. > > > > > > > help > > > > With this option final image would have prepended QorIQ pre-PBL > > > > eSDHC > > > > boot sector suitable for SD card images. This boot sector instruct > > > > diff --git a/boot/Kconfig b/boot/Kconfig > > > > index 4a0
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
On Thu, Dec 22, 2022 at 06:13:06PM +0100, Pali Rohár wrote: > On Thursday 22 December 2022 09:29:27 Tom Rini wrote: > > On Thu, Dec 22, 2022 at 08:49:47AM +0100, Pali Rohár wrote: > > > On Wednesday 21 December 2022 21:54:15 Tom Rini wrote: > > > > On Fri, Dec 16, 2022 at 10:56:39PM +0100, Pali Rohár wrote: > > > > > On Friday 05 August 2022 16:21:24 Pali Rohár wrote: > > > > > > Broken is also commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2. > > > > > > Seems > > > > > > that all kconfig migration changes done after that commit are > > > > > > broken. > > > > > > > > > > > > I really do not have energy to investigate what and how was broken > > > > > > due > > > > > > to incorrect kconfig migration. > > > > > > > > > > > > > > > > > > I did simple test. Applied following change: > > > > > > > > > > > > diff --git a/include/configs/p1_p2_rdb_pc.h > > > > > > b/include/configs/p1_p2_rdb_pc.h > > > > > > index a6523753d5ca..489f24df0ab1 100644 > > > > > > --- a/include/configs/p1_p2_rdb_pc.h > > > > > > +++ b/include/configs/p1_p2_rdb_pc.h > > > > > > @@ -624,3 +624,7 @@ __stringify(__PCIE_RST_CMD)"\0" > > > > > > "bootm $norbootaddr - $norfdtaddr" > > > > > > > > > > > > #endif /* __CONFIG_H */ > > > > > > + > > > > > > +#ifdef CONFIG_SDCARD > > > > > > +#error > > > > > > +#endif > > > > > > > > > > > > And then called: > > > > > > > > > > > > make CROSS_COMPILE=powerpc-linux-gnuspe- P2020RDB-PC_defconfig > > > > > > u-boot.bin > > > > > > > > > > > > And it failed, even when this defconfig file is not SD card builds. > > > > > > > > > > Tom, that commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 is yours. > > > > > Could you please look at it? Because it is a regressions which made P1 > > > > > and P2 broken. Based on the past experience it really does not make > > > > > sense to wait for somebody who promised to do something as same > > > > > situation is just repeating. > > > > > > > > > > Above diff is a simple check to verify if code conversion is correct > > > > > or > > > > > not. If _before_ conversion CONFIG_SDCARD was not defined then also > > > > > _after_ conversion this macro must not be defined. Right? > > > > > > > > I dug through all of this again. I thought I understood what the right > > > > answer was again for a moment, but I don't. You, however, understand > > > > what platforms don't use PBL and what they use instead. I understand > > > > half of the fix, which is to change: > > > > choice > > > > prompt "Freescale PBL load location" > > > > depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || > > > > TARGET_P1010RDB_PB \ > > > > || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || > > > > TARGET_P2020RDB) \ > > > > && !CMD_NAND) > > > > > > > > To, I think: > > > > choice > > > > prompt "Freescale PBL load location" > > > > depends on RAMBOOT_PBL > > > > > > > > Then introduce some new, not "SDCARD" symbol, for the P1/P2 platforms > > > > that don't use PBL but instead the FSL_PREPBL_ESDHC_BOOT_SECTOR logic > > > > you introduced before. > > > > > > P2020RDB-PC_defconfig is for booting from FLASH NOR, not from SD card. > > > CONFIG_SDCARD for P1/P2 must be defined when booting from SD card. > > > > > > Before commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 everything worked > > > fine and CONFIG_SDCARD was not defined for P2020RDB-PC_defconfig. After > > > commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2, symbol CONFIG_SDCARD is > > > defined. > > > > > > You can check it by adding into config.h: > > > > > > +#ifdef CONFIG_SDCARD > > > +#error > > > +#endif > > > > > > > I say I almost thought I had it because I thought this would work: > > > > diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig > > > > b/arch/powerpc/cpu/mpc85xx/Kconfig > > > > index 24d3f1f20c25..59740b173b11 100644 > > > > --- a/arch/powerpc/cpu/mpc85xx/Kconfig > > > > +++ b/arch/powerpc/cpu/mpc85xx/Kconfig > > > > @@ -15,7 +15,7 @@ config CMD_ERRATA > > > > config FSL_PREPBL_ESDHC_BOOT_SECTOR > > > > bool "Generate QorIQ pre-PBL eSDHC boot sector" > > > > depends on MPC85xx > > > > - depends on SDCARD > > > > + depends on TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || > > > > TARGET_P2020RDB > > > > > > No, original code was OK. As is written in description > > > FSL_PREPBL_ESDHC_BOOT_SECTOR is for writing bootsector to SD card. And > > > it is optional as there is other way how to generate it, as described in > > > some doc/ file. > > > > > > But if you choose to compile u-boot for P2020RDB-PC_defconfig (NOR > > > FLASH) then there is no SD card booting and hence > > > FSL_PREPBL_ESDHC_BOOT_SECTOR for P2020RDB-PC_defconfig must never be > > > generated. So FSL_PREPBL_ESDHC_BOOT_SECTOR must depends on SDCARD. > > > > > > > help > > > > With this option final image would have prepended QorIQ > > > > pre-PBL eSDHC > > > > boot sector suitable for SD card images. This boot sector >
Re: [PATCH v5 00/19] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
On 12/22/22 18:11, Marek Vasut wrote: > On 12/22/22 16:54, sergiu.m...@microchip.com wrote: >> On 22.12.2022 15:36, Marek Vasut wrote: >>> On 12/22/22 11:53, Sergiu Moga wrote: This series of patches is meant to add support for USB Mass Storage on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into Driver Model. In order for this to be achieved, the respective DT nodes have been added, the USB clock has been registered into CCF and the required defconfigs have been added to the boards' defconfig. What is more, in order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY drivers were required. >>> >>> Please split the series into more manageable parts -- architecture and >>> DT bits, board, clock, usb . >> >> Hi, I am sorry but I believe that they are ordered correctly and they >> all should be part of this series as it ensures usb across all boards >> and most of them depend on each other. >> I think the order in which they have been sent makes the most sense: >> adding what is needed by sam9x60, followed by sama7g5, sama5d2 and >> finally enabling them all in the defconfigs. >> >> I am not sure that sending multiple series that are dependent on each >> other would make it easier. > > The USB patches go through USB tree, they seem independent from the rest > of the config changes and DTs. Please send them separately. Hi Marek, All previous revisions were assigned to me in patchwork. The split can be done at patchwork level if you feel they should go through different trees I can continue picking them up through at91 if you are fine, as this was the patchwork assignment. Otherwise feel free to review and take the USB patches through the usb tree (and assign those to you in patchwork ), and I will handle the DT/configs , at91 part. Eugen
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
On Thursday 22 December 2022 09:29:27 Tom Rini wrote: > On Thu, Dec 22, 2022 at 08:49:47AM +0100, Pali Rohár wrote: > > On Wednesday 21 December 2022 21:54:15 Tom Rini wrote: > > > On Fri, Dec 16, 2022 at 10:56:39PM +0100, Pali Rohár wrote: > > > > On Friday 05 August 2022 16:21:24 Pali Rohár wrote: > > > > > Broken is also commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2. Seems > > > > > that all kconfig migration changes done after that commit are broken. > > > > > > > > > > I really do not have energy to investigate what and how was broken due > > > > > to incorrect kconfig migration. > > > > > > > > > > > > > > > I did simple test. Applied following change: > > > > > > > > > > diff --git a/include/configs/p1_p2_rdb_pc.h > > > > > b/include/configs/p1_p2_rdb_pc.h > > > > > index a6523753d5ca..489f24df0ab1 100644 > > > > > --- a/include/configs/p1_p2_rdb_pc.h > > > > > +++ b/include/configs/p1_p2_rdb_pc.h > > > > > @@ -624,3 +624,7 @@ __stringify(__PCIE_RST_CMD)"\0" > > > > > "bootm $norbootaddr - $norfdtaddr" > > > > > > > > > > #endif /* __CONFIG_H */ > > > > > + > > > > > +#ifdef CONFIG_SDCARD > > > > > +#error > > > > > +#endif > > > > > > > > > > And then called: > > > > > > > > > > make CROSS_COMPILE=powerpc-linux-gnuspe- P2020RDB-PC_defconfig > > > > > u-boot.bin > > > > > > > > > > And it failed, even when this defconfig file is not SD card builds. > > > > > > > > Tom, that commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 is yours. > > > > Could you please look at it? Because it is a regressions which made P1 > > > > and P2 broken. Based on the past experience it really does not make > > > > sense to wait for somebody who promised to do something as same > > > > situation is just repeating. > > > > > > > > Above diff is a simple check to verify if code conversion is correct or > > > > not. If _before_ conversion CONFIG_SDCARD was not defined then also > > > > _after_ conversion this macro must not be defined. Right? > > > > > > I dug through all of this again. I thought I understood what the right > > > answer was again for a moment, but I don't. You, however, understand > > > what platforms don't use PBL and what they use instead. I understand > > > half of the fix, which is to change: > > > choice > > > prompt "Freescale PBL load location" > > > depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || > > > TARGET_P1010RDB_PB \ > > > || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || > > > TARGET_P2020RDB) \ > > > && !CMD_NAND) > > > > > > To, I think: > > > choice > > > prompt "Freescale PBL load location" > > > depends on RAMBOOT_PBL > > > > > > Then introduce some new, not "SDCARD" symbol, for the P1/P2 platforms > > > that don't use PBL but instead the FSL_PREPBL_ESDHC_BOOT_SECTOR logic > > > you introduced before. > > > > P2020RDB-PC_defconfig is for booting from FLASH NOR, not from SD card. > > CONFIG_SDCARD for P1/P2 must be defined when booting from SD card. > > > > Before commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 everything worked > > fine and CONFIG_SDCARD was not defined for P2020RDB-PC_defconfig. After > > commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2, symbol CONFIG_SDCARD is > > defined. > > > > You can check it by adding into config.h: > > > > +#ifdef CONFIG_SDCARD > > +#error > > +#endif > > > > > I say I almost thought I had it because I thought this would work: > > > diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig > > > b/arch/powerpc/cpu/mpc85xx/Kconfig > > > index 24d3f1f20c25..59740b173b11 100644 > > > --- a/arch/powerpc/cpu/mpc85xx/Kconfig > > > +++ b/arch/powerpc/cpu/mpc85xx/Kconfig > > > @@ -15,7 +15,7 @@ config CMD_ERRATA > > > config FSL_PREPBL_ESDHC_BOOT_SECTOR > > > bool "Generate QorIQ pre-PBL eSDHC boot sector" > > > depends on MPC85xx > > > - depends on SDCARD > > > + depends on TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB > > > > No, original code was OK. As is written in description > > FSL_PREPBL_ESDHC_BOOT_SECTOR is for writing bootsector to SD card. And > > it is optional as there is other way how to generate it, as described in > > some doc/ file. > > > > But if you choose to compile u-boot for P2020RDB-PC_defconfig (NOR > > FLASH) then there is no SD card booting and hence > > FSL_PREPBL_ESDHC_BOOT_SECTOR for P2020RDB-PC_defconfig must never be > > generated. So FSL_PREPBL_ESDHC_BOOT_SECTOR must depends on SDCARD. > > > > > help > > > With this option final image would have prepended QorIQ pre-PBL eSDHC > > > boot sector suitable for SD card images. This boot sector instruct > > > diff --git a/boot/Kconfig b/boot/Kconfig > > > index 4a001bcee851..d1c9c5f25067 100644 > > > --- a/boot/Kconfig > > > +++ b/boot/Kconfig > > > @@ -725,8 +725,7 @@ config RAMBOOT_PBL > > > > > > choice > > > prompt "Freescale PBL load location" > > > - depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \ > > > - || TARGET_P1020RDB_PC || T
Re: [PATCH v5 00/19] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
On 12/22/22 16:54, sergiu.m...@microchip.com wrote: On 22.12.2022 15:36, Marek Vasut wrote: On 12/22/22 11:53, Sergiu Moga wrote: This series of patches is meant to add support for USB Mass Storage on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into Driver Model. In order for this to be achieved, the respective DT nodes have been added, the USB clock has been registered into CCF and the required defconfigs have been added to the boards' defconfig. What is more, in order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY drivers were required. Please split the series into more manageable parts -- architecture and DT bits, board, clock, usb . Hi, I am sorry but I believe that they are ordered correctly and they all should be part of this series as it ensures usb across all boards and most of them depend on each other. I think the order in which they have been sent makes the most sense: adding what is needed by sam9x60, followed by sama7g5, sama5d2 and finally enabling them all in the defconfigs. I am not sure that sending multiple series that are dependent on each other would make it easier. The USB patches go through USB tree, they seem independent from the rest of the config changes and DTs. Please send them separately.
Re: [PATCH v5 00/19] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
On 22.12.2022 15:36, Marek Vasut wrote: > On 12/22/22 11:53, Sergiu Moga wrote: >> This series of patches is meant to add support for USB Mass Storage >> on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into >> Driver Model. In order for this to be achieved, the respective >> DT nodes have been added, the USB clock has been registered into CCF >> and the required defconfigs have been added to the boards' defconfig. >> What is more, in order for the VBUS to stay enabled, a `child_pre_probe` >> method has been added to overcome the DM core disabling it in >> `usb_scan_device`: when the generic `device_probe` method is called, >> the pinctrl is processed once again, undoing whatever changes have >> been made in our driver's probe method. >> In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY >> drivers were required. > > Please split the series into more manageable parts -- architecture and > DT bits, board, clock, usb . Hi, I am sorry but I believe that they are ordered correctly and they all should be part of this series as it ensures usb across all boards and most of them depend on each other. I think the order in which they have been sent makes the most sense: adding what is needed by sam9x60, followed by sama7g5, sama5d2 and finally enabling them all in the defconfigs. I am not sure that sending multiple series that are dependent on each other would make it easier.
Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary
On Fri, Dec 16, 2022 at 01:13:07AM +0100, Pali Rohár wrote: > On Thursday 15 December 2022 06:24:16 Simon Glass wrote: > > Hi Eugen, > > > > On Thu, 15 Dec 2022 at 03:58, Eugen Hristev > > wrote: > > > > > > Newer DTC require that the DTB start address is aligned at 8 bytes. > > > In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the > > > DTB, but there is no alignment/padding to the next 8byte aligned address. > > > This causes the board to fail booting, because the FDT will claim > > > that the DTB inside u-boot.bin is not a valid DTB, it will fail with > > > -FDT_ERR_ALIGNMENT. > > > To solve this, have the u-boot binary `_end` aligned with 8 bytes. > > > The objcopy in the Makefile will create the u-boot-nodtb.bin and it has to > > > be truncated to 8 bytes to correspond to the u-boot.map file which will > > > have the `_end` aligned to 8 bytes. > > > The lds files which use devicetrees have been changed to align the `_end` > > > tag with 8 bytes. > > > > > > This patch is also a prerequisite to have the possibility to update the > > > dtc inside u-boot to newer versions (1.6.1+) > > > > > > Signed-off-by: Eugen Hristev > > > --- > > > Hi, > > > > > > I could not test all affected boards, it's an impossible task. > > > I tried this on at91 boards which I have, and ran the CI on denx. > > > I cannot guarantee that no other boards are affected, so this patch is a > > > bit > > > of an RFC. > > > If the u-boot-nodtb.bin does not have the size equal with the > > > corresponding > > > one in u-boot.map, the binary_size_check will fail at build time with > > > something like this: > > > > > > u-boot.map shows a binary size of 502684 > > > but u-boot-nodtb.bin shows 502688 > > > > > > Thanks, > > > Eugen > > > > > > Makefile| 2 ++ > > > arch/arm/cpu/armv8/u-boot.lds | 4 ++-- > > > arch/arm/cpu/u-boot-spl.lds | 1 + > > > arch/arm/cpu/u-boot.lds | 1 + > > > arch/arm/lib/elf_arm_efi.lds| 5 + > > > arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +- > > > arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +- > > > arch/arm/mach-zynq/u-boot-spl.lds | 2 +- > > > arch/mips/cpu/u-boot.lds| 2 +- > > > arch/sandbox/cpu/u-boot.lds | 6 ++ > > > arch/sh/cpu/u-boot.lds | 2 ++ > > > board/ti/am335x/u-boot.lds | 1 + > > > tools/binman/test/u_boot_binman_embed.lds | 2 +- > > > 13 files changed, 25 insertions(+), 7 deletions(-) > > > > > > diff --git a/Makefile b/Makefile > > > index 9d84f96481..b4d387bcce 100644 > > > --- a/Makefile > > > +++ b/Makefile > > > @@ -1317,6 +1317,8 @@ endif > > > > > > u-boot-nodtb.bin: u-boot FORCE > > > $(call if_changed,objcopy_uboot) > > > +# Make sure the size is 8 byte-aligned. > > > + @truncate -s %8 $@ > > > $(BOARD_SIZE_CHECK) > > > > I agree this line is needed, since otherwise we will only get 4-byte > > alignment. > > Hello! I do not fully agree that this line is needed. > > The whole issue is about DTB binary and its offset. So code/Makefile > which construct u-boot.bin should be fixed and not u-boot-nodtb.bin. We should indeed not force u-boot-nodtb.bin itself to be an 8 byte aligned size, yes. > > But it would be better if we could have the linker scripts > > fill bytes out to the required alignment. Is that possible? > > I already investigated this. LD linker and objcopy (at least older > version in Debian 10) drops trailing zero bytes in raw binary output. > > You can specify zero bytes in the linker script and they are filled in > ELF or COFF output. But not in raw binary, which u-boot.bin is. > > So it could be possible to extract "correct" size from ELF binary and > call truncate on raw binary generated from objcopy. > > > > I already hit this trailing-zeros issue for powerpc and I fixed it in: > 7696b80ec5e9 powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPL > b898f6a6db76 powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting > e8c0e0064c8a powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support > > All those commits re-align output to just 4 bytes, not more. This however needs a follow-up. By spec, device tree binaries must start at an 8 byte aligned address, not 4. Yes, 4 is clearly functional in this case, but when we update to a newer libdtc that finally enforces this check we'll have a problem. -- Tom signature.asc Description: PGP signature
Re: [PATCH v8 06/13] binman: Support new op-tee binary format
On 12/22/22 00:07, Simon Glass wrote:
> OP-TEE has a format with a binary header that can be used instead of the
> ELF file. With newer versions of OP-TEE this may be required on some
> platforms.
>
> Add support for this in binman. First, add a method to obtain the ELF
> sections from an entry, then use that in the FIT support. We then end up
> with the ability to support both types of OP-TEE files, depending on which
> one is passed in with the entry argument (TEE=xxx in the U-Boot build).
So, with:
BL31=/path/to/bl31.elf TEE=/path/to/tee.bin make -C u-boot \
CROSS_COMPILE=aarch64-linux-gnu- CC=aarch64-linux-gnu-gcc \
HOSTCC=gcc BINMAN_DEBUG=1 BINMAN_VERBOSE=4
...I get:
Entry '/binman/simple-bin/fit/images/@tee-SEQ/tee-os' marked absent: uses v1
format which must be in a FIT
More complete log at https://pastebin.com/UZzZeicQ
Thanks,
--
Jerome
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v7)
>
> Changes in v7:
> - Correct missing test coverage
>
> Changes in v6:
> - Update op-tee to support new v1 binary header
>
> tools/binman/entries.rst | 35 -
> tools/binman/entry.py| 13 +++
> tools/binman/etype/fit.py| 69 +---
> tools/binman/etype/section.py| 9 +++
> tools/binman/etype/tee_os.py | 68 +++-
> tools/binman/ftest.py| 83
> tools/binman/test/263_tee_os_opt.dts | 22 ++
> tools/binman/test/264_tee_os_opt_fit.dts | 33
> tools/binman/test/265_tee_os_opt_fit_bad.dts | 40 ++
> 9 files changed, 340 insertions(+), 32 deletions(-)
> create mode 100644 tools/binman/test/263_tee_os_opt.dts
> create mode 100644 tools/binman/test/264_tee_os_opt_fit.dts
> create mode 100644 tools/binman/test/265_tee_os_opt_fit_bad.dts
>
> diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
> index b2ce7960d3b..a3e4493a44f 100644
> --- a/tools/binman/entries.rst
> +++ b/tools/binman/entries.rst
> @@ -1508,12 +1508,45 @@ Entry: tee-os: Entry containing an OP-TEE Trusted OS
> (TEE) blob
>
> Properties / Entry arguments:
> - tee-os-path: Filename of file to read into entry. This is typically
> -called tee-pager.bin
> +called tee.bin or tee.elf
>
> This entry holds the run-time firmware, typically started by U-Boot SPL.
> See the U-Boot README for your architecture or board for how to use it. See
> https://github.com/OP-TEE/optee_os for more information about OP-TEE.
>
> +Note that if the file is in ELF format, it must go in a FIT. In that case,
> +this entry will mark itself as absent, providing the data only through the
> +read_elf_segments() method.
> +
> +Marking this entry as absent means that it if is used in the wrong context
> +it can be automatically dropped. Thus it is possible to add anb OP-TEE entry
> +like this::
> +
> +binman {
> +tee-os {
> +};
> +};
> +
> +and pass either an ELF or plain binary in with -a tee-os-path
> +and have binman do the right thing:
> +
> + - include the entry if tee.bin is provided and it doesn't have the v1
> + header
> + - drop it otherwise
> +
> +When used within a FIT, we can do::
> +
> +binman {
> +fit {
> +tee-os {
> +};
> +};
> +};
> +
> +which will split the ELF into separate nodes for each segment, if an ELF
> +file is provide (see Flat Image Tree / FIT), or produce a single node if
> +the binary v1 format is provided.
> +
>
>
> .. _etype_text:
> diff --git a/tools/binman/entry.py b/tools/binman/entry.py
> index 637aece3705..de51d295891 100644
> --- a/tools/binman/entry.py
> +++ b/tools/binman/entry.py
> @@ -1290,3 +1290,16 @@ features to produce new behaviours.
> def mark_absent(self, msg):
> tout.info("Entry '%s' marked absent: %s" % (self._node.path, msg))
> self.absent = True
> +
> +def read_elf_segments(self):
> +"""Read segments from an entry that can generate an ELF file
> +
> +Returns:
> +tuple:
> +list of segments, each:
> +int: Segment number (0 = first)
> +int: Start address of segment in memory
> +bytes: Contents of segment
> +int: entry address of ELF file
> +"""
> +return None
> diff --git a/tools/binman/etype/fit.py b/tools/binman/etype/fit.py
> index 8ad4f3a8a83..21c769a1cbe 100644
> --- a/tools/binman/etype/fit.py
> +++ b/tools/binman/etype/fit.py
> @@ -540,41 +540,34 @@ class Entry_fit(Entry_section):
> else:
> self.Raise("Generator node requires 'fit,fdt-list'
> property")
>
> -def _gen_split_elf(base_node, node, elf_data, missing):
> +def _gen_split_elf(base_node, node, segments, entry_addr):
> """Add nodes for the ELF file, one per group of contiguous
> se
Re: [PATCH 01/41] usb: Update USB_STORAGE dependencies
On Fri, Dec 02, 2022 at 04:42:11PM -0500, Tom Rini wrote: > As it's no longer possible to have !DM_USB set, we can remove these > dependencies. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass For the series, applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v7 06/12] binman: Support new op-tee binary format
On 12/22/22 00:38, Simon Glass wrote: > Hi Jerome, > > On Wed, 21 Dec 2022 at 07:39, Jerome Forissier > wrote: >> >> Hi Simon, >> >> On 12/17/22 22:28, Simon Glass wrote: >>> OP-TEE has a format with a binary header that can be used instead of the >>> ELF file. With newer versions of OP-TEE this may be required on some >>> platforms. >>> >>> Add support for this in binman. First, add a method to obtain the ELF >>> sections from an entry, then use that in the FIT support. We then end up >>> with the ability to support both types of OP-TEE files, depending on which >>> one is passed in with the entry argument (TEE=xxx in the U-Boot build). >>> >>> Signed-off-by: Simon Glass >>> --- >>> >>> Changes in v7: >>> - Correct missing test coverage >>> >>> Changes in v6: >>> - Update op-tee to support new v1 binary header >> >> Thanks for the update. I'm trying to test this. How am I supposed to >> pass the BL31 and TEE binaries? Currently I build u-boot with: >> >> BL31=/path/to/bl31.elf TEE=/path/to/tee.bin make -C u-boot >> CROSS_COMPILE=aarch64-linux-gnu- CC=aarch64-linux-gnu-gcc HOSTCC=gcc >> >> I applied the series onto the 'next' branch and built as usual but the board >> failed to boot so I suspect I am missing something. > > Thanks for testing. > > I seem to be missing setting the U-Boot load address. Also TEE is > supposed to be optional, I believe. > > I pushed an updated series to u-boot-dm/fit-working so could you try > that (v8)? Also could you please include your board and console output > if/when it fails? OK, I will reply in the v8 thread to avoid ambiguities. Thanks, -- Jerome
Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2
On Thu, Dec 22, 2022 at 08:49:47AM +0100, Pali Rohár wrote: > On Wednesday 21 December 2022 21:54:15 Tom Rini wrote: > > On Fri, Dec 16, 2022 at 10:56:39PM +0100, Pali Rohár wrote: > > > On Friday 05 August 2022 16:21:24 Pali Rohár wrote: > > > > Broken is also commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2. Seems > > > > that all kconfig migration changes done after that commit are broken. > > > > > > > > I really do not have energy to investigate what and how was broken due > > > > to incorrect kconfig migration. > > > > > > > > > > > > I did simple test. Applied following change: > > > > > > > > diff --git a/include/configs/p1_p2_rdb_pc.h > > > > b/include/configs/p1_p2_rdb_pc.h > > > > index a6523753d5ca..489f24df0ab1 100644 > > > > --- a/include/configs/p1_p2_rdb_pc.h > > > > +++ b/include/configs/p1_p2_rdb_pc.h > > > > @@ -624,3 +624,7 @@ __stringify(__PCIE_RST_CMD)"\0" > > > > "bootm $norbootaddr - $norfdtaddr" > > > > > > > > #endif /* __CONFIG_H */ > > > > + > > > > +#ifdef CONFIG_SDCARD > > > > +#error > > > > +#endif > > > > > > > > And then called: > > > > > > > > make CROSS_COMPILE=powerpc-linux-gnuspe- P2020RDB-PC_defconfig > > > > u-boot.bin > > > > > > > > And it failed, even when this defconfig file is not SD card builds. > > > > > > Tom, that commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 is yours. > > > Could you please look at it? Because it is a regressions which made P1 > > > and P2 broken. Based on the past experience it really does not make > > > sense to wait for somebody who promised to do something as same > > > situation is just repeating. > > > > > > Above diff is a simple check to verify if code conversion is correct or > > > not. If _before_ conversion CONFIG_SDCARD was not defined then also > > > _after_ conversion this macro must not be defined. Right? > > > > I dug through all of this again. I thought I understood what the right > > answer was again for a moment, but I don't. You, however, understand > > what platforms don't use PBL and what they use instead. I understand > > half of the fix, which is to change: > > choice > > prompt "Freescale PBL load location" > > depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || > > TARGET_P1010RDB_PB \ > > || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || > > TARGET_P2020RDB) \ > > && !CMD_NAND) > > > > To, I think: > > choice > > prompt "Freescale PBL load location" > > depends on RAMBOOT_PBL > > > > Then introduce some new, not "SDCARD" symbol, for the P1/P2 platforms > > that don't use PBL but instead the FSL_PREPBL_ESDHC_BOOT_SECTOR logic > > you introduced before. > > P2020RDB-PC_defconfig is for booting from FLASH NOR, not from SD card. > CONFIG_SDCARD for P1/P2 must be defined when booting from SD card. > > Before commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 everything worked > fine and CONFIG_SDCARD was not defined for P2020RDB-PC_defconfig. After > commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2, symbol CONFIG_SDCARD is > defined. > > You can check it by adding into config.h: > > +#ifdef CONFIG_SDCARD > +#error > +#endif > > > I say I almost thought I had it because I thought this would work: > > diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig > > b/arch/powerpc/cpu/mpc85xx/Kconfig > > index 24d3f1f20c25..59740b173b11 100644 > > --- a/arch/powerpc/cpu/mpc85xx/Kconfig > > +++ b/arch/powerpc/cpu/mpc85xx/Kconfig > > @@ -15,7 +15,7 @@ config CMD_ERRATA > > config FSL_PREPBL_ESDHC_BOOT_SECTOR > > bool "Generate QorIQ pre-PBL eSDHC boot sector" > > depends on MPC85xx > > - depends on SDCARD > > + depends on TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB > > No, original code was OK. As is written in description > FSL_PREPBL_ESDHC_BOOT_SECTOR is for writing bootsector to SD card. And > it is optional as there is other way how to generate it, as described in > some doc/ file. > > But if you choose to compile u-boot for P2020RDB-PC_defconfig (NOR > FLASH) then there is no SD card booting and hence > FSL_PREPBL_ESDHC_BOOT_SECTOR for P2020RDB-PC_defconfig must never be > generated. So FSL_PREPBL_ESDHC_BOOT_SECTOR must depends on SDCARD. > > > help > > With this option final image would have prepended QorIQ pre-PBL eSDHC > > boot sector suitable for SD card images. This boot sector instruct > > diff --git a/boot/Kconfig b/boot/Kconfig > > index 4a001bcee851..d1c9c5f25067 100644 > > --- a/boot/Kconfig > > +++ b/boot/Kconfig > > @@ -725,8 +725,7 @@ config RAMBOOT_PBL > > > > choice > > prompt "Freescale PBL load location" > > - depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \ > > - || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) > > \ > > + depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB) \ > > && !CMD_NAND) > > > > config SDCARD > > > > But no one enables CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR. > > It is optional
[PATCH v2 4/4] test/py: gpt: add test for the gpt partition type GUID identifier
Add sandbox test for the gpt partition type command, the test uses the
persistent data test_gpt_disk_image.bin to check that the first
partition type GUID that identifies the type of the partition has the
"Linux filesystem data" type ( 0FC63DAF-8483-4772-8E79-3D69D8477DE4 ).
Signed-off-by: Enric Balletbo i Serra
---
(no changes since v1)
test/py/tests/test_gpt.py | 23 +++
1 file changed, 23 insertions(+)
diff --git a/test/py/tests/test_gpt.py b/test/py/tests/test_gpt.py
index cb44e1d789..73bfbf77a2 100644
--- a/test/py/tests/test_gpt.py
+++ b/test/py/tests/test_gpt.py
@@ -134,6 +134,29 @@ def test_gpt_save_guid(state_disk_image, u_boot_console):
output = u_boot_console.run_command('printenv newguid')
assert '375a56f7-d6c9-4e81-b5f0-09d41ca89efe' in output
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('cmd_gpt')
+@pytest.mark.requiredtool('sgdisk')
+def test_gpt_part_type_uuid(state_disk_image, u_boot_console):
+"""Test the gpt partittion type UUID command."""
+
+u_boot_console.run_command('host bind 0 ' + state_disk_image.path)
+output = u_boot_console.run_command('part type host 0:1')
+assert '0fc63daf-8483-4772-8e79-3d69d8477de4' in output
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('cmd_gpt')
+@pytest.mark.requiredtool('sgdisk')
+def test_gpt_part_type_save_uuid(state_disk_image, u_boot_console):
+"""Test the gpt partittion type to save UUID into a string."""
+
+if u_boot_console.config.buildconfig.get('config_cmd_gpt', 'n') != 'y':
+pytest.skip('gpt command not supported')
+u_boot_console.run_command('host bind 0 ' + state_disk_image.path)
+output = u_boot_console.run_command('part type host 0:1 newguid')
+output = u_boot_console.run_command('printenv newguid')
+assert '0fc63daf-8483-4772-8e79-3d69d8477de4' in output
+
@pytest.mark.boardspec('sandbox')
@pytest.mark.buildconfigspec('cmd_gpt')
@pytest.mark.buildconfigspec('cmd_gpt_rename')
--
2.38.1
[PATCH v2 3/4] cmd: part: Add partition-related type command
This implements the following command:
part type mmc 0:1
-> print partition type UUID
part type mmc 0:1 uuid
-> set environment variable to partition type UUID
"part type" can be useful when writing a bootcmd which searches for a
specific partition type to enable automatic discovery of partitions and
their intended usage or mount point.
Signed-off-by: Enric Balletbo i Serra
---
(no changes since v1)
cmd/part.c | 29 +
doc/usage/cmd/part.rst | 12
2 files changed, 41 insertions(+)
diff --git a/cmd/part.c b/cmd/part.c
index 9d419c967c..26b0cc84fe 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -182,6 +182,29 @@ static int do_part_number(int argc, char *const argv[])
return do_part_info(argc, argv, CMD_PART_INFO_NUMBER);
}
+static int do_part_type(int argc, char *const argv[])
+{
+ int part;
+ struct blk_desc *dev_desc;
+ struct disk_partition info;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+ if (argc > 3)
+ return CMD_RET_USAGE;
+
+ part = blk_get_device_part_str(argv[0], argv[1], &dev_desc, &info, 0);
+ if (part < 0)
+ return 1;
+
+ if (argc > 2)
+ env_set(argv[2], info.type_guid);
+ else
+ printf("%s\n", info.type_guid);
+
+ return 0;
+}
+
static int do_part_types(int argc, char * const argv[])
{
struct part_driver *drv = ll_entry_start(struct part_driver,
@@ -218,6 +241,8 @@ static int do_part(struct cmd_tbl *cmdtp, int flag, int
argc,
return do_part_size(argc - 2, argv + 2);
else if (!strcmp(argv[1], "number"))
return do_part_number(argc - 2, argv + 2);
+ else if (!strcmp(argv[1], "type"))
+ return do_part_type(argc - 2, argv + 2);
else if (!strcmp(argv[1], "types"))
return do_part_types(argc - 2, argv + 2);
return CMD_RET_USAGE;
@@ -244,6 +269,10 @@ U_BOOT_CMD(
"part number\n"
"- set environment variable to the partition number using the
partition name\n"
" part must be specified as partition name\n"
+ "part type :\n"
+ "- print partition type\n"
+ "part type : \n"
+ "- set environment variable to partition type\n"
"part types\n"
"- list supported partition table types"
);
diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst
index 0d098c7e3f..85cca0f0c7 100644
--- a/doc/usage/cmd/part.rst
+++ b/doc/usage/cmd/part.rst
@@ -13,6 +13,7 @@ Synopis
part start
part size
part number
+part type : [varname]
part types
Description
@@ -81,6 +82,17 @@ part must be specified as partition name.
varname
a variable to store the current partition number value into
+The 'part type' command prints or sets an environment variable to the
partition type UUID.
+
+interface
+interface for accessing the block device (mmc, sata, scsi, usb, )
+dev
+device number
+part
+partition number
+varname
+a variable to store the current partition type UUID value into
+
The 'part types' command list supported partition table types.
Example
--
2.38.1
[PATCH v2 2/4] doc/README.gpt: Fix typo 'a optionnal'
Change the string 'a optionnal' to 'an optional'. Signed-off-by: Enric Balletbo i Serra --- (no changes since v1) doc/README.gpt | 2 +- doc/usage/cmd/part.rst | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/doc/README.gpt b/doc/README.gpt index 91e397d06f..cc2a1b7ac7 100644 --- a/doc/README.gpt +++ b/doc/README.gpt @@ -260,7 +260,7 @@ Partition type GUID: For created partition, the used partition type GUID is PARTITION_BASIC_DATA_GUID (EBD0A0A2-B9E5-4433-87C0-68B6B72699C7). -If you define 'CONFIG_PARTITION_TYPE_GUID', a optionnal parameter 'type' +If you define 'CONFIG_PARTITION_TYPE_GUID', an optional parameter 'type' can specify a other partition type guid: "uuid_disk=...;name=u-boot,size=60MiB,uuid=...; diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst index be931e520f..0d098c7e3f 100644 --- a/doc/usage/cmd/part.rst +++ b/doc/usage/cmd/part.rst @@ -45,7 +45,7 @@ The 'part list' command prints or sets an environment variable to the list of pa varname an optional environment variable to store the list of partitions value into. -The 'part start' sets an environment variable to the start of the partition (in blocks), +The 'part start' commnad sets an environment variable to the start of the partition (in blocks), part can be either partition number or partition name. interface @@ -57,7 +57,7 @@ part can be either partition number or partition name. varname a variable to store the current start of the partition value into. -The 'part size' sets an environment variable to the size of the partition (in blocks), +The 'part size' command sets an environment variable to the size of the partition (in blocks), part can be either partition number or partition name. interface @@ -69,7 +69,7 @@ part can be either partition number or partition name. varname a variable to store the current size of the partition value into. -The 'part number' sets an environment variable to the partition number using the partition name, +The 'part number' command sets an environment variable to the partition number using the partition name, part must be specified as partition name. interface -- 2.38.1
[PATCH v2 1/4] doc: man-page for the part command
Provide a man-page for the part command. Signed-off-by: Enric Balletbo i Serra --- Changes in v2: - New patch (1) in the series to fix a trivial type - New patch (2) in the series to introduce the documentation of the part type command - Fix typo s/partittion/partition/ in commit message - Add gpt test for the part type command - Add the man-page for part command in doc/usage/cmd doc/usage/cmd/part.rst | 97 ++ 1 file changed, 97 insertions(+) create mode 100644 doc/usage/cmd/part.rst diff --git a/doc/usage/cmd/part.rst b/doc/usage/cmd/part.rst new file mode 100644 index 00..be931e520f --- /dev/null +++ b/doc/usage/cmd/part.rst @@ -0,0 +1,97 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +part command +=== + +Synopis +--- + +:: + +part uuid : [varname] +part list [flags] [varname] +part start +part size +part number +part types + +Description +--- + +The `part` command is used to manage disk partition related commands. + +The 'part uuid' command prints or sets an environment variable to partition UUID + +interface +interface for accessing the block device (mmc, sata, scsi, usb, ) +dev +device number +part +partition number +varname +an optional environment variable to store the current partition UUID value into. + +The 'part list' command prints or sets an environment variable to the list of partitions + +interface +interface for accessing the block device (mmc, sata, scsi, usb, ) +dev +device number +part +partition number +flags +-bootable +lists only bootable partitions +varname +an optional environment variable to store the list of partitions value into. + +The 'part start' sets an environment variable to the start of the partition (in blocks), +part can be either partition number or partition name. + +interface +interface for accessing the block device (mmc, sata, scsi, usb, ) +dev +device number +part +partition number +varname +a variable to store the current start of the partition value into. + +The 'part size' sets an environment variable to the size of the partition (in blocks), +part can be either partition number or partition name. + +interface +interface for accessing the block device (mmc, sata, scsi, usb, ) +dev +device number +part +partition number +varname +a variable to store the current size of the partition value into. + +The 'part number' sets an environment variable to the partition number using the partition name, +part must be specified as partition name. + +interface +interface for accessing the block device (mmc, sata, scsi, usb, ) +dev +device number +part +partition number +varname +a variable to store the current partition number value into + +The 'part types' command list supported partition table types. + +Example +--- + +This example shows listing supported partition types:: + + U-Boot> part types + Supported partition tables: EFI, AMIGA, DOS, ISO, MAC + +Return value + + +The return value $? is always 0 (true). -- 2.38.1
[PATCH v2 0/4] cmd: part: Add partition-related type command
This series are a consequence on the discussion of the patch [1]. It introduces some new patches in order to address the feedback received, adds the documentation and fixes a small typo found during the work on these patches. Best regards, Enric [1] https://patchwork.ozlabs.org/project/uboot/patch/20220727133534.126824-1-eballe...@redhat.com/ Changes in v2: - New patch (1) in the series to fix a trivial type - New patch (2) in the series to introduce the documentation of the part type command - Fix typo s/partittion/partition/ in commit message - Add gpt test for the part type command - Add the man-page for part command in doc/usage/cmd Enric Balletbo i Serra (4): doc: man-page for the part command doc/README.gpt: Fix typo 'a optionnal' cmd: part: Add partition-related type command test/py: gpt: add test for the gpt partition type GUID identifier cmd/part.c| 29 ++ doc/README.gpt| 2 +- doc/usage/cmd/part.rst| 109 ++ test/py/tests/test_gpt.py | 23 4 files changed, 162 insertions(+), 1 deletion(-) create mode 100644 doc/usage/cmd/part.rst -- 2.38.1
Voltage ID (VID) Programming for PMBus Devices
Hello,
I am referring to the set_voltage_to_pmbus function for PMBus controller target
voltage programming
based on voltage ID values in board/freescale/common/vid.c.
When looking at the schematics of the LX2160A reference design board, which
applies
the LTC3882 controller, then the LTC3882 is wired /configured for single output
operation.
Hence the output voltage of both PWM channels should be updated during the
process of VID programming.
Furthermore I think the over- / undervoltage fault and warning limits and the
high and low
margin limits of the LTC3882 should be updated as well based on the target
output voltage.
Otherwise depending on the amount of output voltage change a over- /
undervoltage fault might be triggered.
Attached is a proposal for modified PMBbus controller target voltage
programming in vid.c.
Regards,
Thomas
/* Write to the VOUT or one of the VOUT limit / margin registers */
static int set_vxx_reg_to_pmbus(DEVICE_HANDLE_T dev, u8 cmd, u16 value)
{
int ret;
/* The data to be sent with the PMBus command PAGE_PLUS_WRITE */
u8 buffer[5] = { 0x04, PWM_CHANNEL_ALL, cmd, 0, 0 };
buffer[3] = value & 0xFF;
buffer[4] = (value & 0xFF00) >> 8;
/* Write the desired voltage code to the regulator */
ret = I2C_WRITE(dev, PMBUS_CMD_PAGE_PLUS_WRITE, (void *)&buffer[0],
sizeof(buffer));
if (ret) {
printf("VID: I2C failed to write to the voltage regulator\n");
return -1;
}
return 0;
}
/* VOUT high margin definition */
static int set_vout_margin_high(DEVICE_HANDLE_T dev, u16 value)
{
return set_vxx_reg_to_pmbus(dev, PMBUS_CMD_VOUT_MARGIN_HIGH, value);
}
/* VOUT low margin definition */
static int set_vout_margin_low(DEVICE_HANDLE_T dev, u16 value)
{
return set_vxx_reg_to_pmbus(dev, PMBUS_CMD_VOUT_MARGIN_LOW, value);
}
/* Over-voltage fault limit definition */
static int set_vout_ov_fault_limit(DEVICE_HANDLE_T dev, u16 value)
{
return set_vxx_reg_to_pmbus(dev, PMBUS_CMD_VOUT_OV_FAULT_LIMIT, value);
}
/* Under-voltage fault limit definition */
static int set_vout_uv_fault_limit(DEVICE_HANDLE_T dev, u16 value)
{
return set_vxx_reg_to_pmbus(dev, PMBUS_CMD_VOUT_UV_FAULT_LIMIT, value);
}
/* Over-voltage warning limit definition */
static int set_vout_ov_warn_limit(DEVICE_HANDLE_T dev, u16 value)
{
return set_vxx_reg_to_pmbus(dev, PMBUS_CMD_VOUT_OV_WARN_LIMIT, value);
}
/* Under-voltage warning limit definition */
static int set_vout_uv_warn_limit(DEVICE_HANDLE_T dev, u16 value)
{
return set_vxx_reg_to_pmbus(dev, PMBUS_CMD_VOUT_UV_WARN_LIMIT, value);
}
/* Set target output voltage and wait with timeout for measured output voltage
to match target voltage */
static int set_and_wait_vout(DEVICE_HANDLE_T dev, int i2caddress, u16 value,
int vdd_target)
{
int count = MAX_LOOP_WAIT_NEW_VOL, temp = 0, ret, vdd_last;
ret = set_vxx_reg_to_pmbus(dev, PMBUS_CMD_VOUT_COMMAND, value);
if (0 != ret)
return ret;
/* Wait for the voltage to get to the desired value */
do {
vdd_last = read_voltage_from_pmbus(i2caddress);
if (vdd_last < 0) {
printf("VID: Couldn't read sensor abort VID adjust\n");
return -1;
}
count--;
temp = vdd_last - vdd_target;
} while ((abs(temp) > 2) && (count > 0));
return vdd_last;
}
/* Wait with timeout (in milliseconds) while chip is busy or calculations are
pending */
static int wait_chip_busy(DEVICE_HANDLE_T dev, int ms_tout)
{
u8 mfr_common;
int ret;
for (int i=0; i vdd_last)
{
int r;
/* Adjusting to higher vdd */
r = set_vout_ov_fault_limit(dev, vov_fault);
ret = r < 0 ? r : ret;
r = set_vout_ov_warn_limit(dev, vov_warn);
ret = r < 0 ? r : ret;
r = set_vout_margin_high(dev, vhigh_margin);
ret = r < 0 ? r : ret;
r = wait_chip_busy(dev, 11);
ret = r < 0 ? r : ret;
vdd_last = set_and_wait_vout(dev, i2caddress, vdd, vdd_target);
ret = vdd_last < 0 ? vdd_last : ret;
r = set_vout_margin_low(dev, vlow_margin);
ret = r < 0 ? r : ret;
r = set_vout_uv_warn_limit(dev ,vuv_warn);
ret = r < 0 ? r : ret;
r = set_vout_uv_fault_limit(dev, vuv_fault);
ret = r < 0 ? r : ret;
}
else
{
int r;
/* Adjusting to lower vdd */
r = set_vout_uv_fault_limit(dev, vuv_fault);
ret = r < 0 ? r : ret;
r = set_vout_uv_warn_limit(dev ,vuv_warn);
ret = r < 0 ? r : ret;
r = set_vout_margi
RE: [PATCH v1 1/1] makefile: add multi_dtb_fit dep
Hi Simon, > > With certain gcc compilers, the u-boot.itb is built immediately after > dtb generation. If CONFIG_MULTI_DTB_FIT is used, it is possible that > the fit-dtb.blob is not finished in time. > > This patch adds a necessary dependency to guarantee that the > fit-dtb.blob is built before attempting to build the u-boot.itb. > > Signed-off-by: Neal Frager > --- > Makefile | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Makefile b/Makefile > index b96e2ffa15..682a5d94fd 100644 > --- a/Makefile > +++ b/Makefile > @@ -1425,6 +1425,7 @@ MKIMAGEFLAGS_u-boot.itb += -B 0x8 ifdef > U_BOOT_ITS > u-boot.itb: u-boot-nodtb.bin \ > $(if > $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX),dts/dt.dtb) \ > + $(if $(CONFIG_MULTI_DTB_FIT),$(FINAL_DTB_CONTAINER)) \ > $(U_BOOT_ITS) FORCE > $(call if_changed,mkfitimage) > $(BOARD_SIZE_CHECK) > -- > 2.17.1 > > Reviewed-by: Simon Glass > I wonder if we should try to get this moved to binman? Thank you for the review! Yes, the next step will be to move to binman. Best regards, Neal Frager AMD
Re: [PATCH] arm: mach-k3: j721e: Add platform data for main_uart2
Hi Bryan, sure i can wait for that. Can i get the information when that gets merged. On 22/12/22 00:06, Bryan Brattlof wrote: Hi Bhavya! On December 19, 2022 thus sayeth Bhavya Kapoor: Add platform clock and powerdomain data for main_uart2 in J721e. This data is used by the driver to register main_uart2 device clocks and powerdomains for J721e. Signed-off-by: Bhavya Kapoor --- arch/arm/mach-k3/j721e/clk-data.c | 7 +-- arch/arm/mach-k3/j721e/dev-data.c | 3 ++- 2 files changed, 7 insertions(+), 3 deletions(-) I know there are a lot of changes coming up for the clock tree on all of our j7* devices. Would you be comfortable if we held off on this until we can get all the other changes lined up? ~Bryan
Re: [ANN] U-Boot v2023.01-rc4 released
On Thu, Dec 22, 2022 at 02:32:23PM +0530, Jagan Teki wrote: > Hi Kever, > > On Tue, 20 Dec 2022 at 12:47, Jagan Teki wrote: > > > > Hi Kever, > > > > On Tue, 20 Dec 2022 at 12:37, Kever Yang wrote: > > > > > > Hi Jagan, > > > > > > On 2022/12/20 14:41, Jagan Teki wrote: > > > > On Mon, 19 Dec 2022 at 19:16, Tom Rini wrote: > > > >> Hey all, > > > >> > > > >> Here's -rc4, on schedule. I believe this should resolve the case Fedora > > > >> showed where some binaries are allowed to be missing, IF a flag is also > > > >> passed to make. We've got one more patch to make external optional > > > >> binaries be more clearly supported, to pull in still. > > > >> > > > >> In terms of a changelog, > > > >> git log --merges v2023.01-rc3..v2023.01-rc4 > > > >> contains what I've pulled but as always, better PR messages and tags > > > >> will provide better results here. > > > >> > > > >> Looking forward, the schedule is for now rcs every other Monday, and > > > >> with final release on January 9th, 2023. Thanks all! > > > > Any chance to pick rv1126 series for this rc so-that it will include > > > > in the release? It's been there for a while. > > > > > > > > https://patchwork.ozlabs.org/project/uboot/cover/20221214175111.477134-1-ja...@edgeble.ai/ > > > > > > > > > This patch set is on my for-next list, I will send the PR once ready. > > > > > > But seems something wrong on board which is not rockchip soc: > > > > > > https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/14468 > > > > This link not opening for me. > > Ping! I've changed the setting to be public visible, but that won't help as it's failing to build in the strange way that buildman doesn't catch the output. It's likely broken on the CONFIG_SYS_TEXT_BASE -> CONFIG_TEXT_BASE change, and perhaps some other Kconfig migrations. At this point I'd really just like to see this rebased on next, sometime next week (after I finishing pushing all of the migrations through). -- Tom signature.asc Description: PGP signature
Re: [PATCH v5 00/19] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
On 12/22/22 11:53, Sergiu Moga wrote: This series of patches is meant to add support for USB Mass Storage on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into Driver Model. In order for this to be achieved, the respective DT nodes have been added, the USB clock has been registered into CCF and the required defconfigs have been added to the boards' defconfig. What is more, in order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY drivers were required. Please split the series into more manageable parts -- architecture and DT bits, board, clock, usb .
Re: [PATCH] Makefile: add -W for BINMAN_ALLOW_MISSING
On Thu, Dec 22, 2022 at 10:01:16AM +0300, Nikita Shubin wrote: > Hello Tom! > > On Mon, 19 Dec 2022 08:36:30 -0500 > Tom Rini wrote: > > > On Mon, Dec 19, 2022 at 11:21:45AM +0300, Nikita Shubin wrote: > > > Hello Tom and Simon! > > > > > > On Sat, 17 Dec 2022 14:38:30 -0700 > > > Simon Glass wrote: > > > > > > > +Tom Rini > > > > > > > > We do actually want to report the failure, since it means that the > > > > image will not function. This was a recent change requested by a > > > > few people. > > > > > > It doesn't make sense to me - if i am passing "--allow-missing" than > > > binman shouldn't fail drastically, cause i literally told him "It's > > > okay if files are missing". What purpose does it have now, it we > > > are failing regardless we are providing this flag or not ? > > > > > > This breaks old behaviour by the way, when passing "--allow-missing" > > > for missing blobs produced a warning instead of error. > > > > > > > > > > > Note that buildman looks for the message 'Some images are > > > > invalid' and either returning 103, or 0 if -W is given. > > > > > > > > There is no attempt to produce a special exit code from the > > > > Makefile. It generally returns 2 (as per 'man make'), which is > > > > why buildman has this extra processing. > > > > > > Well, there are only 3 codes for make and 2 indicates any failure: > > > > > > "A status of two will be returned if any errors were encountered." > > > (c) > > > > > > This new behaviour looks the same with or without > > > BINMAN_ALLOW_MISSING flag from top point of view: > > > > > > With BINMAN_ALLOW_MISSING=1: > > > Some images are invalid > > > make[1]: *** [Makefile:1114: .binman_stamp] Error 103 > > > make[1]: Leaving directory '/home/maquefel/workshop/overlord/u-boot' > > > make: *** [Makefile:271: u-boot/u > > > > > > $ echo $? > > > 2-boot-nodtb.bin] Error 2 > > > > > > Without BINMAN_ALLOW_MISSING: > > > > > > binman: Filename 'fw_dynamic.bin' not found in input path > > > (.,.,./board/syntacore/scr7_elct,arch/riscv/dts) > > > (cwd='/home/maquefel/workshop/overlord/u-boot') make[1]: *** > > > [Makefile:1114: .binman_stamp] Error 1 make[1]: Leaving directory > > > '/home/maquefel/workshop/overlord/u-boot' make: *** [Makefile:271: > > > u-boot/u-boot-nodtb.bin] Error 2 > > > > > > $ echo $? > > > 2 > > > > > > So that's the difference if build is failing either way ? > > > > So, with what is in master right now, BINMAN_ALLOW_MISSING=1 should > > work as intended, while it did not at its introduction. Please > > confirm if your use cases work now, or not. > > They don't actually, a few iterations ago i didn't even needed > BINMAN_ALLOW_MISSING (now it's clear for me that i never needed it), as > make produced only a warning and not a error. Yes, it would only ever produce a warning before. > I have kernel and ramdisk sections in my binman file and FIT image is > fully functional even if they are missing. > > And now there is no way to tell u-boot not to fail if some blobs are > missing. What do you mean? That's what BINMAN_ALLOW_MISSING=1 does: $ make CROSS_COMPILE=~/.buildman-toolchains/gcc-12.2.0-nolibc/aarch64-linux/bin/aarch64-linux- BINMAN_ALLOW_MISSING=1 -sj pine64_plus_defconfig all -sj;echo $? ... Image 'main-section' is missing external blobs and is non-functional: atf-bl31 scp /binman/u-boot-sunxi-with-spl/fit/images/atf/atf-bl31: Please read the section on ARM Trusted Firmware (ATF) in board/sunxi/README.sunxi64 /binman/u-boot-sunxi-with-spl/fit/images/scp/scp: SCP firmware is required for system suspend, but is otherwise optional. Please read the section on SCP firmware in board/sunxi/README.sunxi64 Some images are invalid 0 $ Is what I get on top of master right now. > > The problem we needed to > > solve was the one that by default previously, you could run "make > > fooboard_config all", not have BL31/etc available, get a warning > > printed and a zero exit code, leading to non-obvious failures if you > > build indirectly (buildroot, yocto/OE, etc). > > > > May be they shouldn't use BINMAN_ALLOW_MISSING when building u-boot at > all then ? > > Or can we, at least, have some BINMAN_REALLY_ALLOW_MISSING option or > simply passing some flags with BINMAN_OPTS for example ? > > Through: > -W, --ignore-missing Return success even if there are missing > blobs/bintools (requires -M) > > seems to have really good synergy with: > > -M, --allow-missing Allow external blobs and bintools to be > missing > > For BINMAN_ALLOW_MISSING. Yes, that's what BINMAN_ALLOW_MISSING=1 does. If top of tree master doesn't work for you, can you please post a patch so that the rest of us can replicate the failure and see what to do next? Thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCHv2 5/4] fwu: rename fwu_get_verified_mdata to fwu_get_mdata
On Fri, Dec 02, 2022 at 09:28:13PM -0600, jassisinghb...@gmail.com wrote:
> From: Jassi Brar
>
> fwu_get_mdata() sounds more appropriate than fwu_get_verified_mdata()
>
> Signed-off-by: Jassi Brar
> ---
> Forgot to send this patch previously in v2
> cmd/fwu_mdata.c | 2 +-
> include/fwu.h | 4 ++--
> lib/fwu_updates/fwu.c | 6 +++---
> 3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/cmd/fwu_mdata.c b/cmd/fwu_mdata.c
> index 9b70340368..5ecda455df 100644
> --- a/cmd/fwu_mdata.c
> +++ b/cmd/fwu_mdata.c
> @@ -46,7 +46,7 @@ int do_fwu_mdata_read(struct cmd_tbl *cmdtp, int flag,
> int ret = CMD_RET_SUCCESS, res;
> struct fwu_mdata mdata;
>
> - res = fwu_get_verified_mdata(&mdata);
> + res = fwu_get_mdata(&mdata);
> if (res < 0) {
> log_err("Unable to get valid FWU metadata\n");
> ret = CMD_RET_FAILURE;
> diff --git a/include/fwu.h b/include/fwu.h
> index 23bd97fe86..ea25aca2cd 100644
> --- a/include/fwu.h
> +++ b/include/fwu.h
> @@ -80,7 +80,7 @@ int fwu_read_mdata(struct udevice *dev, struct fwu_mdata
> *mdata, bool primary);
> int fwu_write_mdata(struct udevice *dev, struct fwu_mdata *mdata, bool
> primary);
>
> /**
> - * fwu_get_verified_mdata() - Read, verify and return the FWU metadata
> + * fwu_get_mdata() - Read, verify and return the FWU metadata
> *
> * Read both the metadata copies from the storage media, verify their
> checksum,
> * and ascertain that both copies match. If one of the copies has gone bad,
> @@ -88,7 +88,7 @@ int fwu_write_mdata(struct udevice *dev, struct fwu_mdata
> *mdata, bool primary);
> *
> * Return: 0 if OK, -ve on error
> */
> -int fwu_get_verified_mdata(struct fwu_mdata *mdata);
> +int fwu_get_mdata(struct fwu_mdata *mdata);
>
> /**
> * fwu_get_active_index() - Get active_index from the FWU metadata
> diff --git a/lib/fwu_updates/fwu.c b/lib/fwu_updates/fwu.c
> index 3d11d92fb9..77444ba2de 100644
> --- a/lib/fwu_updates/fwu.c
> +++ b/lib/fwu_updates/fwu.c
> @@ -191,7 +191,7 @@ static inline int mdata_crc_check(struct fwu_mdata *mdata)
> }
>
> /**
> - * fwu_get_verified_mdata() - Read, verify and return the FWU metadata
> + * fwu_get_mdata() - Read, verify and return the FWU metadata
> *
> * Read both the metadata copies from the storage media, verify their
> checksum,
> * and ascertain that both copies match. If one of the copies has gone bad,
> @@ -199,7 +199,7 @@ static inline int mdata_crc_check(struct fwu_mdata *mdata)
> *
> * Return: 0 if OK, -ve on error
> */
> -int fwu_get_verified_mdata(struct fwu_mdata *mdata)
> +int fwu_get_mdata(struct fwu_mdata *mdata)
> {
> int err;
> bool pri_ok, sec_ok;
> @@ -629,7 +629,7 @@ static int fwu_boottime_checks(void *ctx, struct event
> *event)
> return ret;
> }
>
> - ret = fwu_get_verified_mdata(NULL);
> + ret = fwu_get_mdata(NULL);
> if (ret) {
> log_debug("Unable to read meta-data\n");
> return ret;
> --
> 2.34.1
>
Reviewed-by: Ilias Apalodimas
Re: [PATCHv2 3/4] fwu: gpt: implement read_mdata and write_mdata callbacks
Hi Jassi,
On Fri, Dec 02, 2022 at 09:17:12PM -0600, jassisinghb...@gmail.com wrote:
> From: Jassi Brar
>
> Moving towards using common code for meta-data management,
> implement the read/write mdata hooks.
>
> Signed-off-by: Jassi Brar
> ---
> drivers/fwu-mdata/gpt_blk.c | 40 +++--
> 1 file changed, 38 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/fwu-mdata/gpt_blk.c b/drivers/fwu-mdata/gpt_blk.c
> index 28f5d23e1e..35239c0a4f 100644
> --- a/drivers/fwu-mdata/gpt_blk.c
> +++ b/drivers/fwu-mdata/gpt_blk.c
> @@ -222,7 +222,7 @@ static int fwu_gpt_read_mdata_partition(struct udevice
> *dev,
> struct fwu_mdata_gpt_blk_priv *priv = dev_get_priv(dev);
>
> return gpt_read_write_mdata(dev_get_uclass_plat(priv->blk_dev),
> - mdata, MDATA_READ, part_num);
> +mdata, MDATA_READ, part_num);
I assume this was by mistake?
> }
>
> static int fwu_gpt_write_mdata_partition(struct udevice *dev,
> @@ -231,7 +231,7 @@ static int fwu_gpt_write_mdata_partition(struct udevice
> *dev,
> struct fwu_mdata_gpt_blk_priv *priv = dev_get_priv(dev);
>
> return gpt_read_write_mdata(dev_get_uclass_plat(priv->blk_dev),
> - mdata, MDATA_WRITE, part_num);
> +mdata, MDATA_WRITE, part_num);
ditto
> }
>
> static int fwu_get_mdata_device(struct udevice *dev, struct udevice
> **mdata_dev)
> @@ -272,7 +272,43 @@ static int fwu_mdata_gpt_blk_probe(struct udevice *dev)
> return 0;
> }
>
> +static int fwu_gpt_read_mdata(struct udevice *dev, struct fwu_mdata *mdata,
> + bool primary)
> +{
> + struct fwu_mdata_gpt_blk_priv *priv = dev_get_priv(dev);
> + struct blk_desc *desc = dev_get_uclass_plat(priv->blk_dev);
> + int ret;
> +
> + ret = gpt_get_mdata_partitions(desc);
> + if (ret < 0) {
> + log_debug("Error getting the FWU metadata partitions\n");
> + return -ENOENT;
> + }
> +
> + return gpt_read_write_mdata(desc, mdata, MDATA_READ,
> +primary ? g_mdata_part[0] : g_mdata_part[1]);
> +}
> +
> +static int fwu_gpt_write_mdata(struct udevice *dev, struct fwu_mdata *mdata,
> + bool primary)
> +{
> + struct fwu_mdata_gpt_blk_priv *priv = dev_get_priv(dev);
> + struct blk_desc *desc = dev_get_uclass_plat(priv->blk_dev);
> + int ret;
> +
> + ret = gpt_get_mdata_partitions(desc);
> + if (ret < 0) {
> + log_debug("Error getting the FWU metadata partitions\n");
> + return -ENOENT;
> + }
> +
> + return gpt_read_write_mdata(desc, mdata, MDATA_WRITE,
> +primary ? g_mdata_part[0] : g_mdata_part[1]);
> +}
> +
> static const struct fwu_mdata_ops fwu_gpt_blk_ops = {
> + .read_mdata = fwu_gpt_read_mdata,
> + .write_mdata = fwu_gpt_write_mdata,
> .get_mdata = fwu_gpt_get_mdata,
> .update_mdata = fwu_gpt_update_mdata,
> .get_mdata_part_num = fwu_gpt_get_mdata_partitions,
> --
> 2.34.1
>
Other than that
Reviewed-by: Ilias Apalodimas
[PATCH v3 5/5] doc/usage: cmd: sm: documentation efusedump cmd
Signed-off-by: Alexey Romanov --- doc/usage/cmd/sm.rst | 4 1 file changed, 4 insertions(+) diff --git a/doc/usage/cmd/sm.rst b/doc/usage/cmd/sm.rst index 3a70c137ec9..beb53b3f46d 100644 --- a/doc/usage/cmd/sm.rst +++ b/doc/usage/cmd/sm.rst @@ -38,6 +38,10 @@ sm efusewrite Write into efuse memory bank, starting from , the bytes of data, located at address . +sm efusedump + Read bytes starting from from efuse memory bank and print + them to the console. + Configuration - -- 2.25.1
[PATCH v3 4/5] cmd/arm: meson: sm: introduce efusedump command
Using this command user can print efuse memory:
$ sm efusedump 0 10
: ff 00 31 00 00 ff 66 00 00 00 ..1...f...
Signed-off-by: Alexey Romanov
Reviewed-by: Mattijs Korpershoek
---
cmd/meson/sm.c | 36 +++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/cmd/meson/sm.c b/cmd/meson/sm.c
index c2b57707258..d5eb1d6c084 100644
--- a/cmd/meson/sm.c
+++ b/cmd/meson/sm.c
@@ -5,6 +5,7 @@
* Author: Beniamino Galvani
* Author: Vyacheslav Bocharov
* Author: Neil Armstrong
+ * Author: Alexey Romanov
*/
#include
@@ -119,11 +120,43 @@ static int do_efuse_write(struct cmd_tbl *cmdtp, int
flag, int argc,
return CMD_RET_SUCCESS;
}
+static int do_efuse_dump(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ ulong offset, size;
+ u8 *buffer;
+ int ret;
+
+ if (argc != 3)
+ return CMD_RET_USAGE;
+
+ offset = simple_strtoul(argv[1], NULL, 0);
+ size = simple_strtoul(argv[2], NULL, 0);
+ buffer = malloc(size);
+ if (!buffer) {
+ pr_err("Failed to allocate %lu bytes\n", size);
+ return CMD_RET_FAILURE;
+ }
+
+ ret = meson_sm_read_efuse(offset, (void *)buffer, size);
+ if (ret != size) {
+ ret = CMD_RET_FAILURE;
+ goto free_buffer;
+ }
+
+ print_buffer(0, buffer, 1, size, 0);
+
+free_buffer:
+ free(buffer);
+ return ret;
+}
+
static struct cmd_tbl cmd_sm_sub[] = {
U_BOOT_CMD_MKENT(serial, 2, 1, do_sm_serial, "", ""),
U_BOOT_CMD_MKENT(reboot_reason, 1, 1, do_sm_reboot_reason, "", ""),
U_BOOT_CMD_MKENT(efuseread, 4, 1, do_efuse_read, "", ""),
U_BOOT_CMD_MKENT(efusewrite, 4, 0, do_efuse_write, "", ""),
+ U_BOOT_CMD_MKENT(efusedump, 3, 1, do_efuse_dump, "", ""),
};
static int do_sm(struct cmd_tbl *cmdtp, int flag, int argc,
@@ -152,5 +185,6 @@ U_BOOT_CMD(
"serial - read chip unique id to memory address\n"
"sm reboot_reason [name] - get reboot reason and store to environment\n"
"sm efuseread- read efuse to memory
address\n"
- "sm efusewrite- write into efuse from memory
address"
+ "sm efusewrite- write into efuse from memory
address\n"
+ "sm efusedump - dump efuse data range to console"
);
--
2.25.1
[PATCH v3 3/5] doc/usage: cmd: documentation for meson/sm command
Signed-off-by: Alexey Romanov --- doc/usage/cmd/sm.rst | 44 1 file changed, 44 insertions(+) create mode 100644 doc/usage/cmd/sm.rst diff --git a/doc/usage/cmd/sm.rst b/doc/usage/cmd/sm.rst new file mode 100644 index 000..3a70c137ec9 --- /dev/null +++ b/doc/usage/cmd/sm.rst @@ -0,0 +1,44 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +Meson Security Monitor command +== + +Synopis +--- + +:: + +sm serial +sm reboot_reason [name] +sm efuseread +sm efusewrite +sm efusedump + +Description +--- + +The sm command is used to request services from the secure monitor. User +can call secure monitor to request special TEE function, for example chip +serial number info, reboot reason, etc. + +sm serial + Retrieve chip unique serial number from sm and write it to memory on + appropriate address. + +sm reboot_reason + Print reboot reason to the console, if parameter [name] isn't specified. + If parameter specified, set reboot reason string to environment variable + with this name. + +sm efuseread + Read bytes starting from from efuse memory bank and write + result to the address . + +sm efusewrite + Write into efuse memory bank, starting from , the bytes + of data, located at address . + +Configuration +- + +To use the sm command you must specify CONFIG_CMD_MESON=y -- 2.25.1
[PATCH v3 2/5] arm/mach-meson: move smc commands in cmd/meson
It is incorrect to keep commands in the arch/ folder.
Signed-off-by: Alexey Romanov
Reviewed-by: Mattijs Korpershoek
---
MAINTAINERS | 1 +
arch/arm/mach-meson/sm.c | 144
cmd/Kconfig | 7 ++
cmd/Makefile | 3 +
cmd/meson/Makefile | 5 ++
cmd/meson/sm.c | 156 +++
6 files changed, 172 insertions(+), 144 deletions(-)
create mode 100644 cmd/meson/Makefile
create mode 100644 cmd/meson/sm.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 7f27ff4c20f..7a5460d4922 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -149,6 +149,7 @@ L: u-boot-amlo...@groups.io
T: git https://source.denx.de/u-boot/custodians/u-boot-amlogic.git
F: arch/arm/mach-meson/
F: arch/arm/include/asm/arch-meson/
+F: cmd/meson/
F: drivers/clk/meson/
F: drivers/serial/serial_meson.c
F: drivers/reset/reset-meson.c
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index d6eb910689f..f2ca7e76932 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -6,8 +6,6 @@
*/
#include
-#include
-#include
#include
#include
#include
@@ -139,145 +137,3 @@ int meson_sm_get_reboot_reason(void)
/* The SMC call is not used, we directly use AO_SEC_SD_CFG15 */
return FIELD_GET(REBOOT_REASON_MASK, reason);
}
-
-static int do_sm_serial(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- ulong address;
- int ret;
-
- if (argc < 2)
- return CMD_RET_USAGE;
-
- address = simple_strtoul(argv[1], NULL, 0);
-
- ret = meson_sm_get_serial((void *)address, SM_CHIP_ID_SIZE);
- if (ret)
- return CMD_RET_FAILURE;
-
- return CMD_RET_SUCCESS;
-}
-
-#define MAX_REBOOT_REASONS 14
-
-static const char *reboot_reasons[MAX_REBOOT_REASONS] = {
- [REBOOT_REASON_COLD] = "cold_boot",
- [REBOOT_REASON_NORMAL] = "normal",
- [REBOOT_REASON_RECOVERY] = "recovery",
- [REBOOT_REASON_UPDATE] = "update",
- [REBOOT_REASON_FASTBOOT] = "fastboot",
- [REBOOT_REASON_SUSPEND_OFF] = "suspend_off",
- [REBOOT_REASON_HIBERNATE] = "hibernate",
- [REBOOT_REASON_BOOTLOADER] = "bootloader",
- [REBOOT_REASON_SHUTDOWN_REBOOT] = "shutdown_reboot",
- [REBOOT_REASON_RPMBP] = "rpmbp",
- [REBOOT_REASON_CRASH_DUMP] = "crash_dump",
- [REBOOT_REASON_KERNEL_PANIC] = "kernel_panic",
- [REBOOT_REASON_WATCHDOG_REBOOT] = "watchdog_reboot",
-};
-
-static int do_sm_reboot_reason(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- const char *reason_str;
- char *destarg = NULL;
- int reason;
-
- if (argc > 1)
- destarg = argv[1];
-
- reason = meson_sm_get_reboot_reason();
- if (reason < 0)
- return CMD_RET_FAILURE;
-
- if (reason >= MAX_REBOOT_REASONS ||
- !reboot_reasons[reason])
- reason_str = "unknown";
- else
- reason_str = reboot_reasons[reason];
-
- if (destarg)
- env_set(destarg, reason_str);
- else
- printf("reboot reason: %s (%x)\n", reason_str, reason);
-
- return CMD_RET_SUCCESS;
-}
-
-static int do_efuse_read(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- ulong address, offset, size;
- int ret;
-
- if (argc < 4)
- return CMD_RET_USAGE;
-
-offset = simple_strtoul(argv[1], NULL, 0);
-size = simple_strtoul(argv[2], NULL, 0);
-
-address = simple_strtoul(argv[3], NULL, 0);
-
- ret = meson_sm_read_efuse(offset, (void *)address, size);
- if (ret != size)
- return CMD_RET_FAILURE;
-
- return CMD_RET_SUCCESS;
-}
-
-static int do_efuse_write(struct cmd_tbl *cmdtp, int flag, int argc,
- char *const argv[])
-{
- ulong address, offset, size;
- int ret;
-
- if (argc < 4)
- return CMD_RET_USAGE;
-
-offset = simple_strtoul(argv[1], NULL, 0);
-size = simple_strtoul(argv[2], NULL, 0);
-
-address = simple_strtoul(argv[3], NULL, 0);
-
- ret = meson_sm_write_efuse(offset, (void *)address, size);
- if (ret != size)
- return CMD_RET_FAILURE;
-
- return CMD_RET_SUCCESS;
-}
-
-static struct cmd_tbl cmd_sm_sub[] = {
- U_BOOT_CMD_MKENT(serial, 2, 1, do_sm_serial, "", ""),
- U_BOOT_CMD_MKENT(reboot_reason, 1, 1, do_sm_reboot_reason, "", ""),
- U_BOOT_CMD_MKENT(efuseread, 4, 1, do_efuse_read, "", ""),
- U_BOOT_CMD_MKENT(efusewrite, 4, 0, do_efuse_write, "", ""),
-};
-
-static int do_sm(struct cmd_tbl *cmdtp, int flag, int argc,
-char *const argv[])
-{
- struct cmd_tbl *c;
-
- if (argc < 2)
- return CMD_RET_USAGE;
-
- /* Str
[PATCH v3 1/5] asm/arch-meson: add missing meson_sm_write_efuse signature
This function can be used by other modules. Also add comments.
Signed-off-by: Alexey Romanov
---
arch/arm/include/asm/arch-meson/sm.h | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/include/asm/arch-meson/sm.h
b/arch/arm/include/asm/arch-meson/sm.h
index f3ae46a6d6b..53b75176493 100644
--- a/arch/arm/include/asm/arch-meson/sm.h
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -6,10 +6,35 @@
#ifndef __MESON_SM_H__
#define __MESON_SM_H__
+/**
+ * meson_sm_read_efuse - read efuse memory into buffer
+ *
+ * @offset: offset from the start efuse memory
+ * @buffer: pointer to buffer
+ * @size: number of bytes to read
+ * @return: number of bytes read
+ */
ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+/**
+ * meson_sm_write_efuse - write into efuse memory from buffer
+ *
+ * @offset: offset from the start efuse memory
+ * @buffer: pointer to buffer
+ * @size: number of bytes to write
+ * @return: number of bytes written
+ */
+ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size);
+
#define SM_SERIAL_SIZE 12
+/**
+ * meson_sm_get_serial - read chip unique id into buffer
+ *
+ * @buffer: pointer to buffer
+ * @size: buffer size.
+ * @return: zero on success or -errno on failure
+ */
int meson_sm_get_serial(void *buffer, size_t size);
enum {
@@ -28,6 +53,9 @@ enum {
REBOOT_REASON_WATCHDOG_REBOOT = 13,
};
+/**
+ * meson_sm_get_reboot_reason - get reboot reason
+ */
int meson_sm_get_reboot_reason(void);
#endif /* __MESON_SM_H__ */
--
2.25.1
[PATCH v3 0/5] arch-meson: introduce efusedump command
Keeping the commands code in an arch/ is not correct. This patchset moves the meson smc commands from arch/arm/mach-meson to cmd/meson folder and also adds a new 'efusedump' command with which user can print efuse memory. Alexey Romanov (5): asm/arch-meson: add missing meson_sm_write_efuse signature arm/mach-meson: move smc commands in cmd/meson doc/usage: cmd: documentation for meson/sm command cmd/arm: meson: sm: introduce efusedump command doc/usage: cmd: sm: documentation efusedump cmd MAINTAINERS | 1 + arch/arm/include/asm/arch-meson/sm.h | 28 arch/arm/mach-meson/sm.c | 144 cmd/Kconfig | 7 + cmd/Makefile | 3 + cmd/meson/Makefile | 5 + cmd/meson/sm.c | 190 +++ doc/usage/cmd/sm.rst | 48 +++ 8 files changed, 282 insertions(+), 144 deletions(-) create mode 100644 cmd/meson/Makefile create mode 100644 cmd/meson/sm.c create mode 100644 doc/usage/cmd/sm.rst -- 2.25.1
Re: [PATCHv2 1/4] fwu: gpt: use cached meta-data partition numbers
On Fri, Dec 02, 2022 at 09:16:51PM -0600, jassisinghb...@gmail.com wrote:
> From: Jassi Brar
>
> Use cached values and avoid parsing and scanning through partitions
> everytime for meta-data partitions because they can't change after bootup.
>
> Acked-by: Etienne Carriere
> Signed-off-by: Jassi Brar
> ---
> drivers/fwu-mdata/gpt_blk.c | 43 +
> 1 file changed, 24 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/fwu-mdata/gpt_blk.c b/drivers/fwu-mdata/gpt_blk.c
> index d35ce49c5c..28f5d23e1e 100644
> --- a/drivers/fwu-mdata/gpt_blk.c
> +++ b/drivers/fwu-mdata/gpt_blk.c
> @@ -24,8 +24,9 @@ enum {
> MDATA_WRITE,
> };
>
> -static int gpt_get_mdata_partitions(struct blk_desc *desc,
> - uint mdata_parts[2])
> +static uint g_mdata_part[2]; /* = {0, 0} to check against uninit parts */
> +
> +static int gpt_get_mdata_partitions(struct blk_desc *desc)
> {
> int i, ret;
> u32 nparts;
> @@ -33,18 +34,19 @@ static int gpt_get_mdata_partitions(struct blk_desc *desc,
> struct disk_partition info;
> const efi_guid_t fwu_mdata_guid = FWU_MDATA_GUID;
>
> + /* if primary and secondary partitions already found */
> + if (g_mdata_part[0] && g_mdata_part[1])
> + return 0;
> +
> nparts = 0;
> - for (i = 1; i < MAX_SEARCH_PARTITIONS; i++) {
> + for (i = 1; i < MAX_SEARCH_PARTITIONS && nparts < 2; i++) {
> if (part_get_info(desc, i, &info))
> continue;
> uuid_str_to_bin(info.type_guid, part_type_guid.b,
> UUID_STR_FORMAT_GUID);
>
> - if (!guidcmp(&fwu_mdata_guid, &part_type_guid)) {
> - if (nparts < 2)
> - mdata_parts[nparts] = i;
> - ++nparts;
> - }
> + if (!guidcmp(&fwu_mdata_guid, &part_type_guid))
> + g_mdata_part[nparts++] = i;
The reason the 'if (nparts < 2)' was outside the main loop was to show
errors in case the user defined more than two partitions. Can we keep it
like that or am I the only being paranoid here?
> }
>
> if (nparts != 2) {
> @@ -127,26 +129,25 @@ static int fwu_gpt_update_mdata(struct udevice *dev,
> struct fwu_mdata *mdata)
> {
> int ret;
> struct blk_desc *desc;
> - uint mdata_parts[2];
> struct fwu_mdata_gpt_blk_priv *priv = dev_get_priv(dev);
>
> desc = dev_get_uclass_plat(priv->blk_dev);
>
> - ret = gpt_get_mdata_partitions(desc, mdata_parts);
> + ret = gpt_get_mdata_partitions(desc);
> if (ret < 0) {
> log_debug("Error getting the FWU metadata partitions\n");
> return -ENOENT;
> }
>
> /* First write the primary partition */
> - ret = gpt_read_write_mdata(desc, mdata, MDATA_WRITE, mdata_parts[0]);
> + ret = gpt_read_write_mdata(desc, mdata, MDATA_WRITE, g_mdata_part[0]);
> if (ret < 0) {
> log_debug("Updating primary FWU metadata partition failed\n");
> return ret;
> }
>
> /* And now the replica */
> - ret = gpt_read_write_mdata(desc, mdata, MDATA_WRITE, mdata_parts[1]);
> + ret = gpt_read_write_mdata(desc, mdata, MDATA_WRITE, g_mdata_part[1]);
> if (ret < 0) {
> log_debug("Updating secondary FWU metadata partition failed\n");
> return ret;
> @@ -158,16 +159,14 @@ static int fwu_gpt_update_mdata(struct udevice *dev,
> struct fwu_mdata *mdata)
> static int gpt_get_mdata(struct blk_desc *desc, struct fwu_mdata *mdata)
> {
> int ret;
> - uint mdata_parts[2];
> -
> - ret = gpt_get_mdata_partitions(desc, mdata_parts);
>
> + ret = gpt_get_mdata_partitions(desc);
> if (ret < 0) {
> log_debug("Error getting the FWU metadata partitions\n");
> return -ENOENT;
> }
>
> - ret = gpt_read_write_mdata(desc, mdata, MDATA_READ, mdata_parts[0]);
> + ret = gpt_read_write_mdata(desc, mdata, MDATA_READ, g_mdata_part[0]);
> if (ret < 0) {
> log_debug("Failed to read the FWU metadata from the device\n");
> return -EIO;
> @@ -182,7 +181,7 @@ static int gpt_get_mdata(struct blk_desc *desc, struct
> fwu_mdata *mdata)
>* Try to read the replica.
>*/
> memset(mdata, '\0', sizeof(struct fwu_mdata));
> - ret = gpt_read_write_mdata(desc, mdata, MDATA_READ, mdata_parts[1]);
> + ret = gpt_read_write_mdata(desc, mdata, MDATA_READ, g_mdata_part[1]);
> if (ret < 0) {
> log_debug("Failed to read the FWU metadata from the device\n");
> return -EIO;
> @@ -206,9 +205,15 @@ static int fwu_gpt_get_mdata(struct udevice *dev, struct
> fwu_mdata *mdata)
> static int fwu_gpt_get_mdata_partitions(struct udevice *dev, uint
> *mdata_parts)
> {
> struct fwu_mdata_gpt_blk_priv *priv = dev_get_priv(dev);
> + int err;
> +
> + err = gpt_ge
Re: [PATCH 2/3] eficonfig: refactor change boot order implementation
On Wed, Dec 21, 2022 at 10:50:37PM +0900, Masahisa Kojima wrote:
> This commit removes the change boot order specific
> menu implementation. The change boot order implementation
> calls eficonfig_process_common() same as other menus.
>
> The change boot order menu requires own item_data_print
> and item_choice implementation, but display_statusline
> function can be a same function as other menus.
>
> Signed-off-by: Masahisa Kojima
> ---
> cmd/eficonfig.c | 236 +---
> 1 file changed, 143 insertions(+), 93 deletions(-)
>
> diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
> index 39ee766a7b..c2c6c01c3b 100644
> --- a/cmd/eficonfig.c
> +++ b/cmd/eficonfig.c
> @@ -24,6 +24,11 @@ static struct efi_simple_text_input_protocol *cin;
> char eficonfig_menu_desc[] =
> " Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit";
>
> +static char eficonfig_change_boot_order_desc[] =
> + " Press UP/DOWN to move, +/- to change orde\n"
> + " Press SPACE to activate or deactivate the entry\n"
> + " Select [Save] to complete, ESC/CTRL+C to quit";
> +
static const
> #define EFICONFIG_DESCRIPTION_MAX 32
> #define EFICONFIG_OPTIONAL_DATA_MAX 64
>
> @@ -105,6 +110,17 @@ struct eficonfig_boot_order_data {
> bool active;
> };
>
> +/**
> + * struct eficonfig_save_boot_order_data - structure to be used to change
> boot order
> + *
> + * @efi_menu:pointer to efimenu structure
> + * @selected:flag to indicate user selects "Save" entry
> + */
> +struct eficonfig_save_boot_order_data {
> + struct efimenu *efi_menu;
> + bool selected;
> +};
> +
> /**
> * eficonfig_print_msg() - print message
> *
> @@ -173,10 +189,9 @@ void eficonfig_display_statusline(struct menu *m)
> "\n%s\n"
> ANSI_CURSOR_POSITION ANSI_CLEAR_LINE ANSI_CURSOR_POSITION
> "%s"
> -ANSI_CLEAR_LINE_TO_END ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
> +ANSI_CLEAR_LINE_TO_END,
> 1, 1, entry->efi_menu->menu_header, entry->efi_menu->count + 5,
> 1,
> -entry->efi_menu->count + 6, 1, entry->efi_menu->menu_desc,
> -entry->efi_menu->count + 7, 1);
> +entry->efi_menu->count + 6, 1, entry->efi_menu->menu_desc);
> }
>
> /**
> @@ -1841,63 +1856,44 @@ out:
> }
>
> /**
> - * eficonfig_display_change_boot_order() - display the BootOrder list
> + * eficonfig_print_change_boot_order_entry() - print the boot option entry
> *
> - * @efi_menu:pointer to the efimenu structure
> - * Return: status code
> + * @data:pointer to the data associated with each menu entry
> */
> -static void eficonfig_display_change_boot_order(struct efimenu *efi_menu)
> +static void eficonfig_print_change_boot_order_entry(void *data)
> {
> - bool reverse;
> - struct list_head *pos, *n;
> - struct eficonfig_entry *entry;
> -
> - printf(ANSI_CLEAR_CONSOLE ANSI_CURSOR_POSITION
> -"\n ** Change Boot Order **\n"
> -ANSI_CURSOR_POSITION
> -" Press UP/DOWN to move, +/- to change order"
> -ANSI_CURSOR_POSITION
> -" Press SPACE to activate or deactivate the entry"
> -ANSI_CURSOR_POSITION
> -" Select [Save] to complete, ESC/CTRL+C to quit"
> -ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
> -1, 1, efi_menu->count + 5, 1, efi_menu->count + 6, 1,
> -efi_menu->count + 7, 1, efi_menu->count + 8, 1);
> -
> - /* draw boot option list */
> - list_for_each_safe(pos, n, &efi_menu->list) {
So this prints one option every time now instead of all the entries?
> - entry = list_entry(pos, struct eficonfig_entry, list);
> - reverse = (entry->num == efi_menu->active);
> + struct eficonfig_entry *entry = data;
> + int reverse = (entry->efi_menu->active == entry->num);
>
> - printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
> + printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
>
> - if (reverse)
> - puts(ANSI_COLOR_REVERSE);
> + if (reverse)
> + puts(ANSI_COLOR_REVERSE);
>
> - if (entry->num < efi_menu->count - 2) {
> - if (((struct eficonfig_boot_order_data
> *)entry->data)->active)
> - printf("[*] ");
> - else
> - printf("[ ] ");
> - }
> + if (entry->num < entry->efi_menu->count - 2) {
> + if (((struct eficonfig_boot_order_data *)entry->data)->active)
> + printf("[*] ");
> + else
> + printf("[ ] ");
> + }
>
> - printf("%s", entry->title);
> + printf("%s", entry->title);
>
> - if (reverse)
> - puts(ANSI_COLOR_RESET);
> - }
> + if (reverse)
> + puts(ANSI_COLOR_RESET);
> }
>
> /**
> - * eficonfig_choi
Re: [PATCH] board: amlogic: jethub j100: add rescue boot from microSD
On 22/12/2022 10:33, Vyacheslav Bocharov via groups.io wrote: From: Viacheslav Bocharov The new JetHub D1+ has a microSD slot. Add rescue boot from microSD Signed-off-by: Viacheslav Bocharov --- include/configs/jethub.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/jethub.h b/include/configs/jethub.h index 35f85095ac..e22db4991d 100644 --- a/include/configs/jethub.h +++ b/include/configs/jethub.h @@ -12,6 +12,7 @@ #define BOOTENV_DEV_RESCUE(devtypeu, devtypel, instance) \ "bootcmd_rescue=" \ "if gpio input 10; then " \ + "run bootcmd_mmc0; " \ "run bootcmd_usb0;" \ "fi;\0" #else Reviewed-by: Neil Armstrong
Re: [PATCH 1/2] tee: optee: don't fail probe because of optee-rng
On Wed, Dec 7, 2022 at 4:30 PM Etienne Carriere wrote: > > Fixes optee-rng driver bind sequence in optee driver to print a warning > message but not report an error status when a optee-rng service driver > fails to be bound as the optee driver itself is still fully functional. > > Signed-off-by: Etienne Carriere > --- > drivers/tee/optee/core.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Jens Wiklander Thanks, Jens > > diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c > index 9240277579..604fd1414f 100644 > --- a/drivers/tee/optee/core.c > +++ b/drivers/tee/optee/core.c > @@ -834,7 +834,7 @@ static int optee_probe(struct udevice *dev) > */ > ret = device_bind_driver(dev, "optee-rng", "optee-rng", NULL); > if (ret) > - return ret; > + dev_warn(dev, "ftpm_tee failed to bind: %d\n", ret); > } > > return 0; > -- > 2.25.1 >
Re: [PATCH 2/2] tee: optee: discover services dependent on tee-supplicant
On Wed, Dec 7, 2022 at 4:30 PM Etienne Carriere
wrote:
>
> Makes OP-TEE to enumerate also services depending on tee-supplicant
> support in U-Boot. This change allows OP-TEE services like fTPM TA
> to be discovered and get a TPM device registered in U-Boot.
>
> Signed-off-by: Etienne Carriere
> ---
> drivers/tee/optee/core.c | 32 +++-
> 1 file changed, 23 insertions(+), 9 deletions(-)
Reviewed-by: Jens Wiklander
Thanks,
Jens
>
> diff --git a/drivers/tee/optee/core.c b/drivers/tee/optee/core.c
> index 604fd1414f..b21031d7d8 100644
> --- a/drivers/tee/optee/core.c
> +++ b/drivers/tee/optee/core.c
> @@ -102,13 +102,14 @@ static int bind_service_list(struct udevice *dev,
> struct tee_shm *service_list,
> return 0;
> }
>
> -static int __enum_services(struct udevice *dev, struct tee_shm *shm, size_t
> *shm_size, u32 tee_sess)
> +static int __enum_services(struct udevice *dev, struct tee_shm *shm, size_t
> *shm_size, u32 tee_sess,
> + unsigned int pta_cmd)
> {
> struct tee_invoke_arg arg = { };
> struct tee_param param = { };
> int ret = 0;
>
> - arg.func = PTA_CMD_GET_DEVICES;
> + arg.func = pta_cmd;
> arg.session = tee_sess;
>
> /* Fill invoke cmd params */
> @@ -118,7 +119,7 @@ static int __enum_services(struct udevice *dev, struct
> tee_shm *shm, size_t *shm
>
> ret = tee_invoke_func(dev, &arg, 1, ¶m);
> if (ret || (arg.ret && arg.ret != TEE_ERROR_SHORT_BUFFER)) {
> - dev_err(dev, "PTA_CMD_GET_DEVICES invoke function err:
> 0x%x\n", arg.ret);
> + dev_err(dev, "Enumeration command 0x%x failed: 0x%x\n",
> pta_cmd, arg.ret);
> return -EINVAL;
> }
>
> @@ -127,12 +128,13 @@ static int __enum_services(struct udevice *dev, struct
> tee_shm *shm, size_t *shm
> return 0;
> }
>
> -static int enum_services(struct udevice *dev, struct tee_shm **shm, size_t
> *count, u32 tee_sess)
> +static int enum_services(struct udevice *dev, struct tee_shm **shm, size_t
> *count, u32 tee_sess,
> +unsigned int pta_cmd)
> {
> size_t shm_size = 0;
> int ret;
>
> - ret = __enum_services(dev, NULL, &shm_size, tee_sess);
> + ret = __enum_services(dev, NULL, &shm_size, tee_sess, pta_cmd);
> if (ret)
> return ret;
>
> @@ -142,7 +144,7 @@ static int enum_services(struct udevice *dev, struct
> tee_shm **shm, size_t *coun
> return ret;
> }
>
> - ret = __enum_services(dev, *shm, &shm_size, tee_sess);
> + ret = __enum_services(dev, *shm, &shm_size, tee_sess, pta_cmd);
> if (!ret)
> *count = shm_size / sizeof(struct tee_optee_ta_uuid);
>
> @@ -174,20 +176,32 @@ static int bind_service_drivers(struct udevice *dev)
> struct tee_shm *service_list = NULL;
> size_t service_count;
> u32 tee_sess;
> - int ret;
> + int ret, ret2;
>
> ret = open_enum_session(dev, &tee_sess);
> if (ret)
> return ret;
>
> - ret = enum_services(dev, &service_list, &service_count, tee_sess);
> + ret = enum_services(dev, &service_list, &service_count, tee_sess,
> + PTA_CMD_GET_DEVICES);
> if (!ret)
> ret = bind_service_list(dev, service_list, service_count);
>
> tee_shm_free(service_list);
> +
> + ret2 = enum_services(dev, &service_list, &service_count, tee_sess,
> +PTA_CMD_GET_DEVICES_SUPP);
> + if (!ret2)
> + ret2 = bind_service_list(dev, service_list, service_count);
> +
> + tee_shm_free(service_list);
> +
> tee_close_session(dev, tee_sess);
>
> - return ret;
> + if (ret)
> + return ret;
> +
> + return ret2;
> }
>
> /**
> --
> 2.25.1
>
[PATCH v5 19/19] usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv`
From: Cristian Birsan
The `ohci_register` function expects that the OHCI driver's
priv is a struct whose first field is of type `ohci_t`.
The original conversion to DM did not have it and this
inconsistency revealed itself whenever U-Boot required
multiple memory allocations resulting in a memory overwrite
of where this field would supposedly be.
Thus, add this missing field and automatically increase
the implicit size of the driver's priv to avoid whatever
future memory allocations may take place from overwriting
it.
Fixes: de1cf0a9c6 ("drivers: usb: ohci-at91: Enable OHCI functionality and
register into DM")
Signed-off-by: Cristian Birsan
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
v1 -> v5:
- No change
drivers/usb/host/ohci-at91.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 586de2798a..217f31b402 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -90,6 +90,7 @@ struct at91_usbh_data {
};
struct ohci_at91_priv {
+ ohci_t ohci;
struct clk *iclk;
struct clk *fclk;
struct clk *hclk;
--
2.34.1
[PATCH v5 17/19] configs: at91: sama5d2: Enable OHCI/EHCI related configs
Enable the OHCI and EHCI related configs required in order to be able to use the USB command properly. Signed-off-by: Sergiu Moga --- v1 -> v2: - No change v2 -> v3: - Also add CONFIG_RESET_AT91 to enable RSTC v3 -> v5: - No change configs/sama5d27_giantboard_defconfig | 4 configs/sama5d27_som1_ek_mmc1_defconfig| 4 configs/sama5d27_som1_ek_mmc_defconfig | 4 configs/sama5d27_som1_ek_qspiflash_defconfig | 4 configs/sama5d27_wlsom1_ek_mmc_defconfig | 5 + configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 4 configs/sama5d2_icp_mmc_defconfig | 8 configs/sama5d2_icp_qspiflash_defconfig| 4 configs/sama5d2_ptc_ek_mmc_defconfig | 4 configs/sama5d2_ptc_ek_nandflash_defconfig | 4 configs/sama5d2_xplained_emmc_defconfig| 4 configs/sama5d2_xplained_mmc_defconfig | 4 configs/sama5d2_xplained_qspiflash_defconfig | 4 configs/sama5d2_xplained_spiflash_defconfig| 4 14 files changed, 61 insertions(+) diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index d08a42d911..d33b886116 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -81,6 +81,8 @@ CONFIG_DM_SPI_FLASH=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -95,6 +97,8 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 93ae714b62..a1f17e0f16 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -93,6 +93,8 @@ CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -108,6 +110,8 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 5096366de7..67deb04af2 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -93,6 +93,8 @@ CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -108,6 +110,8 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index d7c7f42c93..265c1df32c 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -92,6 +92,8 @@ CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -107,6 +109,8 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 7634a6c68f..3aa2dfda8f 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -56,6 +56,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y CONFIG_CMD_MII=y @@ -98,6 +99,8 @@ CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -113,6 +116,8 @@ CONFIG_ATMEL_PIT_TIMER=y CONFIG_SPL_ATMEL_PIT_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_ATMEL_USBA=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index bb018d4c69..9a5b98df92 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -102,6 +102,8 @@ CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_
[PATCH v5 18/19] configs: at91: sama7: Enable USB and RESET functionality
Enable USB and RESET functionality. In order for USB to work properly on SAMA7, the driver needs to be able to have access to PHY's, which, in turn, need to have access to the RSTC driver's assert/deassert functionalities. Signed-off-by: Sergiu Moga Tested-by: Mihai Sain --- v1 -> v5: - No change configs/sama7g5ek_mmc1_defconfig | 10 ++ configs/sama7g5ek_mmc_defconfig | 10 ++ 2 files changed, 20 insertions(+) diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index f004e44803..6c92781e60 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -68,8 +69,12 @@ CONFIG_MMC_SDHCI_ATMEL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MACB=y +CONFIG_PHY=y +CONFIG_PHY_MICROCHIP_SAMA7_USB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -77,5 +82,10 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y +CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER_HII is not set diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 5b42fc63f3..a4e57c7ba5 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y # CONFIG_CMD_LOADS is not set CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y @@ -68,8 +69,12 @@ CONFIG_MMC_SDHCI_ATMEL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_MACB=y +CONFIG_PHY=y +CONFIG_PHY_MICROCHIP_SAMA7_USB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91PIO4=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -77,5 +82,10 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y +CONFIG_USB_STORAGE=y CONFIG_OF_LIBFDT_OVERLAY=y # CONFIG_EFI_LOADER_HII is not set -- 2.34.1
[PATCH v5 16/19] configs: at91: sam9x60ek: Add required configs for the USB command
Add the configs required to use the USB-related functionalities within the bootloader. Signed-off-by: Sergiu Moga --- v1 -> v2: - No change v2 -> v3: - Also add USB Mass Storage on SAM9X60 Curiosity - Add CONFIG_RESET_AT91 to enable RSTC v3 -> v5: - No change configs/sam9x60_curiosity_mmc_defconfig | 8 configs/sam9x60ek_mmc_defconfig | 9 + configs/sam9x60ek_nandflash_defconfig | 9 + configs/sam9x60ek_qspiflash_defconfig | 9 + 4 files changed, 35 insertions(+) diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index 732b5adf26..a09e01c197 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -37,6 +37,7 @@ CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y @@ -54,6 +55,7 @@ CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_AT91_SAM9X60_USB=y CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y @@ -66,11 +68,17 @@ CONFIG_PHY_MICREL=y CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y CONFIG_TIMER=y CONFIG_MCHP_PIT64B_TIMER=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ATMEL=y +CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 268a485456..f703f5f39b 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -40,6 +40,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_SF_TEST=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y @@ -59,6 +60,7 @@ CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_AT91_SAM9X60_USB=y CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y @@ -85,6 +87,8 @@ CONFIG_PHY_MICREL=y CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -95,6 +99,11 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y +CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index a9cbb6e953..ff653090f7 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y CONFIG_CMD_SF_TEST=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y @@ -61,6 +62,7 @@ CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_AT91_SAM9X60_USB=y CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y @@ -87,6 +89,8 @@ CONFIG_PHY_MICREL=y CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -97,6 +101,11 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y +CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 72f08f1375..3e8277e39a 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -41,6 +41,7 @@ CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y CONFIG_CMD_NAND_TRIMFFS=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_BOOTP_BOOTFILESIZE=y @@ -61,6 +62,7 @@ CONFIG_CLK_CCF=y CONFIG_CLK_AT91=y CONFIG_AT91_GENERIC_CLK=y CONFIG_AT91_SAM9X60_PLL=y +CONFIG_AT91_SAM9X60_USB=y CONFIG_CPU=y CONFIG_AT91_GPIO=y CONFIG_DM_I2C=y @@ -86,6 +88,8 @@ CONFIG_PHY_MICREL=y CONFIG_MACB=y CONFIG_PINCTRL=y CONFIG_PINCTRL_AT91=y +CONFIG_DM_RESET=y +CONFIG_RESET_AT91=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_ATMEL_USART=y @@ -96,6 +100,11 @@ CONFIG_SYSRESET=y CONFIG_SYSRESET_AT91=y CONFIG_TIMER=y CONFIG_ATMEL_PIT_TIMER=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_ATMEL=y +CONFIG_USB_STORAGE=y CONFIG_W1=y CONFIG_W1_GPIO=y CONFIG_W1_EEPROM=y -- 2.34.1
[PATCH v5 15/19] ARM: dts: at91: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
Add the pinctrl nodes required by the USB related DT nodes.
Signed-off-by: Sergiu Moga
---
v1 -> v5:
- No change
arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
index eec183d5de..6d4b35ea96 100644
--- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
@@ -143,7 +143,32 @@
pinmux = ;
bias-pull-up;
};
+
+ pinctrl_usb_default: usb_default {
+ pinmux = ;
+ bias-disable;
+ };
+
+ pinctrl_usba_vbus: usba_vbus {
+ pinmux = ;
+ bias-disable;
+ };
};
};
};
};
+
+&usb1 {
+ num-ports = <3>;
+ atmel,vbus-gpio = <0
+ &pioA PIN_PA10 GPIO_ACTIVE_HIGH
+ 0
+ >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};
--
2.34.1
[PATCH v5 14/19] ARM: dts: at91: sama5d2_icp: Add pinctrl nodes for USB related DT nodes
Add the pinctrl subnodes required by the USB related DT nodes.
Signed-off-by: Sergiu Moga
---
v1 -> v5:
- No change
arch/arm/dts/at91-sama5d2_icp.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/at91-sama5d2_icp.dts
b/arch/arm/dts/at91-sama5d2_icp.dts
index 2dffae9c5c..4f796c6c94 100644
--- a/arch/arm/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/dts/at91-sama5d2_icp.dts
@@ -154,7 +154,29 @@
;
bias-disable;
};
+
+ pinctrl_usb_default: usb_default {
+ pinmux = ;
+ bias-disable;
+ };
+
+ pinctrl_usba_vbus: usba_vbus {
+ pinmux = ;
+ bias-disable;
+ };
};
};
};
};
+
+&usb1 {
+ num-ports = <3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+};
+
+&usb2 {
+ phy_type = "hsic";
+ status = "okay";
+};
--
2.34.1
[PATCH v5 13/19] usb: ohci-at91: Add USB PHY functionality
Add the ability to enable/disable whatever USB PHY's are
passed to the AT91 OHCI driver through DT.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
v1 -> v5:
- No change
drivers/usb/host/ohci-at91.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 9ae55c6e5d..586de2798a 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -74,6 +74,10 @@ int usb_cpu_init_fail(void)
#include
#include "ohci.h"
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+#include
+#endif
+
#define AT91_MAX_USBH_PORTS3
#define at91_for_each_port(index) \
@@ -90,6 +94,10 @@ struct ohci_at91_priv {
struct clk *fclk;
struct clk *hclk;
bool clocked;
+
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ struct phy phy[AT91_MAX_USBH_PORTS];
+#endif
};
static void at91_start_clock(struct ohci_at91_priv *ohci_at91)
@@ -97,6 +105,13 @@ static void at91_start_clock(struct ohci_at91_priv
*ohci_at91)
if (ohci_at91->clocked)
return;
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ int i;
+
+ at91_for_each_port(i)
+ generic_phy_power_on(&ohci_at91->phy[i]);
+#endif
+
clk_set_rate(ohci_at91->fclk, 4800);
clk_prepare_enable(ohci_at91->hclk);
clk_prepare_enable(ohci_at91->iclk);
@@ -109,6 +124,13 @@ static void at91_stop_clock(struct ohci_at91_priv
*ohci_at91)
if (!ohci_at91->clocked)
return;
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ int i;
+
+ at91_for_each_port(i)
+ generic_phy_power_off(&ohci_at91->phy[i]);
+#endif
+
clk_disable_unprepare(ohci_at91->fclk);
clk_disable_unprepare(ohci_at91->iclk);
clk_disable_unprepare(ohci_at91->hclk);
@@ -214,6 +236,14 @@ static int ohci_atmel_probe(struct udevice *dev)
goto fail;
}
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+ at91_for_each_port(i) {
+ generic_phy_get_by_index(dev, i, &ohci_at91->phy[i]);
+ generic_phy_init(&ohci_at91->phy[i]);
+ generic_phy_configure(&ohci_at91->phy[i], NULL);
+ }
+#endif
+
at91_start_hc(dev);
return ohci_register(dev, regs);
@@ -228,6 +258,7 @@ fail:
static const struct udevice_id ohci_usb_ids[] = {
{ .compatible = "atmel,at91rm9200-ohci", },
+ { .compatible = "microchip,sama7g5-ohci", },
{ }
};
--
2.34.1
[PATCH v5 12/19] phy: at91: Add support for the USB 2.0 PHY's of SAMA7
In order to have USB functionality, drivers for SAMA7's
USB 2.0 PHY's have been added. There is one driver
for UTMI clock's SFR and RESET required functionalities and
one for its three possible subclocks of the phy's themselves.
In order for this layout to properly work in conjunction with
CCF and DT, the former driver will also act as a clock provider
for the three phy's with the help of a custom hook into the
driver's of_xlate method.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
---
v1 -> v3:
- No change
v3 -> v4:
- Remove unnecessary `sama7_phy->sfr = NULL;` in sama7 usb phy driver
v4 -> v5:
- Fix warning regarding non-static function declarations
drivers/phy/Kconfig | 10 ++
drivers/phy/Makefile | 1 +
drivers/phy/phy-sama7-usb.c | 90 ++
drivers/phy/phy-sama7-utmi-clk.c | 202 +++
4 files changed, 303 insertions(+)
create mode 100644 drivers/phy/phy-sama7-usb.c
create mode 100644 drivers/phy/phy-sama7-utmi-clk.c
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index cf4d5908d7..9fbb956783 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -281,6 +281,16 @@ config PHY_XILINX_ZYNQMP
Enable this to support ZynqMP High Speed Gigabit Transceiver
that is part of ZynqMP SoC.
+config PHY_MICROCHIP_SAMA7_USB
+ tristate "Microchip SAMA7 USB 2.0 PHY"
+ depends on PHY && ARCH_AT91
+ help
+Enable this to support SAMA7 USB 2.0 PHY.
+
+The USB 2.0 PHY integrates high-speed, full-speed and low-speed
+termination and signal switching. With a single resistor, it
+requires minimal external components.
+
source "drivers/phy/rockchip/Kconfig"
source "drivers/phy/cadence/Kconfig"
source "drivers/phy/ti/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a3b9f3c5b1..9d50affd47 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o
+obj-$(CONFIG_PHY_MICROCHIP_SAMA7_USB) += phy-sama7-utmi-clk.o phy-sama7-usb.o
obj-y += cadence/
obj-y += ti/
obj-y += qcom/
diff --git a/drivers/phy/phy-sama7-usb.c b/drivers/phy/phy-sama7-usb.c
new file mode 100644
index 00..200324d812
--- /dev/null
+++ b/drivers/phy/phy-sama7-usb.c
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip USB PHY's.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct sama7_usb_phy {
+ struct clk *uclk;
+ struct regmap *sfr;
+ int port;
+};
+
+static int sama7_usb_phy_init(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+ int port = sama7_phy->port;
+
+ regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+ SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X,
+ SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X);
+
+ regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+ SAMA7_SFR_UTMI_RX_VBUS,
+ SAMA7_SFR_UTMI_RX_VBUS);
+
+ return 0;
+}
+
+static int sama7_phy_power_on(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+ clk_prepare_enable(sama7_phy->uclk);
+
+ return 0;
+}
+
+static int sama7_phy_power_off(struct phy *phy)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+ clk_disable_unprepare(sama7_phy->uclk);
+
+ return 0;
+}
+
+static int sama7_usb_phy_probe(struct udevice *dev)
+{
+ struct sama7_usb_phy *sama7_phy = dev_get_priv(dev);
+
+ sama7_phy->uclk = devm_clk_get(dev, "utmi_clk");
+ if (IS_ERR(sama7_phy->uclk))
+ return PTR_ERR(sama7_phy->uclk);
+
+ sama7_phy->sfr = syscon_regmap_lookup_by_phandle(dev, "sfr-phandle");
+ if (IS_ERR(sama7_phy->sfr))
+ return PTR_ERR(sama7_phy->sfr);
+
+ return dev_read_u32(dev, "reg", &sama7_phy->port);
+}
+
+static const struct phy_ops sama7_usb_phy_ops = {
+ .init = sama7_usb_phy_init,
+ .power_on = sama7_phy_power_on,
+ .power_off = sama7_phy_power_off,
+};
+
+static const struct udevice_id sama7_usb_phy_of_match[] = {
+ { .compatible = "microchip,sama7g5-usb-phy", },
+ { },
+};
+
+U_BOOT_DRIVER(sama7_usb_phy_driver) = {
+ .name = "sama7-usb-phy",
+ .id = UCLASS_PHY,
+ .of_match = sama7_usb_phy_of_match,
+ .ops = &sama7_usb_phy_ops,
+ .probe = sama7_usb_phy_probe,
+ .priv_auto = sizeof(struct sama7_usb_phy),
+};
diff --git a/drivers/phy/phy-sama7-utmi-clk.c b/drivers/phy/phy-sama7-utmi-clk.c
new file mode 100644
index 00..ab9fddccf6
--- /dev/null
+
[PATCH v5 11/19] reset: at91: Add reset driver for basic assert/deassert operations
Add support for at91 reset controller's basic assert/deassert
operations. Since this driver conflicts with the
SYSRESET driver because they both bind to the same RSTC node,
implement a custom bind hook that would manually bind the
sysreset driver, if enabled, to the same RSTC DT node.
Furthermore, delete the no longer needed compatibles from the
SYSRESET driver and rename it to make sure than any possible
conflicts are avoided.
Signed-off-by: Sergiu Moga
Tested-by: Mihai Sain
Reviewed-by: Claudiu Beznea
---
v1 -> v5:
- No change
drivers/reset/Kconfig| 8 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-at91.c | 141 +++
drivers/sysreset/sysreset_at91.c | 10 +--
4 files changed, 151 insertions(+), 9 deletions(-)
create mode 100644 drivers/reset/reset-at91.c
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 4cb0ba0850..e4039d7474 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -211,4 +211,12 @@ config RESET_DRA7
help
Support for TI DRA7-RESET subsystem. Basic Assert/Deassert
is supported.
+
+config RESET_AT91
+ bool "Enable support for Microchip/Atmel Reset Controller driver"
+ depends on DM_RESET && ARCH_AT91
+ help
+ This enables the Reset Controller driver support for Microchip/Atmel
+ SoCs. Mainly used to expose assert/deassert methods to other drivers
+ that require it.
endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0620b62809..6c8b45ecba 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o
obj-$(CONFIG_RESET_DRA7) += reset-dra7.o
+obj-$(CONFIG_RESET_AT91) += reset-at91.o
diff --git a/drivers/reset/reset-at91.c b/drivers/reset/reset-at91.c
new file mode 100644
index 00..165c87acdc
--- /dev/null
+++ b/drivers/reset/reset-at91.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip Reset Controller.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct at91_reset {
+ void __iomem *dev_base;
+ struct at91_reset_data *data;
+};
+
+struct at91_reset_data {
+ u32 n_device_reset;
+ u8 device_reset_min_id;
+ u8 device_reset_max_id;
+};
+
+static const struct at91_reset_data sama7g5_data = {
+ .n_device_reset = 3,
+ .device_reset_min_id = SAMA7G5_RESET_USB_PHY1,
+ .device_reset_max_id = SAMA7G5_RESET_USB_PHY3,
+};
+
+static int at91_rst_update(struct at91_reset *reset, unsigned long id,
+ bool assert)
+{
+ u32 val;
+
+ if (!reset->dev_base)
+ return 0;
+
+ val = readl(reset->dev_base);
+ if (assert)
+ val |= BIT(id);
+ else
+ val &= ~BIT(id);
+ writel(val, reset->dev_base);
+
+ return 0;
+}
+
+static int at91_reset_of_xlate(struct reset_ctl *reset_ctl,
+ struct ofnode_phandle_args *args)
+{
+ struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+ if (!reset->data->n_device_reset ||
+ args->args[0] < reset->data->device_reset_min_id ||
+ args->args[0] > reset->data->device_reset_max_id)
+ return -EINVAL;
+
+ reset_ctl->id = args->args[0];
+
+ return 0;
+}
+
+static int at91_rst_assert(struct reset_ctl *reset_ctl)
+{
+ struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+ return at91_rst_update(reset, reset_ctl->id, true);
+}
+
+static int at91_rst_deassert(struct reset_ctl *reset_ctl)
+{
+ struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+ return at91_rst_update(reset, reset_ctl->id, false);
+}
+
+struct reset_ops at91_reset_ops = {
+ .of_xlate = at91_reset_of_xlate,
+ .rst_assert = at91_rst_assert,
+ .rst_deassert = at91_rst_deassert,
+};
+
+static int at91_reset_probe(struct udevice *dev)
+{
+ struct at91_reset *reset = dev_get_priv(dev);
+ struct clk sclk;
+ int ret;
+
+ reset->data = (struct at91_reset_data *)dev_get_driver_data(dev);
+ reset->dev_base = dev_remap_addr_index(dev, 1);
+ if (reset->data && reset->data->n_device_reset && !reset->dev_base)
+ return -EINVAL;
+
+ ret = clk_get_by_index(dev, 0, &sclk);
+ if (ret)
+ return ret;
+
+ return clk_prepare_enable(&sclk);
+}
+
+static int at91_reset_bind(struct udevice *dev)
+{
+ struct udevice *at91_sysreset;
+
+ if (CONFIG_IS_ENABLED(SYSRESET_AT91))
+ return device_bind_driver_to_node(dev, "at91_sysreset",
+ "at91_sysreset",
+
[PATCH v5 10/19] ARM: at91: add sama7 SFR definitions
From: Cristian Birsan Special Function Registers(SFR) definitions for SAMA7 product family. Signed-off-by: Cristian Birsan Signed-off-by: Sergiu Moga --- v1 -> v5: - No change arch/arm/mach-at91/include/mach/sama7-sfr.h | 59 + 1 file changed, 59 insertions(+) create mode 100644 arch/arm/mach-at91/include/mach/sama7-sfr.h diff --git a/arch/arm/mach-at91/include/mach/sama7-sfr.h b/arch/arm/mach-at91/include/mach/sama7-sfr.h new file mode 100644 index 00..a987ff5465 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/sama7-sfr.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Microchip SFR (Special Function Registers) registers for SAMA7 family. + * + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries + * + * Author: Cristian Birsan + */ + +#ifndef _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H +#define _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H + +#define SAMA7_SFR_OHCIICR 0x00/* OHCI INT Configuration Register */ +#define SAMA7_SFR_OHCIISR 0x04/* OHCI INT Status Register */ +/* 0x08 ~ 0xe3: Reserved */ +#define SAMA7_SFR_WPMR 0xe4/* Write Protection Mode Register */ +#define SAMA7_SFR_WPSR 0xe4/* Write Protection Status Register */ +/* 0xec ~ 0x200b: Reserved */ +#define SAMA7_SFR_DEBUG0x200c /* Debug Register */ + +/* 0x2010 ~ 0x2027: Reserved */ +#define SAMA7_SFR_EHCIOHCI 0x2020 /* EHCI OHCI Clock Configuration Reg */ + +#define SAMA7_SFR_HSS_AXI_QOS 0x2028 /* HSS AXI QOS Register */ +#define SAMA7_SFR_UDDRC0x202c /* UDDRC Register */ +#define SAMA7_SFR_CAN_SRAM_SEL 0x2030 /* CAN SRAM Select. Register */ +/* 0x2034 ~ 0x203f: Reserved */ + +#define SAMA7_SFR_UTMI00x2040 +#define SAMA7_SFR_UTMI0R(x)(SAMA7_SFR_UTMI0 + 4 * (x)) + +#define SAMA7_SFR_UTMI0R0 0x2040 /* UTMI0 Configuration Register */ +#define SAMA7_SFR_UTMI0R1 0x2044 /* UTMI1 Configuration Register */ +#define SAMA7_SFR_UTMI0R2 0x2048 /* UTMI2 Configuration Register */ + +/* Field definitions */ +#define SAMA7_SFR_OHCIICR_ARIE BIT(0) +#define SAMA7_SFR_OHCIICR_APPSTART BIT(1) +#define SAMA7_SFR_OHCIICR_USB_SUSP(x) BIT(8 + (x)) +#define SAMA7_SFR_OHCIICR_USB_SUSPEND GENMASK(10, 8) + +#define SAMA7_SFR_OHCIISR_RIS(x) BIT(x) + +#define SAMA7_SFR_WPMR_WPENBIT(0) +#define SAMA7_SFR_WPMR_KEY 0x53465200 /* SFR in ASCII*/ +#define SAMA7_SFR_WPMR_WPKEY_MASK GENMASK(31, 8) + +#define SAMA7_SFR_WPSR_WPSRC_MASK GENMASK(23, 8) +#define SAMA7_SFR_WPSR_WPVS_MASK BIT(0) + +#define SAMA7_SFR_CAN_SRAM_UPPER(x)BIT(x) + +#define SAMA7_SFR_UTMI_RX_VBUS BIT(25) /* VBUS Valid bit */ +#define SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X BIT(23) /* TXPREEMPAMPTUNE 1x */ +#define SAMA7_SFR_UTMI_COMMONONBIT(3) /* PLL Common ON bit */ + +#define SAMA7_SFR_EHCIOHCI_PHYCLK BIT(1) /* Alternate PHY Clk */ + +#endif /* _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H */ -- 2.34.1
[PATCH v5 09/19] ARM: dts: at91: sama7: Add USB related DT nodes
Add the USB related DT nodes for the sama7g5ek board.
Signed-off-by: Sergiu Moga
---
v1 -> v5:
- No change
arch/arm/dts/at91-sama7g5ek.dts | 34 +++
arch/arm/dts/sama7g5.dtsi | 73 +
2 files changed, 107 insertions(+)
diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts
index 9b247fcaf6..31adc4d3e7 100644
--- a/arch/arm/dts/at91-sama7g5ek.dts
+++ b/arch/arm/dts/at91-sama7g5ek.dts
@@ -761,6 +761,11 @@
pinmux = ;
bias-disable;
};
+
+ pinctrl_usb_default: usb_default {
+ pinmux = ;
+ bias-disable;
+ };
};
&pwm {
@@ -837,6 +842,35 @@
status = "okay";
};
+&usb2 {
+ num-ports = <3>;
+ atmel,vbus-gpio = <0
+ 0
+ &pioA PIN_PC6 GPIO_ACTIVE_HIGH
+ >;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
+ phys = <&usb_phy2>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+&usb3 {
+ status = "okay";
+};
+
+&usb_phy0 {
+ status = "okay";
+};
+
+&usb_phy1 {
+ status = "okay";
+};
+
+&usb_phy2 {
+ status = "okay";
+};
+
&vddout25 {
vin-supply = <&vdd_3v3>;
status = "okay";
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 6388a60e53..a6521aaa82 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -16,6 +16,8 @@
#include
#include
#include
+#include
+#include
/ {
model = "Microchip SAMA7G5 family SoC";
@@ -103,6 +105,54 @@
};
};
+ utmi_clk: utmi-clk {
+ compatible = "microchip,sama7g5-utmi-clk";
+ sfr-phandle = <&sfr>;
+ #clock-cells = <1>;
+ clocks = <&pmc PMC_TYPE_CORE 27>;
+ clock-names = "utmi_clk";
+ resets = <&reset_controller SAMA7G5_RESET_USB_PHY1>,
+<&reset_controller SAMA7G5_RESET_USB_PHY2>,
+<&reset_controller SAMA7G5_RESET_USB_PHY3>;
+ reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
+ };
+
+ utmi {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usb_phy0: phy@0 {
+ compatible = "microchip,sama7g5-usb-phy";
+ sfr-phandle = <&sfr>;
+ reg = <0>;
+ clocks = <&utmi_clk UTMI1>;
+ clock-names = "utmi_clk";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb_phy1: phy@1 {
+ compatible = "microchip,sama7g5-usb-phy";
+ sfr-phandle = <&sfr>;
+ reg = <1>;
+ clocks = <&utmi_clk UTMI2>;
+ clock-names = "utmi_clk";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb_phy2: phy@2 {
+ compatible = "microchip,sama7g5-usb-phy";
+ sfr-phandle = <&sfr>;
+ reg = <2>;
+ clocks = <&utmi_clk UTMI3>;
+ clock-names = "utmi_clk";
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
+
vddout25: fixed-regulator-vddout25 {
compatible = "regulator-fixed";
@@ -127,6 +177,24 @@
#size-cells = <1>;
ranges;
+ usb2: ohci@40 {
+ compatible = "microchip,sama7g5-ohci", "usb-ohci";
+ reg = <0x0040 0x10>;
+ interrupts = ;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 106>, <&utmi_clk
UTMI1>, <&usb_clk>;
+ clock-names = "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+
+ usb3: ehci@50 {
+ compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+ reg = <0x0050 0x10>;
+ interrupts = ;
+ clocks = <&usb_clk>, <&pmc PMC_TYPE_PERIPHERAL 106>;
+ clock-names = "usb_clk", "ehci_clk";
+ status = "disabled";
+ };
+
nfc_sram: sram@60 {
compatible = "mmio-sram";
no-memory-wc;
@@ -559,6 +627,11 @@
status = "disabled";
};
+ sfr: sfr@e1624000 {
+ compatible = "microchip,sama7g5-sfr", "syscon";
+ reg = <0xe1624000 0x4000>;
+ };
+
eic: interrupt-controller@e1628000 {
[PATCH v5 08/19] dt-bindings: clk: at91: Define additional UTMI related clocks
Add definitions for an additional main UTMI clock as well as its respective subclocks. Signed-off-by: Sergiu Moga --- v1 -> v5: - No change include/dt-bindings/clk/at91.h | 5 + 1 file changed, 5 insertions(+) diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clk/at91.h index e30756b280..386f01cf31 100644 --- a/include/dt-bindings/clk/at91.h +++ b/include/dt-bindings/clk/at91.h @@ -18,5 +18,10 @@ #define PMC_TYPE_PERIPHERAL3 #define PMC_TYPE_GCK 4 #define PMC_TYPE_SLOW 5 +#define UTMI 6 + +#define UTMI1 0 +#define UTMI2 1 +#define UTMI3 2 #endif -- 2.34.1
[PATCH v5 07/19] dt-bindings: reset: add sama7g5 definitions
Upstream linux commit 5994f58977e0. Add reset bindings for SAMA7G5. At the moment only USB PHYs are included. Signed-off-by: Sergiu Moga --- v1 -> v5: - No change include/dt-bindings/reset/sama7g5-reset.h | 10 ++ 1 file changed, 10 insertions(+) create mode 100644 include/dt-bindings/reset/sama7g5-reset.h diff --git a/include/dt-bindings/reset/sama7g5-reset.h b/include/dt-bindings/reset/sama7g5-reset.h new file mode 100644 index 00..2116f41d04 --- /dev/null +++ b/include/dt-bindings/reset/sama7g5-reset.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +#ifndef __DT_BINDINGS_RESET_SAMA7G5_H +#define __DT_BINDINGS_RESET_SAMA7G5_H + +#define SAMA7G5_RESET_USB_PHY1 4 +#define SAMA7G5_RESET_USB_PHY2 5 +#define SAMA7G5_RESET_USB_PHY3 6 + +#endif /* __DT_BINDINGS_RESET_SAMA7G5_H */ -- 2.34.1
[PATCH v5 06/19] usb: ohci-at91: Enable OHCI functionality and register into DM
Register the OHCI driver into DM by properly initializing the required
clocks and pins required by the DT node of OHCI. In order for the VBUS
to stay enabled, a `child_pre_probe` method has been added to overcome
the DM core disabling it in `usb_scan_device`: when the generic
`device_probe` method is called, the pinctrl is processed once again,
undoing whatever changes have been made in our driver's probe method.
Signed-off-by: Sergiu Moga
---
v1 -> v2:
- Move ` #include ` below `#if !(CONFIG_IS_ENABLED(DM_USB))` to
avoid implicit declarations warnings/errors
v2 -> v4:
- No change
v4 -> v5:
- use `dm_gpio_is_valid` in probe method's error handling code block
drivers/usb/host/ohci-at91.c | 183 +++
1 file changed, 183 insertions(+)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 9b955c1bd6..9ae55c6e5d 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -5,6 +5,9 @@
*/
#include
+
+#if !(CONFIG_IS_ENABLED(DM_USB))
+
#include
int usb_cpu_init(void)
@@ -62,3 +65,183 @@ int usb_cpu_init_fail(void)
{
return usb_cpu_stop();
}
+
+#elif CONFIG_IS_ENABLED(DM_GPIO)
+
+#include
+#include
+#include
+#include
+#include "ohci.h"
+
+#define AT91_MAX_USBH_PORTS3
+
+#define at91_for_each_port(index) \
+ for ((index) = 0; (index) < AT91_MAX_USBH_PORTS; (index)++)
+
+struct at91_usbh_data {
+ enum usb_init_type init_type;
+ struct gpio_desc vbus_pin[AT91_MAX_USBH_PORTS];
+ u8 ports; /* number of ports on root hub
*/
+};
+
+struct ohci_at91_priv {
+ struct clk *iclk;
+ struct clk *fclk;
+ struct clk *hclk;
+ bool clocked;
+};
+
+static void at91_start_clock(struct ohci_at91_priv *ohci_at91)
+{
+ if (ohci_at91->clocked)
+ return;
+
+ clk_set_rate(ohci_at91->fclk, 4800);
+ clk_prepare_enable(ohci_at91->hclk);
+ clk_prepare_enable(ohci_at91->iclk);
+ clk_prepare_enable(ohci_at91->fclk);
+ ohci_at91->clocked = true;
+}
+
+static void at91_stop_clock(struct ohci_at91_priv *ohci_at91)
+{
+ if (!ohci_at91->clocked)
+ return;
+
+ clk_disable_unprepare(ohci_at91->fclk);
+ clk_disable_unprepare(ohci_at91->iclk);
+ clk_disable_unprepare(ohci_at91->hclk);
+ ohci_at91->clocked = false;
+}
+
+static void ohci_at91_set_power(struct at91_usbh_data *pdata, int port,
+ bool enable)
+{
+ if (!dm_gpio_is_valid(&pdata->vbus_pin[port]))
+ return;
+
+ if (enable)
+ dm_gpio_set_dir_flags(&pdata->vbus_pin[port],
+ GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+ else
+ dm_gpio_set_dir_flags(&pdata->vbus_pin[port], 0);
+}
+
+static void at91_start_hc(struct udevice *dev)
+{
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+ at91_start_clock(ohci_at91);
+}
+
+static void at91_stop_hc(struct udevice *dev)
+{
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+ at91_stop_clock(ohci_at91);
+}
+
+static int ohci_atmel_deregister(struct udevice *dev)
+{
+ struct at91_usbh_data *pdata = dev_get_plat(dev);
+ int i;
+
+ at91_stop_hc(dev);
+
+ at91_for_each_port(i) {
+ if (i >= pdata->ports)
+ break;
+
+ ohci_at91_set_power(pdata, i, false);
+ }
+
+ return ohci_deregister(dev);
+}
+
+static int ohci_atmel_child_pre_probe(struct udevice *dev)
+{
+ struct udevice *ohci_controller = dev_get_parent(dev);
+ struct at91_usbh_data *pdata = dev_get_plat(ohci_controller);
+ int i;
+
+ at91_for_each_port(i) {
+ if (i >= pdata->ports)
+ break;
+
+ ohci_at91_set_power(pdata, i, true);
+ }
+
+ return 0;
+}
+
+static int ohci_atmel_probe(struct udevice *dev)
+{
+ struct at91_usbh_data *pdata = dev_get_plat(dev);
+ struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+ int i;
+ int ret;
+ u32 ports;
+ struct ohci_regs *regs = (struct ohci_regs *)dev_read_addr(dev);
+
+ if (!dev_read_u32(dev, "num-ports", &ports))
+ pdata->ports = ports;
+
+ at91_for_each_port(i) {
+ if (i >= pdata->ports)
+ break;
+
+ gpio_request_by_name(dev, "atmel,vbus-gpio", i,
+&pdata->vbus_pin[i], GPIOD_IS_OUT |
+GPIOD_IS_OUT_ACTIVE);
+ }
+
+ ohci_at91->iclk = devm_clk_get(dev, "ohci_clk");
+ if (IS_ERR(ohci_at91->iclk)) {
+ ret = PTR_ERR(ohci_at91->iclk);
+ goto fail;
+ }
+
+ ohci_at91->fclk = devm_clk_get(dev, "uhpck");
+ if (IS_ERR(ohci_at91->fclk)) {
+
[PATCH v5 05/19] clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates
In order for some of the functionalities, such as the USB clocks,
to work properly we need some clocks to be properly initialised
at the very beginning of booting.
Signed-off-by: Sergiu Moga
---
v1 -> v2:
- Adapted according to the additional 04/19 PATCH, now making use of
`at91_clk_setup`
v2 -> v5:
- No change
drivers/clk/at91/sam9x60.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 14c2ffcac1..e2f72446d5 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -378,6 +378,31 @@ static const struct {
{ .n = "dbgu_gclk", .id = 47, },
};
+/**
+ * Clock setup description
+ * @cid: clock id corresponding to clock subsystem
+ * @pid: parent clock id corresponding to clock subsystem
+ * @rate: clock rate
+ * @prate: parent rate
+ */
+static const struct pmc_clk_setup sam9x60_clk_setup[] = {
+ {
+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_FRAC),
+ .rate = 96000,
+ },
+
+ {
+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
+ .rate = 48000,
+ },
+
+ {
+ .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK),
+ .pid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
+ .rate = 4800,
+ },
+};
+
#define prepare_mux_table(_allocs, _index, _dst, _src, _num, _label) \
do {\
int _i; \
@@ -668,6 +693,11 @@ static int sam9x60_clk_probe(struct udevice *dev)
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_GCK, sam9x60_gck[i].id), c);
}
+ /* Setup clocks. */
+ ret = at91_clk_setup(sam9x60_clk_setup, ARRAY_SIZE(sam9x60_clk_setup));
+ if (ret)
+ goto fail;
+
return 0;
fail:
--
2.34.1
[PATCH v5 04/19] clk: at91: pmc: export clock setup to pmc
From: Claudiu Beznea
Clock setup was intended for setting clocks at boot time on SAMA7G5,
e.g. for root clocks like PLLs, that were used to feed IPs needed alive
in u-boot (e.g. Ethernet clock feed by a PLL). Export this functionality
to all at91 clocks as it may be necessary on other SoCs.
Signed-off-by: Claudiu Beznea
Signed-off-by: Sergiu Moga
---
v1 -> v2:
- Additional patch, this was not here in v1
v2 -> v5:
- No change
drivers/clk/at91/pmc.c | 42 +
drivers/clk/at91/pmc.h | 16 +
drivers/clk/at91/sama7g5.c | 48 +-
3 files changed, 64 insertions(+), 42 deletions(-)
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index 270892517a..87d2069d89 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c
@@ -120,3 +120,45 @@ int at91_clk_mux_index_to_val(const u32 *table, u32
num_parents, u32 index)
return table[index];
}
+
+int at91_clk_setup(const struct pmc_clk_setup *setup, int size)
+{
+ struct clk *c, *parent;
+ int i, ret;
+
+ if (!size)
+ return 0;
+
+ if (!setup)
+ return -EINVAL;
+
+ for (i = 0; i < size; i++) {
+ ret = clk_get_by_id(setup[i].cid, &c);
+ if (ret)
+ return ret;
+
+ if (setup[i].pid) {
+ ret = clk_get_by_id(setup[i].pid, &parent);
+ if (ret)
+ return ret;
+
+ ret = clk_set_parent(c, parent);
+ if (ret)
+ return ret;
+
+ if (setup[i].prate) {
+ ret = clk_set_rate(parent, setup[i].prate);
+ if (ret < 0)
+ return ret;
+ }
+ }
+
+ if (setup[i].rate) {
+ ret = clk_set_rate(c, setup[i].rate);
+ if (ret < 0)
+ return ret;
+ }
+ }
+
+ return 0;
+}
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 17793b8802..ff464522aa 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -77,6 +77,20 @@ struct clk_usbck_layout {
u32 usbdiv_mask;
};
+/**
+ * Clock setup description
+ * @cid: clock id corresponding to clock subsystem
+ * @pid: parent clock id corresponding to clock subsystem
+ * @rate: clock rate
+ * @prate: parent rate
+ */
+struct pmc_clk_setup {
+ unsigned int cid;
+ unsigned int pid;
+ unsigned long rate;
+ unsigned long prate;
+};
+
extern const struct clk_programmable_layout at91rm9200_programmable_layout;
extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
@@ -160,4 +174,6 @@ void pmc_write(void __iomem *base, unsigned int off,
unsigned int val);
void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask,
unsigned int bits);
+int at91_clk_setup(const struct pmc_clk_setup *setup, int size);
+
#endif
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index d1ec3c82b5..8bd9c14156 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1070,19 +1070,8 @@ static const struct {
},
};
-/**
- * Clock setup description
- * @cid: clock id corresponding to clock subsystem
- * @pid: parent clock id corresponding to clock subsystem
- * @rate: clock rate
- * @prate: parent rate
- */
-static const struct pmc_clk_setup {
- unsigned int cid;
- unsigned int pid;
- unsigned long rate;
- unsigned long prate;
-} sama7g5_clk_setup[] = {
+/* Clock setup description */
+static const struct pmc_clk_setup sama7g5_clk_setup[] = {
{
.cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_ETH_FRAC),
.rate = 62500,
@@ -1119,7 +1108,7 @@ static int sama7g5_clk_probe(struct udevice *dev)
unsigned int *muxallocs[SAMA7G5_MAX_MUX_ALLOCS];
const char *p[10];
unsigned int cm[10], m[10], *tmpclkmux, *tmpmux;
- struct clk clk, *c, *parent;
+ struct clk clk, *c;
bool main_osc_bypass;
int ret, muxallocindex = 0, clkmuxallocindex = 0, i, j;
@@ -1353,34 +1342,9 @@ static int sama7g5_clk_probe(struct udevice *dev)
}
/* Setup clocks. */
- for (i = 0; i < ARRAY_SIZE(sama7g5_clk_setup); i++) {
- ret = clk_get_by_id(sama7g5_clk_setup[i].cid, &c);
- if (ret)
- goto fail;
-
- if (sama7g5_clk_setup[i].pid) {
- ret = clk_get_by_id(sama7g5_clk_setup[i].pid, &parent);
- if (ret)
- goto fail;
-
-
[PATCH v5 03/19] clk: at91: sam9x60: Register the required clocks for USB
Register into DM the clocks required to properly enable USB functionality
within the bootloader.
Signed-off-by: Sergiu Moga
---
v1 -> v2:
- No change
v2 -> v3:
- Remove the no longer required #if CONFIG_IS_ENABLED(AT91_SAM9X60_USB)
v3 -> v5:
- No change
drivers/clk/at91/sam9x60.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 6b5486c6c9..14c2ffcac1 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -76,6 +76,8 @@ enum pmc_clk_ids {
ID_QSPI = 18,
ID_MCK_PRES = 19,
+ ID_USBCK= 20,
+ ID_UHPCK= 21,
ID_MAX,
};
@@ -99,6 +101,7 @@ static const char *clk_names[] = {
[ID_PLL_A_DIV] = "plla_divpmcck",
[ID_MCK_PRES] = "mck_pres",
[ID_MCK_DIV]= "mck_div",
+ [ID_USBCK] = "usbck",
};
/* Fractional PLL output range. */
@@ -171,6 +174,13 @@ static const struct clk_pcr_layout pcr_layout = {
.pid_mask = GENMASK(6, 0),
};
+/* USB clock layout */
+static const struct clk_usbck_layout usbck_layout = {
+ .offset = 0x38,
+ .usbs_mask = GENMASK(1, 0),
+ .usbdiv_mask = GENMASK(11, 8),
+};
+
/**
* PLL clocks description
* @n: clock name
@@ -266,6 +276,7 @@ static const struct {
u8 cid;
} sam9x60_systemck[] = {
{ .n = "ddrck", .p = "mck_div", .id = 2, .cid = ID_DDR, },
+ { .n = "uhpck", .p = "usbck",.id = 6, .cid = ID_UHPCK },
{ .n = "pck0", .p = "prog0",.id = 8, .cid = ID_PCK0, },
{ .n = "pck1", .p = "prog1",.id = 9, .cid = ID_PCK1, },
{ .n = "qspick",.p = "mck_div", .id = 19, .cid = ID_QSPI, },
@@ -543,6 +554,28 @@ static int sam9x60_clk_probe(struct udevice *dev)
}
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV), c);
+ /* Register usbck. */
+ p[0] = clk_names[ID_PLL_A_DIV];
+ p[1] = clk_names[ID_PLL_U_DIV];
+ p[2] = clk_names[ID_MAIN_XTAL];
+ m[0] = 0;
+ m[1] = 1;
+ m[2] = 2;
+ cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV);
+ cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
+ cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAIN_XTAL);
+ prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm,
+ 3, fail);
+ prepare_mux_table(muxallocs, muxallocindex, tmpmux, m, 3, fail);
+ c = sam9x60_clk_register_usb(base, clk_names[ID_USBCK], p, 3,
+&usbck_layout, tmpclkmux, tmpmux,
+ID_USBCK);
+ if (IS_ERR(c)) {
+ ret = PTR_ERR(c);
+ goto fail;
+ }
+ clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK), c);
+
/* Register programmable clocks. */
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
--
2.34.1
[PATCH v5 02/19] clk: at91: Add support for sam9x60 USB clock
Implement sam9x60 USB clock driver. This clock has
three parents: PLLA, UPLL and MAINXTAL. The driver is
aware of the three possible parents with the help of the
two mux tables provied to the driver during the registration
of the clock.
Signed-off-by: Sergiu Moga
---
v1 -> v4:
- No change
v4 -> v5:
- fix warning regarding below 0 check on unsigned variable
drivers/clk/at91/Kconfig | 7 ++
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-sam9x60-usb.c | 157 +
drivers/clk/at91/pmc.h | 11 ++
4 files changed, 176 insertions(+)
create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c
diff --git a/drivers/clk/at91/Kconfig b/drivers/clk/at91/Kconfig
index 4abc8026b4..4563892647 100644
--- a/drivers/clk/at91/Kconfig
+++ b/drivers/clk/at91/Kconfig
@@ -61,3 +61,10 @@ config AT91_SAM9X60_PLL
help
This option is used to enable the AT91 SAM9X60's PLL clock
driver.
+
+config AT91_SAM9X60_USB
+ bool "USB Clock support for SAM9X60 SoCs"
+ depends on CLK_AT91
+ help
+ This option is used to enable the AT91 SAM9X60's USB clock
+ driver.
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 580b406d7b..e53dcb4ca7 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -9,6 +9,7 @@ obj-y += clk-peripheral.o
obj-$(CONFIG_AT91_GENERIC_CLK) += clk-generic.o
obj-$(CONFIG_AT91_UTMI)+= clk-utmi.o
obj-$(CONFIG_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o
+obj-$(CONFIG_AT91_SAM9X60_USB) += clk-sam9x60-usb.o
obj-$(CONFIG_SAMA7G5) += sama7g5.o
obj-$(CONFIG_SAM9X60) += sam9x60.o
else
diff --git a/drivers/clk/at91/clk-sam9x60-usb.c
b/drivers/clk/at91/clk-sam9x60-usb.c
new file mode 100644
index 00..798fa9eb3c
--- /dev/null
+++ b/drivers/clk/at91/clk-sam9x60-usb.c
@@ -0,0 +1,157 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SAM9X60's USB Clock support.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga
+ */
+
+#include
+#include
+#include
+
+#include "pmc.h"
+
+#define UBOOT_DM_CLK_AT91_SAM9X60_USB "at91-sam9x60-usb-clk"
+
+struct sam9x60_usb {
+ const struct clk_usbck_layout *layout;
+ void__iomem *base;
+ struct clk clk;
+ const u32 *clk_mux_table;
+ const u32 *mux_table;
+ const char * const *parent_names;
+ u32 num_parents;
+ u8 id;
+};
+
+#define to_sam9x60_usb(_clk) container_of(_clk, struct sam9x60_usb, clk)
+#define USB_MAX_DIV15
+
+static int sam9x60_usb_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+ struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+ int index;
+ u32 val;
+
+ index = at91_clk_mux_val_to_index(usb->clk_mux_table, usb->num_parents,
+ parent->id);
+ if (index < 0)
+ return index;
+
+ index = at91_clk_mux_index_to_val(usb->mux_table, usb->num_parents,
+ index);
+ if (index < 0)
+ return index;
+
+ pmc_read(usb->base, usb->layout->offset, &val);
+ val &= ~usb->layout->usbs_mask;
+ val |= index << (ffs(usb->layout->usbs_mask - 1));
+ pmc_write(usb->base, usb->layout->offset, val);
+
+ return 0;
+}
+
+static ulong sam9x60_usb_clk_get_rate(struct clk *clk)
+{
+ struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+ ulong parent_rate = clk_get_parent_rate(clk);
+ u32 val, usbdiv;
+
+ if (!parent_rate)
+ return 0;
+
+ pmc_read(usb->base, usb->layout->offset, &val);
+ usbdiv = (val & usb->layout->usbdiv_mask) >>
+ (ffs(usb->layout->usbdiv_mask) - 1);
+ return parent_rate / (usbdiv + 1);
+}
+
+static ulong sam9x60_usb_clk_set_rate(struct clk *clk, ulong rate)
+{
+ struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+ ulong parent_rate = clk_get_parent_rate(clk);
+ u32 usbdiv, val;
+
+ if (!parent_rate)
+ return 0;
+
+ usbdiv = DIV_ROUND_CLOSEST(parent_rate, rate);
+ if (usbdiv > USB_MAX_DIV + 1 || !usbdiv)
+ return 0;
+
+ pmc_read(usb->base, usb->layout->offset, &val);
+ val &= usb->layout->usbdiv_mask;
+ val |= (usbdiv - 1) << (ffs(usb->layout->usbdiv_mask) - 1);
+ pmc_write(usb->base, usb->layout->offset, val);
+
+ return parent_rate / usbdiv;
+}
+
+static const struct clk_ops sam9x60_usb_ops = {
+ .set_parent = sam9x60_usb_clk_set_parent,
+ .set_rate = sam9x60_usb_clk_set_rate,
+ .get_rate = sam9x60_usb_clk_get_rate,
+};
+
+struct clk *
+sam9x60_clk_register_usb(void __iomem *base, const char *name,
+
[PATCH v5 00/19] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards
This series of patches is meant to add support for USB Mass Storage on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into Driver Model. In order for this to be achieved, the respective DT nodes have been added, the USB clock has been registered into CCF and the required defconfigs have been added to the boards' defconfig. What is more, in order for the VBUS to stay enabled, a `child_pre_probe` method has been added to overcome the DM core disabling it in `usb_scan_device`: when the generic `device_probe` method is called, the pinctrl is processed once again, undoing whatever changes have been made in our driver's probe method. In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY drivers were required. v1 -> v2: - Additional patch included: [PATCH v2 04/19] clk: at91: pmc: export clock setup to pmc - Updated [PATCH v2 05/19] clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates in concordance with the previously mentioned additional patch - Move ` #include ` below `#if !(CONFIG_IS_ENABLED(DM_USB))` to avoid implicit declarations warnings/errors in the OHCI driver v2 -> v3: - Also add USB pinctrl nodes and USB Mass Storage for SAM9X60 Curiosity and remove no longer necessary ifdef in sam9x60 clk driver - Remove no longer required CONFIG_SYS_USB_* configs from the defconfigs and add CONFIG_RESET_AT91 to all defconfigs v3 -> v4: - Remove unnecessary NULL assignment `sama7_phy->sfr = NULL;` in sama7 usb phy probe method v4 -> v5: - Fixed some warnings Claudiu Beznea (1): clk: at91: pmc: export clock setup to pmc Cristian Birsan (2): ARM: at91: add sama7 SFR definitions usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv` Sergiu Moga (16): ARM: dts: sam9x60: Add OHCI and EHCI DT nodes clk: at91: Add support for sam9x60 USB clock clk: at91: sam9x60: Register the required clocks for USB clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates usb: ohci-at91: Enable OHCI functionality and register into DM dt-bindings: reset: add sama7g5 definitions dt-bindings: clk: at91: Define additional UTMI related clocks ARM: dts: at91: sama7: Add USB related DT nodes reset: at91: Add reset driver for basic assert/deassert operations phy: at91: Add support for the USB 2.0 PHY's of SAMA7 usb: ohci-at91: Add USB PHY functionality ARM: dts: at91: sama5d2_icp: Add pinctrl nodes for USB related DT nodes ARM: dts: at91: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes configs: at91: sam9x60ek: Add required configs for the USB command configs: at91: sama5d2: Enable OHCI/EHCI related configs configs: at91: sama7: Enable USB and RESET functionality arch/arm/dts/at91-sam9x60_curiosity.dts | 21 ++ arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 ++ arch/arm/dts/at91-sama5d2_icp.dts | 22 ++ arch/arm/dts/at91-sama7g5ek.dts | 34 +++ arch/arm/dts/sam9x60.dtsi | 18 ++ arch/arm/dts/sam9x60ek.dts| 21 ++ arch/arm/dts/sama7g5.dtsi | 73 ++ arch/arm/mach-at91/include/mach/sama7-sfr.h | 59 + configs/sam9x60_curiosity_mmc_defconfig | 8 + configs/sam9x60ek_mmc_defconfig | 9 + configs/sam9x60ek_nandflash_defconfig | 9 + configs/sam9x60ek_qspiflash_defconfig | 9 + configs/sama5d27_giantboard_defconfig | 4 + configs/sama5d27_som1_ek_mmc1_defconfig | 4 + configs/sama5d27_som1_ek_mmc_defconfig| 4 + configs/sama5d27_som1_ek_qspiflash_defconfig | 4 + configs/sama5d27_wlsom1_ek_mmc_defconfig | 5 + .../sama5d27_wlsom1_ek_qspiflash_defconfig| 4 + configs/sama5d2_icp_mmc_defconfig | 8 + configs/sama5d2_icp_qspiflash_defconfig | 4 + configs/sama5d2_ptc_ek_mmc_defconfig | 4 + configs/sama5d2_ptc_ek_nandflash_defconfig| 4 + configs/sama5d2_xplained_emmc_defconfig | 4 + configs/sama5d2_xplained_mmc_defconfig| 4 + configs/sama5d2_xplained_qspiflash_defconfig | 4 + configs/sama5d2_xplained_spiflash_defconfig | 4 + configs/sama7g5ek_mmc1_defconfig | 10 + configs/sama7g5ek_mmc_defconfig | 10 + drivers/clk/at91/Kconfig | 7 + drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-sam9x60-usb.c| 157 + drivers/clk/at91/pmc.c| 42 drivers/clk/at91/pmc.h| 27 +++ drivers/clk/at91/sam9x60.c| 63 + drivers/clk/at91/sama7g5.c| 48 +--- drivers/phy/Kconfig | 10 + drivers/phy/Makefile | 1 + drivers/phy/phy-sama7-usb.c | 90 drivers/phy/phy-sama7-utmi-clk.c | 202 drivers/reset/Kconfig | 8 + drivers/reset/Makefile| 1 +
[PATCH v5 01/19] ARM: dts: sam9x60: Add OHCI and EHCI DT nodes
Add the OHCI and EHCI DT nodes for the sam9x60 boards.
Signed-off-by: Sergiu Moga
---
v1 -> v2:
- No change
v2 -> v3:
- Also add pinctrl nodes to sam9x60 curiosity
v3 -> v5:
- No change
arch/arm/dts/at91-sam9x60_curiosity.dts | 21 +
arch/arm/dts/sam9x60.dtsi | 18 ++
arch/arm/dts/sam9x60ek.dts | 21 +
3 files changed, 60 insertions(+)
diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 7c5b6ae2b8..d6ae3d648d 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -49,6 +49,13 @@
atmel,pins =
;
};
+
+ usb1 {
+ pinctrl_usb_default:
usb_default {
+ atmel,pins = ;
+ };
+ };
};
};
};
@@ -89,3 +96,17 @@
phy-mode = "rmii";
status = "okay";
};
+
+&usb1 {
+ num-ports = <3>;
+ atmel,vbus-gpio = <0
+ &pioD 15 GPIO_ACTIVE_HIGH
+ &pioD 18 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 17224ef771..e36a540f78 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -69,6 +69,24 @@
#size-cells = <1>;
ranges;
+ usb1: ohci@60 {
+ compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+ reg = <0x0060 0x10>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc
PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
+ clock-names = "ohci_clk", "hclk", "uhpck";
+ status = "disabled";
+ };
+
+ usb2: ehci@70 {
+ compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+ reg = <0x0070 0x10>;
+ clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc
PMC_TYPE_PERIPHERAL 22>;
+ clock-names = "usb_clk", "ehci_clk";
+ assigned-clocks = <&pmc PMC_TYPE_CORE 8>;
+ assigned-clock-rates = <48000>;
+ status = "disabled";
+ };
+
ebi: ebi@1000 {
compatible = "microchip,sam9x60-ebi";
#address-cells = <2>;
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 1a02e2cb79..45e2f4cc40 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -139,6 +139,13 @@
;
};
+ usb1 {
+ pinctrl_usb_default: usb_default {
+ atmel,pins = ;
+ };
+ };
+
};
};
};
@@ -213,3 +220,17 @@
phy-mode = "rmii";
status = "okay";
};
+
+&usb1 {
+ num-ports = <3>;
+ atmel,vbus-gpio = <0
+ &pioD 15 GPIO_ACTIVE_HIGH
+ &pioD 16 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+};
+
+&usb2 {
+ status = "okay";
+};
--
2.34.1
[PATCH 1/1] doc: improve wget man-page
* correct formatting of synopsis * improve description of TCP SACK configuration Signed-off-by: Heinrich Schuchardt --- doc/usage/cmd/wget.rst | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/doc/usage/cmd/wget.rst b/doc/usage/cmd/wget.rst index 4fcfa03954..27c500837a 100644 --- a/doc/usage/cmd/wget.rst +++ b/doc/usage/cmd/wget.rst @@ -7,6 +7,7 @@ Synopsis :: + wget address [[hostIPaddr:]path] Description @@ -52,8 +53,8 @@ Configuration The command is only available if CONFIG_CMD_WGET=y. -CONFIG_PROT_TCP_SACK can be turned on for the TCP SACK options. This will -help increasing the downloading speed. +TCP Selective Acknowledgments can be enabled via CONFIG_PROT_TCP_SACK=y. +This will improve the download speed. Return value -- 2.37.2
Re: [PATCH 1/3] eficonfig: refactor eficonfig_process_common function
Hi Ilias,
On Thu, 22 Dec 2022 at 18:59, Ilias Apalodimas
wrote:
>
> Hi Kojima-san
>
>
> On Wed, Dec 21, 2022 at 10:50:36PM +0900, Masahisa Kojima wrote:
> > Current change boot order implementation does not call
> > eficonfig_process_common() and call own menu functions
> > for display_statusline, item_data_print and item_choice.
> > Change boot order functionality should call
> > eficonfig_process_common() to improve maintenanceability.
> >
> > This commit is a preparation to remove the change boot
> > order specific implementation. The menu functions
> > (display_statusline, item_data_print and item_choice) are
> > added as argument of eficonfig_process_common().
> > The menu description string displayed at the bottom of
> > the menu is also added as argument.
> >
> > Signed-off-by: Masahisa Kojima
> > ---
> > cmd/eficonfig.c | 69 +--
> > cmd/eficonfig_sbkey.c | 18 +--
> > include/efi_config.h | 13 +++-
> > 3 files changed, 81 insertions(+), 19 deletions(-)
> >
> > diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
> > index ce7175a566..39ee766a7b 100644
> > --- a/cmd/eficonfig.c
> > +++ b/cmd/eficonfig.c
> > @@ -21,6 +21,8 @@
> > #include
> >
> > static struct efi_simple_text_input_protocol *cin;
> > +char eficonfig_menu_desc[] =
> > + " Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit";
>
> Is this text supposed to change? If not we should define it as const
No, it should be defined as const. I will fix it.
Thanks,
Masahisa Kojima
>
> >
> > #define EFICONFIG_DESCRIPTION_MAX 32
> > #define EFICONFIG_OPTIONAL_DATA_MAX 64
> > @@ -133,7 +135,7 @@ void eficonfig_print_msg(char *msg)
> > *
> > * @data:pointer to the data associated with each menu entry
> > */
> > -static void eficonfig_print_entry(void *data)
> > +void eficonfig_print_entry(void *data)
> > {
> > struct eficonfig_entry *entry = data;
> > int reverse = (entry->efi_menu->active == entry->num);
> > @@ -160,7 +162,7 @@ static void eficonfig_print_entry(void *data)
> > *
> > * @m: pointer to the menu structure
> > */
> > -static void eficonfig_display_statusline(struct menu *m)
>
> [...]
>
> Thanks
> /Ilias
