Re: [PATCH 1/7] mmc: msm_sdhci: Match clocks through "clocks" property
Hi, On Fri, 24 Mar 2023 at 07:26, Konrad Dybcio wrote: > > "clocks" is the standard property used in Linux, "clock" seems to be > an U-Boot invention. Use the one that's more standardized. > > Signed-off-by: Konrad Dybcio > --- > > drivers/mmc/msm_sdhci.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c > index 604f9c3ff99c..174435f01f68 100644 > --- a/drivers/mmc/msm_sdhci.c > +++ b/drivers/mmc/msm_sdhci.c > @@ -63,7 +63,7 @@ static int msm_sdc_clk_init(struct udevice *dev) > struct clk clk; > int ret; > > - ret = fdtdec_get_int_array(gd->fdt_blob, node, "clock", clkd, 2); > + ret = fdtdec_get_int_array(gd->fdt_blob, node, "clocks", clkd, 2); You have to update corresponding dts files as well to avoid breaking platforms. -Sumit > if (ret) > return ret; > > -- > 2.40.0 >
Re: [PATCH v5 2/4] configs: j721e: Merge the HS and non-HS defconfigs
On 20:07-20230323, Bryan Brattlof wrote:
> Hi Manorit!
>
> On March 15, 2023 thus sayeth Manorit Chawdhry:
> > K3 devices have runtime type board detection. Make the default defconfig
> > include the secure configuration. Then remove the HS specific config.
> >
> > Non-HS devices will continue to boot due to runtime device type detection.
> > If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
> > devices these can be ignored.
> >
> > Signed-off-by: Manorit Chawdhry
> > Acked-by: Andrew Davis
> > ---
> > MAINTAINERS| 2 -
> > configs/j721e_evm_a72_defconfig| 3 +-
> > configs/j721e_evm_r5_defconfig | 1 +
> > configs/j721e_hs_evm_a72_defconfig | 208 -
> > configs/j721e_hs_evm_r5_defconfig | 176
> > 5 files changed, 3 insertions(+), 387 deletions(-)
> > delete mode 100644 configs/j721e_hs_evm_a72_defconfig
> > delete mode 100644 configs/j721e_hs_evm_r5_defconfig
> >
>
> ...
>
> > CONFIG_OF_BOARD_SETUP=y
> > -CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run
> > main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run
> > get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
> > +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
> > main_cpsw0_qsgmii_phyinit; run boot_rprocs; if test ${boot_fit} -eq 1; then
> > run get_fit_${boot}; run get_overlaystring; run run_fit; else; run
> > get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run
> > run_kern; fi;"
>
> I'm curious, do we need to drop the distro_bootcmd step?
>
Hi Bryan,
I believe that was a mistake on my part, need to fix it. Thanks for
noticing!
Regards,
Manorit
> ~Bryan
>
Re: [PATCH u-boot-mvebu 0/5] mvebu: Fix UART booting
On Thu, 23 Mar 2023 at 19:58, Pali Rohár wrote: > > This patch series contains kwboot fixes for booting non-UART-generated > images over UART. > > Pali Rohár (5): > tools: kwbimage: Fix invalid UART kwbimage v1 headersz > tools: kwboot: Fix invalid UART kwbimage v1 headersz > tools: kwboot: Fix inserting UART data checksum without -B option > tools: kwboot: Fix sending very small images > tools: kwboot: Workaround A38x BootROM bug for images with a gap > > tools/kwbimage.c | 10 ++ > tools/kwboot.c | 38 ++ > 2 files changed, 48 insertions(+) > > -- > 2.20.1 > Tested-by: Martin Rowe
[PATCH V5] arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford
Reviewed-by: Tom Rini
---
V5: Rebase off next instead of imx branch.
Replace u-boot,dm-spl with bootph-pre-ram
V4: Rebase off Marek V's EQOS series.
Remove code no longer needed from the EQOS series
Remove unnecessary include files.
V3: Fix Doc indicies to fix errors with 'make htmldocs'
Remove duplicated entries in imx8mp_beacon.env found in env_default.h
Remove unnecessary include options from imx8mp_beacon.h
V2: Move default environment from imx8mp_beacon.h to imx8mp_beacon.env
Move README to beacon-imx8mp.rst
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c160e884bf..eff9c69969 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -995,6 +995,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
+ imx8mp-beacon-kit.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
new file mode 100644
index 00..5ca631e9d8
--- /dev/null
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ bootph-pre-ram;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ bootph-pre-ram;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_1 {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_3 {
+ compatible = "ti,tca6416";
+ label = "exp2";
+};
+
+_i2c1 {
+ bootph-pre-ram;
+};
+
+_pmic {
+ bootph-pre-ram;
+};
+
+_reg_usdhc2_vmmc {
+ bootph-pre-ram;
+};
+
+_uart2 {
+ bootph-pre-ram;
+};
+
+_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+_usdhc2 {
+ bootph-pre-ram;
+};
+
+_usdhc3 {
+ bootph-pre-ram;
+};
+
+_wdog {
+ bootph-pre-ram;
+};
+
+_usdhc2_vmmc {
+ bootph-pre-ram;
+ u-boot,off-on-delay-us = <2>;
+};
+
+_jr0 {
+ bootph-pre-ram;
+};
+
+_jr1 {
+ bootph-pre-ram;
+};
+
+_jr2 {
+ bootph-pre-ram;
+};
+
+ {
+ compatible = "tcg,tpm_tis-spi";
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+ assigned-clocks = < IMX8MP_CLK_USDHC1>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ bootph-pre-ram;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ assigned-clocks = < IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ bootph-pre-ram;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ assigned-clocks = < IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+_0 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_1 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_dwc3_0 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <4>;
+};
+
+_dwc3_1 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+
Re: [PATCH RFC u-boot-mvebu 0/2] arm: mvebu: Fix eMMC boot
On Thu, 23 Mar 2023 at 19:01, Pali Rohár wrote: > > On Thursday 23 March 2023 12:24:13 Martin Rowe wrote: > > On Wed, 22 Mar 2023 at 19:09, Pali Rohár wrote: > > > > > > On Wednesday 22 March 2023 18:59:45 Pali Rohár wrote: > > > > On Wednesday 22 March 2023 13:45:56 Martin Rowe wrote: > > > > > On Wed, 22 Mar 2023 at 12:38, Martin Rowe > > > > > wrote: > > > > > > > > > > > > On Tue, 21 Mar 2023 at 08:08, Pali Rohár wrote: > > > > > >> > > > > > >> On Tuesday 21 March 2023 08:01:16 Martin Rowe wrote: > > > > > >> > On Mon, 20 Mar 2023 at 17:33, Pali Rohár wrote: > > > > > >> > > > > > > >> > > On Monday 20 March 2023 11:48:59 Martin Rowe wrote: > > > > > >> > > > On Sun, 19 Mar 2023 at 16:22, Pali Rohár > > > > > >> > > > wrote: > > > > > >> > > > > > > > > >> > > > > On Sunday 19 March 2023 00:32:01 Martin Rowe wrote: > > > > > >> > > > > > On Mon, 6 Mar 2023 at 11:53, Pali Rohár > > > > > >> > > > > > wrote: > > > > > >> > > > > > > > > > > >> > > > > > > Could you try to print mmc->part_config (ideally as > > > > > >> > > > > > > early as > > > > > >> > > possible)? > > > > > >> > > > > > > > > > > > >> > > > > > > > > > > >> > > > > > In SPL mmc->part_config is 255 > > > > > >> > > > > > In main u-boot at the start of clearfog.c board_init() > > > > > >> > > mmc->part_config > > > > > >> > > > > is > > > > > >> > > > > > 255 > > > > > >> > > > > > In main u-boot at the start of clearfog.c checkboard() > > > > > >> > > mmc->part_config > > > > > >> > > > > is > > > > > >> > > > > > 8 (ack: 0, partition_enable: 1, access: 0) > > > > > >> > > > > > > > > > >> > > > > 255 is uninitialized value. > > > > > >> > > > > > > > > > >> > > > > > If I set partition_enable to 2, I get the same result > > > > > >> > > > > > except the > > > > > >> > > value is > > > > > >> > > > > > 16 (ack: 0, partition_enable: 2, access: 0) instead of > > > > > >> > > > > > 8 for the > > > > > >> > > last > > > > > >> > > > > value > > > > > >> > > > > > > > > > >> > > > > Try to change "access" bits. > > > > > >> > > > > > > > > > >> > > > > > > > > > > >> > > > > > BootROM - 1.73 > > > > > >> > > > > > > > > > > >> > > > > > Booting from MMC > > > > > >> > > > > > > > > > > >> > > > > > U-Boot SPL 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 > > > > > >> > > > > > 2023 - > > > > > >> > > 10:05:32 > > > > > >> > > > > > +1000) > > > > > >> > > > > > High speed PHY - Version: 2.0 > > > > > >> > > > > > EEPROM TLV detection failed: Using static config for > > > > > >> > > > > > Clearfog Pro. > > > > > >> > > > > > Detected Device ID 6828 > > > > > >> > > > > > board SerDes lanes topology details: > > > > > >> > > > > > | Lane # | Speed | Type | > > > > > >> > > > > > > > > > > >> > > > > > | 0| 3 | SATA0 | > > > > > >> > > > > > | 1| 0 | SGMII1 | > > > > > >> > > > > > | 2| 5 | PCIe1 | > > > > > >> > > > > > | 3| 5 | USB3 HOST1 | > > > > > >> > > > > > | 4| 5 | PCIe2 | > > > > > >> > > > > > | 5| 0 | SGMII2 | > > > > > >> > > > > > > > > > > >> > > > > > High speed PHY - Ended Successfully > > > > > >> > > > > > mv_ddr: 14.0.0 > > > > > >> > > > > > DDR3 Training Sequence - Switching XBAR Window to > > > > > >> > > > > > FastPath Window > > > > > >> > > > > > mv_ddr: completed successfully > > > > > >> > > > > > spl.c spl_boot_device part_config = 255 > > > > > >> > > > > > Trying to boot from MMC1 > > > > > >> > > > > > > > > > > >> > > > > > > > > > > >> > > > > > U-Boot 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 > > > > > >> > > > > > - 10:05:32 > > > > > >> > > +1000) > > > > > >> > > > > > > > > > > >> > > > > > SoC: MV88F6828-A0 at 1600 MHz > > > > > >> > > > > > DRAM: 1 GiB (800 MHz, 32-bit, ECC not enabled) > > > > > >> > > > > > clearfog.c board_init part_config = 255 > > > > > >> > > > > > Core: 38 devices, 22 uclasses, devicetree: separate > > > > > >> > > > > > MMC: mv_sdh: 0 > > > > > >> > > > > > Loading Environment from MMC... *** Warning - bad CRC, > > > > > >> > > > > > using default > > > > > >> > > > > > environment > > > > > >> > > > > > > > > > > >> > > > > > Model: SolidRun Clearfog A1 > > > > > >> > > > > > clearfog.c checkboard part_config = 8 > > > > > >> > > > > > Board: SolidRun Clearfog Pro > > > > > >> > > > > > Net: > > > > > >> > > > > > Warning: ethernet@7 (eth1) using random MAC address - > > > > > >> > > > > 32:16:0e:b4:d1:d8 > > > > > >> > > > > > eth1: ethernet@7 > > > > > >> > > > > > Warning: ethernet@3 (eth2) using random MAC address - > > > > > >> > > > > 72:30:3f:79:07:12 > > > > > >> > > > > > , eth2: ethernet@3 > > > > > >> > > > > > Warning: ethernet@34000 (eth3) using random MAC address - > > > > > >> > > > > 82:fb:71:23:46:4f > > > > > >> > > > > > , eth3: ethernet@34000 > > > > > >> > > > > > Hit any key to stop autoboot: 0 > > > > > >> > > > > > => mmc partconf 0 > >
Re: [PATCH V4] arm64: imx: Add support for imx8mp-beacon-kit
On Thu, Mar 23, 2023 at 07:27:04PM -0500, Adam Ford wrote:
> Beacon Embedded has an i.MX8M Plus development kit which consists
> of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
> and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
> Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
> PHY. The device trees are already queued for inclusion in Linux 6.3.
>
> Signed-off-by: Adam Ford
> Reviewed-by: Tom Rini
> ---
>
> V4: Rebase off Marek V's EQOS series.
> Remove code no longer needed from the EQOS series
> Remove unnecessary include files.
>
> V3: Fix Doc indicies to fix errors with 'make htmldocs'
> Remove duplicated entries in imx8mp_beacon.env found in env_default.h
> Remove unnecessary include options from imx8mp_beacon.h
>
> V2: Move default environment from imx8mp_beacon.h to imx8mp_beacon.env
> Move README to beacon-imx8mp.rst
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index d9b719f85d..d812ad4048 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -986,6 +986,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
> imx8mn-beacon-kit.dtb \
> imx8mq-mnt-reform2.dtb \
> imx8mq-phanbell.dtb \
> + imx8mp-beacon-kit.dtb \
> imx8mp-dhcom-pdk2.dtb \
> imx8mp-evk.dtb \
> imx8mp-icore-mx8mp-edimm2.2.dtb \
> diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> new file mode 100644
> index 00..0f7c91a078
> --- /dev/null
> +++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
> @@ -0,0 +1,216 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
> + */
> +
> +#include "imx8mp-u-boot.dtsi"
> +
> +/ {
> + wdt-reboot {
> + compatible = "wdt-reboot";
> + wdt = <>;
> + u-boot,dm-spl;
> + };
So, the patch needs to be vs next, where these are all bootph- tags,
which can (and need to be) upstreamed. To make syncing easier, and not
block the platform itself, you can keep the bootph- parts in the
-u-boot.dtsi file until it's upstream in -next or what have you, but
please push these upstream now.
--
Tom
signature.asc
Description: PGP signature
[PATCH 7/7] arm: Migrate Apple M1 to save_prev_bl_data
Mark's and Dzmitry's approaches come down to the same thing.. Let's
unify them by first removing the static keyword from the common file
to allow the variable to be reused, then renaming "reg0" to the more
sensible fw_dtb_pointer coming from the Apple file and finally remove
the mach-apple implementation of this very thing and enable the common
approach in the respective defconfig.
Only build-tested.
Signed-off-by: Konrad Dybcio
---
arch/arm/lib/save_prev_bl_data.c| 14 +++---
arch/arm/mach-apple/Makefile| 1 -
arch/arm/mach-apple/lowlevel_init.S | 17 -
configs/apple_m1_defconfig | 1 +
4 files changed, 8 insertions(+), 25 deletions(-)
delete mode 100644 arch/arm/mach-apple/lowlevel_init.S
diff --git a/arch/arm/lib/save_prev_bl_data.c b/arch/arm/lib/save_prev_bl_data.c
index f7b23faf0d66..a127fec1f149 100644
--- a/arch/arm/lib/save_prev_bl_data.c
+++ b/arch/arm/lib/save_prev_bl_data.c
@@ -15,7 +15,7 @@
#include
#include
-static ulong reg0 __section(".data");
+ulong fw_dtb_pointer __section(".data");
/**
* Save x0 register value, assuming previous bootloader set it to
@@ -23,7 +23,7 @@ static ulong reg0 __section(".data");
*/
void save_boot_params(ulong r0)
{
- reg0 = r0;
+ fw_dtb_pointer = r0;
save_boot_params_ret();
}
@@ -51,24 +51,24 @@ int save_prev_bl_data(void)
int node;
u64 initrd_start_prop;
- if (!is_addr_accessible((phys_addr_t)reg0))
+ if (!is_addr_accessible((phys_addr_t)fw_dtb_pointer))
return -ENODATA;
- fdt_blob = (struct fdt_header *)reg0;
+ fdt_blob = (struct fdt_header *)fw_dtb_pointer;
if (!fdt_valid(_blob)) {
- pr_warn("%s: address 0x%lx is not a valid fdt\n", __func__,
reg0);
+ pr_warn("%s: address 0x%lx is not a valid fdt\n", __func__,
fw_dtb_pointer);
return -ENODATA;
}
if (IS_ENABLED(CONFIG_SAVE_PREV_BL_FDT_ADDR))
- env_set_addr("prevbl_fdt_addr", (void *)reg0);
+ env_set_addr("prevbl_fdt_addr", (void *)fw_dtb_pointer);
if (!IS_ENABLED(CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR))
return 0;
node = fdt_path_offset(fdt_blob, "/chosen");
if (!node) {
pr_warn("%s: chosen node not found in device tree at addr:
0x%lx\n",
- __func__, reg0);
+ __func__, fw_dtb_pointer);
return -ENODATA;
}
/*
diff --git a/arch/arm/mach-apple/Makefile b/arch/arm/mach-apple/Makefile
index 50b465b9473f..a775d8866ad4 100644
--- a/arch/arm/mach-apple/Makefile
+++ b/arch/arm/mach-apple/Makefile
@@ -1,6 +1,5 @@
# SPDX-License-Identifier: GPL-2.0+
obj-y += board.o
-obj-y += lowlevel_init.o
obj-y += rtkit.o
obj-$(CONFIG_NVME_APPLE) += sart.o
diff --git a/arch/arm/mach-apple/lowlevel_init.S
b/arch/arm/mach-apple/lowlevel_init.S
deleted file mode 100644
index e1c0d91cef2c..
--- a/arch/arm/mach-apple/lowlevel_init.S
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2021 Mark Kettenis
- */
-
-.align 8
-.global fw_dtb_pointer
-fw_dtb_pointer:
- .quad 0
-
-.global save_boot_params
-save_boot_params:
- /* Stash DTB pointer passed by m1n1 */
- adr x1, fw_dtb_pointer
- str x0, [x1]
-
- b save_boot_params_ret
diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig
index b4ecf73cbc78..eb0addb741c5 100644
--- a/configs/apple_m1_defconfig
+++ b/configs/apple_m1_defconfig
@@ -3,6 +3,7 @@ CONFIG_ARCH_APPLE=y
CONFIG_DEFAULT_DEVICE_TREE="t8103-j274"
CONFIG_SYS_LOAD_ADDR=0x0
CONFIG_USE_PREBOOT=y
+CONFIG_SAVE_PREV_BL_FDT_ADDR=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_LATE_INIT=y
--
2.40.0
[PATCH 6/7] serial: msm_geni: Use upstream Linux bindings
The name "se" is used in upstream Linux device trees and has been for
ages, long before this U-Boot-ism was introduced. Same goes for the
existing compatible. Get rid of that.
Signed-off-by: Konrad Dybcio
---
arch/arm/dts/sdm845.dtsi | 4 ++--
drivers/serial/serial_msm_geni.c | 6 --
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi
index 607af277f8be..92bdc82177d6 100644
--- a/arch/arm/dts/sdm845.dtsi
+++ b/arch/arm/dts/sdm845.dtsi
@@ -52,10 +52,10 @@
};
debug_uart: serial@a84000 {
- compatible = "qcom,msm-geni-uart";
+ compatible = "qcom,geni-debug-uart";
reg = <0xa84000 0x4000>;
reg-names = "se_phys";
- clock-names = "se-clk";
+ clock-names = "se";
clocks = < GCC_QUPV3_WRAP1_S1_CLK>;
pinctrl-names = "default";
pinctrl-0 = <_uart9>;
diff --git a/drivers/serial/serial_msm_geni.c b/drivers/serial/serial_msm_geni.c
index 3943ca43e49e..6c9371c4e69d 100644
--- a/drivers/serial/serial_msm_geni.c
+++ b/drivers/serial/serial_msm_geni.c
@@ -189,7 +189,7 @@ static int geni_serial_set_clock_rate(struct udevice *dev,
u64 rate)
struct clk *clk;
int ret;
- clk = devm_clk_get(dev, "se-clk");
+ clk = devm_clk_get(dev, "se");
if (!clk)
return -EINVAL;
@@ -554,7 +554,9 @@ static int msm_serial_ofdata_to_platdata(struct udevice
*dev)
}
static const struct udevice_id msm_serial_ids[] = {
- {.compatible = "qcom,msm-geni-uart"}, {}};
+ { .compatible = "qcom,geni-debug-uart" },
+ { }
+};
U_BOOT_DRIVER(serial_msm_geni) = {
.name = "serial_msm_geni",
--
2.40.0
[PATCH 5/7] arm: snapdragon: pinctrl: Always bind before relocation
In preparation for supporting upstream Linux device trees on Qualcomm
platforms, make this the default behavior.
Signed-off-by: Konrad Dybcio
---
arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
index 826dc5148661..9f261d70e4d3 100644
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
+++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
@@ -163,4 +163,5 @@ U_BOOT_DRIVER(pinctrl_snapdraon) = {
.ops= _pinctrl_ops,
.probe = msm_pinctrl_probe,
.bind = msm_pinctrl_bind,
+ .flags = DM_FLAG_PRE_RELOC,
};
--
2.40.0
[PATCH 4/7] arch: snapdragon: clock: Always bind before relocation
In preparation for supporting upstream Linux device trees on Qualcomm
platforms, make this the default behavior.
Signed-off-by: Konrad Dybcio
---
arch/arm/mach-snapdragon/clock-snapdragon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c
b/arch/arm/mach-snapdragon/clock-snapdragon.c
index 0ac45dce9a92..d1af5d1fec7d 100644
--- a/arch/arm/mach-snapdragon/clock-snapdragon.c
+++ b/arch/arm/mach-snapdragon/clock-snapdragon.c
@@ -178,4 +178,5 @@ U_BOOT_DRIVER(clk_msm) = {
.ops= _clk_ops,
.priv_auto = sizeof(struct msm_clk_priv),
.probe = msm_clk_probe,
+ .flags = DM_FLAG_PRE_RELOC,
};
--
2.40.0
[PATCH 3/7] serial: msm: Always bind before relocation
In preparation for supporting upstream Linux device trees on Qualcomm
platforms, make this the default behavior.
Signed-off-by: Konrad Dybcio
---
drivers/serial/serial_msm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index 9c370cac323f..59a2cf27aaf1 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -251,4 +251,5 @@ U_BOOT_DRIVER(serial_msm) = {
.priv_auto = sizeof(struct msm_serial_data),
.probe = msm_serial_probe,
.ops= _serial_ops,
+ .flags = DM_FLAG_PRE_RELOC,
};
--
2.40.0
[PATCH 2/7] serial: msm: Match clocks through "clocks" property
"clocks" is the standard property used in Linux, "clock" seems to be
an U-Boot invention. Use the one that's more standardized.
Signed-off-by: Konrad Dybcio
---
arch/arm/dts/qcom-ipq4019.dtsi | 2 +-
drivers/serial/serial_msm.c| 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/qcom-ipq4019.dtsi b/arch/arm/dts/qcom-ipq4019.dtsi
index 6edc69da6747..dee3159e5893 100644
--- a/arch/arm/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/dts/qcom-ipq4019.dtsi
@@ -87,7 +87,7 @@
blsp1_uart1: serial@78af000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x78af000 0x200>;
- clock = < GCC_BLSP1_UART1_APPS_CLK>;
+ clocks = < GCC_BLSP1_UART1_APPS_CLK>;
bit-rate = <0xFF>;
status = "disabled";
u-boot,dm-pre-reloc;
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index a22623c316ed..9c370cac323f 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -166,8 +166,7 @@ static int msm_uart_clk_init(struct udevice *dev)
struct clk clk;
int ret;
- ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "clock",
- clkd, 2);
+ ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev), "clocks",
clkd, 2);
if (ret)
return ret;
--
2.40.0
[PATCH 1/7] mmc: msm_sdhci: Match clocks through "clocks" property
"clocks" is the standard property used in Linux, "clock" seems to be an U-Boot invention. Use the one that's more standardized. Signed-off-by: Konrad Dybcio --- drivers/mmc/msm_sdhci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 604f9c3ff99c..174435f01f68 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -63,7 +63,7 @@ static int msm_sdc_clk_init(struct udevice *dev) struct clk clk; int ret; - ret = fdtdec_get_int_array(gd->fdt_blob, node, "clock", clkd, 2); + ret = fdtdec_get_int_array(gd->fdt_blob, node, "clocks", clkd, 2); if (ret) return ret; -- 2.40.0
Re: [PATCH v5 2/4] configs: j721e: Merge the HS and non-HS defconfigs
Hi Manorit!
On March 15, 2023 thus sayeth Manorit Chawdhry:
> K3 devices have runtime type board detection. Make the default defconfig
> include the secure configuration. Then remove the HS specific config.
>
> Non-HS devices will continue to boot due to runtime device type detection.
> If TI_SECURE_DEV_PKG is not set the build will emit warnings, for non-HS
> devices these can be ignored.
>
> Signed-off-by: Manorit Chawdhry
> Acked-by: Andrew Davis
> ---
> MAINTAINERS| 2 -
> configs/j721e_evm_a72_defconfig| 3 +-
> configs/j721e_evm_r5_defconfig | 1 +
> configs/j721e_hs_evm_a72_defconfig | 208 -
> configs/j721e_hs_evm_r5_defconfig | 176
> 5 files changed, 3 insertions(+), 387 deletions(-)
> delete mode 100644 configs/j721e_hs_evm_a72_defconfig
> delete mode 100644 configs/j721e_hs_evm_r5_defconfig
>
...
> CONFIG_OF_BOARD_SETUP=y
> -CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run
> main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run
> get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
> +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
> main_cpsw0_qsgmii_phyinit; run boot_rprocs; if test ${boot_fit} -eq 1; then
> run get_fit_${boot}; run get_overlaystring; run run_fit; else; run
> get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern;
> fi;"
I'm curious, do we need to drop the distro_bootcmd step?
~Bryan
[PATCH V4] arm64: imx: Add support for imx8mp-beacon-kit
Beacon Embedded has an i.MX8M Plus development kit which consists
of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC,
and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual
Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet
PHY. The device trees are already queued for inclusion in Linux 6.3.
Signed-off-by: Adam Ford
Reviewed-by: Tom Rini
---
V4: Rebase off Marek V's EQOS series.
Remove code no longer needed from the EQOS series
Remove unnecessary include files.
V3: Fix Doc indicies to fix errors with 'make htmldocs'
Remove duplicated entries in imx8mp_beacon.env found in env_default.h
Remove unnecessary include options from imx8mp_beacon.h
V2: Move default environment from imx8mp_beacon.h to imx8mp_beacon.env
Move README to beacon-imx8mp.rst
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d9b719f85d..d812ad4048 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -986,6 +986,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mn-beacon-kit.dtb \
imx8mq-mnt-reform2.dtb \
imx8mq-phanbell.dtb \
+ imx8mp-beacon-kit.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-evk.dtb \
imx8mp-icore-mx8mp-edimm2.2.dtb \
diff --git a/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
new file mode 100644
index 00..0f7c91a078
--- /dev/null
+++ b/arch/arm/dts/imx8mp-beacon-kit-u-boot.dtsi
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Logic PD, Inc DBA Beacon EmbeddedWorks
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ u-boot,dm-spl;
+ };
+
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25} {
+ u-boot,dm-spl;
+};
+
+&{/soc@0/bus@3080/i2c@30a2/pmic@25/regulators} {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ assigned-clock-rates;
+};
+
+ {
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <15000>;
+ reset-deassert-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_1 {
+ compatible = "ti,tca6416";
+ label = "exp4";
+};
+
+_3 {
+ compatible = "ti,tca6416";
+ label = "exp2";
+};
+
+_i2c1 {
+ u-boot,dm-spl;
+};
+
+_pmic {
+ u-boot,dm-spl;
+};
+
+_reg_usdhc2_vmmc {
+ u-boot,dm-spl;
+};
+
+_uart2 {
+ u-boot,dm-spl;
+};
+
+_usdhc2_gpio {
+ u-boot,dm-spl;
+};
+
+_usdhc2 {
+ u-boot,dm-spl;
+};
+
+_usdhc3 {
+ u-boot,dm-spl;
+};
+
+_wdog {
+ u-boot,dm-spl;
+};
+
+_usdhc2_vmmc {
+ u-boot,dm-spl;
+ u-boot,off-on-delay-us = <2>;
+};
+
+_jr0 {
+ u-boot,dm-spl;
+};
+
+_jr1 {
+ u-boot,dm-spl;
+};
+
+_jr2 {
+ u-boot,dm-spl;
+};
+
+ {
+ compatible = "tcg,tpm_tis-spi";
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+ assigned-clocks = < IMX8MP_CLK_USDHC1>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+ assigned-clocks = < IMX8MP_CLK_USDHC2>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+ {
+ u-boot,dm-spl;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ assigned-clocks = < IMX8MP_CLK_USDHC3>;
+ assigned-clock-rates = <4>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_400M>;
+};
+
+_0 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_1 {
+ dma-ranges = <0x4000 0x4000 0xc000>;
+ /delete-property/ power-domains;
+};
+
+_dwc3_0 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+ assigned-clock-rates = <4>;
+};
+
+_dwc3_1 {
+ compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
+ assigned-clocks = < IMX8MP_CLK_HSIO_AXI>;
+ assigned-clock-parents = < IMX8MP_SYS_PLL1_800M>;
+
Re: [PATCH] linker_lists.h: Add attribute used to ll_entry_start macro
I think the correct fix is to not use a zero sized array at all.
AIUI, what Andrew Pinksi intended was: the `asm` fix and
attribute(unused) fix aren't the same thing.
Using either way to get around this is probably not going to work in
future; but I'm not familiar with the codebase to do large changes.
On Thu, Mar 23, 2023 at 3:44 PM Tom Rini wrote:
>
> On Thu, Mar 23, 2023 at 03:38:33PM -0700, appujee wrote:
>
> > added comments:
> > https://lists.denx.de/pipermail/u-boot/2023-March/513078.html
>
> OK, and that references a gcc bugzilla entry where Andrew Pinski suggest
> a change to correct the code, and says not to do what you're suggesting
> here. And since there's still issues (as seen when moving to clang-15),
> I want to see a patch that does what he suggests instead please, thanks.
>
> >
>
> > On Thu, Mar 23, 2023 at 1:31 PM Tom Rini wrote:
> > >
> > > On Thu, Mar 23, 2023 at 01:29:29PM -0700, appujee wrote:
> > >
> > > > > So, saying "unused" and then "used" doesn't seem to make any sense.
> > > > unused and used attributes do not cancel each other. They have different
> > > > semantics. I agree this part of the code needs some attention. zero
> > > > sized
> > > > arrays are not C compliant as I understand it, even more so when it is
> > > > declared outside of a struct.
> > > >
> > >
> > > Ah, yeah, at least a comment explaining what and why we're doing what
> > > we're doing here, and probably some other parts of the linker list code
> > > that need addressing then, please.
> > >
> > >
> > > > On Wed, Mar 22, 2023 at 4:58 PM Tom Rini wrote:
> > > >
> > > > > On Tue, Feb 21, 2023 at 03:33:20PM -0800, Aditya Kumar wrote:
> > > > >
> > > > > > The variable gets dropped by clang compiler in an optimized builds.
> > > > > > Adding attribute((used)) allows the symbol to be preserved. Similar
> > > > > > changes have been proposed in the past e.g.,
> > > > > > 569524741a01e1a96fc2b75dd7e5d12e41ce6c2b for ll_entry_declare macro.
> > > > > >
> > > > > > Signed-off-by: AdityaK
> > > > > > Reviewed-by: Simon Glass
> > > > > > ---
> > > > > > include/linker_lists.h | 2 +-
> > > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > >
> > > > > > diff --git a/include/linker_lists.h b/include/linker_lists.h
> > > > > > index d3da9d44e8..4cd13c3bc8 100644
> > > > > > --- a/include/linker_lists.h
> > > > > > +++ b/include/linker_lists.h
> > > > > > @@ -125,7 +125,7 @@
> > > > > > #define ll_entry_start(_type, _list) \
> > > > > > ({ \
> > > > > > static char start[0] __aligned(CONFIG_LINKER_LIST_ALIGN) \
> > > > > > - __attribute__((unused)) \
> > > > > > + __attribute__((unused)) __attribute__((used)) \
> > > > > > __section("__u_boot_list_2_"#_list"_1"); \
> > > > > > (_type *) \
> > > > > > })
> > > > >
> > > > > So, saying "unused" and then "used" doesn't seem to make any sense.
> > > > > And
> > > > > given some other problems we see with newer clang, which Simon reports
> > > > > this patch doesn't fully fix, we probably need to give that area a
> > > > > good
> > > > > going over to see what attributes do and don't make sense, really.
> > > > >
> > > > > --
> > > > > Tom
> > > > >
> > >
> > > --
> > > Tom
>
> --
> Tom
Re: [PATCH] linker_lists.h: Add attribute used to ll_entry_start macro
On Thu, Mar 23, 2023 at 03:38:33PM -0700, appujee wrote:
> added comments: https://lists.denx.de/pipermail/u-boot/2023-March/513078.html
OK, and that references a gcc bugzilla entry where Andrew Pinski suggest
a change to correct the code, and says not to do what you're suggesting
here. And since there's still issues (as seen when moving to clang-15),
I want to see a patch that does what he suggests instead please, thanks.
>
> On Thu, Mar 23, 2023 at 1:31 PM Tom Rini wrote:
> >
> > On Thu, Mar 23, 2023 at 01:29:29PM -0700, appujee wrote:
> >
> > > > So, saying "unused" and then "used" doesn't seem to make any sense.
> > > unused and used attributes do not cancel each other. They have different
> > > semantics. I agree this part of the code needs some attention. zero sized
> > > arrays are not C compliant as I understand it, even more so when it is
> > > declared outside of a struct.
> > >
> >
> > Ah, yeah, at least a comment explaining what and why we're doing what
> > we're doing here, and probably some other parts of the linker list code
> > that need addressing then, please.
> >
> >
> > > On Wed, Mar 22, 2023 at 4:58 PM Tom Rini wrote:
> > >
> > > > On Tue, Feb 21, 2023 at 03:33:20PM -0800, Aditya Kumar wrote:
> > > >
> > > > > The variable gets dropped by clang compiler in an optimized builds.
> > > > > Adding attribute((used)) allows the symbol to be preserved. Similar
> > > > > changes have been proposed in the past e.g.,
> > > > > 569524741a01e1a96fc2b75dd7e5d12e41ce6c2b for ll_entry_declare macro.
> > > > >
> > > > > Signed-off-by: AdityaK
> > > > > Reviewed-by: Simon Glass
> > > > > ---
> > > > > include/linker_lists.h | 2 +-
> > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/include/linker_lists.h b/include/linker_lists.h
> > > > > index d3da9d44e8..4cd13c3bc8 100644
> > > > > --- a/include/linker_lists.h
> > > > > +++ b/include/linker_lists.h
> > > > > @@ -125,7 +125,7 @@
> > > > > #define ll_entry_start(_type, _list) \
> > > > > ({ \
> > > > > static char start[0] __aligned(CONFIG_LINKER_LIST_ALIGN) \
> > > > > - __attribute__((unused)) \
> > > > > + __attribute__((unused)) __attribute__((used)) \
> > > > > __section("__u_boot_list_2_"#_list"_1"); \
> > > > > (_type *) \
> > > > > })
> > > >
> > > > So, saying "unused" and then "used" doesn't seem to make any sense. And
> > > > given some other problems we see with newer clang, which Simon reports
> > > > this patch doesn't fully fix, we probably need to give that area a good
> > > > going over to see what attributes do and don't make sense, really.
> > > >
> > > > --
> > > > Tom
> > > >
> >
> > --
> > Tom
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] linker_lists.h: Add attribute used to ll_entry_start macro
added comments: https://lists.denx.de/pipermail/u-boot/2023-March/513078.html
On Thu, Mar 23, 2023 at 1:31 PM Tom Rini wrote:
>
> On Thu, Mar 23, 2023 at 01:29:29PM -0700, appujee wrote:
>
> > > So, saying "unused" and then "used" doesn't seem to make any sense.
> > unused and used attributes do not cancel each other. They have different
> > semantics. I agree this part of the code needs some attention. zero sized
> > arrays are not C compliant as I understand it, even more so when it is
> > declared outside of a struct.
> >
>
> Ah, yeah, at least a comment explaining what and why we're doing what
> we're doing here, and probably some other parts of the linker list code
> that need addressing then, please.
>
>
> > On Wed, Mar 22, 2023 at 4:58 PM Tom Rini wrote:
> >
> > > On Tue, Feb 21, 2023 at 03:33:20PM -0800, Aditya Kumar wrote:
> > >
> > > > The variable gets dropped by clang compiler in an optimized builds.
> > > > Adding attribute((used)) allows the symbol to be preserved. Similar
> > > > changes have been proposed in the past e.g.,
> > > > 569524741a01e1a96fc2b75dd7e5d12e41ce6c2b for ll_entry_declare macro.
> > > >
> > > > Signed-off-by: AdityaK
> > > > Reviewed-by: Simon Glass
> > > > ---
> > > > include/linker_lists.h | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/include/linker_lists.h b/include/linker_lists.h
> > > > index d3da9d44e8..4cd13c3bc8 100644
> > > > --- a/include/linker_lists.h
> > > > +++ b/include/linker_lists.h
> > > > @@ -125,7 +125,7 @@
> > > > #define ll_entry_start(_type, _list) \
> > > > ({ \
> > > > static char start[0] __aligned(CONFIG_LINKER_LIST_ALIGN) \
> > > > - __attribute__((unused)) \
> > > > + __attribute__((unused)) __attribute__((used)) \
> > > > __section("__u_boot_list_2_"#_list"_1"); \
> > > > (_type *) \
> > > > })
> > >
> > > So, saying "unused" and then "used" doesn't seem to make any sense. And
> > > given some other problems we see with newer clang, which Simon reports
> > > this patch doesn't fully fix, we probably need to give that area a good
> > > going over to see what attributes do and don't make sense, really.
> > >
> > > --
> > > Tom
> > >
>
> --
> Tom
[PATCH] linker_lists.h: Adding comments to clarify attribute(used)
>From 807a20a152cbebcc70ab81de825a28da94a07ab6 Mon Sep 17 00:00:00 2001
From: AdityaK
Date: Thu, 23 Mar 2023 15:30:15 -0700
Subject: [PATCH] [PATCH] linker_lists.h: Adding comments to clarify
attribute(used)
Change-Id: I2878f458b8955cac23acd54f4cfaafe7f132935b
Signed-off-by: AdityaK
Tom Rini suggested we add comments because it may be confusing to have
both attribute(used) and attribute(unused) in the same declaration.
---
include/linker_lists.h | 8
1 file changed, 8 insertions(+)
diff --git a/include/linker_lists.h b/include/linker_lists.h
index 5e95e30b5d..4e41f86eab 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -121,6 +121,14 @@
* ::
*
* struct my_sub_cmd *msc = ll_entry_start(struct my_sub_cmd, cmd_sub);
+ *
+ * The static variable `start` gets dropped by clang compiler in optimized
+ * build as zero sized arrays aren't C-standards compliant.
+ * https://github.com/llvm/llvm-project/issues/60967
+ * https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108915
+ * Adding attribute((used)) allows the symbol to be preserved. Note that
+ * attribute((used)) and attribute((unused)) do not cancel each other as
+ * they had different semantics.
*/
#define ll_entry_start(_type, _list) \
({ \
--
Re: [PATCH] linker_lists.h: Add attribute used to ll_entry_start macro
On Thu, Mar 23, 2023 at 01:29:29PM -0700, appujee wrote:
> > So, saying "unused" and then "used" doesn't seem to make any sense.
> unused and used attributes do not cancel each other. They have different
> semantics. I agree this part of the code needs some attention. zero sized
> arrays are not C compliant as I understand it, even more so when it is
> declared outside of a struct.
>
Ah, yeah, at least a comment explaining what and why we're doing what
we're doing here, and probably some other parts of the linker list code
that need addressing then, please.
> On Wed, Mar 22, 2023 at 4:58 PM Tom Rini wrote:
>
> > On Tue, Feb 21, 2023 at 03:33:20PM -0800, Aditya Kumar wrote:
> >
> > > The variable gets dropped by clang compiler in an optimized builds.
> > > Adding attribute((used)) allows the symbol to be preserved. Similar
> > > changes have been proposed in the past e.g.,
> > > 569524741a01e1a96fc2b75dd7e5d12e41ce6c2b for ll_entry_declare macro.
> > >
> > > Signed-off-by: AdityaK
> > > Reviewed-by: Simon Glass
> > > ---
> > > include/linker_lists.h | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/include/linker_lists.h b/include/linker_lists.h
> > > index d3da9d44e8..4cd13c3bc8 100644
> > > --- a/include/linker_lists.h
> > > +++ b/include/linker_lists.h
> > > @@ -125,7 +125,7 @@
> > > #define ll_entry_start(_type, _list) \
> > > ({ \
> > > static char start[0] __aligned(CONFIG_LINKER_LIST_ALIGN) \
> > > - __attribute__((unused)) \
> > > + __attribute__((unused)) __attribute__((used)) \
> > > __section("__u_boot_list_2_"#_list"_1"); \
> > > (_type *) \
> > > })
> >
> > So, saying "unused" and then "used" doesn't seem to make any sense. And
> > given some other problems we see with newer clang, which Simon reports
> > this patch doesn't fully fix, we probably need to give that area a good
> > going over to see what attributes do and don't make sense, really.
> >
> > --
> > Tom
> >
--
Tom
signature.asc
Description: PGP signature
Re: [PATCH] linker_lists.h: Add attribute used to ll_entry_start macro
> So, saying "unused" and then "used" doesn't seem to make any sense.
unused and used attributes do not cancel each other. They have different
semantics. I agree this part of the code needs some attention. zero sized
arrays are not C compliant as I understand it, even more so when it is
declared outside of a struct.
On Wed, Mar 22, 2023 at 4:58 PM Tom Rini wrote:
> On Tue, Feb 21, 2023 at 03:33:20PM -0800, Aditya Kumar wrote:
>
> > The variable gets dropped by clang compiler in an optimized builds.
> > Adding attribute((used)) allows the symbol to be preserved. Similar
> > changes have been proposed in the past e.g.,
> > 569524741a01e1a96fc2b75dd7e5d12e41ce6c2b for ll_entry_declare macro.
> >
> > Signed-off-by: AdityaK
> > Reviewed-by: Simon Glass
> > ---
> > include/linker_lists.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/include/linker_lists.h b/include/linker_lists.h
> > index d3da9d44e8..4cd13c3bc8 100644
> > --- a/include/linker_lists.h
> > +++ b/include/linker_lists.h
> > @@ -125,7 +125,7 @@
> > #define ll_entry_start(_type, _list) \
> > ({ \
> > static char start[0] __aligned(CONFIG_LINKER_LIST_ALIGN) \
> > - __attribute__((unused)) \
> > + __attribute__((unused)) __attribute__((used)) \
> > __section("__u_boot_list_2_"#_list"_1"); \
> > (_type *) \
> > })
>
> So, saying "unused" and then "used" doesn't seem to make any sense. And
> given some other problems we see with newer clang, which Simon reports
> this patch doesn't fully fix, we probably need to give that area a good
> going over to see what attributes do and don't make sense, really.
>
> --
> Tom
>
[PATCH u-boot-mvebu] tools: kwboot: Document information about NOR XIP
Signed-off-by: Pali Rohár --- tools/kwboot.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/tools/kwboot.c b/tools/kwboot.c index 2b92966919da..db917708a8e8 100644 --- a/tools/kwboot.c +++ b/tools/kwboot.c @@ -61,7 +61,9 @@ * SPI-NOR or parallel-NOR. Despite the type name it really can be stored on * parallel-NOR and cannot be stored on other SPI devices, like SPI-NAND. * So it should have been named NOR image, not SPI image. This image type - * supports XIP - Execute In Place directly from NOR memory. + * supports XIP - Execute In Place directly from NOR memory. Destination + * address of the XIP image is set to 0x and execute address to the + * absolute offset in bytes from the beginning of NOR memory. * * - IBR_HDR_NAND_ID (0x8B): * NAND image can be stored either at any 2 MB aligned offset in the first -- 2.20.1
[PATCH u-boot-mvebu 1/5] tools: kwbimage: Fix invalid UART kwbimage v1 headersz
Armada 385 BootROM ignores low 7 bits of headersz when parsing kwbimage
header of UART type, which effectively means that headersz is rounded down
to multiply of 128 bytes. For all other image types BootROM reads and use
all bits of headersz. Therefore fill into UART type of kwbimage v1 headersz
aligned to 128 bytes.
Fixes: 2b0980c24027 ("tools: kwbimage: Fill the real header size into the main
header")
Signed-off-by: Pali Rohár
---
tools/kwbimage.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index 309657a5637b..177084adf825 100644
--- a/tools/kwbimage.c
+++ b/tools/kwbimage.c
@@ -1231,6 +1231,16 @@ static size_t image_headersz_v1(int *hasext)
if (count > 0)
headersz += sizeof(struct register_set_hdr_v1) + 8 * count + 4;
+ /*
+* For all images except UART, headersz stored in header itself should
+* contains header size without padding. For UART image BootROM rounds
+* down headersz to multiply of 128 bytes. Therefore align UART headersz
+* to multiply of 128 bytes to ensure that remaining UART header bytes
+* are not ignored by BootROM.
+*/
+ if (image_get_bootfrom() == IBR_HDR_UART_ID)
+ headersz = ALIGN(headersz, 128);
+
return headersz;
}
--
2.20.1
[PATCH u-boot-mvebu 5/5] tools: kwboot: Workaround A38x BootROM bug for images with a gap
A38x BootROM has a bug which cause that BootROM loads data part of UART
image into RAM target address increased by one byte when source address
and header size stored in the image header are not same.
Workaround this bug by completely removing a gap between header and data
part of the UART image. Without gap, this BootROM bug is not triggered.
This gap can be present in SDIO or SATA image types which have aligned
start of the data part to the media sector size. With this workaround
kwboot should be able to convert and send SDIO or SATA images for UART
booting.
Signed-off-by: Pali Rohár
---
tools/kwboot.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index 1cf78dda6755..2b92966919da 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -78,6 +78,17 @@
*
* - IBR_HDR_UART_ID (0x69):
* UART image can be transfered via xmodem protocol over first UART.
+ * Unlike all other image types, header size stored in the image must be
+ * multiply of the 128 bytes (for all other image types it can be any size)
+ * and data part of the image does not have to contain 32-bit checksum
+ * (all other image types must have valid 32-bit checksum in its data part).
+ * And data size stored in the image is ignored. A38x BootROM determinates
+ * size of the data part implicitly by the end of the xmodem transfer.
+ * A38x BootROM has a bug which cause that BootROM loads data part of UART
+ * image into RAM target address increased by one byte when source address
+ * and header size stored in the image header are not same. So UART image
+ * should be constructed in a way that there is no gap between header and
+ * data part.
*
* - IBR_HDR_I2C_ID (0x4D):
* It is unknown for what kind of storage is used this image. It is not
@@ -2188,6 +2199,18 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
}
}
+ /* Header size and source address must be same for UART type due to
A38x BootROM bug */
+ if (hdrsz != le32_to_cpu(hdr->srcaddr)) {
+ if (is_secure) {
+ fprintf(stderr, "Cannot align image with secure
header\n");
+ goto err;
+ }
+
+ kwboot_printv("Removing gap between image header and data\n");
+ memmove(img + hdrsz, img + le32_to_cpu(hdr->srcaddr),
le32_to_cpu(hdr->blocksize));
+ hdr->srcaddr = cpu_to_le32(hdrsz);
+ }
+
hdr->checksum = kwboot_hdr_csum8(hdr) - csum;
*size = le32_to_cpu(hdr->srcaddr) + le32_to_cpu(hdr->blocksize);
--
2.20.1
[PATCH u-boot-mvebu 3/5] tools: kwboot: Fix inserting UART data checksum without -B option
Commit 7665ed2fa04e ("tools: kwboot: Fix parsing UART image without data
checksum") added fixup code to insert place for data checksum if UART image
does not have it. Together with option -B (change baudrate), kwboot
calculates this checksum. Without option -B, it inserts only place for
checksum but does not calculate it.
This commit fix above logic and calculate data checksum also when kwboot is
used without -B option.
Fixes: 7665ed2fa04e ("tools: kwboot: Fix parsing UART image without data
checksum")
Signed-off-by: Pali Rohár
---
tools/kwboot.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index dd894e80db1c..23a893a9b9f8 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -2082,6 +2082,8 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
goto err;
}
kwboot_img_grow_data_right(img, size, sizeof(uint32_t));
+ /* Update the 32-bit data checksum */
+ *kwboot_img_csum32_ptr(img) = kwboot_img_csum32(img);
}
if (!kwboot_img_has_ddr_init(img) &&
--
2.20.1
[PATCH u-boot-mvebu 2/5] tools: kwboot: Fix invalid UART kwbimage v1 headersz
Ensure that UART aligned header size is always stored into kwbimage v1
header. It is needed for proper UART booting. Calculation of headersz field
was broken in commit d656f5a0ee22 ("tools: kwboot: Calculate real used
space in kwbimage header when calling kwboot_img_grow_hdr()") which
introduced optimization of kwboot_img_grow_hdr() function.
Fixes: d656f5a0ee22 ("tools: kwboot: Calculate real used space in kwbimage
header when calling kwboot_img_grow_hdr()")
Signed-off-by: Pali Rohár
---
tools/kwboot.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index c131711444ec..dd894e80db1c 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -2171,6 +2171,17 @@ kwboot_img_patch(void *img, size_t *size, int baudrate)
kwboot_printv("Aligning image header to Xmodem block size\n");
kwboot_img_grow_hdr(img, size, grow);
+ hdrsz += grow;
+
+ /*
+* kwbimage v1 contains header size field and for UART type it
+* must be set to the aligned xmodem header size because BootROM
+* rounds header size down to xmodem block size.
+*/
+ if (kwbimage_version(img) == 1) {
+ hdr->headersz_msb = hdrsz >> 16;
+ hdr->headersz_lsb = cpu_to_le16(hdrsz & 0x);
+ }
}
hdr->checksum = kwboot_hdr_csum8(hdr) - csum;
--
2.20.1
[PATCH u-boot-mvebu 4/5] tools: kwboot: Fix sending very small images
Sending of very small images (smaller than 128 bytes = xmodem block size)
cause out-of-bound memory read access. Fix this issue by ensuring that
hdrsz when sending image is not larger than total size of the image.
Issue was introduced in commit f8017c37799c ("tools: kwboot: Fix sending
Kirkwood v0 images"). Special case when total image is smaller than header
size aligned to multiply of xmodem size is already handled since that
commit.
Fixes: f8017c37799c ("tools: kwboot: Fix sending Kirkwood v0 images")
Signed-off-by: Pali Rohár
---
tools/kwboot.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index 23a893a9b9f8..1cf78dda6755 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -1458,6 +1458,8 @@ kwboot_xmodem(int tty, const void *_img, size_t size, int
baudrate)
* followed by the header. So align header size to xmodem block size.
*/
hdrsz += (KWBOOT_XM_BLKSZ - hdrsz % KWBOOT_XM_BLKSZ) % KWBOOT_XM_BLKSZ;
+ if (hdrsz > size)
+ hdrsz = size;
pnum = 1;
--
2.20.1
[PATCH u-boot-mvebu 0/5] mvebu: Fix UART booting
This patch series contains kwboot fixes for booting non-UART-generated images over UART. Pali Rohár (5): tools: kwbimage: Fix invalid UART kwbimage v1 headersz tools: kwboot: Fix invalid UART kwbimage v1 headersz tools: kwboot: Fix inserting UART data checksum without -B option tools: kwboot: Fix sending very small images tools: kwboot: Workaround A38x BootROM bug for images with a gap tools/kwbimage.c | 10 ++ tools/kwboot.c | 38 ++ 2 files changed, 48 insertions(+) -- 2.20.1
RE: [PATCH] net: ipv6: Add support for default gateway discovery.
Hi Viacheslav,
> -Original Message-
> From: Vyacheslav V. Mitrofanov
> Sent: Thursday, March 16, 2023 3:47 AM
> To: u-boot@lists.denx.de; emohand...@linux.microsoft.com
> Cc: joe.hershber...@ni.com; xypron.g...@gmx.de;
> dpha...@linux.microsoft.com; sap...@gmail.com; rfried@gmail.com;
> ilias.apalodi...@linaro.org; Ehsan Mohandesi ;
> j...@metanate.com; s...@chromium.org; masahisa.koj...@linaro.org
> Subject: [EXTERNAL] Re: [PATCH] net: ipv6: Add support for default gateway
> discovery.
>
> On Thu, 2023-03-02 at 08:58 -0800, emohand...@linux.microsoft.com
> wrote:
> >
> > From: Ehsan Mohandesi
> >
> > In IPv6, the default gateway and prefix length are determined by
> > receiving a router advertisement as defined in -
> >
> https://www.rf/
> c-
> editor.org%2Frfc%2Frfc4861=05%7C01%7Cemohandesi%40microsoft.co
> m%7C6dec635abc8c4861feb708db25fb05d6%7C72f988bf86f141af91ab2d7cd01
> 1db47%7C1%7C0%7C638145532341238481%7CUnknown%7CTWFpbGZsb3d8ey
> JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> 3000%7C%7C%7C=tAhREBvBgVQKOFqEQT2%2FKphGxYXUMo3UF5vvQpY
> B%2Be0%3D=0.
> >
> > Add support for sending router solicitation (RS) and processing router
> > advertisements (RA).
> >
> > If the RA has prefix info option and following conditions are met,
> > then
> > gatewayip6 and net_prefix_length of ip6addr env variables are
> > initialized.
> > These are later consumed by IPv6 code for non-local destination IP.
> >
> > - "Router Lifetime" != 0
> > - Prefix is NOT link-local prefix (0xfe80::/10)
> > - L flag is 1
> > - "Valid Lifetime" != 0
> >
> > Timing Parameters:
> > - MAX_RTR_SOLICITATION_DELAY (0-1s)
> > - RTR_SOLICITATION_INTERVAL (4s) (min retransmit delay)
> > - MAX_RTR_SOLICITATIONS (3 RS transmissions)
> >
> > The functionality is enabled by CONFIG_IPV6_ROUTER_DISCOVERY and
> > invoked automatically from net_init_loop().
> >
> > Signed-off-by: Ehsan Mohandesi
> >
> > Conflicts:
> > cmd/Kconfig
> > include/net.h
> > net/net.c
> > ---
> > cmd/Kconfig | 7 ++
> > include/ndisc.h | 23 ++
> > include/net.h | 2 +-
> > include/net6.h | 40 ++
> > net/ndisc.c | 243
> > +---
> > net/net.c | 23 +-
> > net/net6.c | 1 +
> > 7 files changed, 327 insertions(+), 12 deletions(-)
> >
>
> I reviewed this patch and it looks good. I have no critical remarks, only some
> small notes.
>
> I've tested it on SiFive Unmatched board.
>
>
> >
> > +config IPV6_ROUTER_DISCOVERY
> > + bool "Do router discovery"
> > + depends on IPV6
> > + help
> > + Will automatically perform router solicitation on first
> > IPv6
> > + network operation
> > +
> > endif
> >
> I think it is better to write sth like Do IPv6 router discovery because
> IPv4 has also router discovery protocol and it could lead to misunderstanding
>
>
> >
> > net_set_timeout_handler(0, 0);
> >
> Maybe net_set_timeout_handler(0, NULL); is better
>
>
>
> > +/*
> > + * validate_ra() - Validate the router advertisement message.
> > + *
> > + * @ip6:
> > + * @len: Length of the router advertisement packet
> > + *
> > + * Check if the router advertisement message is valid. Conditions
> > are
> > + * according to RFC 4861 section 6.1.2. Validation of Router
> > Advertisement
> > + * Messages.
> > + *
> > + * Return: true if the message is valid and false if it is invalid.
> > + */
> > +static bool validate_ra(struct ip6_hdr *ip6, int len) {
> > + struct icmp6hdr *icmp = (struct icmp6hdr *)(ip6 + 1);
> > +
> > + /* ICMP length (derived from the IP length) should be 16 or
> > more octets. */
> > + if (ip6->payload_len < 16)
> > + return false;
> > +
> > + /* Source IP Address should be a valid link-local address. */
> > + if ((ntohs(ip6->saddr.s6_addr16[0]) & IPV6_LINK_LOCAL_MASK)
> > !=
> > + IPV6_LINK_LOCAL_PREFIX)
> > + return false;
> > +
> > + /*
> > +* The IP Hop Limit field should have a value of 255, i.e.,
> > the packet
> > +* could not possibly have been forwarded by a router.
> > +*/
> > + if (ip6->hop_limit != 255)
> > + return false;
> > +
> Unicast hop limit only?
Sorry, I do not understand what you mean here. What kind of scenario are you
talking about?
It does not matter if the router advertisement is unicast or multicast. In both
cases, the hop limit needs to be 255. A router always sets the hop limit to
255. We do not want an advertisement that is forwarded from another node. Refer
to this for more information.
https://www.rfc-editor.org/rfc/rfc4861#section-6.1.2
>
> > diff --git a/net/net.c b/net/net.c
> > index c9a749f..39f0b81 100644
> > --- a/net/net.c
> > +++ b/net/net.c
> > @@ -24,7 +24,7 @@
> > * - name of bootfile
> > * Next step: ARP
> > *
> > - * LINK_LOCAL:
> > + * LINKLOCAL:
> >
> Maybe it is better to move
Re: [PATCH RFC u-boot-mvebu 0/6] arm: mvebu: Fix boot mode detection
On Thursday 23 March 2023 19:33:27 Pali Rohár wrote: > On Thursday 23 March 2023 11:01:22 Martin Rowe wrote: > > On Wed, 22 Mar 2023 at 18:09, Pali Rohár wrote: > > > > > > On Wednesday 22 March 2023 11:14:42 Martin Rowe wrote: > > > > On Tue, 21 Mar 2023 at 17:26, Pali Rohár wrote: > > > > > > > > > On Tuesday 21 March 2023 08:34:24 Martin Rowe wrote: > > > > > > On Mon, 20 Mar 2023 at 21:33, Pali Rohár wrote: > > > > > > > > > > > > > On Monday 20 March 2023 18:45:01 Pali Rohár wrote: > > > > > > > > On Monday 20 March 2023 12:01:03 Martin Rowe wrote: > > > > > > > > > On Sun, 19 Mar 2023 at 18:20, Pali Rohár > > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > On Sunday 19 March 2023 17:47:57 Pali Rohár wrote: > > > > > > > > > > > On Sunday 19 March 2023 03:30:33 Martin Rowe wrote: > > > > > > > > > > > > On Sun, 5 Mar 2023 at 11:55, Pali Rohár > > > > > > > > > > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > On Sunday 05 March 2023 04:21:42 Martin Rowe wrote: > > > > > > > > > > > > > > On Sat, 4 Mar 2023 at 10:51, Pali Rohár > > > > > > > > > > > > > > > > > > > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Improve code for checking strapping pins which > > > > > specifies > > > > > > > boot > > > > > > > > > > mode > > > > > > > > > > > > > source. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Martin, could you test if Clearfog can be still > > > > > configured > > > > > > > into > > > > > > > > > > UART > > > > > > > > > > > > > > > booting mode via HW switches and if it still works > > > > > > > correctly? > > > > > > > > > > First > > > > > > > > > > > > > > > patch is reverting UART related commit for > > > > > > > > > > > > > > > Clearfog > > > > > which I > > > > > > > > > > think it > > > > > > > > > > > > > not > > > > > > > > > > > > > > > needed anymore. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > On Clearfog the logic in the CONFIG_ARMADA_38X ifdef > > > > > before > > > > > > > the > > > > > > > > > > switch > > > > > > > > > > > > > that > > > > > > > > > > > > > > you refactored in cpu.c/get_boot_device is all that > > > > > > > > > > > > > > gets > > > > > > > > > > processed. It > > > > > > > > > > > > > > decides there is an error and returns > > > > > > > > > > > > > > BOOT_DEVICE_UART, > > > > > > > probably > > > > > > > > > > because > > > > > > > > > > > > > of > > > > > > > > > > > > > > the invalid boot workaround for broken UART > > > > > > > > > > > > > > selection > > > > > that > > > > > > > you > > > > > > > > > > > > > identified. > > > > > > > > > > > > > > > > > > > > > > > > > > Ok, so I figured out correctly how this invalid mode > > > > > > > > > > > > > works. > > > > > > > > > > > > > > > > > > > > > > > > > > > UART only works if I use the clearfog_spi_defconfig > > > > > > > > > > > > > > or > > > > > if I > > > > > > > select > > > > > > > > > > > > > > CONFIG_MVEBU_SPL_BOOT_DEVICE_UART=y. It does not > > > > > > > > > > > > > > work > > > > > with > > > > > > > the MMC > > > > > > > > > > or > > > > > > > > > > > > > SATA > > > > > > > > > > > > > > defconfigs. I get the same result without this patch > > > > > series > > > > > > > > > > applied, > > > > > > > > > > > > > though. > > > > > > > > > > > > > > > > > > > > > > > > > > > > The failed cases have the same output (other than > > > > > > > > > > > > > > kwboot > > > > > > > header > > > > > > > > > > patching > > > > > > > > > > > > > > output) until after sending boot image data is > > > > > > > > > > > > > > complete. > > > > > The > > > > > > > > > > output stops > > > > > > > > > > > > > > after: > > > > > > > > > > > > > > > > > > > > > > > > > > > > 98 % > > > > > > > > > > > > > > > [. > > > > > > > > > > > > > > ] > > > > > > > > > > > > > > Done > > > > > > > > > > > > > > Finishing transfer > > > > > > > > > > > > > > [Type Ctrl-\ + c to quit] > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > This is very strange because > > > > > CONFIG_MVEBU_SPL_BOOT_DEVICE_UART > > > > > > > just > > > > > > > > > > > > > instruct mkimage what to put into kwbimage header. > > > > > > > > > > > > > > > > > > > > > > > > > > If I'm looking at the output correctly then SPL was > > > > > booted, it > > > > > > > > > > correctly > > > > > > > > > > > > > trained DDR RAM, returned back to bootrom, kwboot > > > > > > > > > > > > > continued > > > > > > > sending > > > > > > > > > > main > > > > > > > > > > > > > u-boot and bootrom confirmed that transfer of both > > > > > > > > > > > > > SPL and > > > > > main > > > > > > > > > > u-boot > > > > > > > > > > > > > is complete. But then there is no output from main > > > > > > > > > > > > > u-boot. > > > > > > > > > > > > > > > > > > > > > > > > > > > It looks
Re: [PATCH RFC u-boot-mvebu 0/2] arm: mvebu: Fix eMMC boot
On Thursday 23 March 2023 12:24:13 Martin Rowe wrote: > On Wed, 22 Mar 2023 at 19:09, Pali Rohár wrote: > > > > On Wednesday 22 March 2023 18:59:45 Pali Rohár wrote: > > > On Wednesday 22 March 2023 13:45:56 Martin Rowe wrote: > > > > On Wed, 22 Mar 2023 at 12:38, Martin Rowe > > > > wrote: > > > > > > > > > > On Tue, 21 Mar 2023 at 08:08, Pali Rohár wrote: > > > > >> > > > > >> On Tuesday 21 March 2023 08:01:16 Martin Rowe wrote: > > > > >> > On Mon, 20 Mar 2023 at 17:33, Pali Rohár wrote: > > > > >> > > > > > >> > > On Monday 20 March 2023 11:48:59 Martin Rowe wrote: > > > > >> > > > On Sun, 19 Mar 2023 at 16:22, Pali Rohár > > > > >> > > > wrote: > > > > >> > > > > > > > >> > > > > On Sunday 19 March 2023 00:32:01 Martin Rowe wrote: > > > > >> > > > > > On Mon, 6 Mar 2023 at 11:53, Pali Rohár > > > > >> > > > > > wrote: > > > > >> > > > > > > > > > >> > > > > > > Could you try to print mmc->part_config (ideally as > > > > >> > > > > > > early as > > > > >> > > possible)? > > > > >> > > > > > > > > > > >> > > > > > > > > > >> > > > > > In SPL mmc->part_config is 255 > > > > >> > > > > > In main u-boot at the start of clearfog.c board_init() > > > > >> > > mmc->part_config > > > > >> > > > > is > > > > >> > > > > > 255 > > > > >> > > > > > In main u-boot at the start of clearfog.c checkboard() > > > > >> > > mmc->part_config > > > > >> > > > > is > > > > >> > > > > > 8 (ack: 0, partition_enable: 1, access: 0) > > > > >> > > > > > > > > >> > > > > 255 is uninitialized value. > > > > >> > > > > > > > > >> > > > > > If I set partition_enable to 2, I get the same result > > > > >> > > > > > except the > > > > >> > > value is > > > > >> > > > > > 16 (ack: 0, partition_enable: 2, access: 0) instead of 8 > > > > >> > > > > > for the > > > > >> > > last > > > > >> > > > > value > > > > >> > > > > > > > > >> > > > > Try to change "access" bits. > > > > >> > > > > > > > > >> > > > > > > > > > >> > > > > > BootROM - 1.73 > > > > >> > > > > > > > > > >> > > > > > Booting from MMC > > > > >> > > > > > > > > > >> > > > > > U-Boot SPL 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 > > > > >> > > > > > 2023 - > > > > >> > > 10:05:32 > > > > >> > > > > > +1000) > > > > >> > > > > > High speed PHY - Version: 2.0 > > > > >> > > > > > EEPROM TLV detection failed: Using static config for > > > > >> > > > > > Clearfog Pro. > > > > >> > > > > > Detected Device ID 6828 > > > > >> > > > > > board SerDes lanes topology details: > > > > >> > > > > > | Lane # | Speed | Type | > > > > >> > > > > > > > > > >> > > > > > | 0| 3 | SATA0 | > > > > >> > > > > > | 1| 0 | SGMII1 | > > > > >> > > > > > | 2| 5 | PCIe1 | > > > > >> > > > > > | 3| 5 | USB3 HOST1 | > > > > >> > > > > > | 4| 5 | PCIe2 | > > > > >> > > > > > | 5| 0 | SGMII2 | > > > > >> > > > > > > > > > >> > > > > > High speed PHY - Ended Successfully > > > > >> > > > > > mv_ddr: 14.0.0 > > > > >> > > > > > DDR3 Training Sequence - Switching XBAR Window to FastPath > > > > >> > > > > > Window > > > > >> > > > > > mv_ddr: completed successfully > > > > >> > > > > > spl.c spl_boot_device part_config = 255 > > > > >> > > > > > Trying to boot from MMC1 > > > > >> > > > > > > > > > >> > > > > > > > > > >> > > > > > U-Boot 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - > > > > >> > > > > > 10:05:32 > > > > >> > > +1000) > > > > >> > > > > > > > > > >> > > > > > SoC: MV88F6828-A0 at 1600 MHz > > > > >> > > > > > DRAM: 1 GiB (800 MHz, 32-bit, ECC not enabled) > > > > >> > > > > > clearfog.c board_init part_config = 255 > > > > >> > > > > > Core: 38 devices, 22 uclasses, devicetree: separate > > > > >> > > > > > MMC: mv_sdh: 0 > > > > >> > > > > > Loading Environment from MMC... *** Warning - bad CRC, > > > > >> > > > > > using default > > > > >> > > > > > environment > > > > >> > > > > > > > > > >> > > > > > Model: SolidRun Clearfog A1 > > > > >> > > > > > clearfog.c checkboard part_config = 8 > > > > >> > > > > > Board: SolidRun Clearfog Pro > > > > >> > > > > > Net: > > > > >> > > > > > Warning: ethernet@7 (eth1) using random MAC address - > > > > >> > > > > 32:16:0e:b4:d1:d8 > > > > >> > > > > > eth1: ethernet@7 > > > > >> > > > > > Warning: ethernet@3 (eth2) using random MAC address - > > > > >> > > > > 72:30:3f:79:07:12 > > > > >> > > > > > , eth2: ethernet@3 > > > > >> > > > > > Warning: ethernet@34000 (eth3) using random MAC address - > > > > >> > > > > 82:fb:71:23:46:4f > > > > >> > > > > > , eth3: ethernet@34000 > > > > >> > > > > > Hit any key to stop autoboot: 0 > > > > >> > > > > > => mmc partconf 0 > > > > >> > > > > > EXT_CSD[179], PARTITION_CONFIG: > > > > >> > > > > > BOOT_ACK: 0x0 > > > > >> > > > > > BOOT_PARTITION_ENABLE: 0x1 > > > > >> > > > > > PARTITION_ACCESS: 0x0 > > > > >> > > > > > > > > > >> > > > > > > > > > >> > > > > > > > > > >> > > > > >
Re: [PATCH 1/2] Dockerfile: Populate a pip cache
On Fri, Mar 24, 2023 at 07:28:32AM +1300, Simon Glass wrote: > Hi Tom, > > On Thu, 23 Mar 2023 at 08:19, Tom Rini wrote: > > > > Given the number of jobs in CI we have which use python and pip install > > packages, we should do this once in the Dockerfile, in order to populate > > the cache. We let each job continue to create and use the virtual > > environments they need to facilitate making updates to these > > environments easier. > > > > Signed-off-by: Tom Rini > > --- > > tools/docker/Dockerfile | 13 + > > 1 file changed, 13 insertions(+) > > Reviewed-by: Simon Glass > > > > > diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile > > index bd02531be249..27205002005c 100644 > > --- a/tools/docker/Dockerfile > > +++ b/tools/docker/Dockerfile > > @@ -265,6 +265,19 @@ RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot > > RUN useradd -m -U uboot > > USER uboot:uboot > > > > +# Populate the cache for pip to use > > +RUN wget -O /tmp/pytest-requirements.txt > > https://source.denx.de/u-boot/u-boot/-/raw/master/test/py/requirements.txt > > +RUN wget -O /tmp/sphinx-requirements.txt > > https://source.denx.de/u-boot/u-boot/-/raw/master/doc/sphinx/requirements.txt > > +RUN virtualenv -p /usr/bin/python3 /tmp/venv && \ > > + . /tmp/venv/bin/activate && \ > > + pip install -r /tmp/pytest-requirements.txt \ > > + -r /tmp/sphinx-requirements.txt && \ > > + deactivate && \ > > + rm -rf /tmp/venv /tmp/pytest-requirements.txt > > /tmp/sphinx-requirements.txt > > +#RUN pip download -r /tmp/pytest-requirements.txt \ > > +# -r /tmp/sphinx-requirements.txt && \ > > +# rm -f /tmp/pytest-requirements.txt /tmp/sphinx-requirements.txt > > What are those lines for? Can you add a comment? Oh heck, I sent the wrong two patches from the branch, that's why. Thanks. -- Tom signature.asc Description: PGP signature
[v2 2/2] Dockerfile: Populate a pip cache
Given the number of jobs in CI we have which use python and pip install packages, we should do this once in the Dockerfile, in order to populate the cache. We let each job continue to create and use the virtual environments they need to facilitate making updates to these environments easier. Signed-off-by: Tom Rini --- Changes in v2: - Comment on why we wget - Drop commented out portion --- tools/docker/Dockerfile | 11 +++ 1 file changed, 11 insertions(+) diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile index bd02531be249..20c2b2a9d64c 100644 --- a/tools/docker/Dockerfile +++ b/tools/docker/Dockerfile @@ -265,6 +265,17 @@ RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot RUN useradd -m -U uboot USER uboot:uboot +# Populate the cache for pip to use. Get these via wget as the +# COPY / ADD directives don't work as we need them to. +RUN wget -O /tmp/pytest-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/test/py/requirements.txt +RUN wget -O /tmp/sphinx-requirements.txt https://source.denx.de/u-boot/u-boot/-/raw/master/doc/sphinx/requirements.txt +RUN virtualenv -p /usr/bin/python3 /tmp/venv && \ + . /tmp/venv/bin/activate && \ + pip install -r /tmp/pytest-requirements.txt \ + -r /tmp/sphinx-requirements.txt && \ + deactivate && \ + rm -rf /tmp/venv /tmp/pytest-requirements.txt /tmp/sphinx-requirements.txt + # Create the buildman config file RUN /bin/echo -e "[toolchain]\nroot = /usr" > ~/.buildman RUN /bin/echo -e "kernelorg = /opt/gcc-12.2.0-nolibc/*" >> ~/.buildman -- 2.34.1
[v2 1/2] pytest: Update requirements to match sphinx versions
In order to better make use of pip caches, and also for better overall consistency, we should use the same versions of packages in each of our python requirements files. Update pytest to use the newer versions of packages we use in sphinx builds. Signed-off-by: Tom Rini --- Changes in v2: - Don't forget to send this patch, this time. --- test/py/requirements.txt | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/test/py/requirements.txt b/test/py/requirements.txt index e241780f9238..86d6266053fd 100644 --- a/test/py/requirements.txt +++ b/test/py/requirements.txt @@ -8,21 +8,21 @@ fixtures==3.0.0 importlib-metadata==0.23 linecache2==1.0.0 more-itertools==7.2.0 -packaging==19.2 +packaging==21.3 pbr==5.4.3 pluggy==0.13.0 py==1.10.0 pycryptodomex==3.9.8 pyelftools==0.27 pygit2==1.9.2 -pyparsing==2.4.2 +pyparsing==3.0.7 pytest==6.2.5 pytest-xdist==2.5.0 python-mimeparse==1.6.0 python-subunit==1.3.0 -requests==2.25.1 +requests==2.27.1 setuptools==58.3.0 -six==1.12.0 +six==1.16.0 testtools==2.3.0 traceback2==1.4.0 unittest2==1.1.0 -- 2.34.1
[PATCH v2 16/16] x86: Allow locating UARTs by device ID
When coreboot does not pass a UART in its sysinfo struct, there is no
easy way to find it out. Add a way to specify known UARTs so we can
find them without needing help from coreboot.
Since coreboot does not actually init the serial device when serial is
disabled, it is not possible to make it add this information to the
sysinfo table.
Also, we cannot use the class information, since we don't know which
UART is being used. For example, with Alder Lake there are two:
00.16.00 0x8086 0x51e0 Simple comm. controller 0x80
00.1e.00 0x8086 0x51a8 Simple comm. controller 0x80
In our case the second one is the right one, but thre is no way to
distinguish it from the first one without using the device ID.
If we have Adler Lake hardware which uses a different UART, we could
perhaps look at the ACPI tables, or the machine information passed in
the SMBIOS tables.
This was discussed previously before: [1]
[1]
https://patchwork.ozlabs.org/project/uboot/patch/20210407163159.3.I967ea8c85e009f870c7aa944372d32c990f1b14a@changeid/
Signed-off-by: Simon Glass
---
Changes in v2:
- Move this patch to last in the series, so it can be dropped if needed
arch/x86/dts/coreboot.dts| 4
drivers/serial/serial_coreboot.c | 41
include/pci_ids.h| 3 +++
3 files changed, 48 insertions(+)
diff --git a/arch/x86/dts/coreboot.dts b/arch/x86/dts/coreboot.dts
index f9ff5346a79b..1abd3fddd15c 100644
--- a/arch/x86/dts/coreboot.dts
+++ b/arch/x86/dts/coreboot.dts
@@ -14,6 +14,8 @@
/include/ "rtc.dtsi"
#include "tsc_timer.dtsi"
+#include
+#include
/ {
model = "coreboot x86 payload";
@@ -34,6 +36,8 @@
pci {
compatible = "pci-x86";
bootph-all;
+ u-boot,pci-pre-reloc = <
+ PCI_VENDEV(PCI_VENDOR_ID_INTEL,
PCI_DEVICE_ID_INTEL_ADP_P_UART0) >;
};
serial: serial {
diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c
index 23066e4d0543..bb3a5362dfaf 100644
--- a/drivers/serial/serial_coreboot.c
+++ b/drivers/serial/serial_coreboot.c
@@ -17,6 +17,12 @@
DECLARE_GLOBAL_DATA_PTR;
+static const struct pci_device_id ids[] = {
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL_UART2) },
+ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADP_P_UART0) },
+ {},
+};
+
static int read_dbg2(struct ns16550_plat *plat)
{
struct acpi_table_header *tab;
@@ -94,6 +100,39 @@ static int read_dbg2(struct ns16550_plat *plat)
return 0;
}
+/*
+ * Coreboot only sets up the UART if it uses it and doesn't bother to put the
+ * details in sysinfo if it doesn't. Try to guess in that case, using devices
+ * we know about
+ *
+ * @plat: Platform data to fill in
+ * @return 0 if found, -ve if no UART was found
+ */
+static int guess_uart(struct ns16550_plat *plat)
+{
+ struct udevice *bus, *dev;
+ ulong addr;
+ int index;
+ int ret;
+
+ ret = uclass_first_device_err(UCLASS_PCI, );
+ if (ret)
+ return ret;
+ index = 0;
+ ret = pci_bus_find_devices(bus, ids, , );
+ if (ret)
+ return ret;
+ addr = dm_pci_read_bar32(dev, 0);
+ plat->base = addr;
+ plat->reg_shift = 2;
+ plat->reg_width = 4;
+ plat->clock = 1843200;
+ plat->fcr = UART_FCR_DEFVAL;
+ plat->flags = 0;
+
+ return 0;
+}
+
static int coreboot_of_to_plat(struct udevice *dev)
{
struct ns16550_plat *plat = dev_get_plat(dev);
@@ -113,6 +152,8 @@ static int coreboot_of_to_plat(struct udevice *dev)
} else if (IS_ENABLED(CONFIG_COREBOOT_SERIAL_FROM_DBG2)) {
ret = read_dbg2(plat);
}
+ if (ret && CONFIG_IS_ENABLED(PCI))
+ ret = guess_uart(plat);
if (ret) {
/*
diff --git a/include/pci_ids.h b/include/pci_ids.h
index 88b0a6404585..5ae1b9b7fb6e 100644
--- a/include/pci_ids.h
+++ b/include/pci_ids.h
@@ -2992,6 +2992,9 @@
#define PCI_DEVICE_ID_INTEL_UNC_R3QPI1 0x3c45
#define PCI_DEVICE_ID_INTEL_JAKETOWN_UBOX 0x3ce0
#define PCI_DEVICE_ID_INTEL_IOAT_SNB 0x402f
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART00x51a8
+#define PCI_DEVICE_ID_INTEL_ADP_P_UART10x51a9
+#define PCI_DEVICE_ID_INTEL_APL_UART2 0x5ac0
#define PCI_DEVICE_ID_INTEL_5100_160x65f0
#define PCI_DEVICE_ID_INTEL_5100_190x65f3
#define PCI_DEVICE_ID_INTEL_5100_210x65f5
--
2.40.0.348.gf938b09366-goog
[PATCH v2 14/16] x86: nvme: coreboot: Enable NVMe
Enable support for NVMe storage devices. Update the driver to enable the
bus master bit, since coreboot does not do that automatically.
Signed-off-by: Simon Glass
---
Changes in v2:
- Drop patch 'usb: Quieten a debug message' since it was fixed elsewhere
- Drop patch 'x86: coreboot: Use a memory-mapped UART' (not needed)
configs/coreboot_defconfig | 3 +++
drivers/nvme/nvme_pci.c| 8
2 files changed, 11 insertions(+)
diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig
index 3030e5bf93b4..8bb744e6e84d 100644
--- a/configs/coreboot_defconfig
+++ b/configs/coreboot_defconfig
@@ -59,6 +59,9 @@ CONFIG_SYS_ATA_ALT_OFFSET=0
CONFIG_ATAPI=y
CONFIG_LBA48=y
CONFIG_SYS_64BIT_LBA=y
+CONFIG_MISC=y
+CONFIG_NVMEM=y
+CONFIG_NVME_PCI=y
# CONFIG_PCI_PNP is not set
CONFIG_SOUND=y
CONFIG_SOUND_I8254=y
diff --git a/drivers/nvme/nvme_pci.c b/drivers/nvme/nvme_pci.c
index 36bf9c5ffb73..dff19317943c 100644
--- a/drivers/nvme/nvme_pci.c
+++ b/drivers/nvme/nvme_pci.c
@@ -6,6 +6,7 @@
#include
#include
+#include
#include
#include "nvme.h"
@@ -30,6 +31,13 @@ static int nvme_probe(struct udevice *udev)
ndev->instance = trailing_strtol(udev->name);
ndev->bar = dm_pci_map_bar(udev, PCI_BASE_ADDRESS_0, 0, 0,
PCI_REGION_TYPE, PCI_REGION_MEM);
+
+ if (!ll_boot_init()) {
+ /* Turn on bus-mastering */
+ dm_pci_clrset_config16(udev, PCI_COMMAND, 0,
+ PCI_COMMAND_MASTER);
+ }
+
return nvme_init(udev);
}
--
2.40.0.348.gf938b09366-goog
[PATCH v2 13/16] x86: coreboot: Show unimplemented sysinfo tags
Sometimes coreboot adds new tags that U-Boot does not know about. These
are silently ignored, but it is useful to at least know what we are
missing.
Add a way to collect this information. For Brya it shows:
Unimpl. 38 41 37 34 42 40
These are:
LB_TAG_PLATFORM_BLOB_VERSION
LB_TAG_ACPI_CNVS
LB_TAG_FMAP
LB_TAG_VBOOT_WORKBUF
LB_TAG_TYPE_C_INFO
LB_TAG_BOARD_CONFIG
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
arch/x86/include/asm/cb_sysinfo.h | 6 ++
arch/x86/lib/coreboot/cb_sysinfo.c | 2 ++
cmd/x86/cbsysinfo.c| 8
3 files changed, 16 insertions(+)
diff --git a/arch/x86/include/asm/cb_sysinfo.h
b/arch/x86/include/asm/cb_sysinfo.h
index 6b266149cf65..2c78b22d0d22 100644
--- a/arch/x86/include/asm/cb_sysinfo.h
+++ b/arch/x86/include/asm/cb_sysinfo.h
@@ -16,6 +16,8 @@
#define SYSINFO_MAX_GPIOS 8
/* Up to 10 MAC addresses */
#define SYSINFO_MAX_MACS 10
+/* Track the first 32 unimplemented tags */
+#define SYSINFO_MAX_UNIMPL 32
/**
* struct sysinfo_t - Information passed to U-Boot from coreboot
@@ -134,6 +136,8 @@
* @chromeos_vpd: Chromium OS Vital Product Data region, typically NULL,
meaning
* not used
* @rsdp: Pointer to ACPI RSDP table
+ * @unimpl_count: Number of entries in unimpl_map[]
+ * @unimpl: List of unimplemented IDs (bottom 8 bits only)
*/
struct sysinfo_t {
unsigned int cpu_khz;
@@ -213,6 +217,8 @@ struct sysinfo_t {
u32 mtc_size;
void*chromeos_vpd;
void *rsdp;
+ u32 unimpl_count;
+ u8 unimpl[SYSINFO_MAX_UNIMPL];
};
extern struct sysinfo_t lib_sysinfo;
diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c
b/arch/x86/lib/coreboot/cb_sysinfo.c
index a11a2587f66b..42cc3a128d93 100644
--- a/arch/x86/lib/coreboot/cb_sysinfo.c
+++ b/arch/x86/lib/coreboot/cb_sysinfo.c
@@ -439,6 +439,8 @@ static int cb_parse_header(void *addr, int len, struct
sysinfo_t *info)
cb_parse_acpi_rsdp(rec, info);
break;
default:
+ if (info->unimpl_count < SYSINFO_MAX_UNIMPL)
+ info->unimpl[info->unimpl_count++] = rec->tag;
cb_parse_unhandled(rec->tag, ptr);
break;
}
diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
index 07570b00c9a0..2b8d3b0a4356 100644
--- a/cmd/x86/cbsysinfo.c
+++ b/cmd/x86/cbsysinfo.c
@@ -364,6 +364,14 @@ static void show_table(struct sysinfo_t *info, bool
verbose)
print_ptr("Chrome OS VPD", info->chromeos_vpd);
print_ptr("RSDP", info->rsdp);
+ printf("%-12s: ", "Unimpl.");
+ if (info->unimpl_count) {
+ for (i = 0; i < info->unimpl_count; i++)
+ printf("%02x ", info->unimpl[i]);
+ printf("\n");
+ } else {
+ printf("(none)\n");
+ }
}
static int do_cbsysinfo(struct cmd_tbl *cmdtp, int flag, int argc,
--
2.40.0.348.gf938b09366-goog
[PATCH v2 15/16] coreboot: Enable ms command
This is useful when looking for tables in memory. Enable it for coreboot. Signed-off-by: Simon Glass --- Changes in v2: - Add new patch to enable ms command configs/coreboot_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 8bb744e6e84d..cf0c9590e98d 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -24,6 +24,7 @@ CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=532 +CONFIG_CMD_MEM_SEARCH=y CONFIG_CMD_IDE=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y -- 2.40.0.348.gf938b09366-goog
[PATCH v2 12/16] x86: coreboot: Log function names and line numbers
Turn these options on to make it easier to debug things. Also enable dhrystone so we can get some measure of performance. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) configs/coreboot_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 1bbb358a0220..3030e5bf93b4 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -16,6 +16,9 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="ext2load scsi 0:3 0100 /boot/vmlinuz; zboot 0100" CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_LOG=y +CONFIG_LOGF_LINE=y +CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_PCI_INIT_R=y @@ -60,5 +63,6 @@ CONFIG_SYS_64BIT_LBA=y CONFIG_SOUND=y CONFIG_SOUND_I8254=y CONFIG_CONSOLE_SCROLL_LINES=5 +CONFIG_CMD_DHRYSTONE=y # CONFIG_GZIP is not set CONFIG_SMBIOS_PARSER=y -- 2.40.0.348.gf938b09366-goog
[PATCH v2 11/16] x86: coreboot: Scan PCI after relocation
Enable this so that PCI devices can be used correctly without needing to do a manual scan. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) configs/coreboot_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index fb4d1751108f..1bbb358a0220 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -18,6 +18,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y CONFIG_SYS_CONSOLE_INFO_QUIET=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y +CONFIG_PCI_INIT_R=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=532 CONFIG_CMD_IDE=y -- 2.40.0.348.gf938b09366-goog
[PATCH v2 10/16] x86: coreboot: Document how to enable the debug UART
This is not obvious so add a little note about how it works. Signed-off-by: Simon Glass Reviewed-by: Bin Meng --- (no changes since v1) doc/board/coreboot/coreboot.rst | 29 + 1 file changed, 29 insertions(+) diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst index 4a5f101cad2e..0fe95af56d2d 100644 --- a/doc/board/coreboot/coreboot.rst +++ b/doc/board/coreboot/coreboot.rst @@ -71,3 +71,32 @@ Memory map (typically redirects to 7ab10030 or similar) 500 Location of coreboot sysinfo table, used during startup == == + + +Debug UART +-- + +It is possible to enable the debug UART with coreboot. To do this, use the +info from the cbsysinfo command to locate the UART base. For example:: + + => cbsysinfo + ... + Serial I/O port: + base: + pointer : 767b51bc + type: 2 + base: fe03e000 + baud: 0d115200 + regwidth: 4 + input_hz: 0d1843200 + PCI addr: 0010 + ... + +Here you can see that the UART base is fe03e000, regwidth is 4 (1 << 2) and the +input clock is 1843200. So you can add the following CONFIG options:: + + CONFIG_DEBUG_UART=y + CONFIG_DEBUG_UART_BASE=fe03e000 + CONFIG_DEBUG_UART_CLOCK=1843200 + CONFIG_DEBUG_UART_SHIFT=2 + CONFIG_DEBUG_UART_ANNOUNCE=y -- 2.40.0.348.gf938b09366-goog
[PATCH v2 09/16] x86: coreboot: Use a memory-mapped UART
This is much more common on modern hardware, so default to using it. This does not affect the normal UART, but does allow the debug UART to work, since it uses serial_out_shift(), etc. Signed-off-by: Simon Glass --- Changes in v2: - Expand commit message to explain this is for the debug UART - Update the defconfig instead configs/coreboot64_defconfig | 1 - configs/coreboot_defconfig | 1 - 2 files changed, 2 deletions(-) diff --git a/configs/coreboot64_defconfig b/configs/coreboot64_defconfig index ec672e59e898..60a1924e9e53 100644 --- a/configs/coreboot64_defconfig +++ b/configs/coreboot64_defconfig @@ -62,7 +62,6 @@ CONFIG_ATAPI=y CONFIG_LBA48=y CONFIG_SYS_64BIT_LBA=y # CONFIG_PCI_PNP is not set -CONFIG_SYS_NS16550_PORT_MAPPED=y CONFIG_SOUND=y CONFIG_SOUND_I8254=y CONFIG_CONSOLE_SCROLL_LINES=5 diff --git a/configs/coreboot_defconfig b/configs/coreboot_defconfig index 4db728991692..fb4d1751108f 100644 --- a/configs/coreboot_defconfig +++ b/configs/coreboot_defconfig @@ -56,7 +56,6 @@ CONFIG_ATAPI=y CONFIG_LBA48=y CONFIG_SYS_64BIT_LBA=y # CONFIG_PCI_PNP is not set -CONFIG_SYS_NS16550_PORT_MAPPED=y CONFIG_SOUND=y CONFIG_SOUND_I8254=y CONFIG_CONSOLE_SCROLL_LINES=5 -- 2.40.0.348.gf938b09366-goog
[PATCH v2 08/16] pci: coreboot: Don't read regions when booting
When U-Boot is the second-stage bootloader, PCI is already set up. We
cannot read the regions from the device tree. There is no point anyway,
since PCI devices have already been allocated according to the regions
and it is not safe for U-Boot to make any changes.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
---
(no changes since v1)
drivers/pci/pci-uclass.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 9343cfc62a96..8d27e40338cf 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -973,6 +973,10 @@ static int decode_regions(struct pci_controller *hose,
ofnode parent_node,
int len;
int i;
+ /* handle booting from coreboot, etc. */
+ if (!ll_boot_init())
+ return 0;
+
prop = ofnode_get_property(node, "ranges", );
if (!prop) {
debug("%s: Cannot decode regions\n", __func__);
--
2.40.0.348.gf938b09366-goog
[PATCH v2 07/16] x86: Allow locating the UART from ACPI tables
When coreboot does not pass a UART in its sysinfo struct, there is no
easy way to find it out.
Since coreboot does not actually init the serial device when serial is
disabled, it is not possible to make it add this information to the
sysinfo table.
Add a way to obtain this information from the DBG2 ACPI table, which is
normally set up by coreboot.
For now this only supports a memory-mapped 16550-style UART.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to allow locating the UART from ACPI tables
drivers/serial/Kconfig | 10 +++
drivers/serial/serial_coreboot.c | 114 ---
2 files changed, 116 insertions(+), 8 deletions(-)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 10d07daf2777..0f6c0e561346 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -669,6 +669,16 @@ config COREBOOT_SERIAL
a serial console on any platform without needing to change the
device tree, etc.
+config COREBOOT_SERIAL_FROM_DBG2
+ bool "Obtain UART from ACPI tables"
+ depends on COREBOOT_SERIAL
+ default y
+ help
+ Select this to try to find a DBG2 record in the ACPI tables, in the
+ event that coreboot does not provide information about the UART in the
+ normal sysinfo tables. This provides a useful fallback when serial
+ is not enabled in coreboot.
+
config CORTINA_UART
bool "Cortina UART support"
depends on DM_SERIAL
diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_coreboot.c
index de09c8681f5c..23066e4d0543 100644
--- a/drivers/serial/serial_coreboot.c
+++ b/drivers/serial/serial_coreboot.c
@@ -5,25 +5,123 @@
* Copyright 2019 Google LLC
*/
+#define LOG_CATGEGORY UCLASS_SERIAL
+
#include
#include
+#include
#include
#include
+#include
#include
+DECLARE_GLOBAL_DATA_PTR;
+
+static int read_dbg2(struct ns16550_plat *plat)
+{
+ struct acpi_table_header *tab;
+ struct acpi_dbg2_header *hdr;
+ struct acpi_dbg2_device *dbg;
+ struct acpi_gen_regaddr *addr;
+ u32 *addr_size;
+
+ log_debug("Looking for DBG2 in ACPI tables\n");
+ if (!gd->acpi_start) {
+ log_debug("No ACPI tables\n");
+ return -ENOENT;
+ }
+
+ tab = acpi_find_table("DBG2");
+ if (!tab) {
+ log_debug("No DBG2 table\n");
+ return -ENOENT;
+ }
+ hdr = container_of(tab, struct acpi_dbg2_header, header);
+
+ /* We only use the first device, but check that there is at least one */
+ if (!hdr->devices_count) {
+ log_debug("No devices\n");
+ return -ENOENT;
+ }
+ if (hdr->devices_offset >= tab->length) {
+ log_debug("Invalid offset\n");
+ return -EINVAL;
+ }
+ dbg = (void *)hdr + hdr->devices_offset;
+ if (dbg->revision) {
+ log_debug("Invalid revision %d\n", dbg->revision);
+ return -EINVAL;
+ }
+ if (!dbg->address_count) {
+ log_debug("No addresses\n");
+ return -EINVAL;
+ }
+ if (dbg->port_type != ACPI_DBG2_SERIAL_PORT) {
+ log_debug("Not a serial port\n");
+ return -EPROTOTYPE;
+ }
+ if (dbg->port_subtype != ACPI_DBG2_16550_COMPATIBLE) {
+ log_debug("Incompatible serial port\n");
+ return -EPROTOTYPE;
+ }
+ if (dbg->base_address_offset >= dbg->length ||
+ dbg->address_size_offset >= dbg->length) {
+ log_debug("Invalid base address/size offsets %d, %d\n",
+ dbg->base_address_offset, dbg->address_size_offset);
+ return -EINVAL;
+ }
+ addr_size = (void *)dbg + dbg->address_size_offset;
+ if (!*addr_size) {
+ log_debug("Zero address size\n");
+ return -EINVAL;
+ }
+ addr = (void *)dbg + dbg->base_address_offset;
+ if (addr->space_id != ACPI_ADDRESS_SPACE_MEMORY) {
+ log_debug("Incompatible space %d\n", addr->space_id);
+ return -EPROTOTYPE;
+ }
+
+ plat->base = addr->addrl;
+
+ /* ACPI_ACCESS_SIZE_DWORD_ACCESS is 3; we want 2 */
+ plat->reg_shift = addr->access_size - 1;
+ plat->reg_width = 4; /* coreboot sets bit_width to 0 */
+ plat->clock = 1843200;
+ plat->fcr = UART_FCR_DEFVAL;
+ plat->flags = 0;
+ log_debug("Collected UART from ACPI DBG2 table\n");
+
+ return 0;
+}
+
static int coreboot_of_to_plat(struct udevice *dev)
{
struct ns16550_plat *plat = dev_get_plat(dev);
struct cb_serial *cb_info = lib_sysinfo.serial;
+ int ret = -ENOENT;
- plat->base = cb_info->baseaddr;
- plat->reg_shift = cb_info->regwidth == 4 ? 2 : 0;
- plat->reg_width = cb_info->regwidth;
- plat->clock = cb_info->input_hertz;
-
[PATCH v2 06/16] x86: coreboot: Collect the address of the ACPI tables
At present any ACPI tables created by prior-stage firmware are ignored.
It is useful to be able to view these in U-Boot.
Pick this up from the sysinfo tables and display it with the cbsysinfo
command. This allows the 'acpi list' command to work when booting from
coreboot.
Adjust the global_data condition so that acpi_start is available even if
table-generation is disabled.
Signed-off-by: Simon Glass
---
Changes in v2:
- Use tab instead of space in header file
- Refactor two patches into one
arch/x86/include/asm/cb_sysinfo.h | 2 ++
arch/x86/include/asm/coreboot_tables.h | 2 ++
arch/x86/lib/coreboot/cb_sysinfo.c | 11 +++
cmd/x86/cbsysinfo.c| 1 +
include/asm-generic/global_data.h | 4 ++--
5 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/cb_sysinfo.h
b/arch/x86/include/asm/cb_sysinfo.h
index 0201ac6b03a9..6b266149cf65 100644
--- a/arch/x86/include/asm/cb_sysinfo.h
+++ b/arch/x86/include/asm/cb_sysinfo.h
@@ -133,6 +133,7 @@
* @mtc_size: Size of MTC region
* @chromeos_vpd: Chromium OS Vital Product Data region, typically NULL,
meaning
* not used
+ * @rsdp: Pointer to ACPI RSDP table
*/
struct sysinfo_t {
unsigned int cpu_khz;
@@ -211,6 +212,7 @@ struct sysinfo_t {
u64 mtc_start;
u32 mtc_size;
void*chromeos_vpd;
+ void *rsdp;
};
extern struct sysinfo_t lib_sysinfo;
diff --git a/arch/x86/include/asm/coreboot_tables.h
b/arch/x86/include/asm/coreboot_tables.h
index f131de56a405..4de137fbab9d 100644
--- a/arch/x86/include/asm/coreboot_tables.h
+++ b/arch/x86/include/asm/coreboot_tables.h
@@ -422,6 +422,8 @@ struct cb_tsc_info {
#define CB_TAG_SERIALNO0x002a
#define CB_MAX_SERIALNO_LENGTH 32
+#define CB_TAG_ACPI_RSDP 0x0043
+
#define CB_TAG_CMOS_OPTION_TABLE 0x00c8
struct cb_cmos_option_table {
diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c
b/arch/x86/lib/coreboot/cb_sysinfo.c
index 748fa4ee53bb..a11a2587f66b 100644
--- a/arch/x86/lib/coreboot/cb_sysinfo.c
+++ b/arch/x86/lib/coreboot/cb_sysinfo.c
@@ -264,6 +264,13 @@ static void cb_parse_mrc_cache(void *ptr, struct sysinfo_t
*info)
info->mrc_cache = map_sysmem(cbmem->cbmem_tab, 0);
}
+static void cb_parse_acpi_rsdp(void *ptr, struct sysinfo_t *info)
+{
+ struct cb_cbmem_tab *const cbmem = (struct cb_cbmem_tab *)ptr;
+
+ info->rsdp = map_sysmem(cbmem->cbmem_tab, 0);
+}
+
__weak void cb_parse_unhandled(u32 tag, unsigned char *ptr)
{
}
@@ -428,6 +435,9 @@ static int cb_parse_header(void *addr, int len, struct
sysinfo_t *info)
case CB_TAG_MRC_CACHE:
cb_parse_mrc_cache(rec, info);
break;
+ case CB_TAG_ACPI_RSDP:
+ cb_parse_acpi_rsdp(rec, info);
+ break;
default:
cb_parse_unhandled(rec->tag, ptr);
break;
@@ -454,6 +464,7 @@ int get_coreboot_info(struct sysinfo_t *info)
if (!ret)
return -ENOENT;
gd->arch.coreboot_table = addr;
+ gd_set_acpi_start(map_to_sysmem(info->rsdp));
gd->flags |= GD_FLG_SKIP_LL_INIT;
return 0;
diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
index 34fdaf5b1b1c..07570b00c9a0 100644
--- a/cmd/x86/cbsysinfo.c
+++ b/cmd/x86/cbsysinfo.c
@@ -363,6 +363,7 @@ static void show_table(struct sysinfo_t *info, bool verbose)
print_hex("MTC size", info->mtc_size);
print_ptr("Chrome OS VPD", info->chromeos_vpd);
+ print_ptr("RSDP", info->rsdp);
}
static int do_cbsysinfo(struct cmd_tbl *cmdtp, int flag, int argc,
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index 987fb66c17a3..422e0cf4720f 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -457,7 +457,7 @@ struct global_data {
*/
fdt_addr_t translation_offset;
#endif
-#ifdef CONFIG_GENERATE_ACPI_TABLE
+#ifdef CONFIG_ACPI
/**
* @acpi_ctx: ACPI context pointer
*/
@@ -536,7 +536,7 @@ static_assert(sizeof(struct global_data) == GD_SIZE);
#define gd_dm_priv_base() NULL
#endif
-#ifdef CONFIG_GENERATE_ACPI_TABLE
+#ifdef CONFIG_ACPI
#define gd_acpi_ctx() gd->acpi_ctx
#define gd_acpi_start()gd->acpi_start
#define gd_set_acpi_start(addr)gd->acpi_start = addr
--
2.40.0.348.gf938b09366-goog
[PATCH v2 05/16] acpi: Move the table-finding functions into the libary
This is useful for other features. Move the function into library code
so it can be used outside just the 'acpi' command.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to move acpi-table-finding functions into the library
cmd/acpi.c| 40 +-
include/acpi/acpi_table.h | 8 +++
lib/acpi/Makefile | 2 ++
lib/acpi/acpi.c | 45 +++
4 files changed, 56 insertions(+), 39 deletions(-)
create mode 100644 lib/acpi/acpi.c
diff --git a/cmd/acpi.c b/cmd/acpi.c
index 991b5235e289..e70913e40bfe 100644
--- a/cmd/acpi.c
+++ b/cmd/acpi.c
@@ -36,49 +36,11 @@ static void dump_hdr(struct acpi_table_header *hdr)
}
}
-/**
- * find_table() - Look up an ACPI table
- *
- * @sig: Signature of table (4 characters, upper case)
- * Return: pointer to table header, or NULL if not found
- */
-struct acpi_table_header *find_table(const char *sig)
-{
- struct acpi_rsdp *rsdp;
- struct acpi_rsdt *rsdt;
- int len, i, count;
-
- rsdp = map_sysmem(gd_acpi_start(), 0);
- if (!rsdp)
- return NULL;
- rsdt = map_sysmem(rsdp->rsdt_address, 0);
- len = rsdt->header.length - sizeof(rsdt->header);
- count = len / sizeof(u32);
- for (i = 0; i < count; i++) {
- struct acpi_table_header *hdr;
-
- hdr = map_sysmem(rsdt->entry[i], 0);
- if (!memcmp(hdr->signature, sig, ACPI_NAME_LEN))
- return hdr;
- if (!memcmp(hdr->signature, "FACP", ACPI_NAME_LEN)) {
- struct acpi_fadt *fadt = (struct acpi_fadt *)hdr;
-
- if (!memcmp(sig, "DSDT", ACPI_NAME_LEN) && fadt->dsdt)
- return map_sysmem(fadt->dsdt, 0);
- if (!memcmp(sig, "FACS", ACPI_NAME_LEN) &&
- fadt->firmware_ctrl)
- return map_sysmem(fadt->firmware_ctrl, 0);
- }
- }
-
- return NULL;
-}
-
static int dump_table_name(const char *sig)
{
struct acpi_table_header *hdr;
- hdr = find_table(sig);
+ hdr = acpi_find_table(sig);
if (!hdr)
return -ENOENT;
printf("%.*s @ %08lx\n", ACPI_NAME_LEN, hdr->signature,
diff --git a/include/acpi/acpi_table.h b/include/acpi/acpi_table.h
index 4030d25c66a0..72022127c340 100644
--- a/include/acpi/acpi_table.h
+++ b/include/acpi/acpi_table.h
@@ -925,6 +925,14 @@ ulong write_acpi_tables(ulong start);
#endif /* !__ACPI__*/
+/**
+ * acpi_find_table() - Look up an ACPI table
+ *
+ * @sig: Signature of table (4 characters, upper case)
+ * Return: pointer to table header, or NULL if not found
+ */
+struct acpi_table_header *acpi_find_table(const char *sig);
+
#include
#endif /* __ACPI_TABLE_H__ */
diff --git a/lib/acpi/Makefile b/lib/acpi/Makefile
index 12337abaecfa..c1c9675b5d2a 100644
--- a/lib/acpi/Makefile
+++ b/lib/acpi/Makefile
@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-y += acpi.o
+
ifdef CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE
obj-$(CONFIG_$(SPL_)ACPIGEN) += acpigen.o
diff --git a/lib/acpi/acpi.c b/lib/acpi/acpi.c
new file mode 100644
index ..14b15754f492
--- /dev/null
+++ b/lib/acpi/acpi.c
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Utility functions for ACPI
+ *
+ * Copyright 2023 Google LLC
+ */
+
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct acpi_table_header *acpi_find_table(const char *sig)
+{
+ struct acpi_rsdp *rsdp;
+ struct acpi_rsdt *rsdt;
+ int len, i, count;
+
+ rsdp = map_sysmem(gd_acpi_start(), 0);
+ if (!rsdp)
+ return NULL;
+ rsdt = map_sysmem(rsdp->rsdt_address, 0);
+ len = rsdt->header.length - sizeof(rsdt->header);
+ count = len / sizeof(u32);
+ for (i = 0; i < count; i++) {
+ struct acpi_table_header *hdr;
+
+ hdr = map_sysmem(rsdt->entry[i], 0);
+ if (!memcmp(hdr->signature, sig, ACPI_NAME_LEN))
+ return hdr;
+ if (!memcmp(hdr->signature, "FACP", ACPI_NAME_LEN)) {
+ struct acpi_fadt *fadt = (struct acpi_fadt *)hdr;
+
+ if (!memcmp(sig, "DSDT", ACPI_NAME_LEN) && fadt->dsdt)
+ return map_sysmem(fadt->dsdt, 0);
+ if (!memcmp(sig, "FACS", ACPI_NAME_LEN) &&
+ fadt->firmware_ctrl)
+ return map_sysmem(fadt->firmware_ctrl, 0);
+ }
+ }
+
+ return NULL;
+}
--
2.40.0.348.gf938b09366-goog
[PATCH v2 04/16] acpi: Create a new Kconfig for ACPI
We have several Kconfig options for ACPI, but all relate to specific
functions, such as generating tables and AML code.
Add a new option which controls including basic ACPI library code,
including the lib/acpi directory. This will allow us to add functions
which are available even if table generation is not supported.
Adjust the command to avoid a build error when ACPIGEN is not enabled.
Signed-off-by: Simon Glass
---
Changes in v2:
- Add new patch to create a new Kconfig for ACPI
cmd/Kconfig | 2 +-
cmd/acpi.c | 4
drivers/core/Kconfig | 1 +
lib/Kconfig | 11 ++-
lib/Makefile | 2 +-
lib/acpi/Makefile| 4
6 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index ba5ec69293fd..1bffbe2e2ba0 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -109,7 +109,7 @@ menu "Info commands"
config CMD_ACPI
bool "acpi"
- depends on ACPIGEN
+ depends on ACPI
default y
help
List and dump ACPI tables. ACPI (Advanced Configuration and Power
diff --git a/cmd/acpi.c b/cmd/acpi.c
index d0fc062ef8cb..991b5235e289 100644
--- a/cmd/acpi.c
+++ b/cmd/acpi.c
@@ -162,6 +162,10 @@ static int do_acpi_items(struct cmd_tbl *cmdtp, int flag,
int argc,
bool dump_contents;
dump_contents = argc >= 2 && !strcmp("-d", argv[1]);
+ if (!IS_ENABLED(CONFIG_ACPIGEN)) {
+ printf("Not supported (enable ACPIGEN)\n");
+ return CMD_RET_FAILURE;
+ }
acpi_dump_items(dump_contents ? ACPI_DUMP_CONTENTS : ACPI_DUMP_LIST);
return 0;
diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig
index 0f755aa702ee..f0d848f45d8e 100644
--- a/drivers/core/Kconfig
+++ b/drivers/core/Kconfig
@@ -448,6 +448,7 @@ config OFNODE_MULTI_TREE_MAX
config ACPIGEN
bool "Support ACPI table generation in driver model"
+ depends on ACPI
default y if SANDBOX || (GENERATE_ACPI_TABLE && !QEMU)
select LIB_UUID
help
diff --git a/lib/Kconfig b/lib/Kconfig
index 4278b2405546..bd8002cef142 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -281,9 +281,18 @@ config SUPPORT_ACPI
U-Boot can generate these tables and pass them to the Operating
System.
+config ACPI
+ bool "Enable support for ACPI libraries"
+ depends on SUPPORT_ACPI
+ default y
+ help
+ Provides library functions for dealing with ACPI tables. This does
+ not necessarily include generation of tables
+ (see GENERATE_ACPI_TABLE), but allows for tables to be located.
+
config GENERATE_ACPI_TABLE
bool "Generate an ACPI (Advanced Configuration and Power Interface)
table"
- depends on SUPPORT_ACPI
+ depends on ACPI
select QFW if QEMU
help
The Advanced Configuration and Power Interface (ACPI) specification
diff --git a/lib/Makefile b/lib/Makefile
index 10aa7ac02985..8d8ccc8bbc39 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -66,7 +66,7 @@ obj-$(CONFIG_$(SPL_TPL_)CRC8) += crc8.o
obj-y += crypto/
-obj-$(CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE) += acpi/
+obj-$(CONFIG_$(SPL_TPL_)ACPI) += acpi/
obj-$(CONFIG_$(SPL_)MD5) += md5.o
obj-$(CONFIG_ECDSA) += ecdsa/
obj-$(CONFIG_$(SPL_)RSA) += rsa/
diff --git a/lib/acpi/Makefile b/lib/acpi/Makefile
index 956b5a0d7265..12337abaecfa 100644
--- a/lib/acpi/Makefile
+++ b/lib/acpi/Makefile
@@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE
+
obj-$(CONFIG_$(SPL_)ACPIGEN) += acpigen.o
obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi_device.o
obj-$(CONFIG_$(SPL_)ACPIGEN) += acpi_dp.o
@@ -21,3 +23,5 @@ endif
obj-y += facs.o
obj-y += ssdt.o
endif
+
+endif # GENERATE_ACPI_TABLE
--
2.40.0.348.gf938b09366-goog
[PATCH v2 03/16] input: Flush the keyboard buffer before resetting it
If U-Boot is not the first-stage bootloader the keyboard may already be
set up. Make sure to flush any data before trying to reset it. This
avoids a long timeout / hang.
Add some comments and a log category while we are here.
Signed-off-by: Simon Glass
---
Changes in v2:
- Flush the buffer instead of skipping the reset
drivers/input/i8042.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/input/i8042.c b/drivers/input/i8042.c
index 3563dc98838f..e6070ca01529 100644
--- a/drivers/input/i8042.c
+++ b/drivers/input/i8042.c
@@ -6,6 +6,8 @@
/* i8042.c - Intel 8042 keyboard driver routines */
+#define LOG_CATEGORY UCLASS_KEYBOARD
+
#include
#include
#include
@@ -54,6 +56,14 @@ static unsigned char ext_key_map[] = {
0x00 /* map end */
};
+/**
+ * kbd_input_empty() - Wait until the keyboard is ready for a command
+ *
+ * Checks the IBF flag (input buffer full), waiting for it to indicate that
+ * any previous command has been processed.
+ *
+ * Return: true if ready, false if it timed out
+ */
static int kbd_input_empty(void)
{
int kbd_timeout = KBD_TIMEOUT * 1000;
@@ -64,6 +74,12 @@ static int kbd_input_empty(void)
return kbd_timeout != -1;
}
+/**
+ * kbd_output_full() - Wait until the keyboard has data available
+ *
+ * Checks the OBF flag (output buffer full), waiting for it to indicate that
+ * a response to a previous command is available
+ */
static int kbd_output_full(void)
{
int kbd_timeout = KBD_TIMEOUT * 1000;
@@ -127,6 +143,9 @@ static int kbd_reset(int quirk)
{
int config;
+ if (!kbd_input_empty())
+ goto err;
+
/* controller self test */
if (kbd_cmd_read(CMD_SELF_TEST) != KBC_TEST_OK)
goto err;
--
2.40.0.348.gf938b09366-goog
[PATCH v2 02/16] x86: Adjust search range for sysinfo table
Avoid searching starting at 0 since this memory may not be available,
e.g. if protection against NULL-pointer access is enabled. The table
cannot be there anyway, since the first 1KB of memory was originally
used for the interrupt table and coreboot avoids it.
Start at 0x400 instead.
Signed-off-by: Simon Glass
---
Changes in v2:
- Update commit message with more detail
- Update code comment to mention that addresses <1KB are ignored
arch/x86/cpu/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c
index 6fe6eaf6c84e..281e966c 100644
--- a/arch/x86/cpu/cpu.c
+++ b/arch/x86/cpu/cpu.c
@@ -351,8 +351,8 @@ long locate_coreboot_table(void)
{
long addr;
- /* We look for LBIO in the first 4K of RAM and again at 960KB */
- addr = detect_coreboot_table_at(0x0, 0x1000);
+ /* We look for LBIO from addresses 1K-4K and again at 960KB */
+ addr = detect_coreboot_table_at(0x400, 0xc00);
if (addr < 0)
addr = detect_coreboot_table_at(0xf, 0x1000);
--
2.40.0.348.gf938b09366-goog
[PATCH v2 01/16] mtrr: Don't show an invalid CPU number
When U-Boot did not do the MP init, we don't get an actual CPU number
here. Skip printing it in that case.
Signed-off-by: Simon Glass
---
Changes in v2:
- Don't show an invalid CPU number on error
cmd/x86/mtrr.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/cmd/x86/mtrr.c b/cmd/x86/mtrr.c
index b213a942fde4..ff4be6b7bf5b 100644
--- a/cmd/x86/mtrr.c
+++ b/cmd/x86/mtrr.c
@@ -145,10 +145,12 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int
argc,
for (; i >= 0; i = mp_next_cpu(cpu_select, i)) {
if (!first)
printf("\n");
- printf("CPU %d:\n", i);
+ if (i < MP_SELECT_ALL)
+ printf("CPU %d:\n", i);
ret = do_mtrr_list(reg_count, i);
if (ret) {
- printf("Failed to read CPU %d (err=%d)\n", i,
+ printf("Failed to read CPU %s (err=%d)\n",
+ i < MP_SELECT_ALL ? simple_itoa(i) : "",
ret);
return CMD_RET_FAILURE;
}
--
2.40.0.348.gf938b09366-goog
Re: [PATCH RFC u-boot-mvebu 0/6] arm: mvebu: Fix boot mode detection
On Thursday 23 March 2023 11:01:22 Martin Rowe wrote: > On Wed, 22 Mar 2023 at 18:09, Pali Rohár wrote: > > > > On Wednesday 22 March 2023 11:14:42 Martin Rowe wrote: > > > On Tue, 21 Mar 2023 at 17:26, Pali Rohár wrote: > > > > > > > On Tuesday 21 March 2023 08:34:24 Martin Rowe wrote: > > > > > On Mon, 20 Mar 2023 at 21:33, Pali Rohár wrote: > > > > > > > > > > > On Monday 20 March 2023 18:45:01 Pali Rohár wrote: > > > > > > > On Monday 20 March 2023 12:01:03 Martin Rowe wrote: > > > > > > > > On Sun, 19 Mar 2023 at 18:20, Pali Rohár > > > > > > > > wrote: > > > > > > > > > > > > > > > > > On Sunday 19 March 2023 17:47:57 Pali Rohár wrote: > > > > > > > > > > On Sunday 19 March 2023 03:30:33 Martin Rowe wrote: > > > > > > > > > > > On Sun, 5 Mar 2023 at 11:55, Pali Rohár > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > On Sunday 05 March 2023 04:21:42 Martin Rowe wrote: > > > > > > > > > > > > > On Sat, 4 Mar 2023 at 10:51, Pali Rohár > > > > > > > > > > > > > > > > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > > > > > > > > > > Improve code for checking strapping pins which > > > > specifies > > > > > > boot > > > > > > > > > mode > > > > > > > > > > > > source. > > > > > > > > > > > > > > > > > > > > > > > > > > > > Martin, could you test if Clearfog can be still > > > > configured > > > > > > into > > > > > > > > > UART > > > > > > > > > > > > > > booting mode via HW switches and if it still works > > > > > > correctly? > > > > > > > > > First > > > > > > > > > > > > > > patch is reverting UART related commit for Clearfog > > > > which I > > > > > > > > > think it > > > > > > > > > > > > not > > > > > > > > > > > > > > needed anymore. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > On Clearfog the logic in the CONFIG_ARMADA_38X ifdef > > > > before > > > > > > the > > > > > > > > > switch > > > > > > > > > > > > that > > > > > > > > > > > > > you refactored in cpu.c/get_boot_device is all that > > > > > > > > > > > > > gets > > > > > > > > > processed. It > > > > > > > > > > > > > decides there is an error and returns > > > > > > > > > > > > > BOOT_DEVICE_UART, > > > > > > probably > > > > > > > > > because > > > > > > > > > > > > of > > > > > > > > > > > > > the invalid boot workaround for broken UART selection > > > > that > > > > > > you > > > > > > > > > > > > identified. > > > > > > > > > > > > > > > > > > > > > > > > Ok, so I figured out correctly how this invalid mode > > > > > > > > > > > > works. > > > > > > > > > > > > > > > > > > > > > > > > > UART only works if I use the clearfog_spi_defconfig or > > > > if I > > > > > > select > > > > > > > > > > > > > CONFIG_MVEBU_SPL_BOOT_DEVICE_UART=y. It does not work > > > > with > > > > > > the MMC > > > > > > > > > or > > > > > > > > > > > > SATA > > > > > > > > > > > > > defconfigs. I get the same result without this patch > > > > series > > > > > > > > > applied, > > > > > > > > > > > > though. > > > > > > > > > > > > > > > > > > > > > > > > > > The failed cases have the same output (other than > > > > > > > > > > > > > kwboot > > > > > > header > > > > > > > > > patching > > > > > > > > > > > > > output) until after sending boot image data is > > > > > > > > > > > > > complete. > > > > The > > > > > > > > > output stops > > > > > > > > > > > > > after: > > > > > > > > > > > > > > > > > > > > > > > > > > 98 % > > > > > > > > > > > > > [. > > > > > > > > > > > > > ] > > > > > > > > > > > > > Done > > > > > > > > > > > > > Finishing transfer > > > > > > > > > > > > > [Type Ctrl-\ + c to quit] > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > This is very strange because > > > > CONFIG_MVEBU_SPL_BOOT_DEVICE_UART > > > > > > just > > > > > > > > > > > > instruct mkimage what to put into kwbimage header. > > > > > > > > > > > > > > > > > > > > > > > > If I'm looking at the output correctly then SPL was > > > > booted, it > > > > > > > > > correctly > > > > > > > > > > > > trained DDR RAM, returned back to bootrom, kwboot > > > > > > > > > > > > continued > > > > > > sending > > > > > > > > > main > > > > > > > > > > > > u-boot and bootrom confirmed that transfer of both SPL > > > > > > > > > > > > and > > > > main > > > > > > > > > u-boot > > > > > > > > > > > > is complete. But then there is no output from main > > > > > > > > > > > > u-boot. > > > > > > > > > > > > > > > > > > > > > > > > > It looks like an unrelated issue with kwboot.c, which > > > > > > > > > > > > > I > > > > was > > > > > > sure > > > > > > > > > was > > > > > > > > > > > > > working after the last patches but I can no longer > > > > reproduce > > > > > > a > > > > > > > > > successful > > > > > > > > > > > > > boot. > > > > > > > > > > > > > > > > > > > > > > > > Can you check that you are using _both_ mkimage and > > > > > > > > > > > > kwboot > > >
[PATCH v2 00/16] x86: Various minor enhancements for coreboot
This series includes some patches generated while getting U-Boot to boot more nicely on Brya, an Adler Lake Chromebook. This includes: - show the ACPI tables with 'acpi list' - get the UART to work even if coreboot doesn't enable it - show unimplemented sysinfo tags - fix for keyboard not working - fix for trying to set up PCI regions when the info is not available - fix for looking at inaccessible memory to find the sysinfo table Changes in v2: - Don't show an invalid CPU number on error - Update commit message with more detail - Update code comment to mention that addresses <1KB are ignored - Flush the buffer instead of skipping the reset - Add new patch to create a new Kconfig for ACPI - Add new patch to move acpi-table-finding functions into the library - Use tab instead of space in header file - Refactor two patches into one - Add new patch to allow locating the UART from ACPI tables - Expand commit message to explain this is for the debug UART - Update the defconfig instead - Drop patch 'usb: Quieten a debug message' since it was fixed elsewhere - Drop patch 'x86: coreboot: Use a memory-mapped UART' (not needed) - Add new patch to enable ms command - Move this patch to last in the series, so it can be dropped if needed Simon Glass (16): mtrr: Don't show an invalid CPU number x86: Adjust search range for sysinfo table input: Flush the keyboard buffer before resetting it acpi: Create a new Kconfig for ACPI acpi: Move the table-finding functions into the libary x86: coreboot: Collect the address of the ACPI tables x86: Allow locating the UART from ACPI tables pci: coreboot: Don't read regions when booting x86: coreboot: Use a memory-mapped UART x86: coreboot: Document how to enable the debug UART x86: coreboot: Scan PCI after relocation x86: coreboot: Log function names and line numbers x86: coreboot: Show unimplemented sysinfo tags x86: nvme: coreboot: Enable NVMe coreboot: Enable ms command x86: Allow locating UARTs by device ID arch/x86/cpu/cpu.c | 4 +- arch/x86/dts/coreboot.dts | 4 + arch/x86/include/asm/cb_sysinfo.h | 8 ++ arch/x86/include/asm/coreboot_tables.h | 2 + arch/x86/lib/coreboot/cb_sysinfo.c | 13 +++ cmd/Kconfig| 2 +- cmd/acpi.c | 44 +-- cmd/x86/cbsysinfo.c| 9 ++ cmd/x86/mtrr.c | 6 +- configs/coreboot64_defconfig | 1 - configs/coreboot_defconfig | 10 +- doc/board/coreboot/coreboot.rst| 29 + drivers/core/Kconfig | 1 + drivers/input/i8042.c | 19 +++ drivers/nvme/nvme_pci.c| 8 ++ drivers/pci/pci-uclass.c | 4 + drivers/serial/Kconfig | 10 ++ drivers/serial/serial_coreboot.c | 155 +++-- include/acpi/acpi_table.h | 8 ++ include/asm-generic/global_data.h | 4 +- include/pci_ids.h | 3 + lib/Kconfig| 11 +- lib/Makefile | 2 +- lib/acpi/Makefile | 6 + lib/acpi/acpi.c| 45 +++ 25 files changed, 350 insertions(+), 58 deletions(-) create mode 100644 lib/acpi/acpi.c -- 2.40.0.348.gf938b09366-goog
Re: [PATCH 2/2] CI: Update to have pip cache
On Thu, 23 Mar 2023 at 08:19, Tom Rini wrote: > > Signed-off-by: Tom Rini > --- > .azure-pipelines.yml | 2 +- > .gitlab-ci.yml | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > Reviewed-by: Simon Glass
Re: [PATCH 1/2] Dockerfile: Populate a pip cache
Hi Tom, On Thu, 23 Mar 2023 at 08:19, Tom Rini wrote: > > Given the number of jobs in CI we have which use python and pip install > packages, we should do this once in the Dockerfile, in order to populate > the cache. We let each job continue to create and use the virtual > environments they need to facilitate making updates to these > environments easier. > > Signed-off-by: Tom Rini > --- > tools/docker/Dockerfile | 13 + > 1 file changed, 13 insertions(+) Reviewed-by: Simon Glass > > diff --git a/tools/docker/Dockerfile b/tools/docker/Dockerfile > index bd02531be249..27205002005c 100644 > --- a/tools/docker/Dockerfile > +++ b/tools/docker/Dockerfile > @@ -265,6 +265,19 @@ RUN echo uboot ALL=NOPASSWD: ALL > /etc/sudoers.d/uboot > RUN useradd -m -U uboot > USER uboot:uboot > > +# Populate the cache for pip to use > +RUN wget -O /tmp/pytest-requirements.txt > https://source.denx.de/u-boot/u-boot/-/raw/master/test/py/requirements.txt > +RUN wget -O /tmp/sphinx-requirements.txt > https://source.denx.de/u-boot/u-boot/-/raw/master/doc/sphinx/requirements.txt > +RUN virtualenv -p /usr/bin/python3 /tmp/venv && \ > + . /tmp/venv/bin/activate && \ > + pip install -r /tmp/pytest-requirements.txt \ > + -r /tmp/sphinx-requirements.txt && \ > + deactivate && \ > + rm -rf /tmp/venv /tmp/pytest-requirements.txt > /tmp/sphinx-requirements.txt > +#RUN pip download -r /tmp/pytest-requirements.txt \ > +# -r /tmp/sphinx-requirements.txt && \ > +# rm -f /tmp/pytest-requirements.txt /tmp/sphinx-requirements.txt What are those lines for? Can you add a comment? > + > # Create the buildman config file > RUN /bin/echo -e "[toolchain]\nroot = /usr" > ~/.buildman > RUN /bin/echo -e "kernelorg = /opt/gcc-12.2.0-nolibc/*" >> ~/.buildman > -- > 2.34.1 > Regards, Simon
Re: [PATCH v2 u-boot] cmd: mmc: Return CMD_RET_* from commands
On Thu, 23 Mar 2023 at 09:07, Pali Rohár wrote: > > Numeric return values may cause strange errors line: > exit not allowed from main input shell. > > Signed-off-by: Pali Rohár > --- > Rename r to ret. > --- > cmd/mmc.c | 18 +- > 1 file changed, 13 insertions(+), 5 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH 06/13] x86: Allow locating UARTs by device ID
Hi Bin, On Mon, 20 Mar 2023 at 20:56, Bin Meng wrote: > > +Andy > > Hi Simon, > > On Tue, Feb 21, 2023 at 3:49 AM Simon Glass wrote: > > > > When coreboot does not pass a UART in its sysinfo struct, there is no > > easy way to find it out. Add a way to specify known UARTs so we can > > find them without needing help from coreboot. > > > > Since coreboot does not actually init the serial device when serial is > > disabled, it is not possible to make it add this information to the > > sysinfo table. > > > > Also, we cannot use the class information, since we don't know which > > UART is being used. For example, with Alder Lake there are two: > > > > 00.16.00 0x8086 0x51e0 Simple comm. controller 0x80 > > 00.1e.00 0x8086 0x51a8 Simple comm. controller 0x80 > > > > In our case the second one is the right one, but thre is no way to > > distinguish it from the first one without using the device ID. > > > > If we have Adler Lake hardware which uses a different UART, we could > > perhaps look at the ACPI tables, or the machine information passed in > > the SMBIOS tables. > > > > This was discussed previously before: [1] > > > > [1] https://patchwork.ozlabs.org/project/uboot/patch/ > > 20210407163159.3.I967ea8c85e009f870c7aa944372d32c990f1b14a@changeid/ > > > > Signed-off-by: Simon Glass > > --- > > > > arch/x86/dts/coreboot.dts| 4 ++ > > drivers/serial/serial_coreboot.c | 69 > > include/pci_ids.h| 3 ++ > > 3 files changed, 68 insertions(+), 8 deletions(-) > > > > Last time we discussed this, both Andy and I thought this was a hack. > I cited Andy's point below: > > "What coreboot should do is either provide serial information or SPCR > ACPI table. Otherwise if it does not provide it, I think it's on > purpose, and we have to respect this." We cannot change what coreboot does. I have written up a design for it but it seems unlikely that anything will happen there in the short term, perhaps ever. I will keep pushing. In the meantime U-Boot cannot be used as a coreboot payload in this (common) situation. So we do need a solution. > > So maybe somehow we should parse the SPCR ACPI table instead? I don't see that table present, but there is DBG2 so I will take a look. Regards, Simon
Re: [PATCH v2 1/3] starfive: pci: Add StarFive JH7110 pcie driver
On Thursday 23 March 2023 18:51:38 Minda Chen wrote: > On 2023/3/11 1:42, Pali Rohár wrote: > > On Friday 10 March 2023 18:36:44 Minda Chen wrote: > >> On 2023/3/8 15:31, Pali Rohár wrote: > >> > Hello! See few comments below. > >> > > >> > On Wednesday 08 March 2023 13:48:31 Minda Chen wrote: > >> >> From: Mason Huo > >> >> > >> >> Add pcie driver for StarFive JH7110, the driver depends on > >> >> starfive gpio, pinctrl, clk and reset driver to do init. > >> >> > >> >> Several devices are tested: > >> >> a) M.2 NVMe SSD > >> >> b) Realtek 8169 Ethernet adapter. > >> >> > >> >> Signed-off-by: Mason Huo > >> >> Signed-off-by: Minda Chen > >> >> --- > >> >> drivers/pci/Kconfig| 11 + > >> >> drivers/pci/Makefile | 1 + > >> >> drivers/pci/pcie_starfive_jh7110.c | 478 + > >> >> 3 files changed, 490 insertions(+) > >> >> create mode 100644 drivers/pci/pcie_starfive_jh7110.c > >> >> > >> >> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig > >> >> index ef328d2652..e7b0ff5bc3 100644 > >> >> --- a/drivers/pci/Kconfig > >> >> +++ b/drivers/pci/Kconfig > >> >> @@ -374,4 +374,15 @@ config PCIE_UNIPHIER > >> >> Say Y here if you want to enable PCIe controller support on > >> >> UniPhier SoCs. > >> >> > >> >> +config PCIE_STARFIVE_JH7110 > >> >> + bool "Enable Starfive JH7110 PCIe driver" > >> >> + depends on STARFIVE_JH7110 > >> >> + depends on PINCTRL_STARFIVE_JH7110 > >> >> + depends on CLK_JH7110 > >> >> + depends on RESET_JH7110 > >> >> + default y > >> >> + help > >> >> + Say Y here if you want to enable PCIe controller support on > >> >> + StarFive JH7110 SoC. > >> >> + > >> >> endif > >> >> diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile > >> >> index 49506e7ba5..bbe3323bb5 100644 > >> >> --- a/drivers/pci/Makefile > >> >> +++ b/drivers/pci/Makefile > >> >> @@ -49,3 +49,4 @@ obj-$(CONFIG_PCI_OCTEONTX) += pci_octeontx.o > >> >> obj-$(CONFIG_PCIE_OCTEON) += pcie_octeon.o > >> >> obj-$(CONFIG_PCIE_DW_SIFIVE) += pcie_dw_sifive.o > >> >> obj-$(CONFIG_PCIE_UNIPHIER) += pcie_uniphier.o > >> >> +obj-$(CONFIG_PCIE_STARFIVE_JH7110) += pcie_starfive_jh7110.o > >> >> diff --git a/drivers/pci/pcie_starfive_jh7110.c > >> >> b/drivers/pci/pcie_starfive_jh7110.c > >> >> new file mode 100644 > >> >> index 00..5ccef1ef02 > >> >> --- /dev/null > >> >> +++ b/drivers/pci/pcie_starfive_jh7110.c > >> >> @@ -0,0 +1,478 @@ > >> >> +// SPDX-License-Identifier: GPL-2.0+ > >> >> +/* > >> >> + * StarFive PLDA PCIe host controller driver > >> >> + * > >> >> + * Copyright (c) 2023 Starfive, Inc. > >> >> + * Author: Mason Huo > >> >> + * > >> >> + */ > >> >> + > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> +#include > >> >> + > >> >> +DECLARE_GLOBAL_DATA_PTR; > >> >> + > >> >> +#define GEN_SETTINGS 0x80 > >> >> +#define PCIE_PCI_IDS 0x9C > >> >> +#define PCIE_WINROM0xFC > >> >> +#define PMSG_SUPPORT_RX0x3F0 > >> >> +#define PCI_MISC 0xB4 > >> >> + > >> >> +#define PLDA_EP_ENABLE 0 > >> >> +#define PLDA_RP_ENABLE 1 > >> >> + > >> >> +#define IDS_REVISION_ID0x02 > >> >> +#define IDS_PCI_TO_PCI_BRIDGE 0x060400 > >> >> +#define IDS_CLASS_CODE_SHIFT 8 > >> > > >> > Please do not duplicate standard PCI macros and constants. In U-Boot > >> > they are already available in include/pci_ids.h header file. > >> > > >> ok > >> >> +#define PREF_MEM_WIN_64_SUPPORTBIT(3) > >> >> +#define PMSG_LTR_SUPPORT BIT(2) > >> >> +#define PLDA_FUNCTION_DIS BIT(15) > >> >> +#define PLDA_FUNC_NUM 4 > >> >> +#define PLDA_PHY_FUNC_SHIFT9 > >> >> + > >> >> +#define XR3PCI_ATR_AXI4_SLV0 0x800 > >> >> +#define XR3PCI_ATR_SRC_ADDR_LOW0x0 > >> >> +#define XR3PCI_ATR_SRC_ADDR_HIGH 0x4 > >> >> +#define XR3PCI_ATR_TRSL_ADDR_LOW 0x8 > >> >> +#define XR3PCI_ATR_TRSL_ADDR_HIGH 0xc > >> >> +#define XR3PCI_ATR_TRSL_PARAM 0x10 > >> >> +#define XR3PCI_ATR_TABLE_OFFSET0x20 > >> >> +#define XR3PCI_ATR_MAX_TABLE_NUM 8 > >> >> + > >> >> +#define XR3PCI_ATR_SRC_WIN_SIZE_SHIFT 1 > >> >> +#define XR3PCI_ATR_SRC_ADDR_MASK GENMASK(31, 12) > >> >> +#define XR3PCI_ATR_TRSL_ADDR_MASK GENMASK(31, 12) > >> >> +#define XR3_PCI_ECAM_SIZE 28 > >> >> +#define XR3PCI_ATR_TRSL_DIRBIT(22) > >> >> +/* IDs used in the XR3PCI_ATR_TRSL_PARAM */ > >> >> +#define XR3PCI_ATR_TRSLID_PCIE_MEMORY 0x0 > >> >> +#define
Re: [PATCH 03/13] input: Only reset the keyboard when running bare metal
Hi Bin, On Tue, 21 Mar 2023 at 14:25, Bin Meng wrote: > > Hi Simon, > > On Tue, Mar 21, 2023 at 2:40 AM Simon Glass wrote: > > > > Hi Bin, > > > > On Mon, 20 Mar 2023 at 19:32, Bin Meng wrote: > > > > > > Hi Simon, > > > > > > On Tue, Feb 21, 2023 at 3:49 AM Simon Glass wrote: > > > > > > > > If U-Boot is not the first-stage bootloader we should not init the > > > > keyboard, since it has already been done. Check for this. > > > > > > But re-init does no harm, right? > > > > Actually it causes the keyboard to fail on Brya (Felwinter), a > > Chromebook. It could be due to it having a numeric keypad. > > I assume Linux kernel will do the keyboard re-init no matter what > bootloader does. So does Linux kernel fail to re-init the keyboard? If > no, I guess we could improve the U-Boot keyboard driver somehow? I found another way, to flush the buffer first. Regards, Simon
Re: [PATCH 05/13] x86: coreboot: Collect the address of the ACPI tables
Hi Bin,
On Mon, 20 Mar 2023 at 20:44, Bin Meng wrote:
>
> Hi Simon,
>
> On Tue, Feb 21, 2023 at 3:49 AM Simon Glass wrote:
> >
> > Pick this up from the sysinfo tables and display it with the cbsysinfo
> > command. This allows the 'acpi list' command to work when booting from
> > coreboot.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > arch/x86/include/asm/cb_sysinfo.h | 2 ++
> > arch/x86/include/asm/coreboot_tables.h | 2 ++
> > arch/x86/lib/coreboot/cb_sysinfo.c | 11 +++
> > cmd/x86/cbsysinfo.c| 1 +
> > 4 files changed, 16 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/cb_sysinfo.h
> > b/arch/x86/include/asm/cb_sysinfo.h
> > index 0201ac6b03a..6b266149cf6 100644
> > --- a/arch/x86/include/asm/cb_sysinfo.h
> > +++ b/arch/x86/include/asm/cb_sysinfo.h
> > @@ -133,6 +133,7 @@
> > * @mtc_size: Size of MTC region
> > * @chromeos_vpd: Chromium OS Vital Product Data region, typically NULL,
> > meaning
> > * not used
> > + * @rsdp: Pointer to ACPI RSDP table
> > */
> > struct sysinfo_t {
> > unsigned int cpu_khz;
> > @@ -211,6 +212,7 @@ struct sysinfo_t {
> > u64 mtc_start;
> > u32 mtc_size;
> > void*chromeos_vpd;
> > + void *rsdp;
> > };
> >
> > extern struct sysinfo_t lib_sysinfo;
> > diff --git a/arch/x86/include/asm/coreboot_tables.h
> > b/arch/x86/include/asm/coreboot_tables.h
> > index f131de56a40..2d6f3db3a5f 100644
> > --- a/arch/x86/include/asm/coreboot_tables.h
> > +++ b/arch/x86/include/asm/coreboot_tables.h
> > @@ -422,6 +422,8 @@ struct cb_tsc_info {
> > #define CB_TAG_SERIALNO0x002a
> > #define CB_MAX_SERIALNO_LENGTH 32
> >
> > +#define CB_TAG_ACPI_RSDP0x0043
>
> This is using space but should be tab.
>
> > +
> > #define CB_TAG_CMOS_OPTION_TABLE 0x00c8
> >
> > struct cb_cmos_option_table {
> > diff --git a/arch/x86/lib/coreboot/cb_sysinfo.c
> > b/arch/x86/lib/coreboot/cb_sysinfo.c
> > index 748fa4ee53b..a11a2587f66 100644
> > --- a/arch/x86/lib/coreboot/cb_sysinfo.c
> > +++ b/arch/x86/lib/coreboot/cb_sysinfo.c
> > @@ -264,6 +264,13 @@ static void cb_parse_mrc_cache(void *ptr, struct
> > sysinfo_t *info)
> > info->mrc_cache = map_sysmem(cbmem->cbmem_tab, 0);
> > }
> >
> > +static void cb_parse_acpi_rsdp(void *ptr, struct sysinfo_t *info)
> > +{
> > + struct cb_cbmem_tab *const cbmem = (struct cb_cbmem_tab *)ptr;
> > +
> > + info->rsdp = map_sysmem(cbmem->cbmem_tab, 0);
> > +}
> > +
> > __weak void cb_parse_unhandled(u32 tag, unsigned char *ptr)
> > {
> > }
> > @@ -428,6 +435,9 @@ static int cb_parse_header(void *addr, int len, struct
> > sysinfo_t *info)
> > case CB_TAG_MRC_CACHE:
> > cb_parse_mrc_cache(rec, info);
> > break;
> > + case CB_TAG_ACPI_RSDP:
> > + cb_parse_acpi_rsdp(rec, info);
> > + break;
> > default:
> > cb_parse_unhandled(rec->tag, ptr);
> > break;
> > @@ -454,6 +464,7 @@ int get_coreboot_info(struct sysinfo_t *info)
> > if (!ret)
> > return -ENOENT;
> > gd->arch.coreboot_table = addr;
> > + gd_set_acpi_start(map_to_sysmem(info->rsdp));
> > gd->flags |= GD_FLG_SKIP_LL_INIT;
> >
> > return 0;
>
> Regards,
> Bin
> > diff --git a/cmd/x86/cbsysinfo.c b/cmd/x86/cbsysinfo.c
> > index 34fdaf5b1b1..07570b00c9a 100644
> > --- a/cmd/x86/cbsysinfo.c
> > +++ b/cmd/x86/cbsysinfo.c
> > @@ -363,6 +363,7 @@ static void show_table(struct sysinfo_t *info, bool
> > verbose)
> > print_hex("MTC size", info->mtc_size);
> >
> > print_ptr("Chrome OS VPD", info->chromeos_vpd);
> > + print_ptr("RSDP", info->rsdp);
> > }
> >
> > static int do_cbsysinfo(struct cmd_tbl *cmdtp, int flag, int argc,
>
> I tested this patch on top of coreboot with U-Boot as a payload
> running on QEMU i440fx, but U-Boot does not list acpi tables.
>
> => acpi list
> No ACPI tables present
Can you try 'cbsysinfo' to see what it is passing in as the RSDP?
Regards,
Simon
Re: [PATCH v2] fdt: Make fdt addr -q quieter
On Wed, 22 Mar 2023 at 04:19, Marek Vasut wrote: > > On 3/21/23 14:01, Peter Hoyes wrote: > > From: Peter Hoyes > > > > 64597346 "fdt: Add -q option to fdt addr for distro_bootcmd" introduced > > the -q option for fdt addr, which sets the current working fdt address > > without printing any output. > > > > baf41410 "fdt: Show a message when the working FDT changes" made the > > utility function set_working_fdt_addr (in cmd/fdt.c) output a message > > on each invocation, even if called via fdt addr -q, in which case its > > output is now slightly noisier. > > > > To fix this, split out set_working_fdt_addr into set_working_fdt_addr > > plus the static function set_working_fdt_addr_quiet. > > set_working_fdt_addr_quiet can be called by "quiet" fdt cmd logic and > > set_working_fdt_addr is exported (as before) to other boot logic. The > > latter calls the former. > > > > Remove the assertion from the fdt addr test case when calling with the > > -q argument. > > > > Signed-off-by: Peter Hoyes > > Reviewed-by: Marek Vasut Reviewed-by: Simon Glass
Re: [PATCH v4 1/1] cmd: ums: abort mounting by pressing any key
On Tue, 21 Mar 2023 at 08:02, Svyatoslav Ryhel wrote: > > This patch introduses config which allows interrupt run of usb > mass storage with any key. This is especially useful on devices > with limited input capabilities like tablets and smatphones which > have only gpio keys in direct access. > > Signed-off-by: Svyatoslav Ryhel > --- > cmd/Kconfig| 6 ++ > cmd/usb_mass_storage.c | 10 ++ > 2 files changed, 16 insertions(+) > Reviewed-by: Simon Glass
Re: [PATCH] net: ipv6: Add support for default gateway discovery.
On Thu, 2023-03-23 at 16:44 +, Ehsan Mohandesi wrote:
>
> Hi Viacheslav,
>
> > -Original Message-
> > From: Vyacheslav V. Mitrofanov
> > Sent: Thursday, March 16, 2023 3:47 AM
> > To: u-boot@lists.denx.de; emohand...@linux.microsoft.com
> > Cc: joe.hershber...@ni.com; xypron.g...@gmx.de;
> > dpha...@linux.microsoft.com; sap...@gmail.com; rfried@gmail.com
> > ;
> > ilias.apalodi...@linaro.org; Ehsan Mohandesi <
> > emohand...@microsoft.com>;
> > j...@metanate.com; s...@chromium.org; masahisa.koj...@linaro.org
> > Subject: [EXTERNAL] Re: [PATCH] net: ipv6: Add support for default
> > gateway
> > discovery.
> >
> > On Thu, 2023-03-02 at 08:58 -0800, emohand...@linux.microsoft.com
> > wrote:
> > > From: Ehsan Mohandesi
> > >
> > > In IPv6, the default gateway and prefix length are determined by
> > > receiving a router advertisement as defined in -
> > >
> > https://www.rf/
> > c-
> > editor.org%2Frfc%2Frfc4861=05%7C01%7Cemohandesi%40microsoft.co
> > m%7C6dec635abc8c4861feb708db25fb05d6%7C72f988bf86f141af91ab2d7cd01
> > 1db47%7C1%7C0%7C638145532341238481%7CUnknown%7CTWFpbGZsb3d8ey
> > JWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> > 3000%7C%7C%7C=tAhREBvBgVQKOFqEQT2%2FKphGxYXUMo3UF5vvQpY
> > B%2Be0%3D=0.
> > > Add support for sending router solicitation (RS) and processing
> > > router
> > > advertisements (RA).
> > >
> > > If the RA has prefix info option and following conditions are
> > > met,
> > > then
> > > gatewayip6 and net_prefix_length of ip6addr env variables are
> > > initialized.
> > > These are later consumed by IPv6 code for non-local destination
> > > IP.
> > >
> > > - "Router Lifetime" != 0
> > > - Prefix is NOT link-local prefix (0xfe80::/10)
> > > - L flag is 1
> > > - "Valid Lifetime" != 0
> > >
> > > Timing Parameters:
> > > - MAX_RTR_SOLICITATION_DELAY (0-1s)
> > > - RTR_SOLICITATION_INTERVAL (4s) (min retransmit delay)
> > > - MAX_RTR_SOLICITATIONS (3 RS transmissions)
> > >
> > > The functionality is enabled by CONFIG_IPV6_ROUTER_DISCOVERY and
> > > invoked automatically from net_init_loop().
> > >
> > > Signed-off-by: Ehsan Mohandesi
> > >
> > > Conflicts:
> > > cmd/Kconfig
> > > include/net.h
> > > net/net.c
> > > ---
> > > cmd/Kconfig | 7 ++
> > > include/ndisc.h | 23 ++
> > > include/net.h | 2 +-
> > > include/net6.h | 40 ++
> > > net/ndisc.c | 243
> > > +---
> > > net/net.c | 23 +-
> > > net/net6.c | 1 +
> > > 7 files changed, 327 insertions(+), 12 deletions(-)
> > >
> >
> > I reviewed this patch and it looks good. I have no critical
> > remarks, only some
> > small notes.
> >
> > I've tested it on SiFive Unmatched board.
> >
> >
> > > +config IPV6_ROUTER_DISCOVERY
> > > + bool "Do router discovery"
> > > + depends on IPV6
> > > + help
> > > + Will automatically perform router solicitation on first
> > > IPv6
> > > + network operation
> > > +
> > > endif
> > >
> > I think it is better to write sth like Do IPv6 router discovery
> > because
> > IPv4 has also router discovery protocol and it could lead to
> > misunderstanding
> >
> >
> > > net_set_timeout_handler(0, 0);
> > >
> > Maybe net_set_timeout_handler(0, NULL); is better
> >
> >
> >
> > > +/*
> > > + * validate_ra() - Validate the router advertisement message.
> > > + *
> > > + * @ip6:
> > > + * @len: Length of the router advertisement packet
> > > + *
> > > + * Check if the router advertisement message is valid.
> > > Conditions
> > > are
> > > + * according to RFC 4861 section 6.1.2. Validation of Router
> > > Advertisement
> > > + * Messages.
> > > + *
> > > + * Return: true if the message is valid and false if it is
> > > invalid.
> > > + */
> > > +static bool validate_ra(struct ip6_hdr *ip6, int len) {
> > > + struct icmp6hdr *icmp = (struct icmp6hdr *)(ip6 + 1);
> > > +
> > > + /* ICMP length (derived from the IP length) should be 16
> > > or
> > > more octets. */
> > > + if (ip6->payload_len < 16)
> > > + return false;
> > > +
> > > + /* Source IP Address should be a valid link-local
> > > address. */
> > > + if ((ntohs(ip6->saddr.s6_addr16[0]) &
> > > IPV6_LINK_LOCAL_MASK)
> > > !=
> > > + IPV6_LINK_LOCAL_PREFIX)
> > > + return false;
> > > +
> > > + /*
> > > +* The IP Hop Limit field should have a value of 255,
> > > i.e.,
> > > the packet
> > > +* could not possibly have been forwarded by a router.
> > > +*/
> > > + if (ip6->hop_limit != 255)
> > > + return false;
> > > +
> > Unicast hop limit only?
>
> Sorry, I do not understand what you mean here. What kind of scenario
> are you talking about?
> It does not matter if the router advertisement is unicast or
> multicast. In both cases, the hop limit needs to be 255. A router
> always sets the hop limit to 255. We do not want
[PATCH 2/2] spi: cadence-quadspi: Use STIG mode for all ops with small payload
OSPI controller supports all types of op variants in STIG mode,
only limitation being that the data payload should be less than
8 bytes when not using memory banks.
STIG mode is more stable for operations that send small data
payload and is more efficient than using DMA for few bytes of
memory accesses. It overcomes the limitation of minimum 4 bytes
read from flash into RAM seen in DAC mode.
Use STIG mode for all read and write operations that require
data input/output of less than 8 bytes from the flash, and thereby
support all four phases, cmd/address/dummy/data, through OSPI STIG.
Signed-off-by: Apurva Nandan
Signed-off-by: Dhruva Gole
---
drivers/spi/cadence_qspi.c | 5 ++--
drivers/spi/cadence_qspi_apb.c | 44 ++
2 files changed, 26 insertions(+), 23 deletions(-)
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index a858a62888e4..f931e4cf3e2f 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -312,13 +312,12 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi,
* which is unsupported on some flash devices during register
* reads, prefer STIG mode for such small reads.
*/
- if (!op->addr.nbytes ||
- op->data.nbytes <= CQSPI_STIG_DATA_LEN_MAX)
+ if (op->data.nbytes <= CQSPI_STIG_DATA_LEN_MAX)
mode = CQSPI_STIG_READ;
else
mode = CQSPI_READ;
} else {
- if (!op->addr.nbytes || !op->data.buf.out)
+ if (op->data.nbytes <= CQSPI_STIG_DATA_LEN_MAX)
mode = CQSPI_STIG_WRITE;
else
mode = CQSPI_WRITE;
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 2b04b58124a5..25b5fc292e07 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -374,6 +374,8 @@ int cadence_qspi_apb_exec_flash_cmd(void *reg_base,
unsigned int reg)
if (!cadence_qspi_wait_idle(reg_base))
return -EIO;
+ /* Flush the CMDCTRL reg after the execution */
+ writel(0, reg_base + CQSPI_REG_CMDCTRL);
return 0;
}
@@ -460,11 +462,6 @@ int cadence_qspi_apb_command_read(struct cadence_spi_priv
*priv,
unsigned int dummy_clk;
u8 opcode;
- if (rxlen > CQSPI_STIG_DATA_LEN_MAX || !rxbuf) {
- printf("QSPI: Invalid input arguments rxlen %u\n", rxlen);
- return -EINVAL;
- }
-
if (priv->dtr)
opcode = op->cmd.opcode >> 8;
else
@@ -547,26 +544,12 @@ int cadence_qspi_apb_command_write(struct
cadence_spi_priv *priv,
unsigned int reg = 0;
unsigned int wr_data;
unsigned int wr_len;
+ unsigned int dummy_clk;
unsigned int txlen = op->data.nbytes;
const void *txbuf = op->data.buf.out;
void *reg_base = priv->regbase;
- u32 addr;
u8 opcode;
- /* Reorder address to SPI bus order if only transferring address */
- if (!txlen) {
- addr = cpu_to_be32(op->addr.val);
- if (op->addr.nbytes == 3)
- addr >>= 8;
- txbuf =
- txlen = op->addr.nbytes;
- }
-
- if (txlen > CQSPI_STIG_DATA_LEN_MAX) {
- printf("QSPI: Invalid input arguments txlen %u\n", txlen);
- return -EINVAL;
- }
-
if (priv->dtr)
opcode = op->cmd.opcode >> 8;
else
@@ -574,6 +557,27 @@ int cadence_qspi_apb_command_write(struct cadence_spi_priv
*priv,
reg |= opcode << CQSPI_REG_CMDCTRL_OPCODE_LSB;
+ /* setup ADDR BIT field */
+ if (op->addr.nbytes) {
+ writel(op->addr.val, priv->regbase + CQSPI_REG_CMDADDRESS);
+ /*
+* address bytes are zero indexed
+*/
+ reg |= (((op->addr.nbytes - 1) &
+ CQSPI_REG_CMDCTRL_ADD_BYTES_MASK) <<
+ CQSPI_REG_CMDCTRL_ADD_BYTES_LSB);
+ reg |= (0x1 << CQSPI_REG_CMDCTRL_ADDR_EN_LSB);
+ }
+
+ /* Set up dummy cycles. */
+ dummy_clk = cadence_qspi_calc_dummy(op, priv->dtr);
+ if (dummy_clk > CQSPI_DUMMY_CLKS_MAX)
+ return -EOPNOTSUPP;
+
+ if (dummy_clk)
+ reg |= (dummy_clk & CQSPI_REG_CMDCTRL_DUMMY_MASK)
+<< CQSPI_REG_CMDCTRL_DUMMY_LSB;
+
if (txlen) {
/* writing data = yes */
reg |= (0x1 << CQSPI_REG_CMDCTRL_WR_EN_LSB);
--
2.25.1
[PATCH 1/2] spi: cadence-quadspi: Fix check condition for DTR ops
buswidth and dtr fields in spi_mem_op are only valid when the
corresponding spi_mem_op phase has a non-zero length. For example,
SPI NAND core doesn't set buswidth when using SPI_MEM_OP_NO_ADDR
phase.
Fix the dtr checks in set_protocol() to ignore empty spi_mem_op
phases, as checking for dtr field in empty phase will result in
false negatives.
Signed-off-by: Apurva Nandan
Signed-off-by: Dhruva Gole
---
drivers/spi/cadence_qspi.c | 11 +--
drivers/spi/cadence_qspi_apb.c | 9 -
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index c7f10c501320..a858a62888e4 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -362,8 +362,15 @@ static bool cadence_spi_mem_supports_op(struct spi_slave
*slave,
{
bool all_true, all_false;
- all_true = op->cmd.dtr && op->addr.dtr && op->dummy.dtr &&
- op->data.dtr;
+ /*
+* op->dummy.dtr is required for converting nbytes into ncycles.
+* Also, don't check the dtr field of the op phase having zero nbytes.
+*/
+ all_true = op->cmd.dtr &&
+ (!op->addr.nbytes || op->addr.dtr) &&
+ (!op->dummy.nbytes || op->dummy.dtr) &&
+ (!op->data.nbytes || op->data.dtr);
+
all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr &&
!op->data.dtr;
diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c
index 21fe2e655c5f..2b04b58124a5 100644
--- a/drivers/spi/cadence_qspi_apb.c
+++ b/drivers/spi/cadence_qspi_apb.c
@@ -120,7 +120,14 @@ static int cadence_qspi_set_protocol(struct
cadence_spi_priv *priv,
{
int ret;
- priv->dtr = op->data.dtr && op->cmd.dtr && op->addr.dtr;
+ /*
+* For an op to be DTR, cmd phase along with every other non-empty
+* phase should have dtr field set to 1. If an op phase has zero
+* nbytes, ignore its dtr field; otherwise, check its dtr field.
+*/
+ priv->dtr = op->cmd.dtr &&
+ (!op->addr.nbytes || op->addr.dtr) &&
+ (!op->data.nbytes || op->data.dtr);
ret = cadence_qspi_buswidth_to_inst_type(op->cmd.buswidth);
if (ret < 0)
--
2.25.1
[PATCH 0/2] spi: cadence_qspi: Fixes for DTR ops and improve STIG support
This series aims to address some critical bugs in the cadence qspi driver like the need to Flush the CMDCTRL reg after the execution due to a hardware limitation and also fixes the check conditions for DTR ops. Logs with sf read and update commands: https://gist.github.com/DhruvaG2000/874b3eb683bba92f25d7fe49d09f76fa Dhruva Gole (2): spi: cadence-quadspi: Fix check condition for DTR ops spi: cadence-quadspi: Use STIG mode for all ops with small payload drivers/spi/cadence_qspi.c | 16 ++ drivers/spi/cadence_qspi_apb.c | 53 -- 2 files changed, 43 insertions(+), 26 deletions(-) -- 2.25.1
Re: (subset) [PATCH v2 00/14] boards: amlogic: add BananaPi/Radxa/WeTek boards
Hi, On Thu, 23 Mar 2023 14:31:28 +, Christian Hewitt wrote: > This series adds support for the following boards which are > tested and booting fine with 2023.04-rc4: > > - BananaPi M2-Pro (S905X3) > - BananaPi M2S (A311D or S922X) > - Radxa Zero2 (A311D) > - WeTek Hub (S905) > - WeTek Play2 (S905) > > [...] Thanks, Applied to https://source.denx.de/u-boot/custodians/u-boot-amlogic (u-boot-amlogic-test) [01/14] docs: boards: amlogic: add bananapi-m5 to u200 maintainer file https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/86e59bdd4d55c46fbe7bd856fa16e27c970f407f [03/14] ARM: dts: add support for BananaPi M2-Pro https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/4170731c4a9dfb5583d45453f323be7975521c18 [04/14] boards: add BananaPi M2-Pro defconfig https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/d33260a5054b716baa5336f2c788e0e07ae46417 [05/14] docs: boards: amlogic: add documentation for BananaPi M2-Pro https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/b2fc35e5f138c6e7449c925324891dbbb70bb400 [06/14] ARM: dts: add support for BananaPi M2S https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/56a92bd4f443634ea6a50bb4b7269e1c04c9e00b [07/14] boards: add BananaPi M2S defconfig https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/43c67ddf59ff7a4dc62fc0d4c49fe3d54463bc66 [08/14] docs: boards: amlogic: add documentation for BananaPi M2S https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/40f1eea84e2845deda5ce5fbf6c4f8fb1bb85463 [09/14] ARM: dts: add support for Radxa Zero2 https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/3016f6fb9e4c506ce751b36215cc1ac44aca31b0 [10/14] boards: amlogic: add Radxa Zero2 defconfig https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/2c57d114d2716e75fa0b4e8f0149215437f603a8 [11/14] doc: boards: amlogic: add documentation for Radxa Zero2 https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/37eda34cb5afb230df00b7ebc74c8164b89cbc4c [12/14] ARM: dts: add support for WeTek Hub and WeTek Play2 https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/b07e8fb073aa1b847e9ceb563b76808c88be2af9 [13/14] boards: amlogic: add WeTek Hub and WeTek Play2 defconfig https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/fcb0fb2bd6d9e4042bed21685da893f5765305eb [14/14] doc: boards: amlogic: add documentation for WeTek Hub and WeTek Play2 https://source.denx.de/u-boot/custodians/u-boot-amlogic/-/commit/f097eedf0c04fc6307e22b4b707aa3b47c921b4c -- Neil
Re: [PATCH v2] renesas: rcar: Apply ATF overlay for reserved-memory
Hi! !
Just bumping up this patch.
On Tuesday, December 6, 2022 11:06:48 A.M. EDT Detlev Casanova wrote:
> The function fdtdec_board_setup() is only called by fdtdec_setup() which
> needs to be called by the board file.
>
> This is not the case for the renesas boards so rename the
> fdtdec_board_setup() function to a local name and call it directly from
> ft_board_setup(), before cleaning up the memory nodes.
>
> Signed-off-by: Detlev Casanova
> ---
> board/renesas/rcar-common/common.c | 19 +--
> 1 file changed, 9 insertions(+), 10 deletions(-)
>
> diff --git a/board/renesas/rcar-common/common.c
> b/board/renesas/rcar-common/common.c index daa1beb14f..c50d09ef8b 100644
> --- a/board/renesas/rcar-common/common.c
> +++ b/board/renesas/rcar-common/common.c
> @@ -25,16 +25,6 @@ extern u64 rcar_atf_boot_args[];
>
> #define FDT_RPC_PATH "/soc/spi@ee20"
>
> -int fdtdec_board_setup(const void *fdt_blob)
> -{
> - void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]);
> -
> - if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
> - fdt_overlay_apply_node((void *)fdt_blob, 0,
atf_fdt_blob, 0);
> -
> - return 0;
> -}
> -
> int dram_init(void)
> {
> return fdtdec_setup_mem_size_base();
> @@ -48,6 +38,14 @@ int dram_init_banksize(void)
> }
>
> #if defined(CONFIG_OF_BOARD_SETUP)
> +static void apply_atf_overlay(void *fdt_blob)
> +{
> + void *atf_fdt_blob = (void *)(rcar_atf_boot_args[1]);
> +
> + if (fdt_magic(atf_fdt_blob) == FDT_MAGIC)
> + fdt_overlay_apply_node(fdt_blob, 0, atf_fdt_blob, 0);
> +}
> +
> static int is_mem_overlap(void *blob, int first_mem_node, int
> curr_mem_node) {
> struct fdt_resource first_mem_res, curr_mem_res;
> @@ -159,6 +157,7 @@ static void update_rpc_status(void *blob)
>
> int ft_board_setup(void *blob, struct bd_info *bd)
> {
> + apply_atf_overlay(blob);
> scrub_duplicate_memory(blob);
> update_rpc_status(blob);
Regards,
Detlev.
Re: [PATCH v2 14/14] doc: boards: amlogic: add documentation for WeTek Hub and WeTek Play2
On 23/03/2023 15:31, Christian Hewitt wrote: Add build instructions for the WeTek Hub and WeTek Play2 boards. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS| 2 + doc/board/amlogic/index.rst | 2 + doc/board/amlogic/wetek-hub.rst | 110 doc/board/amlogic/wetek-play2.rst | 115 ++ 4 files changed, 229 insertions(+) create mode 100644 doc/board/amlogic/wetek-hub.rst create mode 100644 doc/board/amlogic/wetek-play2.rst diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 264218e3be..fe451dd7db 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -12,3 +12,5 @@ F:configs/wetek-play2_defconfig F:doc/board/amlogic/p200.rst F:doc/board/amlogic/nanopi-k2.rst F:doc/board/amlogic/odroid-c2.rst +F: doc/board/amlogic/wetek-hub.rst +F: doc/board/amlogic/wetek-play2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 71b7e1f3ed..deb7976436 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -118,4 +118,6 @@ Board Documentation s400 u200 wetek-core2 + wetek-hub + wetek-play2 w400 diff --git a/doc/board/amlogic/wetek-hub.rst b/doc/board/amlogic/wetek-hub.rst new file mode 100644 index 00..378c6a6497 --- /dev/null +++ b/doc/board/amlogic/wetek-hub.rst @@ -0,0 +1,110 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for WeTek Hub (S905) +=== + +WeTek Hub is a small form-factor Android STB manufactured by WeTek with the following +specification: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 1GB DDR3 SDRAM + - 8GB eMMC + - Gigabit Ethernet + - HDMI 2.0 4K/60Hz display + - 1x USB otg + - microSD + - UART jack + - Infrared receiver + +Schematics are not publicly available but have been shared privately to maintainers. + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make wetek-hub_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh wetek-hub /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image and WeTek has not publicly shared the U-Boot sources needed to build FIP binaries +for signing. However you can download them from the amlogic-fip-repo. + +.. code-block:: bash +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip/wetek-hub +$ export FIPDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ cp $FIPDIR/bl2.bin fip/ +$ cp $FIPDIR/acs.bin fip/ +$ cp $FIPDIR/bl21.bin fip/ +$ cp $FIPDIR/bl30.bin fip/ +$ cp $FIPDIR/bl301.bin fip/ +$ cp $FIPDIR/bl31.img fip/ +$ cp u-boot.bin fip/bl33.bin + +$ $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \ + --bl31 fip/bl31.img \ + --bl33 fip/bl33.bin \ + fip/fip.bin + +$ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin +$ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + +$ $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin + +$ $FIPDIR/aml_encrypt_gxb --bootsig \ + --input fip/boot_new.bin + --output fip/u-boot.bin + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + +$ DEV=/dev/boot_device +$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync +$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc +$ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc +$ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc +$ ./aml_chksum fip/u-boot.bin.gxbb +$ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 +$ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440 diff --git a/doc/board/amlogic/wetek-play2.rst b/doc/board/amlogic/wetek-play2.rst new
Re: [PATCH v2 13/14] boards: amlogic: add WeTek Hub and WeTek Play2 defconfig
On 23/03/2023 15:31, Christian Hewitt wrote: Add configurations for the WeTek Hub and WeTek Play2 boards. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS | 2 + configs/wetek-hub_defconfig| 70 ++ configs/wetek-play2_defconfig | 70 ++ 3 files changed, 142 insertions(+) create mode 100644 configs/wetek-hub_defconfig create mode 100644 configs/wetek-play2_defconfig diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 33ca3df5c6..264218e3be 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -7,6 +7,8 @@ F: board/amlogic/p200/ F:configs/nanopi-k2_defconfig F:configs/odroid-c2_defconfig F:configs/p200_defconfig +F: configs/wetek-hub_defconfig +F: configs/wetek-play2_defconfig F:doc/board/amlogic/p200.rst F:doc/board/amlogic/nanopi-k2.rst F:doc/board/amlogic/odroid-c2.rst diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig new file mode 100644 index 00..634833f7fe --- /dev/null +++ b/configs/wetek-hub_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" wetek-hub" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig new file mode 100644 index 00..6d33b09a94 --- /dev/null +++ b/configs/wetek-play2_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" wetek-play2" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y Reviewed-by: Neil Armstrong
Re: [PATCH v2 11/14] doc: boards: amlogic: add documentation for Radxa Zero2
On 23/03/2023 15:31, Christian Hewitt wrote: Add build docs for the Radxa Zero2 board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS| 2 + doc/board/amlogic/index.rst | 1 + doc/board/amlogic/radxa-zero2.rst | 80 +++ 3 files changed, 83 insertions(+) create mode 100644 doc/board/amlogic/radxa-zero2.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 042b523056..117f79ea04 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -5,6 +5,8 @@ L: u-boot-amlo...@groups.io F:board/amlogic/w400/ F:configs/bananapi-cm4-cm4io_defconfig F:configs/bananapi-m2s_defconfig +F: configs/radxa-zero2_defconfig F:doc/board/amlogic/w400.rst F:doc/board/amlogic/bananapi-cm4io.rst F:doc/board/amlogic/bananapi-m2s.rst +F: doc/board/amlogic/radxa-zero2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index fa1b362731..71b7e1f3ed 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -112,6 +112,7 @@ Board Documentation p212 q200 radxa-zero + radxa-zero2 sei510 sei610 s400 diff --git a/doc/board/amlogic/radxa-zero2.rst b/doc/board/amlogic/radxa-zero2.rst new file mode 100644 index 00..dccf592459 --- /dev/null +++ b/doc/board/amlogic/radxa-zero2.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Radxa Zero2 (A311D) +== + +Radxa Zero2 is a small form factor SBC based on the Amlogic A311D chipset with the +following specification: + +- Amlogic A311D (Quad A73 + Dual A53) CPU +- 4GB LPDDR4 RAM +- 32/64/128GB eMMC +- Mali G52-MP4 GPU +- HDMI 2.1 output (micro) +- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0 +- 1x USB 2.0 port - Type C (OTG) +- 1x USB 3.0 port - Type C (Host) +- 1x micro SD Card slot +- 40 Pin GPIO header + +Schematics are available on request from Radxa. + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make radxa-zero2_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh radxa-zero2 /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git +$ git clone https://github.com/radxa/fip.git + +$ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev +$ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools + +$ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz +$ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt + +$ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf- +$ export ARCH=arm +$ cd u-boot +$ make radxa-zero2_defconfig +$ make + +$ cp u-boot.bin ../fip/radxa-zero2/bl33.bin +$ cd ../fip/radxa-zero2 +$ make + +This will generate the signed U-Boot binaries: + +.. code-block:: bash + +$ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + +$ DEV=/dev/boot_device +$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 +$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440 Reviewed-by: Neil Armstrong
Re: [PATCH v2 08/14] docs: boards: amlogic: add documentation for BananaPi M2S
On 23/03/2023 15:31, Christian Hewitt wrote: Add build docs for the BPI-M2S board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS | 2 + doc/board/amlogic/bananapi-m2s.rst | 153 + doc/board/amlogic/index.rst| 1 + 3 files changed, 156 insertions(+) create mode 100644 doc/board/amlogic/bananapi-m2s.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 26a4c2c587..042b523056 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -4,5 +4,7 @@ S: Maintained L:u-boot-amlo...@groups.io F:board/amlogic/w400/ F:configs/bananapi-cm4-cm4io_defconfig +F: configs/bananapi-m2s_defconfig F:doc/board/amlogic/w400.rst F:doc/board/amlogic/bananapi-cm4io.rst +F: doc/board/amlogic/bananapi-m2s.rst diff --git a/doc/board/amlogic/bananapi-m2s.rst b/doc/board/amlogic/bananapi-m2s.rst new file mode 100644 index 00..4a1be47b35 --- /dev/null +++ b/doc/board/amlogic/bananapi-m2s.rst @@ -0,0 +1,153 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for BananaPi M2S (A311D & S922X) +=== + +BananaPi BPI-M2S ships is a Single Board Computer manufactured by Sinovoip that ships in +two variants with Amlogic S922X or A311D SoC and the following common specification: + +- 16GB eMMC +- HDMI 2.1a video +- 2x 10/100/1000 Base-T Ethernet (1x RTL8211F, 1x RTL811H) +- 2x USB 2.0 ports +- 2x Status LED's (green/blue) +- 1x Power/Reset button +- 1x micro SD card slot +- 40-pin GPIO header +- PWM fan header +- UART header + +The S992X variant has: +- 2GB LPDDR4 RAM + +The A311D variant has: + +- 4GB LPDDR4 RAM +- NPU (5.0 TOPS) +- MIPI DSI header +- MIPI CSI header + +An optional RTL8822CS SDIO WiFi/BT mezzanine is available for both board variants. + +Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2S + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make bananapi-m2s_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh bananapi-m2s /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + +$ DIR=bananapi-m2s +$ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b khadas-g12b-v2015.01-m2s $DIR + +$ cd $DIR +$ make bananapi_m2s_defconfig +$ make +$ export UBDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh +$ cp $UBDIR/build/scp_task/bl301.bin fip/ +$ cp $UBDIR/build/board/bananapi/bananpi_m2s/firmware/acs.bin fip/ +$ cp $UBDIR/fip/g12a/bl2.bin fip/ +$ cp $UBDIR/fip/g12a/bl30.bin fip/ +$ cp $UBDIR/fip/g12a/bl31.img fip/ +$ cp $UBDIR/fip/g12a/ddr3_1d.fw fip/ +$ cp $UBDIR/fip/g12a/ddr4_1d.fw fip/ +$ cp $UBDIR/fip/g12a/ddr4_2d.fw fip/ +$ cp $UBDIR/fip/g12a/diag_lpddr4.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr3_1d.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr4_1d.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr4_2d.fw fip/ +$ cp $UBDIR/fip/g12a/piei.fw fip/ +$ cp $UBDIR/fip/g12a/aml_ddr.fw fip/ +$ cp u-boot.bin fip/bl33.bin + +$ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ $UBDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 +$ $UBDIR/fip/g12b/aml_encrypt_g12b
Re: [PATCH v2 05/14] docs: boards: amlogic: add documentation for BananaPi M2-Pro
On 23/03/2023 15:31, Christian Hewitt wrote: Add build docs for the BPI-M2-PRO board. Signed-off-by: Christian Hewitt --- board/amlogic/u200/MAINTAINERS | 2 + doc/board/amlogic/bananapi-m2pro.rst | 143 +++ doc/board/amlogic/index.rst | 1 + 3 files changed, 146 insertions(+) create mode 100644 doc/board/amlogic/bananapi-m2pro.rst diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS index 919e349922..f429c212ba 100644 --- a/board/amlogic/u200/MAINTAINERS +++ b/board/amlogic/u200/MAINTAINERS @@ -4,8 +4,10 @@ S: Maintained L:u-boot-amlo...@groups.io F:board/amlogic/u200/ F:configs/u200_defconfig +F: configs/bananapi-m2pro_defconfig F:configs/bananapi-m5_defconfig F:configs/radxa-zero_defconfig F:doc/board/amlogic/u200.rst +F: doc/board/amlogic/bananapi-m2pro.rst F:doc/board/amlogic/bananapi-m5.rst F:doc/board/amlogic/radxa-zero.rst diff --git a/doc/board/amlogic/bananapi-m2pro.rst b/doc/board/amlogic/bananapi-m2pro.rst new file mode 100644 index 00..6c35943bac --- /dev/null +++ b/doc/board/amlogic/bananapi-m2pro.rst @@ -0,0 +1,143 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for BananaPi BPI-M2-PRO (S905X3) +=== + +BananaPi BPI-M2-PRO is a Single Board Computer manufactured by Sinovoip with the +following specification: + + - Amlogic S905X3 Arm Cortex-A55 quad-core SoC + - 2GB DDR4 SDRAM + - 16GB eMMC + - Gigabit Ethernet + - RTL8821CU USB WiFi (a/b/g/n/ac) + BT 5.0 + - HDMI 2.1 display + - 40-pin GPIO header + - 2x USB 3.0 Host + - 1x DC Jack (power) + - microSD + - UART serial + - Infrared receiver + +Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2_Pro + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make bananapi-m2pro_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh bananapi-m2pro /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + +$ DIR=bananapi-m2pro +$ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b odroidg12-v2015.01-c4-m5 $DIR + +$ cd $DIR +$ make bananapi_m2pro_defconfig +$ make +$ export UBOOTDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh +$ cp $UBOOTDIR/build/scp_task/bl301.bin fip/ +$ cp $UBOOTDIR/build/board/bananapi/bananpi_m5/firmware/acs.bin fip/ +$ cp $UBOOTDIR/fip/g12a/bl2.bin fip/ +$ cp $UBOOTDIR/fip/g12a/bl30.bin fip/ +$ cp $UBOOTDIR/fip/g12a/bl31.img fip/ +$ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/ +$ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/piei.fw fip/ +$ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/ +$ cp u-boot.bin fip/bl33.bin + +$ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 +$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \ +
Re: [PATCH v2] CI: Add m68k target
Acked-by: Angelo Dureghello On 23/03/23 1:22 AM, Marek Vasut wrote: Add M5208EVBE board to CI. This does not use default config due to limitations of QEMU emulation, instead the timer is switched from DMA timer to PIT timer and RAMBAR accesses are inhibited. Local QEMU launch command is as follows: $ qemu-system-m68k -nographic -machine mcf5208evb -cpu m5208 -bios u-boot.bin Signed-off-by: Marek Vasut --- Cc: Angelo Dureghello Cc: Huan Wang Cc: Marek Vasut Cc: Simon Glass Cc: Stefan Roese Cc: Tom Rini --- V2: Disable CONFIG_MCFTMR using -a ~CONFIG_MCFTMR --- .azure-pipelines.yml | 5 + .gitlab-ci.yml | 8 2 files changed, 13 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 5594a67d6b5..6452127ff42 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -297,6 +297,11 @@ stages: qemu_arm64: TEST_PY_BD: "qemu_arm64" TEST_PY_TEST_SPEC: "not sleep" +qemu_m68k: + TEST_PY_BD: "M5208EVBE" + TEST_PY_ID: "--id qemu" + TEST_PY_TEST_SPEC: "not sleep and not efi" + OVERRIDE: "-a CONFIG_M68K_QEMU=y -a ~CONFIG_MCFTMR" qemu_malta: TEST_PY_BD: "malta" TEST_PY_ID: "--id qemu" diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 5431bf6011a..a06c2aa4be9 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -355,6 +355,14 @@ qemu_arm64 test.py: TEST_PY_TEST_SPEC: "not sleep" <<: *buildman_and_testpy_dfn +qemu_m68k test.py: + variables: +TEST_PY_BD: "M5208EVBE" +TEST_PY_ID: "--id qemu" +TEST_PY_TEST_SPEC: "not sleep and not efi" +OVERRIDE: "-a CONFIG_M68K_QEMU=y -a ~CONFIG_MCFTMR" + <<: *buildman_and_testpy_dfn + qemu_malta test.py: variables: TEST_PY_BD: "malta" -- Angelo Dureghello +++ kernelspace +++ +E: angelo AT kernel-space.org +W: www.kernel-space.org
[PATCH] xilinx: Enable virtio mmio transport and devices
Qemu can create virtio mmio transports and passing devices through it that's why enable virtio by default on all arm64 based SoCs. Signed-off-by: Michal Simek --- configs/xilinx_versal_net_virt_defconfig | 7 ++- configs/xilinx_versal_virt_defconfig | 7 ++- configs/xilinx_zynqmp_virt_defconfig | 6 +- 3 files changed, 17 insertions(+), 3 deletions(-) diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index edd946339794..4c461d580eb1 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_TEXT_BASE=0x800 CONFIG_SYS_MALLOC_F_LEN=0x10 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-net-virt" CONFIG_SYS_PROMPT="Versal NET> " +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_CMD_FRU=y CONFIG_SYS_LOAD_ADDR=0x800 @@ -47,6 +48,7 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_EXT4_WRITE=y @@ -108,6 +110,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y +CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -133,4 +136,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y -CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index 7e38fd41562e..78c98d4091ea 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_TEXT_BASE=0x800 CONFIG_SYS_MALLOC_F_LEN=0x10 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_SYS_PROMPT="Versal> " +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_ENV_OFFSET_REDUND=0x7F0 CONFIG_CMD_FRU=y @@ -47,6 +48,7 @@ CONFIG_CMD_TFTPPUT=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_SMC=y CONFIG_CMD_EXT4_WRITE=y @@ -111,6 +113,7 @@ CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y CONFIG_RESET_ZYNQMP=y +CONFIG_DM_RNG=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y @@ -137,4 +140,6 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x03FD CONFIG_USB_GADGET_PRODUCT_NUM=0x0300 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y -CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index d29df93f43f8..3b89b3c9bae8 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_LEN=0x404 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" +CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_SPL_STACK_R_ADDR=0x1800 CONFIG_SPL_STACK=0xfffc @@ -90,6 +91,7 @@ CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y CONFIG_CMD_GETTIME=y +CONFIG_CMD_RNG=y CONFIG_CMD_TIMER=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_SMC=y @@ -229,10 +231,12 @@ CONFIG_SPLASH_SCREEN=y CONFIG_BMP_16BPP=y CONFIG_BMP_24BPP=y CONFIG_BMP_32BPP=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_BLK=y CONFIG_PANIC_HANG=y CONFIG_TPM=y CONFIG_SPL_GZIP=y -CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_EFI_SET_TIME=y CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y CONFIG_EFI_CAPSULE_ON_DISK=y -- 2.36.1
[PATCH v2 12/14] ARM: dts: add support for WeTek Hub and WeTek Play2
Import the dts files from linux-amlogic/for-next (Linux 6.4-rc1) and
add the old PHY reset bindings for dwmac to the u-boot.dtsi until we
support the new bindings in the PHY node. Without this the PHY is not
functional in u-boot or Linux.
Signed-off-by: Christian Hewitt
Reviewed-by: Neil Armstrong
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 +
arch/arm/dts/meson-gxbb-wetek-play2.dts | 119 +
arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi | 13 +
arch/arm/dts/meson-gxbb-wetek.dtsi| 292 ++
5 files changed, 484 insertions(+)
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts
create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts
create mode 100644 arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 42da335bb5..1c843882d1 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -191,6 +191,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-p200.dtb \
meson-gxbb-p201.dtb \
+ meson-gxbb-wetek-hub.dtb \
+ meson-gxbb-wetek-play2.dtb \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxl-s905w-jethome-jethub-j80.dtb \
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub.dts
b/arch/arm/dts/meson-gxbb-wetek-hub.dts
new file mode 100644
index 00..58733017ed
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-wetek-hub.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Neil Armstrong
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb-wetek.dtsi"
+#include
+
+/ {
+ compatible = "wetek,hub", "amlogic,meson-gxbb";
+ model = "WeTek Hub";
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "WETEK-HUB";
+ assigned-clocks = < CLKID_MPLL0>,
+ < CLKID_MPLL1>,
+ < CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = < AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = < AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = < AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-2 {
+ sound-dai = < AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <_tx>;
+ };
+ };
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ linux,rc-map-name = "rc-wetek-hub";
+};
diff --git a/arch/arm/dts/meson-gxbb-wetek-play2.dts
b/arch/arm/dts/meson-gxbb-wetek-play2.dts
new file mode 100644
index 00..505ffcd8eb
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-wetek-play2.dts
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Neil Armstrong
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb-wetek.dtsi"
+#include
+#include
+
+/ {
+ compatible = "wetek,play2", "amlogic,meson-gxbb";
+ model = "WeTek Play 2";
+
+ spdif_dit: audio-codec-0 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
+ leds {
+ led-wifi {
+ label = "wetek-play:wifi-status";
+ gpios = < GPIODV_26 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-ethernet {
+ label = "wetek-play:ethernet-status";
+ gpios = < GPIODV_27 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ button {
+ label = "reset";
+ linux,code = ;
+ gpios = <_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "WETEK-PLAY2";
+ assigned-clocks = < CLKID_MPLL0>,
+ < CLKID_MPLL1>,
+ < CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates =
[PATCH v2 09/14] ARM: dts: add support for Radxa Zero2
Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1)
to support the Radxa-Zero2 board.
Signed-off-by: Christian Hewitt
Reviewed-by: Neil Armstrong
---
arch/arm/dts/Makefile | 1 +
.../dts/meson-g12b-radxa-zero2-u-boot.dtsi| 7 +
arch/arm/dts/meson-g12b-radxa-zero2.dts | 489 ++
3 files changed, 497 insertions(+)
create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb20524a99..42da335bb5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -214,6 +214,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2l.dtb \
meson-g12b-odroid-n2-plus.dtb \
+ meson-g12b-radxa-zero2.dtb \
meson-sm1-bananapi-m2-pro.dtb \
meson-sm1-bananapi-m5.dtb \
meson-sm1-khadas-vim3l.dtb \
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
new file mode 100644
index 00..236f2468dc
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong
+ */
+
+#include "meson-g12-common-u-boot.dtsi"
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2.dts
b/arch/arm/dts/meson-g12b-radxa-zero2.dts
new file mode 100644
index 00..890f5bfebb
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-radxa-zero2.dts
@@ -0,0 +1,489 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong
+ * Copyright (c) 2019 Christian Hewitt
+ * Copyright (c) 2022 Radxa Limited
+ * Author: Yuntian Zhang
+ */
+
+/dts-v1/;
+
+#include "meson-g12b-a311d.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
+ model = "Radxa Zero2";
+
+ aliases {
+ serial0 = _AO;
+ serial2 = _A;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x8000>;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+ power-button {
+ label = "power";
+ linux,code = ;
+ gpios = <_ao GPIOAO_3 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-green {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ gpios = < GPIOA_12 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <_tx_tmds_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = < BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = < GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <>;
+ clock-names = "ext_clock";
+ };
+
+ ao_5v: regulator-ao-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ };
+
+ vcc_1v8: regulator-vcc-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_3v3>;
+ regulator-always-on;
+ /* FIXME: actually controlled by VDDCPU_B_EN */
+ };
+
+ vddao_1v8: regulator-vddao-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_3v3>;
+ regulator-always-on;
+
[PATCH v2 14/14] doc: boards: amlogic: add documentation for WeTek Hub and WeTek Play2
Add build instructions for the WeTek Hub and WeTek Play2 boards. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS| 2 + doc/board/amlogic/index.rst | 2 + doc/board/amlogic/wetek-hub.rst | 110 doc/board/amlogic/wetek-play2.rst | 115 ++ 4 files changed, 229 insertions(+) create mode 100644 doc/board/amlogic/wetek-hub.rst create mode 100644 doc/board/amlogic/wetek-play2.rst diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 264218e3be..fe451dd7db 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -12,3 +12,5 @@ F:configs/wetek-play2_defconfig F: doc/board/amlogic/p200.rst F: doc/board/amlogic/nanopi-k2.rst F: doc/board/amlogic/odroid-c2.rst +F: doc/board/amlogic/wetek-hub.rst +F: doc/board/amlogic/wetek-play2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 71b7e1f3ed..deb7976436 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -118,4 +118,6 @@ Board Documentation s400 u200 wetek-core2 + wetek-hub + wetek-play2 w400 diff --git a/doc/board/amlogic/wetek-hub.rst b/doc/board/amlogic/wetek-hub.rst new file mode 100644 index 00..378c6a6497 --- /dev/null +++ b/doc/board/amlogic/wetek-hub.rst @@ -0,0 +1,110 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for WeTek Hub (S905) +=== + +WeTek Hub is a small form-factor Android STB manufactured by WeTek with the following +specification: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 1GB DDR3 SDRAM + - 8GB eMMC + - Gigabit Ethernet + - HDMI 2.0 4K/60Hz display + - 1x USB otg + - microSD + - UART jack + - Infrared receiver + +Schematics are not publicly available but have been shared privately to maintainers. + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make wetek-hub_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh wetek-hub /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image and WeTek has not publicly shared the U-Boot sources needed to build FIP binaries +for signing. However you can download them from the amlogic-fip-repo. + +.. code-block:: bash +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip/wetek-hub +$ export FIPDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ cp $FIPDIR/bl2.bin fip/ +$ cp $FIPDIR/acs.bin fip/ +$ cp $FIPDIR/bl21.bin fip/ +$ cp $FIPDIR/bl30.bin fip/ +$ cp $FIPDIR/bl301.bin fip/ +$ cp $FIPDIR/bl31.img fip/ +$ cp u-boot.bin fip/bl33.bin + +$ $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \ + --bl31 fip/bl31.img \ + --bl33 fip/bl33.bin \ + fip/fip.bin + +$ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin +$ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + +$ $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin + +$ $FIPDIR/aml_encrypt_gxb --bootsig \ + --input fip/boot_new.bin + --output fip/u-boot.bin + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + +$ DEV=/dev/boot_device +$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync +$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc +$ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc +$ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc +$ ./aml_chksum fip/u-boot.bin.gxbb +$ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 +$ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440 diff --git a/doc/board/amlogic/wetek-play2.rst b/doc/board/amlogic/wetek-play2.rst new file mode 100644 index 00..cd7759f7f4 --- /dev/null
[PATCH v2 13/14] boards: amlogic: add WeTek Hub and WeTek Play2 defconfig
Add configurations for the WeTek Hub and WeTek Play2 boards. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS | 2 + configs/wetek-hub_defconfig| 70 ++ configs/wetek-play2_defconfig | 70 ++ 3 files changed, 142 insertions(+) create mode 100644 configs/wetek-hub_defconfig create mode 100644 configs/wetek-play2_defconfig diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 33ca3df5c6..264218e3be 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -7,6 +7,8 @@ F: board/amlogic/p200/ F: configs/nanopi-k2_defconfig F: configs/odroid-c2_defconfig F: configs/p200_defconfig +F: configs/wetek-hub_defconfig +F: configs/wetek-play2_defconfig F: doc/board/amlogic/p200.rst F: doc/board/amlogic/nanopi-k2.rst F: doc/board/amlogic/odroid-c2.rst diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig new file mode 100644 index 00..634833f7fe --- /dev/null +++ b/configs/wetek-hub_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" wetek-hub" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig new file mode 100644 index 00..6d33b09a94 --- /dev/null +++ b/configs/wetek-play2_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" wetek-play2" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y -- 2.34.1
[PATCH v2 11/14] doc: boards: amlogic: add documentation for Radxa Zero2
Add build docs for the Radxa Zero2 board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS| 2 + doc/board/amlogic/index.rst | 1 + doc/board/amlogic/radxa-zero2.rst | 80 +++ 3 files changed, 83 insertions(+) create mode 100644 doc/board/amlogic/radxa-zero2.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 042b523056..117f79ea04 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -5,6 +5,8 @@ L: u-boot-amlo...@groups.io F: board/amlogic/w400/ F: configs/bananapi-cm4-cm4io_defconfig F: configs/bananapi-m2s_defconfig +F: configs/radxa-zero2_defconfig F: doc/board/amlogic/w400.rst F: doc/board/amlogic/bananapi-cm4io.rst F: doc/board/amlogic/bananapi-m2s.rst +F: doc/board/amlogic/radxa-zero2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index fa1b362731..71b7e1f3ed 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -112,6 +112,7 @@ Board Documentation p212 q200 radxa-zero + radxa-zero2 sei510 sei610 s400 diff --git a/doc/board/amlogic/radxa-zero2.rst b/doc/board/amlogic/radxa-zero2.rst new file mode 100644 index 00..dccf592459 --- /dev/null +++ b/doc/board/amlogic/radxa-zero2.rst @@ -0,0 +1,80 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Radxa Zero2 (A311D) +== + +Radxa Zero2 is a small form factor SBC based on the Amlogic A311D chipset with the +following specification: + +- Amlogic A311D (Quad A73 + Dual A53) CPU +- 4GB LPDDR4 RAM +- 32/64/128GB eMMC +- Mali G52-MP4 GPU +- HDMI 2.1 output (micro) +- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0 +- 1x USB 2.0 port - Type C (OTG) +- 1x USB 3.0 port - Type C (Host) +- 1x micro SD Card slot +- 40 Pin GPIO header + +Schematics are available on request from Radxa. + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make radxa-zero2_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh radxa-zero2 /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git +$ git clone https://github.com/radxa/fip.git + +$ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev +$ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools + +$ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz +$ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt + +$ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf- +$ export ARCH=arm +$ cd u-boot +$ make radxa-zero2_defconfig +$ make + +$ cp u-boot.bin ../fip/radxa-zero2/bl33.bin +$ cd ../fip/radxa-zero2 +$ make + +This will generate the signed U-Boot binaries: + +.. code-block:: bash + +$ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + +$ DEV=/dev/boot_device +$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 +$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440 -- 2.34.1
[PATCH v2 10/14] boards: amlogic: add Radxa Zero2 defconfig
Add board configuration for the Radxa Zero2. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- configs/radxa-zero2_defconfig | 77 +++ 1 file changed, 77 insertions(+) create mode 100644 configs/radxa-zero2_defconfig diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig new file mode 100644 index 00..2218b0db7d --- /dev/null +++ b/configs/radxa-zero2_defconfig @@ -0,0 +1,77 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" radxa-zero2" +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_REMAKE_ELF=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +# CONFIG_PHY_REALTEK is not set +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +# CONFIG_ETH_DESIGNWARE_MESON8B is not set +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y -- 2.34.1
[PATCH v2 08/14] docs: boards: amlogic: add documentation for BananaPi M2S
Add build docs for the BPI-M2S board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS | 2 + doc/board/amlogic/bananapi-m2s.rst | 153 + doc/board/amlogic/index.rst| 1 + 3 files changed, 156 insertions(+) create mode 100644 doc/board/amlogic/bananapi-m2s.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 26a4c2c587..042b523056 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -4,5 +4,7 @@ S: Maintained L: u-boot-amlo...@groups.io F: board/amlogic/w400/ F: configs/bananapi-cm4-cm4io_defconfig +F: configs/bananapi-m2s_defconfig F: doc/board/amlogic/w400.rst F: doc/board/amlogic/bananapi-cm4io.rst +F: doc/board/amlogic/bananapi-m2s.rst diff --git a/doc/board/amlogic/bananapi-m2s.rst b/doc/board/amlogic/bananapi-m2s.rst new file mode 100644 index 00..4a1be47b35 --- /dev/null +++ b/doc/board/amlogic/bananapi-m2s.rst @@ -0,0 +1,153 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for BananaPi M2S (A311D & S922X) +=== + +BananaPi BPI-M2S ships is a Single Board Computer manufactured by Sinovoip that ships in +two variants with Amlogic S922X or A311D SoC and the following common specification: + +- 16GB eMMC +- HDMI 2.1a video +- 2x 10/100/1000 Base-T Ethernet (1x RTL8211F, 1x RTL811H) +- 2x USB 2.0 ports +- 2x Status LED's (green/blue) +- 1x Power/Reset button +- 1x micro SD card slot +- 40-pin GPIO header +- PWM fan header +- UART header + +The S992X variant has: +- 2GB LPDDR4 RAM + +The A311D variant has: + +- 4GB LPDDR4 RAM +- NPU (5.0 TOPS) +- MIPI DSI header +- MIPI CSI header + +An optional RTL8822CS SDIO WiFi/BT mezzanine is available for both board variants. + +Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2S + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make bananapi-m2s_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh bananapi-m2s /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + +$ DIR=bananapi-m2s +$ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b khadas-g12b-v2015.01-m2s $DIR + +$ cd $DIR +$ make bananapi_m2s_defconfig +$ make +$ export UBDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh +$ cp $UBDIR/build/scp_task/bl301.bin fip/ +$ cp $UBDIR/build/board/bananapi/bananpi_m2s/firmware/acs.bin fip/ +$ cp $UBDIR/fip/g12a/bl2.bin fip/ +$ cp $UBDIR/fip/g12a/bl30.bin fip/ +$ cp $UBDIR/fip/g12a/bl31.img fip/ +$ cp $UBDIR/fip/g12a/ddr3_1d.fw fip/ +$ cp $UBDIR/fip/g12a/ddr4_1d.fw fip/ +$ cp $UBDIR/fip/g12a/ddr4_2d.fw fip/ +$ cp $UBDIR/fip/g12a/diag_lpddr4.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr3_1d.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr4_1d.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr4_2d.fw fip/ +$ cp $UBDIR/fip/g12a/piei.fw fip/ +$ cp $UBDIR/fip/g12a/aml_ddr.fw fip/ +$ cp u-boot.bin fip/bl33.bin + +$ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ $UBDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 +$ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \ +
[PATCH v2 06/14] ARM: dts: add support for BananaPi M2S
Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1)
and omit the NPU node from the A311D board variant dts as this is
not supported under U-Boot.
Signed-off-by: Christian Hewitt
Reviewed-by: Neil Armstrong
---
arch/arm/dts/Makefile | 1 +
.../arm/dts/meson-g12b-a311d-bananapi-m2s.dts | 33 ++
arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi | 7 +
arch/arm/dts/meson-g12b-bananapi.dtsi | 521 ++
.../arm/dts/meson-g12b-s922x-bananapi-m2s.dts | 14 +
5 files changed, 576 insertions(+)
create mode 100644 arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
create mode 100644 arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-g12b-bananapi.dtsi
create mode 100644 arch/arm/dts/meson-g12b-s922x-bananapi-m2s.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d6139429e5..eb20524a99 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -204,6 +204,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12a-radxa-zero.dtb \
meson-g12a-sei510.dtb \
meson-g12a-u200.dtb \
+ meson-g12b-a311d-bananapi-m2s.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
meson-g12b-bananapi-cm4-cm4io.dtb \
meson-g12b-gsking-x.dtb \
diff --git a/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
new file mode 100644
index 00..31365316b2
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Christian Hewitt
+ */
+
+/dts-v1/;
+
+#include "meson-g12b-a311d.dtsi"
+#include "meson-g12b-bananapi.dtsi"
+
+/ {
+ compatible = "bananapi,bpi-m2s", "amlogic,a311d", "amlogic,g12b";
+ model = "BananaPi M2S";
+
+ aliases {
+ i2c0 =
+ i2c1 =
+ };
+};
+
+/* Camera (CSI) bus */
+ {
+ status = "okay";
+ pinctrl-0 = <_sda_h6_pins>, <_sck_h7_pins>;
+ pinctrl-names = "default";
+};
+
+/* Display (DSI) bus */
+ {
+ status = "okay";
+ pinctrl-0 = <_sda_a_pins>, <_sck_a_pins>;
+ pinctrl-names = "default";
+};
diff --git a/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi
b/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi
new file mode 100644
index 00..236f2468dc
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong
+ */
+
+#include "meson-g12-common-u-boot.dtsi"
diff --git a/arch/arm/dts/meson-g12b-bananapi.dtsi
b/arch/arm/dts/meson-g12b-bananapi.dtsi
new file mode 100644
index 00..83709787eb
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-bananapi.dtsi
@@ -0,0 +1,521 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong
+ * Copyright (c) 2023 Christian Hewitt
+ */
+
+#include
+#include
+#include
+#include
+
+/ {
+ aliases {
+ serial0 = _AO;
+ ethernet0 =
+ rtc1 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x8000>; /* 2 GiB or 4 GiB */
+ };
+
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = < 2>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <171>;
+
+ button-function {
+ label = "RST";
+ linux,code = ;
+ press-threshold-microvolt = <1>;
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = < BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ fan0: pwm-fan {
+ compatible = "pwm-fan";
+ #cooling-cells = <2>;
+ cooling-min-state = <0>;
+ cooling-max-state = <3>;
+ cooling-levels = <0 120 170 220>;
+ pwms = <_cd 1 4 0>;
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <_tx_tmds_out>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ gpios = <_ao GPIOAO_7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led-1 {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ gpios = <_ao GPIOAO_2
[PATCH v2 05/14] docs: boards: amlogic: add documentation for BananaPi M2-Pro
Add build docs for the BPI-M2-PRO board. Signed-off-by: Christian Hewitt --- board/amlogic/u200/MAINTAINERS | 2 + doc/board/amlogic/bananapi-m2pro.rst | 143 +++ doc/board/amlogic/index.rst | 1 + 3 files changed, 146 insertions(+) create mode 100644 doc/board/amlogic/bananapi-m2pro.rst diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS index 919e349922..f429c212ba 100644 --- a/board/amlogic/u200/MAINTAINERS +++ b/board/amlogic/u200/MAINTAINERS @@ -4,8 +4,10 @@ S: Maintained L: u-boot-amlo...@groups.io F: board/amlogic/u200/ F: configs/u200_defconfig +F: configs/bananapi-m2pro_defconfig F: configs/bananapi-m5_defconfig F: configs/radxa-zero_defconfig F: doc/board/amlogic/u200.rst +F: doc/board/amlogic/bananapi-m2pro.rst F: doc/board/amlogic/bananapi-m5.rst F: doc/board/amlogic/radxa-zero.rst diff --git a/doc/board/amlogic/bananapi-m2pro.rst b/doc/board/amlogic/bananapi-m2pro.rst new file mode 100644 index 00..6c35943bac --- /dev/null +++ b/doc/board/amlogic/bananapi-m2pro.rst @@ -0,0 +1,143 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for BananaPi BPI-M2-PRO (S905X3) +=== + +BananaPi BPI-M2-PRO is a Single Board Computer manufactured by Sinovoip with the +following specification: + + - Amlogic S905X3 Arm Cortex-A55 quad-core SoC + - 2GB DDR4 SDRAM + - 16GB eMMC + - Gigabit Ethernet + - RTL8821CU USB WiFi (a/b/g/n/ac) + BT 5.0 + - HDMI 2.1 display + - 40-pin GPIO header + - 2x USB 3.0 Host + - 1x DC Jack (power) + - microSD + - UART serial + - Infrared receiver + +Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2_Pro + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make bananapi-m2pro_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash + +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh bananapi-m2pro /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + +$ DIR=bananapi-m2pro +$ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b odroidg12-v2015.01-c4-m5 $DIR + +$ cd $DIR +$ make bananapi_m2pro_defconfig +$ make +$ export UBOOTDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh +$ cp $UBOOTDIR/build/scp_task/bl301.bin fip/ +$ cp $UBOOTDIR/build/board/bananapi/bananpi_m5/firmware/acs.bin fip/ +$ cp $UBOOTDIR/fip/g12a/bl2.bin fip/ +$ cp $UBOOTDIR/fip/g12a/bl30.bin fip/ +$ cp $UBOOTDIR/fip/g12a/bl31.img fip/ +$ cp $UBOOTDIR/fip/g12a/ddr3_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/ddr4_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/ddr4_2d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/diag_lpddr4.fw fip/ +$ cp $UBOOTDIR/fip/g12a/lpddr3_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/lpddr4_1d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/lpddr4_2d.fw fip/ +$ cp $UBOOTDIR/fip/g12a/piei.fw fip/ +$ cp $UBOOTDIR/fip/g12a/aml_ddr.fw fip/ +$ cp u-boot.bin fip/bl33.bin + +$ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 +$ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \ + --output fip/bl30_new.bin.enc \ +
[PATCH v2 07/14] boards: add BananaPi M2S defconfig
Add configuration for the Bananapi BPI-M2S. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- configs/bananapi-m2s_defconfig | 82 ++ 1 file changed, 82 insertions(+) create mode 100644 configs/bananapi-m2s_defconfig diff --git a/configs/bananapi-m2s_defconfig b/configs/bananapi-m2s_defconfig new file mode 100644 index 00..3109e0ce48 --- /dev/null +++ b/configs/bananapi-m2s_defconfig @@ -0,0 +1,82 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-bananapi-m2s" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" bpi-m2s" +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_DEBUG_UART=y +CONFIG_AHCI=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_REMAKE_ELF=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_AHCI_PCI=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_PCI=y +CONFIG_PCIE_DW_MESON=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y -- 2.34.1
[PATCH v2 04/14] boards: add BananaPi M2-Pro defconfig
Add configuration for the BananaPi M2-Pro board. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- configs/bananapi-m2-pro_defconfig | 76 +++ 1 file changed, 76 insertions(+) create mode 100644 configs/bananapi-m2-pro_defconfig diff --git a/configs/bananapi-m2-pro_defconfig b/configs/bananapi-m2-pro_defconfig new file mode 100644 index 00..28b603fe20 --- /dev/null +++ b/configs/bananapi-m2-pro_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m2-pro" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING="bpi-m2-pro" +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_REMAKE_ELF=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ADC=y +CONFIG_SARADC_MESON=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y -- 2.34.1
[PATCH v2 03/14] ARM: dts: add support for BananaPi M2-Pro
Import the board dts from the linux-amlogic/for-next (6.4-rc1)
branch. This involves spliting the BPI-M5 dts into a dtsi and
then reusing this for the M2-Pro.
Signed-off-by: Christian Hewitt
Reviewed-by: Neil Armstrong
---
arch/arm/dts/Makefile | 5 +-
.../dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi | 14 +
arch/arm/dts/meson-sm1-bananapi-m2-pro.dts| 97
arch/arm/dts/meson-sm1-bananapi-m5.dts| 427 +
arch/arm/dts/meson-sm1-bananapi.dtsi | 435 ++
5 files changed, 550 insertions(+), 428 deletions(-)
create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
create mode 100644 arch/arm/dts/meson-sm1-bananapi.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0c149b636a..d6139429e5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -205,14 +205,15 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12a-sei510.dtb \
meson-g12a-u200.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
+ meson-g12b-bananapi-cm4-cm4io.dtb \
+ meson-g12b-gsking-x.dtb \
meson-g12b-gtking.dtb \
meson-g12b-gtking-pro.dtb \
- meson-g12b-gsking-x.dtb \
meson-g12b-odroid-go-ultra.dtb \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2l.dtb \
meson-g12b-odroid-n2-plus.dtb \
- meson-g12b-bananapi-cm4-cm4io.dtb \
+ meson-sm1-bananapi-m2-pro.dtb \
meson-sm1-bananapi-m5.dtb \
meson-sm1-khadas-vim3l.dtb \
meson-sm1-odroid-c4.dtb \
diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi
b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi
new file mode 100644
index 00..4a1aeda565
--- /dev/null
+++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi
@@ -0,0 +1,14 @@
+
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 BayLibre, SAS
+ * Author: Neil Armstrong
+ */
+
+#include "meson-sm1-u-boot.dtsi"
+
+ {
+ snps,reset-gpio = < GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>;
+ snps,reset-delays-us = <0 1 100>;
+ snps,reset-active-low;
+};
diff --git a/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
new file mode 100644
index 00..586034316e
--- /dev/null
+++ b/arch/arm/dts/meson-sm1-bananapi-m2-pro.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 BayLibre SAS
+ * Author: Neil Armstrong
+ */
+
+/dts-v1/;
+
+#include "meson-sm1-bananapi.dtsi"
+#include
+
+/ {
+ compatible = "bananapi,bpi-m2-pro", "amlogic,sm1";
+ model = "Banana Pi BPI-M2-PRO";
+
+ sound {
+ compatible = "amlogic,axg-sound-card";
+ model = "BPI-M2-PRO";
+ audio-aux-devs = <_b>;
+ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
+ "TDMOUT_B IN 1", "FRDDR_B OUT 1",
+ "TDMOUT_B IN 2", "FRDDR_C OUT 1",
+ "TDM_B Playback", "TDMOUT_B OUT";
+
+ assigned-clocks = < CLKID_MPLL2>,
+ < CLKID_MPLL0>,
+ < CLKID_MPLL1>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+
+ dai-link-0 {
+ sound-dai = <_a>;
+ };
+
+ dai-link-1 {
+ sound-dai = <_b>;
+ };
+
+ dai-link-2 {
+ sound-dai = <_c>;
+ };
+
+ /* 8ch hdmi interface */
+ dai-link-3 {
+ sound-dai = <_b>;
+ dai-format = "i2s";
+ dai-tdm-slot-tx-mask-0 = <1 1>;
+ dai-tdm-slot-tx-mask-1 = <1 1>;
+ dai-tdm-slot-tx-mask-2 = <1 1>;
+ dai-tdm-slot-tx-mask-3 = <1 1>;
+ mclk-fs = <256>;
+
+ codec {
+ sound-dai = < TOHDMITX_I2S_IN_B>;
+ };
+ };
+
+ /* hdmi glue */
+ dai-link-4 {
+ sound-dai = < TOHDMITX_I2S_OUT>;
+
+ codec {
+ sound-dai = <_tx>;
+ };
+ };
+ };
+};
+
+_audio {
+ status = "okay";
+};
+
+_a {
+ status = "okay";
+};
+
+_b {
+ status = "okay";
+};
+
+_c {
+ status = "okay";
+};
+
+_b {
+ status = "okay";
+};
+
+_b {
+ status = "okay";
+};
+
+ {
+ status = "okay";
+};
diff --git a/arch/arm/dts/meson-sm1-bananapi-m5.dts
b/arch/arm/dts/meson-sm1-bananapi-m5.dts
index effaa138b5..f045bf8516 100644
[PATCH v2 02/14] docs: boards: amlogic: fix blank-line typo in recently updated docs
There needs to be a blank line between the start of the code block and the first line of content. Fix for all recently updated docs. Signed-off-by: Christian Hewitt --- doc/board/amlogic/bananapi-cm4io.rst| 1 + doc/board/amlogic/bananapi-m5.rst | 1 + doc/board/amlogic/beelink-gskingx.rst | 1 + doc/board/amlogic/beelink-gtking.rst| 1 + doc/board/amlogic/beelink-gtkingpro.rst | 1 + doc/board/amlogic/jethub-j100.rst | 1 + doc/board/amlogic/jethub-j80.rst| 1 + doc/board/amlogic/khadas-vim.rst| 1 + doc/board/amlogic/khadas-vim2.rst | 1 + doc/board/amlogic/khadas-vim3.rst | 1 + doc/board/amlogic/khadas-vim3l.rst | 1 + doc/board/amlogic/libretech-ac.rst | 1 + doc/board/amlogic/libretech-cc.rst | 1 + doc/board/amlogic/nanopi-k2.rst | 1 + doc/board/amlogic/odroid-c2.rst | 1 + doc/board/amlogic/odroid-c4.rst | 1 + doc/board/amlogic/odroid-go-ultra.rst | 1 + doc/board/amlogic/odroid-hc4.rst| 1 + doc/board/amlogic/odroid-n2.rst | 1 + doc/board/amlogic/odroid-n2l.rst| 1 + doc/board/amlogic/p200.rst | 1 + doc/board/amlogic/p201.rst | 1 + doc/board/amlogic/q200.rst | 1 + doc/board/amlogic/radxa-zero.rst| 1 + doc/board/amlogic/s400.rst | 1 + doc/board/amlogic/sei510.rst| 1 + doc/board/amlogic/sei610.rst| 1 + doc/board/amlogic/u200.rst | 1 + doc/board/amlogic/w400.rst | 1 + doc/board/amlogic/wetek-core2.rst | 1 + 30 files changed, 30 insertions(+) diff --git a/doc/board/amlogic/bananapi-cm4io.rst b/doc/board/amlogic/bananapi-cm4io.rst index aabe2ef197..672cbee7d8 100644 --- a/doc/board/amlogic/bananapi-cm4io.rst +++ b/doc/board/amlogic/bananapi-cm4io.rst @@ -44,6 +44,7 @@ U-Boot Signing with Pre-Built FIP repo -- .. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 $ cd amlogic-boot-fip $ mkdir my-output-dir diff --git a/doc/board/amlogic/bananapi-m5.rst b/doc/board/amlogic/bananapi-m5.rst index ddc14b4eef..009ea0ba94 100644 --- a/doc/board/amlogic/bananapi-m5.rst +++ b/doc/board/amlogic/bananapi-m5.rst @@ -33,6 +33,7 @@ U-Boot Signing with Pre-Built FIP repo -- .. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 $ cd amlogic-boot-fip $ mkdir my-output-dir diff --git a/doc/board/amlogic/beelink-gskingx.rst b/doc/board/amlogic/beelink-gskingx.rst index 987d358c77..8a8296e863 100644 --- a/doc/board/amlogic/beelink-gskingx.rst +++ b/doc/board/amlogic/beelink-gskingx.rst @@ -38,6 +38,7 @@ U-Boot Signing with Pre-Built FIP repo -- .. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 $ cd amlogic-boot-fip $ mkdir my-output-dir diff --git a/doc/board/amlogic/beelink-gtking.rst b/doc/board/amlogic/beelink-gtking.rst index 342887d584..8171b698c7 100644 --- a/doc/board/amlogic/beelink-gtking.rst +++ b/doc/board/amlogic/beelink-gtking.rst @@ -34,6 +34,7 @@ U-Boot Signing with Pre-Built FIP repo -- .. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 $ cd amlogic-boot-fip $ mkdir my-output-dir diff --git a/doc/board/amlogic/beelink-gtkingpro.rst b/doc/board/amlogic/beelink-gtkingpro.rst index 541938b103..eb0b7d4fd1 100644 --- a/doc/board/amlogic/beelink-gtkingpro.rst +++ b/doc/board/amlogic/beelink-gtkingpro.rst @@ -35,6 +35,7 @@ U-Boot Signing with Pre-Built FIP repo -- .. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 $ cd amlogic-boot-fip $ mkdir my-output-dir diff --git a/doc/board/amlogic/jethub-j100.rst b/doc/board/amlogic/jethub-j100.rst index 0d63976789..86acdafa06 100644 --- a/doc/board/amlogic/jethub-j100.rst +++ b/doc/board/amlogic/jethub-j100.rst @@ -42,6 +42,7 @@ U-Boot Signing with Pre-Built FIP repo -- .. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 $ cd amlogic-boot-fip $ mkdir my-output-dir diff --git a/doc/board/amlogic/jethub-j80.rst b/doc/board/amlogic/jethub-j80.rst index d20fbad4c5..9195df6905 100644 --- a/doc/board/amlogic/jethub-j80.rst +++ b/doc/board/amlogic/jethub-j80.rst @@ -34,6 +34,7 @@ U-Boot Signing with Pre-Built FIP repo -- .. code-block:: bash + $ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 $ cd amlogic-boot-fip $ mkdir my-output-dir diff --git a/doc/board/amlogic/khadas-vim.rst b/doc/board/amlogic/khadas-vim.rst index f1fbe1a8a6..20370ed49a 100644 --- a/doc/board/amlogic/khadas-vim.rst +++
[PATCH v2 01/14] docs: boards: amlogic: add bananapi-m5 to u200 maintainer file
The bananapi-m5 docs are missing from the file, so add them. Signed-off-by: Christian Hewitt Reviewed-by: Neil Armstrong --- board/amlogic/u200/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/amlogic/u200/MAINTAINERS b/board/amlogic/u200/MAINTAINERS index 47cec234a1..919e349922 100644 --- a/board/amlogic/u200/MAINTAINERS +++ b/board/amlogic/u200/MAINTAINERS @@ -7,4 +7,5 @@ F: configs/u200_defconfig F: configs/bananapi-m5_defconfig F: configs/radxa-zero_defconfig F: doc/board/amlogic/u200.rst +F: doc/board/amlogic/bananapi-m5.rst F: doc/board/amlogic/radxa-zero.rst -- 2.34.1
[PATCH v2 00/14] boards: amlogic: add BananaPi/Radxa/WeTek boards
This series adds support for the following boards which are tested and booting fine with 2023.04-rc4: - BananaPi M2-Pro (S905X3) - BananaPi M2S (A311D or S922X) - Radxa Zero2 (A311D) - WeTek Hub (S905) - WeTek Play2 (S905) I also spotted that bananapi-m5 wasn't referrences in the u200 maintainer file so there's a patch to correct that too. Changes since v1: - Add reviews on M2-Pro/M2S/Zero2 dts/config patches - Add a patch to correct a missing blank line in recently updated docs - Fix commit message for Hub/Play2 config patch Christian Hewitt (14): docs: boards: amlogic: add bananapi-m5 to u200 maintainer file docs: boards: amlogic: fix blank-line typo in recently updated docs ARM: dts: add support for BananaPi M2-Pro boards: add BananaPi M2-Pro defconfig docs: boards: amlogic: add documentation for BananaPi M2-Pro ARM: dts: add support for BananaPi M2S boards: add BananaPi M2S defconfig docs: boards: amlogic: add documentation for BananaPi M2S ARM: dts: add support for Radxa Zero2 boards: amlogic: add Radxa Zero2 defconfig doc: boards: amlogic: add documentation for Radxa Zero2 ARM: dts: add support for WeTek Hub and WeTek Play2 boards: amlogic: add WeTek Hub and WeTek Play2 defconfig doc: boards: amlogic: add documentation for WeTek Hub and WeTek Play2 arch/arm/dts/Makefile | 9 +- .../arm/dts/meson-g12b-a311d-bananapi-m2s.dts | 33 ++ arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi | 7 + arch/arm/dts/meson-g12b-bananapi.dtsi | 521 ++ .../dts/meson-g12b-radxa-zero2-u-boot.dtsi| 7 + arch/arm/dts/meson-g12b-radxa-zero2.dts | 489 .../arm/dts/meson-g12b-s922x-bananapi-m2s.dts | 14 + arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 ++ arch/arm/dts/meson-gxbb-wetek-play2.dts | 119 arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi | 13 + arch/arm/dts/meson-gxbb-wetek.dtsi| 292 ++ .../dts/meson-sm1-bananapi-m2-pro-u-boot.dtsi | 14 + arch/arm/dts/meson-sm1-bananapi-m2-pro.dts| 97 arch/arm/dts/meson-sm1-bananapi-m5.dts| 427 +- arch/arm/dts/meson-sm1-bananapi.dtsi | 435 +++ board/amlogic/p200/MAINTAINERS| 4 + board/amlogic/u200/MAINTAINERS| 3 + board/amlogic/w400/MAINTAINERS| 4 + configs/bananapi-m2-pro_defconfig | 76 +++ configs/bananapi-m2s_defconfig| 82 +++ configs/radxa-zero2_defconfig | 77 +++ configs/wetek-hub_defconfig | 70 +++ configs/wetek-play2_defconfig | 70 +++ doc/board/amlogic/bananapi-cm4io.rst | 1 + doc/board/amlogic/bananapi-m2pro.rst | 143 + doc/board/amlogic/bananapi-m2s.rst| 153 + doc/board/amlogic/bananapi-m5.rst | 1 + doc/board/amlogic/beelink-gskingx.rst | 1 + doc/board/amlogic/beelink-gtking.rst | 1 + doc/board/amlogic/beelink-gtkingpro.rst | 1 + doc/board/amlogic/index.rst | 5 + doc/board/amlogic/jethub-j100.rst | 1 + doc/board/amlogic/jethub-j80.rst | 1 + doc/board/amlogic/khadas-vim.rst | 1 + doc/board/amlogic/khadas-vim2.rst | 1 + doc/board/amlogic/khadas-vim3.rst | 1 + doc/board/amlogic/khadas-vim3l.rst| 1 + doc/board/amlogic/libretech-ac.rst| 1 + doc/board/amlogic/libretech-cc.rst| 1 + doc/board/amlogic/nanopi-k2.rst | 1 + doc/board/amlogic/odroid-c2.rst | 1 + doc/board/amlogic/odroid-c4.rst | 1 + doc/board/amlogic/odroid-go-ultra.rst | 1 + doc/board/amlogic/odroid-hc4.rst | 1 + doc/board/amlogic/odroid-n2.rst | 1 + doc/board/amlogic/odroid-n2l.rst | 1 + doc/board/amlogic/p200.rst| 1 + doc/board/amlogic/p201.rst| 1 + doc/board/amlogic/q200.rst| 1 + doc/board/amlogic/radxa-zero.rst | 1 + doc/board/amlogic/radxa-zero2.rst | 80 +++ doc/board/amlogic/s400.rst| 1 + doc/board/amlogic/sei510.rst | 1 + doc/board/amlogic/sei610.rst | 1 + doc/board/amlogic/u200.rst| 1 + doc/board/amlogic/w400.rst| 1 + doc/board/amlogic/wetek-core2.rst | 1 + doc/board/amlogic/wetek-hub.rst | 110 doc/board/amlogic/wetek-play2.rst | 115 59 files changed, 3129 insertions(+), 428 deletions(-) create mode 100644 arch/arm/dts/meson-g12b-a311d-bananapi-m2s.dts create mode 100644 arch/arm/dts/meson-g12b-bananapi-u-boot.dtsi create mode 100644 arch/arm/dts/meson-g12b-bananapi.dtsi create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi create mode 100644
Re: [PATCH 1/4] net: e1000: add and make use of NUM_RX_DESC macro
> > > > > The call to DEFINE_ALIGN_BUFFER for the rx_desc array > > conained an icnonsistency as 16 receive descriptors > > were allocated when the remaining code would only use > > 8 of them. > > > > Signed-off-by: Christian Gmeiner > > gentle ping > Adding some more people to CC - maybe this helps. -- greets -- Christian Gmeiner, MSc https://christian-gmeiner.info/privacypolicy
Re: [PATCH RFC u-boot-mvebu 0/2] arm: mvebu: Fix eMMC boot
On Wed, 22 Mar 2023 at 19:09, Pali Rohár wrote: > > On Wednesday 22 March 2023 18:59:45 Pali Rohár wrote: > > On Wednesday 22 March 2023 13:45:56 Martin Rowe wrote: > > > On Wed, 22 Mar 2023 at 12:38, Martin Rowe wrote: > > > > > > > > On Tue, 21 Mar 2023 at 08:08, Pali Rohár wrote: > > > >> > > > >> On Tuesday 21 March 2023 08:01:16 Martin Rowe wrote: > > > >> > On Mon, 20 Mar 2023 at 17:33, Pali Rohár wrote: > > > >> > > > > >> > > On Monday 20 March 2023 11:48:59 Martin Rowe wrote: > > > >> > > > On Sun, 19 Mar 2023 at 16:22, Pali Rohár wrote: > > > >> > > > > > > >> > > > > On Sunday 19 March 2023 00:32:01 Martin Rowe wrote: > > > >> > > > > > On Mon, 6 Mar 2023 at 11:53, Pali Rohár > > > >> > > > > > wrote: > > > >> > > > > > > > > >> > > > > > > Could you try to print mmc->part_config (ideally as early > > > >> > > > > > > as > > > >> > > possible)? > > > >> > > > > > > > > > >> > > > > > > > > >> > > > > > In SPL mmc->part_config is 255 > > > >> > > > > > In main u-boot at the start of clearfog.c board_init() > > > >> > > mmc->part_config > > > >> > > > > is > > > >> > > > > > 255 > > > >> > > > > > In main u-boot at the start of clearfog.c checkboard() > > > >> > > mmc->part_config > > > >> > > > > is > > > >> > > > > > 8 (ack: 0, partition_enable: 1, access: 0) > > > >> > > > > > > > >> > > > > 255 is uninitialized value. > > > >> > > > > > > > >> > > > > > If I set partition_enable to 2, I get the same result except > > > >> > > > > > the > > > >> > > value is > > > >> > > > > > 16 (ack: 0, partition_enable: 2, access: 0) instead of 8 > > > >> > > > > > for the > > > >> > > last > > > >> > > > > value > > > >> > > > > > > > >> > > > > Try to change "access" bits. > > > >> > > > > > > > >> > > > > > > > > >> > > > > > BootROM - 1.73 > > > >> > > > > > > > > >> > > > > > Booting from MMC > > > >> > > > > > > > > >> > > > > > U-Boot SPL 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - > > > >> > > 10:05:32 > > > >> > > > > > +1000) > > > >> > > > > > High speed PHY - Version: 2.0 > > > >> > > > > > EEPROM TLV detection failed: Using static config for > > > >> > > > > > Clearfog Pro. > > > >> > > > > > Detected Device ID 6828 > > > >> > > > > > board SerDes lanes topology details: > > > >> > > > > > | Lane # | Speed | Type | > > > >> > > > > > > > > >> > > > > > | 0| 3 | SATA0 | > > > >> > > > > > | 1| 0 | SGMII1 | > > > >> > > > > > | 2| 5 | PCIe1 | > > > >> > > > > > | 3| 5 | USB3 HOST1 | > > > >> > > > > > | 4| 5 | PCIe2 | > > > >> > > > > > | 5| 0 | SGMII2 | > > > >> > > > > > > > > >> > > > > > High speed PHY - Ended Successfully > > > >> > > > > > mv_ddr: 14.0.0 > > > >> > > > > > DDR3 Training Sequence - Switching XBAR Window to FastPath > > > >> > > > > > Window > > > >> > > > > > mv_ddr: completed successfully > > > >> > > > > > spl.c spl_boot_device part_config = 255 > > > >> > > > > > Trying to boot from MMC1 > > > >> > > > > > > > > >> > > > > > > > > >> > > > > > U-Boot 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - > > > >> > > > > > 10:05:32 > > > >> > > +1000) > > > >> > > > > > > > > >> > > > > > SoC: MV88F6828-A0 at 1600 MHz > > > >> > > > > > DRAM: 1 GiB (800 MHz, 32-bit, ECC not enabled) > > > >> > > > > > clearfog.c board_init part_config = 255 > > > >> > > > > > Core: 38 devices, 22 uclasses, devicetree: separate > > > >> > > > > > MMC: mv_sdh: 0 > > > >> > > > > > Loading Environment from MMC... *** Warning - bad CRC, using > > > >> > > > > > default > > > >> > > > > > environment > > > >> > > > > > > > > >> > > > > > Model: SolidRun Clearfog A1 > > > >> > > > > > clearfog.c checkboard part_config = 8 > > > >> > > > > > Board: SolidRun Clearfog Pro > > > >> > > > > > Net: > > > >> > > > > > Warning: ethernet@7 (eth1) using random MAC address - > > > >> > > > > 32:16:0e:b4:d1:d8 > > > >> > > > > > eth1: ethernet@7 > > > >> > > > > > Warning: ethernet@3 (eth2) using random MAC address - > > > >> > > > > 72:30:3f:79:07:12 > > > >> > > > > > , eth2: ethernet@3 > > > >> > > > > > Warning: ethernet@34000 (eth3) using random MAC address - > > > >> > > > > 82:fb:71:23:46:4f > > > >> > > > > > , eth3: ethernet@34000 > > > >> > > > > > Hit any key to stop autoboot: 0 > > > >> > > > > > => mmc partconf 0 > > > >> > > > > > EXT_CSD[179], PARTITION_CONFIG: > > > >> > > > > > BOOT_ACK: 0x0 > > > >> > > > > > BOOT_PARTITION_ENABLE: 0x1 > > > >> > > > > > PARTITION_ACCESS: 0x0 > > > >> > > > > > > > > >> > > > > > > > > >> > > > > > > > > >> > > > > > BootROM - 1.73 > > > >> > > > > > > > > >> > > > > > Booting from MMC > > > >> > > > > > > > > >> > > > > > U-Boot SPL 2023.04-rc3-00159-gd1653548d2-dirty (Mar 19 2023 - > > > >> > > 10:05:32 > > > >> > > > > > +1000) > > > >> > > > > > High speed PHY - Version: 2.0 > > > >> > > > > > EEPROM TLV detection failed: Using static
[PATCH] ram: rk3399: add missing high row detection
For 2 GB LPDDR4 single-rank RAM with 16 rows, the Rockchip ddr init bin prints: "Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=16 Size=2048MB" U-Boot TPL prints: "BW=32 Col=10 Bk=8 CS0 Row=16/15 CS=1 Die BW=16 Size=2048MB" Add missing high row detection so that U-Boot TPL prints Row=16, same as the Rockchip ddr init bin: "BW=32 Col=10 Bk=8 CS0 Row=16 CS=1 Die BW=16 Size=2048MB" Signed-off-by: Jonathan Liu --- drivers/ram/rockchip/sdram_rk3399.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index b1fea04e84..b597448203 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -2749,6 +2749,8 @@ static u64 dram_detect_cap(struct dram_info *dram, /* detect cs1 row */ sdram_detect_cs1_row(cap_info, params->base.dramtype); + sdram_detect_high_row(cap_info); + /* detect die bw */ sdram_detect_dbw(cap_info, params->base.dramtype); -- 2.40.0
Re: [PATCH 12/13] boards: amlogic: add WeTek Hub and WeTek Play2 defconfig
> On 23 Mar 2023, at 10:54 am, Christian Hewitt via groups.io > wrote: > > Add configurations for the WeTek Hub and WeTek Play2 boards along > with files for the wetek-gxbb board family to ensure the ethernet > MAC is correctly discovered. Set myself as the maintainer for the > board family. ^ should read just "Add configurations for the WeTek Hub and WeTek Play2 boards” as the board-family changes were dropped (not needed). I can send a v2 for this patch alone (or would you prefer the series?) Christian > > Signed-off-by: Christian Hewitt > --- > board/amlogic/p200/MAINTAINERS | 2 + > configs/wetek-hub_defconfig| 70 ++ > configs/wetek-play2_defconfig | 70 ++ > 3 files changed, 142 insertions(+) > create mode 100644 configs/wetek-hub_defconfig > create mode 100644 configs/wetek-play2_defconfig > > diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS > index 33ca3df5c6..264218e3be 100644 > --- a/board/amlogic/p200/MAINTAINERS > +++ b/board/amlogic/p200/MAINTAINERS > @@ -7,6 +7,8 @@ F:board/amlogic/p200/ > F:configs/nanopi-k2_defconfig > F:configs/odroid-c2_defconfig > F:configs/p200_defconfig > +F: configs/wetek-hub_defconfig > +F: configs/wetek-play2_defconfig > F:doc/board/amlogic/p200.rst > F:doc/board/amlogic/nanopi-k2.rst > F:doc/board/amlogic/odroid-c2.rst > diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig > new file mode 100644 > index 00..634833f7fe > --- /dev/null > +++ b/configs/wetek-hub_defconfig > @@ -0,0 +1,70 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_MESON=y > +CONFIG_TEXT_BASE=0x0100 > +CONFIG_SYS_LOAD_ADDR=0x100 > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_ENV_SIZE=0x2000 > +CONFIG_DM_GPIO=y > +CONFIG_DEBUG_UART_BASE=0xc81004c0 > +CONFIG_DEBUG_UART_CLOCK=2400 > +CONFIG_IDENT_STRING=" wetek-hub" > +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" > +CONFIG_DEBUG_UART=y > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 > +CONFIG_OF_BOARD_SETUP=y > +# CONFIG_DISPLAY_CPUINFO is not set > +CONFIG_MISC_INIT_R=y > +# CONFIG_CMD_BDI is not set > +# CONFIG_CMD_IMI is not set > +CONFIG_CMD_ADC=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +# CONFIG_CMD_LOADS is not set > +CONFIG_CMD_MMC=y > +CONFIG_CMD_USB=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_REGULATOR=y > +CONFIG_OF_CONTROL=y > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_SARADC_MESON=y > +CONFIG_DM_I2C=y > +CONFIG_SYS_I2C_MESON=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_MESON_GX=y > +CONFIG_PHY_REALTEK=y > +CONFIG_DM_ETH=y > +CONFIG_ETH_DESIGNWARE_MESON8B=y > +CONFIG_PHY=y > +CONFIG_MESON_GXBB_USB_PHY=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_MESON_GXBB=y > +CONFIG_POWER_DOMAIN=y > +CONFIG_MESON_EE_POWER_DOMAIN=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_GPIO=y > +CONFIG_DM_RESET=y > +CONFIG_DEBUG_UART_ANNOUNCE=y > +CONFIG_DEBUG_UART_SKIP_INIT=y > +CONFIG_MESON_SERIAL=y > +CONFIG_SYSINFO=y > +CONFIG_SYSINFO_SMBIOS=y > +CONFIG_USB=y > +CONFIG_DM_USB=y > +CONFIG_USB_DWC2=y > +CONFIG_USB_KEYBOARD=y > +CONFIG_VIDEO=y > +# CONFIG_VIDEO_BPP8 is not set > +# CONFIG_VIDEO_BPP16 is not set > +CONFIG_SYS_WHITE_ON_BLACK=y > +CONFIG_VIDEO_MESON=y > +CONFIG_VIDEO_DT_SIMPLEFB=y > +CONFIG_SPLASH_SCREEN=y > +CONFIG_SPLASH_SCREEN_ALIGN=y > +CONFIG_VIDEO_BMP_RLE8=y > +CONFIG_BMP_16BPP=y > +CONFIG_BMP_24BPP=y > +CONFIG_BMP_32BPP=y > +CONFIG_OF_LIBFDT_OVERLAY=y > diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig > new file mode 100644 > index 00..6d33b09a94 > --- /dev/null > +++ b/configs/wetek-play2_defconfig > @@ -0,0 +1,70 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_MESON=y > +CONFIG_TEXT_BASE=0x0100 > +CONFIG_SYS_LOAD_ADDR=0x100 > +CONFIG_NR_DRAM_BANKS=1 > +CONFIG_ENV_SIZE=0x2000 > +CONFIG_DM_GPIO=y > +CONFIG_DEBUG_UART_BASE=0xc81004c0 > +CONFIG_DEBUG_UART_CLOCK=2400 > +CONFIG_IDENT_STRING=" wetek-play2" > +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" > +CONFIG_DEBUG_UART=y > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 > +CONFIG_OF_BOARD_SETUP=y > +# CONFIG_DISPLAY_CPUINFO is not set > +CONFIG_MISC_INIT_R=y > +# CONFIG_CMD_BDI is not set > +# CONFIG_CMD_IMI is not set > +CONFIG_CMD_ADC=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +# CONFIG_CMD_LOADS is not set > +CONFIG_CMD_MMC=y > +CONFIG_CMD_USB=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_REGULATOR=y > +CONFIG_OF_CONTROL=y > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_SARADC_MESON=y > +CONFIG_DM_I2C=y > +CONFIG_SYS_I2C_MESON=y > +CONFIG_DM_MMC=y > +CONFIG_MMC_MESON_GX=y > +CONFIG_PHY_REALTEK=y > +CONFIG_DM_ETH=y > +CONFIG_ETH_DESIGNWARE_MESON8B=y > +CONFIG_PHY=y > +CONFIG_MESON_GXBB_USB_PHY=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_MESON_GXBB=y > +CONFIG_POWER_DOMAIN=y > +CONFIG_MESON_EE_POWER_DOMAIN=y > +CONFIG_DM_REGULATOR=y >
[PATCH 13/13] doc: boards: amlogic: add documentation for WeTek Hub and WeTek Play2
Add build instructions for the WeTek Hub and WeTek Play2 boards. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS| 2 + doc/board/amlogic/index.rst | 2 + doc/board/amlogic/wetek-hub.rst | 109 doc/board/amlogic/wetek-play2.rst | 114 ++ 4 files changed, 227 insertions(+) create mode 100644 doc/board/amlogic/wetek-hub.rst create mode 100644 doc/board/amlogic/wetek-play2.rst diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 264218e3be..fe451dd7db 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -12,3 +12,5 @@ F:configs/wetek-play2_defconfig F: doc/board/amlogic/p200.rst F: doc/board/amlogic/nanopi-k2.rst F: doc/board/amlogic/odroid-c2.rst +F: doc/board/amlogic/wetek-hub.rst +F: doc/board/amlogic/wetek-play2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index 71b7e1f3ed..deb7976436 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -118,4 +118,6 @@ Board Documentation s400 u200 wetek-core2 + wetek-hub + wetek-play2 w400 diff --git a/doc/board/amlogic/wetek-hub.rst b/doc/board/amlogic/wetek-hub.rst new file mode 100644 index 00..7362b7d7f5 --- /dev/null +++ b/doc/board/amlogic/wetek-hub.rst @@ -0,0 +1,109 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for WeTek Hub (S905) +=== + +WeTek Hub is a small form-factor Android STB manufactured by WeTek with the following +specification: + + - Amlogic S905 ARM Cortex-A53 quad-core SoC @ 1.5GHz + - ARM Mali 450 GPU + - 1GB DDR3 SDRAM + - 8GB eMMC + - Gigabit Ethernet + - HDMI 2.0 4K/60Hz display + - 1x USB otg + - microSD + - UART jack + - Infrared receiver + +Schematics are not publicly available but have been shared privately to maintainers. + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make wetek-hub_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh wetek-hub /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image and WeTek has not publicly shared the U-Boot sources needed to build FIP binaries +for signing. However you can download them from the amlogic-fip-repo. + +.. code-block:: bash +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip/wetek-hub +$ export FIPDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ cp $FIPDIR/bl2.bin fip/ +$ cp $FIPDIR/acs.bin fip/ +$ cp $FIPDIR/bl21.bin fip/ +$ cp $FIPDIR/bl30.bin fip/ +$ cp $FIPDIR/bl301.bin fip/ +$ cp $FIPDIR/bl31.img fip/ +$ cp u-boot.bin fip/bl33.bin + +$ $FIPDIR/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ $FIPDIR/fip_create --bl30 fip/bl30_new.bin \ + --bl31 fip/bl31.img \ + --bl33 fip/bl33.bin \ + fip/fip.bin + +$ sed -i 's/\x73\x02\x08\x91/\x1F\x20\x03\xD5/' fip/bl2.bin +$ python3 $FIPDIR/acs_tool.py fip/bl2.bin fip/bl2_acs.bin fip/acs.bin 0 + +$ $FIPDIR/blx_fix.sh \ + fip/bl2_acs.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/bl21.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ cat fip/bl2_new.bin fip/fip.bin > fip/boot_new.bin + +$ $FIPDIR/aml_encrypt_gxb --bootsig \ + --input fip/boot_new.bin + --output fip/u-boot.bin + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + +$ DEV=/dev/boot_device +$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 conv=fsync +$ dd if=fip/u-boot.bin of=fip/u-boot.bin.gxbb bs=512 seek=9 skip=8 count=87 conv=fsync,notrunc +$ dd if=/dev/zero of=fip/u-boot.bin.gxbb bs=512 seek=8 count=1 conv=fsync,notrunc +$ dd if=bl1.bin.hardkernel of=fip/u-boot.bin.gxbb bs=512 seek=2 skip=2 count=1 conv=fsync,notrunc +$ ./aml_chksum fip/u-boot.bin.gxbb +$ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 +$ dd if=fip/u-boot.gxbb of=$DEV conv=fsync,notrunc bs=1 count=440 diff --git a/doc/board/amlogic/wetek-play2.rst b/doc/board/amlogic/wetek-play2.rst new file mode 100644 index 00..31c839dcd5 --- /dev/null
[PATCH 12/13] boards: amlogic: add WeTek Hub and WeTek Play2 defconfig
Add configurations for the WeTek Hub and WeTek Play2 boards along with files for the wetek-gxbb board family to ensure the ethernet MAC is correctly discovered. Set myself as the maintainer for the board family. Signed-off-by: Christian Hewitt --- board/amlogic/p200/MAINTAINERS | 2 + configs/wetek-hub_defconfig| 70 ++ configs/wetek-play2_defconfig | 70 ++ 3 files changed, 142 insertions(+) create mode 100644 configs/wetek-hub_defconfig create mode 100644 configs/wetek-play2_defconfig diff --git a/board/amlogic/p200/MAINTAINERS b/board/amlogic/p200/MAINTAINERS index 33ca3df5c6..264218e3be 100644 --- a/board/amlogic/p200/MAINTAINERS +++ b/board/amlogic/p200/MAINTAINERS @@ -7,6 +7,8 @@ F: board/amlogic/p200/ F: configs/nanopi-k2_defconfig F: configs/odroid-c2_defconfig F: configs/p200_defconfig +F: configs/wetek-hub_defconfig +F: configs/wetek-play2_defconfig F: doc/board/amlogic/p200.rst F: doc/board/amlogic/nanopi-k2.rst F: doc/board/amlogic/odroid-c2.rst diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig new file mode 100644 index 00..634833f7fe --- /dev/null +++ b/configs/wetek-hub_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" wetek-hub" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig new file mode 100644 index 00..6d33b09a94 --- /dev/null +++ b/configs/wetek-play2_defconfig @@ -0,0 +1,70 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEBUG_UART_BASE=0xc81004c0 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" wetek-play2" +CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_ADC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SARADC_MESON=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MESON=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE_MESON8B=y +CONFIG_PHY=y +CONFIG_MESON_GXBB_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_SYSINFO=y +CONFIG_SYSINFO_SMBIOS=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_DWC2=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y
[PATCH 11/13] ARM: dts: add support for WeTek Hub and WeTek Play2
Import the dts files from linux-amlogic/for-next (Linux 6.4-rc1) and
add the old PHY reset bindings for dwmac to the u-boot.dtsi until we
support the new bindings in the PHY node. Without this the PHY is not
functional in u-boot or Linux.
Signed-off-by: Christian Hewitt
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 +
arch/arm/dts/meson-gxbb-wetek-play2.dts | 119 +
arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi | 13 +
arch/arm/dts/meson-gxbb-wetek.dtsi| 292 ++
5 files changed, 484 insertions(+)
create mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts
create mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts
create mode 100644 arch/arm/dts/meson-gxbb-wetek-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 42da335bb5..1c843882d1 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -191,6 +191,8 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxbb-nanopi-k2.dtb \
meson-gxbb-p200.dtb \
meson-gxbb-p201.dtb \
+ meson-gxbb-wetek-hub.dtb \
+ meson-gxbb-wetek-play2.dtb \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxl-s905w-jethome-jethub-j80.dtb \
diff --git a/arch/arm/dts/meson-gxbb-wetek-hub.dts
b/arch/arm/dts/meson-gxbb-wetek-hub.dts
new file mode 100644
index 00..58733017ed
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-wetek-hub.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Neil Armstrong
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb-wetek.dtsi"
+#include
+
+/ {
+ compatible = "wetek,hub", "amlogic,meson-gxbb";
+ model = "WeTek Hub";
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "WETEK-HUB";
+ assigned-clocks = < CLKID_MPLL0>,
+ < CLKID_MPLL1>,
+ < CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+ <270950400>,
+ <393216000>;
+ status = "okay";
+
+ dai-link-0 {
+ sound-dai = < AIU_CPU CPU_I2S_FIFO>;
+ };
+
+ dai-link-1 {
+ sound-dai = < AIU_CPU CPU_I2S_ENCODER>;
+ dai-format = "i2s";
+ mclk-fs = <256>;
+
+ codec-0 {
+ sound-dai = < AIU_HDMI CTRL_I2S>;
+ };
+ };
+
+ dai-link-2 {
+ sound-dai = < AIU_HDMI CTRL_OUT>;
+
+ codec-0 {
+ sound-dai = <_tx>;
+ };
+ };
+ };
+};
+
+ {
+ status = "okay";
+};
+
+ {
+ linux,rc-map-name = "rc-wetek-hub";
+};
diff --git a/arch/arm/dts/meson-gxbb-wetek-play2.dts
b/arch/arm/dts/meson-gxbb-wetek-play2.dts
new file mode 100644
index 00..505ffcd8eb
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-wetek-play2.dts
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Neil Armstrong
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb-wetek.dtsi"
+#include
+#include
+
+/ {
+ compatible = "wetek,play2", "amlogic,meson-gxbb";
+ model = "WeTek Play 2";
+
+ spdif_dit: audio-codec-0 {
+ #sound-dai-cells = <0>;
+ compatible = "linux,spdif-dit";
+ status = "okay";
+ sound-name-prefix = "DIT";
+ };
+
+ leds {
+ led-wifi {
+ label = "wetek-play:wifi-status";
+ gpios = < GPIODV_26 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+
+ led-ethernet {
+ label = "wetek-play:ethernet-status";
+ gpios = < GPIODV_27 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+
+ button {
+ label = "reset";
+ linux,code = ;
+ gpios = <_ao GPIOAO_3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ sound {
+ compatible = "amlogic,gx-sound-card";
+ model = "WETEK-PLAY2";
+ assigned-clocks = < CLKID_MPLL0>,
+ < CLKID_MPLL1>,
+ < CLKID_MPLL2>;
+ assigned-clock-parents = <0>, <0>, <0>;
+ assigned-clock-rates = <294912000>,
+
[PATCH 10/13] doc: boards: amlogic: add documentation for Radxa Zero2
Add build docs for the Radxa Zero2 board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS| 2 + doc/board/amlogic/index.rst | 1 + doc/board/amlogic/radxa-zero2.rst | 79 +++ 3 files changed, 82 insertions(+) create mode 100644 doc/board/amlogic/radxa-zero2.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 042b523056..117f79ea04 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -5,6 +5,8 @@ L: u-boot-amlo...@groups.io F: board/amlogic/w400/ F: configs/bananapi-cm4-cm4io_defconfig F: configs/bananapi-m2s_defconfig +F: configs/radxa-zero2_defconfig F: doc/board/amlogic/w400.rst F: doc/board/amlogic/bananapi-cm4io.rst F: doc/board/amlogic/bananapi-m2s.rst +F: doc/board/amlogic/radxa-zero2.rst diff --git a/doc/board/amlogic/index.rst b/doc/board/amlogic/index.rst index fa1b362731..71b7e1f3ed 100644 --- a/doc/board/amlogic/index.rst +++ b/doc/board/amlogic/index.rst @@ -112,6 +112,7 @@ Board Documentation p212 q200 radxa-zero + radxa-zero2 sei510 sei610 s400 diff --git a/doc/board/amlogic/radxa-zero2.rst b/doc/board/amlogic/radxa-zero2.rst new file mode 100644 index 00..3fb5d360e8 --- /dev/null +++ b/doc/board/amlogic/radxa-zero2.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for Radxa Zero2 (A311D) +== + +Radxa Zero2 is a small form factor SBC based on the Amlogic A311D chipset with the +following specification: + +- Amlogic A311D (Quad A73 + Dual A53) CPU +- 4GB LPDDR4 RAM +- 32/64/128GB eMMC +- Mali G52-MP4 GPU +- HDMI 2.1 output (micro) +- BCM4345 WiFi (2.4/5GHz a/b/g/n/ac) and BT 5.0 +- 1x USB 2.0 port - Type C (OTG) +- 1x USB 3.0 port - Type C (Host) +- 1x micro SD Card slot +- 40 Pin GPIO header + +Schematics are available on request from Radxa. + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make radxa-zero2_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh radxa-zero2 /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ git clone -b radxa-zero-v2021.07 https://github.com/radxa/u-boot.git +$ git clone https://github.com/radxa/fip.git + +$ sudo apt-get install -y gcc-aarch64-linux-gnu device-tree-compiler libncurses5 libncurses5-dev +$ sudo apt-get install -y bc python dosfstools flex build-essential libssl-dev mtools + +$ wget https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz +$ sudo tar xvf gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz -C /opt + +$ export CROSS_COMPILE=/opt/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin/aarch64-none-elf- +$ export ARCH=arm +$ cd u-boot +$ make radxa-zero2_defconfig +$ make + +$ cp u-boot.bin ../fip/radxa-zero2/bl33.bin +$ cd ../fip/radxa-zero2 +$ make + +This will generate the signed U-Boot binaries: + +.. code-block:: bash + +$ u-boot.bin u-boot.bin.sd.bin u-boot.bin.usb.bl2 u-boot.bin.usb.tpl + +Then write U-Boot to SD or eMMC with: + +.. code-block:: bash + +$ DEV=/dev/boot_device +$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 +$ dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=440 -- 2.34.1
[PATCH 09/13] boards: amlogic: add Radxa Zero2 defconfig
Add board configuration for the Radxa Zero2. Signed-off-by: Christian Hewitt --- configs/radxa-zero2_defconfig | 77 +++ 1 file changed, 77 insertions(+) create mode 100644 configs/radxa-zero2_defconfig diff --git a/configs/radxa-zero2_defconfig b/configs/radxa-zero2_defconfig new file mode 100644 index 00..2218b0db7d --- /dev/null +++ b/configs/radxa-zero2_defconfig @@ -0,0 +1,77 @@ +CONFIG_ARM=y +CONFIG_ARCH_MESON=y +CONFIG_TEXT_BASE=0x0100 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-radxa-zero2" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=2400 +CONFIG_IDENT_STRING=" radxa-zero2" +CONFIG_SYS_LOAD_ADDR=0x100 +CONFIG_DEBUG_UART=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 +CONFIG_REMAKE_ELF=y +CONFIG_OF_BOARD_SETUP=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y +CONFIG_SYS_MAXARGS=32 +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_MMC_MESON_GX=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +# CONFIG_PHY_REALTEK is not set +CONFIG_DM_MDIO=y +CONFIG_DM_MDIO_MUX=y +# CONFIG_ETH_DESIGNWARE_MESON8B is not set +CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y +CONFIG_VIDEO_BMP_RLE8=y +CONFIG_BMP_16BPP=y +CONFIG_BMP_24BPP=y +CONFIG_BMP_32BPP=y +CONFIG_OF_LIBFDT_OVERLAY=y -- 2.34.1
[PATCH 08/13] ARM: dts: add support for Radxa Zero2
Import the device-tree from linux-amlogic/for-next (Linux 6.4-rc1)
to support the Radxa-Zero2 board.
Signed-off-by: Christian Hewitt
---
arch/arm/dts/Makefile | 1 +
.../dts/meson-g12b-radxa-zero2-u-boot.dtsi| 7 +
arch/arm/dts/meson-g12b-radxa-zero2.dts | 489 ++
3 files changed, 497 insertions(+)
create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
create mode 100644 arch/arm/dts/meson-g12b-radxa-zero2.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index eb20524a99..42da335bb5 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -214,6 +214,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12b-odroid-n2.dtb \
meson-g12b-odroid-n2l.dtb \
meson-g12b-odroid-n2-plus.dtb \
+ meson-g12b-radxa-zero2.dtb \
meson-sm1-bananapi-m2-pro.dtb \
meson-sm1-bananapi-m5.dtb \
meson-sm1-khadas-vim3l.dtb \
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
new file mode 100644
index 00..236f2468dc
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-radxa-zero2-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS.
+ * Author: Neil Armstrong
+ */
+
+#include "meson-g12-common-u-boot.dtsi"
diff --git a/arch/arm/dts/meson-g12b-radxa-zero2.dts
b/arch/arm/dts/meson-g12b-radxa-zero2.dts
new file mode 100644
index 00..890f5bfebb
--- /dev/null
+++ b/arch/arm/dts/meson-g12b-radxa-zero2.dts
@@ -0,0 +1,489 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 BayLibre, SAS
+ * Author: Neil Armstrong
+ * Copyright (c) 2019 Christian Hewitt
+ * Copyright (c) 2022 Radxa Limited
+ * Author: Yuntian Zhang
+ */
+
+/dts-v1/;
+
+#include "meson-g12b-a311d.dtsi"
+#include
+#include
+#include
+#include
+
+/ {
+ compatible = "radxa,zero2", "amlogic,a311d", "amlogic,g12b";
+ model = "Radxa Zero2";
+
+ aliases {
+ serial0 = _AO;
+ serial2 = _A;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x8000>;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ poll-interval = <100>;
+ power-button {
+ label = "power";
+ linux,code = ;
+ gpios = <_ao GPIOAO_3 (GPIO_ACTIVE_LOW |
GPIO_PULL_UP)>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-green {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ gpios = < GPIOA_12 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_connector_in: endpoint {
+ remote-endpoint = <_tx_tmds_out>;
+ };
+ };
+ };
+
+ emmc_pwrseq: emmc-pwrseq {
+ compatible = "mmc-pwrseq-emmc";
+ reset-gpios = < BOOT_12 GPIO_ACTIVE_LOW>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = < GPIOX_6 GPIO_ACTIVE_LOW>;
+ clocks = <>;
+ clock-names = "ext_clock";
+ };
+
+ ao_5v: regulator-ao-5v {
+ compatible = "regulator-fixed";
+ regulator-name = "AO_5V";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ regulator-always-on;
+ };
+
+ vcc_1v8: regulator-vcc-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_3v3>;
+ regulator-always-on;
+ };
+
+ vcc_3v3: regulator-vcc-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_3V3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <_3v3>;
+ regulator-always-on;
+ /* FIXME: actually controlled by VDDCPU_B_EN */
+ };
+
+ vddao_1v8: regulator-vddao-1v8 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDIO_AO1V8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ vin-supply = <_3v3>;
+ regulator-always-on;
+ };
+
+ vddao_3v3:
[PATCH 07/13] docs: boards: amlogic: add documentation for BananaPi M2S
Add build docs for the BPI-M2S board. Signed-off-by: Christian Hewitt --- board/amlogic/w400/MAINTAINERS | 2 + doc/board/amlogic/bananapi-m2s.rst | 152 + doc/board/amlogic/index.rst| 1 + 3 files changed, 155 insertions(+) create mode 100644 doc/board/amlogic/bananapi-m2s.rst diff --git a/board/amlogic/w400/MAINTAINERS b/board/amlogic/w400/MAINTAINERS index 26a4c2c587..042b523056 100644 --- a/board/amlogic/w400/MAINTAINERS +++ b/board/amlogic/w400/MAINTAINERS @@ -4,5 +4,7 @@ S: Maintained L: u-boot-amlo...@groups.io F: board/amlogic/w400/ F: configs/bananapi-cm4-cm4io_defconfig +F: configs/bananapi-m2s_defconfig F: doc/board/amlogic/w400.rst F: doc/board/amlogic/bananapi-cm4io.rst +F: doc/board/amlogic/bananapi-m2s.rst diff --git a/doc/board/amlogic/bananapi-m2s.rst b/doc/board/amlogic/bananapi-m2s.rst new file mode 100644 index 00..265df1aea7 --- /dev/null +++ b/doc/board/amlogic/bananapi-m2s.rst @@ -0,0 +1,152 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +U-Boot for BananaPi M2S (A311D & S922X) +=== + +BananaPi BPI-M2S ships is a Single Board Computer manufactured by Sinovoip that ships in +two variants with Amlogic S922X or A311D SoC and the following common specification: + +- 16GB eMMC +- HDMI 2.1a video +- 2x 10/100/1000 Base-T Ethernet (1x RTL8211F, 1x RTL811H) +- 2x USB 2.0 ports +- 2x Status LED's (green/blue) +- 1x Power/Reset button +- 1x micro SD card slot +- 40-pin GPIO header +- PWM fan header +- UART header + +The S992X variant has: +- 2GB LPDDR4 RAM + +The A311D variant has: + +- 4GB LPDDR4 RAM +- NPU (5.0 TOPS) +- MIPI DSI header +- MIPI CSI header + +An optional RTL8822CS SDIO WiFi/BT mezzanine is available for both board variants. + +Schematics are available from the manufacturer: https://wiki.banana-pi.org/Banana_Pi_BPI-M2S + +U-Boot Compilation +-- + +.. code-block:: bash + +$ export CROSS_COMPILE=aarch64-none-elf- +$ make bananapi-m2s_defconfig +$ make + +U-Boot Signing with Pre-Built FIP repo +-- + +.. code-block:: bash +$ git clone https://github.com/LibreELEC/amlogic-boot-fip --depth=1 +$ cd amlogic-boot-fip +$ mkdir my-output-dir +$ ./build-fip.sh bananapi-m2s /path/to/u-boot/u-boot.bin my-output-dir + +U-Boot Manual Signing +- + +Amlogic does not provide sources for the firmware and tools needed to create a bootloader +image so it is necessary to obtain binaries from sources published by the board vendor: + +.. code-block:: bash + +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz +$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz +$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + +$ DIR=bananapi-m2s +$ git clone --depth 1 https://github.com/Dangku/amlogic-u-boot.git -b khadas-g12b-v2015.01-m2s $DIR + +$ cd $DIR +$ make bananapi_m2s_defconfig +$ make +$ export UBDIR=$PWD + +Go back to the mainline U-Boot source tree then: + +.. code-block:: bash + +$ mkdir fip + +$ wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/blx_fix_g12a.sh -O fip/blx_fix.sh +$ cp $UBDIR/build/scp_task/bl301.bin fip/ +$ cp $UBDIR/build/board/bananapi/bananpi_m2s/firmware/acs.bin fip/ +$ cp $UBDIR/fip/g12a/bl2.bin fip/ +$ cp $UBDIR/fip/g12a/bl30.bin fip/ +$ cp $UBDIR/fip/g12a/bl31.img fip/ +$ cp $UBDIR/fip/g12a/ddr3_1d.fw fip/ +$ cp $UBDIR/fip/g12a/ddr4_1d.fw fip/ +$ cp $UBDIR/fip/g12a/ddr4_2d.fw fip/ +$ cp $UBDIR/fip/g12a/diag_lpddr4.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr3_1d.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr4_1d.fw fip/ +$ cp $UBDIR/fip/g12a/lpddr4_2d.fw fip/ +$ cp $UBDIR/fip/g12a/piei.fw fip/ +$ cp $UBDIR/fip/g12a/aml_ddr.fw fip/ +$ cp u-boot.bin fip/bl33.bin + +$ sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + +$ sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + +$ $UBDIR/fip/g12b/aml_encrypt_g12b --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 +$ $UBDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl30_new.bin.g12a.enc \ +
