Re: [PATCH v2 01/10] arm: dts: introduce j784s4 dtbs from linux kernel
Hello Hari,
On 21/03/23 19:40, Hari Nagalla wrote:
> Introduce the basic j784s4 SoC dtbs from the linux kernel along with
> the new j784s4 specific pinmux definitions that we will use to generate
> the dtbs for the u-boot-spl and u-boot binaries.
>
> Signed-off-by: Apurva Nandan
> Signed-off-by: Hari Nagalla
> ---
> arch/arm/dts/k3-j784s4-evm.dts | 196 +
> arch/arm/dts/k3-j784s4-main.dtsi | 1007
> arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi | 311
> arch/arm/dts/k3-j784s4.dtsi| 287 +++
> include/dt-bindings/pinctrl/k3.h |3 +
> 5 files changed, 1804 insertions(+)
> create mode 100644 arch/arm/dts/k3-j784s4-evm.dts
> create mode 100644 arch/arm/dts/k3-j784s4-main.dtsi
> create mode 100644 arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
> create mode 100644 arch/arm/dts/k3-j784s4.dtsi
>
> diff --git a/arch/arm/dts/k3-j784s4-evm.dts b/arch/arm/dts/k3-j784s4-evm.dts
> new file mode 100644
> index 00..8cd4a7ecc1
> --- /dev/null
> +++ b/arch/arm/dts/k3-j784s4-evm.dts
> @@ -0,0 +1,196 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> + *
[...]
> +
> +_gpio0 {
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/k3-j784s4-main.dtsi
> b/arch/arm/dts/k3-j784s4-main.dtsi
> new file mode 100644
> index 00..7edf324ac1
> --- /dev/null
> +++ b/arch/arm/dts/k3-j784s4-main.dtsi
> @@ -0,0 +1,1007 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for J784S4 SoC Family Main Domain peripherals
> + *
> + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +_main {
> + msmc_ram: sram@7000 {
> + compatible = "mmio-sram";
> + reg = <0x00 0x7000 0x00 0x80>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x00 0x00 0x7000 0x80>;
> +
> + atf-sram@0 {
> + reg = <0x00 0x2>;
> + };
> +
> + tifs-sram@1f {
> + reg = <0x1f 0x1>;
> + };
> +
> + l3cache-sram@20 {
[...]
> +
> + main_navss: bus@3000 {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x00 0x3000 0x00 0x3000 0x00 0x0c40>;
The property: ti,sci-dev-id = <280>; is missing here.
Please refer:
https://lore.kernel.org/r/20230314152611.140969-2-j-choudh...@ti.com/
> + dma-coherent;
> + dma-ranges;
> +
> + main_navss_intr: interrupt-controller@310e {
> + compatible = "ti,sci-intr";
> + reg = <0x00 0x310e 0x00 0x4000>;
> + ti,intr-trigger-type = <4>;
> + interrupt-controller;
> + interrupt-parent = <>;
> + #interrupt-cells = <1>;
> + ti,sci = <>;
> + ti,sci-dev-id = <283>;
> + ti,interrupt-ranges = <0 64 64>,
> + <64 448 64>,
> + <128 672 64>;
> + };
> +
[...]
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> +};
> diff --git a/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
> b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
> new file mode 100644
> index 00..93952af618
> --- /dev/null
> +++ b/arch/arm/dts/k3-j784s4-mcu-wakeup.dtsi
> @@ -0,0 +1,311 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for J784S4 SoC Family MCU/WAKEUP Domain peripherals
> + *
> + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
> + */
> +
> +_mcu_wakeup {
> + sms: system-controller@44083000 {
> + compatible = "ti,k2g-sci";
> + ti,host-id = <12>;
> +
> + mbox-names = "rx", "tx";
> +
> + mboxes = <_proxy_main 11>,
> + <_proxy_main 13>;
> +
> + reg-names = "debug_messages";
> + reg = <0x00 0x44083000 0x00 0x1000>;
> +
> + k3_pds: power-controller {
[...]
> + interrupt-names = "int0", "int1";
> + bosch,mram-cfg = <0x00 128 64 64 64 64 32 32>;
> + status = "disabled";
> + };
> +
> + mcu_navss: bus@2838{
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges = <0x00 0x2838 0x00 0x2838 0x00 0x0388>;
The property ti,sci-dev-id = <323>; is missing here.
Please refer:
https://lore.kernel.org/r/20230314152611.140969-2-j-choudh...@ti.com/
> + dma-coherent;
> + dma-ranges;
> +
> + mcu_ringacc:
[PATCH V2 0/2] net: phy: Make phy_interface_is_sgmii|rgmii a switch statement
Originally reported by Tom[1], turned out to be that recent commit
75d28899e3e9 ("net: phy: Synchronize PHY interface modes with Linux")
reordered the enum definitions which in turn broke the range checks.
we are left with two options:
a) check against explicit values to help reuse as much as possible and
let compiler optimize where applicable
or
b) be very explicit in phy drivers and drop these helpers.
I have chosen to go with (a) approach.
Tested on am64x, though the dp83867 is used elsewhere as well.
Changes since v1:
* Change in switch handling (Thanks Marek for the suggestion)
V1: https://lore.kernel.org/all/20230413180713.2922524-1...@ti.com/
Nishanth Menon (2):
net: phy: Make phy_interface_is_sgmii a switch statement
net: phy: Make phy_interface_is_rgmii a switch statement
include/phy.h | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
--
2.40.0
[PATCH V2 1/2] net: phy: Make phy_interface_is_sgmii a switch statement
Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
with Linux") reordered the enum definitions. This caused the range of
enums that this api was checking to go bad.
While it is possible for the phy drivers to practically use the enum's
directly, drivers such as dp83867 use this helper to manage the
configuration of the phy correctly.
Reported-by: Tom Rini
Signed-off-by: Nishanth Menon
---
Changes Since v1:
* Switch update based on feedback from Marek
V1: https://lore.kernel.org/r/20230413180713.2922524-2...@ti.com
include/phy.h | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/phy.h b/include/phy.h
index a837fed72352..51dadcf14478 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -373,8 +373,15 @@ static inline bool phy_interface_is_rgmii(struct
phy_device *phydev)
*/
static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
{
- return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
- phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_QUSGMII:
+ case PHY_INTERFACE_MODE_USXGMII:
+ case PHY_INTERFACE_MODE_QSGMII:
+ return 1;
+ default:
+ return 0;
+ }
}
bool phy_interface_is_ncsi(void);
--
2.40.0
[PATCH V2 2/2] net: phy: Make phy_interface_is_rgmii a switch statement
Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
with Linux") reordered the enum definitions. This exposed a problem in
range checking functions to identify the interface type. Though this
specific api was'nt impacted (all the RGMII definitions remained within
range), this experience should be used to never to have to face this
kind of challenge again.
While it is possible for the phy drivers to practically use the enum's
directly, drivers such as dp83867, dp83869, marvell, micrel_ksz90x1 etc
use the same.
Reported-by: Tom Rini
Signed-off-by: Nishanth Menon
---
Changes since V1:
* Switch update based on feedback from Marek
V1: https://lore.kernel.org/r/20230413180713.2922524-3...@ti.com
include/phy.h | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/include/phy.h b/include/phy.h
index 51dadcf14478..600966bc8b20 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -361,8 +361,15 @@ int get_phy_id(struct mii_dev *bus, int addr, int devad,
u32 *phy_id);
*/
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
- return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
- phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ return 1;
+ default:
+ return 0;
+ }
}
/**
--
2.40.0
[PATCH v2 09/10] remoteproc: ti_k3_arm64: Change the startup of arm64 core
Configuring master firewalls require the power of the cluster to be
enabled before configuring them, change the load of rproc to configure
the gtc clocks and start the cluster along with configuring the boot
vector.
The start of rproc will only start the core.
Signed-off-by: Manorit Chawdhry
---
drivers/remoteproc/ti_k3_arm64_rproc.c | 62 +++---
1 file changed, 42 insertions(+), 20 deletions(-)
diff --git a/drivers/remoteproc/ti_k3_arm64_rproc.c
b/drivers/remoteproc/ti_k3_arm64_rproc.c
index 1f2415dc1a68..99f11000dfbf 100644
--- a/drivers/remoteproc/ti_k3_arm64_rproc.c
+++ b/drivers/remoteproc/ti_k3_arm64_rproc.c
@@ -36,6 +36,8 @@
* @gtc_base: Timer base address.
*/
struct k3_arm64_privdata {
+ bool has_cluster_node;
+ struct power_domain cluster_pwrdmn;
struct power_domain rproc_pwrdmn;
struct power_domain gtc_pwrdmn;
struct reset_ctl rproc_rst;
@@ -55,6 +57,7 @@ struct k3_arm64_privdata {
static int k3_arm64_load(struct udevice *dev, ulong addr, ulong size)
{
struct k3_arm64_privdata *rproc = dev_get_priv(dev);
+ ulong gtc_rate;
int ret;
dev_dbg(dev, "%s addr = 0x%lx, size = 0x%lx\n", __func__, addr, size);
@@ -64,26 +67,10 @@ static int k3_arm64_load(struct udevice *dev, ulong addr,
ulong size)
if (ret)
return ret;
- return ti_sci_proc_set_config(>tsp, addr, 0, 0);
-}
-
-/**
- * k3_arm64_start() - Start the remote processor
- * @dev: rproc device pointer
- *
- * Return: 0 if all went ok, else return appropriate error
- */
-static int k3_arm64_start(struct udevice *dev)
-{
- struct k3_arm64_privdata *rproc = dev_get_priv(dev);
- ulong gtc_rate;
- int ret;
-
- dev_dbg(dev, "%s\n", __func__);
-
ret = power_domain_on(>gtc_pwrdmn);
if (ret) {
- dev_err(dev, "power_domain_on() failed: %d\n", ret);
+ dev_err(dev, "power_domain_on(>gtc_pwrdmn) failed: %d\n",
+ ret);
return ret;
}
@@ -100,9 +87,36 @@ static int k3_arm64_start(struct udevice *dev)
* assigned-clock-rates during the device probe. So no need to
* set the frequency again here.
*/
+ if (rproc->has_cluster_node) {
+ ret = power_domain_on(>cluster_pwrdmn);
+ if (ret) {
+ dev_err(dev,
+ "power_domain_on(>cluster_pwrdmn)
failed: %d\n",
+ ret);
+ return ret;
+ }
+ }
+
+ return ti_sci_proc_set_config(>tsp, addr, 0, 0);
+}
+
+/**
+ * k3_arm64_start() - Start the remote processor
+ * @dev: rproc device pointer
+ *
+ * Return: 0 if all went ok, else return appropriate error
+ */
+static int k3_arm64_start(struct udevice *dev)
+{
+ struct k3_arm64_privdata *rproc = dev_get_priv(dev);
+ int ret;
+
+ dev_dbg(dev, "%s\n", __func__);
ret = power_domain_on(>rproc_pwrdmn);
if (ret) {
- dev_err(dev, "power_domain_on() failed: %d\n", ret);
+ dev_err(dev,
+ "power_domain_on(>rproc_pwrdmn) failed: %d\n",
+ ret);
return ret;
}
@@ -166,9 +180,17 @@ static int k3_arm64_of_to_priv(struct udevice *dev,
dev_dbg(dev, "%s\n", __func__);
+ /* Cluster needs to be powered on if firewalls are being configured */
+ rproc->has_cluster_node = true;
+ ret = power_domain_get_by_index(dev, >cluster_pwrdmn, 2);
+ if (ret) {
+ dev_dbg(dev, "warning: power_domain_get_cluster() failed:
%d\n", ret);
+ rproc->has_cluster_node = false;
+ }
+
ret = power_domain_get_by_index(dev, >rproc_pwrdmn, 1);
if (ret) {
- dev_err(dev, "power_domain_get() failed: %d\n", ret);
+ dev_err(dev, "power_domain_get_rproc() failed: %d\n", ret);
return ret;
}
--
2.34.1
[PATCH v2 10/10] arm: mach-k3: common: re-locate authentication for atf/optee
For setting up the master firewalls present in the K3 SoCs, the arm64
clusters need to be powered on.
Re-locates the code for atf/optee authentication.
Signed-off-by: Manorit Chawdhry
---
arch/arm/mach-k3/common.c | 35 +--
1 file changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index a2adb791f6c0..6a2ba21c4794 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -227,6 +227,31 @@ void __noreturn jump_to_image_no_args(struct
spl_image_info *spl_image)
if (ret)
panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
+#if (CONFIG_IS_ENABLED(FIT_IMAGE_POST_PROCESS) &&
IS_ENABLED(CONFIG_SYS_K3_SPL_ATF))
+ /* Authenticate ATF */
+ void *image_addr = (void *)fit_image_info[IMAGE_ID_ATF].image_start;
+
+ debug("%s: Authenticating image: addr=%lx, size=%ld, os=%s\n", __func__,
+ fit_image_info[IMAGE_ID_ATF].image_start,
+ fit_image_info[IMAGE_ID_ATF].image_len,
+ image_os_match[IMAGE_ID_ATF]);
+
+ ti_secure_image_post_process(_addr,
+(size_t
*)_image_info[IMAGE_ID_ATF].image_len);
+
+ /* Authenticate OPTEE */
+ image_addr = (void *)fit_image_info[IMAGE_ID_OPTEE].image_start;
+
+ debug("%s: Authenticating image: addr=%lx, size=%ld, os=%s\n", __func__,
+ fit_image_info[IMAGE_ID_OPTEE].image_start,
+ fit_image_info[IMAGE_ID_OPTEE].image_len,
+ image_os_match[IMAGE_ID_OPTEE]);
+
+ ti_secure_image_post_process(_addr,
+(size_t
*)_image_info[IMAGE_ID_OPTEE].image_len);
+
+#endif
+
if (!fit_image_info[IMAGE_ID_DM_FW].image_len &&
!(size > 0 && valid_elf_image(loadaddr))) {
shut_cpu = 1;
@@ -288,9 +313,15 @@ void board_fit_image_post_process(const void *fit, int
node, void **p_image,
break;
}
}
+ /*
+* Only DM and the DTBs are being authenticated here,
+* rest will be authenticated when A72 cluster is up
+*/
+ if ((i != IMAGE_ID_ATF) && (i != IMAGE_ID_OPTEE))
#endif
-
- ti_secure_image_post_process(p_image, p_size);
+ {
+ ti_secure_image_post_process(p_image, p_size);
+ }
}
#endif
--
2.34.1
[PATCH v2 08/10] arm: dts: k3-am625-r5-sk: add a53 cluster power
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-am625-r5-sk.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts index dad46704a2d8..78df7cec3f90 100644 --- a/arch/arm/dts/k3-am625-r5-sk.dts +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -47,7 +47,8 @@ compatible = "ti,am654-rproc"; reg = <0x00 0x00a9 0x00 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 135 TI_SCI_PD_EXCLUSIVE>; + <_pds 135 TI_SCI_PD_EXCLUSIVE>, + <_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 135 0>; clocks = <_clks 61 0>; assigned-clocks = <_clks 61 0>, <_clks 135 0>; -- 2.34.1
[PATCH v2 06/10] arm: dts: k3-am642-r5: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-am642-r5-evm.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-am642-r5-evm.dts b/arch/arm/dts/k3-am642-r5-evm.dts index ca5ce4a35a5c..e870492a690c 100644 --- a/arch/arm/dts/k3-am642-r5-evm.dts +++ b/arch/arm/dts/k3-am642-r5-evm.dts @@ -32,7 +32,8 @@ compatible = "ti,am654-rproc"; reg = <0x00 0x00a9 0x00 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 135 TI_SCI_PD_EXCLUSIVE>; + <_pds 135 TI_SCI_PD_EXCLUSIVE>, + <_pds 137 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 135 0>; clocks = <_clks 61 0>; assigned-clocks = <_clks 61 0>, <_clks 135 0>; -- 2.34.1
[PATCH v2 07/10] arm: dts: k3-am62a7-r5-sk: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-am62a7-r5-sk.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-am62a7-r5-sk.dts b/arch/arm/dts/k3-am62a7-r5-sk.dts index c953a82c7a5e..cc4b179e27f3 100644 --- a/arch/arm/dts/k3-am62a7-r5-sk.dts +++ b/arch/arm/dts/k3-am62a7-r5-sk.dts @@ -47,7 +47,8 @@ compatible = "ti,am654-rproc"; reg = <0x00 0x00a9 0x00 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 135 TI_SCI_PD_EXCLUSIVE>; + <_pds 135 TI_SCI_PD_EXCLUSIVE>, + <_pds 166 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 135 0>; clocks = <_clks 61 0>; assigned-clocks = <_clks 61 0>, <_clks 135 0>; -- 2.34.1
[PATCH v2 05/10] arm: dts: k3-am642-r5-sk: add a53 cluster power domain node
adds a53 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-am642-r5-sk.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts index 9ff4dd3dd365..32d4c317284f 100644 --- a/arch/arm/dts/k3-am642-r5-sk.dts +++ b/arch/arm/dts/k3-am642-r5-sk.dts @@ -34,7 +34,8 @@ compatible = "ti,am654-rproc"; reg = <0x00 0x00a9 0x00 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 135 TI_SCI_PD_EXCLUSIVE>; + <_pds 135 TI_SCI_PD_EXCLUSIVE>, + <_pds 137 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 135 0>; clocks = <_clks 61 0>; assigned-clocks = <_clks 61 0>, <_clks 135 0>; -- 2.34.1
[PATCH v2 04/10] arm: dts: k3-j7200-r5: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts index 55ad6153dd6f..e62f9218e830 100644 --- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts @@ -30,7 +30,8 @@ compatible = "ti,am654-rproc"; reg = <0x0 0x00a9 0x0 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 202 TI_SCI_PD_EXCLUSIVE>; + <_pds 202 TI_SCI_PD_EXCLUSIVE>, + <_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 202 0>; clocks = <_clks 61 1>; assigned-clocks = <_clks 202 2>, <_clks 61 1>; -- 2.34.1
[PATCH v2 03/10] arm: dts: k3-j721e-r5: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index e9e50538cb59..1b40cf258080 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -25,7 +25,8 @@ compatible = "ti,am654-rproc"; reg = <0x0 0x00a9 0x0 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 202 TI_SCI_PD_EXCLUSIVE>; + <_pds 202 TI_SCI_PD_EXCLUSIVE>, + <_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 202 0>; clocks = <_clks 61 1>; assigned-clocks = <_clks 202 2>, <_clks 61 1>; -- 2.34.1
[PATCH v2 02/10] arm: dts: k3-j721e-r5-sk: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-j721e-r5-sk.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-j721e-r5-sk.dts b/arch/arm/dts/k3-j721e-r5-sk.dts index 8d6eaa4fbbe4..6986292e37cd 100644 --- a/arch/arm/dts/k3-j721e-r5-sk.dts +++ b/arch/arm/dts/k3-j721e-r5-sk.dts @@ -159,7 +159,8 @@ compatible = "ti,am654-rproc"; reg = <0x0 0x00a9 0x0 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 202 TI_SCI_PD_EXCLUSIVE>; + <_pds 202 TI_SCI_PD_EXCLUSIVE>, + <_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 202 0>; clocks = <_clks 61 1>; assigned-clocks = <_clks 202 2>, <_clks 61 1>; -- 2.34.1
[PATCH v2 00/10] k3: power control support for arm clusters
The series changes the flow on how the arm64 core boots up and allows cluster level control on the power domains to hold the processor in reset during rproc_load. Cc: u-boot@lists.denx.de To: Tom Rini Cc: Andrew Davis Cc: Vignesh Raghavendra Cc: "Kamlesh Gurudasani" Signed-off-by: Manorit Chawdhry --- Changes in v2: - remove the for loop - changed the if condition to #if that caused build failure - change the if condition to explicitely check for atf or optee - Link to v1: https://lore.kernel.org/r/20230411-upstream-firewalling-v1-0-44771ffee...@ti.com --- Manorit Chawdhry (10): arm: dts: k3-j721s2-r5: add a72 cluster power domain node arm: dts: k3-j721e-r5-sk: add a72 cluster power domain node arm: dts: k3-j721e-r5: add a72 cluster power domain node arm: dts: k3-j7200-r5: add a72 cluster power domain node arm: dts: k3-am642-r5-sk: add a53 cluster power domain node arm: dts: k3-am642-r5: add a53 cluster power domain node arm: dts: k3-am62a7-r5-sk: add a53 cluster power domain node arm: dts: k3-am625-r5-sk: add a53 cluster power remoteproc: ti_k3_arm64: Change the startup of arm64 core arm: mach-k3: common: re-locate authentication for atf/optee arch/arm/dts/k3-am625-r5-sk.dts | 3 +- arch/arm/dts/k3-am62a7-r5-sk.dts| 3 +- arch/arm/dts/k3-am642-r5-evm.dts| 3 +- arch/arm/dts/k3-am642-r5-sk.dts | 3 +- arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 3 +- arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 3 +- arch/arm/dts/k3-j721e-r5-sk.dts | 3 +- arch/arm/dts/k3-j721s2-r5-common-proc-board.dts | 3 +- arch/arm/mach-k3/common.c | 35 +- drivers/remoteproc/ti_k3_arm64_rproc.c | 62 + 10 files changed, 91 insertions(+), 30 deletions(-) --- base-commit: a25dcda452bf6a6de72764a8d990d72e5def643d change-id: 20230411-upstream-firewalling-864368fe7fe2 Best regards, -- Manorit Chawdhry
[PATCH v2 01/10] arm: dts: k3-j721s2-r5: add a72 cluster power domain node
adds a72 cluster to control from the rproc driver Signed-off-by: Manorit Chawdhry --- arch/arm/dts/k3-j721s2-r5-common-proc-board.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts index bc617022c184..e02b334d10eb 100644 --- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts @@ -30,7 +30,8 @@ compatible = "ti,am654-rproc"; reg = <0x0 0x00a9 0x0 0x10>; power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>, - <_pds 202 TI_SCI_PD_EXCLUSIVE>; + <_pds 202 TI_SCI_PD_EXCLUSIVE>, + <_pds 4 TI_SCI_PD_EXCLUSIVE>; resets = <_reset 202 0>; clocks = <_clks 61 1>; assigned-clocks = <_clks 61 1>, <_clks 202 0>; -- 2.34.1
Re: [PATCH u-boot 0/3] pci: mpc85xx: Fixes for PCI config space
Hello Pali, On 13.04.23 22:41, Pali Rohár wrote: > This patch series contains small fixes for mpc85xx old PCI Local Bus driver. > > Heiko: Are you able to test these changes? Has your Socrates board > available old PCI Local Bus support? > > Pali Rohár (3): > pci: mpc85xx: Add missing sync() after writing to PCI config space > pci: mpc85xx: Allow 8/16-bit access to PCI config space > pci: mpc85xx: Do not try to access extended PCIe registers > > drivers/pci/pci_mpc85xx.c | 39 +++ > 1 file changed, 35 insertions(+), 4 deletions(-) I have to look, try your patches soon, thanks! bye, Heiko -- DENX Software Engineering GmbH, Managing Director: Erika Unter HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
Re: [PATCH 1/2] net: phy: Make phy_interface_is_sgmii a switch statement
On 23:22-20230413, Marek Behún wrote:
> On Thu, Apr 13, 2023 at 02:02:34PM -0500, Nishanth Menon wrote:
> > On 20:56-20230413, Marek Behún wrote:
> > > On Thu, Apr 13, 2023 at 01:07:12PM -0500, Nishanth Menon wrote:
> > > > Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
> > > > with Linux") reordered the enum definitions. This caused the range of
> > > > enums that this api was checking to go bad.
> > > >
> > > > While it is possible for the phy drivers to practically use the enum's
> > > > directly, drivers such as dp83867 use this helper to manage the
> > > > configuration of the phy correctly.
> > > >
> > > > Reported-by: Tom Rini
> > > > Signed-off-by: Nishanth Menon
> > > > ---
> > > > include/phy.h | 12 ++--
> > > > 1 file changed, 10 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/include/phy.h b/include/phy.h
> > > > index a837fed72352..1c4dc23bc5ba 100644
> > > > --- a/include/phy.h
> > > > +++ b/include/phy.h
> > > > @@ -373,8 +373,16 @@ static inline bool phy_interface_is_rgmii(struct
> > > > phy_device *phydev)
> > > > */
> > > > static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
> > > > {
> > > > - return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
> > > > - phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
> > > > + switch (phydev->interface) {
> > > > + case PHY_INTERFACE_MODE_SGMII:
> > > > + case PHY_INTERFACE_MODE_QUSGMII:
> > > > + case PHY_INTERFACE_MODE_USXGMII:
> > > > + case PHY_INTERFACE_MODE_QSGMII:
> > > > + return 1;
> > > > + default:
> > > > + fallthrough;
> > >
> > > Why not just put the return 0; statement here instead of fallthrough and
> > > drop it from after the switch statement?
> >
> > Just dropping the default also will work, though it does leave something
> > un-handled. handling the default on the other hand allows for additional
> > code (meh?) to be added in default.. But really what? I'd rather drop
> > the default and fall through to save on a couple of lines.. if that
> > is'nt creating confusion..
>
> You can't drop the default if you use a switch statement and not
> enumerating all enumerator entries.
>
> So you either have to use
>
> switch (x) {
> case A:
> return 1;
> case B:
> return 2;
> default:
> return 3;
> }
>
> or
>
> switch (x) {
> case A:
> return 1;
> case B:
> return 2;
> default:
> break; /* or fallthourgh */
> }
> return 3;
>
> The first one is shorter one line. It is also used in this way already.
>
> IMO it makes more sense.
>
> But keep in mind, this is just a nit-pick. I don't actually care that
> much. I just think it makes more sense this way. If all possibilities
> are handled by return statements inside the switch, you don't need to
> have another return in top level of the function.
Sigh, remnants of a few years of misra misery :( - yep, dropping..
new rev incoming..
>
> Look for example at Linux' include/linux/phy.h function phy_modes():
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/phy.h?h=v6.3-rc6#n216
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5
849D 1736 249D
Re: [PATCH v2 u-boot-mvebu 4/4] arm: mvebu: clearfog: Update eMMC/SD/SATA instructions
On Thu, 13 Apr 2023 at 20:58, Pali Rohár wrote: > > BootROM and neither SPL does not use eMMC boot acknowledgement or boot > enable bits in EXT_CSD_PART_CONF eMMC register. And also fixed SATA disk > sector 0x141 is not used at all. > > Signed-off-by: Pali Rohár SPL successfully loads u-boot from the same partition as SPL. SD card and UART continue to boot. Thanks Pali! Tested-by: Martin Rowe > --- > board/solidrun/clearfog/README | 20 ++-- > 1 file changed, 10 insertions(+), 10 deletions(-) > > diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README > index ed4a712c5aa2..c86b37061a30 100644 > --- a/board/solidrun/clearfog/README > +++ b/board/solidrun/clearfog/README > @@ -1,7 +1,7 @@ > Update from original Marvell U-Boot to mainline U-Boot: > --- > > -Generate the U-Boot image with these commands: > +Generate the U-Boot image for eMMC/SD with these commands: > > $ make clearfog_defconfig > $ make > @@ -9,7 +9,7 @@ $ make > The resulting image including the SPL binary with the > full DDR setup is "u-boot-with-spl.kwb". > > -Now all you need to do is copy this image on a SD card. > +Now all you need to do is copy this image on a SD card's sector 1. > For example with this command: > > $ sudo dd if=u-boot-with-spl.kwb of=/dev/sdX bs=512 seek=1 > @@ -20,12 +20,6 @@ of "/dev/sdX" here! > Install U-Boot on eMMC: > --- > > -To make SPL load the main U-Boot image from the eMMC boot partition enable > -eMMC boot acknowledgement and boot partition with the following U-Boot > -command: > - > - mmc partconf 0 1 1 0 > - > Install U-Boot on eMMC boot partition from Linux running on Clearfog: > >echo 0 > /sys/block/mmcblk0boot0/force_ro > @@ -37,8 +31,14 @@ Consider initial boot from UART (see below). > Install U-Boot on SATA: > --- > > -When loading the main U-Boot image from raw SATA sector, set > -CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR to 0x141. > +Generate the U-Boot image for SATA with these commands: > + > +$ make clearfog_sata_defconfig > +$ make > + > +Copy image on a SATA disk's sector 1: > + > +$ sudo dd if=u-boot-with-spl.kwb of=/dev/sdX bs=512 seek=1 > > Boot selection: > --- > -- > 2.20.1 >
Re: [RESEND PATCH v2] netconsole: various improvements
Hi Ramon,
Hi Joe,
Any comments on this patch?
Thanks,
Tony
On Mon, Apr 3, 2023 at 2:42 PM Tony Dinh wrote:
>
> Use CONFIG_CONSOLE_MUX for netconsole. When netconsole is running,
> stdin/stdout/stder must be set to some primary console, in addtion to nc.
> For example, stdin=serial,nc. Some recent Linux kernels will not boot with
> only nc on the stdout list, ie. stdout=nc. When netconsole exits, remove
> nc from the list of devices in stdin/stdout/stderr.
>
> Signed-off-by: Tony Dinh
> ---
>
> Changes in v2:
> - Select CONFIG_CONSOLE_MUX if CONFIG_NETCONSOLE is enabled
> - Add new functions in netconsole driver to support CONSOLE_MUX
> - Add new function to encapsulate the process of stopping netconsole
> from bootm
> - Remove unecessary net_timeout initial value = 1
> - Resend to correct missing include in bootm.c
>
> boot/bootm.c | 14 +++---
> drivers/net/Kconfig | 10 +++
> drivers/net/netconsole.c | 60
> include/stdio_dev.h | 1 +
> 4 files changed, 81 insertions(+), 4 deletions(-)
>
> diff --git a/boot/bootm.c b/boot/bootm.c
> index 2eec60ec7b..1b2542b570 100644
> --- a/boot/bootm.c
> +++ b/boot/bootm.c
> @@ -18,6 +18,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -472,11 +473,16 @@ ulong bootm_disable_interrupts(void)
> * recover from any failures any more...
> */
> iflag = disable_interrupts();
> -#ifdef CONFIG_NETCONSOLE
> - /* Stop the ethernet stack if NetConsole could have left it up */
> - eth_halt();
> -#endif
>
> + if (IS_ENABLED(CONFIG_NETCONSOLE)) {
> + /*
> +* Make sure that the starting kernel message printed out,
> +* stop netconsole and the ethernet stack
> +*/
> + printf("\n\nStarting kernel ...\n\n");
> + drv_nc_stop();
> + eth_halt();
> + }
> #if defined(CONFIG_CMD_USB)
> /*
> * turn off USB to prevent the host controller from writing to the
> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> index ceadee98a1..0661059dfa 100644
> --- a/drivers/net/Kconfig
> +++ b/drivers/net/Kconfig
> @@ -945,4 +945,14 @@ config MDIO_MUX_MESON_G12A
> This driver is used for the MDIO mux found on the Amlogic G12A &
> compatible
> SoCs.
>
> +config NETCONSOLE
> + bool "Enable netconsole"
> + select CONSOLE_MUX
> + help
> + NetConsole requires CONSOLE_MUX, i.e. at least one default console
> such
> + must be specified in addition to nc console. For example, for
> boards that
> + the main console is serial, set each of the envs
> stdin/stdout/stderr to serial,nc.
> + See CONFIG_CONSOLE_MUX and CONFIG_SYS_CONSOLE_IS_IN_ENV help for
> detailed
> + description of usage.
> +
> endif # NETDEVICES
> diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
> index 151bc55e07..bb92d2e130 100644
> --- a/drivers/net/netconsole.c
> +++ b/drivers/net/netconsole.c
> @@ -7,6 +7,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -33,6 +34,12 @@ static int output_packet_len;
> */
> enum proto_t net_loop_last_protocol = BOOTP;
>
> +/*
> + * Net console helpers
> + */
> +static void usage(void);
> +static void remove_nc_from(const int console);
> +
> static void nc_wait_arp_handler(uchar *pkt, unsigned dest,
> struct in_addr sip, unsigned src,
> unsigned len)
> @@ -111,6 +118,21 @@ static int refresh_settings_from_env(void)
> return 0;
> }
>
> +static void remove_nc_from(const int console)
> +{
> + int ret;
> +
> + ret = iomux_replace_device(console, "nc", "nulldev");
> + if (ret) {
> + printf("\n*** Warning: Cannot remove nc from %s Error=%d\n",
> + stdio_names[console], ret);
> + printf("%s=", stdio_names[console]);
> + iomux_printdevs(console);
> + usage();
> + flush();
> + }
> +}
> +
> /**
> * Called from net_loop in net/net.c before each packet
> */
> @@ -241,6 +263,29 @@ static int nc_stdio_start(struct stdio_dev *dev)
> return 0;
> }
>
> +void nc_stdio_stop(void)
> +{
> + if (IS_ENABLED(CONFIG_CONSOLE_MUX)) {
> + int ret;
> + struct stdio_dev *sdev;
> +
> + /* Remove nc from each stdio file */
> + remove_nc_from(stdin);
> + remove_nc_from(stderr);
> + remove_nc_from(stdout);
> +
> + /* Deregister nc device */
> + sdev = stdio_get_by_name("nc");
> + ret = stdio_deregister_dev(sdev, true);
> + if (ret)
> + printf("\nWarning: Cannot deregister nc console
> Error=%d\n", ret);
> + } else {
> +
Re: [PATCH 1/2] net: phy: Make phy_interface_is_sgmii a switch statement
On Thu, Apr 13, 2023 at 02:02:34PM -0500, Nishanth Menon wrote:
> On 20:56-20230413, Marek Behún wrote:
> > On Thu, Apr 13, 2023 at 01:07:12PM -0500, Nishanth Menon wrote:
> > > Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
> > > with Linux") reordered the enum definitions. This caused the range of
> > > enums that this api was checking to go bad.
> > >
> > > While it is possible for the phy drivers to practically use the enum's
> > > directly, drivers such as dp83867 use this helper to manage the
> > > configuration of the phy correctly.
> > >
> > > Reported-by: Tom Rini
> > > Signed-off-by: Nishanth Menon
> > > ---
> > > include/phy.h | 12 ++--
> > > 1 file changed, 10 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/include/phy.h b/include/phy.h
> > > index a837fed72352..1c4dc23bc5ba 100644
> > > --- a/include/phy.h
> > > +++ b/include/phy.h
> > > @@ -373,8 +373,16 @@ static inline bool phy_interface_is_rgmii(struct
> > > phy_device *phydev)
> > > */
> > > static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
> > > {
> > > - return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
> > > - phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
> > > + switch (phydev->interface) {
> > > + case PHY_INTERFACE_MODE_SGMII:
> > > + case PHY_INTERFACE_MODE_QUSGMII:
> > > + case PHY_INTERFACE_MODE_USXGMII:
> > > + case PHY_INTERFACE_MODE_QSGMII:
> > > + return 1;
> > > + default:
> > > + fallthrough;
> >
> > Why not just put the return 0; statement here instead of fallthrough and
> > drop it from after the switch statement?
>
> Just dropping the default also will work, though it does leave something
> un-handled. handling the default on the other hand allows for additional
> code (meh?) to be added in default.. But really what? I'd rather drop
> the default and fall through to save on a couple of lines.. if that
> is'nt creating confusion..
You can't drop the default if you use a switch statement and not
enumerating all enumerator entries.
So you either have to use
switch (x) {
case A:
return 1;
case B:
return 2;
default:
return 3;
}
or
switch (x) {
case A:
return 1;
case B:
return 2;
default:
break; /* or fallthourgh */
}
return 3;
The first one is shorter one line. It is also used in this way already.
IMO it makes more sense.
But keep in mind, this is just a nit-pick. I don't actually care that
much. I just think it makes more sense this way. If all possibilities
are handled by return statements inside the switch, you don't need to
have another return in top level of the function.
Look for example at Linux' include/linux/phy.h function phy_modes():
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/phy.h?h=v6.3-rc6#n216
Marek
>
> > > + }
> > > + return 0;
> > > }
>
> --
> Regards,
> Nishanth Menon
> Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5
> 849D 1736 249D
[PATCH u-boot 4/4] board: purism: Use U-Boot mmc function for converting boot part to part access
eMMC Boot Partition Enable bits in mmc->part_config (EXT_CSD[179]) has
different coding than eMMC Partition Access bits.
Use spl_mmc_emmc_boot_partition() function which does this conversion
properly (hopefully).
Signed-off-by: Pali Rohár
---
board/purism/librem5/librem5.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/board/purism/librem5/librem5.c b/board/purism/librem5/librem5.c
index 386ed1b4fb22..36ecac9d9ed0 100644
--- a/board/purism/librem5/librem5.c
+++ b/board/purism/librem5/librem5.c
@@ -41,11 +41,7 @@ int board_early_init_f(void)
#if IS_ENABLED(CONFIG_LOAD_ENV_FROM_MMC_BOOT_PARTITION)
uint board_mmc_get_env_part(struct mmc *mmc)
{
- uint part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
-
- if (part == 7)
- part = 0;
- return part;
+ return spl_mmc_emmc_boot_partition(mmc);
}
#endif
--
2.20.1
[PATCH u-boot 3/4] sunxi: eMMC: Add comments explaining mapping between bootpart and mmc_switch_part()
Mapping between bootpart taken from EXT_CSD_EXTRACT_BOOT_PART() and Partition Access bits used by the mmc_switch_part() function may be quite misleading. So add extended comment describing why in sunxi case is this mapping just a simple identity. Because in generic case this mapping requires non-trivial mapping table. Signed-off-by: Pali Rohár --- arch/arm/mach-sunxi/board.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 391a65a5495f..73519f6262ec 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -381,7 +381,17 @@ static bool sunxi_valid_emmc_boot(struct mmc *mmc) (mmc->ext_csd[EXT_CSD_BOOT_BUS_WIDTH] & 0x1b) != 0x09) return false; - /* Partition 0 is the user data partition, bootpart must be 1 or 2. */ + /* +* bootpart == 0 means that eMMC booting is disabled. +* bootpart == 1 or 2 means to boot from Boot Partition 1 or 2. +* bootpart == 7 means to boot from User Area. +* Other bootpart values are reserved. +* mmc_switch_part() takes partition access value which is: +* 0 for User Area; 1-2 for Boot Partition 1-2; 3 for RPMB; 4-7 for GP 1-4. +* We allow booting only from Boot Partition 1 or 2 so +* bootpart mapping between EXT_CSD_EXTRACT_BOOT_PART() +* and mmc_switch_part() is straightforward identity. +*/ if (bootpart != 1 && bootpart != 2) return false; -- 2.20.1
[PATCH u-boot 2/4] cmd: mvebu/bubt: Validate EXT_CSD[179] eMMC register in mmc_burn_image()
When determining eMMC boot partition for a bootloader, validate that
EXT_CSD[179] eMMC register is set to recognized value.
This prevent situation that EXT_CSD[179] Boot Enable value is improperly
parsed and passed into EXT_CSD[179] Partition Access.
Signed-off-by: Pali Rohár
---
cmd/mvebu/bubt.c | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/cmd/mvebu/bubt.c b/cmd/mvebu/bubt.c
index ca24a5c1c4ba..b8fe7c7a1461 100644
--- a/cmd/mvebu/bubt.c
+++ b/cmd/mvebu/bubt.c
@@ -223,9 +223,29 @@ static int mmc_burn_image(size_t image_size)
orig_part = mmc->block_dev.hwpart;
#endif
- part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
- if (part == 7)
+ if (mmc->part_config == MMCPART_NOAVAILABLE) {
part = 0;
+ } else {
+ switch (EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)) {
+ case 0: /* Booting from this eMMC device is disabled */
+ printf("Error - Booting from this eMMC device is
disabled\n");
+ printf("Hint: Use 'mmc partconf' command to choose boot
partition\n");
+ return -ENODEV;
+ case 1: /* Boot partition 1 is used for booting */
+ part = 1;
+ break;
+ case 2: /* Boot partition 2 is used for booting */
+ part = 2;
+ break;
+ case 7: /* User area is used for booting */
+ part = 0;
+ break;
+ default: /* Other values are reserved / unsupported */
+ printf("Error - This eMMC device has configured
Reserved boot option\n");
+ printf("Hint: Use 'mmc partconf' command to choose boot
partition\n");
+ return -ENODEV;
+ }
+ }
#ifdef CONFIG_BLK
err = blk_dselect_hwpart(blk_desc, part);
--
2.20.1
[PATCH u-boot 1/4] mmc: spl: Make partition choice in default_spl_mmc_emmc_boot_partition() more explicit
To make eMMC partition choosing in default_spl_mmc_emmc_boot_partition()
function better understandable, rewrite it via explicit switch-case code
pattern.
Also add a warning when eMMC EXT_CSD[179] register is configured by user to
value which is not suitable for eMMC booting and SPL do not know how to
interpret it.
Note that when booting from eMMC device via EXT_CSD[179] register is
explicitly disabled then SPL still loads and boots from this eMMC device
from User Area partition. This behavior was not changed in this commit and
should be revisited in the future.
Signed-off-by: Pali Rohár
---
This patch depends on another patch:
mmc: spl: Add comments for default_spl_mmc_emmc_boot_partition()
https://patchwork.ozlabs.org/project/uboot/patch/20230404202805.8523-1-p...@kernel.org/
---
common/spl/spl_mmc.c | 38 ++
1 file changed, 30 insertions(+), 8 deletions(-)
diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c
index 2426500dbcb9..df20a75efc29 100644
--- a/common/spl/spl_mmc.c
+++ b/common/spl/spl_mmc.c
@@ -408,15 +408,37 @@ int default_spl_mmc_emmc_boot_partition(struct mmc *mmc)
*
* Note: See difference between EXT_CSD_EXTRACT_PARTITION_ACCESS
* and EXT_CSD_EXTRACT_BOOT_PART, specially about User area value.
-*
-* FIXME: When booting from this eMMC device is explicitly
-* disabled then we use User area for booting. This is incorrect.
-* Probably we should skip this eMMC device and select the next
-* one for booting. Or at least throw warning about this fallback.
*/
- part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
- if (part == 7)
- part = 0;
+ if (mmc->part_config == MMCPART_NOAVAILABLE)
+ part = 0; /* If partitions are not supported then we have only
User Area partition */
+ else {
+ switch(EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config)) {
+ case 0: /* Booting from this eMMC device is disabled */
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ puts("spl: WARNING: Booting from this eMMC device is
disabled in EXT_CSD[179] register\n");
+ puts("spl: WARNING: Continuing anyway and selecting
User Area partition for booting\n");
+#endif
+ /* FIXME: This is incorrect and probably we should
select next eMMC device for booting */
+ part = 0;
+ break;
+ case 1: /* Boot partition 1 is used for booting */
+ part = 1;
+ break;
+ case 2: /* Boot partition 2 is used for booting */
+ part = 2;
+ break;
+ case 7: /* User area is used for booting */
+ part = 0;
+ break;
+ default: /* Other values are reserved */
+#ifdef CONFIG_SPL_LIBCOMMON_SUPPORT
+ puts("spl: WARNING: EXT_CSD[179] register is configured
to boot from Reserved value\n");
+ puts("spl: WARNING: Selecting User Area partition for
booting\n");
+#endif
+ part = 0;
+ break;
+ }
+ }
#endif
return part;
}
--
2.20.1
[PATCH u-boot 0/4] mmc: Explain and cleanup partition selection
Some people do not want to read review comments in emails. So put comments and explanation into the source code itself; make emmc partition selection code more explicit and validate configuration in bubt command. Pali Rohár (4): mmc: spl: Make partition choice in default_spl_mmc_emmc_boot_partition() more explicit cmd: mvebu/bubt: Validate EXT_CSD[179] eMMC register in mmc_burn_image() sunxi: eMMC: Add comments explaining mapping between bootpart and mmc_switch_part() board: purism: Use U-Boot mmc function for converting boot part to part access arch/arm/mach-sunxi/board.c| 12 ++- board/purism/librem5/librem5.c | 6 +- cmd/mvebu/bubt.c | 24 +++-- common/spl/spl_mmc.c | 38 +++--- 4 files changed, 64 insertions(+), 16 deletions(-) -- 2.20.1
[PATCH v2 u-boot-mvebu 3/4] arm: mvebu: spl: Load proper U-Boot from correct eMMC partition
A38x BootROM completely ignores EXT_CSD_PART_CONF eMMC register and tries
to load SPL from any partition in defined order. Chosen partition can be
determined from the access bits in EXT_CSD_PART_CONF eMMC register.
So implement custom spl_mmc_emmc_boot_partition() function to always
returns eMMC partition from which BootROM loaded SPL. So this partition
would be used for loading proper U-Boot too.
Fixes: 2f27db2fbd6e ("arm: mvebu: spl: Load proper U-Boot from selected eMMC
boot partition")
Signed-off-by: Pali Rohár
---
arch/arm/mach-mvebu/spl.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-mvebu/spl.c b/arch/arm/mach-mvebu/spl.c
index 379daa88a4d8..0688601699f0 100644
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -11,6 +11,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -34,8 +35,9 @@
/*
* When loading U-Boot via SPL from eMMC, the kwbimage main header is stored at
- * sector 0 and either on HW boot partition or on data partition. Choice of HW
- * partition depends on what is configured in eMMC EXT_CSC register.
+ * sector 0 on some HW/boot partition. Choice of HW partition depends on what
is
+ * set in PART_ACCESS_MASK bits of EXT_CSD_PART_CONF eMMC register. Partition
+ * access bits into EXT_CSD_PART_CONF are set by the BootROM.
* When loading U-Boot via SPL from SD card, the kwbimage main header is stored
* at sector 1.
* Therefore MBR/GPT partition booting, fixed sector number and fixed eMMC HW
@@ -123,6 +125,10 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32
boot_device)
{
return IS_SD(mmc) ? MMCSD_MODE_RAW : MMCSD_MODE_EMMCBOOT;
}
+int spl_mmc_emmc_boot_partition(struct mmc *mmc)
+{
+ return EXT_CSD_EXTRACT_PARTITION_ACCESS(mmc->part_config);
+}
unsigned long spl_mmc_get_uboot_raw_sector(struct mmc *mmc,
unsigned long raw_sect)
{
--
2.20.1
[PATCH v2 u-boot-mvebu 2/4] mmc: Read eMMC partition access bits before card reset
eMMC specification in section "Access partitions" says that all reset
events will restore the access bits in PARTITION_CONFIG CSD register to
default User Data Area value (0b000).
So read partition access bits from PARTITION_CONFIG CSD register before
issuing card reset. This allows SPL/U-Boot to get information which eMMC
partition was in use before SPL/U-Boot was booted. For some platforms this
is the way how to determinate boot partition from which BootROM loaded SPL.
Signed-off-by: Pali Rohár
---
drivers/mmc/mmc.c | 31 ---
1 file changed, 28 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index dde251c87bc7..771432de354d 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -2329,8 +2329,17 @@ static int mmc_startup_v4(struct mmc *mmc)
/* store the partition info of emmc */
mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
- ext_csd[EXT_CSD_BOOT_MULT])
- mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
+ ext_csd[EXT_CSD_BOOT_MULT]) {
+ /*
+* At this stage PART_ACCESS_MASK bits in ext_csd[] are already
cleared.
+* But it is possible that they were already filled into
mmc->part_config.
+*/
+ if (mmc->part_config == MMCPART_NOAVAILABLE)
+ mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
+ else
+ mmc->part_config = (ext_csd[EXT_CSD_PART_CONF] &
~PART_ACCESS_MASK) |
+ (mmc->part_config &
PART_ACCESS_MASK);
+ }
if (part_completed &&
(ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
@@ -2600,7 +2609,6 @@ static int mmc_startup(struct mmc *mmc)
#if CONFIG_IS_ENABLED(MMC_WRITE)
mmc->erase_grp_size = 1;
#endif
- mmc->part_config = MMCPART_NOAVAILABLE;
err = mmc_startup_v4(mmc);
if (err)
@@ -2848,9 +2856,26 @@ int mmc_get_op_cond(struct mmc *mmc, bool quiet)
return err;
mmc->ddr_mode = 0;
+ mmc->part_config = MMCPART_NOAVAILABLE;
+
retry:
mmc_set_initial_state(mmc);
+ /*
+* Read partition access bits from partition config register before
card reset command
+* because these bits are reset to default value (User Data Area)
during card reset.
+* This allows us to preserve original value of partition access bits
used by the code
+* which loaded us (for example BootROM) and use it for board specific
boot purposes.
+*/
+ if (mmc->part_config == MMCPART_NOAVAILABLE) {
+ ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
+ err = mmc_send_ext_csd(mmc, ext_csd);
+ if (err == 0 &&
+ ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
+ext_csd[EXT_CSD_BOOT_MULT]))
+ mmc->part_config = ext_csd[EXT_CSD_PART_CONF] &
PART_ACCESS_MASK;
+ }
+
/* Reset the Card */
err = mmc_go_idle(mmc);
--
2.20.1
[PATCH v2 u-boot-mvebu 4/4] arm: mvebu: clearfog: Update eMMC/SD/SATA instructions
BootROM and neither SPL does not use eMMC boot acknowledgement or boot enable bits in EXT_CSD_PART_CONF eMMC register. And also fixed SATA disk sector 0x141 is not used at all. Signed-off-by: Pali Rohár --- board/solidrun/clearfog/README | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README index ed4a712c5aa2..c86b37061a30 100644 --- a/board/solidrun/clearfog/README +++ b/board/solidrun/clearfog/README @@ -1,7 +1,7 @@ Update from original Marvell U-Boot to mainline U-Boot: --- -Generate the U-Boot image with these commands: +Generate the U-Boot image for eMMC/SD with these commands: $ make clearfog_defconfig $ make @@ -9,7 +9,7 @@ $ make The resulting image including the SPL binary with the full DDR setup is "u-boot-with-spl.kwb". -Now all you need to do is copy this image on a SD card. +Now all you need to do is copy this image on a SD card's sector 1. For example with this command: $ sudo dd if=u-boot-with-spl.kwb of=/dev/sdX bs=512 seek=1 @@ -20,12 +20,6 @@ of "/dev/sdX" here! Install U-Boot on eMMC: --- -To make SPL load the main U-Boot image from the eMMC boot partition enable -eMMC boot acknowledgement and boot partition with the following U-Boot -command: - - mmc partconf 0 1 1 0 - Install U-Boot on eMMC boot partition from Linux running on Clearfog: echo 0 > /sys/block/mmcblk0boot0/force_ro @@ -37,8 +31,14 @@ Consider initial boot from UART (see below). Install U-Boot on SATA: --- -When loading the main U-Boot image from raw SATA sector, set -CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR to 0x141. +Generate the U-Boot image for SATA with these commands: + +$ make clearfog_sata_defconfig +$ make + +Copy image on a SATA disk's sector 1: + +$ sudo dd if=u-boot-with-spl.kwb of=/dev/sdX bs=512 seek=1 Boot selection: --- -- 2.20.1
[PATCH v2 u-boot-mvebu 1/4] tools: kwboot: Fix MMC partitions documentation
Boot configuration stored in EXT_CSD_PART_CONF register is completely
ignored by BootROM.
Fixes: fa03279e198d ("tools: kwboot: Add image type documentation")
Signed-off-by: Pali Rohár
---
tools/kwboot.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index 6bef4610ff8f..550d2494ff68 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -119,9 +119,12 @@
* 1024 bytes long sector sizes and also can be changed at runtime.
*
* For MMC-compatible devices, image can be stored at offset 0 or at offset
- * 2 MB. If MMC device supports HW boot partitions then image must be stored
- * on the HW partition as is configured in the EXT_CSC register (it can be
- * either boot or user data).
+ * 2 MB. If eMMC device supports HW/boot partitions then image is read from
+ * partitions in following order: Boot 1, Boot 2, RPMB, GP 1, GP 2, GP 3,
+ * GP 4, User Data, Boot 1, Boot 2. (Boot 1 and Boot 2 are really repeated).
+ * Boot configuration stored in EXT_CSD_PART_CONF eMMC register is completely
+ * ignored by the BootROM. But it sets PARTITION_ACCESS bits of that register
+ * to the selected partition from which it loaded image.
*
* Note that source address for SDIO image is stored in byte unit, like for
* any other images (except SATA). Marvell Functional Specifications for
--
2.20.1
[PATCH v2 u-boot-mvebu 0/4] arm: mvebu: Fix eMMC boot
Boot configuration stored in EXT_CSD[179] register is completely ignored by BootROM: https://lore.kernel.org/u-boot/CAOAjy5SYPPzWKok-BSGYwZwcKOQt_aZPgh6FTbrFd3F=8dm...@mail.gmail.com/ Instead eMMC partition use for booting has to be extracted from Partition access bits: https://lore.kernel.org/u-boot/CAOAjy5SNrLJ=jakf96nf7hkfbxwbzlmwahes6neehs6uehq...@mail.gmail.com/ Reflect this eMMC booting in documentation and in the code. This patch series does not address 5 minutes timeout as nobody reacted to the email: https://lore.kernel.org/u-boot/20230401164345.iwfu7nd5jgbjtpzl@pali/ Pali Rohár (4): tools: kwboot: Fix MMC partitions documentation mmc: Read eMMC partition access bits before card reset arm: mvebu: spl: Load proper U-Boot from correct eMMC partition arm: mvebu: clearfog: Update eMMC/SD/SATA instructions arch/arm/mach-mvebu/spl.c | 10 -- board/solidrun/clearfog/README | 20 ++-- drivers/mmc/mmc.c | 31 --- tools/kwboot.c | 9 ++--- 4 files changed, 52 insertions(+), 18 deletions(-) -- 2.20.1
[PATCH u-boot 0/3] pci: mpc85xx: Fixes for PCI config space
This patch series contains small fixes for mpc85xx old PCI Local Bus driver. Heiko: Are you able to test these changes? Has your Socrates board available old PCI Local Bus support? Pali Rohár (3): pci: mpc85xx: Add missing sync() after writing to PCI config space pci: mpc85xx: Allow 8/16-bit access to PCI config space pci: mpc85xx: Do not try to access extended PCIe registers drivers/pci/pci_mpc85xx.c | 39 +++ 1 file changed, 35 insertions(+), 4 deletions(-) -- 2.20.1
[PATCH u-boot 3/3] pci: mpc85xx: Do not try to access extended PCIe registers
Driver pci_mpc85xx.c is PCI controller driver for old PCI Local Bus,
which does not support access to extended PCIe registers (above 0xff),
as opposite of the PCIe driver pcie_fsl.c for the same platform.
So do not try to access extended PCIe registers as it cannot work.
Signed-off-by: Pali Rohár
---
drivers/pci/pci_mpc85xx.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c
index d144f2b791b8..833de816c459 100644
--- a/drivers/pci/pci_mpc85xx.c
+++ b/drivers/pci/pci_mpc85xx.c
@@ -22,7 +22,12 @@ static int mpc85xx_pci_dm_read_config(const struct udevice
*dev, pci_dev_t bdf,
struct mpc85xx_pci_priv *priv = dev_get_priv(dev);
u32 addr;
- addr = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf),
offset);
+ if (offset > 0xff) {
+ *value = pci_get_ff(size);
+ return 0;
+ }
+
+ addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf),
offset);
out_be32(priv->cfg_addr, addr);
sync();
@@ -48,7 +53,10 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev,
pci_dev_t bdf,
struct mpc85xx_pci_priv *priv = dev_get_priv(dev);
u32 addr;
- addr = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf),
offset);
+ if (offset > 0xff)
+ return 0;
+
+ addr = PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf),
offset);
out_be32(priv->cfg_addr, addr);
sync();
--
2.20.1
[PATCH u-boot 1/3] pci: mpc85xx: Add missing sync() after writing to PCI config space
On PowerPC we should use barrier after store operation to HW register. Signed-off-by: Pali Rohár --- drivers/pci/pci_mpc85xx.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c index 8a81a74067e9..23f14db83018 100644 --- a/drivers/pci/pci_mpc85xx.c +++ b/drivers/pci/pci_mpc85xx.c @@ -41,6 +41,7 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev, pci_dev_t bdf, out_be32(priv->cfg_addr, addr); sync(); out_le32(priv->cfg_data, pci_conv_size_to_32(0, value, offset, size)); + sync(); return 0; } -- 2.20.1
[PATCH u-boot 2/3] pci: mpc85xx: Allow 8/16-bit access to PCI config space
This Freescale mpc85xx PCI controller should support 8-bit and 16-bit read
and write access to PCI config space as described in more Freescale
reference manuals.
This change fixes issue that 8-bit and 16-bit write to PCI config space
caused to clear adjacent bits of 32-bit PCI register.
Signed-off-by: Pali Rohár
---
drivers/pci/pci_mpc85xx.c | 26 --
1 file changed, 24 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci_mpc85xx.c b/drivers/pci/pci_mpc85xx.c
index 23f14db83018..d144f2b791b8 100644
--- a/drivers/pci/pci_mpc85xx.c
+++ b/drivers/pci/pci_mpc85xx.c
@@ -25,7 +25,18 @@ static int mpc85xx_pci_dm_read_config(const struct udevice
*dev, pci_dev_t bdf,
addr = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf),
offset);
out_be32(priv->cfg_addr, addr);
sync();
- *value = pci_conv_32_to_size(in_le32(priv->cfg_data), offset, size);
+
+ switch (size) {
+ case PCI_SIZE_8:
+ *value = in_8(priv->cfg_data + (offset & 3));
+ break;
+ case PCI_SIZE_16:
+ *value = in_le16(priv->cfg_data + (offset & 2));
+ break;
+ case PCI_SIZE_32:
+ *value = in_le32(priv->cfg_data);
+ break;
+ }
return 0;
}
@@ -40,7 +51,18 @@ static int mpc85xx_pci_dm_write_config(struct udevice *dev,
pci_dev_t bdf,
addr = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf), PCI_FUNC(bdf),
offset);
out_be32(priv->cfg_addr, addr);
sync();
- out_le32(priv->cfg_data, pci_conv_size_to_32(0, value, offset, size));
+
+ switch (size) {
+ case PCI_SIZE_8:
+ out_8(priv->cfg_data + (offset & 3), value);
+ break;
+ case PCI_SIZE_16:
+ out_le16(priv->cfg_data + (offset & 2), value);
+ break;
+ case PCI_SIZE_32:
+ out_le32(priv->cfg_data, value);
+ break;
+ }
sync();
return 0;
--
2.20.1
[PATCH u-boot] arm: omap3: Directly use SMC #1 in lowlevel_init.S
Since commit de39dc71625d ("arm: armv7-a: Compile and tune for armv7-a
instead of armv5") is used -march=armv7-a option for Omap3 platforms.
With directive ".arch_extension sec" it is possible for -march=armv7-a to
directly use ARM SMC instruction.
So enable ".arch_extension sec" in Omap3 lowlevel_init.S and replace hand
assembled ".word 0xe1600071" by "SMC #1".
Since commit 51d063865064 ("arm: omap-common: add secure smc entry") same
pattern is already used in arch/arm/cpu/armv7/omap-common/lowlevel_init.S.
Signed-off-by: Pali Rohár
---
arch/arm/mach-omap2/omap3/lowlevel_init.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap3/lowlevel_init.S
b/arch/arm/mach-omap2/omap3/lowlevel_init.S
index ab7cdcf3d42e..1ab9472e1987 100644
--- a/arch/arm/mach-omap2/omap3/lowlevel_init.S
+++ b/arch/arm/mach-omap2/omap3/lowlevel_init.S
@@ -15,13 +15,14 @@
#include
#include
+.arch_extension sec
+
/*
* Funtion for making PPA HAL API calls in secure devices
* Input:
* R0 - Service ID
* R1 - paramer list
*/
-/* TODO: Re-evaluate the comment at the end regarding armv5 vs armv7 */
ENTRY(do_omap3_emu_romcode_call)
PUSH {r4-r12, lr} @ Save all registers from ROM code!
MOV r12, r0 @ Copy the Secure Service ID in R12
@@ -32,8 +33,7 @@ ENTRY(do_omap3_emu_romcode_call)
MOV r6, #0xFF @ Indicate new Task call
mcr p15, 0, r0, c7, c10, 4 @ DSB
mcr p15, 0, r0, c7, c10, 5 @ DMB
- .word 0xe1600071 @ SMC #1 to call PPA service - hand assembled
- @ because we use -march=armv5
+ SMC #1 @ Call PPA service
POP {r4-r12, pc}
ENDPROC(do_omap3_emu_romcode_call)
--
2.20.1
Re: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support
чт, 13 квіт. 2023 р. о 20:13 Tom Warren пише: > > Svyatoslav, > > I tried to build w/V2 of your Nexus patches applied to TOT > u-boot-tegra/master, and I get these errors from 'buildman tegra': > >aarch64: + p2771--000 > +In file included from arch/arm/mach-tegra/fuse.c:16:0: > +arch/arm/include/asm/arch-tegra/clock.h:42:10: fatal error: > asm/arch/clock-tables.h: No such file or directory > + #include > + ^ > +compilation terminated. > +make[2]: *** [arch/arm/mach-tegra/fuse.o] Error 1 > +make[1]: *** [arch/arm/mach-tegra] Error 2 > +make: *** [sub-make] Error 2 >aarch64: + p2771--500 > +In file included from arch/arm/mach-tegra/fuse.c:16:0: > +arch/arm/include/asm/arch-tegra/clock.h:42:10: fatal error: > asm/arch/clock-tables.h: No such file or directory > + #include > + ^ > +compilation terminated. > +make[2]: *** [arch/arm/mach-tegra/fuse.o] Error 1 > +make[1]: *** [arch/arm/mach-tegra] Error 2 > +make: *** [sub-make] Error 2 > > These are the two T186 builds, they don't have or use a clock-tables.h . > > Please test building your patchset on TOT u-boot-tegra/master _before_ > posting. Use buildman (preferred) or 'make xxx_defconfig && make' for each > Tegra board (cumbersome). > > I won't take any future patches from you unless they're marked w/'passes > buildman' or 'each Tegra board builds OK w/make', etc. I certainly can't > push a PR to TomR if it fails to build. Thank you! I have reloaded patches with fixes. It passed ./tools/buildman/buildman -Pr tegra or do I need to run other tests. If yes, pls specify which. Best regards, Svyatoslav R. > Tom > > -Original Message- > From: Svyatoslav Ryhel > Sent: Wednesday, April 12, 2023 11:05 PM > To: Tom Warren > Cc: Marek Vasut ; Philippe Reynes > ; Marcel Ziswiler > ; Fabio Estevam ; Simon Glass > ; Jonas Schwöbel ; > u-boot@lists.denx.de > Subject: Re: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support > > External email: Use caution opening links or attachments > > > чт, 13 квіт. 2023 р. о 02:07 Tom Warren пише: > > > > Svyatoslav, > > > > This series (patches 3 & 4, in particular) fails when applied to > > u-boot-tegra/master TOT. Error snippet is below (from make > > p2771--500_defconfig && make): > > > > CC arch/arm/mach-tegra/fuse.o > > arch/arm/mach-tegra/fuse.c:14:10: fatal error: asm/arch/clock.h: No > > such file or directory #include > > ^~ > > compilation terminated. > > scripts/Makefile.build:256: recipe for target > > 'arch/arm/mach-tegra/fuse.o' failed > > make[1]: *** [arch/arm/mach-tegra/fuse.o] Error 1 > > Makefile:1845: recipe for target 'arch/arm/mach-tegra' failed > > make: *** [arch/arm/mach-tegra] Error 2 > > Hello Tom. > > Thanks for your check. Issue was caused by non exposed headers for T186. > I have fixed that in v2, I hope buildman will pass. Additionally I have > modified grouper defconfig in such a way that it should pass even without > device fragment. > > Best regards, > Svyatoslav R. > > > > > buildman/tegra also fails for that board, and 2 others. Removing those two > > patches (3 & 4 in your Nexus7 patchset) gets make & buildman working again. > > Buildman/tegra worked fine on the base u-boot-tegra/master repo (before I > > applied your patchset w/git am). > > > > PTAL, > > > > Tom > > > > -Original Message- > > From: Svyatoslav Ryhel > > Sent: Wednesday, April 12, 2023 12:50 PM > > To: Tom Warren ; Svyatoslav Ryhel > > ; Marek Vasut ; Philippe Reynes > > ; Marcel Ziswiler > > ; Fabio Estevam ; Simon > > Glass ; Jonas Schwöbel > > Cc: u-boot@lists.denx.de > > Subject: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support > > > > External email: Use caution opening links or attachments > > > > > > This patchset adds support for native use of U-Boot on ASUS/Google Nexus 7 > > (2012), aka grouper/tilapia as a replacement of vendor bootloader. > > Alongside device bringup tegra requires few small patches: > > - add gpio keyboard as stdin device > > - make networking boot options optional > > - add a small tool to generate SoC UID > > > > Jonas Schwöbel (1): > > configs: tegra-common-post: make PXE and DHCP boot targets optional > > > > Svyatoslav Ryhel (3): > > configs: tegra-common-post: add GPIO keyboard as STDIN device > > ARM: tegra: add SoC UID calculation function > > board: asus: grouper: add Google Nexus 7 (2012) support > > > > arch/arm/dts/Makefile | 3 + > > arch/arm/dts/tegra30-asus-grouper-common.dtsi | 125 ++ > > .../dts/tegra30-asus-nexus7-grouper-E1565.dts | 40 ++ > > .../dts/tegra30-asus-nexus7-grouper-PM269.dts | 65 > > .../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 40 ++ > > arch/arm/include/asm/arch-tegra/fuse.h| 7 + > > arch/arm/mach-tegra/Makefile | 2 +- > > arch/arm/mach-tegra/fuse.c| 151 > >
[PATCH v3 4/4] board: asus: grouper: add Google Nexus 7 (2012) support
Nexus 7 is a mini tablet computer co-developed by Google and Asus
that runs the Android operating system. The Nexus 7 features a 7"
display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 8/16 GB
of internal storage.
This patch brings support for all 3 known ASUS/Google devices:
- Nexus 7 (2012) E1565
- Nexus 7 (2012) PM269
- Nexus 7 (2012) 3G - tilapia
Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel # ASUS Grouper E1565
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/Makefile | 3 +
arch/arm/dts/tegra30-asus-grouper-common.dtsi | 125 ++
.../dts/tegra30-asus-nexus7-grouper-E1565.dts | 40 ++
.../dts/tegra30-asus-nexus7-grouper-PM269.dts | 65
.../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 40 ++
arch/arm/mach-tegra/tegra30/Kconfig | 5 +
board/asus/grouper/Kconfig| 22 ++
board/asus/grouper/MAINTAINERS| 6 +
board/asus/grouper/Makefile | 14 +
board/asus/grouper/grouper-spl-max.c | 46 +++
board/asus/grouper/grouper-spl-ti.c | 42 ++
board/asus/grouper/grouper.c | 209 ++
board/asus/grouper/pinmux-config-grouper.h| 362 ++
configs/grouper_E1565.config | 2 +
configs/grouper_PM269.config | 2 +
configs/grouper_common_defconfig | 84
configs/tilapia.config| 3 +
include/configs/grouper.h | 68
18 files changed, 1138 insertions(+)
create mode 100644 arch/arm/dts/tegra30-asus-grouper-common.dtsi
create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts
create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts
create mode 100644 arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts
create mode 100644 board/asus/grouper/Kconfig
create mode 100644 board/asus/grouper/MAINTAINERS
create mode 100644 board/asus/grouper/Makefile
create mode 100644 board/asus/grouper/grouper-spl-max.c
create mode 100644 board/asus/grouper/grouper-spl-ti.c
create mode 100644 board/asus/grouper/grouper.c
create mode 100644 board/asus/grouper/pinmux-config-grouper.h
create mode 100644 configs/grouper_E1565.config
create mode 100644 configs/grouper_PM269.config
create mode 100644 configs/grouper_common_defconfig
create mode 100644 configs/tilapia.config
create mode 100644 include/configs/grouper.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 337bee7e1e..7b523b3b3a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -227,6 +227,9 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-ventana.dtb \
tegra20-colibri.dtb \
tegra30-apalis.dtb \
+ tegra30-asus-nexus7-grouper-PM269.dtb \
+ tegra30-asus-nexus7-grouper-E1565.dtb \
+ tegra30-asus-nexus7-tilapia-E1565.dtb \
tegra30-beaver.dtb \
tegra30-cardhu.dtb \
tegra30-colibri.dtb \
diff --git a/arch/arm/dts/tegra30-asus-grouper-common.dtsi
b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
new file mode 100644
index 00..21a3fadde2
--- /dev/null
+++ b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+
+#include "tegra30.dtsi"
+
+/ {
+ chosen {
+ stdout-path =
+ };
+
+ aliases {
+ i2c0 = _i2c;
+
+ mmc0 = /* eMMC */
+
+ rtc1 = "/rtc@7000e000";
+
+ usb0 =
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x4000>;
+ };
+
+ host1x@5000 {
+ dc@5420 {
+ nvidia,180-rotation;
+ rgb {
+ status = "okay";
+
+ nvidia,panel = <>;
+ };
+ };
+ };
+
+ gpio@6000d000 {
+ volume-buttons-hog {
+ gpio-hog;
+ gpios = ,
+ ;
+ output-low;
+ };
+ };
+
+ uarta: serial@70006000 {
+ status = "okay";
+ };
+
+ pwm: pwm@7000a000 {
+ status = "okay";
+ };
+
+ sdmmc4: sdhci@78000600 {
+ status = "okay";
+ bus-width = <8>;
+ non-removable;
+ };
+
+ usb1: usb@7d00 {
+ status = "okay";
+ dr_mode = "otg";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+
+ enable-gpios = < TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ power-supply = <_5v0_bl>;
+ pwms = < 0 5>;
+
+ brightness-levels = <1 35 70 105 140 175 210 255>;
+ default-brightness-level = <5>;
+ };
+
+ /* PMIC has a built-in
[PATCH v3 3/4] ARM: tegra: add SoC UID calculation function
This is a small tool for calculation of SoC UID based on the same
Linux function. It can be further used for generation of device
unique data like mac address or exposing it as serial number.
Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel # LG P895 T30
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/include/asm/arch-tegra/fuse.h | 7 ++
arch/arm/mach-tegra/Makefile | 4 +
arch/arm/mach-tegra/fuse.c | 151 +
3 files changed, 162 insertions(+)
create mode 100644 arch/arm/mach-tegra/fuse.c
diff --git a/arch/arm/include/asm/arch-tegra/fuse.h
b/arch/arm/include/asm/arch-tegra/fuse.h
index 5b8e0bd8d1..f3f2ad8e3f 100644
--- a/arch/arm/include/asm/arch-tegra/fuse.h
+++ b/arch/arm/include/asm/arch-tegra/fuse.h
@@ -19,4 +19,11 @@ struct fuse_regs {
u32 security_mode; /* 0x1A0: FUSE_SECURITY_MODE */
};
+/**
+ * Calculate SoC UID
+ *
+ * Return: uid if ok, 0 on error
+ */
+unsigned long long tegra_chip_uid(void);
+
#endif /* ifndef _FUSE_H_ */
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 9147050b32..a5733b0bf6 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -32,6 +32,10 @@ endif
obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
obj-y += pmc.o
+ifndef CONFIG_TEGRA186
+obj-y += fuse.o
+endif
+
obj-$(CONFIG_TEGRA20) += tegra20/
obj-$(CONFIG_TEGRA30) += tegra30/
obj-$(CONFIG_TEGRA114) += tegra114/
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
new file mode 100644
index 00..306d3b8f61
--- /dev/null
+++ b/arch/arm/mach-tegra/fuse.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2012-2013
+ * NVIDIA Corporation
+ *
+ * (C) Copyright 2022
+ * Svyatoslav Ryhel
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "cpu.h"
+
+#define FUSE_UID_LOW 0x108
+#define FUSE_UID_HIGH 0x10c
+
+#define FUSE_VENDOR_CODE 0x200
+#define FUSE_FAB_CODE 0x204
+#define FUSE_LOT_CODE_00x208
+#define FUSE_LOT_CODE_10x20c
+#define FUSE_WAFER_ID 0x210
+#define FUSE_X_COORDINATE 0x214
+#define FUSE_Y_COORDINATE 0x218
+
+#define FUSE_VENDOR_CODE_MASK 0xf
+#define FUSE_FAB_CODE_MASK 0x3f
+#define FUSE_WAFER_ID_MASK 0x3f
+#define FUSE_X_COORDINATE_MASK 0x1ff
+#define FUSE_Y_COORDINATE_MASK 0x1ff
+
+static u32 tegra_fuse_readl(unsigned long offset)
+{
+ return readl(NV_PA_FUSE_BASE + offset);
+}
+
+static void tegra_set_fuse(void)
+{
+ u32 reg;
+
+ /*
+* Performed by downstream and is not
+* documented by TRM. Whithout setting
+* this bit fuse region will not work.
+*/
+ reg = readl_relaxed(NV_PA_CLK_RST_BASE + 0x48);
+ reg |= BIT(28);
+ writel(reg, NV_PA_CLK_RST_BASE + 0x48);
+
+ clock_enable(PERIPH_ID_FUSE);
+ udelay(2);
+ reset_set_enable(PERIPH_ID_FUSE, 0);
+}
+
+unsigned long long tegra_chip_uid(void)
+{
+ u64 uid = 0ull;
+ u32 reg;
+ u32 cid;
+ u32 vendor;
+ u32 fab;
+ u32 lot;
+ u32 wafer;
+ u32 x;
+ u32 y;
+ u32 i;
+
+ tegra_set_fuse();
+
+ /* This used to be so much easier in prior chips. Unfortunately, there
+ is no one-stop shopping for the unique id anymore. It must be
+ constructed from various bits of information burned into the fuses
+ during the manufacturing process. The 64-bit unique id is formed
+ by concatenating several bit fields. The notation used for the
+ various fields is with the UID composed
+ thusly:
+
+ Where:
+ FieldBits Position Data
+ ---
+ CID4 60 Chip id
+ VENDOR 4 56 Vendor code
+ FAB6 50 FAB code
+ LOT 26 24 Lot code (5-digit base-36-coded-decimal,
+ re-encoded to 26 bits binary)
+ WAFER 6 18 Wafer id
+ X 9 9 Wafer X-coordinate
+ Y 9 0 Wafer Y-coordinate
+ ---
+ Total 64
+ */
+
+ switch (tegra_get_chip()) {
+ case CHIPID_TEGRA20:
+ /* T20 has simple calculation */
+ return ((unsigned long long)tegra_fuse_readl(FUSE_UID_HIGH) <<
32ull) |
+ (unsigned long long)tegra_fuse_readl(FUSE_UID_LOW);
+ case CHIPID_TEGRA30:
+ /* T30 chip id is 0 */
+ cid = 0;
+ break;
+ case CHIPID_TEGRA114:
+ /* T11x chip id is 1 */
+ cid = 1;
+ break;
+ case CHIPID_TEGRA124:
+ /*
[PATCH v3 2/4] configs: tegra-common-post: make PXE and DHCP boot targets optional
From: Jonas Schwöbel Disabling the network related features in defconfig causes build to fail so make them optional. Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Jonas Schwöbel Signed-off-by: Svyatoslav Ryhel --- include/configs/tegra-common-post.h | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 2d5095639a..0d0965ecce 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -8,9 +8,21 @@ #define __TEGRA_COMMON_POST_H #if IS_ENABLED(CONFIG_CMD_USB) -# define BOOT_TARGET_USB(func) func(USB, usb, 0) +#define BOOT_TARGET_USB(func) func(USB, usb, 0) #else -# define BOOT_TARGET_USB(func) +#define BOOT_TARGET_USB(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) && CONFIG_IS_ENABLED(CMD_PXE) +#define BOOT_TARGET_PXE(func) func(PXE, pxe, na) +#else +#define BOOT_TARGET_PXE(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) +#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) +#else +#define BOOT_TARGET_DHCP(func) #endif #ifndef BOOT_TARGET_DEVICES @@ -18,8 +30,8 @@ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ BOOT_TARGET_USB(func) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) #endif #include -- 2.37.2
[PATCH v3 1/4] configs: tegra-common-post: add GPIO keyboard as STDIN device
GPIO keyboard is used on many newly upstreamed devices. Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel --- include/configs/tegra-common-post.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 991ffbb7df..2d5095639a 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -35,6 +35,12 @@ #define STDIN_KBD_USB "" #endif +#ifdef CONFIG_BUTTON_KEYBOARD +#define STDIN_BTN_KBD ",button-kbd" +#else +#define STDIN_BTN_KBD "" +#endif + #ifdef CONFIG_VIDEO #define STDOUT_VIDEO ",vidconsole" #else @@ -48,7 +54,7 @@ #endif #define TEGRA_DEVICE_SETTINGS \ - "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \ + "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC STDIN_BTN_KBD "\0" \ "stdout=serial" STDOUT_VIDEO "\0" \ "stderr=serial" STDOUT_VIDEO "\0" \ "" -- 2.37.2
[PATCH v3 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support
This patchset adds support for native use of U-Boot on ASUS/Google Nexus 7 (2012), aka grouper/tilapia as a replacement of vendor bootloader. Alongside device bringup tegra requires few small patches: - add gpio keyboard as stdin device - make networking boot options optional - add a small tool to generate SoC UID Commits passed buildman with './tools/buildman/buildman -Pr tegra' without errors. --- Changes from v2: - fuse build is excluded for T186 (it is not supported in it anyway) Changes from v1: - fix fuse headers for newer Tegra generations - allow grouper_common_defconfig to pass without fragments --- Jonas Schwöbel (1): configs: tegra-common-post: make PXE and DHCP boot targets optional Svyatoslav Ryhel (3): configs: tegra-common-post: add GPIO keyboard as STDIN device ARM: tegra: add SoC UID calculation function board: asus: grouper: add Google Nexus 7 (2012) support arch/arm/dts/Makefile | 3 + arch/arm/dts/tegra30-asus-grouper-common.dtsi | 125 ++ .../dts/tegra30-asus-nexus7-grouper-E1565.dts | 40 ++ .../dts/tegra30-asus-nexus7-grouper-PM269.dts | 65 .../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 40 ++ arch/arm/include/asm/arch-tegra/fuse.h| 7 + arch/arm/mach-tegra/Makefile | 4 + arch/arm/mach-tegra/fuse.c| 151 arch/arm/mach-tegra/tegra30/Kconfig | 5 + board/asus/grouper/Kconfig| 22 ++ board/asus/grouper/MAINTAINERS| 6 + board/asus/grouper/Makefile | 14 + board/asus/grouper/grouper-spl-max.c | 46 +++ board/asus/grouper/grouper-spl-ti.c | 42 ++ board/asus/grouper/grouper.c | 209 ++ board/asus/grouper/pinmux-config-grouper.h| 362 ++ configs/grouper_E1565.config | 2 + configs/grouper_PM269.config | 2 + configs/grouper_common_defconfig | 84 configs/tilapia.config| 3 + include/configs/grouper.h | 68 include/configs/tegra-common-post.h | 28 +- 22 files changed, 1323 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/tegra30-asus-grouper-common.dtsi create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts create mode 100644 arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts create mode 100644 arch/arm/mach-tegra/fuse.c create mode 100644 board/asus/grouper/Kconfig create mode 100644 board/asus/grouper/MAINTAINERS create mode 100644 board/asus/grouper/Makefile create mode 100644 board/asus/grouper/grouper-spl-max.c create mode 100644 board/asus/grouper/grouper-spl-ti.c create mode 100644 board/asus/grouper/grouper.c create mode 100644 board/asus/grouper/pinmux-config-grouper.h create mode 100644 configs/grouper_E1565.config create mode 100644 configs/grouper_PM269.config create mode 100644 configs/grouper_common_defconfig create mode 100644 configs/tilapia.config create mode 100644 include/configs/grouper.h -- 2.37.2
Re: [PATCH 1/2] net: phy: Make phy_interface_is_sgmii a switch statement
On 20:56-20230413, Marek Behún wrote:
> On Thu, Apr 13, 2023 at 01:07:12PM -0500, Nishanth Menon wrote:
> > Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
> > with Linux") reordered the enum definitions. This caused the range of
> > enums that this api was checking to go bad.
> >
> > While it is possible for the phy drivers to practically use the enum's
> > directly, drivers such as dp83867 use this helper to manage the
> > configuration of the phy correctly.
> >
> > Reported-by: Tom Rini
> > Signed-off-by: Nishanth Menon
> > ---
> > include/phy.h | 12 ++--
> > 1 file changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/include/phy.h b/include/phy.h
> > index a837fed72352..1c4dc23bc5ba 100644
> > --- a/include/phy.h
> > +++ b/include/phy.h
> > @@ -373,8 +373,16 @@ static inline bool phy_interface_is_rgmii(struct
> > phy_device *phydev)
> > */
> > static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
> > {
> > - return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
> > - phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
> > + switch (phydev->interface) {
> > + case PHY_INTERFACE_MODE_SGMII:
> > + case PHY_INTERFACE_MODE_QUSGMII:
> > + case PHY_INTERFACE_MODE_USXGMII:
> > + case PHY_INTERFACE_MODE_QSGMII:
> > + return 1;
> > + default:
> > + fallthrough;
>
> Why not just put the return 0; statement here instead of fallthrough and
> drop it from after the switch statement?
Just dropping the default also will work, though it does leave something
un-handled. handling the default on the other hand allows for additional
code (meh?) to be added in default.. But really what? I'd rather drop
the default and fall through to save on a couple of lines.. if that
is'nt creating confusion..
> > + }
> > + return 0;
> > }
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5
849D 1736 249D
Re: [PATCH 1/2] net: phy: Make phy_interface_is_sgmii a switch statement
On Thu, Apr 13, 2023 at 01:07:12PM -0500, Nishanth Menon wrote:
> Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
> with Linux") reordered the enum definitions. This caused the range of
> enums that this api was checking to go bad.
>
> While it is possible for the phy drivers to practically use the enum's
> directly, drivers such as dp83867 use this helper to manage the
> configuration of the phy correctly.
>
> Reported-by: Tom Rini
> Signed-off-by: Nishanth Menon
> ---
> include/phy.h | 12 ++--
> 1 file changed, 10 insertions(+), 2 deletions(-)
>
> diff --git a/include/phy.h b/include/phy.h
> index a837fed72352..1c4dc23bc5ba 100644
> --- a/include/phy.h
> +++ b/include/phy.h
> @@ -373,8 +373,16 @@ static inline bool phy_interface_is_rgmii(struct
> phy_device *phydev)
> */
> static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
> {
> - return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
> - phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
> + switch (phydev->interface) {
> + case PHY_INTERFACE_MODE_SGMII:
> + case PHY_INTERFACE_MODE_QUSGMII:
> + case PHY_INTERFACE_MODE_USXGMII:
> + case PHY_INTERFACE_MODE_QSGMII:
> + return 1;
> + default:
> + fallthrough;
Why not just put the return 0; statement here instead of fallthrough and
drop it from after the switch statement?
> + }
> + return 0;
> }
Re: [PATCH 0/2] net: phy: Make phy_interface_is_sgmii|rgmii a switch statement
On 13:07-20230413, Nishanth Menon wrote:
> Originally reported by Tom[1], turned out to be that recent commit
> 75d28899e3e9 ("net: phy: Synchronize PHY interface modes with Linux")
> reordered the enum definitions which in turn broke the range checks.
>
> we are left with two options:
> a) check against explicit values to help reuse as much as possible and
> let compiler optimize where applicable
> or
> b) be very explicit in phy drivers and drop these helpers.
>
> I have chosen to go with (a) approach.
>
> Tested on am64x, though the dp83867 is used elsewhere as well.
>
> Nishanth Menon (2):
> net: phy: Make phy_interface_is_sgmii a switch statement
> net: phy: Make phy_interface_is_rgmii a switch statement
>
> include/phy.h | 24
> 1 file changed, 20 insertions(+), 4 deletions(-)
>
> --
> 2.40.0
>
Oops.. forgot to provide the link of the report:
[1] https://libera.irclog.whitequark.org/u-boot/2023-04-07#34130437;
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5
849D 1736 249D
[PATCH 1/2] net: phy: Make phy_interface_is_sgmii a switch statement
Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
with Linux") reordered the enum definitions. This caused the range of
enums that this api was checking to go bad.
While it is possible for the phy drivers to practically use the enum's
directly, drivers such as dp83867 use this helper to manage the
configuration of the phy correctly.
Reported-by: Tom Rini
Signed-off-by: Nishanth Menon
---
include/phy.h | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/include/phy.h b/include/phy.h
index a837fed72352..1c4dc23bc5ba 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -373,8 +373,16 @@ static inline bool phy_interface_is_rgmii(struct
phy_device *phydev)
*/
static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
{
- return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
- phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_SGMII:
+ case PHY_INTERFACE_MODE_QUSGMII:
+ case PHY_INTERFACE_MODE_USXGMII:
+ case PHY_INTERFACE_MODE_QSGMII:
+ return 1;
+ default:
+ fallthrough;
+ }
+ return 0;
}
bool phy_interface_is_ncsi(void);
--
2.40.0
[PATCH 0/2] net: phy: Make phy_interface_is_sgmii|rgmii a switch statement
Originally reported by Tom[1], turned out to be that recent commit
75d28899e3e9 ("net: phy: Synchronize PHY interface modes with Linux")
reordered the enum definitions which in turn broke the range checks.
we are left with two options:
a) check against explicit values to help reuse as much as possible and
let compiler optimize where applicable
or
b) be very explicit in phy drivers and drop these helpers.
I have chosen to go with (a) approach.
Tested on am64x, though the dp83867 is used elsewhere as well.
Nishanth Menon (2):
net: phy: Make phy_interface_is_sgmii a switch statement
net: phy: Make phy_interface_is_rgmii a switch statement
include/phy.h | 24
1 file changed, 20 insertions(+), 4 deletions(-)
--
2.40.0
[PATCH 2/2] net: phy: Make phy_interface_is_rgmii a switch statement
Recent commit 75d28899e3e9 ("net: phy: Synchronize PHY interface modes
with Linux") reordered the enum definitions. This exposed a problem in
range checking functions to identify the interface type. Though this
specific api was'nt impacted (all the RGMII definitions remained within
range), this experience should be used to never to have to face this
kind of challenge again.
While it is possible for the phy drivers to practically use the enum's
directly, drivers such as dp83867, dp83869, marvell, micrel_ksz90x1 etc
use the same.
Reported-by: Tom Rini
Signed-off-by: Nishanth Menon
---
include/phy.h | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/include/phy.h b/include/phy.h
index 1c4dc23bc5ba..812694cf4a81 100644
--- a/include/phy.h
+++ b/include/phy.h
@@ -361,8 +361,16 @@ int get_phy_id(struct mii_dev *bus, int addr, int devad,
u32 *phy_id);
*/
static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
{
- return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
- phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
+ switch (phydev->interface) {
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ return 1;
+ default:
+ fallthrough;
+ }
+ return 0;
}
/**
--
2.40.0
RE: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support
Svyatoslav, I tried to build w/V2 of your Nexus patches applied to TOT u-boot-tegra/master, and I get these errors from 'buildman tegra': aarch64: + p2771--000 +In file included from arch/arm/mach-tegra/fuse.c:16:0: +arch/arm/include/asm/arch-tegra/clock.h:42:10: fatal error: asm/arch/clock-tables.h: No such file or directory + #include + ^ +compilation terminated. +make[2]: *** [arch/arm/mach-tegra/fuse.o] Error 1 +make[1]: *** [arch/arm/mach-tegra] Error 2 +make: *** [sub-make] Error 2 aarch64: + p2771--500 +In file included from arch/arm/mach-tegra/fuse.c:16:0: +arch/arm/include/asm/arch-tegra/clock.h:42:10: fatal error: asm/arch/clock-tables.h: No such file or directory + #include + ^ +compilation terminated. +make[2]: *** [arch/arm/mach-tegra/fuse.o] Error 1 +make[1]: *** [arch/arm/mach-tegra] Error 2 +make: *** [sub-make] Error 2 These are the two T186 builds, they don't have or use a clock-tables.h . Please test building your patchset on TOT u-boot-tegra/master _before_ posting. Use buildman (preferred) or 'make xxx_defconfig && make' for each Tegra board (cumbersome). I won't take any future patches from you unless they're marked w/'passes buildman' or 'each Tegra board builds OK w/make', etc. I certainly can't push a PR to TomR if it fails to build. Tom -Original Message- From: Svyatoslav Ryhel Sent: Wednesday, April 12, 2023 11:05 PM To: Tom Warren Cc: Marek Vasut ; Philippe Reynes ; Marcel Ziswiler ; Fabio Estevam ; Simon Glass ; Jonas Schwöbel ; u-boot@lists.denx.de Subject: Re: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support External email: Use caution opening links or attachments чт, 13 квіт. 2023 р. о 02:07 Tom Warren пише: > > Svyatoslav, > > This series (patches 3 & 4, in particular) fails when applied to > u-boot-tegra/master TOT. Error snippet is below (from make > p2771--500_defconfig && make): > > CC arch/arm/mach-tegra/fuse.o > arch/arm/mach-tegra/fuse.c:14:10: fatal error: asm/arch/clock.h: No > such file or directory #include > ^~ > compilation terminated. > scripts/Makefile.build:256: recipe for target > 'arch/arm/mach-tegra/fuse.o' failed > make[1]: *** [arch/arm/mach-tegra/fuse.o] Error 1 > Makefile:1845: recipe for target 'arch/arm/mach-tegra' failed > make: *** [arch/arm/mach-tegra] Error 2 Hello Tom. Thanks for your check. Issue was caused by non exposed headers for T186. I have fixed that in v2, I hope buildman will pass. Additionally I have modified grouper defconfig in such a way that it should pass even without device fragment. Best regards, Svyatoslav R. > > buildman/tegra also fails for that board, and 2 others. Removing those two > patches (3 & 4 in your Nexus7 patchset) gets make & buildman working again. > Buildman/tegra worked fine on the base u-boot-tegra/master repo (before I > applied your patchset w/git am). > > PTAL, > > Tom > > -Original Message- > From: Svyatoslav Ryhel > Sent: Wednesday, April 12, 2023 12:50 PM > To: Tom Warren ; Svyatoslav Ryhel > ; Marek Vasut ; Philippe Reynes > ; Marcel Ziswiler > ; Fabio Estevam ; Simon > Glass ; Jonas Schwöbel > Cc: u-boot@lists.denx.de > Subject: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support > > External email: Use caution opening links or attachments > > > This patchset adds support for native use of U-Boot on ASUS/Google Nexus 7 > (2012), aka grouper/tilapia as a replacement of vendor bootloader. Alongside > device bringup tegra requires few small patches: > - add gpio keyboard as stdin device > - make networking boot options optional > - add a small tool to generate SoC UID > > Jonas Schwöbel (1): > configs: tegra-common-post: make PXE and DHCP boot targets optional > > Svyatoslav Ryhel (3): > configs: tegra-common-post: add GPIO keyboard as STDIN device > ARM: tegra: add SoC UID calculation function > board: asus: grouper: add Google Nexus 7 (2012) support > > arch/arm/dts/Makefile | 3 + > arch/arm/dts/tegra30-asus-grouper-common.dtsi | 125 ++ > .../dts/tegra30-asus-nexus7-grouper-E1565.dts | 40 ++ > .../dts/tegra30-asus-nexus7-grouper-PM269.dts | 65 > .../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 40 ++ > arch/arm/include/asm/arch-tegra/fuse.h| 7 + > arch/arm/mach-tegra/Makefile | 2 +- > arch/arm/mach-tegra/fuse.c| 151 > arch/arm/mach-tegra/tegra30/Kconfig | 5 + > board/asus/grouper/Kconfig| 20 + > board/asus/grouper/MAINTAINERS| 6 + > board/asus/grouper/Makefile | 14 + > board/asus/grouper/grouper-spl-max.c | 46 +++ > board/asus/grouper/grouper-spl-ti.c | 42 ++ > board/asus/grouper/grouper.c | 209 ++ >
Re: [PATCH v2] rockchip: rk3328: Add support for FriendlyARM NanoPi R2C
Hi Pali, On Wednesday 12 April 2023 01:56:13 Pali Rohár wrote: > Hello! I'm not rockchip maintainer, how many times I need to repeat it > to not send me rockchip patches? Or is there something important for me? I am sorry for disturbing you! This is my first time contributing to the u-boot project. I sent this patch to you as your email was listed by the `get_maintainer.pl` script. I will take care to avoid sending you more rockchip patches in the future. Thanks, Tianling. > [...]
[PATCH] dm: core: introduce uclass_get_device_by_of_path()
There's quite a few instances of board-specific code doing
off = fdt_path_offset(gd->fdt_blob, ...);
...
ret = uclass_get_device_by_of_offset(..., off, );
looking for an eeprom or a pmic via some alias. Such code can be
simplified a little if we have a helper for directly getting a device
via device tree path (including being given as an alias).
Implement it in terms of ofnode rather than raw offsets so that this
will work whether live tree is enabled or not.
Signed-off-by: Rasmus Villemoes
---
drivers/core/uclass.c | 6 ++
include/dm/uclass.h | 17 +
2 files changed, 23 insertions(+)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 3a919104a6..56ea878701 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -544,6 +544,12 @@ int uclass_get_device_by_ofnode(enum uclass_id id, ofnode
node,
return uclass_get_device_tail(dev, ret, devp);
}
+int uclass_get_device_by_of_path(enum uclass_id id, const char *path,
+struct udevice **devp)
+{
+ return uclass_get_device_by_ofnode(id, ofnode_path(path), devp);
+}
+
#if CONFIG_IS_ENABLED(OF_CONTROL)
int uclass_get_device_by_phandle_id(enum uclass_id id, uint phandle_id,
struct udevice **devp)
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index ee15c92063..5c5fb9acac 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -264,6 +264,23 @@ int uclass_get_device_by_of_offset(enum uclass_id id, int
node,
int uclass_get_device_by_ofnode(enum uclass_id id, ofnode node,
struct udevice **devp);
+/**
+ * uclass_get_device_by_of_path() - Get a uclass device by device tree path
+ *
+ * This searches the devices in the uclass for one attached to the
+ * device tree node corresponding to the given path (which may also be
+ * an alias).
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @id: ID to look up
+ * @node: Device tree path to search for (if no such path then -ENODEV is
returned)
+ * @devp: Returns pointer to device (there is only one for each node)
+ * Return: 0 if OK, -ve on error
+ */
+int uclass_get_device_by_of_path(enum uclass_id id, const char *path,
+struct udevice **devp);
+
/**
* uclass_get_device_by_phandle_id() - Get a uclass device by phandle id
*
--
2.37.2
[PATCH] uclass: add uclass_find_device_by_phandle_id() helper
The functions uclass_find_device_by_phandle() and
uclass_get_device_by_phandle_id() both loop over a given uclass
looking for a device with a given phandle. Factor that out to a common
helper.
For now, there are no (known potential) users of the new helper
outside uclass.c, so make it static.
Signed-off-by: Rasmus Villemoes
---
drivers/core/uclass.c | 42 ++
1 file changed, 18 insertions(+), 24 deletions(-)
diff --git a/drivers/core/uclass.c b/drivers/core/uclass.c
index 1762a0796d..3a919104a6 100644
--- a/drivers/core/uclass.c
+++ b/drivers/core/uclass.c
@@ -411,18 +411,14 @@ done:
}
#if CONFIG_IS_ENABLED(OF_REAL)
-int uclass_find_device_by_phandle(enum uclass_id id, struct udevice *parent,
- const char *name, struct udevice **devp)
+static int
+uclass_find_device_by_phandle_id(enum uclass_id id, uint find_phandle,
+struct udevice **devp)
{
struct udevice *dev;
struct uclass *uc;
- int find_phandle;
int ret;
- *devp = NULL;
- find_phandle = dev_read_u32_default(parent, name, -1);
- if (find_phandle <= 0)
- return -ENOENT;
ret = uclass_get(id, );
if (ret)
return ret;
@@ -440,6 +436,19 @@ int uclass_find_device_by_phandle(enum uclass_id id,
struct udevice *parent,
return -ENODEV;
}
+
+int uclass_find_device_by_phandle(enum uclass_id id, struct udevice *parent,
+ const char *name, struct udevice **devp)
+{
+ int find_phandle;
+
+ *devp = NULL;
+ find_phandle = dev_read_u32_default(parent, name, -1);
+ if (find_phandle <= 0)
+ return -ENOENT;
+
+ return uclass_find_device_by_phandle_id(id, find_phandle, devp);
+}
#endif
int uclass_get_device_by_driver(enum uclass_id id,
@@ -540,26 +549,11 @@ int uclass_get_device_by_phandle_id(enum uclass_id id,
uint phandle_id,
struct udevice **devp)
{
struct udevice *dev;
- struct uclass *uc;
int ret;
*devp = NULL;
- ret = uclass_get(id, );
- if (ret)
- return ret;
-
- uclass_foreach_dev(dev, uc) {
- uint phandle;
-
- phandle = dev_read_phandle(dev);
-
- if (phandle == phandle_id) {
- *devp = dev;
- return uclass_get_device_tail(dev, ret, devp);
- }
- }
-
- return -ENODEV;
+ ret = uclass_find_device_by_phandle_id(id, phandle_id, );
+ return uclass_get_device_tail(dev, ret, devp);
}
int uclass_get_device_by_phandle(enum uclass_id id, struct udevice *parent,
--
2.37.2
[PATCH] imx: imx8mp: Add support for Polyhex Debix Model A SBC
Add support for the Polyhex Debix Model A SBC board.
It is an industrial grade single board computer based on
NXP's i.MX 8M Plus.
Currently supported interfaces are:
- Serial console
- Micro SD
- eQOS and FEC Ethernet
imx8mp-debix-model-a.dts is taken from Linux 6.3-rc6.
Signed-off-by: Gilles Talis
---
arch/arm/dts/Makefile |1 +
arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi | 140 ++
arch/arm/dts/imx8mp-debix-model-a.dts | 507 +
arch/arm/mach-imx/imx8m/Kconfig |8 +
board/polyhex/imx8mp_debix_model_a/Kconfig| 15 +
.../polyhex/imx8mp_debix_model_a/MAINTAINERS |8 +
board/polyhex/imx8mp_debix_model_a/Makefile | 12 +
.../imx8mp_debix_model_a.c| 54 +
.../imximage-8mp-lpddr4.cfg |9 +
.../imx8mp_debix_model_a/lpddr4_timing.c | 1843 +
board/polyhex/imx8mp_debix_model_a/spl.c | 129 ++
configs/imx8mp_debix_model_a_defconfig| 110 +
include/configs/imx8mp_debix_model_a.h| 54 +
13 files changed, 2890 insertions(+)
create mode 100644 arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi
create mode 100644 arch/arm/dts/imx8mp-debix-model-a.dts
create mode 100644 board/polyhex/imx8mp_debix_model_a/Kconfig
create mode 100644 board/polyhex/imx8mp_debix_model_a/MAINTAINERS
create mode 100644 board/polyhex/imx8mp_debix_model_a/Makefile
create mode 100644 board/polyhex/imx8mp_debix_model_a/imx8mp_debix_model_a.c
create mode 100644 board/polyhex/imx8mp_debix_model_a/imximage-8mp-lpddr4.cfg
create mode 100644 board/polyhex/imx8mp_debix_model_a/lpddr4_timing.c
create mode 100644 board/polyhex/imx8mp_debix_model_a/spl.c
create mode 100644 configs/imx8mp_debix_model_a_defconfig
create mode 100644 include/configs/imx8mp_debix_model_a.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 337bee7e1e..5e1dd627d7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -997,6 +997,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-phanbell.dtb \
imx8mp-beacon-kit.dtb \
imx8mp-data-modul-edm-sbc.dtb \
+ imx8mp-debix-model-a.dtb \
imx8mp-dhcom-pdk2.dtb \
imx8mp-dhcom-pdk3.dtb \
imx8mp-evk.dtb \
diff --git a/arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi
b/arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi
new file mode 100644
index 00..97c011895f
--- /dev/null
+++ b/arch/arm/dts/imx8mp-debix-model-a-u-boot.dtsi
@@ -0,0 +1,140 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019, 2021 NXP
+ */
+
+#include "imx8mp-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ bootph-pre-ram;
+ };
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ reset-gpios = < 18 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <15000>;
+ reset-post-delay-us = <10>;
+};
+
+ {
+ phy-reset-gpios = < 19 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <15>;
+ phy-reset-post-delay = <100>;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+_i2c1 {
+ bootph-pre-ram;
+};
+
+_pmic {
+ bootph-pre-ram;
+};
+
+_uart2 {
+ bootph-pre-ram;
+};
+
+_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+_usdhc2 {
+ bootph-pre-ram;
+};
+
+_usdhc3 {
+ bootph-pre-ram;
+};
+
+_wdog {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+
+ regulators {
+ bootph-pre-ram;
+ };
+};
+
+_usdhc2_vmmc {
+ u-boot,off-on-delay-us = <2>;
+};
+
+_usdhc2_vmmc {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+_jr0 {
+ bootph-pre-ram;
+};
+
+_jr1 {
+ bootph-pre-ram;
+};
+
+_jr2 {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+ sd-uhs-sdr104;
+ sd-uhs-ddr50;
+};
+
+ {
+ bootph-pre-ram;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+};
+
+ {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/imx8mp-debix-model-a.dts
b/arch/arm/dts/imx8mp-debix-model-a.dts
new file mode 100644
index 00..58dae612b4
--- /dev/null
+++ b/arch/arm/dts/imx8mp-debix-model-a.dts
@@ -0,0 +1,507 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2019 NXP
+ * Copyright 2022 Ideas on Board Oy
+ */
+
+/dts-v1/;
+
+#include
+#include
+#include
+
+#include "imx8mp.dtsi"
+
+/ {
+ model = "Polyhex Debix Model A i.MX8MPlus board";
+ compatible = "polyhex,imx8mp-debix-model-a", "polyhex,imx8mp-debix",
"fsl,imx8mp";
+
+ chosen {
+ stdout-path =
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
The u-boot supports i2c-over-hid?
Hello, I would like to ask whether i2c-over-hid is not supported under u-boot at present. At present, we have this development need. I would like to ask whether it is feasible to transplant i2c-over-hid from kernel. If not, is there any other way?
[PATCH] docs: fix wrong proftool usage
Guide shows incorrect usage of proftool, which is confusing. If proftool is used w/o '-o' argument it complains like following $ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-ftrace > trace.dat Must provide trace data, System.map file and output file Usage: proftool [-cmtv] s/>/-o/ fixes it and proftool outputs decoded data to trace.dat Signed-off-by: Pavel Skripkin --- doc/develop/trace.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/doc/develop/trace.rst b/doc/develop/trace.rst index 8425d843e9..9bbe1345d2 100644 --- a/doc/develop/trace.rst +++ b/doc/develop/trace.rst @@ -100,7 +100,7 @@ Then run proftool to convert the trace information to ftrace format .. code-block:: console -$ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-ftrace >trace.dat +$ ./sandbox/tools/proftool -m sandbox/System.map -t trace dump-ftrace -o trace.dat Finally run kernelshark to display it (note it only works with `.dat` files!): -- 2.39.2
Re: [PATCH 2/3] net: add fastboot TCP support
Thank you for the comments. Fixed everything you mentioned in uploaded v2.
> Wow, that can really be that big? Or are you using u64 just because
> that is the size of the field?
I don't think any fastboot message can be that big. You're right,
using u64 to fit the field. Here is more information about packet
format
https://chromium.googlesource.com/aosp/platform/system/core/+/refs/heads/upstream/fastboot/#fastboot-data
On Sat, Apr 1, 2023 at 7:32 AM Simon Glass wrote:
>
> Hi Dmitrii,
>
> On Wed, 29 Mar 2023 at 09:31, Dmitrii Merkurev wrote:
> >
> > Known limitations are
> > 1. fastboot reboot doesn't work (answering OK but not rebooting)
> > 2. flashing isn't supported (TCP transport only limitation)
> >
> > The command syntax is
> > fastboot tcp
> >
> > Signed-off-by: Dmitrii Merkurev
> > Cc: Ying-Chun Liu (PaulLiu)
> > Cc: Simon Glass
> > Сс: Joe Hershberger
> > Сс: Ramon Fried
> > ---
> >
> > MAINTAINERS| 6 +-
> > cmd/fastboot.c | 25 +++-
> > drivers/fastboot/Kconfig | 7 +
> > drivers/fastboot/fb_common.c | 1 -
> > include/net.h | 3 +-
> > include/net/fastboot_tcp.h | 14 ++
> > include/net/{fastboot.h => fastboot_udp.h} | 2 +-
> > net/Makefile | 3 +-
> > net/fastboot_tcp.c | 143 +
> > net/{fastboot.c => fastboot_udp.c} | 4 +-
> > net/net.c | 17 ++-
> > 11 files changed, 210 insertions(+), 15 deletions(-)
> > create mode 100644 include/net/fastboot_tcp.h
> > rename include/net/{fastboot.h => fastboot_udp.h} (91%)
> > create mode 100644 net/fastboot_tcp.c
> > rename net/{fastboot.c => fastboot_udp.c} (99%)
>
> Reviewed-by: Simon Glass
>
> nits and a question below
>
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 91d40ea4b6..501d1147d9 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -978,10 +978,12 @@ F:cmd/fastboot.c
> > F: doc/android/fastboot*.rst
> > F: include/fastboot.h
> > F: include/fastboot-internal.h
> > -F: include/net/fastboot.h
> > +F: include/net/fastboot_tcp.h
> > +F: include/net/fastboot_udp.h
> > F: drivers/fastboot/
> > F: drivers/usb/gadget/f_fastboot.c
> > -F: net/fastboot.c
> > +F: net/fastboot_tcp.c
> > +F: net/fastboot_udp.c
> > F: test/dm/fastboot.c
> >
> > FPGA
> > diff --git a/cmd/fastboot.c b/cmd/fastboot.c
> > index 97dc02ce74..3d5ff951eb 100644
> > --- a/cmd/fastboot.c
> > +++ b/cmd/fastboot.c
> > @@ -26,7 +26,7 @@ static int do_fastboot_udp(int argc, char *const argv[],
> > return CMD_RET_FAILURE;
> > }
> >
> > - err = net_loop(FASTBOOT);
> > + err = net_loop(FASTBOOT_UDP);
> >
> > if (err < 0) {
> > printf("fastboot udp error: %d\n", err);
> > @@ -36,6 +36,26 @@ static int do_fastboot_udp(int argc, char *const argv[],
> > return CMD_RET_SUCCESS;
> > }
> >
> > +static int do_fastboot_tcp(int argc, char *const argv[],
> > + uintptr_t buf_addr, size_t buf_size)
> > +{
> > + int err;
> > +
> > + if (!IS_ENABLED(CONFIG_TCP_FUNCTION_FASTBOOT)) {
> > + pr_err("Fastboot TCP not enabled\n");
> > + return CMD_RET_FAILURE;
> > + }
> > +
> > + err = net_loop(FASTBOOT_TCP);
> > +
> > + if (err < 0) {
> > + printf("fastboot tcp error: %d\n", err);
> > + return CMD_RET_FAILURE;
> > + }
> > +
> > + return CMD_RET_SUCCESS;
> > +}
> > +
> > static int do_fastboot_usb(int argc, char *const argv[],
> >uintptr_t buf_addr, size_t buf_size)
> > {
> > @@ -141,7 +161,8 @@ NXTARG:
> >
> > if (!strcmp(argv[1], "udp"))
> > return do_fastboot_udp(argc, argv, buf_addr, buf_size);
> > -
> > + if (!strcmp(argv[1], "tcp"))
> > + return do_fastboot_tcp(argc, argv, buf_addr, buf_size);
> > if (!strcmp(argv[1], "usb")) {
> > argv++;
> > argc--;
> > diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
> > index eefa34779c..c07df8369e 100644
> > --- a/drivers/fastboot/Kconfig
> > +++ b/drivers/fastboot/Kconfig
> > @@ -28,6 +28,13 @@ config UDP_FUNCTION_FASTBOOT_PORT
> > help
> > The fastboot protocol requires a UDP port number.
> >
> > +config TCP_FUNCTION_FASTBOOT
> > + depends on NET
> > + select FASTBOOT
> > + bool "Enable fastboot protocol over TCP"
> > + help
> > + This enables the fastboot protocol over TCP.
>
> Please can you add some more help, like a link to the protocol and
> what it is used for?
>
> > +
> > if FASTBOOT
> >
> > config FASTBOOT_BUF_ADDR
> > diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c
> > index 57b6182c46..dde3cda78f 100644
[PATCH] sandbox: disable tracing before unmapping RAM
Currently doing 'reset' command in sandbox with tracing enabled causes SIGSEV ``` Hit any key to stop autoboot: 0 => => => reset resetting ... Segmentation fault (core dumped) ``` Tracing callback uses RAM buffer for storing tracing reports, but state_uninit() function unmaps whole RAM, which causes SIGSEV on umapped memory inside tracing subsystem. Fix it by disabling tracing before unmapping memory Signed-off-by: Pavel Skripkin --- arch/sandbox/cpu/state.c | 4 1 file changed, 4 insertions(+) diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index 69da378ab5..d8d5da25b1 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -525,6 +526,9 @@ int state_uninit(void) if (state->jumped_fname) os_unlink(state->jumped_fname); + /* Disable tracing before unmapping RAM */ + trace_set_enabled(0); + os_free(state->state_fdt); os_free(state->ram_buf); memset(state, '\0', sizeof(*state)); -- 2.39.2
[PATCH v2 3/3] net: share fastboot boot handle logic between transports
Introduce reboot, boot and continue commands support to
TCP fastboot by moving existing UDP logic into the common module.
Signed-off-by: Dmitrii Merkurev
Cc: Ying-Chun Liu (PaulLiu)
Cc: Simon Glass
Сс: Joe Hershberger
Сс: Ramon Fried
Reviewed-by: Simon Glass
Reviewed-by: Ramon Fried
---
drivers/fastboot/fb_common.c | 32
include/fastboot.h | 9 +
net/fastboot_tcp.c | 5 -
net/fastboot_udp.c | 29 +
4 files changed, 46 insertions(+), 29 deletions(-)
diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c
index dde3cda78f..621146bc6b 100644
--- a/drivers/fastboot/fb_common.c
+++ b/drivers/fastboot/fb_common.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
/**
* fastboot_buf_addr - base address of the fastboot download buffer
@@ -155,6 +156,37 @@ void fastboot_boot(void)
}
}
+/**
+ * fastboot_handle_boot() - Shared implementation of system reaction to
+ * fastboot commands
+ *
+ * Making desceisions about device boot state (stay in fastboot, reboot
+ * to bootloader, reboot to OS, etc).
+ */
+void fastboot_handle_boot(int command, bool success)
+{
+ if (!success)
+ return;
+
+ switch (command) {
+ case FASTBOOT_COMMAND_BOOT:
+ fastboot_boot();
+ net_set_state(NETLOOP_SUCCESS);
+ break;
+
+ case FASTBOOT_COMMAND_CONTINUE:
+ net_set_state(NETLOOP_SUCCESS);
+ break;
+
+ case FASTBOOT_COMMAND_REBOOT:
+ case FASTBOOT_COMMAND_REBOOT_BOOTLOADER:
+ case FASTBOOT_COMMAND_REBOOT_FASTBOOTD:
+ case FASTBOOT_COMMAND_REBOOT_RECOVERY:
+ do_reset(NULL, 0, 0, NULL);
+ break;
+ }
+}
+
/**
* fastboot_set_progress_callback() - set progress callback
*
diff --git a/include/fastboot.h b/include/fastboot.h
index 07f4c8fa71..296451f89d 100644
--- a/include/fastboot.h
+++ b/include/fastboot.h
@@ -123,6 +123,15 @@ void fastboot_init(void *buf_addr, u32 buf_size);
*/
void fastboot_boot(void);
+/**
+ * fastboot_handle_boot() - Shared implementation of system reaction to
+ * fastboot commands
+ *
+ * Making desceisions about device boot state (stay in fastboot, reboot
+ * to bootloader, reboot to OS, etc).
+ */
+void fastboot_handle_boot(int command, bool success);
+
/**
* fastboot_handle_command() - Handle fastboot command
*
diff --git a/net/fastboot_tcp.c b/net/fastboot_tcp.c
index b5613b6aa2..2eb52ea256 100644
--- a/net/fastboot_tcp.c
+++ b/net/fastboot_tcp.c
@@ -73,6 +73,7 @@ static void fastboot_tcp_handler_ipv4(uchar *pkt, u16 dport,
u32 tcp_seq_num, u32 tcp_ack_num,
u8 action, unsigned int len)
{
+ int fastboot_command_id;
u64 command_size;
u8 tcp_fin = action & TCP_FIN;
u8 tcp_push = action & TCP_PUSH;
@@ -115,8 +116,10 @@ static void fastboot_tcp_handler_ipv4(uchar *pkt, u16
dport,
break;
}
strlcpy(command, pkt, len + 1);
- fastboot_handle_command(command, response);
+ fastboot_command_id = fastboot_handle_command(command,
response);
fastboot_tcp_send_message(response, strlen(response));
+ fastboot_handle_boot(fastboot_command_id,
+strncmp("OKAY", response, 4) == 0);
}
break;
case FASTBOOT_DISCONNECTING:
diff --git a/net/fastboot_udp.c b/net/fastboot_udp.c
index 27e779d8e0..389a5b45f5 100644
--- a/net/fastboot_udp.c
+++ b/net/fastboot_udp.c
@@ -209,39 +209,12 @@ static void fastboot_send(struct fastboot_header header,
char *fastboot_data,
net_send_udp_packet(net_server_ethaddr, fastboot_remote_ip,
fastboot_remote_port, fastboot_our_port, len);
- /* Continue boot process after sending response */
- if (!strncmp("OKAY", response, 4)) {
- switch (cmd) {
- case FASTBOOT_COMMAND_BOOT:
- boot_downloaded_image();
- break;
-
- case FASTBOOT_COMMAND_CONTINUE:
- net_set_state(NETLOOP_SUCCESS);
- break;
-
- case FASTBOOT_COMMAND_REBOOT:
- case FASTBOOT_COMMAND_REBOOT_BOOTLOADER:
- case FASTBOOT_COMMAND_REBOOT_FASTBOOTD:
- case FASTBOOT_COMMAND_REBOOT_RECOVERY:
- do_reset(NULL, 0, 0, NULL);
- break;
- }
- }
+ fastboot_handle_boot(cmd, strncmp("OKAY", response, 4) == 0);
if (!strncmp("OKAY", response, 4) || !strncmp("FAIL", response, 4))
cmd = -1;
}
-/**
- * boot_downloaded_image() - Boots into downloaded image.
- */
[PATCH v2 2/3] net: add fastboot TCP support
Known limitations are
1. fastboot reboot doesn't work (answering OK but not rebooting)
2. flashing isn't supported (TCP transport only limitation)
The command syntax is
fastboot tcp
Signed-off-by: Dmitrii Merkurev
Cc: Ying-Chun Liu (PaulLiu)
Cc: Simon Glass
Сс: Joe Hershberger
Сс: Ramon Fried
Reviewed-by: Simon Glass
---
MAINTAINERS| 6 +-
cmd/fastboot.c | 25 -
drivers/fastboot/Kconfig | 14 +++
drivers/fastboot/fb_common.c | 1 -
include/net.h | 3 +-
include/net/fastboot.h | 21 -
include/net/fastboot_tcp.h | 14 +++
include/net/fastboot_udp.h | 14 +++
net/Makefile | 3 +-
net/fastboot_tcp.c | 143 +
net/{fastboot.c => fastboot_udp.c} | 4 +-
net/net.c | 17 +++-
12 files changed, 230 insertions(+), 35 deletions(-)
delete mode 100644 include/net/fastboot.h
create mode 100644 include/net/fastboot_tcp.h
create mode 100644 include/net/fastboot_udp.h
create mode 100644 net/fastboot_tcp.c
rename net/{fastboot.c => fastboot_udp.c} (99%)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4c17c6cb9f..e28d1f7ae0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -987,10 +987,12 @@ F:cmd/fastboot.c
F: doc/android/fastboot*.rst
F: include/fastboot.h
F: include/fastboot-internal.h
-F: include/net/fastboot.h
+F: include/net/fastboot_tcp.h
+F: include/net/fastboot_udp.h
F: drivers/fastboot/
F: drivers/usb/gadget/f_fastboot.c
-F: net/fastboot.c
+F: net/fastboot_tcp.c
+F: net/fastboot_udp.c
F: test/dm/fastboot.c
FPGA
diff --git a/cmd/fastboot.c b/cmd/fastboot.c
index 97dc02ce74..3d5ff951eb 100644
--- a/cmd/fastboot.c
+++ b/cmd/fastboot.c
@@ -26,7 +26,7 @@ static int do_fastboot_udp(int argc, char *const argv[],
return CMD_RET_FAILURE;
}
- err = net_loop(FASTBOOT);
+ err = net_loop(FASTBOOT_UDP);
if (err < 0) {
printf("fastboot udp error: %d\n", err);
@@ -36,6 +36,26 @@ static int do_fastboot_udp(int argc, char *const argv[],
return CMD_RET_SUCCESS;
}
+static int do_fastboot_tcp(int argc, char *const argv[],
+ uintptr_t buf_addr, size_t buf_size)
+{
+ int err;
+
+ if (!IS_ENABLED(CONFIG_TCP_FUNCTION_FASTBOOT)) {
+ pr_err("Fastboot TCP not enabled\n");
+ return CMD_RET_FAILURE;
+ }
+
+ err = net_loop(FASTBOOT_TCP);
+
+ if (err < 0) {
+ printf("fastboot tcp error: %d\n", err);
+ return CMD_RET_FAILURE;
+ }
+
+ return CMD_RET_SUCCESS;
+}
+
static int do_fastboot_usb(int argc, char *const argv[],
uintptr_t buf_addr, size_t buf_size)
{
@@ -141,7 +161,8 @@ NXTARG:
if (!strcmp(argv[1], "udp"))
return do_fastboot_udp(argc, argv, buf_addr, buf_size);
-
+ if (!strcmp(argv[1], "tcp"))
+ return do_fastboot_tcp(argc, argv, buf_addr, buf_size);
if (!strcmp(argv[1], "usb")) {
argv++;
argc--;
diff --git a/drivers/fastboot/Kconfig b/drivers/fastboot/Kconfig
index eefa34779c..a3df9aa3d0 100644
--- a/drivers/fastboot/Kconfig
+++ b/drivers/fastboot/Kconfig
@@ -4,6 +4,13 @@ config FASTBOOT
bool
imply ANDROID_BOOT_IMAGE
imply CMD_FASTBOOT
+ help
+ Fastboot is a protocol used in Android devices for
+ communicating between the device and a computer during
+ the bootloader stage. It allows the user to flash the
+ device firmware and unlock the bootloader.
+ More information about the protocol and usecases:
+
https://android.googlesource.com/platform/system/core/+/refs/heads/master/fastboot/
config USB_FUNCTION_FASTBOOT
bool "Enable USB fastboot gadget"
@@ -28,6 +35,13 @@ config UDP_FUNCTION_FASTBOOT_PORT
help
The fastboot protocol requires a UDP port number.
+config TCP_FUNCTION_FASTBOOT
+ depends on NET
+ select FASTBOOT
+ bool "Enable fastboot protocol over TCP"
+ help
+ This enables the fastboot protocol over TCP.
+
if FASTBOOT
config FASTBOOT_BUF_ADDR
diff --git a/drivers/fastboot/fb_common.c b/drivers/fastboot/fb_common.c
index 57b6182c46..dde3cda78f 100644
--- a/drivers/fastboot/fb_common.c
+++ b/drivers/fastboot/fb_common.c
@@ -15,7 +15,6 @@
#include
#include
#include
-#include
/**
* fastboot_buf_addr - base address of the fastboot download buffer
diff --git a/include/net.h b/include/net.h
index 399af5e064..63daab3731 100644
--- a/include/net.h
+++ b/include/net.h
@@ -505,7 +505,8 @@ extern int net_restart_wrap; /* Tried all
network devices */
enum proto_t {
BOOTP, RARP, ARP, TFTPGET, DHCP, PING, PING6, DNS, NFS, CDP, NETCONS,
- SNTP, TFTPSRV, TFTPPUT,
[PATCH v2 1/3] net: support being a TCP server to unblock TCP fastboot
Make following changes to unblock TCP fastboot support:
1. Implement being a TCP server support
2. Introduce dedicated TCP traffic handler (get rid of UDP signature)
3. Ensure seq_num and ack_num are respected in net_send_tcp_packet
function (make sure existing wget_cmd code is reflected with the fix)
Signed-off-by: Dmitrii Merkurev
Cc: Ying-Chun Liu (PaulLiu)
Cc: Simon Glass
Сс: Joe Hershberger
Сс: Ramon Fried
Reviewed-by: Ying-Chun Liu (PaulLiu)
Reviewed-by: Simon Glass
Reviewed-by: Ramon Fried
---
include/net/tcp.h | 16 +--
net/tcp.c | 115 +++---
net/wget.c| 43 -
3 files changed, 90 insertions(+), 84 deletions(-)
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 322551694f..c29d4ce24a 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -259,6 +259,7 @@ union tcp_build_pkt {
* enum tcp_state - TCP State machine states for connection
* @TCP_CLOSED: Need to send SYN to connect
* @TCP_SYN_SENT: Trying to connect, waiting for SYN ACK
+ * @TCP_SYN_RECEIVED: Initial SYN received, waiting for ACK
* @TCP_ESTABLISHED: both server & client have a connection
* @TCP_CLOSE_WAIT: Rec FIN, passed to app for FIN, ACK rsp
* @TCP_CLOSING: Rec FIN, sent FIN, ACK waiting for ACK
@@ -268,6 +269,7 @@ union tcp_build_pkt {
enum tcp_state {
TCP_CLOSED,
TCP_SYN_SENT,
+ TCP_SYN_RECEIVED,
TCP_ESTABLISHED,
TCP_CLOSE_WAIT,
TCP_CLOSING,
@@ -283,14 +285,18 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport,
int payload_len,
/**
* rxhand_tcp() - An incoming packet handler.
* @pkt: pointer to the application packet
- * @dport: destination UDP port
+ * @dport: destination TCP port
* @sip: source IP address
- * @sport: source UDP port
+ * @sport: source TCP port
+ * @tcp_seq_num: TCP sequential number
+ * @tcp_ack_num: TCP acknowledgment number
+ * @action: TCP action (SYN, ACK, FIN, etc)
* @len: packet length
*/
-typedef void rxhand_tcp(uchar *pkt, unsigned int dport,
- struct in_addr sip, unsigned int sport,
- unsigned int len);
+typedef void rxhand_tcp(uchar *pkt, u16 dport,
+ struct in_addr sip, u16 sport,
+ u32 tcp_seq_num, u32 tcp_ack_num,
+ u8 action, unsigned int len);
void tcp_set_tcp_handler(rxhand_tcp *f);
void rxhand_tcp_f(union tcp_build_pkt *b, unsigned int len);
diff --git a/net/tcp.c b/net/tcp.c
index 8d338c72e8..a713e1dd60 100644
--- a/net/tcp.c
+++ b/net/tcp.c
@@ -36,7 +36,6 @@ static u32 rmt_timestamp;
static u32 tcp_seq_init;
static u32 tcp_ack_edge;
-static u32 tcp_seq_max;
static int tcp_activity_count;
@@ -90,9 +89,10 @@ void tcp_set_tcp_state(enum tcp_state new_state)
current_tcp_state = new_state;
}
-static void dummy_handler(uchar *pkt, unsigned int dport,
- struct in_addr sip, unsigned int sport,
- unsigned int len)
+static void dummy_handler(uchar *pkt, u16 dport,
+ struct in_addr sip, u16 sport,
+ u32 tcp_seq_num, u32 tcp_ack_num,
+ u8 action, unsigned int len)
{
}
@@ -256,7 +256,7 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport,
int payload_len,
switch (action) {
case TCP_SYN:
debug_cond(DEBUG_DEV_PKT,
- "TCP Hdr:SYN (%pI4, %pI4, sq=%d, ak=%d)\n",
+ "TCP Hdr:SYN (%pI4, %pI4, sq=%u, ak=%u)\n",
_server_ip, _ip,
tcp_seq_num, tcp_ack_num);
tcp_activity_count = 0;
@@ -271,41 +271,46 @@ int tcp_set_tcp_header(uchar *pkt, int dport, int sport,
int payload_len,
current_tcp_state = TCP_SYN_SENT;
}
break;
+ case TCP_SYN | TCP_ACK:
case TCP_ACK:
pkt_hdr_len = IP_HDR_SIZE + net_set_ack_options(b);
b->ip.hdr.tcp_flags = action;
debug_cond(DEBUG_DEV_PKT,
- "TCP Hdr:ACK (%pI4, %pI4, s=%d, a=%d, A=%x)\n",
+ "TCP Hdr:ACK (%pI4, %pI4, s=%u, a=%u, A=%x)\n",
_server_ip, _ip, tcp_seq_num, tcp_ack_num,
action);
break;
case TCP_FIN:
debug_cond(DEBUG_DEV_PKT,
- "TCP Hdr:FIN (%pI4, %pI4, s=%d, a=%d)\n",
+ "TCP Hdr:FIN (%pI4, %pI4, s=%u, a=%u)\n",
_server_ip, _ip, tcp_seq_num, tcp_ack_num);
payload_len = 0;
pkt_hdr_len = IP_TCP_HDR_SIZE;
current_tcp_state = TCP_FIN_WAIT_1;
break;
-
+ case TCP_RST | TCP_ACK:
+ case TCP_RST:
+ debug_cond(DEBUG_DEV_PKT,
+ "TCP Hdr:RST (%pI4, %pI4, s=%u,
[PATCH V3 2/2] ARM: dts: rockchip: rk3588s-u-boot: Add rng node
From: Chris Morgan
Add a node for the trng found on RK3588 SoCs.
Changes in V3:
- Added Reviewed-By tag.
Changes in V2:
- None
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
---
arch/arm/dts/rk3588s-u-boot.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index f880f4a167..43aeeb4de3 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -43,6 +43,12 @@
reg = <0x07 0x10>;
};
};
+
+ rng: rng@fe378000 {
+ compatible = "rockchip,trngv1";
+ reg = <0x0 0xfe378000 0x0 0x200>;
+ status = "disabled";
+ };
};
{
--
2.34.1
[PATCH V3 1/2] rockchip: rng: add trngv1 for rk3588
From: Chris Morgan
This adds support for the TRNG found in the RK3588 SoC to the
rockchip_rng driver so that it can be used for things such as
seeding randomness to Linux.
Changes in V3:
- Moved notes from commit to cover letter.
- Added Reviewed-By tag.
Changes in V2:
- Modified Kconfig to note that the Rockchip RNG driver supports all
versions of the hardware (v1, v2, and the trng in the rk3588).
Signed-off-by: Lin Jinhan
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
---
drivers/rng/Kconfig| 5 +-
drivers/rng/rockchip_rng.c | 120 ++---
2 files changed, 114 insertions(+), 11 deletions(-)
diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
index 5dcf68176a..5deb5db5b7 100644
--- a/drivers/rng/Kconfig
+++ b/drivers/rng/Kconfig
@@ -58,8 +58,9 @@ config RNG_ROCKCHIP
bool "Enable random number generator for rockchip crypto rng"
depends on ARCH_ROCKCHIP && DM_RNG
help
- Enable random number generator for rockchip.This driver is
- support rng module of crypto v1 and crypto v2.
+ Enable random number generator for rockchip. This driver
+ supports the rng module of crypto v1, crypto v2, and the
+ trng module of the rk3588 series.
config RNG_IPROC200
bool "Broadcom iProc RNG200 random number generator"
diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c
index 800150f114..705b424cf3 100644
--- a/drivers/rng/rockchip_rng.c
+++ b/drivers/rng/rockchip_rng.c
@@ -43,9 +43,41 @@
#define CRYPTO_V2_RNG_DOUT_0 0x0410
/* end of CRYPTO V2 register define */
+/* start of TRNG V1 register define */
+#define TRNG_V1_CTRL 0x
+#define TRNG_V1_CTRL_NOP _SBF(0, 0x00)
+#define TRNG_V1_CTRL_RAND _SBF(0, 0x01)
+#define TRNG_V1_CTRL_SEED _SBF(0, 0x02)
+
+#define TRNG_V1_MODE 0x0008
+#define TRNG_V1_MODE_128_BIT _SBF(3, 0x00)
+#define TRNG_V1_MODE_256_BIT _SBF(3, 0x01)
+
+#define TRNG_V1_IE 0x0010
+#define TRNG_V1_IE_GLBL_EN BIT(31)
+#define TRNG_V1_IE_SEED_DONE_ENBIT(1)
+#define TRNG_V1_IE_RAND_RDY_EN BIT(0)
+
+#define TRNG_V1_ISTAT 0x0014
+#define TRNG_V1_ISTAT_RAND_RDY BIT(0)
+
+/* RAND0 ~ RAND7 */
+#define TRNG_V1_RAND0 0x0020
+#define TRNG_V1_RAND7 0x003C
+
+#define TRNG_V1_AUTO_RQSTS 0x0060
+
+#define TRNG_V1_VERSION0x00F0
+#define TRNG_v1_VERSION_CODE 0x46BC
+/* end of TRNG V1 register define */
+
#define RK_RNG_TIME_OUT5 /* max 50ms */
+#define trng_write(pdata, pos, val)writel(val, (pdata)->base + (pos))
+#define trng_read(pdata, pos) readl((pdata)->base + (pos))
+
struct rk_rng_soc_data {
+ int (*rk_rng_init)(struct udevice *dev);
int (*rk_rng_read)(struct udevice *dev, void *data, size_t len);
};
@@ -75,7 +107,7 @@ static int rk_rng_read_regs(fdt_addr_t addr, void *buf,
size_t size)
return 0;
}
-static int rk_v1_rng_read(struct udevice *dev, void *data, size_t len)
+static int rk_cryptov1_rng_read(struct udevice *dev, void *data, size_t len)
{
struct rk_rng_plat *pdata = dev_get_priv(dev);
u32 reg = 0;
@@ -106,7 +138,7 @@ exit:
return 0;
}
-static int rk_v2_rng_read(struct udevice *dev, void *data, size_t len)
+static int rk_cryptov2_rng_read(struct udevice *dev, void *data, size_t len)
{
struct rk_rng_plat *pdata = dev_get_priv(dev);
u32 reg = 0;
@@ -140,6 +172,63 @@ exit:
return retval;
}
+static int rk_trngv1_init(struct udevice *dev)
+{
+ u32 status, version;
+ u32 auto_reseed_cnt = 1000;
+ struct rk_rng_plat *pdata = dev_get_priv(dev);
+
+ version = trng_read(pdata, TRNG_V1_VERSION);
+ if (version != TRNG_v1_VERSION_CODE) {
+ printf("wrong trng version, expected = %08x, actual = %08x",
+ TRNG_V1_VERSION, version);
+ return -EFAULT;
+ }
+
+ /* wait in case of RND_RDY triggered at firs power on */
+ readl_poll_timeout(pdata->base + TRNG_V1_ISTAT, status,
+ (status & TRNG_V1_ISTAT_RAND_RDY),
+ RK_RNG_TIME_OUT);
+
+ /* clear RAND_RDY flag for first power on */
+ trng_write(pdata, TRNG_V1_ISTAT, status);
+
+ /* auto reseed after (auto_reseed_cnt * 16) byte rand generate */
+ trng_write(pdata, TRNG_V1_AUTO_RQSTS, auto_reseed_cnt);
+
+ return 0;
+}
+
+static int rk_trngv1_rng_read(struct udevice *dev, void *data, size_t len)
+{
+ struct rk_rng_plat *pdata = dev_get_priv(dev);
+ u32 reg = 0;
+ int retval;
+
+ if (len > RK_HW_RNG_MAX)
+
[PATCH V3 0/2] Add RK3588 TRNG
From: Chris Morgan Add support for the RK3588 TRNG. The code was taken directly from the Rockchip BSP U-Boot source. This code was taken wholesale from the Rockchip BSP U-Boot source located here: https://github.com/rockchip-linux/u-boot/commit/09f31aed858c36a8a5ee20789712e65bb4762068 Tested on an Indiedroid Nova with an RK3588s and a Radxa Rock 5B with an RK3588. Chris Morgan (2): rockchip: rng: add trngv1 for rk3588 ARM: dts: rockchip: rk3588s-u-boot: Add rng node arch/arm/dts/rk3588s-u-boot.dtsi | 6 ++ drivers/rng/Kconfig | 5 +- drivers/rng/rockchip_rng.c | 120 --- 3 files changed, 120 insertions(+), 11 deletions(-) -- 2.34.1
[PATCH] pci: pcie_dw_rockchip: release resources on failing probe
Implement a resource release mechanism on failing probe.
Without this, a strange situation can happen e.g. when init port fails,
or attempting to get the PHY fails, because the gpios have been
requested first, and if the user tries to do 'pci enum' again, the
driver will fail with 'can't find reset gpios' even if the gpios are
there, just because they were blocked by a previous probe attempt.
It is only natural to release the acquired resources if the probe fails,
just for consistency if nothing else.
This way on subsequent probe attempts, the user will get the same error
message, and not something different that doesn't make sense.
Signed-off-by: Eugen Hristev
---
drivers/pci/pcie_dw_rockchip.c | 41 +-
1 file changed, 30 insertions(+), 11 deletions(-)
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 9322e735b9c3..6155710a9f5f 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -375,29 +375,39 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
ret = reset_get_bulk(dev, >rsts);
if (ret) {
dev_err(dev, "Can't get reset: %d\n", ret);
- return ret;
+ goto rockchip_pcie_parse_dt_err_reset_get_bulk;
}
ret = clk_get_bulk(dev, >clks);
if (ret) {
dev_err(dev, "Can't get clock: %d\n", ret);
- return ret;
+ goto rockchip_pcie_parse_dt_err_clk_get_bulk;
}
ret = device_get_supply_regulator(dev, "vpcie3v3-supply",
>vpcie3v3);
if (ret && ret != -ENOENT) {
dev_err(dev, "failed to get vpcie3v3 supply (ret=%d)\n", ret);
- return ret;
+ goto rockchip_pcie_parse_dt_err_supply_regulator;
}
ret = generic_phy_get_by_index(dev, 0, >phy);
if (ret) {
dev_err(dev, "failed to get pcie phy (ret=%d)\n", ret);
- return ret;
+ goto rockchip_pcie_parse_dt_err_phy_get_by_index;
}
return 0;
+
+rockchip_pcie_parse_dt_err_phy_get_by_index:
+ /* regulators don't need release */
+rockchip_pcie_parse_dt_err_supply_regulator:
+ clk_release_bulk(>clks);
+rockchip_pcie_parse_dt_err_clk_get_bulk:
+ reset_release_bulk(>rsts);
+rockchip_pcie_parse_dt_err_reset_get_bulk:
+ dm_gpio_free(dev, >rst_gpio);
+ return ret;
}
/**
@@ -426,7 +436,7 @@ static int rockchip_pcie_probe(struct udevice *dev)
ret = rockchip_pcie_init_port(dev);
if (ret)
- return ret;
+ goto rockchip_pcie_probe_err_init_port;
dev_info(dev, "PCIE-%d: Link up (Gen%d-x%d, Bus%d)\n",
dev_seq(dev), pcie_dw_get_link_speed(>dw),
@@ -434,12 +444,21 @@ static int rockchip_pcie_probe(struct udevice *dev)
hose->first_busno);
- return pcie_dw_prog_outbound_atu_unroll(>dw,
- PCIE_ATU_REGION_INDEX0,
- PCIE_ATU_TYPE_MEM,
- priv->dw.mem.phys_start,
- priv->dw.mem.bus_start,
- priv->dw.mem.size);
+ ret = pcie_dw_prog_outbound_atu_unroll(>dw,
+ PCIE_ATU_REGION_INDEX0,
+ PCIE_ATU_TYPE_MEM,
+ priv->dw.mem.phys_start,
+ priv->dw.mem.bus_start,
+ priv->dw.mem.size);
+ if (!ret)
+ return ret;
+
+rockchip_pcie_probe_err_init_port:
+ clk_release_bulk(>clks);
+ reset_release_bulk(>rsts);
+ dm_gpio_free(dev, >rst_gpio);
+
+ return ret;
}
static const struct dm_pci_ops rockchip_pcie_ops = {
--
2.34.1
[PATCH 2/2] reset: rockchip: implement rk3588 lookup table
The current DT bindings for the rk3588 clock use a different ID than the
one that is supposed to be written to the hardware registers.
Thus, we cannot use directly the id provided in the phandle, but rather
use a lookup table to correctly setup the hardware.
This approach has been implemented already in Linux, by commit :
f1c506d152ff ("clk: rockchip: add clock controller for the RK3588")
Hence, implement a similar approach using the lookup table, and adapt
the existing reset driver to work with SoCs using lookup table.
The file rst-rk3588.c has been copied as much as possible from Linux.
Adapt the clk rk3588 driver as well to bind the reset driver with the
lookup table.
Signed-off-by: Eugen Hristev
---
arch/arm/include/asm/arch-rockchip/clock.h | 21 +
drivers/clk/rockchip/clk_rk3588.c | 2 +-
drivers/reset/Makefile | 2 +-
drivers/reset/reset-rockchip.c | 46 +-
drivers/reset/rst-rk3588.c | 854 +
5 files changed, 912 insertions(+), 13 deletions(-)
create mode 100644 drivers/reset/rst-rk3588.c
diff --git a/arch/arm/include/asm/arch-rockchip/clock.h
b/arch/arm/include/asm/arch-rockchip/clock.h
index f002ebcb7ac1..f01c5aeb71cb 100644
--- a/arch/arm/include/asm/arch-rockchip/clock.h
+++ b/arch/arm/include/asm/arch-rockchip/clock.h
@@ -194,5 +194,26 @@ int rockchip_get_clk(struct udevice **devp);
* Return: 0 success, or error value
*/
int rockchip_reset_bind(struct udevice *pdev, u32 reg_offset, u32 reg_number);
+/*
+ * rockchip_reset_bind_lut() - Bind soft reset device as child of clock device
+ *using a dedicated SoC lookup table
+ * @pdev: clock udevice
+ * @lookup_table: register lookup_table dedicated to SoC
+ * @reg_offset: the first offset in cru for softreset registers
+ * @reg_number: the reg numbers of softreset registers
+ * Return: 0 success, or error value
+ */
+int rockchip_reset_bind_lut(struct udevice *pdev, const int *lookup_table,
+ u32 reg_offset, u32 reg_number);
+/*
+ * rk3588_reset_bind_lut() - Bind soft reset device as child of clock device
+ * using dedicated RK3588 lookup table
+ *
+ * @pdev: clock udevice
+ * @reg_offset: the first offset in cru for softreset registers
+ * @reg_number: the reg numbers of softreset registers
+ * Return: 0 success, or error value
+ */
+int rk3588_reset_bind_lut(struct udevice *pdev, u32 reg_offset, u32
reg_number);
#endif
diff --git a/drivers/clk/rockchip/clk_rk3588.c
b/drivers/clk/rockchip/clk_rk3588.c
index c93c9c304d40..f972aa93d717 100644
--- a/drivers/clk/rockchip/clk_rk3588.c
+++ b/drivers/clk/rockchip/clk_rk3588.c
@@ -1994,7 +1994,7 @@ static int rk3588_clk_bind(struct udevice *dev)
#if CONFIG_IS_ENABLED(RESET_ROCKCHIP)
ret = offsetof(struct rk3588_cru, softrst_con[0]);
- ret = rockchip_reset_bind(dev, ret, 49158);
+ ret = rk3588_reset_bind_lut(dev, ret, 49158);
if (ret)
debug("Warning: software reset driver bind faile\n");
#endif
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 6c8b45ecbabf..163022eb0be1 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -16,7 +16,7 @@ obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
obj-$(CONFIG_RESET_AST2500) += reset-ast2500.o
obj-$(CONFIG_RESET_AST2600) += reset-ast2600.o
-obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o
+obj-$(CONFIG_RESET_ROCKCHIP) += reset-rockchip.o rst-rk3588.o
obj-$(CONFIG_RESET_MESON) += reset-meson.o
obj-$(CONFIG_RESET_SOCFPGA) += reset-socfpga.o
obj-$(CONFIG_RESET_MEDIATEK) += reset-mediatek.o
diff --git a/drivers/reset/reset-rockchip.c b/drivers/reset/reset-rockchip.c
index e0a95edd80ac..be256bf032b2 100644
--- a/drivers/reset/reset-rockchip.c
+++ b/drivers/reset/reset-rockchip.c
@@ -21,6 +21,7 @@
struct rockchip_reset_priv {
void __iomem *base;
+ const int *lut;
/* Rockchip reset reg locate at cru controller */
u32 reset_reg_offset;
/* Rockchip reset reg number */
@@ -30,11 +31,15 @@ struct rockchip_reset_priv {
static int rockchip_reset_request(struct reset_ctl *reset_ctl)
{
struct rockchip_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ unsigned long id = reset_ctl->id;
+
+ if (priv->lut)
+ id = priv->lut[id];
debug("%s(reset_ctl=%p) (dev=%p, id=%lu) (reg_num=%d)\n", __func__,
- reset_ctl, reset_ctl->dev, reset_ctl->id, priv->reset_reg_num);
+ reset_ctl, reset_ctl->dev, id, priv->reset_reg_num);
- if (reset_ctl->id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num)
+ if (id / ROCKCHIP_RESET_NUM_IN_REG >= priv->reset_reg_num)
return -EINVAL;
return 0;
@@ -43,12 +48,17 @@ static int rockchip_reset_request(struct reset_ctl
*reset_ctl)
static int rockchip_reset_assert(struct reset_ctl *reset_ctl)
{
struct
[PATCH 1/2] clk: rockchip: rk3588: add hardcoded assigned clocks values
The CRU is being probed with a default set of assigned clocks, which are not implemented in the driver at all. Hence, when clk_set_defaults is called, it fails with ENOENT. This would not be a problem, as the CRU still handles all the required clocks, and the assigned clocks are default configs which are preprogrammed or not required for Uboot operations. However, the rockchip reset driver is being bound by the same DT node as CRU, as the reset driver has no DT node. But, when probing the reset node, it will call again the clk_set_defaults for the CRU node, and failing because of missing those specific clocks in the rk3588 clock driver. To avoid this, simply implement a basic set/get that will just return success and the default corresponding rate for the required assigned clocks. As those clocks were not supported in Uboot, not required for Uboot operations, there is no need to do any different kind of initialization. Signed-off-by: Eugen Hristev --- drivers/clk/rockchip/clk_rk3588.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3588.c b/drivers/clk/rockchip/clk_rk3588.c index 41e31b61a55b..c93c9c304d40 100644 --- a/drivers/clk/rockchip/clk_rk3588.c +++ b/drivers/clk/rockchip/clk_rk3588.c @@ -1556,6 +1556,21 @@ static ulong rk3588_clk_get_rate(struct clk *clk) case TCLK_WDT0: rate = OSC_HZ; break; + case PCLK_PMU0_ROOT: + rate = 1; + break; + case HCLK_PMU_CM0_ROOT: + rate = 2; + break; + case ACLK_BUS_ROOT: + rate = 37500; + break; + case CLK_150M_SRC: + rate = 15000; + break; + case CLK_GPU: + rate = 2; + break; #ifndef CONFIG_SPL_BUILD case CLK_AUX16M_0: case CLK_AUX16M_1: @@ -1705,6 +1720,13 @@ static ulong rk3588_clk_set_rate(struct clk *clk, ulong rate) case TCLK_WDT0: ret = OSC_HZ; break; + case PCLK_PMU0_ROOT: + case CLK_GPU: + case HCLK_PMU_CM0_ROOT: + case ACLK_BUS_ROOT: + case CLK_150M_SRC: + ret = 0; + break; #ifndef CONFIG_SPL_BUILD case CLK_AUX16M_0: case CLK_AUX16M_1: -- 2.34.1
Re: [PATCH 10/10] arm: mach-k3: common: re-locate authentication for atf/optee
Hi,
On 13:58-20230412, Manorit Chawdhry wrote:
> For setting up the master firewalls present in the K3 SoCs, the arm64
> clusters need to be powered on.
>
> Re-locates the code for atf/optee authentication.
>
> Signed-off-by: Manorit Chawdhry
> ---
> arch/arm/mach-k3/common.c | 23 +--
> 1 file changed, 21 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
> index a2adb791f6c0..6e04cc7a24aa 100644
> --- a/arch/arm/mach-k3/common.c
> +++ b/arch/arm/mach-k3/common.c
> @@ -227,6 +227,21 @@ void __noreturn jump_to_image_no_args(struct
> spl_image_info *spl_image)
> if (ret)
> panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
>
> + if (IS_ENABLED(CONFIG_FIT_IMAGE_POST_PROCESS) &&
> + IS_ENABLED(CONFIG_SYS_K3_SPL_ATF)) {
This caused some build failures so will update this to #if which fixes
it along with changing CONFIG_FIT_IMAGE_POST_PROCESS to
CONFIG_SPL_FIT_IMAGE_POST_PROCESS.
> + for (int i = IMAGE_ID_ATF; i < IMAGE_ID_SPL; i++) {
will explicitely make the calls for authentication of atf and optee to avoid
the problems if enums change in future
> + void *image_addr =
> + (void *)fit_image_info[i].image_start;
> +
> + debug("%s: Authenticating image: addr=%x, size=%d,
> os=%s\n",
> + __func__, fit_image_info[i].image_start,
> + fit_image_info[i].image_len, image_os_match[i]);
> +
> + ti_secure_image_post_process(_addr,
> +
> _image_info[i].image_len);
> + }
> + }
> +
> if (!fit_image_info[IMAGE_ID_DM_FW].image_len &&
> !(size > 0 && valid_elf_image(loadaddr))) {
> shut_cpu = 1;
> @@ -288,9 +303,13 @@ void board_fit_image_post_process(const void *fit, int
> node, void **p_image,
> break;
> }
> }
> + /*
> + * Only DM and the DTBs are being authenticated here,
> + * rest will be authenticated when A72 cluster is up
> + */
> + if (i >= IMAGE_ID_SPL)
Instead of using this way will change to check specifically for atf and
optee so that it remains unaffected incase the enums change.
> #endif
> -
> - ti_secure_image_post_process(p_image, p_size);
> + ti_secure_image_post_process(p_image, p_size);
> }
> #endif
>
>
> --
> 2.34.1
>
Regards,
Manorit
Pull request: u-boot-sunxi/master for v2023.07
Hi Tom, please pull the sunxi/master branch, containing the first part of the 2023.07 changes. The biggest change is some refactoring of the H616 DRAM driver, which allows better fine-tuning for each board, and is the base for pending LPDDR3 and LPDDR4 support, needed by new boards. The sun8i-emac Ethernet driver sees some refactoring that enables it for the Allwinner D1 EMAC IP. The sunxi HDMI driver is now using more DT properties. Also the early SPL code now supports some odd H616 SoC variant. There are some more patches pending, that require the final review touches and some testing, I will send a separate PR for them later. The gitlab CI completed successfully, and I boot tested a few boards with different SoCs, via FEL and SD card, into Linux. Thanks, Andre === The following changes since commit 9e804638bfe2693a908abf066ff66c251572afa7: Merge tag 'for-v2023-07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-i2c (2023-04-11 09:29:28 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-sunxi.git master for you to fetch changes up to 5fc892e83f34a0b082ff46d3cc411d6813c1f726: sunxi: A64: drop boot0 header reservation (2023-04-12 00:17:22 +0100) Andre Przywara (3): sunxi: boot0.h: allow RVBAR MMIO address customisation sunxi: arm64: boot0.h: runtime check for RVBAR address sunxi: A64: drop boot0 header reservation Jernej Skrabec (10): sunxi: Fix write to H616 DRAM CR register sunxi: cosmetic: Fix H616 DRAM driver code style sunxi: parameterize H616 DRAM ODT values sunxi: Convert H616 DRAM options to single setting sunxi: Always configure ODT on H616 DRAM sunxi: Make bit delay function in H616 DRAM code void sunxi: Parameterize bit delay code in H616 DRAM driver sunxi: Parameterize "unknown feature" in H616 DRAM driver sunxi: Parameterize some of H616 DDR3 timings sunxi: Add TPR2 parameter for H616 DRAM driver Samuel Holland (8): video: sunxi: dw-hdmi: Use DM for clock gates and resets video: sunxi: dw-hdmi: Use DM for HVCC regulator net: sun8i-emac: Add a structure for variant data net: sun8i-emac: Add a flag for RMII support net: sun8i-emac: Add a flag for the internal PHY switch net: sun8i-emac: Use common syscon setup for R40 net: sun8i-emac: Remove the SoC variant ID ARM: dts: sun6i: mixtile-loftq: Add USB1 VBUS regulator arch/arm/dts/sun6i-a31-mixtile-loftq.dts | 17 + arch/arm/include/asm/arch-sunxi/boot0.h| 21 +- arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h | 17 + arch/arm/mach-sunxi/Kconfig| 99 ++-- arch/arm/mach-sunxi/dram_sun50i_h616.c | 508 ++--- arch/arm/mach-sunxi/dram_timings/h616_ddr3_1333.c | 20 +- configs/a64-olinuxino-emmc_defconfig | 1 - configs/a64-olinuxino_defconfig| 1 - configs/amarula_a64_relic_defconfig| 1 - configs/bananapi_m64_defconfig | 1 - configs/nanopi_a64_defconfig | 1 - configs/oceanic_5205_5inmfd_defconfig | 1 - configs/orangepi_win_defconfig | 1 - configs/orangepi_zero2_defconfig | 8 +- configs/pine64_plus_defconfig | 1 - configs/sopine_baseboard_defconfig | 1 - configs/x96_mate_defconfig | 7 + drivers/net/sun8i_emac.c | 96 ++-- drivers/video/sunxi/sunxi_dw_hdmi.c| 36 +- 19 files changed, 564 insertions(+), 274 deletions(-)
Re: [PATCH v11 05/10] arm_ffa: introduce armffa command
On Wed, Apr 12, 2023 at 10:00:38PM +0200, Heinrich Schuchardt wrote: > > > Am 12. April 2023 17:53:23 MESZ schrieb Abdellatif El Khlifi > : > >On Wed, Apr 12, 2023 at 04:02:43PM +0200, Heinrich Schuchardt wrote: > >> On 4/12/23 11:42, Abdellatif El Khlifi wrote: > >> > Provide armffa command showcasing the use of the U-Boot FF-A support > >> > > >> > armffa is a command showcasing how to invoke FF-A operations. > >> > This provides a guidance to the client developers on how to > >> > call the FF-A bus interfaces. The command also allows to gather secure > >> > partitions information and ping these partitions. The command is also > >> > helpful in testing the communication with secure partitions. > >> > > >> > For more details please refer to the command documentation [1]. > >> > > >> > [1]: doc/usage/cmd/armffa.rst > >> > > >> > Signed-off-by: Abdellatif El Khlifi > >> > Cc: Tom Rini > >> > Cc: Simon Glass > >> > Cc: Ilias Apalodimas > >> > Cc: Jens Wiklander > >> > Cc: Heinrich Schuchardt > >> > > >> > --- > >> > Changelog: > >> > === > >> > > >> > v11: > >> > > >> > * use U_BOOT_CMD_WITH_SUBCMDS > >> > * address nits > >> > > >> > v10: > >> > > >> > * use the FF-A driver Uclass operations > >> > * use uclass_first_device() > >> > * address nits > >> > > >> > v9: > >> > > >> > * remove manual FF-A discovery and use DM > >> > * use DM class APIs to probe and interact with the FF-A bus > >> > * add doc/usage/cmd/armffa.rst > >> > > >> > v8: > >> > > >> > * update partition_info_get() second argument to be an SP count > >> > * pass NULL device pointer to the FF-A bus discovery and operations > >> > > >> > v7: > >> > > >> > * adapt do_ffa_dev_list() following the recent update on > >> >uclass_first_device/uclass_next_device functions (they return void > >> > now) > >> > * set armffa command to use 64-bit direct messaging > >> > > >> > v4: > >> > > >> > * remove pattern data in do_ffa_msg_send_direct_req > >> > > >> > v3: > >> > > >> > * use the new driver interfaces (partition_info_get, sync_send_receive) > >> >in armffa command > >> > > >> > v2: > >> > > >> > * replace use of ffa_helper_init_device function by > >> > ffa_helper_bus_discover > >> > > >> > v1: > >> > > >> > * introduce armffa command > >> > > >> > MAINTAINERS | 2 + > >> > cmd/Kconfig | 10 ++ > >> > cmd/Makefile | 2 + > >> > cmd/armffa.c | 212 +++ > >> > doc/arch/arm64.ffa.rst | 7 + > >> > doc/usage/cmd/armffa.rst | 105 +++ > >> > doc/usage/index.rst | 1 + > >> > drivers/firmware/arm-ffa/Kconfig | 1 + > >> > 8 files changed, 340 insertions(+) > >> > create mode 100644 cmd/armffa.c > >> > create mode 100644 doc/usage/cmd/armffa.rst > >> > > >> > diff --git a/MAINTAINERS b/MAINTAINERS > >> > index 76f0f276ce..c64804ca2d 100644 > >> > --- a/MAINTAINERS > >> > +++ b/MAINTAINERS > >> > @@ -269,7 +269,9 @@ F: configs/cortina_presidio-asic-pnand_defconfig > >> > ARM FF-A > >> > M: Abdellatif El Khlifi > >> > S: Maintained > >> > +F: cmd/armffa.c > >> > F: doc/arch/arm64.ffa.rst > >> > +F: doc/usage/cmd/armffa.rst > >> > F: drivers/firmware/arm-ffa/ > >> > F: include/arm_ffa.h > >> > F: include/sandbox_arm_ffa.h > >> > diff --git a/cmd/Kconfig b/cmd/Kconfig > >> > index 8c9b430f99..4cb0b2c167 100644 > >> > --- a/cmd/Kconfig > >> > +++ b/cmd/Kconfig > >> > @@ -934,6 +934,16 @@ endmenu > >> > > >> > menu "Device access commands" > >> > > >> > +config CMD_ARMFFA > >> > +bool "Arm FF-A test command" > >> > +depends on ARM_FFA_TRANSPORT > >> > +help > >> > + Provides a test command for the FF-A support > >> > + supported options: > >> > +- Listing the partition(s) info > >> > +- Sending a data pattern to the specified partition > >> > +- Displaying the arm_ffa device info > >> > + > >> > config CMD_ARMFLASH > >> > #depends on FLASH_CFI_DRIVER > >> > bool "armflash" > >> > diff --git a/cmd/Makefile b/cmd/Makefile > >> > index e032091621..9130b9078d 100644 > >> > --- a/cmd/Makefile > >> > +++ b/cmd/Makefile > >> > @@ -12,6 +12,8 @@ obj-y += panic.o > >> > obj-y += version.o > >> > > >> > # command > >> > + > >> > +obj-$(CONFIG_CMD_ARMFFA) += armffa.o > >> > obj-$(CONFIG_CMD_ACPI) += acpi.o > >> > obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o > >> > obj-$(CONFIG_CMD_AES) += aes.o > >> > diff --git a/cmd/armffa.c b/cmd/armffa.c > >> > new file mode 100644 > >> > index 00..ab88412c7d > >> > --- /dev/null > >> > +++ b/cmd/armffa.c > >> > @@ -0,0 +1,212 @@ > >> > +// SPDX-License-Identifier: GPL-2.0+ > >> > +/* > >> > + * Copyright 2022-2023 Arm Limited and/or its affiliates > >> > > >> > + * > >> > + * Authors: > >> > + * Abdellatif El Khlifi >
Re: [PATCH] riscv: Add a 64-bit image type
On Mon, Apr 10, 2023 at 3:25 PM Rick Chen wrote: > > > From: Simon Glass > > Sent: Monday, April 03, 2023 4:28 AM > > To: U-Boot Mailing List > > Cc: Sean Anderson ; Bin Meng ; Rick > > Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊) > > ; Simon Glass ; Andre Przywara > > ; Marc Kleine-Budde ; > > SESA644425 ; Samuel Holland ; > > Steven Lawrance > > Subject: [PATCH] riscv: Add a 64-bit image type > > > > At present it is not possible to know whether an image can be booted by a > > 32- or 64-bit bootloader. This means that U-Boot may attempt to boot the > > wrong image. This may cause a crash which might be hard to debug. > > > > Add a new property to make this explicit. > > > > The existing 'RISC-V' is now taken to mean 32-bit. > > > > Signed-off-by: Simon Glass > > --- > > > > boot/image.c| 3 ++- > > include/image.h | 3 ++- > > 2 files changed, 4 insertions(+), 2 deletions(-) > > Reviewed-by: Rick Chen This might create compatibility issues if the shipped host tool (mkimage) does not match U-Boot version. Any idea how to avoid that? Regards, Bin
Re: [PATCH v5 00/17] Basic StarFive JH7110 RISC-V SoC support
On 2023/4/13 17:03, Torsten Duwe wrote: > On Thu, 13 Apr 2023 10:05:28 +0800 > yanhong wang wrote: > >> the definition of DT refers to Linux and is consistent with the definition >> framework of Linux. > > This is one of the desired goals, to avoid confusion, usually. But note there > are already the > -u-boot.dtsi files; in this case it would be vice-versa: U-Boot could be > simple, the kernel > required a different treatment. As long as the resulting tree matches the > hardware! > >> The difference between 1.2A and 1.3B is the PHY type and phy clock delay >> configuration, >> which are reflected in DT, and the difference in defconfig is the >> configuration of the DT file. >> >> Is defconfig defined separately or merged? > > You are the implementer, this is your decision. You make a proposal, and it > will get accepted > or not. We only make suggestions, with the intention to improve the code. > Thanks. A defconfig matches a piece of hardware, which is more developer-friendly and less confusing, so defconfig is better defined separately. >> The EEPROM is being prepared and will be submitted as soon as possible. Is >> it necessary to >> incorporate EEPROM into this submission? >> >> When eeprom is supported, the MAC address will be read from eeprom. The >> board reversion >> can be read from eeprom, but phy clock delay configuration cannot be read >> from eeprom, only in DT. > > But the board revision number in EEPROM can be used to differentiate between > 1.2 and 1.3, right? > Yes, board reversion read from eeprom can distinguish between 1.2A and 1.3B. 1.2A and 1.3B are two sets of hardware, and the differences between the hardware are defined by DT, which is more concise and clear. > When I look at the code and my test results, this is my proposal to pull this > in, in order to > simplify things and avoid duplication. Whether you do so is up to you, see > above. Let me recap: > > * the device tree *must* match the hardware at hand. > > * the differences are minor and could be patched, Copy is error prone > and causes extra work. > > It is my firm conviction that this patch set does not introduce hardware > variants, and it would be > the task of the ethernet driver patch set to split the code (DT+defconfig) OR > to provide a patching > method. Maybe I find a few cycles to look at the EEPROM. > > Torsten
Re: [PATCH v5 00/17] Basic StarFive JH7110 RISC-V SoC support
On Thu, 13 Apr 2023 10:05:28 +0800 yanhong wang wrote: > the definition of DT refers to Linux and is consistent with the definition > framework of Linux. This is one of the desired goals, to avoid confusion, usually. But note there are already the -u-boot.dtsi files; in this case it would be vice-versa: U-Boot could be simple, the kernel required a different treatment. As long as the resulting tree matches the hardware! > The difference between 1.2A and 1.3B is the PHY type and phy clock delay > configuration, > which are reflected in DT, and the difference in defconfig is the > configuration of the DT file. > > Is defconfig defined separately or merged? You are the implementer, this is your decision. You make a proposal, and it will get accepted or not. We only make suggestions, with the intention to improve the code. > The EEPROM is being prepared and will be submitted as soon as possible. Is it > necessary to > incorporate EEPROM into this submission? > > When eeprom is supported, the MAC address will be read from eeprom. The board > reversion > can be read from eeprom, but phy clock delay configuration cannot be read > from eeprom, only in DT. But the board revision number in EEPROM can be used to differentiate between 1.2 and 1.3, right? When I look at the code and my test results, this is my proposal to pull this in, in order to simplify things and avoid duplication. Whether you do so is up to you, see above. Let me recap: * the device tree *must* match the hardware at hand. * the differences are minor and could be patched, Copy is error prone and causes extra work. It is my firm conviction that this patch set does not introduce hardware variants, and it would be the task of the ethernet driver patch set to split the code (DT+defconfig) OR to provide a patching method. Maybe I find a few cycles to look at the EEPROM. Torsten
Aw: [PATCH] pinctrl: mediatek: set R1/R0 in case pullen/pullsel succeeded
FYI...this issue affects only specific eMMC-Chips (vendor SEC) on the Bananapi-R2 (v1.2). i have a v1.1 with a Samsung eMMC where i had no problems with the missing pullups/pulldowns (maybe this has internal resistors) more information about this special case: https://forum.banana-pi.org/t/problem-trying-to-use-emmc/11253 tested the patch on my device for regressions...no problems Tested-By: Frank Wunderlich
Re: [PATCH v2 1/2] Boot var automatic management for removable medias
On Fri, Apr 07, 2023 at 12:13:36PM +0200, Heinrich Schuchardt wrote:
> On 4/5/23 02:06, Raymond Mao wrote:
> > Changes for complying to EFI spec §3.5.1.1
> > 'Removable Media Boot Behavior'.
> > Boot variables can be automatically generated during a removable
> > media is probed. At the same time, unused boot variables will be
> > detected and removed.
> > Related APIs are renamed and moved from cmd to lib for re-use
> > between eficonfig and bootmgr.
> >
> > Signed-off-by: Raymond Mao
>
> We should split the patch into moving and renaming functions and
> individual patches for each changed functionality.
>
> > ---
> > Changes in v2
> > - Ignore EFI_NOT_FOUND returned from
> >efi_bootmgr_update_media_device_boot_option which means no boot
> >options scanned.
> >
> > cmd/bootmenu.c| 2 +-
> > cmd/eficonfig.c | 408 +-
> > include/efi_config.h | 5 -
> > include/efi_loader.h | 11 +
> > lib/efi_loader/efi_bootmgr.c | 380
> > lib/efi_loader/efi_disk.c | 7 +
> > lib/efi_loader/efi_helper.c | 25 ++
> > lib/efi_loader/efi_variable.c | 6 +-
> > lib/efi_loader/efi_variable_tee.c | 3 +-
> > 9 files changed, 437 insertions(+), 410 deletions(-)
> >
> > diff --git a/cmd/bootmenu.c b/cmd/bootmenu.c
> > index 6baeedc69f..01daddca7b 100644
> > --- a/cmd/bootmenu.c
> > +++ b/cmd/bootmenu.c
> > @@ -351,7 +351,7 @@ static struct bootmenu_data *bootmenu_create(int delay)
> > * UEFI specification requires booting from removal media using
> > * a architecture-specific default image name such as
> > BOOTAA64.EFI.
> > */
> > - efi_ret = eficonfig_generate_media_device_boot_option();
> > + efi_ret = efi_bootmgr_update_media_device_boot_option();
> > if (efi_ret != EFI_SUCCESS && efi_ret != EFI_NOT_FOUND)
> > goto cleanup;
> >
> > diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
> > index 720f52b48b..82a80306f4 100644
> > --- a/cmd/eficonfig.c
> > +++ b/cmd/eficonfig.c
> > @@ -1134,43 +1134,6 @@ out:
> > return ret;
> > }
> >
> > -/**
> > - * eficonfig_get_unused_bootoption() - get unused "Boot" index
> > - *
> > - * @buf: pointer to the buffer to store boot option variable name
> > - * @buf_size: buffer size
> > - * @index: pointer to store the index in the BootOrder variable
> > - * Return: status code
> > - */
> > -efi_status_t eficonfig_get_unused_bootoption(u16 *buf, efi_uintn_t
> > buf_size,
> > -unsigned int *index)
> > -{
> > - u32 i;
> > - efi_status_t ret;
> > - efi_uintn_t size;
> > -
> > - if (buf_size < u16_strsize(u"Boot"))
> > - return EFI_BUFFER_TOO_SMALL;
> > -
> > - for (i = 0; i <= 0x; i++) {
> > - size = 0;
> > - efi_create_indexed_name(buf, buf_size, "Boot", i);
> > - ret = efi_get_variable_int(buf, _global_variable_guid,
> > - NULL, , NULL, NULL);
> > - if (ret == EFI_BUFFER_TOO_SMALL)
> > - continue;
> > - else
> > - break;
> > - }
> > -
> > - if (i > 0x)
> > - return EFI_OUT_OF_RESOURCES;
> > -
> > - *index = i;
> > -
> > - return EFI_SUCCESS;
> > -}
> > -
> > /**
> >* eficonfig_set_boot_option() - set boot option
> >*
> > @@ -1208,46 +1171,6 @@ static efi_status_t eficonfig_set_boot_option(u16
> > *varname, struct efi_device_pa
> > return ret;
> > }
> >
> > -/**
> > - * eficonfig_append_bootorder() - append new boot option in BootOrder
> > variable
> > - *
> > - * @index: "Boot" index to append to BootOrder variable
> > - * Return: status code
> > - */
> > -efi_status_t eficonfig_append_bootorder(u16 index)
> > -{
> > - u16 *bootorder;
> > - efi_status_t ret;
> > - u16 *new_bootorder = NULL;
> > - efi_uintn_t last, size, new_size;
> > -
> > - /* append new boot option */
> > - bootorder = efi_get_var(u"BootOrder", _global_variable_guid, );
> > - last = size / sizeof(u16);
> > - new_size = size + sizeof(u16);
> > - new_bootorder = calloc(1, new_size);
> > - if (!new_bootorder) {
> > - ret = EFI_OUT_OF_RESOURCES;
> > - goto out;
> > - }
> > - memcpy(new_bootorder, bootorder, size);
> > - new_bootorder[last] = index;
> > -
> > - ret = efi_set_variable_int(u"BootOrder", _global_variable_guid,
> > - EFI_VARIABLE_NON_VOLATILE |
> > - EFI_VARIABLE_BOOTSERVICE_ACCESS |
> > - EFI_VARIABLE_RUNTIME_ACCESS,
> > - new_size, new_bootorder, false);
> > - if (ret != EFI_SUCCESS)
> > - goto out;
> > -
> > -out:
> > - free(bootorder);
> > - free(new_bootorder);
> > -
> > - return ret;
> > -}
> > -
> > /**
> >*
Re: [PATCH v4 0/5] Add Broadcom Northstar basic support
On 4/7/23 15:40, Linus Walleij wrote: This adds the device trees and minimal code needed to run U-Boot on Broadcom Northstar SoCs. This is needed to properly boot the D-Link DIR-890L router as it refuse to directly boot compressed kernels bigger than 2MB, and well our compressed kernel is bigger than 2MB so let's put in U-Boot. While it is a bit tailored to this usecase (it can probably also be used with the DIR-885L without modifications) it forms a base that can be used to support more Northstar boards. I have this working with DIR-890L and OpenWrt: https://dflund.se/~triad/krad/dlink-dir-890l/ ChangeLog v3->v4: - Rewrote the algorithm detection patch to be more careful so as to fix Tom's regression. ChangeLog v1->v3: - Bundle with the iproc NAND and nand base pacthes as the iproc patch is a prerequisite. - Jump from v1->v3 as the other patches was at version v3. It is a bit of a mystery to me who can merge this patches... BRCM custodian? Hello Linus, Could you, please, add documentation describing installation under doc/board/broadcom/. Best regards Heinrich Linus Walleij (5): nand: brcmnand: add iproc support mtd: rawnand: nand_base: Handle algorithm selection arm: dts: Import device tree for Broadcom Northstar arm: Add support for the Broadcom Northstar SoCs board: Add new Broadcom Northstar board arch/arm/Kconfig | 22 +- arch/arm/dts/Makefile | 2 + arch/arm/dts/bcm5301x.dtsi | 581 + arch/arm/dts/ns-board.dts | 57 ++ board/broadcom/bcmns/Kconfig | 12 + board/broadcom/bcmns/MAINTAINERS | 6 + board/broadcom/bcmns/Makefile | 2 + board/broadcom/bcmns/ns.c | 60 +++ configs/bcmns_defconfig| 41 ++ drivers/mtd/nand/raw/Kconfig | 7 + drivers/mtd/nand/raw/brcmnand/Makefile | 1 + drivers/mtd/nand/raw/brcmnand/iproc_nand.c | 148 ++ drivers/mtd/nand/raw/nand_base.c | 29 +- include/configs/bcmns.h| 49 ++ include/dt-bindings/clock/bcm-nsp.h| 51 ++ 15 files changed, 1063 insertions(+), 5 deletions(-) create mode 100644 arch/arm/dts/bcm5301x.dtsi create mode 100644 arch/arm/dts/ns-board.dts create mode 100644 board/broadcom/bcmns/Kconfig create mode 100644 board/broadcom/bcmns/MAINTAINERS create mode 100644 board/broadcom/bcmns/Makefile create mode 100644 board/broadcom/bcmns/ns.c create mode 100644 configs/bcmns_defconfig create mode 100644 drivers/mtd/nand/raw/brcmnand/iproc_nand.c create mode 100644 include/configs/bcmns.h create mode 100644 include/dt-bindings/clock/bcm-nsp.h
Re: [PATCH v4] ARM: dts: imx7d-sdb-u-boot: Fix usdhc1 UHS operation
On 4/12/2023 8:41 PM, Fabio Estevam wrote:
From: Fabio Estevam
Commit 1a7904fdfa7d ("mmc: fsl_esdhc_imx: Use esdhc_soc_data
flags to set host caps") exposed the following SD card error:
U-Boot 2023.04-00652-g487e42f7bc5e (Apr 05 2023 - 22:14:21 -0300)
CPU: Freescale i.MX7D rev1.0 1000 MHz (running at 792 MHz)
CPU: Commercial temperature grade (0C to 95C) at 35C
Reset cause: POR
Model: Freescale i.MX7 SabreSD Board
Board: i.MX7D SABRESD in non-secure mode
DRAM: 1 GiB
Core: 100 devices, 19 uclasses, devicetree: separate
PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... Card did not respond to voltage
select! : -110
*** Warning - No block device, using default environment
The reason of the problem, as explained by Ye Li:
"When UHS is enabled in defconfig, the usdhc1 node in imx7d-sdb.dts does
not configure pad for VSELECT, also the data pad should be set to
100Mhz/200Mhz pin states."
Apply these changes into u-boot.dtsi for now. When these changes
reach the Linux mainline imx7d-sdb, they can be dropped from u-boot.dtsi.
This fixes UHS mode on the imx7d-sdb board.
Suggested-by: Ye Li
Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
---
Changes since v3:
- Fixed a typo on the pinctrl_usdhc1 node.
arch/arm/dts/imx7d-sdb-u-boot.dtsi | 51 ++
1 file changed, 51 insertions(+)
diff --git a/arch/arm/dts/imx7d-sdb-u-boot.dtsi
b/arch/arm/dts/imx7d-sdb-u-boot.dtsi
index b78358fa1397..913127b5e3c2 100644
--- a/arch/arm/dts/imx7d-sdb-u-boot.dtsi
+++ b/arch/arm/dts/imx7d-sdb-u-boot.dtsi
@@ -5,3 +5,54 @@
{
dr_mode = "peripheral";
};
+
+ {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-0 = <_usdhc1>, <_usdhc1_gpio>;
+ pinctrl-1 = <_usdhc1_100mhz>, <_usdhc1_gpio>;
+ pinctrl-2 = <_usdhc1_200mhz>, <_usdhc1_gpio>;
+};
+
+_usdhc1 {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x59
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x19
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
+ >;
+};
+
+ {
+ pinctrl_usdhc1_gpio: usdhc1gpiogrp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CD_B__GPIO5_IO00x59 /* CD */
+ MX7D_PAD_SD1_WP__GPIO5_IO1 0x59 /* WP */
+ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* vmmc */
+ MX7D_PAD_GPIO1_IO08__SD1_VSELECT0x59 /* VSELECT
*/
+ >;
+ };
+
+ pinctrl_usdhc1_100mhz: usdhc1100mhzgrp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
+ >;
+ };
+
+ pinctrl_usdhc1_200mhz: usdhc1200mhzgrp {
+ fsl,pins = <
+ MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
+ MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
+ MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
+ MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
+ MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
+ MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
+ >;
+ };
+};
[PATCH v2 8/9] riscv: spl: Remove relocation sections
U-Boot SPL is not relocable. Drop these relocation sections.
Signed-off-by: Bin Meng
---
Changes in v2:
- fix SPL build error
arch/riscv/cpu/start.S| 2 ++
arch/riscv/cpu/u-boot-spl.lds | 25 -
2 files changed, 2 insertions(+), 25 deletions(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 8cf25bb14a..dad22bfea8 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -253,6 +253,7 @@ spl_call_board_init_r:
j board_init_r
#endif
+#if !defined(CONFIG_SPL_BUILD)
/*
* void relocate_code(addr_sp, gd, addr_moni)
*
@@ -400,6 +401,7 @@ call_board_init_r:
* jump to it ...
*/
jr t4 /* jump to board_init_r() */
+#endif /* !defined(CONFIG_SPL_BUILD) */
#if CONFIG_IS_ENABLED(SMP)
hart_out_of_bounds_loop:
diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
index 993536302a..c3b4907905 100644
--- a/arch/riscv/cpu/u-boot-spl.lds
+++ b/arch/riscv/cpu/u-boot-spl.lds
@@ -32,14 +32,6 @@ SECTIONS
} > .spl_mem
. = ALIGN(4);
- .got : {
- __got_start = .;
- *(.got.plt) *(.got)
- __got_end = .;
- } > .spl_mem
-
- . = ALIGN(4);
-
__u_boot_list : {
KEEP(*(SORT(__u_boot_list*)));
} > .spl_mem
@@ -54,23 +46,6 @@ SECTIONS
. = ALIGN(4);
- /DISCARD/ : { *(.rela.plt*) }
- .rela.dyn : {
- __rel_dyn_start = .;
- *(.rela*)
- __rel_dyn_end = .;
- } > .spl_mem
-
- . = ALIGN(4);
-
- .dynsym : {
- __dyn_sym_start = .;
- *(.dynsym)
- __dyn_sym_end = .;
- } > .spl_mem
-
- . = ALIGN(4);
-
_end = .;
_image_binary_end = .;
--
2.34.1
[PATCH v2 5/9] makefile: riscv: Drop useless argument of prelink-riscv
The argv[2] is never used in prelink-riscv. Drop it. Signed-off-by: Bin Meng Reviewed-by: Rick Chen --- (no changes since v1) Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 5083beae35..eaaf7d267d 100644 --- a/Makefile +++ b/Makefile @@ -1761,7 +1761,7 @@ ifeq ($(CONFIG_KALLSYMS),y) endif ifeq ($(CONFIG_RISCV),y) - @tools/prelink-riscv $@ 0 + @tools/prelink-riscv $@ endif quiet_cmd_sym ?= SYM $@ -- 2.34.1
[PATCH v2 9/9] riscv: Update alignment for some sections in linker scripts
Some sections in the linker scripts are aligned to 4 bytes, which
may cause misaligned exception on some platforms, e.g.: clearing
the bss section on 64-bit hardware if __bss_start does not start
from a naturally 8 bytes aligned address.
Signed-off-by: Bin Meng
---
(no changes since v1)
arch/riscv/cpu/u-boot-spl.lds | 2 +-
arch/riscv/cpu/u-boot.lds | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds
index c3b4907905..d1113a59aa 100644
--- a/arch/riscv/cpu/u-boot-spl.lds
+++ b/arch/riscv/cpu/u-boot-spl.lds
@@ -44,7 +44,7 @@ SECTIONS
__binman_sym_end = .;
} > .spl_mem
- . = ALIGN(4);
+ . = ALIGN(8);
_end = .;
_image_binary_end = .;
diff --git a/arch/riscv/cpu/u-boot.lds b/arch/riscv/cpu/u-boot.lds
index 1c937aebee..15b5cbc585 100644
--- a/arch/riscv/cpu/u-boot.lds
+++ b/arch/riscv/cpu/u-boot.lds
@@ -57,7 +57,7 @@ SECTIONS
__efi_runtime_rel_stop = .;
}
- . = ALIGN(4);
+ . = ALIGN(8);
/DISCARD/ : { *(.rela.plt*) }
.rela.dyn : {
@@ -66,7 +66,7 @@ SECTIONS
__rel_dyn_end = .;
}
- . = ALIGN(4);
+ . = ALIGN(8);
.dynsym : {
__dyn_sym_start = .;
@@ -74,7 +74,7 @@ SECTIONS
__dyn_sym_end = .;
}
- . = ALIGN(4);
+ . = ALIGN(8);
_end = .;
--
2.34.1
[PATCH v2 7/9] riscv: Avoid updating the link register
board_init_r does not return for U-Boot SPL hence there is no need to update the link register when jumping to board_init_r. Signed-off-by: Bin Meng --- Changes in v2: - new patch: "riscv: Avoid updating the link register" arch/riscv/cpu/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index c09d1cb412..8cf25bb14a 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -250,7 +250,7 @@ spl_secondary_hart_stack_gd_setup: spl_call_board_init_r: mv a0, zero mv a1, zero - jal board_init_r + j board_init_r #endif /* -- 2.34.1
[PATCH v2 6/9] riscv: Change to use positive offset to access relocation entries
The codes currently skip the very first relocation entry, and have an inaccurate comment "skip first reserved entry" indicating that the first entry is reserved, but later it references the elements in the first relocation entry using a minus offset. Change to use a positive offset so that there is no need to skip the first relocation entry. Signed-off-by: Bin Meng --- (no changes since v1) arch/riscv/cpu/start.S | 19 +++ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 879bdc1803..c09d1cb412 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -302,17 +302,12 @@ fix_rela_dyn: add t1, t1, t6 /* t1 <- rela_dyn_start in RAM */ add t2, t2, t6 /* t2 <- rela_dyn_end in RAM */ -/* - * skip first reserved entry: address, type, addend - */ - j 10f - 6: - LREGt5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ + LREGt5, REGBYTES(t1)/* t5 <-- relocation info:type */ li t3, R_RISCV_RELATIVE/* reloc type R_RISCV_RELATIVE */ bne t5, t3, 8f /* skip non-RISCV_RELOC entries */ - LREGt3, -(REGBYTES*3)(t1) - LREGt5, -(REGBYTES)(t1) /* t5 <-- addend */ + LREGt3, 0(t1) + LREGt5, (REGBYTES * 2)(t1) /* t5 <-- addend */ add t5, t5, t6 /* t5 <-- location to fix up in RAM */ add t3, t3, t6 /* t3 <-- location to fix up in RAM */ SREGt5, 0(t3) @@ -328,19 +323,19 @@ fix_rela_dyn: li t3, RELOC_TYPE bne t5, t3, 10f /* skip non-addned entries */ - LREGt3, -(REGBYTES*3)(t1) + LREGt3, 0(t1) li t5, SYM_SIZE mul t0, t0, t5 add s5, t4, t0 - LREGt0, -(REGBYTES)(t1) /* t0 <-- addend */ + LREGt0, (REGBYTES * 2)(t1) /* t0 <-- addend */ LREGt5, REGBYTES(s5) add t5, t5, t0 add t5, t5, t6 /* t5 <-- location to fix up in RAM */ add t3, t3, t6 /* t3 <-- location to fix up in RAM */ SREGt5, 0(t3) 10: - addit1, t1, (REGBYTES*3) - ble t1, t2, 6b + addit1, t1, (REGBYTES * 3) + blt t1, t2, 6b /* * trap update -- 2.34.1
[PATCH v2 4/9] tools: prelink-riscv: Unmap the ELF image when done
The codes forget to call munmap() to unmap the ELF image that was mapped by previous mmap(). Signed-off-by: Bin Meng Reviewed-by: Rick Chen --- (no changes since v1) tools/prelink-riscv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/prelink-riscv.c b/tools/prelink-riscv.c index b0467949eb..43d6412ee9 100644 --- a/tools/prelink-riscv.c +++ b/tools/prelink-riscv.c @@ -118,5 +118,7 @@ int main(int argc, const char *const *argv) prelink_le32(data); } + munmap(data, st.st_size); + return 0; } -- 2.34.1
[PATCH v2 2/9] riscv: Optimize loading relocation type
't5' already contains relocation type so don't bother reloading it. Signed-off-by: Bin Meng Reviewed-by: Rick Chen --- (no changes since v1) arch/riscv/cpu/start.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 3c8344c345..879bdc1803 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -323,7 +323,6 @@ fix_rela_dyn: add t4, t4, t6 9: - LREGt5, -(REGBYTES*2)(t1) /* t5 <-- relocation info:type */ srlit0, t5, SYM_INDEX /* t0 <--- sym table index */ andit5, t5, 0xFF/* t5 <--- relocation type */ li t3, RELOC_TYPE -- 2.34.1
[PATCH v2 3/9] tools: prelink-riscv: Cosmetic style fixes
Some coding convention fixes.
Signed-off-by: Bin Meng
Reviewed-by: Rick Chen
---
(no changes since v1)
tools/prelink-riscv.inc | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/tools/prelink-riscv.inc b/tools/prelink-riscv.inc
index f2b5467f5b..57c0f655d4 100644
--- a/tools/prelink-riscv.inc
+++ b/tools/prelink-riscv.inc
@@ -30,7 +30,7 @@
#define cpu_to_target32 CONCAT3(cpu_to_, PRELINK_BYTEORDER, 32)
#define cpu_to_target64 CONCAT3(cpu_to_, PRELINK_BYTEORDER, 64)
-static void* get_offset_bonn (void* data, Elf_Phdr* phdrs, size_t phnum,
Elf_Addr addr)
+static void *get_offset_bonn(void *data, Elf_Phdr *phdrs, size_t phnum,
Elf_Addr addr)
{
Elf_Phdr *p;
@@ -67,13 +67,13 @@ static void prelink_bonn(void *data)
Elf_Rela *rela_dyn = NULL;
size_t rela_count = 0;
Elf_Sym *dynsym = NULL;
- for (dyn = dyns;; ++dyn) {
+ for (dyn = dyns; ; ++dyn) {
if (targetnn_to_cpu(dyn->d_tag) == DT_NULL)
break;
else if (targetnn_to_cpu(dyn->d_tag) == DT_RELA)
rela_dyn = get_offset_bonn(data, phdrs,
target16_to_cpu(ehdr->e_phnum), + targetnn_to_cpu(dyn->d_un.d_ptr));
else if (targetnn_to_cpu(dyn->d_tag) == DT_RELASZ)
- rela_count = targetnn_to_cpu(dyn->d_un.d_val) /
sizeof(Elf_Rela);
+ rela_count = targetnn_to_cpu(dyn->d_un.d_val) /
sizeof(Elf_Rela);
else if (targetnn_to_cpu(dyn->d_tag) == DT_SYMTAB)
dynsym = get_offset_bonn(data, phdrs,
target16_to_cpu(ehdr->e_phnum), + targetnn_to_cpu(dyn->d_un.d_ptr));
@@ -92,11 +92,11 @@ static void prelink_bonn(void *data)
continue;
if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_RELATIVE)
- *((uintnn_t*) buf) = r->r_addend;
+ *((uintnn_t *)buf) = r->r_addend;
else if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_32)
- *((uint32_t*) buf) =
cpu_to_target32(targetnn_to_cpu(dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value)
+ targetnn_to_cpu(r->r_addend));
+ *((uint32_t *)buf) =
cpu_to_target32(targetnn_to_cpu(dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value)
+ targetnn_to_cpu(r->r_addend));
else if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_64)
- *((uint64_t*) buf) =
cpu_to_target64(targetnn_to_cpu(dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value)
+ targetnn_to_cpu(r->r_addend));
+ *((uint64_t *)buf) =
cpu_to_target64(targetnn_to_cpu(dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value)
+ targetnn_to_cpu(r->r_addend));
}
}
--
2.34.1
[PATCH v2 1/9] riscv: Optimize source end address calculation in start.S
The __bss_start is the source end address hence load its address directly into register 't2' for optimization. Signed-off-by: Bin Meng Reviewed-by: Rick Chen --- (no changes since v1) arch/riscv/cpu/start.S | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 4687bca3c9..3c8344c345 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -283,9 +283,7 @@ stack_setup: beq t0, s4, clear_bss /* skip relocation */ mv t1, s4 /* t1 <- scratch for copy_loop */ - la t3, __bss_start - sub t3, t3, t0 /* t3 <- __bss_start_ofs */ - add t2, t0, t3 /* t2 <- source end address */ + la t2, __bss_start /* t2 <- source end address */ copy_loop: LREGt5, 0(t0) -- 2.34.1
Re: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support
чт, 13 квіт. 2023 р. о 02:07 Tom Warren пише: > > Svyatoslav, > > This series (patches 3 & 4, in particular) fails when applied to > u-boot-tegra/master TOT. Error snippet is below (from make > p2771--500_defconfig && make): > > CC arch/arm/mach-tegra/fuse.o > arch/arm/mach-tegra/fuse.c:14:10: fatal error: asm/arch/clock.h: No such file > or directory > #include > ^~ > compilation terminated. > scripts/Makefile.build:256: recipe for target 'arch/arm/mach-tegra/fuse.o' > failed > make[1]: *** [arch/arm/mach-tegra/fuse.o] Error 1 > Makefile:1845: recipe for target 'arch/arm/mach-tegra' failed > make: *** [arch/arm/mach-tegra] Error 2 Hello Tom. Thanks for your check. Issue was caused by non exposed headers for T186. I have fixed that in v2, I hope buildman will pass. Additionally I have modified grouper defconfig in such a way that it should pass even without device fragment. Best regards, Svyatoslav R. > > buildman/tegra also fails for that board, and 2 others. Removing those two > patches (3 & 4 in your Nexus7 patchset) gets make & buildman working again. > Buildman/tegra worked fine on the base u-boot-tegra/master repo (before I > applied your patchset w/git am). > > PTAL, > > Tom > > -Original Message- > From: Svyatoslav Ryhel > Sent: Wednesday, April 12, 2023 12:50 PM > To: Tom Warren ; Svyatoslav Ryhel ; > Marek Vasut ; Philippe Reynes > ; Marcel Ziswiler > ; Fabio Estevam ; Simon Glass > ; Jonas Schwöbel > Cc: u-boot@lists.denx.de > Subject: [PATCH v1 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support > > External email: Use caution opening links or attachments > > > This patchset adds support for native use of U-Boot on ASUS/Google Nexus 7 > (2012), aka grouper/tilapia as a replacement of vendor bootloader. Alongside > device bringup tegra requires few small patches: > - add gpio keyboard as stdin device > - make networking boot options optional > - add a small tool to generate SoC UID > > Jonas Schwöbel (1): > configs: tegra-common-post: make PXE and DHCP boot targets optional > > Svyatoslav Ryhel (3): > configs: tegra-common-post: add GPIO keyboard as STDIN device > ARM: tegra: add SoC UID calculation function > board: asus: grouper: add Google Nexus 7 (2012) support > > arch/arm/dts/Makefile | 3 + > arch/arm/dts/tegra30-asus-grouper-common.dtsi | 125 ++ > .../dts/tegra30-asus-nexus7-grouper-E1565.dts | 40 ++ > .../dts/tegra30-asus-nexus7-grouper-PM269.dts | 65 > .../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 40 ++ > arch/arm/include/asm/arch-tegra/fuse.h| 7 + > arch/arm/mach-tegra/Makefile | 2 +- > arch/arm/mach-tegra/fuse.c| 151 > arch/arm/mach-tegra/tegra30/Kconfig | 5 + > board/asus/grouper/Kconfig| 20 + > board/asus/grouper/MAINTAINERS| 6 + > board/asus/grouper/Makefile | 14 + > board/asus/grouper/grouper-spl-max.c | 46 +++ > board/asus/grouper/grouper-spl-ti.c | 42 ++ > board/asus/grouper/grouper.c | 209 ++ > board/asus/grouper/pinmux-config-grouper.h| 362 ++ > configs/grouper_E1565.config | 2 + > configs/grouper_PM269.config | 2 + > configs/grouper_common_defconfig | 85 > configs/tilapia.config| 3 + > include/configs/grouper.h | 68 > include/configs/tegra-common-post.h | 28 +- > 22 files changed, 1319 insertions(+), 6 deletions(-) create mode 100644 > arch/arm/dts/tegra30-asus-grouper-common.dtsi > create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts > create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts > create mode 100644 arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts > create mode 100644 arch/arm/mach-tegra/fuse.c create mode 100644 > board/asus/grouper/Kconfig create mode 100644 board/asus/grouper/MAINTAINERS > create mode 100644 board/asus/grouper/Makefile create mode 100644 > board/asus/grouper/grouper-spl-max.c > create mode 100644 board/asus/grouper/grouper-spl-ti.c > create mode 100644 board/asus/grouper/grouper.c create mode 100644 > board/asus/grouper/pinmux-config-grouper.h > create mode 100644 configs/grouper_E1565.config create mode 100644 > configs/grouper_PM269.config create mode 100644 > configs/grouper_common_defconfig create mode 100644 configs/tilapia.config > create mode 100644 include/configs/grouper.h > > -- > 2.37.2 >
[PATCH v2 4/4] board: asus: grouper: add Google Nexus 7 (2012) support
Nexus 7 is a mini tablet computer co-developed by Google and Asus
that runs the Android operating system. The Nexus 7 features a 7"
display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM and 8/16 GB
of internal storage.
This patch brings support for all 3 known ASUS/Google devices:
- Nexus 7 (2012) E1565
- Nexus 7 (2012) PM269
- Nexus 7 (2012) 3G - tilapia
Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel # ASUS Grouper E1565
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/dts/Makefile | 3 +
arch/arm/dts/tegra30-asus-grouper-common.dtsi | 125 ++
.../dts/tegra30-asus-nexus7-grouper-E1565.dts | 40 ++
.../dts/tegra30-asus-nexus7-grouper-PM269.dts | 65
.../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 40 ++
arch/arm/mach-tegra/tegra30/Kconfig | 5 +
board/asus/grouper/Kconfig| 22 ++
board/asus/grouper/MAINTAINERS| 6 +
board/asus/grouper/Makefile | 14 +
board/asus/grouper/grouper-spl-max.c | 46 +++
board/asus/grouper/grouper-spl-ti.c | 42 ++
board/asus/grouper/grouper.c | 209 ++
board/asus/grouper/pinmux-config-grouper.h| 362 ++
configs/grouper_E1565.config | 2 +
configs/grouper_PM269.config | 2 +
configs/grouper_common_defconfig | 84
configs/tilapia.config| 3 +
include/configs/grouper.h | 68
18 files changed, 1138 insertions(+)
create mode 100644 arch/arm/dts/tegra30-asus-grouper-common.dtsi
create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts
create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts
create mode 100644 arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts
create mode 100644 board/asus/grouper/Kconfig
create mode 100644 board/asus/grouper/MAINTAINERS
create mode 100644 board/asus/grouper/Makefile
create mode 100644 board/asus/grouper/grouper-spl-max.c
create mode 100644 board/asus/grouper/grouper-spl-ti.c
create mode 100644 board/asus/grouper/grouper.c
create mode 100644 board/asus/grouper/pinmux-config-grouper.h
create mode 100644 configs/grouper_E1565.config
create mode 100644 configs/grouper_PM269.config
create mode 100644 configs/grouper_common_defconfig
create mode 100644 configs/tilapia.config
create mode 100644 include/configs/grouper.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 337bee7e1e..7b523b3b3a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -227,6 +227,9 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
tegra20-ventana.dtb \
tegra20-colibri.dtb \
tegra30-apalis.dtb \
+ tegra30-asus-nexus7-grouper-PM269.dtb \
+ tegra30-asus-nexus7-grouper-E1565.dtb \
+ tegra30-asus-nexus7-tilapia-E1565.dtb \
tegra30-beaver.dtb \
tegra30-cardhu.dtb \
tegra30-colibri.dtb \
diff --git a/arch/arm/dts/tegra30-asus-grouper-common.dtsi
b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
new file mode 100644
index 00..21a3fadde2
--- /dev/null
+++ b/arch/arm/dts/tegra30-asus-grouper-common.dtsi
@@ -0,0 +1,125 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include
+
+#include "tegra30.dtsi"
+
+/ {
+ chosen {
+ stdout-path =
+ };
+
+ aliases {
+ i2c0 = _i2c;
+
+ mmc0 = /* eMMC */
+
+ rtc1 = "/rtc@7000e000";
+
+ usb0 =
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x4000>;
+ };
+
+ host1x@5000 {
+ dc@5420 {
+ nvidia,180-rotation;
+ rgb {
+ status = "okay";
+
+ nvidia,panel = <>;
+ };
+ };
+ };
+
+ gpio@6000d000 {
+ volume-buttons-hog {
+ gpio-hog;
+ gpios = ,
+ ;
+ output-low;
+ };
+ };
+
+ uarta: serial@70006000 {
+ status = "okay";
+ };
+
+ pwm: pwm@7000a000 {
+ status = "okay";
+ };
+
+ sdmmc4: sdhci@78000600 {
+ status = "okay";
+ bus-width = <8>;
+ non-removable;
+ };
+
+ usb1: usb@7d00 {
+ status = "okay";
+ dr_mode = "otg";
+ };
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+
+ enable-gpios = < TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ power-supply = <_5v0_bl>;
+ pwms = < 0 5>;
+
+ brightness-levels = <1 35 70 105 140 175 210 255>;
+ default-brightness-level = <5>;
+ };
+
+ /* PMIC has a built-in
[PATCH v2 3/4] ARM: tegra: add SoC UID calculation function
This is a small tool for calculation of SoC UID based on the same
Linux function. It can be further used for generation of device
unique data like mac address or exposing it as serial number.
Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565
Tested-by: Svyatoslav Ryhel # LG P895 T30
Signed-off-by: Svyatoslav Ryhel
---
arch/arm/include/asm/arch-tegra/fuse.h | 7 ++
arch/arm/mach-tegra/Makefile | 2 +-
arch/arm/mach-tegra/fuse.c | 151 +
3 files changed, 159 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-tegra/fuse.c
diff --git a/arch/arm/include/asm/arch-tegra/fuse.h
b/arch/arm/include/asm/arch-tegra/fuse.h
index 5b8e0bd8d1..f3f2ad8e3f 100644
--- a/arch/arm/include/asm/arch-tegra/fuse.h
+++ b/arch/arm/include/asm/arch-tegra/fuse.h
@@ -19,4 +19,11 @@ struct fuse_regs {
u32 security_mode; /* 0x1A0: FUSE_SECURITY_MODE */
};
+/**
+ * Calculate SoC UID
+ *
+ * Return: uid if ok, 0 on error
+ */
+unsigned long long tegra_chip_uid(void);
+
#endif /* ifndef _FUSE_H_ */
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 9147050b32..04e60ac853 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -14,7 +14,7 @@ endif
obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o
obj-y += board.o board2.o
-obj-y += cache.o
+obj-y += cache.o fuse.o
obj-$(CONFIG_TEGRA_CLKRST) += clock.o
obj-$(CONFIG_$(SPL_)TEGRA_CRYPTO) += crypto.o
obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
diff --git a/arch/arm/mach-tegra/fuse.c b/arch/arm/mach-tegra/fuse.c
new file mode 100644
index 00..2e99ae8ef7
--- /dev/null
+++ b/arch/arm/mach-tegra/fuse.c
@@ -0,0 +1,151 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2012-2013
+ * NVIDIA Corporation
+ *
+ * (C) Copyright 2022
+ * Svyatoslav Ryhel
+ */
+
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+
+#include "cpu.h"
+
+#define FUSE_UID_LOW 0x108
+#define FUSE_UID_HIGH 0x10c
+
+#define FUSE_VENDOR_CODE 0x200
+#define FUSE_FAB_CODE 0x204
+#define FUSE_LOT_CODE_00x208
+#define FUSE_LOT_CODE_10x20c
+#define FUSE_WAFER_ID 0x210
+#define FUSE_X_COORDINATE 0x214
+#define FUSE_Y_COORDINATE 0x218
+
+#define FUSE_VENDOR_CODE_MASK 0xf
+#define FUSE_FAB_CODE_MASK 0x3f
+#define FUSE_WAFER_ID_MASK 0x3f
+#define FUSE_X_COORDINATE_MASK 0x1ff
+#define FUSE_Y_COORDINATE_MASK 0x1ff
+
+static u32 tegra_fuse_readl(unsigned long offset)
+{
+ return readl(NV_PA_FUSE_BASE + offset);
+}
+
+static void tegra_set_fuse(void)
+{
+ u32 reg;
+
+ /*
+* Performed by downstream and is not
+* documented by TRM. Whithout setting
+* this bit fuse region will not work.
+*/
+ reg = readl_relaxed(NV_PA_CLK_RST_BASE + 0x48);
+ reg |= BIT(28);
+ writel(reg, NV_PA_CLK_RST_BASE + 0x48);
+
+ clock_enable(PERIPH_ID_FUSE);
+ udelay(2);
+ reset_set_enable(PERIPH_ID_FUSE, 0);
+}
+
+unsigned long long tegra_chip_uid(void)
+{
+ u64 uid = 0ull;
+ u32 reg;
+ u32 cid;
+ u32 vendor;
+ u32 fab;
+ u32 lot;
+ u32 wafer;
+ u32 x;
+ u32 y;
+ u32 i;
+
+ tegra_set_fuse();
+
+ /* This used to be so much easier in prior chips. Unfortunately, there
+ is no one-stop shopping for the unique id anymore. It must be
+ constructed from various bits of information burned into the fuses
+ during the manufacturing process. The 64-bit unique id is formed
+ by concatenating several bit fields. The notation used for the
+ various fields is with the UID composed
+ thusly:
+
+ Where:
+ FieldBits Position Data
+ ---
+ CID4 60 Chip id
+ VENDOR 4 56 Vendor code
+ FAB6 50 FAB code
+ LOT 26 24 Lot code (5-digit base-36-coded-decimal,
+ re-encoded to 26 bits binary)
+ WAFER 6 18 Wafer id
+ X 9 9 Wafer X-coordinate
+ Y 9 0 Wafer Y-coordinate
+ ---
+ Total 64
+ */
+
+ switch (tegra_get_chip()) {
+ case CHIPID_TEGRA20:
+ /* T20 has simple calculation */
+ return ((unsigned long long)tegra_fuse_readl(FUSE_UID_HIGH) <<
32ull) |
+ (unsigned long long)tegra_fuse_readl(FUSE_UID_LOW);
+ case CHIPID_TEGRA30:
+ /* T30 chip id is 0 */
+ cid = 0;
+ break;
+ case CHIPID_TEGRA114:
+ /* T11x chip id is 1 */
+ cid = 1;
+ break;
+
[PATCH v2 2/4] configs: tegra-common-post: make PXE and DHCP boot targets optional
From: Jonas Schwöbel Disabling the network related features in defconfig causes build to fail so make them optional. Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Jonas Schwöbel Signed-off-by: Svyatoslav Ryhel --- include/configs/tegra-common-post.h | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 2d5095639a..0d0965ecce 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -8,9 +8,21 @@ #define __TEGRA_COMMON_POST_H #if IS_ENABLED(CONFIG_CMD_USB) -# define BOOT_TARGET_USB(func) func(USB, usb, 0) +#define BOOT_TARGET_USB(func) func(USB, usb, 0) #else -# define BOOT_TARGET_USB(func) +#define BOOT_TARGET_USB(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) && CONFIG_IS_ENABLED(CMD_PXE) +#define BOOT_TARGET_PXE(func) func(PXE, pxe, na) +#else +#define BOOT_TARGET_PXE(func) +#endif + +#if CONFIG_IS_ENABLED(CMD_DHCP) +#define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) +#else +#define BOOT_TARGET_DHCP(func) #endif #ifndef BOOT_TARGET_DEVICES @@ -18,8 +30,8 @@ func(MMC, mmc, 1) \ func(MMC, mmc, 0) \ BOOT_TARGET_USB(func) \ - func(PXE, pxe, na) \ - func(DHCP, dhcp, na) + BOOT_TARGET_PXE(func) \ + BOOT_TARGET_DHCP(func) #endif #include -- 2.37.2
[PATCH v2 1/4] configs: tegra-common-post: add GPIO keyboard as STDIN device
GPIO keyboard is used on many newly upstreamed devices. Tested-by: Andreas Westman Dorcsak # ASUS Grouper E1565 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel --- include/configs/tegra-common-post.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index 991ffbb7df..2d5095639a 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -35,6 +35,12 @@ #define STDIN_KBD_USB "" #endif +#ifdef CONFIG_BUTTON_KEYBOARD +#define STDIN_BTN_KBD ",button-kbd" +#else +#define STDIN_BTN_KBD "" +#endif + #ifdef CONFIG_VIDEO #define STDOUT_VIDEO ",vidconsole" #else @@ -48,7 +54,7 @@ #endif #define TEGRA_DEVICE_SETTINGS \ - "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC "\0" \ + "stdin=serial" STDIN_KBD_KBC STDIN_KBD_USB STDOUT_CROS_EC STDIN_BTN_KBD "\0" \ "stdout=serial" STDOUT_VIDEO "\0" \ "stderr=serial" STDOUT_VIDEO "\0" \ "" -- 2.37.2
[PATCH v2 0/4] Tegra: add ASUS/Google Nexus 7 (2012) support
This patchset adds support for native use of U-Boot on ASUS/Google Nexus 7 (2012), aka grouper/tilapia as a replacement of vendor bootloader. Alongside device bringup tegra requires few small patches: - add gpio keyboard as stdin device - make networking boot options optional - add a small tool to generate SoC UID --- Changes from v1: - fix fuse headers for newer Tegra generations - allow grouper_common_defconfig to pass without fragments --- Jonas Schwöbel (1): configs: tegra-common-post: make PXE and DHCP boot targets optional Svyatoslav Ryhel (3): configs: tegra-common-post: add GPIO keyboard as STDIN device ARM: tegra: add SoC UID calculation function board: asus: grouper: add Google Nexus 7 (2012) support arch/arm/dts/Makefile | 3 + arch/arm/dts/tegra30-asus-grouper-common.dtsi | 125 ++ .../dts/tegra30-asus-nexus7-grouper-E1565.dts | 40 ++ .../dts/tegra30-asus-nexus7-grouper-PM269.dts | 65 .../dts/tegra30-asus-nexus7-tilapia-E1565.dts | 40 ++ arch/arm/include/asm/arch-tegra/fuse.h| 7 + arch/arm/mach-tegra/Makefile | 2 +- arch/arm/mach-tegra/fuse.c| 151 arch/arm/mach-tegra/tegra30/Kconfig | 5 + board/asus/grouper/Kconfig| 22 ++ board/asus/grouper/MAINTAINERS| 6 + board/asus/grouper/Makefile | 14 + board/asus/grouper/grouper-spl-max.c | 46 +++ board/asus/grouper/grouper-spl-ti.c | 42 ++ board/asus/grouper/grouper.c | 209 ++ board/asus/grouper/pinmux-config-grouper.h| 362 ++ configs/grouper_E1565.config | 2 + configs/grouper_PM269.config | 2 + configs/grouper_common_defconfig | 84 configs/tilapia.config| 3 + include/configs/grouper.h | 68 include/configs/tegra-common-post.h | 28 +- 22 files changed, 1320 insertions(+), 6 deletions(-) create mode 100644 arch/arm/dts/tegra30-asus-grouper-common.dtsi create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-E1565.dts create mode 100644 arch/arm/dts/tegra30-asus-nexus7-grouper-PM269.dts create mode 100644 arch/arm/dts/tegra30-asus-nexus7-tilapia-E1565.dts create mode 100644 arch/arm/mach-tegra/fuse.c create mode 100644 board/asus/grouper/Kconfig create mode 100644 board/asus/grouper/MAINTAINERS create mode 100644 board/asus/grouper/Makefile create mode 100644 board/asus/grouper/grouper-spl-max.c create mode 100644 board/asus/grouper/grouper-spl-ti.c create mode 100644 board/asus/grouper/grouper.c create mode 100644 board/asus/grouper/pinmux-config-grouper.h create mode 100644 configs/grouper_E1565.config create mode 100644 configs/grouper_PM269.config create mode 100644 configs/grouper_common_defconfig create mode 100644 configs/tilapia.config create mode 100644 include/configs/grouper.h -- 2.37.2
