Re: [PATCH v2] cosmetic:fix typo in 'mmc write' example
On 4/26/23 13:05, Shirokov Alexander wrote: On Tue, Apr 25, 2023 at 8:01 PM Simon Glass wrote: --- a/doc/usage/cmd/mmc.rst +++ b/doc/usage/cmd/mmc.rst @@ -216,7 +216,7 @@ The raw data can be read/written via 'mmc read/write' command: => mmc read 0x4000 0x5000 0x100 MMC read: dev # 0, block # 20480, count 256 ... 256 blocks read: OK -=> mmc write 0x4000 0x5000 0x10 +=> mmc write 0x4000 0x5000 100 Drop the other 0x things too? MMC write: dev # 0, block # 20480, count 256 ... 256 blocks written: OK Regards, Simon Hi Simon, Sure. I'll do that. But one clarification before. Should I change 0x only in "mmc write" line or change "mmc read" too, to keep the example consistent? Please, keep the document consistent. do_mmc_read() uses hextoul(). So it is safe to remove the 0x prefixes in the mmc read example too. Best regards Heinrich Best regards Heinrich
Re: [PATCH] efi: Rename the base efi self-test
On 4/20/23 01:38, Simon Glass wrote: This function uses the same base name as all the others in this file, so it is not easy to run just that one test. Add a _base suffix so that it can be run on its own. Signed-off-by: Simon Glass Reviewed-by: Heinrich Schuchardt --- test/py/tests/test_efi_selftest.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/py/tests/test_efi_selftest.py b/test/py/tests/test_efi_selftest.py index e92d63cde6e1..43f242455828 100644 --- a/test/py/tests/test_efi_selftest.py +++ b/test/py/tests/test_efi_selftest.py @@ -7,7 +7,7 @@ import pytest @pytest.mark.buildconfigspec('cmd_bootefi_selftest') -def test_efi_selftest(u_boot_console): +def test_efi_selftest_base(u_boot_console): """Run UEFI unit tests u_boot_console -- U-Boot console
Re: [PATCH v2 5/7] ARM: dts: rockchip: rk3588s-u-boot: add pcie2x1l2 with PHY
Hi Eugen, On 2023/4/26 23:53, Eugen Hristev wrote: From: Joseph Chen Add the node for pciE 2x1l 2 device together with the corresponding Typo "pciE" in the patch 5-7? We use 'PCIe' in term or 'pcie' in code. Thanks, - Kever combphy. Signed-off-by: Joseph Chen [eugen.hris...@collabora.com: moved to -u-boot.dtsi, minor adaptations] Signed-off-by: Eugen Hristev [jo...@kwiboo.se: adapt to kernel node] Signed-off-by: Jonas Karlman --- Changes in v2: - add compliance with linux by Jonas arch/arm/dts/rk3588s-u-boot.dtsi | 77 1 file changed, 77 insertions(+) diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index ad652c02e58e..6385da1471a5 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include "rockchip-u-boot.dtsi" +#include / { dmc { @@ -58,6 +59,11 @@ reg = <0x0 0xfd58a000 0x0 0x2000>; }; + pipe_phy0_grf: syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf", "syscon"; + reg = <0x0 0xfd5bc000 0x0 0x100>; + }; + usb2phy2_grf: syscon@fd5d8000 { compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; @@ -104,6 +110,61 @@ }; }; + pcie2x1l2: pcie@fe19 { + compatible = "rockchip,rk3588-pcie", "snps,dw-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x40 0x4f>; + clocks = < ACLK_PCIE_1L2_MSTR>, < ACLK_PCIE_1L2_SLV>, +< ACLK_PCIE_1L2_DBI>, < PCLK_PCIE_1L2>, +< CLK_PCIE_AUX4>, < CLK_PCIE1L2_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , +, +, +, +; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 _intc 0>, + <0 0 0 2 _intc 1>, + <0 0 0 3 _intc 2>, + <0 0 0 4 _intc 3>; + linux,pci-domain = <4>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x4000 0x4000 0x1000>; + num-lanes = <1>; + phys = <_ps PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = < RK3588_PD_PCIE>; + ranges = <0x0100 0x0 0xf410 0x0 0xf410 0x0 0x0010>, +<0x0200 0x0 0xf420 0x0 0xf420 0x0 0x00e0>, +<0x0300 0x0 0x4000 0xa 0x 0x0 0x4000>; + reg = <0xa 0x4100 0x0 0x0040>, + <0x0 0xfe19 0x0 0x0001>, + <0x0 0xf400 0x0 0x0010>; + reg-names = "dbi", "apb", "config"; + resets = < SRST_PCIE4_POWER_UP>, < SRST_P_PCIE4>; + reset-names = "pcie", "periph"; + rockchip,pipe-grf = <_grf>; + status = "disabled"; + + pcie2x1l2_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <>; + interrupts = ; + }; + }; + sfc: spi@fe2b { compatible = "rockchip,sfc"; reg = <0x0 0xfe2b 0x0 0x4000>; @@ -134,6 +195,22 @@ reg = <0x0 0xfe378000 0x0 0x200>; status = "disabled"; }; + + combphy0_ps: phy@fee0 { + compatible = "rockchip,rk3588-naneng-combphy"; + reg = <0x0 0xfee0 0x0 0x100>; + #phy-cells = <1>; + clocks = < CLK_REF_PIPE_PHY0>, < PCLK_PCIE_COMBO_PIPE_PHY0>, +< PCLK_PHP_ROOT>; + clock-names = "refclk", "apbclk", "phpclk"; + assigned-clocks = < CLK_REF_PIPE_PHY0>; + assigned-clock-rates = <1>; + resets = < SRST_P_PCIE2_PHY0>, < SRST_REF_PIPE_PHY0>; + reset-names = "combphy-apb", "combphy"; + rockchip,pipe-grf = <_grf>; + rockchip,pipe-phy-grf = <_phy0_grf>; + status = "disabled"; + }; }; {
Re: [PATCH v2 4/7] phy: rockchip: naneng-combphy: Support rk3588
On 2023/4/26 23:53, Eugen Hristev wrote: From: Jon Lin Add support for rk3588 phy variant. The PHY clock is fixed at 100MHz. Signed-off-by: Jon Lin [kever.y...@rock-chips.com: update pcie pll parameters] Co-developed-by: Kever Yang Signed-off-by: Kever Yang [eugen.hris...@collabora.com: squashed, tidy up] Signed-off-by: Eugen Hristev Reviewed-by: Kever Yang Thanks, - Kever --- Changes in v2: - none .../rockchip/phy-rockchip-naneng-combphy.c| 95 +++ 1 file changed, 95 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index b673a8da9f8e..d5408ccac976 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -58,6 +58,7 @@ struct rockchip_combphy_grfcfg { struct combphy_reg con2_for_sata; struct combphy_reg con3_for_sata; struct combphy_reg pipe_con0_for_sata; + struct combphy_reg pipe_con1_for_sata; struct combphy_reg pipe_sgmii_mac_sel; struct combphy_reg pipe_xpcs_phy_ready; struct combphy_reg u3otg0_port_en; @@ -423,11 +424,105 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = { .combphy_cfg= rk3568_combphy_cfg, }; +static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv) +{ + const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; + u32 val; + + switch (priv->mode) { + case PHY_TYPE_PCIE: + param_write(priv->phy_grf, >con0_for_pcie, true); + param_write(priv->phy_grf, >con1_for_pcie, true); + param_write(priv->phy_grf, >con2_for_pcie, true); + param_write(priv->phy_grf, >con3_for_pcie, true); + break; + case PHY_TYPE_USB3: + param_write(priv->phy_grf, >pipe_txcomp_sel, false); + param_write(priv->phy_grf, >pipe_txelec_sel, false); + param_write(priv->phy_grf, >usb_mode_set, true); + break; + case PHY_TYPE_SATA: + param_write(priv->phy_grf, >con0_for_sata, true); + param_write(priv->phy_grf, >con1_for_sata, true); + param_write(priv->phy_grf, >con2_for_sata, true); + param_write(priv->phy_grf, >con3_for_sata, true); + param_write(priv->pipe_grf, >pipe_con0_for_sata, true); + param_write(priv->pipe_grf, >pipe_con1_for_sata, true); + break; + case PHY_TYPE_SGMII: + case PHY_TYPE_QSGMII: + default: + dev_err(priv->dev, "incompatible PHY type\n"); + return -EINVAL; + } + + /* 100MHz refclock signal is good */ + clk_set_rate(>ref_clk, 1); + param_write(priv->phy_grf, >pipe_clk_100m, true); + if (priv->mode == PHY_TYPE_PCIE) { + /* PLL KVCO tuning fine */ + val = readl(priv->mmio + (0x20 << 2)); + val &= ~GENMASK(4, 2); + val |= 0x4 << 2; + writel(val, priv->mmio + (0x20 << 2)); + + /* Set up rx_trim: PLL LPF C1 85pf R1 1.25kohm */ + val = 0x4c; + writel(val, priv->mmio + (0x1b << 2)); + + /* Set up su_trim: T3 */ + val = 0xb0; + writel(val, priv->mmio + (0xa << 2)); + val = 0x47; + writel(val, priv->mmio + (0xb << 2)); + val = 0x57; + writel(val, priv->mmio + (0xd << 2)); + } + + return 0; +} + +static const struct rockchip_combphy_grfcfg rk3588_combphy_grfcfgs = { + /* pipe-phy-grf */ + .pcie_mode_set = { 0x, 5, 0, 0x00, 0x11 }, + .usb_mode_set = { 0x, 5, 0, 0x00, 0x04 }, + .pipe_rxterm_set= { 0x, 12, 12, 0x00, 0x01 }, + .pipe_txelec_set= { 0x0004, 1, 1, 0x00, 0x01 }, + .pipe_txcomp_set= { 0x0004, 4, 4, 0x00, 0x01 }, + .pipe_clk_25m = { 0x0004, 14, 13, 0x00, 0x01 }, + .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, + .pipe_rxterm_sel= { 0x0008, 8, 8, 0x00, 0x01 }, + .pipe_txelec_sel= { 0x0008, 12, 12, 0x00, 0x01 }, + .pipe_txcomp_sel= { 0x0008, 15, 15, 0x00, 0x01 }, + .pipe_clk_ext = { 0x000c, 9, 8, 0x02, 0x01 }, + .pipe_phy_status= { 0x0034, 6, 6, 0x01, 0x00 }, + .con0_for_pcie = { 0x, 15, 0, 0x00, 0x1000 }, + .con1_for_pcie = { 0x0004, 15, 0, 0x00, 0x }, + .con2_for_pcie = { 0x0008, 15, 0, 0x00, 0x0101 }, + .con3_for_pcie = { 0x000c, 15, 0, 0x00, 0x0200 }, + .con0_for_sata = { 0x, 15, 0, 0x00, 0x0129 }, + .con1_for_sata = { 0x0004, 15, 0, 0x00, 0x0040 }, + .con2_for_sata = { 0x0008, 15, 0, 0x00, 0x80c1 }, + .con3_for_sata = { 0x000c, 15,
Re: [PATCH v2 3/7] phy: rockchip: naneng-combphy: Add support for multiple resets
On 2023/4/26 23:53, Eugen Hristev wrote: Some variants of the PHY have more than just one reset. To cover all cases, request the rests in bulk rather than just the reset at index 0. Co-developed-by: Ren Jianing Signed-off-by: Ren Jianing Signed-off-by: Eugen Hristev Reviewed-by: Kever Yang Thanks, - Kever --- Changes in v2: - none drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 78da5fe79700..b673a8da9f8e 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -76,7 +76,7 @@ struct rockchip_combphy_priv { struct regmap *pipe_grf; struct regmap *phy_grf; struct phy *phy; - struct reset_ctl phy_rst; + struct reset_ctl_bulk phy_rsts; struct clk ref_clk; const struct rockchip_combphy_cfg *cfg; }; @@ -189,7 +189,7 @@ static int rockchip_combphy_init(struct phy *phy) if (ret) goto err_clk; - reset_deassert(>phy_rst); + reset_deassert_bulk(>phy_rsts); return 0; @@ -204,7 +204,7 @@ static int rockchip_combphy_exit(struct phy *phy) struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev); clk_disable(>ref_clk); - reset_assert(>phy_rst); + reset_assert_bulk(>phy_rsts); return 0; } @@ -255,7 +255,7 @@ static int rockchip_combphy_parse_dt(struct udevice *dev, return PTR_ERR(>ref_clk); } - ret = reset_get_by_index(dev, 0, >phy_rst); + ret = reset_get_bulk(dev, >phy_rsts); if (ret) { dev_err(dev, "no phy reset control specified\n"); return ret;
Re: [PATCH v2 2/7] pci: pcie_dw_rockchip: Support max_link_speed dts property
On 2023/4/26 23:53, Eugen Hristev wrote: From: Jon Lin Add support for max_link_speed specified in the PCI DT binding. Signed-off-by: Jon Lin [eugen.hris...@collabora.com: port to latest API, set default correctly, align to 80 chars] Signed-off-by: Eugen Hristev [jo...@kwiboo.se: switch to dev_read_u32_default] Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Thanks, - Kever --- Changes in v2: - move to dev_read_u32_default drivers/pci/pcie_dw_rockchip.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index ff121046604a..60c74bea24b2 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -42,6 +42,7 @@ struct rk_pcie { struct clk_bulk clks; struct reset_ctl_bulk rsts; struct gpio_descrst_gpio; + u32 gen; }; /* Parameters for the waiting for iATU enabled routine */ @@ -331,7 +332,7 @@ static int rockchip_pcie_init_port(struct udevice *dev) rk_pcie_writel_apb(priv, 0x0, 0xf00040); pcie_dw_setup_host(>dw); - ret = rk_pcie_link_up(priv, LINK_SPEED_GEN_3); + ret = rk_pcie_link_up(priv, priv->gen); if (ret < 0) goto err_link_up; @@ -397,6 +398,9 @@ static int rockchip_pcie_parse_dt(struct udevice *dev) goto rockchip_pcie_parse_dt_err_phy_get_by_index; } + priv->gen = dev_read_u32_default(dev, "max-link-speed", +LINK_SPEED_GEN_3); + return 0; rockchip_pcie_parse_dt_err_phy_get_by_index:
Re: [PATCH v2 1/7] pci: pcie_dw_rockchip: Add rk3588 compatible
On 2023/4/26 23:53, Eugen Hristev wrote: From: Jon Lin Add compatible for RK3588 SoC. Signed-off-by: Jon Lin Reviewed-by: Kever Yang Thanks, - Kever --- Changes in v2: - none drivers/pci/pcie_dw_rockchip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index 6155710a9f5f..ff121046604a 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -468,6 +468,7 @@ static const struct dm_pci_ops rockchip_pcie_ops = { static const struct udevice_id rockchip_pcie_ids[] = { { .compatible = "rockchip,rk3568-pcie" }, + { .compatible = "rockchip,rk3588-pcie" }, { } };
Re: A38x BootROM MMC_CMD_SEND_STATUS timeouts
PING? On Saturday 01 April 2023 18:43:45 Pali Rohár wrote: > Can anybody help with this? > > On Saturday 25 March 2023 13:25:06 Pali Rohár wrote: > > CCing MMC maintainers (Peng Fan & Jaehoon Chung). Could you help us with > > this issue? Expected usage is following: BootROM reads and execute SPL > > from eMMC (BootROM has its own code for reading eMMC), SPL initialize > > mmc driver and after SPL finish its work it returns control back to > > BootROM and BootROM reads and execute proper U-Boot from eMMC. And issue > > is that after SPL returns control back to BootROM it looks like that > > BootROM is sending MMC_CMD_SEND_STATUS command to eMMC but it timeouts > > (timeout takes 5 minutes!) and after it correctly reads proper U-Boot > > from eMMC and continues booting proper U-Boot. I guess that there is an > > issue that SPL's mmc driver changes eMMC state into something which > > BootROM does not expect. > > > > On Friday 24 March 2023 02:55:55 Martin Rowe wrote: > > > On Thu, 23 Mar 2023 at 19:01, Pali Rohár wrote: > > > > There is issue with that 5 minutes delay. But I think it should be fixed > > > > by the patch which I sent earlier, which restore partition config based > > > > on mmc->part_config in board_return_to_bootrom(). Could you test it? > > > > https://lore.kernel.org/u-boot/20230305160416.xc7wlzmkaociwcf7@pali/ > > > > Now when mmc->part_config is correctly initialized it should restore > > > > configuration and BootROM does not have to get that "Timeout waiting > > > > card ready" error. > > > > > > Still takes about 5 minutes. The output is below with MMC tracing. I > > > confirmed the value of mmc->part_config used for > > > restore_emmc_boot_part_config is the same as what is initially > > > detected early in SPL (both are 10 with mmc partconf 0 0 1 1 and > > > zeroed boot0). > > > > > > ERROR: Invalid kwbimage v1 > > > mmc_load_image_raw_sector: mmc block read error > > > spl: mmc: wrong boot mode > > > Trying to boot from BOOTROM > > > CMD_SEND:6 > > > ARG 0x03b30a00 > > > MMC_RSP_R1b 0x0900 > > > CMD_SEND:13 > > > ARG 0x0001 > > > MMC_RSP_R1,5,6,7 0x0900 > > > CURR STATE:4 > > > Returning to BootROM (return address 0x05c4)... > > > > I looked at the BootROM disassembled code and error message > > "Timeout waiting card ready" is printed when following mmc command > > cmdidx=0xd, resptype=0x15, cmdarg=(something)<<0x10 timeouts. > > > > 0xd is in U-Boot MMC_CMD_SEND_STATUS > > > > 0x15 is in U-Boot MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC|MMC_RSP_BUSY > > which looks like U-Boot's MMC_RSP_R2 with BUSY bit set > > > > It looks like U-Boot function mmc_send_status() where that "something" > > in cmdarg is mmc->rca. > > > > If command does not timeout then BootROM next checks if response has > > BIT(8) set and if response mask 0x1e00 matches value 0xe00. If both are > > truth then BootROM mark call as successful. > > > > If response ANDed with mask 0xfdf94080 is non-zero then BootROM prints > > "Status Error: " with hex response value and mark call as unsuccessful. > > > > I'm looking at the U-Boot code and this BootROM logic looks very similar > > to U-Boot function mmc_poll_for_busy(), just without first call > > mmc_wait_dat0(). > > > > BIT(8) is MMC_STATUS_RDY_FOR_DATA > > 0x1e00 is MMC_STATUS_CURR_STATE > > 0xe00 is MMC_STATE_PRG > > 0xfdf94080 is MMC_STATUS_MASK > > > > I'm not mmc expert, but this looks like MMC_CMD_SEND_STATUS is failing > > in BootROM after U-Boot returns control back to the BootROM.
Re: [PATCH v2 u-boot-mvebu 4/4] arm: mvebu: clearfog: Update eMMC/SD/SATA instructions
On Thursday 13 April 2023 22:43:25 Martin Rowe wrote: > On Thu, 13 Apr 2023 at 20:58, Pali Rohár wrote: > > > > BootROM and neither SPL does not use eMMC boot acknowledgement or boot > > enable bits in EXT_CSD_PART_CONF eMMC register. And also fixed SATA disk > > sector 0x141 is not used at all. > > > > Signed-off-by: Pali Rohár > > SPL successfully loads u-boot from the same partition as SPL. SD card > and UART continue to boot. > > Thanks Pali! > > Tested-by: Martin Rowe Ok, is something more needed for this patch series? > > --- > > board/solidrun/clearfog/README | 20 ++-- > > 1 file changed, 10 insertions(+), 10 deletions(-) > > > > diff --git a/board/solidrun/clearfog/README b/board/solidrun/clearfog/README > > index ed4a712c5aa2..c86b37061a30 100644 > > --- a/board/solidrun/clearfog/README > > +++ b/board/solidrun/clearfog/README > > @@ -1,7 +1,7 @@ > > Update from original Marvell U-Boot to mainline U-Boot: > > --- > > > > -Generate the U-Boot image with these commands: > > +Generate the U-Boot image for eMMC/SD with these commands: > > > > $ make clearfog_defconfig > > $ make > > @@ -9,7 +9,7 @@ $ make > > The resulting image including the SPL binary with the > > full DDR setup is "u-boot-with-spl.kwb". > > > > -Now all you need to do is copy this image on a SD card. > > +Now all you need to do is copy this image on a SD card's sector 1. > > For example with this command: > > > > $ sudo dd if=u-boot-with-spl.kwb of=/dev/sdX bs=512 seek=1 > > @@ -20,12 +20,6 @@ of "/dev/sdX" here! > > Install U-Boot on eMMC: > > --- > > > > -To make SPL load the main U-Boot image from the eMMC boot partition enable > > -eMMC boot acknowledgement and boot partition with the following U-Boot > > -command: > > - > > - mmc partconf 0 1 1 0 > > - > > Install U-Boot on eMMC boot partition from Linux running on Clearfog: > > > >echo 0 > /sys/block/mmcblk0boot0/force_ro > > @@ -37,8 +31,14 @@ Consider initial boot from UART (see below). > > Install U-Boot on SATA: > > --- > > > > -When loading the main U-Boot image from raw SATA sector, set > > -CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR to 0x141. > > +Generate the U-Boot image for SATA with these commands: > > + > > +$ make clearfog_sata_defconfig > > +$ make > > + > > +Copy image on a SATA disk's sector 1: > > + > > +$ sudo dd if=u-boot-with-spl.kwb of=/dev/sdX bs=512 seek=1 > > > > Boot selection: > > --- > > -- > > 2.20.1 > >
Re: [PATCH v3 00/19] Migration to using binman for bootloader
On Fri, Apr 21, 2023 at 06:01:44PM +0530, Neha Malcom Francis wrote: > This series aims to eliminate the use of additional custom repositories > such as k3-image-gen (K3 Image Generation) repo and core-secdev-k3 (K3 > Security Development Tools) that was plumbed into the U-Boot build flow > to generate boot images for TI K3 platform devices. And instead, we move > towards using binman that aligns better with the community standard build > flow. > > This series uses binman for all K3 platforms supported on U-Boot currently; > both HS (High Security, both SE and FS) and GP (General Purpose) devices. > > Background on using k3-image-gen: > * TI K3 devices require a SYSFW (System Firmware) image consisting > of a signed system firmware image and board configuration binaries, > this is needed to bring up system firmware during U-Boot R5 SPL > startup. > * Board configuration data contain board-specific information > such as resource management, power management and security. > > Background on using core-secdev-k3: > * Contains resources to sign x509 certificates for HS devices > > Series intends to use binman to take over the packaging and signing for > the R5 bootloader images tiboot3.bin (and sysfw.itb, for non-combined > boot flow) instead of k3-image-gen. > > Series also packages the A72/A53 bootloader images (tispl.bin and > u-boot.img) using ATF, OPTEE and DM (Device Manager) So, next up is fixing this in CI. After taking Andrew's patch to fix the typedef issue, and after my patches to ensure we can get pyyaml/jsonschema for python, there's problems still: Over at https://source.denx.de/u-boot/u-boot/-/jobs/617966: binman: Filename 'spl/dts/k3-am68-sk-base-board.dtb' not found in input path (.,/builds/u-boot/u-boot,board/ti/j721s2,arch/arm/dts) (cwd='/tmp/.bm-work/j721s2_hs_evm_a72') And then: https://source.denx.de/u-boot/u-boot/-/jobs/617965#L1328 Error: arch/arm/dts/k3-am62a-sk-binman.dtsi:167.1-8 syntax error -- Tom signature.asc Description: PGP signature
Re: Binman signing
Hi Andy, On Wed, 26 Apr 2023 at 12:49, Andy Pandy wrote: > > Hi there, > > First of all, I would like to thank you for the tool, I like it a lot. Great! > > I've been trying to sign uboot by placing signature section into > configurations section. Something like: > > { > algo = "sha256,rsa2048"; > key-name-hint = "dev"; > sign-images = "fdt", "loadables"; > } > > But I can't find how to sign the second stage uboot, and integrate the public > key into uboot spl device tree with binman. > Prior to binman I used mkimage to do that, as follows: > > mkimage -f uboot.its -K u-boot.dtb -k ./keys -r image.fit > > Could not find it in the documentation, I only saw pre-load, but I am not > sure that this is what I am looking for. > > Would appreciate if you could give some hint on how this could be done. > > Thank you for your help +Ivan Mikhaylov I believe that 'binman sign' does this: https://u-boot.readthedocs.io/en/latest/develop/package/binman.html#signing-fit-container-with-private-key-in-an-image Regards, Simon
Binman signing
Hi there, First of all, I would like to thank you for the tool, I like it a lot. I've been trying to sign uboot by placing signature section into configurations section. Something like: { algo = "sha256,rsa2048"; key-name-hint = "dev"; sign-images = "fdt", "loadables"; } But I can't find how to sign the second stage uboot, and integrate the public key into uboot spl device tree with binman. Prior to binman I used mkimage to do that, as follows: mkimage -f uboot.its -K u-boot.dtb -k ./keys -r image.fit Could not find it in the documentation, I only saw pre-load, but I am not sure that this is what I am looking for. Would appreciate if you could give some hint on how this could be done. Thank you for your help Cheers, Andy
[PATCH 2/2] CI: Make use of buildman requirements.txt
Now that buildman has a requirements.txt file we need to make use of it. Signed-off-by: Tom Rini --- .azure-pipelines.yml | 3 +++ .gitlab-ci.yml | 4 2 files changed, 7 insertions(+) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 76ffdeebd667..22d634f4aa7a 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -162,6 +162,7 @@ stages: virtualenv -p /usr/bin/python3 /tmp/venv . /tmp/venv/bin/activate pip install -r test/py/requirements.txt + pip install -r tools/buildman/requirements.txt export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH} @@ -209,6 +210,7 @@ stages: git config --global --add safe.directory $(work_dir) export USER=azure pip install -r test/py/requirements.txt + pip install -r tools/buildman/requirements.txt pip install asteval pylint==2.12.2 pyopenssl export PATH=${PATH}:~/.local/bin echo "[MASTER]" >> .pylintrc @@ -404,6 +406,7 @@ stages: if [ -n "${BUILD_ENV}" ]; then export ${BUILD_ENV}; fi + pip install -r tools/buildman/requirements.txt tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board ${TEST_PY_BD} ${OVERRIDE} cp ~/grub_x86.efi ${UBOOT_TRAVIS_BUILD_DIR}/ cp ~/grub_x64.efi ${UBOOT_TRAVIS_BUILD_DIR}/ diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index b193fee98f86..22ed61be642a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -97,6 +97,7 @@ build all 32bit ARM platforms: script: - ret=0; git config --global --add safe.directory "${CI_PROJECT_DIR}"; + pip install -r tools/buildman/requirements.txt; ./tools/buildman/buildman -o /tmp -PEWM arm -x aarch64 || ret=$?; if [[ $ret -ne 0 ]]; then ./tools/buildman/buildman -o /tmp -seP; @@ -110,6 +111,7 @@ build all 64bit ARM platforms: - . /tmp/venv/bin/activate - ret=0; git config --global --add safe.directory "${CI_PROJECT_DIR}"; + pip install -r tools/buildman/requirements.txt; ./tools/buildman/buildman -o /tmp -PEWM aarch64 || ret=$?; if [[ $ret -ne 0 ]]; then ./tools/buildman/buildman -o /tmp -seP; @@ -208,6 +210,7 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites: virtualenv -p /usr/bin/python3 /tmp/venv; . /tmp/venv/bin/activate; pip install -r test/py/requirements.txt; + pip install -r tools/buildman/requirements.txt; export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl; export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"; export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"; @@ -240,6 +243,7 @@ Run pylint: script: - git config --global --add safe.directory "${CI_PROJECT_DIR}" - pip install -r test/py/requirements.txt +- pip install -r tools/buildman/requirements.txt - pip install asteval pylint==2.12.2 pyopenssl - export PATH=${PATH}:~/.local/bin - echo "[MASTER]" >> .pylintrc -- 2.34.1
[PATCH 1/2] buildman: Create a requirements.txt file
At this point, buildman requires a few different modules and so we need a requirements.txt to track what modules are needed. Cc: Simon Glass Cc: Neha Malcom Francis Signed-off-by: Tom Rini --- tools/buildman/requirements.txt | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 tools/buildman/requirements.txt diff --git a/tools/buildman/requirements.txt b/tools/buildman/requirements.txt new file mode 100644 index ..a1efcb9d4b44 --- /dev/null +++ b/tools/buildman/requirements.txt @@ -0,0 +1,2 @@ +jsonschema==4.17.3 +pyyaml==6.0 -- 2.34.1
Re: [PATCH v5 14/14] smegw01: Convert CFG_EXTRA_ENV_SETTINGS to an env file
On Wed, Apr 26, 2023 at 01:05:01PM -0300, Fabio Estevam wrote: > From: Fabio Estevam > > Currently, it is recommended to move from CFG_EXTRA_ENV_SETTINGS to > an env file, so do the conversion. > > Suggested-by: Tom Rini > Signed-off-by: Fabio Estevam Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [PATCH v10 0/9] bootstd: Convert rockchip and add various fixes and tweaks
On Mon, 24 Apr 2023 13:49:43 +1200, Simon Glass wrote: > This series converts rockchip boards over to use standard boot. It also > fixes various problems which have come up recently, showing differences > between the current implementation and the distroboot scripts. > > This should get us closer to being able to turn down the scripts. > > Changes in v10: > - Drop DISTRO_DEFAULTS and add BOOTSTD_DEFAULTS for all rockchip boards > as suggested by Jonas Karlman > - Adjust patch to always use standard boot > > [...] Applied to u-boot/master, thanks! -- Tom
Should different versions of a patch be threaded to each other?
The following discusses the threading of patches. https://u-boot.readthedocs.io/en/latest/develop/sending_patches.html#sending-updated-patch-versions I see the following mentioned there. "Make sure that your mailer adds or keeps correct In-reply-to: and References: headers, so threading of messages is working and everybody can see that the new message refers to some older posting of the same topic. Uncommented and un-threaded repostings are extremely annoying and time-consuming, as we have to try to remember if anything similar has been posted before, look up the old threads, and then manually compare if anything has been changed, or what." Does it mean that when a newer version of a patch is sent, it should keep a pointer to the previous version's thread by using the In-reply-to field? I have hardly seen anyone doing this.
[PATCH v5 14/14] smegw01: Convert CFG_EXTRA_ENV_SETTINGS to an env file
From: Fabio Estevam Currently, it is recommended to move from CFG_EXTRA_ENV_SETTINGS to an env file, so do the conversion. Suggested-by: Tom Rini Signed-off-by: Fabio Estevam --- Changes since v4: - Also add SETUP_BOOT_MENU into the .env file (Tom). Cc: Tom Rini board/storopack/smegw01/smegw01.env | 89 + include/configs/smegw01.h | 68 -- 2 files changed, 89 insertions(+), 68 deletions(-) create mode 100644 board/storopack/smegw01/smegw01.env diff --git a/board/storopack/smegw01/smegw01.env b/board/storopack/smegw01/smegw01.env new file mode 100644 index ..25bc7cdbd28b --- /dev/null +++ b/board/storopack/smegw01/smegw01.env @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0+ +#ifdef CONFIG_SYS_BOOT_LOCKED +#define SETUP_BOOT_MENU setup_boot_menu=setenv bootmenu_0 eMMC=run bootcmd +#else +#define SETUP_BOOT_MENU setup_boot_menu= \ + if test "${mmcdev}" = 1; then \ + setenv emmc_priority 0; \ + setenv sd_priority 1; \ + else setenv emmc_priority 1; \ + setenv sd_priority 0; \ + fi; \ + setenv bootmenu_${emmc_priority} eMMC=run boot_emmc; \ + setenv bootmenu_${sd_priority} SD=run boot_sd; +#endif + +altbootcmd= + echo Performing rollback...; + if test "${mmcpart_committed}" = 1; then + setenv mmcpart 2; + setenv mmcpart_committed 2; + else + setenv mmcpart 1; + setenv mmcpart_committed 1; + fi; + setenv bootcount 0; + setenv upgrade_available; + setenv ustate 3; + saveenv; + run bootcmd; +boot_emmc=setenv mmcdev_wanted 1; run persist_mmcdev; run bootcmd; +boot_sd=setenv mmcdev_wanted 0; run persist_mmcdev; run bootcmd; +bootcmd=run finduuid; run distro_bootcmd +bootdelay=2 +bootlimit=3 +bootm_size=0x1000 +commit_mmc= + if test "${ustate}" = 1 -a "${mmcpart}" != "${mmcpart_committed}"; then + setenv mmcpart_committed ${mmcpart}; + saveenv; + fi; +console=ttymxc0 +fdt_addr=0x8300 +fdtfile=imx7d-smegw01.dtb +fit_addr=0x8800 +image=fitImage +loadaddr=0x8080 +loadbootpart=mmc partconf 1 boot_part +loadimage=load mmc ${mmcdev}:${gpt_partition_entry} ${fit_addr} boot/${image} +loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed} +mmcargs= + setenv bootargs console=${console},${baudrate} root=/dev/mmcblk${mmcdev}p${gpt_partition_entry} rootwait rw SM_ROOT_DEV=${mmcdev} SM_ROOT_PART=${gpt_partition_entry} SM_BOOT_PART=${boot_part} +mmcboot= + echo Booting...; + echo mmcdev: ${mmcdev}; + run commit_mmc; + echo mmcpart: ${mmcpart_committed}; + run loadpart; + echo gptpart: ${gpt_partition_entry}; + run loadbootpart; + if run loadimage; then + ; + else + run altbootcmd; + fi; + run mmcargs; + if bootm ${fit_addr}; then + ; + else + run altbootcmd; + fi; +mmcdev=1 +mmcpart=1 +mmcpart_committed=1 +persist_mmcdev= + if test "${mmcdev}" != "${mmcdev_wanted}"; then + setenv mmcdev "${mmcdev_wanted}"; + saveenv; + fi; +setup_boot_menu= + if test "${mmcdev}" = 1; then + setenv emmc_priority 0; + setenv sd_priority 1; + else + setenv emmc_priority 1; + setenv sd_priority 0; + fi; + setenv bootmenu_${emmc_priority} eMMC=run boot_emmc; + setenv bootmenu_${sd_priority} SD=run boot_sd; +SETUP_BOOT_MENU diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 6f373973ab84..0aa25f9e2eaa 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -24,19 +24,8 @@ #ifdef CONFIG_SYS_BOOT_LOCKED #define EXTRA_ENV_FLAGS -#define SETUP_BOOT_MENU "setup_boot_menu=setenv bootmenu_0 eMMC=run bootcmd\0" #else #define EXTRA_ENV_FLAGS "mmcdev:dw," -#define SETUP_BOOT_MENU "setup_boot_menu=" \ - "if test \"${mmcdev}\" = 1; then " \ - "setenv emmc_priority 0;" \ - "setenv sd_priority 1;" \ - "else " \ - "setenv emmc_priority 1;" \ - "setenv sd_priority 0;" \ - "fi;" \ - "setenv bootmenu_${emmc_priority} eMMC=run boot_emmc;" \ - "setenv bootmenu_${sd_priority} SD=run boot_sd;\0" #endif #define CFG_ENV_FLAGS_LIST_STATIC \ @@ -48,63 +37,6 @@ "upgrade_available:dw," \ EXTRA_ENV_FLAGS -#define CFG_EXTRA_ENV_SETTINGS \ - "image=fitImage\0" \ - "console=ttymxc0\0" \ - "fdtfile=imx7d-smegw01.dtb\0" \ - "fdt_addr=0x8300\0" \ - "bootm_size=0x1000\0" \ - "mmcdev=1\0" \ - "mmcpart=1\0" \ - "mmcpart_committed=1\0" \ - "mmcargs=setenv
[PATCH v5 13/14] smegw01: Fix fallback to altbootcmd
From: Eduard Strehlau The bootcmd/altbootcmd mechanism is not invoked for bootmenus. Manually compare bootcount and bootlimit to implement fallback on all codepaths. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None configs/smegw01_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index fe8152f33e6e..3d2713f52807 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -23,7 +23,7 @@ CONFIG_AUTOBOOT_MENU_SHOW=y # CONFIG_CMD_BOOTEFI_BOOTMGR is not set CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; " +CONFIG_BOOTCOMMAND="if test \"${bootcount}\" -gt \"${bootlimit}\"; then run altbootcmd; else if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; fi;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run setup_boot_menu;" CONFIG_HUSH_PARSER=y -- 2.34.1
[PATCH v5 12/14] smegw01: Disable additional boot menu options
From: Eduard Strehlau Defaults have changed, we do not want the bootmenu to contain EFI options. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None configs/smegw01_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index ea25b3b87ce4..fe8152f33e6e 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_AUTOBOOT_MENU_SHOW=y +# CONFIG_BOOTSTD is not set +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; " -- 2.34.1
[PATCH v5 11/14] smegw01: Read the second MAC address
From: Fabio Estevam Currently, only the first MAC address is read from the fuses. The second MAC address is not read and Linux assigns a random one. To prevent this behavior, read the second MAC address from the fuses and store it into the eth1addr environment variable so that it can be passed to Linux. Signed-off-by: Fabio Estevam --- Changes since v4: - None board/storopack/smegw01/smegw01.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c index e648b196b9d1..20c09700bf0d 100644 --- a/board/storopack/smegw01/smegw01.c +++ b/board/storopack/smegw01/smegw01.c @@ -82,6 +82,7 @@ int board_init(void) int board_late_init(void) { struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + unsigned char eth1addr[6]; imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); @@ -93,6 +94,11 @@ int board_late_init(void) */ clrsetbits_le16(>wcr, 0, 0x10); + /* Get the second MAC address */ + imx_get_mac_from_fuse(1, eth1addr); + if (!env_get("eth1addr") && is_valid_ethaddr(eth1addr)) + eth_env_set_enetaddr("eth1addr", eth1addr); + return 0; } -- 2.34.1
[PATCH v5 10/14] smegw01: Add lockdown U-Boot env support
From: Eduard Strehlau Add lockdown U-Boot env support so that only certain U-Boot environment variables are allowed to be modified. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None board/storopack/smegw01/Kconfig | 7 + board/storopack/smegw01/smegw01.c | 17 +++ configs/smegw01_defconfig | 11 ++- include/configs/smegw01.h | 48 +-- 4 files changed, 79 insertions(+), 4 deletions(-) diff --git a/board/storopack/smegw01/Kconfig b/board/storopack/smegw01/Kconfig index d8f24695d0d2..390214c285bb 100644 --- a/board/storopack/smegw01/Kconfig +++ b/board/storopack/smegw01/Kconfig @@ -12,4 +12,11 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/storopack/smegw01/imximage.cfg" +config SYS_BOOT_LOCKED + bool "Lock boot process to EMMC" + default y + help + Say N here if you want to boot from eMMC and SD. + Say Y to boot from eMMC. + endif diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c index 7d4de9326d6f..e648b196b9d1 100644 --- a/board/storopack/smegw01/smegw01.c +++ b/board/storopack/smegw01/smegw01.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -103,3 +104,19 @@ uint board_mmc_get_env_part(struct mmc *mmc) part = 0; return part; } + +enum env_location env_get_location(enum env_operation op, int prio) +{ + if (op == ENVOP_SAVE || op == ENVOP_ERASE) + return ENVL_MMC; + + switch (prio) { + case 0: + return ENVL_NOWHERE; + + case 1: + return ENVL_MMC; + } + + return ENVL_UNKNOWN; +} diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 54cf1cfc1f1b..ea25b3b87ce4 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_OFFSET=0x10 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx7d-smegw01" CONFIG_TARGET_SMEGW01=y +# CONFIG_SYS_BOOT_LOCKED is not set CONFIG_ENV_OFFSET_REDUND=0x11 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set @@ -17,13 +18,18 @@ CONFIG_SYS_MEMTEST_START=0x8000 CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_AUTOBOOT_MENU_SHOW=y +CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; else run altbootcmd; fi; " +CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; " +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="run setup_boot_menu;" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y +CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y @@ -43,9 +49,12 @@ CONFIG_CMD_SQUASHFS=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ENV_WRITEABLE_LIST=y +CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 85218832..6f373973ab84 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -22,6 +22,32 @@ #define EXTRA_BOOTPARAMS #endif +#ifdef CONFIG_SYS_BOOT_LOCKED +#define EXTRA_ENV_FLAGS +#define SETUP_BOOT_MENU "setup_boot_menu=setenv bootmenu_0 eMMC=run bootcmd\0" +#else +#define EXTRA_ENV_FLAGS "mmcdev:dw," +#define SETUP_BOOT_MENU "setup_boot_menu=" \ + "if test \"${mmcdev}\" = 1; then " \ + "setenv emmc_priority 0;" \ + "setenv sd_priority 1;" \ + "else " \ + "setenv emmc_priority 1;" \ + "setenv sd_priority 0;" \ + "fi;" \ + "setenv bootmenu_${emmc_priority} eMMC=run boot_emmc;" \ + "setenv bootmenu_${sd_priority} SD=run boot_sd;\0" +#endif + +#define CFG_ENV_FLAGS_LIST_STATIC \ + "mmcpart:dw," \ + "mmcpart_committed:dw," \ + "ustate:dw," \ + "bootcount:dw," \ + "bootlimit:dw," \ + "upgrade_available:dw," \ + EXTRA_ENV_FLAGS + #define CFG_EXTRA_ENV_SETTINGS \ "image=fitImage\0" \ "console=ttymxc0\0" \ @@ -40,13 +66,28 @@ "fi;\0" \ "bootlimit=3\0" \ "fit_addr=0x8800\0" \ - "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fit_addr} boot/${image}\0" \ + "loadimage=load mmc ${mmcdev}:${gpt_partition_entry} ${fit_addr} boot/${image}\0" \ "loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed}\0" \ "loadbootpart=mmc partconf 1 boot_part\0" \ - "mmcboot=echo Booting from
[PATCH v5 07/14] smegw01: Enable EMMC boot from multiple partitions
From: Eduard Strehlau GPT Partition labels are used for determining the right root filesystem to boot from. The U-Boot environment is configured to reside in the eMMC hardware boot partition we are currently booted from. This should enable a dual copy approach for upgrading the bootloader. One can overwrite the inactive hardware partition with new bootloader and environment and afterwards switch the eMMC boot partition for an atomic bootloader switch. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None board/storopack/smegw01/smegw01.c | 10 ++ configs/smegw01_defconfig | 2 ++ include/configs/smegw01.h | 12 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c index e6bff80e5565..7d4de9326d6f 100644 --- a/board/storopack/smegw01/smegw01.c +++ b/board/storopack/smegw01/smegw01.c @@ -17,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -93,3 +94,12 @@ int board_late_init(void) return 0; } + +uint board_mmc_get_env_part(struct mmc *mmc) +{ + uint part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); + + if (part == 7) + part = 0; + return part; +} diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index b3580d5d6e54..54cf1cfc1f1b 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_DHCP=y @@ -44,6 +45,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 277c828d0e07..71f2d9c8e85c 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -32,17 +32,21 @@ "mmcpart=1\0" \ "mmcpart_committed=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mmcblk0p${mmcpart_committed} rootwait rw " \ - __stringify(EXTRA_BOOTPARAMS) "\0" \ + "root=/dev/mmcblk${mmcdev}p${gpt_partition_entry} rootwait rw " \ + __stringify(EXTRA_BOOTPARAMS) " SM_ROOT_DEV=${mmcdev} SM_ROOT_PART=${gpt_partition_entry} SM_BOOT_PART=${boot_part}\0" \ "commit_mmc=if test \"${ustate}\" = 1 -a \"${mmcpart}\" != \"${mmcpart_committed}\"; then " \ "setenv mmcpart_committed ${mmcpart};" \ "saveenv;" \ "fi;\0" \ "bootlimit=3\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart_committed} ${loadaddr} boot/${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ + "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${loadaddr} boot/${image}\0" \ + "loadfdt=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ + "loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed}\0" \ + "loadbootpart=mmc partconf 1 boot_part\0" \ "mmcboot=echo Booting from mmc ...; " \ "run commit_mmc; " \ + "run loadpart; " \ + "run loadbootpart; " \ "run mmcargs; " \ "if run loadfdt; then " \ "if bootz ${loadaddr} - ${fdt_addr}; then " \ -- 2.34.1
[PATCH v5 09/14] smegw01: Switch to fitImage
From: Eduard Strehlau Instead of loading the zImage kernel and the devicetree separately, switch to the fitImage format, which is more convenient when working with secure boot, for example. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None include/configs/smegw01.h | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 8f68472f5bad..85218832 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -23,7 +23,7 @@ #endif #define CFG_EXTRA_ENV_SETTINGS \ - "image=zImage\0" \ + "image=fitImage\0" \ "console=ttymxc0\0" \ "fdtfile=imx7d-smegw01.dtb\0" \ "fdt_addr=0x8300\0" \ @@ -39,8 +39,8 @@ "saveenv;" \ "fi;\0" \ "bootlimit=3\0" \ - "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${loadaddr} boot/${image}\0" \ - "loadfdt=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ + "fit_addr=0x8800\0" \ + "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fit_addr} boot/${image}\0" \ "loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed}\0" \ "loadbootpart=mmc partconf 1 boot_part\0" \ "mmcboot=echo Booting from mmc ...; " \ @@ -48,12 +48,8 @@ "run loadpart; " \ "run loadbootpart; " \ "run mmcargs; " \ - "if run loadfdt; then " \ - "if bootz ${loadaddr} - ${fdt_addr}; then " \ - "; " \ - "else " \ - "run altbootcmd; " \ - "fi;" \ + "if bootm ${fit_addr}; then " \ + "; " \ "else " \ "run altbootcmd; " \ "fi;\0" \ -- 2.34.1
[PATCH v5 08/14] smegw01: Change default boot device to eMMC
From: Eduard Strehlau Let eMMC be the default boot medium. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None include/configs/smegw01.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 71f2d9c8e85c..8f68472f5bad 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -28,7 +28,7 @@ "fdtfile=imx7d-smegw01.dtb\0" \ "fdt_addr=0x8300\0" \ "bootm_size=0x1000\0" \ - "mmcdev=0\0" \ + "mmcdev=1\0" \ "mmcpart=1\0" \ "mmcpart_committed=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ -- 2.34.1
[PATCH v5 06/14] smegw01: Only commit to new partition if update was successful
From: Eduard Strehlau When performing rootfs update via swupdate, it is convenient to check the 'ustate' variable to decide whether the update succeeded or not. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None include/configs/smegw01.h | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 05edaac42f8e..277c828d0e07 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -30,13 +30,19 @@ "bootm_size=0x1000\0" \ "mmcdev=0\0" \ "mmcpart=1\0" \ + "mmcpart_committed=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mmcblk0p${mmcpart} rootwait rw " \ + "root=/dev/mmcblk0p${mmcpart_committed} rootwait rw " \ __stringify(EXTRA_BOOTPARAMS) "\0" \ + "commit_mmc=if test \"${ustate}\" = 1 -a \"${mmcpart}\" != \"${mmcpart_committed}\"; then " \ + "setenv mmcpart_committed ${mmcpart};" \ + "saveenv;" \ + "fi;\0" \ "bootlimit=3\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart_committed} ${loadaddr} boot/${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ + "run commit_mmc; " \ "run mmcargs; " \ "if run loadfdt; then " \ "if bootz ${loadaddr} - ${fdt_addr}; then " \ @@ -48,10 +54,12 @@ "run altbootcmd; " \ "fi;\0" \ "altbootcmd=echo Performing rollback...; " \ - "if test \"${mmcpart}\" = 1; then " \ + "if test \"${mmcpart_committed}\" = 1; then " \ "setenv mmcpart 2; " \ + "setenv mmcpart_committed 2;" \ "else " \ "setenv mmcpart 1; " \ + "setenv mmcpart_committed 1;" \ "fi; setenv bootcount 0; setenv upgrade_available; setenv ustate 3; saveenv; " \ "run bootcmd;\0" -- 2.34.1
[PATCH v5 05/14] smegw01: Run altbootcmd in the case of failure
From: Eduard Strehlau Run the altbootcmd script if any step of bootcmd fails. This ensures that always a valid image can be run. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None configs/smegw01_defconfig | 2 +- include/configs/smegw01.h | 8 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 418151a6de05..b3580d5d6e54 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -18,7 +18,7 @@ CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; fi; " +CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; else run altbootcmd; fi; " CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 6ee4acc70d29..05edaac42f8e 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -39,7 +39,13 @@ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ + "if bootz ${loadaddr} - ${fdt_addr}; then " \ + "; " \ + "else " \ + "run altbootcmd; " \ + "fi;" \ + "else " \ + "run altbootcmd; " \ "fi;\0" \ "altbootcmd=echo Performing rollback...; " \ "if test \"${mmcpart}\" = 1; then " \ -- 2.34.1
[PATCH v5 04/14] smegw01: Add altbootcmd
From: Eduard Strehlau Add an altbootcmd script, which is convenient way to integrate with swupdate and perform a roll back of the previous working version in the case of update failure. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None configs/smegw01_defconfig | 2 +- include/configs/smegw01.h | 8 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 5d9d4194639d..418151a6de05 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -18,7 +18,7 @@ CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi; " +CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; fi; " CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index a356f095a68c..6ee4acc70d29 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -33,6 +33,7 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/mmcblk0p${mmcpart} rootwait rw " \ __stringify(EXTRA_BOOTPARAMS) "\0" \ + "bootlimit=3\0" \ "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ @@ -40,6 +41,13 @@ "if run loadfdt; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ "fi;\0" \ + "altbootcmd=echo Performing rollback...; " \ + "if test \"${mmcpart}\" = 1; then " \ + "setenv mmcpart 2; " \ + "else " \ + "setenv mmcpart 1; " \ + "fi; setenv bootcount 0; setenv upgrade_available; setenv ustate 3; saveenv; " \ + "run bootcmd;\0" /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -- 2.34.1
[PATCH v5 03/14] smegw01: Select bootcount support
From: Eduard Strehlau Add automatic boot counter that increases after every reset. After a power-on reset, it will be initialized with 1, and each reboot will increment the value by 1. By default it is disabled if bootlimit isn't set. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None configs/smegw01_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index f15291f1dd04..5d9d4194639d 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -46,6 +46,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y CONFIG_DFU_MMC=y CONFIG_DM_I2C=y CONFIG_SUPPORT_EMMC_BOOT=y -- 2.34.1
[PATCH v5 02/14] smegw01: Select CONFIG_CMD_SQUASHFS
From: Eduard Strehlau Select CONFIG_CMD_SQUASHFS so that the SquashFS U-Boot commands are available. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None configs/smegw01_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 1e0b9aa5be11..f15291f1dd04 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_SQUASHFS=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y -- 2.34.1
[PATCH v5 01/14] smegw01: Enable setting additional boot params
From: Eduard Strehlau Introduce EXTRA_BOOTPARAMS to allow passing additional parameters to kernel command line. This is useful for debugging purposes. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v4: - None include/configs/smegw01.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 11031744bef8..a356f095a68c 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -17,6 +17,11 @@ /* MMC Config*/ #define CFG_SYS_FSL_ESDHC_ADDR 0 +/* default to no extra bootparams, we need an empty define for stringification*/ +#ifndef EXTRA_BOOTPARAMS +#define EXTRA_BOOTPARAMS +#endif + #define CFG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "console=ttymxc0\0" \ @@ -26,7 +31,8 @@ "mmcdev=0\0" \ "mmcpart=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mmcblk0p${mmcpart} rootwait rw\0" \ + "root=/dev/mmcblk0p${mmcpart} rootwait rw " \ + __stringify(EXTRA_BOOTPARAMS) "\0" \ "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ -- 2.34.1
[PATCH v2 7/7] configs: rock5b-rk3588: add pci drivers and command
Add drivers for pciE , phy, and command. Signed-off-by: Eugen Hristev --- Changes in v2: - binman_fdt is now removed configs/rock5b-rk3588_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/rock5b-rk3588_defconfig b/configs/rock5b-rk3588_defconfig index 2685515d3956..3433e80f4b31 100644 --- a/configs/rock5b-rk3588_defconfig +++ b/configs/rock5b-rk3588_defconfig @@ -47,6 +47,7 @@ CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y CONFIG_CMD_SPI=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set @@ -72,7 +73,10 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PCI=y +CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_SPL_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y -- 2.34.1
[PATCH v2 5/7] ARM: dts: rockchip: rk3588s-u-boot: add pcie2x1l2 with PHY
From: Joseph Chen Add the node for pciE 2x1l 2 device together with the corresponding combphy. Signed-off-by: Joseph Chen [eugen.hris...@collabora.com: moved to -u-boot.dtsi, minor adaptations] Signed-off-by: Eugen Hristev [jo...@kwiboo.se: adapt to kernel node] Signed-off-by: Jonas Karlman --- Changes in v2: - add compliance with linux by Jonas arch/arm/dts/rk3588s-u-boot.dtsi | 77 1 file changed, 77 insertions(+) diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi index ad652c02e58e..6385da1471a5 100644 --- a/arch/arm/dts/rk3588s-u-boot.dtsi +++ b/arch/arm/dts/rk3588s-u-boot.dtsi @@ -4,6 +4,7 @@ */ #include "rockchip-u-boot.dtsi" +#include / { dmc { @@ -58,6 +59,11 @@ reg = <0x0 0xfd58a000 0x0 0x2000>; }; + pipe_phy0_grf: syscon@fd5bc000 { + compatible = "rockchip,pipe-phy-grf", "syscon"; + reg = <0x0 0xfd5bc000 0x0 0x100>; + }; + usb2phy2_grf: syscon@fd5d8000 { compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd"; @@ -104,6 +110,61 @@ }; }; + pcie2x1l2: pcie@fe19 { + compatible = "rockchip,rk3588-pcie", "snps,dw-pcie"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x40 0x4f>; + clocks = < ACLK_PCIE_1L2_MSTR>, < ACLK_PCIE_1L2_SLV>, +< ACLK_PCIE_1L2_DBI>, < PCLK_PCIE_1L2>, +< CLK_PCIE_AUX4>, < CLK_PCIE1L2_PIPE>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe"; + device_type = "pci"; + interrupts = , +, +, +, +; + interrupt-names = "sys", "pmc", "msg", "legacy", "err"; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 _intc 0>, + <0 0 0 2 _intc 1>, + <0 0 0 3 _intc 2>, + <0 0 0 4 _intc 3>; + linux,pci-domain = <4>; + num-ib-windows = <8>; + num-ob-windows = <8>; + num-viewport = <4>; + max-link-speed = <2>; + msi-map = <0x4000 0x4000 0x1000>; + num-lanes = <1>; + phys = <_ps PHY_TYPE_PCIE>; + phy-names = "pcie-phy"; + power-domains = < RK3588_PD_PCIE>; + ranges = <0x0100 0x0 0xf410 0x0 0xf410 0x0 0x0010>, +<0x0200 0x0 0xf420 0x0 0xf420 0x0 0x00e0>, +<0x0300 0x0 0x4000 0xa 0x 0x0 0x4000>; + reg = <0xa 0x4100 0x0 0x0040>, + <0x0 0xfe19 0x0 0x0001>, + <0x0 0xf400 0x0 0x0010>; + reg-names = "dbi", "apb", "config"; + resets = < SRST_PCIE4_POWER_UP>, < SRST_P_PCIE4>; + reset-names = "pcie", "periph"; + rockchip,pipe-grf = <_grf>; + status = "disabled"; + + pcie2x1l2_intc: legacy-interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-parent = <>; + interrupts = ; + }; + }; + sfc: spi@fe2b { compatible = "rockchip,sfc"; reg = <0x0 0xfe2b 0x0 0x4000>; @@ -134,6 +195,22 @@ reg = <0x0 0xfe378000 0x0 0x200>; status = "disabled"; }; + + combphy0_ps: phy@fee0 { + compatible = "rockchip,rk3588-naneng-combphy"; + reg = <0x0 0xfee0 0x0 0x100>; + #phy-cells = <1>; + clocks = < CLK_REF_PIPE_PHY0>, < PCLK_PCIE_COMBO_PIPE_PHY0>, +< PCLK_PHP_ROOT>; + clock-names = "refclk", "apbclk", "phpclk"; + assigned-clocks = < CLK_REF_PIPE_PHY0>; + assigned-clock-rates = <1>; + resets = < SRST_P_PCIE2_PHY0>, < SRST_REF_PIPE_PHY0>; + reset-names = "combphy-apb", "combphy"; + rockchip,pipe-grf = <_grf>; + rockchip,pipe-phy-grf = <_phy0_grf>; + status = "disabled"; + }; }; { -- 2.34.1
[PATCH v2 6/7] ARM: dts: rockchip: rock5b: enable pcie2x1l2 and associated combphy
From: Christopher Obbard Enable the pciE 2x1l 2 device and associated combphy. On this bus, the Rock5B has an Ethernet transceiver connected. Signed-off-by: Christopher Obbard [eugen.hris...@collabora.com: minor tweaks] Signed-off-by: Eugen Hristev [jo...@kwiboo.se: add pcie pins] Signed-off-by: Jonas Karlman --- Changes in v2: - add pcie2x1l2_pins by Jonas arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi index 78ffd60aaed4..d7650b7503a5 100644 --- a/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi +++ b/arch/arm/dts/rk3588-rock-5b-u-boot.dtsi @@ -30,13 +30,35 @@ }; }; +_ps { + status = "okay"; +}; + _pins { bootph-all; }; + { + pinctrl-names = "default"; + pinctrl-0 = <_pins _reset_h>; + reset-gpios = < RK_PB0 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + { bootph-all; + pcie { + pcie_reset_h: pcie-reset-h { + rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO _pull_none>; + }; + + pcie2x1l2_pins: pcie2x1l2-pins { + rockchip,pins = <3 RK_PC7 4 _pull_none>, + <3 RK_PD0 4 _pull_none>; + }; + }; + usb { vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO _pull_none>; -- 2.34.1
[PATCH v2 3/7] phy: rockchip: naneng-combphy: Add support for multiple resets
Some variants of the PHY have more than just one reset. To cover all cases, request the rests in bulk rather than just the reset at index 0. Co-developed-by: Ren Jianing Signed-off-by: Ren Jianing Signed-off-by: Eugen Hristev --- Changes in v2: - none drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index 78da5fe79700..b673a8da9f8e 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -76,7 +76,7 @@ struct rockchip_combphy_priv { struct regmap *pipe_grf; struct regmap *phy_grf; struct phy *phy; - struct reset_ctl phy_rst; + struct reset_ctl_bulk phy_rsts; struct clk ref_clk; const struct rockchip_combphy_cfg *cfg; }; @@ -189,7 +189,7 @@ static int rockchip_combphy_init(struct phy *phy) if (ret) goto err_clk; - reset_deassert(>phy_rst); + reset_deassert_bulk(>phy_rsts); return 0; @@ -204,7 +204,7 @@ static int rockchip_combphy_exit(struct phy *phy) struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev); clk_disable(>ref_clk); - reset_assert(>phy_rst); + reset_assert_bulk(>phy_rsts); return 0; } @@ -255,7 +255,7 @@ static int rockchip_combphy_parse_dt(struct udevice *dev, return PTR_ERR(>ref_clk); } - ret = reset_get_by_index(dev, 0, >phy_rst); + ret = reset_get_bulk(dev, >phy_rsts); if (ret) { dev_err(dev, "no phy reset control specified\n"); return ret; -- 2.34.1
[PATCH v2 4/7] phy: rockchip: naneng-combphy: Support rk3588
From: Jon Lin Add support for rk3588 phy variant. The PHY clock is fixed at 100MHz. Signed-off-by: Jon Lin [kever.y...@rock-chips.com: update pcie pll parameters] Co-developed-by: Kever Yang Signed-off-by: Kever Yang [eugen.hris...@collabora.com: squashed, tidy up] Signed-off-by: Eugen Hristev --- Changes in v2: - none .../rockchip/phy-rockchip-naneng-combphy.c| 95 +++ 1 file changed, 95 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c index b673a8da9f8e..d5408ccac976 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c @@ -58,6 +58,7 @@ struct rockchip_combphy_grfcfg { struct combphy_reg con2_for_sata; struct combphy_reg con3_for_sata; struct combphy_reg pipe_con0_for_sata; + struct combphy_reg pipe_con1_for_sata; struct combphy_reg pipe_sgmii_mac_sel; struct combphy_reg pipe_xpcs_phy_ready; struct combphy_reg u3otg0_port_en; @@ -423,11 +424,105 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = { .combphy_cfg= rk3568_combphy_cfg, }; +static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv) +{ + const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; + u32 val; + + switch (priv->mode) { + case PHY_TYPE_PCIE: + param_write(priv->phy_grf, >con0_for_pcie, true); + param_write(priv->phy_grf, >con1_for_pcie, true); + param_write(priv->phy_grf, >con2_for_pcie, true); + param_write(priv->phy_grf, >con3_for_pcie, true); + break; + case PHY_TYPE_USB3: + param_write(priv->phy_grf, >pipe_txcomp_sel, false); + param_write(priv->phy_grf, >pipe_txelec_sel, false); + param_write(priv->phy_grf, >usb_mode_set, true); + break; + case PHY_TYPE_SATA: + param_write(priv->phy_grf, >con0_for_sata, true); + param_write(priv->phy_grf, >con1_for_sata, true); + param_write(priv->phy_grf, >con2_for_sata, true); + param_write(priv->phy_grf, >con3_for_sata, true); + param_write(priv->pipe_grf, >pipe_con0_for_sata, true); + param_write(priv->pipe_grf, >pipe_con1_for_sata, true); + break; + case PHY_TYPE_SGMII: + case PHY_TYPE_QSGMII: + default: + dev_err(priv->dev, "incompatible PHY type\n"); + return -EINVAL; + } + + /* 100MHz refclock signal is good */ + clk_set_rate(>ref_clk, 1); + param_write(priv->phy_grf, >pipe_clk_100m, true); + if (priv->mode == PHY_TYPE_PCIE) { + /* PLL KVCO tuning fine */ + val = readl(priv->mmio + (0x20 << 2)); + val &= ~GENMASK(4, 2); + val |= 0x4 << 2; + writel(val, priv->mmio + (0x20 << 2)); + + /* Set up rx_trim: PLL LPF C1 85pf R1 1.25kohm */ + val = 0x4c; + writel(val, priv->mmio + (0x1b << 2)); + + /* Set up su_trim: T3 */ + val = 0xb0; + writel(val, priv->mmio + (0xa << 2)); + val = 0x47; + writel(val, priv->mmio + (0xb << 2)); + val = 0x57; + writel(val, priv->mmio + (0xd << 2)); + } + + return 0; +} + +static const struct rockchip_combphy_grfcfg rk3588_combphy_grfcfgs = { + /* pipe-phy-grf */ + .pcie_mode_set = { 0x, 5, 0, 0x00, 0x11 }, + .usb_mode_set = { 0x, 5, 0, 0x00, 0x04 }, + .pipe_rxterm_set= { 0x, 12, 12, 0x00, 0x01 }, + .pipe_txelec_set= { 0x0004, 1, 1, 0x00, 0x01 }, + .pipe_txcomp_set= { 0x0004, 4, 4, 0x00, 0x01 }, + .pipe_clk_25m = { 0x0004, 14, 13, 0x00, 0x01 }, + .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, + .pipe_rxterm_sel= { 0x0008, 8, 8, 0x00, 0x01 }, + .pipe_txelec_sel= { 0x0008, 12, 12, 0x00, 0x01 }, + .pipe_txcomp_sel= { 0x0008, 15, 15, 0x00, 0x01 }, + .pipe_clk_ext = { 0x000c, 9, 8, 0x02, 0x01 }, + .pipe_phy_status= { 0x0034, 6, 6, 0x01, 0x00 }, + .con0_for_pcie = { 0x, 15, 0, 0x00, 0x1000 }, + .con1_for_pcie = { 0x0004, 15, 0, 0x00, 0x }, + .con2_for_pcie = { 0x0008, 15, 0, 0x00, 0x0101 }, + .con3_for_pcie = { 0x000c, 15, 0, 0x00, 0x0200 }, + .con0_for_sata = { 0x, 15, 0, 0x00, 0x0129 }, + .con1_for_sata = { 0x0004, 15, 0, 0x00, 0x0040 }, + .con2_for_sata = { 0x0008, 15, 0, 0x00, 0x80c1 }, + .con3_for_sata = { 0x000c, 15, 0, 0x00, 0x0407 }, + /* pipe-grf */ + .pipe_con0_for_sata = { 0x, 11, 5,
[PATCH v2 2/7] pci: pcie_dw_rockchip: Support max_link_speed dts property
From: Jon Lin Add support for max_link_speed specified in the PCI DT binding. Signed-off-by: Jon Lin [eugen.hris...@collabora.com: port to latest API, set default correctly, align to 80 chars] Signed-off-by: Eugen Hristev [jo...@kwiboo.se: switch to dev_read_u32_default] Signed-off-by: Jonas Karlman --- Changes in v2: - move to dev_read_u32_default drivers/pci/pcie_dw_rockchip.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index ff121046604a..60c74bea24b2 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -42,6 +42,7 @@ struct rk_pcie { struct clk_bulk clks; struct reset_ctl_bulk rsts; struct gpio_descrst_gpio; + u32 gen; }; /* Parameters for the waiting for iATU enabled routine */ @@ -331,7 +332,7 @@ static int rockchip_pcie_init_port(struct udevice *dev) rk_pcie_writel_apb(priv, 0x0, 0xf00040); pcie_dw_setup_host(>dw); - ret = rk_pcie_link_up(priv, LINK_SPEED_GEN_3); + ret = rk_pcie_link_up(priv, priv->gen); if (ret < 0) goto err_link_up; @@ -397,6 +398,9 @@ static int rockchip_pcie_parse_dt(struct udevice *dev) goto rockchip_pcie_parse_dt_err_phy_get_by_index; } + priv->gen = dev_read_u32_default(dev, "max-link-speed", +LINK_SPEED_GEN_3); + return 0; rockchip_pcie_parse_dt_err_phy_get_by_index: -- 2.34.1
[PATCH v2 1/7] pci: pcie_dw_rockchip: Add rk3588 compatible
From: Jon Lin Add compatible for RK3588 SoC. Signed-off-by: Jon Lin --- Changes in v2: - none drivers/pci/pcie_dw_rockchip.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c index 6155710a9f5f..ff121046604a 100644 --- a/drivers/pci/pcie_dw_rockchip.c +++ b/drivers/pci/pcie_dw_rockchip.c @@ -468,6 +468,7 @@ static const struct dm_pci_ops rockchip_pcie_ops = { static const struct udevice_id rockchip_pcie_ids[] = { { .compatible = "rockchip,rk3568-pcie" }, + { .compatible = "rockchip,rk3588-pcie" }, { } }; -- 2.34.1
Re: [PATCH v2 0/2] Update mailmap ids
On 4/26/23 08:01, Ashok Reddy Soma wrote: In this patch series - Sort mailmap ids according to dictionary order - Update all Xilinx users mail ids to AMD Changes in v2: - Updated the missing mailids - Removed the space after mail id - Added closing brace for Vikhyat Goyal email id Algapally Santosh Sagar (2): .mailmap: Sort the mailmap ids in dictionary order .mailmap: Map all Xilinx users mail ids to AMD .mailmap | 81 +--- 1 file changed, 65 insertions(+), 16 deletions(-) Reviewed-by: Michal Simek Thanks, Michal
Re: [PATCH] Revert "spi: zynq_qspi: Use dummy buswidth in dummy byte calculation"
On 3/31/23 16:44, Stefan Herbrechtsmeier wrote: From: Stefan Herbrechtsmeier This reverts commit e09784728689de7949d4cdd559a9590e0bfcc702. The commit wrongly divides the dummy bytes by dummy bus width to calculate the dummy bytes. The framework already converts the dummy cycles to the number of bytes and the controller use the SPI flash command to determine the dummy cycles via the address width. Signed-off-by: Stefan Herbrechtsmeier --- drivers/spi/zynq_qspi.c | 10 ++ 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c index 00e3ffcd1d..d1d4048966 100644 --- a/drivers/spi/zynq_qspi.c +++ b/drivers/spi/zynq_qspi.c @@ -676,7 +676,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) { int op_len, pos = 0, ret, i; - u32 dummy_bytes = 0; unsigned int flag = 0; const u8 *tx_buf = NULL; u8 *rx_buf = NULL; @@ -689,11 +688,6 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, } op_len = op->cmd.nbytes + op->addr.nbytes + op->dummy.nbytes; - if (op->dummy.nbytes) { - op_len = op->cmd.nbytes + op->addr.nbytes + -op->dummy.nbytes / op->dummy.buswidth; - dummy_bytes = op->dummy.nbytes / op->dummy.buswidth; - } u8 op_buf[op_len]; @@ -707,8 +701,8 @@ static int zynq_qspi_exec_op(struct spi_slave *slave, pos += op->addr.nbytes; } - if (dummy_bytes) - memset(op_buf + pos, 0xff, dummy_bytes); + if (op->dummy.nbytes) + memset(op_buf + pos, 0xff, op->dummy.nbytes); /* 1st transfer: opcode + address + dummy cycles */ /* Make sure to set END bit if no tx or rx data messages follow */ -- 2.30.2 Kommanditgesellschaft - Sitz: Detmold - Amtsgericht Lemgo HRA 2790 - Komplementärin: Weidmüller Interface Führungsgesellschaft mbH - Sitz: Detmold - Amtsgericht Lemgo HRB 3924; Geschäftsführer: Dr. Timo Berger, Volker Bibelhausen, Dr. Sebastian Durst, André Sombecki; USt-ID-Nr. DE124599660 Can you please rebase it on the top of the latest version? $ git am -s ./20230331_stefan_herbrechtsmeier_oss_revert_spi_zynq_qspi_use_dummy_buswidth_in_dummy_byte_calculatio.mbx Adding link to lore.kernel.org Applying: Revert "spi: zynq_qspi: Use dummy buswidth in dummy byte calculation" error: patch failed: drivers/spi/zynq_qspi.c:676 error: drivers/spi/zynq_qspi.c: patch does not apply Patch failed at 0001 Revert "spi: zynq_qspi: Use dummy buswidth in dummy byte calculation" hint: Use 'git am --show-current-patch=diff' to see the failed patch When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". Thanks, Michal
[PATCH v3 1/2] mtd: cfi: respect reg address length
flash_get_size() will get the flash size from the device itself and go through all erase regions to read protection status. However, the device mappable region (eg: devicetree reg property) might be lower than the device full size which means that the above cycle will result in a data bus exception. This change fixes it by reading the 'addr_size' during probe() and also use that as one possible upper limit. Signed-off-by: Nuno Sá --- v2: * Fix compilation when CONFIG_CFI_FLASH is not set. Done by redefining cfi_flash_bank_size() when CONFIG_CFI_FLASH is set (by returning dts size). v3: * Fix another compilation warning by explicitly casting to unsigned long in cfi_flash_bank_size() Stefan, I did ran a world build [1] by opening a PR in github (to force CI to run). However I had to bypass the pytest stage (it was giving me some unrelated problems) and there are a couple of jobs failing but the errors apparently are not related to this patchset. Hopefully things now pass in your tests. [1]: https://github.com/u-boot/u-boot/pull/281 drivers/mtd/cfi_flash.c | 11 +-- include/flash.h | 1 + 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index f378f6fb6139..87a3daebdabe 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -116,12 +116,16 @@ phys_addr_t cfi_flash_bank_addr(int i) { return flash_info[i].base; } + +unsigned long cfi_flash_bank_size(int i) +{ + return (unsigned long)flash_info[i].addr_size; +} #else __weak phys_addr_t cfi_flash_bank_addr(int i) { return ((phys_addr_t [])CFG_SYS_FLASH_BANKS_LIST)[i]; } -#endif __weak unsigned long cfi_flash_bank_size(int i) { @@ -131,6 +135,7 @@ __weak unsigned long cfi_flash_bank_size(int i) return 0; #endif } +#endif __maybe_weak void flash_write8(u8 value, void *addr) { @@ -2492,15 +2497,17 @@ unsigned long flash_init(void) static int cfi_flash_probe(struct udevice *dev) { fdt_addr_t addr; + fdt_size_t size; int idx; for (idx = 0; idx < CFI_MAX_FLASH_BANKS; idx++) { - addr = dev_read_addr_index(dev, idx); + addr = dev_read_addr_size_index(dev, idx, ); if (addr == FDT_ADDR_T_NONE) break; flash_info[cfi_flash_num_flash_banks].dev = dev; flash_info[cfi_flash_num_flash_banks].base = addr; + flash_info[cfi_flash_num_flash_banks].addr_size = size; cfi_flash_num_flash_banks++; } gd->bd->bi_flashstart = flash_info[0].base; diff --git a/include/flash.h b/include/flash.h index 95992fa689bb..3710a2731b76 100644 --- a/include/flash.h +++ b/include/flash.h @@ -46,6 +46,7 @@ typedef struct { #ifdef CONFIG_CFI_FLASH/* DM-specific parts */ struct udevice *dev; phys_addr_t base; + phys_size_t addr_size; #endif } flash_info_t; -- 2.40.0
[PATCH v3 2/2] mtd: cfi: change cfi_flash_bank_size() return type
Move return type to phys_size_t instead of plain unsigned long. Signed-off-by: Nuno Sá --- v2: * new patch. v3: * also make sure cfi_flash_bank_size() declaration (in cfi_flash.h) gets updated to phys_size_t. drivers/mtd/cfi_flash.c | 10 +- include/mtd/cfi_flash.h | 2 +- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index 87a3daebdabe..9c030de3afef 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -117,9 +117,9 @@ phys_addr_t cfi_flash_bank_addr(int i) return flash_info[i].base; } -unsigned long cfi_flash_bank_size(int i) +phys_size_t cfi_flash_bank_size(int i) { - return (unsigned long)flash_info[i].addr_size; + return flash_info[i].addr_size; } #else __weak phys_addr_t cfi_flash_bank_addr(int i) @@ -127,10 +127,10 @@ __weak phys_addr_t cfi_flash_bank_addr(int i) return ((phys_addr_t [])CFG_SYS_FLASH_BANKS_LIST)[i]; } -__weak unsigned long cfi_flash_bank_size(int i) +__weak phys_size_t cfi_flash_bank_size(int i) { #ifdef CFG_SYS_FLASH_BANKS_SIZES - return ((unsigned long [])CFG_SYS_FLASH_BANKS_SIZES)[i]; + return ((phys_size_t [])CFG_SYS_FLASH_BANKS_SIZES)[i]; #else return 0; #endif @@ -2112,7 +2112,7 @@ ulong flash_get_size(phys_addr_t base, int banknum) int erase_region_size; int erase_region_count; struct cfi_qry qry; - unsigned long max_size; + phys_size_t max_size; memset(, 0, sizeof(qry)); diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 52cd1c4dbc4e..1900a4a2f6e4 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -175,7 +175,7 @@ extern int cfi_flash_num_flash_banks; #endif phys_addr_t cfi_flash_bank_addr(int i); -unsigned long cfi_flash_bank_size(int i); +phys_size_t cfi_flash_bank_size(int i); #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS void flash_write8(u8 value, void *addr); -- 2.40.0
Re: [PATCH v2] arch: arm: mach-k3: Delete tifs node in DT fixup
Hi Neha, On 4/26/2023 5:31 PM, Neha Malcom Francis wrote: Hi Udit On 26/04/23 16:09, Kumar, Udit wrote: Hi Neha, Hi Udit, [..] I do have a general doubt; why do we have only atf-sram sub-node in msmc_sram in all other devices (j721e, j7200 and am65) except j721s2? let me know, which source code you are referring to In U-Boot, for j721e, j7200 and am65; they *only* contain atf-sram? For u-boot please see https://elixir.bootlin.com/u-boot/latest/source/arch/arm/dts/k3-j721s2-main.dtsi#L16 I could see for j721s2 as well, in uboot[0] and Linux[1] [..] What I mean to ask is, why aren't there tifs or l3cache subnodes in j721e, j7200 and am65? I think, above platform is doing in right way, AFAIK, if we have to provide then we can provide size of this. l3-cache can not be addressable. But in any case, u-boot removes this code before passing to OS. https://elixir.bootlin.com/u-boot/latest/source/arch/arm/mach-k3/common.c#L354 Thanking You Neha Malcom Francis
Re: [PATCH v2] arch: arm: mach-k3: Delete tifs node in DT fixup
On 17:31-20230426, Neha Malcom Francis wrote: > Hi Udit > > On 26/04/23 16:09, Kumar, Udit wrote: > > Hi Neha, > > > > > Hi Udit, > > > > [..] > > > > > > > > > > > > I do have a general doubt; why do we have only atf-sram sub-node in > > > > > msmc_sram in all other devices (j721e, j7200 and am65) except j721s2? > > > > > > > > let me know, which source code you are referring to > > > > > > > > > > In U-Boot, for j721e, j7200 and am65; they *only* contain atf-sram? > > > > For u-boot please see > > > > https://elixir.bootlin.com/u-boot/latest/source/arch/arm/dts/k3-j721s2-main.dtsi#L16 > > > > > > I could see for j721s2 as well, in uboot[0] and Linux[1] > > [..] > > > > What I mean to ask is, why aren't there tifs or l3cache subnodes in j721e, > j7200 and am65? > am65x has it https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/ti/k3-am65-main.dtsi#n17 J7200 and j721e is missing it https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi#n27 https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi#n15 we need to fix it. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Re: [PATCH v4 14/14] smegw01: Convert CFG_EXTRA_ENV_SETTINGS to an env file
On Wed, Apr 26, 2023 at 10:25:33AM -0300, Fabio Estevam wrote: > From: Fabio Estevam > > Currently, it is recommended to move from CFG_EXTRA_ENV_SETTINGS to > an env file, so do the conversion. > > Suggested-by: Tom Rini > Signed-off-by: Fabio Estevam > --- > Changes since v3: > - New patch added as per Tom Rini's suggestion. > > Cc: Tom Rini [snip] > diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h > index 6f373973ab84..d1c442577478 100644 > --- a/include/configs/smegw01.h > +++ b/include/configs/smegw01.h > @@ -24,19 +24,17 @@ > > #ifdef CONFIG_SYS_BOOT_LOCKED > #define EXTRA_ENV_FLAGS > -#define SETUP_BOOT_MENU "setup_boot_menu=setenv bootmenu_0 eMMC=run > bootcmd\0" > +#define SETUP_BOOT_MENU setup_boot_menu=setenv bootmenu_0 eMMC=run bootcmd > #else > #define EXTRA_ENV_FLAGS "mmcdev:dw," > -#define SETUP_BOOT_MENU "setup_boot_menu=" \ > - "if test \"${mmcdev}\" = 1; then " \ > - "setenv emmc_priority 0;" \ > - "setenv sd_priority 1;" \ > - "else " \ > - "setenv emmc_priority 1;" \ > - "setenv sd_priority 0;" \ > - "fi;" \ > - "setenv bootmenu_${emmc_priority} eMMC=run boot_emmc;" \ > - "setenv bootmenu_${sd_priority} SD=run boot_sd;\0" > +#define SETUP_BOOT_MENU setup_boot_menu= \ > + if test "${mmcdev}" = 1; then \ > + setenv emmc_priority 0; \ > + setenv sd_priority 1; \ > + else setenv emmc_priority 1; \ > + setenv sd_priority 0; \ > + fi; \ > + setenv bootmenu_${emmc_priority} eMMC=run > boot_emmc;setenv bootmenu_${sd_priority} SD=run boot_sd; > #endif We can define SETUP_BOOT_MENU in the .env file too, it still gets the preprocessor (and will make eventual removal of board.h files easier). Thanks! -- Tom signature.asc Description: PGP signature
[PATCH v4 14/14] smegw01: Convert CFG_EXTRA_ENV_SETTINGS to an env file
From: Fabio Estevam Currently, it is recommended to move from CFG_EXTRA_ENV_SETTINGS to an env file, so do the conversion. Suggested-by: Tom Rini Signed-off-by: Fabio Estevam --- Changes since v3: - New patch added as per Tom Rini's suggestion. Cc: Tom Rini board/storopack/smegw01/smegw01.env | 76 include/configs/smegw01.h | 77 - 2 files changed, 85 insertions(+), 68 deletions(-) create mode 100644 board/storopack/smegw01/smegw01.env diff --git a/board/storopack/smegw01/smegw01.env b/board/storopack/smegw01/smegw01.env new file mode 100644 index ..d2e6b3cf64f6 --- /dev/null +++ b/board/storopack/smegw01/smegw01.env @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0+ + +altbootcmd= + echo Performing rollback...; + if test "${mmcpart_committed}" = 1; then + setenv mmcpart 2; + setenv mmcpart_committed 2; + else + setenv mmcpart 1; + setenv mmcpart_committed 1; + fi; + setenv bootcount 0; + setenv upgrade_available; + setenv ustate 3; + saveenv; + run bootcmd; +boot_emmc=setenv mmcdev_wanted 1; run persist_mmcdev; run bootcmd; +boot_sd=setenv mmcdev_wanted 0; run persist_mmcdev; run bootcmd; +bootcmd=run finduuid; run distro_bootcmd +bootdelay=2 +bootlimit=3 +bootm_size=0x1000 +commit_mmc= + if test "${ustate}" = 1 -a "${mmcpart}" != "${mmcpart_committed}"; then + setenv mmcpart_committed ${mmcpart}; + saveenv; + fi; +console=ttymxc0 +fdt_addr=0x8300 +fdtfile=imx7d-smegw01.dtb +fit_addr=0x8800 +image=fitImage +loadaddr=0x8080 +loadbootpart=mmc partconf 1 boot_part +loadimage=load mmc ${mmcdev}:${gpt_partition_entry} ${fit_addr} boot/${image} +loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed} +mmcargs= + setenv bootargs console=${console},${baudrate} root=/dev/mmcblk${mmcdev}p${gpt_partition_entry} rootwait rw SM_ROOT_DEV=${mmcdev} SM_ROOT_PART=${gpt_partition_entry} SM_BOOT_PART=${boot_part} +mmcboot= + echo Booting...; + echo mmcdev: ${mmcdev}; + run commit_mmc; + echo mmcpart: ${mmcpart_committed}; + run loadpart; + echo gptpart: ${gpt_partition_entry}; + run loadbootpart; + if run loadimage; then + ; + else + run altbootcmd; + fi; + run mmcargs; + if bootm ${fit_addr}; then + ; + else + run altbootcmd; + fi; +mmcdev=1 +mmcpart=1 +mmcpart_committed=1 +persist_mmcdev= + if test "${mmcdev}" != "${mmcdev_wanted}"; then + setenv mmcdev "${mmcdev_wanted}"; + saveenv; + fi; +setup_boot_menu= + if test "${mmcdev}" = 1; then + setenv emmc_priority 0; + setenv sd_priority 1; + else + setenv emmc_priority 1; + setenv sd_priority 0; + fi; + setenv bootmenu_${emmc_priority} eMMC=run boot_emmc; + setenv bootmenu_${sd_priority} SD=run boot_sd; +SETUP_BOOT_MENU diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 6f373973ab84..d1c442577478 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -24,19 +24,17 @@ #ifdef CONFIG_SYS_BOOT_LOCKED #define EXTRA_ENV_FLAGS -#define SETUP_BOOT_MENU "setup_boot_menu=setenv bootmenu_0 eMMC=run bootcmd\0" +#define SETUP_BOOT_MENU setup_boot_menu=setenv bootmenu_0 eMMC=run bootcmd #else #define EXTRA_ENV_FLAGS "mmcdev:dw," -#define SETUP_BOOT_MENU "setup_boot_menu=" \ - "if test \"${mmcdev}\" = 1; then " \ - "setenv emmc_priority 0;" \ - "setenv sd_priority 1;" \ - "else " \ - "setenv emmc_priority 1;" \ - "setenv sd_priority 0;" \ - "fi;" \ - "setenv bootmenu_${emmc_priority} eMMC=run boot_emmc;" \ - "setenv bootmenu_${sd_priority} SD=run boot_sd;\0" +#define SETUP_BOOT_MENU setup_boot_menu= \ + if test "${mmcdev}" = 1; then \ + setenv emmc_priority 0; \ + setenv sd_priority 1; \ + else setenv emmc_priority 1; \ + setenv sd_priority 0; \ + fi; \ + setenv bootmenu_${emmc_priority} eMMC=run boot_emmc;setenv bootmenu_${sd_priority} SD=run boot_sd; #endif #define CFG_ENV_FLAGS_LIST_STATIC \ @@ -48,63 +46,6 @@ "upgrade_available:dw," \ EXTRA_ENV_FLAGS -#define CFG_EXTRA_ENV_SETTINGS \ - "image=fitImage\0" \ - "console=ttymxc0\0" \ - "fdtfile=imx7d-smegw01.dtb\0" \ - "fdt_addr=0x8300\0" \ - "bootm_size=0x1000\0" \ - "mmcdev=1\0" \ - "mmcpart=1\0" \ - "mmcpart_committed=1\0" \ - "mmcargs=setenv bootargs console=${console},${baudrate} " \ -
[PATCH v4 13/14] smegw01: Fix fallback to altbootcmd
From: Eduard Strehlau The bootcmd/altbootcmd mechanism is not invoked for bootmenus. Manually compare bootcount and bootlimit to implement fallback on all codepaths. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None configs/smegw01_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index fe8152f33e6e..3d2713f52807 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -23,7 +23,7 @@ CONFIG_AUTOBOOT_MENU_SHOW=y # CONFIG_CMD_BOOTEFI_BOOTMGR is not set CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; " +CONFIG_BOOTCOMMAND="if test \"${bootcount}\" -gt \"${bootlimit}\"; then run altbootcmd; else if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; fi;" CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="run setup_boot_menu;" CONFIG_HUSH_PARSER=y -- 2.34.1
[PATCH v4 12/14] smegw01: Disable additional boot menu options
From: Eduard Strehlau Defaults have changed, we do not want the bootmenu to contain EFI options. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None configs/smegw01_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index ea25b3b87ce4..fe8152f33e6e 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -19,6 +19,8 @@ CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_AUTOBOOT_MENU_SHOW=y +# CONFIG_BOOTSTD is not set +# CONFIG_CMD_BOOTEFI_BOOTMGR is not set CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; " -- 2.34.1
[PATCH v4 11/14] smegw01: Read the second MAC address
From: Fabio Estevam Currently, only the first MAC address is read from the fuses. The second MAC address is not read and Linux assigns a random one. To prevent this behavior, read the second MAC address from the fuses and store it into the eth1addr environment variable so that it can be passed to Linux. Signed-off-by: Fabio Estevam --- Changes since v3: - None board/storopack/smegw01/smegw01.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c index e648b196b9d1..20c09700bf0d 100644 --- a/board/storopack/smegw01/smegw01.c +++ b/board/storopack/smegw01/smegw01.c @@ -82,6 +82,7 @@ int board_init(void) int board_late_init(void) { struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + unsigned char eth1addr[6]; imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); @@ -93,6 +94,11 @@ int board_late_init(void) */ clrsetbits_le16(>wcr, 0, 0x10); + /* Get the second MAC address */ + imx_get_mac_from_fuse(1, eth1addr); + if (!env_get("eth1addr") && is_valid_ethaddr(eth1addr)) + eth_env_set_enetaddr("eth1addr", eth1addr); + return 0; } -- 2.34.1
[PATCH v4 10/14] smegw01: Add lockdown U-Boot env support
From: Eduard Strehlau Add lockdown U-Boot env support so that only certain U-Boot environment variables are allowed to be modified. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None board/storopack/smegw01/Kconfig | 7 + board/storopack/smegw01/smegw01.c | 17 +++ configs/smegw01_defconfig | 11 ++- include/configs/smegw01.h | 48 +-- 4 files changed, 79 insertions(+), 4 deletions(-) diff --git a/board/storopack/smegw01/Kconfig b/board/storopack/smegw01/Kconfig index d8f24695d0d2..390214c285bb 100644 --- a/board/storopack/smegw01/Kconfig +++ b/board/storopack/smegw01/Kconfig @@ -12,4 +12,11 @@ config SYS_CONFIG_NAME config IMX_CONFIG default "board/storopack/smegw01/imximage.cfg" +config SYS_BOOT_LOCKED + bool "Lock boot process to EMMC" + default y + help + Say N here if you want to boot from eMMC and SD. + Say Y to boot from eMMC. + endif diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c index 7d4de9326d6f..e648b196b9d1 100644 --- a/board/storopack/smegw01/smegw01.c +++ b/board/storopack/smegw01/smegw01.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -103,3 +104,19 @@ uint board_mmc_get_env_part(struct mmc *mmc) part = 0; return part; } + +enum env_location env_get_location(enum env_operation op, int prio) +{ + if (op == ENVOP_SAVE || op == ENVOP_ERASE) + return ENVL_MMC; + + switch (prio) { + case 0: + return ENVL_NOWHERE; + + case 1: + return ENVL_MMC; + } + + return ENVL_UNKNOWN; +} diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 54cf1cfc1f1b..ea25b3b87ce4 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_OFFSET=0x10 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx7d-smegw01" CONFIG_TARGET_SMEGW01=y +# CONFIG_SYS_BOOT_LOCKED is not set CONFIG_ENV_OFFSET_REDUND=0x11 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set @@ -17,13 +18,18 @@ CONFIG_SYS_MEMTEST_START=0x8000 CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y +CONFIG_AUTOBOOT_MENU_SHOW=y +CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; else run altbootcmd; fi; " +CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; run mmcboot; " +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="run setup_boot_menu;" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 # CONFIG_CMD_BOOTD is not set CONFIG_CMD_BOOTZ=y +CONFIG_CMD_BOOTMENU=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_MEMTEST=y @@ -43,9 +49,12 @@ CONFIG_CMD_SQUASHFS=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_NOWHERE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 +CONFIG_ENV_WRITEABLE_LIST=y +CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 85218832..6f373973ab84 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -22,6 +22,32 @@ #define EXTRA_BOOTPARAMS #endif +#ifdef CONFIG_SYS_BOOT_LOCKED +#define EXTRA_ENV_FLAGS +#define SETUP_BOOT_MENU "setup_boot_menu=setenv bootmenu_0 eMMC=run bootcmd\0" +#else +#define EXTRA_ENV_FLAGS "mmcdev:dw," +#define SETUP_BOOT_MENU "setup_boot_menu=" \ + "if test \"${mmcdev}\" = 1; then " \ + "setenv emmc_priority 0;" \ + "setenv sd_priority 1;" \ + "else " \ + "setenv emmc_priority 1;" \ + "setenv sd_priority 0;" \ + "fi;" \ + "setenv bootmenu_${emmc_priority} eMMC=run boot_emmc;" \ + "setenv bootmenu_${sd_priority} SD=run boot_sd;\0" +#endif + +#define CFG_ENV_FLAGS_LIST_STATIC \ + "mmcpart:dw," \ + "mmcpart_committed:dw," \ + "ustate:dw," \ + "bootcount:dw," \ + "bootlimit:dw," \ + "upgrade_available:dw," \ + EXTRA_ENV_FLAGS + #define CFG_EXTRA_ENV_SETTINGS \ "image=fitImage\0" \ "console=ttymxc0\0" \ @@ -40,13 +66,28 @@ "fi;\0" \ "bootlimit=3\0" \ "fit_addr=0x8800\0" \ - "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fit_addr} boot/${image}\0" \ + "loadimage=load mmc ${mmcdev}:${gpt_partition_entry} ${fit_addr} boot/${image}\0" \ "loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed}\0" \ "loadbootpart=mmc partconf 1 boot_part\0" \ - "mmcboot=echo Booting from
[PATCH v4 09/14] smegw01: Switch to fitImage
From: Eduard Strehlau Instead of loading the zImage kernel and the devicetree separately, switch to the fitImage format, which is more convenient when working with secure boot, for example. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None include/configs/smegw01.h | 14 +- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 8f68472f5bad..85218832 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -23,7 +23,7 @@ #endif #define CFG_EXTRA_ENV_SETTINGS \ - "image=zImage\0" \ + "image=fitImage\0" \ "console=ttymxc0\0" \ "fdtfile=imx7d-smegw01.dtb\0" \ "fdt_addr=0x8300\0" \ @@ -39,8 +39,8 @@ "saveenv;" \ "fi;\0" \ "bootlimit=3\0" \ - "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${loadaddr} boot/${image}\0" \ - "loadfdt=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ + "fit_addr=0x8800\0" \ + "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fit_addr} boot/${image}\0" \ "loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed}\0" \ "loadbootpart=mmc partconf 1 boot_part\0" \ "mmcboot=echo Booting from mmc ...; " \ @@ -48,12 +48,8 @@ "run loadpart; " \ "run loadbootpart; " \ "run mmcargs; " \ - "if run loadfdt; then " \ - "if bootz ${loadaddr} - ${fdt_addr}; then " \ - "; " \ - "else " \ - "run altbootcmd; " \ - "fi;" \ + "if bootm ${fit_addr}; then " \ + "; " \ "else " \ "run altbootcmd; " \ "fi;\0" \ -- 2.34.1
[PATCH v4 08/14] smegw01: Change default boot device to eMMC
From: Eduard Strehlau Let eMMC be the default boot medium. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None include/configs/smegw01.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 71f2d9c8e85c..8f68472f5bad 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -28,7 +28,7 @@ "fdtfile=imx7d-smegw01.dtb\0" \ "fdt_addr=0x8300\0" \ "bootm_size=0x1000\0" \ - "mmcdev=0\0" \ + "mmcdev=1\0" \ "mmcpart=1\0" \ "mmcpart_committed=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ -- 2.34.1
[PATCH v4 07/14] smegw01: Enable EMMC boot from multiple partitions
From: Eduard Strehlau GPT Partition labels are used for determining the right root filesystem to boot from. The U-Boot environment is configured to reside in the eMMC hardware boot partition we are currently booted from. This should enable a dual copy approach for upgrading the bootloader. One can overwrite the inactive hardware partition with new bootloader and environment and afterwards switch the eMMC boot partition for an atomic bootloader switch. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None board/storopack/smegw01/smegw01.c | 10 ++ configs/smegw01_defconfig | 2 ++ include/configs/smegw01.h | 12 3 files changed, 20 insertions(+), 4 deletions(-) diff --git a/board/storopack/smegw01/smegw01.c b/board/storopack/smegw01/smegw01.c index e6bff80e5565..7d4de9326d6f 100644 --- a/board/storopack/smegw01/smegw01.c +++ b/board/storopack/smegw01/smegw01.c @@ -17,6 +17,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -93,3 +94,12 @@ int board_late_init(void) return 0; } + +uint board_mmc_get_env_part(struct mmc *mmc) +{ + uint part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config); + + if (part == 7) + part = 0; + return part; +} diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index b3580d5d6e54..54cf1cfc1f1b 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -30,6 +30,7 @@ CONFIG_CMD_MEMTEST=y CONFIG_CMD_UNZIP=y CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_PART=y CONFIG_CMD_DHCP=y @@ -44,6 +45,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y CONFIG_BOOTCOUNT_LIMIT=y diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 277c828d0e07..71f2d9c8e85c 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -32,17 +32,21 @@ "mmcpart=1\0" \ "mmcpart_committed=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mmcblk0p${mmcpart_committed} rootwait rw " \ - __stringify(EXTRA_BOOTPARAMS) "\0" \ + "root=/dev/mmcblk${mmcdev}p${gpt_partition_entry} rootwait rw " \ + __stringify(EXTRA_BOOTPARAMS) " SM_ROOT_DEV=${mmcdev} SM_ROOT_PART=${gpt_partition_entry} SM_BOOT_PART=${boot_part}\0" \ "commit_mmc=if test \"${ustate}\" = 1 -a \"${mmcpart}\" != \"${mmcpart_committed}\"; then " \ "setenv mmcpart_committed ${mmcpart};" \ "saveenv;" \ "fi;\0" \ "bootlimit=3\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart_committed} ${loadaddr} boot/${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ + "loadimage=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${loadaddr} boot/${image}\0" \ + "loadfdt=load mmc ${mmcdev}#rootfs-${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ + "loadpart=gpt setenv mmc ${mmcdev} rootfs-${mmcpart_committed}\0" \ + "loadbootpart=mmc partconf 1 boot_part\0" \ "mmcboot=echo Booting from mmc ...; " \ "run commit_mmc; " \ + "run loadpart; " \ + "run loadbootpart; " \ "run mmcargs; " \ "if run loadfdt; then " \ "if bootz ${loadaddr} - ${fdt_addr}; then " \ -- 2.34.1
[PATCH v4 06/14] smegw01: Only commit to new partition if update was successful
From: Eduard Strehlau When performing rootfs update via swupdate, it is convenient to check the 'ustate' variable to decide whether the update succeeded or not. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None include/configs/smegw01.h | 16 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 05edaac42f8e..277c828d0e07 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -30,13 +30,19 @@ "bootm_size=0x1000\0" \ "mmcdev=0\0" \ "mmcpart=1\0" \ + "mmcpart_committed=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mmcblk0p${mmcpart} rootwait rw " \ + "root=/dev/mmcblk0p${mmcpart_committed} rootwait rw " \ __stringify(EXTRA_BOOTPARAMS) "\0" \ + "commit_mmc=if test \"${ustate}\" = 1 -a \"${mmcpart}\" != \"${mmcpart_committed}\"; then " \ + "setenv mmcpart_committed ${mmcpart};" \ + "saveenv;" \ + "fi;\0" \ "bootlimit=3\0" \ - "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ - "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ + "loadimage=load mmc ${mmcdev}:${mmcpart_committed} ${loadaddr} boot/${image}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart_committed} ${fdt_addr} boot/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ + "run commit_mmc; " \ "run mmcargs; " \ "if run loadfdt; then " \ "if bootz ${loadaddr} - ${fdt_addr}; then " \ @@ -48,10 +54,12 @@ "run altbootcmd; " \ "fi;\0" \ "altbootcmd=echo Performing rollback...; " \ - "if test \"${mmcpart}\" = 1; then " \ + "if test \"${mmcpart_committed}\" = 1; then " \ "setenv mmcpart 2; " \ + "setenv mmcpart_committed 2;" \ "else " \ "setenv mmcpart 1; " \ + "setenv mmcpart_committed 1;" \ "fi; setenv bootcount 0; setenv upgrade_available; setenv ustate 3; saveenv; " \ "run bootcmd;\0" -- 2.34.1
[PATCH v4 05/14] smegw01: Run altbootcmd in the case of failure
From: Eduard Strehlau Run the altbootcmd script if any step of bootcmd fails. This ensures that always a valid image can be run. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None configs/smegw01_defconfig | 2 +- include/configs/smegw01.h | 8 +++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 418151a6de05..b3580d5d6e54 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -18,7 +18,7 @@ CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; fi; " +CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; else run altbootcmd; fi; " CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 6ee4acc70d29..05edaac42f8e 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -39,7 +39,13 @@ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if run loadfdt; then " \ - "bootz ${loadaddr} - ${fdt_addr}; " \ + "if bootz ${loadaddr} - ${fdt_addr}; then " \ + "; " \ + "else " \ + "run altbootcmd; " \ + "fi;" \ + "else " \ + "run altbootcmd; " \ "fi;\0" \ "altbootcmd=echo Performing rollback...; " \ "if test \"${mmcpart}\" = 1; then " \ -- 2.34.1
[PATCH v4 04/14] smegw01: Add altbootcmd
From: Eduard Strehlau Add an altbootcmd script, which is convenient way to integrate with swupdate and perform a roll back of the previous working version in the case of update failure. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None configs/smegw01_defconfig | 2 +- include/configs/smegw01.h | 8 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 5d9d4194639d..418151a6de05 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -18,7 +18,7 @@ CONFIG_SYS_MEMTEST_END=0xa000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="if run loadimage; then run mmcboot; fi; " +CONFIG_BOOTCOMMAND="if test \"${ustate}\" = 1; then setenv upgrade_available 1; saveenv; fi; if run loadimage; then run mmcboot; fi; " CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_PBSIZE=532 diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index a356f095a68c..6ee4acc70d29 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -33,6 +33,7 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=/dev/mmcblk0p${mmcpart} rootwait rw " \ __stringify(EXTRA_BOOTPARAMS) "\0" \ + "bootlimit=3\0" \ "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ @@ -40,6 +41,13 @@ "if run loadfdt; then " \ "bootz ${loadaddr} - ${fdt_addr}; " \ "fi;\0" \ + "altbootcmd=echo Performing rollback...; " \ + "if test \"${mmcpart}\" = 1; then " \ + "setenv mmcpart 2; " \ + "else " \ + "setenv mmcpart 1; " \ + "fi; setenv bootcount 0; setenv upgrade_available; setenv ustate 3; saveenv; " \ + "run bootcmd;\0" /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR -- 2.34.1
[PATCH v4 03/14] smegw01: Select bootcount support
From: Eduard Strehlau Add automatic boot counter that increases after every reset. After a power-on reset, it will be initialized with 1, and each reboot will increment the value by 1. By default it is disabled if bootlimit isn't set. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None configs/smegw01_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index f15291f1dd04..5d9d4194639d 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -46,6 +46,8 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_BOUNCE_BUFFER=y +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y CONFIG_DFU_MMC=y CONFIG_DM_I2C=y CONFIG_SUPPORT_EMMC_BOOT=y -- 2.34.1
[PATCH v4 02/14] smegw01: Select CONFIG_CMD_SQUASHFS
From: Eduard Strehlau Select CONFIG_CMD_SQUASHFS so that the SquashFS U-Boot commands are available. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None configs/smegw01_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/smegw01_defconfig b/configs/smegw01_defconfig index 1e0b9aa5be11..f15291f1dd04 100644 --- a/configs/smegw01_defconfig +++ b/configs/smegw01_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y +CONFIG_CMD_SQUASHFS=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y -- 2.34.1
[PATCH v4 01/14] smegw01: Enable setting additional boot params
From: Eduard Strehlau Introduce EXTRA_BOOTPARAMS to allow passing additional parameters to kernel command line. This is useful for debugging purposes. Signed-off-by: Eduard Strehlau Signed-off-by: Fabio Estevam --- Changes since v3: - None include/configs/smegw01.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 11031744bef8..a356f095a68c 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -17,6 +17,11 @@ /* MMC Config*/ #define CFG_SYS_FSL_ESDHC_ADDR 0 +/* default to no extra bootparams, we need an empty define for stringification*/ +#ifndef EXTRA_BOOTPARAMS +#define EXTRA_BOOTPARAMS +#endif + #define CFG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ "console=ttymxc0\0" \ @@ -26,7 +31,8 @@ "mmcdev=0\0" \ "mmcpart=1\0" \ "mmcargs=setenv bootargs console=${console},${baudrate} " \ - "root=/dev/mmcblk0p${mmcpart} rootwait rw\0" \ + "root=/dev/mmcblk0p${mmcpart} rootwait rw " \ + __stringify(EXTRA_BOOTPARAMS) "\0" \ "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} boot/${image}\0" \ "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} boot/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ -- 2.34.1
Re: [PATCH] tools: env: update lock path in README
On Wed, Apr 12, 2023 at 12:24:26PM +0100, John Keeping wrote: > Commit aeb40f1166 ("tools: env: use /run to store lockfile") updated the > path to the lockfile but did not update the documentation to match. > > Use the new path in the documentation. > > Fixes: aeb40f1166 ("tools: env: use /run to store lockfile") > Signed-off-by: John Keeping > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] gpio-uclass: fix off-by-one in gpio_request_list_by_name_nodev()
On Wed, Apr 19, 2023 at 12:10:13PM +0200, Rasmus Villemoes wrote: > By the time we jump to the err label, count represents the number of > gpios we've succesfully requested. So by subtracting one, we fail to > free the most recently requested. > > Signed-off-by: Rasmus Villemoes > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3] ata: pci: enable bus mastering
On Tue, Apr 11, 2023 at 05:07:02PM +0200, Christian Gmeiner wrote: > The non DM code path already would enable pci bus mastering. Do the > same for the DM code path. > > Fixes AHCI problems I am seeing on an Intel Apollolake device. > > Signed-off-by: Christian Gmeiner > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] sysreset: psci: add psci_sysreset_get_status
On Thu, Apr 06, 2023 at 06:23:19PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > Add weak function psci_sysreset_get_status for platform to define > their own reset status with CONFIG_SYSRESET enabled. > > Signed-off-by: Peng Fan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] sysreset: psci: enable DM_FLAG_PRE_RELOC
On Thu, Apr 06, 2023 at 06:23:18PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > It is possible that cpu core may reset before relocation with PSCI reset > > Signed-off-by: Peng Fan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] firmware: psci: enable DM_FLAG_PRE_RELOC
On Thu, Apr 06, 2023 at 06:23:17PM +0800, Peng Fan (OSS) wrote: > From: Peng Fan > > It is possible that cpu core may reset before relocation with PSCI reset > > Signed-off-by: Peng Fan Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] qemu: dfu: Correct memset call in set_dfu_alt_info
On Thu, Apr 06, 2023 at 09:58:40AM -0400, Tom Rini wrote: > When building with clang, we see: > board/emulation/common/qemu_dfu.c:51:24: warning: 'memset' call operates on > objects of type 'char' while the size is based on a different type 'char *' > [-Wsizeof-pointer-memaccess] > > As we're calling memset with the length set to the size of the pointer > and not the size of the buffer. Correct this with a call of the size of > the buffer itself. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass > Acked-by: Sughosh Ganu Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] api: Rework menu, and make it depend on CC_IS_GCC
On Thu, Apr 06, 2023 at 09:48:58AM -0400, Tom Rini wrote: > We can only use the old U-Boot API for standalone applications when > building U-Boot with GCC as it relies upon the "gd is a register" trick > that only GCC supports. Further, rework the rest of the options so that > they are in the API menu and only visible if API support is enabled. > > Reported-by: Heinrich Schuchardt > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 7/9] usb: gadget: f_mass_storage: Rework do_request_sense slightly
On Wed, Apr 05, 2023 at 07:48:57PM -0400, Tom Rini wrote: > When building with clang, it notes that sdinfo may be unused > uninitialized in some cases. This appears to be true from reading the > code, and we can simply set the variable to zero to start with and be as > correct as before. > > Signed-off-by: Tom Rini > Reviewed-by: Marek Vasut Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 6/9] boot/image-board.c: Silence warning in select_ramdisk
On Wed, Apr 05, 2023 at 07:48:56PM -0400, Tom Rini wrote: > When building with clang we get a warning that rdaddr could be > uninitialized in one case. While this cannot functionally happen, we can > easily silence the warning. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 5/9] armv7: Use isb/dsb directly in start.S
On Wed, Apr 05, 2023 at 07:48:55PM -0400, Tom Rini wrote: > Toolchains which do not directly support using "isb" and "dsb" directly > are no longer functionally supported in U-Boot. Furthermore, clang has > for a long time warned about using the alternate form that we were. > Update the code. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 4/9] arm: Centralize fixed register logic
On Wed, Apr 05, 2023 at 07:48:54PM -0400, Tom Rini wrote: > When building for ARM64, we need to pass -ffixed-x18 and otherwise pass > -ffixed-r9. Rather than having this logic in two places, we can do this > once in arch/arm/config.mk. Further, while gcc will ignore being passed > both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will > note that -ffixed-r9 is not used. Remove this duplication to also remove > the warning. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! > arch/arm/cpu/armv8/config.mk | 1 - > 2 files changed, 8 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/config.mk b/arch/arm/config.mk > index bf781f102620..5530d02b66c4 100644 > --- a/arch/arm/config.mk > +++ b/arch/arm/config.mk > @@ -3,7 +3,13 @@ > # (C) Copyright 2000-2002 > # Wolfgang Denk, DENX Software Engineering, w...@denx.de. > > -CFLAGS_NON_EFI := -fno-pic -ffixed-r9 -ffunction-sections -fdata-sections \ > +ifeq ($(CONFIG_ARM64),y) > +FIXED_REG := -ffixed-x18 > +else > +FIXED_REG := -ffixed-r9 > +endif > + > +CFLAGS_NON_EFI := -fno-pic $(FIXED_REG) -ffunction-sections -fdata-sections \ > -fstack-protector-strong > CFLAGS_EFI := -fpic -fshort-wchar > > @@ -15,7 +21,7 @@ ifneq ($(LTO_ENABLE),y) > PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections > endif > > -PLATFORM_RELFLAGS += -fno-common -ffixed-r9 > +PLATFORM_RELFLAGS += -fno-common $(FIXED_REG) > PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \ >$(call cc-option,-mgeneral-regs-only) \ >$(call cc-option,-mshort-load-bytes,$(call > cc-option,-malignment-traps,)) > diff --git a/arch/arm/cpu/armv8/config.mk b/arch/arm/cpu/armv8/config.mk > index ca06ed3d4f92..4d74b2a533e0 100644 > --- a/arch/arm/cpu/armv8/config.mk > +++ b/arch/arm/cpu/armv8/config.mk > @@ -2,7 +2,6 @@ > # > # (C) Copyright 2002 > # Gary Jennejohn, DENX Software Engineering, > -PLATFORM_RELFLAGS += -fno-common -ffixed-x18 > PLATFORM_RELFLAGS += $(call cc-option,-mbranch-protection=none) > > PF_NO_UNALIGNED := $(call cc-option, -mstrict-align) -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/9] clang: Don't look for libgcc
On Wed, Apr 05, 2023 at 07:48:53PM -0400, Tom Rini wrote: > In the case of using clang to build, and having not already enabled the > private libgcc, do not look for it, as it will not be found nor > required. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/9] clang: Add $(CLANG_TARGET) to LDPPFLAGS
On Wed, Apr 05, 2023 at 07:48:52PM -0400, Tom Rini wrote: > When we invoke $(CPP) to make u-boot.lds we have LDPPFLAGS available to > set other required flags here. As this file is for the target and not > the host, we must ensure that CPP knows what the target architecture is. > For this, pass in $(CLANG_TARGET). > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/9] arm: Only support ARM64_CRC32 when using GCC
On Wed, Apr 05, 2023 at 07:48:51PM -0400, Tom Rini wrote: > Today, only gcc has __builtin_aarch64_crc32b (clang-16 does not, for > example). Make this option depend on CC_IS_GCC. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] fs: yaffs2: Make yaffsfs_deviceList static
On Wed, Apr 05, 2023 at 10:40:22PM +0800, Bin Meng wrote: > yaffsfs_deviceList is only referenced in yaffsfs.c > > Signed-off-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 1/2] xen: Add dependency on armv8
On Tue, Apr 18, 2023 at 02:51:55PM +0200, Michal Simek wrote: > U-Boot currently implements hypervisor calls only for ARM64 that's why add > dependency on ARM64. The hardware functionality is also available on > ARMv7a, but currently not supported by U-Boot, hence it is not added to the > list of dependencies here. > > Signed-off-by: Michal Simek Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] xen: Fix Kconfig dependencies
On Thu, Apr 06, 2023 at 10:04:15AM +0200, Michal Simek wrote: > XEN config can be enabled by other platforms (even it doesn't need to make > sense) that's why fix dependencies. XEN (xenbus.c) requires sscanf (also > pvblock needs it). And PVBLOCK is inside drivers/xen folder which requires > XEN to be enabled. > > Signed-off-by: Michal Simek > Reviewed-by: Heinrich Schuchardt Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/2] xen: Limit execution to EL1 only
On Tue, Apr 18, 2023 at 02:51:56PM +0200, Michal Simek wrote: > Xen core_init() is calling HVC which should be called from EL1 level that's > why do Xen initialization only when U-Boot runs in EL1. > > Signed-off-by: Michal Simek Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] pytest: Use --lazy with umount
On Wed, Apr 05, 2023 at 10:19:39PM -0400, Tom Rini wrote: > Sometimes when doing tests on real hardware we sometimes run in to the > case where some of these mounts haven't been fully flushed. Using the > --lazy option with umount will allow us to continue while letting the OS > handle flushing the data out still. > > Signed-off-by: Tom Rini > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] test: move unit tests into a sub-menu
On Mon, Apr 03, 2023 at 08:27:43PM +0200, Heinrich Schuchardt wrote: > The main configuration menu should not contain detail settings. > > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/1] test: improve configuration for Kconfig test options
On Mon, Apr 03, 2023 at 12:04:39PM +0200, Heinrich Schuchardt wrote: > * Fix dependencies > * Provide labels that are easier to grasp. > * Fix typo %s/whgch/which/ > * Fix type %s/Is/is/ > > Fixes: 29784d62eded ("test: Add some tests for kconfig.h") > Signed-off-by: Heinrich Schuchardt > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] arm64: interrupts: print FAR_ELx on sync exceptions
On Sun, Apr 02, 2023 at 07:27:34PM +0300, Pavel Skripkin wrote: > Default synchronous exceptions handler prints only esr and register > dump. Sometimes it requiers to see an address which caused exceptions > to understand what's going on > > ARM ARM in section D13.2.41 states that FAR_EL2 will contain meanfull > value in case of ESR.EC holds 0x20, 0x21, 0x24, 0x25, 0x22, 0x34 or > 0x35. Same applies for EL1. > > This patch adds function whivh determine current EL, gets correct FAR > register and prints it on panic. > > Signed-off-by: Pavel Skripkin Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present
On Sat, Mar 18, 2023 at 12:22:53AM +0800, Ying-Chun Liu (PaulLiu) wrote: > From: meitao > > u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does. > otherwise it will hang when enable mmu, that is what we encounter > in our SOC. > > Signed-off-by: meitao > [ Paul: pick from the Android tree. Rebase to the upstream ] > Signed-off-by: Ying-Chun Liu (PaulLiu) > Cc: Tom Rini > Link: > https://android.googlesource.com/platform/external/u-boot/+/3bf38943aeab4700c2319bff2a1477d99c6afd2f Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] arm64: Use FEAT_HAFDBS to track dirty pages when available
On Sat, Mar 18, 2023 at 12:22:51AM +0800, Ying-Chun Liu (PaulLiu) wrote: > From: Marc Zyngier > > Some recent arm64 cores have a facility that allows the page > table walker to track the dirty state of a page. This makes it > really efficient to perform CMOs by VA as we only need to look > at dirty pages. > > Signed-off-by: Marc Zyngier > [ Paul: pick from the Android tree. Rebase to the upstream ] > Signed-off-by: Ying-Chun Liu (PaulLiu) > Cc: Tom Rini > Link: > https://android.googlesource.com/platform/external/u-boot/+/3c433724e6f830a6b2edd5ec3d4a504794887263 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present
On Sat, Mar 18, 2023 at 12:22:52AM +0800, Ying-Chun Liu (PaulLiu) wrote: > From: Marc Zyngier > > In order to make invalidation by VA more efficient, set the largest > block mapping to 2MB, mapping it onto level-2. This has no material > impact on u-boot's runtime performance, and allows a huge speedup > when cleaning the cache. > > Signed-off-by: Marc Zyngier > [ Paul: pick from the Android tree. Rebase to the upstream ] > Signed-off-by: Ying-Chun Liu (PaulLiu) > Cc: Tom Rini > Link: > https://android.googlesource.com/platform/external/u-boot/+/417a73581a72ff6d6ee4b0938117b8a23e32f7e8 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] configs: Create minimal vexpress_fvp_defconfig
On Fri, Mar 31, 2023 at 09:58:13AM +0100, Peter Hoyes wrote: > From: Peter Hoyes > > The vexpress64 board family now relies on OF_CONTROL and > OF_HAS_PRIOR_STAGE, so platform-specific configuration requirements > are minimal. > > The vexpress_aemv8a_semi_defconfig file defines many flags that are not > needed for a minimal boot, such as flash memory configuration. > > Therefore create vexpress_fvp_defconfig which contains the minimum > configuration required to boot on an Arm v8a FVP. > > Signed-off-by: Peter Hoyes Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] vexpress64: Enable VIRTIO_MMIO and RTC_PL031 in the base model
On Fri, Mar 31, 2023 at 09:58:12AM +0100, Peter Hoyes wrote: > From: Peter Hoyes > > The Arm EBBR (Embedded Base Boot Requirements) require that the time > and basic networking EFI interfaces are available and working, so long > as the hardware has an RTC and network interface. > > Arm FVPs typically have a memory-mapped PL031 RTC and a VIRTIO_NET > device defined in the device tree, so "imply" these in the Kconfig for > the FVP base model to simplify creating EBBR-compliant firmware. > > Signed-off-by: Peter Hoyes Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] vexpress64: Use OF_HAS_PRIOR_STAGE for BASE_FVP variant
On Fri, Mar 31, 2023 at 09:58:11AM +0100, Peter Hoyes wrote: > From: Peter Hoyes > > BASE_FVP now typically uses a devicetree provided by a prior boot stage > (typically Arm TF-A), so imply this option by default when > TARGET_VEXPRESS64_BASE_FVP is selected. > > OF_HAS_PRIOR_STAGE selects OF_BOARD so this change is minor, but aligns > TARGET_VEXPRESS64_BASE_FVP with TARGET_VEXPRESS64_BASER_FVP. > > Signed-off-by: Peter Hoyes > Reviewed-by: Andre Przywara Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH u-boot] arm: omap3: Directly use SMC #1 in lowlevel_init.S
On Thu, Apr 13, 2023 at 10:34:43PM +0200, Pali Rohár wrote: > Since commit de39dc71625d ("arm: armv7-a: Compile and tune for armv7-a > instead of armv5") is used -march=armv7-a option for Omap3 platforms. > > With directive ".arch_extension sec" it is possible for -march=armv7-a to > directly use ARM SMC instruction. > > So enable ".arch_extension sec" in Omap3 lowlevel_init.S and replace hand > assembled ".word 0xe1600071" by "SMC #1". > > Since commit 51d063865064 ("arm: omap-common: add secure smc entry") same > pattern is already used in arch/arm/cpu/armv7/omap-common/lowlevel_init.S. > > Signed-off-by: Pali Rohár Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] mpc8379erdb: Convert to using DM_SERIAL
On Fri, Apr 07, 2023 at 06:03:44PM -0400, si...@writeme.com wrote: > From: Sinan Akman > > Convert to DM_SERIAL for mpc8379erdb. > > Signed-off-by: Sinan Akman Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH V2] include: configs: am64x_evm: Change to using .env
On Thu, Mar 30, 2023 at 02:24:09PM +0530, Nikhil M Jain wrote: > Move to using .env file for setting up environment variables for am64x. > > Signed-off-by: Nikhil M Jain > Reviewed-By: Devarsh Thakkar Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] arch: mach-k3: j721s2_init: Disable the firewalls
On Tue, Mar 28, 2023 at 06:32:01PM +0530, Jayesh Choudhary wrote: > Some firewalls enabled by ROM are still left on. So some > address space is inaccessible to the bootloader. For example, > in OSPI boot mode we get an exception and the system hangs. > Therefore, disable all the firewalls left on by the ROM. > > Signed-off-by: Jayesh Choudhary > Reviewed-by: Andrew Davis > Reviewed-by: Manorit Chawdhry Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] soc: soc_ti_k3: fix revision array bounds checks
On Fri, Mar 24, 2023 at 08:44:29AM +0100, Rasmus Villemoes wrote: > If rev is equal to the array size, we'll access the array > one-past-the-end. > > Signed-off-by: Rasmus Villemoes > Reviewed-by: Bryan Brattlof Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 07/10] arm: mach-k3: am625_init: Update board specific API name to K3 generic API's
On Wed, Apr 26, 2023 at 03:09:03PM +0530, Nitin Yadav wrote: > Though the board_init_f API initializes the SoC, the API > name is incorrectly specified and misleads the functionality. > This file should only include k3-specific functionality. > Change the API's name to something more K3-specific and > separate the function to make it more modular. > > Add k3_spl_post_dt_magic() to establish early console and > configure and startup system controller firmware. > > Signed-off-by: Nitin Yadav Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [PATCH 06/10] board: ti: am62x: am62x_env: Update env to select correct dtb
On Wed, Apr 26, 2023 at 03:09:02PM +0530, Nitin Yadav wrote: > Now that single defconfig is getting used to boot AM62x SK and > AM62x LP SK, the default device tree will not work for selecting > dtb for kernel. Update the findfdt env to select right dtb based > on board_name env variable. > > Signed-off-by: Nitin Yadav Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] arch: arm: mach-k3: Delete tifs node in DT fixup
Hi Udit On 26/04/23 16:09, Kumar, Udit wrote: Hi Neha, Hi Udit, [..] I do have a general doubt; why do we have only atf-sram sub-node in msmc_sram in all other devices (j721e, j7200 and am65) except j721s2? let me know, which source code you are referring to In U-Boot, for j721e, j7200 and am65; they *only* contain atf-sram? For u-boot please see https://elixir.bootlin.com/u-boot/latest/source/arch/arm/dts/k3-j721s2-main.dtsi#L16 I could see for j721s2 as well, in uboot[0] and Linux[1] [..] What I mean to ask is, why aren't there tifs or l3cache subnodes in j721e, j7200 and am65? Thanking You Neha Malcom Francis -- Thanking You Neha Malcom Francis
command segmentation fault
Hello, this is my first time reporting anything. I found a segmentation fault can be triggered when using the binary after compiling it for sandbox mode. Example:$ sudo make sandbox_defconfig$ sudo make $. /u-boot -c ⧵0xef⧵0xbf⧵0xbd U-Boot 2023.04-rc1-00507-gc34009d5a9-dirty (Apr 25 2023 - 17:09:16 -0400) DRAM: 256 MiB Core: 26 devices, 14 uclasses, devicetree: board MMC: Loading Environment from nowhere... OK Warning: device tree node '/config/environment' not found In: serial Out: serial Err: serial Net: No ethernet found. zsh: segmentation fault ./u-boot -c ⧵0xef⧵0xbf⧵0xbd All the best, Harry -- Sent with Tutanota, enjoy secure & ad-free emails.
[PATCH 10/10] configs: am62x_evm_r5_defconfig: Enable support for building multiple dtbs at R5 SPL
Enable configs for building multiple dtbs into a single fit image and load the right dtb for next stage. Add k3-am625-generic dtb along with k3-am625-r5-sk dtb and k3-am62-r5-lp-sk DTB FIT image. This helps to use same defconfig for AM62x SK and AM62x LP SK board. Enable I2C and EEPROM related configs to determine correct board Model and names. Signed-off-by: Nitin Yadav --- configs/am62x_evm_r5_defconfig | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 44a9130d99..707afde1e5 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -12,7 +12,13 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 CONFIG_ENV_SIZE=0x2 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y -CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" +CONFIG_SPL_OF_LIST="k3-am625-generic k3-am625-r5-sk k3-am62-r5-lp-sk" +CONFIG_DEFAULT_DEVICE_TREE="k3-am625-generic" +CONFIG_ENV_OVERWRITE=y +CONFIG_DM_I2C=y +CONFIG_SPL_I2C=y +CONFIG_TI_I2C_BOARD_DETECT=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_SPL_TEXT_BASE=0x43c0 CONFIG_DM_RESET=y CONFIG_SPL_MMC=y -- 2.25.1
[PATCH 09/10] configs: am62x_lpsk_a53_defconfig: Enable support for building multiple dtbs into FIT
Enable configs for building multiple dtbs into a single fit image and load the right dtb for next stage. Add k3-am62-lp-sk board dtb along with evm dtb inside DTB FIT image. This helps to use same defconfig for both AM62x SK and AM62x LP SK. Enable I2C and EEPROM related defconfig to determine correct board ID. Signed-off-by: Nitin Yadav --- configs/am62x_evm_a53_defconfig | 10 ++ 1 file changed, 10 insertions(+) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index cc9c8eab3e..8df93464d7 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -11,8 +11,18 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" +CONFIG_OF_LIST="k3-am625-sk k3-am62-lp-sk" +CONFIG_ENV_IS_IN_FAT=y CONFIG_SPL_TEXT_BASE=0x8008 CONFIG_DM_RESET=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_I2C_EEPROM=y +CONFIG_SPL_I2C_EEPROM=y +CONFIG_TI_I2C_BOARD_DETECT=y +CONFIG_SPL_I2C=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y +CONFIG_CMD_I2C=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x8200 -- 2.25.1
[PATCH 08/10] board: ti: am62x: Add support for detecting multiple device trees
Update the board_fit_config_name_match() to choose the right dtb based on the board name read from EEPROM. Update the board_fit_config_name_match() to choose the right dtb based on the board name read from EEPROM. Also restrict multiple EEPROM reads by verifying if EEPROM is already read. Signed-off-by: Nitin Yadav --- board/ti/am62x/evm.c | 148 +++ 1 file changed, 148 insertions(+) diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c index cc8e31824b..8b3a57c464 100644 --- a/board/ti/am62x/evm.c +++ b/board/ti/am62x/evm.c @@ -12,14 +12,24 @@ #include #include #include +#include #include #include #include +#include #include +#include +#include #include +#include + +#include "../common/board_detect.h" DECLARE_GLOBAL_DATA_PTR; +#define board_is_am62x_skevm() board_ti_k3_is("AM62-SKEVM") +#define board_is_am62x_lp_skevm() board_ti_k3_is("AM62-LP-SKEVM") + #ifdef CONFIG_SPLASH_SCREEN static struct splash_location default_splash_locations[] = { { @@ -52,6 +62,26 @@ int dram_init_banksize(void) return fdtdec_setup_memory_banksize(); } +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + bool eeprom_read = board_ti_was_eeprom_read(); + + if (!eeprom_read) + return -1; + + if (board_is_am62x_skevm()) { + if (!strcmp(name, "k3-am625-r5-sk") || !strcmp(name, "k3-am625-sk")) + return 0; + + } else if (board_is_am62x_lp_skevm()) { + if (!strcmp(name, "k3-am62-r5-lp-sk") || !strcmp(name, "k3-am62-lp-sk")) + return 0; + } + return -1; +} +#endif + #if defined(CONFIG_SPL_BUILD) #if defined(CONFIG_K3_AM64_DDRSS) static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image) @@ -103,11 +133,129 @@ void spl_perform_fixups(struct spl_image_info *spl_image) } #endif +#ifdef CONFIG_TI_I2C_BOARD_DETECT +int do_board_detect(void) +{ + int ret; + + ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS, +CONFIG_EEPROM_CHIP_ADDRESS); + + if (ret) { + printf("EEPROM not available at %d, trying to read at %d\n", + CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 1); + ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS, +CONFIG_EEPROM_CHIP_ADDRESS + 1); + if (ret) + pr_err("Reading on-board EEPROM at 0x%02x failed %d\n", + CONFIG_EEPROM_CHIP_ADDRESS + 1, ret); + } + return ret; +} + +int checkboard(void) +{ + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA; + + if (!do_board_detect()) + printf("Board: %s rev %s\n", ep->name, ep->version); + + return 0; +} +#endif + +#ifdef CONFIG_BOARD_LATE_INIT +static void setup_board_eeprom_env(void) +{ + char *name = "am62x_skevm"; + + if (do_board_detect()) + goto invalid_eeprom; + + if (board_is_am62x_skevm()) + name = "am62x_skevm"; + else if (board_is_am62x_lp_skevm()) + name = "am62x_lp_skevm"; + else + printf("Unidentified board claims %s in eeprom header\n", + board_ti_get_name()); + +invalid_eeprom: + set_board_info_env_am6(name); +} + +static void setup_serial(void) +{ + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA; + unsigned long board_serial; + char *endp; + char serial_string[17] = { 0 }; + + if (env_get("serial#")) + return; + + board_serial = simple_strtoul(ep->serial, , 16); + if (*endp != '\0') { + pr_err("Error: Can't set serial# to %s\n", ep->serial); + return; + } + + snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial); + env_set("serial#", serial_string); +} + +int board_late_init(void) +{ + if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) { + struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA; + + setup_board_eeprom_env(); + setup_serial(); + /* +* The first MAC address for ethernet a.k.a. ethernet0 comes from +* efuse populated via the am654 gigabit eth switch subsystem driver. +* All the other ones are populated via EEPROM, hence continue with +* an index of 1. +*/ + board_ti_am6_set_ethaddr(1, ep->mac_addr_cnt); + } + + return 0; +} +#endif + +#if defined(CONFIG_SPL_OF_LIST) && defined(CONFIG_TI_I2C_BOARD_DETECT) +void do_dt_magic(void) +{ + int ret, rescan; + + if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) + do_board_detect(); + + /* +* Board detection has been done. Let us see if +* another dtb