Re: [GIT PULL] please pull fsl-qoirq-2023-5-5
Hi Tom, On 5/6/2023 1:14 AM, Tom Rini wrote: On Fri, May 05, 2023 at 03:19:27AM +, Peng Fan wrote: Hi Tom, Please pull fsl-qoirq-2023-5-5 I've applied this to u-boot/master now, thanks. But please note that these are still outstanding in patchwork: https://patchwork.ozlabs.org/project/uboot/patch/20230119173948.1730773-1-...@kicherer.org/ Already applied before. I updated status. https://patchwork.ozlabs.org/project/uboot/patch/20221018181247.1909223-1-sean.ander...@seco.com/ I still not sure how to handle the maintainers, since there is no voluteer. https://patchwork.ozlabs.org/project/uboot/patch/20220902065147.12113-1-siarhei.yasin...@sintecs.eu/ Already applied before. I updated status. Thanks, Peng.
Re: [RESEND PATCH v2 1/2] Revert "mmc: s5p_sdhci: unset the SDHCI_QUIRK_BROKEN_R1B"
Dear Jaehoon
On Wed, 10 May 2023 at 04:07, Henrik Grimler wrote:
> This reverts commit a034ec06ff1d558bbe11d5ee05edbb4de3ee2215.
>
> Commit 4a3ea75de4c5 ("Revert "mmc: sdhci: set to INT_DATA_END when
> there are data"") reverted the alternative fix that was added for
> Exynos 4 devices, causing an error when trying to boot from an sdcard:
>
> <...>
> Loading Environment from MMC... sdhci_send_command: Timeout for status
> update!
> mmc fail to send stop cmd
> <...>
>
> Re-add the quirk to allow booting from sdcards again.
>
> Signed-off-by: Henrik Grimler
> ---
> drivers/mmc/s5p_sdhci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/s5p_sdhci.c b/drivers/mmc/s5p_sdhci.c
> index dee84263c3fd..3b74feae68c7 100644
> --- a/drivers/mmc/s5p_sdhci.c
> +++ b/drivers/mmc/s5p_sdhci.c
> @@ -90,7 +90,7 @@ static int s5p_sdhci_core_init(struct sdhci_host *host)
> host->name = S5P_NAME;
>
> host->quirks = SDHCI_QUIRK_NO_HISPD_BIT |
> SDHCI_QUIRK_BROKEN_VOLTAGE |
> - SDHCI_QUIRK_32BIT_DMA_ADDR |
> + SDHCI_QUIRK_BROKEN_R1B | SDHCI_QUIRK_32BIT_DMA_ADDR |
> SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_USE_WIDE8;
> host->max_clk = 5200;
> host->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
> --
> 2.30.2
>
>
Could you please review?
--
Thanks,
Minkyu Kang.
Re: [PATCH 1/8] common: spl: spl: Update stack pointer address
Hi Nikhil, Vignesh, Tom, Nikhil, Thanks for the patch. On 11/05/23 15:29, Nikhil M Jain wrote: I think more apt subject would be "Update stack pointer after relocation" > At SPL stage when stack is relocated, the stack pointer needs to be > updated, since the stack pointer may point to stack in on chip memory even > though stack is relocated. > > Signed-off-by: Nikhil M Jain > --- > common/spl/spl.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/common/spl/spl.c b/common/spl/spl.c > index 72078a8ebc..206caf4f8b 100644 > --- a/common/spl/spl.c > +++ b/common/spl/spl.c > @@ -992,6 +992,7 @@ ulong spl_relocate_stack_gd(void) > #endif > /* Get stack position: use 8-byte alignment for ABI compliance */ > ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16); > + gd->start_addr_sp = ptr; > new_gd = (gd_t *)ptr; Seems to me you are setting gd->start_addr_sp to new gd's base address, are they both supposed to be same ? Vignesh, Tom, Could you please have a look at this patch and comment ? Does the caller of this function need to set gd->start_addr_sp or it's ok to set in here only? Regards Devarsh > memcpy(new_gd, (void *)gd, sizeof(gd_t)); > #if CONFIG_IS_ENABLED(DM)
Re: [PATCH 2/8] arch: arm: mach-k3: common: Return a pointer after setting page table
Hi Nikhil,
Thanks for the patch,
On 11/05/23 15:29, Nikhil M Jain wrote:
> In spl_dcache_enable after setting up page table, set gd->relocaddr
> pointer with 64KB alignment, to get next location to reserve memory.
>
> Signed-off-by: Nikhil M Jain
> ---
> arch/arm/mach-k3/common.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
> index 3c85caee57..a8bde942f2 100644
> --- a/arch/arm/mach-k3/common.c
> +++ b/arch/arm/mach-k3/common.c
> @@ -614,6 +614,8 @@ void spl_enable_dcache(void)
> gd->arch.tlb_addr = ram_top - gd->arch.tlb_size;
> debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
> gd->arch.tlb_addr + gd->arch.tlb_size);
> + gd->relocaddr = gd->arch.tlb_addr;
> + gd->relocaddr &= ~(0x1 - 1);
I believe the 64Kb alignment requirement is for gd->arch.tlb_addr which was
already set before. You may want to refer sequence given in arm_reserve_mmu
Regards
Devarsh
>
> dcache_enable();
> #endif
[PATCH] environment: ti: rproc: fix semicolon
During refactor this seemed to have been missed.
Fixes: 65dbb128fb45 ("include: environment: ti: Use .env for environment
variables")
Signed-off-by: Manorit Chawdhry
---
include/environment/ti/k3_rproc.env | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/environment/ti/k3_rproc.env
b/include/environment/ti/k3_rproc.env
index 21dad7b24121..f4fe4d9ff4c4 100644
--- a/include/environment/ti/k3_rproc.env
+++ b/include/environment/ti/k3_rproc.env
@@ -7,7 +7,7 @@ boot_rprocs=
rproc_load_and_boot_one=
if load mmc ${bootpart} $loadaddr ${rproc_fw}; then
if rproc load ${rproc_id} ${loadaddr} ${filesize}; then
- rproc start ${rproc_id}
+ rproc start ${rproc_id};
fi;
fi
boot_rprocs_mmc=
---
base-commit: 0a9a4384c1483a88776bca38e28f09be51161034
change-id: 20230512-b4-upstream-rproc-semicolon-9afdb6101c13
Best regards,
--
Manorit Chawdhry
Re: [PATCH 3/8] board: ti: am62x: evm: Update function calls for splash screen
Hi Nikhil,
Thanks for the patch.
On 11/05/23 15:29, Nikhil M Jain wrote:
> Use spl_dcache_enable, in place of setup_dram, arch_reserve_mmu to set
> up pagetable, initialise DRAM and enable Dcache.
>
> Signed-off-by: Nikhil M Jain
> ---
> arch/arm/mach-k3/am625_init.c | 1 +
> board/ti/am62x/evm.c | 46 ++-
> 2 files changed, 19 insertions(+), 28 deletions(-)
>
> diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
> index 026c4f9c02..9386d14558 100644
> --- a/arch/arm/mach-k3/am625_init.c
> +++ b/arch/arm/mach-k3/am625_init.c
> @@ -168,6 +168,7 @@ void board_init_f(ulong dummy)
> if (ret)
> panic("DRAM init failed: %d\n", ret);
> #endif
> + spl_enable_dcache();
I am not sure it was intentionally not called earlier.
Can you please confirm if it's also required for non-splash screen scenarios?
> }
>
> u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
> diff --git a/board/ti/am62x/evm.c b/board/ti/am62x/evm.c
> index 34830f445f..f48a499059 100644
> --- a/board/ti/am62x/evm.c
> +++ b/board/ti/am62x/evm.c
> @@ -59,42 +59,32 @@ int dram_init_banksize(void)
> }
>
> #if defined(CONFIG_SPL_BUILD)
> -#ifdef CONFIG_SPL_VIDEO_TIDSS
> -static int setup_dram(void)
> -{
> - dram_init();
> - dram_init_banksize();
> - gd->ram_base = CFG_SYS_SDRAM_BASE;
> - gd->ram_top = gd->ram_base + gd->ram_size;
> - gd->relocaddr = gd->ram_top;
> - return 0;
> -}
> -
> static int video_setup(void)
> {
> - ulong addr;
> - int ret;
> - addr = gd->relocaddr;
> + if (CONFIG_IS_ENABLED(VIDEO)) {
> + ulong addr;
> + int ret;
> +
> + addr = gd->relocaddr;
> + ret = video_reserve(&addr);
> + if (ret)
> + return ret;
> + debug("Reserving %luk for video at: %08lx\n",
> + ((unsigned long)gd->relocaddr - addr) >> 10, addr);
> + gd->relocaddr = addr;
> + }
>
> - ret = video_reserve(&addr);
> - if (ret)
> - return ret;
> - debug("Reserving %luk for video at: %08lx\n",
> - ((unsigned long)gd->relocaddr - addr) >> 10, addr);
> - gd->relocaddr = addr;
> return 0;
> }
>
> -#endif
> void spl_board_init(void)
> {
> -#if defined(CONFIG_SPL_VIDEO_TIDSS)
> - setup_dram();
> - arch_reserve_mmu();
> - video_setup();
> - enable_caches();
> - splash_display();
> -#endif
> + if (CONFIG_IS_ENABLED(VIDEO)) {
I think good to use weak functions or macros inside the body of function
instead of having them at multiple places.
Regards
Devarsh
> + video_setup();
> + enable_caches();
> + if (CONFIG_IS_ENABLED(SPLASH_SCREEN))
> + splash_display();
> + }
> }
>
> #if defined(CONFIG_K3_AM64_DDRSS)
Re: [PATCH 4/8] include: video: Reserve video using blob
Hi Nikhil,
Thanks for the patch.
On 11/05/23 15:29, Nikhil M Jain wrote:
> Add method to reserve video using blob.
reserve memory for video using blob
received from previous stage.
>
Mention what info is updated.
> Signed-off-by: Nikhil M Jain
> ---
> drivers/video/video-uclass.c | 12
> include/video.h | 9 +
> 2 files changed, 21 insertions(+)
>
> diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
> index 8396bdfb11..1264ad1101 100644
> --- a/drivers/video/video-uclass.c
> +++ b/drivers/video/video-uclass.c
> @@ -142,6 +142,18 @@ int video_reserve(ulong *addrp)
> return 0;
> }
>
> +int video_reserve_from_blob(struct video_handoff *ho)
> +{
video_reserve_from_bloblist would be better name imho as bloblist is used
elsewhere too.
> +#if CONFIG_IS_ENABLED(VIDEO)
This CONFIG may not be required as file is video-uclass, so I assume
CONFIG_VIDEO is always enabled.
Regards
Devarsh
> + gd->video_bottom = ho->fb;
> + gd->fb_base = ho->fb;
> + gd->video_top = ho->fb + ho->size;
> + debug("Reserving %luk for video using blob at: %08x\n",
> + ((unsigned long)ho->size) >> 10, (u32)ho->fb);
> +#endif
> + return 0;
> +}
> +
> int video_fill(struct udevice *dev, u32 colour)
> {
> struct video_priv *priv = dev_get_uclass_priv(dev);
> diff --git a/include/video.h b/include/video.h
> index 18ed159b8d..13460adc45 100644
> --- a/include/video.h
> +++ b/include/video.h
> @@ -389,4 +389,13 @@ int bmp_display(ulong addr, int x, int y);
> */
> int bmp_info(ulong addr);
>
> +/*
> + * video_reserve_from_blob()- Reserve frame-buffer memory for video devices
> + * using blobs.
> + *
> + * @ho: video information passed from SPL
> + * Returns: 0 (always)
> + */
> +int video_reserve_from_blob(struct video_handoff *ho);
> +
> #endif
Re: [PATCH 5/8] common: board_f: Pass frame buffer info from SPL to u-boot
Hi Nikhil,
Thanks for the patch.
On 11/05/23 15:29, Nikhil M Jain wrote:
> When video is set up in SPL, U-Boot proper needs to use the correct
> frame buffer address to reserve particular location in memory, to avoid
> displaying artifacts on the screen.
>
U-boot proper can use frame buffer address passed from SPL to reserve
the memory area used by framebuffer set in SPL so that splash image
set in SPL continues to get displayed while u-boot proper is running.
> Put the framebuffer address and size in a bloblist to make them
> available at u-boot proper, if in u-boot proper CONFIG_VIDEO is defined.
>
> Signed-off-by: Nikhil M Jain
> ---
> common/board_f.c | 13 -
> drivers/video/video-uclass.c | 12
> 2 files changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/common/board_f.c b/common/board_f.c
> index 1688e27071..02730ec3a4 100644
> --- a/common/board_f.c
> +++ b/common/board_f.c
> @@ -411,7 +411,17 @@ __weak int arch_reserve_mmu(void)
>
> static int reserve_video(void)
> {> - if (IS_ENABLED(CONFIG_VIDEO)) {
> +#if (IS_ENABLED(CONFIG_VIDEO))
Why shifted to #if from if ?
Regards
Devarsh
> + if (IS_ENABLED(CONFIG_SPL_VIDEO) && spl_phase() > PHASE_SPL &&
> + CONFIG_IS_ENABLED(BLOBLIST)) {
> + struct video_handoff *ho;
> +
> + ho = bloblist_find(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho));
> + if (!ho)
> + return log_msg_ret("blf", -ENOENT);
> + video_reserve_from_blob(ho);
> + gd->relocaddr = ho->fb;
> + } else {
> ulong addr;
> int ret;
>
> @@ -423,6 +433,7 @@ static int reserve_video(void)
> ((unsigned long)gd->relocaddr - addr) >> 10, addr);
> gd->relocaddr = addr;
> }
> +#endif
>
> return 0;
> }
> diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c
> index 1264ad1101..324216b0f5 100644
> --- a/drivers/video/video-uclass.c
> +++ b/drivers/video/video-uclass.c
> @@ -6,12 +6,14 @@
> #define LOG_CATEGORY UCLASS_VIDEO
>
> #include
> +#include
> #include
> #include
> #include
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -139,6 +141,16 @@ int video_reserve(ulong *addrp)
> debug("Video frame buffers from %lx to %lx\n", gd->video_bottom,
> gd->video_top);
>
> + if (spl_phase() == PHASE_SPL && CONFIG_IS_ENABLED(BLOBLIST)) {
> + struct video_handoff *ho;
> +
> + ho = bloblist_add(BLOBLISTT_U_BOOT_VIDEO, sizeof(*ho), 0);
> + if (!ho)
> + return log_msg_ret("blf", -ENOENT);
> + ho->fb = *addrp;
> + ho->size = size;
> + }
> +
> return 0;
> }
>
[PATCH v2] environment: ti: rproc: fix remoteproc environment variables
During refactor this seemed to have been missed.
Fixes: 3e85631db7c5 ("include: environment: ti: Use .env for environment
variables")
Signed-off-by: Manorit Chawdhry
---
Changes in v2:
- added double quotes to fix the rproc boot command
- Link to v1:
https://serenity.dal.design.ti.com/lore/linux-patch-review/20230512-b4-upstream-rproc-semicolon-v1-1-f450e266d...@ti.com
---
include/environment/ti/k3_rproc.env | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/environment/ti/k3_rproc.env
b/include/environment/ti/k3_rproc.env
index 21dad7b24121..87d9d76eba46 100644
--- a/include/environment/ti/k3_rproc.env
+++ b/include/environment/ti/k3_rproc.env
@@ -7,14 +7,14 @@ boot_rprocs=
rproc_load_and_boot_one=
if load mmc ${bootpart} $loadaddr ${rproc_fw}; then
if rproc load ${rproc_id} ${loadaddr} ${filesize}; then
- rproc start ${rproc_id}
+ rproc start ${rproc_id};
fi;
fi
boot_rprocs_mmc=
env set rproc_id;
env set rproc_fw;
for i in ${rproc_fw_binaries} ; do
- if test -z ${rproc_id} ; then
+ if test -z "${rproc_id}" ; then
env set rproc_id $i;
else
env set rproc_fw $i;
---
base-commit: 0a9a4384c1483a88776bca38e28f09be51161034
change-id: 20230512-b4-upstream-rproc-semicolon-9afdb6101c13
Best regards,
--
Manorit Chawdhry
Re: [PATCH 7/8] common: spl: spl: Remove video driver
On 11/05/23 15:29, Nikhil M Jain wrote:
> Use config SPL_VIDEO_REMOVE to remove video driver at SPL stage before
> jumping to next stage, in place of CONFIG_SPL_VIDEO, to allow user to
> remove video if required.
>
> Signed-off-by: Nikhil M Jain
Reviewed-by: Devarsh Thakkar
> ---
> common/spl/spl.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index 206caf4f8b..fcb99bfe20 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -891,7 +891,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
> debug("Failed to stash bootstage: err=%d\n", ret);
> #endif
>
> -#if defined(CONFIG_SPL_VIDEO)
> +#if defined(CONFIG_SPL_VIDEO_REMOVE)
> struct udevice *dev;
> int rc;
>
Re: [PATCH 6/8] drivers: video: Kconfig: Add config remove video
Hi Nikhil, Thanks for the patch. Subject: Add Kconfig for calling video remove method On 11/05/23 15:29, Nikhil M Jain wrote: > Add VIDEO_REMOVE configs to allow user to control removing of video > driver, in between stages. This is required since user may want to either call the remove method of video driver and reset the display or not call the remove method to continue displaying until next stage. > > Signed-off-by: Nikhil M Jain > --- > drivers/video/Kconfig | 12 > 1 file changed, 12 insertions(+) > > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig > index fcc0e85d2e..c5863f4dd5 100644 > --- a/drivers/video/Kconfig > +++ b/drivers/video/Kconfig > @@ -840,6 +840,12 @@ config IHS_VIDEO_OUT > out On-screen Display (OSD) used on gdsys FPGAs to control dynamic > textual overlays of the display outputs. > > +config VIDEO_REMOVE > + bool "Remove video driver" > + help > + Use this option to specify if you want to remove video driver > before > + loading OS. to call remove method of video driver in u-boot proper stage > + > config SPLASH_SCREEN > bool "Show a splash-screen image" > help > @@ -1063,6 +1069,12 @@ config SPL_SYS_WHITE_ON_BLACK >This can be better in low-light situations or to reduce eye strain in >some cases. > > +config SPL_VIDEO_REMOVE > + bool "Remove video driver after SPL stage" > + help > + if this option is enabled video driver will be removed at the end of > + SPL stage, beforeloading the next stage. > + to call remove method of video driver in u-boot SPL stage With suggested changes, Reviewed-by: Devarsh Thakkar Regards Devarsh > if SPL_SPLASH_SCREEN > > config SPL_SPLASH_SCREEN_ALIGN
Re: [PATCH 8/8] configs: am62x_evm_a53: Add bloblist address
Hi Nikhil, Thanks for the patch. On 11/05/23 15:29, Nikhil M Jain wrote: > Define bloblist address. Mention below or above what region. Also put the updated memory map in commit message for future reference. > > Signed-off-by: Nikhil M Jain With suggested changes, Reviewed-by: Devarsh Thakkar Regards Devarsh > --- > configs/am62x_evm_a53_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig > index 7c3bc184cf..5c572dfb33 100644 > --- a/configs/am62x_evm_a53_defconfig > +++ b/configs/am62x_evm_a53_defconfig > @@ -102,3 +102,4 @@ CONFIG_SYSRESET=y > CONFIG_SPL_SYSRESET=y > CONFIG_SYSRESET_TI_SCI=y > CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 > +CONFIG_BLOBLIST_ADDR=0x80D0
Re: U-Boot OMAP GPMC ECC change
On 10/05/2023 18:38, Colin Foster wrote:
> Hi Roger,
>
> On Wed, May 10, 2023 at 12:42:43PM +0300, Roger Quadros wrote:
>> Hi Colin,
>>
>> On 09/05/2023 18:31, Colin Foster wrote:
>>> Hi Roger,
>>>
>>> I was looking to test my system against U-Boot 2023.04. I'm running an
>>> OMAP 4460 SOM (I've been waiting to get kernel acceptance before U-Boot,
>>> but that has slipped) and it boots from NAND.
>>>
>>> When I jumped from 2023.01 to 2023.04, I noticed I get spammed in the
>>> SPL by "omap-elm: uncorrectable ECC errors". I bisected, and this seems
>>> to be the result of commit 04fcd25873 ("mtd: rawnand: omap_gpmc: Fix
>>> BCH6/16 HW based correction").
>>
>> oops. Sorry about that.
>
> No worries!
>
>>>
>>> Is the multi-sector ECC generation something that should work in a
>>> backward-compatible way? Do you know of anything that might be going
>>> wrong here?
>>
>> The patch wasn't supposed to break anything.
>> I do not yet know what could be wrong. Most likely a wrong ECC
>> configuration is being used.
>>
>> Could you please share what ECC configuration you are using on your board?
>
> This is still out-of-U-Boot. I have an include/configs/our_product.h
> file with this:
>
> """
> #define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
> 13, 14, 15, 16, 17, 18, 19, 20, 21,
> 22, \
> 23, 24, 25, 26, 27, 28, 29, 30, 31,
> 32, \
> 33, 34, 35, 36, 37, 38, 39, 40, 41, \
> 42, 43, 44, 45, 46, 47, 48, 49, 50,
> 51, \
> 52, 53, 54, 55, 56, 57}
>
> #define CFG_SYS_NAND_ECCBYTES 14
> #define CFG_SYS_NAND_MAX_ECCPOS 57
This should be 56 i.e. (57 - 2 + 1)
But it won't fix the issue you are facing. :P
> #define CFG_SYS_NAND_ECCSIZE512
> #define CFG_SYS_NAND_MAX_OOBFREE2
> """
>
>
>> Can you please point me to the Linux device tree file if it exists?
>
> This is the latest submission. Still not accepted - I need to find time
> to button everything up and resubmit. My plan of attack was Kernel
> Acceptance, then U-Boot. Unfortunately my company lets the pesky
> "Shipping products" step get in the way :-)
>
> https://lkml.org/lkml/2023/2/22/939
>
> Or if you just want the ECC part:
>
> + nandflash: nand@0,0 {
> + compatible = "ti,omap2-nand";
> + reg = <0 0 4>;
> + interrupt-parent = <&gpmc>;
> +
> + nand-bus-width = <16>;
> + ti,nand-ecc-opt = "bch8";
> + ti,elm-id=<&elm>;
> + linux,mtd-name = "micron,nand";
>
>
> I think that's all the info you're looking for. Let me know if I missed
> something.
Yes this is all I was looking for.
Is CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW set in your u-boot config?
--
cheers,
-roger
[PATCH v2] arm: mach-k3: arm64-mmu: do not map ATF and OPTEE regions in A53 MMU
From: Kamlesh Gurudasani
ATF and OPTEE regions may be firewalled from non-secure entities.
If we still map them for non-secure A53, speculative access may happen,
which will not cause any faults and related error response will be ignored,
but it's better to not to map those regions for non-secure A53 as there
will be no actual access at all.
Create separate table as ATF region is at different locations for am64
and am62/am62a.
Signed-off-by: Kamlesh Gurudasani
---
Changes in v2:
- Make the commit message more clearer
---
arch/arm/mach-k3/arm64-mmu.c | 64 +---
1 file changed, 59 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-k3/arm64-mmu.c b/arch/arm/mach-k3/arm64-mmu.c
index 88687c2d09..f8087d2421 100644
--- a/arch/arm/mach-k3/arm64-mmu.c
+++ b/arch/arm/mach-k3/arm64-mmu.c
@@ -222,14 +222,13 @@ struct mm_region *mem_map = j721s2_mem_map;
#endif /* CONFIG_SOC_K3_J721S2 */
-#if defined(CONFIG_SOC_K3_AM642) || defined(CONFIG_SOC_K3_AM625) || \
- defined(CONFIG_SOC_K3_AM62A7)
+#if defined(CONFIG_SOC_K3_AM625) || defined(CONFIG_SOC_K3_AM62A7)
/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
-#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 3)
+#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
/* ToDo: Add 64bit IO */
-struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
+struct mm_region am62_mem_map[NR_MMU_REGIONS] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -240,9 +239,64 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
}, {
.virt = 0x8000UL,
.phys = 0x8000UL,
+ .size = 0x1E78UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ .virt = 0xA000UL,
+ .phys = 0xA000UL,
+ .size = 0x6000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
+
+ }, {
+ .virt = 0x88000UL,
+ .phys = 0x88000UL,
.size = 0x8000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
+ }, {
+ .virt = 0x5UL,
+ .phys = 0x5UL,
+ .size = 0x4UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = am62_mem_map;
+#endif /* CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+
+#ifdef CONFIG_SOC_K3_AM642
+
+/* NR_DRAM_BANKS + 32bit IO + 64bit IO + terminator */
+#define NR_MMU_REGIONS (CONFIG_NR_DRAM_BANKS + 4)
+
+/* ToDo: Add 64bit IO */
+struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
+ {
+ .virt = 0x0UL,
+ .phys = 0x0UL,
+ .size = 0x8000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+PTE_BLOCK_NON_SHARE |
+PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ .virt = 0x8000UL,
+ .phys = 0x8000UL,
+ .size = 0x1E80UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ }, {
+ .virt = 0xA000UL,
+ .phys = 0xA000UL,
+ .size = 0x6000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+PTE_BLOCK_INNER_SHARE
}, {
.virt = 0x88000UL,
.phys = 0x88000UL,
@@ -263,4 +317,4 @@ struct mm_region am64_mem_map[NR_MMU_REGIONS] = {
};
struct mm_region *mem_map = am64_mem_map;
-#endif /* CONFIG_SOC_K3_AM642 || CONFIG_SOC_K3_AM625 || CONFIG_SOC_K3_AM62A7 */
+#endif /* CONFIG_SOC_K3_AM642 */
--
2.34.1
[PATCH v12 00/10] introduce Arm FF-A support
Adding support for Arm FF-A v1.0 (Arm Firmware Framework for Armv8-A) [A]. FF-A specifies interfaces that enable a pair of software execution environments aka partitions to communicate with each other. A partition could be a VM in the Normal or Secure world, an application in S-EL0, or a Trusted OS in S-EL1. FF-A is a discoverable bus and similar to architecture features. FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed by the PSCI driver. => dm tree Class Index Probed DriverName --- ... firmware 0 [ + ] psci |-- psci ffa 0 [ ] arm_ffa | `-- arm_ffa ... Clients are able to probe then use the FF-A bus by calling the DM class searching APIs (e.g: uclass_first_device). This implementation of the specification provides support for Aarch64. The FF-A driver uses the SMC ABIs defined by the FF-A specification to: - Discover the presence of secure partitions (SPs) of interest - Access an SP's service through communication protocols (e.g: EFI MM communication protocol) The FF-A support provides the following features: - Being generic by design and can be used by any Arm 64-bit platform - FF-A support can be compiled and used without EFI - Support for SMCCCv1.2 x0-x17 registers - Support for SMC32 calling convention - Support for 32-bit and 64-bit FF-A direct messaging - Support for FF-A MM communication (compatible with EFI boot time) - Enabling FF-A and MM communication in Corstone1000 platform as a use case - A Uclass driver providing generic FF-A methods. - An Arm FF-A device driver providing Arm-specific methods and reusing the Uclass methods. - A sandbox emulator for Arm FF-A, emulates the FF-A side of the Secure World and provides FF-A ABIs inspection methods. - An FF-A sandbox device driver for FF-A communication with the emulated Secure World. The driver leverages the FF-A Uclass to establish FF-A communication. - Sandbox FF-A test cases. - A new command called armffa is provided as an example of how to access the FF-A bus For more details about the FF-A support please refer to [B] and refer to [C] for how to use the armffa command. Please find at [D] an example of the expected boot logs when enabling FF-A support for a platform. In this example the platform is Corstone1000. But it can be any Arm 64-bit platform. Changelog of the major changes: === v12: * remove the global variable (dscvry_info), use uc_priv instead * replace dscvry_info.invoke_ffa_fn() with a weak invoke_ffa_fn (user drivers can override it) * improve FFA_PARTITION_INFO_GET implementation (clients no longer need to calloc a buffer) * remove reparenting by making the sandbox emulator parent of the FF-A device in the DT * improve argument checks for the armffa command * address nits v11: [11] * move ffa_try_discovery() from the uclass to the Arm FF-A driver * rename ffa_try_discovery() to arm_ffa_discover() * add arm_ prefix to the Arm FF-A driver functions * use U_BOOT_CMD_WITH_SUBCMDS for armffa command * store the sandbox emulator pointer in the FF-A device uc_priv (struct ffa_priv) * set the emulator as parent of the sandbox FF-A device * rename select_ffa_mm_comms() to select_mm_comms() * improve the logic of MM transport selection in mm_communicate() * use ut_asserteq_mem() in uuid_str_to_le_bin test case * address nits v10: [10] * provide the FF-A driver operations through the Uclass (arm-ffa-uclass.c) * move the generic FF-A methods to the Uclass * keep Arm specific methods in the Arm driver (arm-ffa.c renamed from core.c) * split the FF-A sandbox support into an emulator (ffa-emul-uclass.c) and a driver (sandbox_ffa.c) * use the FF-A driver Uclass operations by clients (armffa command, tests, MM comms) * use uclass_first_device to search and probe the FF-A device (whether it is on Arm or on sandbox) * address nits v9: [9] * integrate the FF-A bus discovery in the DM and use ARM_SMCCC_FEATURES for binding * align FF-A sandbox driver with FF-A discovery through DM * use DM class APIs to probe and interact with the FF-A bus (in FF-A MM comms, armffa command, sandbox tests) * add documentation for the armffa command: doc/usage/cmd/armffa.rst * introduce testcase for uuid_str_to_le_bin v8: [8] * pass the FF-A bus device to the bus operations * isolate the compilation choices between FF-A and OP-TEE * drop OP-TEE configs from Corstone-1000 defconfig * make ffa_get_partitions_info() second argument to be an SP count in both modes v7: [7] * add support for 32-bit direct messaging (now we have 32-bit and 64-bit support) * set the MM door bell event to use 64-bit direct messaging * issue a compile time error when one of these macros are not found : FFA_SHARED_MM_BUFFER_SIZE, FFA_SHARED_MM_BUFFER_OFFSET,
[PATCH v12 01/10] arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
add support for x0-x17 registers used by the SMC calls In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17. This work is inspired from the following kernel commit: arm64: smccc: Add support for SMCCCv1.2 extended input/output registers [1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token= Signed-off-by: Abdellatif El Khlifi Reviewed-by: Jens Wiklander Reviewed-by: Simon Glass Cc: Tom Rini Cc: Simon Glass Cc: Ilias Apalodimas --- Changelog: === v9: * update the copyright string v7: * improve indentation of ARM_SMCCC_1_2_REGS_Xn_OFFS v4: * rename the commit title and improve description new commit title: the current v3: * port x0-x17 registers support from linux kernel as defined by SMCCCv1.2 commit title: arm64: smccc: add Xn registers support used by SMC calls arch/arm/cpu/armv8/smccc-call.S | 57 - arch/arm/lib/asm-offsets.c | 16 + include/linux/arm-smccc.h | 45 ++ 3 files changed, 117 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv8/smccc-call.S b/arch/arm/cpu/armv8/smccc-call.S index dc92b28777..93f66d3366 100644 --- a/arch/arm/cpu/armv8/smccc-call.S +++ b/arch/arm/cpu/armv8/smccc-call.S @@ -1,7 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2015, Linaro Limited - */ + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi +*/ #include #include #include @@ -45,3 +49,54 @@ ENDPROC(__arm_smccc_smc) ENTRY(__arm_smccc_hvc) SMCCC hvc ENDPROC(__arm_smccc_hvc) + +#ifdef CONFIG_ARM64 + + .macro SMCCC_1_2 instr + /* Save `res` and free a GPR that won't be clobbered */ + stp x1, x19, [sp, #-16]! + + /* Ensure `args` won't be clobbered while loading regs in next step */ + mov x19, x0 + + /* Load the registers x0 - x17 from the struct arm_smccc_1_2_regs */ + ldp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] + ldp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] + ldp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] + ldp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] + ldp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] + ldp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] + ldp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] + ldp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] + ldp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + + \instr #0 + + /* Load the `res` from the stack */ + ldr x19, [sp] + + /* Store the registers x0 - x17 into the result structure */ + stp x0, x1, [x19, #ARM_SMCCC_1_2_REGS_X0_OFFS] + stp x2, x3, [x19, #ARM_SMCCC_1_2_REGS_X2_OFFS] + stp x4, x5, [x19, #ARM_SMCCC_1_2_REGS_X4_OFFS] + stp x6, x7, [x19, #ARM_SMCCC_1_2_REGS_X6_OFFS] + stp x8, x9, [x19, #ARM_SMCCC_1_2_REGS_X8_OFFS] + stp x10, x11, [x19, #ARM_SMCCC_1_2_REGS_X10_OFFS] + stp x12, x13, [x19, #ARM_SMCCC_1_2_REGS_X12_OFFS] + stp x14, x15, [x19, #ARM_SMCCC_1_2_REGS_X14_OFFS] + stp x16, x17, [x19, #ARM_SMCCC_1_2_REGS_X16_OFFS] + + /* Restore original x19 */ + ldp xzr, x19, [sp], #16 + ret + .endm + +/* + * void arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args, + * struct arm_smccc_1_2_regs *res); + */ +ENTRY(arm_smccc_1_2_smc) + SMCCC_1_2 smc +ENDPROC(arm_smccc_1_2_smc) + +#endif diff --git a/arch/arm/lib/asm-offsets.c b/arch/arm/lib/asm-offsets.c index 6de0ce9152..181a8ac4c2 100644 --- a/arch/arm/lib/asm-offsets.c +++ b/arch/arm/lib/asm-offsets.c @@ -9,6 +9,11 @@ * generate asm statements containing #defines, * compile this file to assembler, and then extract the * #defines from the assembly-language output. + * + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi */ #include @@ -90,6 +95,17 @@ int main(void) DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); +#ifdef CONFIG_ARM64 + DEFINE(ARM_SMCCC_1_2_REGS_X0_OFFS, offsetof(struct arm_smccc_1_2_regs, a0)); + DEFINE(ARM_SMCCC_1_2_REGS_X2_OFFS, offsetof(struct arm_smccc_1_2_regs, a2)); + DEFINE(ARM_SMCCC_1_2_REGS_X4_OFFS, offsetof(struct arm_smccc_1_2_regs, a4)); + DEFINE(ARM_SMCCC_1_2_REGS_X6_OFFS, offsetof(struct arm_smccc_1_2_regs, a6)); + DEFINE(ARM_SMCCC_1_2_REGS_X8_OFFS, offsetof(struct arm_smccc_1_2_regs, a8)); + DEFINE(ARM_SMCCC_1_2_REGS_X10_OFFS, offsetof(struct arm_smccc_1_2_regs, a10)); + DEFINE(ARM_SMCCC_1_2_REGS_X12_OFFS, offsetof(struct arm_smccc_1_2_regs, a12)); + DEFIN
[PATCH v12 02/10] lib: uuid: introduce uuid_str_to_le_bin function
convert UUID string to little endian binary data
Signed-off-by: Abdellatif El Khlifi
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v9:
* add a full function prototype description in uuid.h
v8:
* use simple_strtoull() in uuid_str_to_le_bin() to support 32-bit platforms
v7:
* rename be_uuid_str_to_le_bin() to uuid_str_to_le_bin()
* make uuid_str_to_le_bin() implementation similar to uuid_str_to_bin()
by using same APIs
v4:
* rename ffa_uuid_str_to_bin to be_uuid_str_to_le_bin and put in
a standalone commit (the current)
v3:
* introduce ffa_uuid_str_to_bin (provided by
arm_ffa: introduce Arm FF-A low-level driver)
include/uuid.h | 15 +++
lib/uuid.c | 48
2 files changed, 63 insertions(+)
diff --git a/include/uuid.h b/include/uuid.h
index 4a4883d3b5..89b93e642b 100644
--- a/include/uuid.h
+++ b/include/uuid.h
@@ -2,6 +2,10 @@
/*
* Copyright (C) 2014 Samsung Electronics
* Przemyslaw Marczak
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *
+ * Authors:
+ * Abdellatif El Khlifi
*/
#ifndef __UUID_H__
#define __UUID_H__
@@ -44,4 +48,15 @@ int uuid_guid_get_bin(const char *guid_str, unsigned char
*guid_bin);
const char *uuid_guid_get_str(const unsigned char *guid_bin);
void gen_rand_uuid(unsigned char *uuid_bin);
void gen_rand_uuid_str(char *uuid_str, int str_format);
+
+/**
+ * uuid_str_to_le_bin() - Convert string UUID to little endian binary data.
+ * @uuid_str: pointer to UUID string
+ * @uuid_bin: pointer to allocated array for little endian output [16B]
+ * Return:
+ *uuid_bin filled with little endian UUID data
+ *On success 0 is returned. Otherwise, failure code.
+ */
+int uuid_str_to_le_bin(const char *uuid_str, unsigned char *uuid_bin);
+
#endif
diff --git a/lib/uuid.c b/lib/uuid.c
index 96e1af3c8b..45f325d964 100644
--- a/lib/uuid.c
+++ b/lib/uuid.c
@@ -1,6 +1,10 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2011 Calxeda, Inc.
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *
+ * Authors:
+ * Abdellatif El Khlifi
*/
#include
@@ -354,6 +358,50 @@ int uuid_str_to_bin(const char *uuid_str, unsigned char
*uuid_bin,
return 0;
}
+/**
+ * uuid_str_to_le_bin() - Convert string UUID to little endian binary data.
+ * @uuid_str: pointer to UUID string
+ * @uuid_bin: pointer to allocated array for little endian output [16B]
+ *
+ * UUID string is 36 characters (36 bytes):
+ *
+ * ----
+ *
+ * where x is a hexadecimal character. Fields are separated by '-'s.
+ * When converting to a little endian binary UUID, the string fields are
reversed.
+ *
+ * Return:
+ *
+ *uuid_bin filled with little endian UUID data
+ *On success 0 is returned. Otherwise, failure code.
+ */
+int uuid_str_to_le_bin(const char *uuid_str, unsigned char *uuid_bin)
+{
+ u16 tmp16;
+ u32 tmp32;
+ u64 tmp64;
+
+ if (!uuid_str_valid(uuid_str) || !uuid_bin)
+ return -EINVAL;
+
+ tmp32 = cpu_to_le32(hextoul(uuid_str, NULL));
+ memcpy(uuid_bin, &tmp32, 4);
+
+ tmp16 = cpu_to_le16(hextoul(uuid_str + 9, NULL));
+ memcpy(uuid_bin + 4, &tmp16, 2);
+
+ tmp16 = cpu_to_le16(hextoul(uuid_str + 14, NULL));
+ memcpy(uuid_bin + 6, &tmp16, 2);
+
+ tmp16 = cpu_to_le16(hextoul(uuid_str + 19, NULL));
+ memcpy(uuid_bin + 8, &tmp16, 2);
+
+ tmp64 = cpu_to_le64(simple_strtoull(uuid_str + 24, NULL, 16));
+ memcpy(uuid_bin + 10, &tmp64, 6);
+
+ return 0;
+}
+
/*
* uuid_bin_to_str() - convert big endian binary data to string UUID or GUID.
*
--
2.25.1
[PATCH v12 03/10] lib: uuid: introduce testcase for uuid_str_to_le_bin
provide a test case
Signed-off-by: Abdellatif El Khlifi
Cc: Simon Glass
---
Changelog:
===
v11:
* use ut_asserteq_mem()
MAINTAINERS | 5 +
test/lib/Makefile | 1 +
test/lib/uuid.c | 41 +
3 files changed, 47 insertions(+)
create mode 100644 test/lib/uuid.c
diff --git a/MAINTAINERS b/MAINTAINERS
index c8f72e9ec6..926c7201a5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1634,3 +1634,8 @@ S:Maintained
F: arch/arm/dts/ls1021a-twr-u-boot.dtsi
F: drivers/crypto/fsl/
F: include/fsl_sec.h
+
+UUID testing
+M: Abdellatif El Khlifi
+S: Maintained
+F: test/lib/uuid.c
diff --git a/test/lib/Makefile b/test/lib/Makefile
index e0bd9e04e8..e75a263e6a 100644
--- a/test/lib/Makefile
+++ b/test/lib/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_AES) += test_aes.o
obj-$(CONFIG_GETOPT) += getopt.o
obj-$(CONFIG_CRC8) += test_crc8.o
obj-$(CONFIG_UT_LIB_CRYPT) += test_crypt.o
+obj-$(CONFIG_LIB_UUID) += uuid.o
else
obj-$(CONFIG_SANDBOX) += kconfig_spl.o
endif
diff --git a/test/lib/uuid.c b/test/lib/uuid.c
new file mode 100644
index 00..e24331a136
--- /dev/null
+++ b/test/lib/uuid.c
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Functional tests for UCLASS_FFA class
+ *
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *
+ * Authors:
+ * Abdellatif El Khlifi
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/* test UUID */
+#define TEST_SVC_UUID "ed32d533-4209-99e6-2d72-cdd998a79cc0"
+
+#define UUID_SIZE 16
+
+/* The UUID binary data (little-endian format) */
+static const u8 ref_uuid_bin[UUID_SIZE] = {
+ 0x33, 0xd5, 0x32, 0xed,
+ 0x09, 0x42, 0xe6, 0x99,
+ 0x72, 0x2d, 0xc0, 0x9c,
+ 0xa7, 0x98, 0xd9, 0xcd
+};
+
+static int lib_test_uuid_to_le(struct unit_test_state *uts)
+{
+ const char *uuid_str = TEST_SVC_UUID;
+ u8 ret_uuid_bin[UUID_SIZE] = {0};
+
+ ut_assertok(uuid_str_to_le_bin(uuid_str, ret_uuid_bin));
+ ut_asserteq_mem(ref_uuid_bin, ret_uuid_bin, UUID_SIZE);
+
+ return 0;
+}
+
+LIB_TEST(lib_test_uuid_to_le, 0);
--
2.25.1
[PATCH v12 05/10] arm_ffa: introduce armffa command
Provide armffa command showcasing the use of the U-Boot FF-A support
armffa is a command showcasing how to invoke FF-A operations.
This provides a guidance to the client developers on how to
call the FF-A bus interfaces. The command also allows to gather secure
partitions information and ping these partitions. The command is also
helpful in testing the communication with secure partitions.
For more details please refer to the command documentation [1].
[1]: doc/usage/cmd/armffa.rst
Signed-off-by: Abdellatif El Khlifi
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
Cc: Heinrich Schuchardt
---
Changelog:
===
v12:
* add subcommands argument checks
* usage documentation: update command return codes
* remove calloc when querying SPs
* address nits
v11:
* use U_BOOT_CMD_WITH_SUBCMDS
* address nits
v10:
* use the FF-A driver Uclass operations
* use uclass_first_device()
* address nits
v9:
* remove manual FF-A discovery and use DM
* use DM class APIs to probe and interact with the FF-A bus
* add doc/usage/cmd/armffa.rst
v8:
* update partition_info_get() second argument to be an SP count
* pass NULL device pointer to the FF-A bus discovery and operations
v7:
* adapt do_ffa_dev_list() following the recent update on
uclass_first_device/uclass_next_device functions (they return void now)
* set armffa command to use 64-bit direct messaging
v4:
* remove pattern data in do_ffa_msg_send_direct_req
v3:
* use the new driver interfaces (partition_info_get, sync_send_receive)
in armffa command
v2:
* replace use of ffa_helper_init_device function by
ffa_helper_bus_discover
v1:
* introduce armffa command
MAINTAINERS | 2 +
cmd/Kconfig | 10 ++
cmd/Makefile | 1 +
cmd/armffa.c | 196 +++
doc/arch/arm64.ffa.rst | 7 ++
doc/usage/cmd/armffa.rst | 93 +++
doc/usage/index.rst | 1 +
drivers/firmware/arm-ffa/Kconfig | 1 +
8 files changed, 311 insertions(+)
create mode 100644 cmd/armffa.c
create mode 100644 doc/usage/cmd/armffa.rst
diff --git a/MAINTAINERS b/MAINTAINERS
index 4e285f88cb..40c356e539 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -269,7 +269,9 @@ F: configs/cortina_presidio-asic-pnand_defconfig
ARM FF-A
M: Abdellatif El Khlifi
S: Maintained
+F: cmd/armffa.c
F: doc/arch/arm64.ffa.rst
+F: doc/usage/cmd/armffa.rst
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
F: include/sandbox_arm_ffa.h
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 65957da7f5..82f03d1f00 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -934,6 +934,16 @@ endmenu
menu "Device access commands"
+config CMD_ARMFFA
+ bool "Arm FF-A test command"
+ depends on ARM_FFA_TRANSPORT
+ help
+ Provides a test command for the FF-A support
+ supported options:
+ - Listing the partition(s) info
+ - Sending a data pattern to the specified partition
+ - Displaying the arm_ffa device info
+
config CMD_ARMFLASH
#depends on FLASH_CFI_DRIVER
bool "armflash"
diff --git a/cmd/Makefile b/cmd/Makefile
index 6c37521b4e..7d20a85a46 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -12,6 +12,7 @@ obj-y += panic.o
obj-y += version.o
# command
+obj-$(CONFIG_CMD_ARMFFA) += armffa.o
obj-$(CONFIG_CMD_2048) += 2048.o
obj-$(CONFIG_CMD_ACPI) += acpi.o
obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
diff --git a/cmd/armffa.c b/cmd/armffa.c
new file mode 100644
index 00..fa268e9cb9
--- /dev/null
+++ b/cmd/armffa.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *
+ * Authors:
+ * Abdellatif El Khlifi
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/**
+ * ffa_get_dev() - Return the FF-A device
+ * @devp: pointer to the FF-A device
+ *
+ * Search for the FF-A device.
+ *
+ * Return:
+ * 0 on success. Otherwise, failure
+ */
+int ffa_get_dev(struct udevice **devp)
+{
+ int ret;
+
+ ret = uclass_first_device_err(UCLASS_FFA, devp);
+ if (ret) {
+ log_err("Cannot find FF-A bus device\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+/**
+ * do_ffa_getpart() - implementation of the getpart subcommand
+ * @cmdtp: Command Table
+ * @flag: flags
+ * @argc: number of arguments
+ * @argv: arguments
+ *
+ * Query the secure partition information which the UUID is provided
+ * as an argument. The function uses the arm_ffa driver
+ * partition_info_get operation which implements FFA_PARTITION_INFO_GET
+ * ABI to retrieve the data. The input UUID string is expected to be in big
+ * endian format.
+ *
+ * Return:
+ *
+ * CMD_RET_SUCCESS: on success, otherwise failure
+ */
+static int do_ffa_ge
[PATCH v12 04/10] arm_ffa: introduce Arm FF-A support
Add Arm FF-A support implementing Arm Firmware Framework for Armv8-A v1.0
The Firmware Framework for Arm A-profile processors (FF-A v1.0) [1]
describes interfaces (ABIs) that standardize communication
between the Secure World and Normal World leveraging TrustZone
technology.
This driver uses 64-bit registers as per SMCCCv1.2 spec and comes
on top of the SMCCC layer. The driver provides the FF-A ABIs needed for
querying the FF-A framework from the secure world.
The driver uses SMC32 calling convention which means using the first
32-bit data of the Xn registers.
All supported ABIs come with their 32-bit version except FFA_RXTX_MAP
which has 64-bit version supported.
Both 32-bit and 64-bit direct messaging are supported which allows both
32-bit and 64-bit clients to use the FF-A bus.
FF-A is a discoverable bus and similar to architecture features.
FF-A bus is discovered using ARM_SMCCC_FEATURES mechanism performed
by the PSCI driver.
Clients are able to probe then use the FF-A bus by calling the DM class
searching APIs (e.g: uclass_first_device).
The Secure World is considered as one entity to communicate with
using the FF-A bus. FF-A communication is handled by one device and
one instance (the bus). This FF-A driver takes care of all the
interactions between Normal world and Secure World.
The driver exports its operations to be used by upper layers.
Exported operations:
- ffa_partition_info_get
- ffa_sync_send_receive
- ffa_rxtx_unmap
Generic FF-A methods are implemented in the Uclass (arm-ffa-uclass.c).
Arm specific methods are implemented in the Arm driver (arm-ffa.c).
For more details please refer to the driver documentation [2].
[1]: https://developer.arm.com/documentation/den0077/latest/
[2]: doc/arch/arm64.ffa.rst
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
Cc: Heinrich Schuchardt
---
Changelog:
===
v12:
* remove dscvry_info
* replace dscvry_info.invoke_ffa_fn() with a weak invoke_ffa_fn
(user drivers can override it)
* improve FFA_PARTITION_INFO_GET implementation
(clients no longer need to calloc a buffer)
* address nits
v11:
* move ffa_try_discovery() from the uclass to the Arm FF-A driver
* rename ffa_try_discovery() to arm_ffa_discover()
* pass dev as an argument of arm_ffa_discover()
* add arm_ prefix to the Arm FF-A driver functions
* add emul field in struct ffa_discovery_info
* address nits
v10:
* provide the driver operations through the Uclass
* move the generic FF-A methods to the Uclass
* keep Arm specific methods in the Arm driver (arm-ffa.c)
* rename core.c to arm-ffa.c
* address nits
v9:
* integrate the FF-A bus discovery in the DM and use ARM_SMCCC_FEATURES for
binding
v8:
* make ffa_get_partitions_info() second argument to be an SP count in both
modes
* update ffa_bus_prvdata_get() to return a pointer rather than a pointer
address
* remove packing from ffa_partition_info and ffa_send_direct_data structures
* pass the FF-A bus device to the bus operations
v7:
* add support for 32-bit direct messaging
* rename be_uuid_str_to_le_bin() to uuid_str_to_le_bin()
* improve the declaration of error handling mapping
* stating in doc/arch/arm64.ffa.rst that EFI runtime is not supported
v6:
* drop use of EFI runtime support (We decided with Linaro to add this later)
* drop discovery from initcalls (discovery will be on demand by FF-A users)
* set the alignment of the RX/TX buffers to the larger translation granule size
* move FF-A RX/TX buffers unmapping at ExitBootServices() to a separate commit
* update the documentation and move it to doc/arch/arm64.ffa.rst
v4:
* add doc/README.ffa.drv
* moving the FF-A driver work to drivers/firmware/arm-ffa
* use less #ifdefs in lib/efi_loader/efi_boottime.c and replace
#if defined by #if CONFIG_IS_ENABLED
* improving error handling by mapping the FF-A errors to standard errors
and logs
* replacing panics with an error log and returning an error code
* improving features discovery in FFA_FEATURES by introducing
rxtx_min_pages private data field
* add ffa_remove and ffa_unbind functions
* improve how the driver behaves when bus discovery is done more than
once
v3:
* align the interfaces of the U-Boot FF-A driver with those in the linux
FF-A driver
* remove the FF-A helper layer
* make the U-Boot FF-A driver independent from EFI
* provide an optional config that enables copying the driver data to EFI
runtime section at ExitBootServices service
* use 64-bit version of FFA_RXTX_MAP, FFA_MSG_SEND_DIRECT_{REQ, RESP}
v2:
* make FF-A bus discoverable using device_{bind, probe} APIs
* remove device tree support
v1:
* introduce FF-A bus driver with device tree support
MAINTAINERS |8 +
doc/arch/arm64.ffa.rst| 247
doc/arch/index.rst|1 +
drivers/Makefile |1 +
drivers/firmware/Kconfig
[PATCH v12 07/10] arm_ffa: introduce sandbox test cases for UCLASS_FFA
Add functional test cases for the FF-A support
These tests rely on the FF-A sandbox emulator and FF-A
sandbox driver which help in inspecting the FF-A communication.
Signed-off-by: Abdellatif El Khlifi
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
Cc: Heinrich Schuchardt
---
Changelog:
===
v12:
* remove use of dscvry_info
* drop use of calloc when querying SPs
* address nits
v11:
* drop unmapping test (taken care of by the DM when removing the device)
* address nits
v10:
* use the FF-A driver Uclass operations
* use uclass_first_device()
* replace CONFIG_SANDBOX_FFA with CONFIG_ARM_FFA_TRANSPORT
* address nits
v9: align FF-A sandbox tests with FF-A discovery through DM
v8:
* update partition_info_get() second argument to be an SP count
* pass NULL device pointer to the FF-A bus discovery and operations
v7: set the tests to use 64-bit direct messaging
v4: align sandbox tests with the new FF-A driver interfaces
and new way of error handling
v1: introduce sandbox tests
MAINTAINERS| 1 +
doc/arch/arm64.ffa.rst | 1 +
test/dm/Makefile | 3 +-
test/dm/ffa.c | 261 +
4 files changed, 265 insertions(+), 1 deletion(-)
create mode 100644 test/dm/ffa.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 598644bb00..1c81728b15 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -276,6 +276,7 @@ F: doc/arch/arm64.ffa.rst
F: doc/usage/cmd/armffa.rst
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
+F: test/dm/ffa.c
ARM FREESCALE IMX
M: Stefano Babic
diff --git a/doc/arch/arm64.ffa.rst b/doc/arch/arm64.ffa.rst
index 54c5b11f3b..577603870c 100644
--- a/doc/arch/arm64.ffa.rst
+++ b/doc/arch/arm64.ffa.rst
@@ -37,6 +37,7 @@ The U-Boot FF-A support provides the following parts:
FF-A ABIs inspection methods.
- An FF-A sandbox device driver for FF-A communication with the emulated
Secure World.
The driver leverages the FF-A Uclass to establish FF-A communication.
+- Sandbox FF-A test cases.
FF-A and SMC specifications
---
diff --git a/test/dm/Makefile b/test/dm/Makefile
index 3799b1ae8f..7ed00733c1 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (c) 2013 Google, Inc
-# Copyright 2023 Arm Limited and/or its affiliates
+# Copyright 2022-2023 Arm Limited and/or its affiliates
obj-$(CONFIG_UT_DM) += test-dm.o
@@ -92,6 +92,7 @@ obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
obj-$(CONFIG_ACPI_PMC) += pmc.o
obj-$(CONFIG_DM_PMIC) += pmic.o
obj-$(CONFIG_DM_PWM) += pwm.o
+obj-$(CONFIG_ARM_FFA_TRANSPORT) += ffa.o
obj-$(CONFIG_QFW) += qfw.o
obj-$(CONFIG_RAM) += ram.o
obj-y += regmap.o
diff --git a/test/dm/ffa.c b/test/dm/ffa.c
new file mode 100644
index 00..6912666bb4
--- /dev/null
+++ b/test/dm/ffa.c
@@ -0,0 +1,261 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Functional tests for UCLASS_FFA class
+ *
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *
+ * Authors:
+ * Abdellatif El Khlifi
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Functional tests for the UCLASS_FFA */
+
+static int check_fwk_version(struct ffa_priv *uc_priv, struct unit_test_state
*uts)
+{
+ struct ffa_sandbox_data func_data;
+ u32 fwk_version = 0;
+
+ func_data.data0 = &fwk_version;
+ func_data.data0_size = sizeof(fwk_version);
+ ut_assertok(sandbox_query_ffa_emul_state(FFA_VERSION, &func_data));
+ ut_asserteq(uc_priv->fwk_version, fwk_version);
+
+ return 0;
+}
+
+static int check_endpoint_id(struct ffa_priv *uc_priv, struct unit_test_state
*uts)
+{
+ ut_asserteq(0, uc_priv->id);
+
+ return 0;
+}
+
+static int check_rxtxbuf(struct ffa_priv *uc_priv, struct unit_test_state *uts)
+{
+ ut_assertnonnull(uc_priv->pair.rxbuf);
+ ut_assertnonnull(uc_priv->pair.txbuf);
+
+ return 0;
+}
+
+static int check_features(struct ffa_priv *uc_priv, struct unit_test_state
*uts)
+{
+ ut_assert(uc_priv->pair.rxtx_min_pages == RXTX_4K ||
+ uc_priv->pair.rxtx_min_pages == RXTX_16K ||
+ uc_priv->pair.rxtx_min_pages == RXTX_64K);
+
+ return 0;
+}
+
+static int check_rxbuf_mapped_flag(u32 queried_func_id,
+ u8 rxbuf_mapped,
+ struct unit_test_state *uts)
+{
+ switch (queried_func_id) {
+ case FFA_RXTX_MAP:
+ ut_asserteq(1, rxbuf_mapped);
+ break;
+ case FFA_RXTX_UNMAP:
+ ut_asserteq(0, rxbuf_mapped);
+ break;
+ default:
+ ut_assert(false);
+ }
+
+ return 0;
+}
+
+static int check_rxbuf_release_flag(u8 rxbuf_owned, struct unit_test_state
*uts)
+{
+ ut_asserteq(0, rxbuf_owned);
+
+ return 0;
+}
+
+st
[PATCH v12 06/10] arm_ffa: introduce sandbox FF-A support
Emulate Secure World's FF-A ABIs and allow testing U-Boot FF-A support
Features of the sandbox FF-A support:
- Introduce an FF-A emulator
- Introduce an FF-A device driver for FF-A comms with emulated Secure World
- Provides test methods allowing to read the status of the inspected ABIs
The sandbox FF-A emulator supports only 64-bit direct messaging.
Signed-off-by: Abdellatif El Khlifi
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
Cc: Heinrich Schuchardt
---
Changelog:
===
v12:
* remove reparenting by making the emulator parent of the FF-A device in the DT
* add invoke_ffa_fn()
* address nits
v11:
* rename ffa_try_discovery() to sandbox_ffa_discover()
* rename sandbox_ffa_query_core_state() to sandbox_query_ffa_emul_state()
* store the sandbox emulator pointer in the FF-A device uc_priv (struct
ffa_priv)
* set the emulator as parent of the sandbox FF-A device
v10:
* split the FF-A sandbox support into an emulator and a driver
* read FFA_VERSION and FFA_PARTITION_INFO_GET state using
sandbox_ffa_query_core_state()
* drop CONFIG_SANDBOX_FFA config
* address nits
v9: align FF-A sandbox driver with FF-A discovery through DM
v8: update ffa_bus_prvdata_get() to return a pointer rather than
a pointer address
v7: state that sandbox driver supports only 64-bit direct messaging
v4: align sandbox driver with the new FF-A driver interfaces
and new way of error handling
v1: introduce the sandbox driver
MAINTAINERS | 3 +-
arch/sandbox/dts/sandbox.dtsi | 9 +
arch/sandbox/dts/test.dts | 8 +
arch/sandbox/include/asm/sandbox_arm_ffa.h| 72 ++
.../include/asm/sandbox_arm_ffa_priv.h| 121 +++
configs/sandbox64_defconfig | 1 +
configs/sandbox_defconfig | 1 +
doc/arch/arm64.ffa.rst| 19 +-
doc/arch/sandbox/sandbox.rst | 1 +
drivers/firmware/arm-ffa/Kconfig | 13 +-
drivers/firmware/arm-ffa/Makefile | 10 +-
drivers/firmware/arm-ffa/ffa-emul-uclass.c| 720 ++
.../firmware/arm-ffa/sandbox_arm_ffa_priv.h | 14 -
drivers/firmware/arm-ffa/sandbox_ffa.c| 110 +++
include/dm/uclass-id.h| 1 +
15 files changed, 1081 insertions(+), 22 deletions(-)
create mode 100644 arch/sandbox/include/asm/sandbox_arm_ffa.h
create mode 100644 arch/sandbox/include/asm/sandbox_arm_ffa_priv.h
create mode 100644 drivers/firmware/arm-ffa/ffa-emul-uclass.c
delete mode 100644 drivers/firmware/arm-ffa/sandbox_arm_ffa_priv.h
create mode 100644 drivers/firmware/arm-ffa/sandbox_ffa.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 40c356e539..598644bb00 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -269,12 +269,13 @@ F:configs/cortina_presidio-asic-pnand_defconfig
ARM FF-A
M: Abdellatif El Khlifi
S: Maintained
+F: arch/sandbox/include/asm/sandbox_arm_ffa.h
+F: arch/sandbox/include/asm/sandbox_arm_ffa_priv.h
F: cmd/armffa.c
F: doc/arch/arm64.ffa.rst
F: doc/usage/cmd/armffa.rst
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
-F: include/sandbox_arm_ffa.h
ARM FREESCALE IMX
M: Stefano Babic
diff --git a/arch/sandbox/dts/sandbox.dtsi b/arch/sandbox/dts/sandbox.dtsi
index 30a305c4d2..94a08814b8 100644
--- a/arch/sandbox/dts/sandbox.dtsi
+++ b/arch/sandbox/dts/sandbox.dtsi
@@ -445,6 +445,15 @@
thermal {
compatible = "sandbox,thermal";
};
+
+ arm-ffa-emul {
+ compatible = "sandbox,arm-ffa-emul";
+
+ sandbox-arm-ffa {
+ compatible = "sandbox,arm-ffa";
+ };
+ };
+
};
&cros_ec {
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 453e53db71..7188ac1f46 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1820,6 +1820,14 @@
extcon {
compatible = "sandbox,extcon";
};
+
+ arm-ffa-emul {
+ compatible = "sandbox,arm-ffa-emul";
+
+ sandbox-arm-ffa {
+ compatible = "sandbox,arm-ffa";
+ };
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/arch/sandbox/include/asm/sandbox_arm_ffa.h
b/arch/sandbox/include/asm/sandbox_arm_ffa.h
new file mode 100644
index 00..be2790f496
--- /dev/null
+++ b/arch/sandbox/include/asm/sandbox_arm_ffa.h
@@ -0,0 +1,72 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *
+ * Authors:
+ * Abdellatif El Khlifi
+ */
+
+#ifndef __SANDBOX_ARM_FFA_H
+#define __SANDBOX_ARM_FFA_H
+
+#include
+
+/*
+ * This header provides public sandbox FF-A emulator declarations
+ * and declarations needed by FF-A sandbox clients
+ */
+
+/* UUIDs strings of the emulated services */
+#define SANDBOX_SERVICE1_UUID "ed32d533-4209-99e6-2d
[PATCH v12 08/10] arm_ffa: introduce armffa command Sandbox test
Add Sandbox test for the armffa command
Signed-off-by: Abdellatif El Khlifi
Reviewed-by: Simon Glass
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v12:
* address nits
v10:
* replace CMD_RET_SUCCESS with 0
* replace CONFIG_SANDBOX_FFA with CONFIG_ARM_FFA_TRANSPORT
v9: align the test with FF-A discovery through DM
v4: drop use of helper APIs
v1: introduce armffa command sandbox test
MAINTAINERS | 1 +
test/cmd/Makefile | 2 ++
test/cmd/armffa.c | 33 +
3 files changed, 36 insertions(+)
create mode 100644 test/cmd/armffa.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 1c81728b15..96141c9f59 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -276,6 +276,7 @@ F: doc/arch/arm64.ffa.rst
F: doc/usage/cmd/armffa.rst
F: drivers/firmware/arm-ffa/
F: include/arm_ffa.h
+F: test/cmd/armffa.c
F: test/dm/ffa.c
ARM FREESCALE IMX
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index 055adc65a2..1d1dbb4fbc 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (c) 2013 Google, Inc
+# Copyright 2022-2023 Arm Limited and/or its affiliates
ifdef CONFIG_HUSH_PARSER
obj-$(CONFIG_CONSOLE_RECORD) += test_echo.o
@@ -23,6 +24,7 @@ obj-$(CONFIG_CMD_SEAMA) += seama.o
ifdef CONFIG_SANDBOX
obj-$(CONFIG_CMD_READ) += rw.o
obj-$(CONFIG_CMD_SETEXPR) += setexpr.o
+obj-$(CONFIG_ARM_FFA_TRANSPORT) += armffa.o
endif
obj-$(CONFIG_CMD_TEMPERATURE) += temperature.o
obj-$(CONFIG_CMD_WGET) += wget.o
diff --git a/test/cmd/armffa.c b/test/cmd/armffa.c
new file mode 100644
index 00..9a44a397e8
--- /dev/null
+++ b/test/cmd/armffa.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for armffa command
+ *
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *
+ * Authors:
+ * Abdellatif El Khlifi
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Basic test of 'armffa' command */
+static int dm_test_armffa_cmd(struct unit_test_state *uts)
+{
+ /* armffa getpart */
+ ut_assertok(run_command("armffa getpart " SANDBOX_SERVICE1_UUID, 0));
+
+ /* armffa ping */
+ ut_assertok(run_commandf("armffa ping 0x%x", SANDBOX_SP1_ID));
+
+ /* armffa devlist */
+ ut_assertok(run_command("armffa devlist", 0));
+
+ return 0;
+}
+
+DM_TEST(dm_test_armffa_cmd, UT_TESTF_SCAN_FDT | UT_TESTF_CONSOLE_REC);
--
2.25.1
[PATCH v12 09/10] arm_ffa: efi: introduce FF-A MM communication
Add MM communication support using FF-A transport
This feature allows accessing MM partitions services through
EFI MM communication protocol. MM partitions such as StandAlonneMM
or smm-gateway secure partitions which reside in secure world.
An MM shared buffer and a door bell event are used to exchange
the data.
The data is used by EFI services such as GetVariable()/SetVariable()
and copied from the communication buffer to the MM shared buffer.
The secure partition is notified about availability of data in the
MM shared buffer by an FF-A message (door bell).
On such event, MM SP can read the data and updates the MM shared
buffer with the response data.
The response data is copied back to the communication buffer and
consumed by the EFI subsystem.
MM communication protocol supports FF-A 64-bit direct messaging.
Signed-off-by: Abdellatif El Khlifi
Signed-off-by: Gowtham Suresh Kumar
Cc: Tom Rini
Cc: Simon Glass
Cc: Ilias Apalodimas
Cc: Jens Wiklander
---
Changelog:
===
v12:
* drop use of calloc when querying SPs
* address nits
v11:
* rename select_ffa_mm_comms() to select_mm_comms()
* improve the logic of MM transport selection in mm_communicate()
* addressing nits
v10:
* use the FF-A driver Uclass operations
* use uclass_first_device()
* addressing nits
v9: align how FF-A is used with FF-A discovery through DM
v8:
* isolate the compilation choices between FF-A and OP-TEE
* update partition_info_get() second argument to be an SP count
* pass NULL device pointer to the FF-A bus discovery and operations
v7:
* set the MM door bell event to use 64-bit direct messaging
* issue a compile time error when one of these macros are not found :
FFA_SHARED_MM_BUFFER_SIZE, FFA_SHARED_MM_BUFFER_OFFSET,
FFA_SHARED_MM_BUFFER_ADDR
* make mm_sp_svc_uuid static
* replace EINVAL with ENOMEM in ffa_discover_mm_sp_id() when calloc() fails
* improve use of unmap_sysmem() in ffa_mm_communicate()
v6:
* add FF-A runtime discovery at MM communication level
* drop EFI runtime support for FF-A MM communication
* revert the changes in include/mm_communication.h for
efi_mm_communicate_header and smm_variable_access structures
v4:
* use the new FF-A driver interfaces
* discover MM partitions at runtime
* copy FF-A driver private data to EFI runtime section at
ExitBootServices()
* drop use of FFA_ERR_STAT_SUCCESS error code
* replace EFI_BUFFER_TOO_SMALL with EFI_OUT_OF_RESOURCES
in ffa_mm_communicate(). No need for efi_memcpy_runtime() anymore
* revert the error log in mm_communicate() in case of failure
* remove packed attribute from efi_mm_communicate_header and
smm_variable_communicate_header
v2:
* set default values to 0 for FFA_SHARED_MM_BUFFER_SIZE,
FFA_SHARED_MM_BUFFER_ADDR and MM_SP_UUID_DATA and add warnings
v1:
* introduce FF-A MM communication
include/mm_communication.h| 13 ++
lib/efi_loader/Kconfig| 14 +-
lib/efi_loader/efi_variable_tee.c | 291 +-
3 files changed, 312 insertions(+), 6 deletions(-)
diff --git a/include/mm_communication.h b/include/mm_communication.h
index e65fbde60d..f17847583b 100644
--- a/include/mm_communication.h
+++ b/include/mm_communication.h
@@ -6,6 +6,9 @@
* Copyright (c) 2017, Intel Corporation. All rights reserved.
* Copyright (C) 2020 Linaro Ltd.
* Copyright (C) 2020 Linaro Ltd.
+ * Copyright 2022-2023 Arm Limited and/or its affiliates
+ *Authors:
+ * Abdellatif El Khlifi
*/
#ifndef _MM_COMMUNICATION_H_
@@ -13,6 +16,9 @@
#include
+/* MM service UUID string (big-endian format). This UUID is common across all
MM SPs */
+#define MM_SP_UUID "33d532ed-e699-0942-c09c-a798d9cd722d"
+
/*
* Interface to the pseudo Trusted Application (TA), which provides a
* communication channel with the Standalone MM (Management Mode)
@@ -248,4 +254,11 @@ struct smm_variable_var_check_property {
u16 name[];
};
+/* supported MM transports */
+enum mm_comms_select {
+ MM_COMMS_UNDEFINED,
+ MM_COMMS_FFA,
+ MM_COMMS_OPTEE
+};
+
#endif /* _MM_COMMUNICATION_H_ */
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index c5835e6ef6..08a6b84101 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -55,13 +55,23 @@ config EFI_VARIABLE_FILE_STORE
stored as file /ubootefi.var on the EFI system partition.
config EFI_MM_COMM_TEE
- bool "UEFI variables storage service via OP-TEE"
- depends on OPTEE
+ bool "UEFI variables storage service via the trusted world"
+ depends on OPTEE || ARM_FFA_TRANSPORT
help
+ Allowing access to the MM SP services (SPs such as StandAlonneMM,
smm-gateway).
+ When using the u-boot OP-TEE driver, StandAlonneMM is supported.
+ When using the u-boot FF-A driver any MM SP is supported.
+
If OP-TEE is present and running StandAloneMM, dispatch all UEFI
variable related operations to that. The app
[PATCH v12 10/10] arm_ffa: efi: corstone1000: enable MM communication
turn on EFI MM communication On corstone1000 platform MM communication between u-boot and the secure world (Optee) is done using the FF-A bus. Signed-off-by: Abdellatif El Khlifi Cc: Tom Rini Cc: Simon Glass Cc: Ilias Apalodimas Cc: Jens Wiklander --- Changelog: === v9: update copyright string v8: * drop OP-TEE configs from Corstone-1000 defconfig v7: * improve the definition of FFA_SHARED_MM_BUFFER_ADDR and FFA_SHARED_MM_BUFFER_OFFSET * update FFA_SHARED_MM_BUFFER_ADDR value v6: * corstone-1000: enable optee driver * corstone-1000: remove CONFIG_ARM_FFA_EFI_RUNTIME_MODE from the defconfig v4: * corstone-1000: turn on EFI MM communication configs/corstone1000_defconfig | 2 ++ include/configs/corstone1000.h | 15 +-- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index 2d391048cd..0a48df9fbc 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -53,3 +53,5 @@ CONFIG_DM_SERIAL=y CONFIG_USB=y CONFIG_USB_ISP1760=y CONFIG_ERRNO_STR=y +CONFIG_EFI_MM_COMM_TEE=y +CONFIG_ARM_FFA_TRANSPORT=y diff --git a/include/configs/corstone1000.h b/include/configs/corstone1000.h index 3347c11792..4ef1f05e40 100644 --- a/include/configs/corstone1000.h +++ b/include/configs/corstone1000.h @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * (C) Copyright 2022 ARM Limited * (C) Copyright 2022 Linaro * Rui Miguel Silva - * Abdellatif El Khlifi + * Copyright 2022-2023 Arm Limited and/or its affiliates + * + * Authors: + * Abdellatif El Khlifi * * Configuration for Corstone1000. Parts were derived from other ARM * configurations. @@ -14,6 +16,15 @@ #include +#define FFA_SHARED_MM_BUFFER_SIZE SZ_4K /* 4 KB */ + +/* + * shared buffer physical address used for communication between + * u-boot and the MM SP + */ +#define FFA_SHARED_MM_BUFFER_ADDR 0x0200UL +#define FFA_SHARED_MM_BUFFER_OFFSET0 + #define V2M_BASE 0x8000 #define CFG_PL011_CLOCK5000 -- 2.25.1
Re: [PATCH v11 09/10] arm_ffa: efi: introduce FF-A MM communication
On Tue, Apr 18, 2023 at 07:49:07PM -0600, Simon Glass wrote:
Hi Simon,
>
> On Wed, 12 Apr 2023 at 03:43, Abdellatif El Khlifi
> wrote:
> >
> > Add MM communication support using FF-A transport
> >
> > This feature allows accessing MM partitions services through
> > EFI MM communication protocol. MM partitions such as StandAlonneMM
> > or smm-gateway secure partitions which reside in secure world.
> >
> > An MM shared buffer and a door bell event are used to exchange
> > the data.
> >
> > The data is used by EFI services such as GetVariable()/SetVariable()
> > and copied from the communication buffer to the MM shared buffer.
> >
> > The secure partition is notified about availability of data in the
> > MM shared buffer by an FF-A message (door bell).
> >
> > On such event, MM SP can read the data and updates the MM shared
> > buffer with the response data.
> >
> > The response data is copied back to the communication buffer and
> > consumed by the EFI subsystem.
> >
> > MM communication protocol supports FF-A 64-bit direct messaging.
> >
> > Signed-off-by: Abdellatif El Khlifi
> > Signed-off-by: Gowtham Suresh Kumar
> > Cc: Tom Rini
> > Cc: Simon Glass
> > Cc: Ilias Apalodimas
> > Cc: Jens Wiklander
> >
> > ---
> > Changelog:
> > ===
> >
> > v11:
> >
> > * rename select_ffa_mm_comms() to select_mm_comms()
> > * improve the logic of MM transport selection in mm_communicate()
> > * addressing nits
> >
> > v10:
> >
> > * use the FF-A driver Uclass operations
> > * use uclass_first_device()
> > * addressing nits
> >
> > v9: align how FF-A is used with FF-A discovery through DM
> >
> > v8:
> >
> > * isolate the compilation choices between FF-A and OP-TEE
> > * update partition_info_get() second argument to be an SP count
> > * pass NULL device pointer to the FF-A bus discovery and operations
> >
> > v7:
> >
> > * set the MM door bell event to use 64-bit direct messaging
> > * issue a compile time error when one of these macros are not found :
> > FFA_SHARED_MM_BUFFER_SIZE, FFA_SHARED_MM_BUFFER_OFFSET,
> > FFA_SHARED_MM_BUFFER_ADDR
> > * make mm_sp_svc_uuid static
> > * replace EINVAL with ENOMEM in ffa_discover_mm_sp_id() when calloc() fails
> > * improve use of unmap_sysmem() in ffa_mm_communicate()
> >
> > v6:
> >
> > * add FF-A runtime discovery at MM communication level
> > * drop EFI runtime support for FF-A MM communication
> > * revert the changes in include/mm_communication.h for
> > efi_mm_communicate_header and smm_variable_access structures
> >
> > v4:
> >
> > * use the new FF-A driver interfaces
> > * discover MM partitions at runtime
> > * copy FF-A driver private data to EFI runtime section at
> > ExitBootServices()
> > * drop use of FFA_ERR_STAT_SUCCESS error code
> > * replace EFI_BUFFER_TOO_SMALL with EFI_OUT_OF_RESOURCES
> > in ffa_mm_communicate(). No need for efi_memcpy_runtime() anymore
> > * revert the error log in mm_communicate() in case of failure
> > * remove packed attribute from efi_mm_communicate_header and
> > smm_variable_communicate_header
> >
> > v2:
> >
> > * set default values to 0 for FFA_SHARED_MM_BUFFER_SIZE,
> > FFA_SHARED_MM_BUFFER_ADDR and MM_SP_UUID_DATA and add warnings
> >
> > v1:
> >
> > * introduce FF-A MM communication
> >
> > include/mm_communication.h| 13 ++
> > lib/efi_loader/Kconfig| 14 +-
> > lib/efi_loader/efi_variable_tee.c | 312 +-
> > 3 files changed, 333 insertions(+), 6 deletions(-)
> >
> > diff --git a/include/mm_communication.h b/include/mm_communication.h
> > index e65fbde60d..f17847583b 100644
> > --- a/include/mm_communication.h
> > +++ b/include/mm_communication.h
> > @@ -6,6 +6,9 @@
> > * Copyright (c) 2017, Intel Corporation. All rights reserved.
> > * Copyright (C) 2020 Linaro Ltd.
> > * Copyright (C) 2020 Linaro Ltd.
> > + * Copyright 2022-2023 Arm Limited and/or its affiliates
> >
> > + *Authors:
> > + * Abdellatif El Khlifi
> > */
> >
> > #ifndef _MM_COMMUNICATION_H_
> > @@ -13,6 +16,9 @@
> >
> > #include
> >
> > +/* MM service UUID string (big-endian format). This UUID is common across
> > all MM SPs */
> > +#define MM_SP_UUID "33d532ed-e699-0942-c09c-a798d9cd722d"
> > +
> > /*
> > * Interface to the pseudo Trusted Application (TA), which provides a
> > * communication channel with the Standalone MM (Management Mode)
> > @@ -248,4 +254,11 @@ struct smm_variable_var_check_property {
> > u16 name[];
> > };
> >
> > +/* supported MM transports */
> > +enum mm_comms_select {
> > + MM_COMMS_UNDEFINED,
> > + MM_COMMS_FFA,
> > + MM_COMMS_OPTEE
> > +};
> > +
> > #endif /* _MM_COMMUNICATION_H_ */
> > diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
> > index c5835e6ef6..08a6b84101 100644
> > --- a/lib/efi_loader/Kconfig
> > +++ b/lib/efi_loader/Kconfig
> > @@ -55,13 +55,23 @@ config EFI_VARIABLE_FILE_STORE
> > stored as file /ubootefi.var on the EFI system
RE: [EXTERNAL] Re: [PATCH] usb: cdns3: gadget.c: Set fast access bit
> >On 11/05/23 11:00 am, Pawel Laszczak wrote: >>> >>> +Pawel & Peter >>> >>> On 09/05/2023 08:58, Ravi Gunasekaran wrote: Hi Roger, On 05/05/23 6:02 pm, Roger Quadros wrote: > Hi Ravi, > > On 05/05/2023 15:13, Ravi Gunasekaran wrote: >> From: Aswath Govindraju >> >> When the device port is in a low power state [U3/L2/Not >> Connected], accesses to usb device registers may take a long time. >> This could lead to potential core hang when the controller >> registers are accessed after the port is disabled by setting DEVDS >> field. Setting the fast register access bit ensures that the PHY >> clock is keeping up in >>> active state. >> >> Therefore, set fast access bit to ensure the accesses to device >> registers are quick even in low power states. >> >> Signed-off-by: Aswath Govindraju >> --- >> drivers/usb/cdns3/gadget.c | 4 >> 1 file changed, 4 insertions(+) >> >> diff --git a/drivers/usb/cdns3/gadget.c >> b/drivers/usb/cdns3/gadget.c index fcaeab9cc1..fddc8c931a 100644 >> --- a/drivers/usb/cdns3/gadget.c >> +++ b/drivers/usb/cdns3/gadget.c >> @@ -2321,6 +2321,9 @@ static void cdns3_gadget_config(struct >>> cdns3_device *priv_dev) >> writel(USB_IEN_INIT, ®s->usb_ien); >> writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, ®s->usb_conf); >> >> +/* Set the Fast access bit */ >> +writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs- >>usb_pwr); >> + > > Should this be done in cdns3_gadget_udc_start() so it is symmetric? > cdns3_gadget_config() is called in cdns3_gadget_udc_start() and cdns3_gadget_resume(). These settings seems to be needed during resume as well. >>> >>> But this bit was never cleared in suspend so why do you need to set >>> it again it in resume? >>> >> >> In my opinion setting PUSB_PWR_FST_REG_ACCESS is not needed in >> cdns3_gadget_resume, but it should not have any negative impact for >> driver. The cdns3_gadget_config function seems like a good place for >> setting this bit. >> > >In the suspend(), USB_CONF_CFGRST (register: usb_conf.CFGRST) is set, >resetting the USB device configuration. Does this mean >PUSB_PWR_FST_REG_ACCESS will also be reset? > Setting usb_conf.CFGRST doesn't reset the PUSB_PWR_FST_REG_ACCESS. Regards, Pawel >Regards, >Ravi > >> Regards, >> Pawel Laszczak >> >>> The commit log says that this bit must be kept set in low power states. >>> >> cdns3_configure_dmult(priv_dev, NULL); >> >> cdns3_gadget_pullup(&priv_dev->gadget, 1); @@ -2378,6 +2381,7 >>> @@ >> static int cdns3_gadget_udc_stop(struct usb_gadget *gadget) >> >> /* disable interrupt for device */ >> writel(0, &priv_dev->regs->usb_ien); >> +writel(0, &priv_dev->regs->usb_pwr); >> writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf); >> >> return ret; >> >> base-commit: a25dcda452bf6a6de72764a8d990d72e5def643d > >>> >>> -- >>> cheers, >>> -roger
Re: [PATCH v5 01/17] riscv: cpu: jh7110: Add support for jh7110 SoC
On 3/28/23 8:42 PM, Yanhong Wang wrote:
+void harts_early_init(void)
+{
+ ulong *ptr;
+ u8 *tmp;
+ ulong len, remain;
+ /*
+* Feature Disable CSR
+*
+* Clear feature disable CSR to '0' to turn on all features for
+* each core. This operation must be in M-mode.
+*/
+ if (CONFIG_IS_ENABLED(RISCV_MMODE))
+ csr_write(CSR_U74_FEATURE_DISABLE, 0);
+
+ /* clear L2 LIM memory
+* set __bss_end to 0x81F region to zero
+* The L2 Cache Controller supports ECC. ECC is applied to SRAM.
+* If it is not cleared, the ECC part is invalid, and an ECC error
+* will be reported when reading data.
+*/
+ ptr = (ulong *)&__bss_end;
+ len = L2_LIM_MEM_END - (ulong)&__bss_end;
+ remain = len % sizeof(ulong);
+ len /= sizeof(ulong);
+
+ while (len--)
+ *ptr++ = 0;
+
+ /* clear the remain bytes */
+ if (remain) {
+ tmp = (u8 *)ptr;
+ while (remain--)
+ *tmp++ = 0;
+ }
+}
Hi Yanhong, I know this is already merged, but it looks wrong to
me.`harts_early_init`
will be called by all harts in SPL. The per-hart stack sits between __bss_end
and L2_LIM_MEM_END.
Zeroing this region could overwrite the hart's stack, and other harts' stacks.
The current
implementation works likely because harts_early_init doesn't use any stack
space, but it's up to
the compiler and we can't guarantee that. If it were to save and restore `ra`
register, then we
would crash in function epilogue. Also, we are having data-races here, because
harts are writing
over each other's stack.
My advice is that we should split the zeroing of L2 LIM into different places
just before the
region is to be used. For stacks, we can let each hart clearing its own stack,
and for the malloc
space, we can do so during malloc initialization. Doing so also gives us the
benefit of catching
the read of uninitialized data. In this approach, the L2_LIM_MEM_END macro is
not needed anymore.
Passing ethaddr and eth1addr from FSBL @ 0xfffffc00 not working anymore
Hi, I hope this is the right mailing list to ask beginners questions. I've asked this question also a the Xilinxs forum (Petalinux based board), without much help.. but it must be something simple, but I don't know much about u-boot yet. Previously using Petalinux 2019.1 (not sure which u-boot version, I guess 2019?), I would write environment variables in the FSBL @ address 0xfc00 (ethaddr, and eth1addr) and when u-boot was loaded these variables where automatically added to the u-boot environment, and also use for DCHP etc. Currently this does not seem to happen anymore in Petalinux 2022.2 (u-boot reports version 2022.1). Now, I can add `env import -t 0xfc00 0x300` to the bootcmd, but this appears to me to be post-factum. I.e. I don't think u-boot will not use these variables for TFTP or so. How do I configure u-boot to load the environment again from the above address or is there another way of loading the two MAC addresses from an EEPROM and putting them in the environment at u-boot start-up? Any pointers or advice would be welcome. Thanks! Kind regards, Vincent -- National Institute for Subatomic Physics Nikhef Department of Computer Technology Mobile: +31 (0)646812032 E-mail:v.van.beve...@nikhef.nl
[PATCH 0/2] arm: mach-k3: j7200: Add main_uart1 device and clock data
Add device data and clock data for main_uart1 for J7200 SoC so that main_uart1 will be powered on and its clock will be set up while booting the J7200 SoC. Bhavya Kapoor (2): arm: mach-k3: j7200: dev-data.c: Add main_uart1 device data arm: mach-k3: j7200: clk-data.c: Add main_uart1 clock data arch/arm/mach-k3/j7200/clk-data.c | 7 +-- arch/arm/mach-k3/j7200/dev-data.c | 3 ++- 2 files changed, 7 insertions(+), 3 deletions(-) -- 2.34.1
[PATCH 2/2] arm: mach-k3: j7200: clk-data.c: Add main_uart1 clock data
Add main_uart1 clocks in clk-data.c for J7200. Now,
main_uart1 clocks will be set up while booting the J7200 SoC.
Signed-off-by: Bhavya Kapoor
---
arch/arm/mach-k3/j7200/clk-data.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-k3/j7200/clk-data.c
b/arch/arm/mach-k3/j7200/clk-data.c
index 0437e30abb..9b45786a2d 100644
--- a/arch/arm/mach-k3/j7200/clk-data.c
+++ b/arch/arm/mach-k3/j7200/clk-data.c
@@ -379,6 +379,7 @@ static const struct clk_data clk_list[] = {
CLK_MUX("main_pll4_xref_sel_out0", main_pll4_xref_sel_out0_parents, 2,
0x43008090, 4, 1, 0),
CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2,
0x40f08010, 0, 1, 0),
CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0",
"hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 4800),
+ CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out1",
"hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c4, 0, 2, 0, 0, 4800),
CLK_DIV("hsdiv0_16fft_main_12_hsdivout0_clk",
"pllfracf_ssmod_16fft_main_12_foutvcop_clk", 0x68c080, 0, 7, 0, 0),
CLK_DIV("hsdiv0_16fft_main_7_hsdivout0_clk",
"pllfracf_ssmod_16fft_main_7_foutvcop_clk", 0x687080, 0, 7, 0, 0),
CLK_DIV("hsdiv0_16fft_main_8_hsdivout0_clk",
"pllfracf_ssmod_16fft_main_8_foutvcop_clk", 0x688080, 0, 7, 0, 0),
@@ -534,6 +535,8 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(197, 2, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
DEV_CLK(202, 2, "hsdiv0_16fft_main_8_hsdivout0_clk"),
DEV_CLK(203, 0, "hsdiv0_16fft_main_8_hsdivout0_clk"),
+ DEV_CLK(278, 2, "usart_programmable_clock_divider_out1"),
+ DEV_CLK(278, 3, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(288, 3, "postdiv2_16fft_main_1_hsdivout7_clk"),
DEV_CLK(288, 4, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(288, 6, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
@@ -546,7 +549,7 @@ static const struct dev_clk soc_dev_clk_data[] = {
const struct ti_k3_clk_platdata j7200_clk_platdata = {
.clk_list = clk_list,
- .clk_list_cnt = 108,
+ .clk_list_cnt = 109,
.soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 127,
+ .soc_dev_clk_data_cnt = 129,
};
--
2.34.1
[PATCH 1/2] arm: mach-k3: j7200: dev-data.c: Add main_uart1 device data
Add device data for main_uart1 in dev-data.c for J7200. Now,
main_uart1 will be powered on while booting the J7200 SoC.
Signed-off-by: Bhavya Kapoor
---
arch/arm/mach-k3/j7200/dev-data.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/j7200/dev-data.c
b/arch/arm/mach-k3/j7200/dev-data.c
index d3194ae51a..c1a4dab694 100644
--- a/arch/arm/mach-k3/j7200/dev-data.c
+++ b/arch/arm/mach-k3/j7200/dev-data.c
@@ -53,6 +53,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(92, &soc_lpsc_list[5]),
PSC_DEV(91, &soc_lpsc_list[6]),
PSC_DEV(146, &soc_lpsc_list[7]),
+ PSC_DEV(278, &soc_lpsc_list[7]),
PSC_DEV(4, &soc_lpsc_list[8]),
PSC_DEV(4, &soc_lpsc_list[9]),
PSC_DEV(202, &soc_lpsc_list[10]),
@@ -77,5 +78,5 @@ const struct ti_k3_pd_platdata j7200_pd_platdata = {
.num_psc = 2,
.num_pd = 6,
.num_lpsc = 17,
- .num_devs = 22,
+ .num_devs = 23,
};
--
2.34.1
Re: [PATCH v11 05/10] arm_ffa: introduce armffa command
Hi Simon, > > On Wed, 12 Apr 2023 at 03:43, Abdellatif El Khlifi > wrote: > > > > Provide armffa command showcasing the use of the U-Boot FF-A support > > > > armffa is a command showcasing how to invoke FF-A operations. > > This provides a guidance to the client developers on how to > > call the FF-A bus interfaces. The command also allows to gather secure > > partitions information and ping these partitions. The command is also > > helpful in testing the communication with secure partitions. > > > > For more details please refer to the command documentation [1]. > > > > [1]: doc/usage/cmd/armffa.rst > > > > Signed-off-by: Abdellatif El Khlifi > > Cc: Tom Rini > > Cc: Simon Glass > > Cc: Ilias Apalodimas > > Cc: Jens Wiklander > > Cc: Heinrich Schuchardt > > > > --- > > Changelog: > > === > > > > v11: > > > > * use U_BOOT_CMD_WITH_SUBCMDS > > * address nits > > > > v10: > > > > * use the FF-A driver Uclass operations > > * use uclass_first_device() > > * address nits > > > > v9: > > > > * remove manual FF-A discovery and use DM > > * use DM class APIs to probe and interact with the FF-A bus > > * add doc/usage/cmd/armffa.rst > > > > v8: > > > > * update partition_info_get() second argument to be an SP count > > * pass NULL device pointer to the FF-A bus discovery and operations > > > > v7: > > > > * adapt do_ffa_dev_list() following the recent update on > > uclass_first_device/uclass_next_device functions (they return void now) > > * set armffa command to use 64-bit direct messaging > > > > v4: > > > > * remove pattern data in do_ffa_msg_send_direct_req > > > > v3: > > > > * use the new driver interfaces (partition_info_get, sync_send_receive) > > in armffa command > > > > v2: > > > > * replace use of ffa_helper_init_device function by > > ffa_helper_bus_discover > > > > v1: > > > > * introduce armffa command > > > > MAINTAINERS | 2 + > > cmd/Kconfig | 10 ++ > > cmd/Makefile | 2 + > > cmd/armffa.c | 212 +++ > > doc/arch/arm64.ffa.rst | 7 + > > doc/usage/cmd/armffa.rst | 105 +++ > > doc/usage/index.rst | 1 + > > drivers/firmware/arm-ffa/Kconfig | 1 + > > 8 files changed, 340 insertions(+) > > create mode 100644 cmd/armffa.c > > create mode 100644 doc/usage/cmd/armffa.rst > > > > Reviewed-by: Simon Glass > > with nits below > > For your docs, please use a proper rST link for > doc/usage/cmd/armffa.rst so people can click on it and view the > command docs. > > Also: > > armffa is an implementation-defined command > > (add hyphen) > > although I'm not sure how an implementation can define the command? > > The example output in your 'example' docs is very, very verbose. > Shouldn't it just report problems? Thanks, addressed in v12. Cheers, Abdellatif > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 76f0f276ce..c64804ca2d 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -269,7 +269,9 @@ F: configs/cortina_presidio-asic-pnand_defconfig > > ARM FF-A > > M: Abdellatif El Khlifi > > S: Maintained > > +F: cmd/armffa.c > > F: doc/arch/arm64.ffa.rst > > +F: doc/usage/cmd/armffa.rst > > F: drivers/firmware/arm-ffa/ > > F: include/arm_ffa.h > > F: include/sandbox_arm_ffa.h > > diff --git a/cmd/Kconfig b/cmd/Kconfig > > index 8c9b430f99..4cb0b2c167 100644 > > --- a/cmd/Kconfig > > +++ b/cmd/Kconfig > > @@ -934,6 +934,16 @@ endmenu > > > > menu "Device access commands" > > > > +config CMD_ARMFFA > > + bool "Arm FF-A test command" > > + depends on ARM_FFA_TRANSPORT > > + help > > + Provides a test command for the FF-A support > > + supported options: > > + - Listing the partition(s) info > > + - Sending a data pattern to the specified partition > > + - Displaying the arm_ffa device info > > + > > config CMD_ARMFLASH > > #depends on FLASH_CFI_DRIVER > > bool "armflash" > > diff --git a/cmd/Makefile b/cmd/Makefile > > index e032091621..9130b9078d 100644 > > --- a/cmd/Makefile > > +++ b/cmd/Makefile > > @@ -12,6 +12,8 @@ obj-y += panic.o > > obj-y += version.o > > > > # command > > + > > Please drop blank line > > > +obj-$(CONFIG_CMD_ARMFFA) += armffa.o > > obj-$(CONFIG_CMD_ACPI) += acpi.o > > obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o > > obj-$(CONFIG_CMD_AES) += aes.o > > diff --git a/cmd/armffa.c b/cmd/armffa.c > > new file mode 100644 > > index 00..ab88412c7d > > --- /dev/null > > +++ b/cmd/armffa.c > > @@ -0,0 +1,212 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright 2022-2023 Arm Limited and/or its affiliates > > > > + * > > + * Authors: > > + * Abdellatif El Khlifi > > + */ > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +/** > > + * ffa_get_dev() - Return the
Re: [PATCH] ARM: stm32: Add IWDG handling into PSCI suspend code
Hi,
On 5/11/23 13:54, Marek Vasut wrote:
On 5/11/23 08:39, Patrice CHOTARD wrote:
Hi,
On 5/11/23 02:22, Marek Vasut wrote:
In case the IWDG is enabled by either U-Boot or Linux, the IWDG can
never
be disabled again. That includes low power states, which means that
if the
IWDG is enabled, the SoC would reset itself after a while in suspend
via
the IWDG. This is not desired behavior.
It is possible to enable IWDG pre-timeout IRQ which is routed into
the EXTI,
and use that IRQ to wake the CPU up before the IWDG timeout is
reached and
reset is triggered. This pre-timeout IRQ can be used to reload the
WDT and
then suspend the CPU again every once in a while.
Implement this functionality for both IWDG1 and IWDG2 by reading out
all
the unmasked IRQs, comparing the list with currently pending IRQs in
GICv3:
- If any IRQ is pending and it is NOT IWDG1 or IWDG2 pre-timeout IRQ,
  wake up and let OS handle the IRQs
- If IWDG1 or IWDG2 IRQ is pending and no other IRQ is pending,
  ping the respective IWDG and suspend again
This does not seem to have any adverse impact on power consumption
in suspend.
[...]
+Â Â Â /* Ping IWDG2 and ACK pretimer IRQ */
+Â Â Â if (iwdg2_wake) {
+Â Â Â writel(IWDG_KR_RELOAD_KEY, STM32_IWDG2_BASE + IWDG_KR);
+Â Â Â writel(IWDG_EWCR_EWIC, STM32_IWDG2_BASE + IWDG_EWCR);
+Â Â Â }
+Â Â Â }
  writel(0x3, STM32_RCC_BASE + RCC_MP_SREQCLRR);
 ddr_sw_self_refresh_exit();
Reviewed-by: Patrice Chotard
I feel like maybe I need to whack the IWDG also BEFORE entering
suspend, expect a V2 shortly.
Do you think this IWDG approach is fine to keep the system from
rebooting in suspend ? Or do you see any better option for the MP1 ?
I think it is fine if you want to have watchdog running in STANDBY even
this patch force a wakeup.
but if IWDG 1 or 2 should be not running in STANDBY (but also for STOP)
for your product,
it can be managed directly by the hardware with OTP, to freeze watchdog.
=> it is a decision for each product of the desired behavior of the IWDG
in low power mode.
See Ref Manual: 48.3 IWDG implementation
Table 332. STM32MP157x IWDG features
Option bytes to control the activity in Standby mode (6)
6. Controlled via option bytes OTP_IWDG1_FZ_STANDBY and
OTP_IWDG2_FZ_STANDBY, respectively, for IWDG1 and IWDG2.
and in Table17 => OTP 18 = HW2 bit 5 to 8
Regards
Patrick
Re: [Uboot-stm32] [PATCH v2] ARM: stm32: Add IWDG handling into PSCI suspend code
Hi, On 5/11/23 21:55, Marek Vasut wrote: In case the IWDG is enabled by either U-Boot or Linux, the IWDG can never be disabled again. That includes low power states, which means that if the IWDG is enabled, the SoC would reset itself after a while in suspend via the IWDG. This is not desired behavior. It is possible to enable IWDG pre-timeout IRQ which is routed into the EXTI, and use that IRQ to wake the CPU up before the IWDG timeout is reached and reset is triggered. This pre-timeout IRQ can be used to reload the WDT and then suspend the CPU again every once in a while. Implement this functionality for both IWDG1 and IWDG2 by reading out all the unmasked IRQs, comparing the list with currently pending IRQs in GICv3: - If any IRQ is pending and it is NOT IWDG1 or IWDG2 pre-timeout IRQ, wake up and let OS handle the IRQs - If IWDG1 or IWDG2 IRQ is pending and no other IRQ is pending, ping the respective IWDG and suspend again This does not seem to have any adverse impact on power consumption in suspend. Signed-off-by: Marek Vasut --- Cc: Ilias Apalodimas Cc: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Cc: Sughosh Ganu Cc: u-boot@lists.denx.de Cc: uboot-st...@st-md-mailman.stormreply.com --- V2: Ping the IWDG before entering WFI to assure they would not reset the SoC --- arch/arm/mach-stm32mp/include/mach/stm32.h | 2 + arch/arm/mach-stm32mp/psci.c | 73 -- 2 files changed, 70 insertions(+), 5 deletions(-) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [Uboot-stm32] [PATCH] ARM: stm32: Use __section(".data") with dot in the section name on DHSOM
Hi,
On 5/4/23 21:52, Marek Vasut wrote:
The correct specifier of the section is ".data" and not "data",
use the former to place the variables in ".data" section.
Fixes: 731fd50e27f ("ARM: stm32: Implement board coding on AV96")
Fixes: 92ca0f7446c ("ARM: dts: stm32: Synchronize DDR setttings on DH SoMs")
Signed-off-by: Marek Vasut
---
Cc: Patrice Chotard
Cc: Patrick Delaunay
Cc: u-b...@dh-electronics.com
Cc: uboot-st...@st-md-mailman.stormreply.com
---
board/dhelectronics/dh_stm32mp1/board.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH] ARM: stm32: Add missing header for save_boot_params
Hi,
On 5/4/23 21:52, Marek Vasut wrote:
The get_stm32mp_rom_api_table() function is defined in sys_params.h ,
add the missing header to avoid compiler warning.
Fixes: dbeaca79b79 ("ARM: stm32: Factor out save_boot_params")
Signed-off-by: Marek Vasut
---
Cc: Patrice Chotard
Cc: Patrick Delaunay
Cc: uboot-st...@st-md-mailman.stormreply.com
---
arch/arm/mach-stm32mp/ecdsa_romapi.c | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Re: [PATCH] ARM: stm32: Add IWDG handling into PSCI suspend code
On 5/12/23 15:43, Patrick DELAUNAY wrote:
Hi,
Hi,
+Â Â Â /* Ping IWDG2 and ACK pretimer IRQ */
+Â Â Â if (iwdg2_wake) {
+Â Â Â writel(IWDG_KR_RELOAD_KEY, STM32_IWDG2_BASE + IWDG_KR);
+Â Â Â writel(IWDG_EWCR_EWIC, STM32_IWDG2_BASE + IWDG_EWCR);
+Â Â Â }
+Â Â Â }
  writel(0x3, STM32_RCC_BASE + RCC_MP_SREQCLRR);
 ddr_sw_self_refresh_exit();
Reviewed-by: Patrice Chotard
I feel like maybe I need to whack the IWDG also BEFORE entering
suspend, expect a V2 shortly.
Do you think this IWDG approach is fine to keep the system from
rebooting in suspend ? Or do you see any better option for the MP1 ?
I think it is fine if you want to have watchdog running in STANDBY even
this patch force a wakeup.
but if IWDG 1 or 2 should be not running in STANDBY (but also for STOP)
for your product,
Why ?
I want the watchdog to monitor that the platform is still OK, even in
suspend. Also, as far as I can tell, once the IWDG is started, it cannot
be stopped, right ?
it can be managed directly by the hardware with OTP, to freeze watchdog.
=> it is a decision for each product of the desired behavior of the IWDG
in low power mode.
See Ref Manual: 48.3 IWDG implementation
Table 332. STM32MP157x IWDG features
Option bytes to control the activity in Standby mode (6)
6. Controlled via option bytes OTP_IWDG1_FZ_STANDBY and
OTP_IWDG2_FZ_STANDBY, respectively, for IWDG1 and IWDG2.
and in Table17 => OTP 18 = HW2 bit 5 to 8
I saw the OTP fuses, but I don't want to blow them. Or is that really
the suggestion ST would provide for suspend/resume, blow the fuses ?
(I wonder, why isn't the logic of those fuses inverted then, i.e. by
default stop the watchdog in suspend AND blow fuses to keep it running
in suspend?)
Re: [PATCH 1/3] usb: Tidy up the usb_start flag
Hi, On 5/6/23 04:03, Simon Glass wrote: This should be declared in a header file so that type-checking works correctly. Add a single declaration to usb.h and remove the others. Signed-off-by: Simon Glass --- cmd/usb.c | 1 - common/usb.c | 2 +- drivers/usb/host/usb-uclass.c | 1 - include/usb.h | 3 +++ test/boot/bootdev.c | 4 ++-- test/dm/blk.c | 3 --- 6 files changed, 6 insertions(+), 8 deletions(-) Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH] ARM: stm32: Fix OF_LIST on DHCOR
Hi, On 5/5/23 02:11, Tom Rini wrote: The ITS file used to build the images here lists three dtb files as being used. Today, these are built by the logic that will over-build dtb files based on SOC/etc symbols being set. To future proof this platform and be generally correct, we list all 3 of the device trees used here in OF_LIST. Cc: Marek Vasut Cc: Patrick Delaunay Cc: Patrice Chotard Signed-off-by: Tom Rini --- configs/stm32mp15_dhcor_basic_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index b54ff9301461..d4786500271a 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -92,6 +92,7 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k( # CONFIG_ISO_PARTITION is not set # CONFIG_SPL_PARTITION_UUIDS is not set CONFIG_OF_LIVE=y +CONFIG_OF_LIST="stm32mp15xx-dhcor-avenger96 stm32mp15xx-dhcor-testbench stm32mp15xx-dhcor-drc-compact" CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y Reviewed-by: Patrick Delaunay Thanks Patrick
Re: [PATCH] efi: fix semihosting EFI payload booting
On Thu, 11 May 2023 17:23:13 +0200
Heinrich Schuchardt wrote:
Hi Heinrich, Ilias,
> On 5/11/23 10:59, Andre Przywara wrote:
> > On Thu, 11 May 2023 08:22:30 +0200
> > Heinrich Schuchardt wrote:
> >
> >> On 5/11/23 02:00, Andre Przywara wrote:
> >>> On Wed, 10 May 2023 23:19:33 +0200
> >>> Heinrich Schuchardt wrote:
> >>>
> >>> Hi,
> >>>
> On 5/10/23 19:26, Andre Przywara wrote:
> > On Wed, 10 May 2023 17:58:06 +0200
> > Heinrich Schuchardt wrote:
> >
> > Hi,
> >
> >> On 5/10/23 16:13, Andre Przywara wrote:
> >>> At the moment any naive attempt to boot an EFI payload that has just
> >>> been loaded via "hostfs" (sandbox or semihosting) is met by a rather
> >>> confusing error message:
> >>> ===
> >>> VExpress64# load hostfs - $kernel_addr_r Image
> >>> 52752896 bytes read in 8 ms (6.1 GiB/s)
> >>> VExpress64# bootefi $kernel_addr_r
> >>> No UEFI binary known at 0x8008
> >>> ===
> >>> Actually explicitly providing the filesize:
> >>> VExpress64# bootefi $kernel_addr_r:$filesize
> >>> works around that problem, but the issue lies deeper: the call to
> >>> efi_set_bootdev() (as done by the generic load code) bails out at some
> >>> point, leaving the image_addr and image_size variables unset, which
> >>> triggers this message. The problem seems to be that "-" is not
> >>> understood by the code creating an UEFI device path. We could try to
> >>> fix
> >>> just that, but actually semihosting seems to have some explicit
> >>> support
> >>> in UEFI (at least it does in EDK II): there is a separate GUID for it,
> >>> and hostfs is significantly different in some aspects to justify
> >>> special
> >>> handling.
> >>>
> >>> Check for the device name being "hostfs" and create a specific UEFI
> >>> device
> >>> path for semihosting in this case. This uses the GUID used by EDK II
> >>> for
> >>> almost 15 years.
> >>> This fixes the above load/bootefi sequence without requiring an
> >>> explicit
> >>> file size argument.
> >>>
> >>> Signed-off-by: Andre Przywara
> >>
> Now I am able to debug the code.
>
> I wonder if the file system should be exposed as EFI simple file system
> so that EFI applications can access it, e.g. for GRUB to load initrd and
> the kernel.
Yes, this would be the ultimate goal. There is no file listing
functionality in semihosting, which is a bummer, but it should still work
if you know the file name. On top of the EDK-II shell or grub being able to
load an image, this would also allow to easily specify an initrd via the
kernel command line. This works with EDK-II's semihosting support.
But I see that this requires more work, IIUC we need to support
hostfs explicitly via the EFI_SIMPLE_FILE_SYSTEM_PROTOCOL.
At the moment this seems to assume that there is some underlying block
device, so this might need some refactoring.
As it stands right now, your much simpler patch seems to provide the same
functionality as mine, so I wonder if we should take this as a kind of
quick fix, to allow starting EFI apps loaded via hostfs (including
sandbox, btw).
Eventually, when introducing proper filesystem protocol support, this
patch probably would need to come back.
So I leave this up to you, but am fine with your simpler patch.
Cheers,
Andre
>
> If we don't want to expose it, this change will be enough:
>
> diff --git a/lib/efi_loader/efi_device_path.c
> b/lib/efi_loader/efi_device_path.c
> index e2e98a39be..058bdc1ee5 100644
> --- a/lib/efi_loader/efi_device_path.c
> +++ b/lib/efi_loader/efi_device_path.c
> @@ -1203,7 +1203,7 @@ efi_status_t efi_dp_from_name(const char *dev,
> const char *devnr,
> } else if (!strcmp(dev, "Uart")) {
> if (device)
> *device = efi_dp_from_uart();
> - } else if (!strcmp(dev, "Mem")) {
> + } else if (!strcmp(dev, "Mem") || !strcmp(dev, "hostfs") ) {
> efi_get_image_parameters(&image_addr, &image_size);
>
> if (device)
>
> Best regards
>
> Heinrich
>
Re: [GIT PULL] please pull fsl-qoirq-2023-5-5
On Fri, May 12, 2023 at 03:40:37PM +0800, Peng Fan wrote: > Hi Tom, > > On 5/6/2023 1:14 AM, Tom Rini wrote: > > On Fri, May 05, 2023 at 03:19:27AM +, Peng Fan wrote: > > > > > Hi Tom, > > > > > > Please pull fsl-qoirq-2023-5-5 > > > > > > > I've applied this to u-boot/master now, thanks. But please note that > > these are still outstanding in patchwork: > > https://patchwork.ozlabs.org/project/uboot/patch/20230119173948.1730773-1-...@kicherer.org/ > Already applied before. I updated status. For both, OK, thanks. > > https://patchwork.ozlabs.org/project/uboot/patch/20221018181247.1909223-1-sean.ander...@seco.com/ > > I still not sure how to handle the maintainers, since there is no voluteer. Well, unmaintained platforms should be dropped. Perhaps the required motivation to get someone assigned the task? I suspect at least a few of these are behind in some conversions, and there's also needing device trees to be kept in regular sync with the kernel. -- Tom signature.asc Description: PGP signature
Subject: [PATCH v3 00/18] TI TPS6594 PMIC support for multiple TI EVMs
TPS6594 is a Power Management IC which provides regulators and others features like GPIOs, RTC, watchdog, ESMs (Error Signal Monitor), and PFSM (Pre-configurable Finite State Machine). The SoC and the PMIC can communicate through the I2C or SPI interfaces. TPS6594 is the super-set device while TPS6593 and LP8764 are derivatives. This series fixes LDO voltage conversion for TPS6594 PMIC, it adds support for its derivatives. The features implemented are: - Regulators - Watchdog disable Watchdog disable is not a watchdog driver implementation. Watchdog is active by default causing a reboot even if not used. This implementation allows to disable the watchdog at boot time. This patch suite can be applied only after u-boot dts upstream is re-synced on latest Linux dts: Link: https://gist.github.com/nmenon/030b11b085473fa008145429b39fcc75 This should be applied on top of Linux patch series (for dts inheritence): Link: https://lore.kernel.org/all/20230417154832.216774-1-ebl...@baylibre.com/ Additionally, it should also be applied on top of U-Boot patch series for j784s4 initial board support: Link: https://lore.kernel.org/all/20230321141028.24456-1-hnaga...@ti.com/ Tested on boards listed below (resynched manually on Linux 6.3 dts) Supported boards: - j721eXSOMXEVM: Link: https://www.ti.com/tool/J721EXSOMXEVM - j721S2XSOMXEVM: Link: https://www.ti.com/tool/J721S2XSOMXEVM - j7200XSOMXEVM: Link: https://www.ti.com/tool/J7200XSOMXEVM - j784S4XEVM Link: https://www.ti.com/tool/J784S4XEVM - AM62A-SKEVM: Link: https://www.ti.com/tool/SK-AM62A-LP basic tests: => pmic list => regulator list => regulator dev reg_name_to_be_tested => regulator info => regulator value => regulator value my_test_val => regulator value Check watchdog reset is not happening when dip switch SW2 on GPIO8 is High. History: v1 Changes: - Link: https://lore.kernel.org/all/20230406153820.2800054-1-jnea...@baylibre.com/ v2 Changes: - added support for 2 additional boards: j721s2 and j7200 - Convert driver model tags to use new schema: 8c103c33f - Link: https://lore.kernel.org/all/20230407133347.2957435-1-jnea...@baylibre.com/ v3 Changes: - addressed v2 review comments - clear WD_EN bit in stop_watchdog() function - use generic node names for pmic and watchdog - added support for 1 additional board: j784s4 Apelete Seketeli (3): DONOTMERGE: arch: arm: dts: k3-j784s4-evm: Add TI TPS6594 PMIC support arch: arm: dts: k3-j784s4-r5-evm: Add TI TPS6594 PMIC support configs: j784s4_evm_a72: Enable TI TPS6594 PMIC support Esteban Blanc (4): configs: j7200_evm: Enable TP6594 family PMICs configs: j721s2_evm: Enable TP6594 PMIC and AVS0 board: ti: k3-j721s2: Force TPS65941 PMIC WD disable board: ti: k3-j721s2: Enable AVS0 on board init Jerome Neanne (10): drivers: pmic: TPS65941 add support for WD disable drivers: regulator: Fixes for TPS65941 LDO voltage conversion configs: j721e_evm: Add support for TPS65941 PMICs on j721e TI EVM board board: ti: k3-j721e: Force TPS65941 PMIC WD disable on j721e TI EVM board DONOTMERGE: arm: dts: k3-j721e: u-boot overlay for TI tps6594 PMIC DONOTMERGE: arm: dts: k3-j721e: refactor r5 board file to use Linux dts tps6594 description DONOTMERGE: arm: dts: k3-j721e: realign node name on linux dts name DONOTMERGE: arm: dts: k3-am62a7-sk: Add TI TPS6593 PMIC support DONOTMERGE: arm: dts: k3-j7200: Add TP6594 family PMICs DONOTMERGE: arch: arm: dts: k3-j721s2: Add TPS6594 family PMICs Julien Panis (1): configs: am62ax_evm_a53: Enable support for TI TPS6593 PMIC arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 24 +++- .../k3-j7200-common-proc-board-u-boot.dtsi| 27 .../arm/dts/k3-j7200-r5-common-proc-board.dts | 56 +++- .../k3-j721e-common-proc-board-u-boot.dtsi| 22 +++ .../k3-j721e-r5-common-proc-board-u-boot.dtsi | 2 +- .../arm/dts/k3-j721e-r5-common-proc-board.dts | 48 +++ .../k3-j721s2-common-proc-board-u-boot.dtsi | 37 - .../dts/k3-j721s2-r5-common-proc-board.dts| 44 ++ arch/arm/dts/k3-j784s4-evm-u-boot.dtsi| 12 ++ arch/arm/dts/k3-j784s4-r5-evm.dts | 134 ++ board/ti/j721e/evm.c | 8 ++ board/ti/j721s2/evm.c | 18 ++- configs/am62ax_evm_a53_defconfig | 8 +- configs/j7200_evm_a72_defconfig | 6 + configs/j721e_evm_a72_defconfig | 6 + configs/j721s2_evm_a72_defconfig | 6 + configs/j721s2_evm_r5_defconfig | 6 + configs/j784s4_evm_a72_defconfig | 19 +-- drivers/power/pmic/tps65941.c | 61 drivers/power/regulator/tps65941_regulator.c | 71 -- include/power/tps65941.h | 27 +++- 21 files changed, 558 insertions(+), 84 deletions(-) -- 2.34.1
[PATCH 01/18] drivers: pmic: TPS65941 add support for WD disable
From: Jerome Neanne
This is not a proper WD driver because it's not planned to
support WD driver for PMIC in u-boot at any time.
The purpose is just WD disable.
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
drivers/power/pmic/tps65941.c | 61 +++
include/power/tps65941.h | 27 ++--
2 files changed, 86 insertions(+), 2 deletions(-)
diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c
index 83d0f83c64..974c8c90dc 100644
--- a/drivers/power/pmic/tps65941.c
+++ b/drivers/power/pmic/tps65941.c
@@ -47,6 +47,9 @@ static int tps65941_bind(struct udevice *dev)
ofnode regulators_node;
int children;
+ if (dev->driver_data == TPS65941_WD)
+ return 0;
+
regulators_node = dev_read_subnode(dev, "regulators");
if (!ofnode_valid(regulators_node)) {
debug("%s: %s regulators subnode not found!\n", __func__,
@@ -64,6 +67,61 @@ static int tps65941_bind(struct udevice *dev)
return dm_scan_fdt_dev(dev);
}
+static int stop_watchdog(struct udevice *wd_i2c_dev)
+{
+ int ret;
+
+ /* Maintain WD long window */
+ ret = dm_i2c_reg_read(wd_i2c_dev, TPS65941_WD_MODE_REG);
+ if (ret < 0) {
+ debug("failed to read i2c reg (%d)\n", ret);
+ return ret;
+ }
+
+ ret &= ~TPS65941_WD_PWRHOLD_MASK;
+ ret |= TPS65941_WD_PWRHOLD_MASK;
+ ret = dm_i2c_reg_write(wd_i2c_dev, TPS65941_WD_MODE_REG, ret);
+ if (ret) {
+ debug("%s: %s write WD_PWRHOLD fail!\n", __func__,
wd_i2c_dev->name);
+ return ret;
+ }
+
+ ret = dm_i2c_reg_read(wd_i2c_dev, TPS65941_WD_MODE_REG);
+ if (ret < 0) {
+ debug("failed to read back i2c reg (%d)\n", ret);
+ return ret;
+ }
+
+ /* Disable WD */
+ ret = dm_i2c_reg_read(wd_i2c_dev, TPS65941_WD_THR_CFG);
+ if (ret < 0) {
+ debug("failed to read i2c reg (%d)\n", ret);
+ return ret;
+ }
+
+ ret &= ~TPS65941_WD_EN_MASK;
+ ret = dm_i2c_reg_write(wd_i2c_dev, TPS65941_WD_THR_CFG, ret);
+ if (ret) {
+ debug("%s: %s write WD_EN fail!\n", __func__, wd_i2c_dev->name);
+ return ret;
+ }
+
+ ret = dm_i2c_reg_read(wd_i2c_dev, TPS65941_WD_THR_CFG);
+ if (ret < 0) {
+ debug("failed to read back i2c reg (%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+static int tps65941_probe(struct udevice *dev)
+{
+ if (dev->driver_data == TPS65941_WD)
+ return stop_watchdog(dev);
+ return 0;
+}
+
static struct dm_pmic_ops tps65941_ops = {
.read = tps65941_read,
.write = tps65941_write,
@@ -73,7 +131,9 @@ static const struct udevice_id tps65941_ids[] = {
{ .compatible = "ti,tps659411", .data = TPS659411 },
{ .compatible = "ti,tps659412", .data = TPS659411 },
{ .compatible = "ti,tps659413", .data = TPS659413 },
+ { .compatible = "ti,tps659312", .data = TPS659312 },
{ .compatible = "ti,lp876441", .data = LP876441 },
+ { .compatible = "ti,tps65941_watchdog", .data = TPS65941_WD },
{ }
};
@@ -82,5 +142,6 @@ U_BOOT_DRIVER(pmic_tps65941) = {
.id = UCLASS_PMIC,
.of_match = tps65941_ids,
.bind = tps65941_bind,
+ .probe = tps65941_probe,
.ops = &tps65941_ops,
};
diff --git a/include/power/tps65941.h b/include/power/tps65941.h
index a2bc6814ba..f3bf25a6d2 100644
--- a/include/power/tps65941.h
+++ b/include/power/tps65941.h
@@ -2,7 +2,9 @@
#define TPS659412 0x1
#define TPS659413 0x2
#define TPS659414 0x3
-#define LP876441 0x4
+#define TPS659312 0x4
+#define LP876441 0x5
+#define TPS65941_WD0x20
/* I2C device address for pmic tps65941 */
#define TPS65941_I2C_ADDR (0x12 >> 1)
@@ -18,10 +20,31 @@
#define TPS65941_BUCK_VOLT_MAX 334
#define TPS65941_BUCK_MODE_MASK0x1
-#define TPS65941_LDO_VOLT_MASK 0x3E
+#define TPS65941_LDO_VOLT_MASK 0x7F
#define TPS65941_LDO_VOLT_MAX_HEX 0x3A
#define TPS65941_LDO_VOLT_MIN_HEX 0x4
#define TPS65941_LDO_VOLT_MAX 330
#define TPS65941_LDO_MODE_MASK 0x1
#define TPS65941_LDO_BYPASS_EN 0x80
#define TP65941_BUCK_CONF_SLEW_MASK0x7
+
+/* BYPASS is bit7 of VOUT TPS65941_LDO_BYP_MASK */
+#define TPS65941_LDO123_BYP_CONFIG 7
+
+#define TPS65941_LDO123_VOLT_BYP_MIN 170
+#define TPS65941_LDO123_VOLT_BYP_MAX 360
+#define TPS65941_LDO123_VOLT_MIN 60
+#define TPS65941_LDO4_VOLT_MIN 120
+#define TPS65941_LDO4_VOLT_MIN 120
+#define TPS65941_LDO123_VSET_MIN 0x04
+#define TPS65941_LDO4_VSET_MIN 0x20
+#define TPS65941_LDO123_VSET_MAX 0x3A
+#define TPS65941_LDO4_VSET_
[PATCH 02/18] drivers: regulator: Fixes for TPS65941 LDO voltage conversion
From: Jerome Neanne
Fixes: 065a452ae6a power: regulator: tps65941: add regulator support
LDO voltage conversion was incorrect.
This was checked by writing and reading back value.
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
drivers/power/regulator/tps65941_regulator.c | 71 +---
1 file changed, 63 insertions(+), 8 deletions(-)
diff --git a/drivers/power/regulator/tps65941_regulator.c
b/drivers/power/regulator/tps65941_regulator.c
index b041126775..7afd68c5c4 100644
--- a/drivers/power/regulator/tps65941_regulator.c
+++ b/drivers/power/regulator/tps65941_regulator.c
@@ -212,12 +212,55 @@ static int tps65941_ldo_enable(struct udevice *dev, int
op, bool *enable)
return 0;
}
-static int tps65941_ldo_val2volt(int val)
+static int tps65941_ldo_volt2val(int idx, int uV)
{
- if (val > TPS65941_LDO_VOLT_MAX_HEX || val < TPS65941_LDO_VOLT_MIN_HEX)
+ int base = TPS65941_LDO123_VOLT_MIN;
+ int max = TPS65941_LDO_VOLT_MAX;
+ int offset = TPS65941_LDO123_VSET_MIN;
+ int step = TPS65941_LDO123_STEP;
+
+ if (idx > 2) {
+ base = TPS65941_LDO4_VOLT_MIN;
+ offset = TPS65941_LDO4_VSET_MIN;
+ step = TPS65941_LDO4_STEP;
+ }
+
+ if (uV > max)
return -EINVAL;
- else if (val >= TPS65941_LDO_VOLT_MIN_HEX)
- return 60 + (val - TPS65941_LDO_VOLT_MIN_HEX) * 5;
+ else if (uV >= base)
+ return (uV - base) / step + offset;
+ else
+ return -EINVAL;
+}
+
+static int tps65941_ldo_val2volt(int idx, int val)
+{
+ int reg_base = TPS65941_LDO123_VSET_MIN;
+ int reg_max = TPS65941_LDO123_VSET_MAX;
+ int base = TPS65941_LDO123_VOLT_MIN;
+ int max = TPS65941_LDO_VOLT_MAX;
+ int step = TPS65941_LDO123_STEP;
+ int mask = TPS65941_LDO_VOLT_MASK >> 1;
+
+ if (idx > 2) {
+ base = TPS65941_LDO4_VOLT_MIN;
+ max = TPS65941_LDO_VOLT_MAX;
+ reg_base = TPS65941_LDO4_VSET_MIN;
+ reg_max = TPS65941_LDO4_VSET_MAX;
+ step = TPS65941_LDO4_STEP;
+ mask = TPS65941_LDO_VOLT_MASK;
+ } else {
+ val = val >> 1;
+ }
+
+ if (val > mask || val < 0)
+ return -EINVAL;
+ else if (val >= reg_max)
+ return max;
+ else if (val <= reg_base)
+ return base;
+ else if (val >= 0)
+ return base + (step * (val - reg_base));
else
return -EINVAL;
}
@@ -227,7 +270,9 @@ static int tps65941_ldo_val(struct udevice *dev, int op,
int *uV)
unsigned int hex, adr;
int ret;
struct dm_regulator_uclass_plat *uc_pdata;
+ int idx;
+ idx = dev->driver_data - 1;
uc_pdata = dev_get_uclass_plat(dev);
if (op == PMIC_OP_GET)
@@ -240,7 +285,8 @@ static int tps65941_ldo_val(struct udevice *dev, int op,
int *uV)
return ret;
ret &= TPS65941_LDO_VOLT_MASK;
- ret = tps65941_ldo_val2volt(ret);
+ ret = tps65941_ldo_val2volt(idx, ret);
+
if (ret < 0)
return ret;
@@ -249,12 +295,21 @@ static int tps65941_ldo_val(struct udevice *dev, int op,
int *uV)
return 0;
}
- hex = tps65941_buck_volt2val(*uV);
+ /* LDO1, LDO2 & LDO3 in BYPASS mode only supports 1.7V min to 3.6V max
*/
+ if (idx < 2 &&
+ (ret & BIT(TPS65941_LDO123_BYP_CONFIG)) &&
+ *uV < TPS65941_LDO123_VOLT_BYP_MIN)
+ return -EINVAL;
+
+ hex = tps65941_ldo_volt2val(idx, *uV);
if (hex < 0)
return hex;
- ret &= 0x0;
- ret = hex;
+ if (idx < 2)
+ hex = hex << 1;
+
+ ret &= ~TPS65941_LDO_VOLT_MASK;
+ ret |= hex;
ret = pmic_reg_write(dev->parent, adr, ret);
--
2.34.1
[PATCH 04/18] board: ti: k3-j721e: Force TPS65941 PMIC WD disable on j721e TI EVM board
From: Jerome Neanne
Using uclass_probe_all forces probe on all devices:
Only probe for WD stop is really needed here.
Probing other devices has no impact.
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
board/ti/j721e/evm.c | 8
1 file changed, 8 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 2398bead78..c6391c1bae 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -25,6 +25,8 @@
#include "../common/board_detect.h"
+#include
+
#define board_is_j721e_som() (board_ti_k3_is("J721EX-PM1-SOM") || \
board_ti_k3_is("J721EX-PM2-SOM"))
@@ -41,6 +43,12 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
+ int ret;
+
+ /* WD stop is applied unconditionally on all platforms*/
+ ret = uclass_probe_all(UCLASS_PMIC);
+ if (ret)
+ printf("Failed to probe! stop tps65941 wd\n");
return 0;
}
--
2.34.1
[PATCH 05/18] DONOTMERGE: arm: dts: k3-j721e: u-boot overlay for TI tps6594 PMIC
From: Jerome Neanne
j721e board includes 2 instances of TPS6594:
- Primary PMIC
- Secondary PMIC
Add AVS class0 in u-boot SPL.
AVS is supported only on CPU rail: vdd_cpu_avs.
This rail is supplied by the primary PMIC: tps659413
This rail is supplied by a dual-phased buck: buck12.
Other PMICs rails are not AVS capable.
Each PMIC includes a Watchdog that is active by default at boot.
This would issue a platform reset unless pmic GPIO8 is driven
or this is handled by SW.
Watchdog driver is not required for identified use of this product.
This software disable inside u-boot avoids parasitic wd reset.
GPIO8 can then be used for other purpose.
Board documentation:
Link: https://www.ti.com/tool/J721EXSOMXEVM
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 22 +++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index 867ec2bb1a..857d0c0529 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -79,6 +79,14 @@
chipid@4314 {
bootph-pre-ram;
};
+
+ mcu_i2c0: i2c@40b0 {
+ status = "okay";
+ tps65941_wd: watchdog@12 {
+ compatible = "ti,tps65941_watchdog";
+ reg = <0x12>;
+ };
+ };
};
&secure_proxy_main {
@@ -170,6 +178,20 @@
&wkup_i2c0 {
bootph-pre-ram;
+ tps659413: pmic@48 {
+ bootph-pre-ram;
+ compatible = "ti,tps659413";
+
+ regulators {
+ bootph-pre-ram;
+ bucka12: buck12 {
+ bootph-pre-ram;
+ };
+ };
+ };
+ tps659411: pmic@4c {
+ compatible = "ti,tps659411";
+ };
};
&main_i2c0 {
--
2.34.1
[PATCH 03/18] configs: j721e_evm: Add support for TPS65941 PMICs on j721e TI EVM board
From: Jerome Neanne Add PMIC and regulators feature support for j721e. PMIC is controlled by SoC through I2C interface. Signed-off-by: Jerome Neanne Signed-off-by: Apelete Seketeli --- configs/j721e_evm_a72_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index d5f37b134c..af9a755c36 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -67,6 +67,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -79,6 +80,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=4704.spi.0,nor0=47034000.hyperbus" CONFIG_MTDPARTS_DEFAULT="mtdparts=4704.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),1m(ospi.sysfw),256k(ospi.env.backup),57344k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" @@ -169,9 +172,12 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_DSP=y -- 2.34.1
[PATCH 06/18] DONOTMERGE: arm: dts: k3-j721e: refactor r5 board file to use Linux dts tps6594 description
From: Jerome Neanne
Use a copy of Linux dts for TPS6594 PMIC description
instead of custom u-boot
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 48 +--
1 file changed, 22 insertions(+), 26 deletions(-)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 1b40cf2580..f6456034d4 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -21,6 +21,27 @@
tick-timer = &timer1;
};
+ evm_12v0: fixedregulator-evm12v0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: fixedregulator-vsys3v3 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
a72_0: a72@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a9 0x0 0x10>;
@@ -277,33 +298,8 @@
ti,driver-strength-ohm = <50>;
};
-&wkup_i2c0 {
- bootph-pre-ram;
- tps659413a: tps659413a@48 {
- reg = <0x48>;
- compatible = "ti,tps659413";
- bootph-pre-ram;
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_i2c0_pins_default>;
- clock-frequency = <40>;
-
- regulators: regulators {
- bootph-pre-ram;
- buck12_reg: buck12 {
- /*VDD_CPU*/
- regulator-name = "buck12";
- regulator-min-microvolt = <60>;
- regulator-max-microvolt = <90>;
- regulator-always-on;
- regulator-boot-on;
- bootph-pre-ram;
- };
- };
- };
-};
-
&wkup_vtm0 {
- vdd-supply-2 = <&buck12_reg>;
+ vdd-supply-2 = <&bucka12>;
bootph-pre-ram;
};
--
2.34.1
[PATCH 07/18] DONOTMERGE: arm: dts: k3-j721e: realign node name on linux dts name
From: Jerome Neanne
Change node name to reuse Linux common dts naming style.
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
index f9746d33ec..332f3f4672 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi
@@ -21,7 +21,7 @@
};
};
-&tps659413a {
+&tps659413 {
esm: esm {
compatible = "ti,tps659413-esm";
bootph-pre-ram;
--
2.34.1
[PATCH 08/18] configs: am62ax_evm_a53: Enable support for TI TPS6593 PMIC
From: Julien Panis Add support for TPS6593 regulators and watchdog. PMIC is controlled by SoC through I2C interface. Signed-off-by: Julien Panis Signed-off-by: Apelete Seketeli --- configs/am62ax_evm_a53_defconfig | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 41fa6f38aa..70d1a03e6a 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -33,6 +33,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" +CONFIG_SPL_I2C=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_CMD_MMC=y @@ -52,7 +53,8 @@ CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y CONFIG_TI_SCI_PROTOCOL=y # CONFIG_GPIO is not set -# CONFIG_I2C is not set +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_MMC_SDHCI=y @@ -64,6 +66,10 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_RESET_TI_SCI=y -- 2.34.1
[PATCH 09/18] DONOTMERGE: arm: dts: k3-am62a7-sk: Add TI TPS6593 PMIC support
From: Jerome Neanne
Add support for TPS6593 PMIC devices:
- regulators (bucks and LDOs) on main I2C0 bus,
- watchdog on MCU I2C0 bus.
Signed-off-by: Julien Panis
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 24 ++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
index cf938c43b8..fe392054c8 100644
--- a/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am62a7-sk-u-boot.dtsi
@@ -84,7 +84,14 @@
};
&mcu_pmx0 {
- bootph-pre-ram;
+ status = "okay";
+
+ mcu_i2c0_pins_default: mcu_i2c0_pins_default {
+ pinctrl-single,pins = <
+ AM62X_MCU_IOPAD(0x044, PIN_INPUT_PULLUP, 0) /* (E12)
MCU_I2C0_SCL */
+ AM62X_MCU_IOPAD(0x048, PIN_INPUT_PULLUP, 0) /* (D9)
MCU_I2C0_SDA */
+ >;
+ };
};
&wkup_uart0 {
@@ -96,7 +103,20 @@
};
&main_i2c0 {
- bootph-pre-ram;
+ tps659312: pmic@48 {
+ compatible = "ti,tps659312";
+ };
+};
+
+&mcu_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_i2c0_pins_default>;
+
+ tps65931_wd: watchdog@12 {
+ compatible = "ti,tps65941_watchdog";
+ reg = <0x12>;
+ };
};
&main_i2c0_pins_default {
--
2.34.1
[PATCH 10/18] configs: j7200_evm: Enable TP6594 family PMICs
From: Esteban Blanc Add support for TPS6594 family regulators and watchdog. PMIC is controlled by SoC through I2C interface. Add dm, pmic and regulators commands to allow testing Signed-off-by: Esteban Blanc Signed-off-by: Jerome Neanne Signed-off-by: Apelete Seketeli --- configs/j7200_evm_a72_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index e40900fffa..8850187924 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -70,6 +70,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -82,6 +83,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=4704.spi.0,nor0=47034000.hyperbus" CONFIG_MTDPARTS_DEFAULT="mtdparts=4704.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),128k(ospi.env),128k(ospi.env.backup),1m(ospi.sysfw),-@8m(ospi.rootfs);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)" @@ -167,9 +170,12 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_R5F=y -- 2.34.1
[PATCH 11/18] DONOTMERGE: arm: dts: k3-j7200: Add TP6594 family PMICs
From: Jerome Neanne
Add support for TPS6594 PMIC family devices:
- regulators (bucks and LDOs) on WKUP_I2C0 bus,
- watchdog on MCU_I2C0 bus.
Signed-off-by: Esteban Blanc
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
.../k3-j7200-common-proc-board-u-boot.dtsi| 27 +
.../arm/dts/k3-j7200-r5-common-proc-board.dts | 56 ---
2 files changed, 49 insertions(+), 34 deletions(-)
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
index f57c2306ba..5088f918e8 100644
--- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
@@ -120,6 +120,15 @@
&wkup_i2c0 {
bootph-pre-ram;
+ status = "okay";
+};
+
+&mcu_i2c0 {
+ status="okay";
+ tps65941_wd: watchdog@12 {
+ compatible = "ti,tps65941_watchdog";
+ reg = <0x12>;
+ };
};
&main_i2c0 {
@@ -196,3 +205,21 @@
&main_r5fss0 {
ti,cluster-mode = <0>;
};
+
+&wkup_i2c0 {
+ bootph-pre-ram;
+ lp876441: pmic@4c {
+ bootph-pre-ram;
+ compatible = "ti,lp876441";
+ regulators {
+ bootph-pre-ram;
+ buckb1: buck1 {
+ bootph-pre-ram;
+ };
+ };
+ };
+};
+
+&tps659414 {
+ compatible = "ti,tps659411";
+};
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index e62f9218e8..1318edf9af 100644
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -21,6 +21,27 @@
firmware-loader = &fs_loader0;
};
+ evm_12v0: fixedregulator-evm12v0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: fixedregulator-vsys3v3 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
fs_loader0: fs_loader@0 {
bootph-all;
compatible = "u-boot,fs-loader";
@@ -126,13 +147,6 @@
>;
};
- wkup_i2c0_pins_default: wkup-i2c0-pins-default {
- pinctrl-single,pins = <
- J721E_WKUP_IOPAD(0x100, PIN_INPUT_PULLUP, 0) /* (F20)
WKUP_I2C0_SCL */
- J721E_WKUP_IOPAD(0x104, PIN_INPUT_PULLUP, 0) /* (H21)
WKUP_I2C0_SDA */
- >;
- };
-
mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (E20)
MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */
@@ -247,35 +261,9 @@
ti,driver-strength-ohm = <50>;
};
-&wkup_i2c0 {
- bootph-pre-ram;
- lp876441: lp876441@4c {
- compatible = "ti,lp876441";
- reg = <0x4c>;
- bootph-pre-ram;
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_i2c0_pins_default>;
- clock-frequency = <40>;
-
- regulators: regulators {
- bootph-pre-ram;
- buck1_reg: buck1 {
- /*VDD_CPU_AVS_REG*/
- regulator-name = "buck1";
- regulator-min-microvolt = <80>;
- regulator-max-microvolt = <125>;
- regulator-always-on;
- regulator-boot-on;
- bootph-pre-ram;
- };
- };
- };
-
-};
-
&wkup_vtm0 {
- vdd-supply-2 = <&buck1_reg>;
bootph-pre-ram;
+ vdd-supply-2 = <&buckb1>;
};
&main_i2c0 {
--
2.34.1
[PATCH 12/18] DONOTMERGE: arch: arm: dts: k3-j721s2: Add TPS6594 family PMICs
From: Jerome Neanne
Add support for TPS6594 PMIC family devices:
- regulators (bucks and LDOs) on main WKUP_I2C0 bus,
- watchdog on MCU_I2C0 bus.
Signed-off-by: Esteban Blanc
Signed-off-by: Jerome Neanne
Signed-off-by: Apelete Seketeli
---
.../k3-j721s2-common-proc-board-u-boot.dtsi | 37 +++-
.../dts/k3-j721s2-r5-common-proc-board.dts| 44 +++
2 files changed, 80 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index 4fd6d36417..cb9f9ab86d 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -21,8 +21,26 @@
};
};
-&wkup_i2c0 {
+&wkup_i2c0{
bootph-pre-ram;
+ tps659411: pmic@48 {
+ bootph-pre-ram;
+ compatible = "ti,tps659411";
+ regulators {
+ bootph-pre-ram;
+ bucka1234: buck1234 {
+ bootph-pre-ram;
+ };
+ };
+ };
+};
+
+&tps659414 {
+ compatible = "ti,tps659411";
+};
+
+&lp876411 {
+ compatible = "ti,lp876441";
};
&cbass_main {
@@ -47,6 +65,17 @@
chipid@4314 {
bootph-pre-ram;
};
+
+ mcu_i2c0: i2c@40b0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_i2c0_pins_default>;
+
+ tps65941_wd: watchdog@12 {
+ compatible = "ti,tps65941_watchdog";
+ reg = <0x12>;
+ };
+ };
};
&mcu_navss {
@@ -101,6 +130,12 @@
&wkup_pmx0 {
bootph-pre-ram;
+ mcu_i2c0_pins_default: mcu_i2c0_pins_default {
+ pinctrl-single,pins = <
+ J721S2_WKUP_IOPAD(0x108, PIN_INPUT, 0) /* (G24)
MCU_I2C0_SCL */
+ J721S2_WKUP_IOPAD(0x10c, PIN_INPUT, 0) /* (J25)
MCU_I2C0_SDA */
+ >;
+ };
};
&k3_pds {
diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index e02b334d10..8a24002045 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -21,6 +21,38 @@
remoteproc1 = &a72_0;
};
+ evm_12v0: fixedregulator-evm12v0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: fixedregulator-vsys3v3 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_5v0: fixedregulator-vsys5v0 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_5v0";
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
fs_loader0: fs_loader@0 {
compatible = "u-boot,fs-loader";
bootph-all;
@@ -95,6 +127,13 @@
<&mcu_secproxy 23>;
bootph-pre-ram;
};
+
+ wkup_vtm0: vtm@4204 {
+ compatible = "ti,am654-vtm", "ti,j721e-avs";
+ reg = <0x0 0x4204 0x0 0x330>;
+ power-domains = <&k3_pds 180 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
&main_pmx0 {
@@ -196,4 +235,9 @@
ti,sci = <&dm_tifs>;
};
+&wkup_vtm0 {
+ vdd-supply-2 = <&bucka1234>;
+ bootph-pre-ram;
+};
+
#include "k3-j721s2-common-proc-board-u-boot.dtsi"
--
2.34.1
[PATCH 13/18] configs: j721s2_evm: Enable TP6594 PMIC and AVS0
From: Esteban Blanc Add support for TPS6594 family regulators and watchdog. Add support for AVS0. PMIC is controlled by SoC through I2C interface. Add dm, pmic and regulators commands to allow testing. Signed-off-by: Esteban Blanc Signed-off-by: Jerome Neanne Signed-off-by: Apelete Seketeli --- configs/j721s2_evm_a72_defconfig | 6 ++ configs/j721s2_evm_r5_defconfig | 6 ++ 2 files changed, 12 insertions(+) diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 594c8dad2c..407d43509d 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -68,6 +68,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=64 CONFIG_CMD_ASKENV=y CONFIG_CMD_DFU=y +CONFIG_CMD_DM=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -80,6 +81,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_MTDIDS_DEFAULT="nor0=4704.spi.0,nor0=47034000.hyperbus" CONFIG_MTDPARTS_DEFAULT="mtdparts=4704.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs)" @@ -173,9 +176,12 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_DSP=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 4ddbe8faef..01096fa937 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -114,6 +114,7 @@ CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_FS_LOADER=y CONFIG_SPL_FS_LOADER=y +CONFIG_K3_AVS0=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_MMC_SDHCI=y @@ -143,6 +144,11 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_RESET_TI_SCI=y -- 2.34.1
[PATCH 14/18] board: ti: k3-j721s2: Force TPS65941 PMIC WD disable
From: Esteban Blanc
Signed-off-by: Esteban Blanc
Signed-off-by: Apelete Seketeli
---
board/ti/j721s2/evm.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index 8eaca9d5af..ec7abea387 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -29,7 +29,14 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
- return 0;
+ int ret = 0;
+
+ /* WD stop is applied unconditionally on all platforms*/
+ ret = uclass_probe_all(UCLASS_PMIC);
+ if (ret)
+ printf("Failed to probe! stop tps65941 wd\n");
+
+ return ret;
}
int dram_init(void)
--
2.34.1
[PATCH 15/18] board: ti: k3-j721s2: Enable AVS0 on board init
From: Esteban Blanc
Signed-off-by: Esteban Blanc
Signed-off-by: Apelete Seketeli
---
board/ti/j721s2/evm.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index ec7abea387..818edea686 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -326,4 +326,13 @@ int board_late_init(void)
void spl_board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(k3_avs),
+ &dev);
+ if (ret)
+ printf("AVS init failed: %d\n", ret);
+#endif
}
--
2.34.1
[PATCH 17/18] arch: arm: dts: k3-j784s4-r5-evm: Add TI TPS6594 PMIC support
Add support for TPS6594 PMIC devices :
- regulators (bucks and LDOs) on WKUP_I2C0 bus,
- watchdog on MCU_I2C0 bus.
Signed-off-by: Apelete Seketeli
---
arch/arm/dts/k3-j784s4-r5-evm.dts | 134 ++
1 file changed, 134 insertions(+)
diff --git a/arch/arm/dts/k3-j784s4-r5-evm.dts
b/arch/arm/dts/k3-j784s4-r5-evm.dts
index 7350a9be34..27b91100af 100644
--- a/arch/arm/dts/k3-j784s4-r5-evm.dts
+++ b/arch/arm/dts/k3-j784s4-r5-evm.dts
@@ -22,6 +22,27 @@
remoteproc1 = &a72_0;
};
+ evm_12v0: fixedregulator-evm12v0 {
+ /* main supply */
+ compatible = "regulator-fixed";
+ regulator-name = "evm_12v0";
+ regulator-min-microvolt = <1200>;
+ regulator-max-microvolt = <1200>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vsys_3v3: fixedregulator-vsys3v3 {
+ /* Output of LM5140 */
+ compatible = "regulator-fixed";
+ regulator-name = "vsys_3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&evm_12v0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
fs_loader0: fs_loader@0 {
compatible = "u-boot,fs-loader";
u-boot,dm-pre-reloc;
@@ -97,6 +118,105 @@
};
};
+&wkup_gpio0 {
+ status = "okay";
+};
+
+&wkup_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_i2c0_pins_default>;
+ clock-frequency = <40>;
+ tps659413: pmic@48 {
+ compatible = "ti,tps65941-q1";
+ reg = <0x48>;
+ system-power-controller;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_irq_pins_default>;
+ interrupt-parent = <&wkup_gpio0>;
+ interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
+ ti,primary-pmic;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ buck12-supply = <&vsys_3v3>;
+ buck3-supply = <&vsys_3v3>;
+ buck4-supply = <&vsys_3v3>;
+ buck5-supply = <&vsys_3v3>;
+ ldo1-supply = <&vsys_3v3>;
+ ldo2-supply = <&vsys_3v3>;
+ ldo3-supply = <&vsys_3v3>;
+ ldo4-supply = <&vsys_3v3>;
+
+ regulators {
+ bucka12: buck12 {
+ regulator-name = "vdd_ddr_1v1";
+ regulator-min-microvolt = <110>;
+ regulator-max-microvolt = <110>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ bucka3: buck3 {
+ regulator-name = "vdd_ram_0v85";
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <85>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ bucka4: buck4 {
+ regulator-name = "vdd_io_1v8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ bucka5: buck5 {
+ regulator-name = "vdd_mcu_0v85";
+ regulator-min-microvolt = <85>;
+ regulator-max-microvolt = <85>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldoa1: ldo1 {
+ regulator-name = "vdd_mcuio_1v8";
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldoa2: ldo2 {
+ regulator-name = "vdd_mcuio_3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldoa3: ldo3 {
+ regulator-name = "vds_dll_0v8";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <80>;
+
[PATCH 18/18] configs: j784s4_evm_a72: Enable TI TPS6594 PMIC support
Enable TPS6594 PMIC support (regulators and watchdog) for j784s4 SoC.
PMIC is controlled by SoC through I2C interface.
Signed-off-by: Apelete Seketeli
---
configs/j784s4_evm_a72_defconfig | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/configs/j784s4_evm_a72_defconfig b/configs/j784s4_evm_a72_defconfig
index 7de8925b27..df95bd58fd 100644
--- a/configs/j784s4_evm_a72_defconfig
+++ b/configs/j784s4_evm_a72_defconfig
@@ -8,12 +8,16 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_SOC_K3_J784S4=y
CONFIG_TARGET_J784S4_A72_EVM=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048
CONFIG_ENV_SIZE=0x2
CONFIG_ENV_OFFSET=0x68
CONFIG_DM_GPIO=y
CONFIG_SPL_DM_SPI=y
CONFIG_DEFAULT_DEVICE_TREE="k3-j784s4-evm"
CONFIG_SPL_TEXT_BASE=0x8008
+CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_DM_RESET=y
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
@@ -24,14 +28,11 @@ CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI=y
# CONFIG_PSCI_RESET is not set
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
-CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
-# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
+CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern;
setenv fdtfile ti/${name_fdt}; run distro_bootcmd"
CONFIG_LOGLEVEL=7
CONFIG_SPL_MAX_SIZE=0xc
@@ -52,7 +53,6 @@ CONFIG_SPL_I2C=y
CONFIG_SPL_DM_MAILBOX=y
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_DM_SPI_FLASH=y
-# CONFIG_SPL_NOR_SUPPORT=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_POWER_DOMAIN=y
CONFIG_SPL_RAM_SUPPORT=y
@@ -68,6 +68,7 @@ CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_SYS_MAXARGS=64
CONFIG_CMD_ASKENV=y
CONFIG_CMD_DFU=y
+CONFIG_CMD_DM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
@@ -80,6 +81,8 @@ CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
+CONFIG_CMD_PMIC=y
+CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_MTDIDS_DEFAULT="nor0=4704.spi.0,nor0=47034000.hyperbus"
CONFIG_MTDPARTS_DEFAULT="mtdparts=4704.spi.0:512k(ospi.tiboot3),2m(ospi.tispl),4m(ospi.u-boot),256k(ospi.env),256k(ospi.env.backup),57088k@8m(ospi.rootfs),256k(ospi.phypattern);47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),-@8m(hbmc.rootfs)"
@@ -89,7 +92,6 @@ CONFIG_CMD_UBI=y
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_MULTI_DTB_FIT=y
-CONFIG_OF_LIST="k3-j784s4-evm"
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
@@ -171,14 +173,16 @@ CONFIG_SPL_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_POWER_DOMAIN=y
CONFIG_TI_SCI_POWER_DOMAIN=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_TPS65941=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
+CONFIG_DM_REGULATOR_TPS65941=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_REMOTEPROC_TI_K3_DSP=y
CONFIG_REMOTEPROC_TI_K3_R5F=y
-CONFIG_DM_RESET=y
CONFIG_RESET_TI_SCI=y
CONFIG_SCSI=y
CONFIG_DM_SCSI=y
@@ -210,4 +214,3 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x6168
CONFIG_UFS=y
CONFIG_CADENCE_UFS=y
CONFIG_TI_J721E_UFS=y
-CONFIG_OF_LIBFDT_OVERLAY=y
--
2.34.1
[PATCH 16/18] DONOTMERGE: arch: arm: dts: k3-j784s4-evm: Add TI TPS6594 PMIC support
Add support for TPS6594 PMIC devices :
- overlaying regulators definition with compatible device,
- watchdog on MCU_I2C0 bus.
Signed-off-by: Apelete Seketeli
---
arch/arm/dts/k3-j784s4-evm-u-boot.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
index cd2e1e1df5..22bcf2cebe 100644
--- a/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
+++ b/arch/arm/dts/k3-j784s4-evm-u-boot.dtsi
@@ -24,6 +24,14 @@
u-boot,dm-spl;
};
+&mcu_i2c0 {
+ status="okay";
+ tps65941_wd: watchdog@12 {
+ compatible = "ti,tps65941_watchdog";
+ reg = <0x12>;
+ };
+};
+
&cbass_main {
u-boot,dm-spl;
};
@@ -133,3 +141,7 @@
&main_sdhci1 {
u-boot,dm-spl;
};
+
+&tps659413 {
+ compatible = "ti,tps659411";
+};
--
2.34.1
Re: [PATCH 1/5] mmc: rockchip_sdhci: Skip blocks read workaround on RK3399
Hi Jonas,
On 5/6/23 19:41, Jonas Karlman wrote:
The workaround to limit number of blocks to read in a single command
should only be applied to RK3568 and RK3588. Change to be more strict
when to apply the workaround.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single
command")
Suggested-by: Simon Glass
Signed-off-by: Jonas Karlman
Tested-by: Quentin Schulz # RK3399 Puma, RK3588 Tiger
Thanks,
Quentin
---
drivers/mmc/rockchip_sdhci.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index 4f110976f4e8..8e4a158049a9 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -594,7 +594,9 @@ static int rockchip_sdhci_probe(struct udevice *dev)
* triggers Data End Bit Error on RK3568 and RK3588. Limit to reading
* max 4 blocks in one command when using PIO mode.
*/
- if (!(host->flags & USE_DMA))
+ if (!(host->flags & USE_DMA) &&
+ (device_is_compatible(dev, "rockchip,rk3568-dwcmshc") ||
+device_is_compatible(dev, "rockchip,rk3588-dwcmshc")))
cfg->b_max = 4;
return sdhci_probe(dev);
Re: [PATCH 2/5] mmc: rockchip_sdhci: Disable DMA mode using a device tree property
Hi Jonas,
On 5/6/23 19:41, Jonas Karlman wrote:
Loading part of TF-A into SRAM from eMMC using DMA fails on RK3399
similar to other Rockchip SoCs. Checksum validation fails with:
## Checking hash(es) for Image atf-2 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-2' image node
spl_load_simple_fit: can't load image loadables index 1 (ret = -1)
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Add a device tree property, u-boot,spl-fifo-mode, to control when the
rockchip_sdhci driver should disable the use of DMA and fallback on PIO
mode. Same device tree property is used by the rockchip_dw_mmc driver.
In commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") the DMA mode was disabled using a CONFIG
option on RK3588. Revert that and instead disable DMA using the device
tree property for all RK3588 boards, also apply similar workaround for
all RK3399 boards.
Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single
command")
Signed-off-by: Jonas Karlman
Tested-by: Quentin Schulz # RK3399 Puma, RK3588 Tiger
Thanks,
Quentin
Re: U-Boot OMAP GPMC ECC change
Hi Roger,
On Fri, May 12, 2023 at 02:53:07PM +0300, Roger Quadros wrote:
>
>
> On 10/05/2023 18:38, Colin Foster wrote:
> >
> > This is still out-of-U-Boot. I have an include/configs/our_product.h
> > file with this:
> >
> > """
> > #define CFG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9, 10, 11,
> > 12, \
> > 13, 14, 15, 16, 17, 18, 19, 20,
> > 21, 22, \
> > 23, 24, 25, 26, 27, 28, 29, 30,
> > 31, 32, \
> > 33, 34, 35, 36, 37, 38, 39, 40,
> > 41, \
> > 42, 43, 44, 45, 46, 47, 48, 49,
> > 50, 51, \
> > 52, 53, 54, 55, 56, 57}
> >
> > #define CFG_SYS_NAND_ECCBYTES 14
> > #define CFG_SYS_NAND_MAX_ECCPOS 57
>
> This should be 56 i.e. (57 - 2 + 1)
> But it won't fix the issue you are facing. :P
Oh, good catch. I know when I was trying to get this working I had to
play with these values quite a bit. I must have missed changing this at
one point.
>
> > #define CFG_SYS_NAND_ECCSIZE512
> > #define CFG_SYS_NAND_MAX_OOBFREE2
> > """
> >
> >
> >> Can you please point me to the Linux device tree file if it exists?
> >
> > This is the latest submission. Still not accepted - I need to find time
> > to button everything up and resubmit. My plan of attack was Kernel
> > Acceptance, then U-Boot. Unfortunately my company lets the pesky
> > "Shipping products" step get in the way :-)
> >
> > https://lkml.org/lkml/2023/2/22/939
> >
> > Or if you just want the ECC part:
> >
> > + nandflash: nand@0,0 {
> > + compatible = "ti,omap2-nand";
> > + reg = <0 0 4>;
> > + interrupt-parent = <&gpmc>;
> > +
> > + nand-bus-width = <16>;
> > + ti,nand-ecc-opt = "bch8";
> > + ti,elm-id=<&elm>;
> > + linux,mtd-name = "micron,nand";
> >
> >
> > I think that's all the info you're looking for. Let me know if I missed
> > something.
>
> Yes this is all I was looking for.
>
> Is CONFIG_NAND_OMAP_ECCSCHEME_BCH8_CODE_HW set in your u-boot config?
Yes, it is set. I've attached our .config file. I just made a change to
CONFIG_NAND_OMAP_GPMC_PREFETCH as a test, which didn't fix the issue.
And as another sanity check, I reverted the patch and have functionality
again:
"""
U-Boot SPL 2023.04-00029-g316faf4c46-dirty (May 12 2023 - 09:02:58 -0700)
OMAP4460-GP ES1.1
Trying to boot from NAND
U-Boot 2023.04-00029-g316faf4c46-dirty (May 12 2023 - 09:02:58 -0700)
CPU : OMAP4460-GP ES1.1
"""
>
> --
> cheers,
> -roger
#
# Automatically generated file; DO NOT EDIT.
# U-Boot 2023.04 Configuration
#
#
# Compiler: arm-linux-gnueabihf-gcc (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0
#
CONFIG_CREATE_ARCH_SYMLINK=y
CONFIG_SYS_CACHE_SHIFT_6=y
CONFIG_SYS_CACHELINE_SIZE=64
CONFIG_LINKER_LIST_ALIGN=4
# CONFIG_ARC is not set
CONFIG_ARM=y
# CONFIG_M68K is not set
# CONFIG_MICROBLAZE is not set
# CONFIG_MIPS is not set
# CONFIG_NIOS2 is not set
# CONFIG_PPC is not set
# CONFIG_RISCV is not set
# CONFIG_SANDBOX is not set
# CONFIG_SH is not set
# CONFIG_X86 is not set
# CONFIG_XTENSA is not set
CONFIG_SYS_ARCH="arm"
CONFIG_SYS_CPU="armv7"
CONFIG_SYS_SOC="omap4"
CONFIG_SYS_VENDOR="ia"
CONFIG_SYS_BOARD="ia_decoder_card"
CONFIG_SYS_CONFIG_NAME="ia_decoder_card"
#
# Skipping low level initialization functions
#
# CONFIG_SKIP_LOWLEVEL_INIT is not set
# CONFIG_SPL_SKIP_LOWLEVEL_INIT is not set
# CONFIG_TPL_SKIP_LOWLEVEL_INIT is not set
# CONFIG_SKIP_LOWLEVEL_INIT_ONLY is not set
# CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY is not set
# CONFIG_SYS_ICACHE_OFF is not set
# CONFIG_SPL_SYS_ICACHE_OFF is not set
# CONFIG_SYS_DCACHE_OFF is not set
# CONFIG_SPL_SYS_DCACHE_OFF is not set
#
# ARM architecture
#
CONFIG_COUNTER_FREQUENCY=0
# CONFIG_POSITION_INDEPENDENT is not set
CONFIG_SPL_SYS_NO_VECTOR_TABLE=y
# CONFIG_GIC_V3_ITS is not set
CONFIG_HAS_VBAR=y
CONFIG_HAS_THUMB2=y
CONFIG_GPIO_EXTRA_HEADER=y
CONFIG_ARM_ASM_UNIFIED=y
CONFIG_SYS_ARM_CACHE_CP15=y
CONFIG_SYS_ARM_MMU=y
# CONFIG_SYS_ARM_MPU is not set
CONFIG_CPU_V7A=y
CONFIG_SYS_ARM_ARCH=7
CONFIG_SYS_ARM_CACHE_WRITEBACK=y
# CONFIG_SYS_ARM_CACHE_WRITETHROUGH is not set
# CONFIG_SYS_ARM_CACHE_WRITEALLOC is not set
# CONFIG_ARCH_CPU_INIT is not set
# CONFIG_SYS_ARCH_TIMER is not set
# CONFIG_ARM_SMCCC is not set
CONFIG_SYS_THUMB_BUILD=y
CONFIG_SPL_SYS_THUMB_BUILD=y
CONFIG_SYS_L2_PL310=y
# CONFIG_SPL_SYS_L2_PL310 is not set
# CONFIG_SYS_L2CACHE_OFF is not set
# CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK is not set
CONFIG_USE_ARCH_MEMCPY=y
CONFIG_SPL_USE_ARCH_MEMCPY=y
CONFIG_USE_ARCH_MEMSET=y
CONFIG_SPL_USE_ARCH_MEMSET=y
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_MVEBU is not set
# CONFIG_ARCH_ORION5X is not set
# CONFIG_TARGET_STV0991 is not set
# CONFIG_ARCH_BCM283X is not set
# CONFIG_ARCH_BCMSTB is not set
# CONFIG_ARCH_BCMBCA is not set
# CONFIG_TARGET_
[PATCH] board: rockchip: Add Support for RG353PS and Panel Auto Detection
From: Chris Morgan
Add support for panel auto detection for the Anbernic RGxx3 series.
This requires us to probe the DSI and DSI-DPHY controllers so that
we may send a MIPI_DCS_GET_DISPLAY_ID command to the panel to find
out which panel we are running. This requires creating a kind of
"skeleton" driver for the panel so we have just enough information
about it to issue the necessary command.
Once the panel type is determined the panel type is saved as an
environment variable, and additionally the panel compatible string
is automatically fixed-up in the devicetree if it is found to be
incompatible. There is a table of panel IDs and compatible strings,
support for a new panel only requires knowing the ID and the string.
Additionally, the device auto detection was changed so that it
mimicks the panel auto detection, requiring only defining a few
new values to add support for a new compatible board. This is done
while also adding a new board, the RG353PS.
Tested the auto detection on an RG353P, RG353PS (2nd revision panel),
RG353V, RG353V (2nd revision panel), RG353M, and RG503. As long as
the correct devicetrees were located in ${boot}/rockchip/. U-Boot
was able to automatically detect the correct board and panel and
boot each device correctly.
Signed-off-by: Chris Morgan
---
.../arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi | 10 +
board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c| 322 +++---
configs/anbernic-rgxx3_defconfig | 15 +
3 files changed, 307 insertions(+), 40 deletions(-)
diff --git a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
index a18e5d1cf7..f986e1941e 100644
--- a/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
+++ b/arch/arm/dts/rk3566-anbernic-rgxx3-u-boot.dtsi
@@ -46,7 +46,17 @@
<&pmucru CLK_RTC32K_FRAC>;
};
+&dsi_dphy0 {
+ status = "okay";
+};
+
+&dsi0 {
+ status = "okay";
+};
+
&i2c2 {
+ pinctrl-0 = <&i2c2m1_xfer>;
+ pinctrl-names = "default";
status = "okay";
};
diff --git a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
index decc46db78..027f4872bb 100644
--- a/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
+++ b/board/anbernic/rgxx3_rk3566/rgxx3-rk3566.c
@@ -6,25 +6,37 @@
#include
#include
#include
+#include
#include
+#include
+#include
+#include
#include
+#include
+#include
+#include
#include
#include
#include
-#include
-#include
+#include
#define GPIO0_BASE 0xfdd6
+#define GPIO4_BASE 0xfe77
+#define GPIO_SWPORT_DR_L 0x
#define GPIO_SWPORT_DR_H 0x0004
+#define GPIO_SWPORT_DDR_L 0x0008
#define GPIO_SWPORT_DDR_H 0x000c
-#define GPIO_A5BIT(5)
-#define GPIO_A6BIT(6)
+#define GPIO_A0BIT(0)
+#define GPIO_C5BIT(5)
+#define GPIO_C6BIT(6)
+#define GPIO_C7BIT(7)
#define GPIO_WRITEMASK(bits) ((bits) << 16)
#define DTB_DIR"rockchip/"
struct rg3xx_model {
+ const u16 adc_value;
const char *board;
const char *board_name;
const char *fdtfile;
@@ -34,49 +46,74 @@ enum rgxx3_device_id {
RG353M,
RG353P,
RG353V,
- RG353VS,
RG503,
+ /* Devices with duplicate ADC value */
+ RG353PS,
+ RG353VS,
};
static const struct rg3xx_model rg3xx_model_details[] = {
[RG353M] = {
+ 517, /* Observed average from device */
"rk3566-anbernic-rg353m",
"RG353M",
- DTB_DIR "rk3566-anbernic-rg353m.dtb",
+ DTB_DIR "rk3566-anbernic-rg353p.dtb", /* Identical devices */
},
[RG353P] = {
+ 860, /* Documented value of 860 */
"rk3566-anbernic-rg353p",
"RG353P",
DTB_DIR "rk3566-anbernic-rg353p.dtb",
},
[RG353V] = {
+ 695, /* Observed average from device */
"rk3566-anbernic-rg353v",
"RG353V",
DTB_DIR "rk3566-anbernic-rg353v.dtb",
},
- [RG353VS] = {
- "rk3566-anbernic-rg353vs",
- "RG353VS",
- DTB_DIR "rk3566-anbernic-rg353vs.dtb",
- },
[RG503] = {
+ 1023, /* Observed average from device */
"rk3566-anbernic-rg503",
"RG503",
DTB_DIR "rk3566-anbernic-rg503.dtb",
},
+ /* Devices with duplicate ADC value */
+ [RG353PS] = {
+ 860, /* Gathered from second hand information */
+ "rk3566-anbernic-rg353ps",
+ "RG353PS",
+ DTB_DIR "rk3566-anbernic-rg353ps.dtb",
+ },
+ [RG353VS] = {
+ 695, /* Gathered from second hand information */
+ "rk3566
Re: [PATCH 2/2] arm: mach-k3: j721s2: clk-data.c: Add main_uart5 clock data
Hi Bhavya!
On May 11, 2023 thus sayeth Bhavya Kapoor:
> Add main_uart5 clocks in clk-data.c for J721S2. Now,
> main_uart5 clocks will be set up while booting the J721S2 SoC.
>
> Signed-off-by: Bhavya Kapoor
> ---
> arch/arm/mach-k3/j721s2/clk-data.c | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-k3/j721s2/clk-data.c
> b/arch/arm/mach-k3/j721s2/clk-data.c
> index ad6bd991b7..0c5c321c1e 100644
> --- a/arch/arm/mach-k3/j721s2/clk-data.c
> +++ b/arch/arm/mach-k3/j721s2/clk-data.c
> @@ -247,6 +247,7 @@ static const struct clk_data clk_list[] = {
> CLK_MUX("emmcsd1_lb_clksel_out0", emmcsd1_lb_clksel_out0_parents, 2,
> 0x1080b4, 16, 1, 0),
> CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2,
> 0x40f08010, 0, 1, 0),
> CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0",
> "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 4800),
> + CLK_DIV("usart_programmable_clock_divider_out5",
> "hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081d4, 0, 2, 0, 0),
Is this being used as an alternate console? idk if it would be
appropriate to use CLK_DIV_DEFFREQ macro here to setup the uart's
divider here.
~Bryan
[PATCH 1/1] efi_loader: print file path w/o boot device
Helloworld.efi should print the file path even if the boot device is
not set.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/helloworld.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/lib/efi_loader/helloworld.c b/lib/efi_loader/helloworld.c
index 6405f58ec3..bd72822c0b 100644
--- a/lib/efi_loader/helloworld.c
+++ b/lib/efi_loader/helloworld.c
@@ -216,6 +216,10 @@ efi_status_t EFIAPI efi_main(efi_handle_t handle,
(con_out, u"Cannot open device path to text
protocol\r\n");
goto out;
}
+ con_out->output_string(con_out, u"File path: ");
+ ret = print_device_path(loaded_image->file_path, device_path_to_text);
+ if (ret != EFI_SUCCESS)
+ goto out;
if (!loaded_image->device_handle) {
con_out->output_string
(con_out, u"Missing device handle\r\n");
@@ -234,10 +238,6 @@ efi_status_t EFIAPI efi_main(efi_handle_t handle,
ret = print_device_path(device_path, device_path_to_text);
if (ret != EFI_SUCCESS)
goto out;
- con_out->output_string(con_out, u"File path: ");
- ret = print_device_path(loaded_image->file_path, device_path_to_text);
- if (ret != EFI_SUCCESS)
- goto out;
out:
boottime->exit(handle, ret, 0, NULL);
--
2.39.2
[RFC PATCH v8 00/23] Modernize U-Boot shell
Hi.
During 2021 summer, Sean Anderson wrote a contribution to add a new shell, based
on LIL, to U-Boot [1, 2].
While one of the goals of this contribution was to address the fact actual
U-Boot shell, which is based on Busybox hush, is old there was a discussion
about adding a new shell versus updating the actual one [3, 4].
So, in this series, with Harald Seiler, we updated the actual U-Boot shell to
reflect what is currently in Busybox source code.
Basically, this contribution is about taking a snapshot of Busybox shell/hush.c
file (as it exists in commit 37460f5da) and adapt it to suit U-Boot needs.
This contribution was written to be as backward-compatible as possible to avoid
breaking the existing.
So, the 2021 hush flavor offers the same as the actual, that is to say:
1. Variable expansion.
2. Instruction lists (;, && and ||).
3. If, then and else.
4. Loops (for, while and until).
No new features offered by Busybox hush were implemented (e.g. functions).
It is possible to change the parser at runtime using the "cli" command:
=> cli print
old
=> cli set 2021
=> cli print
2021
=> cli set old
The default parser is the old one.
Note that to use both parser, you would need to set both CONFIG_HUSH_2021_PARSER
and CONFIG_HUSH_OLD_PARSER.
In terms of testing, new unit tests were added to ut to ensure the new behavior
is the same as the old one and it does not add regression.
Nonetheless, if old behavior was buggy and fixed upstream, the fix is then added
to U-Boot [5].
In sandbox, all of these tests pass smoothly:
=> printenv board
board=sandbox
=> ut hush
Running 20 hush tests
...
Failures: 0
=> parser set 2021
=> ut hush
Running 20 hush tests
...
Failures: 0
Thanks to the effort of Harald Seiler, I was successful booting a board:
=> printenv fdtfile
fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb
=> cli get
old
=> boot
...
root@lepotato:~#
root@lepotato:~# reboot
...
=> cli set 2021
=> cli get
2021
=> printenv fdtfile
fdtfile=amlogic/meson-gxl-s905x-libretech-cc.dtb
=> boot
...
root@lepotato:~#
I was able to have the CI passes but I had to not use CONFIG_HUSH_2021_PARSER
for the keymile board.
Indeed, the keymile board family is the only set of boards to call
get_local_var(), set_local_var() and unset_local_var().
Sadly, these functions are static in this contribution.
I could have change all of them to introduce code like this:
*_local_var(/*...*/)
{
if (gd->flags & GD_FLG_HUSH_OLD_PARSER)
return *_local_var_old(/*...*/);
if (gd->flags & GD_FLG_HUSH_2021_PARSER)
return *_local_var_2021(/*...*/);
}
But this would have mean renaming all old hush functions calls and I did not
want to change the old hush particularly to avoid breaking things.
Instead, I change the keymile board to use environment variable instead of local
ones.
I think this particularities can be addressed in future works.
I also had to enable CONFIG_LTO for kirkwoord sheevaplug and phytec bk4r1, so
they do not hit their limits.
For all these reasons, I marked this contribution as RFC to indeed collect your
opinions.
My goal is not to change suddenly actual shell to this one, we clearly need a
transition period to think about it.
I think it is better to see this contribution as a proof of concept which shows
it is possible to update the actual shell.
If you want to review it - your review will really be appreciated - here are
some information regarding the commits:
* commits marked as "test:" deal with unit tests.
* commit "cli: Add Busybox upstream hush.c file." copies Busybox shell/hush.c
into U-Boot tree, this explain why this commit contains around 12000 additions.
* commit "cli: Port Busybox 2021 hush to U-Boot." modifies previously added file
to permit us to use this as new shell.
The really good idea of #include'ing Busybox code into a wrapper file to define
some particular functions while minimizing modifications to upstream code comes
from Harald Seiler.
* commit "cmd: Add new parser command" adds a new command which permits
selecting parser at runtime.
I am not really satisfied with the fact it calls cli_init() and cli_loop() each
time the parser is set, so your reviews would be welcomed.
* Other commits focus on enabling features we need (e.g. if).
Changes since:
v2:
* Added a small fix to compile sandbox with NO_SDL=1.
* Added a command to change parser at runtime.
* Added 2021 parser function to all run_command*().
v3:
* Various bug fixes pointed by the CI.
* Added upstream busybox hush commits until 6th February 2022.
v4:
* Various cleaning.
* Modified python test to accept failure output when the test are designed to
fail.
* Bumped upstream busybox hush commits until 24h March 2022.
v5:
* Bumped upstream busybox hush commits until 30th January 2023.
* Fix how hush interprets '<' and '>', indeed we needed to escape them but I
removed this behavior as tests are handled by test command and not hush
itself. This permitted to have the ut fdt to
[RFC PATCH v8 01/23] test: Add framework to test hush behavior
Introduce a new subcommand to ut: ut hush.
For the moment, this command does nothing, future commits will add tests which
will be run on command call.
Note that CONFIG_HUSH_PARSER must be defined to compile this new subcommand.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
include/test/hush.h | 15 +++
include/test/suites.h | 1 +
test/Makefile | 3 +++
test/cmd_ut.c | 6 ++
test/hush/Makefile | 6 ++
test/hush/cmd_ut_hush.c | 20
6 files changed, 51 insertions(+)
create mode 100644 include/test/hush.h
create mode 100644 test/hush/Makefile
create mode 100644 test/hush/cmd_ut_hush.c
diff --git a/include/test/hush.h b/include/test/hush.h
new file mode 100644
index 00..cca66544a0
--- /dev/null
+++ b/include/test/hush.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
+ */
+
+#ifndef __TEST_HUSH_H__
+#define __TEST_HUSH_H__
+
+#include
+
+/* Declare a new environment test */
+#define HUSH_TEST(_name, _flags) UNIT_TEST(_name, _flags, hush_test)
+
+#endif /* __TEST_HUSH_H__ */
diff --git a/include/test/suites.h b/include/test/suites.h
index 7349ce5aa6..77dc7bf62d 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -41,6 +41,7 @@ int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char
*const argv[]);
int do_ut_exit(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_font(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_hush(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_loadm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
int do_ut_log(struct cmd_tbl *cmdtp, int flag, int argc, char * const argv[]);
diff --git a/test/Makefile b/test/Makefile
index 178773647a..d6ca3e221d 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -20,6 +20,9 @@ obj-$(CONFIG_FUZZ) += fuzz/
ifndef CONFIG_SANDBOX_VPL
obj-$(CONFIG_UNIT_TEST) += lib/
endif
+ifneq ($(CONFIG_HUSH_PARSER),)
+obj-$(CONFIG_$(SPL_)CMDLINE) += hush/
+endif
obj-$(CONFIG_$(SPL_)CMDLINE) += print_ut.o
obj-$(CONFIG_$(SPL_)CMDLINE) += str_ut.o
obj-$(CONFIG_UT_TIME) += time_ut.o
diff --git a/test/cmd_ut.c b/test/cmd_ut.c
index d440da833a..ba050e8aef 100644
--- a/test/cmd_ut.c
+++ b/test/cmd_ut.c
@@ -107,6 +107,9 @@ static struct cmd_tbl cmd_ut_sub[] = {
#ifdef CONFIG_CMD_ADDRMAP
U_BOOT_CMD_MKENT(addrmap, CONFIG_SYS_MAXARGS, 1, do_ut_addrmap, "", ""),
#endif
+#if CONFIG_IS_ENABLED(HUSH_PARSER)
+ U_BOOT_CMD_MKENT(hush, CONFIG_SYS_MAXARGS, 1, do_ut_hush, "", ""),
+#endif
#ifdef CONFIG_CMD_LOADM
U_BOOT_CMD_MKENT(loadm, CONFIG_SYS_MAXARGS, 1, do_ut_loadm, "", ""),
#endif
@@ -197,6 +200,9 @@ static char ut_help_text[] =
#ifdef CONFIG_CONSOLE_TRUETYPE
"\nut font - font command"
#endif
+#if CONFIG_IS_ENABLED(HUSH_PARSER)
+ "\nhush - Test hush behavior"
+#endif
#ifdef CONFIG_CMD_LOADM
"\nloadm - loadm command parameters and loading memory blob"
#endif
diff --git a/test/hush/Makefile b/test/hush/Makefile
new file mode 100644
index 00..dfa2a92615
--- /dev/null
+++ b/test/hush/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2021
+# Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
+
+obj-y += cmd_ut_hush.o
diff --git a/test/hush/cmd_ut_hush.c b/test/hush/cmd_ut_hush.c
new file mode 100644
index 00..48a1adbf28
--- /dev/null
+++ b/test/hush/cmd_ut_hush.c
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+int do_ut_hush(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
+{
+ struct unit_test *tests = UNIT_TEST_SUITE_START(hush_test);
+ const int n_ents = UNIT_TEST_SUITE_COUNT(hush_test);
+
+ return cmd_ut_category("hush", "hush_test_",
+ tests, n_ents, argc, argv);
+}
--
2.34.1
[RFC PATCH v8 02/23] test: hush: Test hush if/else
As asked in commit 9c6bf1715f6a ("test/py: hush_if_test: Add tests to cover
octal/hex values"), this commit translates test_hush_if_test.py to a C test.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
test/hush/Makefile | 1 +
test/hush/if.c | 316 +
2 files changed, 317 insertions(+)
create mode 100644 test/hush/if.c
diff --git a/test/hush/Makefile b/test/hush/Makefile
index dfa2a92615..a3c9ae5106 100644
--- a/test/hush/Makefile
+++ b/test/hush/Makefile
@@ -4,3 +4,4 @@
# Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
obj-y += cmd_ut_hush.o
+obj-y += if.o
diff --git a/test/hush/if.c b/test/hush/if.c
new file mode 100644
index 00..b7200e32ec
--- /dev/null
+++ b/test/hush/if.c
@@ -0,0 +1,316 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/*
+ * All tests will execute the following:
+ * if condition_to_test; then
+ * true
+ * else
+ * false
+ * fi
+ * If condition is true, command returns 1, 0 otherwise.
+ */
+const char *if_format = "if %s; then true; else false; fi";
+
+static int hush_test_if_base(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "true");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "false");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_base, 0);
+
+static int hush_test_if_basic_operators(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test aaa = aaa");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa = bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa != bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa != aaa");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa < bbb");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test bbb < aaa");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test bbb > aaa");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test aaa > bbb");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -eq 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -eq 456");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ne 456");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ne 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -lt 456");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -lt 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -lt 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -le 456");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -le 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -le 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -gt 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -gt 123");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -gt 456");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 456 -ge 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ge 123");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 123 -ge 456");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_if_basic_operators, 0);
+
+static int hush_test_if_octal(struct unit_test_state *uts)
+{
+ char if_formatted[128];
+
+ sprintf(if_formatted, if_format, "test 010 -eq 010");
+ ut_assertok(run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 010 -eq 011");
+ ut_asserteq(1, run_command(if_formatted, 0));
+
+ sprintf(if_formatted, if_format, "test 010 -ne 011");
+ ut_assertok(run_command(if_fo
[RFC PATCH v8 03/23] test/py: hush_if_test: Remove the test file
5804ebfeb1ce ("test: hush: Test hush if/else") translated this test to a C test,
so this python file is no more needed.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
test/py/tests/test_hush_if_test.py | 197 -
1 file changed, 197 deletions(-)
delete mode 100644 test/py/tests/test_hush_if_test.py
diff --git a/test/py/tests/test_hush_if_test.py
b/test/py/tests/test_hush_if_test.py
deleted file mode 100644
index 3b4b6fcaf4..00
--- a/test/py/tests/test_hush_if_test.py
+++ /dev/null
@@ -1,197 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0
-# Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
-
-# Test operation of the "if" shell command.
-
-import os
-import os.path
-import pytest
-
-# TODO: These tests should be converted to a C test.
-# For more information please take a look at the thread
-# https://lists.denx.de/pipermail/u-boot/2019-October/388732.html
-
-pytestmark = pytest.mark.buildconfigspec('hush_parser')
-
-# The list of "if test" conditions to test.
-subtests = (
-# Base if functionality.
-
-('true', True),
-('false', False),
-
-# Basic operators.
-
-('test aaa = aaa', True),
-('test aaa = bbb', False),
-
-('test aaa != bbb', True),
-('test aaa != aaa', False),
-
-('test aaa < bbb', True),
-('test bbb < aaa', False),
-
-('test bbb > aaa', True),
-('test aaa > bbb', False),
-
-('test 123 -eq 123', True),
-('test 123 -eq 456', False),
-
-('test 123 -ne 456', True),
-('test 123 -ne 123', False),
-
-('test 123 -lt 456', True),
-('test 123 -lt 123', False),
-('test 456 -lt 123', False),
-
-('test 123 -le 456', True),
-('test 123 -le 123', True),
-('test 456 -le 123', False),
-
-('test 456 -gt 123', True),
-('test 123 -gt 123', False),
-('test 123 -gt 456', False),
-
-('test 456 -ge 123', True),
-('test 123 -ge 123', True),
-('test 123 -ge 456', False),
-
-# Octal tests
-
-('test 010 -eq 010', True),
-('test 010 -eq 011', False),
-
-('test 010 -ne 011', True),
-('test 010 -ne 010', False),
-
-# Hexadecimal tests
-
-('test 0x200 -gt 0x201', False),
-('test 0x200 -gt 0x200', False),
-('test 0x200 -gt 0x1ff', True),
-
-# Mixed tests
-
-('test 010 -eq 10', False),
-('test 010 -ne 10', True),
-('test 0xa -eq 10', True),
-('test 0xa -eq 012', True),
-
-('test 200 -gt 0x1ff', False),
-('test 0x200 -gt 1ff', True),
-('test 0x200 -lt 1ff', False),
-('test 0x200 -eq 200', False),
-('test 0x200 -ne 200', True),
-
-('test -z ""', True),
-('test -z "aaa"', False),
-
-('test -n "aaa"', True),
-('test -n ""', False),
-
-# Inversion of simple tests.
-
-('test ! aaa = aaa', False),
-('test ! aaa = bbb', True),
-('test ! ! aaa = aaa', True),
-('test ! ! aaa = bbb', False),
-
-# Binary operators.
-
-('test aaa != aaa -o bbb != bbb', False),
-('test aaa != aaa -o bbb = bbb', True),
-('test aaa = aaa -o bbb != bbb', True),
-('test aaa = aaa -o bbb = bbb', True),
-
-('test aaa != aaa -a bbb != bbb', False),
-('test aaa != aaa -a bbb = bbb', False),
-('test aaa = aaa -a bbb != bbb', False),
-('test aaa = aaa -a bbb = bbb', True),
-
-# Inversion within binary operators.
-
-('test ! aaa != aaa -o ! bbb != bbb', True),
-('test ! aaa != aaa -o ! bbb = bbb', True),
-('test ! aaa = aaa -o ! bbb != bbb', True),
-('test ! aaa = aaa -o ! bbb = bbb', False),
-
-('test ! ! aaa != aaa -o ! ! bbb != bbb', False),
-('test ! ! aaa != aaa -o ! ! bbb = bbb', True),
-('test ! ! aaa = aaa -o ! ! bbb != bbb', True),
-('test ! ! aaa = aaa -o ! ! bbb = bbb', True),
-)
-
-def exec_hush_if(u_boot_console, expr, result):
-"""Execute a shell "if" command, and validate its result."""
-
-config = u_boot_console.config.buildconfig
-maxargs = int(config.get('config_sys_maxargs', '0'))
-args = len(expr.split(' ')) - 1
-if args > maxargs:
-u_boot_console.log.warning('CONFIG_SYS_MAXARGS too low; need ' +
-str(args))
-pytest.skip()
-
-cmd = 'if ' + expr + '; then echo true; else echo false; fi'
-response = u_boot_console.run_command(cmd)
-assert response.strip() == str(result).lower()
-
-@pytest.mark.buildconfigspec('cmd_echo')
-@pytest.mark.parametrize('expr,result', subtests)
-def test_hush_if_test(u_boot_console, expr, result):
-"""Test a single "if test" condition."""
-
-exec_hush_if(u_boot_console, expr, result)
-
-def test_hush_z(u_boot_console):
-"""Test the -z operator"""
-u_boot_console.run_command('setenv ut_var_nonexistent')
-u_boot_console.run_command('setenv ut_var_exists 1')
-exec_hush_if(u_boot_console, 'test -z "$ut_var_nonexistent"', True)
-exec_hush_if(u_boot_console, 'test -z "$ut_var_exists"', False)
-u_boot_console.run_command('se
[RFC PATCH v8 04/23] test: hush: Test hush variable expansion
Verifies shell variables are replaced by their values.
Reviewed-by: Simon Glass
Signed-off-by: Francis Laniel
---
test/hush/Makefile | 1 +
test/hush/dollar.c | 167 +++
test/py/tests/test_ut.py | 8 +-
3 files changed, 175 insertions(+), 1 deletion(-)
create mode 100644 test/hush/dollar.c
diff --git a/test/hush/Makefile b/test/hush/Makefile
index a3c9ae5106..feb4f71956 100644
--- a/test/hush/Makefile
+++ b/test/hush/Makefile
@@ -5,3 +5,4 @@
obj-y += cmd_ut_hush.o
obj-y += if.o
+obj-y += dollar.o
diff --git a/test/hush/dollar.c b/test/hush/dollar.c
new file mode 100644
index 00..defb2c3fd0
--- /dev/null
+++ b/test/hush/dollar.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static int hush_test_simple_dollar(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline_empty();
+ ut_assert_console_end();
+
+ ut_assertok(run_command("echo ${dollar_foo}", 0));
+ ut_assert_nextline_empty();
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo=bar", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("echo ${dollar_foo}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo=\\$bar", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("$bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo='$bar'", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("$bar");
+ ut_assert_console_end();
+
+ ut_asserteq(1, run_command("dollar_foo=bar quux", 0));
+ /* Next line contains error message */
+ ut_assert_skipline();
+ ut_assert_console_end();
+
+ ut_asserteq(1, run_command("dollar_foo='bar quux", 0));
+ /* Next line contains error message */
+ ut_assert_skipline();
+ ut_assert_console_end();
+
+ ut_asserteq(1, run_command("dollar_foo=bar quux\"", 0));
+ /* Two next lines contain error message */
+ ut_assert_skipline();
+ ut_assert_skipline();
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo='bar \"quux'", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ /*
+* This one is buggy.
+* ut_assert_nextline("bar \"quux");
+* ut_assert_console_end();
+*
+* So, let's reset output:
+*/
+ console_record_reset_enable();
+
+ ut_asserteq(1, run_command("dollar_foo=\"bar 'quux\"", 0));
+ /* Next line contains error message */
+ ut_assert_skipline();
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_foo='bar quux'", 0));
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("bar quux");
+ ut_assert_console_end();
+
+ puts("Beware: this test set local variable dollar_foo and it cannot be
unset!");
+
+ return 0;
+}
+HUSH_TEST(hush_test_simple_dollar, 0);
+
+static int hush_test_env_dollar(struct unit_test_state *uts)
+{
+ env_set("env_foo", "bar");
+ console_record_reset_enable();
+
+ ut_assertok(run_command("echo $env_foo", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("echo ${env_foo}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ /* Environment variables have priority over local variable */
+ ut_assertok(run_command("env_foo=quux", 0));
+ ut_assertok(run_command("echo ${env_foo}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ /* Clean up setting the variable */
+ env_set("env_foo", NULL);
+
+ puts("Beware: this test set local variable env_foo and it cannot be
unset!");
+
+ return 0;
+}
+HUSH_TEST(hush_test_env_dollar, 0);
+
+static int hush_test_command_dollar(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+
+ ut_assertok(run_command("dollar_bar=\"echo bar\"", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("${dollar_bar}", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_bar=\"echo\nbar\"", 0));
+
+ ut_assertok(run_command("$dollar_bar", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ ut_assertok(run_command("dollar_bar='echo bar\n'", 0));
+
+ ut_assertok(run_command("$dol
[RFC PATCH v8 05/23] test: hush: Test hush commands list
Verifies behavior of commands separated by ';', '&&' and '||'.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
test/hush/Makefile | 1 +
test/hush/list.c | 79 ++
2 files changed, 80 insertions(+)
create mode 100644 test/hush/list.c
diff --git a/test/hush/Makefile b/test/hush/Makefile
index feb4f71956..ff4fe7700b 100644
--- a/test/hush/Makefile
+++ b/test/hush/Makefile
@@ -6,3 +6,4 @@
obj-y += cmd_ut_hush.o
obj-y += if.o
obj-y += dollar.o
+obj-y += list.o
diff --git a/test/hush/list.c b/test/hush/list.c
new file mode 100644
index 00..052cf2783c
--- /dev/null
+++ b/test/hush/list.c
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static int hush_test_semicolon(struct unit_test_state *uts)
+{
+ /* A; B = B truth table. */
+ ut_asserteq(1, run_command("false; false", 0));
+ ut_assertok(run_command("false; true", 0));
+ ut_assertok(run_command("true; true", 0));
+ ut_asserteq(1, run_command("true; false", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_semicolon, 0);
+
+static int hush_test_and(struct unit_test_state *uts)
+{
+ /* A && B truth table. */
+ ut_asserteq(1, run_command("false && false", 0));
+ ut_asserteq(1, run_command("false && true", 0));
+ ut_assertok(run_command("true && true", 0));
+ ut_asserteq(1, run_command("true && false", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_and, 0);
+
+static int hush_test_or(struct unit_test_state *uts)
+{
+ /* A || B truth table. */
+ ut_asserteq(1, run_command("false || false", 0));
+ ut_assertok(run_command("false || true", 0));
+ ut_assertok(run_command("true || true", 0));
+ ut_assertok(run_command("true || false", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_or, 0);
+
+static int hush_test_and_or(struct unit_test_state *uts)
+{
+ /* A && B || C truth table. */
+ ut_asserteq(1, run_command("false && false || false", 0));
+ ut_asserteq(1, run_command("false && false || true", 0));
+ ut_asserteq(1, run_command("false && true || true", 0));
+ ut_asserteq(1, run_command("false && true || false", 0));
+ ut_assertok(run_command("true && true || false", 0));
+ ut_asserteq(1, run_command("true && false || false", 0));
+ ut_assertok(run_command("true && false || true", 0));
+ ut_assertok(run_command("true && true || true", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_and_or, 0);
+
+static int hush_test_or_and(struct unit_test_state *uts)
+{
+ /* A || B && C truth table. */
+ ut_asserteq(1, run_command("false || false && false", 0));
+ ut_asserteq(1, run_command("false || false && true", 0));
+ ut_assertok(run_command("false || true && true", 0));
+ ut_asserteq(1, run_command("false || true && false", 0));
+ ut_assertok(run_command("true || true && false", 0));
+ ut_assertok(run_command("true || false && false", 0));
+ ut_assertok(run_command("true || false && true", 0));
+ ut_assertok(run_command("true || true && true", 0));
+
+ return 0;
+}
+HUSH_TEST(hush_test_or_and, 0);
--
2.34.1
[RFC PATCH v8 06/23] test: hush: Test hush loops
The added tests verifies correct behavior of for, while and until loops.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
test/hush/Makefile | 1 +
test/hush/loop.c | 65 ++
2 files changed, 66 insertions(+)
create mode 100644 test/hush/loop.c
diff --git a/test/hush/Makefile b/test/hush/Makefile
index ff4fe7700b..a2d98815e5 100644
--- a/test/hush/Makefile
+++ b/test/hush/Makefile
@@ -7,3 +7,4 @@ obj-y += cmd_ut_hush.o
obj-y += if.o
obj-y += dollar.o
obj-y += list.o
+obj-y += loop.o
diff --git a/test/hush/loop.c b/test/hush/loop.c
new file mode 100644
index 00..ca777e38fe
--- /dev/null
+++ b/test/hush/loop.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * (C) Copyright 2021
+ * Francis Laniel, Amarula Solutions, francis.lan...@amarulasolutions.com
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static int hush_test_for(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+
+ ut_assertok(run_command("for loop_i in foo bar quux quux; do echo
$loop_i; done", 0));
+ ut_assert_nextline("foo");
+ ut_assert_nextline("bar");
+ ut_assert_nextline("quux");
+ ut_assert_nextline("quux");
+ ut_assert_console_end();
+
+ puts("Beware: this test set local variable loop_i and it cannot be
unset!");
+
+ return 0;
+}
+HUSH_TEST(hush_test_for, 0);
+
+static int hush_test_while(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+
+ /* Exit status is that of test, so 1 since test is false to quit the
loop. */
+ ut_asserteq(1, run_command("while test -z \"$loop_foo\"; do echo bar;
loop_foo=quux; done", 0));
+ ut_assert_nextline("bar");
+ ut_assert_console_end();
+
+ puts("Beware: this test set local variable loop_foo and it cannot be
unset!");
+
+ return 0;
+}
+HUSH_TEST(hush_test_while, 0);
+
+static int hush_test_until(struct unit_test_state *uts)
+{
+ console_record_reset_enable();
+ env_set("loop_bar", "bar");
+
+ /*
+* WARNING We have to use environment variable because it is not
possible
+* resetting local variable.
+*/
+ ut_assertok(run_command("until test -z \"$loop_bar\"; do echo quux;
setenv loop_bar; done", 0));
+ ut_assert_nextline("quux");
+ ut_assert_console_end();
+
+ /*
+* Loop normally resets foo environment variable, but we reset it here
in
+* case the test failed.
+*/
+ env_set("loop_bar", NULL);
+ return 0;
+}
+HUSH_TEST(hush_test_until, 0);
--
2.34.1
[RFC PATCH v8 13/23] cli: hush_2021: Enable variables expansion for hush 2021
Enables variables expansion for hush 2021, both for local and environment
variables.
So the following commands:
foo=bar
echo $foo
setenv bar foo
echo $bar
leads to "bar" and "foo" being printed on console output.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
common/cli_hush_2021.c | 17 +++
common/cli_hush_upstream.c | 91 +++---
2 files changed, 103 insertions(+), 5 deletions(-)
diff --git a/common/cli_hush_2021.c b/common/cli_hush_2021.c
index 653ea52929..7dd30ea0ef 100644
--- a/common/cli_hush_2021.c
+++ b/common/cli_hush_2021.c
@@ -207,6 +207,23 @@ static const char* endofname(const char *name)
return name;
}
+/**
+ * list_size() - returns the number of elements in char ** before NULL.
+ *
+ * Argument must contain NULL to signalize its end.
+ *
+ * @list The list to count the number of element.
+ * @return The number of element in list.
+ */
+static size_t list_size(char **list)
+{
+ size_t size;
+
+ for (size = 0; list[size] != NULL; size++);
+
+ return size;
+}
+
struct in_str;
static int u_boot_cli_readline(struct in_str *i);
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index 84227a248e..b806c5c653 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -3486,7 +3486,6 @@ static int o_get_last_ptr(o_string *o, int n)
return ((int)(uintptr_t)list[n-1]) + string_start;
}
-#ifndef __U_BOOT__
/*
* Globbing routines.
*
@@ -3741,8 +3740,10 @@ static int glob_needed(const char *s)
*/
static int perform_glob(o_string *o, int n)
{
+#ifndef __U_BOOT__
glob_t globdata;
int gr;
+#endif /* __U_BOOT__ */
char *pattern;
debug_printf_glob("start perform_glob: n:%d o->data:%p\n", n, o->data);
@@ -3751,13 +3752,16 @@ static int perform_glob(o_string *o, int n)
pattern = o->data + o_get_last_ptr(o, n);
debug_printf_glob("glob pattern '%s'\n", pattern);
if (!glob_needed(pattern)) {
+#ifndef __U_BOOT__
literal:
+#endif /* __U_BOOT__ */
/* unbackslash last string in o in place, fix length */
o->length = unbackslash(pattern) - o->data;
debug_printf_glob("glob pattern '%s' is literal\n", pattern);
return o_save_ptr_helper(o, n);
}
+#ifndef __U_BOOT__
memset(&globdata, 0, sizeof(globdata));
/* Can't use GLOB_NOCHECK: it does not unescape the string.
* If we glob "*.\*" and don't find anything, we need
@@ -3793,16 +3797,22 @@ static int perform_glob(o_string *o, int n)
if (DEBUG_GLOB)
debug_print_list("perform_glob returning", o, n);
return n;
+#else /* __U_BOOT__ */
+ /*
+* NOTE We only use perform glob to call unbackslash to remove backslash
+* from string once expanded.
+* So, it seems OK to return this if no previous return was done.
+*/
+ return o_save_ptr_helper(o, n);
+#endif /* __U_BOOT__ */
}
-#endif /* !__U_BOOT__ */
#endif /* !HUSH_BRACE_EXPANSION */
/* If o->o_expflags & EXP_FLAG_GLOB, glob the string so far remembered.
* Otherwise, just finish current list[] and start new */
static int o_save_ptr(o_string *o, int n)
{
-#ifndef __U_BOOT__
if (o->o_expflags & EXP_FLAG_GLOB) {
/* If o->has_empty_slot, list[n] was already globbed
* (if it was requested back then when it was filled)
@@ -3810,7 +3820,6 @@ static int o_save_ptr(o_string *o, int n)
if (!o->has_empty_slot)
return perform_glob(o, n); /* o_save_ptr_helper is
inside */
}
-#endif /* !__U_BOOT__ */
return o_save_ptr_helper(o, n);
}
@@ -5456,7 +5465,20 @@ static int parse_dollar(o_string *as_string,
nommu_addchr(as_string, ch);
if (ch == '}')
break;
+#ifndef __U_BOOT__
if (!isalnum(ch) && ch != '_') {
+#else /* __U_BOOT__ */
+ /*
+* In several places in U-Boot, we use variable like
+* foo# (e.g. serial#), particularly in env.
+* So, we need to authorize # to appear inside
+* variable name and then expand this variable.
+* NOTE Having # in variable name is not permitted in
+* upstream hush but expansion will be done (even though
+* the result will be empty).
+*/
+ if (!isalnum(ch) && ch != '_' && ch != '#') {
+#endif /* __U_BOOT__ */
unsigned end_ch;
#ifndef __U_BOOT__
unsigned char last_ch;
@@ -7031,7 +7053,20 @@ static NOINLINE int expand_one_var(o_string *output, int
n,
}
#endif /* !__U_BOOT__ */
default:
+#ifndef __U_BOOT__
[RFC PATCH v8 14/23] cli: hush_2021: Add functions to be called from run_command()
run_command() is called internally by the command run and it can also be called
directly from U-Boot code, e.g. to do unit tests.
This commit adds this path to go to hush 2021.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
common/cli_hush_upstream.c | 66 --
1 file changed, 63 insertions(+), 3 deletions(-)
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index b806c5c653..b11445c3ac 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -1012,6 +1012,7 @@ struct globals {
#ifdef __U_BOOT__
int flag_repeat;
int do_repeat;
+ int run_command_flags;
#endif /* __U_BOOT__ */
char *ifs_whitespace; /* = G.ifs or malloced */
#ifndef __U_BOOT__
@@ -3005,7 +3006,24 @@ static int i_getch(struct in_str *i)
if (i->p && *i->p != '\0') {
ch = (unsigned char)*i->p++;
goto out;
+#ifndef __U_BOOT__
}
+#else /* __U_BOOT__ */
+ /*
+* There are two ways for command to be called:
+* 1. The first one is when they are typed by the user.
+* 2. The second one is through run_command() (NOTE command run
+* internally calls run_command()).
+*
+* In the second case, we do not get input from the user, so once we
+* get a '\0', it means we need to stop.
+* NOTE G.run_command_flags is only set on run_command call stack, so
+* we use this to know if we come from user input or run_command().
+*/
+ } else if (i->p && *i->p == '\0' && G.run_command_flags){
+ return EOF;
+ }
+#endif /* __U_BOOT__ */
#endif
#ifndef __U_BOOT__
/* peek_buf[] is an int array, not char. Can contain EOF. */
@@ -3164,7 +3182,6 @@ static void setup_file_in_str(struct in_str *i)
#endif /* !__U_BOOT__ */
}
-#ifndef __U_BOOT__
static void setup_string_in_str(struct in_str *i, const char *s)
{
memset(i, 0, sizeof(*i));
@@ -3172,7 +3189,6 @@ static void setup_string_in_str(struct in_str *i, const
char *s)
i->p = s;
}
-#endif /* !__U_BOOT__ */
/*
* o_string support
@@ -7911,7 +7927,11 @@ static int run_and_free_list(struct pipe *pi);
* NUL: parse all, execute, return
* ';': parse till ';' or newline, execute, repeat till EOF
*/
+#ifndef __U_BOOT__
static void parse_and_run_stream(struct in_str *inp, int end_trigger)
+#else /* __U_BOOT__ */
+static int parse_and_run_stream(struct in_str *inp, int end_trigger)
+#endif /* __U_BOOT__ */
{
/* Why we need empty flag?
* An obscure corner case "false; ``; echo $?":
@@ -7920,7 +7940,11 @@ static void parse_and_run_stream(struct in_str *inp, int
end_trigger)
* this breaks "false; echo `echo $?`" case.
*/
bool empty = 1;
+#ifndef __U_BOOT__
while (1) {
+#else /* __U_BOOT__ */
+ do {
+#endif /* __U_BOOT__ */
struct pipe *pipe_list;
#if ENABLE_HUSH_INTERACTIVE
@@ -7967,21 +7991,57 @@ static void parse_and_run_stream(struct in_str *inp,
int end_trigger)
empty = 0;
if (G_flag_return_in_progress == 1)
break;
+#ifndef __U_BOOT__
}
+#else /* __U_BOOT__ */
+ /*
+* This do/while is needed by run_command to avoid looping on a command
+* with syntax error.
+*/
+ } while (!(G.run_command_flags & FLAG_EXIT_FROM_LOOP));
+
+ return G.last_exitcode;
+#endif /* __U_BOOT__ */
}
#ifndef __U_BOOT__
static void parse_and_run_string(const char *s)
+#else /* __U_BOOT__ */
+static int parse_and_run_string(const char *s)
+#endif /* __U_BOOT__ */
{
struct in_str input;
//IF_HUSH_LINENO_VAR(unsigned sv = G.parse_lineno;)
setup_string_in_str(&input, s);
+#ifndef __U_BOOT__
parse_and_run_stream(&input, '\0');
+#else /* __U_BOOT__ */
+ return parse_and_run_stream(&input, '\0');
+#endif /* __U_BOOT__ */
//IF_HUSH_LINENO_VAR(G.parse_lineno = sv;)
}
-#endif /* !__U_BOOT__ */
+#ifdef __U_BOOT__
+int parse_string_outer(const char *cmd, int flags)
+{
+ int ret;
+ int old_flags;
+
+ /*
+* Keep old values of run_command to be able to restore them once
+* command was executed.
+*/
+ old_flags = G.run_command_flags;
+ G.run_command_flags = flags;
+
+ ret = parse_and_run_string(cmd);
+
+ G.run_command_flags = old_flags;
+
+ return ret;
+}
+#endif /* __U_BOOT__ */
#ifndef __U_BOOT__
static void parse_and_run_file(HFILE *fp)
#else /* __U_BOOT__ */
--
2.34.1
[RFC PATCH v8 08/23] cli: Port Busybox 2021 hush to U-Boot
Adds new file cli_hush_2021.c, it is a copy of Busybox hush file as it was of
time to commit 37460f5da.
This commit modifies Busybox hush to not compile some part specific to Busybox
and adds some code needed by U-Boot.
The modifications consists mainly on adding code #if(n)def guards.
For the moment, this refurbished flavor of hush only permits running command
without any keywords (i.e., if and for are not recognized) or variable expansion
(i.e., echo $foo prints foo and not value stored in variable foo).
A new file was also added to define some functions specific to U-Boot.
Signed-off-by: Francis Laniel
Signed-off-by: Harald Seiler
---
common/cli_hush_2021.c | 274
common/cli_hush_upstream.c | 501 -
2 files changed, 774 insertions(+), 1 deletion(-)
create mode 100644 common/cli_hush_2021.c
diff --git a/common/cli_hush_2021.c b/common/cli_hush_2021.c
new file mode 100644
index 00..6d109933b8
--- /dev/null
+++ b/common/cli_hush_2021.c
@@ -0,0 +1,274 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * This file defines the compilation unit for the new hush shell version. The
+ * actual implementation from upstream BusyBox can be found in
+ * `cli_hush_2021_upstream.c` which is included at the end of this file.
+ *
+ * This "wrapper" technique is used to keep the changes to the upstream version
+ * as minmal as possible. Instead, all defines and redefines necessary are
done
+ * here, outside the upstream sources. This will hopefully make upgrades to
+ * newer revisions much easier.
+ *
+ * Copyright (c) 2021, Harald Seiler, DENX Software Engineering, h...@denx.de
+ */
+
+#include /* readline */
+#include
+#include /* malloc, free, realloc*/
+#include /* isalpha, isdigit */
+#include
+#include
+#include
+#include
+#include /* find_cmd */
+#include
+
+/*
+ * BusyBox Version: UPDATE THIS WHEN PULLING NEW UPSTREAM REVISION!
+ */
+#define BB_VER "1.34.0.git37460f5daff9"
+
+/*
+ * Define hush features by the names used upstream.
+ */
+#define ENABLE_HUSH_INTERACTIVE1
+#define ENABLE_FEATURE_EDITING 1
+/* No MMU in U-Boot */
+#define BB_MMU 0
+#define USE_FOR_NOMMU(...) __VA_ARGS__
+#define USE_FOR_MMU(...)
+
+/*
+ * Size-saving "small" ints (arch-dependent)
+ */
+#if CONFIG_IS_ENABLED(X86) || CONFIG_IS_ENABLED(X86_64) ||
CONFIG_IS_ENABLED(MIPS)
+/* add other arches which benefit from this... */
+typedef signed char smallint;
+typedef unsigned char smalluint;
+#else
+/* for arches where byte accesses generate larger code: */
+typedef int smallint;
+typedef unsigned smalluint;
+#endif
+
+/*
+ * Alignment defines used by BusyBox.
+ */
+#define ALIGN1 __attribute__((aligned(1)))
+#define ALIGN2 __attribute__((aligned(2)))
+#define ALIGN4 __attribute__((aligned(4)))
+#define ALIGN8 __attribute__((aligned(8)))
+#define ALIGN_PTR __attribute__((aligned(sizeof(void*
+
+/*
+ * Miscellaneous compiler/platform defines.
+ */
+#define FAST_FUNC /* not used in U-Boot */
+#define UNUSED_PARAM __always_unused
+#define ALWAYS_INLINE __always_inline
+#define NOINLINE noinline
+
+/*
+ * Defines to provide equivalents to what libc/BusyBox defines.
+ */
+#define EOF(-1)
+#define EXIT_SUCCESS 0
+#define EXIT_FAILURE 1
+
+/*
+ * Stubs to provide libc/BusyBox functions based on U-Boot equivalents where it
+ * makes sense.
+ */
+#define utoa simple_itoa
+
+static void __noreturn xfunc_die(void)
+{
+ panic("HUSH died!");
+}
+
+#define bb_error_msg_and_die(format, ...) do { \
+panic("HUSH: " format, __VA_ARGS__); \
+} while (0);
+
+#define bb_simple_error_msg_and_die(msg) do { \
+panic_str("HUSH: " msg); \
+} while (0);
+
+/* fdprintf() is used for debug output. */
+static int __maybe_unused fdprintf(int fd, const char *format, ...)
+{
+ va_list args;
+ uint i;
+
+ assert(fd == 2);
+
+ va_start(args, format);
+ i = vprintf(format, args);
+ va_end(args);
+
+ return i;
+}
+
+static void bb_verror_msg(const char *s, va_list p, const char* strerr)
+{
+ /* TODO: what to do with strerr arg? */
+ vprintf(s, p);
+}
+
+static void bb_error_msg(const char *s, ...)
+{
+ va_list p;
+
+ va_start(p, s);
+ bb_verror_msg(s, p, NULL);
+ va_end(p);
+}
+
+static void *xmalloc(size_t size)
+{
+ void *p = NULL;
+ if (!(p = malloc(size)))
+ panic("out of memory");
+ return p;
+}
+
+static void *xzalloc(size_t size)
+{
+ void *p = xmalloc(size);
+ memset(p, 0, size);
+ return p;
+}
+
+static void *xrealloc(void *ptr, size_t size)
+{
+ void *p = NULL;
+ if (!(p = realloc(ptr, size)))
+ panic("out of memory");
+ return p;
+}
+
+#define xstrdupstrdup
+#define xs
[RFC PATCH v8 15/23] cli: add hush 2021 as parser for run_command*()
Enables using, in code, hush 2021 as parser for run_command function family.
It also enables the command run to be used by CLI user of hush 2021.
Reviewed-by: Simon Glass
Signed-off-by: Francis Laniel
---
common/cli.c | 63 --
common/cli_hush_upstream.c | 2 +-
2 files changed, 48 insertions(+), 17 deletions(-)
diff --git a/common/cli.c b/common/cli.c
index e3e2bc7fe1..899007da9d 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -43,14 +43,31 @@ int run_command(const char *cmd, int flag)
return 1;
return 0;
-#elif CONFIG_IS_ENABLED(HUSH_OLD_PARSER)
- int hush_flags = FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP;
-
- if (flag & CMD_FLAG_ENV)
- hush_flags |= FLAG_CONT_ON_NEWLINE;
- return parse_string_outer(cmd, hush_flags);
-#else /* HUSH_2021_PARSER */
- /* Not yet implemented. */
+#else
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ int hush_flags = FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP;
+
+ if (flag & CMD_FLAG_ENV)
+ hush_flags |= FLAG_CONT_ON_NEWLINE;
+ return parse_string_outer(cmd, hush_flags);
+ } else if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* Possible values for flags are the following:
+* FLAG_EXIT_FROM_LOOP: This flags ensures we exit from loop in
+* parse_and_run_stream() after first iteration while normal
+* behavior, * i.e. when called from cli_loop(), is to loop
+* infinitely.
+* FLAG_PARSE_SEMICOLON: Hush 2021 parses ';' and does not stop
+* first time it sees one. So, I think we do not need this flag.
+* FLAG_REPARSING: For the moment, I do not understand the goal
+* of this flag.
+* FLAG_CONT_ON_NEWLINE: This flag seems to be used to continue
+* parsing even when reading '\n' when coming from
+* run_command(). In this case, Hush 2021 reads until it finds
+* '\0'. So, I think we do not need this flag.
+*/
+ return parse_string_outer_2021(cmd, FLAG_EXIT_FROM_LOOP);
+ }
return 1;
#endif
}
@@ -67,12 +84,25 @@ int run_command_repeatable(const char *cmd, int flag)
#ifndef CONFIG_HUSH_PARSER
return cli_simple_run_command(cmd, flag);
#else
+ int ret;
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ret = parse_string_outer(cmd,
+FLAG_PARSE_SEMICOLON
+| FLAG_EXIT_FROM_LOOP);
+ } else if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ ret = parse_string_outer_2021(cmd,
+ FLAG_PARSE_SEMICOLON
+ | FLAG_EXIT_FROM_LOOP);
+ } else {
+ ret = 1;
+ }
+
/*
* parse_string_outer() returns 1 for failure, so clean up
* its result.
*/
- if (parse_string_outer(cmd,
- FLAG_PARSE_SEMICOLON | FLAG_EXIT_FROM_LOOP))
+ if (ret)
return -1;
return 0;
@@ -111,12 +141,13 @@ int run_command_list(const char *cmd, int len, int flag)
buff[len] = '\0';
}
#ifdef CONFIG_HUSH_PARSER
-#if CONFIG_IS_ENABLED(HUSH_OLD_PARSER)
- rcode = parse_string_outer(buff, FLAG_PARSE_SEMICOLON);
-#else /* HUSH_2021_PARSER */
- /* Not yet implemented. */
- rcode = 1;
-#endif
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ rcode = parse_string_outer(buff, FLAG_PARSE_SEMICOLON);
+ } else if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ rcode = parse_string_outer_2021(buff, FLAG_PARSE_SEMICOLON);
+ } else {
+ rcode = 1;
+ }
#else
/*
* This function will overwrite any \n it sees with a \0, which
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index b11445c3ac..dbf77ad503 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -8023,7 +8023,7 @@ static int parse_and_run_string(const char *s)
}
#ifdef __U_BOOT__
-int parse_string_outer(const char *cmd, int flags)
+int parse_string_outer_2021(const char *cmd, int flags)
{
int ret;
int old_flags;
--
2.34.1
[RFC PATCH v8 20/23] cli: hush_2021: Enable loops
Enables the use of for, while and until loops for command line as
well as with run_command().
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
common/cli_hush_2021.c | 1 +
common/cli_hush_upstream.c | 15 ++-
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git a/common/cli_hush_2021.c b/common/cli_hush_2021.c
index aba5dcbbcd..0a207d147b 100644
--- a/common/cli_hush_2021.c
+++ b/common/cli_hush_2021.c
@@ -34,6 +34,7 @@
#define ENABLE_HUSH_INTERACTIVE1
#define ENABLE_FEATURE_EDITING 1
#define ENABLE_HUSH_IF 1
+#define ENABLE_HUSH_LOOPS 1
/* No MMU in U-Boot */
#define BB_MMU 0
#define USE_FOR_NOMMU(...) __VA_ARGS__
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index 9b65dcbde1..23392939e1 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -10349,7 +10349,7 @@ static int run_list(struct pipe *pi)
#ifndef __U_BOOT__
for (; pi; pi = IF_HUSH_LOOPS(rword == RES_DONE ? loop_top : )
pi->next) {
#else /* __U_BOOT__ */
- for (; pi; pi = pi->next) {
+ for (; pi; pi = rword == RES_DONE ? loop_top : pi->next) {
#endif /* __U_BOOT__ */
int r;
int sv_errexit_depth;
@@ -10451,7 +10451,20 @@ static int run_list(struct pipe *pi)
}
/* Insert next value from for_lcur */
/* note: *for_lcur already has quotes removed, $var
expanded, etc */
+#ifndef __U_BOOT__
set_local_var(xasprintf("%s=%s", pi->cmds[0].argv[0],
*for_lcur++), /*flag:*/ 0);
+#else /* __U_BOOT__ */
+ /* We cannot use xasprintf, so we emulate it. */
+ char *full_var;
+ char *var = pi->cmds[0].argv[0];
+ char *val = *for_lcur++;
+
+ /* + 1 to take into account =. */
+ full_var = xmalloc(strlen(var) + strlen(val) + 1);
+ sprintf(full_var, "%s=%s", var, val);
+
+ set_local_var_2021(full_var, /*flag:*/ 0);
+#endif /* __U_BOOT__ */
continue;
}
if (rword == RES_IN) {
--
2.34.1
[RFC PATCH v8 10/23] global_data.h: add GD_FLG_HUSH_OLD_PARSER flag
This flag is used to indicate we are using the hush parser.
Reviewed-by: Simon Glass
Signed-off-by: Francis Laniel
---
common/cli.c | 2 ++
include/asm-generic/global_data.h | 4
2 files changed, 6 insertions(+)
diff --git a/common/cli.c b/common/cli.c
index 3916a7b10a..e5fe1060d0 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -268,6 +268,8 @@ void cli_loop(void)
void cli_init(void)
{
#ifdef CONFIG_HUSH_PARSER
+ if (!(gd->flags & GD_FLG_HUSH_OLD_PARSER))
+ gd->flags |= GD_FLG_HUSH_OLD_PARSER;
u_boot_hush_start();
#endif
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index a1e1b9d640..120f1189ee 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -654,6 +654,10 @@ enum gd_flags {
* @GD_FLG_OF_TAG_MIGRATE: Device tree has old u-boot,dm- tags
*/
GD_FLG_OF_TAG_MIGRATE = 0x20,
+ /**
+* @GD_FLG_HUSH_OLD_PARSER: Use hush old parser.
+*/
+ GD_FLG_HUSH_OLD_PARSER = 0x40,
};
#endif /* __ASSEMBLY__ */
--
2.34.1
[RFC PATCH v8 16/23] test: hush: Fix instructions list tests for hush 2021
Modifies the expected result for hush 2021.
Indeed, there were bugs in actual U-Boot hush which were fixed in upstream
Busybox.
As hush 2021 is based on upstream Busybox, these bugs no longer exist.
Reviewed-by: Simon Glass
Signed-off-by: Francis Laniel
---
test/hush/list.c | 69 +---
1 file changed, 65 insertions(+), 4 deletions(-)
diff --git a/test/hush/list.c b/test/hush/list.c
index 052cf2783c..6f8f10f15e 100644
--- a/test/hush/list.c
+++ b/test/hush/list.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
static int hush_test_semicolon(struct unit_test_state *uts)
{
@@ -46,12 +47,43 @@ static int hush_test_or(struct unit_test_state *uts)
}
HUSH_TEST(hush_test_or, 0);
+DECLARE_GLOBAL_DATA_PTR;
+
static int hush_test_and_or(struct unit_test_state *uts)
{
/* A && B || C truth table. */
ut_asserteq(1, run_command("false && false || false", 0));
- ut_asserteq(1, run_command("false && false || true", 0));
- ut_asserteq(1, run_command("false && true || true", 0));
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_asserteq(1, run_command("false && false || true", 0));
+ } else if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* This difference seems to come from a bug solved in Busybox
+* hush.
+*
+* Indeed, the following expression can be seen like this:
+* (false && false) || true
+* So, (false && false) returns 1, the second false is not
+* executed, and true is executed because of ||.
+*/
+ ut_assertok(run_command("false && false || true", 0));
+ }
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_asserteq(1, run_command("false && true || true", 0));
+ } else if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* This difference seems to come from a bug solved in Busybox
+* hush.
+*
+* Indeed, the following expression can be seen like this:
+* (false && true) || true
+* So, (false && true) returns 1, the true is not executed, and
+* true is executed because of ||.
+*/
+ ut_assertok(run_command("false && true || true", 0));
+ }
+
ut_asserteq(1, run_command("false && true || false", 0));
ut_assertok(run_command("true && true || false", 0));
ut_asserteq(1, run_command("true && false || false", 0));
@@ -69,8 +101,37 @@ static int hush_test_or_and(struct unit_test_state *uts)
ut_asserteq(1, run_command("false || false && true", 0));
ut_assertok(run_command("false || true && true", 0));
ut_asserteq(1, run_command("false || true && false", 0));
- ut_assertok(run_command("true || true && false", 0));
- ut_assertok(run_command("true || false && false", 0));
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assertok(run_command("true || true && false", 0));
+ } else if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* This difference seems to come from a bug solved in Busybox
+* hush.
+*
+* Indeed, the following expression can be seen like this:
+* (true || true) && false
+* So, (true || true) returns 0, the second true is not
+* executed, and then false is executed because of &&.
+*/
+ ut_asserteq(1, run_command("true || true && false", 0));
+ }
+
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assertok(run_command("true || false && false", 0));
+ } else if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* This difference seems to come from a bug solved in Busybox
+* hush.
+*
+* Indeed, the following expression can be seen like this:
+* (true || false) && false
+* So, (true || false) returns 0, the false is not executed, and
+* then false is executed because of &&.
+*/
+ ut_asserteq(1, run_command("true || false && false", 0));
+ }
+
ut_assertok(run_command("true || false && true", 0));
ut_assertok(run_command("true || true && true", 0));
--
2.34.1
[RFC PATCH v8 17/23] test: hush: Fix variable expansion tests for hush 2021
Modifies the expected result for hush 2021.
Indeed, there were bugs in actual U-Boot hush which were fixed in upstream
Busybox.
As hush 2021 is based on upstream Busybox, these bugs no longer exist.
Reviewed-by: Simon Glass
Signed-off-by: Francis Laniel
---
test/hush/dollar.c | 79 --
1 file changed, 69 insertions(+), 10 deletions(-)
diff --git a/test/hush/dollar.c b/test/hush/dollar.c
index defb2c3fd0..f23392c72d 100644
--- a/test/hush/dollar.c
+++ b/test/hush/dollar.c
@@ -9,6 +9,9 @@
#include
#include
#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
static int hush_test_simple_dollar(struct unit_test_state *uts)
{
@@ -51,13 +54,29 @@ static int hush_test_simple_dollar(struct unit_test_state
*uts)
ut_asserteq(1, run_command("dollar_foo='bar quux", 0));
/* Next line contains error message */
ut_assert_skipline();
- ut_assert_console_end();
+
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* For some strange reasons, the console is not empty after
+* running above command.
+* So, we reset it to not have side effects for other tests.
+*/
+ console_record_reset_enable();
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assert_console_end();
+ }
ut_asserteq(1, run_command("dollar_foo=bar quux\"", 0));
/* Two next lines contain error message */
ut_assert_skipline();
ut_assert_skipline();
- ut_assert_console_end();
+
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /* See above comments. */
+ console_record_reset_enable();
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assert_console_end();
+ }
ut_assertok(run_command("dollar_foo='bar \"quux'", 0));
@@ -71,17 +90,35 @@ static int hush_test_simple_dollar(struct unit_test_state
*uts)
*/
console_record_reset_enable();
- ut_asserteq(1, run_command("dollar_foo=\"bar 'quux\"", 0));
- /* Next line contains error message */
- ut_assert_skipline();
- ut_assert_console_end();
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* Old parser returns an error because it waits for closing
+* '\'', but this behavior is wrong as the '\'' is surrounded by
+* '"', so no need to wait for a closing one.
+*/
+ ut_assertok(run_command("dollar_foo=\"bar 'quux\"", 0));
+
+ ut_assertok(run_command("echo $dollar_foo", 0));
+ ut_assert_nextline("bar 'quux");
+ ut_assert_console_end();
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_asserteq(1, run_command("dollar_foo=\"bar 'quux\"", 0));
+ /* Next line contains error message */
+ ut_assert_skipline();
+ ut_assert_console_end();
+ }
ut_assertok(run_command("dollar_foo='bar quux'", 0));
ut_assertok(run_command("echo $dollar_foo", 0));
ut_assert_nextline("bar quux");
ut_assert_console_end();
- puts("Beware: this test set local variable dollar_foo and it cannot be
unset!");
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("dollar_foo=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable dollar_foo and it
cannot be unset!");
+ }
return 0;
}
@@ -109,7 +146,12 @@ static int hush_test_env_dollar(struct unit_test_state
*uts)
/* Clean up setting the variable */
env_set("env_foo", NULL);
- puts("Beware: this test set local variable env_foo and it cannot be
unset!");
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("env_foo=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable env_foo and it
cannot be unset!");
+ }
return 0;
}
@@ -144,7 +186,18 @@ static int hush_test_command_dollar(struct unit_test_state
*uts)
ut_assertok(run_command("dollar_bar='echo bar\\n'", 0));
ut_assertok(run_command("$dollar_bar", 0));
- ut_assert_nextline("barn");
+
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* This difference seems to come from a bug solved in Busybox
+* hush.
+* Behavior of hush 2021 is coherent with bash and other shells.
+*/
+ ut_assert_nextline("bar\\n");
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ ut_assert_nextline("barn");
+ }
+
ut_assert_console_end();
ut_assertok(run_com
[RFC PATCH v8 18/23] cli: hush_2021: Enable using < and > as string compare operators
In Busybox hush, '<' and '>' are used as redirection operators.
For example, cat foo > bar will write content of file foo inside file bar.
In U-Boot, we do not have file system, so we can hardly redirect command output
inside a file.
But, in actual U-Boot hush, these operators ('<' and '>') are used as string
compare operators.
For example, test aaa < bbb returns 0 as aaa is before bbb in the dictionary.
Busybox hush also permits this, but operators need to be escaped ('\<' and
'\>').
Indeed, if escaping is needed it permits the developer to think about its code,
as in a lot of case, we want to compare integers (using '-lt' or '-gt') rather
than strings.
As testing in U-Boot is handled by the test command, we will stick with the
original behaviour and not adapt to Busybox one.
Nonetheless, if one day we decide to implement test with '[[ ]]', we will then
stick to upstream Busybox behavior.
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
common/cli_hush_upstream.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index dbf77ad503..68a9a4bb72 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -6160,7 +6160,28 @@ static struct pipe *parse_stream(char **pstring,
if (parse_redirect(&ctx, redir_fd, redir_style, input))
goto parse_error_exitcode1;
continue; /* get next char */
-#endif /* !__U_BOOT__ */
+#else /* __U_BOOT__ */
+ /*
+* In U-Boot, '<' and '>' can be used in test command
to test if
+* a string is, alphabetically, before or after another.
+* In 2021 Busybox hush, we will keep the same behavior
and so not treat
+* them as redirection operator.
+*
+* Indeed, in U-Boot, tests are handled by the test
command and not by the
+* shell code.
+* So, better to give this character as input to test
command.
+*
+* NOTE In my opinion, when you use '<' or '>' I am
almost sure
+* you wanted to use "-gt" or "-lt" in place, so
thinking to
+* escape these will make you should check your code
(sh syntax
+* at this level is, for me, error prone).
+*/
+ case '>':
+ fallthrough;
+ case '<':
+ o_addQchr(&ctx.word, ch);
+ continue;
+#endif /* __U_BOOT__ */
case '#':
if (ctx.word.length == 0 && !ctx.word.has_quoted_part) {
/* skip "#comment" */
--
2.34.1
[RFC PATCH v8 09/23] cli: Add menu for hush parser
For the moment, the menu contains only entry: HUSH_OLD_PARSER which is the default. The goal is to prepare the field to add a new hush parser which guarantees actual behavior is still correct. Reviewed-by: Simon Glass Signed-off-by: Francis Laniel --- cmd/Kconfig | 13 + common/Makefile | 2 +- 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/cmd/Kconfig b/cmd/Kconfig index 87291e2d84..2c50c9f7b5 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -23,6 +23,19 @@ config HUSH_PARSER If disabled, you get the old, much simpler behaviour with a somewhat smaller memory footprint. +menu "Hush flavor to use" + depends on HUSH_PARSER + + config HUSH_OLD_PARSER + bool "Use hush old parser" + default y + help + This option enables the old flavor of hush based on hush Busybox from + 2005. + + It is actually the default U-Boot shell when decided to use hush as shell. +endmenu + config CMDLINE_EDITING bool "Enable command line editing" depends on CMDLINE diff --git a/common/Makefile b/common/Makefile index c87bb2e78b..93d0a5a309 100644 --- a/common/Makefile +++ b/common/Makefile @@ -8,7 +8,7 @@ ifndef CONFIG_SPL_BUILD obj-y += init/ obj-y += main.o obj-y += exports.o -obj-$(CONFIG_HUSH_PARSER) += cli_hush.o +obj-$(CONFIG_HUSH_OLD_PARSER) += cli_hush.o obj-$(CONFIG_AUTOBOOT) += autoboot.o # # boards -- 2.34.1
[RFC PATCH v8 11/23] cmd: Add new cli command
This command can be used to print the current parser with 'cli print'.
It can also be used to set the current parser with 'cli set'.
For the moment, only one value is valid for set: old.
Signed-off-by: Francis Laniel
---
cmd/Makefile | 2 +
cmd/cli.c | 120 ++
common/cli.c | 3 +-
doc/usage/cmd/cli.rst | 59 +
doc/usage/index.rst | 1 +
5 files changed, 184 insertions(+), 1 deletion(-)
create mode 100644 cmd/cli.c
create mode 100644 doc/usage/cmd/cli.rst
diff --git a/cmd/Makefile b/cmd/Makefile
index 6c37521b4e..706e934836 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -224,6 +224,8 @@ obj-$(CONFIG_CMD_AVB) += avb.o
# Foundries.IO SCP03
obj-$(CONFIG_CMD_SCP03) += scp03.o
+obj-$(CONFIG_HUSH_PARSER) += cli.o
+
obj-$(CONFIG_ARM) += arm/
obj-$(CONFIG_RISCV) += riscv/
obj-$(CONFIG_SANDBOX) += sandbox/
diff --git a/cmd/cli.c b/cmd/cli.c
new file mode 100644
index 00..7671785b83
--- /dev/null
+++ b/cmd/cli.c
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const char *gd_flags_to_parser(void)
+{
+ if (gd->flags & GD_FLG_HUSH_OLD_PARSER)
+ return "old";
+ return NULL;
+}
+
+static int do_cli_get(struct cmd_tbl *cmdtp, int flag, int argc,
+char *const argv[])
+{
+ const char *current = gd_flags_to_parser();
+
+ if (!current) {
+ printf("current cli value is not valid, this should not
happen!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ printf("%s\n", current);
+
+ return CMD_RET_SUCCESS;
+}
+
+static int parser_string_to_gd_flags(const char *parser)
+{
+ if (!strcmp(parser, "old"))
+ return GD_FLG_HUSH_OLD_PARSER;
+ return -1;
+}
+
+static void reset_parser_gd_flags(void)
+{
+ gd->flags &= ~GD_FLG_HUSH_OLD_PARSER;
+}
+
+static int do_cli_set(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ char *parser_name;
+ int parser_flag;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ parser_name = argv[1];
+
+ parser_flag = parser_string_to_gd_flags(parser_name);
+ if (parser_flag == -1) {
+ printf("Bad value for parser name: %s\n", parser_name);
+ return CMD_RET_USAGE;
+ }
+
+ if (parser_flag == GD_FLG_HUSH_OLD_PARSER &&
+ !CONFIG_IS_ENABLED(HUSH_OLD_PARSER)) {
+ printf("Want to set current parser to old, but its code was not
compiled!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (parser_flag == GD_FLG_HUSH_2021_PARSER &&
+ !CONFIG_IS_ENABLED(HUSH_2021_PARSER)) {
+ printf("Want to set current parser to 2021, but its code was
not compiled!\n");
+ return CMD_RET_FAILURE;
+ }
+
+ reset_parser_gd_flags();
+ gd->flags |= parser_flag;
+
+ cli_init();
+ cli_loop();
+
+ /* cli_loop() should never return. */
+ return CMD_RET_FAILURE;
+}
+
+static struct cmd_tbl parser_sub[] = {
+ U_BOOT_CMD_MKENT(get, 1, 1, do_cli_get, "", ""),
+ U_BOOT_CMD_MKENT(set, 2, 1, do_cli_set, "", ""),
+};
+
+static int do_cli(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ struct cmd_tbl *cp;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ /* drop initial "parser" arg */
+ argc--;
+ argv++;
+
+ cp = find_cmd_tbl(argv[0], parser_sub, ARRAY_SIZE(parser_sub));
+ if (cp)
+ return cp->cmd(cmdtp, flag, argc, argv);
+
+ return CMD_RET_USAGE;
+}
+
+#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+static char cli_help_text[] =
+ "get - print current cli\n"
+ "set - set the current cli, possible value is: old"
+ ;
+#endif
+
+U_BOOT_CMD(cli, 3, 1, do_cli,
+ "cli",
+#if CONFIG_IS_ENABLED(SYS_LONGHELP)
+ cli_help_text
+#endif
+);
diff --git a/common/cli.c b/common/cli.c
index e5fe1060d0..d419671e8c 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -268,7 +268,8 @@ void cli_loop(void)
void cli_init(void)
{
#ifdef CONFIG_HUSH_PARSER
- if (!(gd->flags & GD_FLG_HUSH_OLD_PARSER))
+ if (!(gd->flags & GD_FLG_HUSH_OLD_PARSER)
+ && CONFIG_IS_ENABLED(HUSH_OLD_PARSER))
gd->flags |= GD_FLG_HUSH_OLD_PARSER;
u_boot_hush_start();
#endif
diff --git a/doc/usage/cmd/cli.rst b/doc/usage/cmd/cli.rst
new file mode 100644
index 00..89ece3203d
--- /dev/null
+++ b/doc/usage/cmd/cli.rst
@@ -0,0 +1,59 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+cli command
+===
+
+Synopis
+---
+
+::
+
+cli get
+cli set cli_flavor
+
+Description
+---
+
+The cli command permits getting and changing the current parser at runtime.
+
+cli get
+~~~
+
+It shows the curre
[RFC PATCH v8 23/23] DO NOT MERGE: only to make CI happy
This commit set CONFIG_HUSH_PARSER_2021 as the default to trigger the CI with
this parser.
Nonetheless, the keymile (i.e. VENDOR_KM) board family is not compatible with
new 2021 hush parser.
Indeed, This boards used set_local_var() to store some variables as local shell.
They then used get_local_var() to retrieve the variables values.
Sadly, this two functions do not exist with CONFIG_HUSH_PARSER_2021.
A patch was proposed to use environment variables rather than local variables
but it does not tackle the problem, so complementary work is needed to make
this boards use CONFIG_HUSH_PARSER_2021 [1].
We also remove a #undef of CONFIG_FEATURE_SH_STANDALONE as it does not exist in
U-Boot and causes troubles in the CI.
We also set CONFIG_LTO for kirkwoord sheevaplug and phytec bk4r1, otherwise it
hits its board size limit.
We also disable some check for pylint as it was not able to find future for
commit object.
Signed-off-by: Francis Laniel
[1] https://marc.info/?l=u-boot&m=165541917618725&w=2
---
cmd/Kconfig | 3 ++-
common/cli_hush_upstream.c | 1 -
configs/sheevaplug_defconfig | 1 +
tools/patman/series.py | 4
4 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig
index c0f0e05d2f..2d066f08ba 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -28,7 +28,7 @@ menu "Hush flavor to use"
config HUSH_OLD_PARSER
bool "Use hush old parser"
- default y
+ default y if VENDOR_KM
help
This option enables the old flavor of hush based on hush
Busybox from
2005.
@@ -37,6 +37,7 @@ menu "Hush flavor to use"
config HUSH_2021_PARSER
bool "Use hush 2021 parser"
+ default y if !VENDOR_KM
help
This option enables the new flavor of hush based on hush
Busybox from
2021.
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index 649775a7f7..5d329851c6 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -427,7 +427,6 @@
#include "NUM_APPLETS.h"
#if NUM_APPLETS == 1
/* STANDALONE does not make sense, and won't compile */
-# undef CONFIG_FEATURE_SH_STANDALONE
# undef ENABLE_FEATURE_SH_STANDALONE
# undef IF_FEATURE_SH_STANDALONE
# undef IF_NOT_FEATURE_SH_STANDALONE
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 2e4901b840..365f779cc8 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -16,6 +16,7 @@ CONFIG_ENV_OFFSET=0x8
CONFIG_DEFAULT_DEVICE_TREE="kirkwood-sheevaplug"
CONFIG_IDENT_STRING="\nMarvell-Sheevaplug"
CONFIG_SYS_LOAD_ADDR=0x80
+CONFIG_LTO=y
CONFIG_HAS_BOARD_SIZE_LIMIT=y
CONFIG_BOARD_SIZE_LIMIT=524288
CONFIG_BOOTDELAY=3
diff --git a/tools/patman/series.py b/tools/patman/series.py
index 6866e1dbd0..f99818e33a 100644
--- a/tools/patman/series.py
+++ b/tools/patman/series.py
@@ -316,6 +316,8 @@ class Series(dict):
# Show progress any commits that are taking forever
lastlen = 0
while True:
+# pylint does not find future which is set above.
+# pylint: disable=E1101
left = [commit for commit in self.commits
if not commit.future.done()]
if not left:
@@ -333,6 +335,8 @@ class Series(dict):
print('Cc processing complete')
for commit in self.commits:
+# pylint does not find future which is set above.
+# pylint: disable=E1101
cc = commit.future.result()
all_ccs += cc
print(commit.patch, '\0'.join(sorted(set(cc))), file=fd)
--
2.34.1
[RFC PATCH v8 19/23] cli: hush_2021: Enable if keyword
Adds support for "if then else" construct both for command line interface and
through run_command().
Signed-off-by: Francis Laniel
Reviewed-by: Simon Glass
---
common/cli_hush_2021.c | 11 +++
common/cli_hush_upstream.c | 12
2 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/common/cli_hush_2021.c b/common/cli_hush_2021.c
index 7dd30ea0ef..aba5dcbbcd 100644
--- a/common/cli_hush_2021.c
+++ b/common/cli_hush_2021.c
@@ -33,6 +33,7 @@
*/
#define ENABLE_HUSH_INTERACTIVE1
#define ENABLE_FEATURE_EDITING 1
+#define ENABLE_HUSH_IF 1
/* No MMU in U-Boot */
#define BB_MMU 0
#define USE_FOR_NOMMU(...) __VA_ARGS__
@@ -124,6 +125,11 @@ static void bb_error_msg(const char *s, ...)
va_end(p);
}
+static void bb_simple_error_msg(const char *s)
+{
+ bb_error_msg("%s", s);
+}
+
static void *xmalloc(size_t size)
{
void *p = NULL;
@@ -147,6 +153,11 @@ static void *xrealloc(void *ptr, size_t size)
return p;
}
+static void *xmemdup(const void *s, int n)
+{
+ return memcpy(xmalloc(n), s, n);
+}
+
#define xstrdupstrdup
#define xstrndup strndup
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index 68a9a4bb72..9b65dcbde1 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -1488,7 +1488,6 @@ static void msg_and_die_if_script(unsigned lineno, const
char *fmt, ...)
die_if_script();
}
-#ifndef __U_BOOT__
static void syntax_error(unsigned lineno UNUSED_PARAM, const char *msg)
{
if (msg)
@@ -1497,7 +1496,6 @@ static void syntax_error(unsigned lineno UNUSED_PARAM,
const char *msg)
bb_simple_error_msg("syntax error");
die_if_script();
}
-#endif /* !__U_BOOT__ */
static void syntax_error_at(unsigned lineno UNUSED_PARAM, const char *msg)
{
@@ -3962,7 +3960,6 @@ static void debug_print_tree(struct pipe *pi, int lvl)
[PIPE_OR ] = "OR" ,
[PIPE_BG ] = "BG" ,
};
-#ifndef __U_BOOT__
static const char *RES[] = {
[RES_NONE ] = "NONE" ,
# if ENABLE_HUSH_IF
@@ -3992,7 +3989,6 @@ static void debug_print_tree(struct pipe *pi, int lvl)
[RES_ ] = "" ,
[RES_SNTX ] = "SNTX" ,
};
-#endif /* !__U_BOOT__ */
static const char *const CMDTYPE[] = {
"{}",
"()",
@@ -4010,10 +4006,8 @@ static void debug_print_tree(struct pipe *pi, int lvl)
lvl*2, "",
pin,
pi->num_cmds,
-#ifdef __U_BOOT__
(IF_HAS_KEYWORDS(pi->pi_inverted ? "! " :) ""),
RES[pi->res_word],
-#endif /* !__U_BOOT__ */
pi->followup, PIPE[pi->followup]
);
prn = 0;
@@ -9833,6 +9827,7 @@ static NOINLINE int run_pipe(struct pipe *pi)
rcode = 1; /* exitcode if redir failed */
#ifndef __U_BOOT__
if (setup_redirects(command, &squirrel) == 0) {
+#endif /* !__U_BOOT__ */
debug_printf_exec(": run_list\n");
//FIXME: we need to pass squirrel down into run_list()
//for SH_STANDALONE case, or else this construct:
@@ -9841,10 +9836,11 @@ static NOINLINE int run_pipe(struct pipe *pi)
//and in SH_STANDALONE mode, "find" is not execed,
//therefore CLOEXEC on saved fd does not help.
rcode = run_list(command->group) & 0xff;
+#ifndef __U_BOOT__
}
restore_redirects(squirrel);
- IF_HAS_KEYWORDS(if (pi->pi_inverted) rcode = !rcode;)
#endif /* !__U_BOOT__ */
+ IF_HAS_KEYWORDS(if (pi->pi_inverted) rcode = !rcode;)
debug_leave();
debug_printf_exec("run_pipe: return %d\n", rcode);
return rcode;
@@ -10363,12 +10359,12 @@ static int run_list(struct pipe *pi)
break;
if (G_flag_return_in_progress == 1)
break;
+#endif /* !__U_BOOT__ */
IF_HAS_KEYWORDS(rword = pi->res_word;)
debug_printf_exec(": rword=%d cond_code=%d last_rword=%d\n",
rword, cond_code, last_rword);
-#endif /* !__U_BOOT__ */
sv_errexit_depth = G.errexit_depth;
if (
#if ENABLE_HUSH_IF
--
2.34.1
[RFC PATCH v8 21/23] test: hush: Fix loop tests for hush 2021
Modifies return code got from while loop as hush 2021 always returns 0 from
while loop.
Reviewed-by: Simon Glass
Signed-off-by: Francis Laniel
---
test/hush/loop.c | 34 ++
1 file changed, 30 insertions(+), 4 deletions(-)
diff --git a/test/hush/loop.c b/test/hush/loop.c
index ca777e38fe..add5402a32 100644
--- a/test/hush/loop.c
+++ b/test/hush/loop.c
@@ -9,6 +9,9 @@
#include
#include
#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
static int hush_test_for(struct unit_test_state *uts)
{
@@ -21,7 +24,12 @@ static int hush_test_for(struct unit_test_state *uts)
ut_assert_nextline("quux");
ut_assert_console_end();
- puts("Beware: this test set local variable loop_i and it cannot be
unset!");
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("loop_i=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable loop_i and it cannot
be unset!");
+ }
return 0;
}
@@ -31,12 +39,30 @@ static int hush_test_while(struct unit_test_state *uts)
{
console_record_reset_enable();
- /* Exit status is that of test, so 1 since test is false to quit the
loop. */
- ut_asserteq(1, run_command("while test -z \"$loop_foo\"; do echo bar;
loop_foo=quux; done", 0));
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /*
+* Hush 2021 always returns 0 from while loop...
+* You can see code snippet near this line to have a better
+* understanding:
+* debug_printf_exec(": while expr is false: breaking
(exitcode:EXIT_SUCCESS)\n");
+*/
+ ut_assertok(run_command("while test -z \"$loop_foo\"; do echo
bar; loop_foo=quux; done", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ /*
+* Exit status is that of test, so 1 since test is false to quit
+* the loop.
+*/
+ ut_asserteq(1, run_command("while test -z \"$loop_foo\"; do
echo bar; loop_foo=quux; done", 0));
+ }
ut_assert_nextline("bar");
ut_assert_console_end();
- puts("Beware: this test set local variable loop_foo and it cannot be
unset!");
+ if (gd->flags & GD_FLG_HUSH_2021_PARSER) {
+ /* Reset local variable. */
+ ut_assertok(run_command("loop_foo=", 0));
+ } else if (gd->flags & GD_FLG_HUSH_OLD_PARSER) {
+ puts("Beware: this test set local variable loop_foo and it
cannot be unset!");
+ }
return 0;
}
--
2.34.1
[RFC PATCH v8 22/23] cli: hush_2021: Add upstream commits up to 9th May 2023.
This commit adds the following hush busybox upstream commits:
3a7f00eadcf4 ("hush: add comment about abort on syntax error %{^}")
acae889dd972 ("ash,hush: tab completion of functions and aliases")
90b607d79a13 ("hush: quote variable values printed by "set" (match ash
behavior)")
6748e6494c22 ("hush (NOMMU): fix LINENO in execed children")
fd5fb2d2b596 ("hush: speed up "big heredoc" code")
1409432d072e ("hush: add TODO comment")
93ae7464e6e4 ("hush: restore SIGHUP handling, this time explain why we do what
we do")
1fdb33bd07e5 ("hush: restore tty pgrp on SIGHUP")
6101b6d3eaa0 ("hush: remove special handling of SIGHUP")
93e0898c663a ("shell: fix SIGWINCH and SIGCHLD (in hush) interrupting line
input, closes 15256")
969e00816835 ("hush: code shrink")
27be0e8cfeb6 ("shell: fix compile failures in some configs")
7d1c7d833785 ("ash,hush: use HOME for tab completion and prompts")
21afddefd258 ("hush: fix "error: invalid preprocessing directive ##"")
e53c7dbafc78 ("hush: fix set -n to act immediately, not just after run_list()
")
574b9c446da1 ("hush: fix var_LINENO3.tests failure")
49bcf9f40cff ("hush: speed up ${x//\*/|} too")
53b2fdcdba4c ("*: add NOINLINEs where code noticeably shrinks")
7c3e96d4b3d4 ("shell: use more compact SHELL_ASH / HUSH config defines. no code
changes")
62f1eed1e191 ("hush: in a comment, document what -i might be doing")
aaf3d5ba74c5 ("shell: tweak --help")
db5546ca1018 ("libbb: code shrink: introduce and use [_]exit_SUCCESS()")
931c55f9e2b4 ("libbb: invert the meaning of SETUP_ENV_NO_CHDIR ->
SETUP_ENV_CHDIR")
12566e7f9b5e ("ash,hush: fix handling of SIGINT while waiting for interactive
input")
987be932ed3c ("*: slap on a few ALIGN_PTR where appropriate")
Signed-off-by: Francis Laniel
---
common/cli_hush_2021.c | 2 +-
common/cli_hush_upstream.c | 298 -
2 files changed, 227 insertions(+), 73 deletions(-)
diff --git a/common/cli_hush_2021.c b/common/cli_hush_2021.c
index 0a207d147b..4c46176cb2 100644
--- a/common/cli_hush_2021.c
+++ b/common/cli_hush_2021.c
@@ -26,7 +26,7 @@
/*
* BusyBox Version: UPDATE THIS WHEN PULLING NEW UPSTREAM REVISION!
*/
-#define BB_VER "1.34.0.git37460f5daff9"
+#define BB_VER "1.35.0.git7d1c7d833785"
/*
* Define hush features by the names used upstream.
diff --git a/common/cli_hush_upstream.c b/common/cli_hush_upstream.c
index 23392939e1..649775a7f7 100644
--- a/common/cli_hush_upstream.c
+++ b/common/cli_hush_upstream.c
@@ -339,7 +339,7 @@
* therefore we don't show them either.
*/
//usage:#define hush_trivial_usage
-//usage: "[-enxl] [-c 'SCRIPT' [ARG0 ARGS] | FILE [ARGS] | -s [ARGS]]"
+//usage: "[-enxl] [-c 'SCRIPT' [ARG0 ARGS] | FILE ARGS | -s ARGS]"
//usage:#define hush_full_usage "\n\n"
//usage: "Unix shell interpreter"
@@ -374,7 +374,7 @@
# define F_DUPFD_CLOEXEC F_DUPFD
#endif
-#if ENABLE_FEATURE_SH_EMBEDDED_SCRIPTS && !(ENABLE_ASH || ENABLE_SH_IS_ASH ||
ENABLE_BASH_IS_ASH)
+#if ENABLE_FEATURE_SH_EMBEDDED_SCRIPTS && !ENABLE_SHELL_ASH
# include "embedded_scripts.h"
#else
# define NUM_SCRIPTS 0
@@ -574,7 +574,7 @@ enum {
#define NULL_O_STRING { NULL }
#ifndef debug_printf_parse
-static const char *const assignment_flag[] = {
+static const char *const assignment_flag[] ALIGN_PTR = {
"MAYBE_ASSIGNMENT",
"DEFINITELY_ASSIGNMENT",
"NOT_ASSIGNMENT",
@@ -958,6 +958,7 @@ struct globals {
#if ENABLE_HUSH_INTERACTIVE
smallint promptmode; /* 0: PS1, 1: PS2 */
#endif
+ /* set by signal handler if SIGINT is received _and_ its trap is not
set */
smallint flag_SIGINT;
#ifndef __U_BOOT__
#if ENABLE_HUSH_LOOPS
@@ -1507,6 +1508,7 @@ static void syntax_error_unterm_str(unsigned lineno
UNUSED_PARAM, const char *s)
{
bb_error_msg("syntax error: unterminated %s", s);
//? source4.tests fails: in bash, echo ${^} in script does not terminate the
script
+// (but bash --posix, or if bash is run as "sh", does terminate in script, so
maybe uncomment this?)
// die_if_script();
}
@@ -1918,7 +1920,13 @@ static void restore_G_args(save_arg_t *sv, char **argv)
* SIGQUIT: ignore
* SIGTERM (interactive): ignore
* SIGHUP (interactive):
- *send SIGCONT to stopped jobs, send SIGHUP to all jobs and exit
+ *Send SIGCONT to stopped jobs, send SIGHUP to all jobs and exit.
+ *Kernel would do this for us ("orphaned process group" handling
+ *according to POSIX) if we are a session leader and thus our death
+ *frees the controlling tty, but to be bash-compatible, we also do it
+ *for every interactive shell's death by SIGHUP.
+ *(Also, we need to restore tty pgrp, otherwise e.g. Midnight Commander
+ *backgrounds when hush started from it gets killed by SIGHUP).
* SIGTTIN, SIGTTOU, SIGTSTP (if job control is on): ignore
*Note that ^Z is handled not by trapping SIGTSTP, but by seeing
*that all pipe members are stopped. Try this in bash:
@@ -2034,6 +20
Re: [PATCH v5 08/10] board: schneider: add RZN1 board support
On Tue, May 09, 2023 at 09:21:02AM -0400, Ralph Siemsen wrote: On Tue, May 09, 2023 at 04:26:57AM +0200, Marek Vasut wrote: On 5/8/23 20:23, Ralph Siemsen wrote: I moved it to board-specific directory as an interim step. Hopefully we can do some consolidation of the multiple CDNS DDR controller implementations, and then figure out the right way to split things up. For now this seemed like the less-bad option. How about putting it into drivers/soc/ ? Possibly, although it would complicate things for me right now. I have some (as yet unfinished) patches to handle the RZ/N1 variants using drivers/soc. As discussed on IRC, it is now moved into drivers/ram/renesas/rzn1 Ralph
Re: [PATCH v5 09/10] tools: spkgimage: add Renesas SPKG format
On Tue, May 09, 2023 at 11:42:30AM -0400, Ralph Siemsen wrote: On Tue, May 09, 2023 at 04:52:45PM +0200, Marek Vasut wrote: Do we have some sort of global (?) state structure which exists during the whole work cycle of the tool ? If so, add a link list into there. There is struct image_tool_params which is passed to the callbacks and holds most of the state. And in fact it is a global, but declared static in mkimage.c, without any accessor function. If we really want to worry about the lifecycle of these dynamic allocations, then we'd probably need to add some kind of "cleanup" method to the API, and call it right before exiting from main(). I can do an example implementation, but there are 9 other image formats already in the tree, which also do dynamic allocation. I don't want to start touching each one of those, or I'll never get this RZ/N1 in... I'll keep the current logic (which leaks) and send a separate RFC patch to discuss a strategy for fixing this in all the tools/*image.c drivers. Ralph
[PATCH v5 01/10] ARM: armv7: add non-SPL enable for Cortex SMPEN
Commit 2564fce7eea3 ("sunxi: move Cortex SMPEN setting into start.S")
added SPL_ARMV7_SET_CORTEX_SMPEN to enable setting SMP bit. For
platforms not using SPL boot, add the corresponding non-SPL config,
so that CONFIG_IS_ENABLED(ARMV7_SET_CORTEX_SMPEN) works as expected.
Signed-off-by: Ralph Siemsen
Reviewed-by: Marek Vasut
---
This will be used by the following commit that adds RZ/N1 support.
(no changes since v5)
Changes in v5:
- add R-b tag
arch/arm/cpu/armv7/Kconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/cpu/armv7/Kconfig b/arch/arm/cpu/armv7/Kconfig
index f1e4e26b8f..e33e53636a 100644
--- a/arch/arm/cpu/armv7/Kconfig
+++ b/arch/arm/cpu/armv7/Kconfig
@@ -107,6 +107,11 @@ config ARMV7_LPAE
Say Y here to use the long descriptor page table format. This is
required if U-Boot runs in HYP mode.
+config ARMV7_SET_CORTEX_SMPEN
+ bool
+ help
+ Enable the ARM Cortex ACTLR.SMP enable bit in U-boot.
+
config SPL_ARMV7_SET_CORTEX_SMPEN
bool
help
--
2.25.1
[PATCH v5 02/10] clk: renesas: prepare for non R-Car clock drivers
Add new CONFIG_CLK_RCAR to control compilation of shared code for R-Car clock drivers (renesas-cpg-mssr.c). Enable this for R-Car Gen2 and 3. This is necessary so that CONFIG_CLK_RENESAS can be enabled, allowing recursion into the drivers/clk/reneasas directory, without bringing in the R-Car support code. The support code contains platform specific access (TMU_BASE) which is not needed on other Renesas devices such as RZ/N1. Signed-off-by: Ralph Siemsen Reviewed-by: Sean Anderson Reviewed-by: Marek Vasut --- (no changes since v5) Changes in v5: - add symbol CONFIG_CLK_RCAR and select it for R-Car Gen2/3. - use this to control compilation of renesas-cpg-mssr.c, rather than CONFIG_CLK_RENESAS which also controls directory recursion. - update the commit message accordingly Changes in v3: - added tags drivers/clk/renesas/Kconfig | 9 - drivers/clk/renesas/Makefile | 2 +- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig index 45671c6925..bdb81a1bbe 100644 --- a/drivers/clk/renesas/Kconfig +++ b/drivers/clk/renesas/Kconfig @@ -2,7 +2,12 @@ config CLK_RENESAS bool "Renesas clock drivers" depends on CLK && ARCH_RMOBILE help - Enable support for clock present on Renesas RCar SoCs. + Enable support for clock present on Renesas SoCs. + +config CLK_RCAR + bool "Renesas RCar clock driver support" + help + Enable common code for clocks on Renesas RCar SoCs. config CLK_RCAR_CPG_LIB bool "CPG/MSSR library functions" @@ -11,6 +16,7 @@ config CLK_RCAR_GEN2 bool "Renesas RCar Gen2 clock driver" def_bool y if RCAR_32 depends on CLK_RENESAS + select CLK_RCAR help Enable this to support the clocks on Renesas RCar Gen2 SoC. @@ -48,6 +54,7 @@ config CLK_RCAR_GEN3 bool "Renesas RCar Gen3 and Gen4 clock driver" def_bool y if RCAR_64 depends on CLK_RENESAS + select CLK_RCAR select CLK_RCAR_CPG_LIB select DM_RESET help diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile index fe0391e520..c95dee67f3 100644 --- a/drivers/clk/renesas/Makefile +++ b/drivers/clk/renesas/Makefile @@ -1,4 +1,4 @@ -obj-$(CONFIG_CLK_RENESAS) += renesas-cpg-mssr.o +obj-$(CONFIG_CLK_RCAR) += renesas-cpg-mssr.o obj-$(CONFIG_CLK_RCAR_CPG_LIB) += rcar-cpg-lib.o obj-$(CONFIG_CLK_RCAR_GEN2) += clk-rcar-gen2.o obj-$(CONFIG_CLK_R8A774A1) += r8a774a1-cpg-mssr.o -- 2.25.1
[PATCH v5 04/10] pinctrl: renesas: add R906G032 driver
Pinctrl/pinconf driver for Renesas RZ/N1 (R906G032) SoC.
This is quite rudimentary right now, and only supports applying a
default pin configuration as specified by the device tree.
Signed-off-by: Ralph Siemsen
Reviewed-by: Marek Vasut
---
(no changes since v5)
Changes in v5:
- add R-b tag
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/renesas/Kconfig| 7 +
drivers/pinctrl/renesas/Makefile | 1 +
drivers/pinctrl/renesas/pinctrl-rzn1.c | 379 +
include/dt-bindings/pinctrl/rzn1-pinctrl.h | 141
5 files changed, 529 insertions(+)
create mode 100644 drivers/pinctrl/renesas/pinctrl-rzn1.c
create mode 100644 include/dt-bindings/pinctrl/rzn1-pinctrl.h
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 852adee4b4..fc1f01a02c 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_PINCTRL_INTEL) += intel/
obj-$(CONFIG_ARCH_MTMIPS) += mtmips/
obj-$(CONFIG_ARCH_NPCM) += nuvoton/
obj-$(CONFIG_ARCH_RMOBILE) += renesas/
+obj-$(CONFIG_ARCH_RZN1) += renesas/
obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
obj-$(CONFIG_PINCTRL_SUNXI)+= sunxi/
obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index 509cdd3fb2..0ea39b4a3f 100644
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -139,3 +139,10 @@ config PINCTRL_PFC_R7S72100
Support pin multiplexing control on Renesas RZ/A1 R7S72100 SoCs.
endif
+
+config PINCTRL_RZN1
+ bool "Renesas RZ/N1 R906G032 pin control driver"
+ depends on RZN1
+ default y if RZN1
+ help
+ Support pin multiplexing control on Renesas RZ/N1 R906G032 SoCs.
diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile
index 5cea1423ca..1a61c39d84 100644
--- a/drivers/pinctrl/renesas/Makefile
+++ b/drivers/pinctrl/renesas/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_PINCTRL_PFC_R8A779A0) += pfc-r8a779a0.o
obj-$(CONFIG_PINCTRL_PFC_R8A779F0) += pfc-r8a779f0.o
obj-$(CONFIG_PINCTRL_PFC_R8A779G0) += pfc-r8a779g0.o
obj-$(CONFIG_PINCTRL_PFC_R7S72100) += pfc-r7s72100.o
+obj-$(CONFIG_PINCTRL_RZN1) += pinctrl-rzn1.o
diff --git a/drivers/pinctrl/renesas/pinctrl-rzn1.c
b/drivers/pinctrl/renesas/pinctrl-rzn1.c
new file mode 100644
index 00..fdc43c8e71
--- /dev/null
+++ b/drivers/pinctrl/renesas/pinctrl-rzn1.c
@@ -0,0 +1,379 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2014-2018 Renesas Electronics Europe Limited
+ *
+ * Phil Edworthy
+ * Based on a driver originally written by Michel Pollet at Renesas.
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+/* Field positions and masks in the pinmux registers */
+#define RZN1_L1_PIN_DRIVE_STRENGTH 10
+#define RZN1_L1_PIN_DRIVE_STRENGTH_4MA 0
+#define RZN1_L1_PIN_DRIVE_STRENGTH_6MA 1
+#define RZN1_L1_PIN_DRIVE_STRENGTH_8MA 2
+#define RZN1_L1_PIN_DRIVE_STRENGTH_12MA3
+#define RZN1_L1_PIN_PULL 8
+#define RZN1_L1_PIN_PULL_NONE 0
+#define RZN1_L1_PIN_PULL_UP1
+#define RZN1_L1_PIN_PULL_DOWN 3
+#define RZN1_L1_FUNCTION 0
+#define RZN1_L1_FUNC_MASK 0xf
+#define RZN1_L1_FUNCTION_L20xf
+
+/*
+ * The hardware manual describes two levels of multiplexing, but it's more
+ * logical to think of the hardware as three levels, with level 3 consisting of
+ * the multiplexing for Ethernet MDIO signals.
+ *
+ * Level 1 functions go from 0 to 9, with level 1 function '15' (0xf)
specifying
+ * that level 2 functions are used instead. Level 2 has a lot more options,
+ * going from 0 to 61. Level 3 allows selection of MDIO functions which can be
+ * floating, or one of seven internal peripherals. Unfortunately, there are two
+ * level 2 functions that can select MDIO, and two MDIO channels so we have
four
+ * sets of level 3 functions.
+ *
+ * For this driver, we've compounded the numbers together, so:
+ *0 to 9 is level 1
+ * 10 to 71 is 10 + level 2 number
+ * 72 to 79 is 72 + MDIO0 source for level 2 MDIO function.
+ * 80 to 87 is 80 + MDIO0 source for level 2 MDIO_E1 function.
+ * 88 to 95 is 88 + MDIO1 source for level 2 MDIO function.
+ * 96 to 103 is 96 + MDIO1 source for level 2 MDIO_E1 function.
+ * Examples:
+ * Function 28 corresponds UART0
+ * Function 73 corresponds to MDIO0 to GMAC0
+ *
+ * There are 170 configurable pins (called PL_GPIO in the datasheet).
+ */
+
+/*
+ * Structure detailing the HW registers on the RZ/N1 devices.
+ * Both the Level 1 mux registers and Level 2 mux registers have the same
+ * structure. The only difference is that Level 2 has additional MDIO registers
+ * at the end.
+ */
+struct rzn1_pinctrl_regs {
+ u32 conf[170];
+ u32 pad0[86];
+ u32 status_protect; /* 0x400 */
+ /* MDIO mux registers, level2 only */
+ u32
[PATCH v5 06/10] ARM: dts: add devicetree for Renesas RZ/N1 SoC
This is taken directly from Linux kernel 6.3
(commit 457391b0380335d5e9a5babdec90ac53928b23b4)
Signed-off-by: Ralph Siemsen
Reviewed-by: Marek Vasut
---
Changes in v6:
- updated comment to reflact linux 6.3, and add commit hash.
(the files themselves have not changed)
Changes in v5:
- r9a06g032.dtsi now identical to linux 6.3-rc7 version
Changes in v3:
- add syscon phandle to ddrctl
- simplify UART compatible strings
arch/arm/dts/r9a06g032.dtsi | 477 ++
include/dt-bindings/clock/r9a06g032-sysctrl.h | 149 ++
2 files changed, 626 insertions(+)
create mode 100644 arch/arm/dts/r9a06g032.dtsi
create mode 100644 include/dt-bindings/clock/r9a06g032-sysctrl.h
diff --git a/arch/arm/dts/r9a06g032.dtsi b/arch/arm/dts/r9a06g032.dtsi
new file mode 100644
index 00..0fa565a1c3
--- /dev/null
+++ b/arch/arm/dts/r9a06g032.dtsi
@@ -0,0 +1,477 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Base Device Tree Source for the Renesas RZ/N1D (R9A06G032)
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ */
+
+#include
+#include
+
+/ {
+ compatible = "renesas,r9a06g032";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0>;
+ clocks = <&sysctrl R9A06G032_CLK_A7MP>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <1>;
+ clocks = <&sysctrl R9A06G032_CLK_A7MP>;
+ enable-method = "renesas,r9a06g032-smp";
+ cpu-release-addr = <0 0x4000c204>;
+ };
+ };
+
+ ext_jtag_clk: extjtagclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
+ ext_mclk: extmclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <4000>;
+ };
+
+ ext_rgmii_ref: extrgmiiref {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
+ ext_rtc_clk: extrtcclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+ ranges;
+
+ rtc0: rtc@40006000 {
+ compatible = "renesas,r9a06g032-rtc",
"renesas,rzn1-rtc";
+ reg = <0x40006000 0x1000>;
+ interrupts = ,
+,
+;
+ interrupt-names = "alarm", "timer", "pps";
+ clocks = <&sysctrl R9A06G032_HCLK_RTC>;
+ clock-names = "hclk";
+ power-domains = <&sysctrl>;
+ status = "disabled";
+ };
+
+ wdt0: watchdog@40008000 {
+ compatible = "renesas,r9a06g032-wdt",
"renesas,rzn1-wdt";
+ reg = <0x40008000 0x1000>;
+ interrupts = ;
+ clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+ status = "disabled";
+ };
+
+ wdt1: watchdog@40009000 {
+ compatible = "renesas,r9a06g032-wdt",
"renesas,rzn1-wdt";
+ reg = <0x40009000 0x1000>;
+ interrupts = ;
+ clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+ status = "disabled";
+ };
+
+ sysctrl: system-controller@4000c000 {
+ compatible = "renesas,r9a06g032-sysctrl";
+ reg = <0x4000c000 0x1000>;
+ status = "okay";
+ #clock-cells = <1>;
+ #power-domain-cells = <0>;
+
+ clocks = <&ext_mclk>, <&ext_rtc_clk>,
+ <&ext_jtag_clk>, <&ext_rgmii_ref>;
+ clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ dmamux: dma-router@a0 {
+ compatible = "renesas,rzn1-dmamux";
+ reg = <0xa0 4>;
+ #dma-cells = <6>;
+ dma-requests = <32>;
+ dma-masters = <&dma
[PATCH v5 05/10] ram: cadence: add driver for Cadence EDAC
Driver for Cadence EDAC DDR controller, as found in the Renesas RZ/N1. Signed-off-by: Ralph Siemsen --- Changes in v6: - use wait_for_bit macros instead of endless while loop Changes in v5: - move board-specific init out of the driver. Changes in v3: - assorted small cleanups - support version 1.0 silicon (previously #if 0...) drivers/ram/Kconfig| 1 + drivers/ram/Makefile | 2 + drivers/ram/cadence/Kconfig| 12 + drivers/ram/cadence/Makefile | 1 + drivers/ram/cadence/ddr_ctrl.c | 414 + include/renesas/ddr_ctrl.h | 175 ++ 6 files changed, 605 insertions(+) create mode 100644 drivers/ram/cadence/Kconfig create mode 100644 drivers/ram/cadence/Makefile create mode 100644 drivers/ram/cadence/ddr_ctrl.c create mode 100644 include/renesas/ddr_ctrl.h diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index 1acf212f87..bf99964577 100644 --- a/drivers/ram/Kconfig +++ b/drivers/ram/Kconfig @@ -108,6 +108,7 @@ config IMXRT_SDRAM This driver is for the sdram memory interface with the SEMC. source "drivers/ram/aspeed/Kconfig" +source "drivers/ram/cadence/Kconfig" source "drivers/ram/rockchip/Kconfig" source "drivers/ram/sifive/Kconfig" source "drivers/ram/stm32mp1/Kconfig" diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile index 2b9429cfee..b281129f89 100644 --- a/drivers/ram/Makefile +++ b/drivers/ram/Makefile @@ -24,3 +24,5 @@ ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_STARFIVE_DDR) += starfive/ endif obj-$(CONFIG_ARCH_OCTEON) += octeon/ + +obj-$(CONFIG_CADENCE_DDR_CTRL) += cadence/ diff --git a/drivers/ram/cadence/Kconfig b/drivers/ram/cadence/Kconfig new file mode 100644 index 00..2d5469cb8e --- /dev/null +++ b/drivers/ram/cadence/Kconfig @@ -0,0 +1,12 @@ +if RAM || SPL_RAM + +config CADENCE_DDR_CTRL + bool "Enable Cadence DDR controller" + depends on DM + help + Enable support for Cadence DDR controller, as found on + the Renesas RZ/N1 SoC. This controller has a large number + of registers which need to be programmed, mostly using values + obtained from Denali SOMA files via a TCL script. + +endif diff --git a/drivers/ram/cadence/Makefile b/drivers/ram/cadence/Makefile new file mode 100644 index 00..b4226cf6f2 --- /dev/null +++ b/drivers/ram/cadence/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_CADENCE_DDR_CTRL) += ddr_ctrl.o diff --git a/drivers/ram/cadence/ddr_ctrl.c b/drivers/ram/cadence/ddr_ctrl.c new file mode 100644 index 00..3e5959a84a --- /dev/null +++ b/drivers/ram/cadence/ddr_ctrl.c @@ -0,0 +1,414 @@ +// SPDX-License-Identifier: BSD-2-Clause +/* + * Cadence DDR Controller + * + * Copyright (C) 2015 Renesas Electronics Europe Ltd + */ + +/* + * The Cadence DDR Controller has a huge number of registers that principally + * cover two aspects, DDR specific timing information and AXI bus interfacing. + * Cadence's TCL script generates all of the register values for specific + * DDR devices operating at a specific frequency. The TCL script uses Denali + * SOMA files as inputs. The tool also generates the AXI bus register values as + * well, however this driver assumes that users will want to modifiy these to + * meet a specific application's needs. + * Therefore, this driver is passed two arrays containing register values for + * the DDR device specific information, and explicity sets the AXI registers. + * + * AXI bus interfacing: + * The controller has four AXI slaves connections, and each of these can be + * programmed to accept requests from specific AXI masters (using their IDs). + * The regions of DDR that can be accessed by each AXI slave can be set such + * as to isolate DDR used by one AXI master from another. Further, the maximum + * bandwidth allocated to each AXI slave can be set. + */ + +#include +#include +#include +#include +#include +#include + +/* avoid warning for real pr_debug in */ +#ifdef pr_debug +#undef pr_debug +#endif + +#ifdef DEBUG + #define pr_debug(fmt, args...) printf(fmt, ##args) + #define pr_debug2(fmt, args...) printf(fmt, ##args) +#else + #define pr_debug(fmt, args...) + #define pr_debug2(fmt, args...) +#endif + +#define DDR_NR_AXI_PORTS 4 +#define DDR_NR_ENTRIES 16 + +#define DDR_START_REG (0) /* DENALI_CTL_00 */ +#define DDR_CS0_MR1_REG(32 * 4)/* DENALI_CTL_32 */ +#define DDR_CS0_MR2_REG(32 * 4 + 2)/* DENALI_CTL_32 */ +#define DDR_CS1_MR1_REG(34 * 4 + 2)/* DENALI_CTL_34 */ +#define DDR_CS1_MR2_REG(35 * 4)/* DENALI_CTL_35 */ +#define DDR_ECC_ENABLE_REG (36 * 4 + 2)/* DENALI_CTL_36 */ +#define DDR_ECC_DISABLE_W_UC_ERR_REG (37 * 4 + 2)/* DENALI_CTL_37 */ +#define DDR_HALF_DATAPATH_REG (54 * 4)/* DENALI_CTL_54 */ +#define DDR_INTERRUPT_STATUS
[PATCH v5 07/10] ARM: rmobile: Add support for Renesas RZ/N1 SoC
The RZ/N1 is a family of SoC devices from Renesas, featuring:
* ARM Cortex-A7 CPU (single/dual core) and/or Cortex-M3
* Integrated SRAM up to 6MB
* Integrated gigabit ethernet switch
* Optional DDR2/3 controller
* I2C, SPI, UART, NAND, QSPI, SDIO, USB, CAN, RTC, LCD
Add basic support for this family, modeled on the existing RZA1.
Signed-off-by: Ralph Siemsen
---
Changes in v6:
- make the #ifdef a bit clearer
Changes in v5:
- fold mach-rzn1 into mach-rmobile
arch/arm/mach-rmobile/Kconfig | 19 +++
arch/arm/mach-rmobile/Kconfig.rzn1 | 20
arch/arm/mach-rmobile/cpu_info.c | 10 --
3 files changed, 47 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-rmobile/Kconfig.rzn1
diff --git a/arch/arm/mach-rmobile/Kconfig b/arch/arm/mach-rmobile/Kconfig
index 1ef7d68bdf..3061ccd34c 100644
--- a/arch/arm/mach-rmobile/Kconfig
+++ b/arch/arm/mach-rmobile/Kconfig
@@ -48,6 +48,24 @@ config RZA1
prompt "Renesas ARM SoCs RZ/A1 (32bit)"
select CPU_V7A
+config RZN1
+ prompt "Renesas ARM SoCs RZ/N1 (32bit)"
+ select CPU_V7A
+ select ARMV7_SET_CORTEX_SMPEN if !SPL
+ select SPL_ARMV7_SET_CORTEX_SMPEN if SPL
+ select CLK
+ select CLK_RENESAS
+ select CLK_R9A06G032
+ select DM
+ select DM_ETH
+ select DM_SERIAL
+ select PINCTRL
+ select PINCONF
+ select REGMAP
+ select SYSRESET
+ select SYSRESET_SYSCON
+ imply CMD_DM
+
endchoice
config SYS_SOC
@@ -56,5 +74,6 @@ config SYS_SOC
source "arch/arm/mach-rmobile/Kconfig.32"
source "arch/arm/mach-rmobile/Kconfig.64"
source "arch/arm/mach-rmobile/Kconfig.rza1"
+source "arch/arm/mach-rmobile/Kconfig.rzn1"
endif
diff --git a/arch/arm/mach-rmobile/Kconfig.rzn1
b/arch/arm/mach-rmobile/Kconfig.rzn1
new file mode 100644
index 00..73138d69f9
--- /dev/null
+++ b/arch/arm/mach-rmobile/Kconfig.rzn1
@@ -0,0 +1,20 @@
+if RZN1
+
+choice
+ prompt "Renesas RZ/N1 Board select"
+ default TARGET_SCHNEIDER_RZN1
+
+config TARGET_SCHNEIDER_RZN1
+ bool "Schneider RZN1 board"
+ help
+ Support the Schneider RZN1D and RZN1S boards, which are based
+ on the Renesas RZ/N1 SoC.
+
+endchoice
+
+config SYS_SOC
+ default "rzn1"
+
+source "board/schneider/rzn1-snarc/Kconfig"
+
+endif
diff --git a/arch/arm/mach-rmobile/cpu_info.c b/arch/arm/mach-rmobile/cpu_info.c
index 7e7465a2c8..71a856ea87 100644
--- a/arch/arm/mach-rmobile/cpu_info.c
+++ b/arch/arm/mach-rmobile/cpu_info.c
@@ -30,7 +30,7 @@ void enable_caches(void)
#endif
#ifdef CONFIG_DISPLAY_CPUINFO
-#ifndef CONFIG_RZA1
+#if !defined(CONFIG_RZA1) && !defined(CONFIG_RZN1)
__weak const u8 *rzg_get_cpu_name(void)
{
return 0;
@@ -126,11 +126,17 @@ int print_cpuinfo(void)
return 0;
}
-#else
+#elif defined(CONFIG_RZA1)
int print_cpuinfo(void)
{
printf("CPU: Renesas Electronics RZ/A1\n");
return 0;
}
+#else /* CONFIG_RZN1 */
+int print_cpuinfo(void)
+{
+ printf("CPU: Renesas Electronics RZ/N1\n");
+ return 0;
+}
#endif
#endif /* CONFIG_DISPLAY_CPUINFO */
--
2.25.1
[PATCH v5 03/10] clk: renesas: add R906G032 driver
Clock driver for the Renesas RZ/N1 SoC family. This is based on
Linux kernel 6.2.y drivers/clk/renesas/r9a06g032-clocks.c as found in
commit 02693e11611e ("clk: renesas: r9a06g032: Repair grave increment error"),
with the following additional patch series applied:
https://lore.kernel.org/linux-renesas-soc/20230301215520.828455-1-ralph.siem...@linaro.org/
Notable difference: this version avoids allocating a 'struct clk'
for each clock source, as this is problematic before relocation.
Instead, it uses the same approach as existing Renesas R-Car Gen2/3
clock drivers, using a temporary structure filled on-the-fly.
Signed-off-by: Ralph Siemsen
Reviewed-by: Marek Vasut
---
Changes in v6:
- add macros for RSTEN register and its bits
Changes in v5:
- eliminate "err" in probe function
Changes in v4:
- commit message now includes hash of Linux upon which this is based
as well as the additional patches (clock table cleanups)
- sync changes from review on linux patches, including
- move RB macro higher up and document it, matching Linux driver
- use multiply/divide instead of shifts for computing reg address
- improve comments for clock gate, descriptor structures
Changes in v3:
- convert data table to explicit reg/bit numbers
- drop the unused scon, mirack, mirstat fields
- added some kernel docs to structures
- use enum for type field of struct r9a06g032_clkdesc
- cleanup macros for one assignment per line
- add a macro for top-most clock ID value ~0
- use dev_dbg() instead of debug/print
- minor reformatting, declarations before code, etc
- !foo instead of foo == 0
- IS_ERR / PTR_ERR where appropriate
- implement div_table handling
- remove some #if 0 old test code
drivers/clk/renesas/Kconfig|6 +
drivers/clk/renesas/Makefile |1 +
drivers/clk/renesas/r9a06g032-clocks.c | 1103
3 files changed, 1110 insertions(+)
create mode 100644 drivers/clk/renesas/r9a06g032-clocks.c
diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig
index bdb81a1bbe..437a82cd48 100644
--- a/drivers/clk/renesas/Kconfig
+++ b/drivers/clk/renesas/Kconfig
@@ -150,3 +150,9 @@ config CLK_R8A779G0
depends on CLK_RCAR_GEN3
help
Enable this to support the clocks on Renesas R8A779G0 SoC.
+
+config CLK_R9A06G032
+ bool "Renesas R9A06G032 clock driver"
+ depends on CLK_RENESAS
+ help
+ Enable this to support the clocks on Renesas R9A06G032 SoC.
diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile
index c95dee67f3..48373e61b9 100644
--- a/drivers/clk/renesas/Makefile
+++ b/drivers/clk/renesas/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
obj-$(CONFIG_CLK_R8A779A0) += r8a779a0-cpg-mssr.o
obj-$(CONFIG_CLK_R8A779F0) += r8a779f0-cpg-mssr.o
obj-$(CONFIG_CLK_R8A779G0) += r8a779g0-cpg-mssr.o
+obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o
diff --git a/drivers/clk/renesas/r9a06g032-clocks.c
b/drivers/clk/renesas/r9a06g032-clocks.c
new file mode 100644
index 00..d2f61236fe
--- /dev/null
+++ b/drivers/clk/renesas/r9a06g032-clocks.c
@@ -0,0 +1,1103 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * R9A06G032 clock driver
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ * Michel Pollet ,
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+
+/**
+ * struct regbit - describe one bit in a register
+ * @reg: offset of register relative to base address,
+ * expressed in units of 32-bit words (not bytes),
+ * @bit: which bit (0 to 31) in the register
+ *
+ * This structure is used to compactly encode the location
+ * of a single bit in a register. Five bits are needed to
+ * encode the bit number. With uint16_t data type, this
+ * leaves 11 bits to encode a register offset up to 2047.
+ *
+ * Since registers are aligned on 32-bit boundaries, the
+ * offset will be specified in 32-bit words rather than bytes.
+ * This allows encoding an offset up to 0x1FFC (8188) bytes.
+ *
+ * Helper macro RB() takes care of converting the register
+ * offset from bytes to 32-bit words.
+ */
+struct regbit {
+ u16 reg:11;
+ u16 bit:5;
+};
+
+#define RB(_reg, _bit) ((struct regbit) { \
+ .reg = (_reg) / 4, \
+ .bit = (_bit) \
+})
+
+/**
+ * struct r9a06g032_gate - clock-related control bits
+ * @gate: clock enable/disable
+ * @reset: clock module reset (active low)
+ * @ready: enables NoC forwarding of read/write requests to device,
+ * (eg. device is ready to handle read/write requests)
+ * @midle: request to idle the NoC interconnect
+ *
+ * Each of these fields describes a single bit in a register,
+ * which controls some aspect of clock gating. The @gate field
+ * is mandatory, this one enables/disables the clock. The
+ * other fields are optional, with zero indicating "not used".
+ *
+ * In most cases there is a @reset bit which needs to
[PATCH v5 09/10] tools: spkgimage: add Renesas SPKG format
Renesas RZ/N1 devices contain BootROM code that loads a custom SPKG
image from QSPI, NAND or USB DFU. Support this format in mkimage tool.
SPKGs can optionally be signed, however creation of signed SPKG is not
currently supported.
Example of how to use it:
tools/mkimage -n board/schneider/rzn1-snarc/spkgimage.cfg \
-T spkgimage -a 0x2004 -e 0x2004 \
-d u-boot.bin u-boot.bin.spkg
The config file (spkgimage.cfg in this example) contains additional
parameters such as NAND ECC settings.
Signed-off-by: Ralph Siemsen
Reviewed-by: Simon Glass
Reviewed-by: Marek Vasut
---
(no changes since v5)
Changes in v5:
- use strcspn() instead of open-coded loop for \n removal
- rename source files to include vendor name
- replace static globals with dynamically allocated structure
- update print_header function signature
Changes in v4:
- added tags
- add RZ/N1 board documentation
- added binman support
Changes in v3:
- provide definition of __packed (as done in kwbimage.h)
- explain why a local copy of roundup() is needed
- document spkgimage in doc/mkimage.1
- add range checks when parsing config file values
- add line numbers for reporting errors in config file
- rename SPKG_HEADER_SIGNATURE to SPKG_HEADER_MARKER
- fix segfault when image is padded by less than 4 bytes
- minor style and typo fixes
Changes in v2:
- rewrote the stand-alone spkg_utility to integrate into mkimage
board/schneider/rzn1-snarc/spkgimage.cfg | 26 ++
boot/image.c | 1 +
doc/mkimage.1| 45 +++
include/image.h | 1 +
tools/Makefile | 1 +
tools/renesas_spkgimage.c| 338 +++
tools/renesas_spkgimage.h| 87 ++
7 files changed, 499 insertions(+)
create mode 100644 board/schneider/rzn1-snarc/spkgimage.cfg
create mode 100644 tools/renesas_spkgimage.c
create mode 100644 tools/renesas_spkgimage.h
diff --git a/board/schneider/rzn1-snarc/spkgimage.cfg
b/board/schneider/rzn1-snarc/spkgimage.cfg
new file mode 100644
index 00..b5faf96b00
--- /dev/null
+++ b/board/schneider/rzn1-snarc/spkgimage.cfg
@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Schneider Electric
+#
+# SPKG image header, for booting on RZ/N1
+
+# b[35:32] SPKG version
+VERSION1
+
+# b[42:41] ECC Block size: 0=256 bytes, 1=512 bytes, 2=1024 bytes
+NAND_ECC_BLOCK_SIZE1
+
+# b[45] NAND enable (boolean)
+NAND_ECC_ENABLE1
+
+# b[50:48] ECC Scheme: 0=BCH2 1=BCH4 2=BCH8 3=BCH16 4=BCH24 5=BCH32
+NAND_ECC_SCHEME3
+
+# b[63:56] ECC bytes per block
+NAND_BYTES_PER_ECC_BLOCK 28
+
+# Provide dummy BLp header (boolean)
+ADD_DUMMY_BLP 1
+
+# Pad the image to a multiple of
+PADDING64K
diff --git a/boot/image.c b/boot/image.c
index 958dbf8534..5c4f9b807d 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -181,6 +181,7 @@ static const table_entry_t uimage_type[] = {
{ IH_TYPE_SUNXI_EGON, "sunxi_egon", "Allwinner eGON Boot Image"
},
{ IH_TYPE_SUNXI_TOC0, "sunxi_toc0", "Allwinner TOC0 Boot Image"
},
{ IH_TYPE_FDT_LEGACY, "fdt_legacy", "legacy Image with Flat
Device Tree ", },
+ { IH_TYPE_RENESAS_SPKG, "spkgimage", "Renesas SPKG Image" },
{ -1, "", "", },
};
diff --git a/doc/mkimage.1 b/doc/mkimage.1
index d8727ec73c..76c7859bb0 100644
--- a/doc/mkimage.1
+++ b/doc/mkimage.1
@@ -662,6 +662,51 @@ rk3568
.TE
.RE
.
+.SS spkgimage
+The primary configuration file consists of lines containing key/value pairs
+delimited by whitespace. An example follows.
+.PP
+.RS
+.EX
+# Comments and blank lines may be used
+.I key1 value1
+.I key2 value2
+.EE
+.RE
+.P
+The supported
+.I key
+types are as follows.
+.TP
+.B VERSION
+.TQ
+.B NAND_ECC_BLOCK_SIZE
+.TQ
+.B NAND_ECC_ENABLE
+.TQ
+.B NAND_ECC_SCHEME
+.TQ
+.B NAND_BYTES_PER_ECC_BLOCK
+These all take a positive integer value as their argument.
+The value will be copied directly into the respective field
+of the SPKG header structure. For details on these values,
+refer to Section 7.4 of the Renesas RZ/N1 User's Manual.
+.
+.TP
+.B ADD_DUMMY_BLP
+Takes a numeric argument, which is treated as a boolean. Any nonzero
+value will cause a fake BLp security header to be included in the SPKG
+output.
+.
+.TP
+.B PADDING
+Takes a positive integer value, with an optional
+.B K
+or
+.B M
+suffix, indicating KiB / MiB respectively.
+The output SPKG file will be padded to a multiple of this value.
+.
.SS sunxi_egon
The primary configuration is the name to use for the device tree.
.
diff --git a/include/image.h b/include/image.h
index 456197d6fd..01a6787d21 100644
--- a/include/image.h
+++ b/include/image.h
@@ -230,6 +230,7 @@ enum image_type_t {
IH_TYPE_SUNXI_EGON, /* Allwinner eGON Boot Image */
IH
[PATCH v5 10/10] doc: renesas: add Renesas board docs
As a starting point, list all currently supported Renesas boards. For the RZ/N1 board, add details about booting and flashing. Signed-off-by: Ralph Siemsen Reviewed-by: Marek Vasut --- (no changes since v5) Changes in v5: - added renesas dir to doc/board/index.rst - corrections to list of Renesas boards - move RZ/N1 detail into its own file - moved binman description ahead of mkimage doc/board/index.rst | 1 + doc/board/renesas/index.rst | 10 + doc/board/renesas/renesas.rst | 45 doc/board/renesas/rzn1.rst| 77 +++ 4 files changed, 133 insertions(+) create mode 100644 doc/board/renesas/index.rst create mode 100644 doc/board/renesas/renesas.rst create mode 100644 doc/board/renesas/rzn1.rst diff --git a/doc/board/index.rst b/doc/board/index.rst index b2da6ec553..9040e16e01 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -33,6 +33,7 @@ Board-specific doc openpiton/index purism/index qualcomm/index + renesas/index rockchip/index samsung/index siemens/index diff --git a/doc/board/renesas/index.rst b/doc/board/renesas/index.rst new file mode 100644 index 00..fb6558ec11 --- /dev/null +++ b/doc/board/renesas/index.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Renesas +=== + +.. toctree:: + :maxdepth: 2 + + renesas + rzn1 diff --git a/doc/board/renesas/renesas.rst b/doc/board/renesas/renesas.rst new file mode 100644 index 00..04dee8da24 --- /dev/null +++ b/doc/board/renesas/renesas.rst @@ -0,0 +1,45 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Renesas +=== + +About this +-- + +This document describes the information about Renesas supported boards +and their usage steps. + +Renesas boards +-- + +Renesas is a SoC solutions provider for automotive and industrial applications. + +U-Boot supports several Renesas SoC families: + +* R-Car Gen2 (32-bit) +- Blanche board +- Gose board +- Koelsch board +- Lager board +- Silk board +- Porter board +- Stout board +* R-Car Gen3 (64-bit) +- Condor board +- Draak board +- Eagle board +- Ebisu board +- Salvator-X and Salvator-XS boards +- ULCB board +* R-Car Gen4 (64-bit) +- Falcon board +- Spider board +- Whitehawk board +* RZ/A1 (32-bit) +- GR-PEACH board +* RZ/G +- Beacon-rzg2 board +- Hihope-rzg2 board +- ek874 board +* RZ/N1 (32-bit) +- Schneider rzn1-snarc board diff --git a/doc/board/renesas/rzn1.rst b/doc/board/renesas/rzn1.rst new file mode 100644 index 00..2750629e81 --- /dev/null +++ b/doc/board/renesas/rzn1.rst @@ -0,0 +1,77 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Renesas RZ/N1 += + +Building + + +This document describes how to build and flash U-Boot for the RZ/N1. + +U-Boot +^^ + +Clone the U-Boot repository and build it as follows: + +.. code-block:: bash + +git clone --depth 1 https://source.denx.de/u-boot/u-boot.git +cd u-boot +make rzn1_snarc_defconfig +make CROSS_COMPILE=arm-linux-gnu- + +This produces `u-boot` which is an ELF executable, suitable for use with `gdb` +and JTAG debugging tools. + +It also produceds `u-boot.bin` which is a raw binary. + +Binman +^^ + +The BootROM in the RZ/N1 SoC expects to find the boot image in SPKG format. +This format is documented in Chapter 7.4 of the RZ/N1 User Manual. + +The `binman` tool may be used to generate the SPKG format for booting. +This tool and its pre-requisites must be installed as per +:doc:`../../../tools/binman/binman.rst`` + +.. code-block:: bash + +binman -d arch/arm/dts/r9a06g032-rzn1-snarc.dtb -o + +This will produce `u-boot.bin.spkg` in the specified directory. It can +then be flashed into QSPI, NAND, or loaded via USB-DFU mode. + +SPKG image +^^ + +Alternatively, the same SPKG image can be built by calling `mkimage` as follows: + +.. code-block:: bash + +tools/mkimage -n board/schneider/rzn1-snarc/spkgimage.cfg \ +-T spkgimage -a 0x2004 -e 0x2004 \ +-d u-boot.bin u-boot.bin.spkg + +This produces `u-boot.bin.spkg` which can be flashed into QSPI, NAND, or loaded +via USB-DFU mode. + +Take note of the load and execution address, which are encoded into the SPKG +headers. For development convenience, mkimage computes the execution offset +(part of the SPKG header) by subtracting the supplied load address from the +supplied execution address. + +Also note there are other parameters, notably ECC configuration in the case of +boot from NAND, specified in the `spkgimage.cfg` configuration file. + +Flashing + + +The RZ/N1 is able to boot from QSPI, NAND, or via USB (DFU). In all cases the +on-board BootROM expects for the binary to be wrapped with a "SPKG" header. + +It is possible to recover a bricked unit by using the USB (DFU) boot mode. This +allows uploading U-Boot into the internal RAM. Thereafter U-Boot ca
