Re: [PATCH] mtd: rawnand: omap_gpmc: remove unneeded variable
On Tue, Nov 14, 2023 at 8:48 AM Heiko Schocher wrote:
>
> remove unneeded variable ecc_flag in omap_correct_data_bch
>
> Signed-off-by: Heiko Schocher
> ---
> azure build is fine with this patch:
>
> https://dev.azure.com/hs0298/hs/_build/results?buildId=110=results
>
> drivers/mtd/nand/raw/omap_gpmc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c
> b/drivers/mtd/nand/raw/omap_gpmc.c
> index 1a5ed0de31..1fe8b1671e 100644
> --- a/drivers/mtd/nand/raw/omap_gpmc.c
> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
> @@ -637,13 +637,13 @@ static int omap_correct_data_bch(struct mtd_info *mtd,
> uint8_t *dat,
> uint32_t error_count = 0, error_max;
> uint32_t error_loc[ELM_MAX_ERROR_COUNT];
> enum bch_level bch_type;
> - uint32_t i, ecc_flag = 0;
> + uint32_t i;
> uint8_t count;
> uint32_t byte_pos, bit_pos;
> int err = 0;
>
> /* check calculated ecc */
> - for (i = 0; i < ecc->bytes && !ecc_flag; i++) {
> + for (i = 0; i < ecc->bytes; i++) {
> if (calc_ecc[i] != 0x00)
> goto not_ecc_match;
> }
> --
> 2.37.3
>
Reviewed-by: Michael Trimarchi
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com
[PATCH] mtd: rawnand: omap_gpmc: remove unneeded variable
remove unneeded variable ecc_flag in omap_correct_data_bch
Signed-off-by: Heiko Schocher
---
azure build is fine with this patch:
https://dev.azure.com/hs0298/hs/_build/results?buildId=110=results
drivers/mtd/nand/raw/omap_gpmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 1a5ed0de31..1fe8b1671e 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -637,13 +637,13 @@ static int omap_correct_data_bch(struct mtd_info *mtd,
uint8_t *dat,
uint32_t error_count = 0, error_max;
uint32_t error_loc[ELM_MAX_ERROR_COUNT];
enum bch_level bch_type;
- uint32_t i, ecc_flag = 0;
+ uint32_t i;
uint8_t count;
uint32_t byte_pos, bit_pos;
int err = 0;
/* check calculated ecc */
- for (i = 0; i < ecc->bytes && !ecc_flag; i++) {
+ for (i = 0; i < ecc->bytes; i++) {
if (calc_ecc[i] != 0x00)
goto not_ecc_match;
}
--
2.37.3
Re: [PATCH] riscv: binman: fix the load field format
Hi Simon,
Thanks a lot.
On Fri, Nov 10, 2023 at 04:50:24AM -0700, Simon Glass wrote:
> Hi Randolph,
>
> On Wed, Nov 8, 2023, 20:15 Randolph wrote:
> >
> > The #address-cells is now equal to 2. The format of the load field for
> > the Linux kernel doesn't match.
> >
> > Signed-off-by: Randolph
> > ---
> > arch/riscv/dts/binman.dtsi | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
> > index 6b4eb8dc7b..5117d7c8c9 100644
> > --- a/arch/riscv/dts/binman.dtsi
> > +++ b/arch/riscv/dts/binman.dtsi
> > @@ -50,7 +50,8 @@
> > os = "Linux";
> > arch = "riscv";
> > compression = "none";
> > - load = ;
> > + load =
> > > +
> > U64_TO_U32_L(CONFIG_TEXT_BASE)>;
>
I just see the #address-cells changed from 1 to 2 in commit id: 5a348ccf0257.
In my last commit for binman.dtsi (commit id: d311df8b3169), it is based on
the value of #address-cells being 1. That's the reason for my patch submission.
> Does this work?
>
> load = /bits 64/
>
Yes, it works. We use this way for the DDR memory start address above 4G
platform. We find the example for 64bit address in the document
tools/binman/binman.rst and use it.
What is the method that we should continue to use in the binman.dtsi?
1. #address-cells = 2
2. append /bits/64
> >
> > linux_blob: blob-ext {
> > filename = "Image";
> > --
> > 2.34.1
> >
>
> Regards,
> Simon
Re: [PATCH] arm: dts: k3-j7200: Sync with Linux 6.7-rc1
Thanks Reid for sync.
On 11/14/2023 2:13 AM, Reid Tonking wrote:
Sync u-boot device tree with Linux kernel 6.7-rc1
Signed-off-by: Reid Tonking
---
Boot-log: https://gist.github.com/reidt1/db5426f2a778369db8c3699cf293b94f
arch/arm/dts/k3-j7200-main.dtsi | 2 +-
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 9 -
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index cdb1d6b2a9..264913f832 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -91,7 +91,7 @@
};
main_navss: bus@3000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x3000 0x00 0x3000 0x00 0x0c40>;
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 6ffaf85fa6..3fc588b848 100644
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -318,7 +318,7 @@
};
mcu_navss: bus@2838 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x2838 0x00 0x2838 0x00 0x0388>;
@@ -637,4 +637,11 @@
power-domains = <_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@4080 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4080 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
Please take care of actual usage of this node
https://lore.kernel.org/all/20231003081038.24299-10-j-keer...@ti.com/
https://lore.kernel.org/all/20231003081038.24299-11-j-keer...@ti.com/
https://lore.kernel.org/all/838b07a0-8490-c05b-b08f-3ab6d3e17...@ti.com/
[PATCH v4 4/6] spi: spi-uclass: Read chipselect and restrict capabilities
From: Ashok Reddy Soma
Read chipselect properties from DT which are populated using 'reg'
property and save it in plat->cs[] array for later use.
Also read multi chipselect capability which is used for
parallel-memories and return errors if they are passed on using DT but
driver is not capable of handling it.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/mtd/spi/sandbox.c| 2 +-
drivers/spi/altera_spi.c | 4 ++--
drivers/spi/atcspi200_spi.c | 2 +-
drivers/spi/ath79_spi.c | 2 +-
drivers/spi/atmel_spi.c | 6 +++---
drivers/spi/bcm63xx_hsspi.c | 42 ++--
drivers/spi/bcm63xx_spi.c| 6 +++---
drivers/spi/bcmbca_hsspi.c | 34 ++---
drivers/spi/cf_spi.c | 6 +++---
drivers/spi/davinci_spi.c| 6 +++---
drivers/spi/fsl_dspi.c | 18
drivers/spi/fsl_espi.c | 4 ++--
drivers/spi/fsl_qspi.c | 4 ++--
drivers/spi/gxp_spi.c| 2 +-
drivers/spi/mpc8xx_spi.c | 4 ++--
drivers/spi/mpc8xxx_spi.c| 10 -
drivers/spi/mscc_bb_spi.c| 4 ++--
drivers/spi/mxc_spi.c| 6 +++---
drivers/spi/npcm_fiu_spi.c | 14 ++--
drivers/spi/nxp_fspi.c | 2 +-
drivers/spi/octeon_spi.c | 2 +-
drivers/spi/omap3_spi.c | 4 ++--
drivers/spi/pic32_spi.c | 2 +-
drivers/spi/rk_spi.c | 4 ++--
drivers/spi/rockchip_sfc.c | 2 +-
drivers/spi/spi-aspeed-smc.c | 28
drivers/spi/spi-mxic.c | 6 +++---
drivers/spi/spi-qup.c| 4 ++--
drivers/spi/spi-sifive.c | 6 +++---
drivers/spi/spi-sn-f-ospi.c | 2 +-
drivers/spi/spi-sunxi.c | 6 +++---
drivers/spi/spi-synquacer.c | 4 ++--
drivers/spi/spi-uclass.c | 23 +++-
drivers/spi/stm32_qspi.c | 2 +-
drivers/spi/stm32_spi.c | 4 ++--
drivers/spi/ti_qspi.c| 14 ++--
drivers/spi/xilinx_spi.c | 4 ++--
drivers/spi/zynq_qspi.c | 6 +++---
drivers/spi/zynq_spi.c | 6 +++---
include/spi.h| 2 +-
lib/acpi/acpi_device.c | 2 +-
41 files changed, 162 insertions(+), 149 deletions(-)
diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c
index 4fe547171a..72036d5a88 100644
--- a/drivers/mtd/spi/sandbox.c
+++ b/drivers/mtd/spi/sandbox.c
@@ -139,7 +139,7 @@ static int sandbox_sf_probe(struct udevice *dev)
return ret;
}
slave_plat = dev_get_parent_plat(dev);
- cs = slave_plat->cs;
+ cs = slave_plat->cs[0];
debug("found at cs %d\n", cs);
if (!pdata->filename) {
diff --git a/drivers/spi/altera_spi.c b/drivers/spi/altera_spi.c
index 989679e881..48782f81c1 100644
--- a/drivers/spi/altera_spi.c
+++ b/drivers/spi/altera_spi.c
@@ -96,7 +96,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned int
bitlen,
uint32_t reg, data, start;
debug("%s: bus:%i cs:%i bitlen:%i bytes:%i flags:%lx\n", __func__,
- dev_seq(bus), slave_plat->cs, bitlen, bytes, flags);
+ dev_seq(bus), slave_plat->cs[0], bitlen, bytes, flags);
if (bitlen == 0)
goto done;
@@ -111,7 +111,7 @@ static int altera_spi_xfer(struct udevice *dev, unsigned
int bitlen,
readl(>rxdata);
if (flags & SPI_XFER_BEGIN)
- spi_cs_activate(dev, slave_plat->cs);
+ spi_cs_activate(dev, slave_plat->cs[0]);
while (bytes--) {
if (txp)
diff --git a/drivers/spi/atcspi200_spi.c b/drivers/spi/atcspi200_spi.c
index de9c14837c..acee743653 100644
--- a/drivers/spi/atcspi200_spi.c
+++ b/drivers/spi/atcspi200_spi.c
@@ -321,7 +321,7 @@ static int atcspi200_spi_claim_bus(struct udevice *dev)
struct udevice *bus = dev->parent;
struct nds_spi_slave *ns = dev_get_priv(bus);
- if (slave_plat->cs >= ns->num_cs) {
+ if (slave_plat->cs[0] >= ns->num_cs) {
printf("Invalid SPI chipselect\n");
return -EINVAL;
}
diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c
index 205567ef54..ad10cec2a6 100644
--- a/drivers/spi/ath79_spi.c
+++ b/drivers/spi/ath79_spi.c
@@ -74,7 +74,7 @@ static int ath79_spi_xfer(struct udevice *dev, unsigned int
bitlen,
if (restbits)
bytes++;
- out = AR71XX_SPI_IOC_CS_ALL & ~(AR71XX_SPI_IOC_CS(slave->cs));
+ out = AR71XX_SPI_IOC_CS_ALL & ~(AR71XX_SPI_IOC_CS(slave->cs[0]));
while (bytes > 0) {
bytes--;
curbyte = 0;
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index aec6f4eca9..e2de39d1ef 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -126,7 +126,7 @@ static int atmel_spi_claim_bus(struct udevice *dev)
struct atmel_spi_priv *priv = dev_get_priv(bus);
struct dm_spi_slave_plat *slave_plat = dev_get_parent_plat(dev);
struct at91_spi *reg_base =
[PATCH v4 6/6] spi: zynq_qspi: Add parallel memories support in QSPI driver
Add support for parallel memories in zynq_qspi.c driver. In case of
parallel memories STRIPE bit is set and sent to the qspi ip, which will
send data bits to both the flashes in parallel. However for few commands
we should not use stripe, instead send same data to both the flashes.
Those commands are exclueded by using zynqmp_qspi_update_stripe().
Also update copyright info for this file.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/spi/zynq_qspi.c | 114
1 file changed, 103 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/zynq_qspi.c b/drivers/spi/zynq_qspi.c
index 069d2a77de..90c94b1393 100644
--- a/drivers/spi/zynq_qspi.c
+++ b/drivers/spi/zynq_qspi.c
@@ -1,7 +1,8 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * (C) Copyright 2013 Xilinx, Inc.
+ * (C) Copyright 2013 - 2022, Xilinx, Inc.
* (C) Copyright 2015 Jagan Teki
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
*
* Xilinx Zynq Quad-SPI(QSPI) controller driver (master mode only)
*/
@@ -13,10 +14,12 @@
#include
#include
#include
+#include
#include
#include
#include
#include
+#include "../mtd/spi/sf_internal.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,21 @@ DECLARE_GLOBAL_DATA_PTR;
#define ZYNQ_QSPI_TXD_00_01_OFFSET 0x80/* Transmit 1-byte inst */
#define ZYNQ_QSPI_TXD_00_10_OFFSET 0x84/* Transmit 2-byte inst */
#define ZYNQ_QSPI_TXD_00_11_OFFSET 0x88/* Transmit 3-byte inst */
+#define ZYNQ_QSPI_FR_QOUT_CODE 0x6B/* read instruction code */
+
+#define QSPI_SELECT_LOWER_CSBIT(0)
+#define QSPI_SELECT_UPPER_CSBIT(1)
+
+/*
+ * QSPI Linear Configuration Register
+ *
+ * It is named Linear Configuration but it controls other modes when not in
+ * linear mode also.
+ */
+#define ZYNQ_QSPI_LCFG_TWO_MEM_MASK 0x4000 /* QSPI Enable Bit Mask */
+#define ZYNQ_QSPI_LCFG_SEP_BUS_MASK 0x2000 /* QSPI Enable Bit Mask */
+#define ZYNQ_QSPI_LCFG_U_PAGE 0x1000 /* QSPI Upper memory set */
+#define ZYNQ_QSPI_LCFG_DUMMY_SHIFT 8
#define ZYNQ_QSPI_TXFIFO_THRESHOLD 1 /* Tx FIFO threshold level*/
#define ZYNQ_QSPI_RXFIFO_THRESHOLD 32 /* Rx FIFO threshold level */
@@ -101,7 +119,11 @@ struct zynq_qspi_priv {
int bytes_to_transfer;
int bytes_to_receive;
unsigned int is_inst;
+ unsigned int is_parallel;
+ unsigned int is_stacked;
+ unsigned int u_page;
unsigned cs_change:1;
+ unsigned is_strip:1;
};
static int zynq_qspi_of_to_plat(struct udevice *bus)
@@ -112,7 +134,6 @@ static int zynq_qspi_of_to_plat(struct udevice *bus)
plat->regs = (struct zynq_qspi_regs *)fdtdec_get_addr(blob,
node, "reg");
-
return 0;
}
@@ -147,6 +168,9 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv)
/* Disable Interrupts */
writel(ZYNQ_QSPI_IXR_ALL_MASK, >idr);
+ /* Disable linear mode as the boot loader may have used it */
+ writel(0x0, >lqspicfg);
+
/* Clear the TX and RX threshold reg */
writel(ZYNQ_QSPI_TXFIFO_THRESHOLD, >txftr);
writel(ZYNQ_QSPI_RXFIFO_THRESHOLD, >rxftr);
@@ -164,12 +188,11 @@ static void zynq_qspi_init_hw(struct zynq_qspi_priv *priv)
confr |= ZYNQ_QSPI_CR_IFMODE_MASK | ZYNQ_QSPI_CR_MCS_MASK |
ZYNQ_QSPI_CR_PCS_MASK | ZYNQ_QSPI_CR_FW_MASK |
ZYNQ_QSPI_CR_MSTREN_MASK;
- writel(confr, >cr);
- /* Disable the LQSPI feature */
- confr = readl(>lqspicfg);
- confr &= ~ZYNQ_QSPI_LQSPICFG_LQMODE_MASK;
- writel(confr, >lqspicfg);
+ if (priv->is_stacked)
+ confr |= 0x10;
+
+ writel(confr, >cr);
/* Enable SPI */
writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, >enr);
@@ -181,6 +204,7 @@ static int zynq_qspi_child_pre_probe(struct udevice *bus)
struct zynq_qspi_priv *priv = dev_get_priv(bus->parent);
priv->max_hz = slave->max_hz;
+ slave->multi_cs_cap = true;
return 0;
}
@@ -363,8 +387,8 @@ static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv
*priv, u32 size)
unsigned len, offset;
struct zynq_qspi_regs *regs = priv->regs;
static const unsigned offsets[4] = {
- ZYNQ_QSPI_TXD_00_00_OFFSET, ZYNQ_QSPI_TXD_00_01_OFFSET,
- ZYNQ_QSPI_TXD_00_10_OFFSET, ZYNQ_QSPI_TXD_00_11_OFFSET };
+ ZYNQ_QSPI_TXD_00_01_OFFSET, ZYNQ_QSPI_TXD_00_10_OFFSET,
+ ZYNQ_QSPI_TXD_00_11_OFFSET, ZYNQ_QSPI_TXD_00_00_OFFSET };
while ((fifocount < size) &&
(priv->bytes_to_transfer > 0)) {
@@ -386,7 +410,11 @@ static void zynq_qspi_fill_tx_fifo(struct zynq_qspi_priv
*priv, u32 size)
return;
len = priv->bytes_to_transfer;
zynq_qspi_write_data(priv, , len);
-
[PATCH v4 5/6] spi: zynqmp_gqspi: Add parallel memories support in GQSPI driver
Add support for parallel memories in zynqmp_gqspi.c driver. In case of
parallel memories STRIPE bit is set and sent to the qspi ip, which will
send data bits to both the flashes in parallel. However for few commands
we should not use stripe, instead send same data to both the flashes.
Those commands are exclueded by using zynqmp_qspi_update_stripe().
Also update copyright info for this file.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/spi/zynqmp_gqspi.c | 140 -
include/spi.h | 12
2 files changed, 136 insertions(+), 16 deletions(-)
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index a323994fb2..7e90a989dd 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * (C) Copyright 2018 Xilinx
+ * (C) Copyright 2013 - 2022, Xilinx, Inc.
+ * (C) Copyright 2023, Advanced Micro Devices, Inc.
*
* Xilinx ZynqMP Generic Quad-SPI(QSPI) controller driver(master mode only)
*/
@@ -25,6 +26,8 @@
#include
#include
#include
+#include
+#include "../mtd/spi/sf_internal.h"
#include
#define GQSPI_GFIFO_STRT_MODE_MASK BIT(29)
@@ -88,6 +91,9 @@
#define SPI_XFER_ON_LOWER 1
#define SPI_XFER_ON_UPPER 2
+#define GQSPI_SELECT_LOWER_CS BIT(0)
+#define GQSPI_SELECT_UPPER_CS BIT(1)
+
#define GQSPI_DMA_ALIGN0x4
#define GQSPI_MAX_BAUD_RATE_VAL7
#define GQSPI_DFLT_BAUD_RATE_VAL 2
@@ -183,13 +189,14 @@ struct zynqmp_qspi_priv {
int bytes_to_transfer;
int bytes_to_receive;
const struct spi_mem_op *op;
+ unsigned int is_parallel;
+ unsigned int u_page;
+ unsigned int bus;
+ unsigned int stripe;
+ unsigned int flags;
+ u32 max_hz;
};
-__weak int zynqmp_mmio_write(const u32 address, const u32 mask, const u32
value)
-{
- return 0;
-}
-
static int zynqmp_qspi_of_to_plat(struct udevice *bus)
{
struct zynqmp_qspi_plat *plat = dev_get_plat(bus);
@@ -234,9 +241,30 @@ static u32 zynqmp_qspi_bus_select(struct zynqmp_qspi_priv
*priv)
{
u32 gqspi_fifo_reg = 0;
- gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS |
-GQSPI_GFIFO_CS_LOWER;
-
+ if (priv->is_parallel) {
+ if (priv->bus == SPI_XFER_ON_BOTH)
+ gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS |
+GQSPI_GFIFO_UP_BUS |
+GQSPI_GFIFO_CS_UPPER |
+GQSPI_GFIFO_CS_LOWER;
+ else if (priv->bus == SPI_XFER_ON_LOWER)
+ gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS |
+GQSPI_GFIFO_CS_UPPER |
+GQSPI_GFIFO_CS_LOWER;
+ else if (priv->bus == SPI_XFER_ON_UPPER)
+ gqspi_fifo_reg = GQSPI_GFIFO_UP_BUS |
+GQSPI_GFIFO_CS_LOWER |
+GQSPI_GFIFO_CS_UPPER;
+ else
+ debug("Wrong Bus selection:0x%x\n", priv->bus);
+ } else {
+ if (priv->u_page)
+ gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS |
+GQSPI_GFIFO_CS_UPPER;
+ else
+ gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS |
+GQSPI_GFIFO_CS_LOWER;
+ }
return gqspi_fifo_reg;
}
@@ -295,8 +323,14 @@ static void zynqmp_qspi_chipselect(struct zynqmp_qspi_priv
*priv, int is_on)
gqspi_fifo_reg |= GQSPI_SPI_MODE_SPI |
GQSPI_IMD_DATA_CS_ASSERT;
} else {
- gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS;
- gqspi_fifo_reg |= GQSPI_IMD_DATA_CS_DEASSERT;
+ if (priv->is_parallel)
+ gqspi_fifo_reg = GQSPI_GFIFO_UP_BUS |
+GQSPI_GFIFO_LOW_BUS;
+ else if (priv->u_page)
+ gqspi_fifo_reg = GQSPI_GFIFO_UP_BUS;
+ else
+ gqspi_fifo_reg = GQSPI_GFIFO_LOW_BUS;
+ gqspi_fifo_reg |= GQSPI_IMD_DATA_CS_DEASSERT;
}
zynqmp_qspi_fill_gen_fifo(priv, gqspi_fifo_reg);
@@ -366,12 +400,13 @@ static int zynqmp_qspi_set_speed(struct udevice *bus,
uint speed)
log_debug("%s, Speed: %d, Max: %d\n", __func__, speed, plat->frequency);
- if (speed > plat->frequency)
- speed = plat->frequency;
+ /*
+* If speed == 0 or speed > max freq, then set speed to highest
+*/
+ if (!speed || speed > priv->max_hz)
+ speed = priv->max_hz;
if (plat->speed_hz != speed) {
- /* Set the clock frequency */
-
[PATCH v4 3/6] mtd: spi-nor: Add parallel and stacked memories support in read_bar and write_bar
From: Ashok Reddy Soma
Add support for parallel memories and stacked memories configuration
in read_bar and write_bar functions.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/mtd/spi/spi-nor-core.c | 55 +-
1 file changed, 47 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index c1c9d007f9..d245d5e415 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -885,12 +885,32 @@ static int clean_bar(struct spi_nor *nor)
static int write_bar(struct spi_nor *nor, u32 offset)
{
- u8 cmd, bank_sel;
+ u8 cmd, bank_sel, upage_curr;
int ret;
+ struct mtd_info *mtd = >mtd;
+
+ /* Wait until previous write command is finished */
+ if (spi_nor_wait_till_ready(nor))
+ return 1;
+
+ if (nor->flags & (SNOR_F_HAS_PARALLEL | SNOR_F_HAS_STACKED) &&
+ mtd->size <= SZ_32M)
+ return 0;
+
+ if (mtd->size <= SZ_16M)
+ return 0;
+
+ offset = offset % (u32)mtd->size;
+ bank_sel = offset >> 24;
- bank_sel = offset / SZ_16M;
- if (bank_sel == nor->bank_curr)
- goto bar_end;
+ upage_curr = nor->spi->flags & SPI_XFER_U_PAGE;
+
+ if (!(nor->flags & SNOR_F_HAS_STACKED) && bank_sel == nor->bank_curr)
+ return 0;
+ else if (upage_curr == nor->upage_prev && bank_sel == nor->bank_curr)
+ return 0;
+ else
+ nor->upage_prev = upage_curr;
cmd = nor->bank_write_cmd;
write_enable(nor);
@@ -900,15 +920,19 @@ static int write_bar(struct spi_nor *nor, u32 offset)
return ret;
}
-bar_end:
nor->bank_curr = bank_sel;
- return nor->bank_curr;
+
+ return write_disable(nor);
}
static int read_bar(struct spi_nor *nor, const struct flash_info *info)
{
u8 curr_bank = 0;
int ret;
+ struct mtd_info *mtd = >mtd;
+
+ if (mtd->size <= SZ_16M)
+ return 0;
switch (JEDEC_MFR(info)) {
case SNOR_MFR_SPANSION:
@@ -920,15 +944,30 @@ static int read_bar(struct spi_nor *nor, const struct
flash_info *info)
nor->bank_write_cmd = SPINOR_OP_WREAR;
}
+ if (nor->flags & SNOR_F_HAS_PARALLEL)
+ nor->spi->flags |= SPI_XFER_LOWER;
+
ret = nor->read_reg(nor, nor->bank_read_cmd,
- _bank, 1);
+ _bank, 1);
if (ret) {
debug("SF: fail to read bank addr register\n");
return ret;
}
nor->bank_curr = curr_bank;
- return 0;
+ // Make sure both chips use the same BAR
+ if (nor->flags & SNOR_F_HAS_PARALLEL) {
+ write_enable(nor);
+ ret = nor->write_reg(nor, nor->bank_write_cmd, _bank, 1);
+ if (ret)
+ return ret;
+
+ ret = write_disable(nor);
+ if (ret)
+ return ret;
+ }
+
+ return ret;
}
#endif
--
2.17.1
[PATCH v4 2/6] mtd: spi-nor: Add parallel memories support for read_sr and read_fsr
From: Ashok Reddy Soma
Add support for parallel memories flash configuration in read status
register and read flag status register functions.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/mtd/spi/spi-nor-core.c | 50 --
1 file changed, 36 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 2f49ca3365..c1c9d007f9 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -438,8 +438,9 @@ static ssize_t spi_nor_write_data(struct spi_nor *nor,
loff_t to, size_t len,
}
/*
- * Read the status register, returning its value in the location
- * Return the status register value.
+ * Return the status register value. If the chip is parallel, then the
+ * read will be striped, so we should read 2 bytes to get the sr
+ * register value from both of the parallel chips.
* Returns negative if error occurred.
*/
static int read_sr(struct spi_nor *nor)
@@ -471,18 +472,29 @@ static int read_sr(struct spi_nor *nor)
if (spi_nor_protocol_is_dtr(nor->reg_proto))
op.data.nbytes = 2;
- ret = spi_nor_read_write_reg(nor, , val);
- if (ret < 0) {
- pr_debug("error %d reading SR\n", (int)ret);
- return ret;
+ if (nor->flags & SNOR_F_HAS_PARALLEL) {
+ op.data.nbytes = 2;
+ ret = spi_nor_read_write_reg(nor, , [0]);
+ if (ret < 0) {
+ pr_debug("error %d reading SR\n", (int)ret);
+ return ret;
+ }
+ val[0] |= val[1];
+ } else {
+ ret = spi_nor_read_write_reg(nor, , [0]);
+ if (ret < 0) {
+ pr_debug("error %d reading SR\n", (int)ret);
+ return ret;
+ }
}
- return *val;
+ return val[0];
}
/*
- * Read the flag status register, returning its value in the location
- * Return the status register value.
+ * Return the flag status register value. If the chip is parallel, then
+ * the read will be striped, so we should read 2 bytes to get the fsr
+ * register value from both of the parallel chips.
* Returns negative if error occurred.
*/
static int read_fsr(struct spi_nor *nor)
@@ -514,13 +526,23 @@ static int read_fsr(struct spi_nor *nor)
if (spi_nor_protocol_is_dtr(nor->reg_proto))
op.data.nbytes = 2;
- ret = spi_nor_read_write_reg(nor, , val);
- if (ret < 0) {
- pr_debug("error %d reading FSR\n", ret);
- return ret;
+ if (nor->flags & SNOR_F_HAS_PARALLEL) {
+ op.data.nbytes = 2;
+ ret = spi_nor_read_write_reg(nor, , [0]);
+ if (ret < 0) {
+ pr_debug("error %d reading SR\n", (int)ret);
+ return ret;
+ }
+ val[0] &= val[1];
+ } else {
+ ret = spi_nor_read_write_reg(nor, , [0]);
+ if (ret < 0) {
+ pr_debug("error %d reading FSR\n", ret);
+ return ret;
+ }
}
- return *val;
+ return val[0];
}
/*
--
2.17.1
[PATCH v4 1/6] mtd: spi-nor: Add parallel and stacked memories support
From: Ashok Reddy Soma
In parallel mode, the current implementation assumes that a maximum of
two flashes are connected. The QSPI controller splits the data evenly
between both the flashes so, both the flashes that are connected in
parallel mode should be identical.
During each operation SPI-NOR sets 0th bit for CS0 & 1st bit for CS1 in
nor->flags.
In stacked mode the current implementation assumes that a maximum of two
flashes are connected and both the flashes are of same make but can
differ in sizes. So, except the sizes all other flash parameters of both
the flashes are identical
Spi-nor will pass on the appropriate flash select flag to low level
driver, and it will select pass all the data to that particular flash.
Write operation in parallel mode are performed in page size * 2 chunks as
each write operation results in writing both the flashes. For doubling
the address space each operation is performed at addr/2 flash offset,
where addr is the address specified by the user.
Similarly for read and erase operations it will read from both flashes,
so size and offset are divided by 2 and send to flash.
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Venkatesh Yadav Abbarapu
---
drivers/mtd/spi/spi-nor-core.c | 284 +
include/linux/mtd/spi-nor.h| 13 ++
include/spi.h | 12 ++
3 files changed, 281 insertions(+), 28 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 9a1801ba93..2f49ca3365 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -639,12 +639,17 @@ static u8 spi_nor_convert_3to4_erase(u8 opcode)
static void spi_nor_set_4byte_opcodes(struct spi_nor *nor,
const struct flash_info *info)
{
+ bool shift = 0;
+
+ if (nor->flags & SNOR_F_HAS_PARALLEL)
+ shift = 1;
+
/* Do some manufacturer fixups first */
switch (JEDEC_MFR(info)) {
case SNOR_MFR_SPANSION:
/* No small sector erase for 4-byte command set */
nor->erase_opcode = SPINOR_OP_SE;
- nor->mtd.erasesize = info->sector_size;
+ nor->mtd.erasesize = info->sector_size << shift;
break;
default:
@@ -965,8 +970,8 @@ static int spi_nor_erase_sector(struct spi_nor *nor, u32
addr)
static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr)
{
struct spi_nor *nor = mtd_to_spi_nor(mtd);
+ u32 addr, len, rem, offset;
bool addr_known = false;
- u32 addr, len, rem;
int ret, err;
dev_dbg(nor->dev, "at 0x%llx, len %lld\n", (long long)instr->addr,
@@ -991,6 +996,19 @@ static int spi_nor_erase(struct mtd_info *mtd, struct
erase_info *instr)
ret = -EINTR;
goto erase_err;
}
+
+ offset = addr;
+ if (nor->flags & SNOR_F_HAS_PARALLEL)
+ offset /= 2;
+
+ if (nor->flags & SNOR_F_HAS_STACKED) {
+ if (offset >= (mtd->size / 2)) {
+ offset = offset - (mtd->size / 2);
+ nor->spi->flags |= SPI_XFER_U_PAGE;
+ } else {
+ nor->spi->flags &= ~SPI_XFER_U_PAGE;
+ }
+ }
#ifdef CONFIG_SPI_FLASH_BAR
ret = write_bar(nor, addr);
if (ret < 0)
@@ -1396,6 +1414,9 @@ static const struct flash_info *spi_nor_read_id(struct
spi_nor *nor)
u8 id[SPI_NOR_MAX_ID_LEN];
const struct flash_info *info;
+ if (nor->flags & SNOR_F_HAS_PARALLEL)
+ nor->spi->flags |= SPI_XFER_LOWER;
+
tmp = nor->read_reg(nor, SPINOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN);
if (tmp < 0) {
dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp);
@@ -1420,28 +1441,57 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t
from, size_t len,
{
struct spi_nor *nor = mtd_to_spi_nor(mtd);
int ret;
+ u32 offset = from;
+ u32 stack_shift = 0;
+ u32 read_len = 0;
+ u32 rem_bank_len = 0;
+ u8 bank;
+ u8 is_ofst_odd = 0;
dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len);
- while (len) {
- loff_t addr = from;
- size_t read_len = len;
+ if ((nor->flags & SNOR_F_HAS_PARALLEL) && (offset & 1)) {
+ /* We can hit this case when we use file system like ubifs */
+ from = (loff_t)(from - 1);
+ len = (size_t)(len + 1);
+ is_ofst_odd = 1;
+ }
-#ifdef CONFIG_SPI_FLASH_BAR
- u32 remain_len;
+ while (len) {
+ if (nor->addr_width == 3) {
+ if (nor->flags & SNOR_F_HAS_PARALLEL) {
+ bank = (u32)from / (SZ_16M << 0x01);
[PATCH v4 0/6] spi-nor: Add parallel and stacked memories support
This series adds support for Xilinx qspi parallel and stacked memeories. In parallel mode, the current implementation assumes that a maximum of two flashes are connected. The QSPI controller splits the data evenly between both the flashes so, both the flashes that are connected in parallel mode should be identical. During each operation SPI-NOR sets 0th bit for CS0 & 1st bit for CS1 in nor->flags. In stacked mode the current implementation assumes that a maximum of two flashes are connected and both the flashes are of same make but can differ in sizes. So, except the sizes all other flash parameters of both the flashes are identical. Spi-nor will pass on the appropriate flash select flag to low level driver, and it will select pass all the data to that particular flash. Write operation in parallel mode are performed in page size * 2 chunks as each write operation results in writing both the flashes. For doubling the address space each operation is performed at addr/2 flash offset, where addr is the address specified by the user. Similarly for read and erase operations it will read from both flashes, so size and offset are divided by 2 and send to flash. Changes in v2: - Fixed the compilation issues. Changes in v3: - Fixed the CI issues. Changes in v4: - Removed the dio,dummy_bytes variables from zynq_qspi driver. - Fix the compilation issue by including the DM_SERIAL config. Ashok Reddy Soma (4): mtd: spi-nor: Add parallel and stacked memories support mtd: spi-nor: Add parallel memories support for read_sr and read_fsr mtd: spi-nor: Add parallel and stacked memories support in read_bar and write_bar spi: spi-uclass: Read chipselect and restrict capabilities Venkatesh Yadav Abbarapu (2): spi: zynqmp_gqspi: Add parallel memories support in GQSPI driver spi: zynq_qspi: Add parallel memories support in QSPI driver drivers/mtd/spi/sandbox.c | 2 +- drivers/mtd/spi/spi-nor-core.c | 389 - drivers/spi/altera_spi.c | 4 +- drivers/spi/atcspi200_spi.c| 2 +- drivers/spi/ath79_spi.c| 2 +- drivers/spi/atmel_spi.c| 6 +- drivers/spi/bcm63xx_hsspi.c| 42 ++-- drivers/spi/bcm63xx_spi.c | 6 +- drivers/spi/bcmbca_hsspi.c | 34 +-- drivers/spi/cf_spi.c | 6 +- drivers/spi/davinci_spi.c | 6 +- drivers/spi/fsl_dspi.c | 18 +- drivers/spi/fsl_espi.c | 4 +- drivers/spi/fsl_qspi.c | 4 +- drivers/spi/gxp_spi.c | 2 +- drivers/spi/mpc8xx_spi.c | 4 +- drivers/spi/mpc8xxx_spi.c | 10 +- drivers/spi/mscc_bb_spi.c | 4 +- drivers/spi/mxc_spi.c | 6 +- drivers/spi/npcm_fiu_spi.c | 14 +- drivers/spi/nxp_fspi.c | 2 +- drivers/spi/octeon_spi.c | 2 +- drivers/spi/omap3_spi.c| 4 +- drivers/spi/pic32_spi.c| 2 +- drivers/spi/rk_spi.c | 4 +- drivers/spi/rockchip_sfc.c | 2 +- drivers/spi/spi-aspeed-smc.c | 28 +-- drivers/spi/spi-mxic.c | 6 +- drivers/spi/spi-qup.c | 4 +- drivers/spi/spi-sifive.c | 6 +- drivers/spi/spi-sn-f-ospi.c| 2 +- drivers/spi/spi-sunxi.c| 6 +- drivers/spi/spi-synquacer.c| 4 +- drivers/spi/spi-uclass.c | 23 +- drivers/spi/stm32_qspi.c | 2 +- drivers/spi/stm32_spi.c| 4 +- drivers/spi/ti_qspi.c | 14 +- drivers/spi/xilinx_spi.c | 4 +- drivers/spi/zynq_qspi.c| 120 -- drivers/spi/zynq_spi.c | 6 +- drivers/spi/zynqmp_gqspi.c | 140 ++-- include/linux/mtd/spi-nor.h| 13 ++ include/spi.h | 26 ++- lib/acpi/acpi_device.c | 2 +- 44 files changed, 765 insertions(+), 226 deletions(-) -- 2.17.1
Re: [PATCH 3/4] arm: dts: k3-am625-beagleplay-u-boot: drop duplicate bootph-nodes
On Nov 13, 2023 at 08:59:18 -0600, Nishanth Menon wrote:
> Kernel dts import now provides bootph-all and bootph-pre-ram properties
> for the properties we have been overriding so far. Drop the same.
>
> Signed-off-by: Nishanth Menon
> ---
> arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 56
> 1 file changed, 56 deletions(-)
>
> diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> index 6f3a31558b20..7f8468f298f0 100644
> --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
> @@ -13,36 +13,26 @@
> tick-timer = _timer0;
> };
>
> - memory@8000 {
> - bootph-all;
> - };
> -
> /* Keep the LEDs on by default to indicate life */
> leds {
> - bootph-all;
> led-0 {
> default-state = "on";
> - bootph-all;
> };
>
> led-1 {
> default-state = "on";
> - bootph-all;
> };
>
> led-2 {
> default-state = "on";
> - bootph-all;
> };
>
> led-3 {
> default-state = "on";
> - bootph-all;
> };
>
> led-4 {
> default-state = "on";
> - bootph-all;
> };
> };
> };
> @@ -58,45 +48,7 @@
> };
> };
>
> -_uart0 {
> - bootph-all;
> -};
> -
> -_pins_default {
> - bootph-all;
> -};
> -
> -_i2c0 {
> - bootph-all;
> -};
> -
> -_i2c_pins_default {
> - bootph-all;
> -};
> -
> -_pins_default {
> - bootph-all;
> -};
> -
> -_gpio0 {
> - bootph-all;
> -};
> -
> -_gpio1 {
> - bootph-all;
> -};
> -
> - {
> - /* EMMC */
> - bootph-all;
> -};
> -
> -_pins_default {
> - bootph-all;
> -};
> -
> _pins_default {
> - bootph-all;
> /* Force to use SDCD card detect pin */
> pinctrl-single,pins = <
> AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
> @@ -109,14 +61,6 @@
> >;
> };
>
> - {
> - bootph-all;
> -};
> -
> - {
> - bootph-all;
> -};
> -
> #ifdef CONFIG_TARGET_AM625_A53_EVM
>
> #define SPL_AM625_BEAGLEPLAY_DTB "spl/dts/k3-am625-beagleplay.dtb"
You didn't talk about this in the commit message?
> --
> 2.40.0
>
>
Rest looks ok,
Reviewed-by: Dhruva Gole
--
Best regards,
Dhruva Gole
Re: [PATCH 4/4] arm: dts: k3-am625-sk-r5/u-boot: Drop duplicate bootph-nodes
On Nov 13, 2023 at 08:59:19 -0600, Nishanth Menon wrote:
> Kernel dts import now provides bootph-all and bootph-pre-ram properties
> for the properties we have been overriding so far. Drop the same.
>
> While at this enable the DM and tifs uarts for programming pinmux
s/tifs/TIFS UARTs
> since they are marked reserved by board.dts
>
> Signed-off-by: Nishanth Menon
> ---
> arch/arm/dts/k3-am625-r5-sk.dts | 12 +---
> arch/arm/dts/k3-am625-sk-u-boot.dtsi | 92
> 2 files changed, 2 insertions(+), 102 deletions(-)
>
> diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
> index 55420b2f2c15..6b9f40e55581 100644
> --- a/arch/arm/dts/k3-am625-r5-sk.dts
> +++ b/arch/arm/dts/k3-am625-r5-sk.dts
> @@ -69,22 +69,14 @@
> };
> };
>
> -_uart0_pins_default {
> - bootph-pre-ram;
> -};
> -
> -_uart1_pins_default {
> - bootph-pre-ram;
> -};
> -
> /* WKUP UART0 is used for DM firmware logs */
> _uart0 {
> - bootph-pre-ram;
> + status = "okay";
> };
>
> /* Main UART1 is used for TIFS firmware logs */
> _uart1 {
> - bootph-pre-ram;
> + status = "okay";
> };
>
> {
> diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> index dcf7c7652d31..fa778b0ff4c1 100644
> --- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
> @@ -8,71 +8,14 @@
>
> / {
> chosen {
> - stdout-path = "serial2:115200n8";
> tick-timer = _timer0;
> };
> -
> - aliases {
> - mmc1 =
> - };
> -
> - memory@8000 {
> - bootph-all;
> - };
> -};
> -
> -_conf {
> - bootph-all;
> };
>
> _timer0 {
> clock-frequency = <2500>;
> };
>
> -_uart0 {
> - bootph-all;
> -};
> -
> -_uart0_pins_default {
> - bootph-all;
> -};
> -
> - {
> - bootph-all;
> -};
> -
> -_mmc1_pins_default {
> - bootph-all;
> -};
> -
> - {
> - bootph-all;
> -};
> -
> -_pins_default {
> - bootph-all;
> -};
> -
> - {
> - bootph-all;
> -
> - flash@0 {
> - bootph-all;
> -
> - partitions {
> - bootph-all;
> -
> - partition@3fc {
> - bootph-all;
> - };
> - };
> - };
> -};
> -
> -_main_dmss {
> - bootph-all;
> -};
> -
> _bcdma {
> reg = <0x00 0x485c0100 0x00 0x100>,
> <0x00 0x4c00 0x00 0x2>,
> @@ -100,41 +43,6 @@
> bootph-all;
> };
>
> -_mdio {
> - bootph-all;
> -};
> -
> -_phy0 {
> - bootph-all;
> -};
> -
> -_phy1 {
> - bootph-all;
> -};
> -
> -_rgmii1_pins_default {
> - bootph-all;
> -};
> -
> -_rgmii2_pins_default {
> - bootph-all;
> -};
> -
> -_gmii_sel {
> - bootph-all;
> -};
> -
> - {
> - bootph-all;
> - ethernet-ports {
> - bootph-all;
> - };
> -};
> -
> -_port1 {
> - bootph-all;
> -};
> -
> _port2 {
> status = "disabled";
> };
> --
> 2.40.0
Looks okay,
Reviewed-by: Dhruva Gole
>
>
--
Best regards,
Dhruva Gole
Re: [PATCH 0/4] arm: dts: k3-am625*: Upgrade kernel dts to v6.7-rc1
Hi, On Nov 13, 2023 at 08:59:15 -0600, Nishanth Menon wrote: > Hi, > > Sync Device tree to kernel v6.7-rc1 - we are getting closer to > clean u-boot integration now. > > Boot logs: > https://gist.github.com/nmenon/d62c4795c6d3d40c83ba36d1cd047c42 > > WARNING: This will have a minor conflict (binman) with: > https://lore.kernel.org/u-boot/20231104080137.9628-1...@ti.com/ > > I haven't had a chance to test this out on verdin (only build tested) > - so will be nice to verify. > > Nishanth Menon (4): > arm: dts: k3-am625*: Sync with kernel v6.7-rc1 > arm: dts: k3-am625: Drop SoC provided bootph params from board > u-boot/r5 dtsi > arm: dts: k3-am625-beagleplay-u-boot: drop duplicate bootph-nodes > arm: dts: k3-am625-sk-r5/u-boot: Drop duplicate bootph-nodes boot tested these patches on SK-AM62x: ... U-Boot SPL 2024.01-rc2-00087-g38667965389d (Nov 14 2023 - 08:38:39 +0530) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.1--v09.01.01 (Kool Koala)') SPL initial stack usage: 13368 bytes Trying to boot from UART CLoaded 777811 bytes Starting ATF on ARM64 core... NOTICE: BL31: v2.9(release):v2.9.0-792-g2899ad392225-dirty NOTICE: BL31: Built : 17:56:37, Oct 26 2023 U-Boot SPL 2024.01-rc2-00087-g38667965389d (Nov 14 2023 - 08:38:54 +0530) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.1--v09.01.01 (Kool Koala)') SPL initial stack usage: 1872 bytes Trying to boot from UART CLoaded 727547 bytes U-Boot 2024.01-rc2-00087-g38667965389d (Nov 14 2023 - 08:38:54 +0530) SoC: AM62X SR1.0 HS-FS Model: Texas Instruments AM625 SK DRAM: 2 GiB Core: 57 devices, 23 uclasses, devicetree: separate MMC: mmc@fa1: 0, mmc@fa0: 1 Loading Environment from nowhere... OK In:serial@280 Out: serial@280 Err: serial@280 Net: eth0: ethernet@800port@1 Hit any key to stop autoboot: 2 0 => => => => => version U-Boot 2024.01-rc2-00087-g38667965389d (Nov 14 2023 - 08:38:54 +0530) aarch64-none-linux-gnu-gcc (Arm GNU Toolchain 12.3.Rel1 (Build arm-12.35)) 12.3.1 20230626 GNU ld (Arm GNU Toolchain 12.3.Rel1 (Build arm-12.35)) 2.40.0.20230627 => ... Tested-by: Dhruva Gole > > arch/arm/dts/k3-am62-main.dtsi| 12 +- > arch/arm/dts/k3-am62-mcu.dtsi | 2 + > arch/arm/dts/k3-am62-verdin-wifi.dtsi | 6 + > arch/arm/dts/k3-am62-verdin.dtsi | 1 + > arch/arm/dts/k3-am62-wakeup.dtsi | 2 + > arch/arm/dts/k3-am62.dtsi | 3 + > arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 110 - > arch/arm/dts/k3-am625-beagleplay.dts | 34 +++- > arch/arm/dts/k3-am625-r5-beagleplay.dts | 9 -- > arch/arm/dts/k3-am625-r5-sk.dts | 21 +-- > arch/arm/dts/k3-am625-sk-u-boot.dtsi | 145 -- > arch/arm/dts/k3-am625-sk.dts | 27 > arch/arm/dts/k3-am625-verdin-r5.dts | 9 -- > .../dts/k3-am625-verdin-wifi-dev-u-boot.dtsi | 55 +-- > arch/arm/dts/k3-am62x-sk-common.dtsi | 109 - > 15 files changed, 197 insertions(+), 348 deletions(-) > > -- > 2.40.0 > > -- Best regards, Dhruva Gole
[PATCH v3 5/5] test: dm: add scmi command test
In this test, "scmi" command is tested against different sub-commands.
Please note that scmi command is for debug purpose and is not intended
in production system.
Signed-off-by: AKASHI Takahiro
Reviewed-by: Simon Glass
Reviewed-by: Etienne Carriere
---
v9
* return -EAGAIN if we want to skip a test
* use CONFIG_IS_ENABLED() rather than IS_ENABLED()
v7
* make test assertions more flexible depending on the number of provided
protocols
v4
* move 'base'-related changes to the prior commit
* add CONFIG_CMD_SCMI to sandbox_defconfig
v3
* change char to u8 in vendor/agent names
v2
* use helper functions, removing direct uses of ops
---
configs/sandbox_defconfig | 1 +
test/dm/scmi.c| 81 +++
2 files changed, 82 insertions(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index bc5bcb2a6237..c550af93b0ca 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -121,6 +121,7 @@ CONFIG_CMD_REGULATOR=y
CONFIG_CMD_AES=y
CONFIG_CMD_TPM=y
CONFIG_CMD_TPM_TEST=y
+CONFIG_CMD_SCMI=y
CONFIG_CMD_BTRFS=y
CONFIG_CMD_CBFS=y
CONFIG_CMD_CRAMFS=y
diff --git a/test/dm/scmi.c b/test/dm/scmi.c
index 582485471fff..e80667ef72a3 100644
--- a/test/dm/scmi.c
+++ b/test/dm/scmi.c
@@ -19,6 +19,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -206,6 +207,86 @@ static int dm_test_scmi_base(struct unit_test_state *uts)
DM_TEST(dm_test_scmi_base, UT_TESTF_SCAN_FDT);
+static int dm_test_scmi_cmd(struct unit_test_state *uts)
+{
+ struct udevice *agent_dev;
+ int num_proto = 0;
+ char cmd_out[30];
+
+ if (!CONFIG_IS_ENABLED(CMD_SCMI))
+ return -EAGAIN;
+
+ /* preparation */
+ ut_assertok(uclass_get_device_by_name(UCLASS_SCMI_AGENT, "scmi",
+ _dev));
+ ut_assertnonnull(agent_dev);
+
+ /*
+* Estimate the number of provided protocols.
+* This estimation is correct as far as a corresponding
+* protocol support is added to sandbox fake serer.
+*/
+ if (CONFIG_IS_ENABLED(POWER_DOMAIN))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(CLK_SCMI))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ num_proto++;
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ num_proto++;
+
+ /* scmi info */
+ ut_assertok(run_command("scmi info", 0));
+
+ ut_assert_nextline("SCMI device: scmi");
+ snprintf(cmd_out, 30, " protocol version: 0x%x",
+SCMI_BASE_PROTOCOL_VERSION);
+ ut_assert_nextline(cmd_out);
+ ut_assert_nextline(" # of agents: 2");
+ ut_assert_nextline(" 0: platform");
+ ut_assert_nextline("> 1: OSPM");
+ snprintf(cmd_out, 30, " # of protocols: %d", num_proto);
+ ut_assert_nextline(cmd_out);
+ if (CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ ut_assert_nextline(" Power domain management");
+ if (CONFIG_IS_ENABLED(CLK_SCMI))
+ ut_assert_nextline(" Clock management");
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ ut_assert_nextline(" Reset domain management");
+ if (CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ ut_assert_nextline(" Voltage domain management");
+ ut_assert_nextline(" vendor: U-Boot");
+ ut_assert_nextline(" sub vendor: Sandbox");
+ ut_assert_nextline(" impl version: 0x1");
+
+ ut_assert_console_end();
+
+ /* scmi perm_dev */
+ ut_assertok(run_command("scmi perm_dev 1 0 1", 0));
+ ut_assert_console_end();
+
+ ut_assert(run_command("scmi perm_dev 1 0 0", 0));
+ ut_assert_nextline("Denying access to device:0 failed (-13)");
+ ut_assert_console_end();
+
+ /* scmi perm_proto */
+ ut_assertok(run_command("scmi perm_proto 1 0 14 1", 0));
+ ut_assert_console_end();
+
+ ut_assert(run_command("scmi perm_proto 1 0 14 0", 0));
+ ut_assert_nextline("Denying access to protocol:0x14 on device:0 failed
(-13)");
+ ut_assert_console_end();
+
+ /* scmi reset */
+ ut_assert(run_command("scmi reset 1 1", 0));
+ ut_assert_nextline("Reset failed (-13)");
+ ut_assert_console_end();
+
+ return 0;
+}
+
+DM_TEST(dm_test_scmi_cmd, UT_TESTF_SCAN_FDT);
+
static int dm_test_scmi_power_domains(struct unit_test_state *uts)
{
struct sandbox_scmi_agent *agent;
--
2.34.1
[PATCH v3 4/5] doc: cmd: add documentation for scmi
This is a help text for scmi command. Signed-off-by: AKASHI Takahiro Reviewed-by: Simon Glass Reviewed-by: Etienne Carriere --- v6 * add the manual to doc/usage/index.rst v4 * s/tranport/transport/ v2 * add more descriptions about SCMI --- doc/usage/cmd/scmi.rst | 126 + doc/usage/index.rst| 1 + 2 files changed, 127 insertions(+) create mode 100644 doc/usage/cmd/scmi.rst diff --git a/doc/usage/cmd/scmi.rst b/doc/usage/cmd/scmi.rst new file mode 100644 index ..9ea7e0e41dad --- /dev/null +++ b/doc/usage/cmd/scmi.rst @@ -0,0 +1,126 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +scmi command + + +Synopsis + + +:: + +scmi info +scmi perm_dev +scmi perm_proto +scmi reset + +Description +--- + +Arm System Control and Management Interface (SCMI hereafter) is a set of +standardised interfaces to manage system resources, like clocks, power +domains, pin controls, reset and so on, in a system-wide manner. + +An entity which provides those services is called a SCMI firmware (or +SCMI server if you like) may be placed/implemented by EL3 software or +by a dedicated system control processor (SCP) or else. + +A user of SCMI interfaces, including U-Boot, is called a SCMI agent and +may issues commands, which are defined in each protocol for specific system +resources, to SCMI server via a communication channel, called a transport. +Those interfaces are independent from the server's implementation thanks to +a transport layer. + +For more details, see the `SCMI specification`_. + +While most of system resources managed under SCMI protocols are implemented +and handled as standard U-Boot devices, for example clk_scmi, scmi command +provides additional management functionality against SCMI server. + +scmi info +~ +Show base information about SCMI server and supported protocols + +scmi perm_dev +~ +Allow or deny access permission to the device + +scmi perm_proto +~~~ +Allow or deny access to the protocol on the device + +scmi reset +~~ +Reset the already-configured permissions against the device + +Parameters are used as follows: + + +SCMI Agent ID, hex value + + +SCMI Device ID, hex value + +Please note that what a device means is not defined +in the specification. + + +SCMI Protocol ID, hex value + +It must not be 0x10 (base protocol) + + +Flags to control the action, hex value + +0 to deny, 1 to allow. The other values are reserved and allowed +values may depend on the implemented version of SCMI server in +the future. See SCMI specification for more details. + +Example +--- + +Obtain basic information about SCMI server: + +:: + +=> scmi info +SCMI device: scmi + protocol version: 0x2 + # of agents: 3 + 0: platform +> 1: OSPM + 2: PSCI + # of protocols: 4 + Power domain management + Performance domain management + Clock management + Sensor management + vendor: Linaro + sub vendor: PMWG + impl version: 0x20b + +Ask for access permission to device#0: + +:: + +=> scmi perm_dev 1 0 1 + +Reset configurations with all access permission settings retained: + +:: + +=> scmi reset 1 0 + +Configuration +- + +The scmi command is only available if CONFIG_CMD_SCMI=y. +Default n because this command is mainly for debug purpose. + +Return value + + +The return value ($?) is set to 0 if the operation succeeded, +1 if the operation failed or -1 if the operation failed due to +a syntax error. + +.. _`SCMI specification`: https://developer.arm.com/documentation/den0056/e/?lang=en diff --git a/doc/usage/index.rst b/doc/usage/index.rst index d8e23fcacffb..1a626c03c237 100644 --- a/doc/usage/index.rst +++ b/doc/usage/index.rst @@ -94,6 +94,7 @@ Shell commands cmd/rng cmd/saves cmd/sbi + cmd/scmi cmd/scp03 cmd/seama cmd/setexpr -- 2.34.1
[PATCH v3 3/5] cmd: add scmi command for SCMI firmware
This command, "scmi", may provide a command line interface to various SCMI
protocols. It supports at least initially SCMI base protocol and is
intended mainly for debug purpose.
Signed-off-by: AKASHI Takahiro
Reviewed-by: Simon Glass
Reviewed-by: Etienne Carriere
---
v8 (actually v2 as SCMI cmd)
* localize global variables to avoid pytest errors
v3
* describe that arguments are in hex at a help message
* modify the code for dynamically allocated agent names
v2
* remove sub command category, 'scmi base', for simplicity
---
cmd/Kconfig | 9 ++
cmd/Makefile | 1 +
cmd/scmi.c | 384 +++
3 files changed, 394 insertions(+)
create mode 100644 cmd/scmi.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index df6d71c103f9..ca9f742dcf78 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2559,6 +2559,15 @@ config CMD_CROS_EC
a number of sub-commands for performing EC tasks such as
updating its flash, accessing a small saved context area
and talking to the I2C bus behind the EC (if there is one).
+
+config CMD_SCMI
+ bool "Enable scmi command"
+ depends on SCMI_FIRMWARE
+ default n
+ help
+ This command provides user interfaces to several SCMI (System
+ Control and Management Interface) protocols available on Arm
+ platforms to manage system resources.
endmenu
menu "Filesystem commands"
diff --git a/cmd/Makefile b/cmd/Makefile
index 9a6790cc1708..320f0b5266eb 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -159,6 +159,7 @@ obj-$(CONFIG_CMD_SATA) += sata.o
obj-$(CONFIG_CMD_NVME) += nvme.o
obj-$(CONFIG_SANDBOX) += sb.o
obj-$(CONFIG_CMD_SF) += sf.o
+obj-$(CONFIG_CMD_SCMI) += scmi.o
obj-$(CONFIG_CMD_SCSI) += scsi.o disk.o
obj-$(CONFIG_CMD_SHA1SUM) += sha1sum.o
obj-$(CONFIG_CMD_SEAMA) += seama.o
diff --git a/cmd/scmi.c b/cmd/scmi.c
new file mode 100644
index ..664062c4eff5
--- /dev/null
+++ b/cmd/scmi.c
@@ -0,0 +1,384 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SCMI (System Control and Management Interface) utility command
+ *
+ * Copyright (c) 2023 Linaro Limited
+ * Author: AKASHI Takahiro
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include /* uclass_get_device */
+#include
+#include
+
+struct {
+ enum scmi_std_protocol id;
+ const char *name;
+} protocol_name[] = {
+ {SCMI_PROTOCOL_ID_BASE, "Base"},
+ {SCMI_PROTOCOL_ID_POWER_DOMAIN, "Power domain management"},
+ {SCMI_PROTOCOL_ID_SYSTEM, "System power management"},
+ {SCMI_PROTOCOL_ID_PERF, "Performance domain management"},
+ {SCMI_PROTOCOL_ID_CLOCK, "Clock management"},
+ {SCMI_PROTOCOL_ID_SENSOR, "Sensor management"},
+ {SCMI_PROTOCOL_ID_RESET_DOMAIN, "Reset domain management"},
+ {SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN, "Voltage domain management"},
+};
+
+/**
+ * get_agent() - get SCMI agent device
+ *
+ * Return: Pointer to SCMI agent device on success, NULL on failure
+ */
+static struct udevice *get_agent(void)
+{
+ struct udevice *agent;
+
+ if (uclass_get_device(UCLASS_SCMI_AGENT, 0, )) {
+ printf("Cannot find any SCMI agent\n");
+ return NULL;
+ }
+
+ return agent;
+}
+
+/**
+ * get_base_proto() - get SCMI base protocol device
+ * @agent: SCMI agent device
+ *
+ * Return: Pointer to SCMI base protocol device on success,
+ * NULL on failure
+ */
+static struct udevice *get_base_proto(struct udevice *agent)
+{
+ struct udevice *base_proto;
+
+ if (!agent) {
+ agent = get_agent();
+ if (!agent)
+ return NULL;
+ }
+
+ base_proto = scmi_get_protocol(agent, SCMI_PROTOCOL_ID_BASE);
+ if (!base_proto) {
+ printf("SCMI base protocol not found\n");
+ return NULL;
+ }
+
+ return base_proto;
+}
+
+/**
+ * get_proto_name() - get the name of SCMI protocol
+ *
+ * @id:SCMI Protocol ID
+ *
+ * Get the printable name of the protocol, @id
+ *
+ * Return: Name string on success, NULL on failure
+ */
+static const char *get_proto_name(enum scmi_std_protocol id)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(protocol_name); i++)
+ if (id == protocol_name[i].id)
+ return protocol_name[i].name;
+
+ return NULL;
+}
+
+/**
+ * do_scmi_info() - get the information of SCMI services
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ *
+ * Get the information of SCMI services using various interfaces
+ * provided by the Base protocol.
+ *
+ * Return: CMD_RET_SUCCESS on success, CMD_RET_RET_FAILURE on failure
+ */
+static int do_scmi_info(struct cmd_tbl *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ struct udevice *agent, *base_proto;
+ u32
[PATCH v3 2/5] firmware: scmi: support protocols on sandbox only if enabled
This change will be useful when we manually test SCMI on sandbox
by enabling/disabling a specific SCMI protocol.
Signed-off-by: AKASHI Takahiro
---
v9
* use CONFIG_IS_ENABLED() rather than IS_ENABLED()
* remove goto by introducing a not_supported() function
---
drivers/firmware/scmi/sandbox-scmi_agent.c | 30 ++--
drivers/firmware/scmi/sandbox-scmi_devices.c | 78
2 files changed, 71 insertions(+), 37 deletions(-)
diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c
b/drivers/firmware/scmi/sandbox-scmi_agent.c
index d13180962662..cc9011c7312f 100644
--- a/drivers/firmware/scmi/sandbox-scmi_agent.c
+++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
@@ -66,10 +66,10 @@ struct scmi_channel {
};
static u8 protocols[] = {
- SCMI_PROTOCOL_ID_POWER_DOMAIN,
- SCMI_PROTOCOL_ID_CLOCK,
- SCMI_PROTOCOL_ID_RESET_DOMAIN,
- SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,
+ CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN, (SCMI_PROTOCOL_ID_POWER_DOMAIN,))
+ CONFIG_IS_ENABLED(CLK_SCMI, (SCMI_PROTOCOL_ID_CLOCK,))
+ CONFIG_IS_ENABLED(RESET_SCMI, (SCMI_PROTOCOL_ID_RESET_DOMAIN,))
+ CONFIG_IS_ENABLED(DM_REGULATOR_SCMI, (SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,))
};
#define NUM_PROTOCOLS ARRAY_SIZE(protocols)
@@ -1124,6 +1124,13 @@ unsigned int sandbox_scmi_channel_id(struct udevice *dev)
return chan->channel_id;
}
+static int sandbox_proto_not_supported(struct scmi_msg *msg)
+{
+ *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
+
+ return 0;
+}
+
static int sandbox_scmi_test_process_msg(struct udevice *dev,
struct scmi_channel *channel,
struct scmi_msg *msg)
@@ -1160,6 +1167,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
*dev,
}
break;
case SCMI_PROTOCOL_ID_POWER_DOMAIN:
+ if (!CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_PROTOCOL_VERSION:
return sandbox_scmi_pwd_protocol_version(dev, msg);
@@ -1180,6 +1190,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
*dev,
}
break;
case SCMI_PROTOCOL_ID_CLOCK:
+ if (!CONFIG_IS_ENABLED(CLK_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_PROTOCOL_ATTRIBUTES:
return sandbox_scmi_clock_protocol_attribs(dev, msg);
@@ -1196,6 +1209,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
*dev,
}
break;
case SCMI_PROTOCOL_ID_RESET_DOMAIN:
+ if (!CONFIG_IS_ENABLED(RESET_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_RESET_DOMAIN_ATTRIBUTES:
return sandbox_scmi_rd_attribs(dev, msg);
@@ -1206,6 +1222,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
*dev,
}
break;
case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
+ if (!CONFIG_IS_ENABLED(DM_REGULATOR_SCMI))
+ return sandbox_proto_not_supported(msg);
+
switch (msg->message_id) {
case SCMI_VOLTAGE_DOMAIN_ATTRIBUTES:
return sandbox_scmi_voltd_attribs(dev, msg);
@@ -1224,8 +1243,7 @@ static int sandbox_scmi_test_process_msg(struct udevice
*dev,
case SCMI_PROTOCOL_ID_SYSTEM:
case SCMI_PROTOCOL_ID_PERF:
case SCMI_PROTOCOL_ID_SENSOR:
- *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
- return 0;
+ return sandbox_proto_not_supported(msg);
default:
break;
}
diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c
b/drivers/firmware/scmi/sandbox-scmi_devices.c
index facb5b06ffb5..603e2bb40aff 100644
--- a/drivers/firmware/scmi/sandbox-scmi_devices.c
+++ b/drivers/firmware/scmi/sandbox-scmi_devices.c
@@ -62,12 +62,13 @@ static int sandbox_scmi_devices_remove(struct udevice *dev)
if (!devices)
return 0;
- for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
- int ret2 = reset_free(devices->reset + n);
+ if (CONFIG_IS_ENABLED(RESET_SCMI))
+ for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
+ int ret2 = reset_free(devices->reset + n);
- if (ret2 && !ret)
- ret = ret2;
- }
+ if (ret2 && !ret)
+ ret = ret2;
+ }
return ret;
}
@@ -89,39 +90,53 @@ static int sandbox_scmi_devices_probe(struct udevice *dev)
.regul_count = SCMI_TEST_DEVICES_VOLTD_COUNT,
};
- ret =
[PATCH v3 1/5] test: dm: skip scmi tests against disabled protocols
This is a precautionary change to make scmi tests workable whether or not a specific protocol be enabled. If a given protocol is not configured, we skip the test by returning -EAGAIN. Signed-off-by: AKASHI Takahiro --- v9 * return -EAGAIN if we want to skip a test * use CONFIG_IS_ENABLED() rather than IS_ENABLED() --- test/dm/scmi.c | 12 1 file changed, 12 insertions(+) diff --git a/test/dm/scmi.c b/test/dm/scmi.c index da45314f2e4c..582485471fff 100644 --- a/test/dm/scmi.c +++ b/test/dm/scmi.c @@ -217,6 +217,9 @@ static int dm_test_scmi_power_domains(struct unit_test_state *uts) u8 *name; int ret; + if (!CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN)) + return -EAGAIN; + /* preparation */ ut_assertok(load_sandbox_scmi_test_devices(uts, , )); ut_assertnonnull(agent); @@ -317,6 +320,9 @@ static int dm_test_scmi_clocks(struct unit_test_state *uts) int ret_dev; int ret; + if (!CONFIG_IS_ENABLED(CLK_SCMI)) + return -EAGAIN; + ret = load_sandbox_scmi_test_devices(uts, , ); if (ret) return ret; @@ -382,6 +388,9 @@ static int dm_test_scmi_resets(struct unit_test_state *uts) struct udevice *agent_dev, *reset_dev, *dev = NULL; int ret; + if (!CONFIG_IS_ENABLED(RESET_SCMI)) + return -EAGAIN; + ret = load_sandbox_scmi_test_devices(uts, , ); if (ret) return ret; @@ -418,6 +427,9 @@ static int dm_test_scmi_voltage_domains(struct unit_test_state *uts) struct udevice *dev; struct udevice *regul0_dev; + if (!CONFIG_IS_ENABLED(DM_REGULATOR_SCMI)) + return -EAGAIN; + ut_assertok(load_sandbox_scmi_test_devices(uts, , )); scmi_devices = sandbox_scmi_devices_ctx(dev); -- 2.34.1
[PATCH v3 0/5] cmd: add scmi command
"Scmi" command will be re-introduced per Michal's request. The functionality is the same as I put it in my patch set of adding SCMI base protocol support, but made some tweak to make UT, "ut dm scmi_cmd," more flexible and tolerable when enabling/disabling a specific SCMI protocol for test purpose. Each commit may have some change history inherited from the preceding patch series. Test The patch series was tested on the following platforms: * sandbox Prerequisite: = * This patch series is based on the latest master. Changes: v3(Nov 14, 2023) * return -EAGAIN if we want to skip a test. * use CONFIG_IS_ENABLED() rather than IS_ENABLED(). * remove goto by introducing a function in sandbox implementation. v2(Nov 13, 2023) * localize global variables to avoid pytest errors. AKASHI Takahiro (5): test: dm: skip scmi tests against disabled protocols firmware: scmi: support protocols on sandbox only if enabled cmd: add scmi command for SCMI firmware doc: cmd: add documentation for scmi test: dm: add scmi command test cmd/Kconfig | 9 + cmd/Makefile | 1 + cmd/scmi.c | 384 +++ configs/sandbox_defconfig| 1 + doc/usage/cmd/scmi.rst | 126 ++ doc/usage/index.rst | 1 + drivers/firmware/scmi/sandbox-scmi_agent.c | 30 +- drivers/firmware/scmi/sandbox-scmi_devices.c | 78 ++-- test/dm/scmi.c | 93 + 9 files changed, 686 insertions(+), 37 deletions(-) create mode 100644 cmd/scmi.c create mode 100644 doc/usage/cmd/scmi.rst -- 2.34.1
Re: [PATCH v2 2/5] firmware: scmi: support protocols on sandbox only if enabled
On Mon, Nov 13, 2023 at 11:01:20AM -0700, Simon Glass wrote:
> Hi AKASHI,
>
> On Sun, 12 Nov 2023 at 18:49, AKASHI Takahiro
> wrote:
> >
> > This change will be useful when we manually test SCMI on sandbox
> > by enabling/disabling a specific SCMI protocol.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > drivers/firmware/scmi/sandbox-scmi_agent.c | 27 ++-
> > drivers/firmware/scmi/sandbox-scmi_devices.c | 78
> > 2 files changed, 72 insertions(+), 33 deletions(-)
> >
> > diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c
> > b/drivers/firmware/scmi/sandbox-scmi_agent.c
> > index d13180962662..1fc9a0f4ea7e 100644
> > --- a/drivers/firmware/scmi/sandbox-scmi_agent.c
> > +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
> > @@ -66,10 +66,18 @@ struct scmi_channel {
> > };
> >
> > static u8 protocols[] = {
> > +#if IS_ENABLED(CONFIG_SCMI_POWER_DOMAIN)
> > SCMI_PROTOCOL_ID_POWER_DOMAIN,
>
> Is this better? Perhaps not!
>
> CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN, (SCMI_PROTOCOL_ID_POWER_DOMAIN,))
Ah, good notation.
> > +#endif
> > +#if IS_ENABLED(CONFIG_CLK_SCMI)
> > SCMI_PROTOCOL_ID_CLOCK,
> > +#endif
> > +#if IS_ENABLED(CONFIG_RESET_SCMI)
> > SCMI_PROTOCOL_ID_RESET_DOMAIN,
> > +#endif
> > +#if IS_ENABLED(CONFIG_DM_REGULATOR_SCMI)
> > SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,
> > +#endif
> > };
> >
> > #define NUM_PROTOCOLS ARRAY_SIZE(protocols)
> > @@ -1160,6 +1168,9 @@ static int sandbox_scmi_test_process_msg(struct
> > udevice *dev,
> > }
> > break;
> > case SCMI_PROTOCOL_ID_POWER_DOMAIN:
> > + if (!IS_ENABLED(CONFIG_SCMI_POWER_DOMAIN))
> > + goto not_supported;
> > +
> > switch (msg->message_id) {
> > case SCMI_PROTOCOL_VERSION:
> > return sandbox_scmi_pwd_protocol_version(dev, msg);
> > @@ -1180,6 +1191,9 @@ static int sandbox_scmi_test_process_msg(struct
> > udevice *dev,
> > }
> > break;
> > case SCMI_PROTOCOL_ID_CLOCK:
> > + if (!IS_ENABLED(CONFIG_CLK_SCMI))
> > + goto not_supported;
>
> How about putting this all in a function and avoiding the goto?
Okay, will do.
Thanks,
-Takahiro Akashi
> > +
> > switch (msg->message_id) {
> > case SCMI_PROTOCOL_ATTRIBUTES:
> > return sandbox_scmi_clock_protocol_attribs(dev,
> > msg);
> > @@ -1196,6 +1210,9 @@ static int sandbox_scmi_test_process_msg(struct
> > udevice *dev,
> > }
> > break;
> > case SCMI_PROTOCOL_ID_RESET_DOMAIN:
> > + if (!IS_ENABLED(CONFIG_RESET_SCMI))
> > + goto not_supported;
> > +
> > switch (msg->message_id) {
> > case SCMI_RESET_DOMAIN_ATTRIBUTES:
> > return sandbox_scmi_rd_attribs(dev, msg);
> > @@ -1206,6 +1223,9 @@ static int sandbox_scmi_test_process_msg(struct
> > udevice *dev,
> > }
> > break;
> > case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
> > + if (!IS_ENABLED(CONFIG_DM_REGULATOR_SCMI))
> > + goto not_supported;
> > +
> > switch (msg->message_id) {
> > case SCMI_VOLTAGE_DOMAIN_ATTRIBUTES:
> > return sandbox_scmi_voltd_attribs(dev, msg);
> > @@ -1224,8 +1244,7 @@ static int sandbox_scmi_test_process_msg(struct
> > udevice *dev,
> > case SCMI_PROTOCOL_ID_SYSTEM:
> > case SCMI_PROTOCOL_ID_PERF:
> > case SCMI_PROTOCOL_ID_SENSOR:
> > - *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
> > - return 0;
> > + goto not_supported;
> > default:
> > break;
> > }
> > @@ -1239,6 +1258,10 @@ static int sandbox_scmi_test_process_msg(struct
> > udevice *dev,
> > /* Intentionnaly report unhandled IDs through the SCMI return code
> > */
> > *(u32 *)msg->out_msg = SCMI_PROTOCOL_ERROR;
> > return 0;
> > +
> > +not_supported:
> > + *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
> > + return 0;
> > }
> >
> > static int sandbox_scmi_test_remove(struct udevice *dev)
> > diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c
> > b/drivers/firmware/scmi/sandbox-scmi_devices.c
> > index facb5b06ffb5..0519cf889aa9 100644
> > --- a/drivers/firmware/scmi/sandbox-scmi_devices.c
> > +++ b/drivers/firmware/scmi/sandbox-scmi_devices.c
> > @@ -62,12 +62,13 @@ static int sandbox_scmi_devices_remove(struct udevice
> > *dev)
> > if (!devices)
> > return 0;
> >
> > - for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
> > - int ret2 = reset_free(devices->reset + n);
> > + if (IS_ENABLED(CONFIG_RESET_SCMI))
> > + for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
> > + int
Re: [PATCH v4 09/12] x86: Enable SSE in 64-bit mode
Hi Tom,
On Tue, Nov 14, 2023 at 7:52 AM Tom Rini wrote:
>
> On Tue, Nov 14, 2023 at 07:46:36AM +0800, Bin Meng wrote:
> > Hi Tom,
> >
> > On Tue, Nov 14, 2023 at 6:59 AM Tom Rini wrote:
> > >
> > > On Mon, Nov 13, 2023 at 03:28:13PM -0700, Simon Glass wrote:
> > > > Hi Bin,
> > > >
> > > > On Mon, 13 Nov 2023 at 15:08, Bin Meng wrote:
> > > > >
> > > > > Hi Simon,
> > > > >
> > > > > On Mon, Nov 13, 2023 at 4:03 AM Simon Glass wrote:
> > > > > >
> > > > > > This is needed to support Truetype fonts. In any case, the compiler
> > > > > > expects SSE to be available in 64-bit mode. Provide an option to
> > > > > > enable
> > > > > > SSE so that hardware floating-point arithmetic works.
> > > > > >
> > > > > > Signed-off-by: Simon Glass
> > > > > > Suggested-by: Bin Meng
> > > > > > ---
> > > > > >
> > > > > > Changes in v4:
> > > > > > - Use a Kconfig option
> > > > > >
> > > > > > arch/x86/Kconfig | 8
> > > > > > arch/x86/config.mk| 4
> > > > > > arch/x86/cpu/x86_64/cpu.c | 12
> > > > > > drivers/video/Kconfig | 1 +
> > > > > > 4 files changed, 25 insertions(+)
> > > > > >
> > > > > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > > > > > index 99e59d94c606..6b532d712ee8 100644
> > > > > > --- a/arch/x86/Kconfig
> > > > > > +++ b/arch/x86/Kconfig
> > > > > > @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE
> > > > > > hex
> > > > > > default 0x1
> > > > > >
> > > > > > +config X86_HARDFP
> > > > > > + bool "Support hardware floating point"
> > > > > > + help
> > > > > > + U-Boot generally does not make use of floating point.
> > > > > > Where this is
> > > > > > + needed, it can be enabled using this option. This adjusts
> > > > > > the
> > > > > > + start-up code for 64-bit mode and changes the compiler
> > > > > > options for
> > > > > > + 64-bit to enable SSE.
> > > > >
> > > > > As discussed in another thread, this option should be made global to
> > > > > all architectures and by default no.
> > > > >
> > > > > > +
> > > > > > config HAVE_ITSS
> > > > > > bool "Enable ITSS"
> > > > > > help
> > > > > > diff --git a/arch/x86/config.mk b/arch/x86/config.mk
> > > > > > index 26ec1af2f0b0..2e3a7119e798 100644
> > > > > > --- a/arch/x86/config.mk
> > > > > > +++ b/arch/x86/config.mk
> > > > > > @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y)
> > > > > > PLATFORM_CPPFLAGS += -march=i386 -m32
> > > > > > else
> > > > > > PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
> > > > > > -march=core2 -m64
> > > > > > +
> > > > > > +ifndef CONFIG_X86_HARDFP
> > > > > > PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
> > > > > > endif
> > > > > >
> > > > > > +endif # IS_32BIT
> > > > > > +
> > > > > > PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections
> > > > > > -fvisibility=hidden
> > > > > >
> > > > > > KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions
> > > > > > diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
> > > > > > index 2647bff891f8..5ea746ecce4d 100644
> > > > > > --- a/arch/x86/cpu/x86_64/cpu.c
> > > > > > +++ b/arch/x86/cpu/x86_64/cpu.c
> > > > > > @@ -10,6 +10,7 @@
> > > > > > #include
> > > > > > #include
> > > > > > #include
> > > > > > +#include
> > > > > >
> > > > > > DECLARE_GLOBAL_DATA_PTR;
> > > > > >
> > > > > > @@ -39,11 +40,22 @@ int x86_mp_init(void)
> > > > > > return 0;
> > > > > > }
> > > > > >
> > > > > > +/* enable SSE features for hardware floating point */
> > > > > > +static void setup_sse_features(void)
> > > > > > +{
> > > > > > + asm ("mov %%cr4, %%rax\n" \
> > > > > > + "or %0, %%rax\n" \
> > > > > > + "mov %%rax, %%cr4\n" \
> > > > > > + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax");
> > > > > > +}
> > > > > > +
> > > > > > int x86_cpu_reinit_f(void)
> > > > > > {
> > > > > > /* set the vendor to Intel so that native_calibrate_tsc()
> > > > > > works */
> > > > > > gd->arch.x86_vendor = X86_VENDOR_INTEL;
> > > > > > gd->arch.has_mtrr = true;
> > > > > > + if (IS_ENABLED(CONFIG_X86_HARDFP))
> > > > > > + setup_sse_features();
> > > > > >
> > > > > > return 0;
> > > > > > }
> > > > > > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> > > > > > index 6f319ba0d544..39c82521be16 100644
> > > > > > --- a/drivers/video/Kconfig
> > > > > > +++ b/drivers/video/Kconfig
> > > > > > @@ -180,6 +180,7 @@ config CONSOLE_ROTATION
> > > > > >
> > > > > > config CONSOLE_TRUETYPE
> > > > > > bool "Support a console that uses TrueType fonts"
> > > > > > + select X86_HARDFP if X86
> > > > >
> > > > > This should be "depends on HARDFP", indicating that the TrueType
> > > > > library is using hardware fp itself, and user has to explicitly turn
> > > > > the hardware fp Kconfig option on.
> > > >
> > > > So you mean 'depends on HARDFP if X86' ? After all, this is only for
> > > > X86 - other
Re: [PATCH v2 1/5] test: dm: skip scmi tests against disabled protocols
On Mon, Nov 13, 2023 at 11:01:18AM -0700, Simon Glass wrote: > Hi AKASHI, > > On Sun, 12 Nov 2023 at 18:49, AKASHI Takahiro > wrote: > > > > This is a precautionary change to make scmi tests workable whether or not > > a specific protocol be enabled. > > > > Signed-off-by: AKASHI Takahiro > > --- > > test/dm/scmi.c | 12 > > 1 file changed, 12 insertions(+) > > > > diff --git a/test/dm/scmi.c b/test/dm/scmi.c > > index da45314f2e4c..2f63f2da16fb 100644 > > --- a/test/dm/scmi.c > > +++ b/test/dm/scmi.c > > @@ -217,6 +217,9 @@ static int dm_test_scmi_power_domains(struct > > unit_test_state *uts) > > u8 *name; > > int ret; > > > > + if (!IS_ENABLED(CONFIG_SCMI_POWER_DOMAIN)) > > + return 0; > > -EAGAIN to skip a test Ah, I didn't notice such a common practice as it is rarely seen under ut. Will fix. -Takahiro Akashi > Please update a comment if this needs to be documented better > > > + > > /* preparation */ > > ut_assertok(load_sandbox_scmi_test_devices(uts, , )); > > ut_assertnonnull(agent); > > @@ -317,6 +320,9 @@ static int dm_test_scmi_clocks(struct unit_test_state > > *uts) > > int ret_dev; > > int ret; > > > > + if (!IS_ENABLED(CONFIG_CLK_SCMI)) > > + return 0; > > + > > ret = load_sandbox_scmi_test_devices(uts, , ); > > if (ret) > > return ret; > > @@ -382,6 +388,9 @@ static int dm_test_scmi_resets(struct unit_test_state > > *uts) > > struct udevice *agent_dev, *reset_dev, *dev = NULL; > > int ret; > > > > + if (!IS_ENABLED(CONFIG_RESET_SCMI)) > > + return 0; > > + > > ret = load_sandbox_scmi_test_devices(uts, , ); > > if (ret) > > return ret; > > @@ -418,6 +427,9 @@ static int dm_test_scmi_voltage_domains(struct > > unit_test_state *uts) > > struct udevice *dev; > > struct udevice *regul0_dev; > > > > + if (!IS_ENABLED(CONFIG_DM_REGULATOR_SCMI)) > > + return 0; > > + > > ut_assertok(load_sandbox_scmi_test_devices(uts, , )); > > > > scmi_devices = sandbox_scmi_devices_ctx(dev); > > -- > > 2.34.1 > > > > Regards, > Simon
Re: [PATCH 5/5] test: dm: add scmi command test
On Mon, Nov 13, 2023 at 11:01:17AM -0700, Simon Glass wrote:
> Hi,
>
> On Sun, 12 Nov 2023 at 18:46, AKASHI Takahiro
> wrote:
> >
> > Hi Tom,
> >
> > On Fri, Nov 10, 2023 at 01:21:37PM -0500, Tom Rini wrote:
> > > On Wed, Oct 25, 2023 at 02:14:27PM +0900, AKASHI Takahiro wrote:
> > >
> > > > In this test, "scmi" command is tested against different sub-commands.
> > > > Please note that scmi command is for debug purpose and is not intended
> > > > in production system.
> > > >
> > > > Signed-off-by: AKASHI Takahiro
> > > > Reviewed-by: Simon Glass
> > > > Reviewed-by: Etienne Carriere
> > >
> > > The test part of this still fails:
> > > https://source.denx.de/u-boot/u-boot/-/jobs/732077
> > >
> > > I don't know why more output wasn't captured, when I run it locally
> > > instead I get:
> > > == FAILURES
> > > ===
> > > ___ test_ut[ut_dm_dm_test_scmi_cmd]
> > > ___
> > > test/py/u_boot_spawn.py:195: in expect
> > > c = os.read(self.fd, 1024).decode(errors='replace')
> > > E OSError: [Errno 5] Input/output error
> > >
> > > During handling of the above exception, another exception occurred:
> > > test/py/tests/test_ut.py:502: in test_ut
> > > output = u_boot_console.run_command('ut ' + ut_subtest)
> > > test/py/u_boot_console_base.py:266: in run_command
> > > m = self.p.expect([self.prompt_compiled] + self.bad_patterns)
> > > test/py/u_boot_spawn.py:204: in expect
> > > raise ValueError('U-Boot exited with %s' % info)
> > > E ValueError: U-Boot exited with signal 11 (SIGSEGV)
> >
> >
> > The command uses global variables which hold pointers to 'struct udevice'
> > which are to be shared between the main and the sub-commands.
> > Since pytest framework executes ut tests twice, once with a (normal?) device
> > tree and once with a flat tree, udevices will be *voided* between
> > two executions.
>
> Are you able to put the var in the uclass-priv data instead? The state
> should be cleared before running each DM test.
Well, I don't think we need such a trick.
As you can see, we may simply fetch/find necessary udevices
every time the command is called.
It is enough given that the command is mainly for debug purpose.
-Takahiro Akashi
> Regards,
> Simon
>
>
> >
> > I will fix it in v2.
> >
> > Thanks,
> > -Takahiro Akashi
> >
> >
> > > Captured stdout call
> > > -
> > > => ut dm dm_test_scmi_cmd
> > > Test: dm_test_scmi_cmd: scmi.c
> > > SCMI device: scmi
> > > protocol version: 0x2
> > > # of agents: 2
> > > 0: platform
> > > > 1: OSPM
> > > # of protocols: 4
> > > Power domain management
> > > Clock management
> > > Reset domain management
> > > Voltage domain management
> > > vendor: U-Boot
> > > sub vendor: Sandbox
> > > impl version: 0x1
> > > Denying access to device:0 failed (-13)
> > > Denying access to protocol:0x14 on device:0 failed (-13)
> > > Reset failed (-13)
> > > Test: dm_test_scmi_cmd: scmi.c (flat tree)
> > > SCMI device: Q
> > > === short test summary info
> > > ===
> > > FAILED test/py/tests/test_ut.py::test_ut[ut_dm_dm_test_scmi_cmd] -
> > > ValueError: U-Boot exited...
> > >
> > > --
> > > Tom
> >
> >
[PATCH 3/3] sunxi: H616: Add OrangePi Zero 3 board support
The OrangePi Zero 3 is a small development board featuring the Allwinner H618 SoC, shipping with up to 4GB of DRAM, Gigabit Ethernet, a micro-HDMI connector and two USB sockets. The board uses LPDDR4 DRAM and an X-Powers AXP313a PMIC, support for which was recently added to U-Boot. Add a defconfig file selecting the right drivers and DRAM options. Since the .dts file was synced from the Linux kernel repo already, we just need to add one line to the Makefile to actually build the .dtb. The DRAM parameters were derived from the values found in the BSP DRAM drivers on the SPI NOR flash. Signed-off-by: Andre Przywara --- arch/arm/dts/Makefile| 1 + board/sunxi/MAINTAINERS | 5 + configs/orangepi_zero3_defconfig | 30 ++ 3 files changed, 36 insertions(+) create mode 100644 configs/orangepi_zero3_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 1be08c5fdc2..5fc888680b3 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -835,6 +835,7 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \ sun50i-h6-tanix-tx6-mini.dtb dtb-$(CONFIG_MACH_SUN50I_H616) += \ sun50i-h616-orangepi-zero2.dtb \ + sun50i-h618-orangepi-zero3.dtb \ sun50i-h616-x96-mate.dtb dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-amarula-relic.dtb \ diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 00614372119..f556857a391 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -455,6 +455,11 @@ M: Jernej Skrabec S: Maintained F: configs/orangepi_zero2_defconfig +ORANGEPI ZERO 3 BOARD +M: Andre Przywara +S: Maintained +F: configs/orangepi_zero3_defconfig + ORANGEPI PC 2 BOARD M: Andre Przywara S: Maintained diff --git a/configs/orangepi_zero3_defconfig b/configs/orangepi_zero3_defconfig new file mode 100644 index 000..e59044f6639 --- /dev/null +++ b/configs/orangepi_zero3_defconfig @@ -0,0 +1,30 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun50i-h618-orangepi-zero3" +CONFIG_SPL=y +CONFIG_DRAM_SUN50I_H616_DX_ODT=0x07070707 +CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e +CONFIG_DRAM_SUN50I_H616_CA_DRI=0x0e0e +CONFIG_DRAM_SUN50I_H616_ODT_EN=0x +CONFIG_DRAM_SUN50I_H616_TPR6=0x4400 +CONFIG_DRAM_SUN50I_H616_TPR10=0x402f6663 +CONFIG_DRAM_SUN50I_H616_TPR11=0x24242624 +CONFIG_DRAM_SUN50I_H616_TPR12=0x0f0f100f +CONFIG_MACH_SUN50I_H616=y +CONFIG_SUNXI_DRAM_H616_LPDDR4=y +CONFIG_R_I2C_ENABLE=y +CONFIG_SPL_SPI_SUNXI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SPL_SYS_I2C_LEGACY=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=40 +CONFIG_SPI_FLASH_ZBIT=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_SUN8I_EMAC=y +CONFIG_AXP313_POWER=y +CONFIG_SPI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y -- 2.35.8
[PATCH 2/3] sunxi: H616: remove default AXP305 selection
The original H616 devices released about three years ago were typically paired with an X-Powers AXP305 PMIC. Newer devices uses the smaller AXP313, and there seem to be far more systems with this PMIC around now. Remove the default AXP305 selection for the H616 SoC from the Kconfig, and move the PMIC selection into the board defconfig files instead. Signed-off-by: Andre Przywara --- configs/orangepi_zero2_defconfig | 1 + configs/x96_mate_defconfig | 1 + drivers/power/Kconfig| 1 - 3 files changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/orangepi_zero2_defconfig b/configs/orangepi_zero2_defconfig index f13735e91c7..127cf9e365a 100644 --- a/configs/orangepi_zero2_defconfig +++ b/configs/orangepi_zero2_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_I2C_SPEED=40 CONFIG_SPI_FLASH_MACRONIX=y CONFIG_PHY_REALTEK=y CONFIG_SUN8I_EMAC=y +CONFIG_AXP305_POWER=y CONFIG_SPI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig index 318951e19c2..e805e0952b3 100644 --- a/configs/x96_mate_defconfig +++ b/configs/x96_mate_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_SYS_I2C_MVTWSI=y CONFIG_SYS_I2C_SLAVE=0x7f CONFIG_SYS_I2C_SPEED=40 +CONFIG_AXP305_POWER=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig index 2395720c99c..33b8bc1214d 100644 --- a/drivers/power/Kconfig +++ b/drivers/power/Kconfig @@ -56,7 +56,6 @@ choice depends on ARCH_SUNXI default AXP209_POWER if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default AXP221_POWER if MACH_SUN6I || MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_R40 - default AXP305_POWER if MACH_SUN50I_H616 default AXP818_POWER if MACH_SUN8I_A83T default SUNXI_NO_PMIC if MACH_SUNXI_H3_H5 || MACH_SUN50I || MACH_SUN8I_V3S -- 2.35.8
[PATCH 1/3] mtd: spi-nor: Add support for zBIT ZB25VQ128
Add support for the zBIT ZB25VQ128 (128M-bit) SPI NOR flash memory chip,
as used on the Xunlong Orange Pi Zero 3 board.
Signed-off-by: Andre Przywara
---
drivers/mtd/spi/Kconfig | 5 +
drivers/mtd/spi/spi-nor-ids.c | 5 +
2 files changed, 10 insertions(+)
diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
index 732b0760452..abed392c28d 100644
--- a/drivers/mtd/spi/Kconfig
+++ b/drivers/mtd/spi/Kconfig
@@ -224,6 +224,11 @@ config SPI_FLASH_XTX
Add support for various XTX (XTX Technology Limited)
SPI flash chips (XT25xxx).
+config SPI_FLASH_ZBIT
+ bool "ZBIT SPI flash support"
+ help
+ Add support for Zbit Semiconductor Inc. SPI flash chips (ZB25xxx).
+
endif
config SPI_FLASH_USE_4K_SECTORS
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 3cb132dcffc..f86e7ff8e58 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -571,6 +571,11 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_4B_OPCODES) },
{ INFO("xt25w01g", 0x0b651B, 0, 64 * 1024, 2048,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_4B_OPCODES) },
+#endif
+#ifdef CONFIG_SPI_FLASH_ZBIT
+ /* Zbit Semiconductor Inc. */
+ { INFO("zb25vq128", 0x5e4018, 0, 64 * 1024, 256,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
#endif
{ },
};
--
2.35.8
[PATCH 0/3] sunxi: add OrangePi Zero 3 board support
The OrangePi Zero 3 is a small development board featuring the Allwinner H618 SoC. Compared to its predecessor OrangePi Zero 2, the new board uses LPDDR4 DRAM instead of DDR3 DRAM, and an X-Powers AXP313 PMIC instead of the AXP305. U-Boot gained support for both LPDDR4 DRAM and the new PMIC just recently, so add a user for those features by adding a defconfig for the new board. To make this work, patch 1/3 introduces support for zBIT SPI NOR flash chip, and patch 2/3 removes the default AXP305 PMIC selection when compiling for H616 SoCs. Patch 3/3 then adds the defconfig. The DT was already synced from the Linux kernel repo a few weeks ago. Cheers, Andre Andre Przywara (3): mtd: spi-nor: Add support for zBIT ZB25VQ128 sunxi: H616: remove default AXP305 selection sunxi: H616: Add OrangePi Zero 3 board support arch/arm/dts/Makefile| 1 + board/sunxi/MAINTAINERS | 5 + configs/orangepi_zero2_defconfig | 1 + configs/orangepi_zero3_defconfig | 30 ++ configs/x96_mate_defconfig | 1 + drivers/mtd/spi/Kconfig | 5 + drivers/mtd/spi/spi-nor-ids.c| 5 + drivers/power/Kconfig| 1 - 8 files changed, 48 insertions(+), 1 deletion(-) create mode 100644 configs/orangepi_zero3_defconfig -- 2.35.8
[PATCH v1 3/3] bootflow: bootmeth_efi: Handle fdt not available.
While booting with efi, if fdt isn't available externally,
just use the built-in one.
Signed-off-by: Shantur Rathore
---
boot/bootmeth_efi.c | 10 +-
include/bootflow.h | 1 +
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c
index a65d8ff582..c1e15b83a3 100644
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -312,6 +312,7 @@ static int distro_efi_try_bootflow_files(struct udevice
*dev,
*/
} else {
log_debug("No device tree available\n");
+ bflow->flags |= BOOTFLOWF_USE_BUILTIN_FDT;
}
return 0;
@@ -381,6 +382,7 @@ static int distro_efi_read_bootflow_net(struct bootflow
*bflow)
bflow->fdt_addr = fdt_addr;
} else {
log_debug("No device tree available\n");
+ bflow->flags |= BOOTFLOWF_USE_BUILTIN_FDT;
}
bflow->state = BOOTFLOWST_READY;
@@ -442,7 +444,13 @@ static int distro_efi_boot(struct udevice *dev, struct
bootflow *bflow)
* At some point we can add a real interface to bootefi so we can call
* this directly. For now, go through the CLI, like distro boot.
*/
- snprintf(cmd, sizeof(cmd), "bootefi %lx %lx", kernel, fdt);
+ if (bflow->flags & BOOTFLOWF_USE_BUILTIN_FDT) {
+ log_debug("Booting with built-in fdt\n");
+ snprintf(cmd, sizeof(cmd), "bootefi %lx", kernel);
+ } else {
+ snprintf(cmd, sizeof(cmd), "bootefi %lx %lx", kernel, fdt);
+ }
+
if (run_command(cmd, 0))
return log_msg_ret("run", -EINVAL);
diff --git a/include/bootflow.h b/include/bootflow.h
index 44d3741eac..ea6c6ffc0c 100644
--- a/include/bootflow.h
+++ b/include/bootflow.h
@@ -46,6 +46,7 @@ enum bootflow_state_t {
*/
enum bootflow_flags_t {
BOOTFLOWF_USE_PRIOR_FDT = 1 << 0,
+ BOOTFLOWF_USE_BUILTIN_FDT = 1 << 1,
};
/**
--
2.40.1
[PATCH v1 2/3] bootflow: bootmeth_efi: Don't set bootdev again
efi_set_bootdev is already called as part of tftp while doing dhcp_run()
Doing this again crashes U-boot and we don't need to call again.
Signed-off-by: Shantur Rathore
---
boot/bootmeth_efi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c
index ad3f4330da..a65d8ff582 100644
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -359,9 +359,6 @@ static int distro_efi_read_bootflow_net(struct bootflow
*bflow)
return log_msg_ret("sz", -EINVAL);
bflow->size = size;
- /* do the hideous EFI hack */
- efi_set_bootdev("Net", "", bflow->fname, map_sysmem(addr, 0),
- bflow->size);
/* read the DT file also */
fdt_addr_str = env_get("fdt_addr_r");
--
2.40.1
[PATCH v1 1/3] bootflow: bootmeth_efi: Set bootp_arch as hex
bootmeth_efi sets up bootp_arch which is read later in bootp.c
Currently bootp_arch is being set as integer string and being
read in bootp.c as hex, this sends incorrect arch value to dhcp server
which in return sends wrong file for network boot.
For ARM64 UEFI Arch value is 0xb (11), here we set environment as 11
and later is read as 0x11 and 17 is sent to dhcp server.
Setting it as hex string fixes the problem.
Signed-off-by: Shantur Rathore
---
boot/bootmeth_efi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/boot/bootmeth_efi.c b/boot/bootmeth_efi.c
index ae936c8daa..ad3f4330da 100644
--- a/boot/bootmeth_efi.c
+++ b/boot/bootmeth_efi.c
@@ -338,7 +338,7 @@ static int distro_efi_read_bootflow_net(struct bootflow
*bflow)
ret = env_set("bootp_vci", str);
if (ret)
return log_msg_ret("vcs", ret);
- ret = env_set_ulong("bootp_arch", arch);
+ ret = env_set_hex("bootp_arch", arch);
if (ret)
return log_msg_ret("ars", ret);
--
2.40.1
[PATCH v1 0/3] bootflow: bootmeth_efi: Fix network efi boot
Currently bootmeth_efi crashes while doing a network (dhcp) boot. This patch series fixes issues and both network and disk boot works. Shantur Rathore (3): bootflow: bootmeth_efi: Set bootp_arch as hex bootflow: bootmeth_efi: Don't set bootdev again bootflow: bootmeth_efi: Handle fdt not available. boot/bootmeth_efi.c | 15 ++- include/bootflow.h | 1 + 2 files changed, 11 insertions(+), 5 deletions(-) -- 2.40.1
Re: [PATCH 1/2] dt-bindings: misc: Move esm-k3.txt to ti,j721e-esm.yaml
On Mon, Nov 13, 2023 at 10:00:22AM +0530, Neha Malcom Francis wrote: > Move esm-k3.txt to ti,j721e-esm.yaml in line with the devicetree > documentation in kernel. > > Signed-off-by: Neha Malcom Francis I assume this is also from v6.7-rc1 and: Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature
Re: [PATCH v4 09/12] x86: Enable SSE in 64-bit mode
On Tue, Nov 14, 2023 at 07:46:36AM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Tue, Nov 14, 2023 at 6:59 AM Tom Rini wrote:
> >
> > On Mon, Nov 13, 2023 at 03:28:13PM -0700, Simon Glass wrote:
> > > Hi Bin,
> > >
> > > On Mon, 13 Nov 2023 at 15:08, Bin Meng wrote:
> > > >
> > > > Hi Simon,
> > > >
> > > > On Mon, Nov 13, 2023 at 4:03 AM Simon Glass wrote:
> > > > >
> > > > > This is needed to support Truetype fonts. In any case, the compiler
> > > > > expects SSE to be available in 64-bit mode. Provide an option to
> > > > > enable
> > > > > SSE so that hardware floating-point arithmetic works.
> > > > >
> > > > > Signed-off-by: Simon Glass
> > > > > Suggested-by: Bin Meng
> > > > > ---
> > > > >
> > > > > Changes in v4:
> > > > > - Use a Kconfig option
> > > > >
> > > > > arch/x86/Kconfig | 8
> > > > > arch/x86/config.mk| 4
> > > > > arch/x86/cpu/x86_64/cpu.c | 12
> > > > > drivers/video/Kconfig | 1 +
> > > > > 4 files changed, 25 insertions(+)
> > > > >
> > > > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > > > > index 99e59d94c606..6b532d712ee8 100644
> > > > > --- a/arch/x86/Kconfig
> > > > > +++ b/arch/x86/Kconfig
> > > > > @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE
> > > > > hex
> > > > > default 0x1
> > > > >
> > > > > +config X86_HARDFP
> > > > > + bool "Support hardware floating point"
> > > > > + help
> > > > > + U-Boot generally does not make use of floating point. Where
> > > > > this is
> > > > > + needed, it can be enabled using this option. This adjusts
> > > > > the
> > > > > + start-up code for 64-bit mode and changes the compiler
> > > > > options for
> > > > > + 64-bit to enable SSE.
> > > >
> > > > As discussed in another thread, this option should be made global to
> > > > all architectures and by default no.
> > > >
> > > > > +
> > > > > config HAVE_ITSS
> > > > > bool "Enable ITSS"
> > > > > help
> > > > > diff --git a/arch/x86/config.mk b/arch/x86/config.mk
> > > > > index 26ec1af2f0b0..2e3a7119e798 100644
> > > > > --- a/arch/x86/config.mk
> > > > > +++ b/arch/x86/config.mk
> > > > > @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y)
> > > > > PLATFORM_CPPFLAGS += -march=i386 -m32
> > > > > else
> > > > > PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
> > > > > -march=core2 -m64
> > > > > +
> > > > > +ifndef CONFIG_X86_HARDFP
> > > > > PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
> > > > > endif
> > > > >
> > > > > +endif # IS_32BIT
> > > > > +
> > > > > PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections
> > > > > -fvisibility=hidden
> > > > >
> > > > > KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions
> > > > > diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
> > > > > index 2647bff891f8..5ea746ecce4d 100644
> > > > > --- a/arch/x86/cpu/x86_64/cpu.c
> > > > > +++ b/arch/x86/cpu/x86_64/cpu.c
> > > > > @@ -10,6 +10,7 @@
> > > > > #include
> > > > > #include
> > > > > #include
> > > > > +#include
> > > > >
> > > > > DECLARE_GLOBAL_DATA_PTR;
> > > > >
> > > > > @@ -39,11 +40,22 @@ int x86_mp_init(void)
> > > > > return 0;
> > > > > }
> > > > >
> > > > > +/* enable SSE features for hardware floating point */
> > > > > +static void setup_sse_features(void)
> > > > > +{
> > > > > + asm ("mov %%cr4, %%rax\n" \
> > > > > + "or %0, %%rax\n" \
> > > > > + "mov %%rax, %%cr4\n" \
> > > > > + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax");
> > > > > +}
> > > > > +
> > > > > int x86_cpu_reinit_f(void)
> > > > > {
> > > > > /* set the vendor to Intel so that native_calibrate_tsc()
> > > > > works */
> > > > > gd->arch.x86_vendor = X86_VENDOR_INTEL;
> > > > > gd->arch.has_mtrr = true;
> > > > > + if (IS_ENABLED(CONFIG_X86_HARDFP))
> > > > > + setup_sse_features();
> > > > >
> > > > > return 0;
> > > > > }
> > > > > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> > > > > index 6f319ba0d544..39c82521be16 100644
> > > > > --- a/drivers/video/Kconfig
> > > > > +++ b/drivers/video/Kconfig
> > > > > @@ -180,6 +180,7 @@ config CONSOLE_ROTATION
> > > > >
> > > > > config CONSOLE_TRUETYPE
> > > > > bool "Support a console that uses TrueType fonts"
> > > > > + select X86_HARDFP if X86
> > > >
> > > > This should be "depends on HARDFP", indicating that the TrueType
> > > > library is using hardware fp itself, and user has to explicitly turn
> > > > the hardware fp Kconfig option on.
> > >
> > > So you mean 'depends on HARDFP if X86' ? After all, this is only for
> > > X86 - other archs can use softfp which is already enabled, as I
> > > understand it.
> > >
> > > >
> > > > "Select" does not work for architectures that does not have the
> > > > "enabling hardware fp" logic in place.
> > > >
> > > > > help
> > > > > TrueTrype fonts can provide outline-drawing capability
> > >
Re: [PATCH v4 09/12] x86: Enable SSE in 64-bit mode
Hi Tom,
On Tue, Nov 14, 2023 at 6:59 AM Tom Rini wrote:
>
> On Mon, Nov 13, 2023 at 03:28:13PM -0700, Simon Glass wrote:
> > Hi Bin,
> >
> > On Mon, 13 Nov 2023 at 15:08, Bin Meng wrote:
> > >
> > > Hi Simon,
> > >
> > > On Mon, Nov 13, 2023 at 4:03 AM Simon Glass wrote:
> > > >
> > > > This is needed to support Truetype fonts. In any case, the compiler
> > > > expects SSE to be available in 64-bit mode. Provide an option to enable
> > > > SSE so that hardware floating-point arithmetic works.
> > > >
> > > > Signed-off-by: Simon Glass
> > > > Suggested-by: Bin Meng
> > > > ---
> > > >
> > > > Changes in v4:
> > > > - Use a Kconfig option
> > > >
> > > > arch/x86/Kconfig | 8
> > > > arch/x86/config.mk| 4
> > > > arch/x86/cpu/x86_64/cpu.c | 12
> > > > drivers/video/Kconfig | 1 +
> > > > 4 files changed, 25 insertions(+)
> > > >
> > > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > > > index 99e59d94c606..6b532d712ee8 100644
> > > > --- a/arch/x86/Kconfig
> > > > +++ b/arch/x86/Kconfig
> > > > @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE
> > > > hex
> > > > default 0x1
> > > >
> > > > +config X86_HARDFP
> > > > + bool "Support hardware floating point"
> > > > + help
> > > > + U-Boot generally does not make use of floating point. Where
> > > > this is
> > > > + needed, it can be enabled using this option. This adjusts the
> > > > + start-up code for 64-bit mode and changes the compiler
> > > > options for
> > > > + 64-bit to enable SSE.
> > >
> > > As discussed in another thread, this option should be made global to
> > > all architectures and by default no.
> > >
> > > > +
> > > > config HAVE_ITSS
> > > > bool "Enable ITSS"
> > > > help
> > > > diff --git a/arch/x86/config.mk b/arch/x86/config.mk
> > > > index 26ec1af2f0b0..2e3a7119e798 100644
> > > > --- a/arch/x86/config.mk
> > > > +++ b/arch/x86/config.mk
> > > > @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y)
> > > > PLATFORM_CPPFLAGS += -march=i386 -m32
> > > > else
> > > > PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
> > > > -march=core2 -m64
> > > > +
> > > > +ifndef CONFIG_X86_HARDFP
> > > > PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
> > > > endif
> > > >
> > > > +endif # IS_32BIT
> > > > +
> > > > PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections
> > > > -fvisibility=hidden
> > > >
> > > > KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions
> > > > diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
> > > > index 2647bff891f8..5ea746ecce4d 100644
> > > > --- a/arch/x86/cpu/x86_64/cpu.c
> > > > +++ b/arch/x86/cpu/x86_64/cpu.c
> > > > @@ -10,6 +10,7 @@
> > > > #include
> > > > #include
> > > > #include
> > > > +#include
> > > >
> > > > DECLARE_GLOBAL_DATA_PTR;
> > > >
> > > > @@ -39,11 +40,22 @@ int x86_mp_init(void)
> > > > return 0;
> > > > }
> > > >
> > > > +/* enable SSE features for hardware floating point */
> > > > +static void setup_sse_features(void)
> > > > +{
> > > > + asm ("mov %%cr4, %%rax\n" \
> > > > + "or %0, %%rax\n" \
> > > > + "mov %%rax, %%cr4\n" \
> > > > + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax");
> > > > +}
> > > > +
> > > > int x86_cpu_reinit_f(void)
> > > > {
> > > > /* set the vendor to Intel so that native_calibrate_tsc() works
> > > > */
> > > > gd->arch.x86_vendor = X86_VENDOR_INTEL;
> > > > gd->arch.has_mtrr = true;
> > > > + if (IS_ENABLED(CONFIG_X86_HARDFP))
> > > > + setup_sse_features();
> > > >
> > > > return 0;
> > > > }
> > > > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> > > > index 6f319ba0d544..39c82521be16 100644
> > > > --- a/drivers/video/Kconfig
> > > > +++ b/drivers/video/Kconfig
> > > > @@ -180,6 +180,7 @@ config CONSOLE_ROTATION
> > > >
> > > > config CONSOLE_TRUETYPE
> > > > bool "Support a console that uses TrueType fonts"
> > > > + select X86_HARDFP if X86
> > >
> > > This should be "depends on HARDFP", indicating that the TrueType
> > > library is using hardware fp itself, and user has to explicitly turn
> > > the hardware fp Kconfig option on.
> >
> > So you mean 'depends on HARDFP if X86' ? After all, this is only for
> > X86 - other archs can use softfp which is already enabled, as I
> > understand it.
> >
> > >
> > > "Select" does not work for architectures that does not have the
> > > "enabling hardware fp" logic in place.
> > >
> > > > help
> > > > TrueTrype fonts can provide outline-drawing capability rather
> > > > than
> > > > needing to provide a bitmap for each font and size that is
> > > > needed.
> > > > --
> >
> > I still don't think we are on the same page here. I would prefer to
> > just enable the options without any option. I really don't want to get
> > into RISC-V stuff - that is a separate concern.
> >
> > From my POV it
Re: [PATCH v4 0/7] arm: mach-snapdragon: Qualcomm clock driver cleanup
On Tue, 07 Nov 2023 12:40:58 +, Caleb Connolly wrote: > This series begins making some headway towards cleaning up Qualcomm > platform support in u-boot. The following is a rough overview of the > changes: > > * Move the Qualcomm clock drivers out of mach-snapdragon and into clk/qcom > * Introduce per-platform clock driver configs to decouple Qualcomm platform > support from mach-snapdragon targets. > * Add the IPQ4019 clock driver, removing it from mach-ipq40xx and introducing > the reset map. > * Merge the qcom reset driver is into clk/qcom and rework it to be > compatible with upstream devicetrees. > * A callback model is added so that multiple clock drivers can be > compiled in at once. > * SDM845 gains support for enabling/disabling all gate clocks (CBC's) by > way of a new "gate_clk" abstraction. > * Preperatory cleanup work is done to simplify the bringup process for > new platforms. > > [...] Applied, thanks! [1/7] clk/qcom: move from mach-snapdragon commit: 5bb0df6d39dcd6fb1256535bd0b1eac747b711b1 [2/7] clk/qcom: move ipq4019 driver from mach-ipq40xx commit: 67d532d6354bbb0e0a03446fa0ab7b4996cf643d [3/7] clk/qcom: handle resets and clocks in one device commit: d993573e5084a595a8ffcc01ac471d5fadaa634f [4/7] clk/qcom: sdm845: add register map for simple gate clocks commit: 6985e30ee0310de9bbc083dd03847327691dd2d6 [5/7] clk/qcom: use function pointers for enable and set_rate commit: 839739c4f10f7ac0c43cffe06d3e402ccabe37e4 [6/7] clk/qcom: add mnd_width to clk_rcg_set_rate_mnd() commit: b49a6531738b2875f3d3b22c8d28b9dbdc5573ef [7/7] clk/qcom: fix rcg divider value commit: 45b9e9165409691b02cd761fa44c8dcc5974cf29 Best regards, -- // Caleb (they/them)
Re: [PATCH v4 09/12] x86: Enable SSE in 64-bit mode
On Mon, Nov 13, 2023 at 03:28:13PM -0700, Simon Glass wrote:
> Hi Bin,
>
> On Mon, 13 Nov 2023 at 15:08, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Mon, Nov 13, 2023 at 4:03 AM Simon Glass wrote:
> > >
> > > This is needed to support Truetype fonts. In any case, the compiler
> > > expects SSE to be available in 64-bit mode. Provide an option to enable
> > > SSE so that hardware floating-point arithmetic works.
> > >
> > > Signed-off-by: Simon Glass
> > > Suggested-by: Bin Meng
> > > ---
> > >
> > > Changes in v4:
> > > - Use a Kconfig option
> > >
> > > arch/x86/Kconfig | 8
> > > arch/x86/config.mk| 4
> > > arch/x86/cpu/x86_64/cpu.c | 12
> > > drivers/video/Kconfig | 1 +
> > > 4 files changed, 25 insertions(+)
> > >
> > > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > > index 99e59d94c606..6b532d712ee8 100644
> > > --- a/arch/x86/Kconfig
> > > +++ b/arch/x86/Kconfig
> > > @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE
> > > hex
> > > default 0x1
> > >
> > > +config X86_HARDFP
> > > + bool "Support hardware floating point"
> > > + help
> > > + U-Boot generally does not make use of floating point. Where
> > > this is
> > > + needed, it can be enabled using this option. This adjusts the
> > > + start-up code for 64-bit mode and changes the compiler options
> > > for
> > > + 64-bit to enable SSE.
> >
> > As discussed in another thread, this option should be made global to
> > all architectures and by default no.
> >
> > > +
> > > config HAVE_ITSS
> > > bool "Enable ITSS"
> > > help
> > > diff --git a/arch/x86/config.mk b/arch/x86/config.mk
> > > index 26ec1af2f0b0..2e3a7119e798 100644
> > > --- a/arch/x86/config.mk
> > > +++ b/arch/x86/config.mk
> > > @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y)
> > > PLATFORM_CPPFLAGS += -march=i386 -m32
> > > else
> > > PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
> > > -march=core2 -m64
> > > +
> > > +ifndef CONFIG_X86_HARDFP
> > > PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
> > > endif
> > >
> > > +endif # IS_32BIT
> > > +
> > > PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections
> > > -fvisibility=hidden
> > >
> > > KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions
> > > diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
> > > index 2647bff891f8..5ea746ecce4d 100644
> > > --- a/arch/x86/cpu/x86_64/cpu.c
> > > +++ b/arch/x86/cpu/x86_64/cpu.c
> > > @@ -10,6 +10,7 @@
> > > #include
> > > #include
> > > #include
> > > +#include
> > >
> > > DECLARE_GLOBAL_DATA_PTR;
> > >
> > > @@ -39,11 +40,22 @@ int x86_mp_init(void)
> > > return 0;
> > > }
> > >
> > > +/* enable SSE features for hardware floating point */
> > > +static void setup_sse_features(void)
> > > +{
> > > + asm ("mov %%cr4, %%rax\n" \
> > > + "or %0, %%rax\n" \
> > > + "mov %%rax, %%cr4\n" \
> > > + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax");
> > > +}
> > > +
> > > int x86_cpu_reinit_f(void)
> > > {
> > > /* set the vendor to Intel so that native_calibrate_tsc() works */
> > > gd->arch.x86_vendor = X86_VENDOR_INTEL;
> > > gd->arch.has_mtrr = true;
> > > + if (IS_ENABLED(CONFIG_X86_HARDFP))
> > > + setup_sse_features();
> > >
> > > return 0;
> > > }
> > > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> > > index 6f319ba0d544..39c82521be16 100644
> > > --- a/drivers/video/Kconfig
> > > +++ b/drivers/video/Kconfig
> > > @@ -180,6 +180,7 @@ config CONSOLE_ROTATION
> > >
> > > config CONSOLE_TRUETYPE
> > > bool "Support a console that uses TrueType fonts"
> > > + select X86_HARDFP if X86
> >
> > This should be "depends on HARDFP", indicating that the TrueType
> > library is using hardware fp itself, and user has to explicitly turn
> > the hardware fp Kconfig option on.
>
> So you mean 'depends on HARDFP if X86' ? After all, this is only for
> X86 - other archs can use softfp which is already enabled, as I
> understand it.
>
> >
> > "Select" does not work for architectures that does not have the
> > "enabling hardware fp" logic in place.
> >
> > > help
> > > TrueTrype fonts can provide outline-drawing capability rather
> > > than
> > > needing to provide a bitmap for each font and size that is
> > > needed.
> > > --
>
> I still don't think we are on the same page here. I would prefer to
> just enable the options without any option. I really don't want to get
> into RISC-V stuff - that is a separate concern.
>
> From my POV it seems that x86 is special in that:
> - it uses hardfp
> - hardfp is always available in any CPU with 64-bit support (I think?)
Maybe the issue even is that on x86 we're being too imprecise in our
build rules (and also on RISC-V, another issue). Today on x86 this fails
because we say -mno-mmx -mno-sse and not also -msoft-float. I can just
turn
Re: [PATCH v4 09/12] x86: Enable SSE in 64-bit mode
Hi Bin,
On Mon, 13 Nov 2023 at 15:08, Bin Meng wrote:
>
> Hi Simon,
>
> On Mon, Nov 13, 2023 at 4:03 AM Simon Glass wrote:
> >
> > This is needed to support Truetype fonts. In any case, the compiler
> > expects SSE to be available in 64-bit mode. Provide an option to enable
> > SSE so that hardware floating-point arithmetic works.
> >
> > Signed-off-by: Simon Glass
> > Suggested-by: Bin Meng
> > ---
> >
> > Changes in v4:
> > - Use a Kconfig option
> >
> > arch/x86/Kconfig | 8
> > arch/x86/config.mk| 4
> > arch/x86/cpu/x86_64/cpu.c | 12
> > drivers/video/Kconfig | 1 +
> > 4 files changed, 25 insertions(+)
> >
> > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > index 99e59d94c606..6b532d712ee8 100644
> > --- a/arch/x86/Kconfig
> > +++ b/arch/x86/Kconfig
> > @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE
> > hex
> > default 0x1
> >
> > +config X86_HARDFP
> > + bool "Support hardware floating point"
> > + help
> > + U-Boot generally does not make use of floating point. Where this
> > is
> > + needed, it can be enabled using this option. This adjusts the
> > + start-up code for 64-bit mode and changes the compiler options for
> > + 64-bit to enable SSE.
>
> As discussed in another thread, this option should be made global to
> all architectures and by default no.
>
> > +
> > config HAVE_ITSS
> > bool "Enable ITSS"
> > help
> > diff --git a/arch/x86/config.mk b/arch/x86/config.mk
> > index 26ec1af2f0b0..2e3a7119e798 100644
> > --- a/arch/x86/config.mk
> > +++ b/arch/x86/config.mk
> > @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y)
> > PLATFORM_CPPFLAGS += -march=i386 -m32
> > else
> > PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
> > -march=core2 -m64
> > +
> > +ifndef CONFIG_X86_HARDFP
> > PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
> > endif
> >
> > +endif # IS_32BIT
> > +
> > PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections
> > -fvisibility=hidden
> >
> > KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions
> > diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
> > index 2647bff891f8..5ea746ecce4d 100644
> > --- a/arch/x86/cpu/x86_64/cpu.c
> > +++ b/arch/x86/cpu/x86_64/cpu.c
> > @@ -10,6 +10,7 @@
> > #include
> > #include
> > #include
> > +#include
> >
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -39,11 +40,22 @@ int x86_mp_init(void)
> > return 0;
> > }
> >
> > +/* enable SSE features for hardware floating point */
> > +static void setup_sse_features(void)
> > +{
> > + asm ("mov %%cr4, %%rax\n" \
> > + "or %0, %%rax\n" \
> > + "mov %%rax, %%cr4\n" \
> > + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax");
> > +}
> > +
> > int x86_cpu_reinit_f(void)
> > {
> > /* set the vendor to Intel so that native_calibrate_tsc() works */
> > gd->arch.x86_vendor = X86_VENDOR_INTEL;
> > gd->arch.has_mtrr = true;
> > + if (IS_ENABLED(CONFIG_X86_HARDFP))
> > + setup_sse_features();
> >
> > return 0;
> > }
> > diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> > index 6f319ba0d544..39c82521be16 100644
> > --- a/drivers/video/Kconfig
> > +++ b/drivers/video/Kconfig
> > @@ -180,6 +180,7 @@ config CONSOLE_ROTATION
> >
> > config CONSOLE_TRUETYPE
> > bool "Support a console that uses TrueType fonts"
> > + select X86_HARDFP if X86
>
> This should be "depends on HARDFP", indicating that the TrueType
> library is using hardware fp itself, and user has to explicitly turn
> the hardware fp Kconfig option on.
So you mean 'depends on HARDFP if X86' ? After all, this is only for
X86 - other archs can use softfp which is already enabled, as I
understand it.
>
> "Select" does not work for architectures that does not have the
> "enabling hardware fp" logic in place.
>
> > help
> > TrueTrype fonts can provide outline-drawing capability rather than
> > needing to provide a bitmap for each font and size that is needed.
> > --
I still don't think we are on the same page here. I would prefer to
just enable the options without any option. I really don't want to get
into RISC-V stuff - that is a separate concern.
>From my POV it seems that x86 is special in that:
- it uses hardfp
- hardfp is always available in any CPU with 64-bit support (I think?)
So please can you be a bit more specific here?
Regards,
Simon
Re: [PATCH v4 09/12] x86: Enable SSE in 64-bit mode
Hi Simon,
On Mon, Nov 13, 2023 at 4:03 AM Simon Glass wrote:
>
> This is needed to support Truetype fonts. In any case, the compiler
> expects SSE to be available in 64-bit mode. Provide an option to enable
> SSE so that hardware floating-point arithmetic works.
>
> Signed-off-by: Simon Glass
> Suggested-by: Bin Meng
> ---
>
> Changes in v4:
> - Use a Kconfig option
>
> arch/x86/Kconfig | 8
> arch/x86/config.mk| 4
> arch/x86/cpu/x86_64/cpu.c | 12
> drivers/video/Kconfig | 1 +
> 4 files changed, 25 insertions(+)
>
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index 99e59d94c606..6b532d712ee8 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -723,6 +723,14 @@ config ROM_TABLE_SIZE
> hex
> default 0x1
>
> +config X86_HARDFP
> + bool "Support hardware floating point"
> + help
> + U-Boot generally does not make use of floating point. Where this is
> + needed, it can be enabled using this option. This adjusts the
> + start-up code for 64-bit mode and changes the compiler options for
> + 64-bit to enable SSE.
As discussed in another thread, this option should be made global to
all architectures and by default no.
> +
> config HAVE_ITSS
> bool "Enable ITSS"
> help
> diff --git a/arch/x86/config.mk b/arch/x86/config.mk
> index 26ec1af2f0b0..2e3a7119e798 100644
> --- a/arch/x86/config.mk
> +++ b/arch/x86/config.mk
> @@ -27,9 +27,13 @@ ifeq ($(IS_32BIT),y)
> PLATFORM_CPPFLAGS += -march=i386 -m32
> else
> PLATFORM_CPPFLAGS += $(if $(CONFIG_SPL_BUILD),,-fpic) -fno-common
> -march=core2 -m64
> +
> +ifndef CONFIG_X86_HARDFP
> PLATFORM_CPPFLAGS += -mno-mmx -mno-sse
> endif
>
> +endif # IS_32BIT
> +
> PLATFORM_RELFLAGS += -fdata-sections -ffunction-sections -fvisibility=hidden
>
> KBUILD_LDFLAGS += -Bsymbolic -Bsymbolic-functions
> diff --git a/arch/x86/cpu/x86_64/cpu.c b/arch/x86/cpu/x86_64/cpu.c
> index 2647bff891f8..5ea746ecce4d 100644
> --- a/arch/x86/cpu/x86_64/cpu.c
> +++ b/arch/x86/cpu/x86_64/cpu.c
> @@ -10,6 +10,7 @@
> #include
> #include
> #include
> +#include
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -39,11 +40,22 @@ int x86_mp_init(void)
> return 0;
> }
>
> +/* enable SSE features for hardware floating point */
> +static void setup_sse_features(void)
> +{
> + asm ("mov %%cr4, %%rax\n" \
> + "or %0, %%rax\n" \
> + "mov %%rax, %%cr4\n" \
> + : : "i" (X86_CR4_OSFXSR | X86_CR4_OSXMMEXCPT) : "eax");
> +}
> +
> int x86_cpu_reinit_f(void)
> {
> /* set the vendor to Intel so that native_calibrate_tsc() works */
> gd->arch.x86_vendor = X86_VENDOR_INTEL;
> gd->arch.has_mtrr = true;
> + if (IS_ENABLED(CONFIG_X86_HARDFP))
> + setup_sse_features();
>
> return 0;
> }
> diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
> index 6f319ba0d544..39c82521be16 100644
> --- a/drivers/video/Kconfig
> +++ b/drivers/video/Kconfig
> @@ -180,6 +180,7 @@ config CONSOLE_ROTATION
>
> config CONSOLE_TRUETYPE
> bool "Support a console that uses TrueType fonts"
> + select X86_HARDFP if X86
This should be "depends on HARDFP", indicating that the TrueType
library is using hardware fp itself, and user has to explicitly turn
the hardware fp Kconfig option on.
"Select" does not work for architectures that does not have the
"enabling hardware fp" logic in place.
> help
> TrueTrype fonts can provide outline-drawing capability rather than
> needing to provide a bitmap for each font and size that is needed.
> --
Regards,
Bin
Re: [PATCH] efi_loader: Fix UEFI variable error handling
On Fri, 10 Nov 2023 at 15:12, Heinrich Schuchardt wrote:
>
>
>
> Am 10. November 2023 11:04:24 MEZ schrieb Ilias Apalodimas
> :
> >Hi Heinrich, Weizhao
> >
> >On Thu, 9 Nov 2023 at 15:57, Heinrich Schuchardt wrote:
> >>
> >> On 11/9/23 04:55, Weizhao Ouyang wrote:
> >> > Correct some UEFI variable error handing code paths.
> >> >
> >> > Signed-off-by: Weizhao Ouyang
> >> > ---
> >> > lib/efi_loader/efi_var_file.c | 1 +
> >> > lib/efi_loader/efi_variable.c | 8
> >> > 2 files changed, 5 insertions(+), 4 deletions(-)
> >> >
> >> > diff --git a/lib/efi_loader/efi_var_file.c
> >> > b/lib/efi_loader/efi_var_file.c
> >> > index 62e071bd83..dbb9b1f3fc 100644
> >> > --- a/lib/efi_loader/efi_var_file.c
> >> > +++ b/lib/efi_loader/efi_var_file.c
> >> > @@ -236,6 +236,7 @@ efi_status_t efi_var_from_file(void)
> >> > log_err("Invalid EFI variables file\n");
> >> > error:
> >> > free(buf);
> >> > + return ret;
> >>
> >> Hello Weizhao,
> >>
> >> thank you for looking into the error handling.
> >>
> >> U-Boot's UEFI variables can either be stored in file ubootefi.var in the
> >> ESP or in the RPMB (Replay Protected Memory Block) partition of the
> >> eMMC. The suggested changes are about handling of errors when reading or
> >> writing the file ubootefi.var. Security relevant variables (PK, KEK, db,
> >> dbx) are never read from file.
> >>
> >> On first boot a file ubootefi.var will not exist. It has to be created
> >> by U-Boot. If efi_var_from_file() would return an error if the file does
> >> not exist or is corrupted, we would never be able to boot such a system.
> >> This is why deliberately we return EFI_SUCCESS here. What is missing in
> >> the code is a comment explaining the design decision.
> >
> >Yes, that's correct. The function description tries to explain that
> >but is a bit vague.
> >
> >>
> >> > #endif
> >> > return EFI_SUCCESS;
> >> > }
> >> > diff --git a/lib/efi_loader/efi_variable.c
> >> > b/lib/efi_loader/efi_variable.c
> >> > index be95ed44e6..13966297c6 100644
> >> > --- a/lib/efi_loader/efi_variable.c
> >> > +++ b/lib/efi_loader/efi_variable.c
> >> > @@ -350,17 +350,17 @@ efi_status_t efi_set_variable_int(const u16
> >> > *variable_name,
> >> >
> >> > if (var_type == EFI_AUTH_VAR_PK)
> >> > ret = efi_init_secure_state();
> >> > - else
> >> > - ret = EFI_SUCCESS;
> >>
> >> The two lines are unreachable code and should be removed.
> >>
> >> > + if (ret != EFI_SUCCESS)
> >> > + return ret;
> >>
> >> These new lines should only be reached if var_type == EFI_AUTH_VAR_PK.
> >>
> >
> >Yea agree here
> >
> >> I am not sure what Would be the right error handling if
> >> efi_init_secure_state() fails:
> >>
> >> * Do we have to set PK to the old value?
> >
> >What do you mean by old value?
>
> We are in SetVariable() and set, changed, or deleted PK in memory. But this
> has lead to some inconsistency. Should the prior state be restored?
Ah right. As I said this code is basically there to allow us to run
self-tests. If setting the security state fails, those tests should
fail whether we revert or not. So I think we don't care. We could add
a comment explaining the situation with the secure boot state
transition when auth variables are not preseseded
Thanks
/Ilias
>
> Regards
>
> Heinrich
>
> >
> >> * Should we still persist PK to ubootefi.var?
> >
> >I would argue that we don't really care about what happens in this
> >case. Writing authenticated variables on a file is only supported if
> >preseeding is disabled and it *never* gets restored. We basically
> >allow that code to test EFI secure boot by writing PK, KEK, DB on the
> >fly, but once we reboot those variables are gone.
> >If preseeding is enabled we don't write that at all. We return
> >EFI_WRITE_PROTECTED. We could do that regardless. But since we have
> >those tests, the memory backend should still be allowed to write
> >those.
> >
> >>
> >> However we decide we should describe our decisions in a code comment.
> >
> >I think the logic here should be
> >1. If variables are preseeded and restoring any authenticated
> >variables fails, the EFI subsystem should refuse to start (which it
> >already does)
> >2. If preseeding is not configured we can continue as best effort and
> >try to recover the board and rewrite variables. We don't trust
> >variables stored in a file and we should keep it that way
> >
> >>
> >> >
> >> > /*
> >> >* Write non-volatile EFI variables to file
> >> >* TODO: check if a value change has occured to avoid superfluous
> >> > writes
> >> >*/
> >> > if (attributes & EFI_VARIABLE_NON_VOLATILE)
> >> > - efi_var_to_file();
> >> > + ret = efi_var_to_file();
> >>
> >> The discussion here should focus on the treatment of errors in the
> >> file-system.
> >>
> >> The following error cases come to my mind:
> >>
> >> * ESP partition is missing
> >> * ESP FAT file
[PATCH] arm: dts: k3-j7200: Sync with Linux 6.7-rc1
Sync u-boot device tree with Linux kernel 6.7-rc1
Signed-off-by: Reid Tonking
---
Boot-log: https://gist.github.com/reidt1/db5426f2a778369db8c3699cf293b94f
arch/arm/dts/k3-j7200-main.dtsi | 2 +-
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 9 -
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3-j7200-main.dtsi b/arch/arm/dts/k3-j7200-main.dtsi
index cdb1d6b2a9..264913f832 100644
--- a/arch/arm/dts/k3-j7200-main.dtsi
+++ b/arch/arm/dts/k3-j7200-main.dtsi
@@ -91,7 +91,7 @@
};
main_navss: bus@3000 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x3000 0x00 0x3000 0x00 0x0c40>;
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 6ffaf85fa6..3fc588b848 100644
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -318,7 +318,7 @@
};
mcu_navss: bus@2838 {
- compatible = "simple-mfd";
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x00 0x2838 0x00 0x2838 0x00 0x0388>;
@@ -637,4 +637,11 @@
power-domains = <_pds 154 TI_SCI_PD_EXCLUSIVE>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@4080 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4080 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
--
2.34.1
Re: [PATCH 1/1] arm: k3: Enable instruction cache for main domain SPL
On 16:07-20231113, Joao Paulo Goncalves wrote: > From: Joao Paulo Goncalves > > Change spl_enable_dcache so it also enable icache on SPL > initialization for the main domain part of the boot flow. This > improves bootloader booting time. > > Link: > https://lore.kernel.org/all/20231109140958.1093235-1-joao.goncal...@toradex.com/ > Signed-off-by: Joao Paulo Goncalves > --- Tested-by: Nishanth Menon https://gist.github.com/nmenon/ee47a34d6b581916d6fba164617ea93b -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
Re: [PATCH] efi_loader: Clean up efi_dp_append and efi_dp_concat
Hi Heinrich
On Mon, 13 Nov 2023 at 09:37, Heinrich Schuchardt wrote:
>
> On 11/7/23 18:36, Ilias Apalodimas wrote:
> > Looking back at the initrd storing functionality, we introduced three
> > functions, efi_dp_append_or_concatenate(), efi_dp_append/concat(). In
> > hindsight we could have simplified that by a lot. First of all none of
> > the functions append anything. They all allocate a new device path and
> > concatenate the contents of two device paths in one. A boolean parameter
> > controls the final device path -- if that's true an end node is injected
> > between the two device paths.
> >
> > So let's rewrite this and make it a bit easier to read. Get rid of
> > efi_dp_append(), efi_dp_concat() and rename
> > efi_dp_append_or_concatenate() to efi_dp_concat(). This is far more
> > intuitive and the only adjustment that is needed is an extra boolean
> > argument on all callsites.
>
> After this patch we still have efi_dp_append_instance(). The only
> difference to efi_dp_concat(,,true) seems only to be the type of end
> node used as separator.
>
> Hence the last argument of efi_dp_contat() should be be either of:
>
> * 0
> * DEVICE_PATH_SUB_TYPE_INSTANCE_END
> * DEVICE_PATH_SUB_TYPE_END
ah fair enough, I'll clean that up as well. Add an enum as a 3rd argument then?
rd_dp) + sizeof(END);
> > } else {
> > final_dp = efi_dp_dup(dp);
> > diff --git a/cmd/efidebug.c b/cmd/efidebug.c
>
> >
> > - final_fp = efi_dp_concat(file_path, initrd_dp);
> > + final_fp = efi_dp_concat(file_path, initrd_dp, true);
> > if (!final_fp) {
> > printf("Cannot create final device path\n");
> > r = CMD_RET_FAILURE;
> > diff --git a/include/efi_loader.h b/include/efi_loader.h
> > index e24410505f40..398cd20c7ae6 100644
> > --- a/include/efi_loader.h
> > +++ b/include/efi_loader.h
> > @@ -808,8 +808,6 @@ efi_uintn_t efi_dp_instance_size(const struct
> > efi_device_path *dp);
> > /* size of multi-instance device path excluding end node */
> > efi_uintn_t efi_dp_size(const struct efi_device_path *dp);
> > struct efi_device_path *efi_dp_dup(const struct efi_device_path *dp);
> > -struct efi_device_path *efi_dp_append(const struct efi_device_path *dp1,
> > - const struct efi_device_path *dp2);
> > struct efi_device_path *efi_dp_append_node(const struct efi_device_path
> > *dp,
> > const struct efi_device_path
> > *node);
> > /* Create a device path node of given type, sub-type, length */
> > @@ -928,7 +926,8 @@ struct efi_load_option {
> > struct efi_device_path *efi_dp_from_lo(struct efi_load_option *lo,
> > const efi_guid_t *guid);
> > struct efi_device_path *efi_dp_concat(const struct efi_device_path *dp1,
> > - const struct efi_device_path *dp2);
> > + const struct efi_device_path *dp2,
> > + bool split_end_node);
> > struct efi_device_path *search_gpt_dp_node(struct efi_device_path
> > *device_path);
> > efi_status_t efi_deserialize_load_option(struct efi_load_option *lo, u8
> > *data,
> >efi_uintn_t *size);
> > diff --git a/lib/efi_loader/efi_bootmgr.c b/lib/efi_loader/efi_bootmgr.c
> > index a40762c74c83..646c7c7faaad 100644
> > --- a/lib/efi_loader/efi_bootmgr.c
> > +++ b/lib/efi_loader/efi_bootmgr.c
> > @@ -110,7 +110,7 @@ static efi_status_t
> > try_load_from_file_path(efi_handle_t *fs_handles,
> > if (!dp)
> > continue;
> >
> > - dp = efi_dp_append(dp, fp);
> > + dp = efi_dp_concat(dp, fp, false);
> > if (!dp)
> > continue;
> >
> > diff --git a/lib/efi_loader/efi_boottime.c b/lib/efi_loader/efi_boottime.c
> > index 0b7579cb5af1..709ea07655c2 100644
> > --- a/lib/efi_loader/efi_boottime.c
> > +++ b/lib/efi_loader/efi_boottime.c
> > @@ -1821,7 +1821,7 @@ efi_status_t efi_setup_loaded_image(struct
> > efi_device_path *device_path,
> > if (device_path) {
> > info->device_handle = efi_dp_find_obj(device_path, NULL,
> > NULL);
> >
> > - dp = efi_dp_append(device_path, file_path);
> > + dp = efi_dp_concat(device_path, file_path, false);
> > if (!dp) {
> > ret = EFI_OUT_OF_RESOURCES;
> > goto failure;
> > diff --git a/lib/efi_loader/efi_device_path.c
> > b/lib/efi_loader/efi_device_path.c
> > index ed7214f3a347..ad79b65843e9 100644
> > --- a/lib/efi_loader/efi_device_path.c
> > +++ b/lib/efi_loader/efi_device_path.c
> > @@ -272,30 +272,27 @@ struct efi_device_path *efi_dp_dup(const struct
> > efi_device_path *dp)
> > }
> >
> > /**
> > - * efi_dp_append_or_concatenate() - Append or concatenate two device paths.
> > - * Concatenated device path will be
Re: U-Booters at LPC
Hi Sean, On Mon, 13 Nov 2023 at 11:15, Sean Anderson wrote: > > Hi All, > > I'm at LPC this week, and I'd love to chat with anyone else who's there > in person. That would be good, but sadly I am not :-( Regards, Simon
Re: [PATCH 1/2] dt-bindings: misc: Move esm-k3.txt to ti,j721e-esm.yaml
On 10:00-20231113, Neha Malcom Francis wrote: > Move esm-k3.txt to ti,j721e-esm.yaml in line with the devicetree > documentation in kernel. > > Signed-off-by: Neha Malcom Francis > --- > doc/device-tree-bindings/misc/esm-k3.txt | 25 - > .../misc/ti,j721e-esm.yaml| 53 +++ What is the rule here? https://tgit.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/misc/ti,j721e-esm.yaml we have the binding in upstream kernel. -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
[PATCH 1/1] arm: k3: Enable instruction cache for main domain SPL
From: Joao Paulo Goncalves
Change spl_enable_dcache so it also enable icache on SPL
initialization for the main domain part of the boot flow. This
improves bootloader booting time.
Link:
https://lore.kernel.org/all/20231109140958.1093235-1-joao.goncal...@toradex.com/
Signed-off-by: Joao Paulo Goncalves
---
arch/arm/mach-k3/am625_init.c | 2 +-
arch/arm/mach-k3/am654_init.c | 2 +-
arch/arm/mach-k3/common.c | 4 ++--
arch/arm/mach-k3/common.h | 2 +-
arch/arm/mach-k3/j721e_init.c | 2 +-
arch/arm/mach-k3/j721s2_init.c | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 8fa36f7b91..1d4ef35e7b 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -209,7 +209,7 @@ void board_init_f(ulong dummy)
if (ret)
panic("DRAM init failed: %d\n", ret);
}
- spl_enable_dcache();
+ spl_enable_cache();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
diff --git a/arch/arm/mach-k3/am654_init.c b/arch/arm/mach-k3/am654_init.c
index 0d3889cde2..f46b063d91 100644
--- a/arch/arm/mach-k3/am654_init.c
+++ b/arch/arm/mach-k3/am654_init.c
@@ -259,7 +259,7 @@ void board_init_f(ulong dummy)
if (ret)
panic("DRAM init failed: %d\n", ret);
#endif
- spl_enable_dcache();
+ spl_enable_cache();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index c3006ba387..f609e3001f 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -522,7 +522,7 @@ void remove_fwl_configs(struct fwl_data *fwl_data, size_t
fwl_data_size)
}
}
-void spl_enable_dcache(void)
+void spl_enable_cache(void)
{
#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
phys_addr_t ram_top = CFG_SYS_SDRAM_BASE;
@@ -543,7 +543,7 @@ void spl_enable_dcache(void)
gd->arch.tlb_addr + gd->arch.tlb_size);
gd->relocaddr = gd->arch.tlb_addr;
- dcache_enable();
+ enable_caches();
#endif
}
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index eabb44f620..bb84e98b55 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -37,7 +37,7 @@ void disable_linefill_optimization(void);
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
void k3_sysfw_print_ver(void);
-void spl_enable_dcache(void);
+void spl_enable_cache(void);
void mmr_unlock(uintptr_t base, u32 partition);
bool is_rom_loaded_sysfw(struct rom_extended_boot_data *data);
enum k3_device_type get_device_type(void);
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index b1f7e25ed0..7d793801de 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -287,7 +287,7 @@ void board_init_f(ulong dummy)
if (ret)
panic("DRAM init failed: %d\n", ret);
#endif
- spl_enable_dcache();
+ spl_enable_cache();
}
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c
index a5be84b147..d46d91e652 100644
--- a/arch/arm/mach-k3/j721s2_init.c
+++ b/arch/arm/mach-k3/j721s2_init.c
@@ -232,7 +232,7 @@ void k3_mem_init(void)
if (ret)
panic("DRAM 1 init failed: %d\n", ret);
}
- spl_enable_dcache();
+ spl_enable_cache();
}
/* Support for the various EVM / SK families */
--
2.34.1
Re: [PULL] Pull request for u-boot next / v2024.04 = u-boot-stm32-20231113
On Mon, Nov 13, 2023 at 01:36:22PM +0100, Patrice CHOTARD wrote: > Hi Tom > > Please pull the STM32 related patches for u-boot/next, v2024.04: > u-boot-stm32-20231113 > > CI status: > https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/18567 > > The following changes since commit 3b6db6901ff5babbb9d21f0fca750996e29d85e0: > > Merge branch '2023-11-10-improve-semihosting-armv6' into next (2023-11-10 > 12:52:33 -0500) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-stm.git > tags/u-boot-stm32-20231113 > > for you to fetch changes up to 01a701994b0590b6452516a7c67353359d053c94: > > stm32mp2: initial support (2023-11-13 10:55:38 +0100) > Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
RE: [PATCH v7 2/2] schemas: Add some common reserved-memory usages
Hi Ard, Please see my reply below inline. Thanks, Chasel > -Original Message- > From: Ard Biesheuvel > Sent: Saturday, November 11, 2023 3:04 AM > To: Chiu, Chasel > Cc: Simon Glass ; devicet...@vger.kernel.org; Mark Rutland > ; Rob Herring ; Tan, Lean Sheng > ; lkml ; Dhaval > Sharma ; Brune, Maximilian > ; Yunhui Cui ; > Dong, Guo ; Tom Rini ; ron minnich > ; Guo, Gua ; linux- > a...@vger.kernel.org; U-Boot Mailing List > Subject: Re: [PATCH v7 2/2] schemas: Add some common reserved-memory > usages > > On Sat, 11 Nov 2023 at 04:20, Chiu, Chasel wrote: > > > > > > Just sharing some usage examples from UEFI/EDK2 scenario. > > To support ACPI S4/Hibernation, memory map must be consistent before > > entering and after resuming from S4, in this case payload may need to > > know previous memory map from bootloader (currently generic payload > > cannot access platform/bootloader specific non-volatile data, thus > > could not save/restore memory map information) > > So how would EDK2 reconstruct the entire EFI memory map from just these > unannotated /reserved-memory nodes? The EFI memory map contains much > more information than that, and all of it has to match the pre-hibernate > situation, > right? Can you given an example? Here we listed only typically memory types that may change cross different platforms. Reserved memory type already can be handled by reserved-memory node, and rest of the types usually no need to change cross platforms thus currently we could rely on default in generic payload. In the future if we see a need to add new memory types we will discuss and add it to FDT schema. > > > Another usage is to support binary model which generic payload is a prebuilt > binary compatible for all platforms/configurations, however the payload > default > memory map might not always work for all the configurations and we want to > allow bootloader to override payload default memory map without recompiling. > > > > Agreed. But can you explain how a EDK2 payload might make meaningful use of > 'runtime-code' regions provided via DT by the non-EDK2 platform init? Can you > give an example? Runtime-code/data is used by UEFI payload for booting UEFI OS which required UEFI runtime services. Platform Init will select some regions from the usable memory and assign it to runtime-code/data for UPL to consume. Or assign same runtime-code/data from previous boot. If UEFI OS is not supported, PlatformInit may not need to provide runtime-code/data regions to payload. (always providing runtime-code/data should be supported too) > > > Under below assumption: > > FDT OS impact has been evaluated and taken care by relevant > experts/stakeholders. > > Reviewed-by: Chasel Chiu > > > > I am sorry but I don't know what 'FDT OS impact' means. We are talking about a > firmware-to-firmware abstraction that has the potential to leak into the OS > visible interface. > > I am a maintainer in the Tianocore project myself, so it would help if you > could > explain who these relevant experts and stakeholders are. Was this discussed on > the edk2-devel mailing list? If so, apologies for missing it but I may not > have been > cc'ed perhaps? I'm not familiar with FDT OS, also I do not know if who from edk2-devel were supporting FDT OS, I think Simon might be able to connect FDT OS experts/stakeholders. We are mostly focusing on payload firmware phase implementation in edk2 (and other payloads too), however, since we have aligned the payload FDT and OS FDT months ago, I'm assuming FDT OS impact must be there and we need (or already done?) FDT OS experts to support it. (again, maybe Simon could share more information about FDT OS) In edk2 such FDT schema is UefiPayloadPkg internal usage only and payload entry will convert FDT into HOB thus we expected the most of the edk2 generic code are no-touch/no impact, that's why we only had small group (UefiPayloadPkg) discussion. Ard, if you are aware of any edk2 code that's for supporting FDT OS, please let us know and we can discuss if those code were impacted or not. > > > > > > > -Original Message- > > > From: Simon Glass > > > Sent: Tuesday, September 26, 2023 12:43 PM > > > To: devicet...@vger.kernel.org > > > Cc: Mark Rutland ; Rob Herring > > > ; Tan, Lean Sheng ; lkml > > > ; Dhaval Sharma > > > ; Brune, Maximilian > > > ; Yunhui Cui > > > ; Dong, Guo ; Tom Rini > > > ; ron minnich ; Guo, Gua > > > ; Chiu, Chasel ; linux- > > > a...@vger.kernel.org; U-Boot Mailing List ; > > > Ard Biesheuvel ; Simon Glass > > > Subject: [PATCH v7 2/2] schemas: Add some common reserved-memory > > > usages > > > > > > It is common to split firmware into 'Platform Init', which does the > > > initial hardware setup and a "Payload" which selects the OS to be booted. > > > Thus an handover interface is required between these two pieces. > > > > > > Where UEFI boot-time services are not available, but UEFI firmware > > > is
U-Booters at LPC
Hi All, I'm at LPC this week, and I'd love to chat with anyone else who's there in person. --Sean
Re: [PATCH v2] clk: check parent_name in clk_register to avoid confusing log_error() output
On 11/10/23 14:19, Yang Xiwen via B4 Relay wrote:
From: Yang Xiwen
For some gate clocks and fixed clocks without a parent, calling
clk_register will print an useless error message indicating that parent
is missing. Fix that by gaurding log_xxx() with an if-statement.
Signed-off-by: Yang Xiwen
Suggested-by: Sean Anderson
---
It's found during my development for HiSilicon clock driver.
---
Changes in v2:
- drop the commit which exports clk_mux_register.
- drop the commit which is already merged
- drop ccf enable_count fix as it'll be in another patchset
- use Anderson's patch for clk_register()
- Link to v1:
https://lore.kernel.org/r/20230809-clk-fix-v1-0-808dbae54...@outlook.com
---
drivers/clk/clk.c | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index a5a3461b66..6ede1b4d4d 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -18,17 +18,19 @@
int clk_register(struct clk *clk, const char *drv_name,
const char *name, const char *parent_name)
{
- struct udevice *parent;
+ struct udevice *parent = NULL;
struct driver *drv;
int ret;
- ret = uclass_get_device_by_name(UCLASS_CLK, parent_name, );
- if (ret) {
- log_err("%s: failed to get %s device (parent of %s)\n",
- __func__, parent_name, name);
- } else {
- log_debug("%s: name: %s parent: %s [0x%p]\n", __func__, name,
- parent->name, parent);
+ if (parent_name) {
+ ret = uclass_get_device_by_name(UCLASS_CLK, parent_name,
);
+ if (ret) {
+ log_err("%s: failed to get %s device (parent of %s)\n",
+ __func__, parent_name, name);
+ } else {
+ log_debug("%s: name: %s parent: %s [0x%p]\n", __func__,
name,
+ parent->name, parent);
+ }
}
drv = lists_driver_lookup_name(drv_name);
---
base-commit: 580eb31199be8a822e62f20965854a242f895d03
change-id: 20230807-clk-fix-17e895f79817
Best regards,
Reviewed-by: Sean Anderson
Re: [PATCH v2] clk: nuvoton: add read only feature for clk driver
Hi Jim,
On 11/12/23 21:42, Jim Liu wrote:
Hi Sean
Thanks for your review.
The spi clock setting is related to booting flash, it is setup by
early bootloader and we don't want u-boot to change it
Makes sense. Please add this to your commit message if you do a v3.
Reviewed-by: Sean Anderson
On Thu, Nov 9, 2023 at 2:07 AM Sean Anderson wrote:
On 11/7/23 04:01, Jim Liu wrote:
Add a flag to set ahb/apb/fiu clock divider as read-only
It just protects the clock source and can't modify it in uboot.
Thanks for adding this
Signed-off-by: Jim Liu
---
Changes for v2:
- add commit message
---
drivers/clk/nuvoton/clk_npcm.c| 15 ---
drivers/clk/nuvoton/clk_npcm.h| 1 +
drivers/clk/nuvoton/clk_npcm8xx.c | 12 ++--
3 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/nuvoton/clk_npcm.c b/drivers/clk/nuvoton/clk_npcm.c
index 8d71f2a24b..18cb9cddbf 100644
--- a/drivers/clk/nuvoton/clk_npcm.c
+++ b/drivers/clk/nuvoton/clk_npcm.c
@@ -135,7 +135,7 @@ static u32 npcm_clk_get_div(struct clk *clk)
return div;
}
-static u32 npcm_clk_set_div(struct clk *clk, u32 div)
+static int npcm_clk_set_div(struct clk *clk, u32 div)
{
struct npcm_clk_priv *priv = dev_get_priv(clk->dev);
struct npcm_clk_div *divider;
@@ -145,6 +145,9 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div)
if (!divider)
return -EINVAL;
+ if (divider->flags & DIV_RO)
+ return 0;
+
if (divider->flags & PRE_DIV2)
div = div >> 1;
@@ -153,6 +156,12 @@ static u32 npcm_clk_set_div(struct clk *clk, u32 div)
else
clkdiv = ilog2(div);
+ if (clkdiv > (divider->mask >> (ffs(divider->mask) - 1))) {
+ printf("clkdiv(%d) for clk(%ld) is over limit\n",
+clkdiv, clk->id);
+ return -EINVAL;
+ }
+
val = readl(priv->base + divider->reg);
val &= ~divider->mask;
val |= (clkdiv << (ffs(divider->mask) - 1)) & divider->mask;
@@ -253,8 +262,8 @@ static ulong npcm_clk_set_rate(struct clk *clk, ulong rate)
if (ret)
return ret;
- debug("%s: rate %lu, new rate (%lu / %u)\n", __func__, rate, parent_rate,
div);
- return (parent_rate / div);
+ debug("%s: rate %lu, new rate %lu\n", __func__, rate,
npcm_clk_get_rate(clk));
+ return npcm_clk_get_rate(clk);
}
static int npcm_clk_set_parent(struct clk *clk, struct clk *parent)
diff --git a/drivers/clk/nuvoton/clk_npcm.h b/drivers/clk/nuvoton/clk_npcm.h
index 06b60dc8b8..b4726d8381 100644
--- a/drivers/clk/nuvoton/clk_npcm.h
+++ b/drivers/clk/nuvoton/clk_npcm.h
@@ -50,6 +50,7 @@
#define PRE_DIV2BIT(2) /* Pre divisor = 2 */
#define POST_DIV2 BIT(3) /* Post divisor = 2 */
#define FIXED_PARENTBIT(4) /* clock source is fixed */
+#define DIV_RO BIT(5) /* divider is read-only */
/* Parameters of PLL configuration */
struct npcm_clk_pll {
diff --git a/drivers/clk/nuvoton/clk_npcm8xx.c
b/drivers/clk/nuvoton/clk_npcm8xx.c
index 27e3cfcf55..d1b32e3237 100644
--- a/drivers/clk/nuvoton/clk_npcm8xx.c
+++ b/drivers/clk/nuvoton/clk_npcm8xx.c
@@ -45,12 +45,12 @@ static struct npcm_clk_select npcm8xx_clk_selectors[] = {
};
static struct npcm_clk_div npcm8xx_clk_dividers[] = {
- {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2},
- {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2},
- {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2},
- {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1},
- {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1},
- {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1},
+ {NPCM8XX_CLK_AHB, CLKDIV1, CLK4DIV, DIV_TYPE1 | PRE_DIV2 | DIV_RO},
+ {NPCM8XX_CLK_APB2, CLKDIV2, APB2CKDIV, DIV_TYPE2 | DIV_RO},
+ {NPCM8XX_CLK_APB5, CLKDIV2, APB5CKDIV, DIV_TYPE2 | DIV_RO},
And this makes sense for bus clocks
+ {NPCM8XX_CLK_SPI0, CLKDIV3, SPI0CKDIV, DIV_TYPE1 | DIV_RO},
+ {NPCM8XX_CLK_SPI1, CLKDIV3, SPI1CKDIV, DIV_TYPE1 | DIV_RO},
+ {NPCM8XX_CLK_SPI3, CLKDIV1, SPI3CKDIV, DIV_TYPE1 | DIV_RO},
But it's a little unclear to me why this is enabled for SPI. Are you e.g.
doing XIP from SPI?
--Sean
{NPCM8XX_CLK_SPIX, CLKDIV3, SPIXCKDIV, DIV_TYPE1},
{NPCM8XX_CLK_UART, CLKDIV1, UARTDIV1, DIV_TYPE1},
{NPCM8XX_CLK_UART2, CLKDIV3, UARTDIV2, DIV_TYPE1},
Re: [PATCH 1/1] efi_loader: improve efi_var_from_file() description
On Mon, 13 Nov 2023 at 07:50, Heinrich Schuchardt wrote: > > It is unclear to developers why efi_var_from_file() returns EFI_SUCCESS if > file ubootefi.var is missing or corrupted. Improve the description. > > Reported-by: Weizhao Ouyang > Signed-off-by: Heinrich Schuchardt > --- > lib/efi_loader/efi_var_file.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c > index 62e071bd83..dbf76f93de 100644 > --- a/lib/efi_loader/efi_var_file.c > +++ b/lib/efi_loader/efi_var_file.c > @@ -204,8 +204,11 @@ efi_status_t efi_var_restore(struct efi_var_file *buf, > bool safe) > * File ubootefi.var is read from the EFI system partitions and the variables > * stored in the file are created. > * > - * In case the file does not exist yet or a variable cannot be set > EFI_SUCCESS > - * is returned. > + * On first boot the file ubootefi.var does not exist yet. This is if why we s/if// Reviewed-by: Simon Glass > + * must return EFI_SUCCESS in this case. > + * > + * If the variable file is corrupted, e.g. incorrect CRC32, we do not want to > + * stop the boot process. We deliberately return EFI_SUCCESS in this case, > too. Does this mean that the file will be erased? Doesn't that mean that all the settings are lost? > * > * Return: status code > */ > -- > 2.40.1 > Regards, Simon
Re: [PATCH 5/5] test: dm: add scmi command test
Hi,
On Sun, 12 Nov 2023 at 18:46, AKASHI Takahiro
wrote:
>
> Hi Tom,
>
> On Fri, Nov 10, 2023 at 01:21:37PM -0500, Tom Rini wrote:
> > On Wed, Oct 25, 2023 at 02:14:27PM +0900, AKASHI Takahiro wrote:
> >
> > > In this test, "scmi" command is tested against different sub-commands.
> > > Please note that scmi command is for debug purpose and is not intended
> > > in production system.
> > >
> > > Signed-off-by: AKASHI Takahiro
> > > Reviewed-by: Simon Glass
> > > Reviewed-by: Etienne Carriere
> >
> > The test part of this still fails:
> > https://source.denx.de/u-boot/u-boot/-/jobs/732077
> >
> > I don't know why more output wasn't captured, when I run it locally
> > instead I get:
> > == FAILURES
> > ===
> > ___ test_ut[ut_dm_dm_test_scmi_cmd]
> > ___
> > test/py/u_boot_spawn.py:195: in expect
> > c = os.read(self.fd, 1024).decode(errors='replace')
> > E OSError: [Errno 5] Input/output error
> >
> > During handling of the above exception, another exception occurred:
> > test/py/tests/test_ut.py:502: in test_ut
> > output = u_boot_console.run_command('ut ' + ut_subtest)
> > test/py/u_boot_console_base.py:266: in run_command
> > m = self.p.expect([self.prompt_compiled] + self.bad_patterns)
> > test/py/u_boot_spawn.py:204: in expect
> > raise ValueError('U-Boot exited with %s' % info)
> > E ValueError: U-Boot exited with signal 11 (SIGSEGV)
>
>
> The command uses global variables which hold pointers to 'struct udevice'
> which are to be shared between the main and the sub-commands.
> Since pytest framework executes ut tests twice, once with a (normal?) device
> tree and once with a flat tree, udevices will be *voided* between
> two executions.
Are you able to put the var in the uclass-priv data instead? The state
should be cleared before running each DM test.
Regards,
Simon
>
> I will fix it in v2.
>
> Thanks,
> -Takahiro Akashi
>
>
> > Captured stdout call
> > -
> > => ut dm dm_test_scmi_cmd
> > Test: dm_test_scmi_cmd: scmi.c
> > SCMI device: scmi
> > protocol version: 0x2
> > # of agents: 2
> > 0: platform
> > > 1: OSPM
> > # of protocols: 4
> > Power domain management
> > Clock management
> > Reset domain management
> > Voltage domain management
> > vendor: U-Boot
> > sub vendor: Sandbox
> > impl version: 0x1
> > Denying access to device:0 failed (-13)
> > Denying access to protocol:0x14 on device:0 failed (-13)
> > Reset failed (-13)
> > Test: dm_test_scmi_cmd: scmi.c (flat tree)
> > SCMI device: Q
> > === short test summary info
> > ===
> > FAILED test/py/tests/test_ut.py::test_ut[ut_dm_dm_test_scmi_cmd] -
> > ValueError: U-Boot exited...
> >
> > --
> > Tom
>
>
Re: [PATCH v2 2/5] firmware: scmi: support protocols on sandbox only if enabled
Hi AKASHI,
On Sun, 12 Nov 2023 at 18:49, AKASHI Takahiro
wrote:
>
> This change will be useful when we manually test SCMI on sandbox
> by enabling/disabling a specific SCMI protocol.
>
> Signed-off-by: AKASHI Takahiro
> ---
> drivers/firmware/scmi/sandbox-scmi_agent.c | 27 ++-
> drivers/firmware/scmi/sandbox-scmi_devices.c | 78
> 2 files changed, 72 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/firmware/scmi/sandbox-scmi_agent.c
> b/drivers/firmware/scmi/sandbox-scmi_agent.c
> index d13180962662..1fc9a0f4ea7e 100644
> --- a/drivers/firmware/scmi/sandbox-scmi_agent.c
> +++ b/drivers/firmware/scmi/sandbox-scmi_agent.c
> @@ -66,10 +66,18 @@ struct scmi_channel {
> };
>
> static u8 protocols[] = {
> +#if IS_ENABLED(CONFIG_SCMI_POWER_DOMAIN)
> SCMI_PROTOCOL_ID_POWER_DOMAIN,
Is this better? Perhaps not!
CONFIG_IS_ENABLED(SCMI_POWER_DOMAIN, (SCMI_PROTOCOL_ID_POWER_DOMAIN,))
> +#endif
> +#if IS_ENABLED(CONFIG_CLK_SCMI)
> SCMI_PROTOCOL_ID_CLOCK,
> +#endif
> +#if IS_ENABLED(CONFIG_RESET_SCMI)
> SCMI_PROTOCOL_ID_RESET_DOMAIN,
> +#endif
> +#if IS_ENABLED(CONFIG_DM_REGULATOR_SCMI)
> SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN,
> +#endif
> };
>
> #define NUM_PROTOCOLS ARRAY_SIZE(protocols)
> @@ -1160,6 +1168,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
> *dev,
> }
> break;
> case SCMI_PROTOCOL_ID_POWER_DOMAIN:
> + if (!IS_ENABLED(CONFIG_SCMI_POWER_DOMAIN))
> + goto not_supported;
> +
> switch (msg->message_id) {
> case SCMI_PROTOCOL_VERSION:
> return sandbox_scmi_pwd_protocol_version(dev, msg);
> @@ -1180,6 +1191,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
> *dev,
> }
> break;
> case SCMI_PROTOCOL_ID_CLOCK:
> + if (!IS_ENABLED(CONFIG_CLK_SCMI))
> + goto not_supported;
How about putting this all in a function and avoiding the goto?
> +
> switch (msg->message_id) {
> case SCMI_PROTOCOL_ATTRIBUTES:
> return sandbox_scmi_clock_protocol_attribs(dev, msg);
> @@ -1196,6 +1210,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
> *dev,
> }
> break;
> case SCMI_PROTOCOL_ID_RESET_DOMAIN:
> + if (!IS_ENABLED(CONFIG_RESET_SCMI))
> + goto not_supported;
> +
> switch (msg->message_id) {
> case SCMI_RESET_DOMAIN_ATTRIBUTES:
> return sandbox_scmi_rd_attribs(dev, msg);
> @@ -1206,6 +1223,9 @@ static int sandbox_scmi_test_process_msg(struct udevice
> *dev,
> }
> break;
> case SCMI_PROTOCOL_ID_VOLTAGE_DOMAIN:
> + if (!IS_ENABLED(CONFIG_DM_REGULATOR_SCMI))
> + goto not_supported;
> +
> switch (msg->message_id) {
> case SCMI_VOLTAGE_DOMAIN_ATTRIBUTES:
> return sandbox_scmi_voltd_attribs(dev, msg);
> @@ -1224,8 +1244,7 @@ static int sandbox_scmi_test_process_msg(struct udevice
> *dev,
> case SCMI_PROTOCOL_ID_SYSTEM:
> case SCMI_PROTOCOL_ID_PERF:
> case SCMI_PROTOCOL_ID_SENSOR:
> - *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
> - return 0;
> + goto not_supported;
> default:
> break;
> }
> @@ -1239,6 +1258,10 @@ static int sandbox_scmi_test_process_msg(struct
> udevice *dev,
> /* Intentionnaly report unhandled IDs through the SCMI return code */
> *(u32 *)msg->out_msg = SCMI_PROTOCOL_ERROR;
> return 0;
> +
> +not_supported:
> + *(u32 *)msg->out_msg = SCMI_NOT_SUPPORTED;
> + return 0;
> }
>
> static int sandbox_scmi_test_remove(struct udevice *dev)
> diff --git a/drivers/firmware/scmi/sandbox-scmi_devices.c
> b/drivers/firmware/scmi/sandbox-scmi_devices.c
> index facb5b06ffb5..0519cf889aa9 100644
> --- a/drivers/firmware/scmi/sandbox-scmi_devices.c
> +++ b/drivers/firmware/scmi/sandbox-scmi_devices.c
> @@ -62,12 +62,13 @@ static int sandbox_scmi_devices_remove(struct udevice
> *dev)
> if (!devices)
> return 0;
>
> - for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
> - int ret2 = reset_free(devices->reset + n);
> + if (IS_ENABLED(CONFIG_RESET_SCMI))
> + for (n = 0; n < SCMI_TEST_DEVICES_RD_COUNT; n++) {
> + int ret2 = reset_free(devices->reset + n);
>
> - if (ret2 && !ret)
> - ret = ret2;
> - }
> + if (ret2 && !ret)
> + ret = ret2;
> + }
>
> return ret;
> }
> @@ -89,39 +90,53 @@ static int sandbox_scmi_devices_probe(struct udevice *dev)
> .regul_count =
Re: [PATCH 2/4] serial: s5p: Use livetree API to get "id" property
Hi Sam,
On Fri, 10 Nov 2023 at 11:29, Sam Protsenko wrote:
>
> Hi Simon,
>
> On Tue, Nov 7, 2023 at 10:26 PM Simon Glass wrote:
> >
> > Hi Sam,
> >
> > On Tue, 7 Nov 2023 at 12:06, Sam Protsenko
> > wrote:
> > >
> > > Use dev_read_u8_default() instead of fdtdec_get_int() to read the "id"
> > > property from device tree, as suggested in [1]. dev_* API is already
> > > used in this driver, so there is no reason to stick to fdtdec_* API.
> > > This also fixes checkpatch warning:
> > >
> > > WARNING: Use the livetree API (dev_read_...)
> > >
> > > [1] doc/develop/driver-model/livetree.rst
> > >
> > > Signed-off-by: Sam Protsenko
> > > ---
> > > drivers/serial/serial_s5p.c | 5 +
> > > 1 file changed, 1 insertion(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
> > > index 177215535676..c57bdd059ea6 100644
> > > --- a/drivers/serial/serial_s5p.c
> > > +++ b/drivers/serial/serial_s5p.c
> > > @@ -20,8 +20,6 @@
> > > #include
> > > #include
> > >
> > > -DECLARE_GLOBAL_DATA_PTR;
> > > -
> > > enum {
> > > PORT_S5P = 0,
> > > PORT_S5L
> > > @@ -220,8 +218,7 @@ static int s5p_serial_of_to_plat(struct udevice *dev)
> > >
> > > plat->reg = (struct s5p_uart *)addr;
> > > plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
> > > - plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
> > > - "id", dev_seq(dev));
> > > + plat->port_id = dev_read_u8_default(dev, "id", dev_seq(dev));
> > >
> > > if (port_type == PORT_S5L) {
> > > plat->rx_fifo_count_shift = S5L_RX_FIFO_COUNT_SHIFT;
> > > --
> > > 2.39.2
> > >
> >
> > Really this property should not be needed anymore. Can you figure out
> > how to drop it?
> >
>
> The 'port_id' seems to be needed for ARCH_EXYNOS4 boards. Because
> Exynos4 doesn't have proper DM clocks, it uses 'id' property to get
> corresponding UART clock frequency from its mach code.
>
> Here is what's happening in the serial driver in case of Exynos4:
>
> 1. get_uart_clk(port_id) is called
> 2. which in turn calls exynos4_get_uart_clk(port_id)
> 3. which uses "port_id" value to read corresponding bits of of
> CLK_SRC_PERIL0 register
> 4. those bits are used to get corresponding PLL clock's frequency
> 5. which is in turn used to calculate UART clock rate
> 6. calculated rate is returned by get_uart_clk() to serial driver
>
> So I don't see any *easy* way we can get rid of that id property.
>
> The proper way of doing that would require converting Exynos4 clock
> code to CCF (enabling CONFIG_CLK_EXYNOS). Which of course also means
> implementing clocks in dts, akin to kernel's exynos4.dtsi. Then it'll
> be possible to get rid of 'id' property.
That sounds good!
>
> Maybe I'm missing something, please let me know.
An easy way in the meantime would be to look at the compatible / reg
property, e.g. here is a sketch:
static int get_id(ofnode node)
{
ulong addr = (ulong)plat->reg;
if (ofnode_device_is_compatible(node, "samsung,exynos4210-uart")) {
return (addr >> 16) & 0xf;
...
reg = <0x1380 0x3c>;
id = <0>;
};
serail_1: serial@1381 {
compatible = "samsung,exynos4210-uart";
reg = <0x1381 0x3c>;
id = <1>;
};
serial_2: serial@1382 {
compatible = "samsung,exynos4210-uart";
reg = <0x1382 0x3c>;
id = <2>;
};
serial_3: serial@1383 {
compatible = "samsung,exynos4210-uart";
reg = <0x1383 0x3c>;
id = <3>;
};
serial_4: serial@1384 {
compatible = "samsung,exynos4210-uart";
reg = <0x1384 0x3c>;
id = <4>;
Regards,
Simon
Re: [PATCH v2 1/5] test: dm: skip scmi tests against disabled protocols
Hi AKASHI, On Sun, 12 Nov 2023 at 18:49, AKASHI Takahiro wrote: > > This is a precautionary change to make scmi tests workable whether or not > a specific protocol be enabled. > > Signed-off-by: AKASHI Takahiro > --- > test/dm/scmi.c | 12 > 1 file changed, 12 insertions(+) > > diff --git a/test/dm/scmi.c b/test/dm/scmi.c > index da45314f2e4c..2f63f2da16fb 100644 > --- a/test/dm/scmi.c > +++ b/test/dm/scmi.c > @@ -217,6 +217,9 @@ static int dm_test_scmi_power_domains(struct > unit_test_state *uts) > u8 *name; > int ret; > > + if (!IS_ENABLED(CONFIG_SCMI_POWER_DOMAIN)) > + return 0; -EAGAIN to skip a test Please update a comment if this needs to be documented better > + > /* preparation */ > ut_assertok(load_sandbox_scmi_test_devices(uts, , )); > ut_assertnonnull(agent); > @@ -317,6 +320,9 @@ static int dm_test_scmi_clocks(struct unit_test_state > *uts) > int ret_dev; > int ret; > > + if (!IS_ENABLED(CONFIG_CLK_SCMI)) > + return 0; > + > ret = load_sandbox_scmi_test_devices(uts, , ); > if (ret) > return ret; > @@ -382,6 +388,9 @@ static int dm_test_scmi_resets(struct unit_test_state > *uts) > struct udevice *agent_dev, *reset_dev, *dev = NULL; > int ret; > > + if (!IS_ENABLED(CONFIG_RESET_SCMI)) > + return 0; > + > ret = load_sandbox_scmi_test_devices(uts, , ); > if (ret) > return ret; > @@ -418,6 +427,9 @@ static int dm_test_scmi_voltage_domains(struct > unit_test_state *uts) > struct udevice *dev; > struct udevice *regul0_dev; > > + if (!IS_ENABLED(CONFIG_DM_REGULATOR_SCMI)) > + return 0; > + > ut_assertok(load_sandbox_scmi_test_devices(uts, , )); > > scmi_devices = sandbox_scmi_devices_ctx(dev); > -- > 2.34.1 > Regards, Simon
Re: [PATCH] clk: meson: add Hardware Clock measure driver
_ID(19, "lcd_an_ph2"),
> + CLK_MSR_ID(20, "rtc_osc_out"),
> + CLK_MSR_ID(21, "lcd_an_ph3"),
> + CLK_MSR_ID(22, "eth_phy_ref"),
> + CLK_MSR_ID(23, "mpll_50m"),
> + CLK_MSR_ID(24, "eth_125m"),
> + CLK_MSR_ID(25, "eth_rmii"),
> + CLK_MSR_ID(26, "sc_int"),
> + CLK_MSR_ID(27, "in_mac"),
> + CLK_MSR_ID(28, "sar_adc"),
> + CLK_MSR_ID(29, "pcie_inp"),
> + CLK_MSR_ID(30, "pcie_inn"),
> + CLK_MSR_ID(31, "mpll_test_out"),
> + CLK_MSR_ID(32, "vdec"),
> + CLK_MSR_ID(34, "eth_mpll_50m"),
> + CLK_MSR_ID(35, "mali"),
> + CLK_MSR_ID(36, "hdmi_tx_pixel"),
> + CLK_MSR_ID(37, "cdac"),
> + CLK_MSR_ID(38, "vdin_meas"),
> + CLK_MSR_ID(39, "bt656"),
> + CLK_MSR_ID(40, "arm_ring_osc_out_4"),
> + CLK_MSR_ID(41, "eth_rx_or_rmii"),
> + CLK_MSR_ID(42, "mp0_out"),
> + CLK_MSR_ID(43, "fclk_div5"),
> + CLK_MSR_ID(44, "pwm_b"),
> + CLK_MSR_ID(45, "pwm_a"),
> + CLK_MSR_ID(46, "vpu"),
> + CLK_MSR_ID(47, "ddr_dpll_pt"),
> + CLK_MSR_ID(48, "mp1_out"),
> + CLK_MSR_ID(49, "mp2_out"),
> + CLK_MSR_ID(50, "mp3_out"),
> + CLK_MSR_ID(51, "sd_emmc_c"),
> + CLK_MSR_ID(52, "sd_emmc_b"),
> + CLK_MSR_ID(53, "sd_emmc_a"),
> + CLK_MSR_ID(54, "vpu_clkc"),
> + CLK_MSR_ID(55, "vid_pll_div_out"),
> + CLK_MSR_ID(56, "wave420l_a"),
> + CLK_MSR_ID(57, "wave420l_c"),
> + CLK_MSR_ID(58, "wave420l_b"),
> + CLK_MSR_ID(59, "hcodec"),
> + CLK_MSR_ID(60, "arm_ring_osc_out_5"),
> + CLK_MSR_ID(61, "gpio_msr"),
> + CLK_MSR_ID(62, "hevcb"),
> + CLK_MSR_ID(63, "dsi_meas"),
> + CLK_MSR_ID(64, "spicc_1"),
> + CLK_MSR_ID(65, "spicc_0"),
> + CLK_MSR_ID(66, "vid_lock"),
> + CLK_MSR_ID(67, "dsi_phy"),
> + CLK_MSR_ID(68, "hdcp22_esm"),
> + CLK_MSR_ID(69, "hdcp22_skp"),
> + CLK_MSR_ID(70, "pwm_f"),
> + CLK_MSR_ID(71, "pwm_e"),
> + CLK_MSR_ID(72, "pwm_d"),
> + CLK_MSR_ID(73, "pwm_c"),
> + CLK_MSR_ID(74, "arm_ring_osc_out_6"),
> + CLK_MSR_ID(75, "hevcf"),
> + CLK_MSR_ID(76, "arm_ring_osc_out_7"),
> + CLK_MSR_ID(77, "rng_ring_osc_0"),
> + CLK_MSR_ID(78, "rng_ring_osc_1"),
> + CLK_MSR_ID(79, "rng_ring_osc_2"),
> + CLK_MSR_ID(80, "rng_ring_osc_3"),
> + CLK_MSR_ID(81, "vapb"),
> + CLK_MSR_ID(82, "ge2d"),
> + CLK_MSR_ID(83, "co_rx"),
> + CLK_MSR_ID(84, "co_tx"),
> + CLK_MSR_ID(85, "arm_ring_osc_out_8"),
> + CLK_MSR_ID(86, "arm_ring_osc_out_9"),
> + CLK_MSR_ID(87, "mipi_dsi_phy"),
> + CLK_MSR_ID(88, "cis2_adapt"),
> + CLK_MSR_ID(89, "hdmi_todig"),
> + CLK_MSR_ID(90, "hdmitx_sys"),
> + CLK_MSR_ID(91, "nna_core"),
> + CLK_MSR_ID(92, "nna_axi"),
> + CLK_MSR_ID(93, "vad"),
> + CLK_MSR_ID(94, "eth_phy_rx"),
> + CLK_MSR_ID(95, "eth_phy_pll"),
> + CLK_MSR_ID(96, "vpu_b"),
> + CLK_MSR_ID(97, "cpu_b_tmp"),
> + CLK_MSR_ID(98, "ts"),
> + CLK_MSR_ID(99, "arm_ring_osc_out_10"),
> + CLK_MSR_ID(100, "arm_ring_osc_out_11"),
> + CLK_MSR_ID(101, "arm_ring_osc_out_12"),
> + CLK_MSR_ID(102, "arm_ring_osc_out_13"),
> + CLK_MSR_ID(103, "arm_ring_osc_out_14"),
> + CLK_MSR_ID(104, "arm_ring_osc_out_15"),
> + CLK_MSR_ID(105, "arm_ring_osc_out_16"),
> + CLK_MSR_ID(106, "ephy_test"),
> + CLK_MSR_ID(107, "au_dac_g128x"),
> + CLK_MSR_ID(108, "audio_locker_out"),
> + CLK_MSR_ID(109, "audio_locker_in"),
> + CLK_MSR_ID(110, "audio_tdmout_c_sclk"),
> + CLK_MSR_ID(111, "audio_tdmout_b_sclk"),
> + CLK_MSR_ID(112, "audio_tdmout_a_sclk"),
> + CLK_MSR_ID(113, "audio_tdmin_lb_sclk"),
> + CLK_MSR_ID(114, "audio_tdmin_c_sclk"),
> + CLK_MSR_ID(115, "audio_tdmin_b_sclk"),
> + CLK_MSR_ID(116, "audio_tdmin_a_sclk"),
> + CLK_MSR_ID(117, "audio_resample"),
> + CLK_MSR_ID(118, "audio_pdm_sys"),
> + CLK_MSR_ID(119, "audio_spdifout_b"),
> + CLK_MSR_ID(120, "audio_spdifout"),
> + CLK_MSR_ID(121, "audio_spdifin"),
> + CLK_MSR_ID(122, "audio_pdm_dclk"),
> + CLK_MSR_ID(123, "audio_resampled"),
> + CLK_MSR_ID(124, "earcrx_pll"),
> + CLK_MSR_ID(125, "earcrx_pll_test"),
> + CLK_MSR_ID(126, "csi_phy0"),
> + CLK_MSR_ID(127, "csi2_data"),
> +};
> +
> +static int meson_clk_msr_measure_id(struct meson_msr *priv, unsigned int id,
> + unsigned int duration)
> +{
> + unsigned int val;
> + int ret;
> +
> + regmap_write(priv->regmap, MSR_CLK_REG0, 0);
> +
> + /* Set measurement duration */
> + regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_DURATION,
> +FIELD_PREP(MSR_DURATION, duration - 1));
> +
> + /* Set ID */
> + regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_CLK_SRC,
> +FIELD_PREP(MSR_CLK_SRC, id));
> +
> + /* Enable & Start */
> + regmap_update_bits(priv->regmap, MSR_CLK_REG0,
> +MSR_RUN | MSR_ENABLE,
> +MSR_RUN | MSR_ENABLE);
> +
> + ret = regmap_read_poll_timeout(priv->regmap, MSR_CLK_REG0,
> +val, !(val & MSR_BUSY), 10, 1);
> + if (ret)
> + return ret;
> +
> + /* Disable */
> + regmap_update_bits(priv->regmap, MSR_CLK_REG0, MSR_ENABLE, 0);
> +
> + /* Get the value in multiple of gate time counts */
> + regmap_read(priv->regmap, MSR_CLK_REG2, );
> +
> + if (val >= MSR_VAL_MASK)
> + return -EINVAL;
> +
> + return DIV_ROUND_CLOSEST_ULL((val & MSR_VAL_MASK) * 100ULL,
> + duration);
> +}
> +
> +static int meson_clk_msr_best_id(struct meson_msr *priv, unsigned int id,
> + unsigned int *precision)
> +{
> + unsigned int duration = DIV_MAX;
> + int ret;
> +
> + /* Start from max duration and down to min duration */
> + do {
> + ret = meson_clk_msr_measure_id(priv, id, duration);
> + if (ret >= 0)
> + *precision = (2 * 100) / duration;
> + else
> + duration -= DIV_STEP;
> + } while (duration >= DIV_MIN && ret == -EINVAL);
> +
> + return ret;
> +}
> +
> +static void meson_clk_msr_dump(struct udevice *dev)
> +{
> + struct meson_msr *priv = dev_get_priv(dev);
> + unsigned int precision = 0;
> + int val, i;
> +
> + printf(" clock rateprecision\n");
> + printf("-\n");
> +
> + for (i = 0 ; i < CLK_MSR_MAX ; ++i) {
> + if (!priv->msr_table[i].name)
> + continue;
> +
> + val = meson_clk_msr_best_id(priv, i, );
> + if (val < 0)
> + return;
> +
> + printf(" %-20s %10d+/-%dHz\n",
> +priv->msr_table[i].name, val, precision);
> + }
> +}
> +
> +static int meson_clk_msr_xlate(struct clk *clk, struct ofnode_phandle_args
> *args)
> +{
> + /* This driver doesn't expose any clocks */
> + return -EINVAL;
> +}
> +
> +static int meson_clk_msr_probe(struct udevice *dev)
> +{
> + struct meson_msr *priv = dev_get_priv(dev);
> + int ret;
> +
> + priv->msr_table = (struct meson_msr_id *)dev_get_driver_data(dev);
> +
> + ret = regmap_init_mem(dev_ofnode(dev), >regmap);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
> +
> +static struct clk_ops meson_clk_msr_ops = {
> + .of_xlate = meson_clk_msr_xlate,
> + .dump = meson_clk_msr_dump,
> +};
> +
> +static const struct udevice_id meson_clk_msr_ids[] = {
> + {
> + .compatible = "amlogic,meson-gx-clk-measure",
> + .data = (ulong)clk_msr_gx,
> + },
> + {
> + .compatible = "amlogic,meson8-clk-measure",
> + .data = (ulong)clk_msr_m8,
> + },
> + {
> + .compatible = "amlogic,meson8b-clk-measure",
> + .data = (ulong)clk_msr_m8,
> + },
> + {
> + .compatible = "amlogic,meson-axg-clk-measure",
> + .data = (ulong)clk_msr_axg,
> + },
> + {
> + .compatible = "amlogic,meson-g12a-clk-measure",
> + .data = (ulong)clk_msr_g12a,
> + },
> + {
> + .compatible = "amlogic,meson-sm1-clk-measure",
> + .data = (ulong)clk_msr_sm1,
> + },
> + { /* sentinel */ }
> +};
> +
> +U_BOOT_DRIVER(meson_clk_msr) = {
> + .name = "meson_clk_msr",
> + .id = UCLASS_CLK,
> + .of_match = meson_clk_msr_ids,
> + .priv_auto = sizeof(struct meson_msr),
> + .ops= _clk_msr_ops,
> + .probe = meson_clk_msr_probe,
> +};
>
> ---
> base-commit: 3221d10770b4c288ddb7d83350e1cd86c3b6ef55
> change-id: 20231113-uboot-meson-clk-msr-21cf9101278b
>
> Best regards,
> --
> Neil Armstrong
>
--
Best Regards,
Igor Prusov
Re: [PATCH v1 0/5] Convert recently merged T30 boards to use DM PMIC
> > > > > > > Since the proposed PMIC patches have been accepted, I see the need > > > > > > > to convert boards which I maintain to use DM drivers instead of > > > > > > > board hacks. > > > > > > > > > > > > > > Svyatoslav Ryhel (5): > > > > > > > board: lg-x3: convert LG Optimus 4X and Vu to use DM PMIC > > > > > > > board: endeavoru: convert HTC One X to use DM PMIC > > > > > > > > > > > > Is there a reason why the two above devices don't appear to have > > > > > > their > > > > > > .dts files in the upstream kernel? > > > > > > > > > > > > > > > > Yes, there is a reason. Linux maintainers treat submitters as > > > > > existential enemies or as dirt at least. I was trying to work with > > > > > linux but I have no desire to spend any time to upstream endeavoru or > > > > > lg_x3. > > > > > > > > The usual policy for acceptance into U-Boot is to have upstream review > > > > in the kernel first. > > > > > > > > > > May you point to a policy which clearly and explicitly states this as > > > a mandatory condition? > > > > There have been a number of devices rejected in the past until their > > DT are upstream but I'll leave Tom, who I've explicitly added on cc:, > > to clarify the exact policy. > > Well, here is where it's tricky. I brought this up for one of the > Broadcom MIPS platforms a week or two back, and Linus Walleij's point > (and I'm paraphrasing) is there's not really an upstream for it to go. > > What we cannot have is device tree bindings[1] that aren't upstream or > worse yet conflict with the official bindings. > > So the general way to resolve that is have device tree file be drop-in > from the linux kernel, and what additions we must have be done via > -u-boot.dtsi files. And in turn, some SoCs are better about keeping in > sync with the kernel than other SoCs are. > > Now, upstream being actively hostile to dts files, especially for older > platforms? That's unfortunate. So long as we aren't violating the rules > about bindings, the intention is that we don't have device trees that > are either (a) massively out of sync with the kernel[2] or (b) kept > intentionally mismatched from the kernel. I don't believe I've seen upstream Tegra maintainers being actively hostile towards updates for older devices, I know they have certainly defocused them, but I'm not sure that's what I'd consider hostile. > [1]: There are both examples like binman that Simon is working on at > least but this is more exception than intentional rule. > [2]: Per our other conversions, I know the tegra ones are in this > unfortunate state in general
[RESEND PATCH v2] efi_loader: Fix UEFI variable error handling
Try to catch error the earlier way.
Signed-off-by: Weizhao Ouyang
---
lib/efi_loader/efi_var_file.c | 4 +++-
lib/efi_loader/efi_variable.c | 2 --
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c
index 62e071bd83..fe1c462f17 100644
--- a/lib/efi_loader/efi_var_file.c
+++ b/lib/efi_loader/efi_var_file.c
@@ -192,8 +192,10 @@ efi_status_t efi_var_restore(struct efi_var_file *buf,
bool safe)
ret = efi_var_mem_ins(var->name, >guid, var->attr,
var->length, data, 0, NULL,
var->time);
- if (ret != EFI_SUCCESS)
+ if (ret != EFI_SUCCESS) {
log_err("Failed to set EFI variable %ls\n", var->name);
+ return ret;
+ }
}
return EFI_SUCCESS;
}
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index be95ed44e6..2b2ca8c090 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -350,8 +350,6 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
if (var_type == EFI_AUTH_VAR_PK)
ret = efi_init_secure_state();
- else
- ret = EFI_SUCCESS;
/*
* Write non-volatile EFI variables to file
--
2.39.2
[PATCH v2] efi_loader: Fix UEFI error handling
Try to catch error the earlier way.
Signed-off-by: Weizhao Ouyang
---
Changes in v2:
- Avoid to stop the boot process.
lib/efi_loader/efi_var_file.c | 4 +++-
lib/efi_loader/efi_variable.c | 2 --
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c
index 62e071bd83..fe1c462f17 100644
--- a/lib/efi_loader/efi_var_file.c
+++ b/lib/efi_loader/efi_var_file.c
@@ -192,8 +192,10 @@ efi_status_t efi_var_restore(struct efi_var_file *buf,
bool safe)
ret = efi_var_mem_ins(var->name, >guid, var->attr,
var->length, data, 0, NULL,
var->time);
- if (ret != EFI_SUCCESS)
+ if (ret != EFI_SUCCESS) {
log_err("Failed to set EFI variable %ls\n", var->name);
+ return ret;
+ }
}
return EFI_SUCCESS;
}
diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c
index be95ed44e6..2b2ca8c090 100644
--- a/lib/efi_loader/efi_variable.c
+++ b/lib/efi_loader/efi_variable.c
@@ -350,8 +350,6 @@ efi_status_t efi_set_variable_int(const u16 *variable_name,
if (var_type == EFI_AUTH_VAR_PK)
ret = efi_init_secure_state();
- else
- ret = EFI_SUCCESS;
/*
* Write non-volatile EFI variables to file
--
2.39.2
Re: [PATCH 2/4] arm: dts: k3-am625: Drop SoC provided bootph params from board u-boot/r5 dtsi
On Mon, Nov 13, 2023 at 08:59:17AM -0600, Nishanth Menon wrote: > k3-am62* SoC dtsi files now provide the following: > > bootph-all: dmss secure_proxy_main dmsc k3_pds k3_clks k3_reset >main_pmx0 main_timer0 mcu_pmx0 wkup_conf chipid > > bootph-pre-ram: secure_proxy_sa3 main_esm mcu_esm > > Drop these from board r5 and u-boot.dtsi files as these are duplicate in > them now. > > Signed-off-by: Nishanth Menon I had just a quick look and I have not tested the change, with that said Acked-by: Francesco Dolcini
Re: [PATCH 1/1] efi_loader: improve efi_var_from_file() description
On Mon, Nov 13, 2023 at 10:50 PM Heinrich Schuchardt wrote: > > It is unclear to developers why efi_var_from_file() returns EFI_SUCCESS if > file ubootefi.var is missing or corrupted. Improve the description. > > Reported-by: Weizhao Ouyang > Signed-off-by: Heinrich Schuchardt > --- > lib/efi_loader/efi_var_file.c | 7 +-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c > index 62e071bd83..dbf76f93de 100644 > --- a/lib/efi_loader/efi_var_file.c > +++ b/lib/efi_loader/efi_var_file.c > @@ -204,8 +204,11 @@ efi_status_t efi_var_restore(struct efi_var_file *buf, > bool safe) > * File ubootefi.var is read from the EFI system partitions and the variables > * stored in the file are created. > * > - * In case the file does not exist yet or a variable cannot be set > EFI_SUCCESS > - * is returned. > + * On first boot the file ubootefi.var does not exist yet. This is if why we > + * must return EFI_SUCCESS in this case. > + * > + * If the variable file is corrupted, e.g. incorrect CRC32, we do not want to > + * stop the boot process. We deliberately return EFI_SUCCESS in this case, > too. Reviewed-by: Weizhao Ouyang > * > * Return: status code > */ > -- > 2.40.1 >
[PATCH 0/4] arm: dts: k3-am625*: Upgrade kernel dts to v6.7-rc1
Hi, Sync Device tree to kernel v6.7-rc1 - we are getting closer to clean u-boot integration now. Boot logs: https://gist.github.com/nmenon/d62c4795c6d3d40c83ba36d1cd047c42 WARNING: This will have a minor conflict (binman) with: https://lore.kernel.org/u-boot/20231104080137.9628-1...@ti.com/ I haven't had a chance to test this out on verdin (only build tested) - so will be nice to verify. Nishanth Menon (4): arm: dts: k3-am625*: Sync with kernel v6.7-rc1 arm: dts: k3-am625: Drop SoC provided bootph params from board u-boot/r5 dtsi arm: dts: k3-am625-beagleplay-u-boot: drop duplicate bootph-nodes arm: dts: k3-am625-sk-r5/u-boot: Drop duplicate bootph-nodes arch/arm/dts/k3-am62-main.dtsi| 12 +- arch/arm/dts/k3-am62-mcu.dtsi | 2 + arch/arm/dts/k3-am62-verdin-wifi.dtsi | 6 + arch/arm/dts/k3-am62-verdin.dtsi | 1 + arch/arm/dts/k3-am62-wakeup.dtsi | 2 + arch/arm/dts/k3-am62.dtsi | 3 + arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 110 - arch/arm/dts/k3-am625-beagleplay.dts | 34 +++- arch/arm/dts/k3-am625-r5-beagleplay.dts | 9 -- arch/arm/dts/k3-am625-r5-sk.dts | 21 +-- arch/arm/dts/k3-am625-sk-u-boot.dtsi | 145 -- arch/arm/dts/k3-am625-sk.dts | 27 arch/arm/dts/k3-am625-verdin-r5.dts | 9 -- .../dts/k3-am625-verdin-wifi-dev-u-boot.dtsi | 55 +-- arch/arm/dts/k3-am62x-sk-common.dtsi | 109 - 15 files changed, 197 insertions(+), 348 deletions(-) -- 2.40.0
[PATCH 2/4] arm: dts: k3-am625: Drop SoC provided bootph params from board u-boot/r5 dtsi
k3-am62* SoC dtsi files now provide the following:
bootph-all: dmss secure_proxy_main dmsc k3_pds k3_clks k3_reset
main_pmx0 main_timer0 mcu_pmx0 wkup_conf chipid
bootph-pre-ram: secure_proxy_sa3 main_esm mcu_esm
Drop these from board r5 and u-boot.dtsi files as these are duplicate in
them now.
Signed-off-by: Nishanth Menon
---
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 54 --
arch/arm/dts/k3-am625-r5-beagleplay.dts | 9 ---
arch/arm/dts/k3-am625-r5-sk.dts | 9 ---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 53 --
arch/arm/dts/k3-am625-verdin-r5.dts | 9 ---
.../dts/k3-am625-verdin-wifi-dev-u-boot.dtsi | 55 +--
6 files changed, 2 insertions(+), 187 deletions(-)
diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
index d6c6baa5518b..6f3a31558b20 100644
--- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
@@ -47,59 +47,17 @@
};
};
-_main {
- bootph-all;
-};
-
_timer0 {
clock-frequency = <2500>;
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_proxy_main {
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_pds {
- bootph-all;
-};
-
-_clks {
- bootph-all;
-};
-
-_reset {
- bootph-all;
};
{
- bootph-all;
k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset";
bootph-all;
};
};
-_conf {
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_pmx0 {
- bootph-all;
-};
-
_uart0 {
bootph-all;
};
@@ -108,18 +66,6 @@
bootph-all;
};
-_mcu {
- bootph-all;
-};
-
-_wakeup {
- bootph-all;
-};
-
-_pmx0 {
- bootph-all;
-};
-
_i2c0 {
bootph-all;
};
diff --git a/arch/arm/dts/k3-am625-r5-beagleplay.dts
b/arch/arm/dts/k3-am625-r5-beagleplay.dts
index 9c9d0570592a..1f450f55c1d2 100644
--- a/arch/arm/dts/k3-am625-r5-beagleplay.dts
+++ b/arch/arm/dts/k3-am625-r5-beagleplay.dts
@@ -54,12 +54,7 @@
ti,secure-host;
};
-_esm {
- bootph-pre-ram;
-};
-
_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
@@ -73,10 +68,6 @@
};
};
-_esm {
- bootph-pre-ram;
-};
-
_pktdma {
ti,sci = <_tifs>;
};
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index bf219226b974..55420b2f2c15 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -55,20 +55,11 @@
ti,secure-host;
};
-_esm {
- bootph-pre-ram;
-};
-
_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
-_esm {
- bootph-pre-ram;
-};
-
_main {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 7ae5e01f7c7f..dcf7c7652d31 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -25,49 +25,8 @@
bootph-all;
};
-_main {
- bootph-all;
-};
-
_timer0 {
clock-frequency = <2500>;
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_proxy_main {
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_pds {
- bootph-all;
-};
-
-_clks {
- bootph-all;
-};
-
-_reset {
- bootph-all;
-};
-
-_conf {
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_pmx0 {
- bootph-all;
};
_uart0 {
@@ -78,18 +37,6 @@
bootph-all;
};
-_mcu {
- bootph-all;
-};
-
-_wakeup {
- bootph-all;
-};
-
-_pmx0 {
- bootph-all;
-};
-
{
bootph-all;
};
diff --git a/arch/arm/dts/k3-am625-verdin-r5.dts
b/arch/arm/dts/k3-am625-verdin-r5.dts
index 0cae9c577732..305d199678b3 100644
--- a/arch/arm/dts/k3-am625-verdin-r5.dts
+++ b/arch/arm/dts/k3-am625-verdin-r5.dts
@@ -69,16 +69,7 @@
ti,secure-host;
};
-_esm {
- bootph-pre-ram;
-};
-
-_esm {
- bootph-pre-ram;
-};
-
_proxy_sa3 {
- bootph-pre-ram;
/* We require this for boot handshake */
status = "okay";
};
diff --git a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
index 75cb60b57d79..86e2d111f541 100644
--- a/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-verdin-wifi-dev-u-boot.dtsi
@@ -21,25 +21,8 @@
};
};
-_main {
- bootph-all;
-
- timer@240 {
- clock-frequency = <2500>;
- bootph-all;
- };
-};
-
-_mcu {
- bootph-all;
-};
-
-_wakeup {
- bootph-all;
-};
-
- {
- bootph-all;
+_timer0 {
+ clock-frequency = <2500>;
};
_bcdma {
@@ -98,34 +81,16 @@
};
{
- bootph-all;
-
k3_sysreset: sysreset-controller {
compatible =
[PATCH 3/4] arm: dts: k3-am625-beagleplay-u-boot: drop duplicate bootph-nodes
Kernel dts import now provides bootph-all and bootph-pre-ram properties
for the properties we have been overriding so far. Drop the same.
Signed-off-by: Nishanth Menon
---
arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 56
1 file changed, 56 deletions(-)
diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
index 6f3a31558b20..7f8468f298f0 100644
--- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi
@@ -13,36 +13,26 @@
tick-timer = _timer0;
};
- memory@8000 {
- bootph-all;
- };
-
/* Keep the LEDs on by default to indicate life */
leds {
- bootph-all;
led-0 {
default-state = "on";
- bootph-all;
};
led-1 {
default-state = "on";
- bootph-all;
};
led-2 {
default-state = "on";
- bootph-all;
};
led-3 {
default-state = "on";
- bootph-all;
};
led-4 {
default-state = "on";
- bootph-all;
};
};
};
@@ -58,45 +48,7 @@
};
};
-_uart0 {
- bootph-all;
-};
-
-_pins_default {
- bootph-all;
-};
-
-_i2c0 {
- bootph-all;
-};
-
-_i2c_pins_default {
- bootph-all;
-};
-
-_pins_default {
- bootph-all;
-};
-
-_gpio0 {
- bootph-all;
-};
-
-_gpio1 {
- bootph-all;
-};
-
- {
- /* EMMC */
- bootph-all;
-};
-
-_pins_default {
- bootph-all;
-};
-
_pins_default {
- bootph-all;
/* Force to use SDCD card detect pin */
pinctrl-single,pins = <
AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
@@ -109,14 +61,6 @@
>;
};
- {
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
#ifdef CONFIG_TARGET_AM625_A53_EVM
#define SPL_AM625_BEAGLEPLAY_DTB "spl/dts/k3-am625-beagleplay.dtb"
--
2.40.0
[PATCH 1/4] arm: dts: k3-am625*: Sync with kernel v6.7-rc1
Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly.
Signed-off-by: Nishanth Menon
---
arch/arm/dts/k3-am62-main.dtsi| 12 ++-
arch/arm/dts/k3-am62-mcu.dtsi | 2 +
arch/arm/dts/k3-am62-verdin-wifi.dtsi | 6 ++
arch/arm/dts/k3-am62-verdin.dtsi | 1 +
arch/arm/dts/k3-am62-wakeup.dtsi | 2 +
arch/arm/dts/k3-am62.dtsi | 3 +
arch/arm/dts/k3-am625-beagleplay.dts | 34 +++-
arch/arm/dts/k3-am625-sk.dts | 27 +++
arch/arm/dts/k3-am62x-sk-common.dtsi | 109 +-
9 files changed, 193 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
index 284b90c94da8..e5c64c86d1d5 100644
--- a/arch/arm/dts/k3-am62-main.dtsi
+++ b/arch/arm/dts/k3-am62-main.dtsi
@@ -81,7 +81,8 @@
};
dmss: bus@4800 {
- compatible = "simple-mfd";
+ bootph-all;
+ compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
dma-ranges;
@@ -90,6 +91,7 @@
ti,sci-dev-id = <25>;
secure_proxy_main: mailbox@4d00 {
+ bootph-all;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
@@ -165,6 +167,7 @@
};
dmsc: system-controller@44043000 {
+ bootph-all;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
mbox-names = "rx", "tx";
@@ -174,16 +177,19 @@
reg = <0x00 0x44043000 0x00 0xfe0>;
k3_pds: power-controller {
+ bootph-all;
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
};
k3_clks: clock-controller {
+ bootph-all;
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
+ bootph-all;
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
@@ -202,6 +208,7 @@
};
secure_proxy_sa3: mailbox@4360 {
+ bootph-pre-ram;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
@@ -217,6 +224,7 @@
};
main_pmx0: pinctrl@f4000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0xf4000 0x00 0x2ac>;
#pinctrl-cells = <1>;
@@ -225,12 +233,14 @@
};
main_esm: esm@42 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x42 0x00 0x1000>;
ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
};
main_timer0: timer@240 {
+ bootph-all;
compatible = "ti,am654-timer";
reg = <0x00 0x240 0x00 0x400>;
interrupts = ;
diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi
index 80a3e1db26a9..0e0b234581c6 100644
--- a/arch/arm/dts/k3-am62-mcu.dtsi
+++ b/arch/arm/dts/k3-am62-mcu.dtsi
@@ -7,6 +7,7 @@
_mcu {
mcu_pmx0: pinctrl@4084000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0x04084000 0x00 0x88>;
#pinctrl-cells = <1>;
@@ -15,6 +16,7 @@
};
mcu_esm: esm@410 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x410 0x00 0x1000>;
ti,esm-pins = <0>, <1>, <2>, <85>;
diff --git a/arch/arm/dts/k3-am62-verdin-wifi.dtsi
b/arch/arm/dts/k3-am62-verdin-wifi.dtsi
index 90ddc71bcd30..a6808b10c7b2 100644
--- a/arch/arm/dts/k3-am62-verdin-wifi.dtsi
+++ b/arch/arm/dts/k3-am62-verdin-wifi.dtsi
@@ -35,5 +35,11 @@
_uart5 {
pinctrl-names = "default";
pinctrl-0 = <_uart5>;
+ uart-has-rtscts;
status = "okay";
+
+ bluetooth {
+ compatible = "nxp,88w8987-bt";
+ fw-init-baudrate = <300>;
+ };
};
diff --git a/arch/arm/dts/k3-am62-verdin.dtsi b/arch/arm/dts/k3-am62-verdin.dtsi
index 40992e7e4c30..5db52f237253 100644
--- a/arch/arm/dts/k3-am62-verdin.dtsi
+++ b/arch/arm/dts/k3-am62-verdin.dtsi
@@ -1061,6 +1061,7 @@
vddc-supply = <_1v2_dsi>;
vddmipi-supply = <_1v2_dsi>;
vddio-supply = <_1v8_dsi>;
+ status = "disabled";
dsi_bridge_ports: ports {
#address-cells = <1>;
diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi
index
[PATCH 4/4] arm: dts: k3-am625-sk-r5/u-boot: Drop duplicate bootph-nodes
Kernel dts import now provides bootph-all and bootph-pre-ram properties
for the properties we have been overriding so far. Drop the same.
While at this enable the DM and tifs uarts for programming pinmux
since they are marked reserved by board.dts
Signed-off-by: Nishanth Menon
---
arch/arm/dts/k3-am625-r5-sk.dts | 12 +---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 92
2 files changed, 2 insertions(+), 102 deletions(-)
diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts
index 55420b2f2c15..6b9f40e55581 100644
--- a/arch/arm/dts/k3-am625-r5-sk.dts
+++ b/arch/arm/dts/k3-am625-r5-sk.dts
@@ -69,22 +69,14 @@
};
};
-_uart0_pins_default {
- bootph-pre-ram;
-};
-
-_uart1_pins_default {
- bootph-pre-ram;
-};
-
/* WKUP UART0 is used for DM firmware logs */
_uart0 {
- bootph-pre-ram;
+ status = "okay";
};
/* Main UART1 is used for TIFS firmware logs */
_uart1 {
- bootph-pre-ram;
+ status = "okay";
};
{
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index dcf7c7652d31..fa778b0ff4c1 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -8,71 +8,14 @@
/ {
chosen {
- stdout-path = "serial2:115200n8";
tick-timer = _timer0;
};
-
- aliases {
- mmc1 =
- };
-
- memory@8000 {
- bootph-all;
- };
-};
-
-_conf {
- bootph-all;
};
_timer0 {
clock-frequency = <2500>;
};
-_uart0 {
- bootph-all;
-};
-
-_uart0_pins_default {
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_mmc1_pins_default {
- bootph-all;
-};
-
- {
- bootph-all;
-};
-
-_pins_default {
- bootph-all;
-};
-
- {
- bootph-all;
-
- flash@0 {
- bootph-all;
-
- partitions {
- bootph-all;
-
- partition@3fc {
- bootph-all;
- };
- };
- };
-};
-
-_main_dmss {
- bootph-all;
-};
-
_bcdma {
reg = <0x00 0x485c0100 0x00 0x100>,
<0x00 0x4c00 0x00 0x2>,
@@ -100,41 +43,6 @@
bootph-all;
};
-_mdio {
- bootph-all;
-};
-
-_phy0 {
- bootph-all;
-};
-
-_phy1 {
- bootph-all;
-};
-
-_rgmii1_pins_default {
- bootph-all;
-};
-
-_rgmii2_pins_default {
- bootph-all;
-};
-
-_gmii_sel {
- bootph-all;
-};
-
- {
- bootph-all;
- ethernet-ports {
- bootph-all;
- };
-};
-
-_port1 {
- bootph-all;
-};
-
_port2 {
status = "disabled";
};
--
2.40.0
[PATCH 2/8] arm: dts: k3-am62a*: Sync with kernel v6.7-rc1
Sync with kernel v6.7-rc1 and sync up the u-boot dts files accordingly.
Signed-off-by: Nishanth Menon
---
arch/arm/dts/k3-am62a-main.dtsi | 585 +-
arch/arm/dts/k3-am62a-mcu.dtsi| 131 ++
arch/arm/dts/k3-am62a-thermal.dtsi| 47 +++
arch/arm/dts/k3-am62a-wakeup.dtsi | 21 +-
arch/arm/dts/k3-am62a.dtsi| 5 +-
arch/arm/dts/k3-am62a7-r5-sk.dts | 74 +---
arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 139 --
arch/arm/dts/k3-am62a7-sk.dts | 347 ++-
arch/arm/dts/k3-am62a7.dtsi | 3 +-
9 files changed, 1224 insertions(+), 128 deletions(-)
create mode 100644 arch/arm/dts/k3-am62a-thermal.dtsi
diff --git a/arch/arm/dts/k3-am62a-main.dtsi b/arch/arm/dts/k3-am62a-main.dtsi
index bc4b50bcd177..4ae7fdc5221b 100644
--- a/arch/arm/dts/k3-am62a-main.dtsi
+++ b/arch/arm/dts/k3-am62a-main.dtsi
@@ -48,6 +48,18 @@
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x00 0x00 0x0010 0x2>;
+
+ phy_gmii_sel: phy@4044 {
+ compatible = "ti,am654-phy-gmii-sel";
+ reg = <0x4044 0x8>;
+ #phy-cells = <1>;
+ };
+
+ epwm_tbclk: clock-controller@4130 {
+ compatible = "ti,am62-epwm-tbclk";
+ reg = <0x4130 0x4>;
+ #clock-cells = <1>;
+ };
};
dmss: bus@4800 {
@@ -69,6 +81,67 @@
interrupt-names = "rx_012";
interrupts = ;
};
+
+ inta_main_dmss: interrupt-controller@4800 {
+ compatible = "ti,sci-inta";
+ reg = <0x00 0x4800 0x00 0x10>;
+ #interrupt-cells = <0>;
+ interrupt-controller;
+ interrupt-parent = <>;
+ msi-controller;
+ ti,sci = <>;
+ ti,sci-dev-id = <28>;
+ ti,interrupt-ranges = <6 70 34>;
+ ti,unmapped-event-sources = <_bcdma>,
<_pktdma>;
+ };
+
+ main_bcdma: dma-controller@485c0100 {
+ compatible = "ti,am64-dmss-bcdma";
+ reg = <0x00 0x485c0100 0x00 0x100>,
+ <0x00 0x4c00 0x00 0x2>,
+ <0x00 0x4a82 0x00 0x2>,
+ <0x00 0x4aa4 0x00 0x2>,
+ <0x00 0x4bc0 0x00 0x10>;
+ reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt",
"ringrt";
+ msi-parent = <_main_dmss>;
+ #dma-cells = <3>;
+ ti,sci = <>;
+ ti,sci-dev-id = <26>;
+ ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
+ ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
+ ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
+ };
+
+ main_pktdma: dma-controller@485c {
+ compatible = "ti,am64-dmss-pktdma";
+ reg = <0x00 0x485c 0x00 0x100>,
+ <0x00 0x4a80 0x00 0x2>,
+ <0x00 0x4aa0 0x00 0x4>,
+ <0x00 0x4b80 0x00 0x40>;
+ reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
+ msi-parent = <_main_dmss>;
+ #dma-cells = <2>;
+ ti,sci = <>;
+ ti,sci-dev-id = <30>;
+ ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
+ <0x24>, /* CPSW_TX_CHAN */
+ <0x25>, /* SAUL_TX_0_CHAN */
+ <0x26>; /* SAUL_TX_1_CHAN */
+ ti,sci-rm-range-tflow = <0x10>, /*
RING_UNMAPPED_TX_CHAN */
+ <0x11>, /* RING_CPSW_TX_CHAN */
+ <0x12>, /* RING_SAUL_TX_0_CHAN
*/
+ <0x13>; /* RING_SAUL_TX_1_CHAN
*/
+ ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
+ <0x2b>, /* CPSW_RX_CHAN */
+ <0x2d>, /* SAUL_RX_0_CHAN */
+ <0x2f>, /* SAUL_RX_1_CHAN */
+ <0x31>, /* SAUL_RX_2_CHAN */
+ <0x33>; /* SAUL_RX_3_CHAN */
+ ti,sci-rm-range-rflow = <0x2a>, /*
FLOW_UNMAPPED_RX_CHAN */
+
[PATCH 7/8] configs: am62ax_evm_a53_defconfig: switch to stdboot
Switch over to stdboot Signed-off-by: Nishanth Menon --- configs/am62ax_evm_a53_defconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index c94708a7bf85..38083586a3ec 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -21,8 +21,9 @@ CONFIG_SPL_LIBDISK_SUPPORT=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100 -CONFIG_DISTRO_DEFAULTS=y -CONFIG_BOOTCOMMAND="run envboot; run distro_bootcmd;" +CONFIG_BOOTSTD_FULL=y +CONFIG_BOOTSTD_DEFAULTS=y +CONFIG_BOOTCOMMAND="run envboot; bootflow scan -lb" CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -- 2.40.0
[PATCH 8/8] doc: board: ti: Add AM62A documentation
From: Jai Luthra Add generic boot-flow diagrams, and SoC-specific info around build steps. Signed-off-by: Jai Luthra Signed-off-by: Nishanth Menon --- doc/board/ti/am62ax_sk.rst | 213 + doc/board/ti/k3.rst| 1 + 2 files changed, 214 insertions(+) create mode 100644 doc/board/ti/am62ax_sk.rst diff --git a/doc/board/ti/am62ax_sk.rst b/doc/board/ti/am62ax_sk.rst new file mode 100644 index ..60726b6652ce --- /dev/null +++ b/doc/board/ti/am62ax_sk.rst @@ -0,0 +1,213 @@ +.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause +.. sectionauthor:: Jai Luthra + +AM62A Platforms +=== + +Introduction: +- +The AM62A SoC family is built on the K3 Multicore SoC architecture platform, +providing a deep learning accelerator, multi-camera support with ISP, video +transcoder and other BOM-saving integrations. +The AM62A SoC enables cost-sensitive automotive applications including driver +and in-cabin monitoring systems, next generation of eMirror system, as well as +a broad set of industrial applications in Factory Automation, Building +Automation, Robotics and more. + +Some highlights of this SoC are: + +* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. +* Cortex-R5F for general-purpose or safety usage. +* Deep Learning Accelerator with Single-core C7x Vector DSP with MMA (up to + 1.0GHz). +* Vision Processing Accelerator (VPAC) with a 315MPixel/s ISP (up to 5MP @ + 60fps) supporting 16-bit RAW input with RGB-IR separation. +* 4K Video encoder and decoder for HEVC (Level 5.1 High-tier) and H.264 (Level + 5.2) supporting upto 240MPixels/s and MJPEG encoder at 416MPixels/s +* Single display with 24-bit RGB parallel (DPI) interface supporting upto + 165Mhz pixel clock for 2K resolution. +* Integrated Giga-bit Ethernet switch supporting up to a total of two + external ports (TSN capable). +* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for + NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio, + 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals. +* Dedicated Centralized System Controller for Security, Power, and + Resource Management. +* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only, + enabling battery powered system design. + +More details can be found in the Technical Reference Manual: +https://www.ti.com/lit/pdf/spruj16 + +Platform information: + +* https://www.ti.com/tool/SK-AM62A-LP + +Boot Flow: +-- +Below is the pictorial representation of boot flow: + +.. image:: img/boot_diagram_k3_current.svg + :alt: Boot flow diagram + +- Here TIFS acts as master and provides all the critical services. R5/A53 + requests TIFS to get these services done as shown in the above diagram. + +Sources: + + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_boot_sources +:end-before: .. k3_rst_include_end_boot_sources + +Build procedure: + +0. Setup the environment variables: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_desc +:end-before: .. k3_rst_include_end_common_env_vars_desc + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_board_env_vars_desc +:end-before: .. k3_rst_include_end_board_env_vars_desc + +Set the variables corresponding to this platform: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_common_env_vars_defn +:end-before: .. k3_rst_include_end_common_env_vars_defn +.. code-block:: bash + + $ export UBOOT_CFG_CORTEXR=am62ax_evm_r5_defconfig + $ export UBOOT_CFG_CORTEXA=am62ax_evm_a53_defconfig + $ export TFA_BOARD=lite + $ # we dont use any extra TFA parameters + $ unset TFA_EXTRA_ARGS + $ export OPTEE_PLATFORM=k3-am62ax + $ # we dont use any extra OPTEE parameters + $ unset OPTEE_EXTRA_ARGS + +1. Trusted Firmware-A: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_tfa +:end-before: .. k3_rst_include_end_build_steps_tfa + +2. OP-TEE: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_optee +:end-before: .. k3_rst_include_end_build_steps_optee + +3. U-Boot: + +* 3.1 R5: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_spl_r5 +:end-before: .. k3_rst_include_end_build_steps_spl_r5 + +* 3.2 A53: + +.. include:: ../ti/k3.rst +:start-after: .. k3_rst_include_start_build_steps_uboot +:end-before: .. k3_rst_include_end_build_steps_uboot + +Target Images +-- +In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC +variant (GP, HS-FS, HS-SE) requires a different source for these files. + + - GP + +* tiboot3-am62ax-gp-evm.bin from step 3.1 +* tispl.bin_unsigned, u-boot.img_unsigned from step 3.2 + + - HS-FS + +* tiboot3-am62ax-hs-fs-evm.bin from step 3.1 +* tispl.bin, u-boot.img from step 3.2 + + - HS-SE + +*
[PATCH 5/8] board: ti: am62ax: env: Use default findfdt
Use the default findfdt instead of local logic.
Signed-off-by: Nishanth Menon
---
board/ti/am62ax/am62ax.env | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/board/ti/am62ax/am62ax.env b/board/ti/am62ax/am62ax.env
index bfed7f360844..2af6914e3fab 100644
--- a/board/ti/am62ax/am62ax.env
+++ b/board/ti/am62ax/am62ax.env
@@ -1,10 +1,7 @@
#include
+#include
#include
-default_device_tree=ti/k3-am62a7-sk.dtb
-findfdt=
- setenv name_fdt ${default_device_tree};
- setenv fdtfile ${name_fdt}
name_kern=Image
console=ttyS2,115200n8
args_all=setenv optargs ${optargs} earlycon=ns16550a,mmio32,0x0280
--
2.40.0
[PATCH 3/8] dma: ti: k3-udma: Introduce DMA support for the am62ax
From: Vignesh Raghavendra
In preparation for enabling ethernet for the am62ax family of SoCs,
introduce the initial DMA channel settings for the am62ax
Signed-off-by: Vignesh Raghavendra
[b...@ti.com: expanded on commit message]
Signed-off-by: Bryan Brattlof
Signed-off-by: Nishanth Menon
---
NOTE: the patch has a minor checkpatch warning - but, this is inline
with rest of the implementations.
drivers/dma/ti/Makefile| 1 +
drivers/dma/ti/k3-psil-am62a.c | 196 +
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 2 +
4 files changed, 200 insertions(+)
create mode 100644 drivers/dma/ti/k3-psil-am62a.c
diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile
index 6807eb8e8b2d..f4e0271efbf3 100644
--- a/drivers/dma/ti/Makefile
+++ b/drivers/dma/ti/Makefile
@@ -8,3 +8,4 @@ k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o
k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o
+k3-psil-data-$(CONFIG_SOC_K3_AM62A7) += k3-psil-am62a.o
diff --git a/drivers/dma/ti/k3-psil-am62a.c b/drivers/dma/ti/k3-psil-am62a.c
new file mode 100644
index ..ca9d71f91422
--- /dev/null
+++ b/drivers/dma/ti/k3-psil-am62a.c
@@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com
+ */
+
+#include
+
+#include "k3-psil-priv.h"
+
+#define PSIL_PDMA_XY_TR(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ }, \
+ }
+
+#define PSIL_PDMA_XY_PKT(x)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .mapped_channel_id = -1,\
+ .default_flow_id = -1, \
+ .pkt_mode = 1, \
+ }, \
+ }
+
+#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 16, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = flow_base, \
+ }, \
+ }
+
+#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx)\
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_NATIVE, \
+ .pkt_mode = 1, \
+ .needs_epib = 1,\
+ .psd_size = 64, \
+ .mapped_channel_id = ch,\
+ .flow_start = flow_base,\
+ .flow_num = flow_cnt, \
+ .default_flow_id = default_flow,\
+ .notdpkt = tx, \
+ }, \
+ }
+
+#define PSIL_PDMA_MCASP(x) \
+ { \
+ .thread_id = x, \
+ .ep_config = { \
+ .ep_type = PSIL_EP_PDMA_XY, \
+ .pdma_acc32 = 1,\
+ .pdma_burst = 1,\
+ }, \
+ }
+
+#define PSIL_CSI2RX(x)
[PATCH 6/8] board: ti: am62ax: env: Set the boot_targets
Set the default boot_targets to map up SD card as priority followed by
emmc and so on.
Signed-off-by: Nishanth Menon
---
board/ti/am62ax/am62ax.env | 1 +
1 file changed, 1 insertion(+)
diff --git a/board/ti/am62ax/am62ax.env b/board/ti/am62ax/am62ax.env
index 2af6914e3fab..a6d967e982d4 100644
--- a/board/ti/am62ax/am62ax.env
+++ b/board/ti/am62ax/am62ax.env
@@ -8,6 +8,7 @@ args_all=setenv optargs ${optargs}
earlycon=ns16550a,mmio32,0x0280
${mtdparts}
run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+boot_targets=mmc1 mmc0 usb pxe dhcp
boot=mmc
mmcdev=1
bootpart=1:2
--
2.40.0
[PATCH 4/8] configs: am62ax_evm_a53_defconfig: Enable networking
Enable networking Signed-off-by: Nishanth Menon --- configs/am62ax_evm_a53_defconfig | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index d0a34c75505d..c94708a7bf85 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -42,7 +42,6 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -# CONFIG_NET is not set CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y @@ -51,6 +50,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y # CONFIG_GPIO is not set # CONFIG_I2C is not set @@ -60,6 +61,10 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_FIXED=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y -- 2.40.0
[PATCH 0/8] arm: dts: am62a: Update to kernel v6.7-rc1
Hi, Please find the series to do the following: a) Update kernel dts to v6.7-rc1 b) Enable networking c) switch to stdboot. d) Add documentation for the AM62A platform. Bootlog: https://gist.github.com/nmenon/f1d8d9bf79aefc0938a745d3bf5b2d9f Baseline: master da2e3196e4dc Merge patch series "arm: dts: k3-am6: Fix Ethernet/DMA" Jai Luthra (1): doc: board: ti: Add AM62A documentation Nishanth Menon (6): arm: mach-k3: am62a: Add main_timer0 id to the dev list arm: dts: k3-am62a*: Sync with kernel v6.7-rc1 configs: am62ax_evm_a53_defconfig: Enable networking board: ti: am62ax: env: Use default findfdt board: ti: am62ax: env: Set the boot_targets configs: am62ax_evm_a53_defconfig: switch to stdboot Vignesh Raghavendra (1): dma: ti: k3-udma: Introduce DMA support for the am62ax arch/arm/dts/k3-am62a-main.dtsi | 585 +- arch/arm/dts/k3-am62a-mcu.dtsi| 131 ++ arch/arm/dts/k3-am62a-thermal.dtsi| 47 +++ arch/arm/dts/k3-am62a-wakeup.dtsi | 21 +- arch/arm/dts/k3-am62a.dtsi| 5 +- arch/arm/dts/k3-am62a7-r5-sk.dts | 74 +--- arch/arm/dts/k3-am62a7-sk-u-boot.dtsi | 139 -- arch/arm/dts/k3-am62a7-sk.dts | 347 ++- arch/arm/dts/k3-am62a7.dtsi | 3 +- arch/arm/mach-k3/am62ax/dev-data.c| 1 + board/ti/am62ax/am62ax.env| 6 +- configs/am62ax_evm_a53_defconfig | 12 +- doc/board/ti/am62ax_sk.rst| 213 ++ doc/board/ti/k3.rst | 1 + drivers/dma/ti/Makefile | 1 + drivers/dma/ti/k3-psil-am62a.c| 196 + drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 2 + 18 files changed, 1650 insertions(+), 135 deletions(-) create mode 100644 arch/arm/dts/k3-am62a-thermal.dtsi create mode 100644 doc/board/ti/am62ax_sk.rst create mode 100644 drivers/dma/ti/k3-psil-am62a.c -- 2.40.0
[PATCH 1/8] arm: mach-k3: am62a: Add main_timer0 id to the dev list
main_timer0 is used by u-boot as the tick-timer. Add it to the soc
devices list so it an be enabled via the k3 power controller.
Signed-off-by: Nishanth Menon
---
arch/arm/mach-k3/am62ax/dev-data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-k3/am62ax/dev-data.c
b/arch/arm/mach-k3/am62ax/dev-data.c
index abf5d8e91aa2..6cced9efd08a 100644
--- a/arch/arm/mach-k3/am62ax/dev-data.c
+++ b/arch/arm/mach-k3/am62ax/dev-data.c
@@ -52,6 +52,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(161, _lpsc_list[5]),
PSC_DEV(162, _lpsc_list[6]),
PSC_DEV(75, _lpsc_list[7]),
+ PSC_DEV(36, _lpsc_list[8]),
PSC_DEV(102, _lpsc_list[8]),
PSC_DEV(146, _lpsc_list[8]),
PSC_DEV(166, _lpsc_list[9]),
--
2.40.0
[PATCH 1/1] efi_loader: improve efi_var_from_file() description
It is unclear to developers why efi_var_from_file() returns EFI_SUCCESS if file ubootefi.var is missing or corrupted. Improve the description. Reported-by: Weizhao Ouyang Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_var_file.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/lib/efi_loader/efi_var_file.c b/lib/efi_loader/efi_var_file.c index 62e071bd83..dbf76f93de 100644 --- a/lib/efi_loader/efi_var_file.c +++ b/lib/efi_loader/efi_var_file.c @@ -204,8 +204,11 @@ efi_status_t efi_var_restore(struct efi_var_file *buf, bool safe) * File ubootefi.var is read from the EFI system partitions and the variables * stored in the file are created. * - * In case the file does not exist yet or a variable cannot be set EFI_SUCCESS - * is returned. + * On first boot the file ubootefi.var does not exist yet. This is if why we + * must return EFI_SUCCESS in this case. + * + * If the variable file is corrupted, e.g. incorrect CRC32, we do not want to + * stop the boot process. We deliberately return EFI_SUCCESS in this case, too. * * Return: status code */ -- 2.40.1
Re: [PATCH] efi_loader: Clean up efi_dp_append and efi_dp_concat
On 11/7/23 18:36, Ilias Apalodimas wrote:
Looking back at the initrd storing functionality, we introduced three
functions, efi_dp_append_or_concatenate(), efi_dp_append/concat(). In
hindsight we could have simplified that by a lot. First of all none of
the functions append anything. They all allocate a new device path and
concatenate the contents of two device paths in one. A boolean parameter
controls the final device path -- if that's true an end node is injected
between the two device paths.
So let's rewrite this and make it a bit easier to read. Get rid of
efi_dp_append(), efi_dp_concat() and rename
efi_dp_append_or_concatenate() to efi_dp_concat(). This is far more
intuitive and the only adjustment that is needed is an extra boolean
argument on all callsites.
After this patch we still have efi_dp_append_instance(). The only
difference to efi_dp_concat(,,true) seems only to be the type of end
node used as separator.
Hence the last argument of efi_dp_contat() should be be either of:
* 0
* DEVICE_PATH_SUB_TYPE_INSTANCE_END
* DEVICE_PATH_SUB_TYPE_END
Signed-off-by: Ilias Apalodimas
---
Kojima-san, I think this might affect your EFI HTTP boot series.
I don't mind waiting for this and merging it after your series goes in
(and adjust it). The changes should be trivial anyway
cmd/bootefi.c | 4 +-
cmd/eficonfig.c| 7 ++-
cmd/efidebug.c | 6 +-
include/efi_loader.h | 5 +-
lib/efi_loader/efi_bootmgr.c | 2 +-
lib/efi_loader/efi_boottime.c | 2 +-
lib/efi_loader/efi_device_path.c | 66 ++
lib/efi_loader/efi_device_path_utilities.c | 2 +-
8 files changed, 32 insertions(+), 62 deletions(-)
diff --git a/cmd/bootefi.c b/cmd/bootefi.c
index 20e5c94a33a4..eb839136bf7e 100644
--- a/cmd/bootefi.c
+++ b/cmd/bootefi.c
@@ -513,8 +513,8 @@ efi_status_t efi_run_image(void *source_buffer, efi_uintn_t
source_size)
goto out;
msg_path = file_path;
} else {
- file_path = efi_dp_append(bootefi_device_path,
- bootefi_image_path);
+ file_path = efi_dp_concat(bootefi_device_path,
+ bootefi_image_path, false);
msg_path = bootefi_image_path;
log_debug("Loaded from disk\n");
}
diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index e6e8a0a488e7..470adb7eddbf 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -528,7 +528,7 @@ struct efi_device_path *eficonfig_create_device_path(struct
efi_device_path *dp_
p += fp_size;
*((struct efi_device_path *)p) = END;
- dp = efi_dp_append(dp_volume, (struct efi_device_path *)buf);
+ dp = efi_dp_concat(dp_volume, (struct efi_device_path *)buf, false);
free(buf);
return dp;
@@ -1481,7 +1481,8 @@ static efi_status_t eficonfig_edit_boot_option(u16
*varname, struct eficonfig_bo
ret = EFI_OUT_OF_RESOURCES;
goto out;
}
- initrd_dp = efi_dp_append((const struct efi_device_path
*)_dp, dp);
+ initrd_dp = efi_dp_concat((const struct efi_device_path
*)_dp,
+ dp, false);
efi_free_pool(dp);
}
@@ -1492,7 +1493,7 @@ static efi_status_t eficonfig_edit_boot_option(u16
*varname, struct eficonfig_bo
}
final_dp_size = efi_dp_size(dp) + sizeof(END);
if (initrd_dp) {
- final_dp = efi_dp_concat(dp, initrd_dp);
+ final_dp = efi_dp_concat(dp, initrd_dp, true);
final_dp_size += efi_dp_size(initrd_dp) + sizeof(END);
} else {
final_dp = efi_dp_dup(dp);
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 201531ac19fc..a62298bf5987 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -698,8 +698,8 @@ struct efi_device_path *create_initrd_dp(const char *dev,
const char *part,
if (!short_fp)
short_fp = tmp_fp;
- initrd_dp = efi_dp_append((const struct efi_device_path *)_dp,
- short_fp);
+ initrd_dp = efi_dp_concat((const struct efi_device_path *)_dp,
+ short_fp, false);
out:
efi_free_pool(tmp_dp);
@@ -841,7 +841,7 @@ static int do_efi_boot_add(struct cmd_tbl *cmdtp, int flag,
goto out;
}
- final_fp = efi_dp_concat(file_path, initrd_dp);
+ final_fp = efi_dp_concat(file_path, initrd_dp, true);
if (!final_fp) {
printf("Cannot create final device path\n");
r = CMD_RET_FAILURE;
diff --git a/include/efi_loader.h b/include/efi_loader.h
index e24410505f40..398cd20c7ae6 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -808,8 +808,6 @@ efi_uintn_t
Re: [PATCH] efi_loader: Correctly account the SCRTM event creation
On 11/7/23 12:31, Ilias Apalodimas wrote:
The result of efi_append_scrtm_version() is overwritten before anyone
checks its result. Check it and exit the function on failures
Addresses-Coverity-ID: 467399 Code maintainability issues (UNUSED_VALUE)
Fixes: commit 97707f12fdab ("tpm: Support boot measurements")
Signed-off-by: Ilias Apalodimas
Reviewed-by: Heinrich Schuchardt
---
lib/efi_loader/efi_tcg2.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c
index 2eaa12b83b16..463ea4c15416 100644
--- a/lib/efi_loader/efi_tcg2.c
+++ b/lib/efi_loader/efi_tcg2.c
@@ -944,8 +944,11 @@ static efi_status_t efi_init_event_log(void)
* Add SCRTM version to the log if previous firmmware
* doesn't pass an eventlog.
*/
- if (!elog.found)
+ if (!elog.found) {
ret = efi_append_scrtm_version(dev);
+ if (ret != EFI_SUCCESS)
+ goto free_pool;
+ }
ret = create_final_event();
if (ret != EFI_SUCCESS)
Re: [PATCH v3 09/12] x86: Enable SSE in 64-bit mode
Hi Tom, On Mon, 13 Nov 2023 at 07:06, Tom Rini wrote: > > On Mon, Nov 13, 2023 at 09:01:02PM +0800, Bin Meng wrote: > > Hi Simon, > > > > On Mon, Nov 13, 2023 at 4:02 AM Simon Glass wrote: > > > > > > Hi Bin, > > > > > > On Mon, 6 Nov 2023 at 08:36, Tom Rini wrote: > > > > > > > > On Mon, Nov 06, 2023 at 06:26:15PM +0800, Bin Meng wrote: > > > > > + Tom, > > > > > > > > > > Hi Simon, > > > > > > > > > > On Mon, Nov 6, 2023 at 12:29 AM Simon Glass wrote: > > > > > > > > > > > > Hi Bin, > > > > > > > > > > > > On Sun, 5 Nov 2023 at 14:05, Bin Meng wrote: > > > > > > > > > > > > > > Hi Simon, > > > > > > > > > > > > > > On Mon, Oct 2, 2023 at 9:15 AM Simon Glass > > > > > > > wrote: > > > > > > > > > > > > > > > > This is needed to support Truetype fonts. In any case, the > > > > > > > > compiler > > > > > > > > expects SSE to be available in 64-bit mode. Enable it. > > > > > > > > > > > > > > > > Signed-off-by: Simon Glass > > > > > > > > Suggested-by: Bin Meng > > > > > > > > --- > > > > > > > > > > > > > > > > (no changes since v1) > > > > > > > > > > > > > > > > arch/x86/config.mk| 1 - > > > > > > > > arch/x86/cpu/x86_64/cpu.c | 11 +++ > > > > > > > > 2 files changed, 11 insertions(+), 1 deletion(-) > > > > > > > > > > > > > > > > > > > > > > I didn't suggest we enable SSE for x86. This is the wrong > > > > > > > approach. > > > > > > > > > > > > > > We should rewrite the Truetype support codes to avoid using > > > > > > > float/double types. > > > > > > > > > > > > > > This way the Truetype codes can be used on any other architectures > > > > > > > without the need for the compiler to emit explicit floating > > > > > > > instructions. > > > > > > > > > > > > I am not aware of any such library. At present, enabling truetype on > > > > > > coreboot64 causes a hang. > > > > > > > > > > > > > > > > If that's the case, we will have to either: > > > > > > > > > > - Switch all U-Boot builds' to use software float (e.g. -msoft-float) > > > > > which unfortunately depends on the compiler runtime intrinsics. > > > > > - Introduce a Kconfig option for hard float enabling and let each > > > > > architecture to decide whether it implements it or not, and update > > > > > Truetype to depend on the hard float. > > > > > > > > We generally do -msoft-float already, so introducing that for x86, and > > > > some Kconfig logic to ensure that no one else steps on this particular > > > > bug sounds reasonable. > > > > > > Yes soft float seems to be not-much-used on x86. For 64-bit chips the > > > compiler seems to assume that hardfp is available. > > > > We have compiler flags to ensure the compiler does not generate SSE > > instructions. Yes, I know SSE is in almost every x86 processor we see > > nowadays. > > > > > > > > So perhaps the best thing is to introduce a HARDFP option to x86 only. > > > > This option should be global as some other arches also don't have > > hardware fp, like RISC-V whose fp extension is optional. > > RISC-V should take the ARM approach (and what I was suggesting for x86) > and enforce soft-float for everyone. But see my comment above...I'm just not sure softfp is widely used on x86. It also is a bit silly, since 64-bit CPUs have hardfp and it is trivial to enable (in fact we have to disable it if we don;t want it). Bin, please let me know what you think. Regards, Simon
Re: [PATCH v3 09/12] x86: Enable SSE in 64-bit mode
On Mon, Nov 13, 2023 at 09:01:02PM +0800, Bin Meng wrote: > Hi Simon, > > On Mon, Nov 13, 2023 at 4:02 AM Simon Glass wrote: > > > > Hi Bin, > > > > On Mon, 6 Nov 2023 at 08:36, Tom Rini wrote: > > > > > > On Mon, Nov 06, 2023 at 06:26:15PM +0800, Bin Meng wrote: > > > > + Tom, > > > > > > > > Hi Simon, > > > > > > > > On Mon, Nov 6, 2023 at 12:29 AM Simon Glass wrote: > > > > > > > > > > Hi Bin, > > > > > > > > > > On Sun, 5 Nov 2023 at 14:05, Bin Meng wrote: > > > > > > > > > > > > Hi Simon, > > > > > > > > > > > > On Mon, Oct 2, 2023 at 9:15 AM Simon Glass > > > > > > wrote: > > > > > > > > > > > > > > This is needed to support Truetype fonts. In any case, the > > > > > > > compiler > > > > > > > expects SSE to be available in 64-bit mode. Enable it. > > > > > > > > > > > > > > Signed-off-by: Simon Glass > > > > > > > Suggested-by: Bin Meng > > > > > > > --- > > > > > > > > > > > > > > (no changes since v1) > > > > > > > > > > > > > > arch/x86/config.mk| 1 - > > > > > > > arch/x86/cpu/x86_64/cpu.c | 11 +++ > > > > > > > 2 files changed, 11 insertions(+), 1 deletion(-) > > > > > > > > > > > > > > > > > > > I didn't suggest we enable SSE for x86. This is the wrong approach. > > > > > > > > > > > > We should rewrite the Truetype support codes to avoid using > > > > > > float/double types. > > > > > > > > > > > > This way the Truetype codes can be used on any other architectures > > > > > > without the need for the compiler to emit explicit floating > > > > > > instructions. > > > > > > > > > > I am not aware of any such library. At present, enabling truetype on > > > > > coreboot64 causes a hang. > > > > > > > > > > > > > If that's the case, we will have to either: > > > > > > > > - Switch all U-Boot builds' to use software float (e.g. -msoft-float) > > > > which unfortunately depends on the compiler runtime intrinsics. > > > > - Introduce a Kconfig option for hard float enabling and let each > > > > architecture to decide whether it implements it or not, and update > > > > Truetype to depend on the hard float. > > > > > > We generally do -msoft-float already, so introducing that for x86, and > > > some Kconfig logic to ensure that no one else steps on this particular > > > bug sounds reasonable. > > > > Yes soft float seems to be not-much-used on x86. For 64-bit chips the > > compiler seems to assume that hardfp is available. > > We have compiler flags to ensure the compiler does not generate SSE > instructions. Yes, I know SSE is in almost every x86 processor we see > nowadays. > > > > > So perhaps the best thing is to introduce a HARDFP option to x86 only. > > This option should be global as some other arches also don't have > hardware fp, like RISC-V whose fp extension is optional. RISC-V should take the ARM approach (and what I was suggesting for x86) and enforce soft-float for everyone. -- Tom signature.asc Description: PGP signature
Re: Pull request: u-boot-sunxi/master for 2024.01
On Sun, Nov 12, 2023 at 09:24:50PM +, Andre Przywara wrote: > Hi Tom, > > please pull some more sunxi changes for this cycle: > > the first few patches are some easy refactorings and fixes, most of them > actually don't change the generated binaries at all. Then there is a > defconfig for a new board, for which we just gained the .dts file from > the last kernel DT sync. > On top there is support for a new PMIC (AXP313), and LPDDR4 support for > the Allwinner H616 SoC, both of which are needed to support new devices > that appeared lately, especially cheap TV boxes. > > While those are technically new features, they don't affect existing boards, > for instance the LPDDR4 support code is guarded by a new DRAM type Kconfig > variable. So the risk for regressions is very slim. > > Gitlab CI passed, and I booted that briefly on some boards, including an > H616 and an H618 one (with LPDDR4). > > Thanks, > Andre > > = > The following changes since commit da2e3196e4dc28298b58a018ace07f85eecd1652: > > Merge patch series "arm: dts: k3-am6: Fix Ethernet/DMA" (2023-11-10 > 15:25:47 -0500) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-sunxi.git master > > for you to fetch changes up to 4b02f0120a4bb2a5d7081aef8cef6a4ca57e9db2: > > sunxi: H616: add LPDDR4 DRAM support (2023-11-12 18:04:32 +) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 09/12] x86: Enable SSE in 64-bit mode
Hi Bin, On Mon, 13 Nov 2023 at 06:01, Bin Meng wrote: > > Hi Simon, > > On Mon, Nov 13, 2023 at 4:02 AM Simon Glass wrote: > > > > Hi Bin, > > > > On Mon, 6 Nov 2023 at 08:36, Tom Rini wrote: > > > > > > On Mon, Nov 06, 2023 at 06:26:15PM +0800, Bin Meng wrote: > > > > + Tom, > > > > > > > > Hi Simon, > > > > > > > > On Mon, Nov 6, 2023 at 12:29 AM Simon Glass wrote: > > > > > > > > > > Hi Bin, > > > > > > > > > > On Sun, 5 Nov 2023 at 14:05, Bin Meng wrote: > > > > > > > > > > > > Hi Simon, > > > > > > > > > > > > On Mon, Oct 2, 2023 at 9:15 AM Simon Glass > > > > > > wrote: > > > > > > > > > > > > > > This is needed to support Truetype fonts. In any case, the > > > > > > > compiler > > > > > > > expects SSE to be available in 64-bit mode. Enable it. > > > > > > > > > > > > > > Signed-off-by: Simon Glass > > > > > > > Suggested-by: Bin Meng > > > > > > > --- > > > > > > > > > > > > > > (no changes since v1) > > > > > > > > > > > > > > arch/x86/config.mk| 1 - > > > > > > > arch/x86/cpu/x86_64/cpu.c | 11 +++ > > > > > > > 2 files changed, 11 insertions(+), 1 deletion(-) > > > > > > > > > > > > > > > > > > > I didn't suggest we enable SSE for x86. This is the wrong approach. > > > > > > > > > > > > We should rewrite the Truetype support codes to avoid using > > > > > > float/double types. > > > > > > > > > > > > This way the Truetype codes can be used on any other architectures > > > > > > without the need for the compiler to emit explicit floating > > > > > > instructions. > > > > > > > > > > I am not aware of any such library. At present, enabling truetype on > > > > > coreboot64 causes a hang. > > > > > > > > > > > > > If that's the case, we will have to either: > > > > > > > > - Switch all U-Boot builds' to use software float (e.g. -msoft-float) > > > > which unfortunately depends on the compiler runtime intrinsics. > > > > - Introduce a Kconfig option for hard float enabling and let each > > > > architecture to decide whether it implements it or not, and update > > > > Truetype to depend on the hard float. > > > > > > We generally do -msoft-float already, so introducing that for x86, and > > > some Kconfig logic to ensure that no one else steps on this particular > > > bug sounds reasonable. > > > > Yes soft float seems to be not-much-used on x86. For 64-bit chips the > > compiler seems to assume that hardfp is available. > > We have compiler flags to ensure the compiler does not generate SSE > instructions. Yes, I know SSE is in almost every x86 processor we see > nowadays. > > > > > So perhaps the best thing is to introduce a HARDFP option to x86 only. > > This option should be global as some other arches also don't have > hardware fp, like RISC-V whose fp extension is optional. Here is the patch I have: https://patchwork.ozlabs.org/project/uboot/patch/20231112200255.172351-5-...@chromium.org/ So perhaps move it to arch/Kconfig , rename it to HARDFP and update the help to be more generic? Regards, Simon
Re: [PATCH v2 1/1] acpi: cannot have RSDT above 4 GiB
On Sun, 12 Nov 2023 at 16:54, Heinrich Schuchardt wrote: > > The field RsdtAddress has only 32 bit. The RSDT table cannot be located > beyond 4 GiB. > > Signed-off-by: Heinrich Schuchardt > --- > v2: > Avoid superfluous 0 assignment. RSDP is already zeroed out. > Use constants form linux/sizes.h > --- > lib/acpi/base.c | 23 --- > 1 file changed, 16 insertions(+), 7 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH] common: usb-hub: Reset hub port before scanning
+Simon +Trini
On Fri, Nov 10, 2023 at 2:13 PM Shantur Rathore wrote:
>
> Currently when a hub is turned on, all the ports are powered on.
> This works well for hubs which have individual power control.
>
> For the hubs without individual power control this has no effect.
> Mostly in these scenarios the hub port is powered before the USB
> controller is enabled, this can lead to some devices in unexpected
> state.
>
> With this patch, we explicitly reset the port while powering up hub
> This resets the port for hubs without port power control and has
> no effect on hubs with port power control as the port is still off.
>
> Before this patch AMicro AM8180 based NVME to USB adapter won't be
> detected as a USB3.0 Mass Storage device but with this it works as
> expected.
>
> Tested working after this patch:
> 1. AMicro AM8180 based NVME to USB Adapter
> 2. Kingston DataTraveler 3.0
> 3. GenesysLogic USB3.0 Hub
>
> The drives were tested while connected directly and via the hub.
> ---
> common/usb_hub.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/common/usb_hub.c b/common/usb_hub.c
> index 85c0822d8b..06fe436add 100644
> --- a/common/usb_hub.c
> +++ b/common/usb_hub.c
> @@ -174,8 +174,10 @@ static void usb_hub_power_on(struct usb_hub_device *hub)
>
> debug("enabling power on all ports\n");
> for (i = 0; i < dev->maxchild; i++) {
> + usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_RESET);
> + debug("Reset : port %d returns %lX\n", i + 1, dev->status);
> usb_set_port_feature(dev, i + 1, USB_PORT_FEAT_POWER);
> - debug("port %d returns %lX\n", i + 1, dev->status);
> + debug("PowerOn : port %d returns %lX\n", i + 1, dev->status);
> }
>
> #ifdef CONFIG_SANDBOX
> --
> 2.40.1
>
Re: [PATCH v3 09/12] x86: Enable SSE in 64-bit mode
Hi Simon, On Mon, Nov 13, 2023 at 4:02 AM Simon Glass wrote: > > Hi Bin, > > On Mon, 6 Nov 2023 at 08:36, Tom Rini wrote: > > > > On Mon, Nov 06, 2023 at 06:26:15PM +0800, Bin Meng wrote: > > > + Tom, > > > > > > Hi Simon, > > > > > > On Mon, Nov 6, 2023 at 12:29 AM Simon Glass wrote: > > > > > > > > Hi Bin, > > > > > > > > On Sun, 5 Nov 2023 at 14:05, Bin Meng wrote: > > > > > > > > > > Hi Simon, > > > > > > > > > > On Mon, Oct 2, 2023 at 9:15 AM Simon Glass wrote: > > > > > > > > > > > > This is needed to support Truetype fonts. In any case, the compiler > > > > > > expects SSE to be available in 64-bit mode. Enable it. > > > > > > > > > > > > Signed-off-by: Simon Glass > > > > > > Suggested-by: Bin Meng > > > > > > --- > > > > > > > > > > > > (no changes since v1) > > > > > > > > > > > > arch/x86/config.mk| 1 - > > > > > > arch/x86/cpu/x86_64/cpu.c | 11 +++ > > > > > > 2 files changed, 11 insertions(+), 1 deletion(-) > > > > > > > > > > > > > > > > I didn't suggest we enable SSE for x86. This is the wrong approach. > > > > > > > > > > We should rewrite the Truetype support codes to avoid using > > > > > float/double types. > > > > > > > > > > This way the Truetype codes can be used on any other architectures > > > > > without the need for the compiler to emit explicit floating > > > > > instructions. > > > > > > > > I am not aware of any such library. At present, enabling truetype on > > > > coreboot64 causes a hang. > > > > > > > > > > If that's the case, we will have to either: > > > > > > - Switch all U-Boot builds' to use software float (e.g. -msoft-float) > > > which unfortunately depends on the compiler runtime intrinsics. > > > - Introduce a Kconfig option for hard float enabling and let each > > > architecture to decide whether it implements it or not, and update > > > Truetype to depend on the hard float. > > > > We generally do -msoft-float already, so introducing that for x86, and > > some Kconfig logic to ensure that no one else steps on this particular > > bug sounds reasonable. > > Yes soft float seems to be not-much-used on x86. For 64-bit chips the > compiler seems to assume that hardfp is available. We have compiler flags to ensure the compiler does not generate SSE instructions. Yes, I know SSE is in almost every x86 processor we see nowadays. > > So perhaps the best thing is to introduce a HARDFP option to x86 only. This option should be global as some other arches also don't have hardware fp, like RISC-V whose fp extension is optional. Regards, Bin
[PULL] Pull request for u-boot next / v2024.04 = u-boot-stm32-20231113
Hi Tom
Please pull the STM32 related patches for u-boot/next, v2024.04:
u-boot-stm32-20231113
CI status: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/18567
The following changes since commit 3b6db6901ff5babbb9d21f0fca750996e29d85e0:
Merge branch '2023-11-10-improve-semihosting-armv6' into next (2023-11-10
12:52:33 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-stm.git
tags/u-boot-stm32-20231113
for you to fetch changes up to 01a701994b0590b6452516a7c67353359d053c94:
stm32mp2: initial support (2023-11-13 10:55:38 +0100)
Introduce STM32MP2 SoCs family support
Add STM32MP257F-EV1 board
Patrice Chotard (8):
arm: caches: Make DCACHE_DEFAULT_OPTION accessible for ARM64 arch
stm32mp: dram_init: Get RAM size from DT if no RAM driver found
stm32mp: dram_init: Limit DDR usage under 4GB boundary for STM32MP
stm32mp: bsec: Fix AARCH64 compilation warnings
serial: stm32: Fix AARCH64 compilation warnings
pinctrl: pinctrl_stm32: Add stm32mp2 support
ARM: dts: stm32: Add STM32MP257F Evaluation board support
stm32mp2: initial support
Patrick Delaunay (1):
stm32mp: dram_init: Fix AARCH64 compilation warnings
arch/arm/Kconfig | 2 +-
arch/arm/dts/Makefile| 3 +++
arch/arm/dts/stm32mp25-pinctrl.dtsi | 38
+++
arch/arm/dts/stm32mp25-u-boot.dtsi | 102
++
arch/arm/dts/stm32mp251.dtsi | 285
+++
arch/arm/dts/stm32mp253.dtsi | 23
++
arch/arm/dts/stm32mp255.dtsi | 9 +
arch/arm/dts/stm32mp257.dtsi | 9 +
arch/arm/dts/stm32mp257f-ev1-u-boot.dtsi | 20 +++
arch/arm/dts/stm32mp257f-ev1.dts | 55
+++
arch/arm/dts/stm32mp25xc.dtsi| 8
arch/arm/dts/stm32mp25xf.dtsi| 8
arch/arm/dts/stm32mp25xxai-pinctrl.dtsi | 83
+
arch/arm/dts/stm32mp25xxak-pinctrl.dtsi | 71
++
arch/arm/dts/stm32mp25xxal-pinctrl.dtsi | 71
++
arch/arm/include/asm/system.h| 16 +++
arch/arm/mach-stm32mp/Kconfig| 26
+++-
arch/arm/mach-stm32mp/Kconfig.25x| 43
arch/arm/mach-stm32mp/Makefile | 15 --
arch/arm/mach-stm32mp/bsec.c | 29
++-
arch/arm/mach-stm32mp/dram_init.c| 17
arch/arm/mach-stm32mp/include/mach/stm32.h | 141
++
arch/arm/mach-stm32mp/include/mach/sys_proto.h | 26
arch/arm/mach-stm32mp/stm32mp1/Makefile | 20 +++
arch/arm/mach-stm32mp/{ => stm32mp1}/cpu.c | 0
arch/arm/mach-stm32mp/{ => stm32mp1}/fdt.c | 0
arch/arm/mach-stm32mp/{ => stm32mp1}/psci.c | 0
arch/arm/mach-stm32mp/{ => stm32mp1}/pwr_regulator.c | 0
arch/arm/mach-stm32mp/{ => stm32mp1}/spl.c | 0
arch/arm/mach-stm32mp/{ => stm32mp1}/stm32mp13x.c| 0
arch/arm/mach-stm32mp/{ => stm32mp1}/stm32mp15x.c| 0
arch/arm/mach-stm32mp/{ => stm32mp1}/tzc400.c| 0
arch/arm/mach-stm32mp/stm32mp2/Makefile | 9 +
arch/arm/mach-stm32mp/stm32mp2/arm64-mmu.c | 68
+++
arch/arm/mach-stm32mp/stm32mp2/cpu.c | 108
arch/arm/mach-stm32mp/stm32mp2/fdt.c | 16 +++
arch/arm/mach-stm32mp/stm32mp2/stm
Re: [PATCH v3] arm: dts: rockpro64: Add RockPro64 smbios
On 2023-11-13 11:01, Shantur Rathore wrote:
Add smbios information for Pine64 RockPro64 board and enable in
config
Signed-off-by: Shantur Rathore
---
Changes v3: Enable SYSINFO and SYSINFO_SMBIOS in defconfig
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 22 ++
configs/rockpro64-rk3399_defconfig| 2 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
index 732727d9b0..a4453e76f6 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
@@ -9,6 +9,28 @@
chosen {
u-boot,spl-boot-order = "same-as-spl", _flash, ,
};
+
+smbios {
+compatible = "u-boot,sysinfo-smbios";
+smbios {
+system {
+manufacturer = "PINE64";
+product = "RockPro64";
+};
+
+baseboard {
+manufacturer = "PINE64";
+product = "RockPro64";
+};
+
+chassis {
+manufacturer = "PINE64";
+product = "RockPro64";
+};
+};
+};
+
+
};
Perhaps it would be better to use "Pine64" instead of "PINE64", because
"Pine64" is already used in multiple places. Also, it might be better to
use "ROCKPro64" instead of "RockPro64", because that's actually the
official name of the board, but I'm also perfectly fine with
"RockPro64".
{
diff --git a/configs/rockpro64-rk3399_defconfig
b/configs/rockpro64-rk3399_defconfig
index 4cd6b76665..affb6137e0 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -90,6 +90,8 @@ CONFIG_BAUDRATE=150
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
Re: [PATCH 3/3] treewide: use linux/time.h for time conversion defines
On 11/9/23 18:10, Igor Prusov wrote:
> Now that we have time conversion defines from in time.h there is no need
> for each driver to define their own version.
>
> Signed-off-by: Igor Prusov
> ---
>
> board/friendlyarm/nanopi2/onewire.c | 5 +
> drivers/clk/at91/clk-main.c | 2 +-
> drivers/i2c/stm32f7_i2c.c| 11 +--
> drivers/memory/stm32-fmc2-ebi.c | 5 ++---
> drivers/mmc/octeontx_hsmmc.h | 2 --
> drivers/mtd/nand/raw/atmel/nand-controller.c | 3 +--
> drivers/mtd/nand/raw/mxs_nand.c | 3 +--
> drivers/mtd/nand/raw/octeontx_nand.c | 2 +-
> drivers/mtd/nand/raw/stm32_fmc2_nand.c | 5 ++---
> drivers/phy/meson-axg-mipi-dphy.c| 3 +--
> drivers/phy/phy-core-mipi-dphy.c | 3 +--
> drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c | 3 +--
> drivers/pwm/pwm-aspeed.c | 3 +--
> drivers/pwm/pwm-at91.c | 2 +-
> drivers/pwm/pwm-cadence-ttc.c| 3 +--
> drivers/pwm/pwm-meson.c | 3 +--
> drivers/pwm/pwm-mtk.c| 3 +--
> drivers/pwm/pwm-ti-ehrpwm.c | 3 +--
> drivers/serial/serial_msm_geni.c | 3 +--
> drivers/spi/cadence_qspi.c | 3 +--
> drivers/spi/fsl_dspi.c | 4 +---
> drivers/ufs/cdns-platform.c | 3 +--
> drivers/usb/dwc3/core.c | 3 +--
> drivers/video/dw_mipi_dsi.c | 3 +--
> drivers/video/rockchip/dw_mipi_dsi_rockchip.c| 3 +--
> drivers/video/tegra20/tegra-dsi.c| 4 +---
> drivers/watchdog/sunxi_wdt.c | 3 +--
> fs/ubifs/ubifs.h | 1 -
> 28 files changed, 32 insertions(+), 62 deletions(-)
>
> diff --git a/board/friendlyarm/nanopi2/onewire.c
> b/board/friendlyarm/nanopi2/onewire.c
> index 56f0f2dfce..4f0b1e33c2 100644
> --- a/board/friendlyarm/nanopi2/onewire.c
> +++ b/board/friendlyarm/nanopi2/onewire.c
> @@ -11,16 +11,13 @@
> #include
> #include
> #include
> +#include
>
> #include
>
> #include
> #include
>
> -#ifndef NSEC_PER_SEC
> -#define NSEC_PER_SEC 10L
> -#endif
> -
> #define SAMPLE_BPS 9600
> #define SAMPLE_IN_US 101 /* (100 / BPS) */
>
> diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
> index b52d926f33..025c7a7aa2 100644
> --- a/drivers/clk/at91/clk-main.c
> +++ b/drivers/clk/at91/clk-main.c
> @@ -17,6 +17,7 @@
> #include
> #include
> #include
> +#include
> #include "pmc.h"
>
> #define UBOOT_DM_CLK_AT91_MAIN_RC"at91-main-rc-clk"
> @@ -25,7 +26,6 @@
> #define UBOOT_DM_CLK_AT91_SAM9X5_MAIN"at91-sam9x5-main-clk"
>
> #define MOR_KEY_MASK GENMASK(23, 16)
> -#define USEC_PER_SEC 100UL
> #define SLOW_CLOCK_FREQ 32768
>
> #define clk_main_parent_select(s)(((s) & \
> diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
> index b6c71789ee..eaa1d69289 100644
> --- a/drivers/i2c/stm32f7_i2c.c
> +++ b/drivers/i2c/stm32f7_i2c.c
> @@ -20,6 +20,7 @@
> #include
> #include
> #include
> +#include
>
> /* STM32 I2C registers */
> struct stm32_i2c_regs {
> @@ -121,8 +122,6 @@ struct stm32_i2c_regs {
> #define STM32_SCLH_MAX BIT(8)
> #define STM32_SCLL_MAX BIT(8)
>
> -#define STM32_NSEC_PER_SEC 10L
> -
> /**
> * struct stm32_i2c_spec - private i2c specification timing
> * @rate: I2C bus speed (Hz)
> @@ -591,7 +590,7 @@ static int stm32_i2c_choose_solution(u32 i2cclk,
>struct stm32_i2c_timings *s)
> {
> struct stm32_i2c_timings *v;
> - u32 i2cbus = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC,
> + u32 i2cbus = DIV_ROUND_CLOSEST(NSEC_PER_SEC,
> setup->speed_freq);
> u32 clk_error_prev = i2cbus;
> u32 clk_min, clk_max;
> @@ -607,8 +606,8 @@ static int stm32_i2c_choose_solution(u32 i2cclk,
> dnf_delay = setup->dnf * i2cclk;
>
> tsync = af_delay_min + dnf_delay + (2 * i2cclk);
> - clk_max = STM32_NSEC_PER_SEC / specs->rate_min;
> - clk_min = STM32_NSEC_PER_SEC / specs->rate_max;
> + clk_max = NSEC_PER_SEC / specs->rate_min;
> + clk_min = NSEC_PER_SEC / specs->rate_max;
>
> /*
>* Among Prescaler possibilities discovered above figures out SCL Low
> @@ -686,7 +685,7 @@ static int stm32_i2c_compute_timing(struct stm32_i2c_priv
> *i2c_priv,
> const struct stm32_i2c_spec *specs;
> struct stm32_i2c_timings *v, *_v;
> struct list_head solutions;
> - u32 i2cclk = DIV_ROUND_CLOSEST(STM32_NSEC_PER_SEC, setup->clock_src);
> + u32 i2cclk =
Re: [PATCH 1/4] rockchip: rk3588: Fix boot from SPI flash
On lis 12, 2023 10:26, Jonas Karlman wrote:
> The commit fd6e425be243 ("rockchip: rk3588-rock-5b: Enable boot from SPI
> NOR flash") added a new BROM_BOOTSOURCE_SPINOR_RK3588 with value 6.
>
> At the time the reason for this new bootsource id value 6 was unknown.
>
> We now know that the BootRom on RK3588 use different bootsource id
> values depending on the iomux used by the flash spi controller, and not
> by the type of spi nor or spi nand flash used.
>
> Add the following defines and use them for RK3588 boot_devices.
>
> - BROM_BOOTSOURCE_FSPI_M0 = 3
> - BROM_BOOTSOURCE_FSPI_M1 = 4
> - BROM_BOOTSOURCE_FSPI_M2 = 6
Tested-by: Slawomir Stepien
> Fixes: fd6e425be243 ("rockchip: rk3588-rock-5b: Enable boot from SPI NOR
> flash")
> Signed-off-by: Jonas Karlman
> ---
> arch/arm/include/asm/arch-rockchip/bootrom.h | 4 +++-
> arch/arm/mach-rockchip/rk3588/rk3588.c | 5 +++--
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h
> b/arch/arm/include/asm/arch-rockchip/bootrom.h
> index 7dab18fbc3fb..f78337397d63 100644
> --- a/arch/arm/include/asm/arch-rockchip/bootrom.h
> +++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
> @@ -47,8 +47,10 @@ enum {
> BROM_BOOTSOURCE_EMMC = 2,
> BROM_BOOTSOURCE_SPINOR = 3,
> BROM_BOOTSOURCE_SPINAND = 4,
> + BROM_BOOTSOURCE_FSPI_M0 = 3,
> + BROM_BOOTSOURCE_FSPI_M1 = 4,
> + BROM_BOOTSOURCE_FSPI_M2 = 6,
> BROM_BOOTSOURCE_SD = 5,
> - BROM_BOOTSOURCE_SPINOR_RK3588 = 6,
> BROM_BOOTSOURCE_USB = 10,
> BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
> };
> diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c
> b/arch/arm/mach-rockchip/rk3588/rk3588.c
> index b1f535fad505..322164e9b307 100644
> --- a/arch/arm/mach-rockchip/rk3588/rk3588.c
> +++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
> @@ -39,9 +39,10 @@ DECLARE_GLOBAL_DATA_PTR;
>
> const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
> [BROM_BOOTSOURCE_EMMC] = "/mmc@fe2e",
> - [BROM_BOOTSOURCE_SPINOR] = "/spi@fe2b/flash@0",
> + [BROM_BOOTSOURCE_FSPI_M0] = "/spi@fe2b/flash@0",
> + [BROM_BOOTSOURCE_FSPI_M1] = "/spi@fe2b/flash@0",
> + [BROM_BOOTSOURCE_FSPI_M2] = "/spi@fe2b/flash@0",
> [BROM_BOOTSOURCE_SD] = "/mmc@fe2c",
> - [BROM_BOOTSOURCE_SPINOR_RK3588] = "/spi@fe2b/flash@0",
> };
>
> static struct mm_region rk3588_mem_map[] = {
--
Slawomir Stepien
[PATCH] lib/slre: Fix memory leak if regex compilation fails
Signed-off-by: Francois Berder
---
lib/slre.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/lib/slre.c b/lib/slre.c
index e82a9e7635..e1a50443e0 100644
--- a/lib/slre.c
+++ b/lib/slre.c
@@ -686,6 +686,7 @@ int main(int argc, char *argv[])
}
if (!slre_compile(, argv[1])) {
+ (void) fclose(fp);
fprintf(stderr, "Error compiling slre: %s\n", slre.err_str);
return 1;
}
--
2.34.1
[PATCH v4] arm: dts: rockpro64: Add RockPro64 smbios
Add smbios information for Pine64 RockPro64 board and enable in
config
Signed-off-by: Shantur Rathore
---
Changes
v4: Change PINE64 to Pine64
v3: Enable SYSINFO and SYSINFO_SMBIOS in defconfig
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi | 22 ++
configs/rockpro64-rk3399_defconfig| 2 ++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
index 732727d9b0..089732524a 100644
--- a/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
@@ -9,6 +9,28 @@
chosen {
u-boot,spl-boot-order = "same-as-spl", _flash, ,
};
+
+smbios {
+compatible = "u-boot,sysinfo-smbios";
+smbios {
+system {
+manufacturer = "Pine64";
+product = "RockPro64";
+};
+
+baseboard {
+manufacturer = "Pine64";
+product = "RockPro64";
+};
+
+chassis {
+manufacturer = "Pine64";
+product = "RockPro64";
+};
+};
+};
+
+
};
{
diff --git a/configs/rockpro64-rk3399_defconfig
b/configs/rockpro64-rk3399_defconfig
index 4cd6b76665..affb6137e0 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -90,6 +90,8 @@ CONFIG_BAUDRATE=150
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_ROCKCHIP_SPI=y
+CONFIG_SYSINFO=y
+CONFIG_SYSINFO_SMBIOS=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
--
2.40.1
[PATCH v5 8/8] docs: k3: Add secure booting documentation
This commit adds a general flow to explain the usage of firewalls and the chain of trust in K3 devices. Signed-off-by: Manorit Chawdhry --- doc/board/ti/k3.rst | 45 + 1 file changed, 45 insertions(+) diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst index 3c4dbe1af545..5471f715d948 100644 --- a/doc/board/ti/k3.rst +++ b/doc/board/ti/k3.rst @@ -102,6 +102,51 @@ firmware can be loaded on the now free core in the wakeup domain. For more information on the bootup process of your SoC, consult the device specific boot flow documentation. +Secure Boot +^^^ + +K3 HS-SE devices are used for authenticated boot flow with secure boot. +HS-FS devices have optional authentication in the flow and doesn't "require" +authentication unless converted to HS-SE devices. + +Chain of trust +"" + +1) SMS starts up and loads the authenticated ROM code in Wakeup Domain +2) ROM code starts up and loads the authenticated tiboot3.bin in Wakeup + Domain +3) Wakeup SPL (tiboot3.bin) would authenticate the next set of binaries + (ATF,OP-TEE,DM,SPL,etc.) +4) After ATF and OP-TEE load, ARMV8 U-boot authenticates the next set of + binaries (Linux and DTBs) if using FIT Image authentication and having a + signature node in U-boot. + +Steps 1-3 are all authenticated by either the ROM code or TIFS as the +authenticating entity and step 4 uses U-boot standard mechanism for +authenticating. + +All the authentication that are done for ROM/TIFS are done through x509 +certificates that are signed. + +Firewalls +" + +1) ROM comes up and sets up firewalls that are needed by itself +2) TIFS (in multicertificate will setup it's own firewalls) +3) R5 SPL comes along and opens up other firewalls ( that are not owned by + anyone - essentially firewalls that were setup by ROM but are not needed + anymore) +4) Each stage beyond this: such as tispl.bin containing TFA/OPTEE uses OIDs to + set up firewalls to protect themselves (enforced by TIFS) +5) TFA/OP-TEE can configure other firewalls at runtime if required as they + are already authenticated and firewalled off from illegal access. +6) A53 SPL and U-boot itself startups but has no ability to change the + protection firewalls enforced by x509 OIDs or any other firewalls + configured by ROM/TIFS in the beginning. + +Futhur, firewalls have a lockdown bit in hardware that enforces the setting +(and cannot be over-ridden) till the full system is resetted. + Software Sources -- 2.41.0
[PATCH v5 7/8] docs: k3: Cleanup FIT signature documentation
The previous documentation had been very crude so refactor it to make it
cleaner and concise.
Signed-off-by: Manorit Chawdhry
---
doc/board/ti/k3.rst | 270 +---
1 file changed, 171 insertions(+), 99 deletions(-)
diff --git a/doc/board/ti/k3.rst b/doc/board/ti/k3.rst
index 5167925c9c60..3c4dbe1af545 100644
--- a/doc/board/ti/k3.rst
+++ b/doc/board/ti/k3.rst
@@ -246,6 +246,8 @@ Building tiboot3.bin
the final `tiboot3.bin` binary. (or the `sysfw.itb` if your device
uses the split binary flow)
+.. _k3_rst_include_start_build_steps_spl_r5:
+
.. k3_rst_include_start_build_steps_spl_r5
.. prompt:: bash $
@@ -310,6 +312,8 @@ use the `lite` option.
finished, we can jump back into U-Boot again, this time running on a
64bit core in the main domain.
+.. _k3_rst_include_start_build_steps_uboot:
+
.. k3_rst_include_start_build_steps_uboot
.. prompt:: bash $
@@ -328,144 +332,212 @@ wakeup and main domain and to boot to the U-Boot prompt
| `tispl.bin` for HS devices or `tispl.bin_unsigned` for GP devices
| `u-boot.img` for HS devices or `u-boot.img_unsigned` for GP devices
-Fit Signature Signing
+FIT signature signing
-
-K3 Platforms have fit signature signing enabled by default on their primary
-platforms. Here we'll take an example for creating fit image for J721e platform
+K3 platforms have FIT signature signing enabled by default on their primary
+platforms. Here we'll take an example for creating FIT Image for J721E platform
and the same can be extended to other platforms
-1. Describing FIT source
+Pre-requisites:
+
+* U-boot build (:ref:`U-boot build `)
+* Linux Image and Linux DTB prebuilt
+
+Describing FIT source
+^
- .. code-block:: bash
+FIT Image is a packed structure containing binary blobs and configurations.
+The Kernel FIT Image that we have has Kernel Image, DTB and the DTBOs. It
+supports packing multiple images and configurations that allow you to
+choose any configuration at runtime to boot from.
+
+.. code-block::
/dts-v1/;
/ {
-description = "Kernel fitImage for j721e-hs-evm";
-#address-cells = <1>;
-
-images {
-kernel-1 {
-description = "Linux kernel";
-data = /incbin/("Image");
-type = "kernel";
-arch = "arm64";
-os = "linux";
-compression = "none";
-load = <0x8008>;
-entry = <0x8008>;
-hash-1 {
-algo = "sha512";
-};
-
-};
-fdt-ti_k3-j721e-common-proc-board.dtb {
-description = "Flattened Device Tree blob";
-data = /incbin/("k3-j721e-common-proc-board.dtb");
-type = "flat_dt";
-arch = "arm64";
-compression = "none";
-load = <0x8300>;
-hash-1 {
-algo = "sha512";
-};
-
-};
+description = "FIT Image description";
+#address-cells = <1>;
+
+images {
+[image-1]
+[image-2]
+[fdt-1]
+[fdt-2]
+}
+
+configurations {
+default =
+[conf-1: image-1,fdt-1]
+[conf-2: image-2,fdt-1]
+}
+}
+
+* Sample Images
+
+.. code-block::
+
+kernel-1 {
+description = "Linux kernel";
+data = /incbin/("linux.bin");
+type = "kernel";
+arch = "arm64";
+os = "linux";
+compression = "gzip";
+load = <0x8100>;
+entry = <0x8100>;
+hash-1 {
+algo = "sha512";
};
-
-configurations {
-default = "conf-ti_k3-j721e-common-proc-board.dtb";
-conf-ti_k3-j721e-common-proc-board.dtb {
-description = "Linux kernel, FDT blob";
-fdt = "fdt-ti_k3-j721e-common-proc-board.dtb";
-kernel = "kernel-1";
-signature-1 {
-algo = "sha512,rsa4096";
-key-name-hint = "custMpk";
-sign-images = "kernel", "fdt";
-};
-};
+};
+fdt-ti_k3-j721e-common-proc-board.dtb {
+description = "Flattened Device Tree blob";
+data =
/incbin/("arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dtb");
+
[PATCH v5 6/8] binman: j7200: Add firewall configurations
The following commits adds the configuration of firewalls required to
protect ATF and OP-TEE memory region from non-secure reads and
writes using master and slave firewalls present in our K3 SOCs.
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-j7200-binman.dtsi | 143 ++
1 file changed, 143 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-binman.dtsi
b/arch/arm/dts/k3-j7200-binman.dtsi
index 14f7dea65ee3..246f15c2dd5d 100644
--- a/arch/arm/dts/k3-j7200-binman.dtsi
+++ b/arch/arm/dts/k3-j7200-binman.dtsi
@@ -214,6 +214,74 @@
ti-secure {
content = <>;
keyfile = "custMpk.pem";
+ auth-in-place = <0xa02>;
+
+ firewall-257-0 {
+ /* cpu_0_cpu_0_msmc
Background Firewall */
+ id = <257>;
+ region = <0>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_BG | FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD |
+
FWPERM_NON_SECURE_PRIV_RWCD |
+
FWPERM_NON_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x0>;
+ end_address = <0xff
0x>;
+ };
+
+ firewall-257-1 {
+ /* cpu_0_cpu_0_msmc
Foreground Firewall */
+ id = <257>;
+ region = <1>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ARMV8 << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x7000>;
+ end_address = <0x0
0x7001>;
+ };
+
+ /* firewall-4760-0 {
+* nb_slv0__mem0
Background Firewall
+* Already
configured by the secure entity
+* };
+*/
+
+ firewall-4760-1 {
+ /* nb_slv0__mem0
Foreground Firewall */
+ id = <4760>;
+ region = <1>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ARMV8 << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x7000>;
+ end_address = <0x0
0x7001>;
+ };
+
+ /* firewall-4761-0 {
+* nb_slv1__mem0
Background Firewall
+* Already
configured by the secure entity
+
[PATCH v5 5/8] binman: j721s2: Add firewall configurations
The following commits adds the configuration of firewalls required to
protect ATF and OP-TEE memory region from non-secure reads and
writes using master and slave firewalls present in our K3 SOCs.
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-j721s2-binman.dtsi | 208 +
1 file changed, 208 insertions(+)
diff --git a/arch/arm/dts/k3-j721s2-binman.dtsi
b/arch/arm/dts/k3-j721s2-binman.dtsi
index 5bca4e94ecf9..4d796631ddb3 100644
--- a/arch/arm/dts/k3-j721s2-binman.dtsi
+++ b/arch/arm/dts/k3-j721s2-binman.dtsi
@@ -177,6 +177,102 @@
ti-secure {
content = <>;
keyfile = "custMpk.pem";
+ auth-in-place = <0xa02>;
+
+ firewall-257-0 {
+ /* cpu_0_cpu_0_msmc
Background Firewall */
+ id = <257>;
+ region = <0>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_BG | FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD |
+
FWPERM_NON_SECURE_PRIV_RWCD |
+
FWPERM_NON_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x0>;
+ end_address = <0xff
0x>;
+ };
+
+ firewall-257-1 {
+ /* cpu_0_cpu_0_msmc
Foreground Firewall */
+ id = <257>;
+ region = <1>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ARMV8 << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x7000>;
+ end_address = <0x0
0x7001>;
+ };
+
+ firewall-284-0 {
+ /* dru_0_msmc
Background Firewall */
+ id = <284>;
+ region = <0>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_BG | FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD |
+
FWPERM_NON_SECURE_PRIV_RWCD |
+
FWPERM_NON_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x0>;
+ end_address = <0xff
0x>;
+ };
+
+ firewall-284-1 {
+ /* dru_0_msmc
Foreground Firewall */
+ id = <284>;
+ region = <1>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
[PATCH v5 4/8] binman: j721e: Add firewall configurations
The following commits adds the configuration of firewalls required to
protect ATF and OP-TEE memory region from non-secure reads and
writes using master and slave firewalls present in our K3 SOCs.
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-j721e-binman.dtsi | 187 ++
1 file changed, 187 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-binman.dtsi
b/arch/arm/dts/k3-j721e-binman.dtsi
index 4f566c21a9af..acbec9dab421 100644
--- a/arch/arm/dts/k3-j721e-binman.dtsi
+++ b/arch/arm/dts/k3-j721e-binman.dtsi
@@ -330,6 +330,102 @@
ti-secure {
content = <>;
keyfile = "custMpk.pem";
+ auth-in-place = <0xa02>;
+
+ firewall-257-0 {
+ /* cpu_0_cpu_0_msmc
Background Firewall */
+ id = <257>;
+ region = <0>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_BG | FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD |
+
FWPERM_NON_SECURE_PRIV_RWCD |
+
FWPERM_NON_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x0>;
+ end_address = <0xff
0x>;
+ };
+
+ firewall-257-1 {
+ /* cpu_0_cpu_0_msmc
Foreground Firewall */
+ id = <257>;
+ region = <1>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ARMV8 << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x7000>;
+ end_address = <0x0
0x7001>;
+ };
+
+ firewall-284-0 {
+ /* dru_0_msmc
Background Firewall */
+ id = <284>;
+ region = <0>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
FWCTRL_BG | FWCTRL_CACHE)>;
+ permissions =
<((FWPRIVID_ALL << FWPRIVID_SHIFT) |
+
FWPERM_SECURE_PRIV_RWCD |
+
FWPERM_SECURE_USER_RWCD |
+
FWPERM_NON_SECURE_PRIV_RWCD |
+
FWPERM_NON_SECURE_USER_RWCD)>;
+ start_address = <0x0
0x0>;
+ end_address = <0xff
0x>;
+ };
+
+ firewall-284-1 {
+ /* dru_0_msmc
Foreground Firewall */
+ id = <284>;
+ region = <1>;
+ control = <(FWCTRL_EN |
FWCTRL_LOCK |
+
[PATCH v5 3/8] binman: k3: Add k3-security.h and include it in k3-binman.dtsi
For readability during configuring firewalls, adding k3-security.h file
and including it in k3-binman.dtsi to be accessible across K3 SoCs
Reviewed-by: Simon Glass
Signed-off-by: Manorit Chawdhry
---
arch/arm/dts/k3-binman.dtsi | 2 ++
arch/arm/dts/k3-security.h | 58 +
2 files changed, 60 insertions(+)
diff --git a/arch/arm/dts/k3-binman.dtsi b/arch/arm/dts/k3-binman.dtsi
index 2ea2dd18a12b..71ffa998a59f 100644
--- a/arch/arm/dts/k3-binman.dtsi
+++ b/arch/arm/dts/k3-binman.dtsi
@@ -3,6 +3,8 @@
* Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
*/
+#include "k3-security.h"
+
/ {
binman: binman {
multiple-images;
diff --git a/arch/arm/dts/k3-security.h b/arch/arm/dts/k3-security.h
new file mode 100644
index ..33609caa8fb5
--- /dev/null
+++ b/arch/arm/dts/k3-security.h
@@ -0,0 +1,58 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+#ifndef DTS_ARM64_TI_K3_FIREWALL_H
+#define DTS_ARM64_TI_K3_FIREWALL_H
+
+#define FWPRIVID_ALL0xc3
+#define FWPRIVID_ARMV8 1
+#define FWPRIVID_SHIFT 16
+
+#define FWCTRL_EN 0xA
+#define FWCTRL_LOCK (1 << 4)
+#define FWCTRL_BG (1 << 8)
+#define FWCTRL_CACHE (1 << 9)
+
+#define FWPERM_SECURE_PRIV_WRITE (1 << 0)
+#define FWPERM_SECURE_PRIV_READ (1 << 1)
+#define FWPERM_SECURE_PRIV_CACHEABLE (1 << 2)
+#define FWPERM_SECURE_PRIV_DEBUG (1 << 3)
+
+#define FWPERM_SECURE_PRIV_RWCD (FWPERM_SECURE_PRIV_READ | \
+
FWPERM_SECURE_PRIV_WRITE | \
+
FWPERM_SECURE_PRIV_CACHEABLE | \
+
FWPERM_SECURE_PRIV_DEBUG)
+
+#define FWPERM_SECURE_USER_WRITE (1 << 4)
+#define FWPERM_SECURE_USER_READ (1 << 5)
+#define FWPERM_SECURE_USER_CACHEABLE (1 << 6)
+#define FWPERM_SECURE_USER_DEBUG (1 << 7)
+
+#define FWPERM_SECURE_USER_RWCD (FWPERM_SECURE_USER_READ | \
+
FWPERM_SECURE_USER_WRITE | \
+
FWPERM_SECURE_USER_CACHEABLE | \
+
FWPERM_SECURE_USER_DEBUG)
+
+#define FWPERM_NON_SECURE_PRIV_WRITE (1 << 8)
+#define FWPERM_NON_SECURE_PRIV_READ (1 << 9)
+#define FWPERM_NON_SECURE_PRIV_CACHEABLE (1 << 10)
+#define FWPERM_NON_SECURE_PRIV_DEBUG (1 << 11)
+
+#define FWPERM_NON_SECURE_PRIV_RWCD (FWPERM_NON_SECURE_PRIV_READ | \
+
FWPERM_NON_SECURE_PRIV_WRITE | \
+
FWPERM_NON_SECURE_PRIV_CACHEABLE | \
+
FWPERM_NON_SECURE_PRIV_DEBUG)
+
+#define FWPERM_NON_SECURE_USER_WRITE (1 << 12)
+#define FWPERM_NON_SECURE_USER_READ (1 << 13)
+#define FWPERM_NON_SECURE_USER_CACHEABLE (1 << 14)
+#define FWPERM_NON_SECURE_USER_DEBUG (1 << 15)
+
+#define FWPERM_NON_SECURE_USER_RWCD (FWPERM_NON_SECURE_USER_READ | \
+
FWPERM_NON_SECURE_USER_WRITE | \
+
FWPERM_NON_SECURE_USER_CACHEABLE | \
+
FWPERM_NON_SECURE_USER_DEBUG)
+
+#endif
--
2.41.0
[PATCH v5 2/8] binman: ftest: Add test for ti-secure firewall node
Add test for TI firewalling node in ti-secure.
Reviewed-by: Simon Glass
Signed-off-by: Manorit Chawdhry
---
tools/binman/ftest.py | 23 ++
tools/binman/test/319_ti_secure_firewall.dts | 28 ++
.../320_ti_secure_firewall_missing_property.dts| 28 ++
3 files changed, 79 insertions(+)
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 5ace2a825dc5..d044e32f05e0 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -7035,6 +7035,29 @@ fdt fdtmapExtract the devicetree
blob from the fdtmap
entry_args=entry_args)[0]
self.assertGreater(len(data), len(TI_UNSECURE_DATA))
+def testPackTiSecureFirewall(self):
+"""Test that an image with a TI secured binary can be created"""
+keyfile = self.TestFile('key.key')
+entry_args = {
+'keyfile': keyfile,
+}
+data_no_firewall = self._DoReadFileDtb('296_ti_secure.dts',
+ entry_args=entry_args)[0]
+data_firewall = self._DoReadFileDtb('319_ti_secure_firewall.dts',
+ entry_args=entry_args)[0]
+self.assertGreater(len(data_firewall),len(data_no_firewall))
+
+def testPackTiSecureFirewallMissingProperty(self):
+"""Test that an image with a TI secured binary can be created"""
+keyfile = self.TestFile('key.key')
+entry_args = {
+'keyfile': keyfile,
+}
+with self.assertRaises(ValueError) as e:
+data_firewall =
self._DoReadFileDtb('320_ti_secure_firewall_missing_property.dts',
+ entry_args=entry_args)[0]
+self.assertRegex(str(e.exception), "Node '/binman/ti-secure': Subnode
'firewall-0-2' is missing properties: id,region")
+
def testPackTiSecureMissingTool(self):
"""Test that an image with a TI secured binary (non-functional) can be
created
when openssl is missing"""
diff --git a/tools/binman/test/319_ti_secure_firewall.dts
b/tools/binman/test/319_ti_secure_firewall.dts
new file mode 100644
index ..7ec407fa67ba
--- /dev/null
+++ b/tools/binman/test/319_ti_secure_firewall.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-secure {
+ content = <_binary>;
+ auth-in-place = <0xa02>;
+
+ firewall-0-2 {
+ id = <0>;
+ region = <2>;
+ control = <0x31a>;
+ permissions = <0xc3>;
+ start_address = <0x0 0x9e80>;
+ end_address = <0x0 0x9fff>;
+ };
+
+ };
+ unsecure_binary: blob-ext {
+ filename = "ti_unsecure.bin";
+ };
+ };
+};
diff --git a/tools/binman/test/320_ti_secure_firewall_missing_property.dts
b/tools/binman/test/320_ti_secure_firewall_missing_property.dts
new file mode 100644
index ..24a0a9962503
--- /dev/null
+++ b/tools/binman/test/320_ti_secure_firewall_missing_property.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/dts-v1/;
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ binman {
+ ti-secure {
+ content = <_binary>;
+ auth-in-place = <0xa02>;
+
+ firewall-0-2 {
+ // id = <0>;
+ // region = <2>;
+ control = <0x31a>;
+ permissions = <0xc3>;
+ start_address = <0x0 0x9e80>;
+ end_address = <0x0 0x9fff>;
+ };
+
+ };
+ unsecure_binary: blob-ext {
+ filename = "ti_unsecure.bin";
+ };
+ };
+};
--
2.41.0
[PATCH v5 1/8] binman: ti-secure: Add support for firewalling entities
We can now firewall entities while loading them through our secure
entity TIFS, the required information should be present in the
certificate that is being parsed by TIFS.
The following commit adds the support to enable the certificates to be
generated if the firewall configurations are present in the binman dtsi
nodes.
Reviewed-by: Simon Glass
Signed-off-by: Manorit Chawdhry
---
tools/binman/btool/openssl.py | 16 ++-
tools/binman/etype/ti_secure.py | 95 +
tools/binman/etype/x509_cert.py | 4 +-
3 files changed, 112 insertions(+), 3 deletions(-)
diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
index 7ee2683ab236..fe81a1f51b1e 100644
--- a/tools/binman/btool/openssl.py
+++ b/tools/binman/btool/openssl.py
@@ -82,7 +82,7 @@ imageSize = INTEGER:{len(indata)}
return self.run_cmd(*args)
def x509_cert_sysfw(self, cert_fname, input_fname, key_fname, sw_rev,
- config_fname, req_dist_name_dict):
+ config_fname, req_dist_name_dict, firewall_cert_data):
"""Create a certificate to be booted by system firmware
Args:
@@ -94,6 +94,13 @@ imageSize = INTEGER:{len(indata)}
req_dist_name_dict (dict): Dictionary containing key-value pairs of
req_distinguished_name section extensions, must contain extensions
for
C, ST, L, O, OU, CN and emailAddress
+firewall_cert_data (dict):
+ - auth_in_place (int): The Priv ID for copying as the
+specific host in firewall protected region
+ - num_firewalls (int): The number of firewalls in the
+extended certificate
+ - certificate (str): Extended firewall certificate with
+the information for the firewall configurations.
Returns:
str: Tool output
@@ -121,6 +128,7 @@ basicConstraints = CA:true
1.3.6.1.4.1.294.1.3= ASN1:SEQUENCE:swrv
1.3.6.1.4.1.294.1.34 = ASN1:SEQUENCE:sysfw_image_integrity
1.3.6.1.4.1.294.1.35 = ASN1:SEQUENCE:sysfw_image_load
+1.3.6.1.4.1.294.1.37 = ASN1:SEQUENCE:firewall
[ swrv ]
swrv = INTEGER:{sw_rev}
@@ -132,7 +140,11 @@ imageSize = INTEGER:{len(indata)}
[ sysfw_image_load ]
destAddr = FORMAT:HEX,OCT:
-authInPlace = INTEGER:2
+authInPlace = INTEGER:{hex(firewall_cert_data['auth_in_place'])}
+
+[ firewall ]
+numFirewallRegions = INTEGER:{firewall_cert_data['num_firewalls']}
+{firewall_cert_data['certificate']}
''', file=outf)
args = ['req', '-new', '-x509', '-key', key_fname, '-nodes',
'-outform', 'DER', '-out', cert_fname, '-config', config_fname,
diff --git a/tools/binman/etype/ti_secure.py b/tools/binman/etype/ti_secure.py
index d939dce57139..ba36257d86a1 100644
--- a/tools/binman/etype/ti_secure.py
+++ b/tools/binman/etype/ti_secure.py
@@ -7,9 +7,44 @@
from binman.entry import EntryArg
from binman.etype.x509_cert import Entry_x509_cert
+from dataclasses import dataclass
from dtoc import fdt_util
+@dataclass
+class Firewall():
+id: int
+region: int
+control : int
+permissions: list[hex]
+start_address: str
+end_address: str
+
+def ensure_props(self, etype, name):
+missing_props = []
+for key, val in self.__dict__.items():
+if val is None:
+missing_props += [key]
+
+if len(missing_props):
+etype.Raise(f"Subnode '{name}' is missing properties:
{','.join(missing_props)}")
+
+def get_certificate(self) -> str:
+unique_identifier = f"{self.id}{self.region}"
+cert = f"""
+firewallID{unique_identifier} = INTEGER:{self.id}
+region{unique_identifier} = INTEGER:{self.region}
+control{unique_identifier} = INTEGER:{hex(self.control)}
+nPermissionRegs{unique_identifier} = INTEGER:{len(self.permissions)}
+"""
+for index, permission in enumerate(self.permissions):
+cert += f"""permissions{unique_identifier}{index} =
INTEGER:{hex(permission)}
+"""
+cert += f"""startAddress{unique_identifier} =
FORMAT:HEX,OCT:{self.start_address:02x}
+endAddress{unique_identifier} = FORMAT:HEX,OCT:{self.end_address:02x}
+"""
+return cert
+
class Entry_ti_secure(Entry_x509_cert):
"""Entry containing a TI x509 certificate binary
@@ -17,6 +52,11 @@ class Entry_ti_secure(Entry_x509_cert):
- content: List of phandles to entries to sign
- keyfile: Filename of file containing key to sign binary with
- sha: Hash function to be used for signing
+- auth-in-place: This is an integer field that contains two pieces
+ of information
+Lower Byte - Remains 0x02 as per our use case
+( 0x02: Move the authenticated binary back to the header )
+Upper Byte - The Host ID of the core owning the firewall
Output files:
- input. - input file passed to openssl
@@
