Re: [PATCH] arm: move _end to linker symbols
On 5/28/24 09:18, Ilias Apalodimas wrote:
> commit 6e2228fb052b ("Merge patch series "Clean up arm linker scripts")
> was cleaning up linker scripts for armv7 and v8 but was leaving
> _end and __secure_stack_start/end.
>
> commit d0b5d9da5de2 ("arm: make _end compiler-generated")
> was moving _end to be compiler generated. _end is defined as c variable
> in its own section to force the compiler emit relative a reference.
> However, defining those in the linker script will do the same thing
> since [0].
>
> So let's remove the special sections from the linker scripts, the
> variable definitions from sections.c and define them as a symbols.
> It's worth noting that _image_binary_end symbol is now redundant and
> can be removed in the future.
>
> - SPL
>
> The .end section has been removed from the new binary
> [ 5] .end
> PROGBITS fffdf488 0002f488 0
> 0 1
> [0003]: WRITE, ALLOC
>
> $~ bloat-o-meter kria_old/spl/u-boot-spl krina_new/spl/u-boot-spl
> add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
> Function old new delta
> Total: Before=115980, After=115980, chg +0.00%
>
> $~ readelf -sW kria_old/u-boot kria_new/u-boot | grep -w _end
> 12047: 0813a0f0 0 OBJECT GLOBAL DEFAULT 11 _end
> 12047: 0813a118 0 NOTYPE GLOBAL DEFAULT 11 _end
>
> $~ readelf -sW kria_old/spl/u-boot-spl kria_new/spl/u-boot-spl | grep -w _end
> 1605: fffdf488 0 OBJECT GLOBAL DEFAULT5 _end
> 1603: fffdf498 0 NOTYPE GLOBAL DEFAULT4 _end
>
> $~ readelf -sW old/u-boot new/u-boot | grep -w _end
> 8847: 00103710 0 OBJECT GLOBAL DEFAULT 11 _end
> 8847: 00103738 0 NOTYPE GLOBAL DEFAULT 11 _end
>
> $~ readelf -sW old_v7/u-boot new_v7/u-boot | grep -w _end
> 10638: 000da824 0 OBJECT GLOBAL DEFAULT 10 _end
> 10637: 000da84c 0 NOTYPE GLOBAL DEFAULT 10 _end
>
> - For both QEMU instances
> $~ bloat-o-meter old/u-boot new/u-boot
> add/remove: 0/0 grow/shrink: 1/0 up/down: 20/0 (20)
> Function old new delta
> version_string50 70 +20
> Total: Before=656915, After=656935, chg +0.00%
>
> [0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only
> for shared object")
>
> Signed-off-by: Ilias Apalodimas
> ---
> arch/arm/cpu/arm1136/u-boot-spl.lds| 6 +-
> arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 6 +-
> arch/arm/cpu/armv8/u-boot-spl.lds | 7 +--
> arch/arm/cpu/u-boot-spl.lds| 6 +-
> arch/arm/cpu/u-boot.lds| 6 +-
> arch/arm/lib/sections.c| 1 -
> arch/arm/mach-aspeed/ast2600/u-boot-spl.lds| 6 +-
> arch/arm/mach-at91/arm926ejs/u-boot-spl.lds| 7 +--
> arch/arm/mach-at91/armv7/u-boot-spl.lds| 7 +--
> arch/arm/mach-omap2/u-boot-spl.lds | 7 +--
> arch/arm/mach-rockchip/u-boot-tpl-v8.lds | 7 +--
> arch/arm/mach-zynq/u-boot.lds | 6 +-
> board/davinci/da8xxevm/u-boot-spl-da850evm.lds | 7 +--
> board/samsung/common/exynos-uboot-spl.lds | 6 +-
> 14 files changed, 13 insertions(+), 72 deletions(-)
>
> diff --git a/arch/arm/cpu/arm1136/u-boot-spl.lds
> b/arch/arm/cpu/arm1136/u-boot-spl.lds
> index f83988fd7e6a..b7af29183a97 100644
> --- a/arch/arm/cpu/arm1136/u-boot-spl.lds
> +++ b/arch/arm/cpu/arm1136/u-boot-spl.lds
> @@ -33,11 +33,7 @@ SECTIONS
> .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
> . = ALIGN(4);
> __image_copy_end = .;
> -
> - .end :
> - {
> - *(.__end)
> - }
> + _end = .;
>
> .bss :
> {
> diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
> b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
> index 7e20448f8108..7c6309246f8b 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
> +++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
> @@ -49,11 +49,7 @@ SECTIONS
> __bss_end = .;
> }
>
> - .end :
> - {
> - *(.__end)
> - }
> -
> + _end = .;
> _image_binary_end = .;
>
> .dynsym _image_binary_end : { *(.dynsym) }
> diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds
> b/arch/arm/cpu/armv8/u-boot-spl.lds
> index ef8af67e11c3..215cedd69a8c 100644
> --- a/arch/arm/cpu/armv8/u-boot-spl.lds
> +++ b/arch/arm/cpu/armv8/u-boot-spl.lds
> @@ -53,12 +53,7 @@ SECTIONS
>
> . = ALIGN(8);
> __image_copy_end = .;
> -
> - .end : {
> - . = ALIGN(8);
> - *(.__end)
> - } >.sram
> -
> + _end = .;
> _image_binary_end = .;
>
> .bss : {
> diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
> index 9ed62395a9c5..eee463a1b1c6 100644
> --- a/arch/arm/cpu/u-boot-spl.lds
> +++ b/arch/arm/cpu/u-boot-s
[PATCH] arm: move _end to linker symbols
commit 6e2228fb052b ("Merge patch series "Clean up arm linker scripts")
was cleaning up linker scripts for armv7 and v8 but was leaving
_end and __secure_stack_start/end.
commit d0b5d9da5de2 ("arm: make _end compiler-generated")
was moving _end to be compiler generated. _end is defined as c variable
in its own section to force the compiler emit relative a reference.
However, defining those in the linker script will do the same thing
since [0].
So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols.
It's worth noting that _image_binary_end symbol is now redundant and
can be removed in the future.
- SPL
The .end section has been removed from the new binary
[ 5] .end
PROGBITS fffdf488 0002f488 0
0 1
[0003]: WRITE, ALLOC
$~ bloat-o-meter kria_old/spl/u-boot-spl krina_new/spl/u-boot-spl
add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
Function old new delta
Total: Before=115980, After=115980, chg +0.00%
$~ readelf -sW kria_old/u-boot kria_new/u-boot | grep -w _end
12047: 0813a0f0 0 OBJECT GLOBAL DEFAULT 11 _end
12047: 0813a118 0 NOTYPE GLOBAL DEFAULT 11 _end
$~ readelf -sW kria_old/spl/u-boot-spl kria_new/spl/u-boot-spl | grep -w _end
1605: fffdf488 0 OBJECT GLOBAL DEFAULT5 _end
1603: fffdf498 0 NOTYPE GLOBAL DEFAULT4 _end
$~ readelf -sW old/u-boot new/u-boot | grep -w _end
8847: 00103710 0 OBJECT GLOBAL DEFAULT 11 _end
8847: 00103738 0 NOTYPE GLOBAL DEFAULT 11 _end
$~ readelf -sW old_v7/u-boot new_v7/u-boot | grep -w _end
10638: 000da824 0 OBJECT GLOBAL DEFAULT 10 _end
10637: 000da84c 0 NOTYPE GLOBAL DEFAULT 10 _end
- For both QEMU instances
$~ bloat-o-meter old/u-boot new/u-boot
add/remove: 0/0 grow/shrink: 1/0 up/down: 20/0 (20)
Function old new delta
version_string50 70 +20
Total: Before=656915, After=656935, chg +0.00%
[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for
shared object")
Signed-off-by: Ilias Apalodimas
---
arch/arm/cpu/arm1136/u-boot-spl.lds| 6 +-
arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds | 6 +-
arch/arm/cpu/armv8/u-boot-spl.lds | 7 +--
arch/arm/cpu/u-boot-spl.lds| 6 +-
arch/arm/cpu/u-boot.lds| 6 +-
arch/arm/lib/sections.c| 1 -
arch/arm/mach-aspeed/ast2600/u-boot-spl.lds| 6 +-
arch/arm/mach-at91/arm926ejs/u-boot-spl.lds| 7 +--
arch/arm/mach-at91/armv7/u-boot-spl.lds| 7 +--
arch/arm/mach-omap2/u-boot-spl.lds | 7 +--
arch/arm/mach-rockchip/u-boot-tpl-v8.lds | 7 +--
arch/arm/mach-zynq/u-boot.lds | 6 +-
board/davinci/da8xxevm/u-boot-spl-da850evm.lds | 7 +--
board/samsung/common/exynos-uboot-spl.lds | 6 +-
14 files changed, 13 insertions(+), 72 deletions(-)
diff --git a/arch/arm/cpu/arm1136/u-boot-spl.lds
b/arch/arm/cpu/arm1136/u-boot-spl.lds
index f83988fd7e6a..b7af29183a97 100644
--- a/arch/arm/cpu/arm1136/u-boot-spl.lds
+++ b/arch/arm/cpu/arm1136/u-boot-spl.lds
@@ -33,11 +33,7 @@ SECTIONS
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
__image_copy_end = .;
-
- .end :
- {
- *(.__end)
- }
+ _end = .;
.bss :
{
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
index 7e20448f8108..7c6309246f8b 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
@@ -49,11 +49,7 @@ SECTIONS
__bss_end = .;
}
- .end :
- {
- *(.__end)
- }
-
+ _end = .;
_image_binary_end = .;
.dynsym _image_binary_end : { *(.dynsym) }
diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds
b/arch/arm/cpu/armv8/u-boot-spl.lds
index ef8af67e11c3..215cedd69a8c 100644
--- a/arch/arm/cpu/armv8/u-boot-spl.lds
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -53,12 +53,7 @@ SECTIONS
. = ALIGN(8);
__image_copy_end = .;
-
- .end : {
- . = ALIGN(8);
- *(.__end)
- } >.sram
-
+ _end = .;
_image_binary_end = .;
.bss : {
diff --git a/arch/arm/cpu/u-boot-spl.lds b/arch/arm/cpu/u-boot-spl.lds
index 9ed62395a9c5..eee463a1b1c6 100644
--- a/arch/arm/cpu/u-boot-spl.lds
+++ b/arch/arm/cpu/u-boot-spl.lds
@@ -53,12 +53,8 @@ SECTIONS
__rel_dyn_end = .;
}
- .end :
- {
- *(.__end)
- }
-
_image_binary_end = .;
+ _end = .;
.bss __rel_dyn_start (OVERLAY) : {
[PATCH] configs: add mvebu_espressobin_ultra-88f3720_defconfig
Add support for a Marvell Armada 3720 device variant Signed-off-by: Benjamin Schneider --- .../mvebu_espressobin_ultra-88f3720_defconfig | 106 ++ 1 file changed, 106 insertions(+) create mode 100644 configs/mvebu_espressobin_ultra-88f3720_defconfig diff --git a/configs/mvebu_espressobin_ultra-88f3720_defconfig b/configs/mvebu_espressobin_ultra-88f3720_defconfig new file mode 100644 index 00..d1be090731 --- /dev/null +++ b/configs/mvebu_espressobin_ultra-88f3720_defconfig @@ -0,0 +1,106 @@ +CONFIG_ARM=y +CONFIG_ARCH_CPU_INIT=y +CONFIG_ARCH_MVEBU=y +CONFIG_TEXT_BASE=0x +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff +CONFIG_TARGET_MVEBU_ARMADA_37XX=y +CONFIG_SF_DEFAULT_SPEED=4000 +CONFIG_ENV_SIZE=0x1 +CONFIG_ENV_OFFSET=0x3F +CONFIG_ENV_SECT_SIZE=0x1 +CONFIG_DM_GPIO=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="marvell/armada-3720-espressobin-ultra" +CONFIG_SYS_LOAD_ADDR=0x600 +CONFIG_PCI=y +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_DISTRO_DEFAULTS=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_SYS_MAXARGS=32 +CONFIG_CMD_FUSE=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_MTD=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SATA=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_WDT=y +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_BTRFS=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_SQUASHFS=y +CONFIG_CMD_FS_UUID=y +CONFIG_MAC_PARTITION=y +CONFIG_ENV_OVERWRITE=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_ARP_TIMEOUT=200 +CONFIG_NET_RETRY_COUNT=50 +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_AHCI_PCI=y +CONFIG_AHCI_MVEBU=y +CONFIG_LBA48=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_CLK=y +CONFIG_CLK_MVEBU=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_MV=y +CONFIG_MISC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_XENON=y +CONFIG_MTD=y +CONFIG_DM_MTD=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_ISSI=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_MARVELL=y +CONFIG_PHY_FIXED=y +CONFIG_PHY_GIGE=y +CONFIG_DM_DSA=y +CONFIG_MV88E6XXX=y +CONFIG_MVNETA=y +CONFIG_MVMDIO=y +CONFIG_NVME_PCI=y +CONFIG_PCI_AARDVARK=y +CONFIG_PHY=y +CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y +CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DEFAULT_ENV_IS_RW=y +CONFIG_MVEBU_A3700_UART=y +CONFIG_MVEBU_A3700_SPI=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_WATCHDOG_AUTOSTART is not set +CONFIG_WDT=y +CONFIG_WDT_ARMADA_37XX=y +CONFIG_SHA1=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF8563=y +# CONFIG_DEBUG_UART=y +# CONFIG_DEBUG_UART_BASE=0xd0012000 +# CONFIG_DEBUG_UART_CLOCK=25804800 +# CONFIG_DEBUG_UART_SHIFT=2 +# CONFIG_DEBUG_UART_ANNOUNCE=y \ No newline at end of file -- 2.45.1
[PATCH v3 7/7] board: rockchip: add ArmSoM Sige7 Rk3588 board
ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
ArmSoM.
There are two variants depending on the DRAM size : 8G and 16G.
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16GB memory LPDDR4x
Mali G610MC4 GPU
2x MIPI CSI 2 multiple lanes connector
64GB/128GB on board eMMC
uSD slot
1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
1x HDMI 2.1 output
2x 2.5 Gbps Ethernet port
40-pin IO header including UART, SPI and I2C
USB PD over USB Type-C
Size: 92mm x 62mm
Kernel commit:
81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board)
Signed-off-by: Jianfeng Liu
---
Changes in v3:
- Use update-dts-subtree.sh to pick upstream dts
Changes in v2:
- Fix alphabetical order of MAINTAINERS
- Use arch/arm/dts/rk3588-armsom-sige7* in board MAINTAINERS
- Remove spi flash related config
- Move kernel dts to dts/upstream/src/arm64/rockchip/
MAINTAINERS | 1 +
arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi | 28 ++
arch/arm/mach-rockchip/rk3588/Kconfig| 26 ++
board/armsom/sige7-rk3588/Kconfig| 12 +++
board/armsom/sige7-rk3588/MAINTAINERS| 7 ++
configs/sige7-rk3588_defconfig | 93
doc/board/rockchip/rockchip.rst | 1 +
include/configs/sige7-rk3588.h | 15
8 files changed, 183 insertions(+)
create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
create mode 100644 board/armsom/sige7-rk3588/Kconfig
create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS
create mode 100644 configs/sige7-rk3588_defconfig
create mode 100644 include/configs/sige7-rk3588.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 6c861b529df..fffcf898bf1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -534,6 +534,7 @@ F: arch/arm/include/asm/arch-rockchip/
F: arch/arm/mach-rockchip/
F: board/amarula/vyasa-rk3288/
F: board/anbernic/rgxx3_rk3566/
+F: board/armsom/sige7-rk3588/
F: board/chipspark/popmetal_rk3288
F: board/engicam/px30_core/
F: board/firefly/
diff --git a/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
new file mode 100644
index 000..2c984d01471
--- /dev/null
+++ b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2024 ArmSoM Technology Co., Ltd.
+ */
+
+#include "rk3588-u-boot.dtsi"
+
+&sdhci {
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy1_otg {
+ status = "okay";
+};
+
+&usbdp_phy1 {
+ status = "okay";
+};
+
+&usb_host1_xhci {
+ dr_mode = "host";
+ status = "okay";
+};
diff --git a/arch/arm/mach-rockchip/rk3588/Kconfig
b/arch/arm/mach-rockchip/rk3588/Kconfig
index 39049ab35a9..4c14b0be1eb 100644
--- a/arch/arm/mach-rockchip/rk3588/Kconfig
+++ b/arch/arm/mach-rockchip/rk3588/Kconfig
@@ -152,6 +152,31 @@ config TARGET_ROCK5B_RK3588
USB PD over USB Type-C
Size: 100mm x 72mm (Pico-ITX form factor)
+config TARGET_SIGE7_RK3588
+ bool "ArmSoM Sige7 RK3588 board"
+ select BOARD_LATE_INIT
+ help
+ ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer)
+ by ArmSoM.
+
+ There are two variants depending on the DRAM size : 8G and 16G.
+
+ Specification:
+
+ Rockchip Rk3588 SoC
+ 4x ARM Cortex-A76, 4x ARM Cortex-A55
+ 8/16GB memory LPDDR4x
+ Mali G610MC4 GPU
+ 2x MIPI CSI 2 multiple lanes connector
+ 64GB/128GB on board eMMC
+ uSD slot
+ 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
+ 1x HDMI 2.1 output
+ 2x 2.5 Gbps Ethernet port
+ 40-pin IO header including UART, SPI and I2C
+ USB PD over USB Type-C
+ Size: 92mm x 62mm
+
config TARGET_QUARTZPRO64_RK3588
bool "Pine64 QuartzPro64 RK3588 board"
select BOARD_LATE_INIT
@@ -221,6 +246,7 @@ config ROCKCHIP_COMMON_STACK_ADDR
config TEXT_BASE
default 0x00a0
+source "board/armsom/sige7-rk3588/Kconfig"
source "board/edgeble/neural-compute-module-6/Kconfig"
source "board/friendlyelec/nanopc-t6-rk3588/Kconfig"
source "board/pine64/quartzpro64-rk3588/Kconfig"
diff --git a/board/armsom/sige7-rk3588/Kconfig
b/board/armsom/sige7-rk3588/Kconfig
new file mode 100644
index 000..793985f531b
--- /dev/null
+++ b/board/armsom/sige7-rk3588/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_SIGE7_RK3588
+
+config SYS_BOARD
+ default "sige7-rk3588"
+
+config SYS_VENDOR
+ default "armsom"
+
+config SYS_CONFIG_NAME
+ default "sige7-rk3588"
+
+endif
diff --git a/board/armsom/sige7-rk3588/MAINTAINERS
b/board/armsom/sige7-rk3588/MAINTAINERS
new file mode 100644
index 000..0fba39b76c2
--- /dev/null
+++ b/board/armsom/sige7-rk3588/MAINTAINERS
@@ -0,0 +1,7 @@
+SIGE7-RK3588
+M:
[PATCH v3 6/7] arm64: dts: rockchip: Add ArmSom Sige7 board
Specification:
Rockchip Rk3588 SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
8/16/32GB Memory LPDDR4/LPDDR4x
Mali G610MP4 GPU
2× MIPI-CSI Connector
1× MIPI-DSI Connector
1x M.2 Key M (PCIe 3.0 4-lanes)
2x RTL8125 2.5G Ethernet
Onboard AP6275P for WIFI6/BT5
32GB/64GB/128GB eMMC
MicroSD card slot
1x USB2.0, 1x USB3.0 Type-A, 1x US3.0 Type-C
1x HDMI Output, 1x type-C DP Output
Functions work normally:
USB2.0 Host
USB3.0 Type-A Host
M.2 Key M (PCIe 3.0 4-lanes)
2x RTL8125 2.5G Ethernet
eMMC
MicroSD card
More information can be obtained from the following website
https://docs.armsom.org/armsom-sige7
Signed-off-by: Jianfeng Liu
Reviewed-by: Weizhao Ouyang
Link:
https://lore.kernel.org/r/20240420034300.176920-4-liujianfeng1...@gmail.com
Signed-off-by: Heiko Stuebner
[ upstream commit: 81c828a67c78bb03ea75819c417c93c7f3d637b5 ]
(cherry picked from commit d427a11542bcf5364a5260280e077f0a2e030dcb)
---
(no changes since v1)
.../arm64/rockchip/rk3588-armsom-sige7.dts| 721 ++
1 file changed, 721 insertions(+)
create mode 100644 dts/upstream/src/arm64/rockchip/rk3588-armsom-sige7.dts
diff --git a/dts/upstream/src/arm64/rockchip/rk3588-armsom-sige7.dts
b/dts/upstream/src/arm64/rockchip/rk3588-armsom-sige7.dts
new file mode 100644
index 000..98c622b2764
--- /dev/null
+++ b/dts/upstream/src/arm64/rockchip/rk3588-armsom-sige7.dts
@@ -0,0 +1,721 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include
+#include
+#include "rk3588.dtsi"
+
+/ {
+ model = "ArmSoM Sige7";
+ compatible = "armsom,sige7", "rockchip,rk3588";
+
+ aliases {
+ mmc0 = &sdhci;
+ mmc1 = &sdmmc;
+ };
+
+ chosen {
+ stdout-path = "serial2:150n8";
+ };
+
+ analog-sound {
+ compatible = "audio-graph-card";
+ dais = <&i2s0_8ch_p0>;
+ label = "rk3588-es8316";
+ hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&hp_detect>;
+ routing = "MIC2", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR";
+ widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_rgb_g>;
+
+ led_green: led-0 {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ led_red: led-1 {
+ color = ;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+ };
+
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 95 145 195 255>;
+ fan-supply = <&vcc5v0_sys>;
+ pwms = <&pwm1 0 5 0>;
+ #cooling-cells = <2>;
+ };
+
+ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie2x1l2";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc_3v3_s3>;
+ };
+
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <500>;
+ regulator-max-microvolt = <500>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ re
[PATCH v3 5/7] arm64: dts: rockchip: add USB3 DRD controllers on rk3588
From: Sebastian Reichel
Add both USB3 dual-role controllers to the RK3588 devicetree.
Signed-off-by: Sebastian Reichel
Link:
https://lore.kernel.org/r/20240408225109.128953-8-sebastian.reic...@collabora.com
Signed-off-by: Heiko Stuebner
[ upstream commit: 33f393a2a990e16f56931ca708295f31d2b44415 ]
(cherry picked from commit c7ed588e14f7dd04a92fb55f12680f94c7b14edf)
Signed-off-by: Jianfeng Liu
---
(no changes since v1)
dts/upstream/src/arm64/rockchip/rk3588.dtsi | 20 ++
dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 22
2 files changed, 42 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3588.dtsi
b/dts/upstream/src/arm64/rockchip/rk3588.dtsi
index 4fdd047c9eb..5984016b5f9 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588.dtsi
@@ -7,6 +7,26 @@
#include "rk3588-pinctrl.dtsi"
/ {
+ usb_host1_xhci: usb@fc40 {
+ compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
+ reg = <0x0 0xfc40 0x0 0x40>;
+ interrupts = ;
+ clocks = <&cru REF_CLK_USB3OTG1>, <&cru SUSPEND_CLK_USB3OTG1>,
+<&cru ACLK_USB3OTG1>;
+ clock-names = "ref_clk", "suspend_clk", "bus_clk";
+ dr_mode = "otg";
+ phys = <&u2phy1_otg>, <&usbdp_phy1 PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phy_type = "utmi_wide";
+ power-domains = <&power RK3588_PD_USB>;
+ resets = <&cru SRST_A_USB3OTG1>;
+ snps,dis_enblslpm_quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ status = "disabled";
+ };
+
pcie30_phy_grf: syscon@fd5b8000 {
compatible = "rockchip,rk3588-pcie3-phy-grf", "syscon";
reg = <0x0 0xfd5b8000 0x0 0x1>;
diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
index 8314a4ace31..94157cdfd5c 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
@@ -492,6 +492,28 @@
};
};
+ usb_host0_xhci: usb@fc00 {
+ compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
+ reg = <0x0 0xfc00 0x0 0x40>;
+ interrupts = ;
+ clocks = <&cru REF_CLK_USB3OTG0>, <&cru SUSPEND_CLK_USB3OTG0>,
+<&cru ACLK_USB3OTG0>;
+ clock-names = "ref_clk", "suspend_clk", "bus_clk";
+ dr_mode = "otg";
+ phys = <&u2phy0_otg>, <&usbdp_phy0 PHY_TYPE_USB3>;
+ phy-names = "usb2-phy", "usb3-phy";
+ phy_type = "utmi_wide";
+ power-domains = <&power RK3588_PD_USB>;
+ resets = <&cru SRST_A_USB3OTG0>;
+ snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ status = "disabled";
+ };
+
usb_host0_ehci: usb@fc80 {
compatible = "rockchip,rk3588-ehci", "generic-ehci";
reg = <0x0 0xfc80 0x0 0x4>;
--
2.34.1
[PATCH v3 4/7] arm64: dts: rockchip: add USBDP phys on rk3588
From: Sebastian Reichel
Add both USB3-DisplayPort PHYs to RK3588 SoC DT.
Signed-off-by: Sebastian Reichel
Link:
https://lore.kernel.org/r/20240408225109.128953-7-sebastian.reic...@collabora.com
Signed-off-by: Heiko Stuebner
[ upstream commit: e18e5e8188f2671abf63abe7db5f21555705130f ]
(cherry picked from commit 5110caca9865718616cf7093ed4a9a1bc54780db)
Signed-off-by: Jianfeng Liu
---
(no changes since v1)
dts/upstream/src/arm64/rockchip/rk3588.dtsi | 52
dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 63
2 files changed, 115 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3588.dtsi
b/dts/upstream/src/arm64/rockchip/rk3588.dtsi
index 5519c1430cb..4fdd047c9eb 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588.dtsi
@@ -17,6 +17,36 @@
reg = <0x0 0xfd5c 0x0 0x100>;
};
+ usbdpphy1_grf: syscon@fd5cc000 {
+ compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
+ reg = <0x0 0xfd5cc000 0x0 0x4000>;
+ };
+
+ usb2phy1_grf: syscon@fd5d4000 {
+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon",
"simple-mfd";
+ reg = <0x0 0xfd5d4000 0x0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u2phy1: usb2phy@4000 {
+ compatible = "rockchip,rk3588-usb2phy";
+ reg = <0x4000 0x10>;
+ #clock-cells = <0>;
+ clocks = <&cru CLK_USB2PHY_HDPTXRXPHY_REF>;
+ clock-names = "phyclk";
+ clock-output-names = "usb480m_phy1";
+ interrupts = ;
+ resets = <&cru SRST_OTGPHY_U3_1>, <&cru
SRST_P_USB2PHY_U3_1_GRF0>;
+ reset-names = "phy", "apb";
+ status = "disabled";
+
+ u2phy1_otg: otg-port {
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+ };
+ };
+
i2s8_8ch: i2s@fddc8000 {
compatible = "rockchip,rk3588-i2s-tdm";
reg = <0x0 0xfddc8000 0x0 0x1000>;
@@ -310,6 +340,28 @@
};
};
+ usbdp_phy1: phy@fed9 {
+ compatible = "rockchip,rk3588-usbdp-phy";
+ reg = <0x0 0xfed9 0x0 0x1>;
+ #phy-cells = <1>;
+ clocks = <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>,
+<&cru CLK_USBDP_PHY1_IMMORTAL>,
+<&cru PCLK_USBDPPHY1>,
+<&u2phy1>;
+ clock-names = "refclk", "immortal", "pclk", "utmi";
+ resets = <&cru SRST_USBDP_COMBO_PHY1_INIT>,
+<&cru SRST_USBDP_COMBO_PHY1_CMN>,
+<&cru SRST_USBDP_COMBO_PHY1_LANE>,
+<&cru SRST_USBDP_COMBO_PHY1_PCS>,
+<&cru SRST_P_USBDPPHY1>;
+ reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";
+ rockchip,u2phy-grf = <&usb2phy1_grf>;
+ rockchip,usb-grf = <&usb_grf>;
+ rockchip,usbdpphy-grf = <&usbdpphy1_grf>;
+ rockchip,vo-grf = <&vo0_grf>;
+ status = "disabled";
+ };
+
combphy1_ps: phy@fee1 {
compatible = "rockchip,rk3588-naneng-combphy";
reg = <0x0 0xfee1 0x0 0x100>;
diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
index 87df0902273..8314a4ace31 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
@@ -572,12 +572,23 @@
reg = <0x0 0xfd5a4000 0x0 0x2000>;
};
+ vo0_grf: syscon@fd5a6000 {
+ compatible = "rockchip,rk3588-vo-grf", "syscon";
+ reg = <0x0 0xfd5a6000 0x0 0x2000>;
+ clocks = <&cru PCLK_VO0GRF>;
+ };
+
vo1_grf: syscon@fd5a8000 {
compatible = "rockchip,rk3588-vo-grf", "syscon";
reg = <0x0 0xfd5a8000 0x0 0x100>;
clocks = <&cru PCLK_VO1GRF>;
};
+ usb_grf: syscon@fd5ac000 {
+ compatible = "rockchip,rk3588-usb-grf", "syscon";
+ reg = <0x0 0xfd5ac000 0x0 0x4000>;
+ };
+
php_grf: syscon@fd5b {
compatible = "rockchip,rk3588-php-grf", "syscon";
reg = <0x0 0xfd5b 0x0 0x1000>;
@@ -593,6 +604,36 @@
reg = <0x0 0xfd5c4000 0x0 0x100>;
};
+ usbdpphy0_grf: syscon@fd5c8000 {
+ compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
+ reg = <0x0 0xfd5c8000 0x0 0x4000>;
+ };
+
+ usb2phy0_grf: syscon@fd5d {
+ compatible = "rockchip,rk3588-usb2phy-grf", "syscon"
[PATCH v3 3/7] arm64: dts: rockchip: fix usb2phy nodename for rk3588
From: Sebastian Reichel
usb2-phy should be named usb2phy according to the DT binding,
so let's fix it up accordingly.
Signed-off-by: Sebastian Reichel
Link:
https://lore.kernel.org/r/20240408225109.128953-5-sebastian.reic...@collabora.com
Signed-off-by: Heiko Stuebner
[ upstream commit: 4e07a95f7402de092cd71b2cb96c69f85c98f251 ]
(cherry picked from commit 5a3e4638492497ae81b9bd4a8627f4727e312ccc)
Signed-off-by: Jianfeng Liu
---
(no changes since v1)
dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
index ac5bd630f15..87df0902273 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
@@ -599,7 +599,7 @@
#address-cells = <1>;
#size-cells = <1>;
- u2phy2: usb2-phy@8000 {
+ u2phy2: usb2phy@8000 {
compatible = "rockchip,rk3588-usb2phy";
reg = <0x8000 0x10>;
interrupts = ;
@@ -624,7 +624,7 @@
#address-cells = <1>;
#size-cells = <1>;
- u2phy3: usb2-phy@c000 {
+ u2phy3: usb2phy@c000 {
compatible = "rockchip,rk3588-usb2phy";
reg = <0xc000 0x10>;
interrupts = ;
--
2.34.1
[PATCH v3 2/7] arm64: dts: rockchip: Fix ordering of nodes on rk3588s
From: Diederik de Haas
Fix the ordering of the main nodes by sorting them alphabetically and
then the ones with a memory address sequentially by that address.
Signed-off-by: Diederik de Haas
Link: https://lore.kernel.org/r/20240406172821.34173-1-didi.deb...@cknow.org
Signed-off-by: Heiko Stuebner
[ upstream commit: cbb97fe18e299ece1c0074924c630de6a19b320f ]
(cherry picked from commit bbf7c16f2f1208b96349f6f6648b69cfaa1a482b)
Signed-off-by: Jianfeng Liu
---
(no changes since v1)
dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 304 +--
1 file changed, 152 insertions(+), 152 deletions(-)
diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
index 89d40cff635..ac5bd630f15 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
@@ -347,6 +347,11 @@
};
};
+ display_subsystem: display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <&vop_out>;
+ };
+
firmware {
optee: optee {
compatible = "linaro,optee-tz";
@@ -394,11 +399,6 @@
#clock-cells = <0>;
};
- display_subsystem: display-subsystem {
- compatible = "rockchip,display-subsystem";
- ports = <&vop_out>;
- };
-
timer {
compatible = "arm,armv8-timer";
interrupts = ,
@@ -436,6 +436,62 @@
};
};
+ gpu: gpu@fb00 {
+ compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
+ reg = <0x0 0xfb00 0x0 0x20>;
+ #cooling-cells = <2>;
+ assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
+ assigned-clock-rates = <2>;
+ clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
+<&cru CLK_GPU_STACKS>;
+ clock-names = "core", "coregroup", "stacks";
+ dynamic-power-coefficient = <2982>;
+ interrupts = ,
+,
+;
+ interrupt-names = "job", "mmu", "gpu";
+ operating-points-v2 = <&gpu_opp_table>;
+ power-domains = <&power RK3588_PD_GPU>;
+ status = "disabled";
+
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-3 {
+ opp-hz = /bits/ 64 <3>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-4 {
+ opp-hz = /bits/ 64 <4>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-5 {
+ opp-hz = /bits/ 64 <5>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-6 {
+ opp-hz = /bits/ 64 <6>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-7 {
+ opp-hz = /bits/ 64 <7>;
+ opp-microvolt = <70 70 85>;
+ };
+ opp-8 {
+ opp-hz = /bits/ 64 <8>;
+ opp-microvolt = <75 75 85>;
+ };
+ opp-9 {
+ opp-hz = /bits/ 64 <9>;
+ opp-microvolt = <80 80 85>;
+ };
+ opp-10 {
+ opp-hz = /bits/ 64 <10>;
+ opp-microvolt = <85 85 85>;
+ };
+ };
+ };
+
usb_host0_ehci: usb@fc80 {
compatible = "rockchip,rk3588-ehci", "generic-ehci";
reg = <0x0 0xfc80 0x0 0x4>;
@@ -501,62 +557,6 @@
status = "disabled";
};
- gpu: gpu@fb00 {
- compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
- reg = <0x0 0xfb00 0x0 0x20>;
- #cooling-cells = <2>;
- assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
- assigned-clock-rates = <2>;
- clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
-<&cru CLK_GPU_STACKS>;
- clock-names = "core", "coregroup", "stacks";
- dynamic-power-coefficient = <2982>;
- interrupts = ,
-,
-
[PATCH v3 1/7] arm64: dts: rockchip: Add rk3588 GPU node
From: Boris Brezillon
Add Mali GPU Node to the RK3588 SoC DT including GPU clock
operating points
Signed-off-by: Boris Brezillon
Signed-off-by: Sebastian Reichel
Link:
https://lore.kernel.org/r/20240326165232.73585-3-sebastian.reic...@collabora.com
Signed-off-by: Heiko Stuebner
[ upstream commit: 6fca4edb93d335f29f81e484936f38a5eed6a9b1 ]
(cherry picked from commit 3cd15354ea0c8668812bc0b3a4136606c10803e9)
Signed-off-by: Jianfeng Liu
---
(no changes since v1)
dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 56
1 file changed, 56 insertions(+)
diff --git a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
index 87b83c87bd5..89d40cff635 100644
--- a/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
+++ b/dts/upstream/src/arm64/rockchip/rk3588s.dtsi
@@ -501,6 +501,62 @@
status = "disabled";
};
+ gpu: gpu@fb00 {
+ compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
+ reg = <0x0 0xfb00 0x0 0x20>;
+ #cooling-cells = <2>;
+ assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
+ assigned-clock-rates = <2>;
+ clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>,
+<&cru CLK_GPU_STACKS>;
+ clock-names = "core", "coregroup", "stacks";
+ dynamic-power-coefficient = <2982>;
+ interrupts = ,
+,
+;
+ interrupt-names = "job", "mmu", "gpu";
+ operating-points-v2 = <&gpu_opp_table>;
+ power-domains = <&power RK3588_PD_GPU>;
+ status = "disabled";
+
+ gpu_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-3 {
+ opp-hz = /bits/ 64 <3>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-4 {
+ opp-hz = /bits/ 64 <4>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-5 {
+ opp-hz = /bits/ 64 <5>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-6 {
+ opp-hz = /bits/ 64 <6>;
+ opp-microvolt = <675000 675000 85>;
+ };
+ opp-7 {
+ opp-hz = /bits/ 64 <7>;
+ opp-microvolt = <70 70 85>;
+ };
+ opp-8 {
+ opp-hz = /bits/ 64 <8>;
+ opp-microvolt = <75 75 85>;
+ };
+ opp-9 {
+ opp-hz = /bits/ 64 <9>;
+ opp-microvolt = <80 80 85>;
+ };
+ opp-10 {
+ opp-hz = /bits/ 64 <10>;
+ opp-microvolt = <85 85 85>;
+ };
+ };
+ };
+
pmu1grf: syscon@fd58a000 {
compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
reg = <0x0 0xfd58a000 0x0 0x1>;
--
2.34.1
[PATCH v3 0/7] add ArmSoM Sige7 Rk3588 board
Devicetree of ArmSoM Sige7 is merged to kernel v6.10-rc1 with USBDP and GPU nodes. So I use update-dts-subtree.sh to pick related commits of rk3588s.dtsi, and then pick the commit of ArmSoM Sige7's devicetree. I also did run command: ./dts/update-dts-subtree.sh pull v6.10-rc1-dts based on my work but there is a merge conflict of file: dts/upstream/Bindings/Makefile I think this should not be related to my work. Changes in v3: - Use update-dts-subtree.sh to pick upstream dts Changes in v2: - Fix alphabetical order of MAINTAINERS - Use arch/arm/dts/rk3588-armsom-sige7* in board MAINTAINERS - Remove spi flash related config - Move kernel dts to dts/upstream/src/arm64/rockchip/ Boris Brezillon (1): arm64: dts: rockchip: Add rk3588 GPU node Diederik de Haas (1): arm64: dts: rockchip: Fix ordering of nodes on rk3588s Jianfeng Liu (2): arm64: dts: rockchip: Add ArmSom Sige7 board board: rockchip: add ArmSoM Sige7 Rk3588 board Sebastian Reichel (3): arm64: dts: rockchip: fix usb2phy nodename for rk3588 arm64: dts: rockchip: add USBDP phys on rk3588 arm64: dts: rockchip: add USB3 DRD controllers on rk3588 MAINTAINERS | 1 + arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi | 28 + arch/arm/mach-rockchip/rk3588/Kconfig | 26 + board/armsom/sige7-rk3588/Kconfig | 12 + board/armsom/sige7-rk3588/MAINTAINERS | 7 + configs/sige7-rk3588_defconfig| 93 +++ doc/board/rockchip/rockchip.rst | 1 + .../arm64/rockchip/rk3588-armsom-sige7.dts| 721 ++ dts/upstream/src/arm64/rockchip/rk3588.dtsi | 72 ++ dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 337 +--- include/configs/sige7-rk3588.h| 15 + 11 files changed, 1215 insertions(+), 98 deletions(-) create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi create mode 100644 board/armsom/sige7-rk3588/Kconfig create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS create mode 100644 configs/sige7-rk3588_defconfig create mode 100644 dts/upstream/src/arm64/rockchip/rk3588-armsom-sige7.dts create mode 100644 include/configs/sige7-rk3588.h -- 2.34.1
Re: [PATCH v2 01/14] net: introduce alternative implementation as net-lwip/
On Fri, May 24, 2024 at 06:19:55PM +0200, Jerome Forissier wrote: > Prepare the introduction of the lwIP (lightweight IP) TCP/IP stack by > adding a new net-lwip/ directory and the NET_LWIP symbol. At this > point, enabling NET_LWIP simply disables NET. Subsequent commits will > introduce the lwIP code, re-work the NETDEVICE integration and port > some of the NET commands and features to lwIP. > > SPL_NET cannot be enabled when NET_LWIP=y. SPL_NET pulls some symbols > that are part of NET (such as arp_init(), arp_timeout_check(), > arp_receive(), net_arp_wait_packet_ip()). lwIP support in SPL may be > added later. > > Similarly, DFU_TFTP is not compatible with NET_LWIP because it depends > on net_loop(), tftp_timeout_ms, tftp_timeout_count_max. Let's add a > dependency on !NET_LWIP for now. > > Signed-off-by: Jerome Forissier [snip] > diff --git a/Kconfig b/Kconfig > index 82df59f176e..758256ab121 100644 > --- a/Kconfig > +++ b/Kconfig > @@ -747,6 +747,8 @@ source "env/Kconfig" > > source "net/Kconfig" > > +source "net-lwip/Kconfig" > + > source "drivers/Kconfig" > > source "fs/Kconfig" I think we need to instead rework this to a choice statement instead so that in the end we have something like: choice "Networking stack" config NO_NET bool "No networking support" config NET bool "Legacy U-Boot networking stack" config NET_LWIP bool "Use lwIP for networking stack" if NET_LEGACY source "net/Kconfig" endif if NET_LWIP source "net-lwip/Kconfig" endif And then SPL_NET still depends on !NET_LWIP for now and we sort out the problems with different networking stacks in SPL vs full U-Boot later on. -- Tom signature.asc Description: PGP signature
Re: [PATCH] configs: add mvebu_espressobin_ultra-88f3720_defconfig
On Mon, May 27, 2024 at 12:07:35PM -0700, Benjamin Schneider wrote: > Add support for a Marvell Armada 3720 device variant > > Signed-off-by: Benjamin Schneider > --- > > .../mvebu_espressobin_ultra-88f3720_defconfig | 106 ++ > 1 file changed, 106 insertions(+) > create mode 100644 configs/mvebu_espressobin_ultra-88f3720_defconfig You need to update the relevant MAINTAINERS file too: board/Marvell/mvebu_armada-37xx/MAINTAINERS -- Tom signature.asc Description: PGP signature
Re: Pull request for tpm-master-27052024
On Mon, May 27, 2024 at 09:15:04AM +0300, Ilias Apalodimas wrote: > Hi Tom > > I know it's not early in the release and although this contains a new feature > apart from fixes, I prefer this going into -master. The added feature > is on a TPM cmd and is harmless. If you only want the fixes please let me > know and I'll send the rest in -next > > The following changes since commit a7f0154c412859323396111dd0c09dbafbc153cb: > > Prepare v2024.07-rc3 (2024-05-20 10:05:16 -0600) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-tpm/ > tags/tpm-master-27052024 > > for you to fetch changes up to 89aa8463cdf3919ca4f04fc24ec8b154ff56d97e: > > tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend > (2024-05-27 09:00:27 +0300) > > The CI https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/20873 > had no issues > > Please consider pulling > > Thanks > /Ilias > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 0/7] add ArmSoM Sige7 Rk3588 board
On Tue, May 28, 2024 at 01:02:07AM +0800, Jianfeng Liu wrote: > Devicetree of ArmSoM Sige7 is merged to kernel v6.10-rc1 with USBDP and > GPU nodes. So I use update-dts-subtree.sh to pick related commits of > rk3588s.dtsi, and then pick the commit of ArmSoM Sige7's devicetree. > I also did run command: > ./dts/update-dts-subtree.sh pull v6.10-rc1-dts > based on my work but there is a merge conflict of file: > dts/upstream/Bindings/Makefile > I think this should not be related to my work. Yes, I took a quick look at the conflict is unrelated to your series here and also with a quick local apply then resync to v6.10-rc1 everything else works as expected from my point of view. -- Tom signature.asc Description: PGP signature
[PATCH] global_data.h: drop write-only field dm_root_f
The dm_root_f field seems to be entirely write-only and hence
redundant, unless 'git grep' fails to find some access generated via
preprocessor token concatenation or similar.
Signed-off-by: Rasmus Villemoes
---
common/board_r.c | 3 +--
include/asm-generic/global_data.h | 4
test/dm/core.c| 1 -
3 files changed, 1 insertion(+), 7 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index da0b80f24ff..fd263f4a0a8 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -230,8 +230,7 @@ static int initr_dm(void)
oftree_reset();
- /* Save the pre-reloc driver model and start a new one */
- gd->dm_root_f = gd->dm_root;
+ /* Drop the pre-reloc driver model and start a new one */
gd->dm_root = NULL;
#ifdef CONFIG_TIMER
gd->timer = NULL;
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index fcc3c6e14ca..aa336d63e3a 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -195,10 +195,6 @@ struct global_data {
* @dm_root: root instance for Driver Model
*/
struct udevice *dm_root;
- /**
-* @dm_root_f: pre-relocation root instance
-*/
- struct udevice *dm_root_f;
/**
* @uclass_root_s:
* head of core tree when uclasses are not in read-only memory.
diff --git a/test/dm/core.c b/test/dm/core.c
index 7f3f8d183bc..34e5c163b98 100644
--- a/test/dm/core.c
+++ b/test/dm/core.c
@@ -1007,7 +1007,6 @@ static int dm_test_uclass_before_ready(struct
unit_test_state *uts)
ut_assertok(uclass_get(UCLASS_TEST, &uc));
gd->dm_root = NULL;
- gd->dm_root_f = NULL;
memset(&gd->uclass_root, '\0', sizeof(gd->uclass_root));
ut_asserteq_ptr(NULL, uclass_find(UCLASS_TEST));
--
2.40.1.1.g1c60b9335d
Re: [RFC] usb: xhci: Some USB devices fail to initialize
On 5/27/24 7:16 PM, Elena Popa wrote: Hello, Hi, We've noticed that, at least, on the i.MX8M* platforms Which exact platforms, which SoC, which board ? , some USB devices (especially USB2.0 sticks) fail Which exact sticks ? USB IDs and model would be helpful. Which U-Boot version is this ?
Re: [PATCH v3 7/7] board: rockchip: add ArmSoM Sige7 Rk3588 board
Hi Jianfeng,
On 2024-05-27 19:02, Jianfeng Liu wrote:
> ArmSoM Sige7 is a Rockchip RK3588 based SBC (Single Board Computer) by
> ArmSoM.
>
> There are two variants depending on the DRAM size : 8G and 16G.
>
> Specification:
>
> Rockchip Rk3588 SoC
> 4x ARM Cortex-A76, 4x ARM Cortex-A55
> 8/16GB memory LPDDR4x
> Mali G610MC4 GPU
> 2x MIPI CSI 2 multiple lanes connector
> 64GB/128GB on board eMMC
> uSD slot
> 1x USB 2.0 Type-A, 1x USB 3.0 Type-A, 1x USB 3.0 Type-C
> 1x HDMI 2.1 output
> 2x 2.5 Gbps Ethernet port
> 40-pin IO header including UART, SPI and I2C
> USB PD over USB Type-C
> Size: 92mm x 62mm
>
> Kernel commit:
> 81c828a67c78 (arm64: dts: rockchip: Add ArmSom Sige7 board)
>
> Signed-off-by: Jianfeng Liu
> ---
>
> Changes in v3:
> - Use update-dts-subtree.sh to pick upstream dts
>
> Changes in v2:
> - Fix alphabetical order of MAINTAINERS
> - Use arch/arm/dts/rk3588-armsom-sige7* in board MAINTAINERS
> - Remove spi flash related config
> - Move kernel dts to dts/upstream/src/arm64/rockchip/
>
> MAINTAINERS | 1 +
> arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi | 28 ++
> arch/arm/mach-rockchip/rk3588/Kconfig| 26 ++
> board/armsom/sige7-rk3588/Kconfig| 12 +++
> board/armsom/sige7-rk3588/MAINTAINERS| 7 ++
> configs/sige7-rk3588_defconfig | 93
> doc/board/rockchip/rockchip.rst | 1 +
> include/configs/sige7-rk3588.h | 15
> 8 files changed, 183 insertions(+)
> create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> create mode 100644 board/armsom/sige7-rk3588/Kconfig
> create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS
> create mode 100644 configs/sige7-rk3588_defconfig
> create mode 100644 include/configs/sige7-rk3588.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6c861b529df..fffcf898bf1 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -534,6 +534,7 @@ F:arch/arm/include/asm/arch-rockchip/
> F: arch/arm/mach-rockchip/
> F: board/amarula/vyasa-rk3288/
> F: board/anbernic/rgxx3_rk3566/
> +F: board/armsom/sige7-rk3588/
> F: board/chipspark/popmetal_rk3288
> F: board/engicam/px30_core/
> F: board/firefly/
> diff --git a/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> new file mode 100644
> index 000..2c984d01471
> --- /dev/null
> +++ b/arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> @@ -0,0 +1,28 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2024 ArmSoM Technology Co., Ltd.
> + */
> +
> +#include "rk3588-u-boot.dtsi"
> +
> +&sdhci {
> + cap-mmc-highspeed;
> + mmc-hs200-1_8v;
> +};
The sdhci node should not be needed, mmc-hs200-1_8v is already defined
in the upstream DT and cap-mmc-highspeed modes only work if HS200 can
first be initialized.
> +
> +&u2phy1 {
> + status = "okay";
> +};
> +
> +&u2phy1_otg {
> + status = "okay";
> +};
> +
> +&usbdp_phy1 {
> + status = "okay";
> +};
> +
> +&usb_host1_xhci {
> + dr_mode = "host";
> + status = "okay";
> +};
These usb related nodes is already defined in main DT, please remove.
Regards,
Jonas
[snip]
Re: [PATCH] riscv: dts: jh7110: Update qspi node with upstream
Hi,
On Mon, May 27, 2024 at 3:47 AM wrote:
>
> From: Matthias Brugger
>
> Upstream node uses a specific SoC compatible to make the kernel driver
> work. Copy over the upstream node to fullfill that need.
>
> Signed-off-by: Matthias Brugger
> ---
>
> .../jh7110-starfive-visionfive-2-u-boot.dtsi | 2 +-
> .../dts/jh7110-starfive-visionfive-2.dtsi | 29 ---
> arch/riscv/dts/jh7110.dtsi| 19 +++-
> 3 files changed, 37 insertions(+), 13 deletions(-)
>
> diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
> b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
> index 3012466b305..a69d8fcb391 100644
> --- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
> +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
> @@ -40,7 +40,7 @@
> &qspi {
> bootph-pre-ram;
>
> - nor-flash@0 {
> + nor_flash@0 {
> bootph-pre-ram;
> };
> };
> diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
> b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
> index e11babc1cde..375449b73a8 100644
> --- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
> @@ -305,17 +305,38 @@
> };
>
> &qspi {
> - spi-max-frequency = <25000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> status = "okay";
>
> - nor-flash@0 {
> + nor_flash: nor_flash@0 {
> compatible = "jedec,spi-nor";
> - reg=<0>;
> - spi-max-frequency = <1>;
> + reg = <0>;
> + cdns,read-delay = <5>;
> + spi-max-frequency = <1200>;
> cdns,tshsl-ns = <1>;
> cdns,tsd2d-ns = <1>;
> cdns,tchsh-ns = <1>;
> cdns,tslch-ns = <1>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + spl@0 {
> + reg = <0x0 0x8>;
> + };
> + uboot-env@f {
> + reg = <0xf 0x1>;
> + };
> + uboot@10 {
> + reg = <0x10 0x40>;
> + };
> + reserved-data@60 {
> + reg = <0x60 0xa0>;
> + };
> + };
> };
> };
>
> diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
> index 2cdc683d49b..2b331e58497 100644
> --- a/arch/riscv/dts/jh7110.dtsi
> +++ b/arch/riscv/dts/jh7110.dtsi
> @@ -480,19 +480,22 @@
> };
>
> qspi: spi@1301 {
> - compatible = "cdns,qspi-nor";
> - reg = <0x0 0x1301 0x0 0x1
> - 0x0 0x2100 0x0 0x40>;
> - clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>;
> - clock-names = "clk_ref";
> + compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";
> + reg = <0x0 0x1301 0x0 0x1>,
> + <0x0 0x2100 0x0 0x40>;
> + interrupts = <25>;
> + clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,
> +<&syscrg JH7110_SYSCLK_QSPI_AHB>,
> +<&syscrg JH7110_SYSCLK_QSPI_APB>;
> + clock-names = "ref", "ahb", "apb";
> resets = <&syscrg JH7110_SYSRST_QSPI_APB>,
> <&syscrg JH7110_SYSRST_QSPI_AHB>,
> <&syscrg JH7110_SYSRST_QSPI_REF>;
> - reset-names = "rst_apb", "rst_ahb", "rst_ref";
> + reset-names = "qspi", "qspi-ocp", "rstc_ref";
> cdns,fifo-depth = <256>;
> cdns,fifo-width = <4>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> + cdns,trigger-address = <0x0>;
> + status = "disabled";
> };
>
> syscrg: clock-controller@1302 {
> --
> 2.44.0
>
Please consider OF_UPSTREAM. Linux Kernel has now merged the Milk-V
Mars dts patch series which introduces a jh7110-common.dtsi and also
the PLDA PCIe HOST patch set is queued for-next, so it is a good time
to do so.
-E
Re: [PATCH v3 0/7] add ArmSoM Sige7 Rk3588 board
Hi Jianfeng,
On 2024-05-27 19:02, Jianfeng Liu wrote:
> Devicetree of ArmSoM Sige7 is merged to kernel v6.10-rc1 with USBDP and
> GPU nodes. So I use update-dts-subtree.sh to pick related commits of
> rk3588s.dtsi, and then pick the commit of ArmSoM Sige7's devicetree.
> I also did run command:
> ./dts/update-dts-subtree.sh pull v6.10-rc1-dts
> based on my work but there is a merge conflict of file:
> dts/upstream/Bindings/Makefile
> I think this should not be related to my work.
I have only received the cover letter and patch 7/7 but have two quick
notes:
This seem to be missing 2 patches from v6.10-rc1-dts for rk3588s.dtsi:
- f6835a60a8a2 ("arm64: dts: rockchip: reorder usb2phy properties for rk3588")
- ea9a34aa0d78 ("arm64: dts: rockchip: add rk3588 pcie and php IOMMUs")
Probably better to fully sync the rk3588/rk3588s.dtsi-files to the
v6.10-rc1-dts state.
Also please add a commit that removes the usbdpphy-grf, usb2phy-grf,
usbdp-phy, vo-grf and usb-grf related nodes from rk3588-u-boot.dtsi and
rk3588s-u-boot.dtsi. The usb nodes in rk3588 -u-boot.dtsi-files should
be obsolete after this series.
Regards,
Jonas
>
> Changes in v3:
> - Use update-dts-subtree.sh to pick upstream dts
>
> Changes in v2:
> - Fix alphabetical order of MAINTAINERS
> - Use arch/arm/dts/rk3588-armsom-sige7* in board MAINTAINERS
> - Remove spi flash related config
> - Move kernel dts to dts/upstream/src/arm64/rockchip/
>
> Boris Brezillon (1):
> arm64: dts: rockchip: Add rk3588 GPU node
>
> Diederik de Haas (1):
> arm64: dts: rockchip: Fix ordering of nodes on rk3588s
>
> Jianfeng Liu (2):
> arm64: dts: rockchip: Add ArmSom Sige7 board
> board: rockchip: add ArmSoM Sige7 Rk3588 board
>
> Sebastian Reichel (3):
> arm64: dts: rockchip: fix usb2phy nodename for rk3588
> arm64: dts: rockchip: add USBDP phys on rk3588
> arm64: dts: rockchip: add USB3 DRD controllers on rk3588
>
> MAINTAINERS | 1 +
> arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi | 28 +
> arch/arm/mach-rockchip/rk3588/Kconfig | 26 +
> board/armsom/sige7-rk3588/Kconfig | 12 +
> board/armsom/sige7-rk3588/MAINTAINERS | 7 +
> configs/sige7-rk3588_defconfig| 93 +++
> doc/board/rockchip/rockchip.rst | 1 +
> .../arm64/rockchip/rk3588-armsom-sige7.dts| 721 ++
> dts/upstream/src/arm64/rockchip/rk3588.dtsi | 72 ++
> dts/upstream/src/arm64/rockchip/rk3588s.dtsi | 337 +---
> include/configs/sige7-rk3588.h| 15 +
> 11 files changed, 1215 insertions(+), 98 deletions(-)
> create mode 100644 arch/arm/dts/rk3588-armsom-sige7-u-boot.dtsi
> create mode 100644 board/armsom/sige7-rk3588/Kconfig
> create mode 100644 board/armsom/sige7-rk3588/MAINTAINERS
> create mode 100644 configs/sige7-rk3588_defconfig
> create mode 100644 dts/upstream/src/arm64/rockchip/rk3588-armsom-sige7.dts
> create mode 100644 include/configs/sige7-rk3588.h
>
[PATCH v2 8/8] qcom_defconfig: enable capsule update support
Enable all the necessary options for capsule updates to work, as well as a few additional EFI features. Signed-off-by: Caleb Connolly --- configs/qcom_defconfig | 13 +++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index f2dfced4bc1e..3a0ada9fd418 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -19,33 +19,38 @@ CONFIG_LOG_MAX_LEVEL=9 CONFIG_LOG_DEFAULT_LEVEL=4 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_CMD_BOOTMENU=y +CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_EEPROM=y CONFIG_SYS_I2C_EEPROM_BUS=2 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5 # CONFIG_CMD_BIND is not set CONFIG_CMD_CLK=y +CONFIG_CMD_DFU=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y CONFIG_CMD_UFS=y CONFIG_CMD_USB=y CONFIG_CMD_CAT=y CONFIG_CMD_BMP=y +CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_LOG=y CONFIG_OF_LIVE=y CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y +CONFIG_CLK_STUB=y CONFIG_CLK_QCOM_QCM2290=y CONFIG_CLK_QCOM_QCS404=y CONFIG_CLK_QCOM_SDM845=y CONFIG_CLK_QCOM_SM6115=y CONFIG_CLK_QCOM_SM8250=y CONFIG_CLK_QCOM_SM8550=y CONFIG_CLK_QCOM_SM8650=y -CONFIG_CLK_STUB=y +CONFIG_DFU_MMC=y +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x20 CONFIG_MSM_GPIO=y CONFIG_QCOM_PMIC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_QUP=y @@ -105,6 +110,10 @@ CONFIG_VIDEO=y CONFIG_VIDEO_FONT_16X32=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_NO_FB_CLEAR=y CONFIG_VIDEO_SIMPLE=y -CONFIG_HEXDUMP=y +CONFIG_SYMBOL_LOOKUP=y +CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y +CONFIG_EFI_CAPSULE_ON_DISK=y +CONFIG_EFI_IGNORE_OSINDICATIONS=y +CONFIG_EFI_CAPSULE_FIRMWARE_RAW=y CONFIG_LMB_MAX_REGIONS=64 -- 2.45.0
[PATCH v2 7/8] mach-snapdragon: bump up heap size
For capsule updates we need more heap space for the DFU buffer. Give ourselves a whole 8MiB! Signed-off-by: Caleb Connolly --- arch/arm/mach-snapdragon/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index 536960b83c3b..5023c906bed8 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -10,8 +10,11 @@ config SYS_VENDOR Allows to specify vendor for the Snapdragon SoCs based boards. Based on this option board// will be used as the custom board directory. +config SYS_MALLOC_LEN + default 0x80 + config SYS_MALLOC_F_LEN default 0x2000 config SPL_SYS_MALLOC_F -- 2.45.0
[PATCH v2 6/8] mach-snapdragon: use SYSRESET_PSCI
Capsule updates depend on SYSRESET, which we currently don't select but
instead use a custom reset_cpu() implementation which just calls
psci_reset().
Clean this up, drop our custom function and require PSCI reset.
There are some Qualcomm platforms that either can or do run without PSCI
support, but we didn't handle these properly before anyway.
Signed-off-by: Caleb Connolly
---
arch/arm/Kconfig | 2 ++
arch/arm/mach-snapdragon/board.c | 5 -
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 39ad03acd2e4..0d5161358e33 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1084,8 +1084,10 @@ config ARCH_SNAPDRAGON
select OF_CONTROL
select OF_SEPARATE
select SMEM
select SPMI
+ select SYSRESET
+ select SYSRESET_PSCI
select BOARD_LATE_INIT
select OF_BOARD
select SAVE_PREV_BL_FDT_ADDR
select LINUX_KERNEL_IMAGE_HEADER if !ENABLE_ARM_SOC_BOOT0_HOOK
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index c4a3394706e6..b0d9a65bb8f5 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -106,13 +106,8 @@ void *board_fdt_blob_setup(int *err)
return (void *)fdt;
}
-void reset_cpu(void)
-{
- psci_system_reset();
-}
-
/*
* Some Qualcomm boards require GPIO configuration when switching USB modes.
* Support setting this configuration via pinctrl state.
*/
--
2.45.0
[PATCH v2 5/8] qcom_defconfig: savedefconfig
run savedefconfig Signed-off-by: Caleb Connolly --- configs/qcom_defconfig | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 65f13ae7a089..f2dfced4bc1e 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -1,17 +1,18 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_POSITION_INDEPENDENT=y +CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 CONFIG_ARCH_SNAPDRAGON=y CONFIG_DEFAULT_DEVICE_TREE="qcom/sdm845-db845c" CONFIG_SYS_LOAD_ADDR=0xA000 -CONFIG_SYS_INIT_SP_BSS_OFFSET=1572864 CONFIG_BUTTON_CMD=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTSTD_FULL=y # CONFIG_BOOTMETH_VBE is not set CONFIG_BOOTDELAY=1 +CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y CONFIG_SYS_CBSIZE=512 CONFIG_LOG_MAX_LEVEL=9 @@ -33,9 +34,8 @@ CONFIG_CMD_USB=y CONFIG_CMD_CAT=y CONFIG_CMD_BMP=y CONFIG_CMD_LOG=y CONFIG_OF_LIVE=y -CONFIG_OF_BOARD_SETUP=y CONFIG_BUTTON_QCOM_PMIC=y CONFIG_CLK=y CONFIG_CLK_QCOM_QCM2290=y CONFIG_CLK_QCOM_QCS404=y @@ -106,6 +106,5 @@ CONFIG_VIDEO_FONT_16X32=y CONFIG_SYS_WHITE_ON_BLACK=y CONFIG_NO_FB_CLEAR=y CONFIG_VIDEO_SIMPLE=y CONFIG_HEXDUMP=y -CONFIG_GENERATE_SMBIOS_TABLE=y CONFIG_LMB_MAX_REGIONS=64 -- 2.45.0
[PATCH v2 4/8] mach-snapdragon: implement capsule update support
Qualcomm boards flash U-Boot to the boot partition, implement support
for determining which slot U-Boot is running from and finding the
correct boot partition for that slot and configuring the appropriate DFU
string.
For now this only supports boards with SCSI/UFS storage where U-Boot is
flashed to the boot partition, and only U-Boot itself is updated. In the
future we may also support updating additional firmware components (tz,
hyp, xbl) as well as having U-Boot installed to other partitions (e.g.
as a first-stage bootloader).
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/Makefile | 1 +
arch/arm/mach-snapdragon/board.c | 3 +
arch/arm/mach-snapdragon/capsule_update.c | 147 ++
arch/arm/mach-snapdragon/qcom-priv.h | 6 ++
include/configs/qcom.h| 5 +
5 files changed, 162 insertions(+)
diff --git a/arch/arm/mach-snapdragon/Makefile
b/arch/arm/mach-snapdragon/Makefile
index 7a4495c8108f..343e825c6fdd 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -2,5 +2,6 @@
#
# (C) Copyright 2015 Mateusz Kulikowski
obj-y += board.o
+obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += capsule_update.o
obj-$(CONFIG_OF_LIVE) += of_fixup.o
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index b439a19ec7eb..c4a3394706e6 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -299,8 +299,11 @@ int board_late_init(void)
configure_env();
qcom_late_init();
+ /* Configure the dfu_string for capsule updates */
+ qcom_configure_capsule_updates();
+
return 0;
}
static void build_mem_map(void)
diff --git a/arch/arm/mach-snapdragon/capsule_update.c
b/arch/arm/mach-snapdragon/capsule_update.c
new file mode 100644
index ..505f5bf5ae07
--- /dev/null
+++ b/arch/arm/mach-snapdragon/capsule_update.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Common initialisation for Qualcomm Snapdragon boards.
+ *
+ * Copyright (c) 2024 Linaro Ltd.
+ * Author: Caleb Connolly
+ */
+
+#define pr_fmt(fmt) "QCOM-FMP: " fmt
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "qcom-priv.h"
+
+struct efi_fw_image fw_images[] = {
+ {
+ .image_type_id = QUALCOMM_UBOOT_BOOT_IMAGE_GUID,
+ .fw_name = u"QUALCOMM-UBOOT",
+ .image_index = 1,
+ },
+};
+
+struct efi_capsule_update_info update_info = {
+ /* Filled in by configure_dfu_string() */
+ .dfu_string = NULL,
+ .num_images = ARRAY_SIZE(fw_images),
+ .images = fw_images,
+};
+
+/* LSB first */
+struct part_slot_status {
+ u16: 2;
+ u16 active : 1;
+ u16: 3;
+ u16 successful : 1;
+ u16 unbootable : 1;
+ u16 tries_remaining : 4;
+};
+
+static int find_boot_partition(const char *partname, struct blk_desc *blk_dev,
char *name)
+{
+ int ret;
+ int partnum;
+ struct disk_partition info;
+ struct part_slot_status *slot_status;
+
+ for (partnum = 1;; partnum++) {
+ ret = part_get_info(blk_dev, partnum, &info);
+ if (ret)
+ return ret;
+
+ slot_status = (struct part_slot_status *)&info.type_flags;
+ log_io("%16s: Active: %1d, Successful: %1d, Unbootable: %1d,
Tries left: %1d\n",
+ info.name, slot_status->active,
+ slot_status->successful, slot_status->unbootable,
+ slot_status->tries_remaining);
+ if (!strncmp(info.name, partname, strlen(partname)) &&
slot_status->active) {
+ log_debug("Found active %s partition: '%s'!\n",
partname, info.name);
+ strlcpy(name, info.name, sizeof(info.name));
+ return partnum;
+ }
+ }
+
+ return -1;
+}
+
+/**
+ * qcom_configure_capsule_updates() - Configure the DFU string for capsule
updates
+ *
+ * U-Boot is flashed to the boot partition on Qualcomm boards. In most cases
there
+ * are two boot partitions, boot_a and boot_b. As we don't currently support
doing
+ * full A/B updates, we only support updating the currently active boot
partition.
+ *
+ * So we need to find the current slot suffix and the associated boot
partition.
+ * We do this by looking for the boot partition that has the 'active' flag set
+ * in the GPT partition vendor attribute bits.
+ */
+void qcom_configure_capsule_updates(void)
+{
+ struct blk_desc *desc;
+ int ret = 0, partnum = -1, devnum;
+ static char dfu_string[32] = { 0 };
+ char name[32]; /* GPT partition name */
+ char *partname = "boot";
+ struct udevice *dev = NULL;
+
+ /*
+* There is currently no good way to check how U-Boot is booting, but
we have
+* a few hueristics, like here checking
[PATCH v2 2/8] disk: expose partition type flags
GPT partition tables include two bytes worth of vendor defined
attributes, per partition. ChromeOS and Qualcomm both use these (with
different encoding!) to handle A/B slot switching with a retry counter.
Expose these via the disk_partition struct so that they can be parsed by
the relevant board code.
This will be used on Qualcomm boards to determine which slot we're
booting on so that we can flash capsule updates to the correct one.
Reviewed-by: Ilias Apalodimas
Reviewed-by: Mattijs Korpershoek
Signed-off-by: Caleb Connolly
---
disk/part_efi.c | 1 +
include/part.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b1a03bd165e0..bde4adcfa087 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -291,8 +291,9 @@ int part_get_info_efi(struct blk_desc *desc, int part,
snprintf((char *)info->name, sizeof(info->name), "%s",
print_efiname(&gpt_pte[part - 1]));
strcpy((char *)info->type, "U-Boot");
info->bootable = get_bootable(&gpt_pte[part - 1]);
+ info->type_flags = gpt_pte[part -
1].attributes.fields.type_guid_specific;
if (CONFIG_IS_ENABLED(PARTITION_UUIDS)) {
uuid_bin_to_str(gpt_pte[part - 1].unique_partition_guid.b,
(char *)disk_partition_uuid(info),
UUID_STR_FORMAT_GUID);
diff --git a/include/part.h b/include/part.h
index 32ee40488563..afae51f1b933 100644
--- a/include/part.h
+++ b/include/part.h
@@ -68,8 +68,9 @@ struct disk_partition {
* PART_BOOTABLEthe MBR bootable flag is set
* PART_EFI_SYSTEM_PARTITIONthe partition is an EFI system partition
*/
int bootable;
+ u16 type_flags; /* top 16 bits of GPT partition attributes
*/
#if CONFIG_IS_ENABLED(PARTITION_UUIDS)
charuuid[UUID_STR_LEN + 1]; /* filesystem UUID as string, if exists
*/
#endif
#ifdef CONFIG_PARTITION_TYPE_GUID
--
2.45.0
[PATCH v2 3/8] mmc: msm_sdhci: work around a bug when writing
For some unknown reason, writes of larger than 1 block always fail with a checksum error on Qualcomm v5 controllers. Until this is resolved, work around the issue by setting b_max to 1 for these controllers. Signed-off-by: Caleb Connolly --- drivers/mmc/msm_sdhci.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 4ce0de6c47d8..fc3e8d101b6e 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -195,8 +195,15 @@ static int msm_sdc_probe(struct udevice *dev) return ret; host->mmc->priv = &prv->host; upriv->mmc = host->mmc; + /* +* FIXME: v5 controllers have a bug in U-Boot that causes all writes +* greater than 1 block to fail. Work around this by setting b_max to 1. +*/ + if (var_info->mci_removed) + plat->cfg.b_max = 1; + return sdhci_probe(dev); } static int msm_sdc_remove(struct udevice *dev) -- 2.45.0
[PATCH v2 1/8] dfu: add scsi backend
This is extremely similar to the MMC backend, but there are some notable
differences.
Works with a DFU string like
scsi 4=u-boot-bin part 11
Where "4" is the SCSI dev number (sequential LUN across all SCSI devices)
and "11" is the partition number.
Signed-off-by: Caleb Connolly
---
doc/usage/dfu.rst | 31
drivers/dfu/Kconfig| 7 +
drivers/dfu/Makefile | 1 +
drivers/dfu/dfu.c | 5 +-
drivers/dfu/dfu_scsi.c | 437 +
include/dfu.h | 26 +++
6 files changed, 506 insertions(+), 1 deletion(-)
diff --git a/doc/usage/dfu.rst b/doc/usage/dfu.rst
index 8cc09c308d82..dc4f8d672f99 100644
--- a/doc/usage/dfu.rst
+++ b/doc/usage/dfu.rst
@@ -166,8 +166,38 @@ mmc
Please note that this means the user will be able to execute any
arbitrary commands just like in the u-boot's shell.
+scsi
+for UFS storage::
+
+dfu 0 scsi
+
+each element in *dfu_alt_info* being
+
+* raw raw access to SCSI LUN
+* part raw access to partition
+* fatfile in FAT partition
+* ext4 file in EXT4 partition
+* skip 0 0ignore flashed data
+* script 0 0 execute commands in shell
+
+with
+
+size
+is the size of the access area (hexadecimal without "0x")
+or 0 which means whole device
+partid
+is the GPT or DOS partition index.
+dev
+is the SCSI LU (Logical Unit) index (decimal only)
+
+A value of environment variable *dfu_alt_info* for UFS could be::
+
+u-boot part 4;bl2 raw 0x1e 0x1d
+
+See mmc section above for details on the skip and script types.
+
nand
raw slc nand device::
dfu 0 nand
@@ -277,8 +307,9 @@ alternate list separated by '&' with the same format for
each ::
mmc =;;
nand =;;
ram =;;
+scsi =;;
sf =;;
mtd =;;
virt =;;
diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig
index 0360d9da1427..158c660e6c4e 100644
--- a/drivers/dfu/Kconfig
+++ b/drivers/dfu/Kconfig
@@ -86,8 +86,15 @@ config DFU_VIRT
This option enables using DFU to read and write to VIRTUAL device
used at board level to manage specific behavior
(OTP update for example).
+config DFU_SCSI
+ bool "SCSI flash back end for DFU"
+ help
+ This option enables using DFU to read and write to SCSI devices
+ used at board level to manage specific behavior
+ (OTP update for example).
+
config SET_DFU_ALT_INFO
bool "Dynamic set of DFU alternate information"
help
This option allows to call the function set_dfu_alt_info to
diff --git a/drivers/dfu/Makefile b/drivers/dfu/Makefile
index dfbf64da6677..3b3ba0994b3a 100644
--- a/drivers/dfu/Makefile
+++ b/drivers/dfu/Makefile
@@ -10,4 +10,5 @@ obj-$(CONFIG_$(SPL_)DFU_NAND) += dfu_nand.o
obj-$(CONFIG_$(SPL_)DFU_RAM) += dfu_ram.o
obj-$(CONFIG_$(SPL_)DFU_SF) += dfu_sf.o
obj-$(CONFIG_$(SPL_)DFU_WRITE_ALT) += dfu_alt.o
obj-$(CONFIG_$(SPL_)DFU_VIRT) += dfu_virt.o
+obj-$(CONFIG_$(SPL_)DFU_SCSI) += dfu_scsi.o
diff --git a/drivers/dfu/dfu.c b/drivers/dfu/dfu.c
index 540d48fab77d..c81fa7724268 100644
--- a/drivers/dfu/dfu.c
+++ b/drivers/dfu/dfu.c
@@ -547,8 +547,11 @@ static int dfu_fill_entity(struct dfu_entity *dfu, char
*s, int alt,
return -1;
} else if (strcmp(interface, "virt") == 0) {
if (dfu_fill_entity_virt(dfu, devstr, argv, argc))
return -1;
+ } else if (strcmp(interface, "scsi") == 0) {
+ if (dfu_fill_entity_scsi(dfu, devstr, argv, argc))
+ return -1;
} else {
printf("%s: Device %s not (yet) supported!\n",
__func__, interface);
return -1;
@@ -643,9 +646,9 @@ int dfu_config_entities(char *env, char *interface, char
*devstr)
const char *dfu_get_dev_type(enum dfu_device_type t)
{
const char *const dev_t[] = {NULL, "eMMC", "OneNAND", "NAND", "RAM",
-"SF", "MTD", "VIRT"};
+"SF", "MTD", "VIRT", "SCSI"};
return dev_t[t];
}
const char *dfu_get_layout(enum dfu_layout l)
diff --git a/drivers/dfu/dfu_scsi.c b/drivers/dfu/dfu_scsi.c
new file mode 100644
index ..63c3bcffe769
--- /dev/null
+++ b/drivers/dfu/dfu_scsi.c
@@ -0,0 +1,437 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * DFU SCSI backend (based on MMC backend).
+ *
+ * Copyright (C) 2012 Samsung Electronics
+ * author: Lukasz Majewski
+ * Copyright (C) 2024 Linaro Ltd.
+ */
+
+#define LOG_DEBUG
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static unsigned char *dfu_file_buf;
+static u64 dfu_file_buf_len;
+static u64 dfu_file_buf_offset;
+
+#define scsi_get_blk_desc(dev) ((s
[PATCH v2 0/8] qcom: implement capsule updates
Hook up support for capsule updates loaded from disk on Qualcomm platforms. Most Qualcomm devices have an A/B partition layout, with most partitions duplicated. The metadata on which slot is active is stored in the GPT headers in the vendor-specific attribute bits of each partition. Add support for reading this attributes via the disk_partition struct and using them to determine which boot partition U-Boot is flashed to and generate the appropriate DFU string. This logic is gated behind a check to ensure that U-Boot is actually being chainloaded and not run via some other mechanism. SCSI support for most Qualcomm platforms is not yet enabled upstream, but will follow in future patches. This series enables capsule updates on the RB2, however [1] is required for it to work properly (as otherwise MMC won't be available). [1]: https://lore.kernel.org/u-boot/20240527-b4-clk-stub-v2-0-29013855e...@linaro.org/ To: Tom Rini To: Simon Glass To: Lukasz Majewski To: Mattijs Korpershoek To: Caleb Connolly To: Neil Armstrong To: Sumit Garg Cc: Ilias Apalodimas Cc: u-boot@lists.denx.de Cc: u-boot-q...@groups.io Changes in v2: - Add qcom capsule update support patches - Link to v1: https://lore.kernel.org/r/20240409-b4-dfu-scsi-v1-0-3e1441a60...@linaro.org --- Caleb Connolly (8): dfu: add scsi backend disk: expose partition type flags mmc: msm_sdhci: work around a bug when writing mach-snapdragon: implement capsule update support qcom_defconfig: savedefconfig mach-snapdragon: use SYSRESET_PSCI mach-snapdragon: bump up heap size qcom_defconfig: enable capsule update support arch/arm/Kconfig | 2 + arch/arm/mach-snapdragon/Kconfig | 3 + arch/arm/mach-snapdragon/Makefile | 1 + arch/arm/mach-snapdragon/board.c | 8 +- arch/arm/mach-snapdragon/capsule_update.c | 147 ++ arch/arm/mach-snapdragon/qcom-priv.h | 6 + configs/qcom_defconfig| 18 +- disk/part_efi.c | 1 + doc/usage/dfu.rst | 31 +++ drivers/dfu/Kconfig | 7 + drivers/dfu/Makefile | 1 + drivers/dfu/dfu.c | 5 +- drivers/dfu/dfu_scsi.c| 437 ++ drivers/mmc/msm_sdhci.c | 7 + include/configs/qcom.h| 5 + include/dfu.h | 26 ++ include/part.h| 1 + 17 files changed, 695 insertions(+), 11 deletions(-) --- change-id: 20240523-b4-qcom-capsule-updates-ea2e4f8f0ff0 base-commit: 0b283a047ca00275ec515302b67676ba29f2b954 // Caleb (they/them)
[RFC] usb: xhci: Some USB devices fail to initialize
Hello,
We've noticed that, at least, on the i.MX8M* platforms, some USB devices
(especially USB2.0 sticks) fail to initialize with one of the following errors:
- scanning bus usb@3820 for devices... Device not responding to set
address.
USB device not accepting new address (error=8000)
- scanning bus usb@3820 for devices... WARN halted endpoint,
queueing URB anyway.
Unexpected XHCI event TRB, skipping... (fcf1a5f0 1300
01008401)
BUG at drivers/usb/host/xhci-ring.c:530/abort_td()!
BUG!
resetting ...
It seems to be a timing problem, since if we enable the debug messages, the USB
device initializes correctly.
We found out that if we add a small delay of 5 milliseconds at the beginning of
the _xhci_submit_control_msg() function from the drivers/usb/host/xhci.c file,
all devices initialize properly. Essentially, each control message is delayed
by 5ms. We tried a smaller delay (1ms), but it is not enough.
static int _xhci_submit_control_msg(struct usb_device *udev, unsigned long pipe,
void *buffer, int length,
struct devrequest *setup, int root_portnr)
{
+ mdelay(5);
struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
int ret = 0;
...
}
We went a little further, and this delay seems to only be necessary for the
requests of type:
- USB_REQ_GET_STATUS (for the communication with the root)
- USB_REQ_GET_DESCRIPTOR ( for the communication with the device)
I don't have too much know-how about the USB, so I would appreciate your
opinion related to this issue, and how can we find the root cause. I found
several reports on the internet with the same problem on other boards. Maybe
some of the USB timing specs are not implemented correctly? U-Boot is maybe
sending control messages too aggressively?
If you give me some suggestions of where to look, I could do some debugging
myself. Of course, since printing debug messages makes the initialization work,
complicates the debugging.
Thank you,
Elena
[PATCH v2 2/2] qcom_defconfig: enable stub clock
Enable the stub clock driver for rpmcc Signed-off-by: Caleb Connolly --- configs/qcom_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/qcom_defconfig b/configs/qcom_defconfig index 80ad3b32e139..65f13ae7a089 100644 --- a/configs/qcom_defconfig +++ b/configs/qcom_defconfig @@ -43,8 +43,9 @@ CONFIG_CLK_QCOM_SDM845=y CONFIG_CLK_QCOM_SM6115=y CONFIG_CLK_QCOM_SM8250=y CONFIG_CLK_QCOM_SM8550=y CONFIG_CLK_QCOM_SM8650=y +CONFIG_CLK_STUB=y CONFIG_MSM_GPIO=y CONFIG_QCOM_PMIC_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_QUP=y -- 2.45.0
[PATCH v2 1/2] clk: add stub clock driver
Add a stub clock driver which can be used to bind clock controllers
which aren't required for the platform to boot, but which are needed for
U-Boot drivers to work.
In addition, add a NOP parent driver to allow for binding the parent
nodes of the clock.
Initially this driver supports a Qualcomm platform where the MMC driver
tries to fetch the RPM clock controller, which is not actually required
for the device to work.
Signed-off-by: Caleb Connolly
---
drivers/clk/Kconfig| 7 ++
drivers/clk/Makefile | 1 +
drivers/clk/clk-stub.c | 63 ++
3 files changed, 71 insertions(+)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 9acbc47fe8ed..965bc4959403 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -95,8 +95,15 @@ config SPL_CLK_GPIO
help
Enable this option to add GPIO-controlled clock gate driver
in U-Boot SPL.
+config CLK_STUB
+ bool "Stub clock driver"
+ depends on CLK
+ help
+ Enable this to provide a stub clock driver for non-essential clock
+ controllers.
+
config CLK_BCM6345
bool "Clock controller driver for BCM6345"
depends on CLK && ARCH_BMIPS
default y
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 847b9b291100..b2cea41419b7 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -10,8 +10,9 @@ obj-$(CONFIG_$(SPL_TPL_)CLK) += clk_fixed_factor.o
obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk.o clk-divider.o clk-mux.o clk-gate.o
obj-$(CONFIG_$(SPL_TPL_)CLK_CCF) += clk-fixed-factor.o
obj-$(CONFIG_$(SPL_TPL_)CLK_COMPOSITE_CCF) += clk-composite.o
obj-$(CONFIG_$(SPL_TPL_)CLK_GPIO) += clk-gpio.o
+obj-$(CONFIG_CLK_STUB) += clk-stub.o
obj-y += adi/
obj-y += analogbits/
obj-y += imx/
diff --git a/drivers/clk/clk-stub.c b/drivers/clk/clk-stub.c
new file mode 100644
index ..3f9c758ef115
--- /dev/null
+++ b/drivers/clk/clk-stub.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Stub clk driver for non-essential clocks.
+ *
+ * This driver should be used for clock controllers
+ * which are described as dependencies in DT but aren't
+ * actually necessary for hardware functionality.
+ */
+
+#include
+#include
+
+/* NOP parent nodes to stub clocks */
+static const struct udevice_id nop_parent_ids[] = {
+ { .compatible = "qcom,rpm-proc" },
+ { .compatible = "qcom,glink-rpm" },
+ { .compatible = "qcom,rpm-sm6115" },
+ { }
+};
+
+U_BOOT_DRIVER(nop_parent) = {
+ .name = "nop_parent",
+ .id = UCLASS_NOP,
+ .of_match = nop_parent_ids,
+ .bind = dm_scan_fdt_dev,
+ .flags = DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
+
+static ulong stub_clk_set_rate(struct clk *clk, ulong rate)
+{
+ return (clk->rate = rate);
+}
+
+static ulong stub_clk_get_rate(struct clk *clk)
+{
+ return clk->rate;
+}
+
+static int stub_clk_nop(struct clk *clk)
+{
+ return 0;
+}
+
+static struct clk_ops stub_clk_ops = {
+ .set_rate = stub_clk_set_rate,
+ .get_rate = stub_clk_get_rate,
+ .enable = stub_clk_nop,
+ .disable = stub_clk_nop,
+};
+
+static const struct udevice_id stub_clk_ids[] = {
+ { .compatible = "qcom,rpmcc" },
+ { }
+};
+
+U_BOOT_DRIVER(clk_stub) = {
+ .name = "clk_stub",
+ .id = UCLASS_CLK,
+ .ops = &stub_clk_ops,
+ .of_match = stub_clk_ids,
+ .flags = DM_FLAG_DEFAULT_PD_CTRL_OFF,
+};
+
--
2.45.0
[PATCH v2 0/2] clk: add a stub clock driver
As U-Boot works to align itself with upstream devicetrees, there are some common issues we start to run into, that of hardware blocks which might be important for an OS like Linux, but which aren't useful in U-Boot. For example, the Resource Power Manager found on Qualcomm platforms includes clock controllers and power domains which are only useful for managing power consumption and enabling low power states. As this is not at all relevant for U-Boot, we can safely ignore these devices, but we don't have a good way to communicate that to U-Boot. As an initial step, implement a "stub" clock driver which can be bound to these devices so that drivers will work as expected. Make the Qualcomm SM6115 RPMCC the first user of this, and enable the driver for Qualcomm platforms. To: Tom Rini To: Lukasz Majewski To: Sean Anderson To: Caleb Connolly To: Neil Armstrong To: Sumit Garg Cc: Heinrich Schuchardt Cc: Ilias Apalodimas Cc: u-boot@lists.denx.de Cc: u-boot-q...@groups.io Changes in v2: - Take the other discussed approach of just implementing a stub driver. - Link to v1: https://lore.kernel.org/r/20240410-b4-stub-drivers-v1-0-6935bd2c0...@linaro.org --- Caleb Connolly (2): clk: add stub clock driver qcom_defconfig: enable stub clock configs/qcom_defconfig | 1 + drivers/clk/Kconfig| 7 ++ drivers/clk/Makefile | 1 + drivers/clk/clk-stub.c | 63 ++ 4 files changed, 72 insertions(+) --- change-id: 20240527-b4-clk-stub-9698797a65ef base-commit: 7e52d6ccfb76e2afc2d183b357abe2a2e2f948cf // Caleb (they/them)
Re: [PATCH 1/1] Added arm64 assembly for examples/api crt0
On Sat, May 25, 2024 at 05:20:43PM +0100, Jiaxun Yang wrote: > > > 在2024年5月21日五月 下午7:15，Tom Rini写道： > [...] > > > > We have long not done a great job with the U-Boot standalone API stuff, > > and for a number of years at this point a lot of the use cases it was > > used for could instead be filled by making an EFI application. There's a > > well defined API there, there's lots of examples, and frankly for the > > license related questions, makes a much nicer answer. > > Hi Tom + U-Boot EFI folks, > > Sorry for chime in here. > > AFAIK there are quite a lot of users of U-Boot API in MIPS world, mostly for > Bare mental applications to perform chip diagnostic or programming stuff. To be clear, I'm not saying we need to get rid of the ability to run random bare metal apps. Just the bit where U-Boot exposes some API for a few functions. We do not test it, and I do not know how well it works. For what we provide there I would think just doing whatever one normally does for basic stdio functionality on bare metal would be fine instead. But I do need to be louder about my intentions here before just doing it, so that others which do need / use it can chime in. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 00/14] Introduce the lwIP network stack
On Fri, May 24, 2024 at 06:19:54PM +0200, Jerome Forissier wrote: > This is a rework of a patch series by Maxim Uvarov: "net/lwip: add lwip > library for the network stack" [1]. The goal is to introduce the lwIP TCP/IP > stack [2] [3] as an alternative to the current implementation in net/, > selectable with Kconfig, and ultimately keep only lwIP if possible. Some > reasons for doing so are: > - Make the support of HTTPS in the wget command easier. Javier T. (CC'd) > has some additional lwIP and Mbed TLS patches to do so. With that it > becomes possible to fetch and launch a distro installer such as Debian > etc. directly from the U-Boot shell. > - Possibly benefit from additional features implemented in lwIP > - Less code to maintain in U-Boot > > The first patch introduces a new Kconfig symbol: NET_LWIP, which selects > the lwIP implementation instead of the current one (NET). Contrary to the > approach chosen by Maxim in [1], NET_LWIP and NET cannot be enabled > simultaneously. The rationale is we want to start from a clean state and > not pull potentially duplicated functionality from both stacks. Note > however that a few files are still built in net/, they are the ones > related to ethernet device management and the ethernet bootflow. > > The second patch imports the lwIP code as a Git subtree under > lib/lwip/lwip. Some glue code is added under lib/lwip/u-boot. For next time, please just make it a pre-req to run the git subtree command (and note it in the cover letter). In more specific feedback, I tried this on a Pi 3, and: U-Boot> tftpboot 20 EFI/arm64/helloworld.efi TFTP from server 192.168.1.10; our IP address is 192.168.1.100 Filename 'EFI/arm64/helloworld.efi'. Load address: 0x20 Loading: FAILED test/py/tests/test_efi_loader.py::test_efi_helloworld_net - u_boot_spawn.Timeout So some amount of networking is working (that's a reasonable dhcp response it got), but tftp'ing a file fails. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] board: rockchip: add ArmSoM Sige7 Rk3588 board
On Mon, May 27, 2024 at 11:15:09AM +0200, Quentin Schulz wrote: > Hi Jianfeng, > > On 5/27/24 10:57 AM, Jianfeng Liu wrote: > > Hi all, > > > However... it seems we'll likely need to also cherry-pick patches for > > > the GPU (should probably be straightforward as nothing would be using > > > the GPU anyway in U-Boot) and the USBDP PHY... but this one we would > > > need to update all -u-boot.dtsi for rk3588(s) boards that have it > > > already to make it use the new label/DT, make sure that the driver still > > > works... etc. Maybe not a small feat, but someone will have to do it at > > > some point anyway :) > > Kernel v6.10-rc1 is released and now u-boot is not synced to v6.9. > > It is, please use the "next" branch. > > > What about syncing with this procedure: > > 1, Sync upstream dts to v6.9 with command update-dts-subtree.sh pull. > > 2, Cherrypick all commits of rk3588s.dtsi from v6.10-rc1. > > 3, Cherrypick all commits of rk3588*.dts* from v6.10-rc1, which will > > include dts of new board armsom-sige7. > > 4, Add armsom-sige7 to u-boot. > > > > You should be able to do 2,3,4 yourself now I believe? And I am very much interested in the feedback on how 2,3,4 go as this will be the first real use of those steps. -- Tom signature.asc Description: PGP signature
Re: Pull request: u-boot-rockchip-20240525
On Sat, May 25, 2024 at 11:32:51AM +0800, Kever Yang wrote: > Hi Tom, > > Please pull the updates for rockchip platform: > - new board: rk3566 Powkiddy X55, rk3588s Indiedroid Nova; > - rv1126 migrate to OF_UPSTREAM; > - Fix for px30 ringneck board; > - Fix for rk3588 SPLL clock init; > > CI: > https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/20844 > > Thanks, > - Kever > > The following changes since commit a7f0154c412859323396111dd0c09dbafbc153cb: > > Prepare v2024.07-rc3 (2024-05-20 10:05:16 -0600) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-rockchip.git > tags/u-boot-rockchip-20240525 > > for you to fetch changes up to 5c7caa95982c481cc0d6a0e9997629afb0d2ce10: > > board: rockchip: Add Indiedroid Nova (2024-05-25 10:28:19 +0800) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature
Re: Pull request for tpm-master-27052024
Hi Miquel, On Mon, 27 May 2024 at 15:08, Miquel Raynal wrote: > > Hi Ilias, > > ilias.apalodi...@linaro.org wrote on Mon, 27 May 2024 15:01:10 +0300: > > > Hi Tom, > > > > Don't pull this please. Miquel added his r-b tags in the meantime, > > I'll queue up a new one > > It's okay, I thought you just merged the patches in your tree, Yea, that's what I tried to explain on the original thread by 'queued patches to Tom'. > but if > you already sent the PR to Tom it's okay. I'm fine with Tom pulling > this version of the PR. Thanks and apologies for pushing this early. But it contains a fix I want to land in the upcoming release. As I said this was on v5 and since no one paid attention by then, I didn't expect any other r-b tags. In any case thanks for reviewing! Regards /Ilias > > Cheers, > Miquèl
Re: [PATCH] riscv: dts: jh7110: Update qspi node with upstream
On 27.05.24 12:47, matthias@kernel.org wrote:
From: Matthias Brugger
Upstream node uses a specific SoC compatible to make the kernel driver
work. Copy over the upstream node to fullfill that need.
Thanks for looking into the compatibility of the U-Boot device-tree with
Linux.
Could you, please, replace "Upstream" by "Linux" and refer to the
relevant file:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/riscv/boot/dts/starfive/jh7110-common.dtsi?h=v6.10-rc1
%s/fullfill/fulfill/
Please, fully describe the change, e.g.
* Define MTD partitions for StarFive VisionFive 2
* Adjust QSPI compatible string to use StarFive specific driver
* Adjust QSPI clock and reset definitions
Signed-off-by: Matthias Brugger
---
.../jh7110-starfive-visionfive-2-u-boot.dtsi | 2 +-
.../dts/jh7110-starfive-visionfive-2.dtsi | 29 ---
arch/riscv/dts/jh7110.dtsi| 19 +++-
3 files changed, 37 insertions(+), 13 deletions(-)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
index 3012466b305..a69d8fcb391 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
@@ -40,7 +40,7 @@
&qspi {
bootph-pre-ram;
- nor-flash@0 {
+ nor_flash@0 {
bootph-pre-ram;
};
};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index e11babc1cde..375449b73a8 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -305,17 +305,38 @@
};
&qspi {
- spi-max-frequency = <25000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
- nor-flash@0 {
+ nor_flash: nor_flash@0 {
compatible = "jedec,spi-nor";
- reg=<0>;
- spi-max-frequency = <1>;
+ reg = <0>;
+ cdns,read-delay = <5>;
+ spi-max-frequency = <1200>;
cdns,tshsl-ns = <1>;
cdns,tsd2d-ns = <1>;
cdns,tchsh-ns = <1>;
cdns,tslch-ns = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ spl@0 {
+ reg = <0x0 0x8>;
+ };
Why should we have a gap here?
%s/0x8/0xf/
+ uboot-env@f {
+ reg = <0xf 0x1>;
+ };
+ uboot@10 {
+ reg = <0x10 0x40>;
+ };
And another gap here?
+ reserved-data@60 {
+ reg = <0x60 0xa0>;
+ };
When replacing u-boot.itb by EDK II it would be preferable to have a
single partition reaching to the end of the SPI-flash.
So I would suggest
uboot@10 {
ret = <0x10 0xf0>;
}
Best regards
Heinrich
+ };
};
};
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index 2cdc683d49b..2b331e58497 100644
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -480,19 +480,22 @@
};
qspi: spi@1301 {
- compatible = "cdns,qspi-nor";
- reg = <0x0 0x1301 0x0 0x1
- 0x0 0x2100 0x0 0x40>;
- clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>;
- clock-names = "clk_ref";
+ compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";
+ reg = <0x0 0x1301 0x0 0x1>,
+ <0x0 0x2100 0x0 0x40>;
+ interrupts = <25>;
+ clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,
+<&syscrg JH7110_SYSCLK_QSPI_AHB>,
+<&syscrg JH7110_SYSCLK_QSPI_APB>;
+ clock-names = "ref", "ahb", "apb";
resets = <&syscrg JH7110_SYSRST_QSPI_APB>,
<&syscrg JH7110_SYSRST_QSPI_AHB>,
<&syscrg JH7110_SYSRST_QSPI_REF>;
- reset-names = "rst_apb", "rst_ahb", "rst_ref";
+ reset-names = "qspi", "qspi-ocp", "rstc_ref";
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
- #address-cells = <1>;
- #size-cells = <0>;
+ cdns,trigger-address = <0x0>;
+ status = "disabled";
Re: [PATCH v2 00/14] Introduce the lwIP network stack
On Mon, May 27, 2024 at 02:45:01PM +0200, Jerome Forissier wrote: > That certainly would work but again, isn't it a decision to be made > by the device manufacturer or more generally the one who builds u-boot > for the device? Very true, and if you get the verification part working, your full solution is better! Martin
Re: [PATCH v2] board: rockchip: add ArmSoM Sige7 Rk3588 board
Hi all, >However... it seems we'll likely need to also cherry-pick patches for >the GPU (should probably be straightforward as nothing would be using >the GPU anyway in U-Boot) and the USBDP PHY... but this one we would >need to update all -u-boot.dtsi for rk3588(s) boards that have it >already to make it use the new label/DT, make sure that the driver still >works... etc. Maybe not a small feat, but someone will have to do it at >some point anyway :) Kernel v6.10-rc1 is released and now u-boot is not synced to v6.9. What about syncing with this procedure: 1, Sync upstream dts to v6.9 with command update-dts-subtree.sh pull. 2, Cherrypick all commits of rk3588s.dtsi from v6.10-rc1. 3, Cherrypick all commits of rk3588*.dts* from v6.10-rc1, which will include dts of new board armsom-sige7. 4, Add armsom-sige7 to u-boot. Best regards, Jianfeng
Re: [PATCH 2/2] rockchip: rk3588-edgeble: Add USB OTG support
hi Jagan,
On Mon, 27 May 2024 at 12:09, Jagan Teki wrote:
>
> Add support for USB OTG with UMS to program eMMC.
>
> Add it for Edgeble NCM6A, NCM6B.
>
> Signed-off-by: Jagan Teki
Reviewed-by: Anand Moon
> ---
> .../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi| 18 ++
> .../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi| 18 ++
> configs/neu6a-io-rk3588_defconfig | 9 +
> configs/neu6b-io-rk3588_defconfig | 9 +
> 4 files changed, 54 insertions(+)
>
> diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> index 88f3f7eee2..534d9f8a2c 100644
> --- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> @@ -15,3 +15,21 @@
> bus-width = <4>;
> status = "okay";
> };
> +
> +&u2phy0 {
> + status = "okay";
> +};
> +
> +&u2phy0_otg {
> + status = "okay";
> +};
> +
> +&usbdp_phy0 {
> + status = "okay";
> +};
> +
> +&usb_host0_xhci {
> + dr_mode = "peripheral";
> + maximum-speed = "high-speed";
> + status = "okay";
> +};
> diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> index 289578803e..b3d17a60ce 100644
> --- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> @@ -15,3 +15,21 @@
> bus-width = <4>;
> status = "okay";
> };
> +
> +&u2phy0 {
> + status = "okay";
> +};
> +
> +&u2phy0_otg {
> + status = "okay";
> +};
> +
> +&usbdp_phy0 {
> + status = "okay";
> +};
> +
> +&usb_host0_xhci {
> + dr_mode = "peripheral";
> + maximum-speed = "high-speed";
> + status = "okay";
> +};
> diff --git a/configs/neu6a-io-rk3588_defconfig
> b/configs/neu6a-io-rk3588_defconfig
> index ac281e6539..6e50d06458 100644
> --- a/configs/neu6a-io-rk3588_defconfig
> +++ b/configs/neu6a-io-rk3588_defconfig
> @@ -24,6 +24,7 @@ CONFIG_SPL_PAD_TO=0x7f8000
> CONFIG_SPL_ATF=y
> CONFIG_CMD_GPT=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> # CONFIG_CMD_SETEXPR is not set
> # CONFIG_SPL_DOS_PARTITION is not set
> CONFIG_SPL_OF_CONTROL=y
> @@ -33,6 +34,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
> CONFIG_SPL_REGMAP=y
> CONFIG_SPL_SYSCON=y
> CONFIG_SPL_CLK=y
> +# CONFIG_USB_FUNCTION_FASTBOOT is not set
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> CONFIG_MISC=y
> @@ -42,6 +44,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_SDMA=y
> CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_USBDP=y
> CONFIG_SPL_PINCTRL=y
> CONFIG_PWM_ROCKCHIP=y
> CONFIG_SPL_RAM=y
> @@ -49,4 +53,9 @@ CONFIG_BAUDRATE=150
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYS_NS16550_MEM32=y
> CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> CONFIG_ERRNO_STR=y
> diff --git a/configs/neu6b-io-rk3588_defconfig
> b/configs/neu6b-io-rk3588_defconfig
> index c01e5fb0d0..f2eb650f19 100644
> --- a/configs/neu6b-io-rk3588_defconfig
> +++ b/configs/neu6b-io-rk3588_defconfig
> @@ -24,6 +24,7 @@ CONFIG_SPL_PAD_TO=0x7f8000
> CONFIG_SPL_ATF=y
> CONFIG_CMD_GPT=y
> CONFIG_CMD_MMC=y
> +CONFIG_CMD_USB_MASS_STORAGE=y
> # CONFIG_CMD_SETEXPR is not set
> # CONFIG_SPL_DOS_PARTITION is not set
> CONFIG_SPL_OF_CONTROL=y
> @@ -33,6 +34,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
> CONFIG_SPL_REGMAP=y
> CONFIG_SPL_SYSCON=y
> CONFIG_SPL_CLK=y
> +# CONFIG_USB_FUNCTION_FASTBOOT is not set
> CONFIG_ROCKCHIP_GPIO=y
> CONFIG_SYS_I2C_ROCKCHIP=y
> CONFIG_MISC=y
> @@ -42,6 +44,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
> CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_SDMA=y
> CONFIG_MMC_SDHCI_ROCKCHIP=y
> +CONFIG_PHY_ROCKCHIP_INNO_USB2=y
> +CONFIG_PHY_ROCKCHIP_USBDP=y
> CONFIG_SPL_PINCTRL=y
> CONFIG_PWM_ROCKCHIP=y
> CONFIG_SPL_RAM=y
> @@ -49,4 +53,9 @@ CONFIG_BAUDRATE=150
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYS_NS16550_MEM32=y
> CONFIG_SYSRESET=y
> +CONFIG_USB=y
> +CONFIG_USB_DWC3=y
> +CONFIG_USB_DWC3_GENERIC=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_GADGET_DOWNLOAD=y
> CONFIG_ERRNO_STR=y
> --
> 2.34.1
>
Re: [PATCH 1/2] arm64: dts: rockchip: Fix spl-boot-order for edgeble-ncm6b
Hi Jagan,
On Mon, 27 May 2024 at 12:09, Jagan Teki wrote:
>
> Edgeble NCM6B SoM has built-in eMMC so make sdhci has first boot
> priority.
>
> Fix it for NCM6A, NCM6B SoM.
>
> Signed-off-by: Jagan Teki
Reviewed-by: Anand Moon
> ---
> arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 6 +-
> arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 11 ++-
> 2 files changed, 7 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> index dd0058262b..88f3f7eee2 100644
> --- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> @@ -6,12 +6,8 @@
> #include "rk3588-u-boot.dtsi"
>
> / {
> - aliases {
> - mmc0 = &sdmmc;
> - };
> -
> chosen {
> - u-boot,spl-boot-order = &sdmmc;
> + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
> };
> };
>
> diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> index a45b3f5e86..289578803e 100644
> --- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> @@ -6,11 +6,12 @@
> #include "rk3588j-u-boot.dtsi"
>
> / {
> - aliases {
> - mmc0 = &sdmmc;
> - };
> -
> chosen {
> - u-boot,spl-boot-order = &sdmmc;
> + u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
> };
> };
> +
> +&sdmmc {
> + bus-width = <4>;
> + status = "okay";
> +};
> --
> 2.34.1
>
Re: [PATCH v2 00/14] Introduce the lwIP network stack
On 5/27/24 11:45, Martin Husemann wrote: > On Mon, May 27, 2024 at 11:36:26AM +0200, Jerome Forissier wrote: >> You're correct. The point I am making is about using a secure >> (authenticated) connection, and I should have clarified that. While using >> HTTPS might not be critical on a local network, things are different when >> downloading from the internet (think man-in-the-middle attacks). > > (Sorry if this sounds like nitpkicking, but I am genuinely curious) No worries. Well-defined use cases are certainly essential to proper implementations. > How is it supposed to work? > > You need not only https but also verify the presented certificate chain, > and for that you need up-to-date root certificates (e.g. the bundle > available from mozilla). Yes. I will let Javier comment further since he's more directly concerned with that part. > This sounds a bit outside the scope of u-boot to me Maybe, maybe not. I would argue it is a matter of deployment policy. For example assume the device is an IP camera or some other IoT thing that comes with the bare minimum to boot and fetch its OS on first power up. No guarantee about what is on the local network -- just plain internet access. https would be quite helpful in such a case. > (or you should > avoid the man-in-the-middle argument, which leaves the still valid > "sites stop offering plain http" argument). As long as there is at least one valid argument then I'm fine :) > If you really worry about man-in-the-middle you need to download via > https in an environment that does certificate validation, and then > even better verify the hash of the downloaded image. After that you > can offer the image locally - via http, https or tftp - for installations. That certainly would work but again, isn't it a decision to be made by the device manufacturer or more generally the one who builds u-boot for the device? -- Jerome
Re: Pull request for tpm-master-27052024
Hi Ilias, ilias.apalodi...@linaro.org wrote on Mon, 27 May 2024 15:01:10 +0300: > Hi Tom, > > Don't pull this please. Miquel added his r-b tags in the meantime, > I'll queue up a new one It's okay, I thought you just merged the patches in your tree, but if you already sent the PR to Tom it's okay. I'm fine with Tom pulling this version of the PR. Cheers, Miquèl
Re: [PATCH v5 2/2] tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend
On Mon, 27 May 2024 at 14:48, Miquel Raynal wrote: > > Hi Ilias, > > ilias.apalodi...@linaro.org wrote on Mon, 27 May 2024 12:44:11 +0300: > > > Hi Miquel > > > > On Mon, 27 May 2024 at 11:59, Miquel Raynal > > wrote: > > > > > > Hi Tim, > > > > > > thar...@gateworks.com wrote on Sat, 25 May 2024 13:00:49 -0700: > > > > > > > For pcr_read and pcr_extend commands allow the digest algorithm to be > > > > specified by an additional argument. If not specified it will default to > > > > SHA256 for backwards compatibility. > > > > > > > > Additionally update test_tpm2.py for the changes in output in pcr_read > > > > which now shows the algo and algo length in the output. > > > > > > > > A follow-on to this could be to extend all PCR banks with the detected > > > > algo when the argument is 'auto'. > > > > > > > > Signed-off-by: Tim Harvey > > > > Reviewed-by: Ilias Apalodimas > > > > > > LGTM, > > > > > > Reviewed-by: Miquel Raynal > > > > Thanks for taking the time, unfortunately I've already queued these > > for Tom and your r-b is missing > > Maybe it's not a big deal to force push your branch? I've replied to that PR, hopefully Tom will see it before merging > Otherwise please > consider letting a bit more time to the reviewers next time. 2 days > over the weekend is definitely not enough if you refuse to update your > branch. I usually do, but the patch is on v5 and had no comments apart from mine for > ~1 month Thanks /Ilias > > Thanks, > Miquèl
Re: Pull request for tpm-master-27052024
Hi Tom, Don't pull this please. Miquel added his r-b tags in the meantime, I'll queue up a new one Thanks /Ilias On Mon, 27 May 2024 at 09:15, Ilias Apalodimas wrote: > > Hi Tom > > I know it's not early in the release and although this contains a new feature > apart from fixes, I prefer this going into -master. The added feature > is on a TPM cmd and is harmless. If you only want the fixes please let me > know and I'll send the rest in -next > > The following changes since commit a7f0154c412859323396111dd0c09dbafbc153cb: > > Prepare v2024.07-rc3 (2024-05-20 10:05:16 -0600) > > are available in the Git repository at: > > https://source.denx.de/u-boot/custodians/u-boot-tpm/ > tags/tpm-master-27052024 > > for you to fetch changes up to 89aa8463cdf3919ca4f04fc24ec8b154ff56d97e: > > tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend > (2024-05-27 09:00:27 +0300) > > The CI https://source.denx.de/u-boot/custodians/u-boot-tpm/-/pipelines/20873 > had no issues > > Please consider pulling > > Thanks > /Ilias > > > Tim fixed > - An inconsistency in the reported active PCR banks. > This was only affecting EFI applications requesting the > active PCR banks from the TPM. > - Adjusted the error message when a reset GPIO for the TPM > was not found. It now prints a reasonable error message, > instead of just printing that GPIO was not found > - Enhanced the tpm command functionality. We can now define the > algorithm(sha1, 256 etc) we want to use while extending or > reading PCRs > > > Tim Harvey (3): > tpm: display warning if using gpio reset with TPM > tpm-v2: add support for mapping algorithm names to algos > tpm-v2: allow algorithm name to be configured for pcr_read and > pcr_extend > > cmd/tpm-v2.c | 49 +++ > drivers/tpm/tpm2_tis_spi.c | 21 +++- > include/tpm-v2.h | 77 +-- > lib/efi_loader/efi_tcg2.c | 6 ++-- > lib/tpm-v2.c | 82 > +- > test/py/tests/test_tpm2.py | 2 +- > 6 files changed, 177 insertions(+), 60 deletions(-)
Re: [PATCH v5 2/2] tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend
Hi Ilias, ilias.apalodi...@linaro.org wrote on Mon, 27 May 2024 12:44:11 +0300: > Hi Miquel > > On Mon, 27 May 2024 at 11:59, Miquel Raynal wrote: > > > > Hi Tim, > > > > thar...@gateworks.com wrote on Sat, 25 May 2024 13:00:49 -0700: > > > > > For pcr_read and pcr_extend commands allow the digest algorithm to be > > > specified by an additional argument. If not specified it will default to > > > SHA256 for backwards compatibility. > > > > > > Additionally update test_tpm2.py for the changes in output in pcr_read > > > which now shows the algo and algo length in the output. > > > > > > A follow-on to this could be to extend all PCR banks with the detected > > > algo when the argument is 'auto'. > > > > > > Signed-off-by: Tim Harvey > > > Reviewed-by: Ilias Apalodimas > > > > LGTM, > > > > Reviewed-by: Miquel Raynal > > Thanks for taking the time, unfortunately I've already queued these > for Tom and your r-b is missing Maybe it's not a big deal to force push your branch? Otherwise please consider letting a bit more time to the reviewers next time. 2 days over the weekend is definitely not enough if you refuse to update your branch. Thanks, Miquèl
[PATCH] riscv: dts: jh7110: Update qspi node with upstream
From: Matthias Brugger
Upstream node uses a specific SoC compatible to make the kernel driver
work. Copy over the upstream node to fullfill that need.
Signed-off-by: Matthias Brugger
---
.../jh7110-starfive-visionfive-2-u-boot.dtsi | 2 +-
.../dts/jh7110-starfive-visionfive-2.dtsi | 29 ---
arch/riscv/dts/jh7110.dtsi| 19 +++-
3 files changed, 37 insertions(+), 13 deletions(-)
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
index 3012466b305..a69d8fcb391 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2-u-boot.dtsi
@@ -40,7 +40,7 @@
&qspi {
bootph-pre-ram;
- nor-flash@0 {
+ nor_flash@0 {
bootph-pre-ram;
};
};
diff --git a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
index e11babc1cde..375449b73a8 100644
--- a/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi
@@ -305,17 +305,38 @@
};
&qspi {
- spi-max-frequency = <25000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "okay";
- nor-flash@0 {
+ nor_flash: nor_flash@0 {
compatible = "jedec,spi-nor";
- reg=<0>;
- spi-max-frequency = <1>;
+ reg = <0>;
+ cdns,read-delay = <5>;
+ spi-max-frequency = <1200>;
cdns,tshsl-ns = <1>;
cdns,tsd2d-ns = <1>;
cdns,tchsh-ns = <1>;
cdns,tslch-ns = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ spl@0 {
+ reg = <0x0 0x8>;
+ };
+ uboot-env@f {
+ reg = <0xf 0x1>;
+ };
+ uboot@10 {
+ reg = <0x10 0x40>;
+ };
+ reserved-data@60 {
+ reg = <0x60 0xa0>;
+ };
+ };
};
};
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi
index 2cdc683d49b..2b331e58497 100644
--- a/arch/riscv/dts/jh7110.dtsi
+++ b/arch/riscv/dts/jh7110.dtsi
@@ -480,19 +480,22 @@
};
qspi: spi@1301 {
- compatible = "cdns,qspi-nor";
- reg = <0x0 0x1301 0x0 0x1
- 0x0 0x2100 0x0 0x40>;
- clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>;
- clock-names = "clk_ref";
+ compatible = "starfive,jh7110-qspi", "cdns,qspi-nor";
+ reg = <0x0 0x1301 0x0 0x1>,
+ <0x0 0x2100 0x0 0x40>;
+ interrupts = <25>;
+ clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,
+<&syscrg JH7110_SYSCLK_QSPI_AHB>,
+<&syscrg JH7110_SYSCLK_QSPI_APB>;
+ clock-names = "ref", "ahb", "apb";
resets = <&syscrg JH7110_SYSRST_QSPI_APB>,
<&syscrg JH7110_SYSRST_QSPI_AHB>,
<&syscrg JH7110_SYSRST_QSPI_REF>;
- reset-names = "rst_apb", "rst_ahb", "rst_ref";
+ reset-names = "qspi", "qspi-ocp", "rstc_ref";
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
- #address-cells = <1>;
- #size-cells = <0>;
+ cdns,trigger-address = <0x0>;
+ status = "disabled";
};
syscrg: clock-controller@1302 {
--
2.44.0
Re: [PATCH v2 00/14] Introduce the lwIP network stack
On Mon, May 27, 2024 at 11:36:26AM +0200, Jerome Forissier wrote: > You're correct. The point I am making is about using a secure > (authenticated) connection, and I should have clarified that. While using > HTTPS might not be critical on a local network, things are different when > downloading from the internet (think man-in-the-middle attacks). (Sorry if this sounds like nitpkicking, but I am genuinely curious) How is it supposed to work? You need not only https but also verify the presented certificate chain, and for that you need up-to-date root certificates (e.g. the bundle available from mozilla). This sounds a bit outside the scope of u-boot to me (or you should avoid the man-in-the-middle argument, which leaves the still valid "sites stop offering plain http" argument). If you really worry about man-in-the-middle you need to download via https in an environment that does certificate validation, and then even better verify the hash of the downloaded image. After that you can offer the image locally - via http, https or tftp - for installations. Martin
Re: [PATCH v5 2/2] tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend
Hi Miquel On Mon, 27 May 2024 at 11:59, Miquel Raynal wrote: > > Hi Tim, > > thar...@gateworks.com wrote on Sat, 25 May 2024 13:00:49 -0700: > > > For pcr_read and pcr_extend commands allow the digest algorithm to be > > specified by an additional argument. If not specified it will default to > > SHA256 for backwards compatibility. > > > > Additionally update test_tpm2.py for the changes in output in pcr_read > > which now shows the algo and algo length in the output. > > > > A follow-on to this could be to extend all PCR banks with the detected > > algo when the argument is 'auto'. > > > > Signed-off-by: Tim Harvey > > Reviewed-by: Ilias Apalodimas > > LGTM, > > Reviewed-by: Miquel Raynal Thanks for taking the time, unfortunately I've already queued these for Tom and your r-b is missing Thanks /Ilias > > Thanks, > Miquèl
Re: [PATCH v2 00/14] Introduce the lwIP network stack
Hi Francesco, On 5/27/24 11:23, Francesco Dolcini wrote: > Hello Jerome, > > On Fri, May 24, 2024 at 06:19:54PM +0200, Jerome Forissier wrote: >> - Make the support of HTTPS in the wget command easier. Javier T. (CC'd) >> has some additional lwIP and Mbed TLS patches to do so. With that it >> becomes possible to fetch and launch a distro installer such as Debian >> etc. directly from the U-Boot shell. > > Why this is enabling this use case? Or it is just that currently, > without TLS, is not supposed to be something you should do? > I am a little bit confused reading this sentence, since to me this is > already possible using tftp. You're correct. The point I am making is about using a secure (authenticated) connection, and I should have clarified that. While using HTTPS might not be critical on a local network, things are different when downloading from the internet (think man-in-the-middle attacks). Also, many web sites are switching off HTTP in favor of HTTPS so it could be that your favorite distro becomes unavailable without it. Thanks, -- Jerome > > Francesco >
Re: [PATCH v2 00/14] Introduce the lwIP network stack
Hello Jerome, On Fri, May 24, 2024 at 06:19:54PM +0200, Jerome Forissier wrote: > - Make the support of HTTPS in the wget command easier. Javier T. (CC'd) > has some additional lwIP and Mbed TLS patches to do so. With that it > becomes possible to fetch and launch a distro installer such as Debian > etc. directly from the U-Boot shell. Why this is enabling this use case? Or it is just that currently, without TLS, is not supposed to be something you should do? I am a little bit confused reading this sentence, since to me this is already possible using tftp. Francesco
Re: [PATCH v2] board: rockchip: add ArmSoM Sige7 Rk3588 board
Hi Jianfeng, On 5/27/24 10:57 AM, Jianfeng Liu wrote: Hi all, However... it seems we'll likely need to also cherry-pick patches for the GPU (should probably be straightforward as nothing would be using the GPU anyway in U-Boot) and the USBDP PHY... but this one we would need to update all -u-boot.dtsi for rk3588(s) boards that have it already to make it use the new label/DT, make sure that the driver still works... etc. Maybe not a small feat, but someone will have to do it at some point anyway :) Kernel v6.10-rc1 is released and now u-boot is not synced to v6.9. It is, please use the "next" branch. What about syncing with this procedure: 1, Sync upstream dts to v6.9 with command update-dts-subtree.sh pull. 2, Cherrypick all commits of rk3588s.dtsi from v6.10-rc1. 3, Cherrypick all commits of rk3588*.dts* from v6.10-rc1, which will include dts of new board armsom-sige7. 4, Add armsom-sige7 to u-boot. You should be able to do 2,3,4 yourself now I believe? Cheers, Quentin
Re: [PATCH 2/2] rockchip: rk3588-edgeble: Add USB OTG support
Hi Jagan,
On 5/27/24 10:57 AM, Jagan Teki wrote:
On Mon, 27 May 2024 at 14:17, Quentin Schulz wrote:
Hi Jagan,
On 5/27/24 8:39 AM, Jagan Teki wrote:
Add support for USB OTG with UMS to program eMMC.
Add it for Edgeble NCM6A, NCM6B.
Signed-off-by: Jagan Teki
---
.../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi| 18 ++
.../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi| 18 ++
configs/neu6a-io-rk3588_defconfig | 9 +
configs/neu6b-io-rk3588_defconfig | 9 +
4 files changed, 54 insertions(+)
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
index 88f3f7eee2..534d9f8a2c 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
@@ -15,3 +15,21 @@
bus-width = <4>;
status = "okay";
};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
index 289578803e..b3d17a60ce 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
@@ -15,3 +15,21 @@
bus-width = <4>;
status = "okay";
};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "okay";
+};
I don't see those patches in v6.10-rc1. Have you sent those to upstream
already? I assume we should cherry-pick patches in dts/upstream instead
of piling stuff up in u-boot.dtsis. This should also bring the patches
in rk3588(s).dtsi to add the missing bits for USB support we currently
have in rk3588*-u-boot.dtsi?
These are -u-boot.dtsi and nothing to do with dts/upstream and can be
removed or reconfigured once we sync the DT from Linux.
This answer seems to suggest there are no patches in the kernel yet. Do
you not want working USB in Linux? Is something broken in Linux?
I think we're also aiming at only having U-Boot specific stuff in
-u-boot.dtsi wherever we have OF_UPSTREAM enabled, and enabling USB
doesn't seem to be typically the thing that should be U-Boot specific? I
know that we have most rk3588/rk3588s boards with those nodes defined
already, but they predates the move to OF_UPSTREAM.
As far as I remember, we've always asked people to upstream DT stuff
they could upstream first and then import them in -u-boot.dtsi later,
except for things that are U-Boot specific (e.g. different
representation at a given point in time between U-Boot and kernel, or
simple support in U-Boot but nothing in kernel yet). We could be a bit
more aggressive with this policy now that we have dts/upstream as well.
Ultimately this is up to Kever/Tom to decide where we want to go with
this and how strict we want the policy to be.
Cheers,
Quentin
Re: [PATCH v5 2/2] tpm-v2: allow algorithm name to be configured for pcr_read and pcr_extend
Hi Tim, thar...@gateworks.com wrote on Sat, 25 May 2024 13:00:49 -0700: > For pcr_read and pcr_extend commands allow the digest algorithm to be > specified by an additional argument. If not specified it will default to > SHA256 for backwards compatibility. > > Additionally update test_tpm2.py for the changes in output in pcr_read > which now shows the algo and algo length in the output. > > A follow-on to this could be to extend all PCR banks with the detected > algo when the argument is 'auto'. > > Signed-off-by: Tim Harvey > Reviewed-by: Ilias Apalodimas LGTM, Reviewed-by: Miquel Raynal Thanks, Miquèl
Re: [PATCH v5 1/2] tpm-v2: add support for mapping algorithm names to algos
Hi Tim,
thar...@gateworks.com wrote on Sat, 25 May 2024 13:00:48 -0700:
> replace tpm2_supported_algorithms with an array of structures
> relating algorithm names, to TCG id's, digest length and mask values.
>
> While at it fix the tpm2_algorithm_to_mask to return the proper value.
>
> Fixes: 97707f12fdab ("tpm: Support boot measurements")
> Signed-off-by: Tim Harvey
> Reviewed-by: Ilias Apalodimas
> Cc: Eddie James
> Cc: Ilias Apalodimas
> ---
Reviewed-by: Miquel Raynal
Thanks,
Miquèl
Re: [PATCH 2/2] rockchip: rk3588-edgeble: Add USB OTG support
On Mon, 27 May 2024 at 14:17, Quentin Schulz wrote:
>
> Hi Jagan,
>
> On 5/27/24 8:39 AM, Jagan Teki wrote:
> > Add support for USB OTG with UMS to program eMMC.
> >
> > Add it for Edgeble NCM6A, NCM6B.
> >
> > Signed-off-by: Jagan Teki
> > ---
> > .../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi| 18 ++
> > .../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi| 18 ++
> > configs/neu6a-io-rk3588_defconfig | 9 +
> > configs/neu6b-io-rk3588_defconfig | 9 +
> > 4 files changed, 54 insertions(+)
> >
> > diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> > b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> > index 88f3f7eee2..534d9f8a2c 100644
> > --- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
> > @@ -15,3 +15,21 @@
> > bus-width = <4>;
> > status = "okay";
> > };
> > +
> > +&u2phy0 {
> > + status = "okay";
> > +};
> > +
> > +&u2phy0_otg {
> > + status = "okay";
> > +};
> > +
> > +&usbdp_phy0 {
> > + status = "okay";
> > +};
> > +
> > +&usb_host0_xhci {
> > + dr_mode = "peripheral";
> > + maximum-speed = "high-speed";
> > + status = "okay";
> > +};
> > diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> > b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> > index 289578803e..b3d17a60ce 100644
> > --- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
> > @@ -15,3 +15,21 @@
> > bus-width = <4>;
> > status = "okay";
> > };
> > +
> > +&u2phy0 {
> > + status = "okay";
> > +};
> > +
> > +&u2phy0_otg {
> > + status = "okay";
> > +};
> > +
> > +&usbdp_phy0 {
> > + status = "okay";
> > +};
> > +
> > +&usb_host0_xhci {
> > + dr_mode = "peripheral";
> > + maximum-speed = "high-speed";
> > + status = "okay";
> > +};
>
> I don't see those patches in v6.10-rc1. Have you sent those to upstream
> already? I assume we should cherry-pick patches in dts/upstream instead
> of piling stuff up in u-boot.dtsis. This should also bring the patches
> in rk3588(s).dtsi to add the missing bits for USB support we currently
> have in rk3588*-u-boot.dtsi?
These are -u-boot.dtsi and nothing to do with dts/upstream and can be
removed or reconfigured once we sync the DT from Linux.
Jagan.
Re: [PATCH 2/2] rockchip: rk3588-edgeble: Add USB OTG support
Hi Jagan,
On 5/27/24 8:39 AM, Jagan Teki wrote:
Add support for USB OTG with UMS to program eMMC.
Add it for Edgeble NCM6A, NCM6B.
Signed-off-by: Jagan Teki
---
.../dts/rk3588-edgeble-neu6a-io-u-boot.dtsi| 18 ++
.../dts/rk3588-edgeble-neu6b-io-u-boot.dtsi| 18 ++
configs/neu6a-io-rk3588_defconfig | 9 +
configs/neu6b-io-rk3588_defconfig | 9 +
4 files changed, 54 insertions(+)
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
index 88f3f7eee2..534d9f8a2c 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
@@ -15,3 +15,21 @@
bus-width = <4>;
status = "okay";
};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "okay";
+};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
index 289578803e..b3d17a60ce 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
@@ -15,3 +15,21 @@
bus-width = <4>;
status = "okay";
};
+
+&u2phy0 {
+ status = "okay";
+};
+
+&u2phy0_otg {
+ status = "okay";
+};
+
+&usbdp_phy0 {
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode = "peripheral";
+ maximum-speed = "high-speed";
+ status = "okay";
+};
I don't see those patches in v6.10-rc1. Have you sent those to upstream
already? I assume we should cherry-pick patches in dts/upstream instead
of piling stuff up in u-boot.dtsis. This should also bring the patches
in rk3588(s).dtsi to add the missing bits for USB support we currently
have in rk3588*-u-boot.dtsi?
Cheers,
Quentin
Re: [PATCH 1/2] arm64: dts: rockchip: Fix spl-boot-order for edgeble-ncm6b
Hi Jagan,
On 5/27/24 8:39 AM, Jagan Teki wrote:
Edgeble NCM6B SoM has built-in eMMC so make sdhci has first boot
priority.
Fix it for NCM6A, NCM6B SoM.
Signed-off-by: Jagan Teki
---
arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi | 6 +-
arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi | 11 ++-
2 files changed, 7 insertions(+), 10 deletions(-)
diff --git a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
index dd0058262b..88f3f7eee2 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6a-io-u-boot.dtsi
@@ -6,12 +6,8 @@
#include "rk3588-u-boot.dtsi"
/ {
- aliases {
- mmc0 = &sdmmc;
- };
-
chosen {
- u-boot,spl-boot-order = &sdmmc;
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
};
diff --git a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
index a45b3f5e86..289578803e 100644
--- a/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
+++ b/arch/arm/dts/rk3588-edgeble-neu6b-io-u-boot.dtsi
@@ -6,11 +6,12 @@
#include "rk3588j-u-boot.dtsi"
/ {
- aliases {
- mmc0 = &sdmmc;
- };
-
chosen {
- u-boot,spl-boot-order = &sdmmc;
+ u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
};
+
+&sdmmc {
+ bus-width = <4>;
+ status = "okay";
+};
The sdmmc parts are already part of
dts/upstream/src/arm64/rockchip/rk3588-edgeble-neu6b-io.dts, are you
sure this is actually needed?
Cheers,
Quentin
Re: [PATCH v4] fdt: automatically add /chosen/kaslr-seed if DM_RNG is enabled
On 5/25/24 22:02, Tim Harvey wrote:
If RANDOMIZE_BASE is enabled in the Linux kernel instructing it to
randomize the virtual address at which the kernel image is loaded, it
expects entropy to be provided by the bootloader by populating
/chosen/kaslr-seed with a 64-bit value from source of entropy at boot.
If we have DM_RNG enabled populate this value automatically when
fdt_chosen is called. We skip this if ARMV8_SEC_FIRMWARE_SUPPORT
is enabled as it's implementation uses a different source of entropy
that is not yet implemented as DM_RNG. We also skip this if
MEASURED_BOOT is enabled as in that case any modifications to the
dt will cause measured boot to fail (although there are many other
places the dt is altered).
As this fdt node is added elsewhere create a library function and
use it to deduplicate code. We will provide a parameter to specify the
index of the rng device as well as a boolean to overwrite if present.
For our automatic injection, we will use the first rng device and
not overwrite if already present with a non-zero value (which may
have been populated by an earlier boot stage). This way if a board
specific ft_board_setup() function wants to customize this behavior
it can call fdt_kaslrseed with a rng device index of its choosing and
set overwrite true.
Note that the kalsrseed command (CMD_KASLRSEED) is likely pointless now
but left in place in case boot scripts exist that rely on this command
existing and returning success. An informational message is printed to
alert users of this command that it is likely no longer needed.
Note that the Kernel's EFI STUB only relies on EFI_RNG_PROTOCOL for
randomization and completely ignores the kaslr-seed for its own
randomness needs (i.e the randomization of the physical placement of
the kernel). It gets weeded out from the DTB that gets handed over via
efi_install_fdt() as it would also mess up the measured boot DTB TPM
measurements as well.
Signed-off-by: Tim Harvey
Cc: Michal Simek
Cc: Andy Yan
Cc: Akash Gajjar
Cc: Ilias Apalodimas
Cc: Simon Glass
Cc: Patrick Delaunay
Cc: Patrice Chotard
Cc: Devarsh Thakkar
Cc: Heinrich Schuchardt
Cc: Hugo Villeneuve
Cc: Marek Vasut
Cc: Tom Rini
Cc: Chris Morgan
---
v4:
- add missing /n to notice in kaslrseed cmd
- combine ints in declaration
- remove unused vars from board/xilinx/common/board.c ft_board_setup
v3:
- skip if CONFIG_MEASURED_BOOT
- fix skip for CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
- pass in rng index and bool to specify overwrite
- remove duplicate error strings printed outside of fdt_kaslrseed
- added note to commit log about how EFI STUB weeds out kalsr-seed
v2:
- fix typo in commit msg
- use stack for seed to avoid unecessary malloc/free
- move to a library function and deduplicate code by using it
elsewhere
---
board/xilinx/common/board.c | 40 --
boot/fdt_support.c | 6 +
boot/pxe_utils.c| 35 ++
cmd/kaslrseed.c | 45 +-
include/kaslrseed.h | 19 ++
lib/Makefile| 1 +
lib/kaslrseed.c | 49 +
7 files changed, 83 insertions(+), 112 deletions(-)
create mode 100644 include/kaslrseed.h
create mode 100644 lib/kaslrseed.c
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
index 30a81376ac41..0b43407b9e94 100644
--- a/board/xilinx/common/board.c
+++ b/board/xilinx/common/board.c
@@ -701,11 +701,6 @@ phys_addr_t board_get_usable_ram_top(phys_size_t
total_size)
#define MAX_RAND_SIZE 8
int ft_board_setup(void *blob, struct bd_info *bd)
{
- size_t n = MAX_RAND_SIZE;
- struct udevice *dev;
- u8 buf[MAX_RAND_SIZE];
- int nodeoffset, ret;
-
static const struct node_info nodes[] = {
{ "arm,pl353-nand-r2p1", MTD_DEV_TYPE_NAND, },
};
@@ -713,41 +708,6 @@ int ft_board_setup(void *blob, struct bd_info *bd)
if (IS_ENABLED(CONFIG_FDT_FIXUP_PARTITIONS) &&
IS_ENABLED(CONFIG_NAND_ZYNQ))
fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
- if (uclass_get_device(UCLASS_RNG, 0, &dev) || !dev) {
- debug("No RNG device\n");
- return 0;
- }
-
- if (dm_rng_read(dev, buf, n)) {
- debug("Reading RNG failed\n");
- return 0;
- }
-
- if (!blob) {
- debug("No FDT memory address configured. Please configure\n"
- "the FDT address via \"fdt addr \" command.\n"
- "Aborting!\n");
- return 0;
- }
-
- ret = fdt_check_header(blob);
- if (ret < 0) {
- debug("fdt_chosen: %s\n", fdt_strerror(ret));
- return ret;
- }
-
- nodeoffset = fdt_find_or_add_subnode(blob, 0, "chosen");
- if (nodeoffset < 0) {
- debug("Reading chosen node failed\n");
-
Re: [PATCH] Revert "arm: dts: bcm283x: Add minimal smbios information"
On 14/05/2024 15:07, Peter Robinson wrote:
This reverts commit 33041972727e84d3f95e26c83322521f61827584.
With the ability to generate this SMBIOS details autmotically the
small amount of details that this patch provided are generated
automatically so this is now obsolete so we can just drop it.
Signed-off-by: Peter Robinson
Acked-by: Matthias Brugger
---
arch/arm/dts/bcm283x-u-boot.dtsi | 19 ---
1 file changed, 19 deletions(-)
diff --git a/arch/arm/dts/bcm283x-u-boot.dtsi b/arch/arm/dts/bcm283x-u-boot.dtsi
index 8c17c6f6a52..ec0f93dd850 100644
--- a/arch/arm/dts/bcm283x-u-boot.dtsi
+++ b/arch/arm/dts/bcm283x-u-boot.dtsi
@@ -6,25 +6,6 @@
* (C) Copyright 2016 Fabian Vogt
*/
-/ {
- smbios {
- compatible = "u-boot,sysinfo-smbios";
- smbios {
- system {
- manufacturer = "raspberrypi";
- product = "rpi";
- };
- baseboard {
- manufacturer = "raspberrypi";
- product = "rpi";
- };
- chassis {
- manufacturer = "raspberrypi";
- };
- };
- };
-};
-
&uart0 {
skip-init;
bootph-all;
Re: [PATCH v4 0/3] Introduce mtdblock device
Hi Alexey, The CI still detects some errors when applying both series: - Introduce mtdblock device - Introduce UBI block device As an example: +/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: /tmp/ccOTHlvl.ltrans4.ltrans.o: in function `mtd_blk_read': 6816+drivers/mtd/mtdblock.c:95:(.text.mtd_blk_read+0x40): undefined reference to `mtd_read' 6817+/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: /tmp/ccOTHlvl.ltrans4.ltrans.o: in function `mtd_blk_write': 6818+drivers/mtd/mtdblock.c:162:(.text.mtd_blk_write+0x9a): undefined reference to `mtd_read' 6819+/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: drivers/mtd/mtdblock.c:122:(.text.mtd_blk_write+0xf4): undefined reference to `mtd_erase' 6820+/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: /tmp/ccOTHlvl.ltrans4.ltrans.o:drivers/mtd/mtdblock.c:126:(.text.mtd_blk_write+0x110): undefined reference to `mtd_write' 6821+collect2: error: ld returned 1 exit status 6822+/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: /tmp/ccaNKMBK.ltrans2.ltrans.o: in function `mtd_blk_read': 6823+drivers/mtd/mtdblock.c:95:(.text.mtd_blk_read+0x36): undefined reference to `mtd_read' 6824+/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: /tmp/ccaNKMBK.ltrans2.ltrans.o: in function `mtd_blk_write': 6825+drivers/mtd/mtdblock.c:162:(.text.mtd_blk_write+0x88): undefined reference to `mtd_read' 6826+/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: drivers/mtd/mtdblock.c:122:(.text.mtd_blk_write+0xe0): undefined reference to `mtd_erase' 6827+/opt/gcc-13.2.0-nolibc/arm-linux-gnueabi/bin/../lib/gcc/arm-linux-gnueabi/13.2.0/../../../../arm-linux-gnueabi/bin/ld: /tmp/ccaNKMBK.ltrans2.ltrans.o:drivers/mtd/mtdblock. Furthermore, I need to fix something in applying the patches. So, please rebase your series on master and run the tests locally: Please read tools/buildman/buildman.rst and .gitlab-ci.yml to get info. Thanks and regards, Dario On Fri, May 24, 2024 at 12:29 PM Alexey Romanov wrote: > > Hello! > > This series adds support for the mtdblock device, which > allows to read/write data block by block. For example, > it can now be used for BCB or Android AB command: > > $ bcb load mtd 0 part_name > > Tested only on SPI NAND, so bind is made only for > SPI NAND drivers. > > --- > > Changes V1 -> V2 [1]: > > - Drop patch [2]. > - Add warning if bind NAND mtdblock device. > - Move documentation of mtdblock implementation > from commit message to the source code. > - Remove __maybe_unused from mtd partition functions > description. > - Use blk_enabled() instead of #ifdefs. > > Changes V2 -> V3 [2]: > > - Rebased over [3]. > - Rename mtd_bread/bwrite -> mtd_blk_read/write. > - Fix GPL-2.0 license short name definiton in headers. > - Add empty line after MTD_ENTRY_NUMBERS define. > > Changes V3 -> V4 [4]: > > - Fix build warnings: use LBAF printf format string for lbaint_t types. > > Links: > > - [1] > https://lore.kernel.org/all/20240227100441.1811047-1-avroma...@salutedevices.com/ > - [2] > https://lore.kernel.org/all/20240227100441.1811047-5-avroma...@salutedevices.com/ > - [3] > https://lore.kernel.org/u-boot/20240403114047.84030-1-heinrich.schucha...@canonical.com/T/#u > - [4] > https://lore.kernel.org/all/20240404105813.1520732-1-avroma...@salutedevices.com/ > > > Alexey Romanov (3): > disk: support MTD partitions > drivers: introduce mtdblock abstraction > spinand: bind mtdblock > > disk/part.c | 3 +- > drivers/block/blk-uclass.c | 1 + > drivers/mtd/Kconfig | 1 + > drivers/mtd/Makefile| 1 + > drivers/mtd/mtdblock.c | 227 > drivers/mtd/mtdpart.c | 69 +++ > drivers/mtd/nand/spi/core.c | 20 > include/linux/mtd/mtd.h | 12 ++ > include/part.h | 3 + > 9 files changed, 336 insertions(+), 1 deletion(-) > create mode 100644 drivers/mtd/mtdblock.c > > -- > 2.34.1 > -- Dario Binacchi Senior Embedded Linux Developer dario.binac...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
Re: [PATCH] xilinx: Add option to load environment from outside of boot media
On 5/22/24 19:47, Vasileios Amoiridis wrote:
From: Vasileios Amoiridis
Currently, if the environment is not in the current boot media, the
env_get_location() is returning ENVL_UNKNOWN or ENVL_NOWHERE which
is not true (i.e booting from FLASH with environment in eMMC). This
commit adds an extra check to find the environment in the other
supported boot media, keeping the same priority as of now.
Signed-off-by: Vasileios Amoiridis
---
board/xilinx/versal-net/board.c | 21 +++--
board/xilinx/versal/board.c | 23 ---
board/xilinx/zynq/board.c | 31 +++
board/xilinx/zynqmp/zynqmp.c| 31 +++
4 files changed, 93 insertions(+), 13 deletions(-)
diff --git a/board/xilinx/versal-net/board.c b/board/xilinx/versal-net/board.c
index da03024e16..5648d6685e 100644
--- a/board/xilinx/versal-net/board.c
+++ b/board/xilinx/versal-net/board.c
@@ -372,6 +372,21 @@ void reset_cpu(void)
{
}
+static enum env_location env_locations[] = {
+#ifdef CONFIG_ENV_IS_IN_FAT
+ ENVL_FAT,
+#endif
+#ifdef CONFIG_ENV_IS_IN_EXT4
+ ENVL_EXT4,
+#endif
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ ENVL_SPI_FLASH,
+#endif
+#ifdef CONFIG_ENV_IS_NOWHERE
+ ENVL_NOWHERE,
+#endif
+};
+
#if defined(CONFIG_ENV_IS_NOWHERE)
enum env_location env_get_location(enum env_operation op, int prio)
{
@@ -389,17 +404,19 @@ enum env_location env_get_location(enum env_operation op,
int prio)
return ENVL_FAT;
if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
return ENVL_EXT4;
- return ENVL_NOWHERE;
+ break;
case OSPI_MODE:
case QSPI_MODE_24BIT:
case QSPI_MODE_32BIT:
if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
return ENVL_SPI_FLASH;
- return ENVL_NOWHERE;
+ break;
case JTAG_MODE:
case SELECTMAP_MODE:
default:
return ENVL_NOWHERE;
}
+
+ return env_locations[prio];
}
#endif
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 4f6d56119d..8aed2e97df 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -291,12 +291,27 @@ void reset_cpu(void)
{
}
+static enum env_location env_locations[] = {
+#ifdef CONFIG_ENV_IS_IN_FAT
+ ENVL_FAT,
+#endif
+#ifdef CONFIG_ENV_IS_IN_EXT4
+ ENVL_EXT4,
+#endif
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ ENVL_SPI_FLASH,
+#endif
+#ifdef CONFIG_ENV_IS_NOWHERE
+ ENVL_NOWHERE,
+#endif
+};
+
#if defined(CONFIG_ENV_IS_NOWHERE)
enum env_location env_get_location(enum env_operation op, int prio)
{
u32 bootmode = versal_get_bootmode();
- if (prio)
+ if (prio >= ARRAY_SIZE(env_locations))
return ENVL_UNKNOWN;
switch (bootmode) {
@@ -308,17 +323,19 @@ enum env_location env_get_location(enum env_operation op,
int prio)
return ENVL_FAT;
if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
return ENVL_EXT4;
- return ENVL_NOWHERE;
+ break;
case OSPI_MODE:
case QSPI_MODE_24BIT:
case QSPI_MODE_32BIT:
if (IS_ENABLED(CONFIG_ENV_IS_IN_SPI_FLASH))
return ENVL_SPI_FLASH;
- return ENVL_NOWHERE;
+ break;
case JTAG_MODE:
case SELECTMAP_MODE:
default:
return ENVL_NOWHERE;
}
+
+ return env_locations[prio];
}
#endif
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 6c36591001..6fa5016cdd 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -134,11 +134,32 @@ int dram_init(void)
}
#endif
+static enum env_location env_locations[] = {
+#ifdef CONFIG_ENV_IS_IN_FAT
+ ENVL_FAT,
+#endif
+#ifdef CONFIG_ENV_IS_IN_EXT4
+ ENVL_EXT4,
+#endif
+#ifdef CONFIG_ENV_IS_IN_NAND
+ ENVL_NAND,
+#endif
+#ifdef CONFIG_ENV_IS_IN_UBI
+ ENVL_UBI,
+#endif
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ ENVL_SPI_FLASH,
+#endif
+#ifdef CONFIG_ENV_IS_NOWHERE
+ ENVL_NOWHERE,
+#endif
+};
+
enum env_location env_get_location(enum env_operation op, int prio)
{
u32 bootmode = zynq_slcr_get_boot_mode() & ZYNQ_BM_MASK;
- if (prio)
+ if (prio >= ARRAY_SIZE(env_locations))
return ENVL_UNKNOWN;
switch (bootmode) {
@@ -147,22 +168,24 @@ enum env_location env_get_location(enum env_operation op,
int prio)
return ENVL_FAT;
if (IS_ENABLED(CONFIG_ENV_IS_IN_EXT4))
return ENVL_EXT4;
- return ENVL_NOWHERE;
+ break;
case ZYNQ_BM_NAND:
if (IS_ENABLED(CONFIG_ENV_IS_IN_NAND))
return ENVL_NAND;
if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
