[U-Boot] [PATCH 6/8] Adds wait to atmel_usart serial_init function

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Adds a short busy loop wait to the atmel_usart.c serial_init()
function.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 drivers/serial/atmel_usart.c |6 ++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/drivers/serial/atmel_usart.c b/drivers/serial/atmel_usart.c
index e326b2b..e355706 100644
--- a/drivers/serial/atmel_usart.c
+++ b/drivers/serial/atmel_usart.c
@@ -47,6 +47,8 @@ void serial_setbrg(void)
 
 int serial_init(void)
 {
+
+   volatile int i = 0;
atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE;
 
writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), usart-cr);
@@ -61,6 +63,10 @@ int serial_init(void)
   | USART3_BF(NBSTOP, USART3_NBSTOP_1)),
   usart-mr);
 
+   /* Short wait to let the serial port init. */
+   for (; i  1; i++)
+   ;
+
return 0;
 }
 
-- 
1.7.4.4

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[U-Boot] [PATCH 3/8] Fix compile problem for some boards in the clock code.

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Some boards use AT91_SLOW_CLOCK and other use
CONFIG_SYS_AT91_SLOW_CLOCK. This patch makes it so the arm926ejs
clock code will return which ever is set.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 arch/arm/cpu/arm926ejs/at91/clock.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/at91/clock.c 
b/arch/arm/cpu/arm926ejs/at91/clock.c
index 608af2c..0083bd2 100644
--- a/arch/arm/cpu/arm926ejs/at91/clock.c
+++ b/arch/arm/cpu/arm926ejs/at91/clock.c
@@ -57,7 +57,11 @@ static unsigned long at91_css_to_rate(unsigned long css)
 {
switch (css) {
case AT91_PMC_MCKR_CSS_SLOW:
+#ifdef AT91_SLOW_CLOCK
+   return AT91_SLOW_CLOCK;
+#else
return CONFIG_SYS_AT91_SLOW_CLOCK;
+#endif
case AT91_PMC_MCKR_CSS_MAIN:
return gd-main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
-- 
1.7.4.4

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[U-Boot] [PATCH 8/8] Updates the boards.cfg file

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Add the default generic at91sam9m10g45ek_config target to the new
config system. Not all possible configurations of u-boot for the
at91sam9m10g45ek are included yet. Add them as needed.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 boards.cfg |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/boards.cfg b/boards.cfg
index dfefc3f..470bc18 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -72,6 +72,7 @@ netstar  arm arm925t
 voicebluearm arm925t
 omap1510inn  arm arm925t -   ti
 aspenite arm arm926ejs   -   
Marvellarmada100
+at91sam9m10g45ek arm arm926ejs   at91sam9m10g45ek   atmel  
at91
 afeb9260 arm arm926ejs   -   - 
 at91
 at91cap9adk  arm arm926ejs   -   atmel 
 at91
 at91sam9260ek_nandflash  arm arm926ejs   at91sam9260ek   atmel 
 at91at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
-- 
1.7.4.4

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[U-Boot] [PATCH 1/8] Remove old config stuff from Makefile

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Start the process of pushing the at91sam9m10g45ek* boards to
the new builds.cfg configuration style. At the moment just the
generic config is available, add the rest as necessary.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 Makefile |   21 -
 1 files changed, 0 insertions(+), 21 deletions(-)

diff --git a/Makefile b/Makefile
index 3454db6..63acc94 100644
--- a/Makefile
+++ b/Makefile
@@ -850,27 +850,6 @@ at91sam9rlek_config:   unconfig
fi;
@$(MKCONFIG) -n $@ -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
 
-at91sam9m10g45ek_nandflash_config \
-at91sam9m10g45ek_dataflash_config \
-at91sam9m10g45ek_dataflash_cs0_config \
-at91sam9m10g45ek_config \
-at91sam9g45ekes_nandflash_config \
-at91sam9g45ekes_dataflash_config \
-at91sam9g45ekes_dataflash_cs0_config \
-at91sam9g45ekes_config :   unconfig
-   @mkdir -p $(obj)include
-   @if [ $(findstring 9m10,$@) ] ; then \
-   echo #define CONFIG_AT91SAM9M10G45EK 1
$(obj)include/config.h ; \
-   else \
-   echo #define CONFIG_AT91SAM9G45EKES 1 
$(obj)include/config.h ; \
-   fi;
-   @if [ $(findstring _nandflash,$@) ] ; then \
-   echo #define CONFIG_SYS_USE_NANDFLASH 1   
$(obj)include/config.h ; \
-   else \
-   echo #define CONFIG_ATMEL_SPI 1   
$(obj)include/config.h ; \
-   fi;
-   @$(MKCONFIG) -n $@ -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek 
atmel at91
-
 pm9g45_config  :   unconfig
@mkdir -p $(obj)include
@$(MKCONFIG) -a pm9g45 arm arm926ejs pm9g45 ronetix at91
-- 
1.7.4.4

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[U-Boot] [PATCH 0/8] Fixes compilation for the at91sam9m10g45ek

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

This patch set fixes the at91sam9mg45ek build for my set up. I have
only been able to test this patch on my own NAND booting 
at91sam9m10g45ek. Dataflash and norflash are untested. Anyway,
this is a rough approximation of a patch; I would need more input
from people with nor-flash, working at91bootstrapers, dataflash,
etc before I can get truely generic working at91sam9m10g45ek board
support.

Also, some notes:

I wrote my own boot strapper because I could not find a working
boot strapper. The boot strappers I found on the web either had their
own issues or did not enable the second bank of RAM. Thus I wrote my
own that works and enables the second bank of RAM. The patch here
expects that the second bank works. If you are using a working
at91bootstrapper or the like, I don't think that should cause this
u-boot patch to not work; just set the number of banks back to 1 in
the config file.

If I am not alone in having trouble with the existing at91bootstrap
projects, maybe we could merge my bootstrapper into (or the preexisting
at91bootstrapper proejcts) into the NAND SPL (for NAND booting boards)
section of U-Boot?

Alex Waterman (8):
  Remove old config stuff from Makefile
  Update at91sam9m10g45_devices.c to fix compile errors.
  Fix compile problem for some boards in the clock code.
  Updates the at91sam9mg45_matrix.h header to new defines.
  Updates the board specific files for the at91sam9mg45ek.
  Adds wait to atmel_usart serial_init function
  Updates the at91sam9m10g45ek.h config file.
  Updates the boards.cfg file

 Makefile   |   21 ---
 .../cpu/arm926ejs/at91/at91sam9m10g45_devices.c|   26 ++--
 arch/arm/cpu/arm926ejs/at91/clock.c|4 +
 .../arm/include/asm/arch-at91/at91sam9g45_matrix.h |   84 +-
 board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c|  128 +++---
 board/atmel/at91sam9m10g45ek/led.c |6 +-
 boards.cfg |1 +
 drivers/serial/atmel_usart.c   |6 +
 include/configs/at91sam9m10g45ek.h |  188 
 9 files changed, 246 insertions(+), 218 deletions(-)

-- 
1.7.4.4

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[U-Boot] [PATCH 2/8] Update at91sam9m10g45_devices.c to fix compile errors.

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Move this file to the new ATMEL_BASE_* and ATMEL_ID_* defines.

Also fixed a problem appearing in the ethernet initialization where
the entire board was being reset, not just the ethernet controller.
This at least makes ethernet work on my board if the correct
environment (mac address, ip address, etc) is available on boot.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 .../cpu/arm926ejs/at91/at91sam9m10g45_devices.c|   26 ++--
 1 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c 
b/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
index 4ad9b1f..9ef8966 100644
--- a/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
+++ b/arch/arm/cpu/arm926ejs/at91/at91sam9m10g45_devices.c
@@ -26,42 +26,42 @@
 #include asm/arch/at91_common.h
 #include asm/arch/at91_pmc.h
 #include asm/arch/gpio.h
-#include asm/arch/io.h
+#include asm/io.h
 
 void at91_serial0_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTB, 19, 1);   /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTB, 18, 0);   /* RXD0 */
-   writel(1  AT91SAM9G45_ID_US0, pmc-pcer);
+   writel(1  ATMEL_ID_USART0, pmc-pcer);
 }
 
 void at91_serial1_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTB, 4, 1);/* TXD1 */
at91_set_a_periph(AT91_PIO_PORTB, 5, 0);/* RXD1 */
-   writel(1  AT91SAM9G45_ID_US1, pmc-pcer);
+   writel(1  ATMEL_ID_USART1, pmc-pcer);
 }
 
 void at91_serial2_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTD, 6, 1);/* TXD2 */
at91_set_a_periph(AT91_PIO_PORTD, 7, 0);/* RXD2 */
-   writel(1  AT91SAM9G45_ID_US2, pmc-pcer);
+   writel(1  ATMEL_ID_USART2, pmc-pcer);
 }
 
 void at91_serial3_hw_init(void)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTB, 12, 0);   /* DRXD */
at91_set_a_periph(AT91_PIO_PORTB, 13, 1);   /* DTXD */
-   writel(1  AT91_ID_SYS, pmc-pcer);
+   writel(1  ATMEL_ID_USART3, pmc-pcer);
 }
 
 void at91_serial_hw_init(void)
@@ -86,14 +86,14 @@ void at91_serial_hw_init(void)
 #ifdef CONFIG_ATMEL_SPI
 void at91_spi0_hw_init(unsigned long cs_mask)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTB, 0, 0);/* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 1, 0);/* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 2, 0);/* SPI0_SPCK */
 
/* Enable clock */
-   writel(1  AT91SAM9G45_ID_SPI0, pmc-pcer);
+   writel(1  ATMEL_ID_SPI0, pmc-pcer);
 
if (cs_mask  (1  0)) {
at91_set_a_periph(AT91_PIO_PORTB, 3, 0);
@@ -123,14 +123,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
 
 void at91_spi1_hw_init(unsigned long cs_mask)
 {
-   at91_pmc_t  *pmc= (at91_pmc_t *) AT91_PMC_BASE;
+   at91_pmc_t  *pmc= (at91_pmc_t *) ATMEL_BASE_PMC;
 
at91_set_a_periph(AT91_PIO_PORTB, 14, 0);   /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 15, 0);   /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 16, 0);   /* SPI1_SPCK */
 
/* Enable clock */
-   writel(1  AT91SAM9G45_ID_SPI1, pmc-pcer);
+   writel(1  ATMEL_ID_SPI1, pmc-pcer);
 
if (cs_mask  (1  0)) {
at91_set_a_periph(AT91_PIO_PORTB, 17, 0);
-- 
1.7.4.4

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[U-Boot] [PATCH 5/8] Updates the board specific files for the at91sam9mg45ek.

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Fixes the compile errors in the board specific initializations for
the at91sam9m10g45ek specific files.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c |  128 +++
 board/atmel/at91sam9m10g45ek/led.c  |6 +-
 2 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c 
b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
index f92b20f..f8e687e 100644
--- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
+++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
@@ -23,6 +23,7 @@
  */
 
 #include common.h
+#include asm/io.h
 #include asm/sizes.h
 #include asm/arch/at91sam9g45.h
 #include asm/arch/at91sam9_matrix.h
@@ -32,7 +33,6 @@
 #include asm/arch/at91_rstc.h
 #include asm/arch/clk.h
 #include asm/arch/gpio.h
-#include asm/arch/io.h
 #include asm/arch/hardware.h
 #include lcd.h
 #include atmel_lcdc.h
@@ -41,6 +41,14 @@
 #endif
 #include netdev.h
 
+/*
+ * arch/arm/include/asm/arch-at91/at91sam9g45.h defines ATMEL_BASE_SCM;
+ * however, other code still wants AT91_SMC instead. Likewise for the AT91_PMC
+ * definition.
+ */
+#define AT91_SMC   ATMEL_BASE_SMC
+#define AT91_PMC   ATMEL_BASE_PMC
+
 DECLARE_GLOBAL_DATA_PTR;
 
 /* - */
@@ -49,35 +57,35 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 
 #ifdef CONFIG_CMD_NAND
-static void at91sam9m10g45ek_nand_hw_init(void)
+void at91sam9m10g45ek_nand_hw_init(void)
 {
unsigned long csa;
 
/* Enable CS3 */
-   csa = at91_sys_read(AT91_MATRIX_EBICSA);
-   at91_sys_write(AT91_MATRIX_EBICSA,
-  csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
+   csa = readl(AT91_MATRIX_EBICSA);
+   writel(csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA, AT91_MATRIX_EBICSA);
 
/* Configure SMC CS3 for NAND/SmartMedia */
-   at91_sys_write(AT91_SMC_SETUP(3),
-  AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
-  AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
-   at91_sys_write(AT91_SMC_PULSE(3),
-  AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
-  AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(2));
-   at91_sys_write(AT91_SMC_CYCLE(3),
-  AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(4));
-   at91_sys_write(AT91_SMC_MODE(3),
-  AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
-  AT91_SMC_EXNWMODE_DISABLE |
+   writel(AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
+  AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0),
+  AT91_SMC_SETUP(3));
+   writel(AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
+  AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(2),
+  AT91_SMC_PULSE(3));
+
+   writel(AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(4),
+  AT91_SMC_CYCLE(3));
+   writel(AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
+  AT91_SMC_EXNWMODE_DISABLE |
 #ifdef CONFIG_SYS_NAND_DBW_16
   AT91_SMC_DBW_16 |
 #else /* CONFIG_SYS_NAND_DBW_8 */
   AT91_SMC_DBW_8 |
 #endif
-  AT91_SMC_TDF_(3));
+  AT91_SMC_TDF_(3),
+  AT91_SMC_MODE(3));
 
-   at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9G45_ID_PIOC);
+   writel(1  ATMEL_ID_PIOC, AT91_PMC_PCER);
 
/* Configure RDY/BSY */
at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
@@ -90,7 +98,7 @@ static void at91sam9m10g45ek_nand_hw_init(void)
 #ifdef CONFIG_CMD_USB
 static void at91sam9m10g45ek_usb_hw_init(void)
 {
-   at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9G45_ID_PIODE);
+   writel(1  ATMEL_ID_PIODE, AT91_PMC_PCER);
 
at91_set_gpio_output(AT91_PIN_PD1, 0);
at91_set_gpio_output(AT91_PIN_PD3, 0);
@@ -100,48 +108,13 @@ static void at91sam9m10g45ek_usb_hw_init(void)
 #ifdef CONFIG_MACB
 static void at91sam9m10g45ek_macb_hw_init(void)
 {
-   unsigned long rstc;
 
/* Enable clock */
-   at91_sys_write(AT91_PMC_PCER, 1  AT91SAM9G45_ID_EMAC);
-
-   /*
-* Disable pull-up on:
-*  RXDV (PA15) = PHY normal mode (not Test mode)
-*  ERX0 (PA12) = PHY ADDR0
-*  ERX1 (PA13) = PHY ADDR1 = PHYADDR = 0x0
-*
-* PHY has internal pull-down
-*/
-   writel(pin_to_mask(AT91_PIN_PA15) |
-  pin_to_mask(AT91_PIN_PA12) |
-  pin_to_mask(AT91_PIN_PA13),
-  pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
-
-   rstc = at91_sys_read(AT91_RSTC_MR);
-
-   /* Need to reset PHY - 500ms reset */
-   at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
-(AT91_RSTC_ERSTL  (0x0D  8)) |
-AT91_RSTC_URSTEN);
-
-   

[U-Boot] [PATCH 4/8] Updates the at91sam9mg45_matrix.h header to new defines.

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Moves the at91sam9g45_matrix.h header file to use the new
ATMEL_BASE_MATRIX define.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 .../arm/include/asm/arch-at91/at91sam9g45_matrix.h |   84 ++--
 1 files changed, 42 insertions(+), 42 deletions(-)

diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h 
b/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
index 1620e1b..9808e38 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
@@ -15,18 +15,18 @@
 #ifndef AT91SAM9G45_MATRIX_H
 #define AT91SAM9G45_MATRIX_H
 
-#define AT91_MATRIX_MCFG0  (AT91_MATRIX + 0x00)/* Master Configuration 
Register 0 */
-#define AT91_MATRIX_MCFG1  (AT91_MATRIX + 0x04)/* Master Configuration 
Register 1 */
-#define AT91_MATRIX_MCFG2  (AT91_MATRIX + 0x08)/* Master Configuration 
Register 2 */
-#define AT91_MATRIX_MCFG3  (AT91_MATRIX + 0x0C)/* Master Configuration 
Register 3 */
-#define AT91_MATRIX_MCFG4  (AT91_MATRIX + 0x10)/* Master Configuration 
Register 4 */
-#define AT91_MATRIX_MCFG5  (AT91_MATRIX + 0x14)/* Master Configuration 
Register 5 */
-#define AT91_MATRIX_MCFG6  (AT91_MATRIX + 0x18)/* Master Configuration 
Register 6 */
-#define AT91_MATRIX_MCFG7  (AT91_MATRIX + 0x1C)/* Master Configuration 
Register 7 */
-#define AT91_MATRIX_MCFG8  (AT91_MATRIX + 0x20)/* Master Configuration 
Register 8 */
-#define AT91_MATRIX_MCFG9  (AT91_MATRIX + 0x24)/* Master Configuration 
Register 9 */
-#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28)/* Master Configuration 
Register 10 */
-#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C)/* Master Configuration 
Register 11 */
+#define AT91_MATRIX_MCFG0  (ATMEL_BASE_MATRIX + 0x00)  /* Master 
Configuration Register 0 */
+#define AT91_MATRIX_MCFG1  (ATMEL_BASE_MATRIX + 0x04)  /* Master 
Configuration Register 1 */
+#define AT91_MATRIX_MCFG2  (ATMEL_BASE_MATRIX + 0x08)  /* Master 
Configuration Register 2 */
+#define AT91_MATRIX_MCFG3  (ATMEL_BASE_MATRIX + 0x0C)  /* Master 
Configuration Register 3 */
+#define AT91_MATRIX_MCFG4  (ATMEL_BASE_MATRIX + 0x10)  /* Master 
Configuration Register 4 */
+#define AT91_MATRIX_MCFG5  (ATMEL_BASE_MATRIX + 0x14)  /* Master 
Configuration Register 5 */
+#define AT91_MATRIX_MCFG6  (ATMEL_BASE_MATRIX + 0x18)  /* Master 
Configuration Register 6 */
+#define AT91_MATRIX_MCFG7  (ATMEL_BASE_MATRIX + 0x1C)  /* Master 
Configuration Register 7 */
+#define AT91_MATRIX_MCFG8  (ATMEL_BASE_MATRIX + 0x20)  /* Master 
Configuration Register 8 */
+#define AT91_MATRIX_MCFG9  (ATMEL_BASE_MATRIX + 0x24)  /* Master 
Configuration Register 9 */
+#define AT91_MATRIX_MCFG10 (ATMEL_BASE_MATRIX + 0x28)  /* Master 
Configuration Register 10 */
+#define AT91_MATRIX_MCFG11 (ATMEL_BASE_MATRIX + 0x2C)  /* Master 
Configuration Register 11 */
 #defineAT91_MATRIX_ULBT(7  0)/* Undefined 
Length Burst Type */
 #defineAT91_MATRIX_ULBT_INFINITE   (0  0)
 #defineAT91_MATRIX_ULBT_SINGLE (1  0)
@@ -37,14 +37,14 @@
 #defineAT91_MATRIX_ULBT_SIXTYFOUR  (6  0)
 #defineAT91_MATRIX_ULBT_128(7  0)
 
-#define AT91_MATRIX_SCFG0  (AT91_MATRIX + 0x40)/* Slave Configuration 
Register 0 */
-#define AT91_MATRIX_SCFG1  (AT91_MATRIX + 0x44)/* Slave Configuration 
Register 1 */
-#define AT91_MATRIX_SCFG2  (AT91_MATRIX + 0x48)/* Slave Configuration 
Register 2 */
-#define AT91_MATRIX_SCFG3  (AT91_MATRIX + 0x4C)/* Slave Configuration 
Register 3 */
-#define AT91_MATRIX_SCFG4  (AT91_MATRIX + 0x50)/* Slave Configuration 
Register 4 */
-#define AT91_MATRIX_SCFG5  (AT91_MATRIX + 0x54)/* Slave Configuration 
Register 5 */
-#define AT91_MATRIX_SCFG6  (AT91_MATRIX + 0x58)/* Slave Configuration 
Register 6 */
-#define AT91_MATRIX_SCFG7  (AT91_MATRIX + 0x5C)/* Slave Configuration 
Register 7 */
+#define AT91_MATRIX_SCFG0  (ATMEL_BASE_MATRIX + 0x40)  /* Slave 
Configuration Register 0 */
+#define AT91_MATRIX_SCFG1  (ATMEL_BASE_MATRIX + 0x44)  /* Slave 
Configuration Register 1 */
+#define AT91_MATRIX_SCFG2  (ATMEL_BASE_MATRIX + 0x48)  /* Slave 
Configuration Register 2 */
+#define AT91_MATRIX_SCFG3  (ATMEL_BASE_MATRIX + 0x4C)  /* Slave 
Configuration Register 3 */
+#define AT91_MATRIX_SCFG4  (ATMEL_BASE_MATRIX + 0x50)  /* Slave 
Configuration Register 4 */
+#define AT91_MATRIX_SCFG5  (ATMEL_BASE_MATRIX + 0x54)  /* Slave 
Configuration Register 5 */
+#define AT91_MATRIX_SCFG6  (ATMEL_BASE_MATRIX + 0x58)  /* Slave 
Configuration Register 6 */
+#define AT91_MATRIX_SCFG7  (ATMEL_BASE_MATRIX + 0x5C)  /* Slave 

[U-Boot] [PATCH 7/8] Updates the at91sam9m10g45ek.h config file.

2011-06-30 Thread Alex.Waterman.awaterman
From: Alex Waterman awater...@dawning.com

Moves to using newer defines and adds possible support for the
second bank of RAM (if so desired).

Also, some coding clean up: removed the needless define to 1s for
defines that just act as flags.

Signed-off-by: Alex Waterman awater...@dawning.com
---
 include/configs/at91sam9m10g45ek.h |  188 +--
 1 files changed, 113 insertions(+), 75 deletions(-)

diff --git a/include/configs/at91sam9m10g45ek.h 
b/include/configs/at91sam9m10g45ek.h
index de74dcf..5e02dde 100644
--- a/include/configs/at91sam9m10g45ek.h
+++ b/include/configs/at91sam9m10g45ek.h
@@ -27,48 +27,65 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+/*#define DEBUG*/
+
 #define CONFIG_AT91_LEGACY
+#define CONFIG_ATMEL_LEGACY
 
 /* ARM asynchronous clock */
-#define CONFIG_SYS_AT91_MAIN_CLOCK 1200/* from 12 MHz crystal 
*/
+#define CONFIG_SYS_AT91_MAIN_CLOCK 1200 /* from 12 MHz crystal */
+#define AT91_SLOW_CLOCK32768
 #define CONFIG_SYS_HZ  1000
 
-#define CONFIG_ARM926EJS   1   /* This is an ARM926EJS Core*/
-#ifdef CONFIG_AT91SAM9M10G45EK
-#define CONFIG_AT91SAM9M10G45  1   /* It's an Atmel AT91SAM9M10G45 SoC*/
-#else
-#define CONFIG_AT91SAM9G45 1   /* It's an Atmel AT91SAM9G45 SoC*/
-#endif
+#define CONFIG_AT91SAM9M10G45
+#define CONFIG_AT91FAMILY
 #define CONFIG_ARCH_CPU_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 #undef CONFIG_USE_IRQ  /* we don't need IRQ/FIQ stuff  */
 
-#define CONFIG_CMDLINE_TAG 1   /* enable passing of ATAGs  */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG  1
+#define CONFIGMDLINE_TAG   /* enable passing of ATAGs  */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
 
+#define ATMEL_PIO_PORTS5 /* 5 PIO ports. */
+#define CONFIG_SYS_SDRAM_BASE   0x7000
+
 /*
  * Hardware drivers
  */
-#define CONFIG_AT91_GPIO   1
-#define CONFIG_ATMEL_USART 1
+#define CONFIG_AT91_GPIO
+#define CONFIG_ATMEL_USART
 #undef CONFIG_USART0
 #undef CONFIG_USART1
 #undef CONFIG_USART2
-#define CONFIG_USART3  1   /* USART 3 is DBGU */
+#define CONFIG_USART3  /* USART 3 is DBGU */
+#define CONFIG_USART_BASE  0xee00 /* Use the DBGU hardware. */
+#define CONFIG_USART_ID10
+
+/*
+ * This needs to be defined for the OHCI code to work but it is defined as
+ * ATMEL_ID_UHPHS in the CPU specific header files.
+ */
+#define ATMEL_ID_UHP   ATMEL_ID_UHPHS
+
+/*
+ * Specify the clock enable bit in the PMC_SCER register.
+ */
+#define ATMEL_PMC_UHP  AT91SAM926x_PMC_UHP
 
 /* LCD */
-#define CONFIG_LCD 1
+#define CONFIG_LCD
 #define LCD_BPPLCD_COLOR8
-#define CONFIG_LCD_LOGO1
+#define CONFIG_LCD_LOGO
 #undef LCD_TEST_PATTERN
-#define CONFIG_LCD_INFO1
-#define CONFIG_LCD_INFO_BELOW_LOGO 1
-#define CONFIG_SYS_WHITE_ON_BLACK  1
-#define CONFIG_ATMEL_LCD   1
-#define CONFIG_ATMEL_LCD_RGB5651
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV   1
+#define CONFIG_LCD_INFO
+#define CONFIG_LCD_INFO_BELOW_LOGO
+#define CONFIG_SYS_WHITE_ON_BLACK
+#define CONFIG_ATMEL_LCD
+#define CONFIG_ATMEL_LCD_RGB565
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 /* board specific(not enough SRAM) */
 #define CONFIG_AT91SAM9G45_LCD_BASE0x73E0
 
@@ -82,10 +99,10 @@
 /*
  * BOOTP options
  */
-#define CONFIG_BOOTP_BOOTFILESIZE  1
-#define CONFIG_BOOTP_BOOTPATH  1
-#define CONFIG_BOOTP_GATEWAY   1
-#define CONFIG_BOOTP_HOSTNAME  1
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
 
 /*
  * Command line configuration.
@@ -98,35 +115,37 @@
 #undef CONFIG_CMD_AUTOSCRIPT
 #undef CONFIG_CMD_LOADS
 
-#define CONFIG_CMD_PING1
-#define CONFIG_CMD_DHCP1
-#define CONFIG_CMD_NAND1
-#define CONFIG_CMD_USB 1
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_USB
 
 /* SDRAM */
-#define CONFIG_NR_DRAM_BANKS   1
+#define CONFIG_NR_DRAM_BANKS   2
 #define PHYS_SDRAM 0x7000
 #define PHYS_SDRAM_SIZE0x0800  /* 128 megs */
+#define PHYS_SDRAM_2   0x2000
+#define PHYS_SDRAM_SIZE_2  0x0800  /* 128 megs */
 
 /* DataFlash */
 #ifdef CONFIG_ATMEL_SPI
 #define CONFIG_CMD_SF
 #define CONFIG_CMD_SPI
-#define CONFIG_SPI_FLASH   1
-#define CONFIG_SPI_FLASH_ATMEL 1
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_ATMEL
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
 #endif
 
 /* NOR flash, if populated */
-#ifndef CONFIG_CMD_NAND
-#define CONFIG_SYS_NO_FLASH1
+#ifdef CONFIG_CMD_NAND
+#define