Re: [PATCH v2] net: tftp: Add client support for RFC 7440

[Beniamino Galvani]

On Sat, May 16, 2020 at 10:49:50PM +0300, Ramon Fried wrote:
> [...]
> index be9e6391d6..b85b44201f 100644
> --- a/README
> +++ b/README
> @@ -3522,6 +3522,11 @@ List of environment variables (most likely not 
> complete):
> downloads succeed with high packet loss rates, or with
> unreliable TFTP servers or client hardware.
>  
> +  tftpwindowsize - if this is set, the value is used for TFTP's
> +   window size as described by RFC 7440.
> +   This means that count of blocks we can receive before
> +   sending ack to server.

that -> the ?

> +
>vlan   - When set to a value < 4095 the traffic over
> Ethernet is encapsulated/received over 802.1q
> VLAN tagged frames.
> diff --git a/net/tftp.c b/net/tftp.c
> index be24e63075..e2c005da6e 100644
> --- a/net/tftp.c
> +++ b/net/tftp.c
> @@ -5,7 +5,6 @@
>   * Copyright 2011 Comelit Group SpA,
>   *Luca Ceresoli 
>   */
> -
>  #include 
>  #include 
>  #include 
> @@ -95,6 +94,12 @@ static int tftp_tsize;
>  /* The number of hashes we printed */
>  static short tftp_tsize_num_hash;
>  #endif
> +/* The window size neogiciated */

neogiciated -> negotiated

> +static ushorttftp_windowsize;
> +/* Next block to send ack to */
> +static ushorttftp_next_ack;
> +/* Last nack block we send */
> +static ushorttftp_last_nack;
>  #ifdef CONFIG_CMD_TFTPPUT
>  /* 1 if writing, else 0 */
>  static int   tftp_put_active;
> @@ -134,8 +139,19 @@ static char tftp_filename[MAX_LEN];
>   * (but those using CONFIG_IP_DEFRAG may want to set a larger block in cfg 
> file)
>   */
>  
> +/* When windowsize is defined to 1,
> + * tftp behaves the same way as it was
> + * never declared
> + */
> +#ifdef CONFIG_TFTP_WINDOWSIZE

I'm not sure what's the policy but I think that new CONFIG_ options
should be added to a Kconfig file.

> +#define TFTP_WINDOWSIZE CONFIG_TFTP_WINDOWSIZE
> +#else
> +#define TFTP_WINDOWSIZE 1
> +#endif
> +
>  static unsigned short tftp_block_size = TFTP_BLOCK_SIZE;
>  static unsigned short tftp_block_size_option = CONFIG_TFTP_BLOCKSIZE;
> +static unsigned short tftp_window_size_option = TFTP_WINDOWSIZE;
>  
>  static inline int store_block(int block, uchar *src, unsigned int len)
>  {
> @@ -348,6 +364,14 @@ static void tftp_send(void)
>   /* try for more effic. blk size */
>   pkt += sprintf((char *)pkt, "blksize%c%d%c",
>   0, tftp_block_size_option, 0);
> +
> + /* try for more effic. window size.
> +  * Implemented only for tftp get.
> +  * Don't bother sending if it's 1
> +  */
> + if (tftp_state == STATE_SEND_RRQ && tftp_window_size_option > 1)
> + pkt += sprintf((char *)pkt, "windowsize%c%d%c",
> + 0, tftp_window_size_option, 0);
>   len = pkt - xp;
>   break;
>  
> @@ -500,6 +524,15 @@ static void tftp_handler(uchar *pkt, unsigned dest, 
> struct in_addr sip,
> (char *)pkt + i + 6, tftp_tsize);
>   }
>  #endif
> + if (strcmp((char *)pkt + i,  "windowsize") == 0) {
> + tftp_windowsize =
> + simple_strtoul((char *)pkt + i + 11,
> +NULL, 10);
> + debug("windowsize = %s, %d\n",
> +   (char *)pkt + i + 11, tftp_windowsize);
> + }
> +
> + tftp_next_ack = tftp_windowsize;

This assignment can be moved outside of the for loop.

>   }
>  #ifdef CONFIG_CMD_TFTPPUT
>   if (tftp_put_active) {
> @@ -514,6 +547,26 @@ static void tftp_handler(uchar *pkt, unsigned dest, 
> struct in_addr sip,
>   if (len < 2)
>   return;
>   len -= 2;
> +
> + if (ntohs(*(__be16 *)pkt) != (ushort)(tftp_cur_block + 1)) {
> + debug("Received unexpected block: %d, expected: %d\n",
> +   ntohs(*(__be16 *)pkt),
> +   (ushort)(tftp_cur_block + 1));
> + /*
> +  * If one packet is dropped most likely
> +  * all other buffers in the window
> +  * that will arrive will cause a sending NACK.
> +  * This just overwellms the server, let's just send one.
> +  */
> + if (tftp_last_nack != tftp_cur_block) {
> + tftp_send();
> + tftp_last_nack = tftp_cur_block;
> + tftp_next_ack = (ushort)(tftp_cur_block +
> +  tftp_windowsize);

Here neither tftp_cur_block nor 

Re: [PATCH 2/2] odroid-c2: enable USB host controller

[Beniamino Galvani]

On Sun, Aug 18, 2019 at 03:42:55PM +0200, Beniamino Galvani wrote:
> Enable the second USB controller, which is connected to a hub with 4
> ports. The first controller is for the OTG port and is currently not
> supported.
> 
> Signed-off-by: Beniamino Galvani 
> ---
>  arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 8 
>  configs/odroid-c2_defconfig  | 7 +++
>  include/configs/meson64.h| 5 +
>  3 files changed, 20 insertions(+)
> 
> diff --git a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi 
> b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
> index c35158d7e9..484b40504d 100644
> --- a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
> +++ b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
> @@ -5,3 +5,11 @@
>   */
>  
>  #include "meson-gx-u-boot.dtsi"
> +
> + {
> + status = "disabled";
> +};
> +
> + {
> + hnp-srp-disable;
> +};
> diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
> index 8849058d33..366ea125af 100644
> --- a/configs/odroid-c2_defconfig
> +++ b/configs/odroid-c2_defconfig
> @@ -16,6 +16,7 @@ CONFIG_CMD_GPIO=y
>  CONFIG_CMD_I2C=y
>  # CONFIG_CMD_LOADS is not set
>  CONFIG_CMD_MMC=y
> +CONFIG_CMD_USB=y
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_CMD_REGULATOR=y
>  CONFIG_OF_CONTROL=y
> @@ -29,13 +30,19 @@ CONFIG_MMC_MESON_GX=y
>  CONFIG_PHY_REALTEK=y
>  CONFIG_DM_ETH=y
>  CONFIG_ETH_DESIGNWARE=y
> +CONFIG_PHY=y
> +CONFIG_MESON_GXBB_USB_PHY=y
>  CONFIG_PINCTRL=y
>  CONFIG_PINCTRL_MESON_GXBB=y
>  CONFIG_DM_REGULATOR=y
>  CONFIG_DM_REGULATOR_FIXED=y
> +CONFIG_DM_REGULATOR_GPIO=y
>  CONFIG_DM_RESET=y
>  CONFIG_DEBUG_UART_MESON=y
>  CONFIG_DEBUG_UART_ANNOUNCE=y
>  CONFIG_DEBUG_UART_SKIP_INIT=y
>  CONFIG_MESON_SERIAL=y
> +CONFIG_USB=y
> +CONFIG_DM_USB=y
> +CONFIG_USB_DWC2=y
>  CONFIG_OF_LIBFDT_OVERLAY=y
> diff --git a/include/configs/meson64.h b/include/configs/meson64.h
> index f8d3eee292..483a8f567c 100644
> --- a/include/configs/meson64.h
> +++ b/include/configs/meson64.h
> @@ -16,6 +16,11 @@
>  #define GICC_BASE0xc4302000
>  #endif
>  
> +/* USB */
> +#if defined(CONFIG_MESON_GXBB)
> +#define CONFIG_DWC2_UTMI_WIDTH   16
> +#endif

Hi Neil,

I noticed this change to the bus width configuration isn't actually
needed. The USB port works with or without it. The kernel driver
doesn't set 16bit mode, so can you please remove these 4 lines from
the commit before sending the pull request?

Thanks,
Beniamino

Re: [PATCH 0/2] u-boot support for ODROID-C4

[Beniamino Galvani]

On Wed, May 06, 2020 at 09:59:17AM +0200, Neil Armstrong wrote:
> Hi Beniamino,
> 
> On 05/05/2020 22:22, Beniamino Galvani wrote:
> > Hi,
> > 
> > these two patches add initial u-boot support for Hardkernel ODROID-C4.
> 
> Thanks for the patchset, I already have one in my test tree, by you did beat 
> me
> by sending it to the list !

Oh, I didn't notice, sorry.

> > https://wiki.odroid.com/odroid-c4/odroid-c4
> > 
> > Beniamino Galvani (2):
> >   arm: dts: import ODROID-C4 device tree
> 
> The DT is not yet applied by kevin, thus I'll prefer waiting it to be accepted
> and merged in a stable linux tree to keep DT synced.
> 
> >   boards: amlogic: add ODROID-C4 support
> 
> Please re-use the w400 board instead of adding a new board, there is no need 
> for a new
> one until you'll need to add more functionalities.
> 
> I know meson_generate_serial_ethaddr() is absent from w400, I'll add it 
> shortly.

Okay, I'll wait that the DT gets merged and then will resubmit using w400.

Thanks,
Beniamino

[PATCH 2/2] boards: amlogic: add ODROID-C4 support

[Beniamino Galvani]

Introduce support for ODROID-C4, a single board computer manufactured
by Hardkernel Co. Ltd with the following specifications:

 - Amlogic S905X3 ARM Cortex-A55 quad-core SoC
 - 4GiB DDR4 SDRAM
 - Gigabit Ethernet (External Realtek RTL8211F PHY)
 - 4 x USB 3.0 Host ports
 - 1 x USB 2.0 OTG port
 - HDMI 2.0
 - eMMC
 - SDcard
 - 40-pin GPIO header
 - Infrared receiver

Signed-off-by: Beniamino Galvani 
---
 board/amlogic/odroid-c4/MAINTAINERS |  6 +++
 board/amlogic/odroid-c4/Makefile|  3 ++
 board/amlogic/odroid-c4/README  | 83 +
 board/amlogic/odroid-c4/odroid-c4.c | 17 ++
 configs/odroid-c4_defconfig | 63 ++
 5 files changed, 172 insertions(+)
 create mode 100644 board/amlogic/odroid-c4/MAINTAINERS
 create mode 100644 board/amlogic/odroid-c4/Makefile
 create mode 100644 board/amlogic/odroid-c4/README
 create mode 100644 board/amlogic/odroid-c4/odroid-c4.c
 create mode 100644 configs/odroid-c4_defconfig

diff --git a/board/amlogic/odroid-c4/MAINTAINERS 
b/board/amlogic/odroid-c4/MAINTAINERS
new file mode 100644
index 00..ebc1a9efe5
--- /dev/null
+++ b/board/amlogic/odroid-c4/MAINTAINERS
@@ -0,0 +1,6 @@
+ODROID-C4
+M: Beniamino Galvani 
+S: Maintained
+L: u-boot-amlo...@groups.io
+F: board/amlogic/odroid-c4/
+F: configs/odroid-c4_defconfig
diff --git a/board/amlogic/odroid-c4/Makefile b/board/amlogic/odroid-c4/Makefile
new file mode 100644
index 00..a0ca5fb242
--- /dev/null
+++ b/board/amlogic/odroid-c4/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0+
+
+obj-y  := odroid-c4.o
diff --git a/board/amlogic/odroid-c4/README b/board/amlogic/odroid-c4/README
new file mode 100644
index 00..9308965738
--- /dev/null
+++ b/board/amlogic/odroid-c4/README
@@ -0,0 +1,83 @@
+U-Boot for ODROID-C4
+
+
+ODROID-C4 is a single board computer manufactured by Hardkernel
+Co. Ltd with the following specifications:
+
+ - Amlogic S905X3 ARM Cortex-A55 quad-core SoC
+ - 4GiB DDR4 SDRAM
+ - Gigabit Ethernet (External Realtek RTL8211F PHY)
+ - 4 x USB 3.0 Host ports
+ - 1 x USB 2.0 OTG port
+ - HDMI 2.0
+ - eMMC
+ - SDcard
+ - 40-pin GPIO header
+ - Infrared receiver
+
+Currently the u-boot port supports the following devices:
+ - Serial
+ - Clock controller
+ - USB
+
+u-boot compilation
+==
+
+ export ARCH=arm
+ export CROSS_COMPILE=aarch64-none-elf-
+ make odroid-c4_defconfig
+ make
+
+Image creation
+==
+
+Amlogic doesn't provide sources for the firmware and for tools needed
+to create the bootloader image, so it is necessary to obtain them from
+the git tree published by the board vendor:
+
+ wget 
https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ wget 
https://releases.linaro.org/archive/14.04/components/toolchain/binaries/gcc-linaro-arm-none-eabi-4.8-2014.04_linux.tar.xz
+ tar xf gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz
+ tar xf gcc-linaro-arm-none-eabi-4.8-2014.04_linux.tar.xz
+ export 
PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2014.04_linux/bin:$PATH
+ git clone --depth 1 https://github.com/hardkernel/u-boot.git -b 
odroidg12-v2015.01 hardkernel-u-boot
+ cd hardkernel-u-boot
+ make odroidc4_defconfig
+ make
+ export UBOOTDIR=$PWD
+
+Go back to mainline U-Boot source tree and then:
+
+ mkdir fip
+ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl30sig --level v3 \
+ --input $UBOOTDIR/build/fip/bl30_new.bin \
+ --output fip/bl30_new.bin.g12.enc
+ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --type bl30 --level v3 \
+ --input fip/bl30_new.bin.g12.enc \
+ --output fip/bl30_new.bin.enc
+ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --type bl31 --level v3 \
+ --input $UBOOTDIR/fip/g12a/bl31.img \
+ --output fip/bl31.img.enc
+ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl3sig --type bl33 --level v3 \
+ --compress lz4 \
+ --input u-boot.bin \
+ --output fip/bl33.bin.enc
+ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bl2sig \
+ --input $UBOOTDIR/build/fip/bl2_new.bin \
+ --output fip/bl2.n.bin.sig
+ $UBOOTDIR/fip/g12a/aml_encrypt_g12a --bootmk \
+ --output fip/u-boot.bin \
+ --bl2 fip/bl2.n.bin.sig \
+ --bl30 fip/bl30_new.bin.enc \
+ --bl31 fip/bl31.img.enc \
+ --bl33 fip/bl33.bin.enc \
+ --ddrfw1 $UBOOTDIR/fip/g12a/ddr4_1d.fw

[PATCH 0/2] u-boot support for ODROID-C4

[Beniamino Galvani]

Hi,

these two patches add initial u-boot support for Hardkernel ODROID-C4.

https://wiki.odroid.com/odroid-c4/odroid-c4

Beniamino Galvani (2):
  arm: dts: import ODROID-C4 device tree
  boards: amlogic: add ODROID-C4 support

 arch/arm/dts/Makefile|   1 +
 arch/arm/dts/meson-sm1-odroid-c4.dts | 399 +++
 board/amlogic/odroid-c4/MAINTAINERS  |   6 +
 board/amlogic/odroid-c4/Makefile |   3 +
 board/amlogic/odroid-c4/README   |  83 ++
 board/amlogic/odroid-c4/odroid-c4.c  |  17 ++
 configs/odroid-c4_defconfig  |  63 +
 7 files changed, 572 insertions(+)
 create mode 100644 arch/arm/dts/meson-sm1-odroid-c4.dts
 create mode 100644 board/amlogic/odroid-c4/MAINTAINERS
 create mode 100644 board/amlogic/odroid-c4/Makefile
 create mode 100644 board/amlogic/odroid-c4/README
 create mode 100644 board/amlogic/odroid-c4/odroid-c4.c
 create mode 100644 configs/odroid-c4_defconfig

-- 
2.25.1

[PATCH 1/2] arm: dts: import ODROID-C4 device tree

[Beniamino Galvani]

Import the device tree for ODROID-C4 as submitted in [1].

[1] https://lkml.org/lkml/2020/4/24/535

Signed-off-by: Beniamino Galvani 
---
 arch/arm/dts/Makefile|   1 +
 arch/arm/dts/meson-sm1-odroid-c4.dts | 399 +++
 2 files changed, 400 insertions(+)
 create mode 100644 arch/arm/dts/meson-sm1-odroid-c4.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 559d3ab6a7..70ea72dfaf 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -161,6 +161,7 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-g12b-odroid-n2.dtb \
meson-g12b-a311d-khadas-vim3.dtb \
meson-sm1-khadas-vim3l.dtb \
+   meson-sm1-odroid-c4.dtb \
meson-sm1-sei610.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts 
b/arch/arm/dts/meson-sm1-odroid-c4.dts
new file mode 100644
index 00..4882c604a7
--- /dev/null
+++ b/arch/arm/dts/meson-sm1-odroid-c4.dts
@@ -0,0 +1,399 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Dongjin Kim 
+ */
+
+/dts-v1/;
+
+#include "meson-sm1.dtsi"
+#include 
+#include 
+
+/ {
+   compatible = "hardkernel,odroid-c4", "amlogic,sm1";
+   model = "Hardkernel ODROID-C4";
+
+   aliases {
+   serial0 = _AO;
+   ethernet0 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x4000>;
+   };
+
+   emmc_pwrseq: emmc-pwrseq {
+   compatible = "mmc-pwrseq-emmc";
+   reset-gpios = < BOOT_12 GPIO_ACTIVE_LOW>;
+   };
+
+   leds {
+   compatible = "gpio-leds";
+
+   led-blue {
+   color = ;
+   function = LED_FUNCTION_STATUS;
+   gpios = <_ao GPIOAO_11 GPIO_ACTIVE_HIGH>;
+   linux,default-trigger = "heartbeat";
+   panic-indicator;
+   };
+   };
+
+   tflash_vdd: regulator-tflash_vdd {
+   compatible = "regulator-fixed";
+
+   regulator-name = "TFLASH_VDD";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+
+   gpio = <_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
+   enable-active-high;
+   regulator-always-on;
+   };
+
+   tf_io: gpio-regulator-tf_io {
+   compatible = "regulator-gpio";
+
+   regulator-name = "TF_IO";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <330>;
+
+   gpios = <_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
+   gpios-states = <0>;
+
+   states = <330 0>,
+<180 1>;
+   };
+
+   flash_1v8: regulator-flash_1v8 {
+   compatible = "regulator-fixed";
+   regulator-name = "FLASH_1V8";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   vin-supply = <_3v3>;
+   regulator-always-on;
+   };
+
+   main_12v: regulator-main_12v {
+   compatible = "regulator-fixed";
+   regulator-name = "12V";
+   regulator-min-microvolt = <1200>;
+   regulator-max-microvolt = <1200>;
+   regulator-always-on;
+   };
+
+   vcc_5v: regulator-vcc_5v {
+   compatible = "regulator-fixed";
+   regulator-name = "5V";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   regulator-always-on;
+   vin-supply = <_12v>;
+   };
+
+   vcc_1v8: regulator-vcc_1v8 {
+   compatible = "regulator-fixed";
+   regulator-name = "VCC_1V8";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   vin-supply = <_3v3>;
+   regulator-always-on;
+   };
+
+   vcc_3v3: regulator-vcc_3v3 {
+   compatible = "regulator-fixed";
+   regulator-name = "VCC_3V3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_3v3>;
+   regulator-always-on;
+   /* FIXME: actually controlled by VDDCPU_B_EN */
+   };
+
+   vddcpu: regulator-vddcpu {
+  

Re: Enable USB host controller on Odroid-C2

[Beniamino Galvani]

On Fri, Mar 27, 2020 at 02:35:50PM +0100, Neil Armstrong wrote:
> Hi,
> 
> On 18/08/2019 15:42, Beniamino Galvani wrote:
> > Hi,
> > 
> > these two patches enable the USB host controller on Odroid-C2. The
> > first patch adds a PHY driver; the second one enables the necessary
> > configuration options and updates the device tree.
> > 
> > Note that the DWC2 driver currently does not support enabling PHYs
> > from the device tree and so the following series (still on review) is
> > needed as runtime requirement for the second patch:
> > 
> >  [PATCH 0/5] usb: host: dwc2: use driver model for PHY and CLOCK
> > 
> > Thanks,
> > Beniamino
> > 
> > Beniamino Galvani (2):
> >   phy: meson: add GXBB PHY driver
> >   odroid-c2: enable USB host controller
> > 
> >  arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi |   8 +
> >  configs/odroid-c2_defconfig  |   7 +
> >  drivers/phy/Kconfig  |   8 +
> >  drivers/phy/Makefile |   1 +
> >  drivers/phy/meson-gxbb-usb2.c| 235 +++
> >  include/configs/meson64.h|   5 +
> >  6 files changed, 264 insertions(+)
> >  create mode 100644 drivers/phy/meson-gxbb-usb2.c
> > 
> 
> Could you re-test with v6 of DWC2 patchset at 
> http://patchwork.ozlabs.org/project/uboot/list/?series=163388 ?

Hi,

I tested my two patches on top of Patrick's v6 and they still work as
expected.

Thanks,
Beniamino

[U-Boot] [PATCH 2/2] odroid-c2: enable USB host controller

[Beniamino Galvani]

Enable the second USB controller, which is connected to a hub with 4
ports. The first controller is for the OTG port and is currently not
supported.

Signed-off-by: Beniamino Galvani 
---
 arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi | 8 
 configs/odroid-c2_defconfig  | 7 +++
 include/configs/meson64.h| 5 +
 3 files changed, 20 insertions(+)

diff --git a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi 
b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
index c35158d7e9..484b40504d 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
+++ b/arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi
@@ -5,3 +5,11 @@
  */
 
 #include "meson-gx-u-boot.dtsi"
+
+ {
+   status = "disabled";
+};
+
+ {
+   hnp-srp-disable;
+};
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 8849058d33..366ea125af 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -16,6 +16,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_REGULATOR=y
 CONFIG_OF_CONTROL=y
@@ -29,13 +30,19 @@ CONFIG_MMC_MESON_GX=y
 CONFIG_PHY_REALTEK=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
+CONFIG_PHY=y
+CONFIG_MESON_GXBB_USB_PHY=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_MESON_GXBB=y
 CONFIG_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_RESET=y
 CONFIG_DEBUG_UART_MESON=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_DEBUG_UART_SKIP_INIT=y
 CONFIG_MESON_SERIAL=y
+CONFIG_USB=y
+CONFIG_DM_USB=y
+CONFIG_USB_DWC2=y
 CONFIG_OF_LIBFDT_OVERLAY=y
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index f8d3eee292..483a8f567c 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -16,6 +16,11 @@
 #define GICC_BASE  0xc4302000
 #endif
 
+/* USB */
+#if defined(CONFIG_MESON_GXBB)
+#define CONFIG_DWC2_UTMI_WIDTH 16
+#endif
+
 /* For splashscreen */
 #ifdef CONFIG_DM_VIDEO
 #define CONFIG_VIDEO_BMP_RLE8
-- 
2.21.0

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[U-Boot] [PATCH 1/2] phy: meson: add GXBB PHY driver

[Beniamino Galvani]

This adds support for the USB PHY found on Amlogic GXBB SoCs.

Signed-off-by: Beniamino Galvani 
---
 drivers/phy/Kconfig   |   8 ++
 drivers/phy/Makefile  |   1 +
 drivers/phy/meson-gxbb-usb2.c | 235 ++
 3 files changed, 244 insertions(+)
 create mode 100644 drivers/phy/meson-gxbb-usb2.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 3942f035eb..2190f6f970 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -154,6 +154,14 @@ config PHY_STM32_USBPHYC
  between an HS USB OTG controller and an HS USB Host controller,
  selected by an USB switch.
 
+config MESON_GXBB_USB_PHY
+   bool "Amlogic Meson GXBB USB PHY"
+   depends on PHY && ARCH_MESON && MESON_GXBB
+   imply REGMAP
+   help
+ This is the generic phy driver for the Amlogic Meson GXBB
+ USB2 PHY.
+
 config MESON_GXL_USB_PHY
bool "Amlogic Meson GXL USB PHYs"
depends on PHY && ARCH_MESON && (MESON_GXL || MESON_GXM)
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 3157f1b7ee..dde3b0ecef 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_STI_USB_PHY) += sti_usb_phy.o
 obj-$(CONFIG_PHY_RCAR_GEN2) += phy-rcar-gen2.o
 obj-$(CONFIG_PHY_RCAR_GEN3) += phy-rcar-gen3.o
 obj-$(CONFIG_PHY_STM32_USBPHYC) += phy-stm32-usbphyc.o
+obj-$(CONFIG_MESON_GXBB_USB_PHY) += meson-gxbb-usb2.o
 obj-$(CONFIG_MESON_GXL_USB_PHY) += meson-gxl-usb2.o meson-gxl-usb3.o
 obj-$(CONFIG_MESON_G12A_USB_PHY) += meson-g12a-usb2.o meson-g12a-usb3-pcie.o
 obj-$(CONFIG_MSM8916_USB_PHY) += msm8916-usbh-phy.o
diff --git a/drivers/phy/meson-gxbb-usb2.c b/drivers/phy/meson-gxbb-usb2.c
new file mode 100644
index 00..88c2ec69b2
--- /dev/null
+++ b/drivers/phy/meson-gxbb-usb2.c
@@ -0,0 +1,235 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Meson8, Meson8b and GXBB USB2 PHY driver
+ *
+ * Copyright (C) 2016 Martin Blumenstingl 
+ * Copyright (C) 2018 BayLibre, SAS
+ *
+ * Author: Beniamino Galvani 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define REG_CONFIG 0x00
+   #define REG_CONFIG_CLK_EN   BIT(0)
+   #define REG_CONFIG_CLK_SEL_MASK GENMASK(3, 1)
+   #define REG_CONFIG_CLK_DIV_MASK GENMASK(10, 4)
+   #define REG_CONFIG_CLK_32k_ALTSEL   BIT(15)
+   #define REG_CONFIG_TEST_TRIGBIT(31)
+
+#define REG_CTRL   0x04
+   #define REG_CTRL_SOFT_PRST  BIT(0)
+   #define REG_CTRL_SOFT_HRESETBIT(1)
+   #define REG_CTRL_SS_SCALEDOWN_MODE_MASK GENMASK(3, 2)
+   #define REG_CTRL_CLK_DET_RSTBIT(4)
+   #define REG_CTRL_INTR_SEL   BIT(5)
+   #define REG_CTRL_CLK_DETECTED   BIT(8)
+   #define REG_CTRL_SOF_SENT_RCVD_TGL  BIT(9)
+   #define REG_CTRL_SOF_TOGGLE_OUT BIT(10)
+   #define REG_CTRL_POWER_ON_RESET BIT(15)
+   #define REG_CTRL_SLEEPM BIT(16)
+   #define REG_CTRL_TX_BITSTUFF_ENN_H  BIT(17)
+   #define REG_CTRL_TX_BITSTUFF_ENNBIT(18)
+   #define REG_CTRL_COMMON_ON  BIT(19)
+   #define REG_CTRL_REF_CLK_SEL_MASK   GENMASK(21, 20)
+   #define REG_CTRL_REF_CLK_SEL_SHIFT  20
+   #define REG_CTRL_FSEL_MASK  GENMASK(24, 22)
+   #define REG_CTRL_FSEL_SHIFT 22
+   #define REG_CTRL_PORT_RESET BIT(25)
+   #define REG_CTRL_THREAD_ID_MASK GENMASK(31, 26)
+
+/* bits [31:26], [24:21] and [15:3] seem to be read-only */
+#define REG_ADP_BC 0x0c
+   #define REG_ADP_BC_VBUS_VLD_EXT_SEL BIT(0)
+   #define REG_ADP_BC_VBUS_VLD_EXT BIT(1)
+   #define REG_ADP_BC_OTG_DISABLE  BIT(2)
+   #define REG_ADP_BC_ID_PULLUPBIT(3)
+   #define REG_ADP_BC_DRV_VBUS BIT(4)
+   #define REG_ADP_BC_ADP_PRB_EN   BIT(5)
+   #define REG_ADP_BC_ADP_DISCHARGEBIT(6)
+   #define REG_ADP_BC_ADP_CHARGE   BIT(7)
+   #define REG_ADP_BC_SESS_END BIT(8)
+   #define REG_ADP_BC_DEVICE_SESS_VLD  BIT(9)
+   #define REG_ADP_BC_B_VALID  BIT(10)
+   #define REG_ADP_BC_A_VALID  BIT(11)
+   #define REG_ADP_BC_ID_DIG   BIT(12)
+   #define REG_ADP_BC_VBUS_VALID   BIT(13)
+   #define REG_ADP_BC_ADP_PROBEBIT(14)
+   #define REG_ADP_BC_ADP_SENSE 

[U-Boot] Enable USB host controller on Odroid-C2

[Beniamino Galvani]

Hi,

these two patches enable the USB host controller on Odroid-C2. The
first patch adds a PHY driver; the second one enables the necessary
configuration options and updates the device tree.

Note that the DWC2 driver currently does not support enabling PHYs
from the device tree and so the following series (still on review) is
needed as runtime requirement for the second patch:

 [PATCH 0/5] usb: host: dwc2: use driver model for PHY and CLOCK

Thanks,
Beniamino

Beniamino Galvani (2):
  phy: meson: add GXBB PHY driver
  odroid-c2: enable USB host controller

 arch/arm/dts/meson-gxbb-odroidc2-u-boot.dtsi |   8 +
 configs/odroid-c2_defconfig  |   7 +
 drivers/phy/Kconfig  |   8 +
 drivers/phy/Makefile |   1 +
 drivers/phy/meson-gxbb-usb2.c| 235 +++
 include/configs/meson64.h|   5 +
 6 files changed, 264 insertions(+)
 create mode 100644 drivers/phy/meson-gxbb-usb2.c

-- 
2.21.0

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Re: [U-Boot] [PATCH v2 u-boot 1/2] power: domain: Add the VPU Power Domain driver

[Beniamino Galvani]

On Mon, Aug 06, 2018 at 02:49:19PM +0200, Neil Armstrong wrote:
> The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
> Video Processing Unit.
> This patch implements support for this power domain in preparation of the
> future support for the Video display support in U-Boot.
> 
> This driver will depend on changes in the clock driver to handle the setup
> of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
> 
> Reviewed-by: Simon Glass 
> Signed-off-by: Neil Armstrong 
> ---
>  drivers/power/domain/Kconfig |   7 ++
>  drivers/power/domain/Makefile|   1 +
>  drivers/power/domain/meson-gx-pwrc-vpu.c | 198 
> +++
>  3 files changed, 206 insertions(+)
>  create mode 100644 drivers/power/domain/meson-gx-pwrc-vpu.c
> 
> diff --git a/drivers/power/domain/Kconfig b/drivers/power/domain/Kconfig
> index 7cfa761..4618847 100644
> --- a/drivers/power/domain/Kconfig
> +++ b/drivers/power/domain/Kconfig
> @@ -16,6 +16,13 @@ config BCM6328_POWER_DOMAIN
> Enable support for manipulating BCM6345 power domains via MMIO
> mapped registers.
>  
> +config MESON_GX_VPU_POWER_DOMAIN
> + bool "Enable Amlogic Meson GX VPU power domain driver"
> + depends on ARCH_MESON

Hi,

since the driver uses syscon_node_to_regmap() I think the Kconfig
entry should also 'select SYSCON'.

Beniamino
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[U-Boot] [PATCH u-boot 2/3] boards: amlogic: use common function for environment initialization

[Beniamino Galvani]

Clean up board files by moving the duplicate environment
initialization to arch code.

Signed-off-by: Beniamino Galvani 
---
 arch/arm/include/asm/arch-meson/sm.h  |  1 +
 arch/arm/mach-meson/sm.c  | 27 +++
 board/amlogic/khadas-vim/khadas-vim.c | 25 +
 board/amlogic/libretech-cc/libretech-cc.c | 25 +
 board/amlogic/nanopi-k2/nanopi-k2.c   | 25 +
 board/amlogic/odroid-c2/odroid-c2.c   | 25 +
 board/amlogic/p212/p212.c | 25 +
 7 files changed, 33 insertions(+), 120 deletions(-)

diff --git a/arch/arm/include/asm/arch-meson/sm.h 
b/arch/arm/include/asm/arch-meson/sm.h
index 83d6441803..db2be38fc5 100644
--- a/arch/arm/include/asm/arch-meson/sm.h
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -7,5 +7,6 @@
 #define __MESON_SM_H__
 
 ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+void meson_init_env_from_efuse(void);
 
 #endif /* __MESON_SM_H__ */
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index 0bba5e4a07..2628591fe6 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 
@@ -14,6 +15,11 @@
 #define FN_EFUSE_READ  0x8230
 #define FN_EFUSE_WRITE 0x8231
 
+#define EFUSE_SN_OFFSET20
+#define EFUSE_SN_SIZE  16
+#define EFUSE_MAC_OFFSET   52
+#define EFUSE_MAC_SIZE 6
+
 static void *shmem_input;
 static void *shmem_output;
 
@@ -54,3 +60,24 @@ ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, 
size_t size)
 
return regs.regs[0];
 }
+
+void meson_init_env_from_efuse(void)
+{
+   static u8 mac[EFUSE_MAC_SIZE];
+   char serial[EFUSE_SN_SIZE];
+   ssize_t len;
+
+   if (!eth_env_get_enetaddr("ethaddr", mac)) {
+   len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac, EFUSE_MAC_SIZE);
+   if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac))
+   eth_env_set_enetaddr("ethaddr", mac);
+   }
+
+   if (!env_get("serial#")) {
+   len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
+ EFUSE_SN_SIZE);
+   if (len == EFUSE_SN_SIZE)
+   env_set("serial#", serial);
+   }
+}
diff --git a/board/amlogic/khadas-vim/khadas-vim.c 
b/board/amlogic/khadas-vim/khadas-vim.c
index 692bf2add3..4483a96761 100644
--- a/board/amlogic/khadas-vim/khadas-vim.c
+++ b/board/amlogic/khadas-vim/khadas-vim.c
@@ -6,18 +6,12 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 
-#define EFUSE_SN_OFFSET20
-#define EFUSE_SN_SIZE  16
-#define EFUSE_MAC_OFFSET   52
-#define EFUSE_MAC_SIZE 6
-
 int board_init(void)
 {
return 0;
@@ -25,26 +19,9 @@ int board_init(void)
 
 int misc_init_r(void)
 {
-   u8 mac_addr[EFUSE_MAC_SIZE];
-   char serial[EFUSE_SN_SIZE];
-   ssize_t len;
-
meson_gx_eth_init(PHY_INTERFACE_MODE_RMII,
  MESON_GXL_USE_INTERNAL_RMII_PHY);
-
-   if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
-   len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
- mac_addr, EFUSE_MAC_SIZE);
-   if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
-   eth_env_set_enetaddr("ethaddr", mac_addr);
-   }
-
-   if (!env_get("serial#")) {
-   len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
- EFUSE_SN_SIZE);
-   if (len == EFUSE_SN_SIZE)
-   env_set("serial#", serial);
-   }
+   meson_init_env_from_efuse();
 
return 0;
 }
diff --git a/board/amlogic/libretech-cc/libretech-cc.c 
b/board/amlogic/libretech-cc/libretech-cc.c
index ccab1272c5..86b1d213ff 100644
--- a/board/amlogic/libretech-cc/libretech-cc.c
+++ b/board/amlogic/libretech-cc/libretech-cc.c
@@ -6,18 +6,12 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 
-#define EFUSE_SN_OFFSET20
-#define EFUSE_SN_SIZE  16
-#define EFUSE_MAC_OFFSET   52
-#define EFUSE_MAC_SIZE 6
-
 int board_init(void)
 {
return 0;
@@ -25,26 +19,9 @@ int board_init(void)
 
 int misc_init_r(void)
 {
-   u8 mac_addr[EFUSE_MAC_SIZE];
-   char serial[EFUSE_SN_SIZE];
-   ssize_t len;
-
meson_gx_eth_init(PHY_INTERFACE_MODE_RMII,
  MESON_GXL_USE_INTERNAL_RMII_PHY);
-
-   if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
-   len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
-

[U-Boot] [PATCH u-boot 1/3] boards: amlogic: remove ethernet gpio reset code from boards

[Beniamino Galvani]

The reset is already handled by the designware driver using
information from device tree.

Signed-off-by: Beniamino Galvani 
---
 board/amlogic/nanopi-k2/nanopi-k2.c | 6 --
 board/amlogic/odroid-c2/odroid-c2.c | 6 --
 2 files changed, 12 deletions(-)

diff --git a/board/amlogic/nanopi-k2/nanopi-k2.c 
b/board/amlogic/nanopi-k2/nanopi-k2.c
index 339dbb81db..ae29dd6fa4 100644
--- a/board/amlogic/nanopi-k2/nanopi-k2.c
+++ b/board/amlogic/nanopi-k2/nanopi-k2.c
@@ -30,12 +30,6 @@ int misc_init_r(void)
 
meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
 
-   /* Reset PHY on GPIOZ_14 */
-   clrbits_le32(GX_GPIO_EN(3), BIT(14));
-   clrbits_le32(GX_GPIO_OUT(3), BIT(14));
-   mdelay(10);
-   setbits_le32(GX_GPIO_OUT(3), BIT(14));
-
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
  mac_addr, EFUSE_MAC_SIZE);
diff --git a/board/amlogic/odroid-c2/odroid-c2.c 
b/board/amlogic/odroid-c2/odroid-c2.c
index c47b9ce9cb..2a2755c387 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -30,12 +30,6 @@ int misc_init_r(void)
 
meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
 
-   /* Reset PHY on GPIOZ_14 */
-   clrbits_le32(GX_GPIO_EN(3), BIT(14));
-   clrbits_le32(GX_GPIO_OUT(3), BIT(14));
-   mdelay(10);
-   setbits_le32(GX_GPIO_OUT(3), BIT(14));
-
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
  mac_addr, EFUSE_MAC_SIZE);
-- 
2.17.1

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[U-Boot] [PATCH u-boot 3/3] arm: meson: null-terminate the serial number

[Beniamino Galvani]

Terminate the serial number variable with null to avoid printing
trailing garbage.

Signed-off-by: Beniamino Galvani 
---
 arch/arm/mach-meson/sm.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
index 2628591fe6..23eafe87b4 100644
--- a/arch/arm/mach-meson/sm.c
+++ b/arch/arm/mach-meson/sm.c
@@ -64,7 +64,7 @@ ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, 
size_t size)
 void meson_init_env_from_efuse(void)
 {
static u8 mac[EFUSE_MAC_SIZE];
-   char serial[EFUSE_SN_SIZE];
+   char serial[EFUSE_SN_SIZE + 1];
ssize_t len;
 
if (!eth_env_get_enetaddr("ethaddr", mac)) {
@@ -77,7 +77,9 @@ void meson_init_env_from_efuse(void)
if (!env_get("serial#")) {
len = meson_sm_read_efuse(EFUSE_SN_OFFSET, serial,
  EFUSE_SN_SIZE);
-   if (len == EFUSE_SN_SIZE)
+   if (len == EFUSE_SN_SIZE) {
+   serial[EFUSE_SN_SIZE] = '\0';
env_set("serial#", serial);
+   }
}
 }
-- 
2.17.1

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[U-Boot] [PATCH u-boot 0/3] amlogic: clean up board files

[Beniamino Galvani]

Hi,

this series simplifies Amlogic board files by factorizing common code
and removing unneeded parts. Also, it fixes printing the serial
number read from efuse.

Beniamino Galvani (3):
  boards: amlogic: remove ethernet gpio reset code from boards
  boards: amlogic: use common function for environment initialization
  arm: meson: null-terminate the serial number

 arch/arm/include/asm/arch-meson/sm.h  |  1 +
 arch/arm/mach-meson/sm.c  | 29 +
 board/amlogic/khadas-vim/khadas-vim.c | 25 +-
 board/amlogic/libretech-cc/libretech-cc.c | 25 +-
 board/amlogic/nanopi-k2/nanopi-k2.c   | 31 +--
 board/amlogic/odroid-c2/odroid-c2.c   | 31 +--
 board/amlogic/p212/p212.c | 25 +-
 7 files changed, 35 insertions(+), 132 deletions(-)

-- 
2.17.1

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Re: [U-Boot] [PATCH u-boot 2/2] ARM: meson: Add cpu info display for GX SoCs

[Beniamino Galvani]

 u32 socinfo = readl(GX_AO_SEC_SD_CFG8);

Perhaps, add a blank line between declarations and code? checkpatch
issues a warning about this.

> + printf("CPU: Amlogic Meson %s (%s) rev %x:%x (%x:%x)\n",
> + socinfo_to_soc_id(socinfo),
> + socinfo_to_package_id(socinfo),
> + socinfo_to_major(socinfo),
> + socinfo_to_minor(socinfo),
> + socinfo_to_pack(socinfo),
> + socinfo_to_misc(socinfo));
> + return 0;
> +}
> +#endif /* CONFIG_DISPLAY_CPUINFO */
> diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig
> index a0b3f8d..970d373 100644
> --- a/configs/khadas-vim_defconfig
> +++ b/configs/khadas-vim_defconfig
> @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" khadas-vim"
>  CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim"
>  CONFIG_DEBUG_UART=y
>  CONFIG_OF_BOARD_SETUP=y
> -# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_CPUINFO=y
>  # CONFIG_DISPLAY_BOARDINFO is not set
>  # CONFIG_CMD_BDI is not set
>  # CONFIG_CMD_IMI is not set
> diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig
> index a7177b9..cfbba30 100644
> --- a/configs/libretech-cc_defconfig
> +++ b/configs/libretech-cc_defconfig
> @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" libretech-cc"
>  CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc"
>  CONFIG_DEBUG_UART=y
>  CONFIG_OF_BOARD_SETUP=y
> -# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_CPUINFO=y
>  # CONFIG_DISPLAY_BOARDINFO is not set
>  # CONFIG_CMD_BDI is not set
>  # CONFIG_CMD_IMI is not set
> diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
> index 49461aa..657b647 100644
> --- a/configs/odroid-c2_defconfig
> +++ b/configs/odroid-c2_defconfig
> @@ -7,7 +7,7 @@ CONFIG_IDENT_STRING=" odroid-c2"
>  CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
>  CONFIG_DEBUG_UART=y
>  CONFIG_OF_BOARD_SETUP=y
> -# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DISPLAY_CPUINFO=y
>  # CONFIG_DISPLAY_BOARDINFO is not set
>  # CONFIG_CMD_BDI is not set
>  # CONFIG_CMD_IMI is not set
> diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig
> index 810874d..251bf38 100644
> --- a/configs/odroid_defconfig
> +++ b/configs/odroid_defconfig
> @@ -56,3 +56,4 @@ CONFIG_USB_HOST_ETHER=y
>  CONFIG_USB_ETHER_SMSC95XX=y
>  CONFIG_LIB_HW_RAND=y
>  CONFIG_ERRNO_STR=y
> +CONFIG_DISPLAY_CPUINFO=y

Odroid is not an Amlogic board.

With these 2 issues fixed: Reviewed-by: Beniamino Galvani <b.galv...@gmail.com>

Beniamino
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Re: [U-Boot] [PATCH u-boot 1/2] ARM: meson: rename GXBB to GX

[Beniamino Galvani]

On Wed, Mar 28, 2018 at 11:54:36AM +0200, Neil Armstrong wrote:
> Taking into account the Amlogic Family name starts with GX, including
> the GXBB, GXL and GXM SoCs.
> 
> Signed-off-by: Neil Armstrong 

Hi,

looks good to me, but perhaps can you align again register values and
other macros in gx.h?

Beniamino
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Re: [U-Boot] [PATCH 0/4] Meson clock driver

[Beniamino Galvani]

2018-03-28 10:59 GMT+02:00 Neil Armstrong :

> Do you plan to re-send the driver soon ?

Yes, I plan to submit it again in the next days.

Beniamino
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[U-Boot] [PATCH 2/4] ARM: meson: add clock measurement function

[Beniamino Galvani]

Add add a function to measure the current clock rate.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/clock.h | 34 +
 arch/arm/mach-meson/Makefile|  2 +-
 arch/arm/mach-meson/clock.c | 45 +
 3 files changed, 80 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-meson/clock.h
 create mode 100644 arch/arm/mach-meson/clock.c

diff --git a/arch/arm/include/asm/arch-meson/clock.h 
b/arch/arm/include/asm/arch-meson/clock.h
new file mode 100644
index 00..b43b23386c
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/clock.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright 2017 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef _MESON_CLOCK_H_
+#define _MESON_CLOCK_H_
+
+/* CBUS clock measure registers */
+#define MSR_CLK_DUTY   0xc1108758
+#define MSR_CLK_REG0   0xc110875c
+#define MSR_CLK_REG1   0xc1108760
+#define MSR_CLK_REG2   0xc1108764
+
+#define CLK_GP0_PLL4
+#define CLK_GP1_PLL5
+#define CLK_81 7
+#define CLK_MMC23
+#define CLK_MOD_ETH_TX 40
+#define CLK_MOD_ETH_RX_RMII41
+#define CLK_FCLK_DIV5  43
+#define CLK_SD_EMMC_CLK_C  51
+#define CLK_SD_EMMC_CLK_B  52
+
+/* Clock gates */
+#define HHI_GCLK_MPEG0 0x140
+#define HHI_GCLK_MPEG1 0x144
+#define HHI_GCLK_MPEG2 0x148
+#define HHI_GCLK_OTHER 0x150
+#define HHI_GCLK_AO0x154
+
+ulong meson_measure_clk_rate(unsigned int clk);
+
+#endif
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index bf49b8b1e5..e7ea4fc5b0 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += board.o sm.o
+obj-y += board.o clock.o sm.o
diff --git a/arch/arm/mach-meson/clock.c b/arch/arm/mach-meson/clock.c
new file mode 100644
index 00..73be11e90d
--- /dev/null
+++ b/arch/arm/mach-meson/clock.c
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Clock rate measuring.
+ */
+
+#include 
+#include 
+#include 
+
+ulong meson_measure_clk_rate(unsigned int clk)
+{
+   ulong start;
+   ulong mhz;
+
+   writel(0, MSR_CLK_REG0);
+
+   /* Set the measurement gate to 64uS */
+   clrsetbits_le32(MSR_CLK_REG0, 0x, 64 - 1);
+   clrbits_le32(MSR_CLK_REG0,
+BIT(17) |  /* disable continuous measurement */
+BIT(18));  /* disable interrupts */
+   clrsetbits_le32(MSR_CLK_REG0,
+   GENMASK(20, 26),
+   clk << 20); /* select the clock */
+   setbits_le32(MSR_CLK_REG0,
+BIT(19) |  /* enable the clock */
+BIT(16));  /* enable measuring */
+
+   start = get_timer(0);
+   while (readl(MSR_CLK_REG0) & BIT(31)) {
+   if (get_timer(start) > 100) {
+   debug("could not measure clk %u rate\n", clk);
+   return -ETIMEDOUT;
+   }
+   }
+
+   /* Disable measuring */
+   clrbits_le32(MSR_CLK_REG0, BIT(16));
+
+   mhz = ((readl(MSR_CLK_REG2) + 31) & 0xf) >> 6;
+   return mhz * 100;
+}
-- 
2.14.3

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[U-Boot] [PATCH 4/4] meson: use the clock driver

[Beniamino Galvani]

Use the clk framework to initialize clocks from drivers that need them
instead of having hardcoded frequencies and initializations from board
code.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/gxbb.h | 10 --
 arch/arm/include/asm/arch-meson/i2c.h  | 11 ---
 board/amlogic/odroid-c2/odroid-c2.c|  4 +---
 board/amlogic/p212/p212.c  |  3 +--
 drivers/i2c/meson_i2c.c| 20 +---
 5 files changed, 19 insertions(+), 29 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-meson/i2c.h

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h 
b/arch/arm/include/asm/arch-meson/gxbb.h
index 95a6fe6998..48a2ab7425 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -40,14 +40,4 @@
 /* Ethernet memory power domain */
 #define GXBB_MEM_PD_REG_0_ETH_MASK (BIT(2) | BIT(3))
 
-/* Clock gates */
-#define GXBB_GCLK_MPEG_0   GXBB_HIU_ADDR(0x50)
-#define GXBB_GCLK_MPEG_1   GXBB_HIU_ADDR(0x51)
-#define GXBB_GCLK_MPEG_2   GXBB_HIU_ADDR(0x52)
-#define GXBB_GCLK_MPEG_OTHER   GXBB_HIU_ADDR(0x53)
-#define GXBB_GCLK_MPEG_AO  GXBB_HIU_ADDR(0x54)
-
-#define GXBB_GCLK_MPEG_0_I2C   BIT(9)
-#define GXBB_GCLK_MPEG_1_ETH   BIT(3)
-
 #endif /* __GXBB_H__ */
diff --git a/arch/arm/include/asm/arch-meson/i2c.h 
b/arch/arm/include/asm/arch-meson/i2c.h
deleted file mode 100644
index 783bc3786f..00
--- a/arch/arm/include/asm/arch-meson/i2c.h
+++ /dev/null
@@ -1,11 +0,0 @@
-/*
- * Copyright 2017 - Beniamino Galvani <b.galv...@gmail.com>
- *
- * SPDX-License-Identifier:GPL-2.0+
- */
-#ifndef _MESON_I2C_H_
-#define _MESON_I2C_H_
-
-#define MESON_I2C_CLK_RATE 16700
-
-#endif
diff --git a/board/amlogic/odroid-c2/odroid-c2.c 
b/board/amlogic/odroid-c2/odroid-c2.c
index a5ea8dc5af..833f01b4cf 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -34,9 +34,7 @@ int misc_init_r(void)
 GXBB_ETH_REG_0_PHY_CLK_EN |
 GXBB_ETH_REG_0_CLK_EN);
 
-   /* Enable power and clock gate */
-   setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
-   setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+   /* Enable power */
clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
 
/* Reset PHY on GPIOZ_14 */
diff --git a/board/amlogic/p212/p212.c b/board/amlogic/p212/p212.c
index ece8096c5c..907bbb286e 100644
--- a/board/amlogic/p212/p212.c
+++ b/board/amlogic/p212/p212.c
@@ -36,8 +36,7 @@ int misc_init_r(void)
out_le32(GXBB_ETH_REG_2, 0x10110181);
out_le32(GXBB_ETH_REG_3, 0xe40908ff);
 
-   /* Enable power and clock gate */
-   setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+   /* Enable power */
clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
 
if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
index 2434d9ed53..1d92b09c32 100644
--- a/drivers/i2c/meson_i2c.c
+++ b/drivers/i2c/meson_i2c.c
@@ -4,8 +4,8 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 #include 
-#include 
 #include 
+#include 
 #include 
 #include 
 
@@ -43,6 +43,7 @@ struct i2c_regs {
 };
 
 struct meson_i2c {
+   struct clk clk;
struct i2c_regs *regs;
struct i2c_msg *msg;
bool last;
@@ -209,9 +210,13 @@ static int meson_i2c_xfer(struct udevice *bus, struct 
i2c_msg *msg,
 static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
 {
struct meson_i2c *i2c = dev_get_priv(bus);
-   unsigned int clk_rate = MESON_I2C_CLK_RATE;
+   ulong clk_rate;
unsigned int div;
 
+   clk_rate = clk_get_rate(>clk);
+   if (IS_ERR_VALUE(clk_rate))
+   return -EINVAL;
+
div = DIV_ROUND_UP(clk_rate, speed * 4);
 
/* clock divider has 12 bits */
@@ -226,7 +231,7 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, 
unsigned int speed)
clrsetbits_le32(>regs->ctrl, REG_CTRL_CLKDIVEXT_MASK,
(div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
 
-   debug("meson i2c: set clk %u, src %u, div %u\n", speed, clk_rate, div);
+   debug("meson i2c: set clk %u, src %lu, div %u\n", speed, clk_rate, div);
 
return 0;
 }
@@ -234,6 +239,15 @@ static int meson_i2c_set_bus_speed(struct udevice *bus, 
unsigned int speed)
 static int meson_i2c_probe(struct udevice *bus)
 {
struct meson_i2c *i2c = dev_get_priv(bus);
+   int ret;
+
+   ret = clk_get_by_index(bus, 0, >clk);
+   if (ret < 0)
+   return ret;
+
+   ret = clk_enable(>clk);
+   if (ret)
+   return ret;
 
i2c->regs = dev_read_addr_ptr(bus);
clrbits_le32(>regs->ctrl, REG_CTRL_START);
-- 
2.14.3

_

[U-Boot] [PATCH 3/4] clk: add Amlogic meson clock driver

[Beniamino Galvani]

Introduce a basic clock driver for Amlogic Meson SoCs which supports
enabling/disabling clock gates and getting their frequency.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/mach-meson/Kconfig |   2 +
 drivers/clk/Makefile|   1 +
 drivers/clk/clk_meson.c | 196 
 3 files changed, 199 insertions(+)
 create mode 100644 drivers/clk/clk_meson.c

diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig
index d4bd230be3..7acee3bc5c 100644
--- a/arch/arm/mach-meson/Kconfig
+++ b/arch/arm/mach-meson/Kconfig
@@ -3,6 +3,7 @@ if ARCH_MESON
 config MESON_GXBB
bool "Support Meson GXBaby"
select ARM64
+   select CLK
select DM
select DM_SERIAL
help
@@ -12,6 +13,7 @@ config MESON_GXBB
 config MESON_GXL
bool "Support Meson GXL"
select ARM64
+   select CLK
select DM
select DM_SERIAL
help
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index bcc8f82fb6..67da27873d 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -7,6 +7,7 @@
 
 obj-$(CONFIG_$(SPL_TPL_)CLK) += clk-uclass.o clk_fixed_rate.o
 obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
+obj-$(CONFIG_ARCH_MESON) += clk_meson.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox.o
 obj-$(CONFIG_SANDBOX) += clk_sandbox_test.o
 obj-$(CONFIG_MACH_PIC32) += clk_pic32.o
diff --git a/drivers/clk/clk_meson.c b/drivers/clk/clk_meson.c
new file mode 100644
index 00..3cf9372e05
--- /dev/null
+++ b/drivers/clk/clk_meson.c
@@ -0,0 +1,196 @@
+/*
+ * (C) Copyright 2017 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct meson_clk {
+   void __iomem *addr;
+   ulong rate;
+};
+
+struct meson_gate {
+   unsigned int reg;
+   unsigned int bit;
+};
+
+#define MESON_GATE(id, _reg, _bit) \
+   [id] = {\
+   .reg = (_reg),  \
+   .bit = (_bit),  \
+   }
+
+struct meson_gate gates[] = {
+   /* Everything Else (EE) domain gates */
+   MESON_GATE(CLKID_DDR, HHI_GCLK_MPEG0, 0),
+   MESON_GATE(CLKID_DOS, HHI_GCLK_MPEG0, 1),
+   MESON_GATE(CLKID_ISA, HHI_GCLK_MPEG0, 5),
+   MESON_GATE(CLKID_PL301, HHI_GCLK_MPEG0, 6),
+   MESON_GATE(CLKID_PERIPHS, HHI_GCLK_MPEG0, 7),
+   MESON_GATE(CLKID_SPICC, HHI_GCLK_MPEG0, 8),
+   MESON_GATE(CLKID_I2C, HHI_GCLK_MPEG0, 9),
+   MESON_GATE(CLKID_SAR_ADC, HHI_GCLK_MPEG0, 10),
+   MESON_GATE(CLKID_SMART_CARD, HHI_GCLK_MPEG0, 11),
+   MESON_GATE(CLKID_RNG0, HHI_GCLK_MPEG0, 12),
+   MESON_GATE(CLKID_UART0, HHI_GCLK_MPEG0, 13),
+   MESON_GATE(CLKID_SDHC, HHI_GCLK_MPEG0, 14),
+   MESON_GATE(CLKID_STREAM, HHI_GCLK_MPEG0, 15),
+   MESON_GATE(CLKID_ASYNC_FIFO, HHI_GCLK_MPEG0, 16),
+   MESON_GATE(CLKID_SDIO, HHI_GCLK_MPEG0, 17),
+   MESON_GATE(CLKID_ABUF, HHI_GCLK_MPEG0, 18),
+   MESON_GATE(CLKID_HIU_IFACE, HHI_GCLK_MPEG0, 19),
+   MESON_GATE(CLKID_ASSIST_MISC, HHI_GCLK_MPEG0, 23),
+   MESON_GATE(CLKID_SD_EMMC_A, HHI_GCLK_MPEG0, 24),
+   MESON_GATE(CLKID_SD_EMMC_B, HHI_GCLK_MPEG0, 25),
+   MESON_GATE(CLKID_SD_EMMC_C, HHI_GCLK_MPEG0, 26),
+   MESON_GATE(CLKID_SPI, HHI_GCLK_MPEG0, 30),
+
+   MESON_GATE(CLKID_I2S_SPDIF, HHI_GCLK_MPEG1, 2),
+   MESON_GATE(CLKID_ETH, HHI_GCLK_MPEG1, 3),
+   MESON_GATE(CLKID_DEMUX, HHI_GCLK_MPEG1, 4),
+   MESON_GATE(CLKID_AIU_GLUE, HHI_GCLK_MPEG1, 6),
+   MESON_GATE(CLKID_IEC958, HHI_GCLK_MPEG1, 7),
+   MESON_GATE(CLKID_I2S_OUT, HHI_GCLK_MPEG1, 8),
+   MESON_GATE(CLKID_AMCLK, HHI_GCLK_MPEG1, 9),
+   MESON_GATE(CLKID_AIFIFO2, HHI_GCLK_MPEG1, 10),
+   MESON_GATE(CLKID_MIXER, HHI_GCLK_MPEG1, 11),
+   MESON_GATE(CLKID_MIXER_IFACE, HHI_GCLK_MPEG1, 12),
+   MESON_GATE(CLKID_ADC, HHI_GCLK_MPEG1, 13),
+   MESON_GATE(CLKID_BLKMV, HHI_GCLK_MPEG1, 14),
+   MESON_GATE(CLKID_AIU, HHI_GCLK_MPEG1, 15),
+   MESON_GATE(CLKID_UART1, HHI_GCLK_MPEG1, 16),
+   MESON_GATE(CLKID_G2D, HHI_GCLK_MPEG1, 20),
+   MESON_GATE(CLKID_USB0, HHI_GCLK_MPEG1, 21),
+   MESON_GATE(CLKID_USB1, HHI_GCLK_MPEG1, 22),
+   MESON_GATE(CLKID_RESET, HHI_GCLK_MPEG1, 23),
+   MESON_GATE(CLKID_NAND, HHI_GCLK_MPEG1, 24),
+   MESON_GATE(CLKID_DOS_PARSER, HHI_GCLK_MPEG1, 25),
+   MESON_GATE(CLKID_USB, HHI_GCLK_MPEG1, 26),
+   MESON_GATE(CLKID_VDIN1, HHI_GCLK_MPEG1, 28),
+   MESON_GATE(CLKID_AHB_ARB0, HHI_GCLK_MPEG1, 29),
+   MESON_GATE(CLKID_EFUSE, HHI_GCLK_MPEG1, 30),
+   MESON_GATE(CLKID_BOOT_ROM, HHI_GCLK_MPEG1, 31),
+
+   MESON_GATE(CLKID_AHB_DATA_BUS, HHI_GCLK_MPEG2, 1),
+   MESON_GATE(CLKID_AHB_CTRL_BUS, HHI_GCLK_MPEG2, 2),
+   MESON_GATE(CLKID_HDMI_INTR_SYNC, HHI_GCLK_MPEG2, 3),
+   MESON_GATE(CLKID_HDMI_PCLK, HHI_GC

[U-Boot] [PATCH 1/4] ARM: dts: update gxbb-clkc.h from Linux 4.14

[Beniamino Galvani]

Update gxbb-clkc.h from Linux 4.14 as it contains new clock ids.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 include/dt-bindings/clock/gxbb-clkc.h | 75 +++
 1 file changed, 75 insertions(+)

diff --git a/include/dt-bindings/clock/gxbb-clkc.h 
b/include/dt-bindings/clock/gxbb-clkc.h
index e3e9f7919c..8ba99a5e3f 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0 */
 /*
  * GXBB clock tree IDs
  */
@@ -5,37 +6,96 @@
 #ifndef __GXBB_CLKC_H
 #define __GXBB_CLKC_H
 
+#define CLKID_SYS_PLL  0
 #define CLKID_HDMI_PLL 2
+#define CLKID_FIXED_PLL3
 #define CLKID_FCLK_DIV24
 #define CLKID_FCLK_DIV35
 #define CLKID_FCLK_DIV46
+#define CLKID_FCLK_DIV57
+#define CLKID_FCLK_DIV78
 #define CLKID_GP0_PLL  9
 #define CLKID_CLK8112
+#define CLKID_MPLL013
+#define CLKID_MPLL114
 #define CLKID_MPLL215
+#define CLKID_DDR  16
+#define CLKID_DOS  17
+#define CLKID_ISA  18
+#define CLKID_PL30119
+#define CLKID_PERIPHS  20
 #define CLKID_SPICC21
 #define CLKID_I2C  22
 #define CLKID_SAR_ADC  23
+#define CLKID_SMART_CARD   24
 #define CLKID_RNG0 25
 #define CLKID_UART026
+#define CLKID_SDHC 27
+#define CLKID_STREAM   28
+#define CLKID_ASYNC_FIFO   29
+#define CLKID_SDIO 30
+#define CLKID_ABUF 31
+#define CLKID_HIU_IFACE32
+#define CLKID_ASSIST_MISC  33
 #define CLKID_SPI  34
 #define CLKID_ETH  36
+#define CLKID_I2S_SPDIF35
+#define CLKID_DEMUX37
 #define CLKID_AIU_GLUE 38
 #define CLKID_IEC958   39
 #define CLKID_I2S_OUT  40
+#define CLKID_AMCLK41
+#define CLKID_AIFIFO2  42
+#define CLKID_MIXER43
 #define CLKID_MIXER_IFACE  44
+#define CLKID_ADC  45
+#define CLKID_BLKMV46
 #define CLKID_AIU  47
 #define CLKID_UART148
+#define CLKID_G2D  49
 #define CLKID_USB0 50
 #define CLKID_USB1 51
+#define CLKID_RESET52
+#define CLKID_NAND 53
+#define CLKID_DOS_PARSER   54
 #define CLKID_USB  55
+#define CLKID_VDIN156
+#define CLKID_AHB_ARB0 57
+#define CLKID_EFUSE58
+#define CLKID_BOOT_ROM 59
+#define CLKID_AHB_DATA_BUS 60
+#define CLKID_AHB_CTRL_BUS 61
+#define CLKID_HDMI_INTR_SYNC   62
 #define CLKID_HDMI_PCLK63
 #define CLKID_USB1_DDR_BRIDGE  64
 #define CLKID_USB0_DDR_BRIDGE  65
+#define CLKID_MMC_PCLK 66
+#define CLKID_DVIN 67
 #define CLKID_UART268
 #define CLKID_SANA 69
+#define CLKID_VPU_INTR 70
+#define CLKID_SEC_AHB_AHB3_BRIDGE 71
+#define CLKID_CLK81_A5372
+#define CLKID_VCLK2_VENCI0 73
+#define CLKID_VCLK2_VENCI1 74
+#define CLKID_VCLK2_VENCP0 75
+#define CLKID_VCLK2_VENCP1 76
 #define CLKID_GCLK_VENCI_INT0  77
+#define CLKID_GCLK_VENCI_INT   78
+#define CLKID_DAC_CLK  79
 #define CLKID_AOCLK_GATE   80
 #define CLKID_IEC958_GATE  81
+#define CLKID_ENC480P  82
+#define CLKID_RNG1 83
+#define CLKID_GCLK_VENCI_INT1  84
+#define CLKID_VCLK2_VENCLMCC   85
+#define CLKID_VCLK2_VENCL  86
+#define CLKID_VCLK_OTHER   87
+#define CLKID_EDP  88
+#define CLKID_AO_MEDIA_CPU 89
+#define CLKID_AO_AHB_SRAM  90
+#define CLKID_AO_AHB_BUS   91
+#define CLKID_AO_IFACE 92
 #define CLKID_AO_I2C   93
 #define CLKID_SD_EMMC_A94
 #define CLKID_SD_EMMC_B95
@@ -50,5 +110,20 @@
 #define CLKID_CTS_AMCLK107
 #define CLKID_CTS_MCLK_I958110
 #define CLKID_CTS_I958 113
+#define CLKID_32K_CLK  114
+#define CLKID_SD_EMMC_A_CLK0   119
+#define CLKID_SD_EMMC_B_CLK0   122
+#define CLKID_SD_EMMC_C_CLK0   125
+#define CLKID_VPU_0_SEL126
+#define CLKID_VPU_0128
+#define CLKID_VPU_1_SEL129
+#define CLKID_VPU_1131
+#define CLKID_VPU  132
+#define CLKID_VAPB_0_SEL   133
+#define CLKID_VAPB_0   135
+#define CLKID_VAPB_1_SEL   136
+#define CLKID_VAPB_1   138
+#define CLKID_VAPB_SEL 139
+#define CLKID_VAPB 140
 
 #endif /* __GXBB_CLKC_H */
-- 
2.14.3

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[U-Boot] [PATCH 0/4] Meson clock driver

[Beniamino Galvani]

Hi,

this is a basic clock driver for u-boot that supports
enabling/disabling clock gates and getting their frequency. With this,
some hardcoded initializations can be removed from the board code, and
drivers can use the information from device tree to initialize clocks.

Beniamino Galvani (4):
  ARM: dts: update gxbb-clkc.h from Linux 4.14
  ARM: meson: add clock measurement function
  clk: add Amlogic meson clock driver
  meson: use the clock driver

 arch/arm/include/asm/arch-meson/clock.h |  34 ++
 arch/arm/include/asm/arch-meson/gxbb.h  |  10 --
 arch/arm/include/asm/arch-meson/i2c.h   |  11 --
 arch/arm/mach-meson/Kconfig |   2 +
 arch/arm/mach-meson/Makefile|   2 +-
 arch/arm/mach-meson/clock.c |  45 
 board/amlogic/odroid-c2/odroid-c2.c |   4 +-
 board/amlogic/p212/p212.c   |   3 +-
 drivers/clk/Makefile|   1 +
 drivers/clk/clk_meson.c | 196 
 drivers/i2c/meson_i2c.c |  20 +++-
 include/dt-bindings/clock/gxbb-clkc.h   |  75 
 12 files changed, 373 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-meson/clock.h
 delete mode 100644 arch/arm/include/asm/arch-meson/i2c.h
 create mode 100644 arch/arm/mach-meson/clock.c
 create mode 100644 drivers/clk/clk_meson.c

-- 
2.14.3

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Re: [U-Boot] [PATCH 1/2] i2c: add Amlogic Meson driver

[Beniamino Galvani]

On Mon, Nov 20, 2017 at 08:36:34AM -0700, Simon Glass wrote:
> Hi Benjamin,
> 
> On 29 October 2017 at 03:09, Beniamino Galvani <b.galv...@gmail.com> wrote:
> >
> > Add a driver for the I2C controller available on Amlogic Meson SoCs.
> >
> > Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
> > ---
> >  arch/arm/include/asm/arch-meson/i2c.h |  11 ++
> >  drivers/i2c/Kconfig   |   6 +
> >  drivers/i2c/Makefile  |   1 +
> >  drivers/i2c/meson_i2c.c   | 263 
> > ++
> >  4 files changed, 281 insertions(+)
> >  create mode 100644 arch/arm/include/asm/arch-meson/i2c.h
> >  create mode 100644 drivers/i2c/meson_i2c.c
> 
> Reviewed-by: Simon Glass <s...@chromium.org>
> 
> But please look at the comments below.

Hi Simon,

I addressed your suggestions in a follow-up series, thanks.

> > +U_BOOT_DRIVER(i2c_meson) = {
> > +   .name = "i2c_meson",
> > +   .id   = UCLASS_I2C,
> > +   .of_match = meson_i2c_ids,
> > +   .probe = meson_i2c_probe,
> > +   .priv_auto_alloc_size = sizeof(struct meson_i2c),
> 
> I think meson_i2c_priv might be a better name since it indicates that
> it is driver-private data. But if you prefer the shorter name, that's
> fine with me.

I think I slightly prefer it, but both would be fine. Since the patch
is already applied, let's keep it as is?

Beniamino
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[U-Boot] [PATCH 4/4] i2c: meson: add some comments

[Beniamino Galvani]

Add some comment describing the purpose of struct members and
functions.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/i2c/meson_i2c.c | 25 +++--
 1 file changed, 19 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
index 2f39214ad2..4f37d2f316 100644
--- a/drivers/i2c/meson_i2c.c
+++ b/drivers/i2c/meson_i2c.c
@@ -44,12 +44,12 @@ struct i2c_regs {
 
 struct meson_i2c {
struct i2c_regs *regs;
-   struct i2c_msg *msg;
-   bool last;
-   uint count;
-   uint pos;
-   u32 tokens[2];
-   uint num_tokens;
+   struct i2c_msg *msg;/* Current I2C message */
+   bool last;  /* Whether the message is the last */
+   uint count; /* Number of bytes in the current transfer */
+   uint pos;   /* Position of current transfer in message */
+   u32 tokens[2];  /* Sequence of tokens to be written */
+   uint num_tokens;/* Number of tokens to be written */
 };
 
 static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
@@ -69,6 +69,10 @@ static void meson_i2c_add_token(struct meson_i2c *i2c, int 
token)
i2c->num_tokens++;
 }
 
+/*
+ * Retrieve data for the current transfer (which can be at most 8
+ * bytes) from the device internal buffer.
+ */
 static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len)
 {
u32 rdata0, rdata1;
@@ -86,6 +90,10 @@ static void meson_i2c_get_data(struct meson_i2c *i2c, u8 
*buf, int len)
*buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
 }
 
+/*
+ * Write data for the current transfer (which can be at most 8 bytes)
+ * to the device internal buffer.
+ */
 static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len)
 {
u32 wdata0 = 0, wdata1 = 0;
@@ -103,6 +111,11 @@ static void meson_i2c_put_data(struct meson_i2c *i2c, u8 
*buf, int len)
debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len);
 }
 
+/*
+ * Prepare the next transfer: pick the next 8 bytes in the remaining
+ * part of message and write tokens and data (if needed) to the
+ * device.
+ */
 static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
 {
bool write = !(i2c->msg->flags & I2C_M_RD);
-- 
2.14.3

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[U-Boot] [PATCH 3/4] i2c: meson: fix return codes on error

[Beniamino Galvani]

Change meson_i2c_xfer_msg() to return -EREMOTEIO in case of NACK, as
done by other drivers. Also, don't change the return error in
meson_i2c_xfer().

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/i2c/meson_i2c.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
index 84e1997c76..2f39214ad2 100644
--- a/drivers/i2c/meson_i2c.c
+++ b/drivers/i2c/meson_i2c.c
@@ -178,7 +178,7 @@ static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct 
i2c_msg *msg,
 
if (readl(>regs->ctrl) & REG_CTRL_ERROR) {
debug("meson i2c: error\n");
-   return -ENXIO;
+   return -EREMOTEIO;
}
 
if ((msg->flags & I2C_M_RD) && i2c->count) {
@@ -200,7 +200,7 @@ static int meson_i2c_xfer(struct udevice *bus, struct 
i2c_msg *msg,
for (i = 0; i < nmsgs; i++) {
ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1);
if (ret)
-   return -EREMOTEIO;
+   return ret;
}
 
return 0;
-- 
2.14.3

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[U-Boot] [PATCH 1/4] i2c: meson: improve Kconfig description

[Beniamino Galvani]

Expand the Kconfig description with hardware features.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/i2c/Kconfig | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 1989f8eb57..a7931aa6d4 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -141,7 +141,12 @@ config SYS_I2C_MESON
bool "Amlogic Meson I2C driver"
depends on DM_I2C && ARCH_MESON
help
- Add support for the Amlogic Meson I2C driver.
+ Add support for the I2C controller available in Amlogic Meson
+ SoCs. The controller supports programmable bus speed including
+ standard (100kbits/s) and fast (400kbit/s) speed and allows the
+ software to define a flexible format of the bit streams. It has an
+ internal buffer holding up to 8 bytes for transfers and supports
+ both 7-bit and 10-bit addresses.
 
 config SYS_I2C_MXC
bool "NXP i.MX I2C driver"
-- 
2.14.3

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[U-Boot] [PATCH 2/4] i2c: meson: reduce timeout

[Beniamino Galvani]

The datasheet doesn't specify a suggested timeout and 500ms seems very
long: reduce it to 100ms.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/i2c/meson_i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
index 2434d9ed53..84e1997c76 100644
--- a/drivers/i2c/meson_i2c.c
+++ b/drivers/i2c/meson_i2c.c
@@ -9,7 +9,7 @@
 #include 
 #include 
 
-#define I2C_TIMEOUT_MS 500
+#define I2C_TIMEOUT_MS 100
 
 /* Control register fields */
 #define REG_CTRL_START BIT(0)
-- 
2.14.3

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[U-Boot] [PATCH 0/4] meson i2c driver cleanups

[Beniamino Galvani]

Some cleanups for the u-boot meson i2c driver.

Beniamino Galvani (4):
  i2c: meson: improve Kconfig description
  i2c: meson: reduce timeout
  i2c: meson: fix return codes on error
  i2c: meson: add some comments

 drivers/i2c/Kconfig |  7 ++-
 drivers/i2c/meson_i2c.c | 31 ++-
 2 files changed, 28 insertions(+), 10 deletions(-)

-- 
2.14.3

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Re: [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function

[Beniamino Galvani]

On Sat, Nov 25, 2017 at 10:45:30AM +0100, Neil Armstrong wrote:
> > 
> >> +   if (use_internal_phy) {
> >> +   /* Use Internal PHY */
> >> +   out_le32(GXBB_ETH_REG_2, 0x10110181);
> >> +   out_le32(GXBB_ETH_REG_3, 0xe40908ff);
> >> +   }
> >> +#endif
> >> +
> >> +   break;
> >> +
> >> +   default:
> >> +   printf("Invalid Ethernet interface mode\n");
> >> +   return;
> >> +   }
> >> +
> >> +   /* Enable power and clock gate */
> >> +   setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
> >> +   clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
> > 
> > Seems like this should be in a clock driver.
> 
> It should, in next release ? Beniamino's I2C driver also used this,
> but yes a proper clock driver becomes necessary here.

I have written a basic clock driver that allows to enable/disable
gates and get their frequency. Do you think this is enough? I will
submit it soon (hopefully later today).

Beniamino
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[U-Boot] [PATCH 1/2] i2c: add Amlogic Meson driver

[Beniamino Galvani]

Add a driver for the I2C controller available on Amlogic Meson SoCs.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/i2c.h |  11 ++
 drivers/i2c/Kconfig   |   6 +
 drivers/i2c/Makefile  |   1 +
 drivers/i2c/meson_i2c.c   | 263 ++
 4 files changed, 281 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-meson/i2c.h
 create mode 100644 drivers/i2c/meson_i2c.c

diff --git a/arch/arm/include/asm/arch-meson/i2c.h 
b/arch/arm/include/asm/arch-meson/i2c.h
new file mode 100644
index 00..783bc3786f
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/i2c.h
@@ -0,0 +1,11 @@
+/*
+ * Copyright 2017 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#ifndef _MESON_I2C_H_
+#define _MESON_I2C_H_
+
+#define MESON_I2C_CLK_RATE 16700
+
+#endif
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index c296985d9b..1989f8eb57 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -137,6 +137,12 @@ config SYS_I2C_IMX_LPI2C
help
  Add support for the NXP i.MX LPI2C driver.
 
+config SYS_I2C_MESON
+   bool "Amlogic Meson I2C driver"
+   depends on DM_I2C && ARCH_MESON
+   help
+ Add support for the Amlogic Meson I2C driver.
+
 config SYS_I2C_MXC
bool "NXP i.MX I2C driver"
depends on MX6
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 3a8c61b485..733cd3e92f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_SYS_I2C_INTEL) += intel_i2c.o
 obj-$(CONFIG_SYS_I2C_IMX_LPI2C) += imx_lpi2c.o
 obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
 obj-$(CONFIG_SYS_I2C_LPC32XX) += lpc32xx_i2c.o
+obj-$(CONFIG_SYS_I2C_MESON) += meson_i2c.o
 obj-$(CONFIG_SYS_I2C_MVTWSI) += mvtwsi.o
 obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
 obj-$(CONFIG_SYS_I2C_MXS) += mxs_i2c.o
diff --git a/drivers/i2c/meson_i2c.c b/drivers/i2c/meson_i2c.c
new file mode 100644
index 00..2434d9ed53
--- /dev/null
+++ b/drivers/i2c/meson_i2c.c
@@ -0,0 +1,263 @@
+/*
+ * (C) Copyright 2017 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define I2C_TIMEOUT_MS 500
+
+/* Control register fields */
+#define REG_CTRL_START BIT(0)
+#define REG_CTRL_ACK_IGNOREBIT(1)
+#define REG_CTRL_STATUSBIT(2)
+#define REG_CTRL_ERROR BIT(3)
+#define REG_CTRL_CLKDIV_SHIFT  12
+#define REG_CTRL_CLKDIV_MASK   GENMASK(21, 12)
+#define REG_CTRL_CLKDIVEXT_SHIFT 28
+#define REG_CTRL_CLKDIVEXT_MASKGENMASK(29, 28)
+
+enum {
+   TOKEN_END = 0,
+   TOKEN_START,
+   TOKEN_SLAVE_ADDR_WRITE,
+   TOKEN_SLAVE_ADDR_READ,
+   TOKEN_DATA,
+   TOKEN_DATA_LAST,
+   TOKEN_STOP,
+};
+
+struct i2c_regs {
+   u32 ctrl;
+   u32 slave_addr;
+   u32 tok_list0;
+   u32 tok_list1;
+   u32 tok_wdata0;
+   u32 tok_wdata1;
+   u32 tok_rdata0;
+   u32 tok_rdata1;
+};
+
+struct meson_i2c {
+   struct i2c_regs *regs;
+   struct i2c_msg *msg;
+   bool last;
+   uint count;
+   uint pos;
+   u32 tokens[2];
+   uint num_tokens;
+};
+
+static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
+{
+   i2c->tokens[0] = 0;
+   i2c->tokens[1] = 0;
+   i2c->num_tokens = 0;
+}
+
+static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
+{
+   if (i2c->num_tokens < 8)
+   i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
+   else
+   i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
+
+   i2c->num_tokens++;
+}
+
+static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len)
+{
+   u32 rdata0, rdata1;
+   int i;
+
+   rdata0 = readl(>regs->tok_rdata0);
+   rdata1 = readl(>regs->tok_rdata1);
+
+   debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len);
+
+   for (i = 0; i < min(4, len); i++)
+   *buf++ = (rdata0 >> i * 8) & 0xff;
+
+   for (i = 4; i < min(8, len); i++)
+   *buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
+}
+
+static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len)
+{
+   u32 wdata0 = 0, wdata1 = 0;
+   int i;
+
+   for (i = 0; i < min(4, len); i++)
+   wdata0 |= *buf++ << (i * 8);
+
+   for (i = 4; i < min(8, len); i++)
+   wdata1 |= *buf++ << ((i - 4) * 8);
+
+   writel(wdata0, >regs->tok_wdata0);
+   writel(wdata1, >regs->tok_wdata1);
+
+   debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len);
+}
+
+static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
+{
+   bool write = !(i2c-

[U-Boot] [PATCH 2/2] odroid-c2: enable I2C

[Beniamino Galvani]

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/gxbb.h | 1 +
 board/amlogic/odroid-c2/odroid-c2.c| 1 +
 configs/odroid-c2_defconfig| 3 +++
 3 files changed, 5 insertions(+)

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h 
b/arch/arm/include/asm/arch-meson/gxbb.h
index ce41349792..96c9535f53 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -44,6 +44,7 @@
 #define GXBB_GCLK_MPEG_OTHER   GXBB_HIU_ADDR(0x53)
 #define GXBB_GCLK_MPEG_AO  GXBB_HIU_ADDR(0x54)
 
+#define GXBB_GCLK_MPEG_0_I2C   BIT(9)
 #define GXBB_GCLK_MPEG_1_ETH   BIT(3)
 
 #endif /* __GXBB_H__ */
diff --git a/board/amlogic/odroid-c2/odroid-c2.c 
b/board/amlogic/odroid-c2/odroid-c2.c
index eac04d8178..a5ea8dc5af 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -35,6 +35,7 @@ int misc_init_r(void)
 GXBB_ETH_REG_0_CLK_EN);
 
/* Enable power and clock gate */
+   setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
 
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index f7f8016644..1afd2fc111 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -11,12 +11,15 @@ CONFIG_DEBUG_UART=y
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_FPGA is not set
 CONFIG_CMD_GPIO=y
+CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_MESON=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
 CONFIG_DM_ETH=y
-- 
2.13.6

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[U-Boot] [PATCH 0/2] Amlogic I2C driver for u-boot

[Beniamino Galvani]

Hi,

this series adds support for the Amlogic Meson I2C controller to
u-boot.

Beniamino Galvani (2):
  i2c: add Amlogic Meson driver
  odroid-c2: enable I2C

 arch/arm/include/asm/arch-meson/gxbb.h |   1 +
 arch/arm/include/asm/arch-meson/i2c.h  |  11 ++
 board/amlogic/odroid-c2/odroid-c2.c|   1 +
 configs/odroid-c2_defconfig|   3 +
 drivers/i2c/Kconfig|   6 +
 drivers/i2c/Makefile   |   1 +
 drivers/i2c/meson_i2c.c| 263 +
 7 files changed, 286 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-meson/i2c.h
 create mode 100644 drivers/i2c/meson_i2c.c

-- 
2.13.6

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Re: [U-Boot] [PATCH u-boot 3/3] arm: add initial support for Amlogic P212 based on Meson GXL family

[Beniamino Galvani]

On Thu, Oct 12, 2017 at 03:50:32PM +0200, Neil Armstrong wrote:
> This adds platform code for the Amlogic P212 reference board based on a
> Meson GXL (S905X) SoC with the Meson GXL configuration.
> 
> This initial submission only supports UART and MMC/SDCard, support for the
> internal Ethernet PHY in Work In Progress.
> 
> Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>

Reviewed-by: Beniamino Galvani <b.galv...@gmail.com>
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Re: [U-Boot] [PATCH u-boot 2/3] pinctrl: meson: Add GXL Support

[Beniamino Galvani]

On Thu, Oct 12, 2017 at 03:50:31PM +0200, Neil Armstrong wrote:
> Add the Amlogic Meson GXL pinctrl support based on the GXBB driver and
> the synchronized DTS from Linux 4.13.5
> 
> Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>

Reviewed-by: Beniamino Galvani <b.galv...@gmail.com>
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Re: [U-Boot] [PATCH u-boot 1/3] ARM: dts: Synchronize Amlogic from Linux Mainline 4.13.5

[Beniamino Galvani]

On Thu, Oct 12, 2017 at 03:50:30PM +0200, Neil Armstrong wrote:
> Synchronize the Amlogic ARM64 dts from mainline Linux 4.13.5
> 
> In the preparation of the support of the Amlogic P212 board,
> import the corresponding meson-gxl-s905x-p212.dts file.
> 
> Signed-off-by: Neil Armstrong <narmstr...@baylibre.com>

Reviewed-by: Beniamino Galvani <b.galv...@gmail.com>
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Re: [U-Boot] [U-Boot,v2,4/4] pinctrl: meson: convert to livetree

[Beniamino Galvani]

On Mon, Jul 24, 2017 at 08:45:10PM -0400, Tom Rini wrote:
> On Mon, Jul 10, 2017 at 12:30:06AM +0200, Beniamino Galvani wrote:
> 
> > Update the Meson pinctrl/gpio driver to support a live device tree.
> > 
> > Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
> 
> This does not apply on top of master currently.  Should I wait until
> some other changes land to apply the whole series?  Or just 1-3 for now?

Please apply patches 1, 2, 3 for now. I'll update and resend patch 4
separately.

Thanks,
Beniamino
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[U-Boot] [PATCH v2 2/4] pinctrl: meson: add GPIO support

[Beniamino Galvani]

This commit adds GPIO support to the Amlogic Meson pin controller
driver, based on code from Linux kernel.

Reviewed-by: Simon Glass <s...@chromium.org>
Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/gpio.h |  11 ++
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c |  21 
 drivers/pinctrl/meson/pinctrl-meson.c  | 167 -
 drivers/pinctrl/meson/pinctrl-meson.h  |  63 +++
 4 files changed, 260 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-meson/gpio.h

diff --git a/arch/arm/include/asm/arch-meson/gpio.h 
b/arch/arm/include/asm/arch-meson/gpio.h
new file mode 100644
index 000..7079ab3
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/gpio.h
@@ -0,0 +1,11 @@
+/*
+ * (C) Copyright 2017 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_MESON_GPIO_H
+#define __ASM_ARCH_MESON_GPIO_H
+
+
+#endif /* __ASM_ARCH_MESON_GPIO_H */
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c 
b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 2fa840c..87c9912 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -391,14 +391,33 @@ static struct meson_pmx_func meson_gxbb_aobus_functions[] 
= {
FUNCTION(i2c_slave_ao),
 };
 
+static struct meson_bank meson_gxbb_periphs_banks[] = {
+   /*   namefirst  lastpullen  
pulldir out in  */
+   BANK("X",PIN(GPIOX_0, EE_OFF),  PIN(GPIOX_22, EE_OFF),  4,  0,  
4,  0,  12, 0,  13, 0,  14, 0),
+   BANK("Y",PIN(GPIOY_0, EE_OFF),  PIN(GPIOY_16, EE_OFF),  1,  0,  
1,  0,  3,  0,  4,  0,  5,  0),
+   BANK("DV",   PIN(GPIODV_0, EE_OFF), PIN(GPIODV_29, EE_OFF), 0,  0,  
0,  0,  0,  0,  1,  0,  2,  0),
+   BANK("H",PIN(GPIOH_0, EE_OFF),  PIN(GPIOH_3, EE_OFF),   1, 20,  
1, 20,  3, 20,  4, 20,  5, 20),
+   BANK("Z",PIN(GPIOZ_0, EE_OFF),  PIN(GPIOZ_15, EE_OFF),  3,  0,  
3,  0,  9,  0,  10, 0, 11,  0),
+   BANK("CARD", PIN(CARD_0, EE_OFF),   PIN(CARD_6, EE_OFF),2, 20,  
2, 20,  6, 20,  7, 20,  8, 20),
+   BANK("BOOT", PIN(BOOT_0, EE_OFF),   PIN(BOOT_17, EE_OFF),   2,  0,  
2,  0,  6,  0,  7,  0,  8,  0),
+   BANK("CLK",  PIN(GPIOCLK_0, EE_OFF),PIN(GPIOCLK_3, EE_OFF), 3, 28,  
3, 28,  9, 28, 10, 28, 11, 28),
+};
+
+static struct meson_bank meson_gxbb_aobus_banks[] = {
+   /*   namefirst  last   pullen  pulldir  
   out in  */
+   BANK("AO",   PIN(GPIOAO_0, 0),  PIN(GPIOAO_13, 0), 0,  0,  0, 16,  0,  
0,  0, 16,  1,  0),
+};
+
 struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
.name   = "periphs-banks",
.pin_base   = 14,
.groups = meson_gxbb_periphs_groups,
.funcs  = meson_gxbb_periphs_functions,
+   .banks  = meson_gxbb_periphs_banks,
.num_pins   = 120,
.num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
.num_funcs  = ARRAY_SIZE(meson_gxbb_periphs_functions),
+   .num_banks  = ARRAY_SIZE(meson_gxbb_periphs_banks),
 };
 
 struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
@@ -406,9 +425,11 @@ struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
.pin_base   = 0,
.groups = meson_gxbb_aobus_groups,
.funcs  = meson_gxbb_aobus_functions,
+   .banks  = meson_gxbb_aobus_banks,
.num_pins   = 14,
.num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
.num_funcs  = ARRAY_SIZE(meson_gxbb_aobus_functions),
+   .num_banks  = ARRAY_SIZE(meson_gxbb_aobus_banks),
 };
 
 static const struct udevice_id meson_gxbb_pinctrl_match[] = {
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c 
b/drivers/pinctrl/meson/pinctrl-meson.c
index 6281f52..a860200 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -6,11 +6,14 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #include "pinctrl-meson.h"
 
@@ -117,6 +120,143 @@ const struct pinctrl_ops meson_pinctrl_ops = {
.set_state = pinctrl_generic_set_state,
 };
 
+static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int 
offset,
+  enum meson_reg_type reg_type,
+  unsigned int *reg, unsigned int *bit)
+{
+   struct meson_pinctrl *priv = dev_get_priv(dev->parent);
+   struct meson_bank *bank = NULL;
+   struct meson_reg_desc *desc;
+   unsigned int pin;
+   int i;
+
+   pin = priv->data->pin_base + offset;
+
+   for (i = 0; i <

[U-Boot] [PATCH v2 4/4] pinctrl: meson: convert to livetree

[Beniamino Galvani]

Update the Meson pinctrl/gpio driver to support a live device tree.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/pinctrl/meson/pinctrl-meson.c | 66 +++
 1 file changed, 36 insertions(+), 30 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson.c 
b/drivers/pinctrl/meson/pinctrl-meson.c
index a860200..c8cae51 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -8,6 +8,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -257,66 +259,70 @@ static struct driver meson_gpio_driver = {
.ops= _gpio_ops,
 };
 
-static fdt_addr_t parse_address(int offset, const char *name, int na, int ns)
+static phys_addr_t parse_address(struct udevice *dev, ofnode node,
+const char *name)
 {
-   int index, len = 0;
-   const fdt32_t *reg;
+   struct resource r;
+   fdt_size_t sz;
+   int na, ns, index;
 
-   index = fdt_stringlist_search(gd->fdt_blob, offset, "reg-names", name);
+   index = ofnode_stringlist_search(node, "reg-names", name);
if (index < 0)
return FDT_ADDR_T_NONE;
 
-   reg = fdt_getprop(gd->fdt_blob, offset, "reg", );
-   if (!reg || (len <= (index * sizeof(fdt32_t) * (na + ns
+   if (of_live_active()) {
+   if (of_address_to_resource(ofnode_to_np(node), index, ))
+   return FDT_ADDR_T_NONE;
+   else
+   return r.start;
+   }
+
+   na = dev_read_addr_cells(dev->parent);
+   if (na < 1) {
+   debug("bad #address-cells\n");
return FDT_ADDR_T_NONE;
+   }
 
-   reg += index * (na + ns);
+   ns = dev_read_size_cells(dev->parent);
+   if (ns < 1) {
+   debug("bad #size-cells\n");
+   return FDT_ADDR_T_NONE;
+   }
 
-   return fdt_translate_address((void *)gd->fdt_blob, offset, reg);
+   return fdtdec_get_addr_size_fixed(gd->fdt_blob, ofnode_to_offset(node),
+ "reg", index, na, ns, , true);
 }
 
 int meson_pinctrl_probe(struct udevice *dev)
 {
struct meson_pinctrl *priv = dev_get_priv(dev);
+   ofnode node, gpio = ofnode_null();
struct uclass_driver *drv;
struct udevice *gpio_dev;
-   fdt_addr_t addr;
-   int node, gpio = -1, len;
-   int na, ns;
+   phys_addr_t addr;
char *name;
+   int len;
 
-   na = fdt_address_cells(gd->fdt_blob, dev_of_offset(dev->parent));
-   if (na < 1) {
-   debug("bad #address-cells\n");
-   return -EINVAL;
-   }
-
-   ns = fdt_size_cells(gd->fdt_blob, dev_of_offset(dev->parent));
-   if (ns < 1) {
-   debug("bad #size-cells\n");
-   return -EINVAL;
-   }
-
-   fdt_for_each_subnode(node, gd->fdt_blob, dev_of_offset(dev)) {
-   if (fdt_getprop(gd->fdt_blob, node, "gpio-controller", )) {
+   dev_for_each_subnode(node, dev) {
+   if (ofnode_read_prop(node, "gpio-controller", )) {
gpio = node;
break;
}
}
 
-   if (!gpio) {
+   if (!ofnode_valid(gpio)) {
debug("gpio node not found\n");
return -EINVAL;
}
 
-   addr = parse_address(gpio, "mux", na, ns);
+   addr = parse_address(dev, gpio, "mux");
if (addr == FDT_ADDR_T_NONE) {
debug("mux address not found\n");
return -EINVAL;
}
priv->reg_mux = (void __iomem *)addr;
 
-   addr = parse_address(gpio, "gpio", na, ns);
+   addr = parse_address(dev, gpio, "gpio");
if (addr == FDT_ADDR_T_NONE) {
debug("gpio address not found\n");
return -EINVAL;
@@ -335,8 +341,8 @@ int meson_pinctrl_probe(struct udevice *dev)
sprintf(name, "meson-gpio");
 
/* Create child device UCLASS_GPIO and bind it */
-   device_bind(dev, _gpio_driver, name, NULL, gpio, _dev);
-   dev_set_of_offset(gpio_dev, gpio);
+   device_bind_with_driver_data(dev, _gpio_driver, name, 0,
+gpio, _dev);
 
return 0;
 }
-- 
2.9.3

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[U-Boot] [PATCH v2 3/4] odroid-c2: enable GPIO

[Beniamino Galvani]

GPIOs are now supported on Meson GXBB, enable driver and command in
the config.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 configs/odroid-c2_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 3531414..3ad2219 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -13,9 +13,11 @@ CONFIG_DEBUG_UART=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
 CONFIG_DM_ETH=y
-- 
2.9.3

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[U-Boot] [PATCH v2 0/4] Add support for Meson GXBB GPIOs to U-Boot

[Beniamino Galvani]

Hi,

this series adds to U-Boot a GPIO driver for Meson GXBB and enables it
on Odroid-C2.

Changes since v1:
 - updated dts files from Linux 4.12
 - added missing asm/arch/gpio.h
 - added patch 4 to convert driver to livetree

Beniamino Galvani (4):
  arm: dts: meson: import dts files from Linux 4.12
  pinctrl: meson: add GPIO support
  odroid-c2: enable GPIO
  pinctrl: meson: convert to livetree

 arch/arm/dts/meson-gx.dtsi |  97 +++--
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  82 ++-
 arch/arm/dts/meson-gxbb.dtsi   | 187 +++-
 arch/arm/include/asm/arch-meson/gpio.h |  11 ++
 configs/odroid-c2_defconfig|   2 +
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c |  21 +++
 drivers/pinctrl/meson/pinctrl-meson.c  | 221 +
 drivers/pinctrl/meson/pinctrl-meson.h  |  63 
 include/dt-bindings/clock/gxbb-clkc.h  |  24 +++-
 9 files changed, 636 insertions(+), 72 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-meson/gpio.h

-- 
2.9.3

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[U-Boot] [PATCH v2 1/4] arm: dts: meson: import dts files from Linux 4.12

[Beniamino Galvani]

Import Amlogic Meson DTS files from Linux kernel version 4.12

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/dts/meson-gx.dtsi|  97 --
 arch/arm/dts/meson-gxbb-odroidc2.dts  |  82 ++-
 arch/arm/dts/meson-gxbb.dtsi  | 187 --
 include/dt-bindings/clock/gxbb-clkc.h |  24 -
 4 files changed, 344 insertions(+), 46 deletions(-)

diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
index c129100..436b875 100644
--- a/arch/arm/dts/meson-gx.dtsi
+++ b/arch/arm/dts/meson-gx.dtsi
@@ -71,6 +71,14 @@
reg = <0x0 0x1000 0x0 0x20>;
no-map;
};
+
+   linux,cma {
+   compatible = "shared-dma-pool";
+   reusable;
+   size = <0x0 0xbc0>;
+   alignment = <0x0 0x40>;
+   linux,cma-default;
+   };
};
 
cpus {
@@ -233,7 +241,7 @@
};
 
i2c_A: i2c@8500 {
-   compatible = "amlogic,meson-gxbb-i2c";
+   compatible = "amlogic,meson-gx-i2c", 
"amlogic,meson-gxbb-i2c";
reg = <0x0 0x08500 0x0 0x20>;
interrupts = ;
#address-cells = <1>;
@@ -255,6 +263,14 @@
status = "disabled";
};
 
+   saradc: adc@8680 {
+   compatible = "amlogic,meson-saradc";
+   reg = <0x0 0x8680 0x0 0x34>;
+   #io-channel-cells = <1>;
+   interrupts = ;
+   status = "disabled";
+   };
+
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson-gx-pwm", 
"amlogic,meson-gxbb-pwm";
reg = <0x0 0x086c0 0x0 0x10>;
@@ -271,7 +287,7 @@
};
 
i2c_B: i2c@87c0 {
-   compatible = "amlogic,meson-gxbb-i2c";
+   compatible = "amlogic,meson-gx-i2c", 
"amlogic,meson-gxbb-i2c";
reg = <0x0 0x087c0 0x0 0x20>;
interrupts = ;
#address-cells = <1>;
@@ -280,7 +296,7 @@
};
 
i2c_C: i2c@87e0 {
-   compatible = "amlogic,meson-gxbb-i2c";
+   compatible = "amlogic,meson-gx-i2c", 
"amlogic,meson-gxbb-i2c";
reg = <0x0 0x087e0 0x0 0x20>;
interrupts = ;
#address-cells = <1>;
@@ -288,6 +304,14 @@
status = "disabled";
};
 
+   spifc: spi@8c80 {
+   compatible = "amlogic,meson-gx-spifc", 
"amlogic,meson-gxbb-spifc";
+   reg = <0x0 0x08c80 0x0 0x80>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@98d0 {
compatible = "amlogic,meson-gx-wdt", 
"amlogic,meson-gxbb-wdt";
reg = <0x0 0x098d0 0x0 0x10>;
@@ -309,7 +333,7 @@
};
 
sram: sram@c800 {
-   compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
+   compatible = "amlogic,meson-gx-sram", 
"amlogic,meson-gxbb-sram", "mmio-sram";
reg = <0x0 0xc800 0x0 0x14000>;
 
#address-cells = <1>;
@@ -317,12 +341,12 @@
ranges = <0 0x0 0xc800 0x14000>;
 
cpu_scp_lpri: scp-shmem@0 {
-   compatible = "amlogic,meson-gxbb-scp-shmem";
+   compatible = "amlogic,meson-gx-scp-shmem", 
"amlogic,meson-gxbb-scp-shmem";
reg = <0x13000 0x400>;
};
 
cpu_scp_hpri: scp-shmem@200 {
-   compatible = "amlogic,me

Re: [U-Boot] [PATCH 0/3] GPIO support for Meson GXBB and Odroid-C2

[Beniamino Galvani]

On Mon, Jun 26, 2017 at 12:24:24PM +0200, Jerome Brunet wrote:
> From the recipient list, I'm guessing this patch is addressed to the u-boot
> community, right ?

Correct.

> Would you mind stating it a bit more clearly next time ? especially if you
> include linux-amlogic list.

Yeah, I'll do next time.

Thanks,
Beniamino
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[U-Boot] [PATCH 2/3] pinctrl: meson: add GPIO support

[Beniamino Galvani]

This commit adds GPIO support to the Amlogic Meson pin controller
driver, based on code from Linux kernel.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c |  21 
 drivers/pinctrl/meson/pinctrl-meson.c  | 167 -
 drivers/pinctrl/meson/pinctrl-meson.h  |  63 +++
 3 files changed, 249 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c 
b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
index 2fa840c..87c9912 100644
--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -391,14 +391,33 @@ static struct meson_pmx_func meson_gxbb_aobus_functions[] 
= {
FUNCTION(i2c_slave_ao),
 };
 
+static struct meson_bank meson_gxbb_periphs_banks[] = {
+   /*   namefirst  lastpullen  
pulldir out in  */
+   BANK("X",PIN(GPIOX_0, EE_OFF),  PIN(GPIOX_22, EE_OFF),  4,  0,  
4,  0,  12, 0,  13, 0,  14, 0),
+   BANK("Y",PIN(GPIOY_0, EE_OFF),  PIN(GPIOY_16, EE_OFF),  1,  0,  
1,  0,  3,  0,  4,  0,  5,  0),
+   BANK("DV",   PIN(GPIODV_0, EE_OFF), PIN(GPIODV_29, EE_OFF), 0,  0,  
0,  0,  0,  0,  1,  0,  2,  0),
+   BANK("H",PIN(GPIOH_0, EE_OFF),  PIN(GPIOH_3, EE_OFF),   1, 20,  
1, 20,  3, 20,  4, 20,  5, 20),
+   BANK("Z",PIN(GPIOZ_0, EE_OFF),  PIN(GPIOZ_15, EE_OFF),  3,  0,  
3,  0,  9,  0,  10, 0, 11,  0),
+   BANK("CARD", PIN(CARD_0, EE_OFF),   PIN(CARD_6, EE_OFF),2, 20,  
2, 20,  6, 20,  7, 20,  8, 20),
+   BANK("BOOT", PIN(BOOT_0, EE_OFF),   PIN(BOOT_17, EE_OFF),   2,  0,  
2,  0,  6,  0,  7,  0,  8,  0),
+   BANK("CLK",  PIN(GPIOCLK_0, EE_OFF),PIN(GPIOCLK_3, EE_OFF), 3, 28,  
3, 28,  9, 28, 10, 28, 11, 28),
+};
+
+static struct meson_bank meson_gxbb_aobus_banks[] = {
+   /*   namefirst  last   pullen  pulldir  
   out in  */
+   BANK("AO",   PIN(GPIOAO_0, 0),  PIN(GPIOAO_13, 0), 0,  0,  0, 16,  0,  
0,  0, 16,  1,  0),
+};
+
 struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {
.name   = "periphs-banks",
.pin_base   = 14,
.groups = meson_gxbb_periphs_groups,
.funcs  = meson_gxbb_periphs_functions,
+   .banks  = meson_gxbb_periphs_banks,
.num_pins   = 120,
.num_groups = ARRAY_SIZE(meson_gxbb_periphs_groups),
.num_funcs  = ARRAY_SIZE(meson_gxbb_periphs_functions),
+   .num_banks  = ARRAY_SIZE(meson_gxbb_periphs_banks),
 };
 
 struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
@@ -406,9 +425,11 @@ struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {
.pin_base   = 0,
.groups = meson_gxbb_aobus_groups,
.funcs  = meson_gxbb_aobus_functions,
+   .banks  = meson_gxbb_aobus_banks,
.num_pins   = 14,
.num_groups = ARRAY_SIZE(meson_gxbb_aobus_groups),
.num_funcs  = ARRAY_SIZE(meson_gxbb_aobus_functions),
+   .num_banks  = ARRAY_SIZE(meson_gxbb_aobus_banks),
 };
 
 static const struct udevice_id meson_gxbb_pinctrl_match[] = {
diff --git a/drivers/pinctrl/meson/pinctrl-meson.c 
b/drivers/pinctrl/meson/pinctrl-meson.c
index 6281f52..0ac1dc6 100644
--- a/drivers/pinctrl/meson/pinctrl-meson.c
+++ b/drivers/pinctrl/meson/pinctrl-meson.c
@@ -6,11 +6,14 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 #include "pinctrl-meson.h"
 
@@ -135,12 +138,152 @@ static fdt_addr_t parse_address(int offset, const char 
*name, int na, int ns)
return fdt_translate_address((void *)gd->fdt_blob, offset, reg);
 }
 
+static int meson_gpio_calc_reg_and_bit(struct udevice *dev, unsigned int 
offset,
+  enum meson_reg_type reg_type,
+  unsigned int *reg, unsigned int *bit)
+{
+   struct meson_pinctrl *priv = dev_get_priv(dev->parent);
+   struct meson_bank *bank = NULL;
+   struct meson_reg_desc *desc;
+   unsigned int pin;
+   int i;
+
+   pin = priv->data->pin_base + offset;
+
+   for (i = 0; i < priv->data->num_banks; i++) {
+   if (pin >= priv->data->banks[i].first &&
+   pin <= priv->data->banks[i].last) {
+   bank = >data->banks[i];
+   break;
+   }
+   }
+
+   if (!bank)
+   return -EINVAL;
+
+   desc = >regs[reg_type];
+   *reg = desc->reg * 4;
+   *bit = desc->bit + pin - bank->first;
+
+   return 0;
+}
+
+static int meson_gpio_get(struct udevice *dev, unsigned int offse

[U-Boot] [PATCH 3/3] odroid-c2: enable GPIO

[Beniamino Galvani]

GPIOs are now supported on Meson GXBB, enable driver and command in
the config.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 configs/odroid-c2_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 547cd52..cf06715 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -13,9 +13,11 @@ CONFIG_DEBUG_UART=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_FPGA is not set
+CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_GPIO=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_MESON_GX=y
 CONFIG_DM_ETH=y
-- 
2.9.3

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[U-Boot] [PATCH 1/3] arm: dts: meson: import dts files from Linux 4.12-rc6

[Beniamino Galvani]

Import Amlogic Meson DTS files from Linux kernel version 4.12-rc6.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/dts/meson-gx.dtsi|  97 --
 arch/arm/dts/meson-gxbb-odroidc2.dts  |  82 ++-
 arch/arm/dts/meson-gxbb.dtsi  | 187 --
 include/dt-bindings/clock/gxbb-clkc.h |  14 ++-
 4 files changed, 335 insertions(+), 45 deletions(-)

diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi
index c129100..436b875 100644
--- a/arch/arm/dts/meson-gx.dtsi
+++ b/arch/arm/dts/meson-gx.dtsi
@@ -71,6 +71,14 @@
reg = <0x0 0x1000 0x0 0x20>;
no-map;
};
+
+   linux,cma {
+   compatible = "shared-dma-pool";
+   reusable;
+   size = <0x0 0xbc0>;
+   alignment = <0x0 0x40>;
+   linux,cma-default;
+   };
};
 
cpus {
@@ -233,7 +241,7 @@
};
 
i2c_A: i2c@8500 {
-   compatible = "amlogic,meson-gxbb-i2c";
+   compatible = "amlogic,meson-gx-i2c", 
"amlogic,meson-gxbb-i2c";
reg = <0x0 0x08500 0x0 0x20>;
interrupts = ;
#address-cells = <1>;
@@ -255,6 +263,14 @@
status = "disabled";
};
 
+   saradc: adc@8680 {
+   compatible = "amlogic,meson-saradc";
+   reg = <0x0 0x8680 0x0 0x34>;
+   #io-channel-cells = <1>;
+   interrupts = ;
+   status = "disabled";
+   };
+
pwm_ef: pwm@86c0 {
compatible = "amlogic,meson-gx-pwm", 
"amlogic,meson-gxbb-pwm";
reg = <0x0 0x086c0 0x0 0x10>;
@@ -271,7 +287,7 @@
};
 
i2c_B: i2c@87c0 {
-   compatible = "amlogic,meson-gxbb-i2c";
+   compatible = "amlogic,meson-gx-i2c", 
"amlogic,meson-gxbb-i2c";
reg = <0x0 0x087c0 0x0 0x20>;
interrupts = ;
#address-cells = <1>;
@@ -280,7 +296,7 @@
};
 
i2c_C: i2c@87e0 {
-   compatible = "amlogic,meson-gxbb-i2c";
+   compatible = "amlogic,meson-gx-i2c", 
"amlogic,meson-gxbb-i2c";
reg = <0x0 0x087e0 0x0 0x20>;
interrupts = ;
#address-cells = <1>;
@@ -288,6 +304,14 @@
status = "disabled";
};
 
+   spifc: spi@8c80 {
+   compatible = "amlogic,meson-gx-spifc", 
"amlogic,meson-gxbb-spifc";
+   reg = <0x0 0x08c80 0x0 0x80>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   };
+
watchdog@98d0 {
compatible = "amlogic,meson-gx-wdt", 
"amlogic,meson-gxbb-wdt";
reg = <0x0 0x098d0 0x0 0x10>;
@@ -309,7 +333,7 @@
};
 
sram: sram@c800 {
-   compatible = "amlogic,meson-gxbb-sram", "mmio-sram";
+   compatible = "amlogic,meson-gx-sram", 
"amlogic,meson-gxbb-sram", "mmio-sram";
reg = <0x0 0xc800 0x0 0x14000>;
 
#address-cells = <1>;
@@ -317,12 +341,12 @@
ranges = <0 0x0 0xc800 0x14000>;
 
cpu_scp_lpri: scp-shmem@0 {
-   compatible = "amlogic,meson-gxbb-scp-shmem";
+   compatible = "amlogic,meson-gx-scp-shmem", 
"amlogic,meson-gxbb-scp-shmem";
reg = <0x13000 0x400>;
};
 
cpu_scp_hpri: scp-shmem@200 {
-   compatible = "amlogic,me

[U-Boot] [PATCH 0/3] GPIO support for Meson GXBB and Odroid-C2

[Beniamino Galvani]

Hi,

this series adds a GPIO driver for Meson GXBB and enables it on
Odroid-C2.

Beniamino Galvani (3):
  arm: dts: meson: import dts files from Linux 4.12-rc6
  pinctrl: meson: add GPIO support
  odroid-c2: enable GPIO

 arch/arm/dts/meson-gx.dtsi |  97 +--
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  82 -
 arch/arm/dts/meson-gxbb.dtsi   | 187 -
 configs/odroid-c2_defconfig|   2 +
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c |  21 
 drivers/pinctrl/meson/pinctrl-meson.c  | 167 +-
 drivers/pinctrl/meson/pinctrl-meson.h  |  63 ++
 include/dt-bindings/clock/gxbb-clkc.h  |  14 ++-
 8 files changed, 586 insertions(+), 47 deletions(-)

-- 
2.9.3

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[U-Boot] [PATCH 2/4] arm: dts: update DTS files for meson-gxbb and odroid-c2

[Beniamino Galvani]

Import DTS files and dt-bindings includes from Linux 4.8-rc1.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  19 ++
 arch/arm/dts/meson-gxbb.dtsi   | 170 -
 include/dt-bindings/gpio/meson-gxbb-gpio.h | 154 +++
 .../dt-bindings/reset/amlogic,meson-gxbb-reset.h   | 210 +
 4 files changed, 552 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/gpio/meson-gxbb-gpio.h
 create mode 100644 include/dt-bindings/reset/amlogic,meson-gxbb-reset.h

diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
index 653c2fa..79bee64 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2.dts
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -45,6 +45,7 @@
 /dts-v1/;
 
 #include "meson-gxbb.dtsi"
+#include 
 
 / {
compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
@@ -62,8 +63,26 @@
device_type = "memory";
reg = <0x0 0x0 0x0 0x8000>;
};
+
+   leds {
+   compatible = "gpio-leds";
+   blue {
+   label = "c2:blue:alive";
+   gpios = <_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "heartbeat";
+   default-state = "off";
+   };
+   };
 };
 
 _AO {
status = "okay";
+   pinctrl-0 = <_ao_a_pins>;
+   pinctrl-names = "default";
+};
+
+ {
+   status = "okay";
+   pinctrl-0 = <_pins>;
+   pinctrl-names = "default";
 };
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
index 832815d..e502c24 100644
--- a/arch/arm/dts/meson-gxbb.dtsi
+++ b/arch/arm/dts/meson-gxbb.dtsi
@@ -43,6 +43,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 / {
compatible = "amlogic,meson-gxbb";
@@ -129,13 +131,35 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc110 0x0 0x10>;
 
+   reset: reset-controller@4404 {
+   compatible = "amlogic,meson-gxbb-reset";
+   reg = <0x0 0x04404 0x0 0x20>;
+   #reset-cells = <1>;
+   };
+
uart_A: serial@84c0 {
compatible = "amlogic,meson-uart";
-   reg = <0x0 0x084c0 0x0 0x14>;
+   reg = <0x0 0x84c0 0x0 0x14>;
interrupts = ;
clocks = <>;
status = "disabled";
};
+
+   uart_B: serial@84dc {
+   compatible = "amlogic,meson-uart";
+   reg = <0x0 0x84dc 0x0 0x14>;
+   interrupts = ;
+   clocks = <>;
+   status = "disabled";
+   };
+
+   uart_C: serial@8700 {
+   compatible = "amlogic,meson-uart";
+   reg = <0x0 0x8700 0x0 0x14>;
+   interrupts = ;
+   clocks = <>;
+   status = "disabled";
+   };
};
 
gic: interrupt-controller@c4301000 {
@@ -158,6 +182,29 @@
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xc810 0x0 0x10>;
 
+   pinctrl_aobus: pinctrl@14 {
+   compatible = "amlogic,meson-gxbb-aobus-pinctrl";
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   gpio_ao: bank@14 {
+   reg = <0x0 0x00014 0x0 0x8>,
+ <0x0 0x0002c 0x0 0x4>,
+ <0x0 0x00024 0x0 0x8>;
+   reg-names = "mux", "pull", "gpio";
+   gpio-controller;
+   #gpio-cells = <2>;
+   };
+
+   uart_ao_a_pins: uart_ao_a {
+   mux {
+   groups = "uart_tx_ao_a&

[U-Boot] [PATCH 4/4] meson: odroid-c2: enable Ethernet support through the device tree

[Beniamino Galvani]

Remove the device definition from board file, update the driver with
the new compatible property and update config with necessary options.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/gxbb.h |  3 ---
 board/amlogic/odroid-c2/odroid-c2.c| 13 -
 configs/odroid-c2_defconfig|  3 +++
 drivers/net/designware.c   |  1 +
 4 files changed, 4 insertions(+), 16 deletions(-)

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h 
b/arch/arm/include/asm/arch-meson/gxbb.h
index f90f632..ce41349 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -20,9 +20,6 @@
 #define GXBB_GPIO_IN(n)GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 1)
 #define GXBB_GPIO_OUT(n)   GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 2)
 
-/* Pinmux registers 0 to 12 */
-#define GXBB_PINMUX(n) GXBB_PERIPHS_ADDR(0x2c + (n))
-
 #define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50)
 #define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51)
 
diff --git a/board/amlogic/odroid-c2/odroid-c2.c 
b/board/amlogic/odroid-c2/odroid-c2.c
index bd72100..b61daaa 100644
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -21,24 +21,11 @@ int board_init(void)
return 0;
 }
 
-static const struct eth_pdata gxbb_eth_pdata = {
-   .iobase = GXBB_ETH_BASE,
-   .phy_interface = PHY_INTERFACE_MODE_RGMII,
-};
-
-U_BOOT_DEVICE(meson_eth) = {
-   .name = "eth_designware",
-   .platdata = _eth_pdata,
-};
-
 int misc_init_r(void)
 {
u8 mac_addr[EFUSE_MAC_SIZE];
ssize_t len;
 
-   /* Select Ethernet function */
-   setbits_le32(GXBB_PINMUX(6), 0x3fff);
-
/* Set RGMII mode */
setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
 GXBB_ETH_REG_0_TX_PHASE(1) |
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 808bbc2..3e9ef68 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -14,6 +14,9 @@ CONFIG_HUSH_PARSER=y
 CONFIG_OF_CONTROL=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_MESON_GXBB=y
 CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_MESON=y
 CONFIG_DEBUG_UART_BASE=0xc81004c0
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 8ba72e3..9e6d726 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -737,6 +737,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice 
*dev)
 static const struct udevice_id designware_eth_ids[] = {
{ .compatible = "allwinner,sun7i-a20-gmac" },
{ .compatible = "altr,socfpga-stmmac" },
+   { .compatible = "amlogic,meson6-dwmac" },
{ }
 };
 
-- 
2.7.4

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[U-Boot] [PATCH 3/4] pinctrl: add driver for meson-gxbb pin controller

[Beniamino Galvani]

Add a pin controller driver for Meson GXBB adapted from Linux kernel.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/pinctrl/Kconfig|   1 +
 drivers/pinctrl/Makefile   |   1 +
 drivers/pinctrl/meson/Kconfig  |  11 +
 drivers/pinctrl/meson/Makefile |   6 +
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 432 +
 drivers/pinctrl/meson/pinctrl-meson.c  | 179 
 drivers/pinctrl/meson/pinctrl-meson.h  |  74 +
 7 files changed, 704 insertions(+)
 create mode 100644 drivers/pinctrl/meson/Kconfig
 create mode 100644 drivers/pinctrl/meson/Makefile
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gxbb.c
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson.c
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson.h

diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 2972dba..c0c7153 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -161,6 +161,7 @@ config PIC32_PINCTRL
 
 endif
 
+source "drivers/pinctrl/meson/Kconfig"
 source "drivers/pinctrl/nxp/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"
 source "drivers/pinctrl/exynos/Kconfig"
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
index 7f94681..62340f5 100644
--- a/drivers/pinctrl/Makefile
+++ b/drivers/pinctrl/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o
 obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/
 obj-$(CONFIG_PIC32_PINCTRL)+= pinctrl_pic32.o
 obj-$(CONFIG_PINCTRL_EXYNOS)   += exynos/
+obj-$(CONFIG_PINCTRL_MESON)+= meson/
diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig
new file mode 100644
index 000..c3e6901
--- /dev/null
+++ b/drivers/pinctrl/meson/Kconfig
@@ -0,0 +1,11 @@
+if ARCH_MESON
+
+config PINCTRL_MESON
+   depends on PINCTRL_GENERIC
+   bool
+
+config PINCTRL_MESON_GXBB
+   bool "Amlogic Meson GXBB SoC pinctrl driver"
+   select PINCTRL_MESON
+
+endif
diff --git a/drivers/pinctrl/meson/Makefile b/drivers/pinctrl/meson/Makefile
new file mode 100644
index 000..6dde4bc
--- /dev/null
+++ b/drivers/pinctrl/meson/Makefile
@@ -0,0 +1,6 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += pinctrl-meson.o
+obj-$(CONFIG_PINCTRL_MESON_GXBB)   += pinctrl-meson-gxbb.o
diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c 
b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
new file mode 100644
index 000..a0a7de5
--- /dev/null
+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c
@@ -0,0 +1,432 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * Based on code from Linux kernel:
+ *   Copyright (C) 2016 Endless Mobile, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+#include 
+
+#include "pinctrl-meson.h"
+
+#define EE_OFF 14
+
+static const unsigned int emmc_nand_d07_pins[] = {
+   PIN(BOOT_0, EE_OFF), PIN(BOOT_1, EE_OFF), PIN(BOOT_2, EE_OFF),
+   PIN(BOOT_3, EE_OFF), PIN(BOOT_4, EE_OFF), PIN(BOOT_5, EE_OFF),
+   PIN(BOOT_6, EE_OFF), PIN(BOOT_7, EE_OFF),
+};
+static const unsigned int emmc_clk_pins[] = { PIN(BOOT_8, EE_OFF) };
+static const unsigned int emmc_cmd_pins[] = { PIN(BOOT_10, EE_OFF) };
+static const unsigned int emmc_ds_pins[] = { PIN(BOOT_15, EE_OFF) };
+
+static const unsigned int sdcard_d0_pins[] = { PIN(CARD_1, EE_OFF) };
+static const unsigned int sdcard_d1_pins[] = { PIN(CARD_0, EE_OFF) };
+static const unsigned int sdcard_d2_pins[] = { PIN(CARD_5, EE_OFF) };
+static const unsigned int sdcard_d3_pins[] = { PIN(CARD_4, EE_OFF) };
+static const unsigned int sdcard_cmd_pins[] = { PIN(CARD_3, EE_OFF) };
+static const unsigned int sdcard_clk_pins[] = { PIN(CARD_2, EE_OFF) };
+
+static const unsigned int uart_tx_a_pins[] = { PIN(GPIOX_12, EE_OFF) };
+static const unsigned int uart_rx_a_pins[] = { PIN(GPIOX_13, EE_OFF) };
+static const unsigned int uart_cts_a_pins[]= { PIN(GPIOX_14, EE_OFF) };
+static const unsigned int uart_rts_a_pins[]= { PIN(GPIOX_15, EE_OFF) };
+
+static const unsigned int uart_tx_b_pins[] = { PIN(GPIODV_24, EE_OFF) };
+static const unsigned int uart_rx_b_pins[] = { PIN(GPIODV_25, EE_OFF) };
+static const unsigned int uart_cts_b_pins[]= { PIN(GPIODV_26, EE_OFF) };
+static const unsigned int uart_rts_b_pins[]= { PIN(GPIODV_27, EE_OFF) };
+
+static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_13, EE_OFF) };
+static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_14, EE_OFF) };
+static const unsigned int uart_cts_c_pins[]= { PIN(GPIOX_11, EE_OFF) };
+static const unsigned int uart_rts_c_pins[]= { PIN(GPIOX_12, EE_OFF) };
+
+static const unsigned int eth_mdio_pins[]  = { PIN(GPIOZ_0, EE_OFF) };
+static const unsigned int eth_mdc_pins[]   = { PIN(GPIOZ_1, EE_OFF) };
+static const unsigned int eth_clk_rx_c

[U-Boot] [PATCH 1/4] pinctrl: generic: scan for "pins" and "groups" properties in sub-nodes

[Beniamino Galvani]

In cases where the pins and groups definitions are in a sub-node, as:

uart_a {
mux {
groups = "uart_tx_a", "uart_rx_a";
function = "uart_a";
};
};

pinctrl_generic_set_state_subnode() returns an error for the top-level
node and pinctrl_generic_set_state() fails. Instead, return success so
that the child nodes are tried.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/pinctrl/pinctrl-generic.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-generic.c 
b/drivers/pinctrl/pinctrl-generic.c
index e86b72a..baff40f 100644
--- a/drivers/pinctrl/pinctrl-generic.c
+++ b/drivers/pinctrl/pinctrl-generic.c
@@ -312,8 +312,10 @@ static int pinctrl_generic_set_state_subnode(struct 
udevice *dev,
is_group = true;
strings_count = fdt_count_strings(fdt, node,
  subnode_target_type);
-   if (strings_count < 0)
-   return -EINVAL;
+   if (strings_count < 0) {
+   /* skip this node; may contain config child nodes */
+   return 0;
+   }
}
 
for (i = 0; i < strings_count; i++) {
-- 
2.7.4

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[U-Boot] [PATCH 0/4] Amlogic Meson pinctrl driver for u-boot

[Beniamino Galvani]

Hi,

these patches add a pinctrl driver for Meson GXBB and enable
Ethernet support through the device tree.

Beniamino Galvani (4):
  pinctrl: generic: scan for "pins" and "groups" properties in sub-nodes
  arm: dts: update DTS files for meson-gxbb and odroid-c2
  pinctrl: add driver for meson-gxbb pin controller
  meson: odroid-c2: enable Ethernet support through the device tree

 arch/arm/dts/meson-gxbb-odroidc2.dts   |  19 +
 arch/arm/dts/meson-gxbb.dtsi   | 170 +++-
 arch/arm/include/asm/arch-meson/gxbb.h |   3 -
 board/amlogic/odroid-c2/odroid-c2.c|  13 -
 configs/odroid-c2_defconfig|   3 +
 drivers/net/designware.c   |   1 +
 drivers/pinctrl/Kconfig|   1 +
 drivers/pinctrl/Makefile   |   1 +
 drivers/pinctrl/meson/Kconfig  |  11 +
 drivers/pinctrl/meson/Makefile |   6 +
 drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 432 +
 drivers/pinctrl/meson/pinctrl-meson.c  | 179 +
 drivers/pinctrl/meson/pinctrl-meson.h  |  74 
 drivers/pinctrl/pinctrl-generic.c  |   6 +-
 include/dt-bindings/gpio/meson-gxbb-gpio.h | 154 
 .../dt-bindings/reset/amlogic,meson-gxbb-reset.h   | 210 ++
 16 files changed, 1264 insertions(+), 19 deletions(-)
 create mode 100644 drivers/pinctrl/meson/Kconfig
 create mode 100644 drivers/pinctrl/meson/Makefile
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson-gxbb.c
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson.c
 create mode 100644 drivers/pinctrl/meson/pinctrl-meson.h
 create mode 100644 include/dt-bindings/gpio/meson-gxbb-gpio.h
 create mode 100644 include/dt-bindings/reset/amlogic,meson-gxbb-reset.h

-- 
2.7.4

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Re: [U-Boot] [PATCH v7 0/4] Amlogic Meson GXBaby and ODROID-C2 support

[Beniamino Galvani]

On Mon, Jul 11, 2016 at 05:23:15AM +0100, Peter Robinson wrote:
> On Mon, Jul 11, 2016 at 4:57 AM, Andreas Färber  wrote:

> > Last output:
> >
> > NOTICE:  BL3-1: v1.0(debug):4d2e34d
> > NOTICE:  BL3-1: Built : 17:08:35, Oct 29 2015
> > INFO:BL3-1: Initializing runtime services
> > INFO:BL3-1: Preparing for EL3 exit to normal world
> > INFO:BL3-1: Next image address = 0x100
> > INFO:BL3-1: Next image spsr = 0x3c9
> >
> > I.e., no U-Boot SPL output on serial.
> 
> I see similar on Pine64 with 2016.07rc3

Here the first non-booting commit is:

commit d73718f3236c520a92efa401084c658e6cc067f3
Author: Mingkai Hu 
Date:   Thu Jul 7 12:22:12 2016 +0800

armv8: Enable CPUECTLR.SMPEN for coherency


Mingkai, any ideas about how to debug or fix this?

Beniamino
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Re: [U-Boot] [PATCH v2 2/2] board: amlogic: Rename folder for Amlogic boards

[Beniamino Galvani]

On Fri, Jun 10, 2016 at 08:18:23PM +0200, Carlo Caione wrote:
> From: Carlo Caione <ca...@endlessm.com>
> 
> s/hardkernel/amlogic/ to have a single place for all the amlogic-based
> boards.

Makes sense.

Acked-by: Beniamino Galvani <b.galv...@gmail.com>
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Re: [U-Boot] [PATCH v2 1/2] configs: gxbb: Introduce a common config header file

[Beniamino Galvani]

On Fri, Jun 10, 2016 at 08:18:22PM +0200, Carlo Caione wrote:
> From: Carlo Caione <ca...@endlessm.com>
> 
> Introduce a meson-gxbb-common.h header file and derive the
> configuration for Hardkernel Odroid-C2 board from that.

Acked-by: Beniamino Galvani <b.galv...@gmail.com>
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Re: [U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

On Sun, May 01, 2016 at 12:56:21PM -0600, Simon Glass wrote:
> > +config ARCH_MESON
> > +   bool "Amlogic Meson"
> 
> Please add a help message describing what this is and what features it has.

Fixed in v7.

> > +   /* Reset PHY on GPIOZ_14 */
> > +   clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
> > +   clrbits_le32(GXBB_GPIO_OUT(3), BIT(14));
> > +   mdelay(10);
> > +   setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
> 
> Once you have a GPIO/pinctrl driver this could presumably be replaced.

Yeah, that's in my TODO list.

Thanks,
Beniamino
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[U-Boot] [PATCH v7 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
Acked-by: Joe Hershberger <joe.hershber...@ni.com>
---
 drivers/net/designware.c | 59 ++--
 drivers/net/designware.h |  4 ++--
 2 files changed, 34 insertions(+), 29 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ca58f34..2eda461 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Tx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-  (unsigned int)priv->tx_mac_descrtable +
+   flush_dcache_range((ulong)priv->tx_mac_descrtable,
+  (ulong)priv->tx_mac_descrtable +
   sizeof(priv->tx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 * Otherwise there's a chance to get some of them flushed in RAM when
 * GMAC is already pushing data to RAM via DMA. This way incoming from
 * GMAC data will be corrupted. */
-   flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-  RX_TOTAL_BUFSIZE);
+   flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
desc_p->dmamac_cntl =
(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Rx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-  (unsigned int)priv->rx_mac_descrtable +
+   flush_dcache_range((ulong)priv->rx_mac_descrtable,
+  (ulong)priv->rx_mac_descrtable +
   sizeof(priv->rx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u32 desc_num = priv->tx_currdescnum;
struct dmamacdescr *desc_p = >tx_mac_descrtable[desc_num];
-   uint32_t desc_start = (uint32_t)desc_p;
-   uint32_t desc_end = desc_start +
+   ulong desc_start = (ulong)desc_p;
+   ulong desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-   uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-   uint32_t data_end = data_start +
-   roundup(length, ARCH_DMA_MINALIGN);
+   ulong data_start = desc_p->dmamac_addr;
+   ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
/*
 * Strictly we only need to invalidate the "txrx_status" field
 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
return -EPERM;
}
 
-   memcpy(desc_p->dmamac_addr, packet, length);
+   memcpy((void *)data_start, packet, length);
 
/* Flush data to be sent */
flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar 
**packetp)
u32 status, desc_num = priv->rx_currdescnum;
struct dmamacdescr *desc_p = >rx_mac_descrtable[desc_num];
 

[U-Boot] [PATCH v7 1/4] arm: implement generic PSCI reset call for armv8

[Beniamino Galvani]

Add a psci_system_reset() which calls the SYSTEM_RESET function of
PSCI 0.2 and can be used by boards that support it to implement
reset_cpu().

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/cpu/armv8/fwcall.c   | 16 
 arch/arm/include/asm/psci.h   | 17 -
 arch/arm/include/asm/system.h |  2 ++
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
index 9efcc5a..079e250 100644
--- a/arch/arm/cpu/armv8/fwcall.c
+++ b/arch/arm/cpu/armv8/fwcall.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
@@ -73,3 +74,18 @@ void smc_call(struct pt_regs *args)
  "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
  "x16", "x17");
 }
+
+void __noreturn psci_system_reset(bool conduit_smc)
+{
+   struct pt_regs regs;
+
+   regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
+
+   if (conduit_smc)
+   smc_call();
+   else
+   hvc_call();
+
+   while (1)
+   ;
+}
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 128a606..3704f07 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -18,7 +18,7 @@
 #ifndef __ARM_PSCI_H__
 #define __ARM_PSCI_H__
 
-/* PSCI interface */
+/* PSCI 0.1 interface */
 #define ARM_PSCI_FN_BASE   0x95c1ba5e
 #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n))
 
@@ -32,6 +32,21 @@
 #define ARM_PSCI_RET_INVAL (-2)
 #define ARM_PSCI_RET_DENIED(-3)
 
+/* PSCI 0.2 interface */
+#define ARM_PSCI_0_2_FN_BASE   0x8400
+#define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n))
+
+#define ARM_PSCI_0_2_FN_PSCI_VERSION   ARM_PSCI_0_2_FN(0)
+#define ARM_PSCI_0_2_FN_CPU_SUSPENDARM_PSCI_0_2_FN(1)
+#define ARM_PSCI_0_2_FN_CPU_OFFARM_PSCI_0_2_FN(2)
+#define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3)
+#define ARM_PSCI_0_2_FN_AFFINITY_INFO  ARM_PSCI_0_2_FN(4)
+#define ARM_PSCI_0_2_FN_MIGRATEARM_PSCI_0_2_FN(5)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE  ARM_PSCI_0_2_FN(6)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPUARM_PSCI_0_2_FN(7)
+#define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8)
+#define ARM_PSCI_0_2_FN_SYSTEM_RESET   ARM_PSCI_0_2_FN(9)
+
 #ifndef __ASSEMBLY__
 int psci_update_dt(void *fdt);
 void psci_board_init(void);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 9ae890a..2bdc0be 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -128,6 +128,8 @@ void hvc_call(struct pt_regs *args);
  */
 void smc_call(struct pt_regs *args);
 
+void __noreturn psci_system_reset(bool smc);
+
 #endif /* __ASSEMBLY__ */
 
 #else /* CONFIG_ARM64 */
-- 
2.7.3

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[U-Boot] [PATCH v7 4/4] arm: meson: implement calls to secure monitor

[Beniamino Galvani]

Implement calls to secure monitor to read the MAC address from e-fuse.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/sm.h   | 12 +++
 arch/arm/mach-meson/Makefile   |  2 +-
 arch/arm/mach-meson/board.c|  1 +
 arch/arm/mach-meson/sm.c   | 57 ++
 board/hardkernel/odroid-c2/odroid-c2.c | 16 ++
 5 files changed, 87 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/sm.c

diff --git a/arch/arm/include/asm/arch-meson/sm.h 
b/arch/arm/include/asm/arch-meson/sm.h
new file mode 100644
index 000..225438d
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __MESON_SM_H__
+#define __MESON_SM_H__
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+
+#endif /* __MESON_SM_H__ */
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index 44e3d63..bf49b8b 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += board.o
+obj-y += board.o sm.o
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index 782f86c..64fa3c1 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
new file mode 100644
index 000..1b35a22
--- /dev/null
+++ b/arch/arm/mach-meson/sm.c
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Secure monitor calls.
+ */
+
+#include 
+#include 
+#include 
+
+#define FN_GET_SHARE_MEM_INPUT_BASE0x8220
+#define FN_GET_SHARE_MEM_OUTPUT_BASE   0x8221
+#define FN_EFUSE_READ  0x8230
+#define FN_EFUSE_WRITE 0x8231
+
+static void *shmem_input;
+static void *shmem_output;
+
+static void meson_init_shmem(void)
+{
+   struct pt_regs regs;
+
+   if (shmem_input && shmem_output)
+   return;
+
+   regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE;
+   smc_call();
+   shmem_input = (void *)regs.regs[0];
+
+   regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE;
+   smc_call();
+   shmem_output = (void *)regs.regs[0];
+
+   debug("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output);
+}
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size)
+{
+   struct pt_regs regs;
+
+   meson_init_shmem();
+
+   regs.regs[0] = FN_EFUSE_READ;
+   regs.regs[1] = offset;
+   regs.regs[2] = size;
+
+   smc_call();
+
+   if (regs.regs[0] == 0)
+   return -1;
+
+   memcpy(buffer, shmem_output, min(size, regs.regs[0]));
+
+   return regs.regs[0];
+}
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c 
b/board/hardkernel/odroid-c2/odroid-c2.c
index c258d4f..bd72100 100644
--- a/board/hardkernel/odroid-c2/odroid-c2.c
+++ b/board/hardkernel/odroid-c2/odroid-c2.c
@@ -7,9 +7,15 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
+#define EFUSE_SN_OFFSET20
+#define EFUSE_SN_SIZE  16
+#define EFUSE_MAC_OFFSET   52
+#define EFUSE_MAC_SIZE 6
+
 int board_init(void)
 {
return 0;
@@ -27,6 +33,9 @@ U_BOOT_DEVICE(meson_eth) = {
 
 int misc_init_r(void)
 {
+   u8 mac_addr[EFUSE_MAC_SIZE];
+   ssize_t len;
+
/* Select Ethernet function */
setbits_le32(GXBB_PINMUX(6), 0x3fff);
 
@@ -47,5 +56,12 @@ int misc_init_r(void)
mdelay(10);
setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
 
+   if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+   len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+   if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+   eth_setenv_enetaddr("ethaddr", mac_addr);
+   }
+
return 0;
 }
-- 
2.7.3

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[U-Boot] [PATCH v7 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
Reviewed-by: Simon Glass <s...@chromium.org>
---
 arch/arm/Kconfig   |   9 ++
 arch/arm/Makefile  |   1 +
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  66 
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  51 ++
 configs/odroid-c2_defconfig|  23 +
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  51 ++
 19 files changed, 803 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b65d8e..2786372 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -456,6 +456,13 @@ config ARCH_KEYSTONE
select SUPPORT_SPL
select CMD_POWEROFF
 
+config ARCH_MESON
+   bool "Amlogic Meson"
+   help
+ Support for the Meson SoC family developed by Amlogic Inc.,
+ targeted at media players and tablet computers. We currently
+ support the S905 (GXBaby) 64-bit SoC.
+
 config ARCH_MX7
bool "Freescale MX7"
select CPU_V7
@@ -781,6 +788,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d516345..ecd1887 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)   += highbank
 machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD) += kirkwood
+machine-$(CONFIG_ARCH_MESON)   += meson
 machine-$(CONFIG_ARCH_MVEBU)   += mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d1f8e22..136a7d8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -26,6 +26,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-jerry.dtb \
rk3288-rock2-square.dtb \
rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+   meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
new file mode 100644
index 000..653c2fa
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khil...@kernel.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This lib

[U-Boot] [PATCH v7 0/4] Amlogic Meson GXBaby and ODROID-C2 support

[Beniamino Galvani]

Hi,

this series adds a very basic support for Amlogic S905 SoC (GXBaby)
and for the ODROID-C2 board [1], and is based on u-boot sources
available from the board vendor [2]. At the moment the only supported
devices are the integrated UART and Ethernet adapter.

Changes since v6:
 - documented ARCH_MESON Kconfig entry

Changes since v5:
 - used default CONFIG_SYS_BAUDRATE_TABLE
 - removed check for CONFIG_IDENT_STRING

Changes since v4:
 - added patch to implement generic PSCI reset
 - used min() macro from linux/kernel.h

Changes since v3:
 - designware eth: added check that buffer addresses are in first 4GiB
   as suggested by Marek (and thus removed the ack tags)
 - consolidated pinmux and gpio macros
 - used get_unaligned_be64() to avoid alignment faults in dram_init()
 - uint32_t -> u32 in serial_meson.c
 - implemented reboot and read from e-fuse through secure monitor

Changes since v2:
 - squashed all platform patches into a single one
 - got rid of additional non-upstream DTS node for ethernet
 - improved board README
 - added macros for SoC registers fields

Changes since v1:
 - updated DTS files from Linux kernel
 - added Ethernet support
 - first 16MiB of RAM are now marked as unavailable; this seems to
   be required to successfully boot Linux
 - fixed typo in config file

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01

Beniamino Galvani (4):
  arm: implement generic PSCI reset call for armv8
  net: designware: fix descriptor layout and warnings on 64-bit archs
  arm: add initial support for Amlogic Meson and ODROID-C2
  arm: meson: implement calls to secure monitor

 arch/arm/Kconfig   |   9 ++
 arch/arm/Makefile  |   1 +
 arch/arm/cpu/armv8/fwcall.c|  16 +++
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/include/asm/arch-meson/sm.h   |  12 +++
 arch/arm/include/asm/psci.h|  17 +++-
 arch/arm/include/asm/system.h  |   2 +
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  67 +
 arch/arm/mach-meson/sm.c   |  57 +++
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  67 +
 configs/odroid-c2_defconfig|  23 +
 drivers/net/designware.c   |  59 ++-
 drivers/net/designware.h   |   4 +-
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  51 ++
 26 files changed, 957 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 arch/arm/mach-meson/sm.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

-- 
2.7.3

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[U-Boot] [PATCH v6 4/4] arm: meson: implement calls to secure monitor

[Beniamino Galvani]

Implement calls to secure monitor to read the MAC address from e-fuse.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/sm.h   | 12 +++
 arch/arm/mach-meson/Makefile   |  2 +-
 arch/arm/mach-meson/board.c|  1 +
 arch/arm/mach-meson/sm.c   | 57 ++
 board/hardkernel/odroid-c2/odroid-c2.c | 16 ++
 5 files changed, 87 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/sm.c

diff --git a/arch/arm/include/asm/arch-meson/sm.h 
b/arch/arm/include/asm/arch-meson/sm.h
new file mode 100644
index 000..225438d
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __MESON_SM_H__
+#define __MESON_SM_H__
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+
+#endif /* __MESON_SM_H__ */
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index 44e3d63..bf49b8b 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += board.o
+obj-y += board.o sm.o
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index 782f86c..64fa3c1 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
new file mode 100644
index 000..1b35a22
--- /dev/null
+++ b/arch/arm/mach-meson/sm.c
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Secure monitor calls.
+ */
+
+#include 
+#include 
+#include 
+
+#define FN_GET_SHARE_MEM_INPUT_BASE0x8220
+#define FN_GET_SHARE_MEM_OUTPUT_BASE   0x8221
+#define FN_EFUSE_READ  0x8230
+#define FN_EFUSE_WRITE 0x8231
+
+static void *shmem_input;
+static void *shmem_output;
+
+static void meson_init_shmem(void)
+{
+   struct pt_regs regs;
+
+   if (shmem_input && shmem_output)
+   return;
+
+   regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE;
+   smc_call();
+   shmem_input = (void *)regs.regs[0];
+
+   regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE;
+   smc_call();
+   shmem_output = (void *)regs.regs[0];
+
+   debug("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output);
+}
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size)
+{
+   struct pt_regs regs;
+
+   meson_init_shmem();
+
+   regs.regs[0] = FN_EFUSE_READ;
+   regs.regs[1] = offset;
+   regs.regs[2] = size;
+
+   smc_call();
+
+   if (regs.regs[0] == 0)
+   return -1;
+
+   memcpy(buffer, shmem_output, min(size, regs.regs[0]));
+
+   return regs.regs[0];
+}
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c 
b/board/hardkernel/odroid-c2/odroid-c2.c
index c258d4f..bd72100 100644
--- a/board/hardkernel/odroid-c2/odroid-c2.c
+++ b/board/hardkernel/odroid-c2/odroid-c2.c
@@ -7,9 +7,15 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
+#define EFUSE_SN_OFFSET20
+#define EFUSE_SN_SIZE  16
+#define EFUSE_MAC_OFFSET   52
+#define EFUSE_MAC_SIZE 6
+
 int board_init(void)
 {
return 0;
@@ -27,6 +33,9 @@ U_BOOT_DEVICE(meson_eth) = {
 
 int misc_init_r(void)
 {
+   u8 mac_addr[EFUSE_MAC_SIZE];
+   ssize_t len;
+
/* Select Ethernet function */
setbits_le32(GXBB_PINMUX(6), 0x3fff);
 
@@ -47,5 +56,12 @@ int misc_init_r(void)
mdelay(10);
setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
 
+   if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+   len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+   if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+   eth_setenv_enetaddr("ethaddr", mac_addr);
+   }
+
return 0;
 }
-- 
2.7.3

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[U-Boot] [PATCH v6 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  66 
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  51 ++
 configs/odroid-c2_defconfig|  23 +
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  51 ++
 19 files changed, 799 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 6b65d8e..6252f5a 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE
select SUPPORT_SPL
select CMD_POWEROFF
 
+config ARCH_MESON
+   bool "Amlogic Meson"
+
 config ARCH_MX7
bool "Freescale MX7"
select CPU_V7
@@ -781,6 +784,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d516345..ecd1887 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)   += highbank
 machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD) += kirkwood
+machine-$(CONFIG_ARCH_MESON)   += meson
 machine-$(CONFIG_ARCH_MVEBU)   += mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index d1f8e22..136a7d8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -26,6 +26,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-jerry.dtb \
rk3288-rock2-square.dtb \
rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+   meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
new file mode 100644
index 000..653c2fa
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khil...@kernel.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *

[U-Boot] [PATCH v6 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
Acked-by: Joe Hershberger <joe.hershber...@ni.com>
---
 drivers/net/designware.c | 59 ++--
 drivers/net/designware.h |  4 ++--
 2 files changed, 34 insertions(+), 29 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ca58f34..2eda461 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Tx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-  (unsigned int)priv->tx_mac_descrtable +
+   flush_dcache_range((ulong)priv->tx_mac_descrtable,
+  (ulong)priv->tx_mac_descrtable +
   sizeof(priv->tx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 * Otherwise there's a chance to get some of them flushed in RAM when
 * GMAC is already pushing data to RAM via DMA. This way incoming from
 * GMAC data will be corrupted. */
-   flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-  RX_TOTAL_BUFSIZE);
+   flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
desc_p->dmamac_cntl =
(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Rx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-  (unsigned int)priv->rx_mac_descrtable +
+   flush_dcache_range((ulong)priv->rx_mac_descrtable,
+  (ulong)priv->rx_mac_descrtable +
   sizeof(priv->rx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u32 desc_num = priv->tx_currdescnum;
struct dmamacdescr *desc_p = >tx_mac_descrtable[desc_num];
-   uint32_t desc_start = (uint32_t)desc_p;
-   uint32_t desc_end = desc_start +
+   ulong desc_start = (ulong)desc_p;
+   ulong desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-   uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-   uint32_t data_end = data_start +
-   roundup(length, ARCH_DMA_MINALIGN);
+   ulong data_start = desc_p->dmamac_addr;
+   ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
/*
 * Strictly we only need to invalidate the "txrx_status" field
 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
return -EPERM;
}
 
-   memcpy(desc_p->dmamac_addr, packet, length);
+   memcpy((void *)data_start, packet, length);
 
/* Flush data to be sent */
flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar 
**packetp)
u32 status, desc_num = priv->rx_currdescnum;
struct dmamacdescr *desc_p = >rx_mac_descrtable[desc_num];
 

[U-Boot] [PATCH v6 1/4] arm: implement generic PSCI reset call for armv8

[Beniamino Galvani]

Add a psci_system_reset() which calls the SYSTEM_RESET function of
PSCI 0.2 and can be used by boards that support it to implement
reset_cpu().

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/cpu/armv8/fwcall.c   | 16 
 arch/arm/include/asm/psci.h   | 17 -
 arch/arm/include/asm/system.h |  2 ++
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
index 9efcc5a..079e250 100644
--- a/arch/arm/cpu/armv8/fwcall.c
+++ b/arch/arm/cpu/armv8/fwcall.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
@@ -73,3 +74,18 @@ void smc_call(struct pt_regs *args)
  "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
  "x16", "x17");
 }
+
+void __noreturn psci_system_reset(bool conduit_smc)
+{
+   struct pt_regs regs;
+
+   regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
+
+   if (conduit_smc)
+   smc_call();
+   else
+   hvc_call();
+
+   while (1)
+   ;
+}
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 128a606..3704f07 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -18,7 +18,7 @@
 #ifndef __ARM_PSCI_H__
 #define __ARM_PSCI_H__
 
-/* PSCI interface */
+/* PSCI 0.1 interface */
 #define ARM_PSCI_FN_BASE   0x95c1ba5e
 #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n))
 
@@ -32,6 +32,21 @@
 #define ARM_PSCI_RET_INVAL (-2)
 #define ARM_PSCI_RET_DENIED(-3)
 
+/* PSCI 0.2 interface */
+#define ARM_PSCI_0_2_FN_BASE   0x8400
+#define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n))
+
+#define ARM_PSCI_0_2_FN_PSCI_VERSION   ARM_PSCI_0_2_FN(0)
+#define ARM_PSCI_0_2_FN_CPU_SUSPENDARM_PSCI_0_2_FN(1)
+#define ARM_PSCI_0_2_FN_CPU_OFFARM_PSCI_0_2_FN(2)
+#define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3)
+#define ARM_PSCI_0_2_FN_AFFINITY_INFO  ARM_PSCI_0_2_FN(4)
+#define ARM_PSCI_0_2_FN_MIGRATEARM_PSCI_0_2_FN(5)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE  ARM_PSCI_0_2_FN(6)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPUARM_PSCI_0_2_FN(7)
+#define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8)
+#define ARM_PSCI_0_2_FN_SYSTEM_RESET   ARM_PSCI_0_2_FN(9)
+
 #ifndef __ASSEMBLY__
 int psci_update_dt(void *fdt);
 void psci_board_init(void);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 9ae890a..2bdc0be 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -128,6 +128,8 @@ void hvc_call(struct pt_regs *args);
  */
 void smc_call(struct pt_regs *args);
 
+void __noreturn psci_system_reset(bool smc);
+
 #endif /* __ASSEMBLY__ */
 
 #else /* CONFIG_ARM64 */
-- 
2.7.3

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[U-Boot] [PATCH v6 0/4] Amlogic Meson GXBaby and ODROID-C2 support

[Beniamino Galvani]

Hi,

this series adds a very basic support for Amlogic S905 SoC (GXBaby)
and for the ODROID-C2 board [1], and is based on u-boot sources
available from the board vendor [2]. At the moment the only supported
devices are the integrated UART and Ethernet adapter.

Changes since v5:
 - used default CONFIG_SYS_BAUDRATE_TABLE
 - removed check for CONFIG_IDENT_STRING already set

Changes since v4:
 - added patch to implement generic PSCI reset
 - used min() macro from linux/kernel.h

Changes since v3:
 - designware eth: added check that buffer addresses are in first 4GiB
   as suggested by Marek (and thus removed the ack tags)
 - consolidated pinmux and gpio macros
 - used get_unaligned_be64() to avoid alignment faults in dram_init()
 - uint32_t -> u32 in serial_meson.c
 - implemented reboot and read from e-fuse through secure monitor

Changes since v2:
 - squashed all platform patches into a single one
 - got rid of additional non-upstream DTS node for ethernet
 - improved board README
 - added macros for SoC registers fields

Changes since v1:
 - updated DTS files from Linux kernel
 - added Ethernet support
 - first 16MiB of RAM are now marked as unavailable; this seems to
   be required to successfully boot Linux
 - fixed typo in config file

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01

Beniamino Galvani (4):
  arm: implement generic PSCI reset call for armv8
  net: designware: fix descriptor layout and warnings on 64-bit archs
  arm: add initial support for Amlogic Meson and ODROID-C2
  arm: meson: implement calls to secure monitor

 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/cpu/armv8/fwcall.c|  16 +++
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/include/asm/arch-meson/sm.h   |  12 +++
 arch/arm/include/asm/psci.h|  17 +++-
 arch/arm/include/asm/system.h  |   2 +
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  67 +
 arch/arm/mach-meson/sm.c   |  57 +++
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  67 +
 configs/odroid-c2_defconfig|  23 +
 drivers/net/designware.c   |  59 ++-
 drivers/net/designware.h   |   4 +-
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  51 ++
 26 files changed, 953 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 arch/arm/mach-meson/sm.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

-- 
2.7.3

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Re: [U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

On Mon, Apr 25, 2016 at 04:53:09PM -0400, Tom Rini wrote:
> > +#if !defined(CONFIG_IDENT_STRING)
> > +# define CONFIG_IDENT_STRING   " odroid-c2"
> > +#endif
> 
> Would this ever already be set?

No, it shouldn't.

> > +/* Serial setup */
> > +#define CONFIG_CONS_INDEX  0
> > +#define CONFIG_BAUDRATE115200
> > +#define CONFIG_SYS_BAUDRATE_TABLE \
> > +   { 4800, 9600, 19200, 38400, 57600, 115200 }
> 
> And I assume you could live with the default table really.

Right.

I will fix both and resubmit, thanks!

Beniamino
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Re: [U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

On Mon, Apr 25, 2016 at 01:01:10PM -0500, Joe Hershberger wrote:
> > -   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
> > -   desc_p->dmamac_next = _table_p[idx + 1];
> > +   desc_p->dmamac_addr = (ulong)[idx * 
> > CONFIG_ETH_BUFSIZE];
> > +   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
> 
> Why are you not casting to the type of the struct member (u32)? Won't
> this emit warnings on 64-bit?

Hi,

casting to u32 would cause a warning on arm64 ("warning: cast from
pointer to integer of different size [-Wpointer-to-int-cast]") because
the pointer is 64bit.

The (ulong) cast is needed to convert the pointer to an arithmetic
type of same width, which then can be assigned to the struct
member. The assignment operator implicitly converts between different
arithmetic types without the need for explicit casts.

Beniamino
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[U-Boot] [PATCH v5 3/4] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  66 
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  51 ++
 configs/odroid-c2_defconfig|  23 +
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  55 ++
 19 files changed, 803 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d1c3157..95a0838 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE
select SUPPORT_SPL
select CMD_POWEROFF
 
+config ARCH_MESON
+   bool "Amlogic Meson"
+
 config ARCH_MX7
bool "Freescale MX7"
select CPU_V7
@@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d516345..ecd1887 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)   += highbank
 machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD) += kirkwood
+machine-$(CONFIG_ARCH_MESON)   += meson
 machine-$(CONFIG_ARCH_MVEBU)   += mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aa31fd9..be28d21 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-jerry.dtb \
rk3288-rock2-square.dtb \
rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+   meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
new file mode 100644
index 000..653c2fa
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khil...@kernel.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *

[U-Boot] [PATCH v5 4/4] arm: meson: implement calls to secure monitor

[Beniamino Galvani]

Implement calls to secure monitor to read the MAC address from e-fuse.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/sm.h   | 12 +++
 arch/arm/mach-meson/Makefile   |  2 +-
 arch/arm/mach-meson/board.c|  1 +
 arch/arm/mach-meson/sm.c   | 57 ++
 board/hardkernel/odroid-c2/odroid-c2.c | 16 ++
 5 files changed, 87 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/sm.c

diff --git a/arch/arm/include/asm/arch-meson/sm.h 
b/arch/arm/include/asm/arch-meson/sm.h
new file mode 100644
index 000..225438d
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -0,0 +1,12 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __MESON_SM_H__
+#define __MESON_SM_H__
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+
+#endif /* __MESON_SM_H__ */
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index 44e3d63..bf49b8b 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += board.o
+obj-y += board.o sm.o
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index 782f86c..64fa3c1 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
new file mode 100644
index 000..1b35a22
--- /dev/null
+++ b/arch/arm/mach-meson/sm.c
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Secure monitor calls.
+ */
+
+#include 
+#include 
+#include 
+
+#define FN_GET_SHARE_MEM_INPUT_BASE0x8220
+#define FN_GET_SHARE_MEM_OUTPUT_BASE   0x8221
+#define FN_EFUSE_READ  0x8230
+#define FN_EFUSE_WRITE 0x8231
+
+static void *shmem_input;
+static void *shmem_output;
+
+static void meson_init_shmem(void)
+{
+   struct pt_regs regs;
+
+   if (shmem_input && shmem_output)
+   return;
+
+   regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE;
+   smc_call();
+   shmem_input = (void *)regs.regs[0];
+
+   regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE;
+   smc_call();
+   shmem_output = (void *)regs.regs[0];
+
+   debug("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output);
+}
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size)
+{
+   struct pt_regs regs;
+
+   meson_init_shmem();
+
+   regs.regs[0] = FN_EFUSE_READ;
+   regs.regs[1] = offset;
+   regs.regs[2] = size;
+
+   smc_call();
+
+   if (regs.regs[0] == 0)
+   return -1;
+
+   memcpy(buffer, shmem_output, min(size, regs.regs[0]));
+
+   return regs.regs[0];
+}
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c 
b/board/hardkernel/odroid-c2/odroid-c2.c
index c258d4f..bd72100 100644
--- a/board/hardkernel/odroid-c2/odroid-c2.c
+++ b/board/hardkernel/odroid-c2/odroid-c2.c
@@ -7,9 +7,15 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
+#define EFUSE_SN_OFFSET20
+#define EFUSE_SN_SIZE  16
+#define EFUSE_MAC_OFFSET   52
+#define EFUSE_MAC_SIZE 6
+
 int board_init(void)
 {
return 0;
@@ -27,6 +33,9 @@ U_BOOT_DEVICE(meson_eth) = {
 
 int misc_init_r(void)
 {
+   u8 mac_addr[EFUSE_MAC_SIZE];
+   ssize_t len;
+
/* Select Ethernet function */
setbits_le32(GXBB_PINMUX(6), 0x3fff);
 
@@ -47,5 +56,12 @@ int misc_init_r(void)
mdelay(10);
setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
 
+   if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+   len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+   if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+   eth_setenv_enetaddr("ethaddr", mac_addr);
+   }
+
return 0;
 }
-- 
2.7.3

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[U-Boot] [PATCH v5 2/4] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/net/designware.c | 59 ++--
 drivers/net/designware.h |  4 ++--
 2 files changed, 34 insertions(+), 29 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ca58f34..2eda461 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Tx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-  (unsigned int)priv->tx_mac_descrtable +
+   flush_dcache_range((ulong)priv->tx_mac_descrtable,
+  (ulong)priv->tx_mac_descrtable +
   sizeof(priv->tx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 * Otherwise there's a chance to get some of them flushed in RAM when
 * GMAC is already pushing data to RAM via DMA. This way incoming from
 * GMAC data will be corrupted. */
-   flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-  RX_TOTAL_BUFSIZE);
+   flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
desc_p->dmamac_cntl =
(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Rx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-  (unsigned int)priv->rx_mac_descrtable +
+   flush_dcache_range((ulong)priv->rx_mac_descrtable,
+  (ulong)priv->rx_mac_descrtable +
   sizeof(priv->rx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u32 desc_num = priv->tx_currdescnum;
struct dmamacdescr *desc_p = >tx_mac_descrtable[desc_num];
-   uint32_t desc_start = (uint32_t)desc_p;
-   uint32_t desc_end = desc_start +
+   ulong desc_start = (ulong)desc_p;
+   ulong desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-   uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-   uint32_t data_end = data_start +
-   roundup(length, ARCH_DMA_MINALIGN);
+   ulong data_start = desc_p->dmamac_addr;
+   ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
/*
 * Strictly we only need to invalidate the "txrx_status" field
 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
return -EPERM;
}
 
-   memcpy(desc_p->dmamac_addr, packet, length);
+   memcpy((void *)data_start, packet, length);
 
/* Flush data to be sent */
flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar 
**packetp)
u32 status, desc_num = priv->rx_currdescnum;
struct dmamacdescr *desc_p = >rx_mac_descrtable[desc_num];
int length = -EAGAIN;
-   uint32_t desc

[U-Boot] [PATCH v5 1/4] arm: implement generic PSCI reset call for armv8

[Beniamino Galvani]

Add a psci_system_reset() which calls the SYSTEM_RESET function of
PSCI 0.2 and can be used by boards that support it to implement
reset_cpu().

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/cpu/armv8/fwcall.c   | 16 
 arch/arm/include/asm/psci.h   | 17 -
 arch/arm/include/asm/system.h |  2 ++
 3 files changed, 34 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
index 9efcc5a..079e250 100644
--- a/arch/arm/cpu/armv8/fwcall.c
+++ b/arch/arm/cpu/armv8/fwcall.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 /*
@@ -73,3 +74,18 @@ void smc_call(struct pt_regs *args)
  "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15",
  "x16", "x17");
 }
+
+void __noreturn psci_system_reset(bool conduit_smc)
+{
+   struct pt_regs regs;
+
+   regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET;
+
+   if (conduit_smc)
+   smc_call();
+   else
+   hvc_call();
+
+   while (1)
+   ;
+}
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 128a606..3704f07 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -18,7 +18,7 @@
 #ifndef __ARM_PSCI_H__
 #define __ARM_PSCI_H__
 
-/* PSCI interface */
+/* PSCI 0.1 interface */
 #define ARM_PSCI_FN_BASE   0x95c1ba5e
 #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n))
 
@@ -32,6 +32,21 @@
 #define ARM_PSCI_RET_INVAL (-2)
 #define ARM_PSCI_RET_DENIED(-3)
 
+/* PSCI 0.2 interface */
+#define ARM_PSCI_0_2_FN_BASE   0x8400
+#define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n))
+
+#define ARM_PSCI_0_2_FN_PSCI_VERSION   ARM_PSCI_0_2_FN(0)
+#define ARM_PSCI_0_2_FN_CPU_SUSPENDARM_PSCI_0_2_FN(1)
+#define ARM_PSCI_0_2_FN_CPU_OFFARM_PSCI_0_2_FN(2)
+#define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3)
+#define ARM_PSCI_0_2_FN_AFFINITY_INFO  ARM_PSCI_0_2_FN(4)
+#define ARM_PSCI_0_2_FN_MIGRATEARM_PSCI_0_2_FN(5)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE  ARM_PSCI_0_2_FN(6)
+#define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPUARM_PSCI_0_2_FN(7)
+#define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8)
+#define ARM_PSCI_0_2_FN_SYSTEM_RESET   ARM_PSCI_0_2_FN(9)
+
 #ifndef __ASSEMBLY__
 int psci_update_dt(void *fdt);
 void psci_board_init(void);
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h
index 9ae890a..2bdc0be 100644
--- a/arch/arm/include/asm/system.h
+++ b/arch/arm/include/asm/system.h
@@ -128,6 +128,8 @@ void hvc_call(struct pt_regs *args);
  */
 void smc_call(struct pt_regs *args);
 
+void __noreturn psci_system_reset(bool smc);
+
 #endif /* __ASSEMBLY__ */
 
 #else /* CONFIG_ARM64 */
-- 
2.7.3

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[U-Boot] [PATCH v5 0/4] Amlogic Meson GXBaby and ODROID-C2 support

[Beniamino Galvani]

Hi,

this series adds a very basic support for Amlogic S905 SoC (GXBaby)
and for the ODROID-C2 board [1], and is based on u-boot sources
available from the board vendor [2]. At the moment the only supported
devices are the integrated UART and Ethernet adapter.

Changes since v4:
 - added patch to implement generic PSCI reset
 - used min() macro from linux/kernel.h

Changes since v3:
 - designware eth: added check that buffer addresses are in first 4GiB
   as suggested by Marek (and thus removed the ack tags)
 - consolidated pinmux and gpio macros
 - used get_unaligned_be64() to avoid alignment faults in dram_init()
 - uint32_t -> u32 in serial_meson.c
 - implemented reboot and read from e-fuse through secure monitor

Changes since v2:
 - squashed all platform patches into a single one
 - got rid of additional non-upstream DTS node for ethernet
 - improved board README
 - added macros for SoC registers fields

Changes since v1:
 - updated DTS files from Linux kernel
 - added Ethernet support
 - first 16MiB of RAM are now marked as unavailable; this seems to
   be required to successfully boot Linux
 - fixed typo in config file

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01

Beniamino Galvani (4):
  arm: implement generic PSCI reset call for armv8
  net: designware: fix descriptor layout and warnings on 64-bit archs
  arm: add initial support for Amlogic Meson and ODROID-C2
  arm: meson: implement calls to secure monitor

 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/cpu/armv8/fwcall.c|  16 +++
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/include/asm/arch-meson/sm.h   |  12 +++
 arch/arm/include/asm/psci.h|  17 +++-
 arch/arm/include/asm/system.h  |   2 +
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  67 +
 arch/arm/mach-meson/sm.c   |  57 +++
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  67 +
 configs/odroid-c2_defconfig|  23 +
 drivers/net/designware.c   |  59 ++-
 drivers/net/designware.h   |   4 +-
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  55 ++
 26 files changed, 957 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 arch/arm/mach-meson/sm.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

-- 
2.7.3

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Re: [U-Boot] [PATCH v4 1/3] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

On Mon, Apr 18, 2016 at 01:55:55PM +0200, Andreas Färber wrote:
> > +   if ((unsigned long long)priv + sizeof(*priv) > (1ULL << 32)) {
> 
> >=?

I think ">" is correct, the (unfortunate) case

  priv + size == (1 << 32)

is still acceptable because the last byte used by the structure would
be (priv + size - 1).

Beniamino
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Re: [U-Boot] [PATCH v4 3/3] arm: meson: implement calls to secure monitor

[Beniamino Galvani]

On Sun, Apr 17, 2016 at 12:00:59PM +0200, Marek Vasut wrote:
> > +#define MIN(a, b) ((a) < (b) ? (a) : (b))
> 
> See include/linux/kernel.h for min macro

Ah, I missed it, thanks!

Beniamino
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Re: [U-Boot] [PATCH v4 3/3] arm: meson: implement calls to secure monitor

[Beniamino Galvani]

On Sun, Apr 17, 2016 at 11:48:34AM +0200, Alexander Graf wrote:
> Shouldn't reboot be available as psci call? We could then have a
> generic reset function for systems with working psci in atf.

Yes, the 0x8409 function ID used to reset the board seems to be
actually a PSCI call, so probably a generic function could be
implemented and used. I will change this in the next version.

Thanks,
Beniamino
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Re: [U-Boot] [PATCH v4 1/3] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

On Mon, Apr 18, 2016 at 01:06:37PM +0200, Alexander Graf wrote:
> Hmm, this is going to get very interesting with efi_loader support. By
> default we allocate memory at the highest possible free address, so payloads
> will probably (unless they specify limits) have their buffers above 32bit on
> this platform. If we now deny any DMA to them, we basically break I/O
> access.

I'm not familiar with efi_loader, but on this platform the physical
RAM is within the 32bit memory range, so I don't think a workaround is
needed. And I guess probably it's the same for the other 64bit ARM SoC
using this driver.

BTW, I see that another driver (sunxi_mmc) also truncates the upper 32
bits of addresses on 64bit platforms. Maybe this issue should be
addresses in a generic way?

> Could you by any chance just use a bounce buffer?

Do you have any suggestions on how to do it? Are there any primitives
in u-boot to request memory from low addresses?

Beniamino
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Re: [U-Boot] [PATCH v4 1/3] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

On Sun, Apr 17, 2016 at 10:59:11PM +0200, Marek Vasut wrote:
> On 04/17/2016 01:14 PM, Beniamino Galvani wrote:
> > On Sun, Apr 17, 2016 at 11:56:58AM +0200, Marek Vasut wrote:
> >>> - desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
> >>> - desc_p->dmamac_next = _table_p[idx + 1];
> >>> + desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
> >>> + desc_p->dmamac_next = (ulong)_table_p[idx + 1];
> >>
> >> Why don't you use u32 instead of ulong ? The u32 is well defined.
> >> DTTO all over the place.
> > 
> > [idx * CONFIG_ETH_BUFSIZE] is a pointer (and hence has the
> > size of a ulong) and casting it to u32 would give a warning on 64 bit
> > archs ("cast from pointer to integer of different size").
> 
> Will cast to uintptr_t and then to u32 help ?

Note that uintptr_t is defined as ulong and the second cast to u32 is
not needed because C does not require casts between arithmetic
types. So I don't see much difference.

> It's just a feeling, but casting to ulong just to circumvent compiler
> warning does not sound right.

It seems fine to me, the (ulong) is needed to cast the pointer to an
arithmetic type of equivalent size which then can be assigned to an
u32 variable.

> >> btw just curious, but what will happen if the descriptors get allocated
> >> in area above 4GiB ? Will the code silently corrupt memory by discarding
> >> the top bits in the descriptor pointer?
> > 
> > No, if the driver private structure (which contains buffers and
> > descriptors) is above 4GiB, designware_initialize() will complain and
> > return an error.
> 
> Which code checks that ?

 +   if ((unsigned long long)priv + sizeof(*priv) > (1ULL << 32)) {
 +   printf("designware: buffers are outside DMA memory\n");
 +   return -EINVAL;
 +   }
 +

Beniamino
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Re: [U-Boot] [PATCH v4 1/3] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

On Sun, Apr 17, 2016 at 11:56:58AM +0200, Marek Vasut wrote:
> > -   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
> > -   desc_p->dmamac_next = _table_p[idx + 1];
> > +   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
> > +   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
> 
> Why don't you use u32 instead of ulong ? The u32 is well defined.
> DTTO all over the place.

[idx * CONFIG_ETH_BUFSIZE] is a pointer (and hence has the
size of a ulong) and casting it to u32 would give a warning on 64 bit
archs ("cast from pointer to integer of different size").

> btw just curious, but what will happen if the descriptors get allocated
> in area above 4GiB ? Will the code silently corrupt memory by discarding
> the top bits in the descriptor pointer?

No, if the driver private structure (which contains buffers and
descriptors) is above 4GiB, designware_initialize() will complain and
return an error.

Beniamino
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[U-Boot] [PATCH v4 2/3] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  66 
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  51 ++
 configs/odroid-c2_defconfig|  23 +
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  55 ++
 19 files changed, 803 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d1c3157..95a0838 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE
select SUPPORT_SPL
select CMD_POWEROFF
 
+config ARCH_MESON
+   bool "Amlogic Meson"
+
 config ARCH_MX7
bool "Freescale MX7"
select CPU_V7
@@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d516345..ecd1887 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)   += highbank
 machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD) += kirkwood
+machine-$(CONFIG_ARCH_MESON)   += meson
 machine-$(CONFIG_ARCH_MVEBU)   += mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aa31fd9..be28d21 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-jerry.dtb \
rk3288-rock2-square.dtb \
rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+   meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
new file mode 100644
index 000..653c2fa
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khil...@kernel.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *

[U-Boot] [PATCH v4 3/3] arm: meson: implement calls to secure monitor

[Beniamino Galvani]

Implement calls to the secure monitor to reset the board and read the
MAC address from e-fuse.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/sm.h   | 13 +++
 arch/arm/mach-meson/Makefile   |  2 +-
 arch/arm/mach-meson/board.c|  3 +-
 arch/arm/mach-meson/sm.c   | 71 ++
 board/hardkernel/odroid-c2/odroid-c2.c | 16 
 5 files changed, 103 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/sm.c

diff --git a/arch/arm/include/asm/arch-meson/sm.h 
b/arch/arm/include/asm/arch-meson/sm.h
new file mode 100644
index 000..87134c6
--- /dev/null
+++ b/arch/arm/include/asm/arch-meson/sm.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2016 - Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __MESON_SM_H__
+#define __MESON_SM_H__
+
+void meson_sm_reboot(void);
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
+
+#endif /* __MESON_SM_H__ */
diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile
index 44e3d63..bf49b8b 100644
--- a/arch/arm/mach-meson/Makefile
+++ b/arch/arm/mach-meson/Makefile
@@ -4,4 +4,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += board.o
+obj-y += board.o sm.o
diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index 05f4c79..6272f2f 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -8,6 +8,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -42,7 +43,7 @@ void dram_init_banksize(void)
 
 void reset_cpu(ulong addr)
 {
-   /* Not implemented yet */
+   meson_sm_reboot();
 }
 
 static struct mm_region gxbb_mem_map[] = {
diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c
new file mode 100644
index 000..3065bd2
--- /dev/null
+++ b/arch/arm/mach-meson/sm.c
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2016 Beniamino Galvani <b.galv...@gmail.com>
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ *
+ * Secure monitor calls.
+ */
+
+#include 
+#include 
+
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+
+#define FN_GET_SHARE_MEM_INPUT_BASE0x8220
+#define FN_GET_SHARE_MEM_OUTPUT_BASE   0x8221
+#define FN_EFUSE_READ  0x8230
+#define FN_EFUSE_WRITE 0x8231
+#define FN_REBOOT  0x8409
+
+static void *shmem_input;
+static void *shmem_output;
+
+static void meson_init_shmem(void)
+{
+   struct pt_regs regs;
+
+   if (shmem_input && shmem_output)
+   return;
+
+   regs.regs[0] = FN_GET_SHARE_MEM_INPUT_BASE;
+   smc_call();
+   shmem_input = (void *)regs.regs[0];
+
+   regs.regs[0] = FN_GET_SHARE_MEM_OUTPUT_BASE;
+   smc_call();
+   shmem_output = (void *)regs.regs[0];
+
+   debug("Secure Monitor shmem: 0x%p 0x%p\n", shmem_input, shmem_output);
+}
+
+void meson_sm_reboot(void)
+{
+   struct pt_regs regs;
+
+   regs.regs[0] = FN_REBOOT;
+   regs.regs[1] = 1; /* normal reboot */
+   regs.regs[2] = 0;
+   regs.regs[3] = 0;
+
+   smc_call();
+}
+
+ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size)
+{
+   struct pt_regs regs;
+
+   meson_init_shmem();
+
+   regs.regs[0] = FN_EFUSE_READ;
+   regs.regs[1] = offset;
+   regs.regs[2] = size;
+
+   smc_call();
+
+   if (regs.regs[0] == 0)
+   return -1;
+
+   memcpy(buffer, shmem_output, MIN(size, regs.regs[0]));
+
+   return regs.regs[0];
+}
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c 
b/board/hardkernel/odroid-c2/odroid-c2.c
index c258d4f..bd72100 100644
--- a/board/hardkernel/odroid-c2/odroid-c2.c
+++ b/board/hardkernel/odroid-c2/odroid-c2.c
@@ -7,9 +7,15 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
+#define EFUSE_SN_OFFSET20
+#define EFUSE_SN_SIZE  16
+#define EFUSE_MAC_OFFSET   52
+#define EFUSE_MAC_SIZE 6
+
 int board_init(void)
 {
return 0;
@@ -27,6 +33,9 @@ U_BOOT_DEVICE(meson_eth) = {
 
 int misc_init_r(void)
 {
+   u8 mac_addr[EFUSE_MAC_SIZE];
+   ssize_t len;
+
/* Select Ethernet function */
setbits_le32(GXBB_PINMUX(6), 0x3fff);
 
@@ -47,5 +56,12 @@ int misc_init_r(void)
mdelay(10);
setbits_le32(GXBB_GPIO_OUT(3), BIT(14));
 
+   if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
+   len = meson_sm_read_efuse(EFUSE_MAC_OFFSET,
+ mac_addr, EFUSE_MAC_SIZE);
+   if (len == EFUSE_MAC_SIZE && is_valid_ethaddr(mac_addr))
+   eth_setenv_enetaddr("ethaddr", mac_addr);
+   }
+
return 0;
 }
-- 
2.7.3

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[U-Boot] [PATCH v4 1/3] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/net/designware.c | 59 ++--
 drivers/net/designware.h |  4 ++--
 2 files changed, 34 insertions(+), 29 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ca58f34..2eda461 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Tx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-  (unsigned int)priv->tx_mac_descrtable +
+   flush_dcache_range((ulong)priv->tx_mac_descrtable,
+  (ulong)priv->tx_mac_descrtable +
   sizeof(priv->tx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 * Otherwise there's a chance to get some of them flushed in RAM when
 * GMAC is already pushing data to RAM via DMA. This way incoming from
 * GMAC data will be corrupted. */
-   flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-  RX_TOTAL_BUFSIZE);
+   flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
desc_p->dmamac_cntl =
(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Rx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-  (unsigned int)priv->rx_mac_descrtable +
+   flush_dcache_range((ulong)priv->rx_mac_descrtable,
+  (ulong)priv->rx_mac_descrtable +
   sizeof(priv->rx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u32 desc_num = priv->tx_currdescnum;
struct dmamacdescr *desc_p = >tx_mac_descrtable[desc_num];
-   uint32_t desc_start = (uint32_t)desc_p;
-   uint32_t desc_end = desc_start +
+   ulong desc_start = (ulong)desc_p;
+   ulong desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-   uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-   uint32_t data_end = data_start +
-   roundup(length, ARCH_DMA_MINALIGN);
+   ulong data_start = desc_p->dmamac_addr;
+   ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
/*
 * Strictly we only need to invalidate the "txrx_status" field
 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
return -EPERM;
}
 
-   memcpy(desc_p->dmamac_addr, packet, length);
+   memcpy((void *)data_start, packet, length);
 
/* Flush data to be sent */
flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar 
**packetp)
u32 status, desc_num = priv->rx_currdescnum;
struct dmamacdescr *desc_p = >rx_mac_descrtable[desc_num];
int length = -EAGAIN;
-   uint32_t desc

[U-Boot] [PATCH v4 0/3] Amlogic Meson GXBaby and ODROID-C2 support

[Beniamino Galvani]

Hi,

this series adds a very basic support for Amlogic S905 SoC (GXBaby)
and for the ODROID-C2 board [1], and is based on u-boot sources
available from the board vendor [2]. At the moment the only supported
devices are the integrated UART and Ethernet adapter.

Changes since v3:
 - designware eth: added check that buffer addresses are in first 4GiB
   as suggested by Marek (and thus removed the ack tags)
 - consolidated pinmux and gpio macros
 - used get_unaligned_be64() to avoid alignment faults in dram_init()
 - uint32_t -> u32 in serial_meson.c
 - implemented reboot and read from e-fuse through secure monitor

Changes since v2:
 - squashed all platform patches into a single one
 - got rid of additional non-upstream DTS node for ethernet
 - improved board README
 - added macros for SoC registers fields

Changes since v1:
 - updated DTS files from Linux kernel
 - added Ethernet support
 - first 16MiB of RAM are now marked as unavailable; this seems to
   be required to successfully boot Linux
 - fixed typo in config file

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01

Beniamino Galvani (3):
  net: designware: fix descriptor layout and warnings on 64-bit archs
  arm: add initial support for Amlogic Meson and ODROID-C2
  arm: meson: implement calls to secure monitor

 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  52 ++
 arch/arm/include/asm/arch-meson/sm.h   |  13 +++
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  67 +
 arch/arm/mach-meson/sm.c   |  71 +
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  67 +
 configs/odroid-c2_defconfig|  23 +
 drivers/net/designware.c   |  59 ++-
 drivers/net/designware.h   |   4 +-
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  55 ++
 23 files changed, 938 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/include/asm/arch-meson/sm.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 arch/arm/mach-meson/sm.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

-- 
2.7.3

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Re: [U-Boot] [PATCH v3 2/2] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

On Wed, Apr 13, 2016 at 12:26:43AM +0200, Marek Vasut wrote:
> > So, after some investigation, the reason is that the code runs when
> > caches are still disabled and thus all the memory is treated as
> > Device-nGnRnE, requiring aligned accesses.
> 
> You mean 8-byte aligned accesses, correct ?

Yes.

> > The return value of
> > fdt_getprop() is guaranteed to be aligned to a 4 byte boundary (but
> > not 8)
> 
> The return value of fdt_getprop() is a pointer, thus 8byte long on
> aarch64 and thus aligned to 8 bytes on the stack unless there is
> some real problem.

Right, however I'm not talking about the alignment of the pointer on
the stack, but about the value of the pointer, which depends on the
offset inside the device tree blob of the property. If I use this:

val = fdt_getprop(gd->fdt_blob, offset, "reg", )
gd->ram_size = fdt64_to_cpu(*(fdt64_t *)val)

when the CPU tries to dereference val (which is something like
0x010429e4) an alignment fault is generated for the reason
stated above.

> > and therefore a 32-bit type must be used to avoid alignment
> > faults. Probably the comment should be updated to explain this better.
> 
> Take a look at what uniphier does : arch/arm/mach-uniphier/dram_init.c
> Does that approach with fdt64_t work for you?

Nope, that's the first thing I've tried :(

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Re: [U-Boot] [PATCH v3 2/2] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

On Mon, Apr 11, 2016 at 11:08:02PM +0200, Marek Vasut wrote:
> >>> + val = fdt_getprop(gd->fdt_blob, offset, "reg", );
> >>> + if (len < sizeof(*val) * 4)
> >>> + return -EINVAL;
> >>> +
> >>> + /* Don't use fdt64_t to avoid unaligned access */
> >>
> >> This looks iffy, can you elaborate on this issue ?
> > 
> > I was getting a "Synchronous Abort handler, esr 0x9621" which
> > seemed to indicate a alignment fault, but thinking again about it I'm
> > not sure anymore of the real cause. fdt64_t and fdt64_to_cpu() don't
> > work here, I will try to investigate better why. Suggestions are
> > welcome :)
> 
> Toolchain issues ? Stack alignment issue ?

So, after some investigation, the reason is that the code runs when
caches are still disabled and thus all the memory is treated as
Device-nGnRnE, requiring aligned accesses. The return value of
fdt_getprop() is guaranteed to be aligned to a 4 byte boundary (but
not 8) and therefore a 32-bit type must be used to avoid alignment
faults. Probably the comment should be updated to explain this better.

Beniamino
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Re: [U-Boot] [PATCH v3 2/2] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

On Mon, Apr 11, 2016 at 02:08:56AM +0200, Marek Vasut wrote:
>
> > +#define GXBB_GPIO_0_EN GXBB_PERIPHS_ADDR(0x0c)
> > +#define GXBB_GPIO_0_OUTGXBB_PERIPHS_ADDR(0x0d)
> > +#define GXBB_GPIO_0_IN GXBB_PERIPHS_ADDR(0x0e)
> 
> You can also define this as
> GXBB_GPIO_EN(n)  (0xc + 3 * (n) + 0)
> GXBB_GPIO_OUT(n) (0xc + 3 * (n) + 1)
> GXBB_GPIO_IN(n)  (0xc + 3 * (n) + 2)

This would work well if GPIO_6 didn't exist :)

> > +#define GXBB_GPIO_1_EN GXBB_PERIPHS_ADDR(0x0f)
> > +#define GXBB_GPIO_1_OUTGXBB_PERIPHS_ADDR(0x10)
> > +#define GXBB_GPIO_1_IN GXBB_PERIPHS_ADDR(0x11)
> > +#define GXBB_GPIO_2_EN GXBB_PERIPHS_ADDR(0x12)
> > +#define GXBB_GPIO_2_OUTGXBB_PERIPHS_ADDR(0x13)
> > +#define GXBB_GPIO_2_IN GXBB_PERIPHS_ADDR(0x14)
> > +#define GXBB_GPIO_3_EN GXBB_PERIPHS_ADDR(0x15)
> > +#define GXBB_GPIO_3_OUTGXBB_PERIPHS_ADDR(0x16)
> > +#define GXBB_GPIO_3_IN GXBB_PERIPHS_ADDR(0x17)
> > +#define GXBB_GPIO_4_EN GXBB_PERIPHS_ADDR(0x18)
> > +#define GXBB_GPIO_4_OUTGXBB_PERIPHS_ADDR(0x19)
> > +#define GXBB_GPIO_4_IN GXBB_PERIPHS_ADDR(0x1a)
> > +#define GXBB_GPIO_5_EN GXBB_PERIPHS_ADDR(0x1b)
> > +#define GXBB_GPIO_5_OUTGXBB_PERIPHS_ADDR(0x1c)
> > +#define GXBB_GPIO_5_IN GXBB_PERIPHS_ADDR(0x1d)
> > +#define GXBB_GPIO_6_EN GXBB_PERIPHS_ADDR(0x08)
> > +#define GXBB_GPIO_6_OUTGXBB_PERIPHS_ADDR(0x09)
> > +#define GXBB_GPIO_6_IN GXBB_PERIPHS_ADDR(0x0a)

> It'd be nice to have base addresses somewhere at the beginning instead
> of having them mixed with the bit macros, but that's a matter of taste.

I agree, I'll change this.

> > +   val = fdt_getprop(gd->fdt_blob, offset, "reg", );
> > +   if (len < sizeof(*val) * 4)
> > +   return -EINVAL;
> > +
> > +   /* Don't use fdt64_t to avoid unaligned access */
> 
> This looks iffy, can you elaborate on this issue ?

I was getting a "Synchronous Abort handler, esr 0x9621" which
seemed to indicate a alignment fault, but thinking again about it I'm
not sure anymore of the real cause. fdt64_t and fdt64_to_cpu() don't
work here, I will try to investigate better why. Suggestions are
welcome :)

> > +   /* Reserve first 16 MiB of RAM */
> 
> Why ?

I'll add a comment, first 16 MiB seems to be reserved for firmware.

> > +void reset_cpu(ulong addr)
> > +{
> 
> How does the system reboot then ?

The system reboots through a call to secure monitor, which is not
implemented in this submission.

> > +struct mm_region *mem_map = gxbb_mem_map;
> 
> This looks super-iffy, I wouldn't be surprised if this started being
> optimized away at some point.

I don't understand, why that should happen?

> > +   /* Reset PHY on GPIOZ_14 */
> > +   clrbits_le32(GXBB_GPIO_3_EN, BIT(14));
> > +   clrbits_le32(GXBB_GPIO_3_OUT, BIT(14));
> > +   udelay(10);
> 
> mdelay(100); , though that is quite some wait.

Will change and decrease the timeout.

> > diff --git a/drivers/serial/serial_meson.c b/drivers/serial/serial_meson.c
> 
> This should go in a separate patch.

I originally submitted the driver as separate patch, then Tom
suggested that the initial platform patch should contain everything
needed to perform a boot, so UART, DDR, board file and DTS.

Thanks for the review,

Beniamino
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Re: [U-Boot] [PATCH v3 1/2] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

On Mon, Apr 11, 2016 at 01:59:59AM +0200, Marek Vasut wrote:
> 
> This looks more like silencing the warning by a forced cast.
> The pointer should most likely be sanity-checked to make sure it's in
> 4GiB address space at least. I am worried such forced casts will bite
> us in the long run.

Yes, this patch assumes that addresses of buffers and descriptors are
in the first 4GiB of address space. AFAIU this should be a safe
premise for current SoCs, since the physical memory is always mapped
within the 32bit addressable range; other drivers (see for example
sunxi_mmc) do a similar assumption.

So, right now I don't think a check is strictly needed, but to be
future-proof probably it wouldn't hurt either.

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Re: [U-Boot] [PATCH v2 9/9] board: odroid-c2: add Ethernet support

[Beniamino Galvani]

On Sun, Apr 03, 2016 at 07:20:10PM -0500, Joe Hershberger wrote:
> > +#ifdef CONFIG_MISC_INIT_R
> > +int misc_init_r(void)
> > +{
> > +   /* Select Ethernet function */
> > +   setbits_le32(GXBB_PINMUX_6, 0x3fff);
> > +
> > +   /* Set RGMII mode */
> > +   setbits_le32(GXBB_ETH_REG_0, 0x1621);
> 
> It would be good to have constants for all these magic numbers.
> 
> > +
> > +   /* Enable clocks */
> > +   setbits_le32(GXBB_GCLK_MPEG_1, 1 << 3);
> 
> Use the BIT() macro for this type of thing. Probably use the BIT()
> macro in another named macro for the meaning of the magic bit.

I updated known values with macros in v3 (but left 0x3fff as is
because its meaning is not documented). Thanks!

Beniamino
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[U-Boot] [PATCH v3 2/2] arm: add initial support for Amlogic Meson and ODROID-C2

[Beniamino Galvani]

This adds platform code for the Amlogic Meson GXBaby (S905) SoC and a
board definition for ODROID-C2. This initial submission only supports
UART and Ethernet (through the existing Designware driver). DTS files
are the ones submitted to Linux arm-soc for 4.7 [1].

[1] https://patchwork.ozlabs.org/patch/603583/

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  77 ++
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  65 
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  53 ++
 configs/odroid-c2_defconfig|  23 +
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  55 ++
 19 files changed, 829 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f18dbe6..a01a676 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -456,6 +456,9 @@ config ARCH_KEYSTONE
select SUPPORT_SPL
select CMD_POWEROFF
 
+config ARCH_MESON
+   bool "Amlogic Meson"
+
 config ARCH_MX7
bool "Freescale MX7"
select CPU_V7
@@ -780,6 +783,8 @@ source "arch/arm/mach-orion5x/Kconfig"
 
 source "arch/arm/cpu/armv7/rmobile/Kconfig"
 
+source "arch/arm/mach-meson/Kconfig"
+
 source "arch/arm/mach-rockchip/Kconfig"
 
 source "arch/arm/mach-s5pc1xx/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index d516345..ecd1887 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -50,6 +50,7 @@ machine-$(CONFIG_ARCH_HIGHBANK)   += highbank
 machine-$(CONFIG_ARCH_KEYSTONE)+= keystone
 # TODO: rename CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOOD
 machine-$(CONFIG_KIRKWOOD) += kirkwood
+machine-$(CONFIG_ARCH_MESON)   += meson
 machine-$(CONFIG_ARCH_MVEBU)   += mvebu
 # TODO: rename CONFIG_TEGRA -> CONFIG_ARCH_TEGRA
 # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 01cf030..9199fa7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-jerry.dtb \
rk3288-rock2-square.dtb \
rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+   meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
new file mode 100644
index 000..653c2fa
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khil...@kernel.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.

[U-Boot] [PATCH v3 1/2] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
Acked-by: Joe Hershberger <joe.hershber...@ni.com>
Reviewed-by: Tom Rini <tr...@konsulko.com>
---
 drivers/net/designware.c | 54 
 drivers/net/designware.h |  4 ++--
 2 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ca58f34..78d6901 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Tx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-  (unsigned int)priv->tx_mac_descrtable +
+   flush_dcache_range((ulong)priv->tx_mac_descrtable,
+  (ulong)priv->tx_mac_descrtable +
   sizeof(priv->tx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 * Otherwise there's a chance to get some of them flushed in RAM when
 * GMAC is already pushing data to RAM via DMA. This way incoming from
 * GMAC data will be corrupted. */
-   flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-  RX_TOTAL_BUFSIZE);
+   flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
desc_p->dmamac_cntl =
(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Rx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-  (unsigned int)priv->rx_mac_descrtable +
+   flush_dcache_range((ulong)priv->rx_mac_descrtable,
+  (ulong)priv->rx_mac_descrtable +
   sizeof(priv->rx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u32 desc_num = priv->tx_currdescnum;
struct dmamacdescr *desc_p = >tx_mac_descrtable[desc_num];
-   uint32_t desc_start = (uint32_t)desc_p;
-   uint32_t desc_end = desc_start +
+   ulong desc_start = (ulong)desc_p;
+   ulong desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-   uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-   uint32_t data_end = data_start +
-   roundup(length, ARCH_DMA_MINALIGN);
+   ulong data_start = desc_p->dmamac_addr;
+   ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
/*
 * Strictly we only need to invalidate the "txrx_status" field
 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
return -EPERM;
}
 
-   memcpy(desc_p->dmamac_addr, packet, length);
+   memcpy((void *)data_start, packet, length);
 
/* Flush data to be sent */
flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar 
**packetp)
u32 status, desc_num = priv->rx_currdescnum;
struct dmama

[U-Boot] [PATCH v3 0/2] Amlogic Meson GXBaby and ODROID-C2 support

[Beniamino Galvani]

Hi,

this series adds a very basic support for Amlogic S905 SoC (GXBaby)
and for the ODROID-C2 board [1], and is based on u-boot sources
available from the board vendor [2]. At the moment the only supported
devices are the integrated UART and Ethernet adapter.

Changes since v2:
 - squashed all platform patches into a single one
 - got rid of additional non-upstream DTS node for ethernet
 - improved board README
 - added macros for SoC registers fields

Changes since v1:
 - updated DTS files from Linux kernel
 - added Ethernet support
 - first 16MiB of RAM are now marked as unavailable; this seems to
   be required to successfully boot Linux
 - fixed typo in config file

[1] http://www.hardkernel.com/main/products/prdt_info.php?g_code=G145457216438
[2] https://github.com/hardkernel/u-boot/tree/odroidc2-v2015.01

Beniamino Galvani (2):
  net: designware: fix descriptor layout and warnings on 64-bit archs
  arm: add initial support for Amlogic Meson and ODROID-C2

 arch/arm/Kconfig   |   5 +
 arch/arm/Makefile  |   1 +
 arch/arm/dts/Makefile  |   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts   |  69 +
 arch/arm/dts/meson-gxbb.dtsi   | 178 +
 arch/arm/include/asm/arch-meson/gxbb.h |  77 ++
 arch/arm/mach-meson/Kconfig|  31 ++
 arch/arm/mach-meson/Makefile   |   7 ++
 arch/arm/mach-meson/board.c|  65 
 board/hardkernel/odroid-c2/Kconfig |  12 +++
 board/hardkernel/odroid-c2/MAINTAINERS |   6 ++
 board/hardkernel/odroid-c2/Makefile|   7 ++
 board/hardkernel/odroid-c2/README  |  60 +++
 board/hardkernel/odroid-c2/odroid-c2.c |  53 ++
 configs/odroid-c2_defconfig|  23 +
 drivers/net/designware.c   |  54 +-
 drivers/net/designware.h   |   4 +-
 drivers/serial/Kconfig |  15 +++
 drivers/serial/Makefile|   1 +
 drivers/serial/serial_meson.c  | 162 ++
 include/configs/odroid-c2.h|  55 ++
 21 files changed, 858 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi
 create mode 100644 arch/arm/include/asm/arch-meson/gxbb.h
 create mode 100644 arch/arm/mach-meson/Kconfig
 create mode 100644 arch/arm/mach-meson/Makefile
 create mode 100644 arch/arm/mach-meson/board.c
 create mode 100644 board/hardkernel/odroid-c2/Kconfig
 create mode 100644 board/hardkernel/odroid-c2/MAINTAINERS
 create mode 100644 board/hardkernel/odroid-c2/Makefile
 create mode 100644 board/hardkernel/odroid-c2/README
 create mode 100644 board/hardkernel/odroid-c2/odroid-c2.c
 create mode 100644 configs/odroid-c2_defconfig
 create mode 100644 drivers/serial/serial_meson.c
 create mode 100644 include/configs/odroid-c2.h

-- 
2.7.3

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Re: [U-Boot] [PATCH v2 5/9] board: odroid-c2: enable serial

[Beniamino Galvani]

On Sun, Apr 03, 2016 at 12:09:44PM -0400, Tom Rini wrote:
> But this too should be folded in with the initial support.  In fact, I
> would go so far as to say that in general, the initial platform patch
> should be enough to boot the platform.  So UART, DDR (and anything that
> all requires), board itself.  If we're not adding a new eth driver,
> enabling eth is fine too.  If that means adding some driver fixes first,
> make them the first patches in the series.  Thanks!

I'll do, thanks.

Beniamino
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Re: [U-Boot] [PATCH v2 8/9] arm: dts: add ethernet node to Meson gxbb

[Beniamino Galvani]

On Sun, Apr 03, 2016 at 12:09:33PM -0400, Tom Rini wrote:
> > Add a node for the Synopsys Designware Ethernet adapter available on
> > Meson SoCs to the Meson GXBaby DTS files. The node is not present in
> > DTS files used in Linux kernel.
>
> ... but why is this not yet in the kernel device tree?  Has it just not
> made it up from the SoC tree?

Because kernel doesn't have yet an Ethernet driver for Meson GXBaby to
set the platform-specific registers needed to program the MII mode,
clocks and other things (the settings that are in patch 9/9 of this
submission). And without documentation it's hard to write one and get
it right.

So this patch adds a new uboot-only node to the DTS for Ethernet. This
doesn't seem problematic to me WRT synchronization with kernel DTS
because no new bindings or driver changes are needed; and whenever the
same node will be added to kernel we'll only have to update it in
u-boot.

If it is not acceptable to have a DTS different to kernel one, I'll
have to find a different solution, any suggestions? Should I use
U_BOOT_DEVICE and platform_data inside the board file instead?

Maybe I will submit v3 of the series without Ethernet while I figure
out this.

Beniamino
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[U-Boot] [PATCH v2 9/9] board: odroid-c2: add Ethernet support

[Beniamino Galvani]

Add initialization code for the Ethernet adapter on ODROID-C2 and
enable the driver.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/include/asm/arch-meson/gxbb.h | 54 ++
 board/hardkernel/odroid-c2/odroid-c2.c | 25 
 configs/odroid-c2_defconfig|  3 ++
 include/configs/odroid-c2.h|  1 +
 4 files changed, 83 insertions(+)

diff --git a/arch/arm/include/asm/arch-meson/gxbb.h 
b/arch/arm/include/asm/arch-meson/gxbb.h
index 0eec270..59fae9f 100644
--- a/arch/arm/include/asm/arch-meson/gxbb.h
+++ b/arch/arm/include/asm/arch-meson/gxbb.h
@@ -7,4 +7,58 @@
 #ifndef __GXBB_H__
 #define __GXBB_H__
 
+#define GXBB_PERIPHS_BASE  0xc8834400
+#define GXBB_PERIPHS_ADDR(off) (GXBB_PERIPHS_BASE + ((off) << 2))
+
+#define GXBB_GPIO_0_EN GXBB_PERIPHS_ADDR(0x0c)
+#define GXBB_GPIO_0_OUTGXBB_PERIPHS_ADDR(0x0d)
+#define GXBB_GPIO_0_IN GXBB_PERIPHS_ADDR(0x0e)
+#define GXBB_GPIO_1_EN GXBB_PERIPHS_ADDR(0x0f)
+#define GXBB_GPIO_1_OUTGXBB_PERIPHS_ADDR(0x10)
+#define GXBB_GPIO_1_IN GXBB_PERIPHS_ADDR(0x11)
+#define GXBB_GPIO_2_EN GXBB_PERIPHS_ADDR(0x12)
+#define GXBB_GPIO_2_OUTGXBB_PERIPHS_ADDR(0x13)
+#define GXBB_GPIO_2_IN GXBB_PERIPHS_ADDR(0x14)
+#define GXBB_GPIO_3_EN GXBB_PERIPHS_ADDR(0x15)
+#define GXBB_GPIO_3_OUTGXBB_PERIPHS_ADDR(0x16)
+#define GXBB_GPIO_3_IN GXBB_PERIPHS_ADDR(0x17)
+#define GXBB_GPIO_4_EN GXBB_PERIPHS_ADDR(0x18)
+#define GXBB_GPIO_4_OUTGXBB_PERIPHS_ADDR(0x19)
+#define GXBB_GPIO_4_IN GXBB_PERIPHS_ADDR(0x1a)
+#define GXBB_GPIO_5_EN GXBB_PERIPHS_ADDR(0x1b)
+#define GXBB_GPIO_5_OUTGXBB_PERIPHS_ADDR(0x1c)
+#define GXBB_GPIO_5_IN GXBB_PERIPHS_ADDR(0x1d)
+#define GXBB_GPIO_6_EN GXBB_PERIPHS_ADDR(0x08)
+#define GXBB_GPIO_6_OUTGXBB_PERIPHS_ADDR(0x09)
+#define GXBB_GPIO_6_IN GXBB_PERIPHS_ADDR(0x0a)
+
+#define GXBB_PINMUX_0  GXBB_PERIPHS_ADDR(0x2c)
+#define GXBB_PINMUX_1  GXBB_PERIPHS_ADDR(0x2d)
+#define GXBB_PINMUX_2  GXBB_PERIPHS_ADDR(0x2e)
+#define GXBB_PINMUX_3  GXBB_PERIPHS_ADDR(0x2f)
+#define GXBB_PINMUX_4  GXBB_PERIPHS_ADDR(0x30)
+#define GXBB_PINMUX_5  GXBB_PERIPHS_ADDR(0x31)
+#define GXBB_PINMUX_6  GXBB_PERIPHS_ADDR(0x32)
+#define GXBB_PINMUX_7  GXBB_PERIPHS_ADDR(0x33)
+#define GXBB_PINMUX_8  GXBB_PERIPHS_ADDR(0x34)
+#define GXBB_PINMUX_9  GXBB_PERIPHS_ADDR(0x35)
+#define GXBB_PINMUX_10 GXBB_PERIPHS_ADDR(0x36)
+#define GXBB_PINMUX_11 GXBB_PERIPHS_ADDR(0x37)
+#define GXBB_PINMUX_12 GXBB_PERIPHS_ADDR(0x38)
+
+#define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50)
+#define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51)
+
+#define GXBB_HIU_BASE  0xc883c000
+#define GXBB_HIU_ADDR(off) (GXBB_HIU_BASE + ((off) << 2))
+
+#define GXBB_MEM_PD_REG_0  GXBB_HIU_ADDR(0x40)
+
+/* Clock gates */
+#define GXBB_GCLK_MPEG_0   GXBB_HIU_ADDR(0x50)
+#define GXBB_GCLK_MPEG_1   GXBB_HIU_ADDR(0x51)
+#define GXBB_GCLK_MPEG_2   GXBB_HIU_ADDR(0x52)
+#define GXBB_GCLK_MPEG_OTHER   GXBB_HIU_ADDR(0x53)
+#define GXBB_GCLK_MPEG_AO  GXBB_HIU_ADDR(0x54)
+
 #endif /* __GXBB_H__ */
diff --git a/board/hardkernel/odroid-c2/odroid-c2.c 
b/board/hardkernel/odroid-c2/odroid-c2.c
index 6a1485f..2d82d11 100644
--- a/board/hardkernel/odroid-c2/odroid-c2.c
+++ b/board/hardkernel/odroid-c2/odroid-c2.c
@@ -5,3 +5,28 @@
  */
 
 #include 
+#include 
+#include 
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+   /* Select Ethernet function */
+   setbits_le32(GXBB_PINMUX_6, 0x3fff);
+
+   /* Set RGMII mode */
+   setbits_le32(GXBB_ETH_REG_0, 0x1621);
+
+   /* Enable clocks */
+   setbits_le32(GXBB_GCLK_MPEG_1, 1 << 3);
+   clrbits_le32(GXBB_MEM_PD_REG_0, (1 << 3) | (1 << 2));
+
+   /* Reset PHY on GPIOZ_14 */
+   clrbits_le32(GXBB_GPIO_3_EN, 1 << 14);
+   clrbits_le32(GXBB_GPIO_3_OUT, 1 << 14);
+   udelay(10);
+   setbits_le32(GXBB_GPIO_3_OUT, 1 << 14);
+
+   return 0;
+}
+#endif /* CONFIG_MISC_INIT_R */
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 069f02d..a771b20 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -11,6 +11,9 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
 # CONFIG_CMD_SOURCE is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM_ETH=y
+CONFIG_ETH_DESIGNWARE=y
 CONFIG_DEBUG_UART=y
 CONFIG_DEBUG_UART_MESON=y
 CONFIG_DEBUG_UART_BASE=0xc81004c0
diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h
index 0e9ad1c..12bc086 100644
--- a/include/configs/odroid-c2.h
+++ b/include/configs/odroid-c2.h
@@ -19,6 +19,7 @@
 #define CONFIG_SYS_MALLOC_LEN 

[U-Boot] [PATCH v2 8/9] arm: dts: add ethernet node to Meson gxbb

[Beniamino Galvani]

Add a node for the Synopsys Designware Ethernet adapter available on
Meson SoCs to the Meson GXBaby DTS files. The node is not present in
DTS files used in Linux kernel.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/dts/meson-gxbb-odroidc2.dts | 4 
 arch/arm/dts/meson-gxbb.dtsi | 9 +
 2 files changed, 13 insertions(+)

diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
index 653c2fa..408235d 100644
--- a/arch/arm/dts/meson-gxbb-odroidc2.dts
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -67,3 +67,7 @@
 _AO {
status = "okay";
 };
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
index 832815d..44a54e7 100644
--- a/arch/arm/dts/meson-gxbb.dtsi
+++ b/arch/arm/dts/meson-gxbb.dtsi
@@ -167,6 +167,15 @@
};
};
 
+   gmac0: ethernet@c941 {
+   compatible = "snps,dwmac";
+   reg = <0x0 0xc941 0x0 0x1>;
+   interrupts = <0 8 1>;
+   interrupt-names = "macirq";
+   phy-mode = "rgmii";
+   status = "disabled";
+   };
+
apb: apb@d000 {
compatible = "simple-bus";
reg = <0x0 0xd000 0x0 0x20>;
-- 
2.7.3

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[U-Boot] [PATCH v2 7/9] net: designware: add generic device tree compatible id

[Beniamino Galvani]

Add a generic 'snps,dwmac' compatible id to the Synopsys Designware
MAC driver.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/net/designware.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 78d6901..f6d8670 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -662,6 +662,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice 
*dev)
 static const struct udevice_id designware_eth_ids[] = {
{ .compatible = "allwinner,sun7i-a20-gmac" },
{ .compatible = "altr,socfpga-stmmac" },
+   { .compatible = "snps,dwmac" },
{ }
 };
 
-- 
2.7.3

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[U-Boot] [PATCH v2 4/9] arm: meson: use device tree

[Beniamino Galvani]

Convert the board and config files to the use of device tree.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/mach-meson/board.c | 25 +
 configs/odroid-c2_defconfig |  2 ++
 2 files changed, 27 insertions(+)

diff --git a/arch/arm/mach-meson/board.c b/arch/arm/mach-meson/board.c
index 346a2c2..945a5f4 100644
--- a/arch/arm/mach-meson/board.c
+++ b/arch/arm/mach-meson/board.c
@@ -5,6 +5,8 @@
  */
 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -17,9 +19,32 @@ int board_init(void)
 
 int dram_init(void)
 {
+   const fdt32_t *val;
+   int offset;
+   int len;
+
+   offset = fdt_path_offset(gd->fdt_blob, "/memory");
+   if (offset < 0)
+   return -EINVAL;
+
+   val = fdt_getprop(gd->fdt_blob, offset, "reg", );
+   if (len < sizeof(*val) * 4)
+   return -EINVAL;
+
+   /* Don't use fdt64_t to avoid unaligned access */
+   gd->ram_size = (uint64_t)fdt32_to_cpu(val[2]) << 32;
+   gd->ram_size |= fdt32_to_cpu(val[3]);
+
return 0;
 }
 
+void dram_init_banksize(void)
+{
+   /* Reserve first 16 MiB of RAM */
+   gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + (16 * 1024 * 1024);
+   gd->bd->bi_dram[0].size = gd->ram_size - (16 * 1024 * 1024);
+}
+
 void reset_cpu(ulong addr)
 {
 }
diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 8e6df12..765076a 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -2,6 +2,7 @@ CONFIG_ARM=y
 CONFIG_ARCH_MESON=y
 CONFIG_MESON_GXBB=y
 CONFIG_TARGET_ODROID_C2=y
+CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
 # CONFIG_CMD_BDI is not set
 # CONFIG_CMD_IMI is not set
 # CONFIG_CMD_IMLS is not set
@@ -9,3 +10,4 @@ CONFIG_TARGET_ODROID_C2=y
 # CONFIG_CMD_FPGA is not set
 # CONFIG_CMD_SOURCE is not set
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
-- 
2.7.3

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[U-Boot] [PATCH v2 6/9] net: designware: fix descriptor layout and warnings on 64-bit archs

[Beniamino Galvani]

All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 drivers/net/designware.c | 54 
 drivers/net/designware.h |  4 ++--
 2 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index ca58f34..78d6901 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -98,8 +98,8 @@ static void tx_descs_init(struct dw_eth_dev *priv)
 
for (idx = 0; idx < CONFIG_TX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
 #if defined(CONFIG_DW_ALTDESCRIPTOR)
desc_p->txrx_status &= ~(DESC_TXSTS_TXINT | DESC_TXSTS_TXLAST |
@@ -117,11 +117,11 @@ static void tx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Tx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->tx_mac_descrtable,
-  (unsigned int)priv->tx_mac_descrtable +
+   flush_dcache_range((ulong)priv->tx_mac_descrtable,
+  (ulong)priv->tx_mac_descrtable +
   sizeof(priv->tx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->txdesclistaddr);
@@ -142,13 +142,12 @@ static void rx_descs_init(struct dw_eth_dev *priv)
 * Otherwise there's a chance to get some of them flushed in RAM when
 * GMAC is already pushing data to RAM via DMA. This way incoming from
 * GMAC data will be corrupted. */
-   flush_dcache_range((unsigned int)rxbuffs, (unsigned int)rxbuffs +
-  RX_TOTAL_BUFSIZE);
+   flush_dcache_range((ulong)rxbuffs, (ulong)rxbuffs + RX_TOTAL_BUFSIZE);
 
for (idx = 0; idx < CONFIG_RX_DESCR_NUM; idx++) {
desc_p = _table_p[idx];
-   desc_p->dmamac_addr = [idx * CONFIG_ETH_BUFSIZE];
-   desc_p->dmamac_next = _table_p[idx + 1];
+   desc_p->dmamac_addr = (ulong)[idx * CONFIG_ETH_BUFSIZE];
+   desc_p->dmamac_next = (ulong)_table_p[idx + 1];
 
desc_p->dmamac_cntl =
(MAC_MAX_FRAME_SZ & DESC_RXCTRL_SIZE1MASK) |
@@ -158,11 +157,11 @@ static void rx_descs_init(struct dw_eth_dev *priv)
}
 
/* Correcting the last pointer of the chain */
-   desc_p->dmamac_next = _table_p[0];
+   desc_p->dmamac_next = (ulong)_table_p[0];
 
/* Flush all Rx buffer descriptors at once */
-   flush_dcache_range((unsigned int)priv->rx_mac_descrtable,
-  (unsigned int)priv->rx_mac_descrtable +
+   flush_dcache_range((ulong)priv->rx_mac_descrtable,
+  (ulong)priv->rx_mac_descrtable +
   sizeof(priv->rx_mac_descrtable));
 
writel((ulong)_table_p[0], _p->rxdesclistaddr);
@@ -290,12 +289,11 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
struct eth_dma_regs *dma_p = priv->dma_regs_p;
u32 desc_num = priv->tx_currdescnum;
struct dmamacdescr *desc_p = >tx_mac_descrtable[desc_num];
-   uint32_t desc_start = (uint32_t)desc_p;
-   uint32_t desc_end = desc_start +
+   ulong desc_start = (ulong)desc_p;
+   ulong desc_end = desc_start +
roundup(sizeof(*desc_p), ARCH_DMA_MINALIGN);
-   uint32_t data_start = (uint32_t)desc_p->dmamac_addr;
-   uint32_t data_end = data_start +
-   roundup(length, ARCH_DMA_MINALIGN);
+   ulong data_start = desc_p->dmamac_addr;
+   ulong data_end = data_start + roundup(length, ARCH_DMA_MINALIGN);
/*
 * Strictly we only need to invalidate the "txrx_status" field
 * for the following check, but on some platforms we cannot
@@ -312,7 +310,7 @@ static int _dw_eth_send(struct dw_eth_dev *priv, void 
*packet, int length)
return -EPERM;
}
 
-   memcpy(desc_p->dmamac_addr, packet, length);
+   memcpy((void *)data_start, packet, length);
 
/* Flush data to be sent */
flush_dcache_range(data_start, data_end);
@@ -352,11 +350,11 @@ static int _dw_eth_recv(struct dw_eth_dev *priv, uchar 
**packetp)
u32 status, desc_num = priv->rx_currdescnum;
struct dmamacdescr *desc_p = >rx_mac_descrtable[desc_num];
int length = -EAGAIN;
-   uint32_t desc

[U-Boot] [PATCH v2 5/9] board: odroid-c2: enable serial

[Beniamino Galvani]

Enable serial support in the ODROID-C2 configuration.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 configs/odroid-c2_defconfig | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig
index 765076a..069f02d 100644
--- a/configs/odroid-c2_defconfig
+++ b/configs/odroid-c2_defconfig
@@ -11,3 +11,10 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2"
 # CONFIG_CMD_SOURCE is not set
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_OF_CONTROL=y
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_MESON=y
+CONFIG_DEBUG_UART_BASE=0xc81004c0
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_DEBUG_UART_ANNOUNCE=y
+CONFIG_DEBUG_UART_SKIP_INIT=y
+CONFIG_MESON_SERIAL=y
-- 
2.7.3

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[U-Boot] [PATCH v2 2/9] arm: dts: import Meson files

[Beniamino Galvani]

Import device tree files for Meson gxbb and ODROID-C2 from Linux
kernel.

Signed-off-by: Beniamino Galvani <b.galv...@gmail.com>
---
 arch/arm/dts/Makefile|   2 +
 arch/arm/dts/meson-gxbb-odroidc2.dts |  69 ++
 arch/arm/dts/meson-gxbb.dtsi | 178 +++
 3 files changed, 249 insertions(+)
 create mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
 create mode 100644 arch/arm/dts/meson-gxbb.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ea635e4..a6c0842 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -24,6 +24,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-jerry.dtb \
rk3288-rock2-square.dtb \
rk3036-sdk.dtb
+dtb-$(CONFIG_ARCH_MESON) += \
+   meson-gxbb-odroidc2.dtb
 dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-medcom-wide.dtb \
tegra20-paz00.dtb \
diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts 
b/arch/arm/dts/meson-gxbb-odroidc2.dts
new file mode 100644
index 000..653c2fa
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb-odroidc2.dts
@@ -0,0 +1,69 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ * Copyright (c) 2016 BayLibre, Inc.
+ * Author: Kevin Hilman <khil...@kernel.org>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "meson-gxbb.dtsi"
+
+/ {
+   compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
+   model = "Hardkernel ODROID-C2";
+
+   aliases {
+   serial0 = _AO;
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   memory@0 {
+   device_type = "memory";
+   reg = <0x0 0x0 0x0 0x8000>;
+   };
+};
+
+_AO {
+   status = "okay";
+};
diff --git a/arch/arm/dts/meson-gxbb.dtsi b/arch/arm/dts/meson-gxbb.dtsi
new file mode 100644
index 000..832815d
--- /dev/null
+++ b/arch/arm/dts/meson-gxbb.dtsi
@@ -0,0 +1,178 @@
+/*
+ * Copyright (c) 2016 Andreas Färber
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ *  a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ *  b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software&quo