[U-Boot] [PATCH 3/3] armv8: ls1028aqds: Add support of LS1028AQDS
LS1028A Development System (QDS) is a high-performance computing, evaluation, and development platform that supports LS1028A QorIQ Architecture processor. Signed-off-by: Sudhanshu Gupta Signed-off-by: Rai Harninder Signed-off-by: Rajesh Bhagat Signed-off-by: Bhaskar Upadhaya --- arch/arm/Kconfig| 11 ++ arch/arm/cpu/armv8/Kconfig | 2 +- arch/arm/dts/fsl-ls1028a-qds.dts| 16 +++ board/freescale/ls1028a/Kconfig | 39 +++ board/freescale/ls1028a/MAINTAINERS | 10 ++ board/freescale/ls1028a/README | 85 +++ board/freescale/ls1028a/ls1028a.c | 89 configs/ls1028aqds_tfa_defconfig| 61 +++ include/configs/ls1028aqds.h| 206 9 files changed, 518 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/fsl-ls1028a-qds.dts create mode 100644 configs/ls1028aqds_tfa_defconfig create mode 100644 include/configs/ls1028aqds.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index aaaf36a..7741ea2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1203,6 +1203,17 @@ config TARGET_LS1012AFRDM development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1028AQDS + bool "Support ls1028aqds" + select ARCH_LS1028A + select ARM64 + select ARMV8_MULTIENTRY + help + Support for Freescale LS1028AQDS platform + The LS1028A Development System (QDS) is a high-performance + development platform that supports the QorIQ LS1028A + Layerscape Architecture processor. + config TARGET_LS1028ARDB bool "Support ls1028ardb" select ARCH_LS1028A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index a4fa63b..3e9d47a 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -104,7 +104,7 @@ config PSCI_RESET !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ !TARGET_LS1012AFRWY && \ - !TARGET_LS1028ARDB && \ + !TARGET_LS1028ARDB && !TARGET_LS1028AQDS && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \ diff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dts new file mode 100644 index 000..131fbb7 --- /dev/null +++ b/arch/arm/dts/fsl-ls1028a-qds.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * NXP ls1028AQDS device tree source + * + * Copyright 2018-2019 NXP + * + */ + +/dts-v1/; + +#include "fsl-ls1028a.dtsi" + +/ { + model = "NXP Layerscape 1028a QDS Board"; + compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; +}; diff --git a/board/freescale/ls1028a/Kconfig b/board/freescale/ls1028a/Kconfig index f4733c2..f8c2fe8 100644 --- a/board/freescale/ls1028a/Kconfig +++ b/board/freescale/ls1028a/Kconfig @@ -1,3 +1,42 @@ +if TARGET_LS1028AQDS + +config SYS_BOARD + default "ls1028a" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "fsl-layerscape" + +config SYS_CONFIG_NAME + default "ls1028aqds" + +config EMMC_BOOT + bool "Support for booting from EMMC" + default n + +config SYS_TEXT_BASE + default 0x9600 if SD_BOOT || EMMC_BOOT + default 0x8200 if TFABOOT + default 0x2010 + +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x2040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1028A + default 0x40 if SYS_LS_PPA_FW_IN_MMC && ARCH_LS1028A +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA header Addr" + default 0x2060 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1028A +endif +endif + +source "board/freescale/common/Kconfig" + +endif + if TARGET_LS1028ARDB config SYS_BOARD diff --git a/board/freescale/ls1028a/MAINTAINERS b/board/freescale/ls1028a/MAINTAINERS index f4990a2..8c01bbb 100644 --- a/board/freescale/ls1028a/MAINTAINERS +++ b/board/freescale/ls1028a/MAINTAINERS @@ -1,3 +1,13 @@ +LS1028AQDS BOARD +M: Sudhanshu Gupta +M: Rai Harninder +M: Rajesh Bhagat +S: Maintained +F: board/freescale/ls1028a/ +F: include/configs/ls1028a_common.h +F: include/configs/ls1028aqds.h +F: configs/ls1028aqds_tfa_defconfig + LS1028ARDB BOARD M: Sudhanshu Gupta M: Rai Harninder diff --git a/board/freescale/ls1028a/README b/board/freescale/ls1028a/README index a3ce859..678b9b5 100644 --- a/board/freescale/ls1028a/README +++ b/board/
[U-Boot] [PATCH 2/3] armv8: ls1028ardb: Add support for LS1028ARDB platform
LS1028A is an ARMv8 implementation. LS1028ARDB is an evaluatoin platform that supports the LS1028A family SoCs. This patch add basic support of the platform. Signed-off-by: Sudhanshu Gupta Signed-off-by: Rai Harninder Signed-off-by: Rajesh Bhagat Signed-off-by: Bhaskar Upadhaya --- arch/arm/Kconfig| 12 ++ arch/arm/cpu/armv8/Kconfig | 1 + arch/arm/dts/fsl-ls1028a-rdb.dts| 20 +++ board/freescale/ls1028a/Kconfig | 38 + board/freescale/ls1028a/MAINTAINERS | 9 ++ board/freescale/ls1028a/Makefile| 8 + board/freescale/ls1028a/README | 85 +++ board/freescale/ls1028a/ddr.c | 284 ++ board/freescale/ls1028a/ddr.h | 46 ++ board/freescale/ls1028a/ls1028a.c | 251 ++ configs/ls1028ardb_tfa_defconfig| 61 include/configs/ls1028a_common.h| 295 include/configs/ls1028ardb.h| 98 13 files changed, 1208 insertions(+) create mode 100644 arch/arm/dts/fsl-ls1028a-rdb.dts create mode 100644 board/freescale/ls1028a/Kconfig create mode 100644 board/freescale/ls1028a/MAINTAINERS create mode 100644 board/freescale/ls1028a/Makefile create mode 100644 board/freescale/ls1028a/README create mode 100644 board/freescale/ls1028a/ddr.c create mode 100644 board/freescale/ls1028a/ddr.h create mode 100644 board/freescale/ls1028a/ls1028a.c create mode 100644 configs/ls1028ardb_tfa_defconfig create mode 100644 include/configs/ls1028a_common.h create mode 100644 include/configs/ls1028ardb.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f42ecce..aaaf36a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1203,6 +1203,17 @@ config TARGET_LS1012AFRDM development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1028ARDB + bool "Support ls1028ardb" + select ARCH_LS1028A + select ARM64 + select ARMV8_MULTIENTRY + help + Support for Freescale LS1028ARDB platform + The LS1028A Development System (RDB) is a high-performance + development platform that supports the QorIQ LS1028A + Layerscape Architecture processor. + config TARGET_LS1088ARDB bool "Support ls1088ardb" select ARCH_LS1088A @@ -1585,6 +1596,7 @@ source "board/freescale/ls2080a/Kconfig" source "board/freescale/ls2080aqds/Kconfig" source "board/freescale/ls2080ardb/Kconfig" source "board/freescale/ls1088a/Kconfig" +source "board/freescale/ls1028a/Kconfig" source "board/freescale/ls1021aqds/Kconfig" source "board/freescale/ls1043aqds/Kconfig" source "board/freescale/ls1021atwr/Kconfig" diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index f053603..a4fa63b 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -104,6 +104,7 @@ config PSCI_RESET !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ !TARGET_LS1012AFRWY && \ + !TARGET_LS1028ARDB && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \ diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts new file mode 100644 index 000..b9adb61 --- /dev/null +++ b/arch/arm/dts/fsl-ls1028a-rdb.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * NXP ls1028ARDB device tree source + * + * Copyright 2018-2019 NXP + * + */ + +/dts-v1/; + +#include "fsl-ls1028a.dtsi" + +/ { + model = "NXP Layerscape 1028a RDB Board"; + compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; +}; + +&sata { + status = "okay"; +}; diff --git a/board/freescale/ls1028a/Kconfig b/board/freescale/ls1028a/Kconfig new file mode 100644 index 000..f4733c2 --- /dev/null +++ b/board/freescale/ls1028a/Kconfig @@ -0,0 +1,38 @@ +if TARGET_LS1028ARDB + +config SYS_BOARD + default "ls1028a" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "fsl-layerscape" + +config SYS_CONFIG_NAME + default "ls1028ardb" + +config EMMC_BOOT + bool "Support for booting from EMMC" + default n + +config SYS_TEXT_BASE + default 0x9600 if SD_BOOT || EMMC_BOOT + default 0x8200 if TFABOOT + default 0x2010 + +if FSL_LS_PPA +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x2040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS
[U-Boot] [PATCH 1/3] armv8: ls1028a: Add NXP LS1028A SoC support
Overview LS1028A processor integrates two 64-bit Arm Cortex-A72 cores with a GPU and LCD controller, as well as TSN-enabled Ethernet ports and a TSN-enabled switch with four external ports. The high performance Cortex-A72 cores, performing above 16,000 CoreMarks, combined with 2.5 Gbit Ethernet, PCI express Gen 3.0, SATA 3.0, USB 3.0 and Octal/Quad SPI interfaces provide capabilities for a number of industrial and embedded applications. The device provides excellent integration with the new Time-Sensitive Networking standards and enables a number of TSN applications Frequency support: Core: 1300 MHz, DDR: 1600 MT/s, Platform: 400 MHz [default] Core: 800 MHz, DDR: 1300 MT/s, Platform: 400 MHz SerDes protocol support: SerDes1: 0x85bb [default] SerDes2: 0x85be Features Summary Two 32/64-bit Arm® v8 Cortex®-A72 CPUs Arranged as a single cluster of two cores sharing a single 1 MB L2 cache Up to 1.3 GHz operation Single-threaded cores with 32KB L1 data cache and 48KB L1 instruction cache, Support for cluster power-gating Cache coherent interconnect fabric (CCI-400) Hardware managed data coherency Up to 400 MHz operation 32-bit DDR3L/DDR4 SDRAM memory controller with ECC support Up to 1.6 GT/s Supports 32-bit and 16-bit operation Accumulated mode ECC for 32-bit, 16-bit use Supports DDR4 Pseudo-Open Drain mode Support for x8 and x16 devices LCD controller and DisplayPort/eDP interface Supports DisplayPort 1.3 and eDP 1.4 Supports link transfer rate up to HBR2 (5.4 Gbit/s) and display resolution up to 4Kp60 Graphics processing unit Supports Geometry rate 100 Mtri/s and Pixel rate 650 Mpixel/s Supports OpenGL ES 3.0, 2.0, 1.1 Supports OpenCL 1.2, 1.1 TSN-capable Ethernet Switch with four external ports Ethernet Controller (ENETC) with TSN functionality One RGMII interface One 1G/2.5G SerDes-based interface with TSN support Four SerDes lanes with two PLLs for high-speed peripheral interfaces Two PCI Express 3.0 controllers Serial ATA (SATA 6 Gbit/s) controller Up to four SGMII interfaces supporting 1000 Mbps Up to one QSGMII interface Supports 1000Base-KX Up to one 10G-SXGMII Up to one 10G-QXGMII Additional peripheral interfaces Two high-speed USB 3.0 controllers with integrated PHY each supporting host or device modes Two enhanced secure digital host controllers (eSDHC) supporting SD 3.0, eMMC 4.4, eMMC 4.5, and eMMC 5.1 Two controller area network (FlexCAN) modules, each optionally supporting flexible datarate (FD) Three serial peripheral interface (SPI) controllers Flexible SPI interface (FlexSPI) controller with two 8-bit interfaces Eight I2C controllers Six LPUARTs 16550-compliant DUART General Purpose IO (GPIO) Eight FlexTimers/PWM controllers Six asynchronous audio interface (SAI) Support for hardware virtualization and partitioning enforcement QorIQ platform's trust architecture 3.0 Service processor (SP) provides pre-boot initialization and secure-boot capabilities.256 KB On chip RAM for trusted accesses One WatchDog timer per A72 core and one TrustZone WatchDog timer Queue direct memory access controller (qDMA) Enhanced direct memory access controller (eDMA) Global programmable interrupt controller (GIC) Arm generic timer Thermal Monitor Unit (TMU) Multimedia and audio support: Resolution supported: 480p,720p,1080p, and 4K Support audio on serial interfaces with frame synchronization Time Sensitive Network (TSN) support: TSN configuration tool (tsntool) ENETC 1588 two steps timestamping support ENETC TSN driver: Qbv, Qbu, Qci, Qav SWITCH TSN driver: Qbv, Qci, Qbu, Qav, 802.1CB support Signed-off-by: Sudhanshu Gupta Signed-off-by: Rai Harninder Signed-off-by: Rajesh Bhagat Signed-off-by: Bhaskar Upadhaya --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 39 ++- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 4 + arch/arm/cpu/armv8/fsl-layerscape/cpu.c| 1 + arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc | 51 arch/arm/cpu/armv8/fsl-layerscape/ls1028a_serdes.c | 88 +++ arch/arm/dts/fsl-ls1028a.dtsi | 281 + arch/arm/include/asm/arch-fsl-layerscape/config.h | 61 + .../include/asm/arch-fsl-layerscape/fsl_serdes.h | 16 ++ .../include/asm/arch-fsl-layerscape/immap_lsch3.h | 11 + arch/arm/include/asm/arch-fsl-layerscape/soc.h | 1 + .../asm/arch-fsl-layerscape/stream_id_lsch3.h | 2 +- board/freescale/common/qixis.c | 38 +++ board/freescale/common/qixis.h | 2 + 13 files changed
Re: [U-Boot] [BUG] ls1012afrwy: U-Boot no detect sd card
+ Pramod. >-Original Message- >From: jorisoffouga >Sent: Tuesday, February 19, 2019 2:44 PM >To: u-boot@lists.denx.de; York Sun ; Bhaskar Upadhaya > >Subject: [U-Boot] [BUG] ls1012afrwy: U-Boot no detect sd card > >Hi York, Hi Bhaskar, > >I use a lsl012afrwy and I compiled with the defconfig >ls1012afrwy_qspi_deconfig and I noticed by installing the u-boot that it no >longer detects the slot for the sd card. > >I did the same thing with the u-boot-qoriq which is on Aurora code on the >LSDK18.02 branch and I do not have this problem. > >Do you have an idea where the problem may come from ? > >Best Regards > >Joris Offouga ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/3] LS1012AFRWY: Add Secure Boot support
From: Vinitha V Pillai Added the following: 1. defconfig for LS1012AFRWY Secure boot 2. PfE Validation support Signed-off-by: Vinitha V Pillai --- arch/arm/Kconfig | 1 + board/freescale/ls1012afrdm/Kconfig| 8 board/freescale/ls1012afrdm/MAINTAINERS| 4 ++ board/freescale/ls1012afrdm/ls1012afrdm.c | 5 +++ configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 54 ++ drivers/net/pfe_eth/pfe_firmware.c | 29 ++ include/configs/ls1012afrwy.h | 16 +++- 7 files changed, 116 insertions(+), 1 deletion(-) create mode 100644 configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b1eb7c6..4f0ea04 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1036,6 +1036,7 @@ config TARGET_LS1012A2G5RDB config TARGET_LS1012AFRWY bool "Support ls1012afrwy" select ARCH_LS1012A + select BOARD_LATE_INIT select ARM64 imply SCSI imply SCSI_AHCI diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index 73ad2fe..f52a896 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -70,6 +70,14 @@ config SYS_LS_PPA_FW_ADDR hex "PPA Firmware Addr" default 0x4006 +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x401f4000 + +config SYS_LS_PFE_ESBC_ADDR + hex "PFE Firmware HDR Addr" + default 0x401f8000 + endif source "board/freescale/common/Kconfig" diff --git a/board/freescale/ls1012afrdm/MAINTAINERS b/board/freescale/ls1012afrdm/MAINTAINERS index 36e3e5a..f3fcdb8 100644 --- a/board/freescale/ls1012afrdm/MAINTAINERS +++ b/board/freescale/ls1012afrdm/MAINTAINERS @@ -11,3 +11,7 @@ S: Maintained F: board/freescale/ls1012afrwy/ F: include/configs/ls1012afrwy.h F: configs/ls1012afrwy_qspi_defconfig + +M: Vinitha V Pillai +S: Maintained +F: configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1012afrdm/ls1012afrdm.c b/board/freescale/ls1012afrdm/ls1012afrdm.c index e30ad6e..315da8b 100644 --- a/board/freescale/ls1012afrdm/ls1012afrdm.c +++ b/board/freescale/ls1012afrdm/ls1012afrdm.c @@ -18,6 +18,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -140,6 +141,10 @@ int board_init(void) gd->env_addr = (ulong)&default_environment[0]; #endif +#ifdef CONFIG_FSL_CAAM + sec_init(); +#endif + #ifdef CONFIG_FSL_LS_PPA ppa_init(); #endif diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig new file mode 100644 index 000..bfc120a --- /dev/null +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -0,0 +1,54 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1012AFRWY=y +CONFIG_SECURE_BOOT=y +CONFIG_SYS_TEXT_BASE=0x4010 +CONFIG_FSL_LS_PPA=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" +CONFIG_DISTRO_DEFAULTS=y +# CONFIG_SYS_MALLOC_F is not set +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" +CONFIG_QSPI_BOOT=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=25" +# CONFIG_DISPLAY_BOARDINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_CMD_GREPENV=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_OF_CONTROL=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM=y +# CONFIG_BLK is not set +CONFIG_DM_MMC=y +# CONFIG_DM_MMC_OPS is not set +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_NETDEVICES=y +CONFIG_E1000=y +CONFIG_FSL_PFE=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_SYS_NS16550=y +CONFIG_DM_SPI=y +CONFIG_FSL_DSPI=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_STORAGE=y +CONFIG_RSA=y +CONFIG_RSA_SOFTWARE_EXP=y diff --git a/drivers/net/pfe_eth/pfe_firmware.c b/drivers/net/pfe_eth/pfe_firmware.c index f06ed37..adb2d06 100644 --- a/drivers/net/pfe_eth/pfe_firmware.c +++ b/drivers/net/pfe_eth/pfe_firmware.c @@ -12,6 +12,9 @@ #include #include +#ifdef CONFIG_CHAIN_OF_TRUST +#include +#endif #define PFE_FIRMEWARE_FIT_CNF_NAME "config@1" @@ -168,10 +171,15 @@ static int pfe_fit_check(void) */ int pfe_firmware_init(void) { +#define PFE_KEY_HASH NULL char *pfe_firmware_name; const void *raw_image_addr; size_t raw_image_size = 0; u8 *pfe_firmware; +#ifdef CONFIG_CHAIN_OF_TRUST + uintptr_t pfe_esbc_hdr = 0; + uintptr_t pfe_img_addr = 0; +#endif int ret = 0; int fw_count; @@ -179,6 +187,27 @@ int pfe_firmware_init(void) if (ret)
[U-Boot] [PATCH 2/3] board: ls1012a: FRWY-LS1012A board support
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART. Signed-off-by: Bhaskar Upadhaya --- arch/arm/Kconfig | 12 +++ arch/arm/cpu/armv8/Kconfig| 1 + arch/arm/dts/Makefile | 3 +- arch/arm/dts/fsl-ls1012a-frwy.dts | 43 +++ board/freescale/ls1012afrdm/Kconfig | 35 +++-- board/freescale/ls1012afrdm/MAINTAINERS | 7 ++ board/freescale/ls1012afrdm/ls1012afrdm.c | 68 - configs/ls1012afrwy_qspi_defconfig| 50 + include/configs/ls1012afrwy.h | 120 ++ 9 files changed, 330 insertions(+), 9 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1012a-frwy.dts create mode 100644 configs/ls1012afrwy_qspi_defconfig create mode 100644 include/configs/ls1012afrwy.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 3e05f79..b1eb7c6 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1033,6 +1033,18 @@ config TARGET_LS1012A2G5RDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012AFRWY + bool "Support ls1012afrwy" + select ARCH_LS1012A + select ARM64 + imply SCSI + imply SCSI_AHCI + help +Support for Freescale LS1012AFRWY platform. +The LS1012A FRWY board (FRWY) is a high-performance +development platform that supports the QorIQ LS1012A +Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 3a0e129..22d2f29 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -91,6 +91,7 @@ config PSCI_RESET !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ + !TARGET_LS1012AFRWY && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a0349a8..0a46b0e 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -227,7 +227,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ fsl-ls1012a-2g5rdb.dtb \ - fsl-ls1012a-frdm.dtb + fsl-ls1012a-frdm.dtb \ + fsl-ls1012a-frwy.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-frwy.dts b/arch/arm/dts/fsl-ls1012a-frwy.dts new file mode 100644 index 000..3158246 --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-frwy.dts @@ -0,0 +1,43 @@ +/* + * NXP ls1012a FRWY board device tree source + * + * Copyright 2018 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1012a.dtsi" + +/ { + model = "FRWY-LS1012A Board"; + + aliases { + spi0 = &qspi; + }; + + chosen { + stdout-path = &duart0; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: w25q16dw@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <2000>; + reg = <0>; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&duart0 { + status = "okay"; +}; diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index fd33807..73ad2fe 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -12,20 +12,23 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012afrdm" +config SYS_LS_PFE_FW_ADDR + hex "Flash address of PFE firmware" + default 0x40a0 + config SYS_LS_PPA_FW_ADDR hex "PPA Firmware Addr" default 0x4040 +endif + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select PHYLIB imply PHY_REALTEK - -config SYS_LS_PFE_FW_ADDR - hex "Flash address of PFE firmware" - default 0x40a0 + imply PHY_ATHEROS config DDR_PFE_PHYS_BASEADDR hex "PFE DDR physical base address" @@ -45,6 +48,28 @@ config PFE_EMAC2_PHY_ADDR endif -source "board/freescale/common/Kconfig" +if TARGET_LS1012AFRWY + +config SYS_BOARD + d
[U-Boot] [PATCH 1/3] board: Kconfig: Re-Arrangement of PPA firmware and header addresses
ppa firmware and header address may vary depending upon different boards, configure ppa firmware and header address in board specific kconfig Signed-off-by: Vinitha V Pillai Signed-off-by: Jagdish Gediya Signed-off-by: Bhaskar Upadhaya --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 34 --- board/freescale/ls1012afrdm/Kconfig | 4 board/freescale/ls1012aqds/Kconfig| 3 +++ board/freescale/ls1012ardb/Kconfig| 14 + board/freescale/ls1043aqds/Kconfig| 16 +++ board/freescale/ls1043ardb/Kconfig| 14 + board/freescale/ls1046aqds/Kconfig| 16 +++ board/freescale/ls1046ardb/Kconfig| 15 ++ board/freescale/ls1088a/Kconfig | 28 + board/freescale/ls2080aqds/Kconfig| 16 +++ board/freescale/ls2080ardb/Kconfig| 31 ++-- 11 files changed, 141 insertions(+), 50 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 546de33..f2111fa 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -261,40 +261,6 @@ config SYS_LS_PPA_FW_IN_NAND endchoice -config SYS_LS_PPA_FW_ADDR - hex "Address of PPA firmware loading from" - depends on FSL_LS_PPA - default 0x2040 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A - default 0x4040 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x58040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A - default 0x2040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A - default 0x6040 if SYS_LS_PPA_FW_IN_XIP - default 0x40 if SYS_LS_PPA_FW_IN_MMC - default 0x40 if SYS_LS_PPA_FW_IN_NAND - - help - If the PPA firmware locate at XIP flash, such as NOR or - QSPI flash, this address is a directly memory-mapped. - If it is in a serial accessed flash, such as NAND and SD - card, it is a byte offset. - -config SYS_LS_PPA_ESBC_ADDR - hex "hdr address of PPA firmware loading from" - depends on FSL_LS_PPA && CHAIN_OF_TRUST - default 0x6068 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1043A - default 0x4068 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1046A - default 0x4068 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1012A - default 0x2068 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A - default 0x58068 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A - default 0x2068 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A - default 0x68 if SYS_LS_PPA_FW_IN_MMC - default 0x68 if SYS_LS_PPA_FW_IN_NAND - help - If the PPA header firmware locate at XIP flash, such as NOR or - QSPI flash, this address is a directly memory-mapped. - If it is in a serial accessed flash, such as NAND and SD - card, it is a byte offset. - config LS_PPA_ESBC_HDR_SIZE hex "Length of PPA ESBC header" depends on FSL_LS_PPA && CHAIN_OF_TRUST && !SYS_LS_PPA_FW_IN_XIP diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index 22d521b..fd33807 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012afrdm" +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy diff --git a/board/freescale/ls1012aqds/Kconfig b/board/freescale/ls1012aqds/Kconfig index c0b12ed..b702fb2 100644 --- a/board/freescale/ls1012aqds/Kconfig +++ b/board/freescale/ls1012aqds/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012aqds" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 if FSL_PFE diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 493d477..4cd66bd 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -12,6 +12,16 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012ardb" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + +if CHAIN_OF_TRUST +config SYS_LS_PPA_ESBC_ADDR + hex "PPA Firmware HDR Addr" + default 0x4068 +endif + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy @@ -59,6 +69,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012a2g5rdb" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy
[U-Boot] [PATCH v2 1/2] board: move ppa firmware address in board specific kconfig
ppa firmware address may vary depending upon different boards, configure ppa firmware address in board specific kconfig Signed-off-by: Bhaskar Upadhaya --- Comments from v1: - move SYS_LS_PPA_FW_IN_MMC, SYS_LS_PPA_FW_IN_NAND in board files. arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 17 - board/freescale/ls1012afrdm/Kconfig | 4 +++ board/freescale/ls1012aqds/Kconfig| 3 +++ board/freescale/ls1012ardb/Kconfig| 8 ++ board/freescale/ls1043aqds/Kconfig| 21 board/freescale/ls1043ardb/Kconfig| 21 board/freescale/ls1046aqds/Kconfig| 21 board/freescale/ls1046ardb/Kconfig| 22 board/freescale/ls1088a/Kconfig | 28 + board/freescale/ls2080aqds/Kconfig| 21 board/freescale/ls2080ardb/Kconfig| 42 +++ 11 files changed, 191 insertions(+), 17 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 7edc06d..67bb28e 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -261,23 +261,6 @@ config SYS_LS_PPA_FW_IN_NAND endchoice -config SYS_LS_PPA_FW_ADDR - hex "Address of PPA firmware loading from" - depends on FSL_LS_PPA - default 0x2040 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A - default 0x4040 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x58040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A - default 0x2040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A - default 0x6040 if SYS_LS_PPA_FW_IN_XIP - default 0x40 if SYS_LS_PPA_FW_IN_MMC - default 0x40 if SYS_LS_PPA_FW_IN_NAND - - help - If the PPA firmware locate at XIP flash, such as NOR or - QSPI flash, this address is a directly memory-mapped. - If it is in a serial accessed flash, such as NAND and SD - card, it is a byte offset. - config SYS_LS_PPA_ESBC_ADDR hex "hdr address of PPA firmware loading from" depends on FSL_LS_PPA && CHAIN_OF_TRUST diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index 22d521b..fd33807 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012afrdm" +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy diff --git a/board/freescale/ls1012aqds/Kconfig b/board/freescale/ls1012aqds/Kconfig index c0b12ed..b702fb2 100644 --- a/board/freescale/ls1012aqds/Kconfig +++ b/board/freescale/ls1012aqds/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012aqds" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 if FSL_PFE diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 493d477..0b873dd 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012ardb" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy @@ -59,6 +63,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012a2g5rdb" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy diff --git a/board/freescale/ls1043aqds/Kconfig b/board/freescale/ls1043aqds/Kconfig index 95d2888..3c571aa 100644 --- a/board/freescale/ls1043aqds/Kconfig +++ b/board/freescale/ls1043aqds/Kconfig @@ -12,6 +12,27 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1043aqds" +if SYS_LS_PPA_FW_IN_XIP + +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x6040 +endif + +if (SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT) + +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x4040 +endif + +if (SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND) + +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x40 +endif + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1043ardb/Kconfig b/board/freescale/ls1043ardb/Kconfig index 1bab7ca..26272c9 100644 --- a/board/freescale/ls1043ardb/Kconfig +++ b/board/freescale/ls1043ardb/Kconfig @@ -22,6 +22,27 @@ config SYS_HAS_ARMV8_SECURE_BASE If enabled, please also define the value for ARMV8_SECURE_BASE, for LS1043ARDB, it
[U-Boot] [PATCH 2/2] board: ls1012a: FRWY-LS1012A board support
FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART. Signed-off-by: Bhaskar Upadhaya --- arch/arm/Kconfig | 12 +++ arch/arm/cpu/armv8/Kconfig| 1 + arch/arm/dts/Makefile | 3 +- arch/arm/dts/fsl-ls1012a-frwy.dts | 43 +++ board/freescale/ls1012afrdm/Kconfig | 35 +++-- board/freescale/ls1012afrdm/MAINTAINERS | 7 ++ board/freescale/ls1012afrdm/eth.c | 3 +- board/freescale/ls1012afrdm/ls1012afrdm.c | 67 - configs/ls1012afrwy_qspi_defconfig| 49 include/configs/ls1012afrwy.h | 120 ++ 10 files changed, 329 insertions(+), 11 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1012a-frwy.dts create mode 100644 configs/ls1012afrwy_qspi_defconfig create mode 100644 include/configs/ls1012afrwy.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9bd70f4..d5d2dc7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -973,6 +973,18 @@ config TARGET_LS1012A2G5RDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012AFRWY + bool "Support ls1012afrwy" + select ARCH_LS1012A + select ARM64 + imply SCSI + imply SCSI_AHCI + help +Support for Freescale LS1012AFRWY platform. +The LS1012A FRWY board (FRWY) is a high-performance +development platform that supports the QorIQ LS1012A +Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 3a0e129..22d2f29 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -91,6 +91,7 @@ config PSCI_RESET !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ + !TARGET_LS1012AFRWY && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ac7667b..8455587 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -225,7 +225,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ fsl-ls1012a-2g5rdb.dtb \ - fsl-ls1012a-frdm.dtb + fsl-ls1012a-frdm.dtb \ + fsl-ls1012a-frwy.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-frwy.dts b/arch/arm/dts/fsl-ls1012a-frwy.dts new file mode 100644 index 000..3158246 --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-frwy.dts @@ -0,0 +1,43 @@ +/* + * NXP ls1012a FRWY board device tree source + * + * Copyright 2018 NXP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1012a.dtsi" + +/ { + model = "FRWY-LS1012A Board"; + + aliases { + spi0 = &qspi; + }; + + chosen { + stdout-path = &duart0; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: w25q16dw@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <2000>; + reg = <0>; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&duart0 { + status = "okay"; +}; diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index fd33807..73ad2fe 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -12,20 +12,23 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012afrdm" +config SYS_LS_PFE_FW_ADDR + hex "Flash address of PFE firmware" + default 0x40a0 + config SYS_LS_PPA_FW_ADDR hex "PPA Firmware Addr" default 0x4040 +endif + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select PHYLIB imply PHY_REALTEK - -config SYS_LS_PFE_FW_ADDR - hex "Flash address of PFE firmware" - default 0x40a0 + imply PHY_ATHEROS config DDR_PFE_PHYS_BASEADDR hex "PFE DDR physical base address" @@ -45,6 +48,28 @@ config PFE_EMAC2_PHY_ADDR endif -source "board/freescale/common/Kconfig" +if T
[U-Boot] [PATCH 1/2] board: move ppa firmware address in board specific kconfig
ppa firmware address may vary depending upon different boards, configure ppa firmware address in board specific kconfig Signed-off-by: Bhaskar Upadhaya --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 5 - board/freescale/ls1012afrdm/Kconfig | 4 board/freescale/ls1012aqds/Kconfig| 3 +++ board/freescale/ls1012ardb/Kconfig| 8 board/freescale/ls1043aqds/Kconfig| 4 board/freescale/ls1043ardb/Kconfig| 4 board/freescale/ls1046aqds/Kconfig| 4 board/freescale/ls1046ardb/Kconfig| 5 + board/freescale/ls1088a/Kconfig | 8 board/freescale/ls2080a/Kconfig | 24 board/freescale/ls2080aqds/Kconfig| 12 board/freescale/ls2080ardb/Kconfig| 24 12 files changed, 100 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 7edc06d..a4d544b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -264,11 +264,6 @@ endchoice config SYS_LS_PPA_FW_ADDR hex "Address of PPA firmware loading from" depends on FSL_LS_PPA - default 0x2040 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT && ARCH_LS2080A - default 0x4040 if SYS_LS_PPA_FW_IN_XIP && QSPI_BOOT - default 0x58040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS2080A - default 0x2040 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1088A - default 0x6040 if SYS_LS_PPA_FW_IN_XIP default 0x40 if SYS_LS_PPA_FW_IN_MMC default 0x40 if SYS_LS_PPA_FW_IN_NAND diff --git a/board/freescale/ls1012afrdm/Kconfig b/board/freescale/ls1012afrdm/Kconfig index 22d521b..fd33807 100644 --- a/board/freescale/ls1012afrdm/Kconfig +++ b/board/freescale/ls1012afrdm/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012afrdm" +config SYS_LS_PPA_FW_ADDR + hex "PPA Firmware Addr" + default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy diff --git a/board/freescale/ls1012aqds/Kconfig b/board/freescale/ls1012aqds/Kconfig index c0b12ed..b702fb2 100644 --- a/board/freescale/ls1012aqds/Kconfig +++ b/board/freescale/ls1012aqds/Kconfig @@ -12,6 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012aqds" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 if FSL_PFE diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 493d477..0b873dd 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012ardb" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy @@ -59,6 +63,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1012a2g5rdb" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + if FSL_PFE config BOARD_SPECIFIC_OPTIONS # dummy diff --git a/board/freescale/ls1043aqds/Kconfig b/board/freescale/ls1043aqds/Kconfig index 95d2888..d44b20e 100644 --- a/board/freescale/ls1043aqds/Kconfig +++ b/board/freescale/ls1043aqds/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1043aqds" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1043ardb/Kconfig b/board/freescale/ls1043ardb/Kconfig index 1bab7ca..2b21222 100644 --- a/board/freescale/ls1043ardb/Kconfig +++ b/board/freescale/ls1043ardb/Kconfig @@ -22,6 +22,10 @@ config SYS_HAS_ARMV8_SECURE_BASE If enabled, please also define the value for ARMV8_SECURE_BASE, for LS1043ARDB, it could be some address in OCRAM. +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1046aqds/Kconfig b/board/freescale/ls1046aqds/Kconfig index 070827d..4f604b1 100644 --- a/board/freescale/ls1046aqds/Kconfig +++ b/board/freescale/ls1046aqds/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "ls1046aqds" +config SYS_LS_PPA_FW_ADDR +hex "PPA Firmware Addr" +default 0x4040 + source "board/freescale/common/Kconfig" endif diff --git a/board/freescale/ls1046ardb/Kconfig b/board/freescale/ls1046ardb/Kconfig index b9f2ed7..96f34da 100644 --- a/board/freescale/ls1046ardb/Kconfig +++ b/board/freescale/ls1046ardb/Kconfig @@ -12,5 +12,10 @@
[U-Boot] [PATCH v2 1/2] armv8/kconfig: Align boards of same family at one place
Align boards belonging to LS1012A, LS2080A SoC at one place Signed-off-by: Bhaskar Upadhaya --- arch/arm/cpu/armv8/Kconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 12aba9d..51f48e1 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -85,11 +85,12 @@ endmenu config PSCI_RESET bool "Use PSCI for reset and shutdown" default y - depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \ + depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \ !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \ - !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \ + !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \ !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ + !TARGET_LS1012AQDS && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] board: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART Signed-off-by: Bhaskar Upadhaya --- changes for v2: - LS1012A-2G5RDB patches are made independent of PFE patches - Remove CONFIG_CMD_DHCP, CONFIG_CMD_MII, CONFIG_FSL_PFE. CONFIG_DM_MMC_OPS - created ls1012a2g5rdb_qspi_defconfig after running savedefconfig arch/arm/Kconfig| 12 arch/arm/cpu/armv8/Kconfig | 2 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 43 +++ board/freescale/ls1012ardb/Kconfig | 18 + board/freescale/ls1012ardb/MAINTAINERS | 7 ++ board/freescale/ls1012ardb/README | 43 +++ board/freescale/ls1012ardb/ls1012ardb.c | 7 +- configs/ls1012a2g5rdb_qspi_defconfig| 40 +++ include/configs/ls1012a2g5rdb.h | 122 10 files changed, 293 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1012a-2g5rdb.dts create mode 100644 configs/ls1012a2g5rdb_qspi_defconfig create mode 100644 include/configs/ls1012a2g5rdb.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 91ad5e8..d77bc6e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -918,6 +918,18 @@ config TARGET_LS1012ARDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012A2G5RDB + bool "Support ls1012a2g5rdb" + select ARCH_LS1012A + select ARM64 + select BOARD_LATE_INIT + imply SCSI + help + Support for Freescale LS1012A2G5RDB platform. + The LS1012A 2G5 Reference design board (RDB) is a high-performance + development platform that supports the QorIQ LS1012A + Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 51f48e1..3a0e129 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -90,7 +90,7 @@ config PSCI_RESET !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \ !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ - !TARGET_LS1012AQDS && \ + !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 6db64f91..9e49b7d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -200,6 +200,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1046a-rdb.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ + fsl-ls1012a-2g5rdb.dtb \ fsl-ls1012a-frdm.dtb dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts new file mode 100644 index 000..dbe01dd --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -0,0 +1,43 @@ +/* + * NXP ls1012a 2G5RDB board device tree source + * + * Copyright 2017 NXP + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1012a.dtsi" + +/ { + model = "LS1012A 2G5RDB Board"; + + aliases { + spi0 = &qspi; + }; + + chosen { + stdout-path = &duart0; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: s25fl128s@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <2000>; + reg = <0>; + }; +}; + +&i2c0 { + status = "okay"; +}; + +&duart0 { + status = "okay"; +}; diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 98231f9..d13b08e 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -15,3 +15,21 @@ config SYS_CONFIG_NAME source "board/freescale/common/Kconfig" endif + +if TARGET_LS1012A2G5RDB + +config SYS_BOARD +default "ls1012ardb" + +config SYS_VENDOR +default "freescale" + +config SYS_SOC +default "fsl-layerscape" + +config SYS_CONFIG_NAME +default "ls1012a2g5rdb" + +source "board/freescale/common/Kconfig" + +endif diff --git a/board/freescale/ls1012ardb/MAINTAINERS b/board/freescale/ls1012ardb/MAINTAINERS index 2c
Re: [U-Boot] [PATCH 3/3] drivers: net: pfe_eth: Disable autonegotiation for 2.5G SGMII
>-Original Message- >From: York Sun >Sent: Tuesday, January 09, 2018 12:13 AM >To: Bhaskar Upadhaya ; u-boot@lists.denx.de >Subject: Re: [PATCH 3/3] drivers: net: pfe_eth: Disable autonegotiation for >2.5G >SGMII > >On 11/29/2017 09:13 PM, Bhaskar Upadhaya wrote: >> PCS initialization sequence for 2.5G SGMII interface governs auto >> negotiation to be in disabled mode >> >> Signed-off-by: Bhaskar Upadhaya >> --- >> Depends on >> https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpat >> >chwork.ozlabs.org%2Fcover%2F823205&data=02%7C01%7Cyork.sun%40nxp.co >m%7 >> >Cb59aad3d38094ace132e08d537b11a48%7C686ea1d3bc2b4c6fa92cd99c5c3016 >35%7 >> >C0%7C0%7C636476156146644483&sdata=4AvC%2FgaoUi5mwTuEZFJr1uSTV2n1 >%2BAVF >> yNIZhuQ3XUQ%3D&reserved=0 >> > >Bhaskar, > >I wonder if we can skip this patch and apply other patches. The PFE patch set >is >not accepted yet. > >York York, I will send another set of patches which are independent of PFE so that at least Hexa platform support can be accepted without PFE. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/3] board: freescale: ls1012a: LS1012A-2G5RDB board support
>-Original Message- >From: York Sun >Sent: Tuesday, January 09, 2018 1:10 AM >To: Bhaskar Upadhaya ; u-boot@lists.denx.de >Subject: Re: [PATCH v3 2/3] board: freescale: ls1012a: LS1012A-2G5RDB board >support > >On 11/29/2017 09:13 PM, Bhaskar Upadhaya wrote: >> LS1012A-2G5RDB belongs to LS1012A family with features >> 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART >> >> Signed-off-by: Bhaskar Upadhaya >> --- >> changes for v3: >> 1. remove pfe driver changes from this patch 2. remove PCIe, DSPI >> from ls1012a2g5rdb_qspi_defconfig >> > > > >> diff --git a/board/freescale/ls1012ardb/ls1012ardb.c >> b/board/freescale/ls1012ardb/ls1012ardb.c >> index 41283db..9675335 100644 >> --- a/board/freescale/ls1012ardb/ls1012ardb.c >> +++ b/board/freescale/ls1012ardb/ls1012ardb.c >> @@ -28,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR; >> >> int checkboard(void) >> { >> +#ifdef CONFIG_TARGET_LS1012ARDB >> u8 in1; >> >> puts("Board: LS1012ARDB "); >> @@ -57,6 +58,9 @@ int checkboard(void) >> puts(": bank2\n"); >> else >> puts("unknown\n"); >> +#else >> +puts("Board: LS1012A2G5RDB "); >> +#endif >> >> return 0; >> } >> @@ -148,10 +152,12 @@ int esdhc_status_fixup(void *blob, const char >*compat) >> * 10 - eMMC Memory >> * 11 - SPI >> */ >> +#ifdef CONFIG_TARGET_LS1012ARDB >> if (i2c_read(I2C_MUX_IO1_ADDR, 0, 1, &io, 1) < 0) { >> printf("Error reading i2c boot information!\n"); >> return 0; /* Don't want to hang() on this error */ >> } >> +#endif >> >> mux_sdhc2 = (io & 0x0c) >> 2; >> /* Enable SDHC2 only when use SDIO wifi and eMMC */ > >Bhaskar, > >Please double check changes to this file. I am seeing compiling errors related >to >I2C_MUX_IO_ADDR, I2C_MUX_IO_1, SW_REV_MASK, SW_REV_D for >ls1012a2g5rdb_qspi on top of master branch. > >York York, This patch needs to be re spin because it modifies file " board/freescale/ls1012ardb/eth.c " which is introduced by PFE patch set which are still under discussion. So will send another rev of this patch which will remove the file "board/freescale/ls1012ardb/eth.c " ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] ls1012a:dts: Update LS1012A-2G5RDB device tree
Previously LS1012A-2G5RDB dts includes fsl-ls1012a-rdb.dtsi which further includes fsl-ls1012a.dtsi.Now LS1012A-2G5RDB dts include fsl-ls1012a.dtsi. Signed-off-by: Bhaskar Upadhaya --- arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 29 - 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts index 8c7f410..3b692d0 100644 --- a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -7,10 +7,37 @@ */ /dts-v1/; -#include "fsl-ls1012a-rdb.dtsi" +#include "fsl-ls1012a.dtsi" / { + model = "LS1012A 2G5RDB Board"; + + aliases { + spi0 = &qspi; + }; + chosen { stdout-path = &duart0; + }; +}; + +&qspi { + bus-num = <0>; + status = "okay"; + + qflash0: s25fl128s@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-flash"; + spi-max-frequency = <2000>; + reg = <0>; }; }; + +&i2c0 { + status = "okay"; +}; + +&duart0 { + status = "okay"; +}; -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 2/3] board: freescale: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART Signed-off-by: Bhaskar Upadhaya --- changes for v3: 1. remove pfe driver changes from this patch 2. remove PCIe, DSPI from ls1012a2g5rdb_qspi_defconfig arch/arm/Kconfig| 11 +++ arch/arm/cpu/armv8/Kconfig | 2 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 16 + board/freescale/ls1012ardb/Kconfig | 18 ++ board/freescale/ls1012ardb/MAINTAINERS | 7 board/freescale/ls1012ardb/README | 43 board/freescale/ls1012ardb/eth.c| 48 +-- board/freescale/ls1012ardb/ls1012ardb.c | 6 configs/ls1012a2g5rdb_qspi_defconfig| 46 ++ include/configs/ls1012a2g5rdb.h | 58 + 11 files changed, 245 insertions(+), 11 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1012a-2g5rdb.dts create mode 100644 configs/ls1012a2g5rdb_qspi_defconfig create mode 100644 include/configs/ls1012a2g5rdb.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 94ad805..6816b5b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -932,6 +932,17 @@ config TARGET_LS1012ARDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012A2G5RDB + bool "Support ls1012a2g5rdb" + select ARCH_LS1012A + select ARM64 + select BOARD_LATE_INIT + help + Support for Freescale LS1012A2G5RDB platform. + The LS1012A 2G5 Reference design board (RDB) is a high-performance + development platform that supports the QorIQ LS1012A + Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 51f48e1..3a0e129 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -90,7 +90,7 @@ config PSCI_RESET !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \ !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ - !TARGET_LS1012AQDS && \ + !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cd540e9..0311d42 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -201,6 +201,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1046a-rdb.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ + fsl-ls1012a-2g5rdb.dtb \ fsl-ls1012a-frdm.dtb dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts new file mode 100644 index 000..8c7f410 --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -0,0 +1,16 @@ +/* + * NXP ls1012a 2G5RDB board device tree source + * + * Copyright 2017 NXP + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1012a-rdb.dtsi" + +/ { + chosen { + stdout-path = &duart0; + }; +}; diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 98231f9..d13b08e 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -15,3 +15,21 @@ config SYS_CONFIG_NAME source "board/freescale/common/Kconfig" endif + +if TARGET_LS1012A2G5RDB + +config SYS_BOARD +default "ls1012ardb" + +config SYS_VENDOR +default "freescale" + +config SYS_SOC +default "fsl-layerscape" + +config SYS_CONFIG_NAME +default "ls1012a2g5rdb" + +source "board/freescale/common/Kconfig" + +endif diff --git a/board/freescale/ls1012ardb/MAINTAINERS b/board/freescale/ls1012ardb/MAINTAINERS index 2cb38e7..a0a0d8d 100644 --- a/board/freescale/ls1012ardb/MAINTAINERS +++ b/board/freescale/ls1012ardb/MAINTAINERS @@ -8,3 +8,10 @@ F: configs/ls1012ardb_qspi_defconfig M: Sumit Garg S: Maintained F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig + +LS1012A2G5RDB BOARD +M: Bhaskar Upadhaya +S: Maintained +F: board/freescale/ls1012ardb/ +F: include/configs/ls1012a2g5rdb.h +F: configs/ls1012a2g5rdb_qspi_defconfig diff --git a/board/freescale/ls1012ardb/README b/board/freescale/ls1012ardb/README index 453b432..c1d3415 100644 --- a/board/freescale/
[U-Boot] [PATCH 3/3] drivers: net: pfe_eth: Disable autonegotiation for 2.5G SGMII
PCS initialization sequence for 2.5G SGMII interface governs auto negotiation to be in disabled mode Signed-off-by: Bhaskar Upadhaya --- Depends on https://patchwork.ozlabs.org/cover/823205 drivers/net/pfe_eth/pfe_eth.c | 3 +++ include/pfe_eth/pfe/cbus/emac.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/net/pfe_eth/pfe_eth.c b/drivers/net/pfe_eth/pfe_eth.c index 4db823f..01b745b 100644 --- a/drivers/net/pfe_eth/pfe_eth.c +++ b/drivers/net/pfe_eth/pfe_eth.c @@ -426,6 +426,9 @@ static void ls1012a_configure_serdes(struct ls1012a_eth_dev *priv) value = PHY_SGMII_CR_DEF_VAL; if (!sgmii_2500) value |= PHY_SGMII_CR_RESET_AN; + /* Disable Auto neg for 2.5G SGMII as it doesn't support auto neg*/ + if (sgmii_2500) + value &= ~PHY_SGMII_ENABLE_AN; ls1012a_phy_write(&bus, 0, MDIO_DEVAD_NONE, 0, value); } diff --git a/include/pfe_eth/pfe/cbus/emac.h b/include/pfe_eth/pfe/cbus/emac.h index 3cfcd99..b61f3ad 100644 --- a/include/pfe_eth/pfe/cbus/emac.h +++ b/include/pfe_eth/pfe/cbus/emac.h @@ -146,5 +146,6 @@ enum mac_speed {SPEED_10M, SPEED_100M, SPEED_1000M, SPEED_1000M_PCS}; #define PHY_SGMII_IF_MODE_AN0x0002 #define PHY_SGMII_IF_MODE_SGMII 0x0001 #define PHY_SGMII_IF_MODE_SGMII_GBT 0x0008 +#define PHY_SGMII_ENABLE_AN 0x1000 #endif /* _EMAC_H_ */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/3] armv8/kconfig: Align boards of same family at one place
Align boards belonging to LS1012A, LS2080A SoC at one place Signed-off-by: Bhaskar Upadhaya --- arch/arm/cpu/armv8/Kconfig | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 12aba9d..51f48e1 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -85,11 +85,12 @@ endmenu config PSCI_RESET bool "Use PSCI for reset and shutdown" default y - depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \ + depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \ !TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \ - !TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \ + !TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \ !TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \ !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ + !TARGET_LS1012AQDS && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ !TARGET_LS2081ARDB && \ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC] Support for SGMII 2500
+ Anji, Calvin, Prabhakar, Poonam. -Original Message- From: Madalin-cristian Bucur Sent: Tuesday, November 28, 2017 12:56 PM To: Andrew Lunn ; f.faine...@gmail.com; net...@vger.kernel.org Cc: Bhaskar Upadhaya ; Shengzhou Liu ; York Sun ; u-boot@lists.denx.de Subject: [RFC] Support for SGMII 2500 Hi, There is a disconnect between the SGMII 2500 support in u-boot and Linux. Bhaskar is trying to add support for a SGMII interface working at 2.5Gbps by using the PHY connection type "sgmii-2500" in the device tree: phy-connection-type = "sgmii-2500"; This is supported by u-boot, in include/phy.h: typedef enum { PHY_INTERFACE_MODE_MII, PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_SGMII, PHY_INTERFACE_MODE_SGMII_2500, ... static const char *phy_interface_strings[] = { [PHY_INTERFACE_MODE_MII]= "mii", [PHY_INTERFACE_MODE_GMII] = "gmii", [PHY_INTERFACE_MODE_SGMII] = "sgmii", [PHY_INTERFACE_MODE_SGMII_2500] = "sgmii-2500", ... since this commit: commit c35f8693942d8284c635592f263a0fe11abe1d1d Author: Shengzhou Liu Date: Thu Oct 23 17:20:57 2014 +0800 net/fm: add 2.5G SGMII support As auto-negotiation is not supported for 2.5G SGMII, we need to add a new type PHY_INTERFACE_MODE_SGMII_2500 to differentiate SGMII-1G and SGMII-2.5G with different setting for auto-negotiation. Signed-off-by: Shaohui Xie Signed-off-by: Shengzhou Liu Reviewed-by: York Sun In the Linux kernel we do not have a separate define for SGMII_2500, should we add something like the change below? Thanks, Madalin --- diff --git a/include/linux/phy.h b/include/linux/phy.h index dc82a07..086f7a3 100644 --- a/include/linux/phy.h +++ b/include/linux/phy.h @@ -68,6 +68,7 @@ typedef enum { PHY_INTERFACE_MODE_MII, PHY_INTERFACE_MODE_GMII, PHY_INTERFACE_MODE_SGMII, + PHY_INTERFACE_MODE_SGMII_2500, PHY_INTERFACE_MODE_TBI, PHY_INTERFACE_MODE_REVMII, PHY_INTERFACE_MODE_RMII, @@ -123,6 +124,8 @@ static inline const char *phy_modes(phy_interface_t interface) return "gmii"; case PHY_INTERFACE_MODE_SGMII: return "sgmii"; + case PHY_INTERFACE_MODE_SGMII_2500: + return "sgmii-2500"; case PHY_INTERFACE_MODE_TBI: return "tbi"; case PHY_INTERFACE_MODE_REVMII: ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2] board: freescale: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2.5G SGMII PFE MAC, SATA, USB 2.0/3.0, WiFi, DDR, eMMC, QuadSPI, UART Signed-off-by: Bhaskar Upadhaya --- Changes for V2: 1. Use existing code base of RDB 2. Correct Copyrights Depends on https://patchwork.ozlabs.org/cover/823205 arch/arm/Kconfig| 11 + arch/arm/cpu/armv8/Kconfig | 2 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 16 +++ board/freescale/ls1012ardb/Kconfig | 18 board/freescale/ls1012ardb/MAINTAINERS | 7 +++ board/freescale/ls1012ardb/README | 34 ++ board/freescale/ls1012ardb/ls1012ardb.c | 4 ++ configs/ls1012a2g5rdb_qspi_defconfig| 53 + drivers/net/pfe_eth/pfe_eth.c | 11 - include/configs/ls1012a2g5rdb.h | 81 + 11 files changed, 236 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1012a-2g5rdb.dts create mode 100644 configs/ls1012a2g5rdb_qspi_defconfig create mode 100644 include/configs/ls1012a2g5rdb.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 94ad805..6816b5b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -932,6 +932,17 @@ config TARGET_LS1012ARDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012A2G5RDB + bool "Support ls1012a2g5rdb" + select ARCH_LS1012A + select ARM64 + select BOARD_LATE_INIT + help + Support for Freescale LS1012A2G5RDB platform. + The LS1012A 2G5 Reference design board (RDB) is a high-performance + development platform that supports the QorIQ LS1012A + Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 12aba9d..3de2706 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -92,7 +92,7 @@ config PSCI_RESET !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ - !TARGET_LS2081ARDB && \ + !TARGET_LS2081ARDB && !TARGET_LS1012A2G5RDB && \ !ARCH_UNIPHIER && !TARGET_S32V234EVB help Most armv8 systems have PSCI support enabled in EL3, either through diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cd540e9..0311d42 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -201,6 +201,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1046a-rdb.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ + fsl-ls1012a-2g5rdb.dtb \ fsl-ls1012a-frdm.dtb dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts new file mode 100644 index 000..8c7f410 --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -0,0 +1,16 @@ +/* + * NXP ls1012a 2G5RDB board device tree source + * + * Copyright 2017 NXP + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1012a-rdb.dtsi" + +/ { + chosen { + stdout-path = &duart0; + }; +}; diff --git a/board/freescale/ls1012ardb/Kconfig b/board/freescale/ls1012ardb/Kconfig index 98231f9..d13b08e 100644 --- a/board/freescale/ls1012ardb/Kconfig +++ b/board/freescale/ls1012ardb/Kconfig @@ -15,3 +15,21 @@ config SYS_CONFIG_NAME source "board/freescale/common/Kconfig" endif + +if TARGET_LS1012A2G5RDB + +config SYS_BOARD +default "ls1012ardb" + +config SYS_VENDOR +default "freescale" + +config SYS_SOC +default "fsl-layerscape" + +config SYS_CONFIG_NAME +default "ls1012a2g5rdb" + +source "board/freescale/common/Kconfig" + +endif diff --git a/board/freescale/ls1012ardb/MAINTAINERS b/board/freescale/ls1012ardb/MAINTAINERS index 2cb38e7..a0a0d8d 100644 --- a/board/freescale/ls1012ardb/MAINTAINERS +++ b/board/freescale/ls1012ardb/MAINTAINERS @@ -8,3 +8,10 @@ F: configs/ls1012ardb_qspi_defconfig M: Sumit Garg S: Maintained F: configs/ls1012ardb_qspi_SECURE_BOOT_defconfig + +LS1012A2G5RDB BOARD +M: Bhaskar Upadhaya +S: Maintained +F: board/freescale/ls1012ardb/ +F: include/configs/ls1012a2g5rdb.h +F: configs/ls1012a2g5rdb_qspi_defconfig diff --git a/board/freescale/ls1012ardb/README b/board/freescale/ls1012ardb/README index 453b432..3826ce7 100644 --- a/board/freescale/ls1012ardb/README +++ b/board/freescale/ls1012ardb/README @@ -52,3 +52,37 @@ U-boot
[U-Boot] [PATCH 1/1] board: freescale: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 1. 2 2.5G SGMII PFE Block 2. Sata 3. USB 2.0/3.0 4. WiFi 5. DDR 6. eMMC 7. QuadSPI 8. UART Signed-off-by: Bhaskar Upadhaya --- Depends on https://patchwork.ozlabs.org/cover/823205 arch/arm/Kconfig | 13 ++ arch/arm/cpu/armv8/Kconfig| 2 +- arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-ls1012a-2g5rdb.dts | 16 +++ arch/arm/dts/fsl-ls1012a-2g5rdb.dtsi | 39 ++ board/freescale/ls1012a2g5rdb/Kconfig | 17 +++ board/freescale/ls1012a2g5rdb/MAINTAINERS | 6 + board/freescale/ls1012a2g5rdb/Makefile| 8 ++ board/freescale/ls1012a2g5rdb/README | 46 +++ board/freescale/ls1012a2g5rdb/eth.c | 62 + board/freescale/ls1012a2g5rdb/ls1012a2g5rdb.c | 173 ++ configs/ls1012a2g5rdb_qspi_defconfig | 53 drivers/net/pfe_eth/pfe_eth.c | 37 +- include/configs/ls1012a2g5rdb.h | 82 14 files changed, 519 insertions(+), 36 deletions(-) create mode 100644 arch/arm/dts/fsl-ls1012a-2g5rdb.dts create mode 100644 arch/arm/dts/fsl-ls1012a-2g5rdb.dtsi create mode 100644 board/freescale/ls1012a2g5rdb/Kconfig create mode 100644 board/freescale/ls1012a2g5rdb/MAINTAINERS create mode 100644 board/freescale/ls1012a2g5rdb/Makefile create mode 100644 board/freescale/ls1012a2g5rdb/README create mode 100644 board/freescale/ls1012a2g5rdb/eth.c create mode 100644 board/freescale/ls1012a2g5rdb/ls1012a2g5rdb.c create mode 100644 configs/ls1012a2g5rdb_qspi_defconfig create mode 100644 include/configs/ls1012a2g5rdb.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 94ad805..1c75810 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -932,6 +932,18 @@ config TARGET_LS1012ARDB development platform that supports the QorIQ LS1012A Layerscape Architecture processor. +config TARGET_LS1012A2G5RDB + bool "Support ls1012a2g5rdb" + select ARCH_LS1012A + select ARM64 + select BOARD_LATE_INIT + imply SCSI + help + Support for Freescale LS1012A2G5RDB platform. + The LS1012A 2G5 Reference design board (RDB) is a high-performance + development platform that supports the QorIQ LS1012A + Layerscape Architecture processor. + config TARGET_LS1012AFRDM bool "Support ls1012afrdm" select ARCH_LS1012A @@ -1256,6 +1268,7 @@ source "board/freescale/ls1043ardb/Kconfig" source "board/freescale/ls1046ardb/Kconfig" source "board/freescale/ls1012aqds/Kconfig" source "board/freescale/ls1012ardb/Kconfig" +source "board/freescale/ls1012a2g5rdb/Kconfig" source "board/freescale/ls1012afrdm/Kconfig" source "board/freescale/mx23evk/Kconfig" source "board/freescale/mx28evk/Kconfig" diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 12aba9d..3de2706 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -92,7 +92,7 @@ config PSCI_RESET !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \ !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \ !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \ - !TARGET_LS2081ARDB && \ + !TARGET_LS2081ARDB && !TARGET_LS1012A2G5RDB && \ !ARCH_UNIPHIER && !TARGET_S32V234EVB help Most armv8 systems have PSCI support enabled in EL3, either through diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index cd540e9..0311d42 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -201,6 +201,7 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \ fsl-ls1046a-rdb.dtb \ fsl-ls1012a-qds.dtb \ fsl-ls1012a-rdb.dtb \ + fsl-ls1012a-2g5rdb.dtb \ fsl-ls1012a-frdm.dtb dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dts b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts new file mode 100644 index 000..304eedd --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dts @@ -0,0 +1,16 @@ +/* + * Device Tree file for Freescale Layerscape-1012A family SoC. + * + * Copyright (C) 2016, Freescale Semiconductor + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/dts-v1/; +#include "fsl-ls1012a-2g5rdb.dtsi" + +/ { + chosen { + stdout-path = &duart0; + }; +}; diff --git a/arch/arm/dts/fsl-ls1012a-2g5rdb.dtsi b/arch/arm/dts/fsl-ls1012a-2g5rdb.dtsi new file mode 100644 index 000..ac15670 --- /dev/null +++ b/arch/arm/dts/fsl-ls1012a-2g5rdb.dtsi @@ -0,0 +1,39 @@ +/* + * Device Tree Include file for Freescale Layerscape-1012A family SoC. + * + * Copyri
[U-Boot] [PATCH V3] armv8: ls1012a: Modify Kernel and Environment offset
Kernel is now located at 0x100 instead of 0xa0 and envirorment variables are located at 3MB offset instead of 2MB in Flash Signed-off-by: Bhaskar Upadhaya --- Changes for V3: Updated Commit message include/configs/ls1012a_common.h | 4 ++-- include/configs/ls1012afrdm.h| 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index d2fa50a..57cae94 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -65,7 +65,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_SIZE0x4 /* 256KB */ -#define CONFIG_ENV_OFFSET 0x20/* 2MB */ +#define CONFIG_ENV_OFFSET 0x30/* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x4 #endif @@ -94,7 +94,7 @@ "kernel_addr=0x10\0"\ "fdt_high=0x\0" \ "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ + "kernel_start=0x100\0" \ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index efb4c00..5b4bf28 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -27,7 +27,7 @@ "kernel_addr=0x10\0"\ "fdt_high=0x\0" \ "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ + "kernel_start=0x100\0" \ "kernel_load=0x9600\0" \ "kernel_size=0x280\0" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH V2] armv8: ls1012a: Modify Kernel and Environment offset
Kernel is now located at 0x100 instead of 0xa0 and Envirorment Variables are located at 3MB offset instead of 2MB in Flash Signed-off-by: Bhaskar Upadhaya --- Changes for V2: Updated subject and removed white spaces include/configs/ls1012a_common.h | 4 ++-- include/configs/ls1012afrdm.h| 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index d2fa50a..57cae94 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -65,7 +65,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_SIZE0x4 /* 256KB */ -#define CONFIG_ENV_OFFSET 0x20/* 2MB */ +#define CONFIG_ENV_OFFSET 0x30/* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x4 #endif @@ -94,7 +94,7 @@ "kernel_addr=0x10\0"\ "fdt_high=0x\0" \ "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ + "kernel_start=0x100\0" \ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index efb4c00..5b4bf28 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -27,7 +27,7 @@ "kernel_addr=0x10\0"\ "fdt_high=0x\0" \ "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ + "kernel_start=0x100\0" \ "kernel_load=0x9600\0" \ "kernel_size=0x280\0" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH V2] armv8: ls1012a: Modify Kernel and Environment offset
Kernel is now located at 0x100 instead of 0xa0 and Envirorment Variables are located at 3MB offset instead of 2MB in Flash Signed-off-by: Bhaskar Upadhaya --- Changes for V2: Updated subject and removed white spaces --- include/configs/ls1012a_common.h | 4 ++-- include/configs/ls1012afrdm.h| 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index d2fa50a..57cae94 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -65,7 +65,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_SIZE0x4 /* 256KB */ -#define CONFIG_ENV_OFFSET 0x20/* 2MB */ +#define CONFIG_ENV_OFFSET 0x30/* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x4 #endif @@ -94,7 +94,7 @@ "kernel_addr=0x10\0"\ "fdt_high=0x\0" \ "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ + "kernel_start=0x100\0" \ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index efb4c00..5b4bf28 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -27,7 +27,7 @@ "kernel_addr=0x10\0"\ "fdt_high=0x\0" \ "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ + "kernel_start=0x100\0" \ "kernel_load=0x9600\0" \ "kernel_size=0x280\0" -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/1] armv8: ls1012a: Memory Map modification of kernel, env
-Original Message- From: York Sun Sent: Wednesday, September 06, 2017 9:51 PM To: Bhaskar Upadhaya ; u-boot@lists.denx.de Subject: Re: [PATCH 1/1] armv8: ls1012a: Memory Map modification of kernel,env On 09/01/2017 02:54 AM, Bhaskar Upadhaya wrote: > This patch adjusts memory map for images on LS1012A > as per below memory map: > Image Flash Offset > RCW+PBI 0x > Boot firmware (U-Boot) 0x0010 You are changing "kernel_addr" below. [Bhaskar] Hi York, kernel_addr is not changed, only kernel_start is changed, so please tell does the comment is to change the Commit message or something else. > @@ -97,7 +97,7 @@ > "kernel_addr=0x10\0"\ > "fdt_high=0x\0" \ > "initrd_high=0x\0" \ > - "kernel_start=0xa0\0" \ > + "kernel_start=0x100\0" \ > "kernel_load=0xa000\0" \ > "kernel_size=0x280\0" \ York ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] armv8: ls1012a: Memory Map modification of kernel, env
This patch adjusts memory map for images on LS1012A as per below memory map: Image Flash Offset RCW+PBI 0x Boot firmware (U-Boot) 0x0010 Boot firmware Environment 0x0030 Signed-off-by: Bhaskar Upadhaya --- include/configs/ls1012a_common.h | 4 ++-- include/configs/ls1012afrdm.h| 16 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 9d85341..458a6ad 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -65,7 +65,7 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_ENV_SIZE0x4 /* 256KB */ -#define CONFIG_ENV_OFFSET 0x20/* 2MB */ +#define CONFIG_ENV_OFFSET 0x30/* 3MB */ #define CONFIG_ENV_SECT_SIZE 0x4 #endif @@ -97,7 +97,7 @@ "kernel_addr=0x10\0"\ "fdt_high=0x\0" \ "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ + "kernel_start=0x100\0" \ "kernel_load=0xa000\0" \ "kernel_size=0x280\0" \ diff --git a/include/configs/ls1012afrdm.h b/include/configs/ls1012afrdm.h index 6b1ba57..8a9444d 100644 --- a/include/configs/ls1012afrdm.h +++ b/include/configs/ls1012afrdm.h @@ -22,14 +22,14 @@ #undef CONFIG_EXTRA_ENV_SETTINGS #define CONFIG_EXTRA_ENV_SETTINGS \ - "verify=no\0" \ - "loadaddr=0x8010\0" \ - "kernel_addr=0x10\0"\ - "fdt_high=0x\0" \ - "initrd_high=0x\0" \ - "kernel_start=0xa0\0" \ - "kernel_load=0x9600\0" \ - "kernel_size=0x280\0" + "verify=no\0" \ + "loadaddr=0x8010\0" \ + "kernel_addr=0x10\0"\ + "fdt_high=0x\0" \ + "initrd_high=0x\0" \ + "kernel_start=0x100\0" \ + "kernel_load=0x9600\0" \ + "kernel_size=0x280\0" /* * USB -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot