[PATCH v5 00/11] led: introduce LED boot and activity function
This series is a reworked version of the previous seried: misc: introduce STATUS LED activity function This series port and expand the legacy concept of LED boot from the legacy Status LED API to new LED API. One thing that many device need is a way to communicate to the user that the device is actually doing something. This is especially useful for recovery steps where an user (for example) insert an USB drive, keep a button pressed and the device autorecover. There is currently no way to signal the user externally that the bootloader is processing/recoverying aside from setting a LED on. A solid LED on is not enough and won't actually signal any kind of progress. Solution is the good old blinking LED but uboot doesn't suggest (and support) interrupts and almost all the LED are usually GPIO LED that doesn't support HW blink. Additional Kconfg are also introduced to set the LED boot and activity. Those are referenced by label. A documentation for old and these new LED API is created. (world tested with the azure pipeline) Changes v5: - Use led_get_by_label and don't cache led dev - Improve Kconfig for /options location - Add Reviewed-by tags - Enable blink also on MTD read - Drop additional get_state in led_sw_on_state_change from v4 Changes v4: - Drop led_set_state/period_by_label - Switch to /options/u-boot - Rework to cache label and dev in led uclass - Add multiple patch for additional helper - Rework patches to limit ifdef in some place Changes v3: - Switch to /config property Changes v2: - Drop GPIO SW implementation - Add fix for new LED SW BLINK Christian Marangi (11): led: toggle LED on initial SW blink dm: core: implement ofnode_options helpers led: implement LED boot API common: board_r: rework BOOT LED handling led: implement LED activity API tftp: implement support for LED activity mtd: implement support for LED activity ubi: implement support for LED activity doc: introduce led.rst documentation test: dm: Add tests for LED boot and activity test: dm: Expand ofnode options test with new helper arch/sandbox/dts/test.dts | 5 ++ cmd/mtd.c | 9 +++ cmd/ubi.c | 13 ++- common/board_r.c | 28 +-- doc/api/index.rst | 1 + doc/api/led.rst| 10 +++ drivers/core/ofnode.c | 33 drivers/led/Kconfig| 24 ++ drivers/led/led-uclass.c | 162 + drivers/led/led_sw_blink.c | 17 +++- include/dm/ofnode.h| 41 ++ include/led.h | 147 - include/status_led.h | 13 +++ net/net.c | 4 + net/tftp.c | 5 ++ test/dm/led.c | 72 + test/dm/ofnode.c | 9 +++ 17 files changed, 579 insertions(+), 14 deletions(-) create mode 100644 doc/api/led.rst -- 2.45.2
[PATCH v5 06/11] tftp: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal traffic.
Also turn the ACTIVITY LED OFF if a CTRL-C is detected in the main
net loop function.
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
net/net.c | 4
net/tftp.c | 5 +
2 files changed, 9 insertions(+)
diff --git a/net/net.c b/net/net.c
index d9bc9df643f..94bfde43f85 100644
--- a/net/net.c
+++ b/net/net.c
@@ -87,6 +87,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -659,6 +660,9 @@ restart:
/* Invalidate the last protocol */
eth_set_last_protocol(BOOTP);
+ /* Turn off activity LED if triggered */
+ led_activity_off();
+
puts("\nAbort\n");
/* include a debug print as well incase the debug
messages are directed to stderr */
diff --git a/net/tftp.c b/net/tftp.c
index 2e073183d5a..5cb06d2038b 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -192,6 +193,7 @@ static void new_transfer(void)
#ifdef CONFIG_CMD_TFTPPUT
tftp_put_final_block_sent = 0;
#endif
+ led_activity_blink();
}
#ifdef CONFIG_CMD_TFTPPUT
@@ -301,6 +303,9 @@ static void tftp_complete(void)
time_start * 1000, "/s");
}
puts("\ndone\n");
+
+ led_activity_off();
+
if (!tftp_put_active)
efi_set_bootdev("Net", "", tftp_filename,
map_sysmem(tftp_load_addr, 0),
--
2.45.2
[PATCH v5 01/11] led: toggle LED on initial SW blink
We currently init the LED OFF when SW blink is triggered when
on_state_change() is called. This can be problematic for very short
period as the ON/OFF blink might never trigger.
Toggle the LED (ON if OFF, OFF if ON) on initial SW blink to handle this
corner case and better display a LED blink from the user.
Signed-off-by: Christian Marangi
---
drivers/led/led_sw_blink.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
index 9e36edbee47..06a43db340c 100644
--- a/drivers/led/led_sw_blink.c
+++ b/drivers/led/led_sw_blink.c
@@ -103,8 +103,21 @@ bool led_sw_on_state_change(struct udevice *dev, enum
led_state_t state)
return false;
if (state == LEDST_BLINK) {
- /* start blinking on next led_sw_blink() call */
- sw_blink->state = LED_SW_BLINK_ST_OFF;
+ struct led_ops *ops = led_get_ops(dev);
+
+ /*
+* toggle LED initially and start blinking on next
+* led_sw_blink() call.
+*/
+ switch (ops->get_state(dev)) {
+ case LEDST_ON:
+ ops->set_state(dev, LEDST_OFF);
+ sw_blink->state = LED_SW_BLINK_ST_OFF;
+ default:
+ ops->set_state(dev, LEDST_ON);
+ sw_blink->state = LED_SW_BLINK_ST_ON;
+ }
+
return true;
}
--
2.45.2
[PATCH v5 08/11] ubi: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal ubi write operation.
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
cmd/ubi.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 0e62e449327..56d7da82629 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -488,10 +489,18 @@ exit:
int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t size)
{
+ int ret;
+
+ led_activity_blink();
+
if (!offset)
- return ubi_volume_begin_write(volume, buf, size, size);
+ ret = ubi_volume_begin_write(volume, buf, size, size);
+ else
+ ret = ubi_volume_offset_write(volume, buf, offset, size);
- return ubi_volume_offset_write(volume, buf, offset, size);
+ led_activity_off();
+
+ return ret;
}
int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size)
--
2.45.2
[PATCH v5 10/11] test: dm: Add tests for LED boot and activity
Add tests for LED boot and activity feature and add required property in
sandbox test DTS.
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
arch/sandbox/dts/test.dts | 2 ++
test/dm/led.c | 72 +++
2 files changed, 74 insertions(+)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 5fb5eac862e..25859ad852d 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -101,6 +101,8 @@
bootscr-ram-offset = /bits/ 64 <0x12345678>;
bootscr-flash-offset = /bits/ 64 <0>;
bootscr-flash-size = /bits/ 64 <0x2000>;
+ boot-led = "sandbox:green";
+ activity-led = "sandbox:red";
};
};
diff --git a/test/dm/led.c b/test/dm/led.c
index c28fa044f45..4b019c71f3a 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -137,3 +137,75 @@ static int dm_test_led_blink(struct unit_test_state *uts)
}
DM_TEST(dm_test_led_blink, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
#endif
+
+/* Test LED boot */
+#ifdef CONFIG_LED_BOOT
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/boot-led is set to "sandbox:green" */
+ ut_assertok(led_get_by_label("sandbox:green", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_boot_on());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_boot_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+
+/* Test LED boot blink fallback */
+#ifndef CONFIG_LED_BLINK
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/boot-led is set to "sandbox:green" */
+ ut_assertok(led_get_by_label("sandbox:green", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_boot_blink());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_boot_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+#endif
+#endif
+
+/* Test LED activity */
+#ifdef CONFIG_LED_ACTIVITY
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/activity-led is set to "sandbox:red" */
+ ut_assertok(led_get_by_label("sandbox:red", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_activity_on());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_activity_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+
+/* Test LED activity blink fallback */
+#ifndef CONFIG_LED_BLINK
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/activity-led is set to "sandbox:red" */
+ ut_assertok(led_get_by_label("sandbox:red", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_activity_blink());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_activity_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+#endif
+#endif
--
2.45.2
[PATCH v5 07/11] mtd: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal mtd operations.
LED activity is implemented HERE and not in the subsystem side to limit
any performance degradation in case multiple call to MTD subsystem read/write
are done.
Signed-off-by: Christian Marangi
---
cmd/mtd.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/cmd/mtd.c b/cmd/mtd.c
index 795aaa2b37d..f178d7bea61 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -10,6 +10,7 @@
#include
#include
+#include
#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
#include
#endif
@@ -558,6 +559,8 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
while (mtd_block_isbad(mtd, off))
off += mtd->erasesize;
+ led_activity_blink();
+
/* Loop over the pages to do the actual read/write */
while (remaining) {
/* Skip the block if it is bad */
@@ -585,6 +588,8 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
io_op.oobbuf += io_op.oobretlen;
}
+ led_activity_off();
+
if (!ret && dump)
mtd_dump_device_buf(mtd, start_off, buf, len, woob);
@@ -652,6 +657,8 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr = off;
erase_op.len = mtd->erasesize;
+ led_activity_blink();
+
while (len) {
if (!scrub) {
ret = mtd_block_isbad(mtd, erase_op.addr);
@@ -680,6 +687,8 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr += mtd->erasesize;
}
+ led_activity_off();
+
if (ret && ret != -EIO)
ret = CMD_RET_FAILURE;
else
--
2.45.2
[PATCH v5 02/11] dm: core: implement ofnode_options helpers
Implement ofnode_options helpers to read options in /options/u-boot to
adapt to the new way to declare options as described in [1].
[1] dtschema/schemas/options/u-boot.yaml
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
drivers/core/ofnode.c | 33 +
include/dm/ofnode.h | 41 +
2 files changed, 74 insertions(+)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 4d563b47a5a..4404c4f4bab 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1734,6 +1734,39 @@ const char *ofnode_conf_read_str(const char *prop_name)
return ofnode_read_string(node, prop_name);
}
+bool ofnode_options_read_bool(const char *prop_name)
+{
+ ofnode uboot;
+
+ uboot = ofnode_path("/options/u-boot");
+ if (!ofnode_valid(uboot))
+ return false;
+
+ return ofnode_read_bool(uboot, prop_name);
+}
+
+int ofnode_options_read_int(const char *prop_name, int default_val)
+{
+ ofnode uboot;
+
+ uboot = ofnode_path("/options/u-boot");
+ if (!ofnode_valid(uboot))
+ return default_val;
+
+ return ofnode_read_u32_default(uboot, prop_name, default_val);
+}
+
+const char *ofnode_options_read_str(const char *prop_name)
+{
+ ofnode uboot;
+
+ uboot = ofnode_path("/options/u-boot");
+ if (!ofnode_valid(uboot))
+ return NULL;
+
+ return ofnode_read_string(uboot, prop_name);
+}
+
int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset)
{
int ret;
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 5795115c490..0787758926f 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1587,6 +1587,47 @@ int ofnode_conf_read_int(const char *prop_name, int
default_val);
*/
const char *ofnode_conf_read_str(const char *prop_name);
+/**
+ * ofnode_options_read_bool() - Read a boolean value from the U-Boot options
+ *
+ * This reads a property from the /options/u-boot/ node of the devicetree.
+ *
+ * This only works with the control FDT.
+ *
+ * See dtschema/schemas/options/u-boot.yaml in dt-schema project for bindings
+ *
+ * @prop_name: property name to look up
+ * Return: true, if it exists, false if not
+ */
+bool ofnode_options_read_bool(const char *prop_name);
+
+/**
+ * ofnode_options_read_int() - Read an integer value from the U-Boot options
+ *
+ * This reads a property from the /options/u-boot/ node of the devicetree.
+ *
+ * See dtschema/schemas/options/u-boot.yaml in dt-schema project for bindings
+ *
+ * @prop_name: property name to look up
+ * @default_val: default value to return if the property is not found
+ * Return: integer value, if found, or @default_val if not
+ */
+int ofnode_options_read_int(const char *prop_name, int default_val);
+
+/**
+ * ofnode_options_read_str() - Read a string value from the U-Boot options
+ *
+ * This reads a property from the /options/u-boot/ node of the devicetree.
+ *
+ * This only works with the control FDT.
+ *
+ * See dtschema/schemas/options/u-boot.yaml in dt-schema project for bindings
+ *
+ * @prop_name: property name to look up
+ * Return: string value, if found, or NULL if not
+ */
+const char *ofnode_options_read_str(const char *prop_name);
+
/**
* ofnode_read_bootscript_address() - Read bootscr-address or
bootscr-ram-offset
*
--
2.45.2
[PATCH v5 04/11] common: board_r: rework BOOT LED handling
Rework BOOT LED handling. There is currently one legacy implementation
for BOOT LED from Status Led API.
This work on ancient implementation used by BOOTP by setting the LED
to Blink on boot and to turn it OFF when the firmware was correctly
received by network.
Now that we new LED implementation have support for LED boot, rework
this by also set the new BOOT LED to blink and also set it to ON before
entering main loop to confirm successful boot.
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
common/board_r.c | 28
include/status_led.h | 13 +
2 files changed, 33 insertions(+), 8 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index d4ba245ac69..c3f8dd5d4ee 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -459,17 +460,28 @@ static int initr_malloc_bootparams(void)
}
#endif
-#if defined(CONFIG_LED_STATUS)
static int initr_status_led(void)
{
-#if defined(CONFIG_LED_STATUS_BOOT)
- status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
-#else
status_led_init();
-#endif
+
+ return 0;
+}
+
+static int initr_boot_led_blink(void)
+{
+ status_led_boot_blink();
+
+ led_boot_blink();
+
+ return 0;
+}
+
+static int initr_boot_led_on(void)
+{
+ led_boot_on();
+
return 0;
}
-#endif
#ifdef CONFIG_CMD_NET
static int initr_net(void)
@@ -713,9 +725,8 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
timer_init, /* initialize timer */
#endif
-#if defined(CONFIG_LED_STATUS)
initr_status_led,
-#endif
+ initr_boot_led_blink,
/* PPC has a udelay(20) here dating from 2002. Why? */
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
@@ -738,6 +749,7 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CFG_PRAM)
initr_mem,
#endif
+ initr_boot_led_on,
run_main_loop,
};
diff --git a/include/status_led.h b/include/status_led.h
index 6707ab1d29d..1282022253e 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -39,6 +39,13 @@ void status_led_init(void);
void status_led_tick(unsigned long timestamp);
void status_led_set(int led, int state);
+static inline void status_led_boot_blink(void)
+{
+#ifdef CONFIG_LED_STATUS_BOOT_ENABLE
+ status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
+#endif
+}
+
/* MVS v1 **/
#if (defined(CONFIG_MVS) && CONFIG_MVS < 2)
# define STATUS_LED_PARim_ioport.iop_pdpar
@@ -72,6 +79,12 @@ void __led_blink(led_id_t mask, int freq);
# include
#endif
+#else
+
+static inline void status_led_init(void) { }
+static inline void status_led_set(int led, int state) { }
+static inline void status_led_boot_blink(void) { }
+
#endif /* CONFIG_LED_STATUS*/
/*
--
2.45.2
[PATCH v5 11/11] test: dm: Expand ofnode options test with new helper
Expand ofnode options test with new generic helper for bool, int and
string.
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
arch/sandbox/dts/test.dts | 3 +++
test/dm/ofnode.c | 9 +
2 files changed, 12 insertions(+)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 25859ad852d..e5381b56da4 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -103,6 +103,9 @@
bootscr-flash-size = /bits/ 64 <0x2000>;
boot-led = "sandbox:green";
activity-led = "sandbox:red";
+ testing-bool;
+ testing-int = <123>;
+ testing-str = "testing";
};
};
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 39191d7f52b..7c0adcd596b 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -614,6 +614,15 @@ static int dm_test_ofnode_options(struct unit_test_state
*uts)
u64 bootscr_address, bootscr_offset;
u64 bootscr_flash_offset, bootscr_flash_size;
+ ut_assert(!ofnode_options_read_bool("missing"));
+ ut_assert(ofnode_options_read_bool("testing-bool"));
+
+ ut_asserteq(123, ofnode_options_read_int("testing-int", 0));
+ ut_asserteq(6, ofnode_options_read_int("missing", 6));
+
+ ut_assertnull(ofnode_options_read_str("missing"));
+ ut_asserteq_str("testing", ofnode_options_read_str("testing-str"));
+
ut_assertok(ofnode_read_bootscript_address(&bootscr_address,
&bootscr_offset));
ut_asserteq_64(0, bootscr_address);
--
2.45.2
[PATCH v5 09/11] doc: introduce led.rst documentation
Introduce simple led.rst documentation to document all the additional
Kconfig and the current limitation of LED_BLINK and GPIO software blink.
Also add missing definition for sw_blink in led_uc_plat struct.
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
doc/api/index.rst | 1 +
doc/api/led.rst | 10 ++
include/led.h | 41 +
3 files changed, 52 insertions(+)
create mode 100644 doc/api/led.rst
diff --git a/doc/api/index.rst b/doc/api/index.rst
index ec0b8adb2cf..9f7f23f868f 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -14,6 +14,7 @@ U-Boot API documentation
event
getopt
interrupt
+ led
linker_lists
lmb
logging
diff --git a/doc/api/led.rst b/doc/api/led.rst
new file mode 100644
index 000..e52e350d1bb
--- /dev/null
+++ b/doc/api/led.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LED
+===
+
+.. kernel-doc:: include/led.h
+ :doc: Overview
+
+.. kernel-doc:: include/led.h
+ :internal:
\ No newline at end of file
diff --git a/include/led.h b/include/led.h
index 19d92d6441a..64247cd3a70 100644
--- a/include/led.h
+++ b/include/led.h
@@ -11,6 +11,46 @@
#include
#include
+/**
+ * DOC: Overview
+ *
+ * Generic LED API provided when a supported compatible is defined in
DeviceTree.
+ *
+ * To enable support for LEDs, enable the `CONFIG_LED` Kconfig option.
+ *
+ * The most common implementation is for GPIO-connected LEDs. If using
GPIO-connected LEDs,
+ * enable the `LED_GPIO` Kconfig option.
+ *
+ * `LED_BLINK` support requires LED driver support and is therefore optional.
If LED blink
+ * functionality is needed, enable the `LED_BLINK` Kconfig option. If LED
driver doesn't
+ * support HW Blink, SW Blink can be used with the Cyclic framework by
enabling the
+ * CONFIG_LED_SW_BLINK.
+ *
+ * Boot and Activity LEDs are also supported. These LEDs can signal various
system operations
+ * during runtime, such as boot initialization, file transfers, and flash
write/erase operations.
+ *
+ * To enable a Boot LED, enable `CONFIG_LED_BOOT` and define in
`/options/u-boot` root node the
+ * property `boot-led`. This will enable the specified LED to blink and turn
ON when
+ * the bootloader initializes correctly.
+ *
+ * To enable an Activity LED, enable `CONFIG_LED_ACTIVITY` and define in
`/options/u-boot` root
+ * node the property `activity-led`.
+ * This will enable the specified LED to blink and turn ON during file
transfers or flash
+ * write/erase operations.
+ *
+ * Both Boot and Activity LEDs provide a simple API to turn the LED ON or OFF:
+ * `led_boot_on()`, `led_boot_off()`, `led_activity_on()`, and
`led_activity_off()`.
+ *
+ * Both configurations can optionally define a `boot/activity-led-period`
property
+ * if `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled for LED blink
operations, which
+ * is usually used by the Activity LED. If not defined the default value of
250 (ms) is used.
+ *
+ * When `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled, additional
APIs are exposed:
+ * `led_boot_blink()` and `led_activity_blink()`. Note that if
`CONFIG_LED_BLINK` or
+ * `CONFIG_LED_SW_BLINK` is disabled, these APIs will behave like the
`led_boot_on()` and
+ * `led_activity_on()` APIs, respectively.
+ */
+
struct udevice;
enum led_state_t {
@@ -41,6 +81,7 @@ struct led_sw_blink {
*
* @label: LED label
* @default_state: LED default state
+ * @sw_blink: LED software blink struct
*/
struct led_uc_plat {
const char *label;
--
2.45.2
[PATCH v5 03/11] led: implement LED boot API
Implement LED boot API to signal correct boot of the system.
led_boot_on/off/blink() are introduced to turn ON, OFF and BLINK the
designated boot LED.
New Kconfig is introduced, CONFIG_LED_BOOT to enable the feature.
This makes use of the /options/u-boot property "boot-led" to the
define the boot LED.
It's also introduced a new /options/u-boot property "boot-led-period"
to define the default period when the LED is set to blink mode.
If "boot-led-period" is not defined, the value of 250 (ms) is
used by default.
If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
led_boot_blink call will fallback to simple LED ON.
To cache the data we repurpose the now unused led_uc_priv for storage of
global LED uclass info.
Signed-off-by: Christian Marangi
---
drivers/led/Kconfig | 11 ++
drivers/led/led-uclass.c | 85
include/led.h| 55 +-
3 files changed, 149 insertions(+), 2 deletions(-)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index bee74b25751..59b007a7ef5 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -9,6 +9,17 @@ config LED
can provide access to board-specific LEDs. Use of the device tree
for configuration is encouraged.
+config LED_BOOT
+ bool "Enable LED boot support"
+ help
+ Enable LED boot support.
+
+ LED boot is a specific LED assigned to signal boot operation status.
+ Defined in Device Tree /options/u-boot node. Refer here for the
supported
+ options [1].
+
+ [1] dtschema/schemas/options/u-boot.yaml
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 199d68bc25a..54113213dcf 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -94,6 +94,75 @@ int led_set_period(struct udevice *dev, int period_ms)
return -ENOSYS;
}
+#ifdef CONFIG_LED_BOOT
+static int led_boot_get(struct udevice **devp, int *period_ms)
+{
+ struct led_uc_priv *priv;
+ struct uclass *uc;
+ int ret;
+
+ ret = uclass_get(UCLASS_LED, &uc);
+ if (ret)
+ return ret;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->boot_led_label)
+ return -ENOENT;
+
+ if (period_ms)
+ *period_ms = priv->boot_led_period;
+
+ return led_get_by_label(priv->boot_led_label, devp);
+}
+
+int led_boot_on(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_boot_get(&dev, NULL);
+ if (ret)
+ return ret;
+
+ return led_set_state(dev, LEDST_ON);
+}
+
+int led_boot_off(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_boot_get(&dev, NULL);
+ if (ret)
+ return ret;
+
+ return led_set_state(dev, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+int led_boot_blink(void)
+{
+ struct udevice *dev;
+ int period_ms, ret;
+
+ ret = led_boot_get(&dev, &period_ms);
+ if (ret)
+ return ret;
+
+ ret = led_set_period(dev, period_ms);
+ if (ret) {
+ if (ret != -ENOSYS)
+ return ret;
+
+ /* fallback to ON with no set_period and no SW_BLINK */
+ return led_set_state(dev, LEDST_ON);
+ }
+
+ return led_set_state(dev, LEDST_BLINK);
+}
+#endif
+#endif
+
static int led_post_bind(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -158,10 +227,26 @@ static int led_post_probe(struct udevice *dev)
return ret;
}
+#ifdef CONFIG_LED_BOOT
+static int led_init(struct uclass *uc)
+{
+ struct led_uc_priv *priv = uclass_get_priv(uc);
+
+ priv->boot_led_label = ofnode_options_read_str("boot-led");
+ priv->boot_led_period = ofnode_options_read_int("boot-led-period", 250);
+
+ return 0;
+}
+#endif
+
UCLASS_DRIVER(led) = {
.id = UCLASS_LED,
.name = "led",
.per_device_plat_auto = sizeof(struct led_uc_plat),
.post_bind = led_post_bind,
.post_probe = led_post_probe,
+#ifdef CONFIG_LED_BOOT
+ .init = led_init,
+ .priv_auto = sizeof(struct led_uc_priv),
+#endif
};
diff --git a/include/led.h b/include/led.h
index 99f93c5ef86..49ec2998a33 100644
--- a/include/led.h
+++ b/include/led.h
@@ -9,6 +9,7 @@
#include
#include
+#include
struct udevice;
@@ -52,10 +53,15 @@ struct led_uc_plat {
/**
* struct led_uc_priv - Private data the uclass stores about each device
*
- * @period_ms: Flash period in milliseconds
+ * @boot_led_label:Boot LED label
+ * @boot_led_dev: Boot LED dev
+ * @boot_led_period: Bo
[PATCH v5 05/11] led: implement LED activity API
Implement LED activity API similar to BOOT LED API.
Usual activity might be a file transfer with TFTP, a flash write...
User of this API will call led_activity_on/off/blink() to signal these
kind of activity.
New Kconfig is implemented similar to BOOT LED, LED_ACTIVITY to
enable support for it.
It's introduced a new /options/u-boot property "activity-led" and
"activity-led-period" to define the activity LED label and the
default period when the activity LED is set to blink mode.
If "activity-led-period" is not defined, the value of 250 (ms) is
used by default.
If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
led_boot_blink call will fallback to simple LED ON.
Signed-off-by: Christian Marangi
---
drivers/led/Kconfig | 13 +++
drivers/led/led-uclass.c | 81 +++-
include/led.h| 51 +
3 files changed, 143 insertions(+), 2 deletions(-)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 59b007a7ef5..c98cbf92fab 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -20,6 +20,19 @@ config LED_BOOT
[1] dtschema/schemas/options/u-boot.yaml
+config LED_ACTIVITY
+ bool "Enable LED activity support"
+ help
+ Enable LED activity support.
+
+ LED activity is a specific LED assigned to signal activity operation
+ like file trasnfer, flash write/erase...
+
+ Defined in Device Tree /options/u-boot node. Refer here for the
supported
+ options [1].
+
+ [1] dtschema/schemas/options/u-boot.yaml
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 54113213dcf..05e09909b7d 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -163,6 +163,75 @@ int led_boot_blink(void)
#endif
#endif
+#ifdef CONFIG_LED_ACTIVITY
+static int led_activity_get(struct udevice **devp, int *period_ms)
+{
+ struct led_uc_priv *priv;
+ struct uclass *uc;
+ int ret;
+
+ ret = uclass_get(UCLASS_LED, &uc);
+ if (ret)
+ return ret;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->activity_led_label)
+ return -ENOENT;
+
+ if (period_ms)
+ *period_ms = priv->activity_led_period;
+
+ return led_get_by_label(priv->activity_led_label, devp);
+}
+
+int led_activity_on(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_activity_get(&dev, NULL);
+ if (ret)
+ return ret;
+
+ return led_set_state(dev, LEDST_ON);
+}
+
+int led_activity_off(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_activity_get(&dev, NULL);
+ if (ret)
+ return ret;
+
+ return led_set_state(dev, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+int led_activity_blink(void)
+{
+ struct udevice *dev;
+ int period_ms, ret;
+
+ ret = led_activity_get(&dev, &period_ms);
+ if (ret)
+ return ret;
+
+ ret = led_set_period(dev, period_ms);
+ if (ret) {
+ if (ret != -ENOSYS)
+ return ret;
+
+ /* fallback to ON with no set_period and no SW_BLINK */
+ return led_set_state(dev, LEDST_ON);
+ }
+
+ return led_set_state(dev, LEDST_BLINK);
+}
+#endif
+#endif
+
static int led_post_bind(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@@ -227,13 +296,21 @@ static int led_post_probe(struct udevice *dev)
return ret;
}
-#ifdef CONFIG_LED_BOOT
+#if defined(CONFIG_LED_BOOT) || defined(CONFIG_LED_ACTIVITY)
static int led_init(struct uclass *uc)
{
struct led_uc_priv *priv = uclass_get_priv(uc);
+#ifdef CONFIG_LED_BOOT
priv->boot_led_label = ofnode_options_read_str("boot-led");
priv->boot_led_period = ofnode_options_read_int("boot-led-period", 250);
+#endif
+
+#ifdef CONFIG_LED_ACTIVITY
+ priv->activity_led_label = ofnode_options_read_str("activity-led");
+ priv->activity_led_period =
ofnode_options_read_int("activity-led-period",
+ 250);
+#endif
return 0;
}
@@ -245,7 +322,7 @@ UCLASS_DRIVER(led) = {
.per_device_plat_auto = sizeof(struct led_uc_plat),
.post_bind = led_post_bind,
.post_probe = led_post_probe,
-#ifdef CONFIG_LED_BOOT
+#if defined(CONFIG_LED_BOOT) || defined(CONFIG_LED_ACTIVITY)
.init = led_init,
.priv_auto = sizeof(struct led_uc_priv),
#endif
diff --git a/include/led.h b/include/led.h
index 49ec2998a33..19d92d6441a 100644
--- a/include/led.h
+++ b/include/led.h
@@ -54,14 +54
Re: [PATCH v4 03/11] led: implement LED boot API
On Thu, Sep 26, 2024 at 11:33:18PM +0200, Simon Glass wrote:
> Hi Christian,
>
> On Sat, 21 Sept 2024 at 00:51, Christian Marangi wrote:
> >
> > Implement LED boot API to signal correct boot of the system.
> >
> > led_boot_on/off/blink() are introduced to turn ON, OFF and BLINK the
> > designated boot LED.
> >
> > New Kconfig is introduced, CONFIG_LED_BOOT to enable the feature.
> > This makes use of the /options/u-boot property "boot-led" to the
> > define the boot LED.
> > It's also introduced a new /options/u-boot property "boot-led-period"
> > to define the default period when the LED is set to blink mode.
> >
> > If "boot-led-period" is not defined, the value of 250 (ms) is
> > used by default.
> >
> > If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
> > led_boot_blink call will fallback to simple LED ON.
> >
> > To cache the data we repurpose the now unused led_uc_priv for storage of
> > global LED uclass info.
>
> Some things to tweak below
>
Hi, thanks for the review. I asked some clarification, thanks for any
comments.
> >
> > Signed-off-by: Christian Marangi
> > ---
> > drivers/led/Kconfig | 7 +++
> > drivers/led/led-uclass.c | 100 +++
> > include/led.h| 56 +-
> > 3 files changed, 161 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
> > index bee74b25751..6149cfa02b8 100644
> > --- a/drivers/led/Kconfig
> > +++ b/drivers/led/Kconfig
> > @@ -9,6 +9,13 @@ config LED
> > can provide access to board-specific LEDs. Use of the device tree
> > for configuration is encouraged.
> >
> > +config LED_BOOT
> > + bool "Enable LED boot support"
> > + help
> > + Enable LED boot support.
> > +
> > + LED boot is a specific LED assigned to signal boot operation
> > status.
>
> Here you should link to the /options binding in
> doc/device-tree-bindings/options, perhaps
>
Ok.
> > +
> > config LED_BCM6328
> > bool "LED Support for BCM6328"
> > depends on LED && ARCH_BMIPS
> > diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
> > index 199d68bc25a..c5b560982b0 100644
> > --- a/drivers/led/led-uclass.c
> > +++ b/drivers/led/led-uclass.c
> > @@ -94,17 +94,101 @@ int led_set_period(struct udevice *dev, int period_ms)
> > return -ENOSYS;
> > }
> >
> > +#ifdef CONFIG_LED_BOOT
> > +int led_boot_on(void)
> > +{
> > + struct uclass *uc = uclass_find(UCLASS_LED);
> > + struct led_uc_priv *priv;
> > + struct udevice *dev;
> > +
> > + if (!uc)
> > + return -ENOENT;
> > +
>
> The normal way is:
>
> ret = uclass_first_device_ret(UCLASS_LED, &dev);
> if (ret)
>return ret;
>
> > + priv = uclass_get_priv(uc);
> > + if (!priv->boot_led_dev ||
> > + uclass_get_device_tail(priv->boot_led_dev, 0, &dev)) {
>
> That is an internal function...I suppose it should really have an
> underscore and be in uclass-internal.h
>
> But if you are looking for boot_led_label, don't you need to search
> through the LEDs to find it? Or use led_get_by_label() ?
>
Idea here and up is to cache the dev on bind to prevent
useless/additional loop on search in each UCLASS LED the boot LED.
uclass_get_device_tail is needed to actually trigger probe of the LED if
it hasn't been done prev.
The uclass_get_priv is followed by the rkmtd_get_cur_dev()
implementation, for the sake of getting the UCLASS alone it seems too
much to have all the additional operation to get the first device.
Also considering uclass_get_device_tail is also used by get_by_label I
assume it's ok to also use it here.
Should I ignore caching the dev and just search for the boot LED from
label everytime out of simplicity?
> > + printf("Failed to get boot LED %s\n",
> > + priv->boot_led_label);
> > + return -EINVAL;
> > + }
> > +
> > + return led_set_state(dev, LEDST_ON);
> > +}
> > +
> > +int led_boot_off(void)
> > +{
> > + struct uclass *uc = uclass_find(UCLASS_LED);
> > + struct led_uc_priv *priv;
> > + struct udevice *dev;
> > +
> > + if (!uc)
> > + return -ENOENT;
> > +
>
> Same here.
>
> > + p
Re: [PATCH v4 01/11] led: toggle LED on initial SW blink
On Sat, Sep 21, 2024 at 01:14:36PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi
>
> On Sat, Sep 21, 2024 at 12:51 AM Christian Marangi
> wrote:
> >
> > We currently init the LED OFF when SW blink is triggered when
> > on_state_change() is called. This can be problematic for very short
> > period as the ON/OFF blink might never trigger.
> >
> > Toggle the LED (ON if OFF, OFF if ON) on initial SW blink to handle this
> > corner case and better display a LED blink from the user.
> >
> > Signed-off-by: Christian Marangi
> > Reviewed-by: Simon Glass
> > ---
> > drivers/led/led_sw_blink.c | 10 +-
> > 1 file changed, 9 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
> > index 9e36edbee47..9d9820720c6 100644
> > --- a/drivers/led/led_sw_blink.c
> > +++ b/drivers/led/led_sw_blink.c
> > @@ -103,8 +103,16 @@ bool led_sw_on_state_change(struct udevice *dev, enum
> > led_state_t state)
> > return false;
> >
> > if (state == LEDST_BLINK) {
> > + struct led_ops *ops = led_get_ops(dev);
> > + enum led_state_t curr_state = led_get_state(dev);
> > +
> > + curr_state = ops->get_state(dev);
>
>
> The led_get_state return curr_state. You need to use a) led_set/get
> state or them from ops
>
> if (state == LEDST_BLINK) {
> const struct led_ops *ops = led_get_ops(dev);
> enum led_state_t curr_state = ops->get_state(dev);
> enun led_state_t next_state;
>
> switch (curr_state) {
> case LEDST_ON:
> sw_blink->state = LED_SW_BLINK_ST_OFF;
> next_state = LEDST_OFF;
>break;
> case LEDST_OFF:
> sw_blink->state = LED_SW_BLINK_ST_ON;
> next_state = LEDST_ON;
> break;
> }
>
> ops->set_state(dev, next_state);
> return true;
> }
>
Hi,
I'm not following how this is different than the proposed code...
Is this a suggestion to make it more readable, I'm a bit confused.
>
> > + /* toggle led initially */
> > + ops->set_state(dev, curr_state == LEDST_ON ? LEDST_OFF :
> > + LEDST_ON);
> > /* start blinking on next led_sw_blink() call */
> > - sw_blink->state = LED_SW_BLINK_ST_OFF;
> > + sw_blink->state = curr_state == LEDST_ON ?
> > LED_SW_BLINK_ST_OFF :
> > + LED_SW_BLINK_ST_ON;
>
>
> > return true;
> > }
> >
> > --
> > 2.45.2
> >
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> mich...@amarulasolutions.com
> __
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> i...@amarulasolutions.com
> www.amarulasolutions.com
--
Ansuel
Re: [PATCH v4 07/11] mtd: implement support for LED activity
On Sat, Sep 21, 2024 at 12:13:34PM +0200, Miquel Raynal wrote: > Hi Christian, > > ansuels...@gmail.com wrote on Sat, 21 Sep 2024 00:50:00 +0200: > > > Implement support for LED activity. If the feature is enabled, > > make the defined ACTIVITY LED to signal mtd write or erase operations. > > I'm curious, why did you not consider reads in your proposal? I think > in general as long as you use a device the LED should blink. While > you're performing a read you cannot do anything else with the chip so I > would definitely consider the read path as well. > > Also, I would expect the blinking to continue when the device is > accessed, no matter who is asking for it. So for instance when I load > my kernel into RAM, I believe it should blink. Hence, why not > considering the mtd layer rather than the command .c file? > My idea for the feature was really for recovery and flashing usage, soo everything that is initiated by the user or that does change thing. Example a button trigger an automatic recovery procedure from an attached USB drive. Having the LED blink signal the user the procedure is actually working and something is happening. But yes yours is not a bad idea, I don't think it would make a recovery procedure confusing, lets see if others agree on that ok? > > > > Signed-off-by: Christian Marangi > > --- > > cmd/mtd.c | 11 +++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/cmd/mtd.c b/cmd/mtd.c > > index 795aaa2b37d..dae90b0e6e4 100644 > > --- a/cmd/mtd.c > > +++ b/cmd/mtd.c > > Thanks, > Miquèl -- Ansuel
[PATCH v4 11/11] test: dm: Expand ofnode options test with new helper
Expand ofnode options test with new generic helper for bool, int and
string.
Signed-off-by: Christian Marangi
---
arch/sandbox/dts/test.dts | 3 +++
test/dm/ofnode.c | 9 +
2 files changed, 12 insertions(+)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 25859ad852d..e5381b56da4 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -103,6 +103,9 @@
bootscr-flash-size = /bits/ 64 <0x2000>;
boot-led = "sandbox:green";
activity-led = "sandbox:red";
+ testing-bool;
+ testing-int = <123>;
+ testing-str = "testing";
};
};
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 39191d7f52b..7c0adcd596b 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -614,6 +614,15 @@ static int dm_test_ofnode_options(struct unit_test_state
*uts)
u64 bootscr_address, bootscr_offset;
u64 bootscr_flash_offset, bootscr_flash_size;
+ ut_assert(!ofnode_options_read_bool("missing"));
+ ut_assert(ofnode_options_read_bool("testing-bool"));
+
+ ut_asserteq(123, ofnode_options_read_int("testing-int", 0));
+ ut_asserteq(6, ofnode_options_read_int("missing", 6));
+
+ ut_assertnull(ofnode_options_read_str("missing"));
+ ut_asserteq_str("testing", ofnode_options_read_str("testing-str"));
+
ut_assertok(ofnode_read_bootscript_address(&bootscr_address,
&bootscr_offset));
ut_asserteq_64(0, bootscr_address);
--
2.45.2
[PATCH v4 10/11] test: dm: Add tests for LED boot and activity
Add tests for LED boot and activity feature and add required property in
sandbox test DTS.
Signed-off-by: Christian Marangi
---
arch/sandbox/dts/test.dts | 2 ++
test/dm/led.c | 72 +++
2 files changed, 74 insertions(+)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 5fb5eac862e..25859ad852d 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -101,6 +101,8 @@
bootscr-ram-offset = /bits/ 64 <0x12345678>;
bootscr-flash-offset = /bits/ 64 <0>;
bootscr-flash-size = /bits/ 64 <0x2000>;
+ boot-led = "sandbox:green";
+ activity-led = "sandbox:red";
};
};
diff --git a/test/dm/led.c b/test/dm/led.c
index c28fa044f45..4b019c71f3a 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -137,3 +137,75 @@ static int dm_test_led_blink(struct unit_test_state *uts)
}
DM_TEST(dm_test_led_blink, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
#endif
+
+/* Test LED boot */
+#ifdef CONFIG_LED_BOOT
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/boot-led is set to "sandbox:green" */
+ ut_assertok(led_get_by_label("sandbox:green", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_boot_on());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_boot_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+
+/* Test LED boot blink fallback */
+#ifndef CONFIG_LED_BLINK
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/boot-led is set to "sandbox:green" */
+ ut_assertok(led_get_by_label("sandbox:green", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_boot_blink());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_boot_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+#endif
+#endif
+
+/* Test LED activity */
+#ifdef CONFIG_LED_ACTIVITY
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/activity-led is set to "sandbox:red" */
+ ut_assertok(led_get_by_label("sandbox:red", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_activity_on());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_activity_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+
+/* Test LED activity blink fallback */
+#ifndef CONFIG_LED_BLINK
+static int dm_test_led_boot(struct unit_test_state *uts)
+{
+ struct udevice *dev
+
+ /* options/u-boot/activity-led is set to "sandbox:red" */
+ ut_assertok(led_get_by_label("sandbox:red", &dev));
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+ ut_assertok(led_activity_blink());
+ ut_asserteq(LEDST_ON, led_get_state(dev));
+ ut_assertok(led_activity_off());
+ ut_asserteq(LEDST_OFF, led_get_state(dev));
+
+ return 0;
+}
+#endif
+#endif
--
2.45.2
[PATCH v4 09/11] doc: introduce led.rst documentation
Introduce simple led.rst documentation to document all the additional
Kconfig and the current limitation of LED_BLINK and GPIO software blink.
Also add missing definition for sw_blink in led_uc_plat struct.
Signed-off-by: Christian Marangi
---
doc/api/index.rst | 1 +
doc/api/led.rst | 10 ++
include/led.h | 41 +
3 files changed, 52 insertions(+)
create mode 100644 doc/api/led.rst
diff --git a/doc/api/index.rst b/doc/api/index.rst
index ec0b8adb2cf..9f7f23f868f 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -14,6 +14,7 @@ U-Boot API documentation
event
getopt
interrupt
+ led
linker_lists
lmb
logging
diff --git a/doc/api/led.rst b/doc/api/led.rst
new file mode 100644
index 000..e52e350d1bb
--- /dev/null
+++ b/doc/api/led.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LED
+===
+
+.. kernel-doc:: include/led.h
+ :doc: Overview
+
+.. kernel-doc:: include/led.h
+ :internal:
\ No newline at end of file
diff --git a/include/led.h b/include/led.h
index bba8c0009ca..a9dd55efd1f 100644
--- a/include/led.h
+++ b/include/led.h
@@ -11,6 +11,46 @@
#include
#include
+/**
+ * DOC: Overview
+ *
+ * Generic LED API provided when a supported compatible is defined in
DeviceTree.
+ *
+ * To enable support for LEDs, enable the `CONFIG_LED` Kconfig option.
+ *
+ * The most common implementation is for GPIO-connected LEDs. If using
GPIO-connected LEDs,
+ * enable the `LED_GPIO` Kconfig option.
+ *
+ * `LED_BLINK` support requires LED driver support and is therefore optional.
If LED blink
+ * functionality is needed, enable the `LED_BLINK` Kconfig option. If LED
driver doesn't
+ * support HW Blink, SW Blink can be used with the Cyclic framework by
enabling the
+ * CONFIG_LED_SW_BLINK.
+ *
+ * Boot and Activity LEDs are also supported. These LEDs can signal various
system operations
+ * during runtime, such as boot initialization, file transfers, and flash
write/erase operations.
+ *
+ * To enable a Boot LED, enable `CONFIG_LED_BOOT` and define in
`/options/u-boot` root node the
+ * property `boot-led`. This will enable the specified LED to blink and turn
ON when
+ * the bootloader initializes correctly.
+ *
+ * To enable an Activity LED, enable `CONFIG_LED_ACTIVITY` and define in
`/options/u-boot` root
+ * node the property `activity-led`.
+ * This will enable the specified LED to blink and turn ON during file
transfers or flash
+ * write/erase operations.
+ *
+ * Both Boot and Activity LEDs provide a simple API to turn the LED ON or OFF:
+ * `led_boot_on()`, `led_boot_off()`, `led_activity_on()`, and
`led_activity_off()`.
+ *
+ * Both configurations can optionally define a `boot/activity-led-period`
property
+ * if `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled for LED blink
operations, which
+ * is usually used by the Activity LED. If not defined the default value of
250 (ms) is used.
+ *
+ * When `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled, additional
APIs are exposed:
+ * `led_boot_blink()` and `led_activity_blink()`. Note that if
`CONFIG_LED_BLINK` or
+ * `CONFIG_LED_SW_BLINK` is disabled, these APIs will behave like the
`led_boot_on()` and
+ * `led_activity_on()` APIs, respectively.
+ */
+
struct udevice;
enum led_state_t {
@@ -41,6 +81,7 @@ struct led_sw_blink {
*
* @label: LED label
* @default_state: LED default state
+ * @sw_blink: LED software blink struct
*/
struct led_uc_plat {
const char *label;
--
2.45.2
[PATCH v4 08/11] ubi: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal ubi write operation.
Signed-off-by: Christian Marangi
---
cmd/ubi.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 0e62e449327..56d7da82629 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -488,10 +489,18 @@ exit:
int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t size)
{
+ int ret;
+
+ led_activity_blink();
+
if (!offset)
- return ubi_volume_begin_write(volume, buf, size, size);
+ ret = ubi_volume_begin_write(volume, buf, size, size);
+ else
+ ret = ubi_volume_offset_write(volume, buf, offset, size);
- return ubi_volume_offset_write(volume, buf, offset, size);
+ led_activity_off();
+
+ return ret;
}
int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size)
--
2.45.2
[PATCH v4 07/11] mtd: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal mtd write or erase operations.
Signed-off-by: Christian Marangi
---
cmd/mtd.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/cmd/mtd.c b/cmd/mtd.c
index 795aaa2b37d..dae90b0e6e4 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -10,6 +10,7 @@
#include
#include
+#include
#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
#include
#endif
@@ -558,6 +559,9 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
while (mtd_block_isbad(mtd, off))
off += mtd->erasesize;
+ if (!read)
+ led_activity_blink();
+
/* Loop over the pages to do the actual read/write */
while (remaining) {
/* Skip the block if it is bad */
@@ -585,6 +589,9 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
io_op.oobbuf += io_op.oobretlen;
}
+ if (!read)
+ led_activity_off();
+
if (!ret && dump)
mtd_dump_device_buf(mtd, start_off, buf, len, woob);
@@ -652,6 +659,8 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr = off;
erase_op.len = mtd->erasesize;
+ led_activity_blink();
+
while (len) {
if (!scrub) {
ret = mtd_block_isbad(mtd, erase_op.addr);
@@ -680,6 +689,8 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr += mtd->erasesize;
}
+ led_activity_off();
+
if (ret && ret != -EIO)
ret = CMD_RET_FAILURE;
else
--
2.45.2
[PATCH v4 06/11] tftp: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal traffic.
Also turn the ACTIVITY LED OFF if a CTRL-C is detected in the main
net loop function.
Signed-off-by: Christian Marangi
---
net/net.c | 4
net/tftp.c | 5 +
2 files changed, 9 insertions(+)
diff --git a/net/net.c b/net/net.c
index d9bc9df643f..94bfde43f85 100644
--- a/net/net.c
+++ b/net/net.c
@@ -87,6 +87,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -659,6 +660,9 @@ restart:
/* Invalidate the last protocol */
eth_set_last_protocol(BOOTP);
+ /* Turn off activity LED if triggered */
+ led_activity_off();
+
puts("\nAbort\n");
/* include a debug print as well incase the debug
messages are directed to stderr */
diff --git a/net/tftp.c b/net/tftp.c
index 2e073183d5a..5cb06d2038b 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -192,6 +193,7 @@ static void new_transfer(void)
#ifdef CONFIG_CMD_TFTPPUT
tftp_put_final_block_sent = 0;
#endif
+ led_activity_blink();
}
#ifdef CONFIG_CMD_TFTPPUT
@@ -301,6 +303,9 @@ static void tftp_complete(void)
time_start * 1000, "/s");
}
puts("\ndone\n");
+
+ led_activity_off();
+
if (!tftp_put_active)
efi_set_bootdev("Net", "", tftp_filename,
map_sysmem(tftp_load_addr, 0),
--
2.45.2
[PATCH v4 05/11] led: implement LED activity API
Implement LED activity API similar to BOOT LED API.
Usual activity might be a file transfer with TFTP, a flash write...
User of this API will call led_activity_on/off/blink() to signal these
kind of activity.
New Kconfig is implemented similar to BOOT LED, LED_ACTIVITY to
enable support for it.
It's introduced a new /options/u-boot property "activity-led" and
"activity-led-period" to define the activity LED label and the
default period when the activity LED is set to blink mode.
If "activity-led-period" is not defined, the value of 250 (ms) is
used by default.
If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
led_boot_blink call will fallback to simple LED ON.
Signed-off-by: Christian Marangi
---
drivers/led/Kconfig | 8
drivers/led/led-uclass.c | 94 ++--
include/led.h| 52 ++
3 files changed, 151 insertions(+), 3 deletions(-)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index 6149cfa02b8..f0434f247a4 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -16,6 +16,14 @@ config LED_BOOT
LED boot is a specific LED assigned to signal boot operation status.
+config LED_ACTIVITY
+ bool "Enable LED activity support"
+ help
+ Enable LED activity support.
+
+ LED activity is a specific LED assigned to signal activity operation
+ like file trasnfer, flash write/erase...
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index c5b560982b0..c87fc7540c7 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -168,12 +168,86 @@ int led_boot_blink(void)
#endif
#endif
+#ifdef CONFIG_LED_ACTIVITY
+int led_activity_on(void)
+{
+ struct uclass *uc = uclass_find(UCLASS_LED);
+ struct led_uc_priv *priv;
+ struct udevice *dev;
+
+ if (!uc)
+ return -ENOENT;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->activity_led_dev ||
+ uclass_get_device_tail(priv->activity_led_dev, 0, &dev)) {
+ printf("Failed to get activity LED %s\n",
+ priv->activity_led_label);
+ return -EINVAL;
+ }
+
+ return led_set_state(dev, LEDST_ON);
+}
+
+int led_activity_off(void)
+{
+ struct uclass *uc = uclass_find(UCLASS_LED);
+ struct led_uc_priv *priv;
+ struct udevice *dev;
+
+ if (!uc)
+ return -ENOENT;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->activity_led_dev ||
+ uclass_get_device_tail(priv->activity_led_dev, 0, &dev)) {
+ printf("Failed to get activity LED %s\n",
+ priv->activity_led_label);
+ return -EINVAL;
+ }
+
+ return led_set_state(dev, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+int led_activity_blink(void)
+{
+ struct uclass *uc = uclass_find(UCLASS_LED);
+ struct led_uc_priv *priv;
+ struct udevice *dev;
+ int ret;
+
+ if (!uc)
+ return -ENOENT;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->activity_led_dev ||
+ uclass_get_device_tail(priv->activity_led_dev, 0, &dev)) {
+ printf("Failed to get activity LED %s\n",
+ priv->activity_led_label);
+ return -EINVAL;
+ }
+
+ ret = led_set_period(dev, priv->activity_led_period);
+ if (ret) {
+ if (ret != -ENOSYS)
+ return ret;
+
+ /* fallback to ON with no set_period and no SW_BLINK */
+ return led_set_state(dev, LEDST_ON);
+ }
+
+ return led_set_state(dev, LEDST_BLINK);
+}
+#endif
+#endif
+
static int led_post_bind(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
const char *default_state;
-#ifdef CONFIG_LED_BOOT
+#if defined(CONFIG_LED_BOOT) || defined(CONFIG_LED_ACTIVITY)
struct led_uc_priv *priv = uclass_get_priv(dev->uclass);
#endif
@@ -189,6 +263,12 @@ static int led_post_bind(struct udevice *dev)
priv->boot_led_dev = dev;
#endif
+#ifdef CONFIG_LED_ACTIVITY
+ /* check if we are binding activity LED and assign it */
+ if (!strcmp(priv->activity_led_label, uc_plat->label))
+ priv->activity_led_dev = dev;
+#endif
+
uc_plat->default_state = LEDST_COUNT;
default_state = dev_read_string(dev, "default-state");
@@ -242,13 +322,21 @@ static int led_post_probe(struct udevice *dev)
return ret;
}
-#ifdef CONFIG_LED_BOOT
+#if defined(CONFIG_LED_BOOT) || defined(CONFIG_LED_ACTIVITY)
static int led_init(struct uclass *uc)
{
struct l
[PATCH v4 04/11] common: board_r: rework BOOT LED handling
Rework BOOT LED handling. There is currently one legacy implementation
for BOOT LED from Status Led API.
This work on ancient implementation used by BOOTP by setting the LED
to Blink on boot and to turn it OFF when the firmware was correctly
received by network.
Now that we new LED implementation have support for LED boot, rework
this by also set the new BOOT LED to blink and also set it to ON before
entering main loop to confirm successful boot.
Signed-off-by: Christian Marangi
---
common/board_r.c | 28
include/status_led.h | 13 +
2 files changed, 33 insertions(+), 8 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index d4ba245ac69..c3f8dd5d4ee 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -459,17 +460,28 @@ static int initr_malloc_bootparams(void)
}
#endif
-#if defined(CONFIG_LED_STATUS)
static int initr_status_led(void)
{
-#if defined(CONFIG_LED_STATUS_BOOT)
- status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
-#else
status_led_init();
-#endif
+
+ return 0;
+}
+
+static int initr_boot_led_blink(void)
+{
+ status_led_boot_blink();
+
+ led_boot_blink();
+
+ return 0;
+}
+
+static int initr_boot_led_on(void)
+{
+ led_boot_on();
+
return 0;
}
-#endif
#ifdef CONFIG_CMD_NET
static int initr_net(void)
@@ -713,9 +725,8 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_MICROBLAZE) || defined(CONFIG_M68K)
timer_init, /* initialize timer */
#endif
-#if defined(CONFIG_LED_STATUS)
initr_status_led,
-#endif
+ initr_boot_led_blink,
/* PPC has a udelay(20) here dating from 2002. Why? */
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
@@ -738,6 +749,7 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CFG_PRAM)
initr_mem,
#endif
+ initr_boot_led_on,
run_main_loop,
};
diff --git a/include/status_led.h b/include/status_led.h
index 6707ab1d29d..1282022253e 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -39,6 +39,13 @@ void status_led_init(void);
void status_led_tick(unsigned long timestamp);
void status_led_set(int led, int state);
+static inline void status_led_boot_blink(void)
+{
+#ifdef CONFIG_LED_STATUS_BOOT_ENABLE
+ status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
+#endif
+}
+
/* MVS v1 **/
#if (defined(CONFIG_MVS) && CONFIG_MVS < 2)
# define STATUS_LED_PARim_ioport.iop_pdpar
@@ -72,6 +79,12 @@ void __led_blink(led_id_t mask, int freq);
# include
#endif
+#else
+
+static inline void status_led_init(void) { }
+static inline void status_led_set(int led, int state) { }
+static inline void status_led_boot_blink(void) { }
+
#endif /* CONFIG_LED_STATUS*/
/*
--
2.45.2
[PATCH v4 03/11] led: implement LED boot API
Implement LED boot API to signal correct boot of the system.
led_boot_on/off/blink() are introduced to turn ON, OFF and BLINK the
designated boot LED.
New Kconfig is introduced, CONFIG_LED_BOOT to enable the feature.
This makes use of the /options/u-boot property "boot-led" to the
define the boot LED.
It's also introduced a new /options/u-boot property "boot-led-period"
to define the default period when the LED is set to blink mode.
If "boot-led-period" is not defined, the value of 250 (ms) is
used by default.
If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
led_boot_blink call will fallback to simple LED ON.
To cache the data we repurpose the now unused led_uc_priv for storage of
global LED uclass info.
Signed-off-by: Christian Marangi
---
drivers/led/Kconfig | 7 +++
drivers/led/led-uclass.c | 100 +++
include/led.h| 56 +-
3 files changed, 161 insertions(+), 2 deletions(-)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index bee74b25751..6149cfa02b8 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -9,6 +9,13 @@ config LED
can provide access to board-specific LEDs. Use of the device tree
for configuration is encouraged.
+config LED_BOOT
+ bool "Enable LED boot support"
+ help
+ Enable LED boot support.
+
+ LED boot is a specific LED assigned to signal boot operation status.
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 199d68bc25a..c5b560982b0 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -94,17 +94,101 @@ int led_set_period(struct udevice *dev, int period_ms)
return -ENOSYS;
}
+#ifdef CONFIG_LED_BOOT
+int led_boot_on(void)
+{
+ struct uclass *uc = uclass_find(UCLASS_LED);
+ struct led_uc_priv *priv;
+ struct udevice *dev;
+
+ if (!uc)
+ return -ENOENT;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->boot_led_dev ||
+ uclass_get_device_tail(priv->boot_led_dev, 0, &dev)) {
+ printf("Failed to get boot LED %s\n",
+ priv->boot_led_label);
+ return -EINVAL;
+ }
+
+ return led_set_state(dev, LEDST_ON);
+}
+
+int led_boot_off(void)
+{
+ struct uclass *uc = uclass_find(UCLASS_LED);
+ struct led_uc_priv *priv;
+ struct udevice *dev;
+
+ if (!uc)
+ return -ENOENT;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->boot_led_dev ||
+ uclass_get_device_tail(priv->boot_led_dev, 0, &dev)) {
+ printf("Failed to get boot LED %s\n",
+ priv->boot_led_label);
+ return -EINVAL;
+ }
+
+ return led_set_state(dev, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+int led_boot_blink(void)
+{
+ struct uclass *uc = uclass_find(UCLASS_LED);
+ struct led_uc_priv *priv;
+ struct udevice *dev;
+ int ret;
+
+ if (!uc)
+ return -ENOENT;
+
+ priv = uclass_get_priv(uc);
+ if (!priv->boot_led_dev ||
+ uclass_get_device_tail(priv->boot_led_dev, 0, &dev)) {
+ printf("Failed to get boot LED %s\n",
+ priv->boot_led_label);
+ return -EINVAL;
+ }
+
+ ret = led_set_period(dev, priv->boot_led_period);
+ if (ret) {
+ if (ret != -ENOSYS)
+ return ret;
+
+ /* fallback to ON with no set_period and no SW_BLINK */
+ return led_set_state(dev, LEDST_ON);
+ }
+
+ return led_set_state(dev, LEDST_BLINK);
+}
+#endif
+#endif
+
static int led_post_bind(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
const char *default_state;
+#ifdef CONFIG_LED_BOOT
+ struct led_uc_priv *priv = uclass_get_priv(dev->uclass);
+#endif
+
if (!uc_plat->label)
uc_plat->label = dev_read_string(dev, "label");
if (!uc_plat->label && !dev_read_string(dev, "compatible"))
uc_plat->label = ofnode_get_name(dev_ofnode(dev));
+#ifdef CONFIG_LED_BOOT
+ /* check if we are binding boot LED and assign it */
+ if (!strcmp(priv->boot_led_label, uc_plat->label))
+ priv->boot_led_dev = dev;
+#endif
+
uc_plat->default_state = LEDST_COUNT;
default_state = dev_read_string(dev, "default-state");
@@ -158,10 +242,26 @@ static int led_post_probe(struct udevice *dev)
return ret;
}
+#ifdef CONFIG_LED_BOOT
+static int led_init(struct uclass *uc)
+{
+
[PATCH v4 02/11] dm: core: implement ofnode_options helpers
Implement ofnode_options helpers to read options in /options/u-boot to
adapt to the new way to declare options as described in [0].
[0] dtschema/schemas/options/u-boot.yaml
Signed-off-by: Christian Marangi
---
drivers/core/ofnode.c | 33 +
include/dm/ofnode.h | 41 +
2 files changed, 74 insertions(+)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 4d563b47a5a..4404c4f4bab 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1734,6 +1734,39 @@ const char *ofnode_conf_read_str(const char *prop_name)
return ofnode_read_string(node, prop_name);
}
+bool ofnode_options_read_bool(const char *prop_name)
+{
+ ofnode uboot;
+
+ uboot = ofnode_path("/options/u-boot");
+ if (!ofnode_valid(uboot))
+ return false;
+
+ return ofnode_read_bool(uboot, prop_name);
+}
+
+int ofnode_options_read_int(const char *prop_name, int default_val)
+{
+ ofnode uboot;
+
+ uboot = ofnode_path("/options/u-boot");
+ if (!ofnode_valid(uboot))
+ return default_val;
+
+ return ofnode_read_u32_default(uboot, prop_name, default_val);
+}
+
+const char *ofnode_options_read_str(const char *prop_name)
+{
+ ofnode uboot;
+
+ uboot = ofnode_path("/options/u-boot");
+ if (!ofnode_valid(uboot))
+ return NULL;
+
+ return ofnode_read_string(uboot, prop_name);
+}
+
int ofnode_read_bootscript_address(u64 *bootscr_address, u64 *bootscr_offset)
{
int ret;
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 5795115c490..0787758926f 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1587,6 +1587,47 @@ int ofnode_conf_read_int(const char *prop_name, int
default_val);
*/
const char *ofnode_conf_read_str(const char *prop_name);
+/**
+ * ofnode_options_read_bool() - Read a boolean value from the U-Boot options
+ *
+ * This reads a property from the /options/u-boot/ node of the devicetree.
+ *
+ * This only works with the control FDT.
+ *
+ * See dtschema/schemas/options/u-boot.yaml in dt-schema project for bindings
+ *
+ * @prop_name: property name to look up
+ * Return: true, if it exists, false if not
+ */
+bool ofnode_options_read_bool(const char *prop_name);
+
+/**
+ * ofnode_options_read_int() - Read an integer value from the U-Boot options
+ *
+ * This reads a property from the /options/u-boot/ node of the devicetree.
+ *
+ * See dtschema/schemas/options/u-boot.yaml in dt-schema project for bindings
+ *
+ * @prop_name: property name to look up
+ * @default_val: default value to return if the property is not found
+ * Return: integer value, if found, or @default_val if not
+ */
+int ofnode_options_read_int(const char *prop_name, int default_val);
+
+/**
+ * ofnode_options_read_str() - Read a string value from the U-Boot options
+ *
+ * This reads a property from the /options/u-boot/ node of the devicetree.
+ *
+ * This only works with the control FDT.
+ *
+ * See dtschema/schemas/options/u-boot.yaml in dt-schema project for bindings
+ *
+ * @prop_name: property name to look up
+ * Return: string value, if found, or NULL if not
+ */
+const char *ofnode_options_read_str(const char *prop_name);
+
/**
* ofnode_read_bootscript_address() - Read bootscr-address or
bootscr-ram-offset
*
--
2.45.2
[PATCH v4 01/11] led: toggle LED on initial SW blink
We currently init the LED OFF when SW blink is triggered when
on_state_change() is called. This can be problematic for very short
period as the ON/OFF blink might never trigger.
Toggle the LED (ON if OFF, OFF if ON) on initial SW blink to handle this
corner case and better display a LED blink from the user.
Signed-off-by: Christian Marangi
Reviewed-by: Simon Glass
---
drivers/led/led_sw_blink.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
index 9e36edbee47..9d9820720c6 100644
--- a/drivers/led/led_sw_blink.c
+++ b/drivers/led/led_sw_blink.c
@@ -103,8 +103,16 @@ bool led_sw_on_state_change(struct udevice *dev, enum
led_state_t state)
return false;
if (state == LEDST_BLINK) {
+ struct led_ops *ops = led_get_ops(dev);
+ enum led_state_t curr_state = led_get_state(dev);
+
+ curr_state = ops->get_state(dev);
+ /* toggle led initially */
+ ops->set_state(dev, curr_state == LEDST_ON ? LEDST_OFF :
+ LEDST_ON);
/* start blinking on next led_sw_blink() call */
- sw_blink->state = LED_SW_BLINK_ST_OFF;
+ sw_blink->state = curr_state == LEDST_ON ? LED_SW_BLINK_ST_OFF :
+ LED_SW_BLINK_ST_ON;
return true;
}
--
2.45.2
[PATCH v4 00/11] led: introduce LED boot and activity function
This series is a reworked version of the previous seried: misc: introduce STATUS LED activity function This series port and expand the legacy concept of LED boot from the legacy Status LED API to new LED API. One thing that many device need is a way to communicate to the user that the device is actually doing something. This is especially useful for recovery steps where an user (for example) insert an USB drive, keep a button pressed and the device autorecover. There is currently no way to signal the user externally that the bootloader is processing/recoverying aside from setting a LED on. A solid LED on is not enough and won't actually signal any kind of progress. Solution is the good old blinking LED but uboot doesn't suggest (and support) interrupts and almost all the LED are usually GPIO LED that doesn't support HW blink. Additional Kconfg are also introduced to set the LED boot and activity. Those are referenced by label. A documentation for old and these new LED API is created. (world tested with the azure pipeline) Changes v4: - Drop led_set_state/period_by_label - Switch to /options/u-boot - Rework to cache label and dev in led uclass - Add multiple patch for additional helper - Rework patches to limit ifdef in some place Changes v3: - Switch to /config property Changes v2: - Drop GPIO SW implementation - Add fix for new LED SW BLINK Christian Marangi (11): led: toggle LED on initial SW blink dm: core: implement ofnode_options helpers led: implement LED boot API common: board_r: rework BOOT LED handling led: implement LED activity API tftp: implement support for LED activity mtd: implement support for LED activity ubi: implement support for LED activity doc: introduce led.rst documentation test: dm: Add tests for LED boot and activity test: dm: Expand ofnode options test with new helper arch/sandbox/dts/test.dts | 5 + cmd/mtd.c | 11 +++ cmd/ubi.c | 13 ++- common/board_r.c | 28 -- doc/api/index.rst | 1 + doc/api/led.rst| 10 ++ drivers/core/ofnode.c | 33 +++ drivers/led/Kconfig| 15 +++ drivers/led/led-uclass.c | 188 + drivers/led/led_sw_blink.c | 10 +- include/dm/ofnode.h| 41 include/led.h | 149 - include/status_led.h | 13 +++ net/net.c | 4 + net/tftp.c | 5 + test/dm/led.c | 72 ++ test/dm/ofnode.c | 9 ++ 17 files changed, 594 insertions(+), 13 deletions(-) create mode 100644 doc/api/led.rst -- 2.45.2
Re: [PATCH v3 1/9] led: turn LED ON on initial SW blink
On Thu, Sep 19, 2024 at 04:13:44PM +0200, Simon Glass wrote:
> Hi Christian,
>
> On Mon, 12 Aug 2024 at 12:33, Christian Marangi wrote:
> >
> > We currently init the LED OFF when SW blink is triggered when
> > on_state_change() is called. This can be problematic for very short
> > period as the ON/OFF blink might never trigger.
> >
> > Turn LED ON on initial SW blink to handle this corner case and better
> > display a LED blink from the user.
> >
> > Signed-off-by: Christian Marangi
> > ---
> > drivers/led/led_sw_blink.c | 5 -
> > 1 file changed, 4 insertions(+), 1 deletion(-)
>
> Reviewed-by: Simon Glass
>
> nit below
>
> >
> > diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
> > index 9e36edbee47..853278670b9 100644
> > --- a/drivers/led/led_sw_blink.c
> > +++ b/drivers/led/led_sw_blink.c
> > @@ -103,8 +103,11 @@ bool led_sw_on_state_change(struct udevice *dev, enum
> > led_state_t state)
> > return false;
> >
> > if (state == LEDST_BLINK) {
> > + struct led_ops *ops = led_get_ops(dev);
> > +
> > + ops->set_state(dev, LEDST_ON);
>
> Normally in drivers we define functions like led_set_state() in the
> uclass, rather than calling things directly like this.
>
I used ops directly as I'm following how it's done in led_sw_blink and
because the support for these ops is already validated and we don't need
to check for the -ENOSYS condition.
Hope it's ok. Also as suggested I changed the function to toggle the LED
as suggested. I added the review tag. Tell me if I have to drop it in
the next revision.
> > /* start blinking on next led_sw_blink() call */
> > - sw_blink->state = LED_SW_BLINK_ST_OFF;
> > + sw_blink->state = LED_SW_BLINK_ST_ON;
> > return true;
> > }
> >
> > --
> > 2.45.2
> >
>
> Regards,
> Simon
--
Ansuel
Re: [PATCH v3 1/9] led: turn LED ON on initial SW blink
On Tue, Aug 13, 2024 at 12:00:59AM +0200, Heinrich Schuchardt wrote:
>
>
> Am 12. August 2024 12:32:43 MESZ schrieb Christian Marangi
> :
> >We currently init the LED OFF when SW blink is triggered when
> >on_state_change() is called. This can be problematic for very short
> >period as the ON/OFF blink might never trigger.
> >
> >Turn LED ON on initial SW blink to handle this corner case and better
> >display a LED blink from the user.
>
> If the the prior state is on, blinking should start with off.
>
> If the prior state is off, blinking should start with on.
>
A bit confused. You mean I should improve the commit description or the
code needs to he changed to reflect this and check the LED status before
applying the BLINK?
>
>
> >
> >Signed-off-by: Christian Marangi
> >---
> > drivers/led/led_sw_blink.c | 5 -
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
> >index 9e36edbee47..853278670b9 100644
> >--- a/drivers/led/led_sw_blink.c
> >+++ b/drivers/led/led_sw_blink.c
> >@@ -103,8 +103,11 @@ bool led_sw_on_state_change(struct udevice *dev, enum
> >led_state_t state)
> > return false;
> >
> > if (state == LEDST_BLINK) {
> >+struct led_ops *ops = led_get_ops(dev);
> >+
> >+ops->set_state(dev, LEDST_ON);
> > /* start blinking on next led_sw_blink() call */
> >-sw_blink->state = LED_SW_BLINK_ST_OFF;
> >+sw_blink->state = LED_SW_BLINK_ST_ON;
> > return true;
> > }
> >
--
Ansuel
Re: [PATCH v3 8/9] ubi: implement support for LED activity
On Sun, Aug 18, 2024 at 09:32:32PM +0200, Michael Nazzareno Trimarchi wrote:
> Hi
>
> On Sun, Aug 18, 2024 at 6:24 PM Christian Marangi
> wrote:
> >
> > On Wed, Aug 14, 2024 at 10:17:18AM +0200, Michael Nazzareno Trimarchi wrote:
> > > Hi all
> > >
> > > On Wed, Aug 14, 2024 at 6:34 AM Heiko Schocher wrote:
> > > >
> > > > Hello Christian,
> > > >
> > > > On 12.08.24 12:32, Christian Marangi wrote:
> > > > > Implement support for LED activity. If the feature is enabled,
> > > > > make the defined ACTIVITY LED to signal ubi write operation.
> > > > >
> > > > > Signed-off-by: Christian Marangi
> > > > > ---
> > > > > cmd/ubi.c | 17 +++--
> > > > > 1 file changed, 15 insertions(+), 2 deletions(-)
> > > > >
> > > > > diff --git a/cmd/ubi.c b/cmd/ubi.c
> > > > > index 0e62e449327..6f679eae9c3 100644
> > > > > --- a/cmd/ubi.c
> > > > > +++ b/cmd/ubi.c
> > > > > @@ -14,6 +14,7 @@
> > > > > #include
> > > > > #include
> > > > > #include
> > > > > +#include
> > > > > #include
> > > > > #include
> > > > > #include
> > > > > @@ -488,10 +489,22 @@ exit:
> > > > >
> > > > > int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t
> > > > > size)
> > > > > {
> > > > > + int ret;
> > > > > +
> > > > > +#ifdef CONFIG_LED_ACTIVITY_ENABLE
> > > > > + led_activity_blink();
> > > > > +#endif
> > > >
> > > > Do we really need ifdef? May it is possible to declare an empty function
> > > > when CONFIG_LED_ACTIVITY_ENABLE is not set? May this applies for the
> > > > whole
> > > > series?
> > > >
> > > > > +
> > > > > if (!offset)
> > > > > - return ubi_volume_begin_write(volume, buf, size, size);
> > > > > + ret = ubi_volume_begin_write(volume, buf, size, size);
> > > > > + else
> > > > > + ret = ubi_volume_offset_write(volume, buf, offset,
> > > > > size);
> > > > >
> > > > > - return ubi_volume_offset_write(volume, buf, offset, size);
> > > > > +#ifdef CONFIG_LED_ACTIVITY_ENABLE
> > > > > + led_activity_off();
> > > > > +#endif
> > > > > +
> > > > > + return ret;
> > > > > }
> > > > >
> > > > > int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t
> > > > > size)
> > > > >
> > > >
> > > I rather prefer to have some registration of events that need to be
> > > executed for
> > > a particular i/o activity and then a subscription process from led
> > > subsystem if that
> > > particular event is connected to the dts or just on a board file
> > >
> >
> > My concern is that it might become too complex just for the sake of
> > putting a LED intro a state. Do we have other case where such event
> > subsystem might be useful?
>
> I was thinking of reusing the cyclic subsystem that allows you to
> subscribe to functions
> that are executed periodically. I mean it's not exciting to have
> function call everywhere,
> and anyway I think that
>
> #if defined(CONFIG_FOO)
> foo_activity
> #else
> foo_activity() { };
> #endif
Yes that was suggested and I will change code to use this
>
> This is my preference to not have it ENABLED everywhere. As I
> mentioned I even not
> have experience about having such needs in in code. Most can be implemented
> in a script except blinking like:
>
> led on; ext4load <> ; led off. We can definitely script most of it.
> The only exception can be
> led blink; ext4load <>; led off.
>
It's really a choice but currently for the boot led people have to use
board code to turn on the LED or use the preboot env to run command...
Not very clean. Is it really that bad to have these simple call in these
functions?
> >
> > Uboot is not really multi thread so we don't expect that much thing to
> > happen at the same time. Do we have case where an i/o might happen in
> > multiple place? Example transfering data and writing them at the same
> > time? The common practice is to first transfer and then handle.
> >
>
> Michael
>
> > >
> > >
> > > > bye,
> > > > Heiko
> > > > --
> > > > DENX Software Engineering GmbH, Managing Director: Erika Unter
> > > > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> > > > Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
> > >
> > >
> > >
> > > --
> > > Michael Nazzareno Trimarchi
> > > Co-Founder & Chief Executive Officer
> > > M. +39 347 913 2170
> > > mich...@amarulasolutions.com
> > > __
> > >
> > > Amarula Solutions BV
> > > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> > > T. +31 (0)85 111 9172
> > > i...@amarulasolutions.com
> > > www.amarulasolutions.com
> >
> > --
> > Ansuel
>
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> mich...@amarulasolutions.com
> __
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> i...@amarulasolutions.com
> www.amarulasolutions.com
--
Ansuel
Re: [PATCH v3 8/9] ubi: implement support for LED activity
On Wed, Aug 14, 2024 at 10:17:18AM +0200, Michael Nazzareno Trimarchi wrote:
> Hi all
>
> On Wed, Aug 14, 2024 at 6:34 AM Heiko Schocher wrote:
> >
> > Hello Christian,
> >
> > On 12.08.24 12:32, Christian Marangi wrote:
> > > Implement support for LED activity. If the feature is enabled,
> > > make the defined ACTIVITY LED to signal ubi write operation.
> > >
> > > Signed-off-by: Christian Marangi
> > > ---
> > > cmd/ubi.c | 17 +++--
> > > 1 file changed, 15 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/cmd/ubi.c b/cmd/ubi.c
> > > index 0e62e449327..6f679eae9c3 100644
> > > --- a/cmd/ubi.c
> > > +++ b/cmd/ubi.c
> > > @@ -14,6 +14,7 @@
> > > #include
> > > #include
> > > #include
> > > +#include
> > > #include
> > > #include
> > > #include
> > > @@ -488,10 +489,22 @@ exit:
> > >
> > > int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t
> > > size)
> > > {
> > > + int ret;
> > > +
> > > +#ifdef CONFIG_LED_ACTIVITY_ENABLE
> > > + led_activity_blink();
> > > +#endif
> >
> > Do we really need ifdef? May it is possible to declare an empty function
> > when CONFIG_LED_ACTIVITY_ENABLE is not set? May this applies for the whole
> > series?
> >
> > > +
> > > if (!offset)
> > > - return ubi_volume_begin_write(volume, buf, size, size);
> > > + ret = ubi_volume_begin_write(volume, buf, size, size);
> > > + else
> > > + ret = ubi_volume_offset_write(volume, buf, offset, size);
> > >
> > > - return ubi_volume_offset_write(volume, buf, offset, size);
> > > +#ifdef CONFIG_LED_ACTIVITY_ENABLE
> > > + led_activity_off();
> > > +#endif
> > > +
> > > + return ret;
> > > }
> > >
> > > int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size)
> > >
> >
> I rather prefer to have some registration of events that need to be executed
> for
> a particular i/o activity and then a subscription process from led
> subsystem if that
> particular event is connected to the dts or just on a board file
>
My concern is that it might become too complex just for the sake of
putting a LED intro a state. Do we have other case where such event
subsystem might be useful?
Uboot is not really multi thread so we don't expect that much thing to
happen at the same time. Do we have case where an i/o might happen in
multiple place? Example transfering data and writing them at the same
time? The common practice is to first transfer and then handle.
>
>
> > bye,
> > Heiko
> > --
> > DENX Software Engineering GmbH, Managing Director: Erika Unter
> > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> > Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
>
>
>
> --
> Michael Nazzareno Trimarchi
> Co-Founder & Chief Executive Officer
> M. +39 347 913 2170
> mich...@amarulasolutions.com
> __
>
> Amarula Solutions BV
> Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
> T. +31 (0)85 111 9172
> i...@amarulasolutions.com
> www.amarulasolutions.com
--
Ansuel
Re: [PATCH v3 8/9] ubi: implement support for LED activity
On Wed, Aug 14, 2024 at 06:33:12AM +0200, Heiko Schocher wrote:
> Hello Christian,
>
> On 12.08.24 12:32, Christian Marangi wrote:
> > Implement support for LED activity. If the feature is enabled,
> > make the defined ACTIVITY LED to signal ubi write operation.
> >
> > Signed-off-by: Christian Marangi
> > ---
> > cmd/ubi.c | 17 +++--
> > 1 file changed, 15 insertions(+), 2 deletions(-)
> >
> > diff --git a/cmd/ubi.c b/cmd/ubi.c
> > index 0e62e449327..6f679eae9c3 100644
> > --- a/cmd/ubi.c
> > +++ b/cmd/ubi.c
> > @@ -14,6 +14,7 @@
> > #include
> > #include
> > #include
> > +#include
> > #include
> > #include
> > #include
> > @@ -488,10 +489,22 @@ exit:
> > int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t size)
> > {
> > + int ret;
> > +
> > +#ifdef CONFIG_LED_ACTIVITY_ENABLE
> > + led_activity_blink();
> > +#endif
>
> Do we really need ifdef? May it is possible to declare an empty function
> when CONFIG_LED_ACTIVITY_ENABLE is not set? May this applies for the whole
> series?
>
Yes can be done.
> > +
> > if (!offset)
> > - return ubi_volume_begin_write(volume, buf, size, size);
> > + ret = ubi_volume_begin_write(volume, buf, size, size);
> > + else
> > + ret = ubi_volume_offset_write(volume, buf, offset, size);
> > - return ubi_volume_offset_write(volume, buf, offset, size);
> > +#ifdef CONFIG_LED_ACTIVITY_ENABLE
> > + led_activity_off();
> > +#endif
> > +
> > + return ret;
> > }
> > int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size)
> >
>
> bye,
> Heiko
> --
> DENX Software Engineering GmbH, Managing Director: Erika Unter
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-52 Fax: +49-8142-66989-80 Email: h...@denx.de
--
Ansuel
[PATCH] pci: mediatek: add support for upstream split PCIe node
Add support for upstream linux split PCIe node.
Upstream linux have an alternative way to declare PCIe nodes that splits
them in dedicated nodes for each line instead of putting them all in one
node.
Detect this by checking if the mediatek,generic-pciecfg node is passed
as it's used to reference the common address for all the PCIe lines.
Signed-off-by: Christian Marangi
---
drivers/pci/pcie_mediatek.c | 127
1 file changed, 100 insertions(+), 27 deletions(-)
diff --git a/drivers/pci/pcie_mediatek.c b/drivers/pci/pcie_mediatek.c
index 04d8cc29afd..d88d850924c 100644
--- a/drivers/pci/pcie_mediatek.c
+++ b/drivers/pci/pcie_mediatek.c
@@ -524,7 +524,7 @@ exit:
mtk_pcie_port_free(port);
}
-static int mtk_pcie_parse_port(struct udevice *dev, u32 slot)
+static int mtk_pcie_parse_port(struct udevice *dev, u32 slot, int index)
{
struct mtk_pcie *pcie = dev_get_priv(dev);
struct mtk_pcie_port *port;
@@ -545,11 +545,11 @@ static int mtk_pcie_parse_port(struct udevice *dev, u32
slot)
if (err)
return err;
- err = reset_get_by_index(dev, slot, &port->reset);
+ err = reset_get_by_index(dev, index, &port->reset);
if (err)
return err;
- err = generic_phy_get_by_index(dev, slot, &port->phy);
+ err = generic_phy_get_by_index(dev, index, &port->phy);
if (err)
return err;
@@ -631,18 +631,58 @@ static int mtk_pcie_parse_port_v2(struct udevice *dev,
u32 slot)
return 0;
}
+static int mtk_pcie_subsys_get(struct udevice *dev)
+{
+ struct mtk_pcie *pcie = dev_get_priv(dev);
+ ofnode cfg_node;
+ fdt_addr_t addr;
+
+ cfg_node = ofnode_by_compatible(ofnode_null(),
+ "mediatek,generic-pciecfg");
+ if (!ofnode_valid(cfg_node))
+ return -ENOENT;
+
+ addr = ofnode_get_addr(cfg_node);
+ if (addr == FDT_ADDR_T_NONE)
+ return -ENODEV;
+
+ pcie->base = map_physmem(addr, 0, MAP_NOCACHE);
+ if (!pcie->base)
+ return -ENOENT;
+
+ return 0;
+}
+
static int mtk_pcie_probe(struct udevice *dev)
{
struct mtk_pcie *pcie = dev_get_priv(dev);
struct mtk_pcie_port *port, *tmp;
+ bool split_pcie_node = false;
ofnode subnode;
+ unsigned int slot;
int err;
INIT_LIST_HEAD(&pcie->ports);
- pcie->base = dev_remap_addr_name(dev, "subsys");
- if (!pcie->base)
- return -ENOENT;
+ /* Check if upstream implementation is used */
+ err = mtk_pcie_subsys_get(dev);
+ if (!err) {
+ /*
+* Assume split port node implementation with
"mediatek,generic-pciecfg"
+* found. We check reg-names and check if the node is for port0
or port1.
+*/
+ split_pcie_node = true;
+ if (!strcmp(dev_read_string(dev, "reg-names"), "port0"))
+ slot = 0;
+ else if (!strcmp(dev_read_string(dev, "reg-names"), "port1"))
+ slot = 1;
+ else
+ return -EINVAL;
+ } else {
+ pcie->base = dev_remap_addr_name(dev, "subsys");
+ if (!pcie->base)
+ return -ENOENT;
+ }
err = clk_get_by_name(dev, "free_ck", &pcie->free_ck);
if (err)
@@ -653,20 +693,27 @@ static int mtk_pcie_probe(struct udevice *dev)
if (err)
return err;
- dev_for_each_subnode(subnode, dev) {
- struct fdt_pci_addr addr;
- u32 slot = 0;
+ if (!split_pcie_node) {
+ dev_for_each_subnode(subnode, dev) {
+ struct fdt_pci_addr addr;
- if (!ofnode_is_enabled(subnode))
- continue;
+ slot = 0;
- err = ofnode_read_pci_addr(subnode, 0, "reg", &addr, NULL);
- if (err)
- return err;
+ if (!ofnode_is_enabled(subnode))
+ continue;
- slot = PCI_DEV(addr.phys_hi);
+ err = ofnode_read_pci_addr(subnode, 0, "reg", &addr,
NULL);
+ if (err)
+ return err;
- err = mtk_pcie_parse_port(dev, slot);
+ slot = PCI_DEV(addr.phys_hi);
+
+ err = mtk_pcie_parse_port(dev, slot, slot);
+ if (err)
+ return err;
+ }
+ } else {
+ err = mtk_pcie_parse_port(dev, slot, 0);
if (err)
retur
[PATCH v3 9/9] doc: introduce led.rst documentation
Introduce simple led.rst documentation to document all the additional
Kconfig and the current limitation of LED_BLINK and GPIO software blink.
Signed-off-by: Christian Marangi
---
doc/api/index.rst | 1 +
doc/api/led.rst | 10 ++
include/led.h | 39 +++
3 files changed, 50 insertions(+)
create mode 100644 doc/api/led.rst
diff --git a/doc/api/index.rst b/doc/api/index.rst
index ec0b8adb2cf..9f7f23f868f 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -14,6 +14,7 @@ U-Boot API documentation
event
getopt
interrupt
+ led
linker_lists
lmb
logging
diff --git a/doc/api/led.rst b/doc/api/led.rst
new file mode 100644
index 000..e52e350d1bb
--- /dev/null
+++ b/doc/api/led.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LED
+===
+
+.. kernel-doc:: include/led.h
+ :doc: Overview
+
+.. kernel-doc:: include/led.h
+ :internal:
\ No newline at end of file
diff --git a/include/led.h b/include/led.h
index 6a1471dae85..fe66192eeae 100644
--- a/include/led.h
+++ b/include/led.h
@@ -11,6 +11,45 @@
#include
#include
+/**
+ * DOC: Overview
+ *
+ * Generic LED API provided when a supported compatible is defined in
DeviceTree.
+ *
+ * To enable support for LEDs, enable the `CONFIG_LED` Kconfig option.
+ *
+ * The most common implementation is for GPIO-connected LEDs. If using
GPIO-connected LEDs,
+ * enable the `LED_GPIO` Kconfig option.
+ *
+ * `LED_BLINK` support requires LED driver support and is therefore optional.
If LED blink
+ * functionality is needed, enable the `LED_BLINK` Kconfig option. If LED
driver doesn't
+ * support HW Blink, SW Blink can be used with the Cyclic framework by
enabling the
+ * CONFIG_LED_SW_BLINK.
+ *
+ * Boot and Activity LEDs are also supported. These LEDs can signal various
system operations
+ * during runtime, such as boot initialization, file transfers, and flash
write/erase operations.
+ *
+ * To enable a Boot LED, enable `CONFIG_LED_BOOT_ENABLE` and define in
`/config` root node the
+ * property `u-boot,boot-led`. This will enable the specified LED to blink and
turn ON when
+ * the bootloader initializes correctly.
+ *
+ * To enable an Activity LED, enable `CONFIG_LED_ACTIVITY_ENABLE` and define
in `/config` root
+ * node the property `u-boot,activity-led`.
+ * This will enable the specified LED to blink and turn ON during file
transfers or flash
+ * write/erase operations.
+ *
+ * Both Boot and Activity LEDs provide a simple API to turn the LED ON or OFF:
+ * `led_boot_on()`, `led_boot_off()`, `led_activity_on()`, and
`led_activity_off()`.
+ *
+ * Both configurations can optionally define a
`u-boot,boot/activity-led-period` property
+ * if `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled for LED blink
operations, which
+ * is usually used by the Activity LED. If not defined the default value of
250 (ms) is used.
+ *
+ * When `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled, additional
APIs are exposed:
+ * `led_boot_blink()` and `led_activity_blink()`. Note that if
`CONFIG_LED_BLINK` is disabled,
+ * these APIs will behave like the `led_boot_on()` and `led_activity_on()`
APIs, respectively.
+ */
+
struct udevice;
enum led_state_t {
--
2.45.2
[PATCH v3 8/9] ubi: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal ubi write operation.
Signed-off-by: Christian Marangi
---
cmd/ubi.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 0e62e449327..6f679eae9c3 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -488,10 +489,22 @@ exit:
int ubi_volume_write(char *volume, void *buf, loff_t offset, size_t size)
{
+ int ret;
+
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_blink();
+#endif
+
if (!offset)
- return ubi_volume_begin_write(volume, buf, size, size);
+ ret = ubi_volume_begin_write(volume, buf, size, size);
+ else
+ ret = ubi_volume_offset_write(volume, buf, offset, size);
- return ubi_volume_offset_write(volume, buf, offset, size);
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_off();
+#endif
+
+ return ret;
}
int ubi_volume_read(char *volume, char *buf, loff_t offset, size_t size)
--
2.45.2
[PATCH v3 7/9] mtd: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal mtd write or erase operations.
Signed-off-by: Christian Marangi
---
cmd/mtd.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/cmd/mtd.c b/cmd/mtd.c
index 795aaa2b37d..ba5ee0d4d71 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -10,6 +10,7 @@
#include
#include
+#include
#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
#include
#endif
@@ -558,6 +559,11 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
while (mtd_block_isbad(mtd, off))
off += mtd->erasesize;
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ if (!read)
+ led_activity_blink();
+#endif
+
/* Loop over the pages to do the actual read/write */
while (remaining) {
/* Skip the block if it is bad */
@@ -585,6 +591,11 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
io_op.oobbuf += io_op.oobretlen;
}
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ if (!read)
+ led_activity_off();
+#endif
+
if (!ret && dump)
mtd_dump_device_buf(mtd, start_off, buf, len, woob);
@@ -652,6 +663,10 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr = off;
erase_op.len = mtd->erasesize;
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_blink();
+#endif
+
while (len) {
if (!scrub) {
ret = mtd_block_isbad(mtd, erase_op.addr);
@@ -680,6 +695,10 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr += mtd->erasesize;
}
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_off();
+#endif
+
if (ret && ret != -EIO)
ret = CMD_RET_FAILURE;
else
--
2.45.2
[PATCH v3 6/9] tftp: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal traffic.
Signed-off-by: Christian Marangi
---
net/tftp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/net/tftp.c b/net/tftp.c
index 2e073183d5a..45c2455336a 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -192,6 +193,9 @@ static void new_transfer(void)
#ifdef CONFIG_CMD_TFTPPUT
tftp_put_final_block_sent = 0;
#endif
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_blink();
+#endif
}
#ifdef CONFIG_CMD_TFTPPUT
@@ -301,6 +305,9 @@ static void tftp_complete(void)
time_start * 1000, "/s");
}
puts("\ndone\n");
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_off();
+#endif
if (!tftp_put_active)
efi_set_bootdev("Net", "", tftp_filename,
map_sysmem(tftp_load_addr, 0),
--
2.45.2
[PATCH v3 5/9] led: implement LED activity API
Implement LED activity API similar to BOOT LED API.
Usual activity might be a file transfer with TFTP, a flash write...
User of this API will call led_activity_on/off/blink() to signal these
kind of activity.
New Kconfig are implemented similar to BOOT LED, LED_ACTIVITY_ENABLE to
enable support for it.
It's introduced a new /config property "u-boot,activity-led" and
"u-boot,activity-led-period" to define the activity LED label and the
default period when the activity LED is set to blink mode.
If "u-boot,activity-led-period" is not defined, the value of 250 (ms) is
used by default.
If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
led_boot_blink call will fallback to simple LED ON.
Signed-off-by: Christian Marangi
---
doc/device-tree-bindings/config.txt | 4 ++
drivers/led/Kconfig | 21 ++
include/led.h | 63 +
3 files changed, 88 insertions(+)
diff --git a/doc/device-tree-bindings/config.txt
b/doc/device-tree-bindings/config.txt
index 68edd177040..cd9ec88909b 100644
--- a/doc/device-tree-bindings/config.txt
+++ b/doc/device-tree-bindings/config.txt
@@ -30,8 +30,12 @@ u-boot,boot-led (string)
u-boot,error-led (string)
This is used to specify the label for an LED to indicate an error and
a successful boot, on supported hardware.
+u-boot,activity-led (string)
+ This is used to specify the label for an LED to indicate an activity
+ if supported by the operation.
u-boot,boot-led-period (int)
+u-boot,activity-led-period (int)
This is used to specify the default period for an LED in blink mode.
bootsecure (int)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index fd9442edaf3..1336f943dab 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -29,6 +29,27 @@ config LED_BOOT_PERIOD
help
LED boot blink period in ms.
+config LED_ACTIVITY_ENABLE
+ bool "Enable LED activity support"
+ help
+ Enable LED activity support.
+
+ LED activity is a specific LED assigned to signal activity operation
+ like file trasnfer, flash write/erase...
+
+config LED_ACTIVITY_LABEL
+ string "LED activity label"
+ depends on LED_ACTIVITY_ENABLE
+ help
+ LED label defined in DT to assign for LED activity usage.
+
+config LED_ACTIVITY_PERIOD
+ int "LED activity period"
+ depends on LED_ACTIVITY_ENABLE && (LED_BLINK || LED_SW_BLINK)
+ default 2
+ help
+ LED activity blink period in ms.
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/include/led.h b/include/led.h
index 2d3b89674e2..6a1471dae85 100644
--- a/include/led.h
+++ b/include/led.h
@@ -223,4 +223,67 @@ static inline int led_boot_blink(void)
#endif
#endif
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+
+/**
+ * led_activity_on() - turn ON the designated LED for activity
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_activity_on(void)
+{
+ const char *led_name;
+
+ led_name = ofnode_conf_read_str("u-boot,activity-led");
+ if (!led_name)
+ return -ENOENT;
+
+ return led_set_state_by_label(led_name, LEDST_ON);
+}
+
+/**
+ * led_activity_off() - turn OFF the designated LED for activity
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_activity_off(void)
+{
+ const char *led_name;
+
+ led_name = ofnode_conf_read_str("u-boot,activity-led");
+ if (!led_name)
+ return -ENOENT;
+
+ return led_set_state_by_label(led_name, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+/**
+ * led_activity_blink() - turn ON the designated LED for activity
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_activity_blink(void)
+{
+ const char *led_name;
+ int led_period, ret;
+
+ led_name = ofnode_conf_read_str("u-boot,activity-led");
+ if (!led_name)
+ return -ENOENT;
+
+ led_period = ofnode_conf_read_int("u-boot,activity-led-period", 250);
+
+ ret = led_set_period_by_label(led_name, led_period);
+ if (ret)
+ return ret;
+
+ return led_set_state_by_label(led_name, LEDST_BLINK);
+}
+#else
+/* If LED BLINK is not supported/enabled, fallback to LED ON */
+#define led_activity_blink led_activity_on
+#endif
+#endif
+
#endif
--
2.45.2
[PATCH v3 4/9] common: board_r: rework BOOT LED handling
Rework BOOT LED handling. There is currently one legacy implementation
for BOOT LED from Status Led API.
This work on ancient implementation wused by BOOTP by setting the LED
to Blink on boot and to turn it OFF when the firmware was correctly
received by network.
Now that we new LED implementation have support for LED boot, rework
this by also set the new BOOT LED to blink and also set it to ON before
entering main loop to confirm successful boot.
Signed-off-by: Christian Marangi
---
common/board_r.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index d4ba245ac69..57957b4e99b 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -462,14 +463,30 @@ static int initr_malloc_bootparams(void)
#if defined(CONFIG_LED_STATUS)
static int initr_status_led(void)
{
-#if defined(CONFIG_LED_STATUS_BOOT)
- status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
-#else
status_led_init();
+
+ return 0;
+}
+#endif
+
+static int initr_boot_led_blink(void)
+{
+#ifdef CONFIG_LED_STATUS_BOOT
+ status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
+#endif
+#ifdef CONFIG_LED_BOOT_ENABLE
+ led_boot_blink();
#endif
return 0;
}
+
+static int initr_boot_led_on(void)
+{
+#ifdef CONFIG_LED_BOOT_ENABLE
+ led_boot_on();
#endif
+ return 0;
+}
#ifdef CONFIG_CMD_NET
static int initr_net(void)
@@ -716,6 +733,7 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_LED_STATUS)
initr_status_led,
#endif
+ initr_boot_led_blink,
/* PPC has a udelay(20) here dating from 2002. Why? */
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
@@ -738,6 +756,7 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CFG_PRAM)
initr_mem,
#endif
+ initr_boot_led_on,
run_main_loop,
};
--
2.45.2
[PATCH v3 3/9] led: implement LED boot API
Implement LED boot API to signal correct boot of the system.
led_boot_on/off/blink() are introduced to turn ON, OFF and BLINK the
designated boot LED.
New Kconfig are introduced, CONFIG_LED_BOOT_ENABLE to enable the feature.
This makes use of the /config property "u-boot,boot-led" to the define
the boot LED.
It's also introduced a new /config property "u-boot,boot-led-period" to
define the default period when the LED is set to blink mode.
If "u-boot,boot-led-period" is not defined, the value of 250 (ms) is
used by default.
If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
led_boot_blink call will fallback to simple LED ON.
Signed-off-by: Christian Marangi
---
doc/device-tree-bindings/config.txt | 3 ++
drivers/led/Kconfig | 20 +
include/led.h | 64 +
3 files changed, 87 insertions(+)
diff --git a/doc/device-tree-bindings/config.txt
b/doc/device-tree-bindings/config.txt
index f50c68bbdc3..68edd177040 100644
--- a/doc/device-tree-bindings/config.txt
+++ b/doc/device-tree-bindings/config.txt
@@ -31,6 +31,9 @@ u-boot,error-led (string)
This is used to specify the label for an LED to indicate an error and
a successful boot, on supported hardware.
+u-boot,boot-led-period (int)
+ This is used to specify the default period for an LED in blink mode.
+
bootsecure (int)
Indicates that U-Boot should use secure_boot_cmd() to run commands,
rather than the normal CLI. This can be used in production images, to
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index bee74b25751..fd9442edaf3 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -9,6 +9,26 @@ config LED
can provide access to board-specific LEDs. Use of the device tree
for configuration is encouraged.
+config LED_BOOT_ENABLE
+ bool "Enable LED boot support"
+ help
+ Enable LED boot support.
+
+ LED boot is a specific LED assigned to signal boot operation status.
+
+config LED_BOOT_LABEL
+ string "LED boot label"
+ depends on LED_BOOT_ENABLE
+ help
+ LED label defined in DT to assign for LED boot usage.
+
+config LED_BOOT_PERIOD
+ int "LED boot period"
+ depends on LED_BOOT_ENABLE && (LED_BLINK || LED_SW_BLINK)
+ default 2
+ help
+ LED boot blink period in ms.
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/include/led.h b/include/led.h
index c1f3380f253..2d3b89674e2 100644
--- a/include/led.h
+++ b/include/led.h
@@ -9,6 +9,7 @@
#include
#include
+#include
struct udevice;
@@ -159,4 +160,67 @@ int led_sw_set_period(struct udevice *dev, int period_ms);
bool led_sw_is_blinking(struct udevice *dev);
bool led_sw_on_state_change(struct udevice *dev, enum led_state_t state);
+#ifdef CONFIG_LED_BOOT_ENABLE
+
+/**
+ * led_boot_on() - turn ON the designated LED for booting
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_boot_on(void)
+{
+ const char *led_name;
+
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
+ if (!led_name)
+ return -ENOENT;
+
+ return led_set_state_by_label(led_name, LEDST_ON);
+}
+
+/**
+ * led_boot_off() - turn OFF the designated LED for booting
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_boot_off(void)
+{
+ const char *led_name;
+
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
+ if (!led_name)
+ return -ENOENT;
+
+ return led_set_state_by_label(CONFIG_LED_BOOT_LABEL, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+/**
+ * led_boot_blink() - turn ON the designated LED for booting
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_boot_blink(void)
+{
+ const char *led_name;
+ int led_period, ret;
+
+ led_name = ofnode_conf_read_str("u-boot,boot-led");
+ if (!led_name)
+ return -ENOENT;
+
+ led_period = ofnode_conf_read_int("u-boot,boot-led-period", 250);
+
+ ret = led_set_period_by_label(led_name, led_period);
+ if (ret)
+ return ret;
+
+ return led_set_state_by_label(led_name, LEDST_BLINK);
+}
+#else
+/* If LED BLINK is not supported/enabled, fallback to LED ON */
+#define led_boot_blink led_boot_on
+#endif
+#endif
+
#endif
--
2.45.2
[PATCH v3 2/9] led: implement led_set_state/period_by_label
Introduce new API led_set_state/period_by label as a shorthand to set
LED state and LED blink period by referencing them by label.
This is needed for the upcoming additional API that will declare LED in
.confg and reference them by their LED label name.
Signed-off-by: Christian Marangi
---
drivers/led/led-uclass.c | 28
include/led.h| 18 ++
2 files changed, 46 insertions(+)
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 199d68bc25a..b2b96d7d48b 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -65,6 +65,20 @@ int led_set_state(struct udevice *dev, enum led_state_t
state)
return ops->set_state(dev, state);
}
+int led_set_state_by_label(const char *label, enum led_state_t state)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_get_by_label(label, &dev);
+ if (ret) {
+ printf("Failed to get LED by label %s\n", label);
+ return ret;
+ }
+
+ return led_set_state(dev, state);
+}
+
enum led_state_t led_get_state(struct udevice *dev)
{
struct led_ops *ops = led_get_ops(dev);
@@ -94,6 +108,20 @@ int led_set_period(struct udevice *dev, int period_ms)
return -ENOSYS;
}
+int led_set_period_by_label(const char *label, int period_ms)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_get_by_label(label, &dev);
+ if (ret) {
+ printf("Failed to get LED by label %s\n", label);
+ return ret;
+ }
+
+ return led_set_period(dev, period_ms);
+}
+
static int led_post_bind(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
diff --git a/include/led.h b/include/led.h
index 99f93c5ef86..c1f3380f253 100644
--- a/include/led.h
+++ b/include/led.h
@@ -111,6 +111,15 @@ int led_get_by_label(const char *label, struct udevice
**devp);
*/
int led_set_state(struct udevice *dev, enum led_state_t state);
+/**
+ * led_set_state_by_label - set the state of an LED referenced by Label
+ *
+ * @label: LED label
+ * @state: LED state to set
+ * Return: 0 if OK, -ve on error
+ */
+int led_set_state_by_label(const char *label, enum led_state_t state);
+
/**
* led_get_state() - get the state of an LED
*
@@ -128,6 +137,15 @@ enum led_state_t led_get_state(struct udevice *dev);
*/
int led_set_period(struct udevice *dev, int period_ms);
+/**
+ * led_set_period_by_label - set the blink period of an LED referenced by Label
+ *
+ * @label: LED label
+ * @period_ms: LED blink period in milliseconds
+ * Return: 0 if OK, -ve on error
+ */
+int led_set_period_by_label(const char *label, int period_ms);
+
/**
* led_bind_generic() - bind children of parent to given driver
*
--
2.45.2
[PATCH v3 1/9] led: turn LED ON on initial SW blink
We currently init the LED OFF when SW blink is triggered when
on_state_change() is called. This can be problematic for very short
period as the ON/OFF blink might never trigger.
Turn LED ON on initial SW blink to handle this corner case and better
display a LED blink from the user.
Signed-off-by: Christian Marangi
---
drivers/led/led_sw_blink.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
index 9e36edbee47..853278670b9 100644
--- a/drivers/led/led_sw_blink.c
+++ b/drivers/led/led_sw_blink.c
@@ -103,8 +103,11 @@ bool led_sw_on_state_change(struct udevice *dev, enum
led_state_t state)
return false;
if (state == LEDST_BLINK) {
+ struct led_ops *ops = led_get_ops(dev);
+
+ ops->set_state(dev, LEDST_ON);
/* start blinking on next led_sw_blink() call */
- sw_blink->state = LED_SW_BLINK_ST_OFF;
+ sw_blink->state = LED_SW_BLINK_ST_ON;
return true;
}
--
2.45.2
[PATCH v3 0/9] led: introduce LED boot and activity function
This series is a reworked version of the previous seried: misc: introduce STATUS LED activity function This series port and expand the legacy concept of LED boot from the legacy Status LED API to new LED API. One thing that many device need is a way to communicate to the user that the device is actually doing something. This is especially useful for recovery steps where an user (for example) insert an USB drive, keep a button pressed and the device autorecover. There is currently no way to signal the user externally that the bootloader is processing/recoverying aside from setting a LED on. A solid LED on is not enough and won't actually signal any kind of progress. Solution is the good old blinking LED but uboot doesn't suggest (and support) interrupts and almost all the LED are usually GPIO LED that doesn't support HW blink. Additional Kconfg are also introduced to set the LED boot and activity. Those are referenced by label. A documentation for old and these new LED API is created. (world tested with the azure pipeline) Changes v3: - Switch to /config property Changes v2: - Drop GPIO SW implementation - Add fix for new LED SW BLINK Christian Marangi (9): led: turn LED ON on initial SW blink led: implement led_set_state/period_by_label led: implement LED boot API common: board_r: rework BOOT LED handling led: implement LED activity API tftp: implement support for LED activity mtd: implement support for LED activity ubi: implement support for LED activity doc: introduce led.rst documentation cmd/mtd.c | 19 +++ cmd/ubi.c | 17 ++- common/board_r.c| 25 +++- doc/api/index.rst | 1 + doc/api/led.rst | 10 ++ doc/device-tree-bindings/config.txt | 7 ++ drivers/led/Kconfig | 41 +++ drivers/led/led-uclass.c| 28 + drivers/led/led_sw_blink.c | 5 +- include/led.h | 184 net/tftp.c | 7 ++ 11 files changed, 338 insertions(+), 6 deletions(-) create mode 100644 doc/api/led.rst -- 2.45.2
Re: [PATCH v2 9/9] doc: introduce led.rst documentation
On Thu, Aug 08, 2024 at 08:34:32AM +0200, Alexander Dahl wrote:
> Hello Christian,
>
> Am Wed, Aug 07, 2024 at 09:54:12PM +0200 schrieb Christian Marangi:
> > Introduce simple led.rst documentation to document all the additional
> > Kconfig and the current limitation of LED_BLINK and GPIO software blink.
>
> This is a good idea. An overview of all the LED possibilities in the
> Documentation is much appreciated. Remarks below.
>
> >
> > Signed-off-by: Christian Marangi
> > ---
> > doc/api/index.rst | 1 +
> > doc/api/led.rst | 10 ++
> > include/led.h | 38 ++
> > 3 files changed, 49 insertions(+)
> > create mode 100644 doc/api/led.rst
> >
> > diff --git a/doc/api/index.rst b/doc/api/index.rst
> > index ec0b8adb2cf..9f7f23f868f 100644
> > --- a/doc/api/index.rst
> > +++ b/doc/api/index.rst
> > @@ -14,6 +14,7 @@ U-Boot API documentation
> > event
> > getopt
> > interrupt
> > + led
> > linker_lists
> > lmb
> > logging
> > diff --git a/doc/api/led.rst b/doc/api/led.rst
> > new file mode 100644
> > index 000..e52e350d1bb
> > --- /dev/null
> > +++ b/doc/api/led.rst
> > @@ -0,0 +1,10 @@
> > +.. SPDX-License-Identifier: GPL-2.0+
> > +
> > +LED
> > +===
> > +
> > +.. kernel-doc:: include/led.h
> > + :doc: Overview
> > +
> > +.. kernel-doc:: include/led.h
> > + :internal:
> > \ No newline at end of file
> > diff --git a/include/led.h b/include/led.h
> > index 61ece70a975..77b18ddffbf 100644
> > --- a/include/led.h
> > +++ b/include/led.h
> > @@ -10,6 +10,44 @@
> > #include
> > #include
> >
> > +/**
> > + * DOC: Overview
> > + *
> > + * Generic LED API provided when a supported compatible is defined in
> > DeviceTree.
> > + *
> > + * To enable support for LEDs, enable the `CONFIG_LED` Kconfig option.
> > + *
> > + * The most common implementation is for GPIO-connected LEDs. If using
> > GPIO-connected LEDs,
> > + * enable the `LED_GPIO` Kconfig option.
> > + *
> > + * `LED_BLINK` support requires LED driver support and is therefore
> > optional. If LED blink
> > + * functionality is needed, enable the `LED_BLINK` Kconfig option. If LED
> > driver doesn't
> > + * support HW Blink, SW Blink can be used with the Cyclic framework by
> > enabling the
> > + * CONFIG_LED_SW_BLINK.
> > + *
> > + * Boot and Activity LEDs are also supported. These LEDs can signal
> > various system operations
> > + * during runtime, such as boot initialization, file transfers, and flash
> > write/erase operations.
> > + *
> > + * To enable a Boot LED, enable `CONFIG_LED_BOOT_ENABLE` and define
> > `CONFIG_LED_BOOT_LABEL`. This
> > + * will enable the specified LED to blink and turn ON when the bootloader
> > initializes correctly.
>
> This is somehow redundant to defining "u-boot,boot-led" in
> *-u-boot.dtsi snippets, isn't it? This is documented in
> doc/device-tree-bindings/config.txt and used by roughly a dozen dtsi
> files and five times in board code. It also stores a LED label, which
> board code can make use of then, but I think it's not further
> integrated in any driver or class code. Are you aware of that mechanism
> and hwo does it fit into your rework of the boot led?
>
No I wasn't aware of those property. I will check how that can be
expanded and implemented here as it seems a better way than raw configs.
>
> > + *
> > + * To enable an Activity LED, enable `CONFIG_LED_ACTIVITY_ENABLE` and
> > define
> > + * `CONFIG_LED_ACTIVITY_LABEL`.
> > + * This will enable the specified LED to blink and turn ON during file
> > transfers or flash
> > + * write/erase operations.
> > + *
> > + * Both Boot and Activity LEDs provide a simple API to turn the LED ON or
> > OFF:
> > + * `led_boot_on()`, `led_boot_off()`, `led_activity_on()`, and
> > `led_activity_off()`.
> > + *
> > + * Both configurations can optionally define a `_PERIOD` option if
> > `CONFIG_LED_BLINK` or
> > + * `CONFIG_LED_SW_BLINK` is enabled for LED blink operations, which is
> > usually used by
> > + * the Activity LED.
> > + *
> > + * When `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled, additional
> > APIs are exposed:
> > + * `led_boot_blink()` and `led_activity_blink()`. Note that if
> > `CONFIG_LED_BLINK` is disabled,
> > + * these APIs will behave like the `led_boot_on()` and `led_activity_on()`
> > APIs, respectively.
> > + */
> > +
> > struct udevice;
> >
> > enum led_state_t {
> > --
> > 2.45.2
> >
--
Ansuel
[PATCH v2 9/9] doc: introduce led.rst documentation
Introduce simple led.rst documentation to document all the additional
Kconfig and the current limitation of LED_BLINK and GPIO software blink.
Signed-off-by: Christian Marangi
---
doc/api/index.rst | 1 +
doc/api/led.rst | 10 ++
include/led.h | 38 ++
3 files changed, 49 insertions(+)
create mode 100644 doc/api/led.rst
diff --git a/doc/api/index.rst b/doc/api/index.rst
index ec0b8adb2cf..9f7f23f868f 100644
--- a/doc/api/index.rst
+++ b/doc/api/index.rst
@@ -14,6 +14,7 @@ U-Boot API documentation
event
getopt
interrupt
+ led
linker_lists
lmb
logging
diff --git a/doc/api/led.rst b/doc/api/led.rst
new file mode 100644
index 000..e52e350d1bb
--- /dev/null
+++ b/doc/api/led.rst
@@ -0,0 +1,10 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LED
+===
+
+.. kernel-doc:: include/led.h
+ :doc: Overview
+
+.. kernel-doc:: include/led.h
+ :internal:
\ No newline at end of file
diff --git a/include/led.h b/include/led.h
index 61ece70a975..77b18ddffbf 100644
--- a/include/led.h
+++ b/include/led.h
@@ -10,6 +10,44 @@
#include
#include
+/**
+ * DOC: Overview
+ *
+ * Generic LED API provided when a supported compatible is defined in
DeviceTree.
+ *
+ * To enable support for LEDs, enable the `CONFIG_LED` Kconfig option.
+ *
+ * The most common implementation is for GPIO-connected LEDs. If using
GPIO-connected LEDs,
+ * enable the `LED_GPIO` Kconfig option.
+ *
+ * `LED_BLINK` support requires LED driver support and is therefore optional.
If LED blink
+ * functionality is needed, enable the `LED_BLINK` Kconfig option. If LED
driver doesn't
+ * support HW Blink, SW Blink can be used with the Cyclic framework by
enabling the
+ * CONFIG_LED_SW_BLINK.
+ *
+ * Boot and Activity LEDs are also supported. These LEDs can signal various
system operations
+ * during runtime, such as boot initialization, file transfers, and flash
write/erase operations.
+ *
+ * To enable a Boot LED, enable `CONFIG_LED_BOOT_ENABLE` and define
`CONFIG_LED_BOOT_LABEL`. This
+ * will enable the specified LED to blink and turn ON when the bootloader
initializes correctly.
+ *
+ * To enable an Activity LED, enable `CONFIG_LED_ACTIVITY_ENABLE` and define
+ * `CONFIG_LED_ACTIVITY_LABEL`.
+ * This will enable the specified LED to blink and turn ON during file
transfers or flash
+ * write/erase operations.
+ *
+ * Both Boot and Activity LEDs provide a simple API to turn the LED ON or OFF:
+ * `led_boot_on()`, `led_boot_off()`, `led_activity_on()`, and
`led_activity_off()`.
+ *
+ * Both configurations can optionally define a `_PERIOD` option if
`CONFIG_LED_BLINK` or
+ * `CONFIG_LED_SW_BLINK` is enabled for LED blink operations, which is usually
used by
+ * the Activity LED.
+ *
+ * When `CONFIG_LED_BLINK` or `CONFIG_LED_SW_BLINK` is enabled, additional
APIs are exposed:
+ * `led_boot_blink()` and `led_activity_blink()`. Note that if
`CONFIG_LED_BLINK` is disabled,
+ * these APIs will behave like the `led_boot_on()` and `led_activity_on()`
APIs, respectively.
+ */
+
struct udevice;
enum led_state_t {
--
2.45.2
[PATCH v2 8/9] ubi: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal ubi write operation.
Signed-off-by: Christian Marangi
---
cmd/ubi.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/cmd/ubi.c b/cmd/ubi.c
index 92998af2b02..e663e6dfafb 100644
--- a/cmd/ubi.c
+++ b/cmd/ubi.c
@@ -14,6 +14,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -425,7 +426,19 @@ int ubi_volume_begin_write(char *volume, void *buf, size_t
size,
int ubi_volume_write(char *volume, void *buf, size_t size)
{
- return ubi_volume_begin_write(volume, buf, size, size);
+ int ret;
+
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_blink();
+#endif
+
+ ret = ubi_volume_begin_write(volume, buf, size, size);
+
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_off();
+#endif
+
+ return ret;
}
int ubi_volume_read(char *volume, char *buf, size_t size)
--
2.45.2
[PATCH v2 7/9] mtd: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal mtd write or erase operations.
Signed-off-by: Christian Marangi
---
cmd/mtd.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/cmd/mtd.c b/cmd/mtd.c
index 795aaa2b37d..ba5ee0d4d71 100644
--- a/cmd/mtd.c
+++ b/cmd/mtd.c
@@ -10,6 +10,7 @@
#include
#include
+#include
#if CONFIG_IS_ENABLED(CMD_MTD_OTP)
#include
#endif
@@ -558,6 +559,11 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
while (mtd_block_isbad(mtd, off))
off += mtd->erasesize;
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ if (!read)
+ led_activity_blink();
+#endif
+
/* Loop over the pages to do the actual read/write */
while (remaining) {
/* Skip the block if it is bad */
@@ -585,6 +591,11 @@ static int do_mtd_io(struct cmd_tbl *cmdtp, int flag, int
argc,
io_op.oobbuf += io_op.oobretlen;
}
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ if (!read)
+ led_activity_off();
+#endif
+
if (!ret && dump)
mtd_dump_device_buf(mtd, start_off, buf, len, woob);
@@ -652,6 +663,10 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr = off;
erase_op.len = mtd->erasesize;
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_blink();
+#endif
+
while (len) {
if (!scrub) {
ret = mtd_block_isbad(mtd, erase_op.addr);
@@ -680,6 +695,10 @@ static int do_mtd_erase(struct cmd_tbl *cmdtp, int flag,
int argc,
erase_op.addr += mtd->erasesize;
}
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_off();
+#endif
+
if (ret && ret != -EIO)
ret = CMD_RET_FAILURE;
else
--
2.45.2
[PATCH v2 6/9] tftp: implement support for LED activity
Implement support for LED activity. If the feature is enabled,
make the defined ACTIVITY LED to signal traffic.
Signed-off-by: Christian Marangi
---
net/tftp.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/net/tftp.c b/net/tftp.c
index 2e073183d5a..45c2455336a 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -10,6 +10,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -192,6 +193,9 @@ static void new_transfer(void)
#ifdef CONFIG_CMD_TFTPPUT
tftp_put_final_block_sent = 0;
#endif
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_blink();
+#endif
}
#ifdef CONFIG_CMD_TFTPPUT
@@ -301,6 +305,9 @@ static void tftp_complete(void)
time_start * 1000, "/s");
}
puts("\ndone\n");
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+ led_activity_off();
+#endif
if (!tftp_put_active)
efi_set_bootdev("Net", "", tftp_filename,
map_sysmem(tftp_load_addr, 0),
--
2.45.2
[PATCH v2 5/9] led: implement LED activity API
Implement LED activity API similar to BOOT LED API.
Usual activity might be a file transfer with TFTP, a flash write...
User of this API will call led_activity_on/off/blink() to signal these
kind of activity.
New Kconfig are implemented similar to BOOT LED, LED_ACTIVITY_ENABLE to
enable support for it, LED_ACTIVITY_LABEL to assign the LED in DT for
activity usage and LED_ACTIVITY_PERIOD to set the blinking period.
Signed-off-by: Christian Marangi
---
drivers/led/Kconfig | 21 +
include/led.h | 44
2 files changed, 65 insertions(+)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index fd9442edaf3..1336f943dab 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -29,6 +29,27 @@ config LED_BOOT_PERIOD
help
LED boot blink period in ms.
+config LED_ACTIVITY_ENABLE
+ bool "Enable LED activity support"
+ help
+ Enable LED activity support.
+
+ LED activity is a specific LED assigned to signal activity operation
+ like file trasnfer, flash write/erase...
+
+config LED_ACTIVITY_LABEL
+ string "LED activity label"
+ depends on LED_ACTIVITY_ENABLE
+ help
+ LED label defined in DT to assign for LED activity usage.
+
+config LED_ACTIVITY_PERIOD
+ int "LED activity period"
+ depends on LED_ACTIVITY_ENABLE && (LED_BLINK || LED_SW_BLINK)
+ default 2
+ help
+ LED activity blink period in ms.
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/include/led.h b/include/led.h
index 7bbe165d838..61ece70a975 100644
--- a/include/led.h
+++ b/include/led.h
@@ -203,4 +203,48 @@ static inline int led_boot_blink(void)
#endif
#endif
+#ifdef CONFIG_LED_ACTIVITY_ENABLE
+
+/**
+ * led_activity_on() - turn ON the designated LED for activity
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_activity_on(void)
+{
+ return led_set_state_by_label(CONFIG_LED_ACTIVITY_LABEL, LEDST_ON);
+}
+
+/**
+ * led_activity_off() - turn OFF the designated LED for activity
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_activity_off(void)
+{
+ return led_set_state_by_label(CONFIG_LED_ACTIVITY_LABEL, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+/**
+ * led_activity_blink() - turn ON the designated LED for activity
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_activity_blink(void)
+{
+ int ret;
+
+ ret = led_set_period_by_label(CONFIG_LED_ACTIVITY_LABEL,
CONFIG_LED_BOOT_PERIOD);
+ if (ret)
+ return ret;
+
+ return led_set_state_by_label(CONFIG_LED_ACTIVITY_LABEL, LEDST_BLINK);
+}
+#else
+/* If LED BLINK is not supported/enabled, fallback to LED ON */
+#define led_activity_blink led_activity_on
+#endif
+#endif
+
#endif
--
2.45.2
[PATCH v2 4/9] common: board_r: rework BOOT LED handling
Rework BOOT LED handling. There is currently one legacy implementation
for BOOT LED from Status Led API.
This work on ancient implementation wused by BOOTP by setting the LED
to Blink on boot and to turn it OFF when the firmware was correctly
received by network.
Now that we new LED implementation have support for LED boot, rework
this by also set the new BOOT LED to blink and also set it to ON before
entering main loop to confirm successful boot.
Signed-off-by: Christian Marangi
---
common/board_r.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index d4ba245ac69..57957b4e99b 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -462,14 +463,30 @@ static int initr_malloc_bootparams(void)
#if defined(CONFIG_LED_STATUS)
static int initr_status_led(void)
{
-#if defined(CONFIG_LED_STATUS_BOOT)
- status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
-#else
status_led_init();
+
+ return 0;
+}
+#endif
+
+static int initr_boot_led_blink(void)
+{
+#ifdef CONFIG_LED_STATUS_BOOT
+ status_led_set(CONFIG_LED_STATUS_BOOT, CONFIG_LED_STATUS_BLINKING);
+#endif
+#ifdef CONFIG_LED_BOOT_ENABLE
+ led_boot_blink();
#endif
return 0;
}
+
+static int initr_boot_led_on(void)
+{
+#ifdef CONFIG_LED_BOOT_ENABLE
+ led_boot_on();
#endif
+ return 0;
+}
#ifdef CONFIG_CMD_NET
static int initr_net(void)
@@ -716,6 +733,7 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CONFIG_LED_STATUS)
initr_status_led,
#endif
+ initr_boot_led_blink,
/* PPC has a udelay(20) here dating from 2002. Why? */
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
@@ -738,6 +756,7 @@ static init_fnc_t init_sequence_r[] = {
#if defined(CFG_PRAM)
initr_mem,
#endif
+ initr_boot_led_on,
run_main_loop,
};
--
2.45.2
[PATCH v2 3/9] led: implement LED boot API
Implement LED boot API to signal correct boot of the system.
led_boot_on/off/blink() are introduced to turn ON, OFF and BLINK the
designated boot LED.
New Kconfig are introduced, CONFIG_LED_BOOT_ENABLE to enable the feature,
CONFIG_LED_BOOT_LABEL to declare the LED label in DT to reference
the LED for BOOT usage and CONFIG_LED_BOOT_PERIOD to declare the
blinking period.
If CONFIG_LED_BLINK or CONFIG_LED_SW_BLINK is not enabled,
led_boot_blink call will fallback to simple LED ON.
Signed-off-by: Christian Marangi
---
drivers/led/Kconfig | 20
include/led.h | 44
2 files changed, 64 insertions(+)
diff --git a/drivers/led/Kconfig b/drivers/led/Kconfig
index bee74b25751..fd9442edaf3 100644
--- a/drivers/led/Kconfig
+++ b/drivers/led/Kconfig
@@ -9,6 +9,26 @@ config LED
can provide access to board-specific LEDs. Use of the device tree
for configuration is encouraged.
+config LED_BOOT_ENABLE
+ bool "Enable LED boot support"
+ help
+ Enable LED boot support.
+
+ LED boot is a specific LED assigned to signal boot operation status.
+
+config LED_BOOT_LABEL
+ string "LED boot label"
+ depends on LED_BOOT_ENABLE
+ help
+ LED label defined in DT to assign for LED boot usage.
+
+config LED_BOOT_PERIOD
+ int "LED boot period"
+ depends on LED_BOOT_ENABLE && (LED_BLINK || LED_SW_BLINK)
+ default 2
+ help
+ LED boot blink period in ms.
+
config LED_BCM6328
bool "LED Support for BCM6328"
depends on LED && ARCH_BMIPS
diff --git a/include/led.h b/include/led.h
index c1f3380f253..7bbe165d838 100644
--- a/include/led.h
+++ b/include/led.h
@@ -159,4 +159,48 @@ int led_sw_set_period(struct udevice *dev, int period_ms);
bool led_sw_is_blinking(struct udevice *dev);
bool led_sw_on_state_change(struct udevice *dev, enum led_state_t state);
+#ifdef CONFIG_LED_BOOT_ENABLE
+
+/**
+ * led_boot_on() - turn ON the designated LED for booting
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_boot_on(void)
+{
+ return led_set_state_by_label(CONFIG_LED_BOOT_LABEL, LEDST_ON);
+}
+
+/**
+ * led_boot_off() - turn OFF the designated LED for booting
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_boot_off(void)
+{
+ return led_set_state_by_label(CONFIG_LED_BOOT_LABEL, LEDST_OFF);
+}
+
+#if defined(CONFIG_LED_BLINK) || defined(CONFIG_LED_SW_BLINK)
+/**
+ * led_boot_blink() - turn ON the designated LED for booting
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static inline int led_boot_blink(void)
+{
+ int ret;
+
+ ret = led_set_period_by_label(CONFIG_LED_BOOT_LABEL,
CONFIG_LED_BOOT_PERIOD);
+ if (ret)
+ return ret;
+
+ return led_set_state_by_label(CONFIG_LED_BOOT_LABEL, LEDST_BLINK);
+}
+#else
+/* If LED BLINK is not supported/enabled, fallback to LED ON */
+#define led_boot_blink led_boot_on
+#endif
+#endif
+
#endif
--
2.45.2
[PATCH v2 2/9] led: implement led_set_state/period_by_label
Introduce new API led_set_state/period_by label as a shorthand to set
LED state and LED blink period by referencing them by label.
This is needed for the upcoming additional API that will declare LED in
.confg and reference them by their LED label name.
Signed-off-by: Christian Marangi
---
drivers/led/led-uclass.c | 28
include/led.h| 18 ++
2 files changed, 46 insertions(+)
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 199d68bc25a..b2b96d7d48b 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -65,6 +65,20 @@ int led_set_state(struct udevice *dev, enum led_state_t
state)
return ops->set_state(dev, state);
}
+int led_set_state_by_label(const char *label, enum led_state_t state)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_get_by_label(label, &dev);
+ if (ret) {
+ printf("Failed to get LED by label %s\n", label);
+ return ret;
+ }
+
+ return led_set_state(dev, state);
+}
+
enum led_state_t led_get_state(struct udevice *dev)
{
struct led_ops *ops = led_get_ops(dev);
@@ -94,6 +108,20 @@ int led_set_period(struct udevice *dev, int period_ms)
return -ENOSYS;
}
+int led_set_period_by_label(const char *label, int period_ms)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = led_get_by_label(label, &dev);
+ if (ret) {
+ printf("Failed to get LED by label %s\n", label);
+ return ret;
+ }
+
+ return led_set_period(dev, period_ms);
+}
+
static int led_post_bind(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_plat(dev);
diff --git a/include/led.h b/include/led.h
index 99f93c5ef86..c1f3380f253 100644
--- a/include/led.h
+++ b/include/led.h
@@ -111,6 +111,15 @@ int led_get_by_label(const char *label, struct udevice
**devp);
*/
int led_set_state(struct udevice *dev, enum led_state_t state);
+/**
+ * led_set_state_by_label - set the state of an LED referenced by Label
+ *
+ * @label: LED label
+ * @state: LED state to set
+ * Return: 0 if OK, -ve on error
+ */
+int led_set_state_by_label(const char *label, enum led_state_t state);
+
/**
* led_get_state() - get the state of an LED
*
@@ -128,6 +137,15 @@ enum led_state_t led_get_state(struct udevice *dev);
*/
int led_set_period(struct udevice *dev, int period_ms);
+/**
+ * led_set_period_by_label - set the blink period of an LED referenced by Label
+ *
+ * @label: LED label
+ * @period_ms: LED blink period in milliseconds
+ * Return: 0 if OK, -ve on error
+ */
+int led_set_period_by_label(const char *label, int period_ms);
+
/**
* led_bind_generic() - bind children of parent to given driver
*
--
2.45.2
[PATCH v2 1/9] led: turn LED ON on initial SW blink
We currently init the LED OFF when SW blink is triggered when
on_state_change() is called. This can be problematic for very short
period as the ON/OFF blink might never trigger.
Turn LED ON on initial SW blink to handle this corner case and better
display a LED blink from the user.
Signed-off-by: Christian Marangi
---
drivers/led/led_sw_blink.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/led/led_sw_blink.c b/drivers/led/led_sw_blink.c
index 9e36edbee47..853278670b9 100644
--- a/drivers/led/led_sw_blink.c
+++ b/drivers/led/led_sw_blink.c
@@ -103,8 +103,11 @@ bool led_sw_on_state_change(struct udevice *dev, enum
led_state_t state)
return false;
if (state == LEDST_BLINK) {
+ struct led_ops *ops = led_get_ops(dev);
+
+ ops->set_state(dev, LEDST_ON);
/* start blinking on next led_sw_blink() call */
- sw_blink->state = LED_SW_BLINK_ST_OFF;
+ sw_blink->state = LED_SW_BLINK_ST_ON;
return true;
}
--
2.45.2
[PATCH v2 0/9] led: introduce LED boot and activity function
This series is a reworked version of the previous seried: misc: introduce STATUS LED activity function This series port and expand the legacy concept of LED boot from the legacy Status LED API to new LED API. One thing that many device need is a way to communicate to the user that the device is actually doing something. This is especially useful for recovery steps where an user (for example) insert an USB drive, keep a button pressed and the device autorecover. There is currently no way to signal the user externally that the bootloader is processing/recoverying aside from setting a LED on. A solid LED on is not enough and won't actually signal any kind of progress. Solution is the good old blinking LED but uboot doesn't suggest (and support) interrupts and almost all the LED are usually GPIO LED that doesn't support HW blink. Additional Kconfg are also introduced to set the LED boot and activity. Those are referenced by label. A documentation for old and these new LED API is created. (world tested with the azure pipeline) Changes v2: - Drop GPIO SW implementation - Add fix for new LED SW BLINK Christian Marangi (9): led: turn LED ON on initial SW blink led: implement led_set_state/period_by_label led: implement LED boot API common: board_r: rework BOOT LED handling led: implement LED activity API tftp: implement support for LED activity mtd: implement support for LED activity ubi: implement support for LED activity doc: introduce led.rst documentation cmd/mtd.c | 19 + cmd/ubi.c | 15 +++- common/board_r.c | 25 ++- doc/api/index.rst | 1 + doc/api/led.rst| 10 +++ drivers/led/Kconfig| 41 +++ drivers/led/led-uclass.c | 28 drivers/led/led_sw_blink.c | 5 +- include/led.h | 144 + net/tftp.c | 7 ++ 10 files changed, 290 insertions(+), 5 deletions(-) create mode 100644 doc/api/led.rst -- 2.45.2
[PATCH v2 8/8] clk: mediatek: mt7622: add missing A1/2SYS clock ID
Add missing A1/2SYS clock ID just as a reference for OF_UPSTREAM support. These clocks are not defined and are not usable as current clock topckgen OPs doesn't support gates. These special node won't ever be used by uboot hence just add them for reference. Signed-off-by: Christian Marangi --- include/dt-bindings/clock/mt7622-clk.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/dt-bindings/clock/mt7622-clk.h b/include/dt-bindings/clock/mt7622-clk.h index cd11a1c901e..cdbcaef76eb 100644 --- a/include/dt-bindings/clock/mt7622-clk.h +++ b/include/dt-bindings/clock/mt7622-clk.h @@ -117,6 +117,8 @@ #define CLK_TOP_I2S1_MCK_DIV_PD104 #define CLK_TOP_I2S2_MCK_DIV_PD105 #define CLK_TOP_I2S3_MCK_DIV_PD106 +#define CLK_TOP_A1SYS_HP_DIV_PD107 +#define CLK_TOP_A2SYS_HP_DIV_PD108 /* INFRACFG */ -- 2.45.2
[PATCH v2 7/8] clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock
Add missing PERIBUS_SEL clock to match upstream linux clk ID order. Also
convert pericfg to mux + gate implementation as now we have also mux on
top of gates.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 22 +-
include/dt-bindings/clock/mt7622-clk.h | 59 +-
2 files changed, 51 insertions(+), 30 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/clk/mediatek/clk-mt7622.c
index 5df62e64c9a..23b9787612a 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -422,6 +422,18 @@ static const struct mtk_gate infra_cgs[] = {
};
/* pericfg */
+static const int peribus_ck_parents[] = {
+ CLK_TOP_SYSPLL1_D8,
+ CLK_TOP_SYSPLL1_D4,
+};
+
+#define PERI_MUX(_id, _parents, _reg, _shift, _width) \
+ MUX_FLAGS(_id, _parents, _reg, _shift, _width, CLK_PARENT_TOPCKGEN)
+
+static const struct mtk_composite peri_muxes[] = {
+ PERI_MUX(CLK_PERIBUS_SEL, peribus_ck_parents, 0x05c, 0, 1),
+};
+
static const struct mtk_gate_regs peri0_cg_regs = {
.set_ofs = 0x8,
.clr_ofs = 0x10,
@@ -602,6 +614,14 @@ static const struct mtk_clk_tree mt7622_infra_clk_tree = {
.gates = infra_cgs,
};
+static const struct mtk_clk_tree mt7622_peri_clk_tree = {
+ .xtal_rate = 25 * MHZ,
+ .muxes_offs = CLK_PERIBUS_SEL,
+ .gates_offs = CLK_PERI_THERM_PD,
+ .muxes = peri_muxes,
+ .gates = peri_cgs,
+};
+
static const struct mtk_clk_tree mt7622_clk_tree = {
.xtal_rate = 25 * MHZ,
.fdivs_offs = CLK_TOP_TO_USB3_SYS,
@@ -658,7 +678,7 @@ static int mt7622_infracfg_probe(struct udevice *dev)
static int mt7622_pericfg_probe(struct udevice *dev)
{
- return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, peri_cgs);
+ return mtk_common_clk_infrasys_init(dev, &mt7622_peri_clk_tree);
}
static int mt7622_pciesys_probe(struct udevice *dev)
diff --git a/include/dt-bindings/clock/mt7622-clk.h
b/include/dt-bindings/clock/mt7622-clk.h
index 4b6501c1020..cd11a1c901e 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -130,35 +130,36 @@
/* PERICFG */
-#define CLK_PERI_THERM_PD 0
-#define CLK_PERI_PWM1_PD 1
-#define CLK_PERI_PWM2_PD 2
-#define CLK_PERI_PWM3_PD 3
-#define CLK_PERI_PWM4_PD 4
-#define CLK_PERI_PWM5_PD 5
-#define CLK_PERI_PWM6_PD 6
-#define CLK_PERI_PWM7_PD 7
-#define CLK_PERI_PWM_PD8
-#define CLK_PERI_AP_DMA_PD 9
-#define CLK_PERI_MSDC30_0_PD 10
-#define CLK_PERI_MSDC30_1_PD 11
-#define CLK_PERI_UART0_PD 12
-#define CLK_PERI_UART1_PD 13
-#define CLK_PERI_UART2_PD 14
-#define CLK_PERI_UART3_PD 15
-#define CLK_PERI_UART4_PD 16
-#define CLK_PERI_BTIF_PD 17
-#define CLK_PERI_I2C0_PD 18
-#define CLK_PERI_I2C1_PD 19
-#define CLK_PERI_I2C2_PD 20
-#define CLK_PERI_SPI1_PD 21
-#define CLK_PERI_AUXADC_PD 22
-#define CLK_PERI_SPI0_PD 23
-#define CLK_PERI_SNFI_PD 24
-#define CLK_PERI_NFI_PD25
-#define CLK_PERI_NFIECC_PD 26
-#define CLK_PERI_FLASH_PD 27
-#define CLK_PERI_IRTX_PD 28
+#define CLK_PERIBUS_SEL0
+#define CLK_PERI_THERM_PD 1
+#define CLK_PERI_PWM1_PD 2
+#define CLK_PERI_PWM2_PD 3
+#define CLK_PERI_PWM3_PD 4
+#define CLK_PERI_PWM4_PD 5
+#define CLK_PERI_PWM5_PD 6
+#define CLK_PERI_PWM6_PD 7
+#define CLK_PERI_PWM7_PD 8
+#define CLK_PERI_PWM_PD9
+#define CLK_PERI_AP_DMA_PD 10
+#define CLK_PERI_MSDC30_0_PD 11
+#define CLK_PERI_MSDC30_1_PD 12
+#define CLK_PERI_UART0_PD 13
+#define CLK_PERI_UART1_PD 14
+#define CLK_PERI_UART2_PD 15
+#define CLK_PERI_UART3_PD 16
+#define CLK_PERI_UART4_PD 17
+#define CLK_PERI_BTIF_PD 18
+#define CLK_PERI_I2C0_PD 19
+#define CLK_PERI_I2C1_PD 20
+#define CLK_PERI_I2C2_PD 21
+#define CLK_PERI_SPI1_PD 22
+#define CLK_PERI_AUXADC_PD 23
+#define CLK_PERI_SPI0_PD 24
+#define CLK_PERI_SNFI_PD 25
+#define CLK_PERI_NFI_PD26
+#define CLK_PERI_NFIECC_PD 27
+#define CLK_PERI_FLASH_PD 28
+#define CLK_PERI_IRTX_PD 29
/* APMIXEDSYS */
--
2.45.2
[PATCH v2 6/8] clk: mediatek: mt7622: add missing clock PERI_UART4_PD
Add missing clock PERI_UART4_PD for peri clock gates. This is needed to
match upstream linux clk ID in preparation for OF_UPSTREAM.
Also convert infracfg to mux + gate implementation as now we have mux on
top of gates.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 1 +
include/dt-bindings/clock/mt7622-clk.h | 25 +
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/clk/mediatek/clk-mt7622.c
index 0da7a848163..5df62e64c9a 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -472,6 +472,7 @@ static const struct mtk_gate peri_cgs[] = {
GATE_PERI0(CLK_PERI_UART1_PD, CLK_TOP_AXI_SEL, 18),
GATE_PERI0(CLK_PERI_UART2_PD, CLK_TOP_AXI_SEL, 19),
GATE_PERI0(CLK_PERI_UART3_PD, CLK_TOP_AXI_SEL, 20),
+ GATE_PERI0(CLK_PERI_UART4_PD, CLK_TOP_AXI_SEL, 21),
GATE_PERI0(CLK_PERI_BTIF_PD, CLK_TOP_AXI_SEL, 22),
GATE_PERI0(CLK_PERI_I2C0_PD, CLK_TOP_AXI_SEL, 23),
GATE_PERI0(CLK_PERI_I2C1_PD, CLK_TOP_AXI_SEL, 24),
diff --git a/include/dt-bindings/clock/mt7622-clk.h
b/include/dt-bindings/clock/mt7622-clk.h
index 0820fab0a22..4b6501c1020 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -146,18 +146,19 @@
#define CLK_PERI_UART1_PD 13
#define CLK_PERI_UART2_PD 14
#define CLK_PERI_UART3_PD 15
-#define CLK_PERI_BTIF_PD 16
-#define CLK_PERI_I2C0_PD 17
-#define CLK_PERI_I2C1_PD 18
-#define CLK_PERI_I2C2_PD 19
-#define CLK_PERI_SPI1_PD 20
-#define CLK_PERI_AUXADC_PD 21
-#define CLK_PERI_SPI0_PD 22
-#define CLK_PERI_SNFI_PD 23
-#define CLK_PERI_NFI_PD24
-#define CLK_PERI_NFIECC_PD 25
-#define CLK_PERI_FLASH_PD 26
-#define CLK_PERI_IRTX_PD 27
+#define CLK_PERI_UART4_PD 16
+#define CLK_PERI_BTIF_PD 17
+#define CLK_PERI_I2C0_PD 18
+#define CLK_PERI_I2C1_PD 19
+#define CLK_PERI_I2C2_PD 20
+#define CLK_PERI_SPI1_PD 21
+#define CLK_PERI_AUXADC_PD 22
+#define CLK_PERI_SPI0_PD 23
+#define CLK_PERI_SNFI_PD 24
+#define CLK_PERI_NFI_PD25
+#define CLK_PERI_NFIECC_PD 26
+#define CLK_PERI_FLASH_PD 27
+#define CLK_PERI_IRTX_PD 28
/* APMIXEDSYS */
--
2.45.2
[PATCH v2 5/8] clk: mediatek: mt7622: add missing clock MUX1_SEL
Add missing infra clock MUX1_SEL needed for CPU clock. This is needed to
match the upstream clk ID order in preparation for OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 24 +++-
include/dt-bindings/clock/mt7622-clk.h | 13 +++--
2 files changed, 30 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/clk/mediatek/clk-mt7622.c
index 49adffb3b43..0da7a848163 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -384,6 +384,20 @@ static const struct mtk_composite top_muxes[] = {
};
/* infracfg */
+#define APMIXED_PARENT(_id) PARENT(_id, CLK_PARENT_APMIXED)
+#define XTAL_PARENT(_id) PARENT(_id, CLK_PARENT_XTAL)
+
+static const struct mtk_parent infra_mux1_parents[] = {
+ XTAL_PARENT(CLK_XTAL),
+ APMIXED_PARENT(CLK_APMIXED_MAINPLL),
+ APMIXED_PARENT(CLK_APMIXED_MAIN_CORE_EN),
+ APMIXED_PARENT(CLK_APMIXED_MAINPLL),
+};
+
+static const struct mtk_composite infra_muxes[] = {
+ MUX_MIXED(CLK_INFRA_MUX1_SEL, infra_mux1_parents, 0x000, 2, 2),
+};
+
static const struct mtk_gate_regs infra_cg_regs = {
.set_ofs = 0x40,
.clr_ofs = 0x44,
@@ -579,6 +593,14 @@ static const struct mtk_clk_tree mt7622_apmixed_clk_tree =
{
.gates = apmixed_cgs,
};
+static const struct mtk_clk_tree mt7622_infra_clk_tree = {
+ .xtal_rate = 25 * MHZ,
+ .muxes_offs = CLK_INFRA_MUX1_SEL,
+ .gates_offs = CLK_INFRA_DBGCLK_PD,
+ .muxes = infra_muxes,
+ .gates = infra_cgs,
+};
+
static const struct mtk_clk_tree mt7622_clk_tree = {
.xtal_rate = 25 * MHZ,
.fdivs_offs = CLK_TOP_TO_USB3_SYS,
@@ -630,7 +652,7 @@ static int mt7622_topckgen_probe(struct udevice *dev)
static int mt7622_infracfg_probe(struct udevice *dev)
{
- return mtk_common_clk_gate_init(dev, &mt7622_clk_tree, infra_cgs);
+ return mtk_common_clk_infrasys_init(dev, &mt7622_infra_clk_tree);
}
static int mt7622_pericfg_probe(struct udevice *dev)
diff --git a/include/dt-bindings/clock/mt7622-clk.h
b/include/dt-bindings/clock/mt7622-clk.h
index 569bfce0d05..0820fab0a22 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -120,12 +120,13 @@
/* INFRACFG */
-#define CLK_INFRA_DBGCLK_PD0
-#define CLK_INFRA_AUDIO_PD 1
-#define CLK_INFRA_IRRX_PD 2
-#define CLK_INFRA_APXGPT_PD3
-#define CLK_INFRA_PMIC_PD 4
-#define CLK_INFRA_TRNG 5
+#define CLK_INFRA_MUX1_SEL 0
+#define CLK_INFRA_DBGCLK_PD1
+#define CLK_INFRA_AUDIO_PD 2
+#define CLK_INFRA_IRRX_PD 3
+#define CLK_INFRA_APXGPT_PD4
+#define CLK_INFRA_PMIC_PD 5
+#define CLK_INFRA_TRNG 6
/* PERICFG */
--
2.45.2
[PATCH v2 4/8] clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN
Add missing clock for MAIN_CORE_EN. This is a special clock as it's a
gate for the APMIXED clocks required as a parent for CPU clocks.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 29 +++---
include/dt-bindings/clock/mt7622-clk.h | 1 +
2 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/clk/mediatek/clk-mt7622.c
index 8f173b79453..49adffb3b43 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -66,6 +66,24 @@ static const struct mtk_pll_data apmixed_plls[] = {
21, 0x358, 1, 0x35c, 0),
};
+static const struct mtk_gate_regs apmixed_cg_regs = {
+ .set_ofs = 0x8,
+ .clr_ofs = 0x8,
+ .sta_ofs = 0x8,
+};
+
+#define GATE_APMIXED(_id, _parent, _shift) { \
+ .id = _id, \
+ .parent = _parent, \
+ .regs = &apmixed_cg_regs, \
+ .shift = _shift,\
+ .flags = CLK_GATE_NO_SETCLR_INV,\
+ }
+
+static const struct mtk_gate apmixed_cgs[] = {
+ GATE_APMIXED(CLK_APMIXED_MAIN_CORE_EN, CLK_APMIXED_MAINPLL, 5),
+};
+
/* topckgen */
#define FACTOR0(_id, _parent, _mult, _div) \
FACTOR(_id, _parent, _mult, _div, CLK_PARENT_APMIXED)
@@ -554,12 +572,17 @@ static const struct mtk_gate ssusb_cgs[] = {
GATE_SSUSB(CLK_SSUSB_DMA_EN, CLK_TOP_HIF_SEL, 8),
};
+static const struct mtk_clk_tree mt7622_apmixed_clk_tree = {
+ .xtal2_rate = 25 * MHZ,
+ .plls = apmixed_plls,
+ .gates_offs = CLK_APMIXED_MAIN_CORE_EN,
+ .gates = apmixed_cgs,
+};
+
static const struct mtk_clk_tree mt7622_clk_tree = {
.xtal_rate = 25 * MHZ,
- .xtal2_rate = 25 * MHZ,
.fdivs_offs = CLK_TOP_TO_USB3_SYS,
.muxes_offs = CLK_TOP_AXI_SEL,
- .plls = apmixed_plls,
.fclks = top_fixed_clks,
.fdivs = top_fixed_divs,
.muxes = top_muxes,
@@ -586,7 +609,7 @@ static int mt7622_apmixedsys_probe(struct udevice *dev)
struct mtk_clk_priv *priv = dev_get_priv(dev);
int ret;
- ret = mtk_common_clk_init(dev, &mt7622_clk_tree);
+ ret = mtk_common_clk_init(dev, &mt7622_apmixed_clk_tree);
if (ret)
return ret;
diff --git a/include/dt-bindings/clock/mt7622-clk.h
b/include/dt-bindings/clock/mt7622-clk.h
index 2f36abcf8ae..569bfce0d05 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -169,6 +169,7 @@
#define CLK_APMIXED_AUD2PLL6
#define CLK_APMIXED_TRGPLL 7
#define CLK_APMIXED_SGMIPLL8
+#define CLK_APMIXED_MAIN_CORE_EN 9
/* AUDIOSYS */
--
2.45.2
[PATCH v2 3/8] clk: mediatek: mt7622: move INFRA_TRNG to the bottom
Move INFRA_TRNG clock to the bottom of the clk ID to match upstream
linux order. This is in preparation of OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 2 +-
include/dt-bindings/clock/mt7622-clk.h | 10 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/clk/mediatek/clk-mt7622.c
index 4a7c5faff1a..8f173b79453 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -382,11 +382,11 @@ static const struct mtk_gate_regs infra_cg_regs = {
static const struct mtk_gate infra_cgs[] = {
GATE_INFRA(CLK_INFRA_DBGCLK_PD, CLK_TOP_AXI_SEL, 0),
- GATE_INFRA(CLK_INFRA_TRNG, CLK_TOP_AXI_SEL, 2),
GATE_INFRA(CLK_INFRA_AUDIO_PD, CLK_TOP_AUD_INTBUS_SEL, 5),
GATE_INFRA(CLK_INFRA_IRRX_PD, CLK_TOP_IRRX_SEL, 16),
GATE_INFRA(CLK_INFRA_APXGPT_PD, CLK_TOP_F10M_REF_SEL, 18),
GATE_INFRA(CLK_INFRA_PMIC_PD, CLK_TOP_PMICSPI_SEL, 22),
+ GATE_INFRA(CLK_INFRA_TRNG, CLK_TOP_AXI_SEL, 2),
};
/* pericfg */
diff --git a/include/dt-bindings/clock/mt7622-clk.h
b/include/dt-bindings/clock/mt7622-clk.h
index 78804f40307..2f36abcf8ae 100644
--- a/include/dt-bindings/clock/mt7622-clk.h
+++ b/include/dt-bindings/clock/mt7622-clk.h
@@ -121,11 +121,11 @@
/* INFRACFG */
#define CLK_INFRA_DBGCLK_PD0
-#define CLK_INFRA_TRNG 1
-#define CLK_INFRA_AUDIO_PD 2
-#define CLK_INFRA_IRRX_PD 3
-#define CLK_INFRA_APXGPT_PD4
-#define CLK_INFRA_PMIC_PD 5
+#define CLK_INFRA_AUDIO_PD 1
+#define CLK_INFRA_IRRX_PD 2
+#define CLK_INFRA_APXGPT_PD3
+#define CLK_INFRA_PMIC_PD 4
+#define CLK_INFRA_TRNG 5
/* PERICFG */
--
2.45.2
[PATCH v2 2/8] clk: mediatek: mt7622: rename AUDIO_AWB3 to AUDIO_AWB2
Rename AUDIO_AWB3 to AUDIO_AWB2 to match upstream linux naming in preparation for OF_UPSTREAM support. Signed-off-by: Christian Marangi --- include/dt-bindings/clock/mt7622-clk.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/dt-bindings/clock/mt7622-clk.h b/include/dt-bindings/clock/mt7622-clk.h index 76fcaff0e42..78804f40307 100644 --- a/include/dt-bindings/clock/mt7622-clk.h +++ b/include/dt-bindings/clock/mt7622-clk.h @@ -206,7 +206,7 @@ #define CLK_AUDIO_DLMCH31 #define CLK_AUDIO_ARB1 32 #define CLK_AUDIO_AWB 33 -#define CLK_AUDIO_AWB3 34 +#define CLK_AUDIO_AWB2 34 #define CLK_AUDIO_DAI 35 #define CLK_AUDIO_MOD 36 #define CLK_AUDIO_ASRCI3 37 -- 2.45.2
[PATCH v2 1/8] clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents
Fix broken peri_cgs clock with XTAL parents as they have wrong
definition of the parent type.
Correctly fix them and use CLK_PARENT_XTAL for them.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7622.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7622.c
b/drivers/clk/mediatek/clk-mt7622.c
index 2beb63030f2..4a7c5faff1a 100644
--- a/drivers/clk/mediatek/clk-mt7622.c
+++ b/drivers/clk/mediatek/clk-mt7622.c
@@ -402,13 +402,17 @@ static const struct mtk_gate_regs peri1_cg_regs = {
.sta_ofs = 0x1C,
};
-#define GATE_PERI0(_id, _parent, _shift) { \
+#define GATE_PERI0_FLAGS(_id, _parent, _shift, _flags) { \
.id = _id, \
.parent = _parent, \
.regs = &peri0_cg_regs, \
.shift = _shift,\
- .flags = CLK_GATE_SETCLR | CLK_PARENT_TOPCKGEN, \
+ .flags = _flags,\
}
+#define GATE_PERI0(_id, _parent, _shift) \
+ GATE_PERI0_FLAGS(_id, _parent, _shift, CLK_GATE_SETCLR |
CLK_PARENT_TOPCKGEN)
+#define GATE_PERI0_XTAL(_id, _parent, _shift) \
+ GATE_PERI0_FLAGS(_id, _parent, _shift, CLK_GATE_SETCLR |
CLK_PARENT_XTAL)
#define GATE_PERI1(_id, _parent, _shift) { \
.id = _id, \
@@ -421,14 +425,14 @@ static const struct mtk_gate_regs peri1_cg_regs = {
static const struct mtk_gate peri_cgs[] = {
/* PERI0 */
GATE_PERI0(CLK_PERI_THERM_PD, CLK_TOP_AXI_SEL, 1),
- GATE_PERI0(CLK_PERI_PWM1_PD, CLK_XTAL, 2),
- GATE_PERI0(CLK_PERI_PWM2_PD, CLK_XTAL, 3),
- GATE_PERI0(CLK_PERI_PWM3_PD, CLK_XTAL, 4),
- GATE_PERI0(CLK_PERI_PWM4_PD, CLK_XTAL, 5),
- GATE_PERI0(CLK_PERI_PWM5_PD, CLK_XTAL, 6),
- GATE_PERI0(CLK_PERI_PWM6_PD, CLK_XTAL, 7),
- GATE_PERI0(CLK_PERI_PWM7_PD, CLK_XTAL, 8),
- GATE_PERI0(CLK_PERI_PWM_PD, CLK_XTAL, 9),
+ GATE_PERI0_XTAL(CLK_PERI_PWM1_PD, CLK_XTAL, 2),
+ GATE_PERI0_XTAL(CLK_PERI_PWM2_PD, CLK_XTAL, 3),
+ GATE_PERI0_XTAL(CLK_PERI_PWM3_PD, CLK_XTAL, 4),
+ GATE_PERI0_XTAL(CLK_PERI_PWM4_PD, CLK_XTAL, 5),
+ GATE_PERI0_XTAL(CLK_PERI_PWM5_PD, CLK_XTAL, 6),
+ GATE_PERI0_XTAL(CLK_PERI_PWM6_PD, CLK_XTAL, 7),
+ GATE_PERI0_XTAL(CLK_PERI_PWM7_PD, CLK_XTAL, 8),
+ GATE_PERI0_XTAL(CLK_PERI_PWM_PD, CLK_XTAL, 9),
GATE_PERI0(CLK_PERI_AP_DMA_PD, CLK_TOP_AXI_SEL, 12),
GATE_PERI0(CLK_PERI_MSDC30_0_PD, CLK_TOP_MSDC30_0_SEL, 13),
GATE_PERI0(CLK_PERI_MSDC30_1_PD, CLK_TOP_MSDC30_1_SEL, 14),
@@ -441,7 +445,7 @@ static const struct mtk_gate peri_cgs[] = {
GATE_PERI0(CLK_PERI_I2C1_PD, CLK_TOP_AXI_SEL, 24),
GATE_PERI0(CLK_PERI_I2C2_PD, CLK_TOP_AXI_SEL, 25),
GATE_PERI0(CLK_PERI_SPI1_PD, CLK_TOP_SPI1_SEL, 26),
- GATE_PERI0(CLK_PERI_AUXADC_PD, CLK_XTAL, 27),
+ GATE_PERI0_XTAL(CLK_PERI_AUXADC_PD, CLK_XTAL, 27),
GATE_PERI0(CLK_PERI_SPI0_PD, CLK_TOP_SPI0_SEL, 28),
GATE_PERI0(CLK_PERI_SNFI_PD, CLK_TOP_NFI_INFRA_SEL, 29),
GATE_PERI0(CLK_PERI_NFI_PD, CLK_TOP_AXI_SEL, 30),
--
2.45.2
[PATCH v2 0/8] clk: mediatek: mt7622: clk migration for OF_UPSTREAM
These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS. Changes v2: - Fix typo in commit description Christian Marangi (8): clk: mediatek: mt7622: fix broken peri_cgs clk with XTAL parents clk: mediatek: mt7622: rename AUDIO_AWB3 to AUDIO_AWB2 clk: mediatek: mt7622: move INFRA_TRNG to the bottom clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN clk: mediatek: mt7622: add missing clock MUX1_SEL clk: mediatek: mt7622: add missing clock PERI_UART4_PD clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock clk: mediatek: mt7622: add missing A1/2SYS clock ID drivers/clk/mediatek/clk-mt7622.c | 104 + include/dt-bindings/clock/mt7622-clk.h | 68 2 files changed, 124 insertions(+), 48 deletions(-) -- 2.45.2
[PATCH 15/15] clk: mediatek: mt7986: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel linux. Signed-off-by: Christian Marangi --- arch/arm/dts/mt7986.dtsi | 88 +++--- drivers/clk/mediatek/clk-mt7986.c | 404 - include/dt-bindings/clock/mt7986-clk.h | 284 - 3 files changed, 388 insertions(+), 388 deletions(-) diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi index a44f5386390..f871f2394c5 100644 --- a/arch/arm/dts/mt7986.dtsi +++ b/arch/arm/dts/mt7986.dtsi @@ -78,7 +78,7 @@ compatible = "mediatek,mt7986-timer"; reg = <0x10008000 0x1000>; interrupts = ; - clocks = <&topckgen CK_TOP_F26M_SEL>; + clocks = <&topckgen CLK_TOP_F26M_SEL>; clock-names = "gpt-clk"; bootph-all; }; @@ -147,18 +147,18 @@ #clock-cells = <1>; #pwm-cells = <2>; interrupts = ; - clocks = <&topckgen CK_TOP_PWM_SEL>, -<&infracfg CK_INFRA_PWM_BSEL>, -<&infracfg CK_INFRA_PWM1_CK>, -<&infracfg CK_INFRA_PWM2_CK>; - assigned-clocks = <&topckgen CK_TOP_PWM_SEL>, - <&infracfg CK_INFRA_PWM_BSEL>, - <&infracfg CK_INFRA_PWM1_SEL>, - <&infracfg CK_INFRA_PWM2_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_MPLL_D4>, -<&topckgen CK_TOP_PWM_SEL>, -<&topckgen CK_TOP_PWM_SEL>, -<&topckgen CK_TOP_PWM_SEL>; + clocks = <&topckgen CLK_TOP_PWM_SEL>, +<&infracfg CLK_INFRA_PWM_BSEL>, +<&infracfg CLK_INFRA_PWM1_CK>, +<&infracfg CLK_INFRA_PWM2_CK>; + assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>, + <&infracfg CLK_INFRA_PWM_BSEL>, + <&infracfg CLK_INFRA_PWM1_SEL>, + <&infracfg CLK_INFRA_PWM2_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_MPLL_D4>, +<&topckgen CLK_TOP_PWM_SEL>, +<&topckgen CLK_TOP_PWM_SEL>, +<&topckgen CLK_TOP_PWM_SEL>; clock-names = "top", "main", "pwm1", "pwm2"; status = "disabled"; bootph-all; @@ -168,11 +168,11 @@ compatible = "mediatek,hsuart"; reg = <0x11002000 0x400>; interrupts = ; - clocks = <&infracfg CK_INFRA_UART0_CK>; - assigned-clocks = <&topckgen CK_TOP_UART_SEL>, - <&infracfg CK_INFRA_UART0_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_XTAL>, -<&topckgen CK_TOP_UART_SEL>; + clocks = <&infracfg CLK_INFRA_UART0_CK>; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_UART0_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_XTAL>, +<&topckgen CLK_TOP_UART_SEL>; mediatek,force-highspeed; status = "disabled"; bootph-all; @@ -182,9 +182,9 @@ compatible = "mediatek,hsuart"; reg = <0x11003000 0x400>; interrupts = ; - clocks = <&infracfg CK_INFRA_UART1_CK>; - assigned-clocks = <&infracfg CK_INFRA_UART1_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_F26M_SEL>; + clocks = <&infracfg CLK_INFRA_UART1_CK>; + assigned-clocks = <&infracfg CLK_INFRA_UART1_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_F26M_SEL>; mediatek,force-highspeed; status = "disabled"; }; @@ -193,9 +193,9 @@ compatible = "mediatek,hsuart"; reg = <0x11004000 0x400>; interrupts = ; - clocks = <&infracfg CK_INFRA_UART2_CK>; - assigned-clocks = <&a
[PATCH 14/15] clk: mediatek: mt7986: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.
Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7986.dtsi | 31 ---
drivers/clk/mediatek/clk-mt7986.c | 26 +++---
2 files changed, 15 insertions(+), 42 deletions(-)
diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi
index 187e1298fae..a44f5386390 100644
--- a/arch/arm/dts/mt7986.dtsi
+++ b/arch/arm/dts/mt7986.dtsi
@@ -115,13 +115,6 @@
#clock-cells = <1>;
};
- infracfg_ao: infracfg_ao@10001000 {
- compatible = "mediatek,mt7986-infracfg_ao";
- reg = <0x10001000 0x68>;
- clock-parent = <&infracfg>;
- #clock-cells = <1>;
- };
-
infracfg: infracfg@10001040 {
compatible = "mediatek,mt7986-infracfg";
reg = <0x10001000 0x1000>;
@@ -155,9 +148,9 @@
#pwm-cells = <2>;
interrupts = ;
clocks = <&topckgen CK_TOP_PWM_SEL>,
-<&infracfg_ao CK_INFRA_PWM_BSEL>,
-<&infracfg_ao CK_INFRA_PWM1_CK>,
-<&infracfg_ao CK_INFRA_PWM2_CK>;
+<&infracfg CK_INFRA_PWM_BSEL>,
+<&infracfg CK_INFRA_PWM1_CK>,
+<&infracfg CK_INFRA_PWM2_CK>;
assigned-clocks = <&topckgen CK_TOP_PWM_SEL>,
<&infracfg CK_INFRA_PWM_BSEL>,
<&infracfg CK_INFRA_PWM1_SEL>,
@@ -175,9 +168,9 @@
compatible = "mediatek,hsuart";
reg = <0x11002000 0x400>;
interrupts = ;
- clocks = <&infracfg_ao CK_INFRA_UART0_CK>;
+ clocks = <&infracfg CK_INFRA_UART0_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
- <&infracfg_ao CK_INFRA_UART0_SEL>;
+ <&infracfg CK_INFRA_UART0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
@@ -189,7 +182,7 @@
compatible = "mediatek,hsuart";
reg = <0x11003000 0x400>;
interrupts = ;
- clocks = <&infracfg_ao CK_INFRA_UART1_CK>;
+ clocks = <&infracfg CK_INFRA_UART1_CK>;
assigned-clocks = <&infracfg CK_INFRA_UART1_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_F26M_SEL>;
mediatek,force-highspeed;
@@ -200,7 +193,7 @@
compatible = "mediatek,hsuart";
reg = <0x11004000 0x400>;
interrupts = ;
- clocks = <&infracfg_ao CK_INFRA_UART2_CK>;
+ clocks = <&infracfg CK_INFRA_UART2_CK>;
assigned-clocks = <&infracfg CK_INFRA_UART2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_F26M_SEL>;
mediatek,force-highspeed;
@@ -212,9 +205,9 @@
reg = <0x11005000 0x1000>,
<0x11006000 0x1000>;
reg-names = "nfi", "ecc";
- clocks = <&infracfg_ao CK_INFRA_SPINFI1_CK>,
-<&infracfg_ao CK_INFRA_NFI1_CK>,
-<&infracfg_ao CK_INFRA_NFI_HCK_CK>;
+ clocks = <&infracfg CK_INFRA_SPINFI1_CK>,
+<&infracfg CK_INFRA_NFI1_CK>,
+<&infracfg CK_INFRA_NFI_HCK_CK>;
clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
assigned-clocks = <&topckgen CK_TOP_SPINFI_SEL>,
<&topckgen CK_TOP_NFI1X_SEL>;
@@ -258,7 +251,7 @@
spi0: spi@1100a000 {
compatible = "mediatek,ipm-spi";
reg = <0x1100a000 0x100>;
- clocks = <&infracfg_ao CK_INFRA_SPI0_CK>,
+ clocks = <&infracfg CK_INFRA_SPI0_CK>,
<&topckgen CK_TOP_SPI_SEL>;
assigned-clocks = <&topckgen CK_TOP_SPI_SEL>,
<&infracfg CK_INFRA_SPI0_SEL>;
@@ -283,7 +276,7 @@
interrupts = ;
clocks = <&topckgen CK_TOP_EMMC_416M_SEL>,
[PATCH 13/15] clk: mediatek: mt7986: replace infracfg ID with upstream linux
Replace infracfg clk ID with upstream linux version.
The same format is used here with the factor first, then mux and then
gates.
To correctly reference the gates in clk_gate function, define the
gates_offs value in clk_tree now that they are at an offset from mux and
factor.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 1 +
include/dt-bindings/clock/mt7986-clk.h | 124 -
2 files changed, 59 insertions(+), 66 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 7476024f584..59b82ca7de1 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -533,6 +533,7 @@ static const struct mtk_clk_tree mt7986_topckgen_clk_tree =
{
static const struct mtk_clk_tree mt7986_infracfg_clk_tree = {
.fdivs_offs = CK_INFRA_SYSAXI_D2,
.muxes_offs = CK_INFRA_UART0_SEL,
+ .gates_offs = CK_INFRA_GPT_STA,
.fdivs = infra_fixed_divs,
.muxes = infra_muxes,
.flags = CLK_INFRASYS,
diff --git a/include/dt-bindings/clock/mt7986-clk.h
b/include/dt-bindings/clock/mt7986-clk.h
index 39939f8e028..1c28ab34dcf 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -8,11 +8,6 @@
#ifndef _DT_BINDINGS_CLK_MT7986_H
#define _DT_BINDINGS_CLK_MT7986_H
-/* INFRACFG */
-
-#define CK_INFRA_SYSAXI_D2 0
-#define CLK_INFRA_NR_CLK 1
-
/* TOPCKGEN */
#define CK_TOP_XTAL0
@@ -81,68 +76,65 @@
#define CK_TOP_AP2CNN_HOST_SEL 62
#define CLK_TOP_NR_CLK 63
-/*
- * INFRACFG_AO
- * clock muxes need to be append to infracfg domain, and clock gates
- * need to be keep in infracgh_ao domain
- */
+/* INFRACFG */
-#define CK_INFRA_UART0_SEL (0 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_UART1_SEL (1 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_UART2_SEL (2 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_SPI1_SEL (4 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PWM1_SEL (5 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PWM2_SEL (6 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PWM_BSEL (7 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PCIE_SEL (8 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_GPT_STA 0
-#define CK_INFRA_PWM_HCK 1
-#define CK_INFRA_PWM_STA 2
-#define CK_INFRA_PWM1_CK 3
-#define CK_INFRA_PWM2_CK 4
-#define CK_INFRA_CQ_DMA_CK 5
-#define CK_INFRA_EIP97_CK 6
-#define CK_INFRA_AUD_BUS_CK7
-#define CK_INFRA_AUD_26M_CK8
-#define CK_INFRA_AUD_L_CK 9
-#define CK_INFRA_AUD_AUD_CK10
-#define CK_INFRA_AUD_EG2_CK11
-#define CK_INFRA_DRAMC_26M_CK 12
-#define CK_INFRA_DBG_CK13
-#define CK_INFRA_AP_DMA_CK 14
-#define CK_INFRA_SEJ_CK15
-#define CK_INFRA_SEJ_13M_CK16
-#define CK_INFRA_THERM_CK 17
-#define CK_INFRA_I2C0_CK 18
-#define CK_INFRA_UART0_CK 19
-#define CK_INFRA_UART1_CK 20
-#define CK_INFRA_UART2_CK 21
-#define CK_INFRA_NFI1_CK 22
-#define CK_INFRA_SPINFI1_CK23
-#define CK_INFRA_NFI_HCK_CK24
-#define CK_INFRA_SPI0_CK 25
-#define CK_INFRA_SPI1_CK 26
-#define CK_INFRA_SPI0_HCK_CK 27
-#define CK_INFRA_SPI1_HCK_CK 28
-#define CK_INFRA_FRTC_CK 29
-#define CK_INFRA_MSDC_CK 30
-#define CK_INFRA_MSDC_HCK_CK 31
-#define CK_INFRA_MSDC_133M_CK 32
-#define CK_INFRA_MSDC_66M_CK 33
-#define CK_INFRA_ADC_26M_CK34
-#define CK_INFRA_ADC_FRC_CK35
-#define CK_INFRA_FBIST2FPC_CK 36
-#define CK_INFRA_IUSB_133_CK 37
-#define CK_INFRA_IUSB_66M_CK 38
-#define CK_INFRA_IUSB_SYS_CK 39
-#define CK_INFRA_IUSB_CK 40
-#define CK_INFRA_IPCIE_CK 41
-#define CK_INFRA_IPCIE_PIPE_CK 42
-#define CK_INFRA_IPCIER_CK 43
-#define CK_INFRA_IPCIEB_CK 44
-#define CK_INFRA_TRNG_CK 45
-#define CLK_INFRA_AO_NR_CLK46
+#define CK_INFRA_SYSAXI_D2 0
+#define CK_INFRA_UART0_SEL 1
+#define CK_INFRA_UART1_SEL 2
+#define CK_INFRA_UART2_SEL 3
+#define CK_INFRA_SPI0_SEL 4
+#define CK_INFRA_SPI1_SEL 5
+#define CK_INFRA_PWM1_SEL 6
+#define CK_INFRA_PWM2_SEL 7
+#define CK_INFRA_PWM_BSEL 8
+#define CK_INFRA_PCIE_SEL 9
+#define CK_INFRA_GPT_STA 10
+#define CK_INFRA_PWM_HCK 11
+#define CK_INFRA_PWM_STA 12
+#define CK_INFRA_PWM1_CK 13
+#define
[PATCH 12/15] clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list
Move INFRA_TRNG_CK to the bottom of the list to have a 1:1 match with
upstream linux clock ID.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 3 +-
include/dt-bindings/clock/mt7986-clk.h | 54 +-
2 files changed, 29 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 08b7ab8a81e..7476024f584 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -470,7 +470,6 @@ static const struct mtk_gate infracfg_ao_gates[] = {
GATE_INFRA0_INFRA(CK_INFRA_AP_DMA_CK, "infra_ap_dma",
CK_INFRA_SYSAXI_D2, 16),
GATE_INFRA0_INFRA(CK_INFRA_SEJ_CK, "infra_sej", CK_INFRA_SYSAXI_D2, 24),
GATE_INFRA0_TOP(CK_INFRA_SEJ_13M_CK, "infra_sej_13m", CK_TOP_F26M_SEL,
25),
- GATE_INFRA0_TOP(CK_INFRA_TRNG_CK, "infra_trng", CK_TOP_SYSAXI_SEL, 26),
/* INFRA1 */
GATE_INFRA1_TOP(CK_INFRA_THERM_CK, "infra_therm", CK_TOP_F26M_SEL, 0),
GATE_INFRA1_TOP(CK_INFRA_I2C0_CK, "infra_i2co", CK_TOP_I2C_SEL, 1),
@@ -511,6 +510,8 @@ static const struct mtk_gate infracfg_ao_gates[] = {
GATE_INFRA2_TOP(CK_INFRA_IPCIE_PIPE_CK, "infra_ipcie_pipe",
CK_TOP_XTAL, 13),
GATE_INFRA2_TOP(CK_INFRA_IPCIER_CK, "infra_ipcier", CK_TOP_F26M_SEL,
14),
GATE_INFRA2_TOP(CK_INFRA_IPCIEB_CK, "infra_ipcieb", CK_TOP_SYSAXI_SEL,
15),
+ /* upstream linux unordered */
+ GATE_INFRA0_TOP(CK_INFRA_TRNG_CK, "infra_trng", CK_TOP_SYSAXI_SEL, 26),
};
static const struct mtk_clk_tree mt7986_fixed_pll_clk_tree = {
diff --git a/include/dt-bindings/clock/mt7986-clk.h
b/include/dt-bindings/clock/mt7986-clk.h
index 7df13665900..39939f8e028 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -115,33 +115,33 @@
#define CK_INFRA_SEJ_13M_CK16
#define CK_INFRA_THERM_CK 17
#define CK_INFRA_I2C0_CK 18
-#define CK_INFRA_TRNG_CK 19
-#define CK_INFRA_UART0_CK 20
-#define CK_INFRA_UART1_CK 21
-#define CK_INFRA_UART2_CK 22
-#define CK_INFRA_NFI1_CK 23
-#define CK_INFRA_SPINFI1_CK24
-#define CK_INFRA_NFI_HCK_CK25
-#define CK_INFRA_SPI0_CK 26
-#define CK_INFRA_SPI1_CK 27
-#define CK_INFRA_SPI0_HCK_CK 28
-#define CK_INFRA_SPI1_HCK_CK 29
-#define CK_INFRA_FRTC_CK 30
-#define CK_INFRA_MSDC_CK 31
-#define CK_INFRA_MSDC_HCK_CK 32
-#define CK_INFRA_MSDC_133M_CK 33
-#define CK_INFRA_MSDC_66M_CK 34
-#define CK_INFRA_ADC_26M_CK35
-#define CK_INFRA_ADC_FRC_CK36
-#define CK_INFRA_FBIST2FPC_CK 37
-#define CK_INFRA_IUSB_133_CK 38
-#define CK_INFRA_IUSB_66M_CK 39
-#define CK_INFRA_IUSB_SYS_CK 40
-#define CK_INFRA_IUSB_CK 41
-#define CK_INFRA_IPCIE_CK 42
-#define CK_INFRA_IPCIE_PIPE_CK 43
-#define CK_INFRA_IPCIER_CK 44
-#define CK_INFRA_IPCIEB_CK 45
+#define CK_INFRA_UART0_CK 19
+#define CK_INFRA_UART1_CK 20
+#define CK_INFRA_UART2_CK 21
+#define CK_INFRA_NFI1_CK 22
+#define CK_INFRA_SPINFI1_CK23
+#define CK_INFRA_NFI_HCK_CK24
+#define CK_INFRA_SPI0_CK 25
+#define CK_INFRA_SPI1_CK 26
+#define CK_INFRA_SPI0_HCK_CK 27
+#define CK_INFRA_SPI1_HCK_CK 28
+#define CK_INFRA_FRTC_CK 29
+#define CK_INFRA_MSDC_CK 30
+#define CK_INFRA_MSDC_HCK_CK 31
+#define CK_INFRA_MSDC_133M_CK 32
+#define CK_INFRA_MSDC_66M_CK 33
+#define CK_INFRA_ADC_26M_CK34
+#define CK_INFRA_ADC_FRC_CK35
+#define CK_INFRA_FBIST2FPC_CK 36
+#define CK_INFRA_IUSB_133_CK 37
+#define CK_INFRA_IUSB_66M_CK 38
+#define CK_INFRA_IUSB_SYS_CK 39
+#define CK_INFRA_IUSB_CK 40
+#define CK_INFRA_IPCIE_CK 41
+#define CK_INFRA_IPCIE_PIPE_CK 42
+#define CK_INFRA_IPCIER_CK 43
+#define CK_INFRA_IPCIEB_CK 44
+#define CK_INFRA_TRNG_CK 45
#define CLK_INFRA_AO_NR_CLK46
/* APMIXEDSYS */
--
2.45.2
[PATCH 11/15] clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not used
Comment out CK_TOP_A_TUNER as not used and not defined in upstream
kernel linux. This is to permit support of OF_UPSTREAM and have a 1:1
match with upstream linux clock ID.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 3 +-
include/dt-bindings/clock/mt7986-clk.h | 122 -
2 files changed, 63 insertions(+), 62 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index d8e0a5790e3..08b7ab8a81e 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -58,7 +58,8 @@ static const struct mtk_fixed_factor top_fixed_divs[] = {
1250),
TOP_FACTOR(CK_TOP_RTC_32P7K, "rtc_32p7k", CK_TOP_XTAL, 1,
1220),
- TOP_FACTOR(CK_TOP_A_TUNER, "a_tuner", CK_TOP_A_TUNER_SEL, 2, 1),
+ /* Not defined upstream and not used */
+ /* TOP_FACTOR(CK_TOP_A_TUNER, "a_tuner", CK_TOP_A_TUNER_SEL, 2, 1), */
/* MPLL */
PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
diff --git a/include/dt-bindings/clock/mt7986-clk.h
b/include/dt-bindings/clock/mt7986-clk.h
index 478538d7cce..7df13665900 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -19,67 +19,67 @@
#define CK_TOP_XTAL_D2 1
#define CK_TOP_RTC_32K 2
#define CK_TOP_RTC_32P7K 3
-#define CK_TOP_A_TUNER 4
-#define CK_TOP_MPLL_D2 5
-#define CK_TOP_MPLL_D4 6
-#define CK_TOP_MPLL_D8 7
-#define CK_TOP_MPLL_D8_D2 8
-#define CK_TOP_MPLL_D3_D2 9
-#define CK_TOP_MMPLL_D210
-#define CK_TOP_MMPLL_D411
-#define CK_TOP_MMPLL_D812
-#define CK_TOP_MMPLL_D8_D2 13
-#define CK_TOP_MMPLL_D3_D8 14
-#define CK_TOP_MMPLL_U2PHYD15
-#define CK_TOP_APLL2_D416
-#define CK_TOP_NET1PLL_D4 17
-#define CK_TOP_NET1PLL_D5 18
-#define CK_TOP_NET1PLL_D5_D2 19
-#define CK_TOP_NET1PLL_D5_D4 20
-#define CK_TOP_NET1PLL_D8_D2 21
-#define CK_TOP_NET1PLL_D8_D4 22
-#define CK_TOP_NET2PLL_D4 23
-#define CK_TOP_NET2PLL_D4_D2 24
-#define CK_TOP_NET2PLL_D3_D2 25
-#define CK_TOP_WEDMCUPLL_D5_D2 26
-#define CK_TOP_NFI1X_SEL 27
-#define CK_TOP_SPINFI_SEL 28
-#define CK_TOP_SPI_SEL 29
-#define CK_TOP_SPIM_MST_SEL30
-#define CK_TOP_UART_SEL31
-#define CK_TOP_PWM_SEL 32
-#define CK_TOP_I2C_SEL 33
-#define CK_TOP_PEXTP_TL_SEL34
-#define CK_TOP_EMMC_250M_SEL 35
-#define CK_TOP_EMMC_416M_SEL 36
-#define CK_TOP_F_26M_ADC_SEL 37
-#define CK_TOP_DRAMC_SEL 38
-#define CK_TOP_DRAMC_MD32_SEL 39
-#define CK_TOP_SYSAXI_SEL 40
-#define CK_TOP_SYSAPB_SEL 41
-#define CK_TOP_ARM_DB_MAIN_SEL 42
-#define CK_TOP_ARM_DB_JTSEL43
-#define CK_TOP_NETSYS_SEL 44
-#define CK_TOP_NETSYS_500M_SEL 45
-#define CK_TOP_NETSYS_MCU_SEL 46
-#define CK_TOP_NETSYS_2X_SEL 47
-#define CK_TOP_SGM_325M_SEL48
-#define CK_TOP_SGM_REG_SEL 49
-#define CK_TOP_A1SYS_SEL 50
-#define CK_TOP_CONN_MCUSYS_SEL 51
-#define CK_TOP_EIP_B_SEL 52
-#define CK_TOP_PCIE_PHY_SEL53
-#define CK_TOP_USB3_PHY_SEL54
-#define CK_TOP_F26M_SEL55
-#define CK_TOP_AUD_L_SEL 56
-#define CK_TOP_A_TUNER_SEL 57
-#define CK_TOP_U2U3_SEL58
-#define CK_TOP_U2U3_SYS_SEL59
-#define CK_TOP_U2U3_XHCI_SEL 60
-#define CK_TOP_DA_U2_REFSEL61
-#define CK_TOP_DA_U2_CK_1P_SEL 62
-#define CK_TOP_AP2CNN_HOST_SEL 63
-#define CLK_TOP_NR_CLK 64
+/* #define CK_TOP_A_TUNER 4 */
+#define CK_TOP_MPLL_D2 4
+#define CK_TOP_MPLL_D4 5
+#define CK_TOP_MPLL_D8 6
+#define CK_TOP_MPLL_D8_D2 7
+#define CK_TOP_MPLL_D3_D2 8
+#define CK_TOP_MMPLL_D29
+#define CK_TOP_MMPLL_D410
+#define CK_TOP_MMPLL_D811
+#define CK_TOP_MMPLL_D8_D2 12
+#define CK_TOP_MMPLL_D3_D8 13
+#define CK_TOP_MMPLL_U2PHYD14
+#define CK_TOP_APLL2_D415
+#define CK_TOP_NET1PLL_D4 16
+#define CK_TOP_NET1PLL_D5 17
+#define CK_TOP_NET1PLL_D5_D2 18
+#define CK_TOP_NET1PLL_D5_D4 19
+
[PATCH 10/15] clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen
Now that we can have advanced parent handling for mux, we can drop
spurious topckgen 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.
Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the apmixed clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for apmixed.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7986.dtsi | 14 +-
drivers/clk/mediatek/clk-mt7986.c | 223 +
include/dt-bindings/clock/mt7986-clk.h | 150 +++--
3 files changed, 186 insertions(+), 201 deletions(-)
diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi
index 31119640d23..187e1298fae 100644
--- a/arch/arm/dts/mt7986.dtsi
+++ b/arch/arm/dts/mt7986.dtsi
@@ -162,7 +162,7 @@
<&infracfg CK_INFRA_PWM_BSEL>,
<&infracfg CK_INFRA_PWM1_SEL>,
<&infracfg CK_INFRA_PWM2_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_M_D4>,
+ assigned-clock-parents = <&topckgen CK_TOP_MPLL_D4>,
<&topckgen CK_TOP_PWM_SEL>,
<&topckgen CK_TOP_PWM_SEL>,
<&topckgen CK_TOP_PWM_SEL>;
@@ -218,8 +218,8 @@
clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
assigned-clocks = <&topckgen CK_TOP_SPINFI_SEL>,
<&topckgen CK_TOP_NFI1X_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_M_D8>,
-<&topckgen CK_TOP_CB_M_D8>;
+ assigned-clock-parents = <&topckgen CK_TOP_MPLL_D8>,
+<&topckgen CK_TOP_MPLL_D8>;
status = "disabled";
};
@@ -262,7 +262,7 @@
<&topckgen CK_TOP_SPI_SEL>;
assigned-clocks = <&topckgen CK_TOP_SPI_SEL>,
<&infracfg CK_INFRA_SPI0_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
+ assigned-clock-parents = <&topckgen CK_TOP_MPLL_D2>,
<&topckgen CK_TOP_SPI_SEL>;
clock-names = "sel-clk", "spi-clk";
interrupts = ;
@@ -281,12 +281,12 @@
reg = <0x1123 0x1000>,
<0x11C2 0x1000>;
interrupts = ;
- clocks = <&topckgen CK_TOP_EMMC_416M>,
- <&topckgen CK_TOP_EMMC_250M>,
+ clocks = <&topckgen CK_TOP_EMMC_416M_SEL>,
+ <&topckgen CK_TOP_EMMC_250M_SEL>,
<&infracfg_ao CK_INFRA_MSDC_CK>;
assigned-clocks = <&topckgen CK_TOP_EMMC_416M_SEL>,
<&topckgen CK_TOP_EMMC_250M_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_M_416M>,
+ assigned-clock-parents = <&fixed_plls CK_APMIXED_MPLL>,
<&topckgen CK_TOP_NET1PLL_D5_D2>;
clock-names = "source", "hclk", "source_cg";
status = "disabled";
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 34b8eba5398..d8e0a5790e3 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -18,6 +18,11 @@
#define MT7986_CLK_PDN 0x250
#define MT7986_CLK_PDN_EN_WRITE BIT(31)
+#define APMIXED_PARENT(_id) PARENT(_id, CLK_PARENT_APMIXED)
+#define INFRA_PARENT(_id) PARENT(_id, CLK_PARENT_INFRASYS)
+#define TOP_PARENT(_id) PARENT(_id, CLK_PARENT_TOPCKGEN)
+#define VOID_PARENT PARENT(-1, 0)
+
#define PLL_FACTOR(_id, _name, _parent, _mult, _div)
\
FACTOR(_id, _parent, _mult, _div, CLK_PARENT_APMIXED)
@@ -53,36 +58,8 @@ static const struct mtk_fixed_factor top_fixed_divs[] = {
1250),
TOP_FACTOR(CK_TOP_RTC_32P7K, "rtc_32p7k", CK_TOP_XTAL, 1,
1220),
- TOP_FACTOR(CK_TOP_NFI1X, "nfi1x", CK_TOP_NFI1X_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_EQ_RX250M, "usb_eq_rx250m", CK_TOP_XTAL, 1,
- 1),
- TOP_FACTOR(CK_TOP_USB_TX250M, "usb_tx250m", CK_TOP_XTAL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_LN0_CK, "usb_ln0", CK_TOP_XTAL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_CDR
[PATCH 09/15] clk: mediatek: mt7986: reorder TOPCKGEN factor ID
Reorder TOPCKGEN factor ID to put TOP_FACTOR first and then PLL. This is
to match how it's done in upstream kernel linux and in preparation for
OF_UPSTREAM support.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 70
include/dt-bindings/clock/mt7986-clk.h | 108 -
2 files changed, 89 insertions(+), 89 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index c1f63ecc3b2..34b8eba5398 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -46,6 +46,41 @@ static const struct mtk_fixed_clk top_fixed_clks[] = {
/* TOPCKGEN FIXED DIV */
static const struct mtk_fixed_factor top_fixed_divs[] = {
+ /* TOP Factors */
+ TOP_FACTOR(CK_TOP_XTAL_D2, "xtal_d2", CK_TOP_XTAL,
+ 1, 2),
+ TOP_FACTOR(CK_TOP_RTC_32K, "rtc_32k", CK_TOP_XTAL, 1,
+ 1250),
+ TOP_FACTOR(CK_TOP_RTC_32P7K, "rtc_32p7k", CK_TOP_XTAL, 1,
+ 1220),
+ TOP_FACTOR(CK_TOP_NFI1X, "nfi1x", CK_TOP_NFI1X_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_USB_EQ_RX250M, "usb_eq_rx250m", CK_TOP_XTAL, 1,
+ 1),
+ TOP_FACTOR(CK_TOP_USB_TX250M, "usb_tx250m", CK_TOP_XTAL, 1, 1),
+ TOP_FACTOR(CK_TOP_USB_LN0_CK, "usb_ln0", CK_TOP_XTAL, 1, 1),
+ TOP_FACTOR(CK_TOP_USB_CDR_CK, "usb_cdr", CK_TOP_XTAL, 1, 1),
+ TOP_FACTOR(CK_TOP_SPINFI_BCK, "spinfi_bck", CK_TOP_SPINFI_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_I2C_BCK, "i2c_bck", CK_TOP_I2C_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_PEXTP_TL, "pextp_tl", CK_TOP_PEXTP_TL_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_EMMC_250M, "emmc_250m", CK_TOP_EMMC_250M_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_EMMC_416M, "emmc_416m", CK_TOP_EMMC_416M_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_F_26M_ADC_CK, "f_26m_adc", CK_TOP_F_26M_ADC_SEL, 1,
+ 1),
+ TOP_FACTOR(CK_TOP_SYSAXI, "sysaxi", CK_TOP_SYSAXI_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_NETSYS_WED_MCU, "netsys_wed_mcu",
+ CK_TOP_NETSYS_MCU_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_NETSYS_2X, "netsys_2x", CK_TOP_NETSYS_2X_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_SGM_325M, "sgm_325m", CK_TOP_SGM_325M_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_A1SYS, "a1sys", CK_TOP_A1SYS_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_EIP_B, "eip_b", CK_TOP_EIP_B_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_F26M, "csw_f26m", CK_TOP_F26M_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_AUD_L, "aud_l", CK_TOP_AUD_L_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_A_TUNER, "a_tuner", CK_TOP_A_TUNER_SEL, 2, 1),
+ TOP_FACTOR(CK_TOP_U2U3_REF, "u2u3_ref", CK_TOP_U2U3_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_U2U3_SYS, "u2u3_sys", CK_TOP_U2U3_SYS_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_U2U3_XHCI, "u2u3_xhci", CK_TOP_U2U3_XHCI_SEL, 1, 1),
+ TOP_FACTOR(CK_TOP_AP2CNN_HOST, "ap2cnn_host", CK_TOP_AP2CNN_HOST_SEL, 1,
+ 1),
/* MPLL */
PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
@@ -84,41 +119,6 @@ static const struct mtk_fixed_factor top_fixed_divs[] = {
10),
/* SGMPLL */
PLL_FACTOR(CK_TOP_CB_SGMPLL_325M, "cb_sgmpll_325m", CK_APMIXED_SGMPLL,
1, 1),
- /* TOPCKGEN and XTAL */
- TOP_FACTOR(CK_TOP_XTAL_D2, "xtal_d2", CK_TOP_XTAL,
- 1, 2),
- TOP_FACTOR(CK_TOP_RTC_32K, "rtc_32k", CK_TOP_XTAL, 1,
- 1250),
- TOP_FACTOR(CK_TOP_RTC_32P7K, "rtc_32p7k", CK_TOP_XTAL, 1,
- 1220),
- TOP_FACTOR(CK_TOP_NFI1X, "nfi1x", CK_TOP_NFI1X_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_EQ_RX250M, "usb_eq_rx250m", CK_TOP_XTAL, 1,
- 1),
- TOP_FACTOR(CK_TOP_USB_TX250M, "usb_tx250m", CK_TOP_XTAL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_LN0_CK, "usb_ln0", CK_TOP_XTAL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_CDR_CK, "usb_cdr", CK_TOP_XTAL, 1, 1),
- TOP_FACTOR(CK_TOP_SPINFI_BCK, "spinfi_bck", CK_TOP_SPINFI_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_I2C_BCK, "i2c_bck", CK_TOP_I2C_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_PEXTP_TL, "pextp_tl", CK_TOP_PEXTP_TL_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_EMMC_250M, "emmc_250m", CK_TOP_EMMC_250M_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_EMMC_416M, "emmc_416m", CK_TOP_EMMC_416M_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_F_26M_ADC_CK, "f_26m_adc", CK_TOP_F_26M_ADC_SEL, 1,
- 1),
- TOP_FACTOR(CK_TOP_SYSAXI, "sysaxi", CK_TOP_SYSAXI_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_NET
[PATCH 08/15] clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.
Also rename rtc clock to drop the CB_ as upstream doesn't have that.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7986.dtsi | 2 +-
drivers/clk/mediatek/clk-mt7986.c | 152 +
include/dt-bindings/clock/mt7986-clk.h | 54 -
3 files changed, 108 insertions(+), 100 deletions(-)
diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi
index e26b85b8266..31119640d23 100644
--- a/arch/arm/dts/mt7986.dtsi
+++ b/arch/arm/dts/mt7986.dtsi
@@ -287,7 +287,7 @@
assigned-clocks = <&topckgen CK_TOP_EMMC_416M_SEL>,
<&topckgen CK_TOP_EMMC_250M_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_416M>,
-<&topckgen CK_TOP_NET1_D5_D2>;
+<&topckgen CK_TOP_NET1PLL_D5_D2>;
clock-names = "source", "hclk", "source_cg";
status = "disabled";
};
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 303d959d750..c1f63ecc3b2 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -46,42 +46,50 @@ static const struct mtk_fixed_clk top_fixed_clks[] = {
/* TOPCKGEN FIXED DIV */
static const struct mtk_fixed_factor top_fixed_divs[] = {
- PLL_FACTOR(CK_TOP_CB_M_416M, "cb_m_416m", CK_APMIXED_MPLL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_M_D2, "cb_m_d2", CK_APMIXED_MPLL, 1, 2),
- PLL_FACTOR(CK_TOP_CB_M_D4, "cb_m_d4", CK_APMIXED_MPLL, 1, 4),
- PLL_FACTOR(CK_TOP_CB_M_D8, "cb_m_d8", CK_APMIXED_MPLL, 1, 8),
- PLL_FACTOR(CK_TOP_M_D8_D2, "m_d8_d2", CK_APMIXED_MPLL, 1, 16),
- PLL_FACTOR(CK_TOP_M_D3_D2, "m_d3_d2", CK_APMIXED_MPLL, 1, 2),
- PLL_FACTOR(CK_TOP_CB_MM_D2, "cb_mm_d2", CK_APMIXED_MMPLL, 1, 2),
- PLL_FACTOR(CK_TOP_CB_MM_D4, "cb_mm_d4", CK_APMIXED_MMPLL, 1, 4),
- PLL_FACTOR(CK_TOP_CB_MM_D8, "cb_mm_d8", CK_APMIXED_MMPLL, 1, 8),
- PLL_FACTOR(CK_TOP_MM_D8_D2, "mm_d8_d2", CK_APMIXED_MMPLL, 1, 16),
- PLL_FACTOR(CK_TOP_MM_D3_D8, "mm_d3_d8", CK_APMIXED_MMPLL, 1, 8),
- PLL_FACTOR(CK_TOP_CB_U2_PHYD_CK, "cb_u2_phyd", CK_APMIXED_MMPLL, 1, 30),
+ /* MPLL */
+ PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
+ PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
+ PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
+ PLL_FACTOR(CK_TOP_MPLL_D8, "mpll_d8", CK_APMIXED_MPLL, 1, 8),
+ PLL_FACTOR(CK_TOP_MPLL_D8_D2, "mpll_d8_d2", CK_APMIXED_MPLL, 1, 16),
+ PLL_FACTOR(CK_TOP_MPLL_D3_D2, "mpll_d3_d2", CK_APMIXED_MPLL, 1, 2),
+ /* MMPLL */
+ PLL_FACTOR(CK_TOP_MMPLL_D2, "mmpll_d2", CK_APMIXED_MMPLL, 1, 2),
+ PLL_FACTOR(CK_TOP_MMPLL_D4, "mmpll_d4", CK_APMIXED_MMPLL, 1, 4),
+ PLL_FACTOR(CK_TOP_MMPLL_D8, "mmpll_d8", CK_APMIXED_MMPLL, 1, 8),
+ PLL_FACTOR(CK_TOP_MMPLL_D8_D2, "mmpll_d8_d2", CK_APMIXED_MMPLL, 1, 16),
+ PLL_FACTOR(CK_TOP_MMPLL_D3_D8, "mmpll_d3_d8", CK_APMIXED_MMPLL, 1, 8),
+ PLL_FACTOR(CK_TOP_MMPLL_U2PHYD, "mmpll_u2phy", CK_APMIXED_MMPLL, 1, 30),
+ /* APLL2 */
PLL_FACTOR(CK_TOP_CB_APLL2_196M, "cb_apll2_196m", CK_APMIXED_APLL2, 1,
1),
PLL_FACTOR(CK_TOP_APLL2_D4, "apll2_d4", CK_APMIXED_APLL2, 1, 4),
- PLL_FACTOR(CK_TOP_CB_NET1_D4, "cb_net1_d4", CK_APMIXED_NET1PLL, 1, 4),
- PLL_FACTOR(CK_TOP_CB_NET1_D5, "cb_net1_d5", CK_APMIXED_NET1PLL, 1, 5),
- PLL_FACTOR(CK_TOP_NET1_D5_D2, "net1_d5_d2", CK_APMIXED_NET1PLL, 1, 10),
- PLL_FACTOR(CK_TOP_NET1_D5_D4, "net1_d5_d4", CK_APMIXED_NET1PLL, 1, 20),
- PLL_FACTOR(CK_TOP_NET1_D8_D2, "net1_d8_d2", CK_APMIXED_NET1PLL, 1, 16),
- PLL_FACTOR(CK_TOP_NET1_D8_D4, "net1_d8_d4", CK_APMIXED_NET1PLL, 1, 32),
- PLL_FACTOR(CK_TOP_CB_NET2_800M, "cb_net2_800m", CK_APMIXED_NET2PLL, 1,
+ /* NET1PLL */
+ PLL_FACTOR(CK_TOP_NET1PLL_D4, "net1pll_d4", CK_APMIXED_NET1PLL, 1, 4),
+ PLL_FACTOR(CK_TOP_NET1PLL_D5, "net1pll_d5", CK_APMIXED_NET1PLL, 1, 5),
+ PLL_FACTOR(CK_TOP_NET1PLL_D5_D2, "net1pll_d5_d2", CK_APMIXED_NET1PLL,
1, 10),
+ PLL_FACTOR(CK_TOP_NET1PLL_D5_D4, "net1pll_d5_d4", CK_APMIXED_NET1PLL,
1, 20),
+ PLL_FACTOR(CK_TO
[PATCH 07/15] clk: mediatek: mt7986: fix typo for infra_i2c0_ck
Fix a typo for infra_i2c0_ck where 0 was misspelled as O.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 2 +-
include/dt-bindings/clock/mt7986-clk.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 5f07de23756..303d959d750 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -452,7 +452,7 @@ static const struct mtk_gate infracfg_ao_gates[] = {
GATE_INFRA0_TOP(CK_INFRA_TRNG_CK, "infra_trng", CK_TOP_SYSAXI_SEL, 26),
/* INFRA1 */
GATE_INFRA1_TOP(CK_INFRA_THERM_CK, "infra_therm", CK_TOP_F26M_SEL, 0),
- GATE_INFRA1_TOP(CK_INFRA_I2CO_CK, "infra_i2co", CK_TOP_I2C_SEL, 1),
+ GATE_INFRA1_TOP(CK_INFRA_I2C0_CK, "infra_i2co", CK_TOP_I2C_SEL, 1),
GATE_INFRA1_INFRA(CK_INFRA_UART0_CK, "infra_uart0", CK_INFRA_UART0_SEL,
2),
GATE_INFRA1_INFRA(CK_INFRA_UART1_CK, "infra_uart1", CK_INFRA_UART1_SEL,
3),
GATE_INFRA1_INFRA(CK_INFRA_UART2_CK, "infra_uart2", CK_INFRA_UART2_SEL,
4),
diff --git a/include/dt-bindings/clock/mt7986-clk.h
b/include/dt-bindings/clock/mt7986-clk.h
index 16faca5fef8..a48d57512d1 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -142,7 +142,7 @@
#define CK_INFRA_SEJ_CK15
#define CK_INFRA_SEJ_13M_CK16
#define CK_INFRA_THERM_CK 17
-#define CK_INFRA_I2CO_CK 18
+#define CK_INFRA_I2C0_CK 18
#define CK_INFRA_TRNG_CK 19
#define CK_INFRA_UART0_CK 20
#define CK_INFRA_UART1_CK 21
--
2.45.2
[PATCH 06/15] clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate
Add missing entry for IPCIE_PIPE_CK infra gate clock. Renumber the clock
order to match the expected offset in the gate array.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 3 ++-
include/dt-bindings/clock/mt7986-clk.h | 7 ---
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index f1870ce3d60..5f07de23756 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -336,7 +336,7 @@ static const struct mtk_parent infra_pwm_bsel_parents[] = {
static const struct mtk_parent infra_pcie_parents[] = {
TOP_PARENT(CK_TOP_CB_RTC_32P7K),
TOP_PARENT(CK_TOP_F26M_SEL),
- VOID_PARENT,
+ TOP_PARENT(CK_TOP_XTAL),
TOP_PARENT(CK_TOP_PEXTP_TL_SEL)
};
@@ -487,6 +487,7 @@ static const struct mtk_gate infracfg_ao_gates[] = {
2),
GATE_INFRA2_TOP(CK_INFRA_IUSB_CK, "infra_iusb", CK_TOP_U2U3_SEL, 3),
GATE_INFRA2_TOP(CK_INFRA_IPCIE_CK, "infra_ipcie", CK_TOP_PEXTP_TL_SEL,
12),
+ GATE_INFRA2_TOP(CK_INFRA_IPCIE_PIPE_CK, "infra_ipcie_pipe",
CK_TOP_XTAL, 13),
GATE_INFRA2_TOP(CK_INFRA_IPCIER_CK, "infra_ipcier", CK_TOP_F26M_SEL,
14),
GATE_INFRA2_TOP(CK_INFRA_IPCIEB_CK, "infra_ipcieb", CK_TOP_SYSAXI_SEL,
15),
};
diff --git a/include/dt-bindings/clock/mt7986-clk.h
b/include/dt-bindings/clock/mt7986-clk.h
index dbae389858a..16faca5fef8 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -167,9 +167,10 @@
#define CK_INFRA_IUSB_SYS_CK 40
#define CK_INFRA_IUSB_CK 41
#define CK_INFRA_IPCIE_CK 42
-#define CK_INFRA_IPCIER_CK 43
-#define CK_INFRA_IPCIEB_CK 44
-#define CLK_INFRA_AO_NR_CLK45
+#define CK_INFRA_IPCIE_PIPE_CK 43
+#define CK_INFRA_IPCIER_CK 44
+#define CK_INFRA_IPCIEB_CK 45
+#define CLK_INFRA_AO_NR_CLK46
/* APMIXEDSYS */
--
2.45.2
[PATCH 05/15] clk: mediatek: mt7986: drop 1/1 infracfg spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.
Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for infracfg and topckgen.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7986.dtsi | 18 +-
drivers/clk/mediatek/clk-mt7986.c | 235 -
include/dt-bindings/clock/mt7986-clk.h | 40 +
3 files changed, 120 insertions(+), 173 deletions(-)
diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi
index 276f82f2065..e26b85b8266 100644
--- a/arch/arm/dts/mt7986.dtsi
+++ b/arch/arm/dts/mt7986.dtsi
@@ -78,7 +78,7 @@
compatible = "mediatek,mt7986-timer";
reg = <0x10008000 0x1000>;
interrupts = ;
- clocks = <&infracfg CK_INFRA_CK_F26M>;
+ clocks = <&topckgen CK_TOP_F26M_SEL>;
clock-names = "gpt-clk";
bootph-all;
};
@@ -154,7 +154,7 @@
#clock-cells = <1>;
#pwm-cells = <2>;
interrupts = ;
- clocks = <&infracfg CK_INFRA_PWM>,
+ clocks = <&topckgen CK_TOP_PWM_SEL>,
<&infracfg_ao CK_INFRA_PWM_BSEL>,
<&infracfg_ao CK_INFRA_PWM1_CK>,
<&infracfg_ao CK_INFRA_PWM2_CK>;
@@ -163,9 +163,9 @@
<&infracfg CK_INFRA_PWM1_SEL>,
<&infracfg CK_INFRA_PWM2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D4>,
-<&infracfg CK_INFRA_PWM>,
-<&infracfg CK_INFRA_PWM>,
-<&infracfg CK_INFRA_PWM>;
+<&topckgen CK_TOP_PWM_SEL>,
+<&topckgen CK_TOP_PWM_SEL>,
+<&topckgen CK_TOP_PWM_SEL>;
clock-names = "top", "main", "pwm1", "pwm2";
status = "disabled";
bootph-all;
@@ -179,7 +179,7 @@
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_UART0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
-<&infracfg CK_INFRA_UART>;
+<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
status = "disabled";
bootph-all;
@@ -191,7 +191,7 @@
interrupts = ;
clocks = <&infracfg_ao CK_INFRA_UART1_CK>;
assigned-clocks = <&infracfg CK_INFRA_UART1_SEL>;
- assigned-clock-parents = <&infracfg CK_INFRA_CK_F26M>;
+ assigned-clock-parents = <&topckgen CK_TOP_F26M_SEL>;
mediatek,force-highspeed;
status = "disabled";
};
@@ -202,7 +202,7 @@
interrupts = ;
clocks = <&infracfg_ao CK_INFRA_UART2_CK>;
assigned-clocks = <&infracfg CK_INFRA_UART2_SEL>;
- assigned-clock-parents = <&infracfg CK_INFRA_CK_F26M>;
+ assigned-clock-parents = <&topckgen CK_TOP_F26M_SEL>;
mediatek,force-highspeed;
status = "disabled";
};
@@ -263,7 +263,7 @@
assigned-clocks = <&topckgen CK_TOP_SPI_SEL>,
<&infracfg CK_INFRA_SPI0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
-<&topckgen CK_INFRA_ISPI0>;
+<&topckgen CK_TOP_SPI_SEL>;
clock-names = "sel-clk", "spi-clk";
interrupts = ;
status = "disabled";
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index cb4d20a204d..f1870ce3d60 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -303,80 +303,50 @@ static const struct mtk_composite top_muxes[] = {
/* INFRA FIXED DIV */
static const struct mtk_fixed_factor infra_fixed_divs[] = {
- TOP_FACTOR(CK_INFR
[PATCH 04/15] clk: mediatek: mt7986: fix wrong parent for INFRA_ADC_26M_CK
Fix wrong parent for INFRA_ADC_26M_CK as should be INFRA_ADC_FRC_CK
instead of INFRA_CK_F26M. This is to match implementation on upstream
kernel linux.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 72300d80884..cb4d20a204d 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -492,7 +492,7 @@ static const struct mtk_gate infracfg_ao_gates[] = {
CK_INFRA_PERI_133M, 18),
GATE_INFRA1(CK_INFRA_MSDC_66M_CK, "infra_msdc_66m", CK_INFRA_66M_PHCK,
19),
- GATE_INFRA1(CK_INFRA_ADC_26M_CK, "infra_adc_26m", CK_INFRA_CK_F26M, 20),
+ GATE_INFRA1(CK_INFRA_ADC_26M_CK, "infra_adc_26m", CK_INFRA_ADC_FRC_CK,
20),
GATE_INFRA1(CK_INFRA_ADC_FRC_CK, "infra_adc_frc", CK_INFRA_CK_F26M, 21),
GATE_INFRA1(CK_INFRA_FBIST2FPC_CK, "infra_fbist2fpc", CK_INFRA_NFI_CK,
23),
--
2.45.2
[PATCH 03/15] clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2
Upstream kernel linux clock include use SYSAXI_D2 instead of 66M_MCK.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 20 ++--
include/dt-bindings/clock/mt7986-clk.h | 2 +-
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 67ed1768046..72300d80884 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -309,7 +309,7 @@ static const struct mtk_fixed_factor infra_fixed_divs[] = {
TOP_FACTOR(CK_INFRA_I2C, "infra_i2c", CK_TOP_I2C_SEL, 1, 1),
TOP_FACTOR(CK_INFRA_ISPI1, "infra_ispi1", CK_TOP_SPINFI_SEL, 1, 1),
TOP_FACTOR(CK_INFRA_PWM, "infra_pwm", CK_TOP_PWM_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_66M_MCK, "infra_66m_mck", CK_TOP_SYSAXI_SEL, 1, 2),
+ TOP_FACTOR(CK_INFRA_SYSAXI_D2, "infra_sysaxi_d2", CK_TOP_SYSAXI_SEL, 1,
2),
TOP_FACTOR(CK_INFRA_CK_F32K, "infra_ck_f32k", CK_TOP_CB_RTC_32P7K, 1,
1),
TOP_FACTOR(CK_INFRA_PCIE_CK, "infra_pcie", CK_TOP_PEXTP_TL_SEL, 1, 1),
@@ -365,7 +365,7 @@ static const int infra_spi1_parents[] = { CK_INFRA_I2C,
CK_INFRA_ISPI1 };
static const int infra_pwm_bsel_parents[] = { CK_INFRA_CK_F32K,
CK_INFRA_CK_F26M,
- CK_INFRA_66M_MCK, CK_INFRA_PWM };
+ CK_INFRA_SYSAXI_D2, CK_INFRA_PWM
};
static const int infra_pcie_parents[] = { CK_INFRA_CK_F32K, CK_INFRA_CK_F26M,
-1, CK_INFRA_PCIE_CK };
@@ -447,8 +447,8 @@ static const struct mtk_gate_regs infra_2_cg_regs = {
static const struct mtk_gate infracfg_ao_gates[] = {
/* INFRA0 */
- GATE_INFRA0(CK_INFRA_GPT_STA, "infra_gpt_sta", CK_INFRA_66M_MCK, 0),
- GATE_INFRA0(CK_INFRA_PWM_HCK, "infra_pwm_hck", CK_INFRA_66M_MCK, 1),
+ GATE_INFRA0(CK_INFRA_GPT_STA, "infra_gpt_sta", CK_INFRA_SYSAXI_D2, 0),
+ GATE_INFRA0(CK_INFRA_PWM_HCK, "infra_pwm_hck", CK_INFRA_SYSAXI_D2, 1),
GATE_INFRA0(CK_INFRA_PWM_STA, "infra_pwm_sta", CK_INFRA_PWM_BCK, 2),
GATE_INFRA0(CK_INFRA_PWM1_CK, "infra_pwm1", CK_INFRA_PWM_CK1, 3),
GATE_INFRA0(CK_INFRA_PWM2_CK, "infra_pwm2", CK_INFRA_PWM_CK2, 4),
@@ -463,9 +463,9 @@ static const struct mtk_gate infracfg_ao_gates[] = {
13),
GATE_INFRA0(CK_INFRA_DRAMC_26M_CK, "infra_dramc_26m", CK_INFRA_CK_F26M,
14),
- GATE_INFRA0(CK_INFRA_DBG_CK, "infra_dbg", CK_INFRA_66M_MCK, 15),
- GATE_INFRA0(CK_INFRA_AP_DMA_CK, "infra_ap_dma", CK_INFRA_66M_MCK, 16),
- GATE_INFRA0(CK_INFRA_SEJ_CK, "infra_sej", CK_INFRA_66M_MCK, 24),
+ GATE_INFRA0(CK_INFRA_DBG_CK, "infra_dbg", CK_INFRA_SYSAXI_D2, 15),
+ GATE_INFRA0(CK_INFRA_AP_DMA_CK, "infra_ap_dma", CK_INFRA_SYSAXI_D2, 16),
+ GATE_INFRA0(CK_INFRA_SEJ_CK, "infra_sej", CK_INFRA_SYSAXI_D2, 24),
GATE_INFRA0(CK_INFRA_SEJ_13M_CK, "infra_sej_13m", CK_INFRA_CK_F26M, 25),
GATE_INFRA0(CK_INFRA_TRNG_CK, "infra_trng", CK_INFRA_HD_133M, 26),
/* INFRA1 */
@@ -477,12 +477,12 @@ static const struct mtk_gate infracfg_ao_gates[] = {
GATE_INFRA1(CK_INFRA_NFI1_CK, "infra_nfi1", CK_INFRA_NFI_CK, 8),
GATE_INFRA1(CK_INFRA_SPINFI1_CK, "infra_spinfi1", CK_INFRA_SPINFI_CK,
9),
- GATE_INFRA1(CK_INFRA_NFI_HCK_CK, "infra_nfi_hck", CK_INFRA_66M_MCK, 10),
+ GATE_INFRA1(CK_INFRA_NFI_HCK_CK, "infra_nfi_hck", CK_INFRA_SYSAXI_D2,
10),
GATE_INFRA1(CK_INFRA_SPI0_CK, "infra_spi0", CK_INFRA_MUX_SPI0, 11),
GATE_INFRA1(CK_INFRA_SPI1_CK, "infra_spi1", CK_INFRA_MUX_SPI1, 12),
- GATE_INFRA1(CK_INFRA_SPI0_HCK_CK, "infra_spi0_hck", CK_INFRA_66M_MCK,
+ GATE_INFRA1(CK_INFRA_SPI0_HCK_CK, "infra_spi0_hck", CK_INFRA_SYSAXI_D2,
13),
- GATE_INFRA1(CK_INFRA_SPI1_HCK_CK, "infra_spi1_hck", CK_INFRA_66M_MCK,
+ GATE_INFRA1(CK_INFRA_SPI1_HCK_CK, "infra_spi1_hck", CK_INFRA_SYSAXI_D2,
14),
GATE_INFRA1(CK_INFRA_FRTC_CK, "infra_frtc", CK_INFRA_RTC_32K, 15),
GATE_INFRA1(CK_INFRA_MSDC_CK, "infra_msdc", CK_INFRA_FMSDC_CK, 16),
diff --git a/include/dt-bindings/clock/mt7986-clk.h
b/include/dt-bindings/clock/mt7986-clk.h
index 30720f9fb42..f45ef7afcc6 100644
--- a/include/dt-bindings/clock/mt7986-clk.h
+++ b/include/dt-bindings/clock/mt7986-clk.h
@@ -16,7 +16,7 @@
#define CK_INFRA_I2C 3
#define CK_INFRA_ISPI1 4
#define CK_INFRA_PWM 5
-#define CK_INFRA_66M_MCK 6
+#define CK_INFRA_SYSAXI_D2 6
#define CK_INFRA_CK_F32K 7
#define CK_INFRA_PCIE_CK 8
#define CK_INFRA_PWM_BCK 9
--
2.45.2
[PATCH 02/15] clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7986.dtsi | 2 +-
drivers/clk/mediatek/clk-mt7986.c | 72 +-
include/dt-bindings/clock/mt7986-clk.h | 4 +-
3 files changed, 39 insertions(+), 39 deletions(-)
diff --git a/arch/arm/dts/mt7986.dtsi b/arch/arm/dts/mt7986.dtsi
index 30b5a899701..276f82f2065 100644
--- a/arch/arm/dts/mt7986.dtsi
+++ b/arch/arm/dts/mt7986.dtsi
@@ -178,7 +178,7 @@
clocks = <&infracfg_ao CK_INFRA_UART0_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_UART0_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+ assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&infracfg CK_INFRA_UART>;
mediatek,force-highspeed;
status = "disabled";
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index 1e8c3278346..67ed1768046 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -41,7 +41,7 @@ static const struct mtk_fixed_clk fixed_pll_clks[] = {
/* TOPCKGEN FIXED CLK */
static const struct mtk_fixed_clk top_fixed_clks[] = {
- FIXED_CLK(CK_TOP_CB_CKSQ_40M, CLK_XTAL, 4000),
+ FIXED_CLK(CK_TOP_XTAL, CLK_XTAL, 4000),
};
/* TOPCKGEN FIXED DIV */
@@ -77,18 +77,18 @@ static const struct mtk_fixed_factor top_fixed_divs[] = {
PLL_FACTOR(CK_TOP_WEDMCU_D5_D2, "wedmcu_d5_d2", CK_APMIXED_WEDMCUPLL, 1,
10),
PLL_FACTOR(CK_TOP_CB_SGM_325M, "cb_sgm_325m", CK_APMIXED_SGMPLL, 1, 1),
- TOP_FACTOR(CK_TOP_CB_CKSQ_40M_D2, "cb_cksq_40m_d2", CK_TOP_CB_CKSQ_40M,
+ TOP_FACTOR(CK_TOP_XTAL_D2, "xtal_d2", CK_TOP_XTAL,
1, 2),
- TOP_FACTOR(CK_TOP_CB_RTC_32K, "cb_rtc_32k", CK_TOP_CB_CKSQ_40M, 1,
+ TOP_FACTOR(CK_TOP_CB_RTC_32K, "cb_rtc_32k", CK_TOP_XTAL, 1,
1250),
- TOP_FACTOR(CK_TOP_CB_RTC_32P7K, "cb_rtc_32p7k", CK_TOP_CB_CKSQ_40M, 1,
+ TOP_FACTOR(CK_TOP_CB_RTC_32P7K, "cb_rtc_32p7k", CK_TOP_XTAL, 1,
1220),
TOP_FACTOR(CK_TOP_NFI1X, "nfi1x", CK_TOP_NFI1X_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_EQ_RX250M, "usb_eq_rx250m", CK_TOP_CB_CKSQ_40M, 1,
+ TOP_FACTOR(CK_TOP_USB_EQ_RX250M, "usb_eq_rx250m", CK_TOP_XTAL, 1,
1),
- TOP_FACTOR(CK_TOP_USB_TX250M, "usb_tx250m", CK_TOP_CB_CKSQ_40M, 1, 1),
- TOP_FACTOR(CK_TOP_USB_LN0_CK, "usb_ln0", CK_TOP_CB_CKSQ_40M, 1, 1),
- TOP_FACTOR(CK_TOP_USB_CDR_CK, "usb_cdr", CK_TOP_CB_CKSQ_40M, 1, 1),
+ TOP_FACTOR(CK_TOP_USB_TX250M, "usb_tx250m", CK_TOP_XTAL, 1, 1),
+ TOP_FACTOR(CK_TOP_USB_LN0_CK, "usb_ln0", CK_TOP_XTAL, 1, 1),
+ TOP_FACTOR(CK_TOP_USB_CDR_CK, "usb_cdr", CK_TOP_XTAL, 1, 1),
TOP_FACTOR(CK_TOP_SPINFI_BCK, "spinfi_bck", CK_TOP_SPINFI_SEL, 1, 1),
TOP_FACTOR(CK_TOP_I2C_BCK, "i2c_bck", CK_TOP_I2C_SEL, 1, 1),
TOP_FACTOR(CK_TOP_PEXTP_TL, "pextp_tl", CK_TOP_PEXTP_TL_SEL, 1, 1),
@@ -114,91 +114,91 @@ static const struct mtk_fixed_factor top_fixed_divs[] = {
};
/* TOPCKGEN MUX PARENTS */
-static const int nfi1x_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_CB_MM_D8,
+static const int nfi1x_parents[] = { CK_TOP_XTAL, CK_TOP_CB_MM_D8,
CK_TOP_NET1_D8_D2, CK_TOP_NET2_D3_D2,
CK_TOP_CB_M_D4, CK_TOP_MM_D8_D2,
CK_TOP_WEDMCU_D5_D2, CK_TOP_CB_M_D8 };
static const int spinfi_parents[] = {
- CK_TOP_CB_CKSQ_40M_D2, CK_TOP_CB_CKSQ_40M, CK_TOP_NET1_D5_D4,
+ CK_TOP_XTAL_D2, CK_TOP_XTAL, CK_TOP_NET1_D5_D4,
CK_TOP_CB_M_D4, CK_TOP_MM_D8_D2,CK_TOP_WEDMCU_D5_D2,
CK_TOP_MM_D3_D8, CK_TOP_CB_M_D8
};
-static const int spi_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_CB_M_D2,
+static const int spi_parents[] = { CK_TOP_XTAL, CK_TOP_CB_M_D2,
CK_TOP_CB_MM_D8,CK_TOP_NET1_D8_D2,
CK_TOP_NET2_D3_D2, CK_TOP_NET1_D5_D4,
CK_TOP_CB_M_D4, CK_TOP_WEDMCU_D5_D2 };
-static const int uart_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_CB_M_D8,
+static const int uart_parents[] = { CK_TOP_XTAL, CK_TOP_CB_M_D8,
CK_TOP_M_D8_D2 };
-static const int pwm_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_NET1_D8_D2,
+static const
[PATCH 01/15] clk: mediatek: mt7986: fix wrong shift for PCIe clocks
Fix wrong shift for PCIe clocks. This cause the PCIe port to malfunction
as the gate clocks weren't correctly enabled.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7986.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7986.c
b/drivers/clk/mediatek/clk-mt7986.c
index efc3d4120b7..1e8c3278346 100644
--- a/drivers/clk/mediatek/clk-mt7986.c
+++ b/drivers/clk/mediatek/clk-mt7986.c
@@ -504,8 +504,8 @@ static const struct mtk_gate infracfg_ao_gates[] = {
GATE_INFRA2(CK_INFRA_IUSB_SYS_CK, "infra_iusb_sys", CK_INFRA_USB_SYS_CK,
2),
GATE_INFRA2(CK_INFRA_IUSB_CK, "infra_iusb", CK_INFRA_USB_CK, 3),
- GATE_INFRA2(CK_INFRA_IPCIE_CK, "infra_ipcie", CK_INFRA_PCIE_CK, 13),
- GATE_INFRA2(CK_INFRA_IPCIER_CK, "infra_ipcier", CK_INFRA_F26M_CK0, 15),
+ GATE_INFRA2(CK_INFRA_IPCIE_CK, "infra_ipcie", CK_INFRA_PCIE_CK, 12),
+ GATE_INFRA2(CK_INFRA_IPCIER_CK, "infra_ipcier", CK_INFRA_F26M_CK0, 14),
GATE_INFRA2(CK_INFRA_IPCIEB_CK, "infra_ipcieb", CK_INFRA_133M_PHCK, 15),
};
--
2.45.2
[PATCH 00/15] clk: mediatek: mt7986: clk migration for OF_UPSTREAM
These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS. Christian Marangi (15): clk: mediatek: mt7986: fix wrong shift for PCIe clocks clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL clk: mediatek: mt7986: rename 66M_MCK to SYSAXI_D2 clk: mediatek: mt7986: fix wrong parent for INFRA_ADC_26M_CK clk: mediatek: mt7986: drop 1/1 infracfg spurious factor clk: mediatek: mt7986: add missing entry for IPCIE_PIPE_CK infra gate clk: mediatek: mt7986: fix typo for infra_i2c0_ck clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming clk: mediatek: mt7986: reorder TOPCKGEN factor ID clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen clk: mediatek: mt7986: comment out CK_TOP_A_TUNER as not used clk: mediatek: mt7986: move INFRA_TRNG_CK to the bottom of the list clk: mediatek: mt7986: replace infracfg ID with upstream linux clk: mediatek: mt7986: convert to unified infracfg gates + muxes clk: mediatek: mt7986: rename CK to CLK arch/arm/dts/mt7986.dtsi | 95 ++-- drivers/clk/mediatek/clk-mt7986.c | 658 - include/dt-bindings/clock/mt7986-clk.h | 359 ++ 3 files changed, 511 insertions(+), 601 deletions(-) -- 2.45.2
[PATCH 13/13] clk: mediatek: mt7988: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel linux. Signed-off-by: Christian Marangi --- arch/arm/dts/mt7988.dtsi | 84 +-- drivers/clk/mediatek/clk-mt7988.c | 768 - include/dt-bindings/clock/mt7988-clk.h | 450 +++ 3 files changed, 651 insertions(+), 651 deletions(-) diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi index 4695e1db1ad..e120e5084ce 100644 --- a/arch/arm/dts/mt7988.dtsi +++ b/arch/arm/dts/mt7988.dtsi @@ -255,11 +255,11 @@ compatible = "mediatek,hsuart"; reg = <0 0x1100 0 0x100>; interrupts = ; - clocks = <&infracfg CK_INFRA_52M_UART0_CK>; - assigned-clocks = <&topckgen CK_TOP_UART_SEL>, - <&infracfg CK_INFRA_MUX_UART0_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_XTAL>, -<&topckgen CK_TOP_UART_SEL>; + clocks = <&infracfg CLK_INFRA_52M_UART0_CK>; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_MUX_UART0_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_XTAL>, +<&topckgen CLK_TOP_UART_SEL>; status = "disabled"; }; @@ -267,11 +267,11 @@ compatible = "mediatek,hsuart"; reg = <0 0x11000100 0 0x100>; interrupts = ; - clocks = <&infracfg CK_INFRA_52M_UART1_CK>; - assigned-clocks = <&topckgen CK_TOP_UART_SEL>, - <&infracfg CK_INFRA_MUX_UART1_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_XTAL>, -<&topckgen CK_TOP_UART_SEL>; + clocks = <&infracfg CLK_INFRA_52M_UART1_CK>; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_MUX_UART1_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_XTAL>, +<&topckgen CLK_TOP_UART_SEL>; status = "disabled"; }; @@ -279,11 +279,11 @@ compatible = "mediatek,hsuart"; reg = <0 0x11000200 0 0x100>; interrupts = ; - clocks = <&infracfg CK_INFRA_52M_UART2_CK>; - assigned-clocks = <&topckgen CK_TOP_UART_SEL>, - <&infracfg CK_INFRA_MUX_UART2_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_XTAL>, -<&topckgen CK_TOP_UART_SEL>; + clocks = <&infracfg CLK_INFRA_52M_UART2_CK>; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_MUX_UART2_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_XTAL>, +<&topckgen CLK_TOP_UART_SEL>; status = "disabled"; }; @@ -294,8 +294,8 @@ <0 0x10217080 0 0x80>; interrupts = ; clock-div = <1>; - clocks = <&infracfg CK_INFRA_I2C_BCK>, -<&infracfg CK_INFRA_66M_AP_DMA_BCK>; + clocks = <&infracfg CLK_INFRA_I2C_BCK>, +<&infracfg CLK_INFRA_66M_AP_DMA_BCK>; clock-names = "main", "dma"; #address-cells = <1>; #size-cells = <0>; @@ -309,8 +309,8 @@ <0 0x10217100 0 0x80>; interrupts = ; clock-div = <1>; - clocks = <&infracfg CK_INFRA_I2C_BCK>, -<&infracfg CK_INFRA_66M_AP_DMA_BCK>; + clocks = <&infracfg CLK_INFRA_I2C_BCK>, +<&infracfg CLK_INFRA_66M_AP_DMA_BCK>; clock-names = "main", "dma"; #address-cells = <1>; #size-cells = <0>; @@ -324,8 +324,8 @@ <0 0x10217180 0 0x80>; interrupts = ; clock-div = <1>; - clocks = <&infracfg CK_INFRA_I2C_BCK>, -<&infracfg CK_INFRA_66M_AP_DMA_BCK>; + clocks = <&infracfg CLK_INFRA_I2C_BCK>, +
[PATCH 12/13] clk: mediatek: mt7988: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.
Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7988.dtsi | 67 ++-
drivers/clk/mediatek/clk-mt7988.c | 24 +--
2 files changed, 32 insertions(+), 59 deletions(-)
diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi
index 10d5c2a33c3..4695e1db1ad 100644
--- a/arch/arm/dts/mt7988.dtsi
+++ b/arch/arm/dts/mt7988.dtsi
@@ -97,13 +97,6 @@
interrupts = ;
};
- infracfg_ao_cgs: infracfg_ao_cgs@10001000 {
- compatible = "mediatek,mt7988-infracfg_ao_cgs", "syscon";
- reg = <0 0x10001000 0 0x1000>;
- clock-parent = <&infracfg_ao>;
- #clock-cells = <1>;
- };
-
apmixedsys: apmixedsys@1001e000 {
compatible = "mediatek,mt7988-fixed-plls", "syscon";
reg = <0 0x1001e000 0 0x1000>;
@@ -251,7 +244,7 @@
#clock-cells = <1>;
};
- infracfg_ao: infracfg@10001000 {
+ infracfg: infracfg@10001000 {
compatible = "mediatek,mt7988-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
clock-parent = <&topckgen>;
@@ -262,9 +255,9 @@
compatible = "mediatek,hsuart";
reg = <0 0x1100 0 0x100>;
interrupts = ;
- clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART0_CK>;
+ clocks = <&infracfg CK_INFRA_52M_UART0_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
- <&infracfg_ao CK_INFRA_MUX_UART0_SEL>;
+ <&infracfg CK_INFRA_MUX_UART0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&topckgen CK_TOP_UART_SEL>;
status = "disabled";
@@ -274,9 +267,9 @@
compatible = "mediatek,hsuart";
reg = <0 0x11000100 0 0x100>;
interrupts = ;
- clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART1_CK>;
+ clocks = <&infracfg CK_INFRA_52M_UART1_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
- <&infracfg_ao CK_INFRA_MUX_UART1_SEL>;
+ <&infracfg CK_INFRA_MUX_UART1_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&topckgen CK_TOP_UART_SEL>;
status = "disabled";
@@ -286,9 +279,9 @@
compatible = "mediatek,hsuart";
reg = <0 0x11000200 0 0x100>;
interrupts = ;
- clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART2_CK>;
+ clocks = <&infracfg CK_INFRA_52M_UART2_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
- <&infracfg_ao CK_INFRA_MUX_UART2_SEL>;
+ <&infracfg CK_INFRA_MUX_UART2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&topckgen CK_TOP_UART_SEL>;
status = "disabled";
@@ -301,8 +294,8 @@
<0 0x10217080 0 0x80>;
interrupts = ;
clock-div = <1>;
- clocks = <&infracfg_ao CK_INFRA_I2C_BCK>,
-<&infracfg_ao CK_INFRA_66M_AP_DMA_BCK>;
+ clocks = <&infracfg CK_INFRA_I2C_BCK>,
+<&infracfg CK_INFRA_66M_AP_DMA_BCK>;
clock-names = "main", "dma";
#address-cells = <1>;
#size-cells = <0>;
@@ -316,8 +309,8 @@
<0 0x10217100 0 0x80>;
interrupts = ;
clock-div = <1>;
- clocks = <&infracfg_ao CK_INFRA_I2C_BCK>,
-<&infracfg_ao CK_INFRA_66M_AP_DMA_BCK>;
+ clocks = <&infracfg CK_INFRA_I2C_BCK>,
+<&infracfg CK_INFRA_66M_AP_DMA_BCK>;
clock-names = "main", "dma";
#address-cells = <1>;
#size-cells = <0>;
@@ -331,8 +324,8 @@
<0 0x10217180 0 0x80>;
interrupts = ;
clock-div = <1>;
- clocks = <&
[PATCH 11/13] clk: mediatek: mt7988: replace clock ID with upstream linux
Replace infracfg clk ID with upstream linux version.
The same format is used here with the factor first, then mux and then
gates.
To correctly reference the gates in clk_gate function, define the
gates_offs value in clk_tree now that they are at an offset from mux and
factor.
Drop any comment that reference the clock ID as we now have a 1:1 match
with upstream kernel linux.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 1 +
include/dt-bindings/clock/mt7988-clk.h | 420 -
2 files changed, 210 insertions(+), 211 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index b46ca9f4601..7ef03941e24 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -788,6 +788,7 @@ static const struct mtk_clk_tree mt7988_topckgen_clk_tree =
{
static const struct mtk_clk_tree mt7988_infracfg_clk_tree = {
.muxes_offs = CK_INFRA_MUX_UART0_SEL,
+ .gates_offs = CK_INFRA_PCIE_PERI_26M_CK_P0,
.muxes = infracfg_mtk_mux,
.flags = CLK_BYPASS_XTAL,
.xtal_rate = 40 * MHZ,
diff --git a/include/dt-bindings/clock/mt7988-clk.h
b/include/dt-bindings/clock/mt7988-clk.h
index 653fd8f6d29..7c64f5f3d03 100644
--- a/include/dt-bindings/clock/mt7988-clk.h
+++ b/include/dt-bindings/clock/mt7988-clk.h
@@ -9,224 +9,222 @@
#define _DT_BINDINGS_CLK_MT7988_H
/* INFRACFG_AO */
-#define GATE_OFFSET 65
/* mtk_mux */
-#define CK_INFRA_MUX_UART0_SEL 0 /* Linux CLK ID (0) */
-#define CK_INFRA_MUX_UART1_SEL 1 /* Linux CLK ID (1) */
-#define CK_INFRA_MUX_UART2_SEL 2 /* Linux CLK ID (2) */
-#define CK_INFRA_MUX_SPI0_SEL 3 /* Linux CLK ID (3) */
-#define CK_INFRA_MUX_SPI1_SEL 4 /* Linux CLK ID (4) */
-#define CK_INFRA_MUX_SPI2_SEL 5 /* Linux CLK ID (5) */
-#define CK_INFRA_PWM_SEL 6 /* Linux CLK ID (6) */
-#define CK_INFRA_PWM_CK1_SEL 7 /* Linux CLK ID (7) */
-#define CK_INFRA_PWM_CK2_SEL 8 /* Linux CLK ID (8) */
-#define CK_INFRA_PWM_CK3_SEL 9 /* Linux CLK ID (9) */
-#define CK_INFRA_PWM_CK4_SEL 10 /* Linux CLK ID (10) */
-#define CK_INFRA_PWM_CK5_SEL 11 /* Linux CLK ID (11) */
-#define CK_INFRA_PWM_CK6_SEL 12 /* Linux CLK ID (12) */
-#define CK_INFRA_PWM_CK7_SEL 13 /* Linux CLK ID (13) */
-#define CK_INFRA_PWM_CK8_SEL 14 /* Linux CLK ID (14) */
-#define CK_INFRA_PCIE_GFMUX_TL_O_P0_SEL 15 /* Linux CLK ID (15) */
-#define CK_INFRA_PCIE_GFMUX_TL_O_P1_SEL 16 /* Linux CLK ID (16) */
-#define CK_INFRA_PCIE_GFMUX_TL_O_P2_SEL 17 /* Linux CLK ID (17) */
-#define CK_INFRA_PCIE_GFMUX_TL_O_P3_SEL 18 /* Linux CLK ID (18) */
+#define CK_INFRA_MUX_UART0_SEL 0
+#define CK_INFRA_MUX_UART1_SEL 1
+#define CK_INFRA_MUX_UART2_SEL 2
+#define CK_INFRA_MUX_SPI0_SEL 3
+#define CK_INFRA_MUX_SPI1_SEL 4
+#define CK_INFRA_MUX_SPI2_SEL 5
+#define CK_INFRA_PWM_SEL 6
+#define CK_INFRA_PWM_CK1_SEL 7
+#define CK_INFRA_PWM_CK2_SEL 8
+#define CK_INFRA_PWM_CK3_SEL 9
+#define CK_INFRA_PWM_CK4_SEL 10
+#define CK_INFRA_PWM_CK5_SEL 11
+#define CK_INFRA_PWM_CK6_SEL 12
+#define CK_INFRA_PWM_CK7_SEL 13
+#define CK_INFRA_PWM_CK8_SEL 14
+#define CK_INFRA_PCIE_GFMUX_TL_O_P0_SEL15
+#define CK_INFRA_PCIE_GFMUX_TL_O_P1_SEL16
+#define CK_INFRA_PCIE_GFMUX_TL_O_P2_SEL17
+#define CK_INFRA_PCIE_GFMUX_TL_O_P3_SEL18
+
+/* INFRACFG */
/* mtk_gate */
-#define CK_INFRA_PCIE_PERI_26M_CK_P0 (65 - GATE_OFFSET) /* Linux CLK ID (99) */
-#define CK_INFRA_PCIE_PERI_26M_CK_P1
\
- (66 - GATE_OFFSET) /* Linux CLK ID (100) */
-#define CK_INFRA_PCIE_PERI_26M_CK_P2
\
- (67 - GATE_OFFSET) /* Linux CLK ID (101) */
-#define CK_INFRA_PCIE_PERI_26M_CK_P3
\
- (68 - GATE_OFFSET) /* Linux CLK ID (102) */
-#define CK_INFRA_66M_GPT_BCK(69 - GATE_OFFSET) /* Linux CLK ID (19) */
-#define CK_INFRA_66M_PWM_HCK(70 - GATE_OFFSET) /* Linux CLK ID (20) */
-#define CK_INFRA_66M_PWM_BCK(71 - GATE_OFFSET) /* Linux CLK ID (21) */
-#define CK_INFRA_66M_PWM_CK1(72 - GATE_OFFSET) /* Linux CLK ID (22) */
-#define CK_INFRA_66M_PWM_CK2(73 - GATE_OFFSET) /* Linux CLK ID (23) */
-#define CK_INFRA_66M_PWM_CK3(74 - GATE_OFFSET) /* Linux CLK ID (24) */
-#define CK_INFRA_66M_PWM_CK4(75 - GATE_OFFSET) /* Linux CLK ID (25) */
-#define CK_INFRA_66M_PWM_CK5(76 - GATE_OFFSET) /* Linux CLK ID (26) */
-#define CK_INFRA_66M_PWM_CK6(77 - GATE_OFFSET) /* Linux CLK ID (27) */
-#define CK_INFRA_66M_PWM_CK7
[PATCH 10/13] clk: mediatek: mt7988: comment out infracfg clk not defined
Comment out infracfg clk not defined in upstream kernel linux clock ID
include. These clock are not used and can be safely commented. Keep them
just to have a reference of their existence.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 16 ++--
include/dt-bindings/clock/mt7988-clk.h | 116 -
2 files changed, 66 insertions(+), 66 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index 4c94cda2b23..b46ca9f4601 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -657,17 +657,17 @@ static const struct mtk_gate infracfg_mtk_gates[] = {
CK_TOP_SYSAXI_SEL, 29),
GATE_INFRA1_TOP(CK_INFRA_PRE_CK_SEJ_F13M, "infra_pre_ck_sej_f13m",
CK_TOP_INFRA_F26M_SEL, 30),
- GATE_INFRA1_TOP(CK_INFRA_66M_TRNG, "infra_hf_66m_trng",
CK_TOP_SYSAXI_SEL,
- 31),
+ /* GATE_INFRA1_TOP(CK_INFRA_66M_TRNG, "infra_hf_66m_trng",
CK_TOP_SYSAXI_SEL,
+ 31), */
GATE_INFRA2_TOP(CK_INFRA_26M_THERM_SYSTEM, "infra_hf_26m_therm_system",
CK_TOP_INFRA_F26M_SEL, 0),
GATE_INFRA2_TOP(CK_INFRA_I2C_BCK, "infra_i2c_bck", CK_TOP_I2C_SEL, 1),
- GATE_INFRA2_TOP(CK_INFRA_66M_UART0_PCK, "infra_hf_66m_uart0_pck",
- CK_TOP_SYSAXI_SEL, 3),
- GATE_INFRA2_TOP(CK_INFRA_66M_UART1_PCK, "infra_hf_66m_uart1_pck",
- CK_TOP_SYSAXI_SEL, 4),
- GATE_INFRA2_TOP(CK_INFRA_66M_UART2_PCK, "infra_hf_66m_uart2_pck",
- CK_TOP_SYSAXI_SEL, 5),
+ /* GATE_INFRA2_TOP(CK_INFRA_66M_UART0_PCK, "infra_hf_66m_uart0_pck",
+ CK_TOP_SYSAXI_SEL, 3), */
+ /* GATE_INFRA2_TOP(CK_INFRA_66M_UART1_PCK, "infra_hf_66m_uart1_pck",
+ CK_TOP_SYSAXI_SEL, 4), */
+ /* GATE_INFRA2_TOP(CK_INFRA_66M_UART2_PCK, "infra_hf_66m_uart2_pck",
+ CK_TOP_SYSAXI_SEL, 5), */
GATE_INFRA2_INFRA(CK_INFRA_52M_UART0_CK, "infra_f_52m_uart0",
CK_INFRA_MUX_UART0_SEL, 3),
GATE_INFRA2_INFRA(CK_INFRA_52M_UART1_CK, "infra_f_52m_uart1",
diff --git a/include/dt-bindings/clock/mt7988-clk.h
b/include/dt-bindings/clock/mt7988-clk.h
index b4b95a04087..653fd8f6d29 100644
--- a/include/dt-bindings/clock/mt7988-clk.h
+++ b/include/dt-bindings/clock/mt7988-clk.h
@@ -60,64 +60,64 @@
#define CK_INFRA_66M_AP_DMA_BCK (88 - GATE_OFFSET) /* Linux CLK ID
(38) */
#define CK_INFRA_66M_SEJ_BCK(89 - GATE_OFFSET) /* Linux CLK ID (39) */
#define CK_INFRA_PRE_CK_SEJ_F13M (90 - GATE_OFFSET) /* Linux CLK ID (40) */
-#define CK_INFRA_66M_TRNG (91 - GATE_OFFSET) /* Linux CLK ID (41) */
-#define CK_INFRA_26M_THERM_SYSTEM(92 - GATE_OFFSET) /* Linux CLK ID (42) */
-#define CK_INFRA_I2C_BCK(93 - GATE_OFFSET) /* Linux CLK ID (43) */
-#define CK_INFRA_66M_UART0_PCK (94 - GATE_OFFSET) /* Linux CLK ID (44) */
-#define CK_INFRA_66M_UART1_PCK (95 - GATE_OFFSET) /* Linux CLK ID (45) */
-#define CK_INFRA_66M_UART2_PCK (96 - GATE_OFFSET) /* Linux CLK ID (46) */
-#define CK_INFRA_52M_UART0_CK (97 - GATE_OFFSET) /* Linux CLK ID (47) */
-#define CK_INFRA_52M_UART1_CK (98 - GATE_OFFSET) /* Linux CLK ID (48) */
-#define CK_INFRA_52M_UART2_CK (99 - GATE_OFFSET) /* Linux CLK ID (49) */
-#define CK_INFRA_NFI(100 - GATE_OFFSET) /* Linux CLK ID (50) */
-#define CK_INFRA_SPINFI (101 - GATE_OFFSET) /* Linux CLK
ID (51) */
-#define CK_INFRA_66M_NFI_HCK(102 - GATE_OFFSET) /* Linux CLK ID (52) */
-#define CK_INFRA_104M_SPI0 (103 - GATE_OFFSET) /* Linux CLK ID (53) */
-#define CK_INFRA_104M_SPI1 (104 - GATE_OFFSET) /* Linux CLK ID (54) */
-#define CK_INFRA_104M_SPI2_BCK (105 - GATE_OFFSET) /* Linux CLK ID (55) */
-#define CK_INFRA_66M_SPI0_HCK (106 - GATE_OFFSET) /* Linux CLK ID (56) */
-#define CK_INFRA_66M_SPI1_HCK (107 - GATE_OFFSET) /* Linux CLK ID (57) */
-#define CK_INFRA_66M_SPI2_HCK (108 - GATE_OFFSET) /* Linux CLK ID (58) */
-#define CK_INFRA_66M_FLASHIF_AXI (109 - GATE_OFFSET) /* Linux CLK ID (59)
*/
-#define CK_INFRA_RTC(110 - GATE_OFFSET) /* Linux CLK ID (60) */
-#define CK_INFRA_26M_ADC_BCK(111 - GATE_OFFSET) /* Linux CLK ID (61) */
-#define CK_INFRA_RC_ADC (112 - GATE_OFFSET) /* Linux CLK
ID (62) */
-#define CK_INFRA_MSDC400(113 - GATE_OFFSET) /* Linux CLK ID (63) */
-#define CK_INFRA_MSDC2_HCK (114 - GATE_OFFSET) /* Linux CLK ID (64) */
-#define CK_INFRA_133M_MSDC_0_HCK (115 - GATE_OFFSET) /* Linux CLK ID (65)
*/
-#define CK_INFRA_66M_MSDC_0_HCK (116 - GATE_OFFSET) /* Linux CLK
ID
[PATCH 09/13] clk: mediatek: mt7988: drop 1/1 spurious factor for topckgen
Now that we can have advanced parent handling for mux, we can drop
spurious topckgen 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7988.
Drop the factor entry from mt7988-clk.h and reference to them in
mt7988.dtsi. Muxes and gates are updated to reference the apmixed clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for apmixed and topckgen.
Also move TOP_XTAL to the fixed clock table following how it's done in
upstream linux kernel.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 412 +
include/dt-bindings/clock/mt7988-clk.h | 244 +++
2 files changed, 321 insertions(+), 335 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index 24dc3299e11..4c94cda2b23 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -49,63 +49,28 @@ static const struct mtk_fixed_clk apmixedsys_mtk_plls[] = {
FIXED_CLK(CK_APMIXED_MSDCPLL, CLK_XTAL, 4),
};
+/* TOPCKGEN FIXED CLK */
+static const struct mtk_fixed_clk topckgen_mtk_fixed_clks[] = {
+ FIXED_CLK(CK_TOP_XTAL, CLK_XTAL, 4000),
+};
+
/* TOPCKGEN FIXED DIV */
static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
- XTAL_FACTOR(CK_TOP_XTAL, "xtal", CLK_XTAL, 1, 1),
TOP_FACTOR(CK_TOP_XTAL_D2, "xtal_d2", CK_TOP_XTAL, 1, 2),
TOP_FACTOR(CK_TOP_RTC_32K, "rtc_32k", CK_TOP_XTAL, 1,
1250),
TOP_FACTOR(CK_TOP_RTC_32P7K, "rtc_32p7k", CK_TOP_XTAL, 1,
1220),
- TOP_FACTOR(CK_TOP_INFRA_F32K, "csw_infra_f32k", CK_TOP_RTC_32P7K, 1,
- 1),
- XTAL_FACTOR(CK_TOP_CKSQ_SRC, "cksq_src", CLK_XTAL, 1, 1),
- TOP_FACTOR(CK_TOP_NETSYS_2X, "netsys_2x", CK_TOP_NETSYS_2X_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_NETSYS_GSW, "netsys_gsw", CK_TOP_NETSYS_GSW_SEL, 1,
- 1),
- TOP_FACTOR(CK_TOP_NETSYS_WED_MCU, "netsys_wed_mcu",
- CK_TOP_NETSYS_MCU_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_EIP197, "eip197", CK_TOP_EIP197_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_EMMC_250M, "emmc_250m", CK_TOP_EMMC_250M_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_EMMC_400M, "emmc_400m", CK_TOP_EMMC_400M_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_SPI, "spi", CK_TOP_SPI_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_SPIM_MST, "spim_mst", CK_TOP_SPIM_MST_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_NFI1X, "nfi1x", CK_TOP_NFI1X_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_SPINFI_BCK, "spinfi_bck", CK_TOP_SPINFI_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_I2C_BCK, "i2c_bck", CK_TOP_I2C_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_SYS, "usb_sys", CK_TOP_USB_SYS_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_SYS_P1, "usb_sys_p1", CK_TOP_USB_SYS_P1_SEL, 1,
- 1),
- TOP_FACTOR(CK_TOP_USB_XHCI, "usb_xhci", CK_TOP_USB_XHCI_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_USB_XHCI_P1, "usb_xhci_p1", CK_TOP_USB_XHCI_P1_SEL, 1,
- 1),
- TOP_FACTOR(CK_TOP_USB_FRMCNT, "usb_frmcnt", CK_TOP_USB_FRMCNT_SEL, 1,
- 1),
- TOP_FACTOR(CK_TOP_USB_FRMCNT_P1, "usb_frmcnt_p1",
- CK_TOP_USB_FRMCNT_P1_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_AUD, "aud", CK_TOP_AUD_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_A1SYS, "a1sys", CK_TOP_A1SYS_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_AUD_L, "aud_l", CK_TOP_AUD_L_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_A_TUNER, "a_tuner", CK_TOP_A_TUNER_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_SYSAXI, "sysaxi", CK_TOP_SYSAXI_SEL, 1, 1),
- TOP_FACTOR(CK_TOP_INFRA_F26M, "csw_infra_f26m", CK_TOP_INFRA_F26M_SEL,
- 1, 1),
- TOP_FACTOR(CK_TOP_USB_REF, "usb_ref", CK_TOP_CKSQ_SRC, 1, 1),
- TOP_FACTOR(CK_TOP_USB_CK_P1, "usb_ck_p1", CK_TOP_CKSQ_SRC, 1, 1),
- PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
PLL_FACTOR(CK_TOP_MPLL_D3_D2, "mpll_d3_d2", CK_APMIXED_MPLL, 1, 2),
PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
PLL_FACTOR(CK_TOP_MPLL_D8, "mpll_d8", CK_APMIXED_MPLL, 1, 8),
PLL_FACTOR(CK_TOP_MPLL_D8_D2, "mpll_d8_d2", CK_APMIXED_MPLL, 1, 16),
- PLL_FACTOR(CK_TOP_CB_MMPLL_720M, "cb_mmpll_720m", CK_APMIXED_MMPLL, 1,
1),
PLL_FACTOR(CK_TOP_MMPLL_D2, "mmpll_d2", CK_APMIXED_MMPLL, 1, 2),
PLL_FACTOR(CK_TOP_MMPLL_D3_D5, "mmpll_d3_d5", CK_APMIXED_MMPLL, 1, 15),
PLL_FACTOR(CK_TOP_MMPLL_D4, "mmpll_d4", CK_APM
[PATCH 08/13] clk: mediatek: mt7988: reorder TOPCKGEN factor ID
Reorder TOPCKGEN factor ID to put TOP_FACTOR first and then PLL. This is
to match how it's done in upstream kernel linux and in preparation for
OF_UPSTREAM support.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 80 +++
include/dt-bindings/clock/mt7988-clk.h | 130 -
2 files changed, 105 insertions(+), 105 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index 6bbc7045169..24dc3299e11 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -52,46 +52,6 @@ static const struct mtk_fixed_clk apmixedsys_mtk_plls[] = {
/* TOPCKGEN FIXED DIV */
static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
XTAL_FACTOR(CK_TOP_XTAL, "xtal", CLK_XTAL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
- PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
- PLL_FACTOR(CK_TOP_MPLL_D3_D2, "mpll_d3_d2", CK_APMIXED_MPLL, 1, 2),
- PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
- PLL_FACTOR(CK_TOP_MPLL_D8, "mpll_d8", CK_APMIXED_MPLL, 1, 8),
- PLL_FACTOR(CK_TOP_MPLL_D8_D2, "mpll_d8_d2", CK_APMIXED_MPLL, 1, 16),
- PLL_FACTOR(CK_TOP_CB_MMPLL_720M, "cb_mmpll_720m", CK_APMIXED_MMPLL, 1,
1),
- PLL_FACTOR(CK_TOP_MMPLL_D2, "mmpll_d2", CK_APMIXED_MMPLL, 1, 2),
- PLL_FACTOR(CK_TOP_MMPLL_D3_D5, "mmpll_d3_d5", CK_APMIXED_MMPLL, 1, 15),
- PLL_FACTOR(CK_TOP_MMPLL_D4, "mmpll_d4", CK_APMIXED_MMPLL, 1, 4),
- PLL_FACTOR(CK_TOP_MMPLL_D6_D2, "mmpll_d6_d2", CK_APMIXED_MMPLL, 1, 12),
- PLL_FACTOR(CK_TOP_MMPLL_D8, "mmpll_d8", CK_APMIXED_MMPLL, 1, 8),
- PLL_FACTOR(CK_TOP_CB_APLL2_196M, "cb_apll2_196m", CK_APMIXED_APLL2, 1,
- 1),
- PLL_FACTOR(CK_TOP_APLL2_D4, "apll2_d4", CK_APMIXED_APLL2, 1, 4),
- PLL_FACTOR(CK_TOP_NET1PLL_D4, "net1pll_d4", CK_APMIXED_NET1PLL, 1, 4),
- PLL_FACTOR(CK_TOP_NET1PLL_D5, "net1pll_d5", CK_APMIXED_NET1PLL, 1, 5),
- PLL_FACTOR(CK_TOP_NET1PLL_D5_D2, "net1pll_d5_d2", CK_APMIXED_NET1PLL,
1, 10),
- PLL_FACTOR(CK_TOP_NET1PLL_D5_D4, "net1pll_d5_d4", CK_APMIXED_NET1PLL,
1, 20),
- PLL_FACTOR(CK_TOP_NET1PLL_D8, "net1pll_d8", CK_APMIXED_NET1PLL, 1, 8),
- PLL_FACTOR(CK_TOP_NET1PLL_D8_D2, "net1pll_d8_d2", CK_APMIXED_NET1PLL,
1, 16),
- PLL_FACTOR(CK_TOP_NET1PLL_D8_D4, "net1pll_d8_d4", CK_APMIXED_NET1PLL,
1, 32),
- PLL_FACTOR(CK_TOP_NET1PLL_D8_D8, "net1pll_d8_d8", CK_APMIXED_NET1PLL,
1, 64),
- PLL_FACTOR(CK_TOP_NET1PLL_D8_D16, "net1pll_d8_d16", CK_APMIXED_NET1PLL,
1,
- 128),
- PLL_FACTOR(CK_TOP_NET2PLL_800M, "cb_net2pll_800m", CK_APMIXED_NET2PLL,
1,
- 1),
- PLL_FACTOR(CK_TOP_NET2PLL_D2, "net2pll_d2", CK_APMIXED_NET2PLL, 1, 2),
- PLL_FACTOR(CK_TOP_NET2PLL_D4, "net2pll_d4", CK_APMIXED_NET2PLL, 1, 4),
- PLL_FACTOR(CK_TOP_NET2PLL_D4_D4, "net2pll_d4_d4", CK_APMIXED_NET2PLL,
1, 16),
- PLL_FACTOR(CK_TOP_NET2PLL_D4_D8, "net2pll_d4_d8", CK_APMIXED_NET2PLL,
1, 32),
- PLL_FACTOR(CK_TOP_NET2PLL_D6, "net2pll_d6", CK_APMIXED_NET2PLL, 1, 6),
- PLL_FACTOR(CK_TOP_NET2PLL_D8, "net2pll_d8", CK_APMIXED_NET2PLL, 1, 8),
- PLL_FACTOR(CK_TOP_CB_WEDMCUPLL_208M, "cb_wedmcupll_208m",
- CK_APMIXED_WEDMCUPLL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_SGM_325M, "cb_sgm_325m", CK_APMIXED_SGMPLL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_NETSYSPLL_850M, "cb_netsyspll_850m",
- CK_APMIXED_NETSYSPLL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_MSDCPLL_400M, "cb_msdcpll_400m",
CK_APMIXED_MSDCPLL, 1,
- 1),
TOP_FACTOR(CK_TOP_XTAL_D2, "xtal_d2", CK_TOP_XTAL, 1, 2),
TOP_FACTOR(CK_TOP_RTC_32K, "rtc_32k", CK_TOP_XTAL, 1,
1250),
@@ -132,6 +92,46 @@ static const struct mtk_fixed_factor
topckgen_mtk_fixed_factors[] = {
1, 1),
TOP_FACTOR(CK_TOP_USB_REF, "usb_ref", CK_TOP_CKSQ_SRC, 1, 1),
TOP_FACTOR(CK_TOP_USB_CK_P1, "usb_ck_p1", CK_TOP_CKSQ_SRC, 1, 1),
+ PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
+ PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
+ PLL_FACTOR(CK_TOP_MPLL_D3_D2, "mpll_d3_d2", CK_APMIXED_MPLL, 1, 2),
+ PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
+ PLL_FACTOR(CK_TOP_MPLL_D8, "mpll_d8", CK_APMIXED_MPLL, 1, 8),
+ PLL_FACTOR(CK_TOP_MPLL_D8_D2, "mpll_d8_d2", CK_AP
[PATCH 07/13] clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.
Also rename rtc clock to drop the CB_ as upstream doesn't have that.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7988.dtsi | 4 +-
drivers/clk/mediatek/clk-mt7988.c | 190 -
include/dt-bindings/clock/mt7988-clk.h | 72 +-
3 files changed, 133 insertions(+), 133 deletions(-)
diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi
index e8ab5e625da..10d5c2a33c3 100644
--- a/arch/arm/dts/mt7988.dtsi
+++ b/arch/arm/dts/mt7988.dtsi
@@ -371,8 +371,8 @@
clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
assigned-clocks = <&topckgen CK_TOP_SPINFI_SEL>,
<&topckgen CK_TOP_NFI1X_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_M_D8>,
-<&topckgen CK_TOP_CB_M_D8>;
+ assigned-clock-parents = <&topckgen CK_TOP_MPLL_D8>,
+<&topckgen CK_TOP_MPLL_D8>;
status = "disabled";
};
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index 104f072cd0d..6bbc7045169 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -52,52 +52,52 @@ static const struct mtk_fixed_clk apmixedsys_mtk_plls[] = {
/* TOPCKGEN FIXED DIV */
static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
XTAL_FACTOR(CK_TOP_XTAL, "xtal", CLK_XTAL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_M_416M, "cb_m_416m", CK_APMIXED_MPLL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_M_D2, "cb_m_d2", CK_APMIXED_MPLL, 1, 2),
- PLL_FACTOR(CK_TOP_M_D3_D2, "m_d3_d2", CK_APMIXED_MPLL, 1, 2),
- PLL_FACTOR(CK_TOP_CB_M_D4, "cb_m_d4", CK_APMIXED_MPLL, 1, 4),
- PLL_FACTOR(CK_TOP_CB_M_D8, "cb_m_d8", CK_APMIXED_MPLL, 1, 8),
- PLL_FACTOR(CK_TOP_M_D8_D2, "m_d8_d2", CK_APMIXED_MPLL, 1, 16),
- PLL_FACTOR(CK_TOP_CB_MM_720M, "cb_mm_720m", CK_APMIXED_MMPLL, 1, 1),
- PLL_FACTOR(CK_TOP_CB_MM_D2, "cb_mm_d2", CK_APMIXED_MMPLL, 1, 2),
- PLL_FACTOR(CK_TOP_CB_MM_D3_D5, "cb_mm_d3_d5", CK_APMIXED_MMPLL, 1, 15),
- PLL_FACTOR(CK_TOP_CB_MM_D4, "cb_mm_d4", CK_APMIXED_MMPLL, 1, 4),
- PLL_FACTOR(CK_TOP_MM_D6_D2, "mm_d6_d2", CK_APMIXED_MMPLL, 1, 12),
- PLL_FACTOR(CK_TOP_CB_MM_D8, "cb_mm_d8", CK_APMIXED_MMPLL, 1, 8),
+ PLL_FACTOR(CK_TOP_CB_MPLL_416M, "cb_mpll_416m", CK_APMIXED_MPLL, 1, 1),
+ PLL_FACTOR(CK_TOP_MPLL_D2, "mpll_d2", CK_APMIXED_MPLL, 1, 2),
+ PLL_FACTOR(CK_TOP_MPLL_D3_D2, "mpll_d3_d2", CK_APMIXED_MPLL, 1, 2),
+ PLL_FACTOR(CK_TOP_MPLL_D4, "mpll_d4", CK_APMIXED_MPLL, 1, 4),
+ PLL_FACTOR(CK_TOP_MPLL_D8, "mpll_d8", CK_APMIXED_MPLL, 1, 8),
+ PLL_FACTOR(CK_TOP_MPLL_D8_D2, "mpll_d8_d2", CK_APMIXED_MPLL, 1, 16),
+ PLL_FACTOR(CK_TOP_CB_MMPLL_720M, "cb_mmpll_720m", CK_APMIXED_MMPLL, 1,
1),
+ PLL_FACTOR(CK_TOP_MMPLL_D2, "mmpll_d2", CK_APMIXED_MMPLL, 1, 2),
+ PLL_FACTOR(CK_TOP_MMPLL_D3_D5, "mmpll_d3_d5", CK_APMIXED_MMPLL, 1, 15),
+ PLL_FACTOR(CK_TOP_MMPLL_D4, "mmpll_d4", CK_APMIXED_MMPLL, 1, 4),
+ PLL_FACTOR(CK_TOP_MMPLL_D6_D2, "mmpll_d6_d2", CK_APMIXED_MMPLL, 1, 12),
+ PLL_FACTOR(CK_TOP_MMPLL_D8, "mmpll_d8", CK_APMIXED_MMPLL, 1, 8),
PLL_FACTOR(CK_TOP_CB_APLL2_196M, "cb_apll2_196m", CK_APMIXED_APLL2, 1,
1),
- PLL_FACTOR(CK_TOP_CB_APLL2_D4, "cb_apll2_d4", CK_APMIXED_APLL2, 1, 4),
- PLL_FACTOR(CK_TOP_CB_NET1_D4, "cb_net1_d4", CK_APMIXED_NET1PLL, 1, 4),
- PLL_FACTOR(CK_TOP_CB_NET1_D5, "cb_net1_d5", CK_APMIXED_NET1PLL, 1, 5),
- PLL_FACTOR(CK_TOP_NET1_D5_D2, "net1_d5_d2", CK_APMIXED_NET1PLL, 1, 10),
- PLL_FACTOR(CK_TOP_NET1_D5_D4, "net1_d5_d4", CK_APMIXED_NET1PLL, 1, 20),
- PLL_FACTOR(CK_TOP_CB_NET1_D8, "cb_net1_d8", CK_APMIXED_NET1PLL, 1, 8),
- PLL_FACTOR(CK_TOP_NET1_D8_D2, "net1_d8_d2", CK_APMIXED_NET1PLL, 1, 16),
- PLL_FACTOR(CK_TOP_NET1_D8_D4, "net1_d8_d4", CK_APMIXED_NET1PLL, 1, 32),
- PLL_FACTOR(CK_TOP_NET1_D8_D8, "net1_d8_d8", CK_APMIXED_NET1PLL, 1, 64),
- PLL_FACTOR(CK_TOP_NET1_D8_D16, "net1_d8_d16", CK_APMIXED_NET1PLL, 1,
+ PLL_FACTOR(CK_TOP_APLL2_D4, "apll2_d4", CK_APMIXED_APLL2, 1, 4),
+ PLL_FACTOR(CK_TOP_NET1PLL_D4, "net1pll_
[PATCH 06/13] clk: mediatek: mt7988: drop 1/1 infracfg spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7988.
Drop the factor entry from mt7988-clk.h and reference to them in
mt7988.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7988.dtsi | 6 +-
drivers/clk/mediatek/clk-mt7988.c | 468 +++--
include/dt-bindings/clock/mt7988-clk.h | 87 +
3 files changed, 227 insertions(+), 334 deletions(-)
diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi
index 2605e60c993..e8ab5e625da 100644
--- a/arch/arm/dts/mt7988.dtsi
+++ b/arch/arm/dts/mt7988.dtsi
@@ -266,7 +266,7 @@
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_MUX_UART0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
-<&infracfg_ao CK_INFRA_UART_O0>;
+<&topckgen CK_TOP_UART_SEL>;
status = "disabled";
};
@@ -278,7 +278,7 @@
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_MUX_UART1_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
-<&infracfg_ao CK_INFRA_UART_O1>;
+<&topckgen CK_TOP_UART_SEL>;
status = "disabled";
};
@@ -290,7 +290,7 @@
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_MUX_UART2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
-<&infracfg_ao CK_INFRA_UART_O2>;
+<&topckgen CK_TOP_UART_SEL>;
status = "disabled";
};
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index a37ad574e11..104f072cd0d 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -424,116 +424,42 @@ static const struct mtk_composite topckgen_mtk_muxes[] =
{
netsys_2x_parents, 0x120, 0x124, 0x128, 8, 2, 15, 0x1c8, 11),
};
-/* INFRA FIXED DIV */
-static const struct mtk_fixed_factor infracfg_mtk_fixed_factor[] = {
- TOP_FACTOR(CK_INFRA_CK_F26M, "infra_ck_f26m", CK_TOP_INFRA_F26M_SEL, 1,
- 1),
- TOP_FACTOR(CK_INFRA_PWM_O, "infra_pwm_o", CK_TOP_PWM_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_PCIE_OCC_P0, "infra_pcie_ck_occ_p0",
- CK_TOP_PEXTP_TL_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_PCIE_OCC_P1, "infra_pcie_ck_occ_p1",
- CK_TOP_PEXTP_TL_P1_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_PCIE_OCC_P2, "infra_pcie_ck_occ_p2",
- CK_TOP_PEXTP_TL_P2_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_PCIE_OCC_P3, "infra_pcie_ck_occ_p3",
- CK_TOP_PEXTP_TL_P3_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_133M_HCK, "infra_133m_hck", CK_TOP_SYSAXI, 1, 1),
- INFRA_FACTOR(CK_INFRA_133M_PHCK, "infra_133m_phck", CK_INFRA_133M_HCK,
-1, 1),
- INFRA_FACTOR(CK_INFRA_66M_PHCK, "infra_66m_phck", CK_INFRA_133M_HCK, 1,
-1),
- TOP_FACTOR(CK_INFRA_FAUD_L_O, "infra_faud_l_o", CK_TOP_AUD_L, 1, 1),
- TOP_FACTOR(CK_INFRA_FAUD_AUD_O, "infra_faud_aud_o", CK_TOP_A1SYS, 1, 1),
- TOP_FACTOR(CK_INFRA_FAUD_EG2_O, "infra_faud_eg2_o", CK_TOP_A_TUNER, 1,
- 1),
- TOP_FACTOR(CK_INFRA_I2C_O, "infra_i2c_o", CK_TOP_I2C_BCK, 1, 1),
- TOP_FACTOR(CK_INFRA_UART_O0, "infra_uart_o0", CK_TOP_UART_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_UART_O1, "infra_uart_o1", CK_TOP_UART_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_UART_O2, "infra_uart_o2", CK_TOP_UART_SEL, 1, 1),
- TOP_FACTOR(CK_INFRA_NFI_O, "infra_nfi_o", CK_TOP_NFI1X, 1, 1),
- TOP_FACTOR(CK_INFRA_SPINFI_O, "infra_spinfi_o", CK_TOP_SPINFI_BCK, 1,
- 1),
- TOP_FACTOR(CK_INFRA_SPI0_O, "infra_spi0_o", CK_TOP_SPI, 1, 1),
- TOP_FACTOR(CK_INFRA_SPI1_O, "infra_spi1_o", CK_TOP_SPIM_MST, 1, 1),
- INFRA_FACTOR(CK_INFRA_LB_MUX_FRTC, "infra_lb_mux_frtc", CK_INFRA_FRTC,
-1, 1),
- TOP_FACTOR(CK_INFRA_FRTC, "infra_frtc", CK_TOP_CB_RTC_32K, 1, 1),
- TOP_FACTOR(CK_INFRA_FMSDC400_O, "infra_fmsdc400_o", CK_TOP_EMMC_400
[PATCH 05/13] clk: mediatek: mt7988: fix wrong parent for INFRA_PCIE_PERI_26M_CK_P2
Fix wrong parent for INFRA_PCIE_PERI_26M_CK_P2 as should be
INFRA_PCIE_PERI_26M_CK_P3 instead of INFRA_F26M_O0. This is to match
implementation on upstream kernel linux.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index 5d146246fea..a37ad574e11 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -650,7 +650,7 @@ static const struct mtk_gate infracfg_mtk_gates[] = {
GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P1,
"infra_pcie_peri_ck_26m_ck_p1", CK_INFRA_F26M_O0, 8),
GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P2,
- "infra_pcie_peri_ck_26m_ck_p2", CK_INFRA_F26M_O0, 9),
+ "infra_pcie_peri_ck_26m_ck_p2",
CK_INFRA_PCIE_PERI_26M_CK_P3, 9),
GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P3,
"infra_pcie_peri_ck_26m_ck_p3", CK_INFRA_F26M_O0, 10),
GATE_INFRA1(CK_INFRA_66M_GPT_BCK, "infra_hf_66m_gpt_bck",
--
2.45.2
[PATCH 04/13] clk: mediatek: mt7988: move INFRA_PCIE_PERI_26M_CK_Px clock at top
Move INFRA_PCIE_PERI_26M_CK_Px clock at top of the infracfg gates
in preparation for support of OF_UPSTREAM to have a 1:1 match with
upstream clock ID.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 16 +--
include/dt-bindings/clock/mt7988-clk.h | 168 -
2 files changed, 92 insertions(+), 92 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index 1ce8c4d8fef..5d146246fea 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -645,6 +645,14 @@ static const struct mtk_gate_regs infra_3_cg_regs = {
/* INFRA GATE */
static const struct mtk_gate infracfg_mtk_gates[] = {
+ GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P0,
+ "infra_pcie_peri_ck_26m_ck_p0", CK_INFRA_F26M_O0, 7),
+ GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P1,
+ "infra_pcie_peri_ck_26m_ck_p1", CK_INFRA_F26M_O0, 8),
+ GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P2,
+ "infra_pcie_peri_ck_26m_ck_p2", CK_INFRA_F26M_O0, 9),
+ GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P3,
+ "infra_pcie_peri_ck_26m_ck_p3", CK_INFRA_F26M_O0, 10),
GATE_INFRA1(CK_INFRA_66M_GPT_BCK, "infra_hf_66m_gpt_bck",
CK_INFRA_66M_MCK, 0),
GATE_INFRA1(CK_INFRA_66M_PWM_HCK, "infra_hf_66m_pwm_hck",
@@ -797,14 +805,6 @@ static const struct mtk_gate infracfg_mtk_gates[] = {
CK_INFRA_133M_PHCK, 30),
GATE_INFRA3(CK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3",
CK_INFRA_133M_PHCK, 31),
- GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P0,
- "infra_pcie_peri_ck_26m_ck_p0", CK_INFRA_F26M_O0, 7),
- GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P1,
- "infra_pcie_peri_ck_26m_ck_p1", CK_INFRA_F26M_O0, 8),
- GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P2,
- "infra_pcie_peri_ck_26m_ck_p2", CK_INFRA_F26M_O0, 9),
- GATE_INFRA0(CK_INFRA_PCIE_PERI_26M_CK_P3,
- "infra_pcie_peri_ck_26m_ck_p3", CK_INFRA_F26M_O0, 10),
};
static const struct mtk_clk_tree mt7988_fixed_pll_clk_tree = {
diff --git a/include/dt-bindings/clock/mt7988-clk.h
b/include/dt-bindings/clock/mt7988-clk.h
index 4fd968a12ca..5c643b979b5 100644
--- a/include/dt-bindings/clock/mt7988-clk.h
+++ b/include/dt-bindings/clock/mt7988-clk.h
@@ -80,93 +80,93 @@
#define CK_INFRA_PCIE_GFMUX_TL_O_P2_SEL 63 /* Linux CLK ID (17) */
#define CK_INFRA_PCIE_GFMUX_TL_O_P3_SEL 64 /* Linux CLK ID (18) */
/* mtk_gate */
-#define CK_INFRA_66M_GPT_BCK(65 - GATE_OFFSET) /* Linux CLK ID (19) */
-#define CK_INFRA_66M_PWM_HCK(66 - GATE_OFFSET) /* Linux CLK ID (20) */
-#define CK_INFRA_66M_PWM_BCK(67 - GATE_OFFSET) /* Linux CLK ID (21) */
-#define CK_INFRA_66M_PWM_CK1(68 - GATE_OFFSET) /* Linux CLK ID (22) */
-#define CK_INFRA_66M_PWM_CK2(69 - GATE_OFFSET) /* Linux CLK ID (23) */
-#define CK_INFRA_66M_PWM_CK3(70 - GATE_OFFSET) /* Linux CLK ID (24) */
-#define CK_INFRA_66M_PWM_CK4(71 - GATE_OFFSET) /* Linux CLK ID (25) */
-#define CK_INFRA_66M_PWM_CK5(72 - GATE_OFFSET) /* Linux CLK ID (26) */
-#define CK_INFRA_66M_PWM_CK6(73 - GATE_OFFSET) /* Linux CLK ID (27) */
-#define CK_INFRA_66M_PWM_CK7(74 - GATE_OFFSET) /* Linux CLK ID (28) */
-#define CK_INFRA_66M_PWM_CK8(75 - GATE_OFFSET) /* Linux CLK ID (29) */
-#define CK_INFRA_133M_CQDMA_BCK (76 - GATE_OFFSET) /* Linux CLK ID
(30) */
-#define CK_INFRA_66M_AUD_SLV_BCK (77 - GATE_OFFSET) /* Linux CLK ID (31) */
-#define CK_INFRA_AUD_26M(78 - GATE_OFFSET) /* Linux CLK ID (32) */
-#define CK_INFRA_AUD_L (79 - GATE_OFFSET) /* Linux CLK ID (33) */
-#define CK_INFRA_AUD_AUD(80 - GATE_OFFSET) /* Linux CLK ID (34) */
-#define CK_INFRA_AUD_EG2(81 - GATE_OFFSET) /* Linux CLK ID (35) */
-#define CK_INFRA_DRAMC_F26M (82 - GATE_OFFSET) /* Linux CLK ID (36) */
-#define CK_INFRA_133M_DBG_ACKM (83 - GATE_OFFSET) /* Linux CLK ID (37) */
-#define CK_INFRA_66M_AP_DMA_BCK (84 - GATE_OFFSET) /* Linux CLK ID
(38) */
-#define CK_INFRA_66M_SEJ_BCK(85 - GATE_OFFSET) /* Linux CLK ID (39) */
-#define CK_INFRA_PRE_CK_SEJ_F13M (86 - GATE_OFFSET) /* Linux CLK ID (40) */
-#define CK_INFRA_66M_TRNG (87 - GATE_OFFSET) /* Linux CLK ID (41) */
-#define CK_INFRA_26M_THERM_SYSTEM(88 - GATE_OFFSET) /* Linux CLK ID (42) */
-#define CK_INFRA_I2C_BCK(89 - GATE_OFFSET) /* Linux CLK ID (43) */
-#define CK_INFRA_66M_UART0_PCK (90 - GATE_OFFSET) /* Linux CLK ID (44) */
-#define CK_INFRA_66M_UART1_PCK (91 - GATE_OFFSET) /* Linux CLK ID (45) */
-#define CK_INFRA_66M_UART2_PCK (92 - GATE_OFFSET) /* Linux CLK ID (46) */
-#define CK_INFRA_52M_UART0_CK (93
[PATCH 03/13] clk: mediatek: mt7988: rename TOP_CK_NPU_SEL_CM_TOPS_SEL to TOP_NPU_SEL
Upstream kernel linux clock include use TOP_NPU_SEL instead of
TOP_CK_NPU_SEL_CM_TOPS_SEL.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 2 +-
include/dt-bindings/clock/mt7988-clk.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index e2324f40084..1ce8c4d8fef 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -420,7 +420,7 @@ static const struct mtk_composite topckgen_mtk_muxes[] = {
0x110, 0x114, 0x118, 24, 2, 31, 0x1c8, 9),
TOP_MUX(CK_TOP_ETH_MII_SEL, "eth_mii_sel", eth_mii_parents, 0x120,
0x124, 0x128, 0, 1, 7, 0x1c8, 10),
- TOP_MUX(CK_TOP_CK_NPU_SEL_CM_TOPS_SEL, "ck_npu_sel_cm_tops_sel",
+ TOP_MUX(CK_TOP_NPU_SEL, "ck_npu_sel",
netsys_2x_parents, 0x120, 0x124, 0x128, 8, 2, 15, 0x1c8, 11),
};
diff --git a/include/dt-bindings/clock/mt7988-clk.h
b/include/dt-bindings/clock/mt7988-clk.h
index 841dd419e75..4fd968a12ca 100644
--- a/include/dt-bindings/clock/mt7988-clk.h
+++ b/include/dt-bindings/clock/mt7988-clk.h
@@ -309,7 +309,7 @@
#define CK_TOP_NETSYS_PPEFB_250M_SEL 135 /* Linux CLK ID (70) */
#define CK_TOP_NETSYS_WARP_SEL 136 /* Linux CLK ID (71) */
#define CK_TOP_ETH_MII_SEL 137 /* Linux CLK ID (72) */
-#define CK_TOP_CK_NPU_SEL_CM_TOPS_SEL 138 /* Linux CLK ID (73) */
+#define CK_TOP_NPU_SEL 138 /* Linux CLK ID (73) */
/* APMIXEDSYS */
/* mtk_pll_data */
--
2.45.2
[PATCH 02/13] clk: mediatek: mt7988: rename TOP_DA_SELM_XTAL_SEL to TOP_DA_SEL
Upstream kernel linux clock include use TOP_DA_SEL instead of
TOP_DA_SELM_XTAL_SEL.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7988.c | 2 +-
include/dt-bindings/clock/mt7988-clk.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index e7ef58c4fb9..e2324f40084 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -396,7 +396,7 @@ static const struct mtk_composite topckgen_mtk_muxes[] = {
da_xtp_glb_p0_parents, 0xf0, 0xf4, 0xf8, 8, 1, 15, 0x1c4, 30),
TOP_MUX(CK_TOP_CKM_SEL, "ckm_sel", sspxtp_parents, 0xf0, 0xf4, 0xf8, 16,
1, 23, 0x1c8, 0),
- TOP_MUX(CK_TOP_DA_SELM_XTAL_SEL, "da_selm_xtal_sel", sspxtp_parents,
+ TOP_MUX(CK_TOP_DA_SEL, "da_sel", sspxtp_parents,
0xf0, 0xf4, 0xf8, 24, 1, 31, 0x1c8, 1),
TOP_MUX(CK_TOP_PEXTP_SEL, "pextp_sel", sspxtp_parents, 0x100, 0x104,
0x108, 0, 1, 7, 0x1c8, 2),
diff --git a/include/dt-bindings/clock/mt7988-clk.h
b/include/dt-bindings/clock/mt7988-clk.h
index 88a5cf45ccb..841dd419e75 100644
--- a/include/dt-bindings/clock/mt7988-clk.h
+++ b/include/dt-bindings/clock/mt7988-clk.h
@@ -299,7 +299,7 @@
#define CK_TOP_DA_XTP_GLB_P2_SEL 125 /* Linux CLK ID (60) */
#define CK_TOP_DA_XTP_GLB_P3_SEL 126 /* Linux CLK ID (61) */
#define CK_TOP_CKM_SEL 127 /* Linux CLK ID (62) */
-#define CK_TOP_DA_SELM_XTAL_SEL 128 /* Linux CLK ID (63) */
+#define CK_TOP_DA_SEL128 /* Linux CLK ID (63) */
#define CK_TOP_PEXTP_SEL 129 /* Linux CLK ID (64) */
#define CK_TOP_TOPS_P2_26M_SEL 130 /* Linux CLK ID (65) */
#define CK_TOP_MCUSYS_BACKUP_625M_SEL 131 /* Linux CLK ID (66) */
--
2.45.2
[PATCH 01/13] clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7988.dtsi | 6 +-
drivers/clk/mediatek/clk-mt7988.c | 100 -
include/dt-bindings/clock/mt7988-clk.h | 4 +-
3 files changed, 55 insertions(+), 55 deletions(-)
diff --git a/arch/arm/dts/mt7988.dtsi b/arch/arm/dts/mt7988.dtsi
index 5c0c5bcfd6e..2605e60c993 100644
--- a/arch/arm/dts/mt7988.dtsi
+++ b/arch/arm/dts/mt7988.dtsi
@@ -265,7 +265,7 @@
clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART0_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_MUX_UART0_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+ assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&infracfg_ao CK_INFRA_UART_O0>;
status = "disabled";
};
@@ -277,7 +277,7 @@
clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART1_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_MUX_UART1_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+ assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&infracfg_ao CK_INFRA_UART_O1>;
status = "disabled";
};
@@ -289,7 +289,7 @@
clocks = <&infracfg_ao_cgs CK_INFRA_52M_UART2_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_MUX_UART2_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+ assigned-clock-parents = <&topckgen CK_TOP_XTAL>,
<&infracfg_ao CK_INFRA_UART_O2>;
status = "disabled";
};
diff --git a/drivers/clk/mediatek/clk-mt7988.c
b/drivers/clk/mediatek/clk-mt7988.c
index 32b04511781..e7ef58c4fb9 100644
--- a/drivers/clk/mediatek/clk-mt7988.c
+++ b/drivers/clk/mediatek/clk-mt7988.c
@@ -51,7 +51,7 @@ static const struct mtk_fixed_clk apmixedsys_mtk_plls[] = {
/* TOPCKGEN FIXED DIV */
static const struct mtk_fixed_factor topckgen_mtk_fixed_factors[] = {
- XTAL_FACTOR(CK_TOP_CB_CKSQ_40M, "cb_cksq_40m", CLK_XTAL, 1, 1),
+ XTAL_FACTOR(CK_TOP_XTAL, "xtal", CLK_XTAL, 1, 1),
PLL_FACTOR(CK_TOP_CB_M_416M, "cb_m_416m", CK_APMIXED_MPLL, 1, 1),
PLL_FACTOR(CK_TOP_CB_M_D2, "cb_m_d2", CK_APMIXED_MPLL, 1, 2),
PLL_FACTOR(CK_TOP_M_D3_D2, "m_d3_d2", CK_APMIXED_MPLL, 1, 2),
@@ -92,10 +92,10 @@ static const struct mtk_fixed_factor
topckgen_mtk_fixed_factors[] = {
CK_APMIXED_NETSYSPLL, 1, 1),
PLL_FACTOR(CK_TOP_CB_MSDC_400M, "cb_msdc_400m", CK_APMIXED_MSDCPLL, 1,
1),
- TOP_FACTOR(CK_TOP_CKSQ_40M_D2, "cksq_40m_d2", CK_TOP_CB_CKSQ_40M, 1, 2),
- TOP_FACTOR(CK_TOP_CB_RTC_32K, "cb_rtc_32k", CK_TOP_CB_CKSQ_40M, 1,
+ TOP_FACTOR(CK_TOP_XTAL_D2, "xtal_d2", CK_TOP_XTAL, 1, 2),
+ TOP_FACTOR(CK_TOP_CB_RTC_32K, "cb_rtc_32k", CK_TOP_XTAL, 1,
1250),
- TOP_FACTOR(CK_TOP_CB_RTC_32P7K, "cb_rtc_32p7k", CK_TOP_CB_CKSQ_40M, 1,
+ TOP_FACTOR(CK_TOP_CB_RTC_32P7K, "cb_rtc_32p7k", CK_TOP_XTAL, 1,
1220),
TOP_FACTOR(CK_TOP_INFRA_F32K, "csw_infra_f32k", CK_TOP_CB_RTC_32P7K, 1,
1),
@@ -135,125 +135,125 @@ static const struct mtk_fixed_factor
topckgen_mtk_fixed_factors[] = {
};
/* TOPCKGEN MUX PARENTS */
-static const int netsys_parents[] = { CK_TOP_CB_CKSQ_40M, CK_TOP_CB_NET2_D2,
+static const int netsys_parents[] = { CK_TOP_XTAL, CK_TOP_CB_NET2_D2,
CK_TOP_CB_MM_D2 };
-static const int netsys_500m_parents[] = { CK_TOP_CB_CKSQ_40M,
+static const int netsys_500m_parents[] = { CK_TOP_XTAL,
CK_TOP_CB_NET1_D5,
CK_TOP_NET1_D5_D2 };
-static const int netsys_2x_parents[] = { CK_TOP_CB_CKSQ_40M,
+static const int netsys_2x_parents[] = { CK_TOP_XTAL,
CK_TOP_CB_NET2_800M,
CK_TOP_CB_MM_720M };
-static const int netsys_gsw_parents[] = { CK_TOP_CB_CKSQ_40M,
CK_TOP_CB_NET1_D4,
+static const int netsys_gsw_parents[] = { CK_TOP_XTAL, CK_TOP_CB_NET1_D4,
CK_TOP_CB_NET
[PATCH 00/13] clk: mediatek: mt7988: clk migration for OF_UPSTREAM
These are all the required patches to migrate clk and correctly support OF_UPSTREAM. This will align the clk index to upstream to support the same clk implementation with downstream and upstream DTS. Christian Marangi (13): clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL clk: mediatek: mt7988: rename TOP_DA_SELM_XTAL_SEL to TOP_DA_SEL clk: mediatek: mt7988: rename TOP_CK_NPU_SEL_CM_TOPS_SEL to TOP_NPU_SEL clk: mediatek: mt7988: move INFRA_PCIE_PERI_26M_CK_Px clock at top clk: mediatek: mt7988: fix wrong parent for INFRA_PCIE_PERI_26M_CK_P2 clk: mediatek: mt7988: drop 1/1 infracfg spurious factor clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming clk: mediatek: mt7988: reorder TOPCKGEN factor ID clk: mediatek: mt7988: drop 1/1 spurious factor for topckgen clk: mediatek: mt7988: comment out infracfg clk not defined clk: mediatek: mt7988: replace clock ID with upstream linux clk: mediatek: mt7988: convert to unified infracfg gates + muxes clk: mediatek: mt7988: rename CK to CLK arch/arm/dts/mt7988.dtsi | 93 +- drivers/clk/mediatek/clk-mt7988.c | 1085 +++- include/dt-bindings/clock/mt7988-clk.h | 545 +--- 3 files changed, 787 insertions(+), 936 deletions(-) -- 2.45.2
[PATCH 14/14] clk: mediatek: mt7981: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel linux. Signed-off-by: Christian Marangi --- arch/arm/dts/mt7981.dtsi | 112 ++--- drivers/clk/mediatek/clk-mt7981.c | 552 - include/dt-bindings/clock/mt7981-clk.h | 382 - 3 files changed, 523 insertions(+), 523 deletions(-) diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi index 1c54fce7520..a9991a121f1 100644 --- a/arch/arm/dts/mt7981.dtsi +++ b/arch/arm/dts/mt7981.dtsi @@ -132,13 +132,13 @@ #clock-cells = <1>; #pwm-cells = <2>; interrupts = ; - clocks = <&topckgen CK_TOP_PWM_SEL>, -<&infracfg CK_INFRA_PWM_BSEL>, -<&infracfg CK_INFRA_PWM1_CK>, -<&infracfg CK_INFRA_PWM2_CK>, -<&infracfg CK_INFRA_PWM3_CK>; - assigned-clocks = <&topckgen CK_TOP_PWM_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>; + clocks = <&topckgen CLK_TOP_PWM_SEL>, +<&infracfg CLK_INFRA_PWM_BSEL>, +<&infracfg CLK_INFRA_PWM1_CK>, +<&infracfg CLK_INFRA_PWM2_CK>, +<&infracfg CLK_INFRA_PWM3_CK>; + assigned-clocks = <&topckgen CLK_TOP_PWM_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>; clock-names = "top", "main", "pwm1", "pwm2", "pwm3"; status = "disabled"; }; @@ -149,8 +149,8 @@ <0x10217080 0x80>; interrupts = ; clock-div = <1>; - clocks = <&infracfg CK_INFRA_I2C0_CK>, -<&infracfg CK_INFRA_AP_DMA_CK>; + clocks = <&infracfg CLK_INFRA_I2C0_CK>, +<&infracfg CLK_INFRA_AP_DMA_CK>; clock-names = "main", "dma"; #address-cells = <1>; #size-cells = <0>; @@ -161,11 +161,11 @@ compatible = "mediatek,hsuart"; reg = <0x11002000 0x400>; interrupts = ; - clocks = <&infracfg CK_INFRA_UART0_CK>; - assigned-clocks = <&topckgen CK_TOP_UART_SEL>, - <&infracfg CK_INFRA_UART0_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>, -<&topckgen CK_TOP_UART_SEL>; + clocks = <&infracfg CLK_INFRA_UART0_CK>; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_UART0_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, +<&topckgen CLK_TOP_UART_SEL>; mediatek,force-highspeed; status = "disabled"; bootph-all; @@ -175,11 +175,11 @@ compatible = "mediatek,hsuart"; reg = <0x11003000 0x400>; interrupts = ; - clocks = <&infracfg CK_INFRA_UART1_CK>; - assigned-clocks = <&topckgen CK_TOP_UART_SEL>, - <&infracfg CK_INFRA_UART1_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>, -<&topckgen CK_TOP_UART_SEL>; + clocks = <&infracfg CLK_INFRA_UART1_CK>; + assigned-clocks = <&topckgen CLK_TOP_UART_SEL>, + <&infracfg CLK_INFRA_UART1_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_CB_CKSQ_40M>, +<&topckgen CLK_TOP_UART_SEL>; mediatek,force-highspeed; status = "disabled"; }; @@ -188,11 +188,11 @@ compatible = "mediatek,hsuart"; reg = <0x11004000 0x400>; interrupts = ; - clocks = <&infracfg CK_INFRA_UART2_CK>; - assigned-clocks = <&topckgen CK_TOP_UART_SEL>, - <&infracfg CK_INFRA_UART2_SEL>; - assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>, -<&topckgen CK_TOP_UART_SEL>; +
[PATCH 13/14] clk: mediatek: mt7981: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.
Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 46 +--
drivers/clk/mediatek/clk-mt7981.c | 26 ++---
2 files changed, 22 insertions(+), 50 deletions(-)
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index b3f8a50cd10..1c54fce7520 100644
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -98,14 +98,6 @@
bootph-all;
};
- infracfg_ao: infracfg_ao@10001000 {
- compatible = "mediatek,mt7981-infracfg_ao";
- reg = <0x10001000 0x80>;
- clock-parent = <&infracfg>;
- #clock-cells = <1>;
- bootph-all;
- };
-
infracfg: infracfg@10001000 {
compatible = "mediatek,mt7981-infracfg";
reg = <0x10001000 0x30>;
@@ -141,10 +133,10 @@
#pwm-cells = <2>;
interrupts = ;
clocks = <&topckgen CK_TOP_PWM_SEL>,
-<&infracfg_ao CK_INFRA_PWM_BSEL>,
-<&infracfg_ao CK_INFRA_PWM1_CK>,
-<&infracfg_ao CK_INFRA_PWM2_CK>,
-<&infracfg_ao CK_INFRA_PWM3_CK>;
+<&infracfg CK_INFRA_PWM_BSEL>,
+<&infracfg CK_INFRA_PWM1_CK>,
+<&infracfg CK_INFRA_PWM2_CK>,
+<&infracfg CK_INFRA_PWM3_CK>;
assigned-clocks = <&topckgen CK_TOP_PWM_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
@@ -157,8 +149,8 @@
<0x10217080 0x80>;
interrupts = ;
clock-div = <1>;
- clocks = <&infracfg_ao CK_INFRA_I2C0_CK>,
-<&infracfg_ao CK_INFRA_AP_DMA_CK>;
+ clocks = <&infracfg CK_INFRA_I2C0_CK>,
+<&infracfg CK_INFRA_AP_DMA_CK>;
clock-names = "main", "dma";
#address-cells = <1>;
#size-cells = <0>;
@@ -169,9 +161,9 @@
compatible = "mediatek,hsuart";
reg = <0x11002000 0x400>;
interrupts = ;
- clocks = <&infracfg_ao CK_INFRA_UART0_CK>;
+ clocks = <&infracfg CK_INFRA_UART0_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
- <&infracfg_ao CK_INFRA_UART0_SEL>;
+ <&infracfg CK_INFRA_UART0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
@@ -183,9 +175,9 @@
compatible = "mediatek,hsuart";
reg = <0x11003000 0x400>;
interrupts = ;
- clocks = <&infracfg_ao CK_INFRA_UART1_CK>;
+ clocks = <&infracfg CK_INFRA_UART1_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
- <&infracfg_ao CK_INFRA_UART1_SEL>;
+ <&infracfg CK_INFRA_UART1_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
@@ -196,9 +188,9 @@
compatible = "mediatek,hsuart";
reg = <0x11004000 0x400>;
interrupts = ;
- clocks = <&infracfg_ao CK_INFRA_UART2_CK>;
+ clocks = <&infracfg CK_INFRA_UART2_CK>;
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
- <&infracfg_ao CK_INFRA_UART2_SEL>;
+ <&infracfg CK_INFRA_UART2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
@@ -210,9 +202,9 @@
reg = <0x11005000 0x1000>,
<0x11006000 0x1000>;
reg-names = "nfi", "ecc";
- clocks = <&infracfg_ao CK_INFRA_SPINFI1_CK>
[PATCH 12/14] clk: mediatek: mt7981: fix support for pwm3 clock
Add and fix support for pwm3 clock. In the pwm DTSI node we were
actually using PWM2 clock for PWM3. Now that we have correct ID also add
the missing entry of gate and mux to support PWM3 clock.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 3 +--
drivers/clk/mediatek/clk-mt7981.c | 3 +++
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index fc13b90caf6..b3f8a50cd10 100644
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -144,8 +144,7 @@
<&infracfg_ao CK_INFRA_PWM_BSEL>,
<&infracfg_ao CK_INFRA_PWM1_CK>,
<&infracfg_ao CK_INFRA_PWM2_CK>,
-/* FIXME */
-<&infracfg_ao CK_INFRA_PWM2_CK>;
+<&infracfg_ao CK_INFRA_PWM3_CK>;
assigned-clocks = <&topckgen CK_TOP_PWM_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
diff --git a/drivers/clk/mediatek/clk-mt7981.c
b/drivers/clk/mediatek/clk-mt7981.c
index 4435430dcde..7b692186dc1 100644
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -381,6 +381,8 @@ static const struct mtk_composite infra_muxes[] = {
9, 1),
INFRA_MUX(CK_INFRA_PWM2_SEL, "infra_pwm2_sel", infra_pwm1_parents, 0x10,
11, 1),
+ INFRA_MUX(CK_INFRA_PWM3_SEL, "infra_pwm3_sel", infra_pwm1_parents, 0x10,
+ 15, 1),
INFRA_MUX(CK_INFRA_PWM_BSEL, "infra_pwm_bsel", infra_pwm_bsel_parents,
0x10, 13, 2),
INFRA_MUX(CK_INFRA_PCIE_SEL, "infra_pcie_sel", infra_pcie_parents, 0x20,
@@ -445,6 +447,7 @@ static const struct mtk_gate infracfg_ao_gates[] = {
GATE_INFRA0_INFRA(CK_INFRA_PWM_STA, "infra_pwm_sta", CK_INFRA_PWM_BSEL,
2),
GATE_INFRA0_INFRA(CK_INFRA_PWM1_CK, "infra_pwm1", CK_INFRA_PWM1_SEL, 3),
GATE_INFRA0_INFRA(CK_INFRA_PWM2_CK, "infra_pwm2", CK_INFRA_PWM2_SEL, 4),
+ GATE_INFRA0_INFRA(CK_INFRA_PWM3_CK, "infra_pwm3", CK_INFRA_PWM3_SEL,
27),
GATE_INFRA0_TOP(CK_INFRA_CQ_DMA_CK, "infra_cq_dma", CK_TOP_SYSAXI, 6),
GATE_INFRA0_TOP(CK_INFRA_AUD_BUS_CK, "infra_aud_bus", CK_TOP_SYSAXI, 8),
GATE_INFRA0_TOP(CK_INFRA_AUD_26M_CK, "infra_aud_26m", CK_TOP_F26M_SEL,
9),
--
2.45.2
[PATCH 11/14] clk: mediatek: mt7981: replace infracfg ID with upstream linux
Replace infracfg clk ID with upstream linux version.
Add some missing clk for PWM3 and for PCIe. The same format is used here
with the factor first, then mux and then gates.
To correctly reference the gates in clk_gate function, define the
gates_offs value in clk_tree now that they are at an offset from mux and
factor.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7981.c | 1 +
include/dt-bindings/clock/mt7981-clk.h | 136 -
2 files changed, 66 insertions(+), 71 deletions(-)
diff --git a/drivers/clk/mediatek/clk-mt7981.c
b/drivers/clk/mediatek/clk-mt7981.c
index aaaebd46791..4435430dcde 100644
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -523,6 +523,7 @@ static const struct mtk_clk_tree mt7981_topckgen_clk_tree =
{
static const struct mtk_clk_tree mt7981_infracfg_clk_tree = {
.fdivs_offs = CK_INFRA_66M_MCK,
.muxes_offs = CK_INFRA_UART0_SEL,
+ .gates_offs = CK_INFRA_GPT_STA,
.fdivs = infra_fixed_divs,
.muxes = infra_muxes,
.flags = CLK_INFRASYS,
diff --git a/include/dt-bindings/clock/mt7981-clk.h
b/include/dt-bindings/clock/mt7981-clk.h
index 8a6f5cb319e..05019c95ebe 100644
--- a/include/dt-bindings/clock/mt7981-clk.h
+++ b/include/dt-bindings/clock/mt7981-clk.h
@@ -8,11 +8,6 @@
#ifndef _DT_BINDINGS_CLK_MT7981_H
#define _DT_BINDINGS_CLK_MT7981_H
-/* INFRACFG */
-
-#define CK_INFRA_66M_MCK 0
-#define CLK_INFRA_NR_CLK 1
-
/* TOPCKGEN */
#define CK_TOP_CB_CKSQ_40M 0
@@ -124,74 +119,73 @@
#define CK_TOP_U2U3_SYS_SEL106
#define CK_TOP_U2U3_XHCI_SEL 107
#define CK_TOP_USB_FRMCNT_SEL 108
-#define CLK_TOP_NR_CLK 109
+#define CK_TOP_AUD_I2S_M 109
+#define CLK_TOP_NR_CLK 110
-/*
- * INFRACFG_AO
- * clock muxes need to be append to infracfg domain, and clock gates
- * need to be keep in infracgh_ao domain
- */
-#define INFRACFG_AO_OFFSET 10
+/* INFRACFG */
-#define CK_INFRA_UART0_SEL (0 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_UART1_SEL (1 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_UART2_SEL (2 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_SPI0_SEL (3 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_SPI1_SEL (4 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_SPI2_SEL (5 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PWM1_SEL (6 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PWM2_SEL (7 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PWM_BSEL (8 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_PCIE_SEL (9 + CLK_INFRA_NR_CLK)
-#define CK_INFRA_GPT_STA (10 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_PWM_HCK (11 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_PWM_STA (12 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_PWM1_CK (13 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_PWM2_CK (14 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_CQ_DMA_CK (15 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_AUD_BUS_CK(16 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_AUD_26M_CK(17 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_AUD_L_CK (18 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_AUD_AUD_CK(19 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_AUD_EG2_CK(20 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_DRAMC_26M_CK (21 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_DBG_CK(22 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_AP_DMA_CK (23 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SEJ_CK(24 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SEJ_13M_CK(25 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_THERM_CK (26 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_I2C0_CK (27 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_UART0_CK (28 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_UART1_CK (29 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_UART2_CK (30 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SPI2_CK (31 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SPI2_HCK_CK (32 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_NFI1_CK (33 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SPINFI1_CK(34 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_NFI_HCK_CK(35 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SPI0_CK (36 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SPI1_CK (37 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SPI0_HCK_CK (38 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_SPI1_HCK_CK (39 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_FRTC_CK (40 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_MSDC_CK (41 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_MSDC_HCK_CK (42 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_MSDC_133M_CK (43 - INFRACFG_AO_OFFSET)
-#define CK_INFRA_MSDC_66M_CK (44
[PATCH 10/14] clk: mediatek: mt7981: drop 1/1 spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7981.
Drop the factor entry from mt7981-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for infracfg and topckgen.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 14 +-
drivers/clk/mediatek/clk-mt7981.c | 250 -
include/dt-bindings/clock/mt7981-clk.h | 40 +---
3 files changed, 127 insertions(+), 177 deletions(-)
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index 1be1b797b3e..fc13b90caf6 100644
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -140,7 +140,7 @@
#clock-cells = <1>;
#pwm-cells = <2>;
interrupts = ;
- clocks = <&infracfg CK_INFRA_PWM>,
+ clocks = <&topckgen CK_TOP_PWM_SEL>,
<&infracfg_ao CK_INFRA_PWM_BSEL>,
<&infracfg_ao CK_INFRA_PWM1_CK>,
<&infracfg_ao CK_INFRA_PWM2_CK>,
@@ -174,7 +174,7 @@
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_UART0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
-<&infracfg CK_INFRA_UART>;
+<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
status = "disabled";
bootph-all;
@@ -188,7 +188,7 @@
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_UART1_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
-<&infracfg CK_INFRA_UART>;
+<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
status = "disabled";
};
@@ -201,7 +201,7 @@
assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
<&infracfg_ao CK_INFRA_UART2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
-<&infracfg CK_INFRA_UART>;
+<&topckgen CK_TOP_UART_SEL>;
mediatek,force-highspeed;
status = "disabled";
};
@@ -270,7 +270,7 @@
assigned-clocks = <&topckgen CK_TOP_SPI_SEL>,
<&infracfg CK_INFRA_SPI0_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
-<&topckgen CK_INFRA_ISPI0>;
+<&topckgen CK_TOP_SPI_SEL>;
clock-names = "spi-clk", "sel-clk";
interrupts = ;
status = "disabled";
@@ -285,7 +285,7 @@
assigned-clocks = <&topckgen CK_TOP_SPIM_MST_SEL>,
<&infracfg CK_INFRA_SPI1_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
-<&topckgen CK_INFRA_ISPI1>;
+<&topckgen CK_TOP_SPIM_MST_SEL>;
clock-names = "spi-clk", "sel-clk";
status = "disabled";
};
@@ -298,7 +298,7 @@
assigned-clocks = <&topckgen CK_TOP_SPI_SEL>,
<&infracfg CK_INFRA_SPI2_SEL>;
assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
-<&topckgen CK_INFRA_ISPI0>;
+<&topckgen CK_TOP_SPI_SEL>;
clock-names = "spi-clk", "sel-clk";
interrupts = ;
status = "disabled";
diff --git a/drivers/clk/mediatek/clk-mt7981.c
b/drivers/clk/mediatek/clk-mt7981.c
index ac1d93e162f..aaaebd46791 100644
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -312,81 +312,55 @@ static const struct mtk_composite top_muxes[] = {
/* INFRA FIXED DIV */
static const struct mtk_fixed_factor infra_fixed_divs[] = {
- TOP_FACTOR(CK_INFRA_CK_F26M, "infra_ck_f26m", CK_TOP_F26M_SEL, 1,
[PATCH 09/14] clk: mediatek: mt7981: implement sgmii0/1 clock
Implement missing sgmii0/1 clock and update the compatible the DTS to
match upstream kernel linux and in preparation for OF_UPSTREAM support
since the ethernet node define these additional clocks.
Signed-off-by: Christian Marangi
---
arch/arm/dts/mt7981.dtsi | 4 +-
drivers/clk/mediatek/clk-mt7981.c | 68 +++
2 files changed, 70 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/mt7981.dtsi b/arch/arm/dts/mt7981.dtsi
index be0d42bc997..1be1b797b3e 100644
--- a/arch/arm/dts/mt7981.dtsi
+++ b/arch/arm/dts/mt7981.dtsi
@@ -244,14 +244,14 @@
};
sgmiisys0: syscon@1006 {
- compatible = "mediatek,mt7986-sgmiisys", "syscon";
+ compatible = "mediatek,mt7981-sgmiisys_0", "syscon";
reg = <0x1006 0x1000>;
pn_swap;
#clock-cells = <1>;
};
sgmiisys1: syscon@1007 {
- compatible = "mediatek,mt7986-sgmiisys", "syscon";
+ compatible = "mediatek,mt7981-sgmiisys_1", "syscon";
reg = <0x1007 0x1000>;
#clock-cells = <1>;
};
diff --git a/drivers/clk/mediatek/clk-mt7981.c
b/drivers/clk/mediatek/clk-mt7981.c
index 8b2e667c049..ac1d93e162f 100644
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -629,6 +629,74 @@ U_BOOT_DRIVER(mtk_clk_infracfg_ao) = {
.flags = DM_FLAG_PRE_RELOC,
};
+/* sgmiisys */
+static const struct mtk_gate_regs sgmii_cg_regs = {
+ .set_ofs = 0xe4,
+ .clr_ofs = 0xe4,
+ .sta_ofs = 0xe4,
+};
+
+#define GATE_SGMII(_id, _name, _parent, _shift)
\
+ { \
+ .id = _id, .parent = _parent, .regs = &sgmii_cg_regs, \
+ .shift = _shift, \
+ .flags = CLK_GATE_NO_SETCLR_INV | CLK_PARENT_TOPCKGEN, \
+ }
+
+static const struct mtk_gate sgmii0_cgs[] = {
+ GATE_SGMII(CK_SGM0_TX_EN, "sgm0_tx_en", CK_TOP_USB_TX250M, 2),
+ GATE_SGMII(CK_SGM0_RX_EN, "sgm0_rx_en", CK_TOP_USB_EQ_RX250M, 3),
+ GATE_SGMII(CK_SGM0_CK0_EN, "sgm0_ck0_en", CK_TOP_USB_LN0_CK, 4),
+ GATE_SGMII(CK_SGM0_CDR_CK0_EN, "sgm0_cdr_ck0_en", CK_TOP_USB_CDR_CK, 5),
+};
+
+static int mt7981_sgmii0sys_probe(struct udevice *dev)
+{
+ return mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,
+ sgmii0_cgs);
+}
+
+static const struct udevice_id mt7981_sgmii0sys_compat[] = {
+ { .compatible = "mediatek,mt7981-sgmiisys_0", },
+ {}
+};
+
+U_BOOT_DRIVER(mtk_clk_sgmii0sys) = {
+ .name = "mt7981-clock-sgmii0sys",
+ .id = UCLASS_CLK,
+ .of_match = mt7981_sgmii0sys_compat,
+ .probe = mt7981_sgmii0sys_probe,
+ .priv_auto = sizeof(struct mtk_cg_priv),
+ .ops = &mtk_clk_gate_ops,
+};
+
+static const struct mtk_gate sgmii1_cgs[] = {
+ GATE_SGMII(CK_SGM1_TX_EN, "sgm1_tx_en", CK_TOP_USB_TX250M, 2),
+ GATE_SGMII(CK_SGM1_RX_EN, "sgm1_rx_en", CK_TOP_USB_EQ_RX250M, 3),
+ GATE_SGMII(CK_SGM1_CK1_EN, "sgm1_ck1_en", CK_TOP_USB_LN0_CK, 4),
+ GATE_SGMII(CK_SGM1_CDR_CK1_EN, "sgm1_cdr_ck1_en", CK_TOP_USB_CDR_CK, 5),
+};
+
+static int mt7981_sgmii1sys_probe(struct udevice *dev)
+{
+ return mtk_common_clk_gate_init(dev, &mt7981_topckgen_clk_tree,
+ sgmii1_cgs);
+}
+
+static const struct udevice_id mt7981_sgmii1sys_compat[] = {
+ { .compatible = "mediatek,mt7981-sgmiisys_1", },
+ {}
+};
+
+U_BOOT_DRIVER(mtk_clk_sgmii1sys) = {
+ .name = "mt7981-clock-sgmii1sys",
+ .id = UCLASS_CLK,
+ .of_match = mt7981_sgmii1sys_compat,
+ .probe = mt7981_sgmii1sys_probe,
+ .priv_auto = sizeof(struct mtk_cg_priv),
+ .ops = &mtk_clk_gate_ops,
+};
+
/* ethsys */
static const struct mtk_gate_regs eth_cg_regs = {
.set_ofs = 0x30,
--
2.45.2
[PATCH 08/14] clk: mediatek: mt7981: fix wrong parent list for INFRA_PWM1_SEL mux
Fix wrong parent list for INFRA_PWM1_SEL mux. The list is incorrect and
the parents are just 2. This also match the upstream linux
implementation.
Signed-off-by: Christian Marangi
---
drivers/clk/mediatek/clk-mt7981.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/mediatek/clk-mt7981.c
b/drivers/clk/mediatek/clk-mt7981.c
index 0ec5c943081..8b2e667c049 100644
--- a/drivers/clk/mediatek/clk-mt7981.c
+++ b/drivers/clk/mediatek/clk-mt7981.c
@@ -373,7 +373,7 @@ static const int infra_spi0_parents[] = { CK_INFRA_I2C,
CK_INFRA_ISPI0 };
static const int infra_spi1_parents[] = { CK_INFRA_I2C, CK_INFRA_ISPI1 };
-static const int infra_pwm1_parents[] = { -1, -1, -1, CK_INFRA_PWM };
+static const int infra_pwm1_parents[] = {-1, CK_INFRA_PWM };
static const int infra_pwm_bsel_parents[] = { -1, -1, -1, CK_INFRA_PWM };
--
2.45.2
