from:"Christophe LEROY"

Re: [PATCH] zlib: Fix big performance regression

2024-06-30 Thread Christophe Leroy





Le 30/06/2024 à 20:28, Christophe Leroy a écrit :



Le 30/06/2024 à 16:54, Tom Rini a écrit :

On Sun, Jun 30, 2024 at 10:47:06AM +0200, Christophe Leroy wrote:



Le 27/06/2024 à 21:40, Tom Rini a écrit :

On Thu, Jun 27, 2024 at 01:34:55PM -0600, Tom Rini wrote:

On Thu, Jun 27, 2024 at 10:25:21AM +0200, Christophe Leroy wrote:


Commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
brings a big performance regression in inflate_fast(), which leads
to watchdog timer reset on powerpc 8xx.

It looks like that commit does more than what it describe, it
especially removed an important optimisation that was doing copies
using halfwords instead of bytes. That unexpected change multiplied
by almost 4 the time spent in inflate_fast() and increased by 40%
the overall time needed to uncompress linux kernel image.

So partially revert that commit but keep post incrementation as it
is the initial purpose of said commit.

Fixes: 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
Signed-off-by: Christophe Leroy 
---
   lib/zlib/inffast.c | 51 
--

   1 file changed, 40 insertions(+), 11 deletions(-)


Both this, and my mostly revert lead to CI failures around compression
tests:
https://source.denx.de/u-boot/u-boot/-/jobs/859329


A full revert however, is fine.



Is it that ? :

FAILED
test/py/tests/test_ut.py::test_ut[ut_compression_compression_test_gzip]

It seems like when the optimisation was added by commit cd514aeb996e 
("zlib:

Optimize decompression"), only the pre-increment implementation was
available.

When POSTINC was added by commit e89516f031db ("zlib: split up to match
original source tree"), I guess it was not verified because POSTINC is
#undef by zlib.h.

With the following change I don't get the FAILED
ut_compression_compression_test_gzip CI anymore
(https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/jobs/859937)

diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index c271d85ea1..5dc0574202 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -257,7 +257,7 @@ void inflate_fast(z_streamp strm, unsigned start)
 sfrom = (unsigned short *)(from - OFF);
 loops = len >> 1;
 do
-   PUP(sout) = get_unaligned(++sfrom);
+   PUP(sout) = get_unaligned(sfrom++);
 while (--loops);
 out = (unsigned char *)sout + OFF;
 from = (unsigned char *)sfrom + OFF;


Ah, thanks! Testing again now.



That's probably not enough. I thought other failures were unrelated but 
I gave it a try with a full revert and I get no failure at all with that 
so there must be other things.


I find that pat16 = *(sout-2+2*OFF) suspicious, sout being a short it 
means -4 bytes which is not what is expected I think.


That's it. I get all green with the following, see 
https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/21391


diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index c271d85ea1..69268caee8 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -257,14 +257,14 @@ void inflate_fast(z_streamp strm, unsigned start)
sfrom = (unsigned short *)(from - OFF);
loops = len >> 1;
do
-   PUP(sout) = get_unaligned(++sfrom);
+   PUP(sout) = get_unaligned(sfrom++);
while (--loops);
out = (unsigned char *)sout + OFF;
from = (unsigned char *)sfrom + OFF;
} else { /* dist == 1 or dist == 2 */
unsigned short pat16;

-   pat16 = *(sout-2+2*OFF);
+   pat16 = *(sout-1+OFF);
if (dist == 1)
 #if defined(__BIG_ENDIAN)
pat16 = (pat16 & 0xff) | ((pat16 & 0xff ) << 8);

Christophe

Re: [PATCH] zlib: Fix big performance regression

2024-06-30 Thread Christophe Leroy





Le 30/06/2024 à 16:54, Tom Rini a écrit :

On Sun, Jun 30, 2024 at 10:47:06AM +0200, Christophe Leroy wrote:



Le 27/06/2024 à 21:40, Tom Rini a écrit :

On Thu, Jun 27, 2024 at 01:34:55PM -0600, Tom Rini wrote:

On Thu, Jun 27, 2024 at 10:25:21AM +0200, Christophe Leroy wrote:


Commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
brings a big performance regression in inflate_fast(), which leads
to watchdog timer reset on powerpc 8xx.

It looks like that commit does more than what it describe, it
especially removed an important optimisation that was doing copies
using halfwords instead of bytes. That unexpected change multiplied
by almost 4 the time spent in inflate_fast() and increased by 40%
the overall time needed to uncompress linux kernel image.

So partially revert that commit but keep post incrementation as it
is the initial purpose of said commit.

Fixes: 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
Signed-off-by: Christophe Leroy 
---
   lib/zlib/inffast.c | 51 --
   1 file changed, 40 insertions(+), 11 deletions(-)


Both this, and my mostly revert lead to CI failures around compression
tests:
https://source.denx.de/u-boot/u-boot/-/jobs/859329


A full revert however, is fine.



Is it that ? :

FAILED
test/py/tests/test_ut.py::test_ut[ut_compression_compression_test_gzip]

It seems like when the optimisation was added by commit cd514aeb996e ("zlib:
Optimize decompression"), only the pre-increment implementation was
available.

When POSTINC was added by commit e89516f031db ("zlib: split up to match
original source tree"), I guess it was not verified because POSTINC is
#undef by zlib.h.

With the following change I don't get the FAILED
ut_compression_compression_test_gzip CI anymore
(https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/jobs/859937)

diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index c271d85ea1..5dc0574202 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -257,7 +257,7 @@ void inflate_fast(z_streamp strm, unsigned start)
 sfrom = (unsigned short *)(from - OFF);
 loops = len >> 1;
 do
-   PUP(sout) = get_unaligned(++sfrom);
+   PUP(sout) = get_unaligned(sfrom++);
 while (--loops);
 out = (unsigned char *)sout + OFF;
 from = (unsigned char *)sfrom + OFF;


Ah, thanks! Testing again now.



That's probably not enough. I thought other failures were unrelated but 
I gave it a try with a full revert and I get no failure at all with that 
so there must be other things.


I find that pat16 = *(sout-2+2*OFF) suspicious, sout being a short it 
means -4 bytes which is not what is expected I think.

Re: [PATCH] zlib: Fix big performance regression

2024-06-30 Thread Christophe Leroy





Le 27/06/2024 à 21:40, Tom Rini a écrit :

On Thu, Jun 27, 2024 at 01:34:55PM -0600, Tom Rini wrote:

On Thu, Jun 27, 2024 at 10:25:21AM +0200, Christophe Leroy wrote:


Commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
brings a big performance regression in inflate_fast(), which leads
to watchdog timer reset on powerpc 8xx.

It looks like that commit does more than what it describe, it
especially removed an important optimisation that was doing copies
using halfwords instead of bytes. That unexpected change multiplied
by almost 4 the time spent in inflate_fast() and increased by 40%
the overall time needed to uncompress linux kernel image.

So partially revert that commit but keep post incrementation as it
is the initial purpose of said commit.

Fixes: 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
Signed-off-by: Christophe Leroy 
---
  lib/zlib/inffast.c | 51 --
  1 file changed, 40 insertions(+), 11 deletions(-)


Both this, and my mostly revert lead to CI failures around compression
tests:
https://source.denx.de/u-boot/u-boot/-/jobs/859329


A full revert however, is fine.



Is it that ? :

FAILED 
test/py/tests/test_ut.py::test_ut[ut_compression_compression_test_gzip]


It seems like when the optimisation was added by commit cd514aeb996e 
("zlib: Optimize decompression"), only the pre-increment implementation 
was available.


When POSTINC was added by commit e89516f031db ("zlib: split up to match 
original source tree"), I guess it was not verified because POSTINC is 
#undef by zlib.h.


With the following change I don't get the FAILED 
ut_compression_compression_test_gzip CI anymore 
(https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/jobs/859937)


diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index c271d85ea1..5dc0574202 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -257,7 +257,7 @@ void inflate_fast(z_streamp strm, unsigned start)
sfrom = (unsigned short *)(from - OFF);
loops = len >> 1;
do
-   PUP(sout) = get_unaligned(++sfrom);
+   PUP(sout) = get_unaligned(sfrom++);
while (--loops);
out = (unsigned char *)sout + OFF;
from = (unsigned char *)sfrom + OFF;


Christophe

Re: [PATCH] Revert "zlib: Port fix for CVE-2016-9841 to U-Boot"

2024-06-27 Thread Christophe Leroy





Le 27/06/2024 à 17:49, Tom Rini a écrit :

In commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
Michal brings in (correctly) the upstream fix for CVE-2016-9841.
However, when upstream was fixing this issue they also removed a
necessary optimization for some CPU classes as part of simplifying the
code. This in turn leads to boot failures on the platforms as they now
take too long to decompress images and so the watchdog sees the system
as stuck.

The long term fix here is as Christophe has posted, which is to restore
the optimization. Given the nearness of the release, what I do here is
very similar, result wise, but less so, code wise. This is a revert of
Michal's commit _except_ we only allow for post-increment in the code,
thus keeping the CVE resolved. For the next release this commit shall be
reverted and then Christophe's patch applied.

This largely reverts commit 340fdf1303dce7e5f53ddd981471836058ff23ef.

Reported-by: Christophe Leroy 
Signed-off-by: Tom Rini 


Tested-by: Christophe Leroy 


--
Cc: Christophe Leroy 
Cc: Michal Simek 
---
  lib/zlib/inffast.c | 117 +
  1 file changed, 75 insertions(+), 42 deletions(-)

diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index 5e2a65ad4d27..c271d85ea191 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -1,5 +1,5 @@
  /* inffast.c -- fast decoding
- * Copyright (C) 1995-2008, 2010, 2013 Mark Adler
+ * Copyright (C) 1995-2004 Mark Adler
   * For conditions of distribution and use, see copyright notice in zlib.h
   */
  
@@ -12,6 +12,12 @@
  
  #ifndef ASMINF
  
+/*

+ * Only allow post-increment in order to resolve CVE-2016-9841
+ */
+#  define OFF 0
+#  define PUP(a) *(a)++
+
  /*
 Decode literal, length, and distance codes and write out the resulting
 literal and match bytes until either not enough input or output is
@@ -47,13 +53,12 @@
requires strm->avail_out >= 258 for each loop to avoid checking for
output space.
   */
-void ZLIB_INTERNAL inflate_fast(strm, start)
-z_streamp strm;
-unsigned start; /* inflate()'s starting value for strm->avail_out */
+void inflate_fast(z_streamp strm, unsigned start)
+/* start: inflate()'s starting value for strm->avail_out */
  {
  struct inflate_state FAR *state;
-z_const unsigned char FAR *in;  /* local strm->next_in */
-z_const unsigned char FAR *last;/* have enough input while in < last */
+unsigned char FAR *in;  /* local strm->next_in */
+unsigned char FAR *last;/* while in < last, enough input available */
  unsigned char FAR *out; /* local strm->next_out */
  unsigned char FAR *beg; /* inflate()'s initial strm->next_out */
  unsigned char FAR *end; /* while out < end, enough space available */
@@ -79,7 +84,7 @@ unsigned start; /* inflate()'s starting value for 
strm->avail_out */
  
  /* copy state to local variables */

  state = (struct inflate_state FAR *)strm->state;
-in = strm->next_in;
+in = strm->next_in - OFF;
  last = in + (strm->avail_in - 5);
  if (in > last && strm->avail_in > 5) {
  /*
@@ -89,7 +94,7 @@ unsigned start; /* inflate()'s starting value for 
strm->avail_out */
strm->avail_in = 0x - (uintptr_t)in;
  last = in + (strm->avail_in - 5);
  }
-out = strm->next_out;
+out = strm->next_out - OFF;
  beg = out - (start - strm->avail_out);
  end = out + (strm->avail_out - 257);
  #ifdef INFLATE_STRICT
@@ -110,9 +115,9 @@ unsigned start; /* inflate()'s starting value for 
strm->avail_out */
 input data or output space */
  do {
  if (bits < 15) {
-hold += (unsigned long)(*in++) << bits;
+hold += (unsigned long)(PUP(in)) << bits;
  bits += 8;
-hold += (unsigned long)(*in++) << bits;
+hold += (unsigned long)(PUP(in)) << bits;
  bits += 8;
  }
  here = lcode[hold & lmask];
@@ -125,14 +130,14 @@ unsigned start; /* inflate()'s starting value for 
strm->avail_out */
  Tracevv((stderr, here.val >= 0x20 && here.val < 0x7f ?
  "inflate: literal '%c'\n" :
  "inflate: literal 0x%02x\n", here.val));
-*out++ = (unsigned char)(here.val);
+PUP(out) = (unsigned char)(here.val);
  }
  else if (op & 16) { /* length base */
  len = (unsigned)(here.val);
  op &= 15;   /* number of extra bits */
  if (op) {
  if (bits < op) {
-hold += (unsigned long)(*in++) << bits;
+hold += (unsigned long)(PUP(in)) << bi

[PATCH] watchdog: mpc8xxx: Fix timer value

2024-06-27 Thread Christophe Leroy

Timer value is a 16 bits calculated from the wanted timeout and the
system clock. On powerpc/8xx, a timeout of 2s gives a value which
is over U16_MAX so U16_MAX shall be used. But the calculation is
casted to u16 so at the end the result is 63770 instead of 128906.

So the timer gets loaded with 63770 instead of 65535. It is not
a big difference in that case, but lets make the code correct and
cast to u32 instead of u16.

Fixes: 26e8ebcd7cb7 ("watchdog: mpc8xxx: Make it generic")
Signed-off-by: Christophe Leroy 
---
 drivers/watchdog/mpc8xxx_wdt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
index f28636ca90..67e687a364 100644
--- a/drivers/watchdog/mpc8xxx_wdt.c
+++ b/drivers/watchdog/mpc8xxx_wdt.c
@@ -44,7 +44,7 @@ static int mpc8xxx_wdt_start(struct udevice *dev, u64 
timeout, ulong flags)
struct mpc8xxx_wdt_priv *priv = dev_get_priv(dev);
const char *mode = env_get("watchdog_mode");
ulong prescaler = dev_get_driver_data(dev);
-   u16 swtc = min_t(u16, timeout * get_board_sys_clk() / 1000 / prescaler, 
U16_MAX);
+   u16 swtc = min_t(u32, timeout * get_board_sys_clk() / 1000 / prescaler, 
U16_MAX);
u32 val;
 
mpc8xxx_wdt_reset(dev);
-- 
2.44.0

[PATCH] zlib: Fix big performance regression

2024-06-27 Thread Christophe Leroy

Commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
brings a big performance regression in inflate_fast(), which leads
to watchdog timer reset on powerpc 8xx.

It looks like that commit does more than what it describe, it
especially removed an important optimisation that was doing copies
using halfwords instead of bytes. That unexpected change multiplied
by almost 4 the time spent in inflate_fast() and increased by 40%
the overall time needed to uncompress linux kernel image.

So partially revert that commit but keep post incrementation as it
is the initial purpose of said commit.

Fixes: 340fdf1303dc ("zlib: Port fix for CVE-2016-9841 to U-Boot")
Signed-off-by: Christophe Leroy 
---
 lib/zlib/inffast.c | 51 --
 1 file changed, 40 insertions(+), 11 deletions(-)

diff --git a/lib/zlib/inffast.c b/lib/zlib/inffast.c
index 5e2a65ad4d..c4b1d12258 100644
--- a/lib/zlib/inffast.c
+++ b/lib/zlib/inffast.c
@@ -236,18 +236,47 @@ unsigned start; /* inflate()'s starting value for 
strm->avail_out */
 }
 }
 else {
+   unsigned short *sout;
+   unsigned long loops;
+
 from = out - dist;  /* copy direct from output */
-do {/* minimum length is three */
-*out++ = *from++;
-*out++ = *from++;
-*out++ = *from++;
-len -= 3;
-} while (len > 2);
-if (len) {
-*out++ = *from++;
-if (len > 1)
-*out++ = *from++;
-}
+/* minimum length is three */
+   /* Align out addr */
+   if (!((long)(out - 1) & 1)) {
+   *out++ = *from++;
+   len--;
+   }
+   sout = (unsigned short *)out;
+   if (dist > 2 ) {
+   unsigned short *sfrom;
+
+   sfrom = (unsigned short *)from;
+   loops = len >> 1;
+   do
+   *sout++ = get_unaligned(++sfrom);
+   while (--loops);
+   out = (unsigned char *)sout;
+   from = (unsigned char *)sfrom;
+   } else { /* dist == 1 or dist == 2 */
+   unsigned short pat16;
+
+   pat16 = *(sout-2);
+   if (dist == 1)
+#if defined(__BIG_ENDIAN)
+   pat16 = (pat16 & 0xff) | ((pat16 & 0xff ) << 8);
+#elif defined(__LITTLE_ENDIAN)
+   pat16 = (pat16 & 0xff00) | ((pat16 & 0xff00 ) >> 8);
+#else
+#error __BIG_ENDIAN nor __LITTLE_ENDIAN is defined
+#endif
+   loops = len >> 1;
+   do
+   *sout++ = pat16;
+   while (--loops);
+   out = (unsigned char *)sout;
+   }
+   if (len & 1)
+   *out++ = *from++;
 }
 }
 else if ((op & 64) == 0) {  /* 2nd level distance code */
-- 
2.44.0

Re: [ANN] U-Boot v2024.07-rc5 released

2024-06-27 Thread Christophe Leroy





Le 26/06/2024 à 17:01, Tom Rini a écrit :

On Tue, Jun 25, 2024 at 09:20:54PM +0200, Christophe Leroy wrote:



Le 25/06/2024 à 17:19, Tom Rini a écrit :

On Tue, Jun 25, 2024 at 03:12:38PM +, LEROY Christophe wrote:

Hi All,

Le 24/06/2024 à 21:30, Tom Rini a écrit :

Hey all,

Well, once again I need to check my calender reminders since, whoops,
I'm a week late. That said, looking at the list of changes in this
slightly elongated period, I think it's OK. At this point we're a week
out from the release, so it's time for clear and obvious regression
fixes. Ideally ones introduced this release cycle so there's less
chances of unintended side-effects.

In terms of a changelog,
git log --merges v2024.07-rc4..v2024.07-rc5
contains what I've pulled but as always, better PR messages and tags
will provide better results here.

With that, the final release is planned for Monday, July 1st, 2024.
Thanks all!



For your information, I have started testing v2024.07 on my powerpc
boards in operational condition and I have a major problem : U-boot
doesn't get the Linux kernel started before the watchdog fires. I have
to disable watchdog to get it running.

This problem doesn't occur with v2024.04.

I bisected it to commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841
to U-Boot") and I also confirm that v2024.07-rc5 works well with that
commit reverted on top of it.

Any idea of what is going wrong with that commit ?


Are you able to check the zlib performance before/after that commit?



Indeed there's a huge difference.

Before : 12298074 timebase ticks to decompress kernel
After :  17145906 ticks, that is 40% more time.

But behind that, we also need to understand why the watchdog is not kept
alive during that time.


That is odd, I would have expected it to have been kept alive.



I digged into it a bit more and really that commit 340fdf1303dc ("zlib: 
Port fix for CVE-2016-9841 to U-Boot") is the issue. The watchdog is 
still kept alive, but not fast enough. On powerpc 8xx, the CPU watchdog 
has a timeout of slightly more than 1s, so it must be kept alive very often.


schedule() is called in inflate() just before calling inflate_fast(), 
which worked until now because the maximum time spent in inflate_fast() 
was about 300ms. With the above commit, more than 1s is spent in 
inflate_fast() , for the problematic block the time spent inside 
inflate_fast() is multiplied by almost 4.


The problem is that the commit does more than what it says and removes
an important optimisation that is using halfwords instead of bytes for 
the copy.


I'm going to send shortly a patch to partially revert that commit. But 
if you feel it is better to revert the commit completely and provide a 
fix in next cycle, it is ok as well, up to you but I think it is 
important to get that fixed for v2024.07.


I'm also sending a fix on the setup of 8xx watchdog, but that has almost 
no impact in reality and doesn't fix the problem.


Thanks
Christophe

Re: [ANN] U-Boot v2024.07-rc5 released

2024-06-25 Thread Christophe Leroy





Le 25/06/2024 à 17:19, Tom Rini a écrit :

On Tue, Jun 25, 2024 at 03:12:38PM +, LEROY Christophe wrote:

Hi All,

Le 24/06/2024 à 21:30, Tom Rini a écrit :

Hey all,

Well, once again I need to check my calender reminders since, whoops,
I'm a week late. That said, looking at the list of changes in this
slightly elongated period, I think it's OK. At this point we're a week
out from the release, so it's time for clear and obvious regression
fixes. Ideally ones introduced this release cycle so there's less
chances of unintended side-effects.

In terms of a changelog,
git log --merges v2024.07-rc4..v2024.07-rc5
contains what I've pulled but as always, better PR messages and tags
will provide better results here.

With that, the final release is planned for Monday, July 1st, 2024.
Thanks all!



For your information, I have started testing v2024.07 on my powerpc
boards in operational condition and I have a major problem : U-boot
doesn't get the Linux kernel started before the watchdog fires. I have
to disable watchdog to get it running.

This problem doesn't occur with v2024.04.

I bisected it to commit 340fdf1303dc ("zlib: Port fix for CVE-2016-9841
to U-Boot") and I also confirm that v2024.07-rc5 works well with that
commit reverted on top of it.

Any idea of what is going wrong with that commit ?


Are you able to check the zlib performance before/after that commit?



Indeed there's a huge difference.

Before : 12298074 timebase ticks to decompress kernel
After :  17145906 ticks, that is 40% more time.

But behind that, we also need to understand why the watchdog is not kept 
alive during that time.


Christophe

Re: [PATCH 10/11] spi: Add support for ADI SC5XX-family processor SPI peripherals

2024-05-15 Thread Christophe Leroy



Le 15/05/2024 à 23:57, Greg Malysa a écrit :
> [Vous ne recevez pas souvent de courriers de greg.mal...@timesys.com. 
> Découvrez pourquoi ceci est important à 
> https://aka.ms/LearnAboutSenderIdentification ]
> 
> From: Nathan Barrett-Morrison 
> 
> This adds support for the ADI-specific SPI driver present in the ADI
> SC5xx line of SoCs. This IP block is distinct from the QSPI/OSPI block
> that uses the Cadence driver. Both may be used at once with appropriate
> pin muxing configuration.
> 
> Co-developed-by: Greg Malysa 
> Signed-off-by: Greg Malysa 
> Co-developed-by: Angelo Dureghello 
> Signed-off-by: Angelo Dureghello 
> Co-developed-by: Ian Roberts 
> Signed-off-by: Ian Roberts 
> Co-developed-by: Piotr Wojtaszczyk 
> Signed-off-by: Piotr Wojtaszczyk 
> Signed-off-by: Vasileios Bimpikas 
> Signed-off-by: Utsav Agarwal 
> Signed-off-by: Arturs Artamonovs 
> Signed-off-by: Nathan Barrett-Morrison 
> ---
> 
>   MAINTAINERS|   1 +
>   drivers/spi/Kconfig|   6 +
>   drivers/spi/Makefile   |   1 +
>   drivers/spi/adi_spi3.c | 690 +
>   4 files changed, 698 insertions(+)
>   create mode 100644 drivers/spi/adi_spi3.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 8ca7da4c02..1131c85d22 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -618,6 +618,7 @@ F:  drivers/net/dwc_eth_qos_adi.c
>   F: drivers/pinctrl/pinctrl-adi-adsp.c
>   F: drivers/remoteproc/adi_sc5xx_rproc.c
>   F: drivers/serial/serial_adi_uart4.c
> +F: drivers/spi/adi_spi3.c
>   F: drivers/timer/adi_sc5xx_timer.c
>   F: drivers/usb/musb-new/sc5xx.c
>   F: drivers/watchdog/adi_wdt.c
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index 35030ab355..6634494d84 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -52,6 +52,12 @@ config SPI_DIRMAP
> 
>   if DM_SPI
> 
> +config ADI_SPI3
> +   bool "Enable ADI SPI Driver"
> +   help
> + Enable the ADI (Analog Devices) SPI controller driver. This
> + driver enables the support for SC5XX spi controller.
> +
>   config ALTERA_SPI
>  bool "Altera SPI driver"
>  help
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index 32d7bf7237..fa1b47f2f9 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -19,6 +19,7 @@ obj-y += spi.o
>   obj-$(CONFIG_SPI_MEM) += spi-mem-nodm.o
>   endif
> 
> +obj-$(CONFIG_ADI_SPI3) += adi_spi3.o
>   obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
>   obj-$(CONFIG_APPLE_SPI) += apple_spi.o
>   obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
> diff --git a/drivers/spi/adi_spi3.c b/drivers/spi/adi_spi3.c
> new file mode 100644
> index 00..9e75050a89
> --- /dev/null
> +++ b/drivers/spi/adi_spi3.c
> @@ -0,0 +1,690 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * (C) Copyright 2022 - Analog Devices, Inc.
> + *
> + * Written and/or maintained by Timesys Corporation
> + *
> + * Converted to driver model by Nathan Barrett-Morrison
> + *
> + * Contact: Nathan Barrett-Morrison 
> + * Contact: Greg Malysa 
> + * Contact: Ian Roberts 
> + * Contact: Piotr Wojtaszczyk 
> + *
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define SPI_IDLE_VAL   0xff
> +
> +#define MAX_CTRL_CS 7
> +
> +/* SPI_CONTROL */
> +#define SPI_CTL_EN  0x0001 /* Enable */
> +#define SPI_CTL_MSTR0x0002 /* Master/Slave */
> +#define SPI_CTL_PSSE0x0004 /* controls modf error in master mode 
> */
> +#define SPI_CTL_ODM 0x0008 /* Open Drain Mode */
> +#define SPI_CTL_CPHA0x0010 /* Clock Phase */
> +#define SPI_CTL_CPOL0x0020 /* Clock Polarity */
> +#define SPI_CTL_ASSEL   0x0040 /* Slave Select Pin Control */
> +#define SPI_CTL_SELST   0x0080 /* Slave Select Polarity in transfers 
> */
> +#define SPI_CTL_EMISO   0x0100 /*Enable MISO */
> +#define SPI_CTL_SIZE0x0600 /*Word Transfer Size */
> +#define SPI_CTL_SIZE08  0x /*SIZE: 8 bits */
> +#define SPI_CTL_SIZE16  0x0200 /*SIZE: 16 bits */
> +#define SPI_CTL_SIZE32  0x0400 /*SIZE: 32 bits */
> +#define SPI_CTL_LSBF0x1000 /*LSB First */
> +#define SPI_CTL_FCEN0x2000 /*Flow-Control Enable */
> +#define SPI_CTL_FCCH0x4000 /*Flow-Control Channel Selection */
> +#define SPI_CTL_FCPL0x8000 /*Flow-Control Polarity */
> +#define SPI_CTL_FCWM0x0003 /*Flow-Control Water-Mark */
> +#define SPI_CTL_FIFO0   0x /*FCWM: Tx empty or Rx Full */
> +#define SPI_CTL_FIFO1   0x0001 /*FCWM: Tx empty or Rx full (>=75%) */
> +#define SPI_CTL_FIFO2   0x0002 /*FCWM: Tx empty or Rx full (>=50%) */
> +#define SPI_CTL_FMODE   0x0004 /*Fast-mode Enable */
> +#define SPI_CTL_MIOM0x0030 /*Multiple I/O Mode */
> +#define SPI_CTL_MIO_DIS 0x /*MIOM: Disable */
> +#define SPI_CTL_MIO_DUAL0x0010 /*MIOM: Enable DIOM

[GIT PULL] Please pull u-boot-mpc8xx

2024-04-18 Thread Christophe Leroy

Hi Tom,

This pull request adds support for temperature sensors et FPGA loading 
on boards from CS GROUP France.

CI: https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/20416

Thanks
Christophe

The following changes since commit 2c3fa4b8add3cb6a440184ab67debc6867d383c0:

   sandbox: don't call os_close with invalid file descriptor (2024-04-17 
17:06:16 -0600)

are available in the Git repository at:

   g...@source.denx.de:u-boot/custodians/u-boot-mpc8xx.git for-2024.07

for you to fetch changes up to 741e30e8c2b837dc92ee2eedec5478afdd83a316:

   board: cssi: Read and display MCR board address (2024-04-18 15:47:46 
+0200)


Christophe Leroy (13):
   board: cssi: Fix SPI nodes in DTS
   spi: mpc8xx: Add GPIO dependency
   spi: mpc8xx: Fix transfert when input or output buffer is NULL
   thermal: Add support for TI LM74
   board: cssi: Add support for SPI bus on MCR3000 board
   board: cssi: add support for reading temperature
   powerpc: 8xx: Set SDMA configuration register correcly
   spi: mpc8xx: Allow transfer of more than MAX_BUFFER len
   spi: mpc8xx: Use 16 bit mode for large transfers with even size
   spi: mpc8xx: Set up speed as requested
   board: cssi: Use HAVE_VENDOR_COMMON_LIB logic
   board: cssi: Load FPGA on MCR3000 board
   board: cssi: Read and display MCR board address

Hugo Dubois (2):
   board: cssi: Initialise port F on MIAE
   board: cssi: Properly initialise MAC address for fibre on CMPC885 
board

Jean-Michel CASAUBON (2):
   board: cssi: Fix MCR3000 board environment
   board: cssi: Allow use without HUSH shell

  arch/powerpc/cpu/mpc8xx/cpu_init.c |6 +
  arch/powerpc/dts/cmpc885.dts   |   18 +-
  arch/powerpc/dts/cmpcpro.dts   |   16 +-
  arch/powerpc/dts/mcr3000.dts   |   41 +
  board/cssi/cmpc885/Makefile|2 +-
  board/cssi/cmpc885/cmpc885.c   |4 +-
  board/cssi/cmpc885/cmpc885.env |4 +-
  board/cssi/cmpcpro/Makefile|2 +-
  board/cssi/cmpcpro/cmpcpro.env |4 +-
  board/cssi/common/Makefile |8 +
  board/cssi/common/common.c |   42 +-
  board/cssi/mcr3000/Makefile|1 +
  board/cssi/mcr3000/fpga_code.h | 9778 

  board/cssi/mcr3000/mcr3000.c   |   58 +
  board/cssi/mcr3000/mcr3000.env |2 +-
  board/cssi/mcr3000/mcr3000_gpio.c  |  109 +
  configs/CMPC885_defconfig  |3 +
  configs/CMPCPRO_defconfig  |3 +
  configs/MCR3000_defconfig  |8 +
  drivers/spi/Kconfig|2 +-
  drivers/spi/mpc8xx_spi.c   |  113 +-
  drivers/thermal/Kconfig|6 +
  drivers/thermal/Makefile   |1 +
  drivers/thermal/ti-lm74.c  |   52 +
  24 files changed, 10244 insertions(+), 39 deletions(-)
  create mode 100644 board/cssi/common/Makefile
  create mode 100644 board/cssi/mcr3000/fpga_code.h
  create mode 100644 board/cssi/mcr3000/mcr3000_gpio.c
  create mode 100644 drivers/thermal/ti-lm74.c

[PATCH v2 17/17] board: cssi: Read and display MCR board address

2024-04-15 Thread Christophe Leroy

MCR boards are plugged in racks. The position in the rack can be read
in a register.

For MCR3000, that's provided by the FPGA so check it is loaded before
reading the address.

For the other boards, the FPGA is loaded by hardware so it can be
read inconditionnaly.

Signed-off-by: Christophe Leroy 
---
 board/cssi/common/common.c   | 6 +-
 board/cssi/mcr3000/mcr3000.c | 7 ++-
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
index 6848efd43b..0292a9016e 100644
--- a/board/cssi/common/common.c
+++ b/board/cssi/common/common.c
@@ -164,7 +164,7 @@ int checkboard_common(void)
 
 void misc_init_r_common(void)
 {
-   u8 tmp, far_id;
+   u8 tmp, far_id, addr;
int count = 3;
 
switch (in_8(ADDR_FPGA_R_BASE)) {
@@ -173,6 +173,10 @@ void misc_init_r_common(void)
if ((in_8(ADDR_FPGA_R_BASE + 0x31) & FPGA_R_ACQ_AL_FAV) == 0)
env_set("bootdelay", "60");
 
+   addr = in_8(ADDR_FPGA_R_BASE + 0x43);
+   printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
+  addr, addr >> 7, (addr >> 4) & 7, addr & 15);
+
env_set("config", CFG_BOARD_MCR3000_2G);
env_set("hostname", CFG_BOARD_MCR3000_2G);
break;
diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c
index 15a2d0d946..48e82a902d 100644
--- a/board/cssi/mcr3000/mcr3000.c
+++ b/board/cssi/mcr3000/mcr3000.c
@@ -167,7 +167,12 @@ int misc_init_r(void)
setbits_be32(>im_cpm.cp_pbdir, 0xf);
clrbits_be32(>im_cpm.cp_pbdat, 0x1);
 
-   load_fpga();
+   if (!load_fpga()) {
+   u8 addr = in_be16((void *)0x149c);
+
+   printf("Board address: 0x%2.2x (System %d Rack %d Slot %d)\n",
+  addr, addr >> 7, (addr >> 4) & 7, addr & 15);
+   }
 
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(>iop_pcdat) & 0x0004) == 0)
-- 
2.43.0

[PATCH v2 16/17] board: cssi: Load FPGA on MCR3000 board

2024-04-15 Thread Christophe Leroy

Unlike CMPC885 and CMPCPRO boards, the FPGA of MCR3000 board doesn't
load code automatically but needs to be loaded by software through SPI.

Until now it was loaded later by Linux, but we'd like U-boot to have
access to some information that require the FPGA, like board address
in racks.

So, implemented the load of FPGA in U-boot.

Signed-off-by: Christophe Leroy 
---
To avoid spamming your email boxes, the code isn't included in
the emailed patch but will be present in the PULL request
---
 arch/powerpc/dts/mcr3000.dts   |  6 -
 board/cssi/mcr3000/fpga_code.h | 10 +++
 board/cssi/mcr3000/mcr3000.c   | 48 ++
 3 files changed, 63 insertions(+), 1 deletion(-)
 create mode 100644 board/cssi/mcr3000/fpga_code.h

diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts
index f678951e22..aa46007b8d 100644
--- a/arch/powerpc/dts/mcr3000.dts
+++ b/arch/powerpc/dts/mcr3000.dts
@@ -33,12 +33,16 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl,mpc8xx-spi";
-   gpios = < 2 0>;
+   gpios = < 2 0
+ 0 0>;
 
temp@0 {
reg = <0>;
compatible = "ti,lm74";
};
+   fpga@1 {
+   reg = <1>;
+   };
};
};
 
diff --git a/board/cssi/mcr3000/fpga_code.h b/board/cssi/mcr3000/fpga_code.h
new file mode 100644
index 00..0d710ba41f
--- /dev/null
+++ b/board/cssi/mcr3000/fpga_code.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2010 CS Systemes d'Information
+ *
+ * uCORE FPGA code for MCR3000 board
+ */
+
+u32 fpga_code[] = {
+   0xdeadbeef,
+};
diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c
index 537d7fa124..15a2d0d946 100644
--- a/board/cssi/mcr3000/mcr3000.c
+++ b/board/cssi/mcr3000/mcr3000.c
@@ -13,12 +13,15 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 
+#include "fpga_code.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #define SDRAM_MAX_SIZE (32 * 1024 * 1024)
@@ -107,6 +110,49 @@ int dram_init(void)
return 0;
 }
 
+static int load_fpga(void)
+{
+   immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   struct udevice *master;
+   struct spi_slave *slave;
+   int ret;
+
+   ret = uclass_get_device(UCLASS_SPI, 0, );
+   if (ret)
+   return ret;
+
+   ret = _spi_get_bus_and_cs(0, 1, 1000, 0, "spi_generic_drv",
+ "generic_0:0", , );
+   if (ret)
+   return ret;
+
+   ret = spi_claim_bus(slave);
+
+   printf("FPGA Init ... ");
+
+   clrbits_be32(>im_cpm.cp_pbdat, 0x2);
+   while ((in_be32(>im_cpm.cp_pbdat) & 0x8000))
+   ;
+   setbits_be32(>im_cpm.cp_pbdat, 0x2);
+   while (!(in_be32(>im_cpm.cp_pbdat) & 0x8000))
+   ;
+
+   printf("Loading ... ");
+
+   ret = spi_xfer(slave, sizeof(fpga_code) * BITS_PER_BYTE, fpga_code, 
NULL, 0);
+
+   spi_release_bus(slave);
+
+   if ((in_be32(>im_cpm.cp_pbdat) & 0x4000)) {
+   printf("Done\n");
+   } else {
+   printf("FAILED\n");
+   ret = -EINVAL;
+   }
+
+   return ret;
+}
+
 int misc_init_r(void)
 {
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
@@ -121,6 +167,8 @@ int misc_init_r(void)
setbits_be32(>im_cpm.cp_pbdir, 0xf);
clrbits_be32(>im_cpm.cp_pbdat, 0x1);
 
+   load_fpga();
+
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(>iop_pcdat) & 0x0004) == 0)
env_set("bootdelay", "60");
-- 
2.43.0

[PATCH v2 15/17] board: cssi: Use HAVE_VENDOR_COMMON_LIB logic

2024-04-15 Thread Christophe Leroy

Instead of cross using cross-directory makefile directives,
add a Makefile in board/cssi/common/ directory in order to
benefit from HAVE_VENDOR_COMMON_LIB logic.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/Makefile | 2 +-
 board/cssi/cmpcpro/Makefile | 2 +-
 board/cssi/common/Makefile  | 8 
 3 files changed, 10 insertions(+), 2 deletions(-)
 create mode 100644 board/cssi/common/Makefile

diff --git a/board/cssi/cmpc885/Makefile b/board/cssi/cmpc885/Makefile
index baf9e5ab4f..6c055097cd 100644
--- a/board/cssi/cmpc885/Makefile
+++ b/board/cssi/cmpc885/Makefile
@@ -5,6 +5,6 @@
 # Christophe Leroy 
 #
 
-obj-y += cmpc885.o ../common/common.o
+obj-y += cmpc885.o
 obj-y += sdram.o
 obj-$(CONFIG_CMD_NAND) += nand.o
diff --git a/board/cssi/cmpcpro/Makefile b/board/cssi/cmpcpro/Makefile
index 73ff451ea1..30837781af 100644
--- a/board/cssi/cmpcpro/Makefile
+++ b/board/cssi/cmpcpro/Makefile
@@ -5,4 +5,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
 
-obj-y += cmpcpro.o nand.o ../common/common.o
+obj-y += cmpcpro.o nand.o
diff --git a/board/cssi/common/Makefile b/board/cssi/common/Makefile
new file mode 100644
index 00..973582639e
--- /dev/null
+++ b/board/cssi/common/Makefile
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2024 CS GROUP France
+# Christophe Leroy 
+#
+
+obj-$(CONFIG_TARGET_CMPC885) += common.o
+obj-$(CONFIG_TARGET_CMPCPRO) += common.o
-- 
2.43.0

[PATCH v2 14/17] spi: mpc8xx: Set up speed as requested

2024-04-15 Thread Christophe Leroy

Set the speed requested through mpc8xx_spi_set_speed() instead
of hardcoding a fixed speed.

Signed-off-by: Christophe Leroy 
---
 drivers/spi/mpc8xx_spi.c | 19 +--
 1 file changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index b1abfbf4fc..e1448cc619 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -48,6 +48,21 @@ static int mpc8xx_spi_set_mode(struct udevice *dev, uint mod)
 
 static int mpc8xx_spi_set_speed(struct udevice *dev, uint speed)
 {
+   immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   cpm8xx_t __iomem *cp = >im_cpm;
+   u8 pm = (gd->arch.brg_clk - 1) / (speed * 16);
+
+   if (pm > 16) {
+   setbits_be16(>cp_spmode, SPMODE_DIV16);
+   pm /= 16;
+   if (pm > 16)
+   pm = 16;
+   } else {
+   clrbits_be16(>cp_spmode, SPMODE_DIV16);
+   }
+
+   clrsetbits_be16(>cp_spmode, SPMODE_PM(0xf), SPMODE_PM(pm));
+
return 0;
 }
 
@@ -189,8 +204,8 @@ static int mpc8xx_spi_xfer_one(struct udevice *dev, size_t 
count,
out_be16(>cbd_sc, BD_SC_EMPTY | BD_SC_WRAP);
out_be16(>cbd_datlen, 0);  /* rx length has no significance */
 
-   clrsetbits_be16(>cp_spmode, ~SPMODE_LOOP, SPMODE_REV | SPMODE_MSTR |
-   SPMODE_EN | spmode_len | SPMODE_PM(0x8));
+   clrsetbits_be16(>cp_spmode, ~(SPMODE_LOOP | SPMODE_PM(0xf) | 
SPMODE_DIV16),
+   SPMODE_REV | SPMODE_MSTR | SPMODE_EN | spmode_len);
out_8(>cp_spim, 0); /* Mask  all SPI events */
out_8(>cp_spie, SPI_EMASK); /* Clear all SPI events */
 
-- 
2.43.0

[PATCH v2 13/17] spi: mpc8xx: Use 16 bit mode for large transfers with even size

2024-04-15 Thread Christophe Leroy

On CPM, the RISC core is a lot more efficiant when doing transfers
in 16-bits chunks than in 8-bits chunks, but unfortunately the
words need to be byte swapped.

So, for large tranfers with an even size, allocate a temporary
buffer and byte-swap data before and after transfer.

This change allows setting higher speed for transfer. For instance
on an MPC 8xx (CPM1 comms RISC processor), the documentation tells
that transfer in byte mode at 1 kbit/s uses 0.200% of CPM load
at 25 MHz while a word transfer at the same speed uses 0.032%
of CPM load. This means the speed can be 6 times higher in
word mode for the same CPM load.

For small transfers, the load reduction is not worth the CPU load
required to allocate the temporary buffer, so do it only when data
size is over 64 bytes.

Signed-off-by: Christophe Leroy 
---
 drivers/spi/mpc8xx_spi.c | 44 +---
 1 file changed, 41 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index a193ac711b..b1abfbf4fc 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -18,6 +18,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -30,6 +31,7 @@
 #define CPM_SPI_BASE_TX(CPM_SPI_BASE + sizeof(cbd_t))
 
 #define MAX_BUFFER 0x8000 /* Max possible is 0x. We want power of 2 */
+#define MIN_HWORD_XFER 64  /* Minimum size for 16 bits transfer */
 
 struct mpc8xx_priv {
spi_t __iomem *spi;
@@ -149,23 +151,46 @@ static int mpc8xx_spi_xfer_one(struct udevice *dev, 
size_t count,
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
cpm8xx_t __iomem *cp = >im_cpm;
cbd_t __iomem *tbdf, *rbdf;
+   void *bufout, *bufin;
+   u16 spmode_len;
int tm;
 
tbdf = (cbd_t __iomem *)>cp_dpmem[CPM_SPI_BASE_TX];
rbdf = (cbd_t __iomem *)>cp_dpmem[CPM_SPI_BASE_RX];
 
+   if (!(count & 1) && count >= MIN_HWORD_XFER) {
+   spmode_len = SPMODE_LEN(16);
+   if (dout) {
+   int i;
+
+   bufout = malloc(count);
+   for (i = 0; i < count; i += 2)
+   *(u16 *)(bufout + i) = swab16(*(u16 *)(dout + 
i));
+   } else {
+   bufout = NULL;
+   }
+   if (din)
+   bufin = malloc(count);
+   else
+   bufin = NULL;
+   } else {
+   spmode_len = SPMODE_LEN(8);
+   bufout = (void *)dout;
+   bufin = din;
+   }
+
/* Setting tx bd status and data length */
-   out_be32(>cbd_bufaddr, dout ? (ulong)dout : (ulong)dummy_buffer);
+   out_be32(>cbd_bufaddr, bufout ? (ulong)bufout : 
(ulong)dummy_buffer);
out_be16(>cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP);
out_be16(>cbd_datlen, count);
 
/* Setting rx bd status and data length */
-   out_be32(>cbd_bufaddr, din ? (ulong)din : (ulong)dummy_buffer);
+   out_be32(>cbd_bufaddr, bufin ? (ulong)bufin : 
(ulong)dummy_buffer);
out_be16(>cbd_sc, BD_SC_EMPTY | BD_SC_WRAP);
out_be16(>cbd_datlen, 0);  /* rx length has no significance */
 
clrsetbits_be16(>cp_spmode, ~SPMODE_LOOP, SPMODE_REV | SPMODE_MSTR |
-   SPMODE_EN | SPMODE_LEN(8) | SPMODE_PM(0x8));
+   SPMODE_EN | spmode_len | SPMODE_PM(0x8));
out_8(>cp_spim, 0); /* Mask  all SPI events */
out_8(>cp_spie, SPI_EMASK); /* Clear all SPI events */
 
@@ -188,6 +213,19 @@ static int mpc8xx_spi_xfer_one(struct udevice *dev, size_t 
count,
if (tm >= 1000)
return -ETIMEDOUT;
 
+   if (!(count & 1) && count > MIN_HWORD_XFER) {
+   if (dout)
+   free(bufout);
+   if (din) {
+   int i;
+
+   bufout = malloc(count);
+   for (i = 0; i < count; i += 2)
+   *(u16 *)(din + i) = swab16(*(u16 *)(bufin + i));
+   free(bufin);
+   }
+   }
+
return 0;
 }
 
-- 
2.43.0

[PATCH v2 12/17] spi: mpc8xx: Allow transfer of more than MAX_BUFFER len

2024-04-15 Thread Christophe Leroy

Perform multiple transfer of size MAX_BUFFER when the data to be
transferred is longer than MAX_BUFFER.

Signed-off-by: Christophe Leroy 
---
 drivers/spi/mpc8xx_spi.c | 48 
 1 file changed, 34 insertions(+), 14 deletions(-)

diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index 0d142f12e9..a193ac711b 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -143,27 +143,17 @@ static void mpc8xx_spi_cs_deactivate(struct udevice *dev)
dm_gpio_set_value(>gpios[platdata->cs], 0);
 }
 
-static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
-   const void *dout, void *din, unsigned long flags)
+static int mpc8xx_spi_xfer_one(struct udevice *dev, size_t count,
+  const void *dout, void *din)
 {
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
cpm8xx_t __iomem *cp = >im_cpm;
cbd_t __iomem *tbdf, *rbdf;
int tm;
-   size_t count = (bitlen + 7) / 8;
-
-   if (!din && !dout)
-   return -EINVAL;
-   if (count > MAX_BUFFER)
-   return -EINVAL;
 
tbdf = (cbd_t __iomem *)>cp_dpmem[CPM_SPI_BASE_TX];
rbdf = (cbd_t __iomem *)>cp_dpmem[CPM_SPI_BASE_RX];
 
-   /* Set CS for device */
-   if (flags & SPI_XFER_BEGIN)
-   mpc8xx_spi_cs_activate(dev);
-
/* Setting tx bd status and data length */
out_be32(>cbd_bufaddr, dout ? (ulong)dout : (ulong)dummy_buffer);
out_be16(>cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP);
@@ -196,13 +186,43 @@ static int mpc8xx_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
}
 
if (tm >= 1000)
-   printf("*** spi_xfer: Time out while xferring to/from SPI!\n");
+   return -ETIMEDOUT;
+
+   return 0;
+}
 
+static int mpc8xx_spi_xfer(struct udevice *dev, unsigned int bitlen,
+  const void *dout, void *din, unsigned long flags)
+{
+   size_t count = (bitlen + 7) / 8;
+   size_t offset = 0;
+   int ret = 0;
+
+   if (!din && !dout)
+   return -EINVAL;
+
+   /* Set CS for device */
+   if (flags & SPI_XFER_BEGIN)
+   mpc8xx_spi_cs_activate(dev);
+
+   while (count > 0 && !ret) {
+   size_t chunk = min(count, (size_t)MAX_BUFFER);
+   const void *out = dout ? dout + offset : NULL;
+   void *in = din ? din + offset : NULL;
+
+   ret = mpc8xx_spi_xfer_one(dev, chunk, out, in);
+
+   offset += chunk;
+   count -= chunk;
+   }
/* Clear CS for device */
if (flags & SPI_XFER_END)
mpc8xx_spi_cs_deactivate(dev);
 
-   return 0;
+   if (ret)
+   printf("*** spi_xfer: Time out while xferring to/from SPI!\n");
+
+   return ret;
 }
 
 static int mpc8xx_spi_ofdata_to_platdata(struct udevice *dev)
-- 
2.43.0

[PATCH v2 11/17] powerpc: 8xx: Set SDMA configuration register correcly

2024-04-15 Thread Christophe Leroy

SDMA configuration register needs to be set up only once and doesn't
belong to drivers. Also, the value to be used is different on mpc885.

So do the init in cpu_init_f() with 0x40 for mpc885 and 0x1 for others.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/cpu_init.c | 6 ++
 drivers/spi/mpc8xx_spi.c   | 4 
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index aac4203a6e..d1abe8f00b 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -92,6 +92,12 @@ void cpu_init_f(immap_t __iomem *immr)
CONFIG_SYS_PLPRCR);
 #endif
 
+   /* Set SDMA configuration register */
+   if (IS_ENABLED(CONFIG_MPC885))
+   out_be32(>im_siu_conf.sc_sdcr, 0x0040);
+   else
+   out_be32(>im_siu_conf.sc_sdcr, 0x0001);
+
/*
 * Memory Controller:
 */
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index 2aa9c7d5df..0d142f12e9 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -103,10 +103,6 @@ static int mpc8xx_spi_probe(struct udevice *dev)
while (in_be16(>cp_cpcr) & CPM_CR_FLG)
;
 
-/* 5 */
-   /* Set SDMA configuration register */
-   out_be32(>im_siu_conf.sc_sdcr, 0x0001);
-
 /* 6 */
/* Set to big endian. */
out_8(>spi_tfcr, SMC_EB);
-- 
2.43.0

[PATCH v2 10/17] board: cssi: add support for reading temperature

2024-04-15 Thread Christophe Leroy

All CSSI boards have an LM74 chip as temperature sensor.

Enable it.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/dts/cmpc885.dts | 12 +++-
 arch/powerpc/dts/cmpcpro.dts | 12 +++-
 arch/powerpc/dts/mcr3000.dts |  6 ++
 configs/CMPC885_defconfig|  3 +++
 configs/CMPCPRO_defconfig|  3 +++
 configs/MCR3000_defconfig|  3 +++
 6 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/dts/cmpc885.dts b/arch/powerpc/dts/cmpc885.dts
index 9a33e7e77c..454ceb91ca 100644
--- a/arch/powerpc/dts/cmpc885.dts
+++ b/arch/powerpc/dts/cmpc885.dts
@@ -85,12 +85,22 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,mpc8xx-spi";
-   gpios = <_PIO_B 21 1>; /* /EEPROM_CS ACTIVE_LOW */
+   gpios = <_PIO_B 21 1   /* /EEPROM_CS 
ACTIVE_LOW */
+_PIO_B 23 1   /* Temperature mother 
board */
+_PIO_B 14 1>; /* Temperature CPU 
board */
 
eeprom@0 {
reg = <0>;
compatible = "atmel,at25", "cs,eeprom";
};
+   temp@1 {
+   reg = <1>;
+   compatible = "ti,lm74";
+   };
+   temp@2 {
+   reg = <2>;
+   compatible = "ti,lm74";
+   };
};
};
 };
diff --git a/arch/powerpc/dts/cmpcpro.dts b/arch/powerpc/dts/cmpcpro.dts
index 78f8a9f4d3..1dfa864ebb 100644
--- a/arch/powerpc/dts/cmpcpro.dts
+++ b/arch/powerpc/dts/cmpcpro.dts
@@ -140,12 +140,22 @@
compatible = "fsl,mpc832x-spi";
reg = <0x4c0 0x40>;
mode = "cpu";
-   gpios = <_pio_d 3 1>;
+   gpios = <_pio_d 3 1
+_pio_c 5 1  /* TEMP mother board */
+_pio_c 3 1>;/* TEMP CPU board */
clock-frequency = <0>;
eeprom@0 {
reg = <0>;
compatible = "atmel,at25", "cs,eeprom";
};
+   temp@1 {
+   reg = <1>;
+   compatible = "ti,lm74";
+   };
+   temp@2 {
+   reg = <2>;
+   compatible = "ti,lm74";
+   };
};
eth0: ucc@3000 {
device_type = "network";
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts
index edcd8358d0..f678951e22 100644
--- a/arch/powerpc/dts/mcr3000.dts
+++ b/arch/powerpc/dts/mcr3000.dts
@@ -33,6 +33,12 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl,mpc8xx-spi";
+   gpios = < 2 0>;
+
+   temp@0 {
+   reg = <0>;
+   compatible = "ti,lm74";
+   };
};
};
 
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index bbe8d5be7e..11c24f72a8 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -50,6 +50,7 @@ CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_MII_INIT=y
@@ -107,6 +108,8 @@ CONFIG_DM_SERIAL=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_MPC8XX_SPI=y
+CONFIG_DM_THERMAL=y
+CONFIG_TI_LM74_THERMAL=y
 CONFIG_WDT=y
 CONFIG_WDT_MPC8xxx_BME=y
 # CONFIG_REGEX is not set
diff --git a/configs/CMPCPRO_defconfig b/configs/CMPCPRO_defconfig
index cefed63f24..f8f5c9fd86 100644
--- a/configs/CMPCPRO_defconfig
+++ b/configs/CMPCPRO_defconfig
@@ -134,6 +134,7 @@ CONFIG_CMD_ASKENV=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MTD=y
 CONFIG_CMD_NAND=y
+CONFIG_CMD_TEMPERATURE=y
 CONFIG_CMD_DHCP=y
 CONFIG_BOOTP_BOOTFILESIZE=y
 CONFIG_CMD_MII=y
@@ -197,6 +198,8 @@ CONFIG_DM_SPI=y
 CONFIG_MPC8XXX_SPI=y
 CONFIG_SYSRESET=y
 CONFIG_SYSRESET_MPC83XX=y
+CONFIG_DM_THERMAL=y
+CONFIG_TI_LM74_THERMAL=y
 CONFIG_WDT=y
 CONFIG_WDT_MPC8xxx=y
 # CONFIG_REGEX is not set
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index ce34c2aa88..f2eac2c544 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -47,6 +47,7 @@ CONFIG_CMD_

[PATCH v2 09/17] board: cssi: Add support for SPI bus on MCR3000 board

2024-04-15 Thread Christophe Leroy

MCR3000 board has some components tied to the SPI bus, like the Texas
Instruments LM74 temperature sensor.

Add support for SPI bus. The SPI chipselects are a bit special in the
way that they are driven by 3 bits in a register of the board's CPLD
where the value writen in those bits exclusively activates one of the
7 possible chipselects and value 0 sets all chipselets to inactive.

So add a special GPIO driver that simulates GPIOs for those chipselect.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/dts/mcr3000.dts  |  31 +
 board/cssi/mcr3000/Makefile   |   1 +
 board/cssi/mcr3000/mcr3000.c  |   5 ++
 board/cssi/mcr3000/mcr3000_gpio.c | 109 ++
 configs/MCR3000_defconfig |   5 ++
 5 files changed, 151 insertions(+)
 create mode 100644 board/cssi/mcr3000/mcr3000_gpio.c

diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts
index c4d7737bc6..edcd8358d0 100644
--- a/arch/powerpc/dts/mcr3000.dts
+++ b/arch/powerpc/dts/mcr3000.dts
@@ -26,6 +26,37 @@
timeout-sec = <2>;
hw_margin_ms = <1000>;
};
+
+   spi: spi@aa0 {
+   status = "okay";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   cell-index = <0>;
+   compatible = "fsl,mpc8xx-spi";
+   };
+   };
+
+   localbus@ff000100 {
+   compatible = "s3k,mcr3000-localbus", "fsl,pq1-localbus", 
"simple-bus";
+   #address-cells = <2>;
+   #size-cells = <1>;
+   reg = <0xff000100 0x40>;// ORx and BRx register
+
+   ranges = <0 0 0x0400 0x0400 // BOOT
+ 1 0 0x 0x0400 // SDRAM
+ 2 0 0x0800 0x0400 // RAMDP
+ 3 0 0x0C00 0x0400 // NAND
+ 4 0 0x1000 0x0400 // Periphs
+ 5 0 0x1400 0x0400 // FPGA
+ 6 0 0x1800 0x0400 // mezzanine
+ 7 0 0x1c00 0x0400>; // DSP
+
+   csspi: gpio-controller@2 {
+   #gpio-cells = <2>;
+   compatible = "s3k,mcr3000-cpld-csspi";
+   reg = <4 0x802 2>;
+   gpio-controller;
+   };
};
 
SERIAL: smc@0 {
diff --git a/board/cssi/mcr3000/Makefile b/board/cssi/mcr3000/Makefile
index 7803016af3..846fd680e9 100644
--- a/board/cssi/mcr3000/Makefile
+++ b/board/cssi/mcr3000/Makefile
@@ -6,3 +6,4 @@
 
 obj-y += mcr3000.o
 obj-$(CONFIG_CMD_NAND) += nand.o
+obj-$(CONFIG_MPC8XX_SPI) += mcr3000_gpio.o
diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c
index 8857c9e42c..537d7fa124 100644
--- a/board/cssi/mcr3000/mcr3000.c
+++ b/board/cssi/mcr3000/mcr3000.c
@@ -116,6 +116,11 @@ int misc_init_r(void)
clrbits_be16(>iop_pcpar, 0x4);
clrbits_be16(>iop_pcdir, 0x4);
 
+   /* Activate SPI */
+   clrsetbits_be32(>im_cpm.cp_pbpar, 0x1, 0xe);
+   setbits_be32(>im_cpm.cp_pbdir, 0xf);
+   clrbits_be32(>im_cpm.cp_pbdat, 0x1);
+
/* if BTN_ACQ_AL is pressed then bootdelay is changed to 60 second */
if ((in_be16(>iop_pcdat) & 0x0004) == 0)
env_set("bootdelay", "60");
diff --git a/board/cssi/mcr3000/mcr3000_gpio.c 
b/board/cssi/mcr3000/mcr3000_gpio.c
new file mode 100644
index 00..2bba14e6e5
--- /dev/null
+++ b/board/cssi/mcr3000/mcr3000_gpio.c
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2024 CS GROUP France
+ * Christophe Leroy 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "../common/common.h"
+
+struct mcr3000_spi_gpio_plat {
+   ulong addr;
+};
+
+struct mcr3000_spi_gpio_data {
+   void __iomem *base;
+};
+
+static int mcr3000_spi_gpio_set_value(struct udevice *dev, uint gpio, int 
value)
+{
+   struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
+
+   if (value)
+   clrsetbits_be16(data->base, 7 << 5, (gpio & 7) << 5);
+   else
+   clrbits_be16(data->base, 7 << 5);
+
+   return 0;
+}
+
+static int mcr3000_spi_gpio_get_value(struct udevice *dev, uint gpio)
+{
+   struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
+
+   return gpio == ((in_be16(data->base) >> 5) & 7);
+}
+
+static int mcr3000_spi_gpio_direction_input(struct udevice *dev, uint gpio)
+{
+   return 0;
+}
+
+static int mcr3000_spi_gpio_get_function(struct udevice *dev, uint gpio)
+{
+   return GPIOF_OUTPUT;
+}
+
+static int mcr3000_spi_gpio_ofdata_to_platdata(struct ud

[PATCH v2 08/17] thermal: Add support for TI LM74

2024-04-15 Thread Christophe Leroy

LM74 is a SPI temperature sensor.

Implement a driver to read temperature from it.

Signed-off-by: Christophe Leroy 
---
 drivers/thermal/Kconfig   |  6 +
 drivers/thermal/Makefile  |  1 +
 drivers/thermal/ti-lm74.c | 52 +++
 3 files changed, 59 insertions(+)
 create mode 100644 drivers/thermal/ti-lm74.c

diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 681b621760..440eb64a56 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -41,4 +41,10 @@ config TI_DRA7_THERMAL
 Enable thermal support for for the Texas Instruments DRA752 SoC family.
 The driver supports reading CPU temperature.
 
+config TI_LM74_THERMAL
+bool "Temperature sensor driver for TI LM74 chip"
+help
+Enable thermal support for the Texas Instruments LM74 chip.
+The driver supports reading CPU temperature.
+
 endif # if DM_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 8acc7d20cb..b5ab0fc221 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
 obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o
 obj-$(CONFIG_TI_DRA7_THERMAL) += ti-bandgap.o
 obj-$(CONFIG_IMX_TMU) += imx_tmu.o
+obj-$(CONFIG_TI_LM74_THERMAL) += ti-lm74.o
diff --git a/drivers/thermal/ti-lm74.c b/drivers/thermal/ti-lm74.c
new file mode 100644
index 00..7d56f75df0
--- /dev/null
+++ b/drivers/thermal/ti-lm74.c
@@ -0,0 +1,52 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * TI LM74 temperature sensor driver
+ *
+ * Copyright (C) 2024 CS GROUP France
+ *
+ */
+
+#include 
+#include 
+#include 
+
+static int ti_lm74_get_temp(struct udevice *dev, int *temp)
+{
+   char buf[2];
+   s16 raw;
+   int ret;
+
+   ret = dm_spi_claim_bus(dev);
+   if (ret)
+   return ret;
+
+   ret = dm_spi_xfer(dev, 16, NULL, buf, SPI_XFER_BEGIN | SPI_XFER_END);
+
+   dm_spi_release_bus(dev);
+   if (ret)
+   return ret;
+
+   raw = ((buf[0] << 8) + buf[1]) >> 3;
+
+   *temp = (((int)raw * 125) + 1000) / 2000;
+
+   return 0;
+}
+
+static struct dm_thermal_ops ti_lm74_ops = {
+   .get_temp   = ti_lm74_get_temp,
+};
+
+static const struct udevice_id of_ti_lm74_match[] = {
+   {
+   .compatible = "ti,lm74",
+   },
+   {},
+};
+
+U_BOOT_DRIVER(ti_bandgap_thermal) = {
+   .name   = "ti_lm74_thermal",
+   .id = UCLASS_THERMAL,
+   .ops= _lm74_ops,
+   .of_match = of_ti_lm74_match,
+};
-- 
2.43.0

[PATCH v2 07/17] spi: mpc8xx: Fix transfert when input or output buffer is NULL

2024-04-15 Thread Christophe Leroy

xfer ops can be passed a NULL input or output buffer. At the
time being the driver ignores it and overwrites memory at 0.

Define a dummy buffer and use it when either input or output
buffer is NULL. Bail out when both are NULL as it shouldn't.

Also increase MAX_BUFFER len to 32k as the current is pretty
low.

Signed-off-by: Christophe Leroy 
---
 drivers/spi/mpc8xx_spi.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index 5c8d760935..2aa9c7d5df 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -29,7 +29,7 @@
 #define CPM_SPI_BASE_RXCPM_SPI_BASE
 #define CPM_SPI_BASE_TX(CPM_SPI_BASE + sizeof(cbd_t))
 
-#define MAX_BUFFER 0x104
+#define MAX_BUFFER 0x8000 /* Max possible is 0x. We want power of 2 */
 
 struct mpc8xx_priv {
spi_t __iomem *spi;
@@ -37,6 +37,8 @@ struct mpc8xx_priv {
int max_cs;
 };
 
+static char dummy_buffer[MAX_BUFFER];
+
 static int mpc8xx_spi_set_mode(struct udevice *dev, uint mod)
 {
return 0;
@@ -154,6 +156,8 @@ static int mpc8xx_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
int tm;
size_t count = (bitlen + 7) / 8;
 
+   if (!din && !dout)
+   return -EINVAL;
if (count > MAX_BUFFER)
return -EINVAL;
 
@@ -165,12 +169,12 @@ static int mpc8xx_spi_xfer(struct udevice *dev, unsigned 
int bitlen,
mpc8xx_spi_cs_activate(dev);
 
/* Setting tx bd status and data length */
-   out_be32(>cbd_bufaddr, (ulong)dout);
+   out_be32(>cbd_bufaddr, dout ? (ulong)dout : (ulong)dummy_buffer);
out_be16(>cbd_sc, BD_SC_READY | BD_SC_LAST | BD_SC_WRAP);
out_be16(>cbd_datlen, count);
 
/* Setting rx bd status and data length */
-   out_be32(>cbd_bufaddr, (ulong)din);
+   out_be32(>cbd_bufaddr, din ? (ulong)din : (ulong)dummy_buffer);
out_be16(>cbd_sc, BD_SC_EMPTY | BD_SC_WRAP);
out_be16(>cbd_datlen, 0);  /* rx length has no significance */
 
-- 
2.43.0

[PATCH v2 06/17] spi: mpc8xx: Add GPIO dependency

2024-04-15 Thread Christophe Leroy

Since commit 773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via
GPIO and fixups"), DM_GPIO is required for 8xx SPI.

Add the missing dependency to avoid build failures.

Fixes: 773ad4ebb1d6 ("spi, mpc8xx: Add support for chipselect via GPIO and 
fixups")
Signed-off-by: Christophe Leroy 
---
 drivers/spi/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 69b184b0d9..612434633b 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -262,7 +262,7 @@ config MESON_SPIFC_A1
 
 config MPC8XX_SPI
bool "MPC8XX SPI Driver"
-   depends on MPC8xx
+   depends on MPC8xx && DM_GPIO
help
  Enable support for SPI on MPC8XX
 
-- 
2.43.0

[PATCH v2 05/17] board: cssi: Properly initialise MAC address for fibre on CMPC885 board

2024-04-15 Thread Christophe Leroy

From: Hugo Dubois 

CMPC885 board can be pluged on a mother board with fibre interface, so
fibre interface MAC address must be initialised for that case.

Signed-off-by: Hugo Dubois 
Reviewed-by: CASAUBON Jean Michel 
Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index e11cfafaa5..49c13056ed 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -114,8 +114,10 @@ static int setup_mac(void)
if (memcmp(din + EE_OFF_MAC1, , sizeof(ident)) == 0)
eth_env_set_enetaddr("ethaddr", din + EE_OFF_MAC1);
 
-   if (memcmp(din + EE_OFF_MAC2, , sizeof(ident)) == 0)
+   if (memcmp(din + EE_OFF_MAC2, , sizeof(ident)) == 0) {
eth_env_set_enetaddr("eth1addr", din + EE_OFF_MAC2);
+   eth_env_set_enetaddr("eth2addr", din + EE_OFF_MAC2);
+   }
 
return 0;
 }
-- 
2.43.0

[PATCH v2 04/17] board: cssi: Initialise port F on MIAE

2024-04-15 Thread Christophe Leroy

From: Hugo Dubois 

When equipped with the SRSA audio board, MIAE equipment
has an additional port called port F.

Initialise that port just like other ports of the board, so
that it is already configured when starting Linux kernel.

Signed-off-by: Hugo Dubois 
Reviewed-by: CASAUBON Jean Michel 
Signed-off-by: Christophe Leroy 
---
 board/cssi/common/common.c | 36 ++--
 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
index 7ecf772620..6848efd43b 100644
--- a/board/cssi/common/common.c
+++ b/board/cssi/common/common.c
@@ -208,12 +208,44 @@ void misc_init_r_common(void)
}
 }
 
+static void iop_setup_fpgam_common(void)
+{
+   u8 far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+
+   if (far_id == FAR_CASRSA) {
+   /*
+* PFDIR[15]  = 0 [0x01]
+* PFDIR[14]  = 1 [0x02]
+* PFDIR[13]  = 1 [0x04]
+*/
+   clrsetbits_8(ADDR_FPGA_R_BASE + 0x37, 0x01, 0x06);
+   /*
+* PFODR[15]  = 1 [0x01]
+* PFODR[14]  = 0 [0x02]
+* PFODR[13]  = 0 [0x04]
+*/
+   clrsetbits_8(ADDR_FPGA_R_BASE + 0x39, 0x06, 0x01);
+   /*
+* PFDAT[15]  = 0 [0x01]
+* PFDAT[14]  = 1 [0x02]
+* PFDAT[13]  = 1 [0x04]
+* PFDAT[12]  = 1 [0x08]
+*/
+   clrsetbits_8(ADDR_FPGA_R_BASE + 0x3B, 0x01, 0x0E);
+
+   /* Setup TOR_OUT */
+   out_8(ADDR_FPGA_R_BASE + 0x32, 0x2A);
+   }
+}
+
 void iop_setup_common(void)
 {
u8 type = in_8(ADDR_FPGA_R_BASE);
 
-   if (type == TYPE_MCR)
+   if (type == TYPE_MCR) {
iop_setup_mcr();
-   else if (type == TYPE_MIAE)
+   } else if (type == TYPE_MIAE) {
iop_setup_miae();
+   iop_setup_fpgam_common();
+   }
 }
-- 
2.43.0

[PATCH v2 03/17] board: cssi: Allow use without HUSH shell

2024-04-15 Thread Christophe Leroy

From: Jean-Michel CASAUBON 

HUSH shell is not always wanted/desirable.

Add missing braces in environment in order to allow use without
HUSH shell.

Signed-off-by: Jean-Michel CASAUBON 
Cc: DUBOIS Hugo 
Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.env | 4 ++--
 board/cssi/cmpcpro/cmpcpro.env | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.env b/board/cssi/cmpc885/cmpc885.env
index 51ab5ce2cf..570117cd36 100644
--- a/board/cssi/cmpc885/cmpc885.env
+++ b/board/cssi/cmpc885/cmpc885.env
@@ -2,6 +2,6 @@ loadaddr=0x1a0
 filename=cmpc885.itb
 console_args=console=ttyCPM0,115200N8
 loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} 
/boot/${filename};ubifsumount; ubi detach
-flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm $loadaddr#$config
-tftpboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename};bootm $loadaddr#$config
+flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm ${loadaddr}#${config}
+tftpboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename};bootm ${loadaddr}#${config}
 update=echo 'Updating ubi image'; if tftp $loadaddr $ubifile; then nand 
erase.chip; nand write $loadaddr 0x00 $filesize; fi;
diff --git a/board/cssi/cmpcpro/cmpcpro.env b/board/cssi/cmpcpro/cmpcpro.env
index 7394b8386e..47b436ff6b 100644
--- a/board/cssi/cmpcpro/cmpcpro.env
+++ b/board/cssi/cmpcpro/cmpcpro.env
@@ -3,6 +3,6 @@ filename=cmpcpro.itb
 netdev=eth0
 console_args=console=ttyS0,115200N8
 loadkernel=ubi part nand0;ubifsmount ubi0; ubifsload ${loadaddr} 
/boot/${filename}; ubifsumount; ubi detach
-flashboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm $loadaddr#$config
-tftpboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename}; bootm $loadaddr#$config
+flashboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm ${loadaddr}#${config}
+tftpboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename}; bootm ${loadaddr}#${config}
 update=echo 'Updating ubi image'; mw.w 9040 0x000E 1; if tftp $loadaddr 
$ubifile; then nand erase.chip; nand write $loadaddr 0x00 $filesize; fi;
-- 
2.43.0

[PATCH v2 02/17] board: cssi: Fix SPI nodes in DTS

2024-04-15 Thread Christophe Leroy

When adding additional SPI peripherals, the reg property needs to
be added, and this leads to the following error:

  arch/powerpc/dts/cmpc885.dtb: Warning (reg_format): 
/immr@ff00/spi@aa0/temp@1:reg: property has invalid length (4 bytes) 
(#address-cells == 1, #size-cells == 1)
  arch/powerpc/dts/cmpc885.dtb: Warning (reg_format): 
/immr@ff00/spi@aa0/temp@2:reg: property has invalid length (4 bytes) 
(#address-cells == 1, #size-cells == 1)

Fix it by removing cell-index and cell-size which is unused and add
reg property. Also fix node name to be in line with reg value.
Also add missing compatible for eeprom node.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/dts/cmpc885.dts | 6 +++---
 arch/powerpc/dts/cmpcpro.dts | 4 ++--
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/dts/cmpc885.dts b/arch/powerpc/dts/cmpc885.dts
index 7b9566a0fa..9a33e7e77c 100644
--- a/arch/powerpc/dts/cmpc885.dts
+++ b/arch/powerpc/dts/cmpc885.dts
@@ -83,13 +83,13 @@
spi: spi@aa0 {
status = "okay";
#address-cells = <1>;
-   #size-cells = <1>;
-   cell-index = <0>;
+   #size-cells = <0>;
compatible = "fsl,mpc8xx-spi";
gpios = <_PIO_B 21 1>; /* /EEPROM_CS ACTIVE_LOW */
 
eeprom@0 {
-   cell-index = <1>;
+   reg = <0>;
+   compatible = "atmel,at25", "cs,eeprom";
};
};
};
diff --git a/arch/powerpc/dts/cmpcpro.dts b/arch/powerpc/dts/cmpcpro.dts
index c27d9dba33..78f8a9f4d3 100644
--- a/arch/powerpc/dts/cmpcpro.dts
+++ b/arch/powerpc/dts/cmpcpro.dts
@@ -142,9 +142,9 @@
mode = "cpu";
gpios = <_pio_d 3 1>;
clock-frequency = <0>;
-   eeprom@3 {
+   eeprom@0 {
+   reg = <0>;
compatible = "atmel,at25", "cs,eeprom";
-   cell-index = <1>;
};
};
eth0: ucc@3000 {
-- 
2.43.0

[PATCH v2 01/17] board: cssi: Fix MCR3000 board environment

2024-04-15 Thread Christophe Leroy

From: Jean-Michel CASAUBON 

Remove a stray semicolon in MCR3000 board environment.

Signed-off-by: Jean-Michel CASAUBON 
Reviewed-by: DUBOIS Hugo 
Signed-off-by: Christophe Leroy 
---
 board/cssi/mcr3000/mcr3000.env | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/cssi/mcr3000/mcr3000.env b/board/cssi/mcr3000/mcr3000.env
index 372ab09094..380c10c4ce 100644
--- a/board/cssi/mcr3000/mcr3000.env
+++ b/board/cssi/mcr3000/mcr3000.env
@@ -8,7 +8,7 @@ dhcp_ip=ip=:eth0:dhcp
 console_args=console=ttyCPM0,115200N8
 loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} 
/boot/${filename};ubifsumount; ubi detach
 bootcmd=run flashboot
-flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off;${ofl_args}; 
run loadkernel; bootm ${loadaddr}
+flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; 
run loadkernel; bootm ${loadaddr}
 tftpboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; 
tftp ${loadaddr} ${filename}; bootm ${loadaddr}
 dhcpboot=dhcp ${loadaddr} ${filename};setenv bootargs ${console_args} 
${dhcp_ip} ${ofl_args}; bootm ${loadaddr}
 update=echo 'Updating ubi image'; if tftp 0x2000 $ubifile; then nand 
erase.chip; nand write 0x2000 0x00 $filesize; fi
-- 
2.43.0

[PATCH v2 00/17] Misc changes for CSSI boards

2024-04-15 Thread Christophe Leroy

This series contains misc fixes and changes for CSSI boards.

Main changes are:
- Fix and optimise mpc8xx SPI driver
- Add support for LM74 temperature sensor
- Add support for loading FPGA on MCR3000

I will send a pull request later before close of the merge window.

Changes since v1:
- Added temperature and FPGA support and SPI driver optimisation

Christophe Leroy (13):
  board: cssi: Fix SPI nodes in DTS
  spi: mpc8xx: Add GPIO dependency
  spi: mpc8xx: Fix transfert when input or output buffer is NULL
  thermal: Add support for TI LM74
  board: cssi: Add support for SPI bus on MCR3000 board
  board: cssi: add support for reading temperature
  powerpc: 8xx: Set SDMA configuration register correcly
  spi: mpc8xx: Allow transfer of more than MAX_BUFFER len
  spi: mpc8xx: Use 16 bit mode for large transfers with even size
  spi: mpc8xx: Set up speed as requested
  board: cssi: Use HAVE_VENDOR_COMMON_LIB logic
  board: cssi: Load FPGA on MCR3000 board
  board: cssi: Read and display MCR board address

Hugo Dubois (2):
  board: cssi: Initialise port F on MIAE
  board: cssi: Properly initialise MAC address for fibre on CMPC885
board

Jean-Michel CASAUBON (2):
  board: cssi: Fix MCR3000 board environment
  board: cssi: Allow use without HUSH shell

 arch/powerpc/cpu/mpc8xx/cpu_init.c |   6 ++
 arch/powerpc/dts/cmpc885.dts   |  18 -
 arch/powerpc/dts/cmpcpro.dts   |  16 +++-
 arch/powerpc/dts/mcr3000.dts   |  41 +++
 board/cssi/cmpc885/Makefile|   2 +-
 board/cssi/cmpc885/cmpc885.c   |   4 +-
 board/cssi/cmpc885/cmpc885.env |   4 +-
 board/cssi/cmpcpro/Makefile|   2 +-
 board/cssi/cmpcpro/cmpcpro.env |   4 +-
 board/cssi/common/Makefile |   8 ++
 board/cssi/common/common.c |  42 ++-
 board/cssi/mcr3000/Makefile|   1 +
 board/cssi/mcr3000/fpga_code.h |  10 +++
 board/cssi/mcr3000/mcr3000.c   |  58 +++
 board/cssi/mcr3000/mcr3000.env |   2 +-
 board/cssi/mcr3000/mcr3000_gpio.c  | 109 
 configs/CMPC885_defconfig  |   3 +
 configs/CMPCPRO_defconfig  |   3 +
 configs/MCR3000_defconfig  |   8 ++
 drivers/spi/Kconfig|   2 +-
 drivers/spi/mpc8xx_spi.c   | 113 -
 drivers/thermal/Kconfig|   6 ++
 drivers/thermal/Makefile   |   1 +
 drivers/thermal/ti-lm74.c  |  52 +
 24 files changed, 476 insertions(+), 39 deletions(-)
 create mode 100644 board/cssi/common/Makefile
 create mode 100644 board/cssi/mcr3000/fpga_code.h
 create mode 100644 board/cssi/mcr3000/mcr3000_gpio.c
 create mode 100644 drivers/thermal/ti-lm74.c

-- 
2.43.0

[PATCH 4/4] board: cssi: Properly initialise MAC address for fibre on CMPC885 board

2024-04-05 Thread Christophe Leroy

From: Hugo Dubois 

CMPC885 board can be pluged on a mother board with fibre interface, so
fibre interface MAC address must be initialised for that case.

Signed-off-by: Hugo Dubois 
Reviewed-by: CASAUBON Jean Michel 
Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index e11cfafaa5..49c13056ed 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -114,8 +114,10 @@ static int setup_mac(void)
if (memcmp(din + EE_OFF_MAC1, , sizeof(ident)) == 0)
eth_env_set_enetaddr("ethaddr", din + EE_OFF_MAC1);
 
-   if (memcmp(din + EE_OFF_MAC2, , sizeof(ident)) == 0)
+   if (memcmp(din + EE_OFF_MAC2, , sizeof(ident)) == 0) {
eth_env_set_enetaddr("eth1addr", din + EE_OFF_MAC2);
+   eth_env_set_enetaddr("eth2addr", din + EE_OFF_MAC2);
+   }
 
return 0;
 }
-- 
2.43.0

[PATCH 3/4] board: cssi: Initialise port F on MIAE

2024-04-05 Thread Christophe Leroy

From: Hugo Dubois 

When equiped with the SRSA audio board, MIAE equipment
has an additional port called port F.

Initialise that port just like other ports of the board, so
that it is already configured when starting Linux kernel.

Signed-off-by: Hugo Dubois 
Reviewed-by: CASAUBON Jean Michel 
Signed-off-by: Christophe Leroy 
---
 board/cssi/common/common.c | 36 ++--
 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
index 7ecf772620..54e8c3cd03 100644
--- a/board/cssi/common/common.c
+++ b/board/cssi/common/common.c
@@ -208,12 +208,44 @@ void misc_init_r_common(void)
}
 }
 
+static void iop_setup_fpgam_common(void)
+{
+   u8 far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
+
+   if(far_id == FAR_CASRSA) {
+   /*
+* PFDIR[15]  = 0 [0x01]
+* PFDIR[14]  = 1 [0x02]
+* PFDIR[13]  = 1 [0x04]
+*/
+   clrsetbits_8(ADDR_FPGA_R_BASE + 0x37, 0x01, 0x06);
+   /*
+* PFODR[15]  = 1 [0x01]
+* PFODR[14]  = 0 [0x02]
+* PFODR[13]  = 0 [0x04]
+*/
+   clrsetbits_8(ADDR_FPGA_R_BASE + 0x39, 0x06, 0x01);
+   /*
+* PFDAT[15]  = 0 [0x01]
+* PFDAT[14]  = 1 [0x02]
+* PFDAT[13]  = 1 [0x04]
+* PFDAT[12]  = 1 [0x08]
+*/
+   clrsetbits_8(ADDR_FPGA_R_BASE + 0x3B, 0x01, 0x0E);
+
+   /* Setup TOR_OUT */
+   out_8(ADDR_FPGA_R_BASE + 0x32, 0x2A);
+   }
+}
+
 void iop_setup_common(void)
 {
u8 type = in_8(ADDR_FPGA_R_BASE);
 
-   if (type == TYPE_MCR)
+   if (type == TYPE_MCR) {
iop_setup_mcr();
-   else if (type == TYPE_MIAE)
+   } else if (type == TYPE_MIAE) {
iop_setup_miae();
+   iop_setup_fpgam_common();
+   }
 }
-- 
2.43.0

[PATCH 2/4] board: cssi: Allow use without HUSH shell

2024-04-05 Thread Christophe Leroy

From: Jean-Michel CASAUBON 

HUSH shell is not always wanted/desirable.

Add missing braces in environment in order to allow use without
HUSH shell.

Signed-off-by: Jean-Michel CASAUBON 
Cc: DUBOIS Hugo 
Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.env | 4 ++--
 board/cssi/cmpcpro/cmpcpro.env | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.env b/board/cssi/cmpc885/cmpc885.env
index 51ab5ce2cf..570117cd36 100644
--- a/board/cssi/cmpc885/cmpc885.env
+++ b/board/cssi/cmpc885/cmpc885.env
@@ -2,6 +2,6 @@ loadaddr=0x1a0
 filename=cmpc885.itb
 console_args=console=ttyCPM0,115200N8
 loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} 
/boot/${filename};ubifsumount; ubi detach
-flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm $loadaddr#$config
-tftpboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename};bootm $loadaddr#$config
+flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm ${loadaddr}#${config}
+tftpboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename};bootm ${loadaddr}#${config}
 update=echo 'Updating ubi image'; if tftp $loadaddr $ubifile; then nand 
erase.chip; nand write $loadaddr 0x00 $filesize; fi;
diff --git a/board/cssi/cmpcpro/cmpcpro.env b/board/cssi/cmpcpro/cmpcpro.env
index 7394b8386e..47b436ff6b 100644
--- a/board/cssi/cmpcpro/cmpcpro.env
+++ b/board/cssi/cmpcpro/cmpcpro.env
@@ -3,6 +3,6 @@ filename=cmpcpro.itb
 netdev=eth0
 console_args=console=ttyS0,115200N8
 loadkernel=ubi part nand0;ubifsmount ubi0; ubifsload ${loadaddr} 
/boot/${filename}; ubifsumount; ubi detach
-flashboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm $loadaddr#$config
-tftpboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename}; bootm $loadaddr#$config
+flashboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; run loadkernel; bootm ${loadaddr}#${config}
+tftpboot=mw.w 9040 0x000E 1; setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:eth0:off 
${ofl_args}; tftp ${loadaddr} ${filename}; bootm ${loadaddr}#${config}
 update=echo 'Updating ubi image'; mw.w 9040 0x000E 1; if tftp $loadaddr 
$ubifile; then nand erase.chip; nand write $loadaddr 0x00 $filesize; fi;
-- 
2.43.0

[PATCH 1/4] board: cssi: Fix MCR3000 board environment

2024-04-05 Thread Christophe Leroy

From: Jean-Michel CASAUBON 

Remove a stray semicolon in MCR3000 board environment.

Signed-off-by: Jean-Michel CASAUBON 
Reviewed-by: DUBOIS Hugo 
Signed-off-by: Christophe Leroy 
---
 board/cssi/mcr3000/mcr3000.env | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/cssi/mcr3000/mcr3000.env b/board/cssi/mcr3000/mcr3000.env
index 372ab09094..380c10c4ce 100644
--- a/board/cssi/mcr3000/mcr3000.env
+++ b/board/cssi/mcr3000/mcr3000.env
@@ -8,7 +8,7 @@ dhcp_ip=ip=:eth0:dhcp
 console_args=console=ttyCPM0,115200N8
 loadkernel=ubi part nand0;ubifsmount ubi0;ubifsload ${loadaddr} 
/boot/${filename};ubifsumount; ubi detach
 bootcmd=run flashboot
-flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off;${ofl_args}; 
run loadkernel; bootm ${loadaddr}
+flashboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; 
run loadkernel; bootm ${loadaddr}
 tftpboot=setenv bootargs ${console_args} 
ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:mcr3k:eth0:off ${ofl_args}; 
tftp ${loadaddr} ${filename}; bootm ${loadaddr}
 dhcpboot=dhcp ${loadaddr} ${filename};setenv bootargs ${console_args} 
${dhcp_ip} ${ofl_args}; bootm ${loadaddr}
 update=echo 'Updating ubi image'; if tftp 0x2000 $ubifile; then nand 
erase.chip; nand write 0x2000 0x00 $filesize; fi
-- 
2.43.0

[PATCH 0/4] Misc changes for CSSI boards

2024-04-05 Thread Christophe Leroy

This series contains misc fixes and changes for CSSI boards.

I will send a pull request later before close of the merge window.

Hugo Dubois (2):
  board: cssi: Initialise port F on MIAE
  board: cssi: Properly initialise MAC address for fibre on CMPC885
board

Jean-Michel CASAUBON (2):
  board: cssi: Fix MCR3000 board environment
  board: cssi: Allow use without HUSH shell

 board/cssi/cmpc885/cmpc885.c   |  4 +++-
 board/cssi/cmpc885/cmpc885.env |  4 ++--
 board/cssi/cmpcpro/cmpcpro.env |  4 ++--
 board/cssi/common/common.c | 36 --
 board/cssi/mcr3000/mcr3000.env |  2 +-
 5 files changed, 42 insertions(+), 8 deletions(-)

-- 
2.43.0

[PATCH] Fix stack-protector for powerpc

2023-11-15 Thread Christophe Leroy

On powerpc, stack protector expects a function called
__stack_chk_fail_local() instead of __stack_chk_fail()

And some versions of GCC for powerpc default to TLS canary
instead of global canary, so always force GCC to use global
canary with -mstack-protector-guard=global

Cc: Joel Peshkin 
Fixes: 4e9bce12432 ("Add support for stack-protector")
Signed-off-by: Christophe Leroy 
---
 Makefile   | 1 +
 common/stackprot.c | 5 +
 2 files changed, 6 insertions(+)

diff --git a/Makefile b/Makefile
index ac65605a26..bddccc94e6 100644
--- a/Makefile
+++ b/Makefile
@@ -741,6 +741,7 @@ endif
 
 ifeq ($(CONFIG_STACKPROTECTOR),y)
 KBUILD_CFLAGS += $(call cc-option,-fstack-protector-strong)
+KBUILD_CFLAGS += $(call cc-option,-mstack-protector-guard=global)
 CFLAGS_EFI += $(call cc-option,-fno-stack-protector)
 else
 KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
diff --git a/common/stackprot.c b/common/stackprot.c
index d5b7061665..6495951a77 100644
--- a/common/stackprot.c
+++ b/common/stackprot.c
@@ -18,3 +18,8 @@ void __stack_chk_fail(void)
panic("Stack smashing detected in function:\n%p relocated from %p",
  ra, ra - gd->reloc_off);
 }
+
+void __stack_chk_fail_local(void)
+{
+   __stack_chk_fail();
+}
-- 
2.41.0

[PATCH] powerpc: mpc8xx: Remove usage of common.h

2023-11-06 Thread Christophe Leroy

Remove inclusion of common.h and add relevant
includes when necessary.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/cache.c  | 1 -
 arch/powerpc/cpu/mpc8xx/cpu.c| 1 -
 arch/powerpc/cpu/mpc8xx/cpu_init.c   | 1 -
 arch/powerpc/cpu/mpc8xx/fdt.c| 1 -
 arch/powerpc/cpu/mpc8xx/immap.c  | 2 +-
 arch/powerpc/cpu/mpc8xx/interrupts.c | 2 +-
 arch/powerpc/cpu/mpc8xx/speed.c  | 2 +-
 arch/powerpc/cpu/mpc8xx/traps.c  | 2 +-
 8 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/cache.c b/arch/powerpc/cpu/mpc8xx/cache.c
index 41559009ca..525c87f37c 100644
--- a/arch/powerpc/cpu/mpc8xx/cache.c
+++ b/arch/powerpc/cpu/mpc8xx/cache.c
@@ -4,7 +4,6 @@
  * Christophe Leroy, CS Systemes d'Information, christophe.le...@c-s.fr
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 56383cecde..b9afd312ec 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -16,7 +16,6 @@
  * Wolfgang Denk 
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index feef792ee7..aac4203a6e 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -4,7 +4,6 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
 #include 
 #include 
 
diff --git a/arch/powerpc/cpu/mpc8xx/fdt.c b/arch/powerpc/cpu/mpc8xx/fdt.c
index b4a26efe30..b204a3d751 100644
--- a/arch/powerpc/cpu/mpc8xx/fdt.c
+++ b/arch/powerpc/cpu/mpc8xx/fdt.c
@@ -5,7 +5,6 @@
  * Code copied & edited from Freescale mpc85xx stuff.
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/arch/powerpc/cpu/mpc8xx/immap.c b/arch/powerpc/cpu/mpc8xx/immap.c
index 40793c26e1..8c85fc180b 100644
--- a/arch/powerpc/cpu/mpc8xx/immap.c
+++ b/arch/powerpc/cpu/mpc8xx/immap.c
@@ -8,7 +8,6 @@
  * MPC8xx Internal Memory Map Functions
  */
 
-#include 
 #include 
 #include 
 
@@ -16,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/powerpc/cpu/mpc8xx/interrupts.c 
b/arch/powerpc/cpu/mpc8xx/interrupts.c
index eef1951f2f..babef07ffb 100644
--- a/arch/powerpc/cpu/mpc8xx/interrupts.c
+++ b/arch/powerpc/cpu/mpc8xx/interrupts.c
@@ -4,7 +4,7 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
+#include 
 #include 
 #include 
 #include 
diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index 1a882a3882..baf81381b3 100644
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -4,12 +4,12 @@
  * Wolfgang Denk, DENX Software Engineering, w...@denx.de.
  */
 
-#include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/powerpc/cpu/mpc8xx/traps.c b/arch/powerpc/cpu/mpc8xx/traps.c
index 56794b08a1..5220c560e5 100644
--- a/arch/powerpc/cpu/mpc8xx/traps.c
+++ b/arch/powerpc/cpu/mpc8xx/traps.c
@@ -15,7 +15,7 @@
  * This file handles the architecture-dependent parts of hardware exceptions
  */
 
-#include 
+#include 
 #include 
 #include 
 #include 
-- 
2.41.0

[PATCH] board: cssi: Remove usage of common.h

2023-11-06 Thread Christophe Leroy

Remove inclusion of common.h and add relevant
includes when necessary.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 1 -
 board/cssi/cmpc885/nand.c| 1 -
 board/cssi/cmpc885/sdram.c   | 3 ++-
 board/cssi/cmpcpro/cmpcpro.c | 1 -
 board/cssi/mcr3000/mcr3000.c | 1 -
 board/cssi/mcr3000/nand.c| 1 -
 6 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 5e6aa8b8cf..e11cfafaa5 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -9,7 +9,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/cssi/cmpc885/nand.c b/board/cssi/cmpc885/nand.c
index 38100046df..b8989f226b 100644
--- a/board/cssi/cmpc885/nand.c
+++ b/board/cssi/cmpc885/nand.c
@@ -7,7 +7,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/cssi/cmpc885/sdram.c b/board/cssi/cmpc885/sdram.c
index 7349b85ed2..11a50c3a52 100644
--- a/board/cssi/cmpc885/sdram.c
+++ b/board/cssi/cmpc885/sdram.c
@@ -4,13 +4,14 @@
  * Charles Frey 
  */
 
-#include 
 #include 
 #include 
 #include 
 #include 
 #include 
 #include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/board/cssi/cmpcpro/cmpcpro.c b/board/cssi/cmpcpro/cmpcpro.c
index 8a30c48e35..ef30412456 100644
--- a/board/cssi/cmpcpro/cmpcpro.c
+++ b/board/cssi/cmpcpro/cmpcpro.c
@@ -4,7 +4,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c
index 3514f67490..8857c9e42c 100644
--- a/board/cssi/mcr3000/mcr3000.c
+++ b/board/cssi/mcr3000/mcr3000.c
@@ -7,7 +7,6 @@
  * Board specific routines for the MCR3000 board
  */
 
-#include 
 #include 
 #include 
 #include 
diff --git a/board/cssi/mcr3000/nand.c b/board/cssi/mcr3000/nand.c
index 11aca4ff73..5b01d30fef 100644
--- a/board/cssi/mcr3000/nand.c
+++ b/board/cssi/mcr3000/nand.c
@@ -6,7 +6,6 @@
  */
 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.41.0

Re: [PATCH v4 05/44] spl: mx6: powerpc: Drop the condition on timer_init()

2023-09-26 Thread Christophe Leroy



Le 26/09/2023 à 16:14, Simon Glass a écrit :
> It doesn't make sense to have some boards do this differently. Drop the
> condition in the hope that the maintainers can figure out any run-time
> problems.
> 
> This has been tested on qemu-ppce500
> 

This was added by commit ea8256f072 ("SPL: Port SPL framework to 
powerpc"), and the commit log explains why.

Then commit 70e2aaf380 ("board_f: powerpc: Use timer_init() instead of 
init_timebase()") brought timer_init() to powerpc.

All timer_init() does is to reset the timebase register to 0 instead of 
leaving a potentially random value. That should just be fine.

Therefore this change should be ok for powerpc.

Acked-by: Christophe Leroy 


> 
> Signed-off-by: Simon Glass 
> ---
> 
> (no changes since v3)
> 
> Changes in v3:
> - Mention testing on qemu-ppce500
> 
> Changes in v2:
> - Explicitly copy two maintainers as it seems only Mario was auto-cc'd
> 
>   common/spl/spl.c | 6 --
>   1 file changed, 6 deletions(-)
> 
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index 5cc86288145b..4233390d7de2 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -762,13 +762,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
>   if (spl_init())
>   hang();
>   }
> -#if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
> - /*
> -  * timer_init() does not exist on PPC systems. The timer is initialized
> -  * and enabled (decrementer) in interrupt_init() here.
> -  */
>   timer_init();
> -#endif
>   if (CONFIG_IS_ENABLED(BLOBLIST)) {
>   ret = bloblist_init();
>   if (ret) {

Re: [PATCH 05/32] spl: mx6: powerpc: Drop the condition on timer_init()

2023-09-26 Thread Christophe Leroy



Le 26/09/2023 à 13:37, Simon Glass a écrit :
> Hi,
> 
> On Wed, 20 Sept 2023 at 19:03, Simon Glass  wrote:
>>
>> Hi Tom,
>>
>> On Thu, 31 Aug 2023 at 11:51, Tom Rini  wrote:
>>>
>>> On Wed, Aug 30, 2023 at 12:04:36PM -0600, Simon Glass wrote:
>>>
>>>> It doesn't make sense to have some boards do this differently. Drop the
>>>> condition in the hope that the maintainers can figure out any run-time
>>>> problems.
>>>>
>>>> Signed-off-by: Simon Glass 
>>>> ---
>>>>
>>>>   common/spl/spl.c | 6 --
>>>>   1 file changed, 6 deletions(-)
>>>>
>>>> diff --git a/common/spl/spl.c b/common/spl/spl.c
>>>> index 78db9ef5318..3f513b0563a 100644
>>>> --- a/common/spl/spl.c
>>>> +++ b/common/spl/spl.c
>>>> @@ -766,13 +766,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
>>>>if (spl_init())
>>>>hang();
>>>>}
>>>> -#if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
>>>> - /*
>>>> -  * timer_init() does not exist on PPC systems. The timer is 
>>>> initialized
>>>> -  * and enabled (decrementer) in interrupt_init() here.
>>>> -  */
>>>>timer_init();
>>>> -#endif
>>>
>>> PowerPC might be a little tricky, did qemu-ppce500 run?  And please
>>> reach out to some of the iMX folks instead of just dropping this and
>>> hoping it works.
>>
>> Yes, CI passes.
>>
>> +Christophe Leroy
>> +Marek Behún
>>
>> PowerPC people, does this look OK?
> 
> Are there any active maintainers for PowerPC?
> 
> Apart from this patch, is there any word on the DM_SERIAL migration?
> 

The three powerpc boards I maintain (ref. boards/cssi/MAINTAINERS) all 
select DM_SERIAL:

configs/CMPC885_defconfig:CONFIG_DM_SERIAL=y
configs/CMPCPRO_defconfig:CONFIG_DM_SERIAL=y
configs/MCR3000_defconfig:CONFIG_DM_SERIAL=y

Christophe

Re: [PATCH v3 04/38] spl: mx6: powerpc: Drop the condition on timer_init()

2023-09-26 Thread Christophe Leroy



Le 24/09/2023 à 21:24, Simon Glass a écrit :
> It doesn't make sense to have some boards do this differently. Drop the
> condition in the hope that the maintainers can figure out any run-time
> problems.

This was added by commit ea8256f072 ("SPL: Port SPL framework to 
powerpc"), and the commit log explains why.

Then commit 70e2aaf380 ("board_f: powerpc: Use timer_init() instead of 
init_timebase()") brought timer_init() to powerpc.

All timer_init() does it reset the timebase register to 0 instead of 
leaving a potentially random value. That should just be fine.

Therefore this change should be ok for powerpc.

Acked-by: Christophe Leroy 

> 
> This has been tested on qemu-ppce500
> 
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v3:
> - Mention testing on qemu-ppce500
> 
> Changes in v2:
> - Explicitly copy two maintainers as it seems only Mario was auto-cc'd
> 
>   common/spl/spl.c | 6 --
>   1 file changed, 6 deletions(-)
> 
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index 5cc86288145b..4233390d7de2 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -762,13 +762,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
>   if (spl_init())
>   hang();
>   }
> -#if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
> - /*
> -  * timer_init() does not exist on PPC systems. The timer is initialized
> -  * and enabled (decrementer) in interrupt_init() here.
> -  */
>   timer_init();
> -#endif
>   if (CONFIG_IS_ENABLED(BLOBLIST)) {
>   ret = bloblist_init();
>   if (ret) {

Re: [PATCH] lzma: Fix decompression speed regression

2023-07-07 Thread Christophe Leroy



Le 07/07/2023 à 11:09, Stefan Roese a écrit :
> [Vous ne recevez pas souvent de courriers de s...@denx.de. Découvrez 
> pourquoi ceci est important à 
> https://aka.ms/LearnAboutSenderIdentification ]
> 
> Hi Simon,
> Hi Christophe,
> 
> On 7/6/23 17:57, Simon Glass wrote:
>> On Wed, 5 Jul 2023 at 09:54, Christophe Leroy
>>  wrote:
>>>
>>> Uncompressing a 1.7Mbytes FIT image on U-boot 2023.04 takes
>>> approx 7s on a powerpc 8xx.
>>> The same on U-boot 2023.07-rc6 takes approx 28s unless watchdog
>>> is disabled.
>>>
>>> During that decompression, LzmaDec_DecodeReal() calls schedule
>>> 1.6 million times, that is every 4µs in average.
>>>
>>> In the past it used to be a call to WATCHDOG_RESET() which was
>>> just calling hw_watchdog_reset().
>>>
>>> But the combination of commit 29caf9305b6 ("cyclic: Use schedule()
>>> instead of WATCHDOG_RESET()") and commit 26e8ebcd7cb ("watchdog:
>>> mpc8xxx: Make it generic") results in an heavier processing.
>>>
>>> However, there is absolutely no point in calling schedule() that
>>> often.
>>>
>>> By moving and keeping only one call to schedule() in the main
>>> loop the number of calls is reduced to 1.2 million which is still
>>> too much. So add logic to only call schedule every 1024 times.
>>> That leads to a call to schedule approx every 6ms which is still
>>> far enough to entertain the watchdog which has a 1s timeout on
>>> powerpc 8xx.
>>>
>>> powerpc 8xx being one of the slowest targets we have today in
>>> U-boot, and most other watchdogs having a timeout of one minutes
>>> instead of one second like the 8xx, this fix should not have
>>> negative impact on other targets.
>>>
>>> Fixes: 29caf9305b6 ("cyclic: Use schedule() instead of 
>>> WATCHDOG_RESET()")
>>> Signed-off-by: Christophe Leroy 
>>> ---
>>>   lib/lzma/LzmaDec.c | 18 --
>>>   1 file changed, 4 insertions(+), 14 deletions(-)
>>
>> Reviewed-by: Simon Glass 
>>
>> +Stefan Roese I wonder if we need a more general fix?
> 
> IIRC, we already have some code in the watchdog IF making sure, that the
> WDT reset is not called too often. I need to re-check here. And yes, we
> should probably either move this code to the common schedule() function
> or add it here. Best by adding a new Kconfig option, configuring the max
> schedule frequency, e.g. 1000 Hz.

Yes we may add a ratelimitation inside schedule() but if we only do that 
it will only be a plaster. It will still use a huge amount of CPU just 
for reading the time and checking the limit.

A caller shouldn't call schedule() million of times per second, I think 
the root cause need to be fixed anyway. LZMA has this problem, ZLIB has 
not. I didn't check other decompressors.

The best would be that schedule() throw a WARN_ONCE() when that happens 
so that we can identify frantic callers.

Christophe

[PATCH] powerpc: Fix flush_cache() speed regression

2023-07-05 Thread Christophe Leroy

Flushing kernel image after decompression was taking 113 milliseconds
with U-boot 2022.10. With U-boot 2023.01 and 2023.04, flushing
the same amount of memory takes approx 1.5 seconds. With
U-boot 2023.07-rc6, it takes 6.5 seconds.

powerpc flush_cache() function used to call WATCHDOG_RESET() after
flushing every cacheline. At that time WATCHDOG_RESET() was light
so the operation was almost seamless.

But commit 29caf9305b6 ("cyclic: Use schedule() instead of
WATCHDOG_RESET()") replaced WATCHDOG_RESET() by schedule() and that
started to hurt with U-boot 2022.10.

And in U-boot 2023.07-rc6 that's even worse after
commit 26e8ebcd7cb ("watchdog: mpc8xxx: Make it generic").

In the meantime commit 729c1fe656 ("powerpc: introduce
CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD") gives us the opportinity to
only call schedule() every given chunk of data instead of every
cacheline. As explained in that commit there is no point in pinging
the watchdog after every cacheline flush, so lets define a sensible
default chunk size of 4k which matches to size of a page on most
powerpc platforms.

With that new default threshold, the culprit flushing performed after
kernel image decompression now takes 85 milliseconds on a powerpc 8xx.

Fixes: 29caf9305b6 ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/lib/Kconfig | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/lib/Kconfig b/arch/powerpc/lib/Kconfig
index b30b5edf7c..d38ba45a99 100644
--- a/arch/powerpc/lib/Kconfig
+++ b/arch/powerpc/lib/Kconfig
@@ -1,9 +1,9 @@
 config CACHE_FLUSH_WATCHDOG_THRESHOLD
-   int "Bytes to flush between WATCHDOG_RESET calls"
-   default 0
+   int "Bytes to flush between schedule() calls"
+   default 4096
help
  The flush_cache() function periodically, and by default for
- every cache line, calls WATCHDOG_RESET(). When flushing a
- large area, that may add a significant amount of
+ every 4k block, calls schedule() to reset watchdog. When
+ flushing a large area, that may add a significant amount of
  overhead. This option allows you to set a threshold for how
- many bytes to flush between each WATCHDOG_RESET call.
+ many bytes to flush between each schedule() call.
-- 
2.41.0

[PATCH] lzma: Fix decompression speed regression

2023-07-05 Thread Christophe Leroy

Uncompressing a 1.7Mbytes FIT image on U-boot 2023.04 takes
approx 7s on a powerpc 8xx.
The same on U-boot 2023.07-rc6 takes approx 28s unless watchdog
is disabled.

During that decompression, LzmaDec_DecodeReal() calls schedule
1.6 million times, that is every 4µs in average.

In the past it used to be a call to WATCHDOG_RESET() which was
just calling hw_watchdog_reset().

But the combination of commit 29caf9305b6 ("cyclic: Use schedule()
instead of WATCHDOG_RESET()") and commit 26e8ebcd7cb ("watchdog:
mpc8xxx: Make it generic") results in an heavier processing.

However, there is absolutely no point in calling schedule() that
often.

By moving and keeping only one call to schedule() in the main
loop the number of calls is reduced to 1.2 million which is still
too much. So add logic to only call schedule every 1024 times.
That leads to a call to schedule approx every 6ms which is still
far enough to entertain the watchdog which has a 1s timeout on
powerpc 8xx.

powerpc 8xx being one of the slowest targets we have today in
U-boot, and most other watchdogs having a timeout of one minutes
instead of one second like the 8xx, this fix should not have
negative impact on other targets.

Fixes: 29caf9305b6 ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
Signed-off-by: Christophe Leroy 
---
 lib/lzma/LzmaDec.c | 18 --
 1 file changed, 4 insertions(+), 14 deletions(-)

diff --git a/lib/lzma/LzmaDec.c b/lib/lzma/LzmaDec.c
index 341149f766..a90b35c6a9 100644
--- a/lib/lzma/LzmaDec.c
+++ b/lib/lzma/LzmaDec.c
@@ -152,8 +152,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
   const Byte *buf = p->buf;
   UInt32 range = p->range;
   UInt32 code = p->code;
-
-  schedule();
+  unsigned int loop = 0;
 
   do
   {
@@ -162,6 +161,9 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
 unsigned ttt;
 unsigned posState = processedPos & pbMask;
 
+if (!(loop++ & 1023))
+   schedule();
+
 prob = probs + IsMatch + (state << kNumPosBitsMax) + posState;
 IF_BIT_0(prob)
 {
@@ -177,8 +179,6 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
 state -= (state < 4) ? state : 3;
 symbol = 1;
 
-schedule();
-
 do { GET_BIT(prob + symbol, symbol) } while (symbol < 0x100);
   }
   else
@@ -188,8 +188,6 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
 state -= (state < 10) ? 3 : 6;
 symbol = 1;
 
-schedule();
-
 do
 {
   unsigned bit;
@@ -321,8 +319,6 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
   UInt32 mask = 1;
   unsigned i = 1;
 
-  schedule();
-
   do
   {
 GET_BIT2(prob + i, i, ; , distance |= mask);
@@ -335,8 +331,6 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
   {
 numDirectBits -= kNumAlignBits;
 
-schedule();
-
 do
 {
   NORMALIZE
@@ -409,8 +403,6 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
   const Byte *lim = dest + curLen;
   dicPos += curLen;
 
-  schedule();
-
   do
 *(dest) = (Byte)*(dest + src);
   while (++dest != lim);
@@ -418,8 +410,6 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, 
SizeT limit, const Byte
 else
 {
 
-  schedule();
-
   do
   {
 dic[dicPos++] = dic[pos];
-- 
2.41.0

Re: [PATCH] Fix sparse checks processing

2023-05-16 Thread Christophe Leroy



Le 15/05/2023 à 23:12, Tom Rini a écrit :
> On Fri, May 05, 2023 at 10:39:39AM +0200, Christophe Leroy wrote:
> 
>> A lot of errors are encountered when building with sparse checking
>> activated (make C=1 or make C=2).
>>
>> Many of them are fixed in Linux.
>>
>> Resynchronise Makefile and include/linux/build_bug.h with Linux
>> kernel sources by porting the following Linux commits into u-boot:
>> - 6c49f359ca14 ("kbuild: disable sparse warnings about unknown attributes")
>> - 80591e61a0f7 ("kbuild: tell sparse about the $ARCH")
>> - 8788994376d8 ("linux/build_bug.h: change type to int")
>> - 527edbc18a70 ("build_bug.h: remove most of dummy BUILD_BUG_ON stubs for 
>> Sparse")
>> - c60d3b79423a ("build_bug.h: remove negative-array fallback for 
>> BUILD_BUG_ON()")
>> - 14e83077d55f ("include: drop pointless __compiler_offsetof indirection")
>>
>> Also revert commit aa9e891c63 ("include/linux/stddef.h: avoid
>> 'warning: preprocessor token offsetof redefined'") because the
>> error it creates is worse than the warning it is trying to fix.
>>
>> Signed-off-by: Christophe Leroy 
> 
> First, I've applied to u-boot/next now.  But second, I had mentioned CI
> testing too, but seeing the level of checker-error output on qemu-arm I
> am reluctant to add a test that should build-to-completion but error so
> much as I worry about it being seen as a low quality test.
> 

Well, at least we can now start detecting and fixing them.

Also, I don't know how feasible it is, but in Linux kernel the robots 
report new warnings/error only so that you know you are not adding new 
ones with new commits. Could CI do that too ?

Christophe

Re: envtools lack extra settings since commit 86b9c3e4e4 ("env: Allow U-Boot scripts to be placed in

2023-05-11 Thread Christophe Leroy



Le 11/05/2023 à 14:50, Tom Rini a écrit :
> On Thu, May 11, 2023 at 08:16:49AM +0200, Christophe Leroy wrote:
> 
>> After converting my targets from CFG_EXTRA_ENV_SETTINGS to
>> CONFIG_EXTRA_ENV_TEXT as suggested by Tom, I discovered that
>> fw_setenv doesn't set the entire defaut environment anymore.
>>
>> I tried to fix it with the below patch, but it fails qemu-x86 CI test,
>> see https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/16326
>> That's the only CI test that fails AFAICS.
>>
>> Could you help with a solution ? This needs to be fixed.
> 
> Sometimes qemu fails in random ways, and the job just needs to be
> re-run.  I hit re-run on that one now.
> 

Gosh. It passed now.

So you can take the patch as is under the scisor line. Or you prefer I 
resend it ?

Thanks
Christophe

envtools lack extra settings since commit 86b9c3e4e4 ("env: Allow U-Boot scripts to be placed in

2023-05-11 Thread Christophe Leroy

After converting my targets from CFG_EXTRA_ENV_SETTINGS to
CONFIG_EXTRA_ENV_TEXT as suggested by Tom, I discovered that
fw_setenv doesn't set the entire defaut environment anymore.

I tried to fix it with the below patch, but it fails qemu-x86 CI test,
see https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/16326
That's the only CI test that fails AFAICS.

Could you help with a solution ? This needs to be fixed.

Thanks
Christophe

 >8 
From: Christophe Leroy 
Subject: [RFC PATCH] envtools: Fix default environment

After converting some targets from CFG_EXTRA_ENV_SETTINGS to
CONFIG_EXTRA_ENV_TEXT, default environment embedded in
fw_env tool missed all extra settings.

Commit 86b9c3e4e4 ("env: Allow U-Boot scripts to be placed in
a .env file") restricted the inclusion of the content of that
file to builds without USE_HOSTCC.

But as mentionned in commit 79fc0c5f49 ("tools/env: cross-compile
fw_printenv without setting HOSTCC"), HOSTCC and USE_HOSTCC are
kept for code re-use.

Remove the restricting so that settings included in a .env
file are also added to fw_env tool.

Fixes: 86b9c3e4e4 ("env: Allow U-Boot scripts to be placed in a .env file")
Signed-off-by: Christophe Leroy 
---
 Makefile  | 2 +-
 include/env_default.h | 2 --
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index fb02bba08f..a5ab5e3da9 100644
--- a/Makefile
+++ b/Makefile
@@ -2119,7 +2119,7 @@ tools/version.h: include/version.h
$(Q)mkdir -p $(dir $@)
$(call if_changed,copy)
 
-envtools: scripts_basic $(version_h) $(timestamp_h) tools/version.h
+envtools: u-boot-initial-env scripts_basic $(version_h) $(timestamp_h) 
tools/version.h
$(Q)$(MAKE) $(build)=tools/env
 
 tools-only: export TOOLS_ONLY=y
diff --git a/include/env_default.h b/include/env_default.h
index c0df39d62f..b16c22d5a2 100644
--- a/include/env_default.h
+++ b/include/env_default.h
@@ -10,9 +10,7 @@
 #include 
 #include 
 
-#ifndef USE_HOSTCC
 #include 
-#endif
 
 #ifdef DEFAULT_ENV_INSTANCE_EMBEDDED
 env_t embedded_environment __UBOOT_ENV_SECTION__(environment) = {
-- 
2.39.2

[GIT PULL] Please pull u-boot-mpc8xx

2023-05-05 Thread Christophe Leroy

Hi Tom,

This pull request adds misc fixes for cssi boards and activates
CPM relocation in order to enable the use of SCC4 in
QMC (QUICC Multi-Channel) mode.

CI: https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/16261

Thanks
Christophe


The following changes since commit 6735ab59e6fd71ced1c58d8dfb3dd6baf3690d16:

   Prepare v2023.07-rc1 (2023-05-01 12:02:02 -0400)

are available in the Git repository at:

   g...@source.denx.de:u-boot/custodians/u-boot-mpc8xx.git for-2023.07-2

for you to fetch changes up to 0ec8ebef87d78529d1b4f3e7beaced0b9fbea629:

   board: cssi: Activate SMC relocation on CMPC885 board for MIAE device 
(2023-05-05 07:26:53 +0200)


Christophe Leroy (11):
   board: cssi: Remove duplicated FPGA loading sequence on CMPC885
   board: cssi: Remove stale macro from cmpcpro.c
   board: cssi: Load CMPC885's motherboard FPGA earlier
   powerpc: mpc8xx: CPM parameter RAM can be anywhere
   powerpc: mpc8xx: Reorganise init RAM
   powerpc: Force cast on memcpy_toio()
   powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATA
   powerpc: mpc8xx: Add SMC relocation CPM microcode
   spi, mpc8xx: Take parameter RAM relocation into account
   serial, mpc8xx: Take parameter RAM relocation into account
   board: cssi: Activate SMC relocation on CMPC885 board for MIAE device

  arch/powerpc/cpu/mpc8xx/Kconfig  |  45 
  arch/powerpc/cpu/mpc8xx/Makefile |   2 +
  arch/powerpc/cpu/mpc8xx/cpu.c|   2 +-
  arch/powerpc/cpu/mpc8xx/micropatch_smc.c | 105 
+++
  arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c |  38 ++
  arch/powerpc/cpu/mpc8xx/start.S  |   8 +-
  arch/powerpc/include/asm/cpm_8xx.h   |  41 ++-
  arch/powerpc/include/asm/immap_8xx.h |   8 +-
  arch/powerpc/include/asm/io.h|   6 +-
  board/cssi/cmpc885/cmpc885.c |  43 +++
  board/cssi/cmpcpro/cmpcpro.c |   5 --
  configs/CMPC885_defconfig|   3 +-
  drivers/serial/serial_mpc8xx.c   |  24 +++---
  drivers/spi/mpc8xx_spi.c |   8 +-
  include/configs/cmpc885.h|   1 +
  include/configs/mcr3000.h|   1 +
  16 files changed, 254 insertions(+), 86 deletions(-)
  create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_smc.c
  create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c

[PATCH v2 08/11] powerpc: mpc8xx: Add SMC relocation CPM microcode

2023-05-05 Thread Christophe Leroy

In order to use QMC mode in the CPM, a SCC requires more space
in parameter RAM.

After SCC1 there is I2C parameter RAM and after SCC2 there is
SPI parameter RAM. MPC866 and MPC885 can already relocate I2C and.
SPI parameter RAM.

But in order to free space after SCC3 and SCC4, SMC1 and SMC2
need to be relocated. In order to do so, a CPM microcode patch
is required.

Binary data for that patch is copied from Linux kernel.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Kconfig  |  20 +
 arch/powerpc/cpu/mpc8xx/Makefile |   1 +
 arch/powerpc/cpu/mpc8xx/micropatch_smc.c | 105 +++
 3 files changed, 126 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_smc.c

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 52caf06aac..bd2af8dc10 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -53,6 +53,26 @@ config USB_SOF_UCODE_PATCH
  Although the data is received correctly, the CRC result
  will be corrupted.
 
+config SMC_UCODE_PATCH
+   bool "SMC relocation patch"
+   help
+ This microcode relocates SMC1 and SMC2 parameter RAMs to allow
+ extended parameter RAM for SCC3 and SCC4 (ex: for QMC mode)
+
+config SMC1_RPBASE
+   hex "SMC1 relocation offset"
+   depends on SMC_UCODE_PATCH
+   default 0x1e80
+   help
+ Offset of SMC1 parameter RAM to be written to RPBASE register.
+
+config SMC2_RPBASE
+   hex "SMC2 relocation offset"
+   depends on SMC_UCODE_PATCH
+   default 0x1f80
+   help
+ Offset of SMC2 parameter RAM to be written to RPBASE register.
+
 endchoice
 
 comment "Specific commands"
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 5a6561e024..28a21eeb76 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -13,3 +13,4 @@ obj-y += interrupts.o
 obj-y  += speed.o
 obj-y  += cache.o
 obj-$(CONFIG_USB_SOF_UCODE_PATCH) += micropatch_usb_sof.o
+obj-$(CONFIG_SMC_UCODE_PATCH) += micropatch_smc.o
diff --git a/arch/powerpc/cpu/mpc8xx/micropatch_smc.c 
b/arch/powerpc/cpu/mpc8xx/micropatch_smc.c
new file mode 100644
index 00..89406797cc
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xx/micropatch_smc.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/*
+ * Microcode patches for the CPM as supplied by Motorola.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static uint patch_2000[] = {
+   0x3fff, 0x3ffd, 0x3ffb, 0x3ff9,
+   0x5fefeff8, 0x5f91eff8, 0x3ff3, 0x3ff1,
+   0x3a11e710, 0xedf0ccb9, 0xf318ed66, 0x7f0e5fe2,
+   0x7fedbb38, 0x3afe7468, 0x7fedf4d8, 0x8ffbb92d,
+   0xb83b77fd, 0xb0bb5eb9, 0xdfda7fed, 0x90bde74d,
+   0x6f0dcbd3, 0xe7decfed, 0xcb50cfed, 0xcfeddf6d,
+   0x914d4f74, 0x5eaedfcb, 0x9ee0e7df, 0xefbb6ffb,
+   0xe7ef7f0e, 0x9ee57fed, 0xebb7effa, 0xeb30affb,
+   0x7fea90b3, 0x7e0cf09f, 0xb318, 0x5fffdfff,
+   0xac35efea, 0x7fce1fc1, 0xe2ff5fbd, 0xaffbe2ff,
+   0x5fbfaffb, 0xf9a87d0f, 0xaef8770f, 0x7d0fb0a2,
+   0xeffbbfff, 0xcfef5fba, 0x7d0fbfff, 0x5fba4cf8,
+   0x7fddd09b, 0x49f847fd, 0x7efdf097, 0x7fedfffd,
+   0x7dfdf093, 0xef7e7e1e, 0x5fba7f0e, 0x3a11e710,
+   0xedf0cc87, 0xfb18ad0a, 0x1f85bbb8, 0x74283b7e,
+   0x7375e4bb, 0x2ab64fb8, 0x5c7de4bb, 0x32fdffbf,
+   0x5f0843f8, 0x7ce3e1bb, 0xe74f7ded, 0x6f0f4fe8,
+   0xc7ba32be, 0x73f2efeb, 0x600b4f78, 0xe5bb760b,
+   0x5388aef8, 0x4ef80b6a, 0xcfef9ee5, 0xabf8751f,
+   0xefef5b88, 0x741f4fe8, 0x751e760d, 0x7fdb70dd,
+   0x741cafce, 0xefcc7fce, 0x751e7088, 0x741ce7bb,
+   0x334ecfed, 0xafdbefeb, 0xe5bb760b, 0x53ceaef8,
+   0xafe8e7eb, 0x4bf8771e, 0x7e007fed, 0x4fcbe2cc,
+   0x7fbc3085, 0x7b0f7a0f, 0x34b177fd, 0xb0e75e93,
+   0xdf313e3b, 0xaf78741f, 0x741f30cc, 0xcfef5f08,
+   0x741f3e88, 0xafb8771e, 0x5f437fed, 0x0bafe2cc,
+   0x741ccfec, 0xe5ca53a9, 0x6fcb4f74, 0x5e89df27,
+   0x2a923d14, 0x4b8fdf0c, 0x751f741c, 0x6c1eeffa,
+   0xefea7fce, 0x6ffc309a, 0xefec3fca, 0x308fdf0a,
+   0xadf85e7a, 0xaf7daefd, 0x5e7adf0a, 0x5e7aafdd,
+   0x761f1088, 0x1e7c7efd, 0x3089fffe, 0x4908fb18,
+   0x5fffdfff, 0xafbbf0f7, 0x4ef85f43, 0xadf81489,
+   0x7a0f7089, 0xcfef5089, 0x7a0fdf0c, 0x5e7cafed,
+   0xbc6e780f, 0xefef780f, 0xefef790f, 0xa7f85eeb,
+   0xffef790f, 0xefef790f, 0x1489df0a, 0x5e7aadfd,
+   0x5f09fffb, 0xe79aded9, 0xeff96079, 0x607ae79a,
+   0xded8eff9, 0x60795edb, 0x607acfef, 0xefefefdf,
+   0xefbfef7f, 0xeeffedff, 0xebffe7ff, 0xafefafdf,
+   0xafbfaf7f, 0xaeffadff, 0xabffa7ff, 0x6fef6fdf,
+   0x6fbf6f7f, 0x6eff6dff, 0x6bff67ff, 0x2fef2fdf,
+   0x2fbf2f7f, 0x2eff2dff, 0x2bff27ff, 0x4e08fd1f,
+   0xe5ff6e0f, 0xaff87eef, 0x7e0ffdef, 0xf11f6079,
+   0xabf8f51e, 0x7e0af11c, 0x37cfae16, 0x7fec909a,
+   0xadf8

[PATCH v2 03/11] board: cssi: Load CMPC885's motherboard FPGA earlier

2023-05-05 Thread Christophe Leroy

In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().

This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.

Console is not available yet so remove the printfs.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 25 +
 configs/CMPC885_defconfig|  1 -
 2 files changed, 5 insertions(+), 21 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 02da4d9a87..40128f170a 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -586,13 +586,8 @@ void iop_setup_miae(void)
setbits_be32(>cp_peso, 0x00031980);
 }
 
-int board_early_init_f(void)
-{
-   return 0;
-}
-
 /* Specific board initialization */
-int board_early_init_r(void)
+int board_early_init_f(void)
 {
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
iop8xx_t __iomem *iop = >im_ioport;
@@ -864,8 +859,6 @@ int board_early_init_r(void)
 
/* Check if fpga firmware is loaded */
if (!(in_be32(>cp_pedat) & 0x0001)) {
-   printf("Reloading FPGA firmware.\n");
-
/* Load fpga firmware */
/* Activate PROG_FPGA_FIRMWARE for 1 usec */
clrbits_be32(>cp_pedat, 0x0002);
@@ -874,12 +867,8 @@ int board_early_init_r(void)
 
/* Wait 200 msec and check DONE_FPGA_FIRMWARE */
mdelay(200);
-   if (!(in_be32(>cp_pedat) & 0x0001)) {
-   for (;;) {
-   printf("error loading firmware.\n");
-   mdelay(500);
-   }
-   }
+   if (!(in_be32(>cp_pedat) & 0x0001))
+   hang();
 
/* Send a reset signal and wait for 20 msec */
clrbits_be16(ADDR_CPLD_R_RESET, R_RST_STATUS);
@@ -889,12 +878,8 @@ int board_early_init_r(void)
 
/* Wait 300 msec and check the reset state */
mdelay(300);
-   if (!(in_be16(ADDR_CPLD_R_RESET) & R_RESET_STATUS)) {
-   for (;;) {
-   printf("Could not reset FPGA.\n");
-   mdelay(500);
-   }
-   }
+   if (!(in_be16(ADDR_CPLD_R_RESET) & R_RESET_STATUS))
+   hang();
 
iop_setup_common();
} else {
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index 0a24684389..ca5dfd2b83 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -31,7 +31,6 @@ CONFIG_AUTOBOOT_STOP_STR_ENABLE=y
 
CONFIG_AUTOBOOT_STOP_STR_SHA256="4813494d137e1631bba301d5acab6e7bb7aa74ce1185d456565ef51d737677b2"
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run flashboot"
-CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_MISC_INIT_R=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
-- 
2.39.2

[PATCH v2 07/11] powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATA

2023-05-05 Thread Christophe Leroy

MPC885 CPU has the following ERRATA:

When the USB controller is configured in Host mode, and the
SOF generation (SFTE=1 in USMOD register) is being used,
there may be false CRC error indication in other SCCs.
Although the data is received correctly, the CRC result
will be corrupted.

Add capability to load the related microcode to fix it.
The microcode binary data is copied from Linux kernel.

Other microcode will be added in following patch so make it
a Kconfig choice.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Kconfig  | 25 +
 arch/powerpc/cpu/mpc8xx/Makefile |  1 +
 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c | 38 
 arch/powerpc/include/asm/cpm_8xx.h   |  7 
 4 files changed, 71 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index bfd903bc10..52caf06aac 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -30,6 +30,31 @@ config MPC885
 
 endchoice
 
+choice
+   prompt "Microcode patch selection"
+   default NO_UCODE_PATCH
+   help
+ This allows loading of CPM microcode.
+
+ Only one microcode can be loaded at a time.
+
+config NO_UCODE_PATCH
+   bool "None"
+
+config USB_SOF_UCODE_PATCH
+   bool "USB SOF patch"
+   depends on MPC885
+   help
+ This microcode fixes CPM15 errata:
+
+ When the USB controller is configured in Host mode, and the
+ SOF generation (SFTE=1 in USMOD register) is being used,
+ there may be false CRC error indication in other SCCs.
+ Although the data is received correctly, the CRC result
+ will be corrupted.
+
+endchoice
+
 comment "Specific commands"
 
 config CMD_IMMAP
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 8918a26288..5a6561e024 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_CMD_IMMAP) += immap.o
 obj-y  += interrupts.o
 obj-y  += speed.o
 obj-y  += cache.o
+obj-$(CONFIG_USB_SOF_UCODE_PATCH) += micropatch_usb_sof.o
diff --git a/arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c 
b/arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c
new file mode 100644
index 00..7fc640df90
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/*
+ * Microcode patches for the CPM as supplied by Motorola.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ *  USB SOF patch arrays.
+ */
+static uint patch_2000[] = {
+   0x7fff, 0x7ffd, 0x7ffb, 0x49f7ba5b,
+   0xba383ffb, 0xf9b8b46d, 0xe5ab4e07, 0xaf77bffe,
+   0x3f7bbf79, 0xba5bba38, 0xe7676076, 0x6075
+};
+
+static uint patch_2f00[] = {
+   0x3030304c, 0xcab9e441, 0xa1aaf220
+};
+
+void cpm_load_patch(cpm8xx_t __iomem *cp)
+{
+   out_be16(>cp_rccr, 0);
+
+   memcpy_toio(cp->cp_dpmem, patch_2000, sizeof(patch_2000));
+   memcpy_toio(cp->cp_dpmem + 0xf00, patch_2f00, sizeof(patch_2f00));
+
+   out_be16(>cp_cpmcr1, 0);
+   out_be16(>cp_cpmcr2, 0);
+   out_be16(>cp_cpmcr3, 0);
+   out_be16(>cp_cpmcr4, 0);
+
+   out_be16(>cp_rccr, 9);
+}
diff --git a/arch/powerpc/include/asm/cpm_8xx.h 
b/arch/powerpc/include/asm/cpm_8xx.h
index 77ffcce5a6..98476cdf30 100644
--- a/arch/powerpc/include/asm/cpm_8xx.h
+++ b/arch/powerpc/include/asm/cpm_8xx.h
@@ -684,4 +684,11 @@ void irq_install_handler(int vec, void (*handler)(void *), 
void *dev_id);
 #define CICR_HP_MASK   ((uint)0x1f00)  /* Hi-pri int. */
 #define CICR_IEN   ((uint)0x0080)  /* Int. enable */
 #define CICR_SPS   ((uint)0x0001)  /* SCC Spread */
+
+#ifdef CONFIG_NO_UCODE_PATCH
+static inline void cpm_load_patch(cpm8xx_t __iomem *cp) { }
+#else
+void cpm_load_patch(cpm8xx_t __iomem *cp);
+#endif
+
 #endif /* __CPM_8XX__ */
-- 
2.39.2

[PATCH v2 09/11] spi, mpc8xx: Take parameter RAM relocation into account

2023-05-05 Thread Christophe Leroy

Instead of inhibiting parameter RAM relocation, take it into account.

Signed-off-by: Christophe Leroy 
---
 drivers/spi/mpc8xx_spi.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index 734b0751a9..5c8d760935 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -52,10 +52,12 @@ static int mpc8xx_spi_probe(struct udevice *dev)
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
cpm8xx_t __iomem *cp = >im_cpm;
spi_t __iomem *spi = (spi_t __iomem *)>cp_dpmem[PROFF_SPI];
+   u16 spi_rpbase;
cbd_t __iomem *tbdf, *rbdf;
 
-   /* Disable relocation */
-   out_be16(>spi_rpbase, 0x1d80);
+   spi_rpbase = in_be16(>spi_rpbase);
+   if (spi_rpbase)
+   spi = (spi_t __iomem *)>cp_dpmem[spi_rpbase];
 
 /* 1 */
/* Initialize the parameter ram.
-- 
2.39.2

[PATCH v2 02/11] board: cssi: Remove stale macro from cmpcpro.c

2023-05-05 Thread Christophe Leroy

Three unused macros were left over. Remove them.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpcpro/cmpcpro.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/board/cssi/cmpcpro/cmpcpro.c b/board/cssi/cmpcpro/cmpcpro.c
index 3e9ba6a4cc..8a30c48e35 100644
--- a/board/cssi/cmpcpro/cmpcpro.c
+++ b/board/cssi/cmpcpro/cmpcpro.c
@@ -397,8 +397,3 @@ void ft_board_setup_phy3(void)
 
setbits_be32(>qepio.ioport[2].pdat, 0x0400);
 }
-
-#define ADDR_FPGA_R_BASE   ((unsigned char  __iomem 
*)CONFIG_FPGA_BASE)
-#define ADDR_FPGA_R_ALARMES_IN ((unsigned char  __iomem 
*)CONFIG_FPGA_BASE + 0x31)
-#define ADDR_FPGA_R_FAV((unsigned char  __iomem 
*)CONFIG_FPGA_BASE + 0x44)
-
-- 
2.39.2

[PATCH v2 01/11] board: cssi: Remove duplicated FPGA loading sequence on CMPC885

2023-05-05 Thread Christophe Leroy

A duplicated FPGA loading sequence appears after FPGA reset.

Remove it.

Fixes: dac3c6f625 ("board: cssi: Add new board MCR3000_2G")
Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 14 --
 1 file changed, 14 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 540b9d3c78..02da4d9a87 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -896,20 +896,6 @@ int board_early_init_r(void)
}
}
 
-   /* is FPGA firmware loaded ? */
-   if (!(in_be32(>cp_pedat) & 0x0001)) {
-   printf("Reloading FPGA firmware\n");
-
-   /* Load FPGA firmware */
-   /* Activate PROG_FPGA_FIRMWARE for 1 usec */
-   clrbits_be32(>cp_pedat, 0x0002);
-   udelay(1);
-   setbits_be32(>cp_pedat, 0x0002);
-
-   /* Wait 200ms before checking DONE_FPGA_FIRMWARE */
-   mdelay(200);
-   }
-
iop_setup_common();
} else {
iop_setup_cmpc885();
-- 
2.39.2

[PATCH v2 10/11] serial, mpc8xx: Take parameter RAM relocation into account

2023-05-05 Thread Christophe Leroy

Instead of inhibiting parameter RAM relacation, take
into account the configured one.

It means INIT_TRX command cannot be used and must be done
manually as explained in the microcode patch application note.

Signed-off-by: Christophe Leroy 
---
 drivers/serial/serial_mpc8xx.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index beffc34d11..d82760c7f1 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -83,6 +83,7 @@ static int serial_mpc8xx_probe(struct udevice *dev)
immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
smc_t __iomem *sp;
smc_uart_t __iomem *up;
+   u16 smc_rpbase;
cpm8xx_t __iomem *cp = &(im->im_cpm);
struct serialbuffer __iomem *rtx;
 
@@ -90,8 +91,10 @@ static int serial_mpc8xx_probe(struct udevice *dev)
 
sp = cp->cp_smc + SMC_INDEX;
up = (smc_uart_t __iomem *)>cp_dpmem[PROFF_SMC];
-   /* Disable relocation */
-   out_be16(>smc_rpbase, 0);
+
+   smc_rpbase = in_be16(>smc_rpbase);
+   if (smc_rpbase)
+   up = (smc_uart_t __iomem *)>cp_dpmem[smc_rpbase];
 
/* Disable transmitter/receiver. */
clrbits_be16(>smc_smcmr, SMCMR_REN | SMCMR_TEN);
@@ -154,15 +157,12 @@ static int serial_mpc8xx_probe(struct udevice *dev)
out_be16(>smc_maxidl, CONFIG_SYS_MAXIDLE);
out_be32(>rxindex, 0);
 
-   /* Initialize Tx/Rx parameters. */
-   while (in_be16(>cp_cpcr) & CPM_CR_FLG)  /* wait if cp is busy */
-   ;
-
-   out_be16(>cp_cpcr,
-mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG);
-
-   while (in_be16(>cp_cpcr) & CPM_CR_FLG)  /* wait if cp is busy */
-   ;
+   out_be32(>smc_rstate, 0);
+   out_be32(>smc_tstate, 0);
+   out_be16(>smc_rbptr, CPM_SERIAL_BASE);
+   out_be16(>smc_tbptr, CPM_SERIAL_BASE + sizeof(cbd_t));
+   out_be16(>smc_brkcr, 1);
+   out_be16(>smc_brkec, 0);
 
/* Enable transmitter/receiver. */
setbits_be16(>smc_smcmr, SMCMR_REN | SMCMR_TEN);
-- 
2.39.2

[PATCH v2 06/11] powerpc: Force cast on memcpy_toio()

2023-05-05 Thread Christophe Leroy

sparse reports the following warning:

  CHECK   arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c
arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c:29:9: warning: cast removes 
address space '' of expression
arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c:30:9: warning: cast removes 
address space '' of expression

This is because of (void *) casts for using memcpy() as a substitute.

Do like other architectures, __force the cast to silence the warning

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/include/asm/io.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 998a82aa0d..f63cae0bc8 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -95,9 +95,9 @@ extern void _outsl_ns(volatile u32 *port, const void *buf, 
int nl);
 
 #define IO_SPACE_LIMIT ~0
 
-#define memset_io(a,b,c)   memset((void *)(a),(b),(c))
-#define memcpy_fromio(a,b,c)   memcpy((a),(void *)(b),(c))
-#define memcpy_toio(a,b,c)  memcpy((void *)(a),(b),(c))
+#define memset_io(a,b,c)   memset((void __force *)(a),(b),(c))
+#define memcpy_fromio(a,b,c)   memcpy((a),(void __force *)(b),(c))
+#define memcpy_toio(a,b,c)  memcpy((void __force *)(a),(b),(c))
 
 /*
  * Enforce In-order Execution of I/O:
-- 
2.39.2

[PATCH v2 04/11] powerpc: mpc8xx: CPM parameter RAM can be anywhere

2023-05-05 Thread Christophe Leroy

With relocation, CPM parameter RAM can be anywhere in the
dual port RAM, so don't split dual port RAM.

Remove dparam and dparam16 members of struct comm_proc

PROFF_XXX become offsets from the start of dual port RAM,
then they are now consistant with the offsets in RPBASE
registers.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/cpu.c|  2 +-
 arch/powerpc/include/asm/cpm_8xx.h   | 18 +-
 arch/powerpc/include/asm/immap_8xx.h |  8 +---
 drivers/serial/serial_mpc8xx.c   |  2 +-
 drivers/spi/mpc8xx_spi.c |  2 +-
 5 files changed, 13 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 9b587fbbe8..56383cecde 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -127,7 +127,7 @@ static int check_CPU(long clock, uint pvr, uint immr)
return -1;
 
k = (immr << 16) |
-   in_be16(>im_cpm.cp_dparam16[PROFF_REVNUM / sizeof(u16)]);
+   in_be16((u16 __iomem *)>im_cpm.cp_dpmem[PROFF_REVNUM]);
 
/*
 * Some boards use sockets so different CPUs can be used.
diff --git a/arch/powerpc/include/asm/cpm_8xx.h 
b/arch/powerpc/include/asm/cpm_8xx.h
index 85903d2108..09c24efd91 100644
--- a/arch/powerpc/include/asm/cpm_8xx.h
+++ b/arch/powerpc/include/asm/cpm_8xx.h
@@ -92,15 +92,15 @@ typedef struct cpm_buf_desc {
 
 /* Parameter RAM offsets.
 */
-#define PROFF_SCC1 ((uint)0x)
-#define PROFF_IIC  ((uint)0x0080)
-#define PROFF_REVNUM   ((uint)0x00b0)
-#define PROFF_SCC2 ((uint)0x0100)
-#define PROFF_SPI  ((uint)0x0180)
-#define PROFF_SCC3 ((uint)0x0200)
-#define PROFF_SMC1 ((uint)0x0280)
-#define PROFF_SCC4 ((uint)0x0300)
-#define PROFF_SMC2 ((uint)0x0380)
+#define PROFF_SCC1 ((uint)0x1c00)
+#define PROFF_IIC  ((uint)0x1c80)
+#define PROFF_REVNUM   ((uint)0x1cb0)
+#define PROFF_SCC2 ((uint)0x1d00)
+#define PROFF_SPI  ((uint)0x1d80)
+#define PROFF_SCC3 ((uint)0x1e00)
+#define PROFF_SMC1 ((uint)0x1e80)
+#define PROFF_SCC4 ((uint)0x1f00)
+#define PROFF_SMC2 ((uint)0x1f80)
 
 /* Define enough so I can at least use the serial port as a UART.
  */
diff --git a/arch/powerpc/include/asm/immap_8xx.h 
b/arch/powerpc/include/asm/immap_8xx.h
index 3999a02b9c..cf1300f6e2 100644
--- a/arch/powerpc/include/asm/immap_8xx.h
+++ b/arch/powerpc/include/asm/immap_8xx.h
@@ -437,13 +437,7 @@ typedef struct comm_proc {
 * depending upon the devices used and options chosen.
 * Some processors don't have all of it populated.
 */
-   u_char  cp_dpmem[0x1C00];   /* BD / Data / ucode */
-
-   /* Parameter RAM */
-   union {
-   u_char  cp_dparam[0x400];
-   u16 cp_dparam16[0x200];
-   };
+   u_char  cp_dpmem[0x2000];   /* BD / Data / ucode / Param RAM */
 } cpm8xx_t;
 
 /* Internal memory map.
diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index b8d6a81b65..beffc34d11 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -89,7 +89,7 @@ static int serial_mpc8xx_probe(struct udevice *dev)
/* initialize pointers to SMC */
 
sp = cp->cp_smc + SMC_INDEX;
-   up = (smc_uart_t __iomem *)>cp_dparam[PROFF_SMC];
+   up = (smc_uart_t __iomem *)>cp_dpmem[PROFF_SMC];
/* Disable relocation */
out_be16(>smc_rpbase, 0);
 
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index d84d7aea88..734b0751a9 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -51,7 +51,7 @@ static int mpc8xx_spi_probe(struct udevice *dev)
 {
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
cpm8xx_t __iomem *cp = >im_cpm;
-   spi_t __iomem *spi = (spi_t __iomem *)>cp_dparam[PROFF_SPI];
+   spi_t __iomem *spi = (spi_t __iomem *)>cp_dpmem[PROFF_SPI];
cbd_t __iomem *tbdf, *rbdf;
 
/* Disable relocation */
-- 
2.39.2

[PATCH v2 05/11] powerpc: mpc8xx: Reorganise init RAM

2023-05-05 Thread Christophe Leroy

Using SMC relocation microcode patch or USB-SOF microcode patch
will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
to 0x3000.

At the time being, init RAM is setup to use 0x2800-0x2e00, but
the stack pointer goes beyond 0x2800 and even beyond 0x2400.

For the time being we are not going to use any microcode patch
that uses memory about 0x3000, so reorganise setup to use:
- 0x2800 - 0x2e00 for init malloc and global data and CPM buffers
- 0x3000 - 0x3c00 for init stack

For more details about CPM dual port ram, see
commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram")

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/start.S|  8 +---
 arch/powerpc/include/asm/cpm_8xx.h | 16 
 include/configs/cmpc885.h  |  1 +
 include/configs/mcr3000.h  |  1 +
 4 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S
index 0aa73fca12..78429515ae 100644
--- a/arch/powerpc/cpu/mpc8xx/start.S
+++ b/arch/powerpc/cpu/mpc8xx/start.S
@@ -141,14 +141,16 @@ in_flash:
mtspr   DER, r2
 
/* set up the stack on top of internal DPRAM */
-   lis r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@h
-   ori r3, r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@l
+   lis r3, CFG_SYS_INIT_SP@h
+   ori r3, r3, CFG_SYS_INIT_SP@l
stw r0, -4(r3)
stw r0, -8(r3)
addir1, r3, -8
 
+   lis r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@h
+   ori r3, r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@l
+
bl  board_init_f_alloc_reserve
-   addir1, r3, -8
 
/* Zeroise the CPM dpram */
lis r4, CONFIG_SYS_IMMR@h
diff --git a/arch/powerpc/include/asm/cpm_8xx.h 
b/arch/powerpc/include/asm/cpm_8xx.h
index 09c24efd91..77ffcce5a6 100644
--- a/arch/powerpc/include/asm/cpm_8xx.h
+++ b/arch/powerpc/include/asm/cpm_8xx.h
@@ -51,14 +51,14 @@
 /*
  * DPRAM defines and allocation functions
  */
-#define CPM_SERIAL_BASE0x1800
-#define CPM_I2C_BASE   0x1820
-#define CPM_SPI_BASE   0x1840
-#define CPM_FEC_BASE   0x1860
-#define CPM_SERIAL2_BASE   0x18e0
-#define CPM_SCC_BASE   0x1900
-#define CPM_POST_BASE  0x1980
-#define CPM_WLKBD_BASE 0x1a00
+#define CPM_SERIAL_BASE0x0800
+#define CPM_I2C_BASE   0x0820
+#define CPM_SPI_BASE   0x0840
+#define CPM_FEC_BASE   0x0860
+#define CPM_SERIAL2_BASE   0x08E0
+#define CPM_SCC_BASE   0x0900
+#define CPM_POST_BASE  0x0980
+#define CPM_WLKBD_BASE 0x0a00
 
 #define BD_IIC_START   ((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */
 
diff --git a/include/configs/cmpc885.h b/include/configs/cmpc885.h
index b76230e9a4..545365e112 100644
--- a/include/configs/cmpc885.h
+++ b/include/configs/cmpc885.h
@@ -9,6 +9,7 @@
 /* Definitions for initial stack pointer and data area (in DPRAM) */
 #define CFG_SYS_INIT_RAM_ADDR  (CONFIG_SYS_IMMR + 0x2800)
 #define CFG_SYS_INIT_RAM_SIZE  (0x2e00 - 0x2800)
+#define CFG_SYS_INIT_SP(CONFIG_SYS_IMMR + 0x3c00)
 
 /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */
 #define CFG_SYS_SDRAM_BASE 0x
diff --git a/include/configs/mcr3000.h b/include/configs/mcr3000.h
index 6b16b050ff..a07761fdbb 100644
--- a/include/configs/mcr3000.h
+++ b/include/configs/mcr3000.h
@@ -14,6 +14,7 @@
 /* Definitions for initial stack pointer and data area (in DPRAM) */
 #define CFG_SYS_INIT_RAM_ADDR  (CONFIG_SYS_IMMR + 0x2800)
 #defineCFG_SYS_INIT_RAM_SIZE   (0x2e00 - 0x2800)
+#define CFG_SYS_INIT_SP(CONFIG_SYS_IMMR + 0x3c00)
 
 /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */
 #defineCFG_SYS_SDRAM_BASE  0x
-- 
2.39.2

[PATCH v2 11/11] board: cssi: Activate SMC relocation on CMPC885 board for MIAE device

2023-05-05 Thread Christophe Leroy

When CMPC885 board is used for MIAE device, SCC2 SCC3 and SMC2
are used for serial lines. Therefore only SCC4 is available for
handling the TDM line.

In order to use SCC4 in QMC mode without loosing SMC2, SMC2
must be relocated.

Activate SMC relocation and relocate SMC2 at offset 0x1fc0 which
is unused.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 4 
 configs/CMPC885_defconfig| 2 ++
 2 files changed, 6 insertions(+)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 40128f170a..5e6aa8b8cf 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -451,6 +452,9 @@ void iop_setup_miae(void)
/* Wait reset on FPGA_F */
udelay(100);
 
+   /* Load CPM relocation code */
+   cpm_load_patch(cp);
+
/* Set the front panel LED color to red */
clrbits_8((unsigned char  __iomem *)CONFIG_FPGA_BASE + 0x44, 0x02);
 
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index ca5dfd2b83..f55af97f08 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -10,6 +10,8 @@ CONFIG_MPC8xx=y
 # CONFIG_PCI is not set
 CONFIG_TARGET_CMPC885=y
 CONFIG_MPC885=y
+CONFIG_SMC_UCODE_PATCH=y
+CONFIG_SMC2_RPBASE=0x1fc0
 CONFIG_CMD_IMMAP=y
 CONFIG_SYS_SIUMCR=0x0062
 CONFIG_SYS_TBSCR=0x00C3
-- 
2.39.2

[PATCH v2 00/11] Misc fixes + 8xx CPM relocation

2023-05-05 Thread Christophe Leroy

This series adds misc fixes for cssi boards and activates
CPM relocation in order to enable the use of SCC4 in
QMC (QUICC Multi-Channel) mode.

Changes in v2:
- Patch 5: Update r1 at once (From Joakim)
- Patch 6: New to avoid sparse warnings with memcpy_toio()
- Patch 7 and 8: Fixed sparse warnings

Christophe Leroy (11):
  board: cssi: Remove duplicated FPGA loading sequence on CMPC885
  board: cssi: Remove stale macro from cmpcpro.c
  board: cssi: Load CMPC885's motherboard FPGA earlier
  powerpc: mpc8xx: CPM parameter RAM can be anywhere
  powerpc: mpc8xx: Reorganise init RAM
  powerpc: Force cast on memcpy_toio()
  powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATA
  powerpc: mpc8xx: Add SMC relocation CPM microcode
  spi, mpc8xx: Take parameter RAM relocation into account
  serial, mpc8xx: Take parameter RAM relocation into account
  board: cssi: Activate SMC relocation on CMPC885 board for MIAE device

 arch/powerpc/cpu/mpc8xx/Kconfig  |  45 
 arch/powerpc/cpu/mpc8xx/Makefile |   2 +
 arch/powerpc/cpu/mpc8xx/cpu.c|   2 +-
 arch/powerpc/cpu/mpc8xx/micropatch_smc.c | 105 +++
 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c |  38 +++
 arch/powerpc/cpu/mpc8xx/start.S  |   8 +-
 arch/powerpc/include/asm/cpm_8xx.h   |  41 +---
 arch/powerpc/include/asm/immap_8xx.h |   8 +-
 arch/powerpc/include/asm/io.h|   6 +-
 board/cssi/cmpc885/cmpc885.c |  43 ++--
 board/cssi/cmpcpro/cmpcpro.c |   5 -
 configs/CMPC885_defconfig|   3 +-
 drivers/serial/serial_mpc8xx.c   |  24 ++---
 drivers/spi/mpc8xx_spi.c |   8 +-
 include/configs/cmpc885.h|   1 +
 include/configs/mcr3000.h|   1 +
 16 files changed, 254 insertions(+), 86 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_smc.c
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c

-- 
2.39.2

[PATCH] Fix sparse checks processing

2023-05-05 Thread Christophe Leroy

A lot of errors are encountered when building with sparse checking
activated (make C=1 or make C=2).

Many of them are fixed in Linux.

Resynchronise Makefile and include/linux/build_bug.h with Linux
kernel sources by porting the following Linux commits into u-boot:
- 6c49f359ca14 ("kbuild: disable sparse warnings about unknown attributes")
- 80591e61a0f7 ("kbuild: tell sparse about the $ARCH")
- 8788994376d8 ("linux/build_bug.h: change type to int")
- 527edbc18a70 ("build_bug.h: remove most of dummy BUILD_BUG_ON stubs for 
Sparse")
- c60d3b79423a ("build_bug.h: remove negative-array fallback for 
BUILD_BUG_ON()")
- 14e83077d55f ("include: drop pointless __compiler_offsetof indirection")

Also revert commit aa9e891c63 ("include/linux/stddef.h: avoid
'warning: preprocessor token offsetof redefined'") because the
error it creates is worse than the warning it is trying to fix.

Signed-off-by: Christophe Leroy 
---
 Makefile  |  6 +-
 include/linux/build_bug.h | 40 ---
 include/linux/stddef.h|  8 +---
 3 files changed, 14 insertions(+), 40 deletions(-)

diff --git a/Makefile b/Makefile
index 4f4f014d2c..6bf62ebad6 100644
--- a/Makefile
+++ b/Makefile
@@ -423,7 +423,8 @@ DTC_MIN_VERSION := 010406
 CHECK  = sparse
 
 CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \
- -Wbitwise -Wno-return-void -D__CHECK_ENDIAN__ $(CF)
+ -Wbitwise -Wno-return-void -Wno-unknown-attribute \
+ -D__CHECK_ENDIAN__ $(CF)
 
 KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__
 
@@ -1032,6 +1033,9 @@ ifeq 
($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
 LDFLAGS_u-boot += -Ttext $(CONFIG_TEXT_BASE)
 endif
 
+# make the checker run with the right architecture
+CHECKFLAGS += --arch=$(ARCH)
+
 # insure the checker run with the right endianness
 CHECKFLAGS += $(if $(CONFIG_CPU_BIG_ENDIAN),-mbig-endian,-mlittle-endian)
 
diff --git a/include/linux/build_bug.h b/include/linux/build_bug.h
index 9c7088bafa..20c2dc7f4b 100644
--- a/include/linux/build_bug.h
+++ b/include/linux/build_bug.h
@@ -4,15 +4,16 @@
 #include 
 
 #ifdef __CHECKER__
-#define __BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
-#define BUILD_BUG_ON_NOT_POWER_OF_2(n) (0)
 #define BUILD_BUG_ON_ZERO(e) (0)
-#define BUILD_BUG_ON_NULL(e) ((void *)0)
-#define BUILD_BUG_ON_INVALID(e) (0)
-#define BUILD_BUG_ON_MSG(cond, msg) (0)
-#define BUILD_BUG_ON(condition) (0)
-#define BUILD_BUG() (0)
 #else /* __CHECKER__ */
+/*
+ * Force a compilation error if condition is true, but also produce a
+ * result (of value 0 and type int), so the expression can be used
+ * e.g. in a structure initializer (or where-ever else comma expressions
+ * aren't permitted).
+ */
+#define BUILD_BUG_ON_ZERO(e) ((int)sizeof(struct { int:(-!!(e)); }))
+#endif /* __CHECKER__ */
 
 /* Force a compilation error if a constant expression is not a power of 2 */
 #define __BUILD_BUG_ON_NOT_POWER_OF_2(n)   \
@@ -20,15 +21,6 @@
 #define BUILD_BUG_ON_NOT_POWER_OF_2(n) \
BUILD_BUG_ON((n) == 0 || (((n) & ((n) - 1)) != 0))
 
-/*
- * Force a compilation error if condition is true, but also produce a
- * result (of value 0 and type size_t), so the expression can be used
- * e.g. in a structure initializer (or where-ever else comma expressions
- * aren't permitted).
- */
-#define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); }))
-#define BUILD_BUG_ON_NULL(e) ((void *)sizeof(struct { int:(-!!(e)); }))
-
 /*
  * BUILD_BUG_ON_INVALID() permits the compiler to check the validity of the
  * expression but avoids the generation of any code, even if that expression
@@ -52,23 +44,9 @@
  * If you have some code which relies on certain constants being equal, or
  * some other compile-time-evaluated condition, you should use BUILD_BUG_ON to
  * detect if someone changes it.
- *
- * The implementation uses gcc's reluctance to create a negative array, but gcc
- * (as of 4.4) only emits that error for obvious cases (e.g. not arguments to
- * inline functions).  Luckily, in 4.3 they added the "error" function
- * attribute just for this type of case.  Thus, we use a negative sized array
- * (should always create an error on gcc versions older than 4.4) and then call
- * an undefined function with the error attribute (should always create an
- * error on gcc 4.3 and later).  If for some reason, neither creates a
- * compile-time error, we'll still have a link-time error, which is harder to
- * track down.
  */
-#ifndef __OPTIMIZE__
-#define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
-#else
 #define BUILD_BUG_ON(condition) \
BUILD_BUG_ON_MSG(condition, "BUILD_BUG_ON failed: " #condition)
-#endif
 
 /**
  * BUILD_BUG - break compile if used.
@@ -98,6 +76,4 @@
 #define static_assert(expr, ...) __static_assert(expr, ##__VA_ARGS__, #expr)
 #define _

Re: [PATCH] build_bug.h: Also define static_assert() when CHECKER is defined

2023-05-05 Thread Christophe Leroy



Le 04/05/2023 à 21:55, Tom Rini a écrit :
> On Thu, May 04, 2023 at 05:32:12PM +0000, Christophe Leroy wrote:
>>
>>
>> Le 04/05/2023 à 19:22, Christophe Leroy a écrit :
>>>
>>>
>>> Le 04/05/2023 à 15:54, Tom Rini a écrit :
>>>> On Thu, May 04, 2023 at 06:15:13AM +, Christophe Leroy wrote:
>>>>>
>>>>>
>>>>> Le 03/05/2023 à 22:02, Tom Rini a écrit :
>>>>>> On Thu, Jan 26, 2023 at 07:17:48PM +0100, Christophe Leroy wrote:
>>>>>>
>>>>>>> When doing a build with C=2, the following failure is encountered on
>>>>>>> several files:
>>>>>>>
>>>>>>>    CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: note: in included file
>>>>>>> (through arch/powerpc/include/asm/global_data.h, include/init.h):
>>>>>>>  include/asm-generic/global_data.h:494:21: error: Expected ) in
>>>>>>> function declarator
>>>>>>>  include/asm-generic/global_data.h:494:21: error: got (
>>>>>>>
>>>>>>> And because of the error, the interesting part which are the
>>>>>>> warnings don't appear. This is because static_assert() is defined
>>>>>>> only when __CHECKER__ is not defined.
>>>>>>>
>>>>>>> Add a stub when __CHECKER__ is defined. With that fix, the expected
>>>>>>> warnings are now seen:
>>>>>>>
>>>>>>>    CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:    expected unsigned
>>>>>>> int const volatile [noderef]  *addr
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:    got unsigned int *
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:    expected unsigned
>>>>>>> int const volatile [noderef]  *addr
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:    got unsigned int *
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:    expected unsigned
>>>>>>> int const volatile [noderef]  *addr
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:    got unsigned int *
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:    expected unsigned
>>>>>>> int const volatile [noderef]  *addr
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:    got unsigned int *
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:    expected unsigned
>>>>>>> int volatile [noderef]  *addr
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:    got unsigned int *
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:    expected unsigned
>>>>>>> int volatile [noderef]  *addr
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:    got unsigned int *
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:    expected unsigned
>>>>>>> int volatile [noderef]  *addr
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:    got unsigned int *
>>>>>>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17: warning: incorrect
>>>>>>> type in argument 1 (different address spaces)
>>>&

Re: [PATCH] build_bug.h: Also define static_assert() when CHECKER is defined

2023-05-04 Thread Christophe Leroy



Le 04/05/2023 à 19:22, Christophe Leroy a écrit :
> 
> 
> Le 04/05/2023 à 15:54, Tom Rini a écrit :
>> On Thu, May 04, 2023 at 06:15:13AM +0000, Christophe Leroy wrote:
>>>
>>>
>>> Le 03/05/2023 à 22:02, Tom Rini a écrit :
>>>> On Thu, Jan 26, 2023 at 07:17:48PM +0100, Christophe Leroy wrote:
>>>>
>>>>> When doing a build with C=2, the following failure is encountered on
>>>>> several files:
>>>>>
>>>>>   CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: note: in included file 
>>>>> (through arch/powerpc/include/asm/global_data.h, include/init.h):
>>>>> include/asm-generic/global_data.h:494:21: error: Expected ) in 
>>>>> function declarator
>>>>> include/asm-generic/global_data.h:494:21: error: got (
>>>>>
>>>>> And because of the error, the interesting part which are the
>>>>> warnings don't appear. This is because static_assert() is defined
>>>>> only when __CHECKER__ is not defined.
>>>>>
>>>>> Add a stub when __CHECKER__ is defined. With that fix, the expected
>>>>> warnings are now seen:
>>>>>
>>>>>   CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:    expected unsigned 
>>>>> int const volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:    expected unsigned 
>>>>> int const volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:    expected unsigned 
>>>>> int const volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:    expected unsigned 
>>>>> int const volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:    expected unsigned 
>>>>> int volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:    expected unsigned 
>>>>> int volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:    expected unsigned 
>>>>> int volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17:    expected unsigned 
>>>>> int volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9: warning: incorrect 
>>>>> type in argument 1 (different address spaces)
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9:    expected unsigned 
>>>>> int volatile [noderef]  *addr
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9:    got unsigned int *
>>>>> arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:79:9: w

Re: [PATCH] build_bug.h: Also define static_assert() when CHECKER is defined

2023-05-04 Thread Christophe Leroy



Le 04/05/2023 à 15:54, Tom Rini a écrit :
> On Thu, May 04, 2023 at 06:15:13AM +0000, Christophe Leroy wrote:
>>
>>
>> Le 03/05/2023 à 22:02, Tom Rini a écrit :
>>> On Thu, Jan 26, 2023 at 07:17:48PM +0100, Christophe Leroy wrote:
>>>
>>>> When doing a build with C=2, the following failure is encountered on
>>>> several files:
>>>>
>>>>  CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: note: in included file (through 
>>>> arch/powerpc/include/asm/global_data.h, include/init.h):
>>>>include/asm-generic/global_data.h:494:21: error: Expected ) in function 
>>>> declarator
>>>>include/asm-generic/global_data.h:494:21: error: got (
>>>>
>>>> And because of the error, the interesting part which are the
>>>> warnings don't appear. This is because static_assert() is defined
>>>> only when __CHECKER__ is not defined.
>>>>
>>>> Add a stub when __CHECKER__ is defined. With that fix, the expected
>>>> warnings are now seen:
>>>>
>>>>  CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:expected unsigned int 
>>>> const volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:expected unsigned int 
>>>> const volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:expected unsigned int 
>>>> const volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:expected unsigned int 
>>>> const volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:expected unsigned int 
>>>> volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:expected unsigned int 
>>>> volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:expected unsigned int 
>>>> volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17:expected unsigned int 
>>>> volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9:expected unsigned int 
>>>> volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:79:9: warning: incorrect type in 
>>>> argument 1 (different address spaces)
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:79:9:expected unsigned int 
>>>> volatile [noderef]  *addr
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:79:9:got unsigned int *
>>>>arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:131:22: warning: incorrect type

Re: [PATCH 05/10] powerpc: mpc8xx: Reorganise init RAM

2023-05-04 Thread Christophe Leroy



Le 04/05/2023 à 12:07, Joakim Tjernlund a écrit :
> On Thu, 2023-05-04 at 10:56 +0200, Christophe Leroy wrote:
>> Using SMC relocation microcode patch or USB-SOF microcode patch
>> will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
>> to 0x3000.
>>
>> At the time being, init RAM is setup to use 0x2800-0x2e00, but
>> the stack pointer goes beyond 0x2800 and even beyond 0x2400.
>>
>> For the time being we are not going to use any microcode patch
>> that uses memory about 0x3000, so reorganise setup to use:
>> - 0x2800 - 0x2e00 for init malloc and global data and CPM buffers
>> - 0x3000 - 0x3c00 for init stack
>>
>> For more details about CPM dual port ram, see
>> commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram")
>>
>> Signed-off-by: Christophe Leroy 
>> ---
>>   arch/powerpc/cpu/mpc8xx/start.S|  9 +
>>   arch/powerpc/include/asm/cpm_8xx.h | 16 
>>   include/configs/cmpc885.h  |  1 +
>>   include/configs/mcr3000.h  |  1 +
>>   4 files changed, 15 insertions(+), 12 deletions(-)
>>
>> diff --git a/arch/powerpc/cpu/mpc8xx/start.S 
>> b/arch/powerpc/cpu/mpc8xx/start.S
>> index 0aa73fca12..41f12021c8 100644
>> --- a/arch/powerpc/cpu/mpc8xx/start.S
>> +++ b/arch/powerpc/cpu/mpc8xx/start.S
>> @@ -141,14 +141,15 @@ in_flash:
>>  mtspr   DER, r2
>>   
>>  /* set up the stack on top of internal DPRAM */
>> +lis r1, CFG_SYS_INIT_SP@h
>> +ori r1, r1, CFG_SYS_INIT_SP@l
>> +stwur0, -4(r1)
>> +stwur0, -4(r1)
> 
> Changing stack ptr incrementally is likely to confuse gdb which may do stack 
> accesses if you single step
> over this code. It is better to setup the stack in a different reg and the 
> just assign r1 when done.
> 

Ok, I can change that. But we are at the very begining and r1 is 
undefined until now so it shouldn't matter.

Christophe

[PATCH 09/10] serial, mpc8xx: Take parameter RAM relocation into account

2023-05-04 Thread Christophe Leroy

Instead of inhibiting parameter RAM relacation, take
into account the configured one.

It means INIT_TRX command cannot be used and must be done
manually as explained in the microcode patch application note.

Signed-off-by: Christophe Leroy 
---
 drivers/serial/serial_mpc8xx.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index beffc34d11..d82760c7f1 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -83,6 +83,7 @@ static int serial_mpc8xx_probe(struct udevice *dev)
immap_t __iomem *im = (immap_t __iomem *)CONFIG_SYS_IMMR;
smc_t __iomem *sp;
smc_uart_t __iomem *up;
+   u16 smc_rpbase;
cpm8xx_t __iomem *cp = &(im->im_cpm);
struct serialbuffer __iomem *rtx;
 
@@ -90,8 +91,10 @@ static int serial_mpc8xx_probe(struct udevice *dev)
 
sp = cp->cp_smc + SMC_INDEX;
up = (smc_uart_t __iomem *)>cp_dpmem[PROFF_SMC];
-   /* Disable relocation */
-   out_be16(>smc_rpbase, 0);
+
+   smc_rpbase = in_be16(>smc_rpbase);
+   if (smc_rpbase)
+   up = (smc_uart_t __iomem *)>cp_dpmem[smc_rpbase];
 
/* Disable transmitter/receiver. */
clrbits_be16(>smc_smcmr, SMCMR_REN | SMCMR_TEN);
@@ -154,15 +157,12 @@ static int serial_mpc8xx_probe(struct udevice *dev)
out_be16(>smc_maxidl, CONFIG_SYS_MAXIDLE);
out_be32(>rxindex, 0);
 
-   /* Initialize Tx/Rx parameters. */
-   while (in_be16(>cp_cpcr) & CPM_CR_FLG)  /* wait if cp is busy */
-   ;
-
-   out_be16(>cp_cpcr,
-mk_cr_cmd(CPM_CR_CH_SMC, CPM_CR_INIT_TRX) | CPM_CR_FLG);
-
-   while (in_be16(>cp_cpcr) & CPM_CR_FLG)  /* wait if cp is busy */
-   ;
+   out_be32(>smc_rstate, 0);
+   out_be32(>smc_tstate, 0);
+   out_be16(>smc_rbptr, CPM_SERIAL_BASE);
+   out_be16(>smc_tbptr, CPM_SERIAL_BASE + sizeof(cbd_t));
+   out_be16(>smc_brkcr, 1);
+   out_be16(>smc_brkec, 0);
 
/* Enable transmitter/receiver. */
setbits_be16(>smc_smcmr, SMCMR_REN | SMCMR_TEN);
-- 
2.39.2

[PATCH 05/10] powerpc: mpc8xx: Reorganise init RAM

2023-05-04 Thread Christophe Leroy

Using SMC relocation microcode patch or USB-SOF microcode patch
will disable DPRAM memory from 0x2000 to 0x2400 and from 0x2f00
to 0x3000.

At the time being, init RAM is setup to use 0x2800-0x2e00, but
the stack pointer goes beyond 0x2800 and even beyond 0x2400.

For the time being we are not going to use any microcode patch
that uses memory about 0x3000, so reorganise setup to use:
- 0x2800 - 0x2e00 for init malloc and global data and CPM buffers
- 0x3000 - 0x3c00 for init stack

For more details about CPM dual port ram, see
commit b1d62424cb ("powerpc: mpc8xx: redistribute data in CPM dpram")

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/start.S|  9 +
 arch/powerpc/include/asm/cpm_8xx.h | 16 
 include/configs/cmpc885.h  |  1 +
 include/configs/mcr3000.h  |  1 +
 4 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/start.S b/arch/powerpc/cpu/mpc8xx/start.S
index 0aa73fca12..41f12021c8 100644
--- a/arch/powerpc/cpu/mpc8xx/start.S
+++ b/arch/powerpc/cpu/mpc8xx/start.S
@@ -141,14 +141,15 @@ in_flash:
mtspr   DER, r2
 
/* set up the stack on top of internal DPRAM */
+   lis r1, CFG_SYS_INIT_SP@h
+   ori r1, r1, CFG_SYS_INIT_SP@l
+   stwur0, -4(r1)
+   stwur0, -4(r1)
+
lis r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@h
ori r3, r3, (CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE)@l
-   stw r0, -4(r3)
-   stw r0, -8(r3)
-   addir1, r3, -8
 
bl  board_init_f_alloc_reserve
-   addir1, r3, -8
 
/* Zeroise the CPM dpram */
lis r4, CONFIG_SYS_IMMR@h
diff --git a/arch/powerpc/include/asm/cpm_8xx.h 
b/arch/powerpc/include/asm/cpm_8xx.h
index 09c24efd91..77ffcce5a6 100644
--- a/arch/powerpc/include/asm/cpm_8xx.h
+++ b/arch/powerpc/include/asm/cpm_8xx.h
@@ -51,14 +51,14 @@
 /*
  * DPRAM defines and allocation functions
  */
-#define CPM_SERIAL_BASE0x1800
-#define CPM_I2C_BASE   0x1820
-#define CPM_SPI_BASE   0x1840
-#define CPM_FEC_BASE   0x1860
-#define CPM_SERIAL2_BASE   0x18e0
-#define CPM_SCC_BASE   0x1900
-#define CPM_POST_BASE  0x1980
-#define CPM_WLKBD_BASE 0x1a00
+#define CPM_SERIAL_BASE0x0800
+#define CPM_I2C_BASE   0x0820
+#define CPM_SPI_BASE   0x0840
+#define CPM_FEC_BASE   0x0860
+#define CPM_SERIAL2_BASE   0x08E0
+#define CPM_SCC_BASE   0x0900
+#define CPM_POST_BASE  0x0980
+#define CPM_WLKBD_BASE 0x0a00
 
 #define BD_IIC_START   ((uint) 0x0400) /* <- please use CPM_I2C_BASE !! */
 
diff --git a/include/configs/cmpc885.h b/include/configs/cmpc885.h
index b76230e9a4..545365e112 100644
--- a/include/configs/cmpc885.h
+++ b/include/configs/cmpc885.h
@@ -9,6 +9,7 @@
 /* Definitions for initial stack pointer and data area (in DPRAM) */
 #define CFG_SYS_INIT_RAM_ADDR  (CONFIG_SYS_IMMR + 0x2800)
 #define CFG_SYS_INIT_RAM_SIZE  (0x2e00 - 0x2800)
+#define CFG_SYS_INIT_SP(CONFIG_SYS_IMMR + 0x3c00)
 
 /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */
 #define CFG_SYS_SDRAM_BASE 0x
diff --git a/include/configs/mcr3000.h b/include/configs/mcr3000.h
index 6b16b050ff..a07761fdbb 100644
--- a/include/configs/mcr3000.h
+++ b/include/configs/mcr3000.h
@@ -14,6 +14,7 @@
 /* Definitions for initial stack pointer and data area (in DPRAM) */
 #define CFG_SYS_INIT_RAM_ADDR  (CONFIG_SYS_IMMR + 0x2800)
 #defineCFG_SYS_INIT_RAM_SIZE   (0x2e00 - 0x2800)
+#define CFG_SYS_INIT_SP(CONFIG_SYS_IMMR + 0x3c00)
 
 /* RAM configuration (note that CFG_SYS_SDRAM_BASE must be zero) */
 #defineCFG_SYS_SDRAM_BASE  0x
-- 
2.39.2

[PATCH 08/10] spi, mpc8xx: Take parameter RAM relocation into account

2023-05-04 Thread Christophe Leroy

Instead of inhibiting parameter RAM relocation, take it into account.

Signed-off-by: Christophe Leroy 
---
 drivers/spi/mpc8xx_spi.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index 734b0751a9..5c8d760935 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -52,10 +52,12 @@ static int mpc8xx_spi_probe(struct udevice *dev)
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
cpm8xx_t __iomem *cp = >im_cpm;
spi_t __iomem *spi = (spi_t __iomem *)>cp_dpmem[PROFF_SPI];
+   u16 spi_rpbase;
cbd_t __iomem *tbdf, *rbdf;
 
-   /* Disable relocation */
-   out_be16(>spi_rpbase, 0x1d80);
+   spi_rpbase = in_be16(>spi_rpbase);
+   if (spi_rpbase)
+   spi = (spi_t __iomem *)>cp_dpmem[spi_rpbase];
 
 /* 1 */
/* Initialize the parameter ram.
-- 
2.39.2

[PATCH 07/10] powerpc: mpc8xx: Add SMC relocation CPM microcode

2023-05-04 Thread Christophe Leroy

In order to use QMC mode in the CPM, a SCC requires more space
in parameter RAM.

After SCC1 there is I2C parameter RAM and after SCC2 there is
SPI parameter RAM. MPC866 and MPC885 can already relocate I2C and.
SPI parameter RAM.

But in order to free space after SCC3 and SCC4, SMC1 and SMC2
need to be relocated. In order to do so, a CPM microcode patch
is required.

Binary data for that patch is copied from Linux kernel.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Kconfig  |  20 +
 arch/powerpc/cpu/mpc8xx/Makefile |   1 +
 arch/powerpc/cpu/mpc8xx/micropatch_smc.c | 105 +++
 3 files changed, 126 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_smc.c

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 52caf06aac..bd2af8dc10 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -53,6 +53,26 @@ config USB_SOF_UCODE_PATCH
  Although the data is received correctly, the CRC result
  will be corrupted.
 
+config SMC_UCODE_PATCH
+   bool "SMC relocation patch"
+   help
+ This microcode relocates SMC1 and SMC2 parameter RAMs to allow
+ extended parameter RAM for SCC3 and SCC4 (ex: for QMC mode)
+
+config SMC1_RPBASE
+   hex "SMC1 relocation offset"
+   depends on SMC_UCODE_PATCH
+   default 0x1e80
+   help
+ Offset of SMC1 parameter RAM to be written to RPBASE register.
+
+config SMC2_RPBASE
+   hex "SMC2 relocation offset"
+   depends on SMC_UCODE_PATCH
+   default 0x1f80
+   help
+ Offset of SMC2 parameter RAM to be written to RPBASE register.
+
 endchoice
 
 comment "Specific commands"
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 5a6561e024..28a21eeb76 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -13,3 +13,4 @@ obj-y += interrupts.o
 obj-y  += speed.o
 obj-y  += cache.o
 obj-$(CONFIG_USB_SOF_UCODE_PATCH) += micropatch_usb_sof.o
+obj-$(CONFIG_SMC_UCODE_PATCH) += micropatch_smc.o
diff --git a/arch/powerpc/cpu/mpc8xx/micropatch_smc.c 
b/arch/powerpc/cpu/mpc8xx/micropatch_smc.c
new file mode 100644
index 00..819211f2db
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xx/micropatch_smc.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/*
+ * Microcode patches for the CPM as supplied by Motorola.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+static uint patch_2000[] = {
+   0x3fff, 0x3ffd, 0x3ffb, 0x3ff9,
+   0x5fefeff8, 0x5f91eff8, 0x3ff3, 0x3ff1,
+   0x3a11e710, 0xedf0ccb9, 0xf318ed66, 0x7f0e5fe2,
+   0x7fedbb38, 0x3afe7468, 0x7fedf4d8, 0x8ffbb92d,
+   0xb83b77fd, 0xb0bb5eb9, 0xdfda7fed, 0x90bde74d,
+   0x6f0dcbd3, 0xe7decfed, 0xcb50cfed, 0xcfeddf6d,
+   0x914d4f74, 0x5eaedfcb, 0x9ee0e7df, 0xefbb6ffb,
+   0xe7ef7f0e, 0x9ee57fed, 0xebb7effa, 0xeb30affb,
+   0x7fea90b3, 0x7e0cf09f, 0xb318, 0x5fffdfff,
+   0xac35efea, 0x7fce1fc1, 0xe2ff5fbd, 0xaffbe2ff,
+   0x5fbfaffb, 0xf9a87d0f, 0xaef8770f, 0x7d0fb0a2,
+   0xeffbbfff, 0xcfef5fba, 0x7d0fbfff, 0x5fba4cf8,
+   0x7fddd09b, 0x49f847fd, 0x7efdf097, 0x7fedfffd,
+   0x7dfdf093, 0xef7e7e1e, 0x5fba7f0e, 0x3a11e710,
+   0xedf0cc87, 0xfb18ad0a, 0x1f85bbb8, 0x74283b7e,
+   0x7375e4bb, 0x2ab64fb8, 0x5c7de4bb, 0x32fdffbf,
+   0x5f0843f8, 0x7ce3e1bb, 0xe74f7ded, 0x6f0f4fe8,
+   0xc7ba32be, 0x73f2efeb, 0x600b4f78, 0xe5bb760b,
+   0x5388aef8, 0x4ef80b6a, 0xcfef9ee5, 0xabf8751f,
+   0xefef5b88, 0x741f4fe8, 0x751e760d, 0x7fdb70dd,
+   0x741cafce, 0xefcc7fce, 0x751e7088, 0x741ce7bb,
+   0x334ecfed, 0xafdbefeb, 0xe5bb760b, 0x53ceaef8,
+   0xafe8e7eb, 0x4bf8771e, 0x7e007fed, 0x4fcbe2cc,
+   0x7fbc3085, 0x7b0f7a0f, 0x34b177fd, 0xb0e75e93,
+   0xdf313e3b, 0xaf78741f, 0x741f30cc, 0xcfef5f08,
+   0x741f3e88, 0xafb8771e, 0x5f437fed, 0x0bafe2cc,
+   0x741ccfec, 0xe5ca53a9, 0x6fcb4f74, 0x5e89df27,
+   0x2a923d14, 0x4b8fdf0c, 0x751f741c, 0x6c1eeffa,
+   0xefea7fce, 0x6ffc309a, 0xefec3fca, 0x308fdf0a,
+   0xadf85e7a, 0xaf7daefd, 0x5e7adf0a, 0x5e7aafdd,
+   0x761f1088, 0x1e7c7efd, 0x3089fffe, 0x4908fb18,
+   0x5fffdfff, 0xafbbf0f7, 0x4ef85f43, 0xadf81489,
+   0x7a0f7089, 0xcfef5089, 0x7a0fdf0c, 0x5e7cafed,
+   0xbc6e780f, 0xefef780f, 0xefef790f, 0xa7f85eeb,
+   0xffef790f, 0xefef790f, 0x1489df0a, 0x5e7aadfd,
+   0x5f09fffb, 0xe79aded9, 0xeff96079, 0x607ae79a,
+   0xded8eff9, 0x60795edb, 0x607acfef, 0xefefefdf,
+   0xefbfef7f, 0xeeffedff, 0xebffe7ff, 0xafefafdf,
+   0xafbfaf7f, 0xaeffadff, 0xabffa7ff, 0x6fef6fdf,
+   0x6fbf6f7f, 0x6eff6dff, 0x6bff67ff, 0x2fef2fdf,
+   0x2fbf2f7f, 0x2eff2dff, 0x2bff27ff, 0x4e08fd1f,
+   0xe5ff6e0f, 0xaff87eef, 0x7e0ffdef, 0xf11f6079,
+   0xabf8f51e, 0x7e0af11c, 0x37cfae16, 0x7fec909a,
+   0xadf8

[PATCH 04/10] powerpc: mpc8xx: CPM parameter RAM can be anywhere

2023-05-04 Thread Christophe Leroy

With relocation, CPM parameter RAM can be anywhere in the
dual port RAM, so don't split dual port RAM.

Remove dparam and dparam16 members of struct comm_proc

PROFF_XXX become offsets from the start of dual port RAM,
then they are now consistant with the offsets in RPBASE
registers.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/cpu.c|  2 +-
 arch/powerpc/include/asm/cpm_8xx.h   | 18 +-
 arch/powerpc/include/asm/immap_8xx.h |  8 +---
 drivers/serial/serial_mpc8xx.c   |  2 +-
 drivers/spi/mpc8xx_spi.c |  2 +-
 5 files changed, 13 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c
index 9b587fbbe8..56383cecde 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu.c
@@ -127,7 +127,7 @@ static int check_CPU(long clock, uint pvr, uint immr)
return -1;
 
k = (immr << 16) |
-   in_be16(>im_cpm.cp_dparam16[PROFF_REVNUM / sizeof(u16)]);
+   in_be16((u16 __iomem *)>im_cpm.cp_dpmem[PROFF_REVNUM]);
 
/*
 * Some boards use sockets so different CPUs can be used.
diff --git a/arch/powerpc/include/asm/cpm_8xx.h 
b/arch/powerpc/include/asm/cpm_8xx.h
index 85903d2108..09c24efd91 100644
--- a/arch/powerpc/include/asm/cpm_8xx.h
+++ b/arch/powerpc/include/asm/cpm_8xx.h
@@ -92,15 +92,15 @@ typedef struct cpm_buf_desc {
 
 /* Parameter RAM offsets.
 */
-#define PROFF_SCC1 ((uint)0x)
-#define PROFF_IIC  ((uint)0x0080)
-#define PROFF_REVNUM   ((uint)0x00b0)
-#define PROFF_SCC2 ((uint)0x0100)
-#define PROFF_SPI  ((uint)0x0180)
-#define PROFF_SCC3 ((uint)0x0200)
-#define PROFF_SMC1 ((uint)0x0280)
-#define PROFF_SCC4 ((uint)0x0300)
-#define PROFF_SMC2 ((uint)0x0380)
+#define PROFF_SCC1 ((uint)0x1c00)
+#define PROFF_IIC  ((uint)0x1c80)
+#define PROFF_REVNUM   ((uint)0x1cb0)
+#define PROFF_SCC2 ((uint)0x1d00)
+#define PROFF_SPI  ((uint)0x1d80)
+#define PROFF_SCC3 ((uint)0x1e00)
+#define PROFF_SMC1 ((uint)0x1e80)
+#define PROFF_SCC4 ((uint)0x1f00)
+#define PROFF_SMC2 ((uint)0x1f80)
 
 /* Define enough so I can at least use the serial port as a UART.
  */
diff --git a/arch/powerpc/include/asm/immap_8xx.h 
b/arch/powerpc/include/asm/immap_8xx.h
index 3999a02b9c..cf1300f6e2 100644
--- a/arch/powerpc/include/asm/immap_8xx.h
+++ b/arch/powerpc/include/asm/immap_8xx.h
@@ -437,13 +437,7 @@ typedef struct comm_proc {
 * depending upon the devices used and options chosen.
 * Some processors don't have all of it populated.
 */
-   u_char  cp_dpmem[0x1C00];   /* BD / Data / ucode */
-
-   /* Parameter RAM */
-   union {
-   u_char  cp_dparam[0x400];
-   u16 cp_dparam16[0x200];
-   };
+   u_char  cp_dpmem[0x2000];   /* BD / Data / ucode / Param RAM */
 } cpm8xx_t;
 
 /* Internal memory map.
diff --git a/drivers/serial/serial_mpc8xx.c b/drivers/serial/serial_mpc8xx.c
index b8d6a81b65..beffc34d11 100644
--- a/drivers/serial/serial_mpc8xx.c
+++ b/drivers/serial/serial_mpc8xx.c
@@ -89,7 +89,7 @@ static int serial_mpc8xx_probe(struct udevice *dev)
/* initialize pointers to SMC */
 
sp = cp->cp_smc + SMC_INDEX;
-   up = (smc_uart_t __iomem *)>cp_dparam[PROFF_SMC];
+   up = (smc_uart_t __iomem *)>cp_dpmem[PROFF_SMC];
/* Disable relocation */
out_be16(>smc_rpbase, 0);
 
diff --git a/drivers/spi/mpc8xx_spi.c b/drivers/spi/mpc8xx_spi.c
index d84d7aea88..734b0751a9 100644
--- a/drivers/spi/mpc8xx_spi.c
+++ b/drivers/spi/mpc8xx_spi.c
@@ -51,7 +51,7 @@ static int mpc8xx_spi_probe(struct udevice *dev)
 {
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
cpm8xx_t __iomem *cp = >im_cpm;
-   spi_t __iomem *spi = (spi_t __iomem *)>cp_dparam[PROFF_SPI];
+   spi_t __iomem *spi = (spi_t __iomem *)>cp_dpmem[PROFF_SPI];
cbd_t __iomem *tbdf, *rbdf;
 
/* Disable relocation */
-- 
2.39.2

[PATCH 06/10] powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATA

2023-05-04 Thread Christophe Leroy

MPC885 CPU has the following ERRATA:

When the USB controller is configured in Host mode, and the
SOF generation (SFTE=1 in USMOD register) is being used,
there may be false CRC error indication in other SCCs.
Although the data is received correctly, the CRC result
will be corrupted.

Add capability to load the related microcode to fix it.
The microcode binary data is copied from Linux kernel.

Other microcode will be added in following patch so make it
a Kconfig choice.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Kconfig  | 25 +
 arch/powerpc/cpu/mpc8xx/Makefile |  1 +
 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c | 38 
 arch/powerpc/include/asm/cpm_8xx.h   |  7 
 4 files changed, 71 insertions(+)
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index bfd903bc10..52caf06aac 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -30,6 +30,31 @@ config MPC885
 
 endchoice
 
+choice
+   prompt "Microcode patch selection"
+   default NO_UCODE_PATCH
+   help
+ This allows loading of CPM microcode.
+
+ Only one microcode can be loaded at a time.
+
+config NO_UCODE_PATCH
+   bool "None"
+
+config USB_SOF_UCODE_PATCH
+   bool "USB SOF patch"
+   depends on MPC885
+   help
+ This microcode fixes CPM15 errata:
+
+ When the USB controller is configured in Host mode, and the
+ SOF generation (SFTE=1 in USMOD register) is being used,
+ there may be false CRC error indication in other SCCs.
+ Although the data is received correctly, the CRC result
+ will be corrupted.
+
+endchoice
+
 comment "Specific commands"
 
 config CMD_IMMAP
diff --git a/arch/powerpc/cpu/mpc8xx/Makefile b/arch/powerpc/cpu/mpc8xx/Makefile
index 8918a26288..5a6561e024 100644
--- a/arch/powerpc/cpu/mpc8xx/Makefile
+++ b/arch/powerpc/cpu/mpc8xx/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_CMD_IMMAP) += immap.o
 obj-y  += interrupts.o
 obj-y  += speed.o
 obj-y  += cache.o
+obj-$(CONFIG_USB_SOF_UCODE_PATCH) += micropatch_usb_sof.o
diff --git a/arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c 
b/arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c
new file mode 100644
index 00..e99cd492ca
--- /dev/null
+++ b/arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0
+
+/*
+ * Microcode patches for the CPM as supplied by Motorola.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/*
+ *  USB SOF patch arrays.
+ */
+static uint patch_2000[] = {
+   0x7fff, 0x7ffd, 0x7ffb, 0x49f7ba5b,
+   0xba383ffb, 0xf9b8b46d, 0xe5ab4e07, 0xaf77bffe,
+   0x3f7bbf79, 0xba5bba38, 0xe7676076, 0x6075
+};
+
+static uint patch_2f00[] = {
+   0x3030304c, 0xcab9e441, 0xa1aaf220
+};
+
+void cpm_load_patch(cpm8xx_t *cp)
+{
+   out_be16(>cp_rccr, 0);
+
+   memcpy_toio(cp->cp_dpmem, patch_2000, sizeof(patch_2000));
+   memcpy_toio(cp->cp_dpmem + 0xf00, patch_2f00, sizeof(patch_2f00));
+
+   out_be16(>cp_cpmcr1, 0);
+   out_be16(>cp_cpmcr2, 0);
+   out_be16(>cp_cpmcr3, 0);
+   out_be16(>cp_cpmcr4, 0);
+
+   out_be16(>cp_rccr, 9);
+}
diff --git a/arch/powerpc/include/asm/cpm_8xx.h 
b/arch/powerpc/include/asm/cpm_8xx.h
index 77ffcce5a6..41c79ca7b1 100644
--- a/arch/powerpc/include/asm/cpm_8xx.h
+++ b/arch/powerpc/include/asm/cpm_8xx.h
@@ -684,4 +684,11 @@ void irq_install_handler(int vec, void (*handler)(void *), 
void *dev_id);
 #define CICR_HP_MASK   ((uint)0x1f00)  /* Hi-pri int. */
 #define CICR_IEN   ((uint)0x0080)  /* Int. enable */
 #define CICR_SPS   ((uint)0x0001)  /* SCC Spread */
+
+#ifdef CONFIG_NO_UCODE_PATCH
+static inline void cpm_load_patch(cpm8xx_t *cp) { }
+#else
+void cpm_load_patch(cpm8xx_t *cp);
+#endif
+
 #endif /* __CPM_8XX__ */
-- 
2.39.2

[PATCH 03/10] board: cssi: Load CMPC885's motherboard FPGA earlier

2023-05-04 Thread Christophe Leroy

In order to know the motherboard type earlier, perform I/O ports
initialisation and FPGA loading in board_early_init_f() instead
of board_early_init_r().

This is needed to be able to load mpc8xx CPM microcode base on
motherboard type and before starting to use the CPM.

Console is not available yet so remove the printfs.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 25 +
 configs/CMPC885_defconfig|  1 -
 2 files changed, 5 insertions(+), 21 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 02da4d9a87..40128f170a 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -586,13 +586,8 @@ void iop_setup_miae(void)
setbits_be32(>cp_peso, 0x00031980);
 }
 
-int board_early_init_f(void)
-{
-   return 0;
-}
-
 /* Specific board initialization */
-int board_early_init_r(void)
+int board_early_init_f(void)
 {
immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
iop8xx_t __iomem *iop = >im_ioport;
@@ -864,8 +859,6 @@ int board_early_init_r(void)
 
/* Check if fpga firmware is loaded */
if (!(in_be32(>cp_pedat) & 0x0001)) {
-   printf("Reloading FPGA firmware.\n");
-
/* Load fpga firmware */
/* Activate PROG_FPGA_FIRMWARE for 1 usec */
clrbits_be32(>cp_pedat, 0x0002);
@@ -874,12 +867,8 @@ int board_early_init_r(void)
 
/* Wait 200 msec and check DONE_FPGA_FIRMWARE */
mdelay(200);
-   if (!(in_be32(>cp_pedat) & 0x0001)) {
-   for (;;) {
-   printf("error loading firmware.\n");
-   mdelay(500);
-   }
-   }
+   if (!(in_be32(>cp_pedat) & 0x0001))
+   hang();
 
/* Send a reset signal and wait for 20 msec */
clrbits_be16(ADDR_CPLD_R_RESET, R_RST_STATUS);
@@ -889,12 +878,8 @@ int board_early_init_r(void)
 
/* Wait 300 msec and check the reset state */
mdelay(300);
-   if (!(in_be16(ADDR_CPLD_R_RESET) & R_RESET_STATUS)) {
-   for (;;) {
-   printf("Could not reset FPGA.\n");
-   mdelay(500);
-   }
-   }
+   if (!(in_be16(ADDR_CPLD_R_RESET) & R_RESET_STATUS))
+   hang();
 
iop_setup_common();
} else {
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index b1df954bee..c1031b7e3a 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -30,7 +30,6 @@ CONFIG_AUTOBOOT_STOP_STR_ENABLE=y
 
CONFIG_AUTOBOOT_STOP_STR_SHA256="4813494d137e1631bba301d5acab6e7bb7aa74ce1185d456565ef51d737677b2"
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run flashboot"
-CONFIG_BOARD_EARLY_INIT_R=y
 CONFIG_MISC_INIT_R=y
 CONFIG_HUSH_PARSER=y
 # CONFIG_CMD_BDI is not set
-- 
2.39.2

[PATCH 10/10] board: cssi: Activate SMC relocation on CMPC885 board for MIAE device

2023-05-04 Thread Christophe Leroy

When CMPC885 board is used for MIAE device, SCC2 SCC3 and SMC2
are used for serial lines. Therefore only SCC4 is available for
handling the TDM line.

In order to use SCC4 in QMC mode without loosing SMC2, SMC2
must be relocated.

Activate SMC relocation and relocate SMC2 at offset 0x1fc0 which
is unused.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 4 
 configs/CMPC885_defconfig| 2 ++
 2 files changed, 6 insertions(+)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 40128f170a..5e6aa8b8cf 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -451,6 +452,9 @@ void iop_setup_miae(void)
/* Wait reset on FPGA_F */
udelay(100);
 
+   /* Load CPM relocation code */
+   cpm_load_patch(cp);
+
/* Set the front panel LED color to red */
clrbits_8((unsigned char  __iomem *)CONFIG_FPGA_BASE + 0x44, 0x02);
 
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index c1031b7e3a..8e64c7b278 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -9,6 +9,8 @@ CONFIG_ENV_ADDR=0x40004000
 CONFIG_MPC8xx=y
 CONFIG_TARGET_CMPC885=y
 CONFIG_MPC885=y
+CONFIG_SMC_UCODE_PATCH=y
+CONFIG_SMC2_RPBASE=0x1fc0
 CONFIG_CMD_IMMAP=y
 CONFIG_SYS_SIUMCR=0x0062
 CONFIG_SYS_TBSCR=0x00C3
-- 
2.39.2

[PATCH 00/10] Misc fixes + 8xx CPM relocation

2023-05-04 Thread Christophe Leroy

This series adds misc fixes for cssi boards and activates
CPM relocation in order to enable the use of SCC4 in
QMC (QUICC Multi-Channel) mode.

Christophe Leroy (10):
  board: cssi: Remove duplicated FPGA loading sequence on CMPC885
  board: cssi: Remove stale macro from cmpcpro.c
  board: cssi: Load CMPC885's motherboard FPGA earlier
  powerpc: mpc8xx: CPM parameter RAM can be anywhere
  powerpc: mpc8xx: Reorganise init RAM
  powerpc: mpc885: Add CPM USB-SOF microcode for CPM15 ERRATA
  powerpc: mpc8xx: Add SMC relocation CPM microcode
  spi, mpc8xx: Take parameter RAM relocation into account
  serial, mpc8xx: Take parameter RAM relocation into account
  board: cssi: Activate SMC relocation on CMPC885 board for MIAE device

 arch/powerpc/cpu/mpc8xx/Kconfig  |  45 
 arch/powerpc/cpu/mpc8xx/Makefile |   2 +
 arch/powerpc/cpu/mpc8xx/cpu.c|   2 +-
 arch/powerpc/cpu/mpc8xx/micropatch_smc.c | 105 +++
 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c |  38 +++
 arch/powerpc/cpu/mpc8xx/start.S  |   9 +-
 arch/powerpc/include/asm/cpm_8xx.h   |  41 +---
 arch/powerpc/include/asm/immap_8xx.h |   8 +-
 board/cssi/cmpc885/cmpc885.c |  43 ++--
 board/cssi/cmpcpro/cmpcpro.c |   5 -
 configs/CMPC885_defconfig|   3 +-
 drivers/serial/serial_mpc8xx.c   |  24 ++---
 drivers/spi/mpc8xx_spi.c |   8 +-
 include/configs/cmpc885.h|   1 +
 include/configs/mcr3000.h|   1 +
 15 files changed, 251 insertions(+), 84 deletions(-)
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_smc.c
 create mode 100644 arch/powerpc/cpu/mpc8xx/micropatch_usb_sof.c

-- 
2.39.2

[PATCH 01/10] board: cssi: Remove duplicated FPGA loading sequence on CMPC885

2023-05-04 Thread Christophe Leroy

A duplicated FPGA loading sequence appears after FPGA reset.

Remove it.

Fixes: dac3c6f625 ("board: cssi: Add new board MCR3000_2G")
Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 14 --
 1 file changed, 14 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 540b9d3c78..02da4d9a87 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -896,20 +896,6 @@ int board_early_init_r(void)
}
}
 
-   /* is FPGA firmware loaded ? */
-   if (!(in_be32(>cp_pedat) & 0x0001)) {
-   printf("Reloading FPGA firmware\n");
-
-   /* Load FPGA firmware */
-   /* Activate PROG_FPGA_FIRMWARE for 1 usec */
-   clrbits_be32(>cp_pedat, 0x0002);
-   udelay(1);
-   setbits_be32(>cp_pedat, 0x0002);
-
-   /* Wait 200ms before checking DONE_FPGA_FIRMWARE */
-   mdelay(200);
-   }
-
iop_setup_common();
} else {
iop_setup_cmpc885();
-- 
2.39.2

[PATCH 02/10] board: cssi: Remove stale macro from cmpcpro.c

2023-05-04 Thread Christophe Leroy

Three unused macros were left over. Remove them.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpcpro/cmpcpro.c | 5 -
 1 file changed, 5 deletions(-)

diff --git a/board/cssi/cmpcpro/cmpcpro.c b/board/cssi/cmpcpro/cmpcpro.c
index 3e9ba6a4cc..8a30c48e35 100644
--- a/board/cssi/cmpcpro/cmpcpro.c
+++ b/board/cssi/cmpcpro/cmpcpro.c
@@ -397,8 +397,3 @@ void ft_board_setup_phy3(void)
 
setbits_be32(>qepio.ioport[2].pdat, 0x0400);
 }
-
-#define ADDR_FPGA_R_BASE   ((unsigned char  __iomem 
*)CONFIG_FPGA_BASE)
-#define ADDR_FPGA_R_ALARMES_IN ((unsigned char  __iomem 
*)CONFIG_FPGA_BASE + 0x31)
-#define ADDR_FPGA_R_FAV((unsigned char  __iomem 
*)CONFIG_FPGA_BASE + 0x44)
-
-- 
2.39.2

Re: [PATCH] build_bug.h: Also define static_assert() when CHECKER is defined

2023-05-04 Thread Christophe Leroy



Le 03/05/2023 à 22:02, Tom Rini a écrit :
> On Thu, Jan 26, 2023 at 07:17:48PM +0100, Christophe Leroy wrote:
> 
>> When doing a build with C=2, the following failure is encountered on
>> several files:
>>
>>CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: note: in included file (through 
>> arch/powerpc/include/asm/global_data.h, include/init.h):
>>  include/asm-generic/global_data.h:494:21: error: Expected ) in function 
>> declarator
>>  include/asm-generic/global_data.h:494:21: error: got (
>>
>> And because of the error, the interesting part which are the
>> warnings don't appear. This is because static_assert() is defined
>> only when __CHECKER__ is not defined.
>>
>> Add a stub when __CHECKER__ is defined. With that fix, the expected
>> warnings are now seen:
>>
>>CHECK   arch/powerpc/cpu/mpc8xxx/fsl_lbc.c
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:expected unsigned int 
>> const volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:27:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:expected unsigned int 
>> const volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:32:45:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:expected unsigned int 
>> const volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:24:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:expected unsigned int 
>> const volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:35:40:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:expected unsigned int 
>> volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:67:17:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:expected unsigned int 
>> volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:68:17:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:expected unsigned int 
>> volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:72:17:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17:expected unsigned int 
>> volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:73:17:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9:expected unsigned int 
>> volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:78:9:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:79:9: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:79:9:expected unsigned int 
>> volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:79:9:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:131:22: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:131:22:expected unsigned int 
>> const volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:131:22:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:132:49: warning: incorrect type in 
>> argument 1 (different address spaces)
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:132:49:expected unsigned int 
>> const volatile [noderef]  *addr
>>  arch/powerpc/cpu/mpc8xxx/fsl_lbc.c:132:49:got unsigned int *
>>  arch/powerpc/cpu/mpc8xxx/

[GIT PULL] Please pull u-boot-mpc8xx

2023-04-29 Thread Christophe Leroy

Hi Tom,

This pull request adds support for the last CPU board from
CS GROUP France (previously CSSI).

That CPU board called CMPCPRO has a mpc8321E CPU (Family PQII PRO hence
its name) and can be plugged in place of the CMPC885 board.

In order to support that new board, the following changes are included
in this series:
- Make the mpc8xx watchdog driver more generic for reusing it
with mpc83xx
- Fix various small problems on mpc83xx platform
- Add a GPIO Driver for QE GPIOs
- Add support for mpc832x into mpc83xx SPI driver
- Refactor existing board code that will be shared with new board
- Add the new board

CI: https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/16153

Thanks
Christophe


The following changes since commit a25dcda452bf6a6de72764a8d990d72e5def643d:

   Revert "disk: Use a helper function to reduce duplication" 
(2023-04-03 10:43:37 -0400)

are available in the Git repository at:

   g...@source.denx.de:u-boot/custodians/u-boot-mpc8xx.git for-2023.07

for you to fetch changes up to 4d0c8db74d83e43dec4e7481b2d1e194f51d907b:

   board: cssi: Add CPU board CMPCPRO (2023-04-28 17:52:23 +0200)

----
Christophe Leroy (15):
   powerpc: mpc8xx: Migrate to CONFIG_SYS_CLK_FREQ
   watchdog: mpc8xx: Rename it mpc8xxx
   watchdog: mpc8xxx: Make it generic
   watchdog: mpc8xxx: Add support for mpc83xx
   powerpc: mpc832x: Fix reset word
   powerpc: mpc83xx: Fix soc.h
   powerpc: mpc83xx: Don't activate MMU when not necessary
   clk: mpc83xx: Fix clocks for mpc832x
   gpio: Add QUICC Engine GPIOs driver
   spi: mpc8xxx: Add support for SPI on mpc832x
   board: cssi: Migrate to hashed password
   board: cssi: Create dedicated file for common sources
   board: cssi: Refactor EEPROM read
   board: cssi: Move all mother board code into common.c
   board: cssi: Add CPU board CMPCPRO

  arch/powerpc/Kconfig |   2 +-
  arch/powerpc/cpu/mpc83xx/Kconfig |   5 +
  arch/powerpc/cpu/mpc83xx/cpu.c   |   2 +-
  arch/powerpc/cpu/mpc83xx/hrcw/Kconfig|   3 +-
  arch/powerpc/cpu/mpc83xx/start.S |   4 +-
  arch/powerpc/cpu/mpc8xx/Kconfig  |   6 +-
  arch/powerpc/cpu/mpc8xx/cpu_init.c   |   5 +-
  arch/powerpc/cpu/mpc8xx/speed.c  |   4 +-
  arch/powerpc/dts/Makefile|   1 +
  arch/powerpc/dts/cmpc885.dts |  12 +-
  arch/powerpc/dts/cmpcpro.dts | 189 +
  arch/powerpc/dts/mcr3000.dts |  20 +-
  arch/powerpc/include/asm/arch-mpc83xx/gpio.h |   5 +
  arch/powerpc/include/asm/arch-mpc83xx/soc.h  |  16 +-
  arch/powerpc/include/asm/mpc8xxx_spi.h   |   1 +
  board/cssi/MAINTAINERS   |   2 +
  board/cssi/cmpc885/Makefile  |   2 +-
  board/cssi/cmpc885/cmpc885.c | 241 ++--
  board/cssi/cmpcpro/Kconfig   |  26 ++
  board/cssi/cmpcpro/Makefile  |   8 +
  board/cssi/cmpcpro/cmpcpro.c | 404 
+++
  board/cssi/cmpcpro/cmpcpro.env   |   8 +
  board/cssi/cmpcpro/nand.c|  43 +++
  board/cssi/common/common.c   | 219 +++
  board/cssi/common/common.h   |  15 +
  board/cssi/mcr3000/mcr3000.c |  14 -
  configs/CMPC885_defconfig|   9 +-
  configs/CMPCPRO_defconfig| 209 ++
  configs/MCR3000_defconfig|  10 +-
  drivers/clk/mpc83xx_clk.c|   7 +
  drivers/gpio/Kconfig |  18 ++
  drivers/gpio/Makefile|   1 +
  drivers/gpio/qe_gpio.c   | 170 +++
  drivers/spi/mpc8xxx_spi.c|  13 +
  drivers/watchdog/Kconfig |  26 +-
  drivers/watchdog/Makefile|   2 +-
  drivers/watchdog/mpc8xx_wdt.c|  75 -
  drivers/watchdog/mpc8xxx_wdt.c   | 112 
  include/configs/cmpc885.h|   6 +
  include/configs/cmpcpro.h|  99 +++
  40 files changed, 1668 insertions(+), 346 deletions(-)
  create mode 100644 arch/powerpc/dts/cmpcpro.dts
  create mode 100644 board/cssi/cmpcpro/Kconfig
  create mode 100644 board/cssi/cmpcpro/Makefile
  create mode 100644 board/cssi/cmpcpro/cmpcpro.c
  create mode 100644 board/cssi/cmpcpro/cmpcpro.env
  create mode 100644 board/cssi/cmpcpro/nand.c
  create mode 100644 board/cssi/common/common.c
  create mode 100644 board/cssi/common/common.h
  create mode 100644 configs/CMPCPRO_defconfig
  create mode 100644 drivers/gpio/qe_gpio.c
  delete mode 100644 drivers/watchdog/mpc8xx_wdt.c
  create mode 100644 drivers/watchdog/mpc8xxx_wdt.c
  create mode 100644 include/configs/cmpcpro.h

[PATCH] board: cssi: Migrate to hashed password

2023-04-28 Thread Christophe Leroy

Use a hashed password instead of clear text in order to
improve board security.

Signed-off-by: Christophe Leroy 
---
Will be part of soon to come pull request

 configs/CMPC885_defconfig | 5 -
 configs/MCR3000_defconfig | 5 -
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index 1fe67d02f2..b1df954bee 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -23,8 +23,11 @@ CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_BOOTDELAY=5
 CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_FLUSH_STDIN=y
 CONFIG_AUTOBOOT_PROMPT="\nEnter password - autoboot in %d sec...\n"
-CONFIG_AUTOBOOT_DELAY_STR="root"
+CONFIG_AUTOBOOT_ENCRYPTION=y
+CONFIG_AUTOBOOT_STOP_STR_ENABLE=y
+CONFIG_AUTOBOOT_STOP_STR_SHA256="4813494d137e1631bba301d5acab6e7bb7aa74ce1185d456565ef51d737677b2"
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run flashboot"
 CONFIG_BOARD_EARLY_INIT_R=y
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index fc2bf5b2f9..d113ffe899 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -24,8 +24,11 @@ CONFIG_OF_BOARD_SETUP=y
 CONFIG_SYS_MONITOR_BASE=0x0400
 CONFIG_BOOTDELAY=5
 CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_FLUSH_STDIN=y
 CONFIG_AUTOBOOT_PROMPT="\nEnter password - autoboot in %d sec...\n"
-CONFIG_AUTOBOOT_DELAY_STR="root"
+CONFIG_AUTOBOOT_ENCRYPTION=y
+CONFIG_AUTOBOOT_STOP_STR_ENABLE=y
+CONFIG_AUTOBOOT_STOP_STR_SHA256="4813494d137e1631bba301d5acab6e7bb7aa74ce1185d456565ef51d737677b2"
 CONFIG_USE_BOOTCOMMAND=y
 CONFIG_BOOTCOMMAND="run flashboot"
 # CONFIG_HWCONFIG is not set
-- 
2.39.2

[PATCH v1 10/14] spi: mpc8xxx: Add support for SPI on mpc832x

2023-04-06 Thread Christophe Leroy

On mpc832x, SPI can be either handled by CPU or QE.
In order to work in CPU mode, bit 17 of SPMODE has to
be set to 1, that bit is called OP.

Also, data is located at a different place than the one expected
by the driver today. In 8 bits mode with REV set, data to be
transmitted is located in the most significant byte while
received data is located in second byte. So perform the
necessary shifts.

In order to differentiate with other CPUs, a new compatible is
added for mpc832x: fsl,mpc832x-spi

Signed-off-by: Christophe Leroy 
Cc: Rasmus Villemoes 
---
 arch/powerpc/include/asm/mpc8xxx_spi.h |  1 +
 drivers/spi/mpc8xxx_spi.c  | 13 +
 2 files changed, 14 insertions(+)

diff --git a/arch/powerpc/include/asm/mpc8xxx_spi.h 
b/arch/powerpc/include/asm/mpc8xxx_spi.h
index 83cfe23b4e..8e9411aefb 100644
--- a/arch/powerpc/include/asm/mpc8xxx_spi.h
+++ b/arch/powerpc/include/asm/mpc8xxx_spi.h
@@ -12,6 +12,7 @@
 
 #if defined(CONFIG_ARCH_MPC8308) || \
defined(CONFIG_ARCH_MPC8313) || \
+   defined(CONFIG_ARCH_MPC832X) || \
defined(CONFIG_ARCH_MPC834X) || \
defined(CONFIG_ARCH_MPC837X)
 
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c
index 6869d60d97..78892173dc 100644
--- a/drivers/spi/mpc8xxx_spi.c
+++ b/drivers/spi/mpc8xxx_spi.c
@@ -16,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 enum {
SPI_EV_NE = BIT(31 - 22),   /* Receiver Not Empty */
@@ -30,6 +31,7 @@ enum {
SPI_MODE_REV   = BIT(31 - 5),   /* Reverse mode - MSB first */
SPI_MODE_MS= BIT(31 - 6),   /* Always master */
SPI_MODE_EN= BIT(31 - 7),   /* Enable interface */
+   SPI_MODE_OP= BIT(31 - 17),  /* CPU Mode, QE otherwise */
 
SPI_MODE_LEN_MASK = 0xf0,
SPI_MODE_LEN_SHIFT = 20,
@@ -89,6 +91,9 @@ static int mpc8xxx_spi_probe(struct udevice *dev)
 */
out_be32(>spi->mode, SPI_MODE_REV | SPI_MODE_MS);
 
+   if (dev_get_driver_data(dev) == SOC_MPC832X)
+   setbits_be32(>spi->mode, SPI_MODE_OP);
+
/* set len to 8 bits */
setbits_be32(>mode, (8 - 1) << SPI_MODE_LEN_SHIFT);
 
@@ -130,6 +135,7 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint 
bitlen,
u32 tmpdin = 0, tmpdout = 0, n;
const u8 *cout = dout;
u8 *cin = din;
+   ulong type = dev_get_driver_data(bus);
 
debug("%s: slave %s:%u dout %08X din %08X bitlen %u\n", __func__,
  bus->name, plat->cs, (uint)dout, (uint)din, bitlen);
@@ -157,6 +163,9 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint 
bitlen,
if (cout)
tmpdout = *cout++;
 
+   if (type == SOC_MPC832X)
+   tmpdout <<= 24;
+
/* Write the data out */
out_be32(>tx, tmpdout);
 
@@ -179,6 +188,9 @@ static int mpc8xxx_spi_xfer(struct udevice *dev, uint 
bitlen,
tmpdin = in_be32(>rx);
setbits_be32(>event, SPI_EV_NE);
 
+   if (type == SOC_MPC832X)
+   tmpdin >>= 16;
+
if (cin)
*cin++ = tmpdin;
 
@@ -271,6 +283,7 @@ static const struct dm_spi_ops mpc8xxx_spi_ops = {
 
 static const struct udevice_id mpc8xxx_spi_ids[] = {
{ .compatible = "fsl,spi" },
+   { .compatible = "fsl,mpc832x-spi", .data = SOC_MPC832X },
{ }
 };
 
-- 
2.39.2

[PATCH v1 12/14] board: cssi: Refactor EEPROM read

2023-04-06 Thread Christophe Leroy

On cmpc885 board, the ethernet addresses are stored in an
EEPROM that is accessed through SPI.

A 3 bytes command is sent to the chip then the content
gets read. At the time being a single block access is
performed, ignoring the first 3 bytes read.

Reword the SPI transfer to first send 3 bytes then
receive the content of the EEPROM so that there don't be
3 dummy bytes at the beginning of the buffer.

And move the function into common.c so that it can be
reused by the board that will be added in a future patch.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 35 ---
 board/cssi/common/common.c   | 35 +++
 board/cssi/common/common.h   |  1 +
 3 files changed, 40 insertions(+), 31 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 689d573075..8f67f9fc33 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -147,55 +147,28 @@ int checkboard(void)
return 0;
 }
 
-#define SPI_EEPROM_READ0x03
 #define MAX_SPI_BYTES  0x20
 
-#define EE_OFF_MAC10x13
-#define EE_OFF_MAC20x19
+#define EE_OFF_MAC10x10
+#define EE_OFF_MAC20x16
 
 /* Reads MAC addresses from SPI EEPROM */
 static int setup_mac(void)
 {
-   struct udevice *eeprom;
-   struct spi_slave *slave;
-   char name[30], *str;
uchar din[MAX_SPI_BYTES];
-   uchar dout[MAX_SPI_BYTES] = {SPI_EEPROM_READ, 0, 0};
-   int bitlen = 256, cs = 0, mode = 0, bus = 0, ret;
+   int ret;
unsigned long ident = 0x08005120;
 
-   snprintf(name, sizeof(name), "generic_%d:%d", bus, cs);
-
-   str = strdup(name);
-   if (!str)
-   return -1;
-
-   ret = uclass_get_device(UCLASS_SPI, 0, );
-   if (ret) {
-   printf("Could not enable Serial Peripheral Interface (SPI).\n");
-   return -1;
-   }
-
-   ret = _spi_get_bus_and_cs(bus, cs, 100, mode, "spi_generic_drv", 
str, , );
+   ret = read_eeprom(din, sizeof(din));
if (ret)
return ret;
 
-   ret = spi_claim_bus(slave);
-
-   ret = spi_xfer(slave, bitlen, dout, din, SPI_XFER_BEGIN | SPI_XFER_END);
-   if (ret) {
-   printf("Error %d during SPI transaction\n", ret);
-   return ret;
-   }
-
if (memcmp(din + EE_OFF_MAC1, , sizeof(ident)) == 0)
eth_env_set_enetaddr("ethaddr", din + EE_OFF_MAC1);
 
if (memcmp(din + EE_OFF_MAC2, , sizeof(ident)) == 0)
eth_env_set_enetaddr("eth1addr", din + EE_OFF_MAC2);
 
-   spi_release_bus(slave);
-
return 0;
 }
 
diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
index 71b35cc692..de68e23fcd 100644
--- a/board/cssi/common/common.c
+++ b/board/cssi/common/common.c
@@ -8,7 +8,11 @@
  * Common specific routines for the CS Group boards
  */
 
+#include 
 #include 
+#include 
+
+#define SPI_EEPROM_READ0x03
 
 static int fdt_set_node_and_value(void *blob, char *node, const char *prop,
  void *var, int size)
@@ -60,3 +64,34 @@ void ft_cleanup(void *blob, unsigned long id, const char 
*prop, const char *comp
 
fdt_set_node_and_value(blob, "/", prop, , sizeof(uint32_t));
 }
+
+int read_eeprom(u8 *din, int len)
+{
+   struct udevice *eeprom;
+   struct spi_slave *slave;
+   uchar dout[3] = {SPI_EEPROM_READ, 0, 0};
+   int ret;
+
+   ret = uclass_get_device(UCLASS_SPI, 0, );
+   if (ret)
+   return ret;
+
+   ret = _spi_get_bus_and_cs(0, 0, 100, 0, "spi_generic_drv",
+ "generic_0:0", , );
+   if (ret)
+   return ret;
+
+   ret = spi_claim_bus(slave);
+
+   ret = spi_xfer(slave, sizeof(dout) << 3, dout, NULL, SPI_XFER_BEGIN);
+   if (ret)
+   return ret;
+
+   ret = spi_xfer(slave, len << 3, NULL, din, SPI_XFER_END);
+   if (ret)
+   return ret;
+
+   spi_release_bus(slave);
+
+   return 0;
+}
diff --git a/board/cssi/common/common.h b/board/cssi/common/common.h
index 16852b6076..9660898cc9 100644
--- a/board/cssi/common/common.h
+++ b/board/cssi/common/common.h
@@ -4,5 +4,6 @@
 #define _BOARD_CSSI_COMMON_H
 
 void ft_cleanup(void *blob, unsigned long id, const char *prop, const char 
*compatible);
+int read_eeprom(u8 *din, int len);
 
 #endif /* _BOARD_CSSI_COMMON_H */
-- 
2.39.2

[PATCH v1 14/14] board: cssi: Add CPU board CMPCPRO

2023-04-06 Thread Christophe Leroy

CSSI has another CPU board, similar to the CMPC885 board
that get plugged on the two base boards MCR3000_2G and MIAE.

That CPU board is called CMPCPRO because it has a MPC8321E CPU,
also known as Power QUICC II PRO.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc83xx/Kconfig |   5 +
 arch/powerpc/dts/Makefile|   1 +
 arch/powerpc/dts/cmpcpro.dts | 189 +++
 board/cssi/MAINTAINERS   |   2 +
 board/cssi/cmpcpro/Kconfig   |  26 ++
 board/cssi/cmpcpro/Makefile  |   8 +
 board/cssi/cmpcpro/cmpcpro.c | 404 +++
 board/cssi/cmpcpro/cmpcpro.env   |   8 +
 board/cssi/cmpcpro/nand.c|  43 
 configs/CMPCPRO_defconfig| 209 
 include/configs/cmpcpro.h|  99 
 11 files changed, 994 insertions(+)
 create mode 100644 arch/powerpc/dts/cmpcpro.dts
 create mode 100644 board/cssi/cmpcpro/Kconfig
 create mode 100644 board/cssi/cmpcpro/Makefile
 create mode 100644 board/cssi/cmpcpro/cmpcpro.c
 create mode 100644 board/cssi/cmpcpro/cmpcpro.env
 create mode 100644 board/cssi/cmpcpro/nand.c
 create mode 100644 configs/CMPCPRO_defconfig
 create mode 100644 include/configs/cmpcpro.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index b695c7e4d8..582e141221 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -20,6 +20,10 @@ choice
prompt "Target select"
optional
 
+config TARGET_CMPCPRO
+   bool "Support CMPCPRO board from CSSI"
+   select ARCH_MPC832X
+
 config TARGET_MPC837XERDB
bool "Support MPC837XERDB"
select ARCH_MPC837X
@@ -205,5 +209,6 @@ config NEVER_ASSERT_ODT_TO_CPU
 
 source "board/freescale/mpc837xerdb/Kconfig"
 source "board/gdsys/mpc8308/Kconfig"
+source "board/cssi/cmpcpro/Kconfig"
 
 endmenu
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index 26b592b85d..bb436f02bc 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -30,6 +30,7 @@ dtb-$(CONFIG_TARGET_TUXX1) += kmtuxa1.dtb
 dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb
 dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb
 dtb-$(CONFIG_TARGET_CMPC885) += cmpc885.dtb
+dtb-$(CONFIG_TARGET_CMPCPRO) += cmpcpro.dtb
 
 include $(srctree)/scripts/Makefile.dts
 
diff --git a/arch/powerpc/dts/cmpcpro.dts b/arch/powerpc/dts/cmpcpro.dts
new file mode 100644
index 00..c27d9dba33
--- /dev/null
+++ b/arch/powerpc/dts/cmpcpro.dts
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * CMPC885 Device Tree Source
+ *
+ * Copyright 2020 CS GROUP France
+ *
+ */
+
+/dts-v1/;
+
+#include 
+
+/ {
+   model = "CMPCPRO";
+   compatible = "fsl, cmpc85xx", "fsl,mod85xx", "CMPCPRO", "MPC8321E", 
"fsl,cmpcpro";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   chosen {
+   stdout-path = 
+   };
+   WDT: watchdog@0 {
+   device_type = "watchdog";
+   compatible = "fsl,pq1-wdt";
+   };
+
+   aliases {
+   ethernet0 = 
+   etehrnet1 = 
+   serial0 = 
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   PowerPC,8321@0 {
+   device_type = "cpu";
+   reg = <0x0>;
+   d-cache-line-size = <0x20>; // 32 bytes
+   i-cache-line-size = <0x20>; // 32 bytes
+   d-cache-size = <16384>; // L1, 16K
+   i-cache-size = <16384>; // L1, 16K
+   timebase-frequency = <0>;
+   bus-frequency = <0>;
+   clock-frequency = <0>;
+   };
+   };
+
+   memory {
+   device_type = "memory";
+   reg = <0x 0x2000>;
+   };
+
+   soc8321@b000 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device_type = "soc";
+   compatible = "simple-bus";
+   ranges = <0x0 0xb000 0x0010>;
+   reg = <0xb000 0x0200>;
+   bus-frequency = <0>;
+   pmc: power@b00 {
+   compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
+   reg = <0xb00 0x100 0xa00 0x100>;
+   interrupts = <80 0x8>;
+   interrupt-parent = <>;
+   };
+   serial0: serial@4500 {
+   clocks = < MPC83XX_CLK_CSB>;
+   cell-index = <0>;
+   device_type = &quo

[PATCH v1 11/14] board: cssi: Create dedicated file for common sources

2023-04-06 Thread Christophe Leroy

In preparation of the new cssi board called cmpcpro which
we be introduce in a future patch, move common
functions into a dedicated file in a common directory.

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/Makefile  |  2 +-
 board/cssi/cmpc885/cmpc885.c | 54 ++-
 board/cssi/common/common.c   | 62 
 board/cssi/common/common.h   |  8 +
 4 files changed, 73 insertions(+), 53 deletions(-)
 create mode 100644 board/cssi/common/common.c
 create mode 100644 board/cssi/common/common.h

diff --git a/board/cssi/cmpc885/Makefile b/board/cssi/cmpc885/Makefile
index 6c055097cd..baf9e5ab4f 100644
--- a/board/cssi/cmpc885/Makefile
+++ b/board/cssi/cmpc885/Makefile
@@ -5,6 +5,6 @@
 # Christophe Leroy 
 #
 
-obj-y += cmpc885.o
+obj-y += cmpc885.o ../common/common.o
 obj-y += sdram.o
 obj-$(CONFIG_CMD_NAND) += nand.o
diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 5233c24aae..689d573075 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -22,9 +22,10 @@
 #include 
 #include 
 #include 
-
 #include 
 
+#include "../common/common.h"
+
 DECLARE_GLOBAL_DATA_PTR;
 
 #define BOARD_CMPC885  "cmpc885"
@@ -59,57 +60,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define R_RESET_STATUS 0x0400
 #define R_RST_STATUS   0x0004
 
-static int fdt_set_node_and_value(void *blob, char *node, const char *prop,
- void *var, int size)
-{
-   int ret, off;
-
-   off = fdt_path_offset(blob, node);
-
-   if (off < 0) {
-   printf("Cannot find %s node err:%s\n", node, fdt_strerror(off));
-
-   return off;
-   }
-
-   ret = fdt_setprop(blob, off, prop, var, size);
-
-   if (ret < 0)
-   printf("Cannot set %s/%s prop err: %s\n", node, prop, 
fdt_strerror(ret));
-
-   return ret;
-}
-
-/* Checks front/rear id and remove unneeded nodes from the blob */
-static void ft_cleanup(void *blob, uint32_t id, const char *prop, const char 
*compatible)
-{
-   int off;
-
-   off = fdt_node_offset_by_compatible(blob, -1, compatible);
-
-   while (off != -FDT_ERR_NOTFOUND) {
-   const struct fdt_property *ids;
-   int nb_ids, idx;
-   int tmp = -1;
-
-   ids = fdt_get_property(blob, off, prop, _ids);
-
-   for (idx = 0; idx < nb_ids; idx += 4) {
-   if (*((uint32_t *)>data[idx]) == id)
-   break;
-   }
-
-   if (idx >= nb_ids)
-   fdt_del_node(blob, off);
-   else
-   tmp = off;
-
-   off = fdt_node_offset_by_compatible(blob, tmp, compatible);
-   }
-
-   fdt_set_node_and_value(blob, "/", prop, , sizeof(uint32_t));
-}
-
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
u8 fav_id, far_id;
diff --git a/board/cssi/common/common.c b/board/cssi/common/common.c
new file mode 100644
index 00..71b35cc692
--- /dev/null
+++ b/board/cssi/common/common.c
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2010-2020 CS Group
+ * Charles Frey 
+ * Florent Trinh Thai 
+ * Christophe Leroy 
+ *
+ * Common specific routines for the CS Group boards
+ */
+
+#include 
+
+static int fdt_set_node_and_value(void *blob, char *node, const char *prop,
+ void *var, int size)
+{
+   int ret, off;
+
+   off = fdt_path_offset(blob, node);
+
+   if (off < 0) {
+   printf("Cannot find %s node err:%s\n", node, fdt_strerror(off));
+
+   return off;
+   }
+
+   ret = fdt_setprop(blob, off, prop, var, size);
+
+   if (ret < 0)
+   printf("Cannot set %s/%s prop err: %s\n", node, prop, 
fdt_strerror(ret));
+
+   return ret;
+}
+
+/* Checks front/rear id and remove unneeded nodes from the blob */
+void ft_cleanup(void *blob, unsigned long id, const char *prop, const char 
*compatible)
+{
+   int off;
+
+   off = fdt_node_offset_by_compatible(blob, -1, compatible);
+
+   while (off != -FDT_ERR_NOTFOUND) {
+   const struct fdt_property *ids;
+   int nb_ids, idx;
+   int tmp = -1;
+
+   ids = fdt_get_property(blob, off, prop, _ids);
+
+   for (idx = 0; idx < nb_ids; idx += 4) {
+   if (*((uint32_t *)>data[idx]) == id)
+   break;
+   }
+
+   if (idx >= nb_ids)
+   fdt_del_node(blob, off);
+   else
+   tmp = off;
+
+   off = fdt_node_offset_by_compatible(blob, tmp, compatible);
+   }
+
+   fdt_set_node_and_value(blob, "/", prop, , sizeof(uint32_t));
+}
diff --git a/board/cssi/common/common.h b/boar

[PATCH v1 09/14] gpio: Add QUICC Engine GPIOs driver

2023-04-06 Thread Christophe Leroy

The mpc832x has GPIOs handled by the QUICC Engine.
The registers are different from the one for the
non QE mpc83xx GPIOs.

Implement a GPIO driver for those.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/include/asm/arch-mpc83xx/gpio.h |   5 +
 drivers/gpio/Kconfig |  18 ++
 drivers/gpio/Makefile|   1 +
 drivers/gpio/qe_gpio.c   | 170 +++
 4 files changed, 194 insertions(+)
 create mode 100644 drivers/gpio/qe_gpio.c

diff --git a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h 
b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
index 19c2506c9b..df95d2238f 100644
--- a/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
+++ b/arch/powerpc/include/asm/arch-mpc83xx/gpio.h
@@ -22,6 +22,11 @@ struct mpc8xxx_gpio_plat {
uint ngpios;
 };
 
+struct qe_gpio_plat {
+   ulong addr;
+   unsigned long size;
+};
+
 #ifndef DM_GPIO
 void mpc83xx_gpio_init_f(void);
 void mpc83xx_gpio_init_r(void);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 7d5ddbdee0..9bf6e428de 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -547,6 +547,24 @@ config MPC8XXX_GPIO
  value setting, the open-drain feature, which can configure individual
  GPIOs to work as open-drain outputs, is supported.
 
+config QE_GPIO
+   bool "Freescale QUICC ENGINE GPIO driver"
+   depends on DM_GPIO
+   depends on QE
+   help
+ This driver supports the QUICC Engine GPIOs of MPC83XX CPUs.
+ Each GPIO bank is identified by its own entry in the device tree,
+ i.e.
+
+ qe_pio_a: gpio-controller@1400 {
+   compatible = "fsl,mpc8323-qe-pario-bank";
+   reg = <0x1400 0x18>;
+   gpio-controller;
+   #gpio-cells = <2>;
+ };
+
+ Each bank has 32 GPIOs.
+
 config MPC8XX_GPIO
bool "Freescale MPC8XX GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 1e81e36962..64a36c472e 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_TEGRA186_GPIO)   += tegra186_gpio.o
 obj-$(CONFIG_DA8XX_GPIO)   += da8xx_gpio.o
 obj-$(CONFIG_ALTERA_PIO)   += altera_pio.o
 obj-$(CONFIG_MPC8XXX_GPIO) += mpc8xxx_gpio.o
+obj-$(CONFIG_QE_GPIO)  += qe_gpio.o
 obj-$(CONFIG_MPC8XX_GPIO)  += mpc8xx_gpio.o
 obj-$(CONFIG_MPC83XX_SPISEL_BOOT)  += mpc83xx_spisel_boot.o
 obj-$(CONFIG_SH_GPIO_PFC)  += sh_pfc.o
diff --git a/drivers/gpio/qe_gpio.c b/drivers/gpio/qe_gpio.c
new file mode 100644
index 00..16e8d1eae6
--- /dev/null
+++ b/drivers/gpio/qe_gpio.c
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2023 CR GROUP France
+ * Christophe Leroy 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define QE_DIR_NONE0
+#define QE_DIR_OUT 1
+#define QE_DIR_IN  2
+#define QE_DIR_IN_OUT  3
+
+struct qe_gpio_data {
+   /* The bank's register base in memory */
+   struct gpio_n __iomem *base;
+   /* The address of the registers; used to identify the bank */
+   phys_addr_t addr;
+};
+
+static inline u32 gpio_mask(uint gpio)
+{
+   return 1U << (31 - (gpio));
+}
+
+static inline u32 gpio_mask2(uint gpio)
+{
+   return 1U << (30 - ((gpio & 15) << 1));
+}
+
+static int qe_gpio_direction_input(struct udevice *dev, uint gpio)
+{
+   struct qe_gpio_data *data = dev_get_priv(dev);
+   struct gpio_n __iomem *base = data->base;
+   u32 mask2 = gpio_mask2(gpio);
+
+   if (gpio < 16)
+   clrsetbits_be32(>dir1, mask2 * QE_DIR_OUT, mask2 * 
QE_DIR_IN);
+   else
+   clrsetbits_be32(>dir2, mask2 * QE_DIR_OUT, mask2 * 
QE_DIR_IN);
+
+   return 0;
+}
+
+static int qe_gpio_set_value(struct udevice *dev, uint gpio, int value)
+{
+   struct qe_gpio_data *data = dev_get_priv(dev);
+   struct gpio_n __iomem *base = data->base;
+   u32 mask = gpio_mask(gpio);
+   u32 mask2 = gpio_mask2(gpio);
+
+   if (gpio < 16)
+   clrsetbits_be32(>dir1, mask2 * QE_DIR_IN, mask2 * 
QE_DIR_OUT);
+   else
+   clrsetbits_be32(>dir2, mask2 * QE_DIR_IN, mask2 * 
QE_DIR_OUT);
+
+   if (value)
+   setbits_be32(>pdat, mask);
+   else
+   clrbits_be32(>pdat, mask);
+
+   return 0;
+}
+
+static int qe_gpio_get_value(struct udevice *dev, uint gpio)
+{
+   struct qe_gpio_data *data = dev_get_priv(dev);
+   struct gpio_n __iomem *base = data->base;
+   u32 mask = gpio_mask(gpio);
+
+   return !!(in_be32(>pdat) & mask);
+}
+
+static int qe_gpio_get_function(struct udevice *dev, uint gpio)
+{
+   struct qe_gpio_data *data = dev_get_priv(dev);
+   struct gpio_n __iomem *base = data->base;
+   u32 mask2 = gpio_mask2(gpio);
+   int dir

[PATCH v1 13/14] board: cssi: Move all mother board code into common.c

2023-04-06 Thread Christophe Leroy

All the code used to manage the mother boards will be
common to soon to come CPU board.

Move all that code into common.c

Signed-off-by: Christophe Leroy 
---
 board/cssi/cmpc885/cmpc885.c | 152 +--
 board/cssi/common/common.c   | 124 +++-
 board/cssi/common/common.h   |   8 +-
 include/configs/cmpc885.h|   6 ++
 4 files changed, 157 insertions(+), 133 deletions(-)

diff --git a/board/cssi/cmpc885/cmpc885.c b/board/cssi/cmpc885/cmpc885.c
index 8f67f9fc33..540b9d3c78 100644
--- a/board/cssi/cmpc885/cmpc885.c
+++ b/board/cssi/cmpc885/cmpc885.c
@@ -28,33 +28,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#define BOARD_CMPC885  "cmpc885"
-#define BOARD_MCR3000_2G   "mcr3k_2g"
-#define BOARD_VGOIP"vgoip"
-#define BOARD_MIAE "miae"
-
-#define TYPE_MCR   0x22
-#define TYPE_MIAE  0x23
-
-#define FAR_CASRSA 2
-#define FAR_VGOIP  4
-#define FAV_CLA7
-#define FAV_SRSA   8
-
 #define ADDR_CPLD_R_RESET  ((unsigned short __iomem 
*)CONFIG_CPLD_BASE)
 #define ADDR_CPLD_R_ETAT   ((unsigned short __iomem 
*)(CONFIG_CPLD_BASE + 2))
 #define ADDR_CPLD_R_TYPE   ((unsigned char  __iomem 
*)(CONFIG_CPLD_BASE + 3))
 
-#define ADDR_FPGA_R_BASE   ((unsigned char  __iomem 
*)CONFIG_FPGA_BASE)
-#define ADDR_FPGA_R_ALARMES_IN ((unsigned char  __iomem 
*)CONFIG_FPGA_BASE + 0x31)
-#define ADDR_FPGA_R_FAV((unsigned char  __iomem 
*)CONFIG_FPGA_BASE + 0x44)
-
 #define PATH_PHY2  "/soc@ff00/mdio@e00/ethernet-phy@2"
 #define PATH_PHY3  "/soc@ff00/mdio@e00/ethernet-phy@3"
 #define PATH_ETH1  "/soc@ff00/ethernet@1e00"
 #define FIBER_PHY PATH_PHY2
 
-#define FPGA_R_ACQ_AL_FAV  0x04
 #define R_ETAT_PRES_BASE   0x0040
 
 #define R_RESET_STATUS 0x0400
@@ -62,8 +44,6 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
-   u8 fav_id, far_id;
-
const char *sync = "receive";
 
ft_cpu_setup(blob, bd);
@@ -87,32 +67,19 @@ int ft_board_setup(void *blob, struct bd_info *bd)
do_fixup_by_path(blob, "/localbus/e1", "rising-edge-sync-pulse", sync, 
strlen(sync), 1);
 
/* MIAE only */
-   if (!(in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE) || 
in_8(ADDR_FPGA_R_BASE) != TYPE_MIAE)
+   if (!(in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE))
return 0;
 
-   far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
-   ft_cleanup(blob, (u32)far_id, "far-id", "cs,mia-far");
-
-   /*
-* special case, with CASRSA (far_id: 2)
-* FAV-SRSA register itself as FAV-CLA
-*/
-   fav_id = in_8(ADDR_FPGA_R_BASE + 0x44) >> 5;
-
-   if (far_id == FAR_CASRSA && fav_id == FAV_CLA)
-   fav_id = FAV_SRSA;
-
-   ft_cleanup(blob, (u32)fav_id, "fav-id", "cs,mia-fav");
-
-   if (far_id == FAR_CASRSA) {
-   /* switch to phy3 with gpio, we'll only use phy3 */
-   immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
-   cpm8xx_t __iomem *cp = (cpm8xx_t __iomem *)>im_cpm;
+   return ft_board_setup_common(blob);
+}
 
-   setbits_be32(>cp_pedat, 0x2000);
-   }
+void ft_board_setup_phy3(void)
+{
+   /* switch to phy3 with gpio, we'll only use phy3 */
+   immap_t __iomem *immr = (immap_t __iomem *)CONFIG_SYS_IMMR;
+   cpm8xx_t __iomem *cp = (cpm8xx_t __iomem *)>im_cpm;
 
-   return 0;
+   setbits_be32(>cp_pedat, 0x2000);
 }
 
 int checkboard(void)
@@ -120,30 +87,11 @@ int checkboard(void)
serial_puts("Board: ");
 
/* Is a motherboard present ? */
-   if (in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE) {
-   switch (in_8(ADDR_FPGA_R_BASE)) {
-   int far_id;
-   case TYPE_MCR:
-   printf("MCR3000_2G (CS GROUP)\n");
-   break;
-   case TYPE_MIAE:
-   far_id = in_8(ADDR_FPGA_R_BASE + 0x43) >> 5;
-
-   if (far_id == FAR_VGOIP)
-   printf("VGoIP (CS GROUP)\n");
-   else
-   printf("MIAE (CS GROUP)\n");
-
-   break;
-   default:
-   printf("Unknown\n");
-   for (;;)
-   ;
-   break;
-   }
-   } else {
-   printf("CMPC885 (CS GROUP)\n");
-   }
+   if (in_be16(ADDR_CPLD_R_ETAT) & R_ETAT_PRES_BASE)
+   return checkboard_common();
+
+   printf("

[PATCH v1 02/14] watchdog: mpc8xx: Rename it mpc8xxx

2023-04-06 Thread Christophe Leroy

mpc8xx, mpc83xx and mpc86xx have similar watchdog with almost same
memory registers.

Rename it mpc8xxx which is the generic name used for drivers supporting
several mpc families.

The driver will be made more generic in following patch.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/Kconfig  |  2 +-
 drivers/watchdog/Kconfig  |  6 ++---
 drivers/watchdog/Makefile |  2 +-
 .../watchdog/{mpc8xx_wdt.c => mpc8xxx_wdt.c}  | 24 +--
 4 files changed, 17 insertions(+), 17 deletions(-)
 rename drivers/watchdog/{mpc8xx_wdt.c => mpc8xxx_wdt.c} (72%)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index bee59c3bea..f20d58b4de 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -31,7 +31,7 @@ config MPC8xx
select CREATE_ARCH_SYMLINK
select BOARD_EARLY_INIT_F
imply CMD_REGINFO
-   imply WDT_MPC8xx
+   imply WDT_MPC8xxx
 
 endchoice
 
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index b5ac8f7f50..f6554d5c93 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -184,12 +184,12 @@ config WDT_MESON_GXBB
  Select this to enable Meson watchdog timer,
  which can be found on some Amlogic platforms.
 
-config WDT_MPC8xx
-   bool "MPC8xx watchdog timer support"
+config WDT_MPC8xxx
+   bool "MPC8xxx watchdog timer support"
depends on WDT && MPC8xx
select HW_WATCHDOG
help
- Select this to enable mpc8xx watchdog timer
+ Select this to enable mpc8xxx watchdog timer
 
 config WDT_MT7620
bool "MediaTek MT7620 watchdog timer support"
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 446d961d7d..aba1df285d 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -29,7 +29,7 @@ obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
 obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
 obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
-obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
+obj-$(CONFIG_WDT_MPC8xxx) += mpc8xxx_wdt.o
 obj-$(CONFIG_WDT_MT7620) += mt7620_wdt.o
 obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
 obj-$(CONFIG_WDT_MTK) += mtk_wdt.o
diff --git a/drivers/watchdog/mpc8xx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
similarity index 72%
rename from drivers/watchdog/mpc8xx_wdt.c
rename to drivers/watchdog/mpc8xxx_wdt.c
index c8b104d8f5..ffca3ec877 100644
--- a/drivers/watchdog/mpc8xx_wdt.c
+++ b/drivers/watchdog/mpc8xxx_wdt.c
@@ -19,7 +19,7 @@ void hw_watchdog_reset(void)
out_be16(>im_siu_conf.sc_swsr, 0xaa39);  /* write magic2 */
 }
 
-static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
+static int mpc8xxx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
 {
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
u32 val = CONFIG_SYS_SYPCR;
@@ -38,7 +38,7 @@ static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, 
ulong flags)
 
 }
 
-static int mpc8xx_wdt_stop(struct udevice *dev)
+static int mpc8xxx_wdt_stop(struct udevice *dev)
 {
immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
 
@@ -49,27 +49,27 @@ static int mpc8xx_wdt_stop(struct udevice *dev)
return 0;
 }
 
-static int mpc8xx_wdt_reset(struct udevice *dev)
+static int mpc8xxx_wdt_reset(struct udevice *dev)
 {
hw_watchdog_reset();
 
return 0;
 }
 
-static const struct wdt_ops mpc8xx_wdt_ops = {
-   .start = mpc8xx_wdt_start,
-   .reset = mpc8xx_wdt_reset,
-   .stop = mpc8xx_wdt_stop,
+static const struct wdt_ops mpc8xxx_wdt_ops = {
+   .start = mpc8xxx_wdt_start,
+   .reset = mpc8xxx_wdt_reset,
+   .stop = mpc8xxx_wdt_stop,
 };
 
-static const struct udevice_id mpc8xx_wdt_ids[] = {
+static const struct udevice_id mpc8xxx_wdt_ids[] = {
{ .compatible = "fsl,pq1-wdt" },
{}
 };
 
-U_BOOT_DRIVER(wdt_mpc8xx) = {
-   .name = "wdt_mpc8xx",
+U_BOOT_DRIVER(wdt_mpc8xxx) = {
+   .name = "wdt_mpc8xxx",
.id = UCLASS_WDT,
-   .of_match = mpc8xx_wdt_ids,
-   .ops = _wdt_ops,
+   .of_match = mpc8xxx_wdt_ids,
+   .ops = _wdt_ops,
 };
-- 
2.39.2

[PATCH v1 04/14] watchdog: mpc8xxx: Add support for mpc83xx

2023-04-06 Thread Christophe Leroy

Introduce a new compatible "fsl,pq2pro-wdt"
On mpc83xx, the prescaling factor is 0x1.

Don't write the watchdog configuration register in
start.S as it can be written only once.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc83xx/cpu.c   | 2 +-
 arch/powerpc/cpu/mpc83xx/start.S | 2 ++
 drivers/watchdog/Kconfig | 2 +-
 drivers/watchdog/mpc8xxx_wdt.c   | 1 +
 4 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c
index a6c063556e..f6ffe295b8 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu.c
@@ -165,7 +165,7 @@ unsigned long get_tbclk(void)
 }
 #endif
 
-#if defined(CONFIG_WATCHDOG)
+#if defined(CONFIG_WATCHDOG) && !defined(CONFIG_WDT)
 void watchdog_reset (void)
 {
int re_enable = disable_interrupts();
diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index e3878e431f..4329b173db 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -483,6 +483,7 @@ init_e300_core: /* time t 10 */
 
 
lis r3, CONFIG_SYS_IMMR@h
+#ifndef CONFIG_WDT_MPC8xxx
 #if defined(CONFIG_WATCHDOG)
/* Initialise the Watchdog values and reset it (if req) */
/*--*/
@@ -508,6 +509,7 @@ init_e300_core: /* time t 10 */
stw r4, SWCRR(r3)
 1:
 #endif /* CONFIG_WATCHDOG */
+#endif
 
 #if defined(CONFIG_MASK_AER_AO)
/* Write the Arbiter Event Enable to mask Address Only traps. */
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index f7fbb28d80..f7767596e1 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -186,7 +186,7 @@ config WDT_MESON_GXBB
 
 config WDT_MPC8xxx
bool "MPC8xxx watchdog timer support"
-   depends on WDT && MPC8xx
+   depends on WDT && (MPC8xx || MPC83xx)
help
  Select this to enable mpc8xxx watchdog timer
 
diff --git a/drivers/watchdog/mpc8xxx_wdt.c b/drivers/watchdog/mpc8xxx_wdt.c
index 9a29938fac..f28636ca90 100644
--- a/drivers/watchdog/mpc8xxx_wdt.c
+++ b/drivers/watchdog/mpc8xxx_wdt.c
@@ -98,6 +98,7 @@ static const struct wdt_ops mpc8xxx_wdt_ops = {
 
 static const struct udevice_id mpc8xxx_wdt_ids[] = {
{ .compatible = "fsl,pq1-wdt", .data = 0x800 },
+   { .compatible = "fsl,pq2pro-wdt", .data = 0x1 },
{}
 };
 
-- 
2.39.2

[PATCH v1 08/14] clk: mpc83xx: Fix clocks for mpc832x

2023-04-06 Thread Christophe Leroy

gd->arch.sdhc_clk only exists when CONFIG_FSL_ESDHC is set,
so enclose it inside ifdefs.

gd->arch.qe_clk and gd->arch.brg_clk must be populated when
CONFIG_QE is set.

Signed-off-by: Christophe Leroy 
---
 drivers/clk/mpc83xx_clk.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/clk/mpc83xx_clk.c b/drivers/clk/mpc83xx_clk.c
index 0255ccaf8a..cc734450ef 100644
--- a/drivers/clk/mpc83xx_clk.c
+++ b/drivers/clk/mpc83xx_clk.c
@@ -346,8 +346,10 @@ static int mpc83xx_clk_probe(struct udevice *dev)
 
type = dev_get_driver_data(dev);
 
+#ifdef CONFIG_FSL_ESDHC
if (mpc83xx_has_sdhc(type))
gd->arch.sdhc_clk = priv->speed[MPC83XX_CLK_SDHC];
+#endif
 
gd->arch.core_clk = priv->speed[MPC83XX_CLK_CORE];
gd->arch.i2c1_clk = priv->speed[MPC83XX_CLK_I2C1];
@@ -362,6 +364,11 @@ static int mpc83xx_clk_probe(struct udevice *dev)
gd->cpu_clk = priv->speed[MPC83XX_CLK_CORE];
gd->bus_clk = priv->speed[MPC83XX_CLK_CSB];
 
+#ifdef CONFIG_QE
+   gd->arch.qe_clk = priv->speed[MPC83XX_CLK_QE];
+   gd->arch.brg_clk = priv->speed[MPC83XX_CLK_BRG];
+#endif
+
return 0;
 }
 
-- 
2.39.2

[PATCH v1 06/14] powerpc: mpc83xx: Fix soc.h

2023-04-06 Thread Christophe Leroy

There are helpers included in soc.h

Declare them static inline so that soc.h can be
included in several places.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/include/asm/arch-mpc83xx/soc.h | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/arch-mpc83xx/soc.h 
b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
index 39bf7d5a7f..ce54f9bebb 100644
--- a/arch/powerpc/include/asm/arch-mpc83xx/soc.h
+++ b/arch/powerpc/include/asm/arch-mpc83xx/soc.h
@@ -18,14 +18,14 @@ enum soc_type {
SOC_MPC8379,
 };
 
-bool mpc83xx_has_sdhc(int type)
+static inline bool mpc83xx_has_sdhc(int type)
 {
return (type == SOC_MPC8308) ||
   (type == SOC_MPC8309) ||
   (type == SOC_MPC8379);
 }
 
-bool mpc83xx_has_tsec(int type)
+static inline bool mpc83xx_has_tsec(int type)
 {
return (type == SOC_MPC8308) ||
   (type == SOC_MPC8313) ||
@@ -34,37 +34,37 @@ bool mpc83xx_has_tsec(int type)
   (type == SOC_MPC8379);
 }
 
-bool mpc83xx_has_pcie1(int type)
+static inline bool mpc83xx_has_pcie1(int type)
 {
return (type == SOC_MPC8308) ||
   (type == SOC_MPC8315) ||
   (type == SOC_MPC8379);
 }
 
-bool mpc83xx_has_pcie2(int type)
+static inline bool mpc83xx_has_pcie2(int type)
 {
return (type == SOC_MPC8315) ||
   (type == SOC_MPC8379);
 }
 
-bool mpc83xx_has_sata(int type)
+static inline bool mpc83xx_has_sata(int type)
 {
return (type == SOC_MPC8315) ||
   (type == SOC_MPC8379);
 }
 
-bool mpc83xx_has_pci(int type)
+static inline bool mpc83xx_has_pci(int type)
 {
return type != SOC_MPC8308;
 }
 
-bool mpc83xx_has_second_i2c(int type)
+static inline bool mpc83xx_has_second_i2c(int type)
 {
return (type != SOC_MPC8315) &&
   (type != SOC_MPC832X);
 }
 
-bool mpc83xx_has_quicc_engine(int type)
+static inline bool mpc83xx_has_quicc_engine(int type)
 {
return (type == SOC_MPC8309) ||
   (type == SOC_MPC832X) ||
-- 
2.39.2

[PATCH v1 03/14] watchdog: mpc8xxx: Make it generic

2023-04-06 Thread Christophe Leroy

mpc8xx, mpc83xx and mpc86xx have similar watchdog with almost same
memory registers.

Refactor the driver to get the register addresses from the
device tree and use the compatible to know the prescale factor.

Calculate the watchdog setup value from the provided timeout.

Don't declare it anymore as an HW_WATCHDOG, u-boot will start
servicing the watchdog early enough.

On mpc8xx the watchdog configuration register is also used for
configuring the bus monitor. So add it as an option to the watchdog
when it is mpc8xx. When watchdog is not selected, leave the
configuration of the initial SYPCR from Kconfig.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Kconfig|  3 +-
 arch/powerpc/cpu/mpc8xx/cpu_init.c |  5 +--
 arch/powerpc/dts/cmpc885.dts   | 12 ++---
 arch/powerpc/dts/mcr3000.dts   | 20 -
 board/cssi/mcr3000/mcr3000.c   | 14 --
 configs/CMPC885_defconfig  |  2 +-
 configs/MCR3000_defconfig  |  3 +-
 drivers/watchdog/Kconfig   | 18 +++-
 drivers/watchdog/mpc8xxx_wdt.c | 72 ++
 9 files changed, 102 insertions(+), 47 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index a705014512..bfd903bc10 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -48,7 +48,8 @@ config SYS_SIUMCR
  SIU Module Configuration (11-6)
 
 config SYS_SYPCR
-   hex "SYPCR register"
+   hex "SYPCR register" if !WDT_MPC8xxx
+   default 0
help
  System Protection Control (11-9)
 
diff --git a/arch/powerpc/cpu/mpc8xx/cpu_init.c 
b/arch/powerpc/cpu/mpc8xx/cpu_init.c
index 86b08a6174..feef792ee7 100644
--- a/arch/powerpc/cpu/mpc8xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc8xx/cpu_init.c
@@ -26,10 +26,9 @@ void cpu_init_f(immap_t __iomem *immr)
 
/* SYPCR - contains watchdog control (11-9) */
 
-#ifndef CONFIG_HW_WATCHDOG
/* deactivate watchdog if not enabled in config */
-   out_be32(>im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE);
-#endif
+   if (!IS_ENABLED(CONFIG_WDT_MPC8xxx))
+   out_be32(>im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & 
~SYPCR_SWE);
 
schedule();
 
diff --git a/arch/powerpc/dts/cmpc885.dts b/arch/powerpc/dts/cmpc885.dts
index adda0f3e9d..7b9566a0fa 100644
--- a/arch/powerpc/dts/cmpc885.dts
+++ b/arch/powerpc/dts/cmpc885.dts
@@ -18,11 +18,6 @@
stdout-path = 
};
 
-   WDT: watchdog@0 {
-   device_type = "watchdog";
-   compatible = "fsl,pq1-wdt";
-   };
-
SERIAL: serial {
compatible = "fsl,pq1-smc";
};
@@ -43,6 +38,13 @@
ranges = <0 0xff00 0x4000>;
reg = <0xff00 0x0200>;
 
+   WDT: watchdog@0 {
+   compatible = "fsl,pq1-wdt";
+   reg = <0x0 0x10>;
+   timeout-sec = <2>;
+   hw_margin_ms = <1000>;
+   };
+
CPM1_PIO_B: gpio-controller@ab8 {
#gpio-cells = <2>;
compatible = "fsl,cpm1-pario-bank-b";
diff --git a/arch/powerpc/dts/mcr3000.dts b/arch/powerpc/dts/mcr3000.dts
index 5f32d8a2e5..c4d7737bc6 100644
--- a/arch/powerpc/dts/mcr3000.dts
+++ b/arch/powerpc/dts/mcr3000.dts
@@ -9,9 +9,25 @@
 /dts-v1/;
 
 / {
-   WDT: watchdog@0 {
-   compatible = "fsl,pq1-wdt";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   soc: immr@ff00 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device-type = "soc";
+   compatible = "simple-bus";
+   ranges = <0 0xff00 0x4000>;
+   reg = <0xff00 0x0200>;
+
+   WDT: watchdog@0 {
+   compatible = "fsl,pq1-wdt";
+   reg = <0x0 0x10>;
+   timeout-sec = <2>;
+   hw_margin_ms = <1000>;
+   };
};
+
SERIAL: smc@0 {
compatible = "fsl,pq1-smc";
};
diff --git a/board/cssi/mcr3000/mcr3000.c b/board/cssi/mcr3000/mcr3000.c
index 7b3ab12bd5..3514f67490 100644
--- a/board/cssi/mcr3000/mcr3000.c
+++ b/board/cssi/mcr3000/mcr3000.c
@@ -138,17 +138,3 @@ int board_early_init_f(void)
 
return 0;
 }
-
-int board_early_init_r(void)
-{
-   struct udevice *watchdog_dev = NULL;
-
-   if (uclass_get_device(UCLASS_WDT, 0, _dev)) {
-   puts("Cannot find watchdog!\n");
-   } else {
-   puts("Enabling watchdog.\n");
-   wdt_start(watchdog_dev, 0x, 0);
-   }
-
-   return 0;
-}
diff --git a/configs/CMPC885_de

[PATCH v1 05/14] powerpc: mpc832x: Fix reset word

2023-04-06 Thread Christophe Leroy

According to the reference manual, the Reset Configuration
Word Low Register bits 2-3 must be set to 0b10.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc83xx/hrcw/Kconfig | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig 
b/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig
index b67ccd661d..44f66cd528 100644
--- a/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/hrcw/Kconfig
@@ -539,8 +539,7 @@ config DDR_MC_CLOCK_MODE
 
 config SYSTEM_PLL_VCO_DIV
int
-   default 0 if ARCH_MPC832X
-   default 2 if ARCH_MPC8313
+   default 2 if ARCH_MPC8313 || ARCH_MPC832X
default 0 if SYSTEM_PLL_VCO_DIV_2 && !ARCH_MPC8360 && !ARCH_MPC837X
default 1 if SYSTEM_PLL_VCO_DIV_4 && !ARCH_MPC8360 && !ARCH_MPC837X
default 2 if SYSTEM_PLL_VCO_DIV_8 && !ARCH_MPC8360 && !ARCH_MPC837X
-- 
2.39.2

[PATCH v1 07/14] powerpc: mpc83xx: Don't activate MMU when not necessary

2023-04-06 Thread Christophe Leroy

At startup, some RAM is needed (for instance for stack) before
DRAM is initialised.

One way to offer such RAM, used by mpc83xx, is to lock some entries
in the cache. To do that, MMU needs to be activated.

On mpc83xx having a QUICC Engine an alternative is to user some
part of from the Multi User RAM, like done on mpc8xx for instance.
For that, the MMU is not needed.

Activating the MMU is problematic because exception vectors are not
setup yet so in case of ISI or DSI that CPU will crash and reboot.

At the time being, MMU is activated regardless.

Only activate it when locking cache entries to provide initial RAM.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc83xx/start.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S
index 4329b173db..6749263da8 100644
--- a/arch/powerpc/cpu/mpc83xx/start.S
+++ b/arch/powerpc/cpu/mpc83xx/start.S
@@ -215,6 +215,7 @@ in_flash:
 * gt-regs BAT can be reused after board_init_f calls
 * board_early_init_f (EVB only).
 */
+#ifdef CONFIG_SYS_INIT_RAM_LOCK
/* enable address translation */
bl  enable_addr_trans
sync
@@ -222,7 +223,6 @@ in_flash:
/* enable the data cache */
bl  dcache_enable
sync
-#ifdef CONFIG_SYS_INIT_RAM_LOCK
bl  lock_ram_in_cache
sync
 #endif
-- 
2.39.2

[PATCH v1 00/14] Add new CS GROUP CPU board CMPCPRO (v1)

2023-04-06 Thread Christophe Leroy

This series adds support for the last CPU board from
CS GROUP France (previously CSSI).

That CPU board called CMPCPRO has a mpc8321E CPU (Family PQII PRO hence
its name) and can be plugged in place of the CMPC885 board.

In order to support that new board, the following changes are included
in this series:
- Make the mpc8xx watchdog driver more generic for reusing it
with mpc83xx
- Fix various small problems on mpc83xx platform
- Add a GPIO Driver for QE GPIOs
- Add support for mpc832x into mpc83xx SPI driver
- Refactor existing board code that will be shared with new board
- Add the new board

This series is based on today's next tree and has passed CI tests at
https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/15928

Christophe Leroy (14):
  powerpc: mpc8xx: Migrate to CONFIG_SYS_CLK_FREQ
  watchdog: mpc8xx: Rename it mpc8xxx
  watchdog: mpc8xxx: Make it generic
  watchdog: mpc8xxx: Add support for mpc83xx
  powerpc: mpc832x: Fix reset word
  powerpc: mpc83xx: Fix soc.h
  powerpc: mpc83xx: Don't activate MMU when not necessary
  clk: mpc83xx: Fix clocks for mpc832x
  gpio: Add QUICC Engine GPIOs driver
  spi: mpc8xxx: Add support for SPI on mpc832x
  board: cssi: Create dedicated file for common sources
  board: cssi: Refactor EEPROM read
  board: cssi: Move all mother board code into common.c
  board: cssi: Add CPU board CMPCPRO

 arch/powerpc/Kconfig |   2 +-
 arch/powerpc/cpu/mpc83xx/Kconfig |   5 +
 arch/powerpc/cpu/mpc83xx/cpu.c   |   2 +-
 arch/powerpc/cpu/mpc83xx/hrcw/Kconfig|   3 +-
 arch/powerpc/cpu/mpc83xx/start.S |   4 +-
 arch/powerpc/cpu/mpc8xx/Kconfig  |   6 +-
 arch/powerpc/cpu/mpc8xx/cpu_init.c   |   5 +-
 arch/powerpc/cpu/mpc8xx/speed.c  |   4 +-
 arch/powerpc/dts/Makefile|   1 +
 arch/powerpc/dts/cmpc885.dts |  12 +-
 arch/powerpc/dts/cmpcpro.dts | 189 +
 arch/powerpc/dts/mcr3000.dts |  20 +-
 arch/powerpc/include/asm/arch-mpc83xx/gpio.h |   5 +
 arch/powerpc/include/asm/arch-mpc83xx/soc.h  |  16 +-
 arch/powerpc/include/asm/mpc8xxx_spi.h   |   1 +
 board/cssi/MAINTAINERS   |   2 +
 board/cssi/cmpc885/Makefile  |   2 +-
 board/cssi/cmpc885/cmpc885.c | 241 ++-
 board/cssi/cmpcpro/Kconfig   |  26 ++
 board/cssi/cmpcpro/Makefile  |   8 +
 board/cssi/cmpcpro/cmpcpro.c | 404 +++
 board/cssi/cmpcpro/cmpcpro.env   |   8 +
 board/cssi/cmpcpro/nand.c|  43 ++
 board/cssi/common/common.c   | 219 ++
 board/cssi/common/common.h   |  15 +
 board/cssi/mcr3000/mcr3000.c |  14 -
 configs/CMPC885_defconfig|   4 +-
 configs/CMPCPRO_defconfig| 209 ++
 configs/MCR3000_defconfig|   5 +-
 drivers/clk/mpc83xx_clk.c|   7 +
 drivers/gpio/Kconfig |  18 +
 drivers/gpio/Makefile|   1 +
 drivers/gpio/qe_gpio.c   | 170 
 drivers/spi/mpc8xxx_spi.c|  13 +
 drivers/watchdog/Kconfig |  26 +-
 drivers/watchdog/Makefile|   2 +-
 drivers/watchdog/mpc8xx_wdt.c|  75 
 drivers/watchdog/mpc8xxx_wdt.c   | 112 +
 include/configs/cmpc885.h|   6 +
 include/configs/cmpcpro.h|  99 +
 40 files changed, 1660 insertions(+), 344 deletions(-)
 create mode 100644 arch/powerpc/dts/cmpcpro.dts
 create mode 100644 board/cssi/cmpcpro/Kconfig
 create mode 100644 board/cssi/cmpcpro/Makefile
 create mode 100644 board/cssi/cmpcpro/cmpcpro.c
 create mode 100644 board/cssi/cmpcpro/cmpcpro.env
 create mode 100644 board/cssi/cmpcpro/nand.c
 create mode 100644 board/cssi/common/common.c
 create mode 100644 board/cssi/common/common.h
 create mode 100644 configs/CMPCPRO_defconfig
 create mode 100644 drivers/gpio/qe_gpio.c
 delete mode 100644 drivers/watchdog/mpc8xx_wdt.c
 create mode 100644 drivers/watchdog/mpc8xxx_wdt.c
 create mode 100644 include/configs/cmpcpro.h

-- 
2.39.2

[PATCH v1 01/14] powerpc: mpc8xx: Migrate to CONFIG_SYS_CLK_FREQ

2023-04-06 Thread Christophe Leroy

8xx has CONFIG_8xx_GCLK_FREQ which is similar to
CONFIG_SYS_CLK_FREQ, and doesn't set CONFIG_SYS_CLK_FREQ.

Due to that, get_board_sys_clk() returns 0.

Remove CONFIG_8xx_GCLK_FREQ and use CONFIG_SYS_CLK_FREQ instead.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc8xx/Kconfig | 3 ---
 arch/powerpc/cpu/mpc8xx/speed.c | 4 ++--
 configs/CMPC885_defconfig   | 2 +-
 configs/MCR3000_defconfig   | 2 +-
 4 files changed, 4 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 628d3617bc..a705014512 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -30,9 +30,6 @@ config MPC885
 
 endchoice
 
-config 8xx_GCLK_FREQ
-   int "CPU GCLK Frequency"
-
 comment "Specific commands"
 
 config CMD_IMMAP
diff --git a/arch/powerpc/cpu/mpc8xx/speed.c b/arch/powerpc/cpu/mpc8xx/speed.c
index ad3d3f9101..1a882a3882 100644
--- a/arch/powerpc/cpu/mpc8xx/speed.c
+++ b/arch/powerpc/cpu/mpc8xx/speed.c
@@ -14,7 +14,7 @@
 DECLARE_GLOBAL_DATA_PTR;
 
 /*
- * get_clocks() fills in gd->cpu_clock depending on CONFIG_8xx_GCLK_FREQ
+ * get_clocks() fills in gd->cpu_clk depending on CONFIG_SYS_CLK_FREQ
  */
 int get_clocks(void)
 {
@@ -28,7 +28,7 @@ int get_clocks(void)
 * (For example, the cogent CMA286-60 CPU module has no
 * separate oscillator for PITRTCLK)
 */
-   gd->cpu_clk = CONFIG_8xx_GCLK_FREQ;
+   gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
 
if ((sccr & SCCR_EBDF11) == 0) {
/* No Bus Divider active */
diff --git a/configs/CMPC885_defconfig b/configs/CMPC885_defconfig
index 7dff6ff270..484a81b8d3 100644
--- a/configs/CMPC885_defconfig
+++ b/configs/CMPC885_defconfig
@@ -4,11 +4,11 @@ CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="cmpc885"
 CONFIG_SYS_PROMPT="S3K> "
+CONFIG_SYS_CLK_FREQ=13200
 CONFIG_ENV_ADDR=0x40004000
 CONFIG_MPC8xx=y
 CONFIG_TARGET_CMPC885=y
 CONFIG_MPC885=y
-CONFIG_8xx_GCLK_FREQ=13200
 CONFIG_CMD_IMMAP=y
 CONFIG_SYS_SIUMCR=0x0062
 CONFIG_SYS_SYPCR=0xFF8F
diff --git a/configs/MCR3000_defconfig b/configs/MCR3000_defconfig
index f96e9f06e1..4b5ce407ea 100644
--- a/configs/MCR3000_defconfig
+++ b/configs/MCR3000_defconfig
@@ -4,11 +4,11 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_ENV_SECT_SIZE=0x2000
 CONFIG_DEFAULT_DEVICE_TREE="mcr3000"
 CONFIG_SYS_PROMPT="S3K> "
+CONFIG_SYS_CLK_FREQ=13200
 CONFIG_SYS_LOAD_ADDR=0x20
 CONFIG_ENV_ADDR=0x4004000
 CONFIG_MPC8xx=y
 CONFIG_TARGET_MCR3000=y
-CONFIG_8xx_GCLK_FREQ=13200
 CONFIG_CMD_IMMAP=y
 CONFIG_SYS_SIUMCR=0x00600400
 CONFIG_SYS_SYPCR=0xFF8F
-- 
2.39.2

[PATCH] powerpc: Suppress 'executable stack' warning at link

2023-03-24 Thread Christophe Leroy

Following warning is observed at link.

  powerpc-linux-ld.bfd: warning: arch/powerpc/lib/reloc.o: missing 
.note.GNU-stack section implies executable stack
  powerpc-linux-ld.bfd: NOTE: This behaviour is deprecated and will be removed 
in a future version of the linker

Add -zexecstack to KBUILD_LDFLAGS in order to suppress this warning.

Reported-by: Stephane Franjou 
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/config.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk
index 725a4f48aa..53124f4e80 100644
--- a/arch/powerpc/config.mk
+++ b/arch/powerpc/config.mk
@@ -10,7 +10,7 @@ PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections \
 
 PF_CPPFLAGS_POWERPC:= $(call cc-option,-fno-ira-hoist-pressure,)
 PLATFORM_CPPFLAGS += -D__powerpc__ -ffixed-r2 -m32 $(PF_CPPFLAGS_POWERPC)
-KBUILD_LDFLAGS  += -m32 -melf32ppclinux
+KBUILD_LDFLAGS  += -m32 -melf32ppclinux -zexecstack
 
 #
 # When cross-compiling on NetBSD, we have to define __PPC__ or else we
-- 
2.39.2

[PATCH 1/2] mpc83xx: Remove stale CONFIG_SYS_LBLAWBAR{4/5/6/7}_PRELIM

2023-03-14 Thread Christophe Leroy

Last (incorrect) use of those CONFIG items was removed by
commit 9fd9abedcc ("TQM834x: remove defines causing gcc4.4 warnings")

Those items are invalid and should have been removed at the
same time because lblaw[] has only 4 elements.

And they were removed from the whitelist by
commit 9c5df7a2a9 ("mpc83xx: Migrate LBLAW_* to Kconfig")

Signed-off-by: Christophe Leroy 
Fixes: 9fd9abedcc ("TQM834x: remove defines causing gcc4.4 warnings")
---
 arch/powerpc/cpu/mpc83xx/cpu_init.c | 16 
 1 file changed, 16 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c 
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 2af5c89ae5..14df59bb8e 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -227,22 +227,6 @@ void cpu_init_f (volatile immap_t * im)
im->sysconf.lblaw[3].bar = CFG_SYS_LBLAWBAR3_PRELIM;
im->sysconf.lblaw[3].ar = CFG_SYS_LBLAWAR3_PRELIM;
 #endif
-#if defined(CONFIG_SYS_LBLAWBAR4_PRELIM) && defined(CONFIG_SYS_LBLAWAR4_PRELIM)
-   im->sysconf.lblaw[4].bar = CONFIG_SYS_LBLAWBAR4_PRELIM;
-   im->sysconf.lblaw[4].ar = CONFIG_SYS_LBLAWAR4_PRELIM;
-#endif
-#if defined(CONFIG_SYS_LBLAWBAR5_PRELIM) && defined(CONFIG_SYS_LBLAWAR5_PRELIM)
-   im->sysconf.lblaw[5].bar = CONFIG_SYS_LBLAWBAR5_PRELIM;
-   im->sysconf.lblaw[5].ar = CONFIG_SYS_LBLAWAR5_PRELIM;
-#endif
-#if defined(CONFIG_SYS_LBLAWBAR6_PRELIM) && defined(CONFIG_SYS_LBLAWAR6_PRELIM)
-   im->sysconf.lblaw[6].bar = CONFIG_SYS_LBLAWBAR6_PRELIM;
-   im->sysconf.lblaw[6].ar = CONFIG_SYS_LBLAWAR6_PRELIM;
-#endif
-#if defined(CONFIG_SYS_LBLAWBAR7_PRELIM) && defined(CONFIG_SYS_LBLAWAR7_PRELIM)
-   im->sysconf.lblaw[7].bar = CONFIG_SYS_LBLAWBAR7_PRELIM;
-   im->sysconf.lblaw[7].ar = CONFIG_SYS_LBLAWAR7_PRELIM;
-#endif
 #ifdef CONFIG_SYS_GPIO1_PRELIM
im->gpio[0].dat = CONFIG_SYS_GPIO1_DAT;
im->gpio[0].dir = CONFIG_SYS_GPIO1_DIR;
-- 
2.39.2

[PATCH 2/2] mpc83xx: Remove CONFIG_SYS_GPIO{1/2}_PRELIM and related

2023-03-14 Thread Christophe Leroy

Last use of CONFIG_SYS_GPIO1_PRELIM was removed by
commit fae2ea5951 ("ppc: Remove MPC8349EMDS board and ARCH_MPC8349
support").

Last use of CONFIG_SYS_GPIO2_PRELIM was removed even before by
commit 6843862342 ("ppc: Remove caddy2 / vme8349 boards")

Those two items were removed from whitelist by
commit 8cca60a2cb ("Kconfig: Remove some symbols from the whitelist")

Signed-off-by: Christophe Leroy 
Fixes: fae2ea5951 ("ppc: Remove MPC8349EMDS board and ARCH_MPC8349 support")
---
 arch/powerpc/cpu/mpc83xx/cpu_init.c | 8 
 1 file changed, 8 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c 
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 14df59bb8e..f5cb000de6 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -227,14 +227,6 @@ void cpu_init_f (volatile immap_t * im)
im->sysconf.lblaw[3].bar = CFG_SYS_LBLAWBAR3_PRELIM;
im->sysconf.lblaw[3].ar = CFG_SYS_LBLAWAR3_PRELIM;
 #endif
-#ifdef CONFIG_SYS_GPIO1_PRELIM
-   im->gpio[0].dat = CONFIG_SYS_GPIO1_DAT;
-   im->gpio[0].dir = CONFIG_SYS_GPIO1_DIR;
-#endif
-#ifdef CONFIG_SYS_GPIO2_PRELIM
-   im->gpio[1].dat = CONFIG_SYS_GPIO2_DAT;
-   im->gpio[1].dir = CONFIG_SYS_GPIO2_DIR;
-#endif
 }
 
 int cpu_init_r (void)
-- 
2.39.2

Re: [ANN] U-Boot v2023.04-rc4 released

2023-03-14 Thread Christophe Leroy

Le 14/03/2023 à 18:55, Tom Rini a écrit :
> On Tue, Mar 14, 2023 at 05:27:34AM +0000, Christophe Leroy wrote:
>> Hi Tom,
>>
>> Le 14/03/2023 à 01:53, Tom Rini a écrit :
>>> Hey all,
>>>
>>> It's the scheduled day for -rc4, and once again it's the end of my day.
>>> The delta between -rc3 and -rc4 is about what I would hope for. I still
>>> hope to see a PR to fix m68k, and to address some mpc8xx problems as
>>> well, but other than that I do hope for a quiet cycle. The next
>>> branch feels like it's working to me at least, so feedback on that would
>>> be appreciated.
>>
>> Are you expecting anything from my side on mpc8xx ? What are the
>> problems you mention ?
> 
> I thought you had a few fixes, to go along with the new platform you
> had posted? It's a bit late for the platform, but if there's fixes, they
> can go in, and a PR for them please.
> 

Well, I'm doing some fixes on the fly while I'm working on getting our 
last board ready for upstreaming, but all of them are minor for now. You 
already took a few of them into next, there is only one remaining in 
patchwork: 
https://patchwork.ozlabs.org/project/uboot/patch/7fdac1fd6172f03c43ff65ae49a38f9f086c4c9f.1674826981.git.christophe.le...@csgroup.eu/

at the moment.

The second patch I have in patchwork is about the CHECKER not working 
for several files, but the conclusion was to apply latest linux changes, 
I don't know really how you are used to proceed for that. 
https://patchwork.ozlabs.org/project/uboot/patch/5da1197a115626a7b5793348b43e290ee94e700d.1674757023.git.christophe.le...@csgroup.eu/

By the way, the board I'm working on at the moment doesn't have an 
mpc8xx CPU but an mpc83xx CPU, which is maintained by Mario Six. I have 
not seen much recent activity from him though. Is that OK if I put that 
board into a PR in mpc8xx tree if I'm ready before next merge window ?

Thanks
Christophe

Re: [ANN] U-Boot v2023.04-rc4 released

2023-03-13 Thread Christophe Leroy

Hi Tom,

Le 14/03/2023 à 01:53, Tom Rini a écrit :
> Hey all,
> 
> It's the scheduled day for -rc4, and once again it's the end of my day.
> The delta between -rc3 and -rc4 is about what I would hope for. I still
> hope to see a PR to fix m68k, and to address some mpc8xx problems as
> well, but other than that I do hope for a quiet cycle. The next
> branch feels like it's working to me at least, so feedback on that would
> be appreciated.

Are you expecting anything from my side on mpc8xx ? What are the 
problems you mention ?

Thanks
Christophe

[PATCH] powerpc, mpc83xx: Remove CONFIG_ELBC_BRx_ORx

2023-02-26 Thread Christophe Leroy

Commit fe7d654d04 ("mpc83xx: Migrate CONFIG_SYS_{BR, OR}*_PRELIM to
Kconfig") converted CONFIG_SYS_{BRx/ORx}_PRELIM to Kconfig by
implementing a fine-grained selection of every bit in Kconfig.

But commit c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to
Kconfig") reworked it so that you now just have to provide the raw
value of each register in Kconfig. However, all fine-grained
Kconfig items remained allthough they are not used anymore.

Remove them all.

Fixes: c7fad78ec0 ("Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig")
Signed-off-by: Christophe Leroy 
---
 arch/powerpc/cpu/mpc83xx/elbc/Kconfig   |   6 -
 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0 | 733 
 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1 | 733 
 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2 | 733 
 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3 | 733 
 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4 | 733 
 configs/MPC837XERDB_defconfig   |  31 -
 configs/gazerbeam_defconfig |  25 -
 configs/kmcoge5ne_defconfig |  37 -
 configs/kmeter1_defconfig   |  28 -
 configs/kmopti2_defconfig   |  34 -
 configs/kmsupx5_defconfig   |  28 -
 configs/kmtepr2_defconfig   |  34 -
 configs/tuge1_defconfig |  28 -
 configs/tuxx1_defconfig |  36 -
 15 files changed, 3952 deletions(-)
 delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0
 delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1
 delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2
 delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3
 delete mode 100644 arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4

diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig 
b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig
index 74c4ff3ed4..06841523ef 100644
--- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig
@@ -23,10 +23,4 @@ config ELBC_BR_OR_NAND_PRELIM_4
 
 endchoice
 
-source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0"
-source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc1"
-source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc2"
-source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc3"
-source "arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc4"
-
 endmenu
diff --git a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0 
b/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0
deleted file mode 100644
index 208eed0495..00
--- a/arch/powerpc/cpu/mpc83xx/elbc/Kconfig.elbc0
+++ /dev/null
@@ -1,733 +0,0 @@
-menuconfig ELBC_BR0_OR0
-   bool "ELBC BR0/OR0"
-
-if ELBC_BR0_OR0
-
-config BR0_OR0_NAME
-   string "Identifier"
-
-config BR0_OR0_BASE
-   hex "Port base"
-
-choice
-   prompt "Port size"
-
-config BR0_PORTSIZE_8BIT
-   bool "8-bit"
-
-config BR0_PORTSIZE_16BIT
-   depends on !BR0_MACHINE_FCM
-   bool "16-bit"
-
-
-config BR0_PORTSIZE_32BIT
-   depends on !BR0_MACHINE_FCM
-   depends on ARCH_MPC8360 || ARCH_MPC8379
-   bool "32-bit"
-
-endchoice
-
-if BR0_MACHINE_FCM
-
-choice
-   prompt "Data Error Checking"
-
-config BR0_ERRORCHECKING_DISABLED
-   bool "Disabled"
-
-config BR0_ERRORCHECKING_ECC_CHECKING
-   bool "ECC checking / No ECC generation"
-
-config BR0_ERRORCHECKING_BOTH
-   bool "ECC checking and generation"
-
-endchoice
-
-endif
-
-config BR0_WRITE_PROTECT
-   bool "Write-protect"
-
-config BR0_MACHINE_UPM
-   bool
-
-choice
-   prompt "Machine select"
-
-config BR0_MACHINE_GPCM
-   bool "GPCM"
-
-config BR0_MACHINE_FCM
-   depends on !ARCH_MPC832X && !ARCH_MPC8360
-   bool "FCM"
-
-config BR0_MACHINE_SDRAM
-   depends on ARCH_MPC8360
-   bool "SDRAM"
-
-config BR0_MACHINE_UPMA
-   select BR0_MACHINE_UPM
-   bool "UPM (A)"
-
-config BR0_MACHINE_UPMB
-   select BR0_MACHINE_UPM
-   bool "UPM (B)"
-
-config BR0_MACHINE_UPMC
-   select BR0_MACHINE_UPM
-   bool "UPM (C)"
-
-endchoice
-
-if ARCH_MPC8313 || ARCH_MPC8323 || ARCH_MPC8360
-
-choice
-   prompt "Atomic operations"
-
-config BR0_ATOMIC_NONE
-   bool "No atomic operations"
-
-config BR0_ATOMIC_RAWA
-   bool "Read-after-write-atomic"
-
-config BR0_ATOMIC_WARA
-   bool "Write-after-read-atomic"
-
-endchoice
-
-endif
-
-if BR0_MACHINE_GPCM || BR0_MACHINE_FCM || BR0_MACHINE_UPM || BR0_MACHINE_SDRAM
-
-choice
-   prompt "Address mask"
-
-config OR0_AM_32_KBYTES
-   depends on !BR0_MACHINE_SDRAM
-   bool "32 kb"
-
-config OR0_AM_64_KBYTES
-   bool "64 kb"
-
-config OR0_AM_128_KBYTES
-

[GIT PULL] Please pull u-boot-mpc8xx

2023-02-12 Thread Christophe Leroy

Hi Tom,

This pull requests brings:
- A fix for a long standing bug that has been exposed by commit 
50128aeb0f8 ("cyclic: get rid of cyclic_init()") preventing 8xx boards 
from booting since u-boot 2023.01
- A GPIO driver for powerpc 8xx chip
- Fixup for powerpc 8xx SPI driver
- A new powerpc 8xx board
- The two devices having that board.

This is my first pull request let me know if anything.

CI: https://source.denx.de/u-boot/custodians/u-boot-mpc8xx/-/pipelines/15137

Thanks
Christophe


The following changes since commit 30db474704405be823259851cbb76fa05366c8af:

   Prepare v2023.04-rc1 (2023-01-30 15:36:45 -0500)

are available in the Git repository at:

   g...@source.denx.de:u-boot/custodians/u-boot-mpc8xx.git for-2023.04

for you to fetch changes up to 6a8c36b936ab69a7521ec1ecfd20f7b85f7f59c5:

   board: cssi: Add MIAE & VGoIP devices (2023-02-11 08:47:58 +0100)

--------
Christophe Leroy (9):
   powerpc/mpc8xx: Zero boot_flags arg for calling board_init_f()
   board: MCR3000: Use lowercase filenames
   board: MCR3000: Migrate to using CONFIG_EXTRA_ENV_TEXT
   board: MCR3000: Modernise the settings to properly work on 
lastest u-boot version
   board: MCR3000: Remove update of non-existing e1-wan DT node
   driver, gpio: Add support for MPC 8xx CPU ports
   spi, mpc8xx: Add support for chipselect via GPIO and fixups
   board: cssi: Add new board MCR3000_2G
   board: cssi: Add MIAE & VGoIP devices

  arch/powerpc/Kconfig   |1 +
  arch/powerpc/cpu/mpc8xx/Kconfig|6 +-
  arch/powerpc/cpu/mpc8xx/start.S|1 +
  arch/powerpc/dts/Makefile  |1 +
  arch/powerpc/dts/cmpc885.dts   |   94 ++
  arch/powerpc/include/asm/arch-mpc8xx/gpio.h|   12 +
  board/cssi/MAINTAINERS |4 +-
  board/cssi/cmpc885/Kconfig |   23 +
  board/cssi/cmpc885/Makefile|   10 +
  board/cssi/cmpc885/cmpc885.c   | 1106 

  board/cssi/cmpc885/cmpc885.env |7 +
  board/cssi/cmpc885/nand.c  |   47 +
  board/cssi/cmpc885/sdram.c |  107 ++
  board/cssi/cmpc885/u-boot.lds  |   95 ++
  board/cssi/{MCR3000 => mcr3000}/Kconfig|4 +-
  board/cssi/{MCR3000 => mcr3000}/Makefile   |2 +-
  .../cssi/{MCR3000/MCR3000.c => mcr3000/mcr3000.c}  |   12 -
  board/cssi/mcr3000/mcr3000.env |   14 +
  board/cssi/{MCR3000 => mcr3000}/nand.c |0
  board/cssi/{MCR3000 => mcr3000}/u-boot.lds |0
  configs/CMPC885_defconfig  |  110 ++
  configs/MCR3000_defconfig  |   10 +-
  drivers/gpio/Kconfig   |7 +
  drivers/gpio/Makefile  |1 +
  drivers/gpio/mpc8xx_gpio.c |  347 ++
  drivers/spi/mpc8xx_spi.c   |   96 +-
  include/configs/MCR3000.h  |   83 --
  include/configs/cmpc885.h  |   29 +
  include/configs/mcr3000.h  |   40 +
  29 files changed, 2129 insertions(+), 140 deletions(-)
  create mode 100644 arch/powerpc/dts/cmpc885.dts
  create mode 100644 arch/powerpc/include/asm/arch-mpc8xx/gpio.h
  create mode 100644 board/cssi/cmpc885/Kconfig
  create mode 100644 board/cssi/cmpc885/Makefile
  create mode 100644 board/cssi/cmpc885/cmpc885.c
  create mode 100644 board/cssi/cmpc885/cmpc885.env
  create mode 100644 board/cssi/cmpc885/nand.c
  create mode 100644 board/cssi/cmpc885/sdram.c
  create mode 100644 board/cssi/cmpc885/u-boot.lds
  rename board/cssi/{MCR3000 => mcr3000}/Kconfig (78%)
  rename board/cssi/{MCR3000 => mcr3000}/Makefile (90%)
  rename board/cssi/{MCR3000/MCR3000.c => mcr3000/mcr3000.c} (90%)
  create mode 100644 board/cssi/mcr3000/mcr3000.env
  rename board/cssi/{MCR3000 => mcr3000}/nand.c (100%)
  rename board/cssi/{MCR3000 => mcr3000}/u-boot.lds (100%)
  create mode 100644 configs/CMPC885_defconfig
  create mode 100644 drivers/gpio/mpc8xx_gpio.c
  delete mode 100644 include/configs/MCR3000.h
  create mode 100644 include/configs/cmpc885.h
  create mode 100644 include/configs/mcr3000.h

[PATCH v2 7/8] board: cssi: Add new board MCR3000_2G

2023-02-11 Thread Christophe Leroy

This adds a new board from CS GROUP. The board is called
MCR3000_2G, and has a CPU board called CMPC885.

That CPU board is shared with another equipment that will
be added in a later patch.

That board stores Ethernet MAC addresses in an EEPROM which
is accessed using SPI bus.

This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.

Signed-off-by: Christophe Leroy 
Reviewed-by: FRANJOU Stephane 
---
 arch/powerpc/cpu/mpc8xx/Kconfig |   4 +
 arch/powerpc/dts/Makefile   |   1 +
 arch/powerpc/dts/cmpc885.dts|  94 
 board/cssi/MAINTAINERS  |   2 +
 board/cssi/cmpc885/Kconfig  |  23 +
 board/cssi/cmpc885/Makefile |  10 +
 board/cssi/cmpc885/cmpc885.c| 830 
 board/cssi/cmpc885/cmpc885.env  |   7 +
 board/cssi/cmpc885/nand.c   |  47 ++
 board/cssi/cmpc885/sdram.c  | 107 
 board/cssi/cmpc885/u-boot.lds   |  95 
 configs/CMPC885_defconfig   | 110 +
 include/configs/cmpc885.h   |  29 ++
 13 files changed, 1359 insertions(+)
 create mode 100644 arch/powerpc/dts/cmpc885.dts
 create mode 100644 board/cssi/cmpc885/Kconfig
 create mode 100644 board/cssi/cmpc885/Makefile
 create mode 100644 board/cssi/cmpc885/cmpc885.c
 create mode 100644 board/cssi/cmpc885/cmpc885.env
 create mode 100644 board/cssi/cmpc885/nand.c
 create mode 100644 board/cssi/cmpc885/sdram.c
 create mode 100644 board/cssi/cmpc885/u-boot.lds
 create mode 100644 configs/CMPC885_defconfig
 create mode 100644 include/configs/cmpc885.h

diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig
index 65293ae728..628d3617bc 100644
--- a/arch/powerpc/cpu/mpc8xx/Kconfig
+++ b/arch/powerpc/cpu/mpc8xx/Kconfig
@@ -11,6 +11,9 @@ choice
 config TARGET_MCR3000
bool "Support MCR3000 board from CSSI"
 
+config TARGET_CMPC885
+   bool "Support CMPC885 board from CSSI"
+
 endchoice
 
 choice
@@ -86,4 +89,5 @@ config SYS_DER
 
 source "board/cssi/mcr3000/Kconfig"
 
+source "board/cssi/cmpc885/Kconfig"
 endmenu
diff --git a/arch/powerpc/dts/Makefile b/arch/powerpc/dts/Makefile
index a4b0d7ddc4..26b592b85d 100644
--- a/arch/powerpc/dts/Makefile
+++ b/arch/powerpc/dts/Makefile
@@ -29,6 +29,7 @@ dtb-$(CONFIG_TARGET_TUGE1) += kmtuge1.dtb
 dtb-$(CONFIG_TARGET_TUXX1) += kmtuxa1.dtb
 dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb
 dtb-$(CONFIG_TARGET_GAZERBEAM) += gazerbeam.dtb
+dtb-$(CONFIG_TARGET_CMPC885) += cmpc885.dtb
 
 include $(srctree)/scripts/Makefile.dts
 
diff --git a/arch/powerpc/dts/cmpc885.dts b/arch/powerpc/dts/cmpc885.dts
new file mode 100644
index 00..adda0f3e9d
--- /dev/null
+++ b/arch/powerpc/dts/cmpc885.dts
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * CMPC885 Device Tree Source
+ *
+ * Copyright 2020 CS Group
+ *
+ */
+
+/dts-v1/;
+
+/ {
+   model = "CMPC885";
+   compatible = "fsl, cmpc885", "fsl,mod885";
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   chosen {
+   stdout-path = 
+   };
+
+   WDT: watchdog@0 {
+   device_type = "watchdog";
+   compatible = "fsl,pq1-wdt";
+   };
+
+   SERIAL: serial {
+   compatible = "fsl,pq1-smc";
+   };
+
+   FEC1: fec@0 {
+   compatible = "fsl,pq1-fec1";
+   };
+
+   FEC2: fec@1 {
+   compatible = "fsl,pq1-fec2";
+   };
+
+   soc: immr@ff00 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   device-type = "soc";
+   compatible = "simple-bus";
+   ranges = <0 0xff00 0x4000>;
+   reg = <0xff00 0x0200>;
+
+   CPM1_PIO_B: gpio-controller@ab8 {
+   #gpio-cells = <2>;
+   compatible = "fsl,cpm1-pario-bank-b";
+   reg = <0xab8 0x10>;
+   gpio-controller;
+   };
+
+   CPM1_PIO_D: gpio-controller@970 {
+   #gpio-cells = <2>;
+   compatible = "fsl,cpm1-pario-bank-d";
+   reg = <0x970 0x10>;
+   gpio-controller;
+   };
+
+   CPM1_PIO_A: gpio-controller@950 {
+   #gpio-cells = <2>;
+   compatible = "fsl,cpm1-pario-bank-a";
+   reg = <0x950 0x10>;
+   gpio-controller;
+   };
+
+   CPM1_PIO_C: gpio-controller@960 {
+   #gpio-cells = <2>;
+   compatible = "fsl,cpm1-pario-bank-c";
+   reg = <0x960 0x10>;
+   gpio-control

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