[U-Boot] [PATCH] arm: Fix armv8 compilation error
From: "Shaibal.Dutta"
Fix following compilation error when CONFIG_ARM64 is defined
Error: unknown or missing system register name at operand 2
-- `mrs x0,daifmsr daifset,#3'
Signed-off-by: Shaibal.Dutta
Signed-off-by: Darwin Rambo
Reviewed-by: Darwin Rambo
---
arch/arm/include/asm/proc-armv/system.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/proc-armv/system.h
b/arch/arm/include/asm/proc-armv/system.h
index 693d1f4..c61374e 100644
--- a/arch/arm/include/asm/proc-armv/system.h
+++ b/arch/arm/include/asm/proc-armv/system.h
@@ -22,7 +22,7 @@
#define local_irq_save(flags) \
({ \
asm volatile( \
- "mrs%0, daif" \
+ "mrs%0, daif\n" \
"msrdaifset, #3"\
: "=r" (flags) \
: \
--
1.7.9.5
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Re: [U-Boot] [PATCH v5] arm: Add support for semihosting for armv8 fastmodel targets.
On 14-06-09 11:25 AM, Albert ARIBAUD wrote: Hi Darwin, On Mon, 9 Jun 2014 11:12:59 -0700, Darwin Rambo wrote: [...] Please refer to README.semihosting for a more detailed description of semihosting and how it is used with the armv8 virtual platforms. With your permission, will apply but modify the above into... Please refer to doc/README.semihosting for a more detailed description of semihosting and how it is used with the armv8 virtual platforms. ... just so that people can tell that the README file is in the doc/ directory. Absolutely! Thanks. Darwin Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5] arm: Add support for semihosting for armv8 fastmodel targets.
The armv8 ARM Trusted Firmware (ATF) can be used to load various ATF
images and u-boot, and does this for virtual platforms by using
semihosting. This commit extends this idea by allowing u-boot to also
use semihosting to load the kernel/ramdisk/dtb. This eliminates the need
for a bootwrapper and produces a more realistic boot sequence with
virtual models.
Though the semihosting code is quite generic, support for armv7 in
fastmodel is less useful due to the wide range of available silicon
and the lack of a free armv7 fastmodel, so this change contains an
untested armv7 placeholder for the service trap opcode.
Please refer to README.semihosting for a more detailed description of
semihosting and how it is used with the armv8 virtual platforms.
Signed-off-by: Darwin Rambo
Cc: tr...@ti.com
Cc: feng...@phytium.com.cn
Cc: bhupesh.sha...@freescale.com
---
Changes in v5:
- Shorten and cleanup commit message
- Move more commit description to README.semihosting
Changes in v4:
- refreshed patch and retested
- fix boards.cfg conflict
- fix GICV3 conflict
- minor documentation cleanup - semihosting.c, README.semihosting
- change maintainer of semihosting target
- tested with vexpress_aemv8a_semi target (BASE_FVP) against
e75e73dd5f280b91f5bfc0a76a0fd09b6eba1c66 (May 16, 2014)
Changes in v3:
- minor format fixup in board file
Changes in v2:
- use kernel_addr_r, fdt_addr_r, initrd_addr_r convention.
- Use env variables for kernel/fdt/initrd file names.
- Add CONFIG_BASE_FVP to differentiate VE and BASE FVP models.
- CONFIG_SEMIHOSTING only refers to bringing in semihosting code now.
- Remove unnecessary CONFIG_SYS_BAUDRATE_TABLE, CONFIG_SYS_PROMPT_HUSH_PS2
- Remove vexpress_aemv8a_semi.h and replace with CONFIG_BASE_FVP
- Update boards.cfg with option SEMIHOSTING and BASE_FVP
- Add doc/README.semihosting
Changes in v1:
- Initial code
- Remove empty timer_init() function.
arch/arm/include/asm/semihosting.h | 21 +++
arch/arm/lib/Makefile|1 +
arch/arm/lib/semihosting.c | 233 ++
board/armltd/vexpress64/vexpress64.c | 101 ++-
boards.cfg |1 +
doc/README.semihosting | 54
include/configs/vexpress_aemv8a.h| 63 -
7 files changed, 462 insertions(+), 12 deletions(-)
create mode 100644 arch/arm/include/asm/semihosting.h
create mode 100644 arch/arm/lib/semihosting.c
create mode 100644 doc/README.semihosting
diff --git a/arch/arm/include/asm/semihosting.h
b/arch/arm/include/asm/semihosting.h
new file mode 100644
index 000..74111dc
--- /dev/null
+++ b/arch/arm/include/asm/semihosting.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2014 Broadcom Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __SEMIHOSTING_H__
+#define __SEMIHOSTING_H__
+
+/*
+ * ARM semihosting functions for loading images to memory. See the source
+ * code for more information.
+ */
+int smh_load(const char *fname, void *memp, int avail, int verbose);
+int smh_read(int fd, void *memp, int len);
+int smh_open(const char *fname, char *modestr);
+int smh_close(int fd);
+int smh_len_fd(int fd);
+int smh_len(const char *fname);
+
+#endif /* __SEMIHOSTING_H__ */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 585f1f7..1ef2400 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
else
obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
endif
+obj-$(CONFIG_SEMIHOSTING) += semihosting.o
obj-y += sections.o
ifdef CONFIG_ARM64
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
new file mode 100644
index 000..cb5dc26
--- /dev/null
+++ b/arch/arm/lib/semihosting.c
@@ -0,0 +1,233 @@
+/*
+ * Copyright 2014 Broadcom Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Minimal semihosting implementation for reading files into memory. If more
+ * features like writing files or console output are required they can be
+ * added later. This code has been tested on arm64/aarch64 fastmodel only.
+ * An untested placeholder exists for armv7 architectures, but since they
+ * are commonly available in silicon now, fastmodel usage makes less sense
+ * for them.
+ */
+#include
+#include
+
+#define SYSOPEN0x01
+#define SYSCLOSE 0x02
+#define SYSREAD0x06
+#define SYSFLEN0x0C
+
+#define MODE_READ 0x0
+#define MODE_READBIN 0x1
+
+/*
+ * Call the handler
+ */
+static int smh_trap(unsigned int sysnum, void *addr)
+{
+ register int result asm("r0");
+#if defined(CONFIG_ARM64)
+ asm volatile ("hlt #0xf000" : "=r" (result) : "0"(sysnum), "r"(addr));
+#else
+ /* Note - untested placeholder */
+ asm volatile ("svc #0x123456" : "=r" (result) : "0"(sysnum), "r"(addr));
+#endif
+ return result;
+}
+
+/*
+ * Open, load a
Re: [U-Boot] [PATCH] arm: Allow u-boot to run from offset base address
On 14-06-02 12:26 AM, Albert ARIBAUD wrote: Hi Darwin, On Mon, 26 May 2014 09:11:35 -0700, Darwin Rambo wrote: Hi Albert, The previous stage bootloader (which I had no control over) wanted it's header to be aligned to a 512 byte MMC block boundary, presumably since this allowed DMA operations without copy/shifting. At the same time, I didn't want to hack a header into start.S because I didn't want to carry another downstream patch. So I investigated if I could shift u-boot's base address as a feature that would allow an aligned header to be used without the start.S patch. I know that a custom header patch to start.S would work, and that a header plus padding will also work. But I found out that you can align the base on certain smaller offsets if you keep the relocation offset at nice boundaries like 0x1000 and if the relocation offset is a multiple of the maximum alignment requirements of the image. The original patch I submitted didn't handle an end condition properly, was ARM64-specific (wasn't tested on other architectures), and because the patch was NAK'd, I didn't bother to submit a v2 patch and consider the idea to be dead. I'm happy to abandon the patch. I hope this helps. Thanks. If I understand correctly, your target has a requirement for storing the image on a 512-byte boundary. But how does this affect the loading of the image into RAM, where the requirement is only that the vectors table be 32-bytes aligned? I mean, if you store the image in MMC at offset 0x200 (thus satisfying the 512-byte boundary requirement) and load it to, say, offset 0x10020 in RAM, how is it a problem for your target? If my example above inadequately represents the issue, then can you please provide a similar but adequate example, a failure case scenario, so that I can hve a correct understanding of the problem? Hi Albert, The constraints I have that I can't change, are that - the 32 byte header is postprocessed and prepended to the image after the build is complete - the header is at a 512 byte alignment in MMC - the header and image are copied to SDRAM to an alignment like 0x8800. Thus the u-boot image is linked at and starts at 0x8820. - the vectors need to be 0x800 aligned for armv8 (.align 11 directive) So the failure case is that when the relocation happens, it relocates to a 0x1000 alignment, say something like 0xa000. The relocation offset is not a multiple of 0x1000 (0xa000 - 0x8820) and the relocation fails. Adjusting the relocation offset to a multiple of 0x1000 (by making the relocation address end in 0xN020) fixes the issues and allows u-boot to relocate and run from this address without failing. I hope this helps explain it a bit better. Best regards, Darwin Best regards, Darwin Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: free allocated memory on initialization errors
Cleanup to balance malloc/free calls.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
---
drivers/mmc/kona_sdhci.c |8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
index 77e42c8..f804f4c 100644
--- a/drivers/mmc/kona_sdhci.c
+++ b/drivers/mmc/kona_sdhci.c
@@ -113,16 +113,20 @@ int kona_sdhci_init(int dev_index, u32 min_clk, u32
quirks)
__func__, dev_index);
ret = -EINVAL;
}
- if (ret)
+ if (ret) {
+ free(host);
return ret;
+ }
host->name = "kona-sdhci";
host->ioaddr = reg_base;
host->quirks = quirks;
host->host_caps = MMC_MODE_HC;
- if (init_kona_mmc_core(host))
+ if (init_kona_mmc_core(host)) {
+ free(host);
return -EINVAL;
+ }
if (quirks & SDHCI_QUIRK_REG32_RW)
host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16;
--
1.7.9.5
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Re: [U-Boot] [PATCH] arm: Allow u-boot to run from offset base address
Hi Albert, The previous stage bootloader (which I had no control over) wanted it's header to be aligned to a 512 byte MMC block boundary, presumably since this allowed DMA operations without copy/shifting. At the same time, I didn't want to hack a header into start.S because I didn't want to carry another downstream patch. So I investigated if I could shift u-boot's base address as a feature that would allow an aligned header to be used without the start.S patch. I know that a custom header patch to start.S would work, and that a header plus padding will also work. But I found out that you can align the base on certain smaller offsets if you keep the relocation offset at nice boundaries like 0x1000 and if the relocation offset is a multiple of the maximum alignment requirements of the image. The original patch I submitted didn't handle an end condition properly, was ARM64-specific (wasn't tested on other architectures), and because the patch was NAK'd, I didn't bother to submit a v2 patch and consider the idea to be dead. I'm happy to abandon the patch. I hope this helps. Best regards, Darwin On 14-05-26 02:50 AM, Albert ARIBAUD wrote: Hi Wolfgang, Darwin, On Thu, 15 May 2014 21:19:57 +0200, Wolfgang Denk wrote: Setting CONFIG_SYS_TEXT_BASE to something like 0x8820 is extremly fishy. If you want to add some header data to your image, you should not shift the text segment, but rather include your header in the start of the text segment. Or keep it completely separate, without messing with CONFIG_SYS_TEXT_BASE. Back to the origin of the discussion and patch: Darwin, can you describe the actual technical difficulty which caused you to you write and submitting this patch? Best regards, Wolfgang Denk Amicalement, ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4] arm: Add support for semihosting for armv8 fastmodel targets.
The reason for this change is to be able to use the ARM Trusted Firmware (ATF) to load the various ATF images, plus u-boot, which can then load the kernel/ramdisk/dtb with calls to an external host from a standard fastmodel armv8 board file using semihosting, and then launch the kernel without a bootwrapper. This gives us a more realistic boot sequence. There are two main ARM virtual Fixed Virtual Platform (FVP) models, Versatile Express (VE) FVP and BASE FVP (See http://www.arm.com/products/tools/models/fast-models/foundation-model.php) The initial vexpress64 u-boot board created here runs on the VE virtual platform using the license-free Foundation_v8 simulator. Fortunately, the Foundation_v8 simulator also supports the BASE_FVP model which companies can purchase licenses for and contain much more functionality. So we can, in u-boot, run either model by either using the VE FVP (default), or turning on CONFIG_BASE_FVP for the more full featured model. Rather than create a new armv8 board similar to armltd/vexpress64, add semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING and CONFIG_BASE_FVP both set. Also reuse the existing board config file vexpress_aemv8a.h but differentiate the two models by the presence or absence of CONFIG_BASE_FVP. This change is tested and works on both the Foundation and Base fastmodel simulators. Support for armv7 in fastmodel is less useful due to the wide range of available silicon and the lack of a free armv7 fastmodel, so this change contains an untested armv7 placeholder for the service trap opcode. The level of semihosting support is minimal, restricted to just what it takes to load images to memory. If more semihosting functionality is required, such as file seek, outputting strings, reading characters, etc, then it can be easily added later. Signed-off-by: Darwin Rambo Cc: tr...@ti.com Cc: feng...@phytium.com.cn Cc: bhupesh.sha...@freescale.com --- Changes in v4: - refreshed patch and retested - fix boards.cfg conflict - fix GICV3 conflict - minor documentation cleanup - semihosting.c, README.semihosting - change maintainer of semihosting target - tested with vexpress_aemv8a_semi target (BASE_FVP) against e75e73dd5f280b91f5bfc0a76a0fd09b6eba1c66 (May 16, 2014) Changes in v3: - minor format fixup in board file Changes in v2: - use kernel_addr_r, fdt_addr_r, initrd_addr_r convention. - Use env variables for kernel/fdt/initrd file names. - Add CONFIG_BASE_FVP to differentiate VE and BASE FVP models. - CONFIG_SEMIHOSTING only refers to bringing in semihosting code now. - Remove unnecessary CONFIG_SYS_BAUDRATE_TABLE, CONFIG_SYS_PROMPT_HUSH_PS2 - Remove vexpress_aemv8a_semi.h and replace with CONFIG_BASE_FVP - Update boards.cfg with option SEMIHOSTING and BASE_FVP - Add doc/README.semihosting Changes in v1: - Initial code - Remove empty timer_init() function. arch/arm/include/asm/semihosting.h | 21 +++ arch/arm/lib/Makefile|1 + arch/arm/lib/semihosting.c | 233 ++ board/armltd/vexpress64/vexpress64.c | 101 ++- boards.cfg |1 + doc/README.semihosting | 35 + include/configs/vexpress_aemv8a.h| 63 - 7 files changed, 443 insertions(+), 12 deletions(-) create mode 100644 arch/arm/include/asm/semihosting.h create mode 100644 arch/arm/lib/semihosting.c create mode 100644 doc/README.semihosting diff --git a/arch/arm/include/asm/semihosting.h b/arch/arm/include/asm/semihosting.h new file mode 100644 index 000..74111dc --- /dev/null +++ b/arch/arm/include/asm/semihosting.h @@ -0,0 +1,21 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __SEMIHOSTING_H__ +#define __SEMIHOSTING_H__ + +/* + * ARM semihosting functions for loading images to memory. See the source + * code for more information. + */ +int smh_load(const char *fname, void *memp, int avail, int verbose); +int smh_read(int fd, void *memp, int len); +int smh_open(const char *fname, char *modestr); +int smh_close(int fd); +int smh_len_fd(int fd); +int smh_len(const char *fname); + +#endif /* __SEMIHOSTING_H__ */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 585f1f7..1ef2400 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o endif +obj-$(CONFIG_SEMIHOSTING) += semihosting.o obj-y += sections.o ifdef CONFIG_ARM64 diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c new file mode 100644 index 000..cb5dc26 --- /dev/null +++ b/arch/arm/lib/semihosting.c @@ -0,0 +1,233 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/* + * Minimal semihosting implementation for reading files into memory. If more + * features like writing files or console output are required they can be + * added
Re: [U-Boot] [PATCH v3] arm: Add support for semihosting for armv8 fastmodel targets.
Hi Bhupesh, I believe that this patch is now stale, because other changes to boards.cfg and vexpress_aemv8a.h were done after this patch was submitted. So it doesn't apply cleanly anymore and needs to be regenerated. In the meantime can you remove this patch from your world since I believe that it doesn't provide any functionality you need at this time? I will send in a v4 patch that applies cleanly to the latest u-boot. Am I suggesting the right process here? Thanks, Darwin On 14-05-23 05:05 AM, bhupesh.sha...@freescale.com wrote: Hi Darwin, -Original Message----- From: Darwin Rambo [mailto:dra...@broadcom.com] Sent: Tuesday, March 25, 2014 12:46 AM To: u-boot@lists.denx.de Cc: Darwin Rambo; Albert Aribaud; Tom Rini; feng...@phytium.com.cn; Sharma Bhupesh-B45370 Subject: [PATCH v3] arm: Add support for semihosting for armv8 fastmodel targets. The reason for this change is to be able to use the ARM Trusted Firmware (ATF) to load the various ATF images, plus u-boot, which can then load the kernel/ramdisk/dtb with calls to an external host from a standard fastmodel armv8 board file using semihosting, and then launch the kernel without a bootwrapper. This gives us a more realistic boot sequence. There are two main ARM virtual Fixed Virtual Platform (FVP) models, Versatile Express (VE) FVP and BASE FVP (See http://www.arm.com/products/tools/models/fast-models/foundation- model.php) The initial vexpress64 u-boot board created here runs on the VE virtual platform using the license-free Foundation_v8 simulator. Fortunately, the Foundation_v8 simulator also supports the BASE_FVP model which companies can purchase licenses for and contain much more functionality. So we can, in u-boot, run either model by either using the VE FVP (default), or turning on CONFIG_BASE_FVP for the more full featured model. Rather than create a new armv8 board similar to armltd/vexpress64, add semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING and CONFIG_BASE_FVP both set. Also reuse the existing board config file vexpress_aemv8a.h but differentiate the two models by the presence or absence of CONFIG_BASE_FVP. This change is tested and works on both the Foundation and Base fastmodel simulators. Support for armv7 in fastmodel is less useful due to the wide range of available silicon and the lack of a free armv7 fastmodel, so this change contains an untested armv7 placeholder for the service trap opcode. The level of semihosting support is minimal, restricted to just what it takes to load images to memory. If more semihosting functionality is required, such as file seek, outputting strings, reading characters, etc, then it can be easily added later. Sorry for the late reply. We are using ARMv8 foundation model (the free version) to launch u-boot via the ARM Trusted Firmware (ATF). We are using a older u-boot version and cannot see the ATF launching the u-boot.bin. Please find the details of the ARMv8 foundation model command line and ATF, u-boot commit logs below (Host machine is a ubuntu-64 bit). ARMv8 foundation model Command Line used - $ ./Foundation_v8 --cores=1 --no-secure-memory --visualization --gicv3 --data="bl1.bin"@0x --data="fip.bin"@0x8000 Trying 127.0.0.1... Connected to localhost. Escape character is '^]'. Booting trusted firmware boot loader stage 1 Built : 12:58:21, May 22 2014 ERROR: Firmware Image Package header check failed. Booting trusted firmware boot loader stage 2 BL2 Built : 12:58:22, May 22 2014 ERROR: Firmware Image Package header check failed. ERROR: Firmware Image Package header check failed. Booting trusted firmware boot loader stage 3 BL31 Built : 12:58:23, May 22 2014 ATF latest commit - commit ca823d2c881d9d8c7db364de7e362d2e75ad55df Author: Achin Gupta Date: Sun Feb 2 13:04:00 2014 + Increase coherent stack sizes This patch increases coherent stack size for both debug and release builds in order to accommodate stack-heavy printf() and extended EL3 functionality Change-Id: I30ef30530a01517a97e63d703873374828c09f20 u-boot commit - commit 22a240c32c1340183fce12867ae5f8736b92a638 Author: Alexey Brodkin Date: Fri Dec 13 10:35:11 2013 +0400 serial/serial_arc - add driver for ARC UART Driver for non-standard on-chip UART, instantiated in the ARC (Synopsys) FPGA Boards such as ARCAngel4/ML50x Signed-off-by: Alexey Brodkin Signed-off-by: Darwin Rambo --- Changes in v3: - minor format fixup in board file Changes in v2: - use kernel_addr_r, fdt_addr_r, initrd_addr_r convention. - Use env variables for kernel/fdt/initrd file names. - Add CONFIG_BASE_FVP to differentiate VE and BASE FVP models. - CONFIG_SEMIHOSTING only refers to bringing in semihosting code now. - Remove unnecessary CONFIG_SYS_BAUDRATE_TABLE, CONFIG_SYS_PROMPT_HUSH_PS2 - Remove vexpress_aemv8a_semi.h and replace
Re: [U-Boot] armv8 relocation questions
On 14-05-16 01:28 PM, Wolfgang Denk wrote: Dear Darwin, In message <53763b78.6030...@broadcom.com> you wrote: 3. Fixed offset case: CONFIG_SYS_TEXT_BASE = 0x8820 You completely fail to respond to my repeated statement that a CONFIG_SYS_TEXT_BASE like this is bogus. I want to set it this way to avoid carrying a downstream patch in start.S if the header is added by a post processing step. I understand that I can put a custom header inside start.S but wanted a different solution that keeps the code with less patches. I guess i give up on this. I'm sorry we couldn't converge on this. Any section in the image that requires a particular alignment must have that alignment respected after relocation. You cannot relocate to an arbitrary address if it breaks the maximum image alignment requirement after relocation. Who was it who asked why we had such unreasonable strict alignment requirements for the relocation address? The relocation address isn't unreasonably strict. I am happy with the 0x1000 alignment. What was breaking was the relocation offset which needs to have an alignment equal to or greater than the section alignments inside the image so that the symbols get relocated correctly. But if for some reason, the hardware ever required a 0x2000 (.align 13) alignment, then the generic code's 0x1000 (.align 12) relocation alignment would not work because the alignment after relocation would not respect the .align 13 directive. We just haven't run into this issue Is this a theoretical or a practical question? Where exactly do you have such a use case? This is a theoretical statement, just to try to demonstrate that the 4K page alignment is itself subject to future breakage if new hardware has alignment requirements that are greater than 4K. For example, if some new architecture had to have vectors on a 0x2000 alignment, and we put them on a 0x1000 alignment after relocation, the vector table would be corrupted. yet and may never do so, but it is important to understand the limitations of relocation relative to image alignment requirements. The current hardcoded 4096 (0x1000) image relocation alignment just happens to work and looks nice, that's all, but not by consideration of image alignment. Ummm... experience from 15 years of PPCBoot / U-Boot history don't count here, I guess? And if any text base alignment is less than the image's maximum alignment requirement, the load will fail, and then we likely scratch our heads and set the CONFIG_SYS_TEXT_BASE alignment higher until it works. CONFIG_SYS_TEXT_BASE should always be reasonable aligned. There is no good reason to add arbitrary small offsets like you do. I've explained to you a feww times before that you should include your header into the text segment, and the problem would be just gone. I agree that is a solution, but I didn't want to carry a downstream patch when the issue with relocation and alignment is understood and fixable. I thought it might be an interesting discussion, I guess we certainly got that. :) Thanks again. Best regards, Darwin But since most people just use higher alignments naturally, this issues remain mostly hidden I think. Not hidden, they don't exist. Non-random sig this time. Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] armv8 relocation questions
On 14-05-16 06:47 AM, feng...@phytium.com.cn wrote:
hi Darwin,
It's a little late.
I'm hoping someone can help answer these questions about armv8
relocation.
The CONFIG_SYS_TEXT_BASE seems to be be usually setup to a decent
amount of alignment. For the purposes of this discussion, let's say
it would normally be 0x8800 and all is well. The relocation
address moves to near the end of memory, to say, 0xfffa8000. So far
so good.
Now let's say I want to shift the image a bit so that I can add a
small 32-byte header required by a previous bootloader. So I set
CONFIG_SYS_TEXT_BASE to 0x8820, and the relocated address is
still 0xfffa8000 and the relocated vectors should be at 0xfffa9000.
The image crashes so after some debugging, I find that the code
appears to be relocated fine, but some sections have symbols that are
not relocated properly. The vectors try to relocate to 0xfffa8fe0 and
rodata.str1.1 printf format strings are also 0x20 off. There are
likely other offset sections with issues as well.
The relocation offset is 0x77fa7fe0 due to the calculations in
arch/arm/lib/board.c. Simplifying, they look like this:
addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
/* round down to next 4 kB limit */
addr &= ~(4096 - 1);
debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
/*
* reserve memory for U-Boot code, data & bss
* round down to next 4 kB limit
*/
addr -= gd->mon_len;
addr &= ~(4096 - 1);
addr += 0x20; // hack to adjust relocaddr to aligned address...
gd->relocaddr = addr;
gd->start_addr_sp = addr_sp;
gd->reloc_off = addr - _TEXT_BASE;
debug("relocation Offset is: %08lx\n", gd->reloc_off);
Since _TEXT_BASE is 0x8820 and addr is 0xfffa8000, the reloc_off
is a number like 0x77fa7fe0.
Now if I add 0x20 to 'addr' above just before the , relocaddr
becomes 0x77fa8000 and the relocation works perfectly and no more
crashes happen.
So my question - is the CONFIG_SYS_TEXT_BASE alignment requirement
related to to any assumptions in the linker itself about image base
alignment, specifically referring to creation of the rela.dyn
sections and their use for image relocation?
A related question is if CONFIG_SYS_TEXT_BASE needs to be at a
specific alignment. The maximum alignment in the armv8 code base is
".align 11" which I believe means 0x800 or 2048.
Note that an armv7 target appears to relocate properly with smaller
offsets such as 0x20.
Thanks.
I traced the problem you described and found it is caused by
'adrp' instruction. 'adrp' instruction produces 4kb aligned address of
a label. So, if CONFIG_SYS_TEXT_BASE is not 4kb aligned the address
produced by 'adrp' and following 'add' instruction will be incorrect.
For example, if CONFIG_SYS_TEXT_BASE = 0x20 then address of
'_start' is 0x20 and address of '_end_ofs' is 0x30, where u-boot
access variable '_end_ofs' gcc generate code as following:
adrp x0, ...
add x0, x0, 0x30
We noticed that 0x30 is added to 'x0' to produce the address
of '_end_ofs'. So when CONFIG_SYS_TEXT_BASE=0x20 and relocated
destination address is not 0x020 register x0 contain incorrect
address of '_end_ofs'.
Thank you David. I agree that the adrp will cause problems if the string
sections and label used are not relocated to correct boundaries. The
adrp used before the relocation works because the symbols are on aligned
boundaries.
I think I have a way to explain this problem better now.
1. Working generic code:
CONFIG_SYS_TEXT_BASE = 0x8800
unrelocated vectors = 0x888001000
relocation address = 0xfffa8000 = 0xfffa8000 - 0x8800
relocation offset = 77fa8000
relocated vectors = 0xfffa9000 (0x800 alignment, but pushed to fffa9000
because of code after 0xfffa8800)
Now in this case, the .align directive for the vectors section wants the
vectors sitting at 0x800 alignment, which they are.
When the symbols are relocated, the vectors are now at 0xfffa9000 which
is aligned properly.
2. Failing offset case:
CONFIG_SYS_TEXT_BASE = 0x8820
unrelocated vectors = 0x888001000 (respecting .align 11 directive)
relocation address = 0xfffa8000
relocation offset = 77fa7fe0 = 0xfffa8000 - 0x8820
relocated vectors = 0xfffa8fe0 (BAD ALIGNMENT)
Now the relocated rodata.str1.1 string tables are not aligned, which I
believe breaks
the adrp instruction. The strings are offset by 0x20 and the printf fails.
3. Fixed offset case:
CONFIG_SYS_TEXT_BASE = 0x8820
unrelocated vectors = 0x888001000 (respecting .align 11 directive)
relocation address = 0xfffa8020
relocation offset = 77fa8000 = 0xfffa8020 - 0x8820
relocated vectors = 0xfffa9000 (GOOD ALIGNMENT, respects .align 11 after
relocation)
So in this fixed offset case, the adrp label is aligned to a 4K page size.
General comments:
Any section in the image that requires a particular alignment must have
that align
Re: [U-Boot] [PATCH] arm: Allow u-boot to run from offset base address
On 14-05-15 08:21 AM, Wolfgang Denk wrote: Dear Darwin, In message <5374cd55.3010...@broadcom.com> you wrote: Do you really want to check a define at runtime? Placement is typically at the end of RAM and allocation goes down, not up as in this patch. Aren't you overlapping memory here? Yes, I wanted the runtime check since the adjustment to the relocation address is also done at runtime. This makes no sense to me. CONFIG_SYS_TEXT_BASE is a compile time constant. So the result of all this is always known at compile time, too. I feel you misunderstand that CONFIG_SYS_TEXT_BASE is just the start address of the text segment. If you want to offset this by a specific amount, you can just define this as needed. May I respectfully ask that you please bear with me a just a bit longer so I can try to explain things better? CONFIG_SYS_TEXT_BASE is also used by the relocation calculations at runtime to determine the relocation offset, which is also used for the symbol fixup logic. It is known at compile time, but is used at runtime by the stock u-boot code to determine the relocation offset. I am doing nothing more than existing code in this regard. If I set it to 0x8820, then the code crashes because the symbol fixup depends on the relocation offset which is now wrong. The reason is that the relocation offset calculated in the code doesn't account for this offset. If we adjust the relocation address, then the relocation offset is now correct and the symbol fixups work perfectly. Here's an example: CONFIG_SYS_TEXT_BASE = 0x8820 relocated address = 0xfffa8000 (This 4K alignment assumption breaks the relocation) relocation offset = 0x77fa7fe0 (This is now wrong and the relocation breaks) My patch does the following: CONFIG_SYS_TEXT_BASE = 0x8820 relocated address = 0xfffa8020 relocation offset = 0x77fa8000 (symbol fixups now work) So this patch just gives us a way to run u-boot at text sections with smaller alignments. In the past I never really understood why CONFIG_SYS_TEXT_BASE had to be on specific alignments like X000 for our architecture and the symbol fixup issue helps to explain this. I know this is not the normal use case but it does fix the crash in the symbol relocation with arm64 and allows u-boot to be more flexible in it's text alignment requirements. Thanks. Best regards, Darwin There is no overlap here. The reason is that the original masking operation to mask to a 4K boundary removed the small offset and backed up too far. So adding the lost offset is guaranteed to not overlap, and furthermore, correct the relocation offset so that arm64 images can run at smaller alignments than we normally use. This might even be a generic fix but can't be tested easily by me. Argh... This is black magic depending on specific properties of your process (which you don;t really explain). Sorry, but this is a full NAK for code that is build on sand like this. Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Allow u-boot to run from offset base address
On 14-05-14 03:41 PM, Jeroen Hofstee wrote:
Hello Darwin,
On wo, 2014-05-14 at 15:05 -0700, Darwin Rambo wrote:
+#ifdef CONFIG_ARM64
+ /*
+* Fix relocation if u-boot is not on an aligned address.
+*/
+ {
+ int offset = CONFIG_SYS_TEXT_BASE % 4096;
+ if (offset) {
+ addr += offset;
+ debug("Relocation Addr bumped to 0x%08lx\n", addr);
+ }
+ }
+#endif
+
Do you really want to check a define at runtime? Placement is typically
at the end of RAM and allocation goes down, not up as in this patch.
Aren't you overlapping memory here?
Yes, I wanted the runtime check since the adjustment to the relocation
address is also done at runtime.
There is no overlap here. The reason is that the original masking operation
to mask to a 4K boundary removed the small offset and backed up too far. So
adding the lost offset is guaranteed to not overlap, and furthermore, correct
the relocation offset so that arm64 images can run at smaller alignments than
we normally use. This might even be a generic fix but can't be tested easily
by me.
static int setup_reloc(void)
{
+#ifdef CONFIG_ARM64
+ /*
+* Fix relocation if u-boot is not on an aligned address.
+*/
+ int offset = CONFIG_SYS_TEXT_BASE % 4096;
+ if (offset) {
+ gd->relocaddr += offset;
+ debug("Relocation Addr bumped to 0x%08lx\n", gd->relocaddr);
+ }
+#endif
gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
This is a generic file, hell breaks loose if you start using arch /
board / pre bootloader specific workarounds here afaiac.
I don't disagree with this statement. Please see my other comments to
Wolfgang on this topic.
lucky for you, I am not a u-boot maintainer, but this looks at least a
bit weird, glancing at it.
Regards,
Jeroen
Thanks for your comments Jeroen. They are appreciated.
Darwin
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Re: [U-Boot] [PATCH] arm: Allow u-boot to run from offset base address
On 14-05-14 09:26 PM, Wolfgang Denk wrote: Dear Darwin Rambo, In message <1400105145-6628-1-git-send-email-dra...@broadcom.com> you wrote: If an earlier loader stage requires an image header and a specific offset, then u-boot's base address (CONFIG_SYS_TEXT_BASE) may be advanced beyond an aligned address. In this case the relocation Sorry, I cannot parse that. CONFIG_SYS_TEXT_BASE is a compile time constant, it cannot be "advanced" by a loader. Do you mean that some loader loads U-Boot to an incorrect address? Well, in this case the loader should be fixed, or? Thank you for your comments. I mean that the loader loads u-boot to it's correct address, which is offset by a small amount because of a previous header requiring alignment. Here's an example. u-boot is compiled to run at 0x8820 because we want to put a small header in front of the image, which starts at 0x8800 and needs to be aligned for its own reasons. Now for arm64, I believe that u-boot cannot normally be positioned at any alignment less than 0x800 hex. So u-boot would normally run at addresses like 0x8800, 0x88000800, 0x88001000, etc. And in these cases the relocation works fine. But if we want to position u-boot at a smaller offset than 0x800, the symbol relocation breaks for arm64. It turns out that there is a trivial fix so that u-boot can run at smaller offset addresses, which I have provided here, is tested, and solves our problem nicely, but only for arm64 right now. This change is done under CONFIG_ARM64 conditional compilation because it has only been tested there and may not be appropriate for other architectures. In any case, any such changes (if there should be agreement that they are actually useful) should be done in an architecture-neutral way. Implementing it for one specific architecture only is wrong. Yes, I agree, but I am not sure if this is a arm64-only problem or not. Armv7 doesn't show this problem, and I can't test other architectures for their alignment issues. So I thought that I would at least show the fix for arm64 so we can decide if and how to proceed. Any suggestions you can provide on how to proceed would be appreciated. And if the fix is not suitable for upstreaming, then we should know it. Is there a way to have architecture specific hooks like this called from the generic common/board_f.c? The fix is also in arch/arm/lib/board.c but it sounds like that file might be disappearing. Also there might be a generic fix possible that works for all architectures (by removing the ifdef CONFIG_ARM64), but I don't have the resources to test them. Maybe it would be best to decide if we want to support this feature or not first. Thanks! Regards, Darwin Best regards, Wolfgang Denk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] arm: Allow u-boot to run from offset base address
If an earlier loader stage requires an image header and a specific
offset, then u-boot's base address (CONFIG_SYS_TEXT_BASE) may be
advanced beyond an aligned address. In this case the relocation
will not be done correctly for some sections such as vectors and rodata
string tables, which will show an incorrect offset after the symbols
are fixed up. Advance the relocation address by the image offset so that
the gd->reloc_off used will result in relocating these sections to their
correct addresses.
This change is done under CONFIG_ARM64 conditional compilation
because it has only been tested there and may not be appropriate
for other architectures.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
---
arch/arm/lib/board.c | 13 +
common/board_f.c | 10 ++
2 files changed, 23 insertions(+)
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 9b473b5..df520cc 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -449,6 +449,19 @@ void board_init_f(ulong bootflag)
dram_init_banksize();
display_dram_config(); /* and display it */
+#ifdef CONFIG_ARM64
+ /*
+* Fix relocation if u-boot is not on an aligned address.
+*/
+ {
+ int offset = CONFIG_SYS_TEXT_BASE % 4096;
+ if (offset) {
+ addr += offset;
+ debug("Relocation Addr bumped to 0x%08lx\n", addr);
+ }
+ }
+#endif
+
gd->relocaddr = addr;
gd->start_addr_sp = addr_sp;
gd->reloc_off = addr - (ulong)&_start;
diff --git a/common/board_f.c b/common/board_f.c
index 4ea4cb2..1035d6f 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -728,6 +728,16 @@ static int reloc_fdt(void)
static int setup_reloc(void)
{
+#ifdef CONFIG_ARM64
+ /*
+* Fix relocation if u-boot is not on an aligned address.
+*/
+ int offset = CONFIG_SYS_TEXT_BASE % 4096;
+ if (offset) {
+ gd->relocaddr += offset;
+ debug("Relocation Addr bumped to 0x%08lx\n", gd->relocaddr);
+ }
+#endif
gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
--
1.7.9.5
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[U-Boot] armv8 relocation questions
I'm hoping someone can help answer these questions about armv8 relocation.
The CONFIG_SYS_TEXT_BASE seems to be be usually setup to a decent amount
of alignment. For the purposes of this discussion, let's say it would
normally be 0x8800 and all is well. The relocation address moves to
near the end of memory, to say, 0xfffa8000. So far so good.
Now let's say I want to shift the image a bit so that I can add a small
32-byte header required by a previous bootloader. So I set
CONFIG_SYS_TEXT_BASE to 0x8820, and the relocated address is still
0xfffa8000 and the relocated vectors should be at 0xfffa9000. The image
crashes so after some debugging, I find that the code appears to be
relocated fine, but some sections have symbols that are not relocated
properly. The vectors try to relocate to 0xfffa8fe0 and rodata.str1.1
printf format strings are also 0x20 off. There are likely other offset
sections with issues as well.
The relocation offset is 0x77fa7fe0 due to the calculations in
arch/arm/lib/board.c. Simplifying, they look like this:
addr = CONFIG_SYS_SDRAM_BASE + gd->ram_size;
/* round down to next 4 kB limit */
addr &= ~(4096 - 1);
debug("Top of RAM usable for U-Boot at: %08lx\n", addr);
/*
* reserve memory for U-Boot code, data & bss
* round down to next 4 kB limit
*/
addr -= gd->mon_len;
addr &= ~(4096 - 1);
addr += 0x20; // hack to adjust relocaddr to aligned address...
gd->relocaddr = addr;
gd->start_addr_sp = addr_sp;
gd->reloc_off = addr - _TEXT_BASE;
debug("relocation Offset is: %08lx\n", gd->reloc_off);
Since _TEXT_BASE is 0x8820 and addr is 0xfffa8000, the reloc_off is
a number like 0x77fa7fe0.
Now if I add 0x20 to 'addr' above just before the , relocaddr
becomes 0x77fa8000 and the relocation works perfectly and no more
crashes happen.
So my question - is the CONFIG_SYS_TEXT_BASE alignment requirement
related to to any assumptions in the linker itself about image base
alignment, specifically referring to creation of the rela.dyn sections
and their use for image relocation?
A related question is if CONFIG_SYS_TEXT_BASE needs to be at a specific
alignment. The maximum alignment in the armv8 code base is ".align 11"
which I believe means 0x800 or 2048.
Note that an armv7 target appears to relocate properly with smaller
offsets such as 0x20.
Thanks.
Best Regards,
Darwin Rambo
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[U-Boot] [PATCH v3] arm: Add support for semihosting for armv8 fastmodel targets.
The reason for this change is to be able to use the ARM Trusted Firmware (ATF) to load the various ATF images, plus u-boot, which can then load the kernel/ramdisk/dtb with calls to an external host from a standard fastmodel armv8 board file using semihosting, and then launch the kernel without a bootwrapper. This gives us a more realistic boot sequence. There are two main ARM virtual Fixed Virtual Platform (FVP) models, Versatile Express (VE) FVP and BASE FVP (See http://www.arm.com/products/tools/models/fast-models/foundation-model.php) The initial vexpress64 u-boot board created here runs on the VE virtual platform using the license-free Foundation_v8 simulator. Fortunately, the Foundation_v8 simulator also supports the BASE_FVP model which companies can purchase licenses for and contain much more functionality. So we can, in u-boot, run either model by either using the VE FVP (default), or turning on CONFIG_BASE_FVP for the more full featured model. Rather than create a new armv8 board similar to armltd/vexpress64, add semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING and CONFIG_BASE_FVP both set. Also reuse the existing board config file vexpress_aemv8a.h but differentiate the two models by the presence or absence of CONFIG_BASE_FVP. This change is tested and works on both the Foundation and Base fastmodel simulators. Support for armv7 in fastmodel is less useful due to the wide range of available silicon and the lack of a free armv7 fastmodel, so this change contains an untested armv7 placeholder for the service trap opcode. The level of semihosting support is minimal, restricted to just what it takes to load images to memory. If more semihosting functionality is required, such as file seek, outputting strings, reading characters, etc, then it can be easily added later. Signed-off-by: Darwin Rambo --- Changes in v3: - minor format fixup in board file Changes in v2: - use kernel_addr_r, fdt_addr_r, initrd_addr_r convention. - Use env variables for kernel/fdt/initrd file names. - Add CONFIG_BASE_FVP to differentiate VE and BASE FVP models. - CONFIG_SEMIHOSTING only refers to bringing in semihosting code now. - Remove unnecessary CONFIG_SYS_BAUDRATE_TABLE, CONFIG_SYS_PROMPT_HUSH_PS2 - Remove vexpress_aemv8a_semi.h and replace with CONFIG_BASE_FVP - Update boards.cfg with option SEMIHOSTING and BASE_FVP - Add doc/README.semihosting Changes in v1: - Initial code - Remove empty timer_init() function. arch/arm/include/asm/semihosting.h | 21 +++ arch/arm/lib/Makefile|1 + arch/arm/lib/semihosting.c | 235 ++ board/armltd/vexpress64/vexpress64.c | 101 ++- boards.cfg |1 + doc/README.semihosting | 35 + include/configs/vexpress_aemv8a.h| 59 - 7 files changed, 441 insertions(+), 12 deletions(-) create mode 100644 arch/arm/include/asm/semihosting.h create mode 100644 arch/arm/lib/semihosting.c create mode 100644 doc/README.semihosting diff --git a/arch/arm/include/asm/semihosting.h b/arch/arm/include/asm/semihosting.h new file mode 100644 index 000..74111dc --- /dev/null +++ b/arch/arm/include/asm/semihosting.h @@ -0,0 +1,21 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __SEMIHOSTING_H__ +#define __SEMIHOSTING_H__ + +/* + * ARM semihosting functions for loading images to memory. See the source + * code for more information. + */ +int smh_load(const char *fname, void *memp, int avail, int verbose); +int smh_read(int fd, void *memp, int len); +int smh_open(const char *fname, char *modestr); +int smh_close(int fd); +int smh_len_fd(int fd); +int smh_len(const char *fname); + +#endif /* __SEMIHOSTING_H__ */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 9fc81cd..0ba929d 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o endif +obj-$(CONFIG_SEMIHOSTING) += semihosting.o obj-y += sections.o ifdef CONFIG_ARM64 diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c new file mode 100644 index 000..d603789 --- /dev/null +++ b/arch/arm/lib/semihosting.c @@ -0,0 +1,235 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/* + * Minimal semihosting implementation for reading files into memory. If more + * features like writing files or console output are required they can be + * added later. This code has been tested on arm64/aarch64 fastmodel only. + * An untested placeholder exists for armv7 architectures, but since they + * are commonly available in silicon now, fastmodel usage makes less sense + * for them. + */ +#include +#include + +#define SYSOPEN0x01 +#define SYSCLOSE 0x02 +#define SYSREAD0x06 +#define SYSFLEN0x0C
[U-Boot] [PATCH v2] arm: Add support for semihosting for armv8 fastmodel targets.
The reason for this change is to be able to use the ARM Trusted Firmware (ATF) to load the various ATF images, plus u-boot, which can then load the kernel/ramdisk/dtb with calls to an external host from a standard fastmodel armv8 board file using semihosting, and then launch the kernel without a bootwrapper. This gives us a more realistic boot sequence. There are two main ARM virtual Fixed Virtual Platform (FVP) models, Versatile Express (VE) FVP and BASE FVP (See http://www.arm.com/products/tools/models/fast-models/foundation-model.php) The initial vexpress64 u-boot board created here runs on the VE virtual platform using the license-free Foundation_v8 simulator. Fortunately, the Foundation_v8 simulator also supports the BASE_FVP model which companies can purchase licenses for and contain much more functionality. So we can, in u-boot, run either model by either using the VE FVP (default), or turning on CONFIG_BASE_FVP for the more full featured model. Rather than create a new armv8 board similar to armltd/vexpress64, add semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING and CONFIG_BASE_FVP both set. Also reuse the existing board config file vexpress_aemv8a.h but differentiate the two models by the presence or absence of CONFIG_BASE_FVP. This change is tested and works on both the Foundation and Base fastmodel simulators. Support for armv7 in fastmodel is less useful due to the wide range of available silicon and the lack of a free armv7 fastmodel, so this change contains an untested armv7 placeholder for the service trap opcode. The level of semihosting support is minimal, restricted to just what it takes to load images to memory. If more semihosting functionality is required, such as file seek, outputting strings, reading characters, etc, then it can be easily added later. Signed-off-by: Darwin Rambo --- Changes in v2: - use kernel_addr_r, fdt_addr_r, initrd_addr_r convention. - Use env variables for kernel/fdt/initrd file names. - Add CONFIG_BASE_FVP to differentiate VE and BASE FVP models. - CONFIG_SEMIHOSTING only refers to bringing in semihosting code now. - Remove unnecessary CONFIG_SYS_BAUDRATE_TABLE, CONFIG_SYS_PROMPT_HUSH_PS2 - Remove vexpress_aemv8a_semi.h and replace with CONFIG_BASE_FVP - Update boards.cfg with option SEMIHOSTING and BASE_FVP - Add doc/README.semihosting Changes in v1: - Initial code - Remove empty timer_init() function. arch/arm/include/asm/semihosting.h | 21 +++ arch/arm/lib/Makefile|1 + arch/arm/lib/semihosting.c | 235 ++ board/armltd/vexpress64/vexpress64.c | 102 ++- boards.cfg |1 + doc/README.semihosting | 35 + include/configs/vexpress_aemv8a.h| 59 - 7 files changed, 442 insertions(+), 12 deletions(-) create mode 100644 arch/arm/include/asm/semihosting.h create mode 100644 arch/arm/lib/semihosting.c create mode 100644 doc/README.semihosting diff --git a/arch/arm/include/asm/semihosting.h b/arch/arm/include/asm/semihosting.h new file mode 100644 index 000..74111dc --- /dev/null +++ b/arch/arm/include/asm/semihosting.h @@ -0,0 +1,21 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef __SEMIHOSTING_H__ +#define __SEMIHOSTING_H__ + +/* + * ARM semihosting functions for loading images to memory. See the source + * code for more information. + */ +int smh_load(const char *fname, void *memp, int avail, int verbose); +int smh_read(int fd, void *memp, int len); +int smh_open(const char *fname, char *modestr); +int smh_close(int fd); +int smh_len_fd(int fd); +int smh_len(const char *fname); + +#endif /* __SEMIHOSTING_H__ */ diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile index 9fc81cd..0ba929d 100644 --- a/arch/arm/lib/Makefile +++ b/arch/arm/lib/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o else obj-$(CONFIG_SPL_FRAMEWORK) += spl.o endif +obj-$(CONFIG_SEMIHOSTING) += semihosting.o obj-y += sections.o ifdef CONFIG_ARM64 diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c new file mode 100644 index 000..d603789 --- /dev/null +++ b/arch/arm/lib/semihosting.c @@ -0,0 +1,235 @@ +/* + * Copyright 2014 Broadcom Corporation + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +/* + * Minimal semihosting implementation for reading files into memory. If more + * features like writing files or console output are required they can be + * added later. This code has been tested on arm64/aarch64 fastmodel only. + * An untested placeholder exists for armv7 architectures, but since they + * are commonly available in silicon now, fastmodel usage makes less sense + * for them. + */ +#include +#include + +#define SYSOPEN0x01 +#define SYSCLOSE 0x02 +#define SYSREAD0x06 +#define SYSFLEN0x0C + +#define MODE_READ 0x0 +#define MODE_READBIN
Re: [U-Boot] [PATCH] arm: Add support for semihosting for armv8 fastmodel targets.
On 14-03-12 10:18 AM, Tom Rini wrote: > On Wed, Mar 12, 2014 at 09:41:20AM -0700, Darwin Rambo wrote: >> >> >> On 14-03-12 09:24 AM, Tom Rini wrote: >>> On Wed, Mar 12, 2014 at 09:04:01AM -0700, Darwin Rambo wrote: > [snip] >>>> + /* Assumes kernel is lower in memory than fdt */ >>>> + smh_load(CONFIG_KNLNAME, kernel_addr, fdt_addr - kernel_addr, 1); >>>> + >>>> + /* Load fdt to memory */ >>>> + smh_load(CONFIG_FDTNAME, fdt_addr, 0x2, 1); >>>> + >>>> + /* Load initrd to memory */ >>>> + smh_load(CONFIG_RDNAME, initrd_addr, initrd_size, 1); >>> >>> Is there a reason we can't also get these from the environment? Or a >>> limitation of (how we support) the simulator that we don't have >>> persistent r/w environment right now? >> These names can also come from the environment, there's r/w capability >> there, just no physical eMMC. Thanks. > > I need to play more with the foundation model then, I didn't think we > could talk with the "mmc" or anything on it. As you've got it coded > now, you can't change what's loaded here :) But if we can have a > file-backed storage used as the "disk" and keep env there, making this > load files named in the environment and then fw_getenv/setenv can change > the values from Linux too, if we don't boot into a full U-Boot at some > point. Sorry Tom, what I really meant to say was that with fastmodel, you can define environment variables at build and run time, but they can't be saved or viewed as persistent for the next bootup. Semihosting is kind of a way to get around this lack of persistence since you can load different image files on different runs. You could even potentially load an environment file to fake out the eMMC if warranted. By r/w capability, I meant just for that one instance of execution of u-boot. But you can potentially access real eMMC on palladium or FPGA for example, and eMMC would then be persistent in that environment from run to run. Thanks. > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: Add support for semihosting for armv8 fastmodel targets.
On 14-03-12 09:41 AM, Albert ARIBAUD wrote:
> Hi Darwin,
>
> On Wed, 12 Mar 2014 09:04:01 -0700, Darwin Rambo
> wrote:
>
>> The reason for this change is to be able to use the ARM Trusted Firmware
>> (ATF) to load the various ATF images, plus u-boot, which can then load
>> the kernel/ramdisk/dtb with calls to an external host from a standard
>> fastmodel armv8 board file using semihosting, and then launch the kernel
>> without a bootwrapper. This gives us a more realistic boot sequence.
>>
>> Rather than create a new armv8 board similar to armltd/vexpress64, add
>> semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING.
>> Also add a new board config file vexpress_aemv8a_semi.h. This change is
>> tested and works on the ARM foundation model.
>>
>> Support for armv7 in fastmodel is less useful due to the wide range of
>> available silicon but this change contains an untested armv7 placeholder
>> if desired.
>>
>> The level of semihosting support is minimal, restricted to just what it
>> takes to load images to memory. If more semihosting functionality is
>> required, such as file seek, outputting strings, reading characters, etc,
>> then it can be easily added later.
>>
>> Signed-off-by: Darwin Rambo
>> ---
>
> If you're only adding semihosting to vexpress_aemv8a, not creating a
> new board, then why add a new header file? Can you not just reuse
> orextend the existing header file, and make the new entry in
> boards.cfg define option CONFIG_SEMIHOSTING instead?
Good idea, thanks. This meshes well with Tom's recent suggestions.
>
>> diff --git a/board/armltd/vexpress64/vexpress64.c
>> b/board/armltd/vexpress64/vexpress64.c
>> index 2ec3bc9..9b64f71 100644
>> --- a/board/armltd/vexpress64/vexpress64.c
>> +++ b/board/armltd/vexpress64/vexpress64.c
>
>> @@ -31,11 +35,6 @@ int dram_init(void)
>> return 0;
>> }
>>
>> -int timer_init(void)
>> -{
>> -return 0;
>> -}
>> -
>
> This removal does not seem to be described in the commit summary.
Will fix. Thanks.
>
> Amicalement,
>
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Re: [U-Boot] [PATCH] arm: Add support for semihosting for armv8 fastmodel targets.
On 14-03-12 09:24 AM, Tom Rini wrote:
> On Wed, Mar 12, 2014 at 09:04:01AM -0700, Darwin Rambo wrote:
>
>> The reason for this change is to be able to use the ARM Trusted Firmware
>> (ATF) to load the various ATF images, plus u-boot, which can then load
>> the kernel/ramdisk/dtb with calls to an external host from a standard
>> fastmodel armv8 board file using semihosting, and then launch the kernel
>> without a bootwrapper. This gives us a more realistic boot sequence.
>>
>> Rather than create a new armv8 board similar to armltd/vexpress64, add
>> semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING.
>> Also add a new board config file vexpress_aemv8a_semi.h. This change is
>> tested and works on the ARM foundation model.
>>
>> Support for armv7 in fastmodel is less useful due to the wide range of
>> available silicon but this change contains an untested armv7 placeholder
>> if desired.
>>
>> The level of semihosting support is minimal, restricted to just what it
>> takes to load images to memory. If more semihosting functionality is
>> required, such as file seek, outputting strings, reading characters, etc,
>> then it can be easily added later.
>>
>> Signed-off-by: Darwin Rambo
>
> At the high-level, I'm fine with this. But as an implementation detail
> we need to either leverage vexpress_common.h or create a
> vexpress_arm64_common.h or something. There's a lot in common between
> these two configs, and some further clean-up we need to do to the first
> one anyhow.
Let me try to digest this to see what is truly common and get back to
you. Thanks.
>
> Next:
>> +#ifdef CONFIG_BOARD_LATE_INIT
>> +int board_late_init(void)
>> +{
>> +#ifdef CONFIG_SEMIHOSTING
>> +
>> +/*
>> + * We require that the board include file defines these env variables:
>> + * - kernel_addr
>> + * - initrd_addr
>> + * - fdt_addr
>> + *
>> + * For the "fdt chosen" startup macro, this code will then define:
>> + * - initrd_end (based on initrd_base plus actual initrd_size)
>> + *
>> + * We will then load the kernel, initrd, and fdt into the specified
>> + * locations in memory in a similar way that the ATF fastmodel code
>> + * uses semihosting calls to load other boot stages and u-boot itself.
>> + */
>> +
>> +/* Env variable strings */
>> +char *kernel_addr_str = getenv("kernel_addr");
>> +char *initrd_addr_str = getenv("initrd_addr");
>> +char *fdt_addr_str = getenv("fdt_addr");
>> +char initrd_end_str[64];
>
> First, we need to document this stuff in a README file as well. Second,
> I'd like to see kernel_addr_r / ramdisk_addr_r / fdt_addr_r used to
> match-up with what Dennis Gilmore has been working on to get a common
> env working.
Okay, thanks.
>
> [snip]
>> +/* Assumes kernel is lower in memory than fdt */
>> +smh_load(CONFIG_KNLNAME, kernel_addr, fdt_addr - kernel_addr, 1);
>> +
>> +/* Load fdt to memory */
>> +smh_load(CONFIG_FDTNAME, fdt_addr, 0x2, 1);
>> +
>> +/* Load initrd to memory */
>> +smh_load(CONFIG_RDNAME, initrd_addr, initrd_size, 1);
>
> Is there a reason we can't also get these from the environment? Or a
> limitation of (how we support) the simulator that we don't have
> persistent r/w environment right now?
These names can also come from the environment, there's r/w capability
there, just no physical eMMC. Thanks.
>
> Thanks!
>
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[U-Boot] [PATCH] arm: Add support for semihosting for armv8 fastmodel targets.
The reason for this change is to be able to use the ARM Trusted Firmware
(ATF) to load the various ATF images, plus u-boot, which can then load
the kernel/ramdisk/dtb with calls to an external host from a standard
fastmodel armv8 board file using semihosting, and then launch the kernel
without a bootwrapper. This gives us a more realistic boot sequence.
Rather than create a new armv8 board similar to armltd/vexpress64, add
semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING.
Also add a new board config file vexpress_aemv8a_semi.h. This change is
tested and works on the ARM foundation model.
Support for armv7 in fastmodel is less useful due to the wide range of
available silicon but this change contains an untested armv7 placeholder
if desired.
The level of semihosting support is minimal, restricted to just what it
takes to load images to memory. If more semihosting functionality is
required, such as file seek, outputting strings, reading characters, etc,
then it can be easily added later.
Signed-off-by: Darwin Rambo
---
arch/arm/include/asm/semihosting.h | 21 +++
arch/arm/lib/Makefile |1 +
arch/arm/lib/semihosting.c | 235
board/armltd/vexpress64/vexpress64.c | 83 ++-
boards.cfg |1 +
include/configs/vexpress_aemv8a_semi.h | 112 +++
6 files changed, 448 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/include/asm/semihosting.h
create mode 100644 arch/arm/lib/semihosting.c
create mode 100644 include/configs/vexpress_aemv8a_semi.h
diff --git a/arch/arm/include/asm/semihosting.h
b/arch/arm/include/asm/semihosting.h
new file mode 100644
index 000..74111dc
--- /dev/null
+++ b/arch/arm/include/asm/semihosting.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2014 Broadcom Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __SEMIHOSTING_H__
+#define __SEMIHOSTING_H__
+
+/*
+ * ARM semihosting functions for loading images to memory. See the source
+ * code for more information.
+ */
+int smh_load(const char *fname, void *memp, int avail, int verbose);
+int smh_read(int fd, void *memp, int len);
+int smh_open(const char *fname, char *modestr);
+int smh_close(int fd);
+int smh_len_fd(int fd);
+int smh_len(const char *fname);
+
+#endif /* __SEMIHOSTING_H__ */
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 9fc81cd..0ba929d 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
else
obj-$(CONFIG_SPL_FRAMEWORK) += spl.o
endif
+obj-$(CONFIG_SEMIHOSTING) += semihosting.o
obj-y += sections.o
ifdef CONFIG_ARM64
diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c
new file mode 100644
index 000..d603789
--- /dev/null
+++ b/arch/arm/lib/semihosting.c
@@ -0,0 +1,235 @@
+/*
+ * Copyright 2014 Broadcom Corporation
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Minimal semihosting implementation for reading files into memory. If more
+ * features like writing files or console output are required they can be
+ * added later. This code has been tested on arm64/aarch64 fastmodel only.
+ * An untested placeholder exists for armv7 architectures, but since they
+ * are commonly available in silicon now, fastmodel usage makes less sense
+ * for them.
+ */
+#include
+#include
+
+#define SYSOPEN0x01
+#define SYSCLOSE 0x02
+#define SYSREAD0x06
+#define SYSFLEN0x0C
+
+#define MODE_READ 0x0
+#define MODE_READBIN 0x1
+
+/*
+ * Call the handler
+ */
+static int smh_trap(unsigned int sysnum, void *addr)
+{
+ register int result asm("r0");
+#if defined(CONFIG_ARM64)
+ asm volatile ("hlt #0xf000" : "=r" (result) : "0"(sysnum), "r"(addr));
+#else
+ /* Note - untested placeholder */
+ asm volatile ("svc #0x123456" : "=r" (result) : "0"(sysnum), "r"(addr));
+#endif
+ return result;
+}
+
+/*
+ * Open, load a file into memory, and close it. Check that the available space
+ * is sufficient to store the entire file. Return the bytes actually read from
+ * the file as seen by the read function. The verbose flag enables some extra
+ * printing of successful read status.
+ */
+int smh_load(const char *fname, void *memp, int avail, int verbose)
+{
+ int ret, fd, len;
+
+ ret = -1;
+
+ debug("%s: fname \'%s\', avail %u, memp %p\n", __func__, fname,
+ avail, memp);
+
+ /* Open the file */
+ fd = smh_open(fname, "rb");
+ if (fd == -1)
+ return ret;
+
+ /* Get the file length */
+ ret = smh_len_fd(fd);
+ if (ret == -1) {
+ smh_close(fd);
+ return ret;
+ }
+
+ /* Check that the file will fit in the supplied buffer */
+
Re: [U-Boot] Licensing Question on ARM Semihosting Code
On 14-02-28 10:49 AM, Tom Rini wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > On 02/28/2014 01:18 PM, Darwin Rambo wrote: >> Given the ARM header below, is this code possible to put into >> u-boot? >> >> For reference, I see this discussion below. >> http://lists.denx.de/pipermail/u-boot/2011-November/110884.html >> >> If this is not acceptable, presumably due to the "All rights >> reserved" and "Redistribution in binary form..." clauses below, we >> could try to find an alternative implementation that is GPL2.0+ >> licensed or rewrite the parts we need from scratch. >> >> Any suggestions you have would be most welcome. Thanks. > > So, that particular discussion was about fastboot, and in that > particular case everything is OK, in the long run (I poked TI's > lawyers about that). We're just missing a clean design version being > ported and I know of a few groups / companies leaning on another > entity to do so. > > But with your particular quoted header, I think we cannot use it as it > puts restrictions on the binary redistribution as well. Thanks Tom. If we were to create a small bit of arm-specific semihosting code without the licensing restrictions, and it were acceptable to the maintainers to upstream, would it best live in u-boot/arch/arm/lib/semihosting.c or in u-boot/lib/semihosting.c? I was thinking that arch/arm/lib might be the better place for it, especially since it can support both armv7 and armv8 platforms. The semihosting.h file might live in arch/arm/include/asm? BTW the proposal for this is to be able to use the ARM Trusted Firmware (ATF) to load the various ATF images, plus u-boot, which can then load the kernel/ramdisk/dtb from a standard arm board file using semihosting, and then launch the kernel without a bootwrapper. This gives us a more realistic boot sequence. Thanks! Regards, Darwin > > - -- > Tom > -BEGIN PGP SIGNATURE- > Version: GnuPG v1.4.11 (GNU/Linux) > Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ > > iQIcBAEBAgAGBQJTENovAAoJENk4IS6UOR1WuUYP/RukZAEnPLM4IEEIMpa9tAir > J7FUa+zIJKerQfNQ+rrW5/sWGG2Zj/1A8twjcs7W8KXrbbaQEr+jpQRPspS3pa5q > bmfeBDclNpuwqXtzeQvm6eNWVbkq0+4fJ25AI7fL1EuhpGFmcPfXoAW4DOFBJBUW > B11BHzHO1PuWl+7fm5PLBT/kMjB8rv8gx6rhyNxp0f3/aN+U4GkSNvVBXo8cBOWm > 4gO2dqWM299e3x2GYVKBbYwbAydBXXOjwpa3VoGljJPiz5iBT1DrMJV9R37kTRkj > D07PUlV2aMNdZv+dNxV1FOce/bhcT8iRWyzUSlecPrNWDWp7nFaIaGBpDHh8iRKA > thB7LlT1hQI88ksQH923CBaa2N1N/HgYtXYSiwRXx8bQexLIBieCvfUsHxqtWKRQ > r+bf3febP0MYiU5BCHKHHpY3zfERGRIVmgAs/7khtm038ORAIxWLX7myvQyubfBz > jRbwkZfpR1UXQ8g6zcbRah9mB12foVURF8a67v+9JC7p4/Jrrjb3ARgw8LwA61de > kiqjUr3qDfEcow9KTxZPVFi5gLJXTSdMPzgrs/2cCJ2jFnN/olGd//eGaIZUzf6P > 7L2oOEwv2i7p4FwwciTGhQWCfLO3YzU0MHnFJsHu+NaDdUxhpf/X/zwcAHvQqrc+ > L6bmYpnta9ViVwJHzOSS > =Si6y > -END PGP SIGNATURE- > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Licensing Question on ARM Semihosting Code
Given the ARM header below, is this code possible to put into u-boot? For reference, I see this discussion below. http://lists.denx.de/pipermail/u-boot/2011-November/110884.html If this is not acceptable, presumably due to the "All rights reserved" and "Redistribution in binary form..." clauses below, we could try to find an alternative implementation that is GPL2.0+ licensed or rewrite the parts we need from scratch. Any suggestions you have would be most welcome. Thanks. Regards, Darwin Rambo > /* > * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. > * > * Redistribution and use in source and binary forms, with or without > * modification, are permitted provided that the following conditions are met: > * > * Redistributions of source code must retain the above copyright notice, this > * list of conditions and the following disclaimer. > * > * Redistributions in binary form must reproduce the above copyright notice, > * this list of conditions and the following disclaimer in the documentation > * and/or other materials provided with the distribution. > * > * Neither the name of ARM nor the names of its contributors may be used > * to endorse or promote products derived from this software without specific > * prior written permission. > * > * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" > * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE > * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE > * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE > * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR > * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF > * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS > * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN > * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) > * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE > * POSSIBILITY OF SUCH DAMAGE. > */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 5/6] mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/mmc/Makefile |1 +
drivers/mmc/kona_sdhci.c | 134 ++
2 files changed, 135 insertions(+)
create mode 100644 drivers/mmc/kona_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e793ed9..931922b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SDHCI) += sdhci.o
obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
+obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
new file mode 100644
index 000..77e42c8
--- /dev/null
+++ b/drivers/mmc/kona_sdhci.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SDHCI_CORECTRL_OFFSET 0x8000
+#define SDHCI_CORECTRL_EN 0x01
+#define SDHCI_CORECTRL_RESET 0x02
+
+#define SDHCI_CORESTAT_OFFSET 0x8004
+#define SDHCI_CORESTAT_CD_SW 0x01
+
+#define SDHCI_COREIMR_OFFSET 0x8008
+#define SDHCI_COREIMR_IP 0x01
+
+static int init_kona_mmc_core(struct sdhci_host *host)
+{
+ unsigned int mask;
+ unsigned int timeout;
+
+ if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
+ printf("%s: sd host controller reset error\n", __func__);
+ return 1;
+ }
+
+ /* For kona a hardware reset before anything else. */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ do {
+ if (timeout == 0) {
+ printf("%s: reset timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ } while (0 ==
+(sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
+ SDHCI_CORECTRL_RESET));
+
+ /* Clear the reset bit. */
+ mask = mask & ~SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable AHB clock */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable interrupts */
+ sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
+
+ /* Make sure Card is detected in controller */
+ mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ while (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
+ if (timeout == 0) {
+ printf("%s: CARD DETECT timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ }
+ return 0;
+}
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
+{
+ int ret = 0;
+ u32 max_clk;
+ void *reg_base;
+ struct sdhci_host *host = NULL;
+
+ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!host) {
+ printf("%s: sdhci host malloc fail!\n", __func__);
+ return -ENOMEM;
+ }
+ switch (dev_index) {
+ case 0:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE0;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK,
+ &max_clk);
+ break;
+ case 1:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE1;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK,
+ &max_clk);
+ break;
+ case 2:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE2;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK,
+ &max_clk);
+ break;
+ case 3:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE3;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK,
+ &max_clk);
+ break;
+ default:
+ printf("%s: sdio dev index %d not supported\n",
+ __func__, dev_index);
+ ret = -EINVAL;
+ }
+ if (ret)
+ return ret;
+
+ host-&g
[U-Boot] [PATCH v4 3/6] gpio: kona: Add Kona gpio driver
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Markus Mayer
Reviewed-by: Tim Kryger
---
drivers/gpio/Makefile|1 +
drivers/gpio/kona_gpio.c | 141 ++
2 files changed, 142 insertions(+)
create mode 100644 drivers/gpio/kona_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b903c45..ed2c0c7 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
+obj-$(CONFIG_KONA_GPIO)+= kona_gpio.o
obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
obj-$(CONFIG_MARVELL_MFP) += mvmfp.o
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c
new file mode 100644
index 000..6511743
--- /dev/null
+++ b/drivers/gpio/kona_gpio.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+#define GPIO_BASE (void *)GPIO2_BASE_ADDR
+
+#define GPIO_PASSWD0x00a5a501
+#define GPIO_PER_BANK 32
+#define GPIO_MAX_BANK_NUM 8
+
+#define GPIO_BANK(gpio)((gpio) >> 5)
+#define GPIO_BITMASK(gpio) \
+ (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
+
+#define GPIO_OUT_STATUS(bank) (0x + ((bank) << 2))
+#define GPIO_IN_STATUS(bank) (0x0020 + ((bank) << 2))
+#define GPIO_OUT_SET(bank) (0x0040 + ((bank) << 2))
+#define GPIO_OUT_CLEAR(bank) (0x0060 + ((bank) << 2))
+#define GPIO_INT_STATUS(bank) (0x0080 + ((bank) << 2))
+#define GPIO_INT_MASK(bank)(0x00a0 + ((bank) << 2))
+#define GPIO_INT_MSKCLR(bank) (0x00c0 + ((bank) << 2))
+#define GPIO_CONTROL(bank) (0x0100 + ((bank) << 2))
+#define GPIO_PWD_STATUS(bank) (0x0500 + ((bank) << 2))
+
+#define GPIO_GPPWR_OFFSET 0x0520
+
+#define GPIO_GPCTR0_DBR_SHIFT 5
+#define GPIO_GPCTR0_DBR_MASK 0x01e0
+
+#define GPIO_GPCTR0_ITR_SHIFT 3
+#define GPIO_GPCTR0_ITR_MASK 0x0018
+#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE0x0001
+#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x0002
+#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x0003
+
+#define GPIO_GPCTR0_IOTR_MASK 0x0001
+#define GPIO_GPCTR0_IOTR_CMD_0UTPUT0x
+#define GPIO_GPCTR0_IOTR_CMD_INPUT 0x0001
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ u32 val;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+ off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
+
+ val = readl(GPIO_BASE + off);
+ val |= bitmask;
+ writel(val, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ /* determine the GPIO pin direction */
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= GPIO_GPCTR0_IOTR_MASK;
+
+ /* read the GPIO bank status */
+ off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
+ GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
+ val = readl(GPIO_BASE + off);
+
+ /* return the specified bit status */
+ return !!(val & bitmask);
+
[U-Boot] [PATCH v4 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/bcm281xx/Makefile| 11 +
arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 +++
arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 +++
arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 ++
arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 +
arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73
arch/arm/cpu/armv7/bcm281xx/reset.c | 27 ++
arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 +
arch/arm/include/asm/arch-bcm281xx/sysmap.h | 25 ++
include/bitfield.h | 58 +++
10 files changed, 1792 insertions(+)
create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c
create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h
create mode 100644 include/bitfield.h
diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile
b/arch/arm/cpu/armv7/bcm281xx/Makefile
new file mode 100644
index 000..98f5aa5
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/Makefile
@@ -0,0 +1,11 @@
+#
+# Copyright 2013 Broadcom Corporation.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += reset.o
+obj-y += clk-core.o
+obj-y += clk-bcm281xx.o
+obj-y += clk-sdio.o
+obj-y += clk-bsc.o
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
new file mode 100644
index 000..bc8a170
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ *
+ * bcm281xx-specific clock tables
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include "clk-core.h"
+
+#define CLOCK_1K 1000
+#define CLOCK_1M (CLOCK_1K * 1000)
+
+/* declare a reference clock */
+#define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \
+static struct refclk clk_name = { \
+ .clk= { \
+ .name = #clk_name, \
+ .parent = clk_parent, \
+ .rate = clk_rate, \
+ .div= clk_div, \
+ .ops= &ref_clk_ops, \
+ }, \
+}
+
+/*
+ * Reference clocks
+ */
+
+/* Declare a list of reference clocks */
+DECLARE_REF_CLK(ref_crystal, 0, 26 * CLOCK_1M, 1);
+DECLARE_REF_CLK(var_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(ref_104m, &ref_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(ref_52m, &ref_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(ref_13m, &ref_52m.clk, 13 * CLOCK_1M, 4);
+DECLARE_REF_CLK(var_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(var_104m, &var_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(var_52m, &var_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(var_13m, &var_52m.clk, 13 * CLOCK_1M, 4);
+
+struct refclk_lkup {
+ struct refclk *procclk;
+ const char *name;
+};
+
+/* Lookup table for string to clk tranlation */
+#define MKSTR(x) {&x, #x}
+static struct refclk_lkup refclk_str_tbl[] = {
+ MKSTR(ref_crystal), MKSTR(var_96m), MKSTR(ref_96m),
+ MKSTR(ref_312m), MKSTR(ref_104m), MKSTR(ref_52m),
+ MKSTR(ref_13m), MKSTR(var_312m), MKSTR(var_104m),
+ MKSTR(var_52m), MKSTR(var_13m),
+};
+
+int refclk_entries = sizeof(refclk_str_tbl)/sizeof(refclk_str_tbl[0]);
+
+/* convert ref clock string to clock structure pointer */
+struct refclk *refclk_str_to_clk(const char *name)
+{
+ int i;
+ struct refclk_lkup *tblp = refclk_str_tbl;
+ for (i = 0; i < refclk_entries; i++, tblp++) {
+ if (!(strcmp(name, tblp->name)))
+ return tblp->procclk;
+ }
+ return NULL;
+}
+
+/* frequency tables indexed by freq_id */
+unsigned long master_axi_freq_tbl[8] = {
+ 26 * CLOCK_1M,
+ 52 * CLOCK_1M,
+ 104 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 208 * CLOCK_1M,
+ 312 * CLOCK_1M,
+ 312 * CLOCK_1M
+};
+
+unsigned long master_ahb_freq_tbl[8] = {
+
[U-Boot] [PATCH v4 6/6] board: bcm28155_ap: Add board files
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
board/broadcom/bcm28155_ap/Makefile |7 ++
board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++
boards.cfg |1 +
include/configs/bcm28155_ap.h| 140 ++
4 files changed, 235 insertions(+)
create mode 100644 board/broadcom/bcm28155_ap/Makefile
create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c
create mode 100644 include/configs/bcm28155_ap.h
diff --git a/board/broadcom/bcm28155_ap/Makefile
b/board/broadcom/bcm28155_ap/Makefile
new file mode 100644
index 000..b18785a
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Broadcom Corporation.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += $(BOARD).o
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c
b/board/broadcom/bcm28155_ap/bcm28155_ap.c
new file mode 100644
index 000..940a1c2
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SECWATCHDOG_SDOGCR_OFFSET 0x
+#define SECWATCHDOG_SDOGCR_EN_SHIFT27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT0
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+ printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ clk_init();
+
+ return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+ /* Disable watchdog reset - watchdog unused */
+ writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
+ (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
+ (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
+ (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
+ (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
+
+ return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+#ifdef CONFIG_KONA_SDHCI
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ /* Register eMMC - SDIO2 */
+ ret = kona_sdhci_init(1, 40, 0);
+ if (ret)
+ return ret;
+
+ /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+ ret = kona_sdhci_init(3, 40, 0);
+ return ret;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..e4ab8ac 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -272,6 +272,7 @@ Active arm armv7 am33xx ti
ti816x
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH
Bo Shen
+Active arm armv7 bcm281xxbroadcombcm28155_ap
bcm28155_ap bcm28155_ap
Tim Kryger
Active arm armv7 exynos samsung arndale
arndale -
Inderpal Singh
Active arm armv7 exynos samsung origen
origen -
[U-Boot] [PATCH v4 4/6] i2c: kona: Add Kona I2C driver
Add support for the Kona I2C controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/i2c/Makefile |1 +
drivers/i2c/kona_i2c.c | 730
2 files changed, 731 insertions(+)
create mode 100644 drivers/i2c/kona_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index fa3a875..36d5e5f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
new file mode 100644
index 000..0b1715a
--- /dev/null
+++ b/drivers/i2c/kona_i2c.c
@@ -0,0 +1,730 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Hardware register offsets and field defintions */
+#define CS_OFFSET 0x0020
+#define CS_ACK_SHIFT 3
+#define CS_ACK_MASK0x0008
+#define CS_ACK_CMD_GEN_START 0x
+#define CS_ACK_CMD_GEN_RESTART 0x0001
+#define CS_CMD_SHIFT 1
+#define CS_CMD_CMD_NO_ACTION 0x
+#define CS_CMD_CMD_START_RESTART 0x0001
+#define CS_CMD_CMD_STOP0x0002
+#define CS_EN_SHIFT0
+#define CS_EN_CMD_ENABLE_BSC 0x0001
+
+#define TIM_OFFSET 0x0024
+#define TIM_PRESCALE_SHIFT 6
+#define TIM_P_SHIFT3
+#define TIM_NO_DIV_SHIFT 2
+#define TIM_DIV_SHIFT 0
+
+#define DAT_OFFSET 0x0028
+
+#define TOUT_OFFSET0x002c
+
+#define TXFCR_OFFSET 0x003c
+#define TXFCR_FIFO_FLUSH_MASK 0x0080
+#define TXFCR_FIFO_EN_MASK 0x0040
+
+#define IER_OFFSET 0x0044
+#define IER_READ_COMPLETE_INT_MASK 0x0010
+#define IER_I2C_INT_EN_MASK0x0008
+#define IER_FIFO_INT_EN_MASK 0x0002
+#define IER_NOACK_EN_MASK 0x0001
+
+#define ISR_OFFSET 0x0048
+#define ISR_RESERVED_MASK 0xff60
+#define ISR_CMDBUSY_MASK 0x0080
+#define ISR_READ_COMPLETE_MASK 0x0010
+#define ISR_SES_DONE_MASK 0x0008
+#define ISR_ERR_MASK 0x0004
+#define ISR_TXFIFOEMPTY_MASK 0x0002
+#define ISR_NOACK_MASK 0x0001
+
+#define CLKEN_OFFSET 0x004c
+#define CLKEN_AUTOSENSE_OFF_MASK 0x0080
+#define CLKEN_M_SHIFT 4
+#define CLKEN_N_SHIFT 1
+#define CLKEN_CLKEN_MASK 0x0001
+
+#define FIFO_STATUS_OFFSET 0x0054
+#define FIFO_STATUS_RXFIFO_EMPTY_MASK 0x0004
+#define FIFO_STATUS_TXFIFO_EMPTY_MASK 0x0010
+
+#define HSTIM_OFFSET 0x0058
+#define HSTIM_HS_MODE_MASK 0x8000
+#define HSTIM_HS_HOLD_SHIFT10
+#define HSTIM_HS_HIGH_PHASE_SHIFT 5
+#define HSTIM_HS_SETUP_SHIFT 0
+
+#define PADCTL_OFFSET 0x005c
+#define PADCTL_PAD_OUT_EN_MASK 0x0004
+
+#define RXFCR_OFFSET 0x0068
+#define RXFCR_NACK_EN_SHIFT7
+#define RXFCR_READ_COUNT_SHIFT 0
+#define RXFIFORDOUT_OFFSET 0x006c
+
+/* Locally used constants */
+#define MAX_RX_FIFO_SIZE 64U /* bytes */
+#define MAX_TX_FIFO_SIZE 64U /* bytes */
+
+#define I2C_TIMEOUT10 /* usecs */
+
+#define WAIT_INT_CHK 100 /* usecs */
+#if I2C_TIMEOUT % WAIT_INT_CHK
+#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK
+#endif
+
+/* Operations that can be commanded to the controller */
+enum bcm_kona_cmd_t {
+ BCM_CMD_NOACTION = 0,
+ BCM_CMD_START,
+ BCM_CMD_RESTART,
+ BCM_CMD_STOP,
+};
+
+enum bus_speed_index {
+ BCM_SPD_100K = 0,
+ BCM_SPD_400K,
+ BCM_SPD_1MHZ,
+};
+
+/* Internal divider settings for standard mode, fast mode
[U-Boot] [PATCH v4 1/6] arch: kona: Initial commit of kona-common architecture code
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/Makefile|1 +
arch/arm/cpu/armv7/kona-common/Makefile|9
arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 +
arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 +
arch/arm/cpu/armv7/kona-common/s_init.c| 12 ++
arch/arm/include/asm/kona-common/clk.h | 29
arch/arm/include/asm/kona-common/kona_sdhci.h | 12 ++
7 files changed, 100 insertions(+)
create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile
create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c
create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c
create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c
create mode 100644 arch/arm/include/asm/kona-common/clk.h
create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0467d00..119ebb3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -23,6 +23,7 @@ obj-y += nonsec_virt.o
obj-y += virt-v7.o
endif
+obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
obj-$(CONFIG_TEGRA) += tegra-common/
diff --git a/arch/arm/cpu/armv7/kona-common/Makefile
b/arch/arm/cpu/armv7/kona-common/Makefile
new file mode 100644
index 000..da225cb
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2013 Broadcom Corporation.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += s_init.o
+obj-y += hwinit-common.o
+obj-y += clk-stubs.o
diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c
b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
new file mode 100644
index 000..338e0e4
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+
+/*
+ * These weak functions are available to kona architectures that don't
+ * require clock enables from the driver code.
+ */
+int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
+
+int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
new file mode 100644
index 000..f8b1e06
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/kona-common/s_init.c
b/arch/arm/cpu/armv7/kona-common/s_init.c
new file mode 100644
index 000..6066a73
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/s_init.c
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2014 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Early system init. Currently empty.
+ */
+void s_init(void)
+{
+}
diff --git a/arch/arm/include/asm/kona-common/clk.h
b/arch/arm/include/asm/kona-common/clk.h
new file mode 100644
index 000..2c7e829
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/clk.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* This API file is loosely based on u-boot/drivers/video/ipu.h and linux */
+
+#ifndef __KONA_COMMON_CLK_H
+#define __KONA_COMMON_CLK_H
+
+#include
+
+struct clk;
+
+/* Only implement required functions for your specific architecture */
+int clk_init(void);
+struct clk *clk_get(const char *id);
+int clk_enable(struct clk *clk);
+void clk_disable(struct clk *clk);
+unsigned long clk_get_rate(struct clk *clk);
+long clk_round_rate(struct clk *clk, unsigned long rate);
+int clk_set_rate(struct clk *clk, unsigned long rate);
+int clk_set_parent(struct clk *clk, struct clk *parent);
+struct clk *clk_get_parent(struct clk *clk);
+int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep);
+int clk_bsc_enable(void *base);
+
+#endif
diff --git a/arch/arm/include/asm/kona-common/kona_sdhci.h
b/arch/arm/include/asm/kona-common/kona_sdhci.h
new file mode 100644
index 000..1ff0e55
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/kona_sdhci.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2013 Broadcom Corporation.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __KONA_SDHCI_H
+#define __KONA_SDHCI_H
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks);
+
+#endif
--
1.7.9.5
___
U-Boot mailing list
U-Boot@lists.denx.de
[U-Boot] [PATCH v4 0/6] Introducing the Broadcom bcm281xx Architecture
This patchset introduces the Broadcom bcm281xx family of mobile SoC chips. Broadcom kona hardware blocks are often found in Broadcom mobile SoC chips including the bcm281xx family, so support for some of these kona blocks is also provided here. These patches work on u-boot master as well as the u-boot-arm custodian tree. v4 changes -- Remove obsolete "All rights reserved" phrase from Copyright lines. v3 changes -- Rename init_mmc_core() to init_kona_mmc_core(). Add check for card presence in init_kona_mmc_core(). Add copyright line to s_init.c. Cleanup header for bitfield.h v2 changes -- Delete lowlevel_init.S and create s_init.c. File header cleanup, cosmetic changes, dead code removal. Create include/bitfield.h. Use get_ram_size(). Use weak timer_init(); Skip lowlevel init. Remove memory test config. Use standard baud table and prompt. Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files arch/arm/cpu/armv7/Makefile|1 + arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 + arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 ++ arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 + arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 +++ arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + arch/arm/cpu/armv7/kona-common/Makefile|9 + arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 + arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 + arch/arm/cpu/armv7/kona-common/s_init.c| 12 + arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 + arch/arm/include/asm/arch-bcm281xx/sysmap.h| 25 + arch/arm/include/asm/kona-common/clk.h | 29 + arch/arm/include/asm/kona-common/kona_sdhci.h | 12 + board/broadcom/bcm28155_ap/Makefile|7 + board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++ boards.cfg |1 + drivers/gpio/Makefile |1 + drivers/gpio/kona_gpio.c | 141 + drivers/i2c/Makefile |1 + drivers/i2c/kona_i2c.c | 730 drivers/mmc/Makefile |1 + drivers/mmc/kona_sdhci.c | 134 + include/bitfield.h | 58 ++ include/configs/bcm28155_ap.h | 140 + 27 files changed, 3135 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h create mode 100644 arch/arm/include/asm/kona-common/clk.h create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h create mode 100644 board/broadcom/bcm28155_ap/Makefile create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c create mode 100644 drivers/gpio/kona_gpio.c create mode 100644 drivers/i2c/kona_i2c.c create mode 100644 drivers/mmc/kona_sdhci.c create mode 100644 include/bitfield.h create mode 100644 include/configs/bcm28155_ap.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 0/6] Introducing the Broadcom bcm281xx Architecture
Hi Tom, I have incorporated the feedback on the MMC and I2C drivers from Jaehoon (via Panto) and Heiko respectively, and was wondering if there is anything else that needs to be done? Please note that these same patches work on both the latest u-boot master and the u-boot-arm trees. Thanks! Regards, Darwin On 14-02-06 07:23 PM, Darwin Rambo wrote: > This patchset introduces the Broadcom bcm281xx family of mobile SoC > chips. Broadcom kona hardware blocks are often found in Broadcom mobile > SoC chips including the bcm281xx family, so support for some of these > kona blocks is also provided here. These patches work on u-boot master > as well as the u-boot-arm custodian tree. > > v3 changes > -- > Rename init_mmc_core() to init_kona_mmc_core(). > Add check for card presence in init_kona_mmc_core(). > Add copyright line to s_init.c. Cleanup header for bitfield.h > > v2 changes > -- > Delete lowlevel_init.S and create s_init.c. File header cleanup, > cosmetic changes, dead code removal. Create include/bitfield.h. > Use get_ram_size(). Use weak timer_init(); Skip lowlevel init. > Remove memory test config. Use standard baud table and prompt. > > Darwin Rambo (6): > arch: kona: Initial commit of kona-common architecture code > arch: bcm281xx: Initial commit of bcm281xx architecture code > gpio: kona: Add Kona gpio driver > i2c: kona: Add Kona I2C driver > mmc: kona: Add Kona mmc driver > board: bcm28155_ap: Add board files > > arch/arm/cpu/armv7/Makefile|1 + > arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + > arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 + > arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 ++ > arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 + > arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 > arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 +++ > arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + > arch/arm/cpu/armv7/kona-common/Makefile|9 + > arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 + > arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 + > arch/arm/cpu/armv7/kona-common/s_init.c| 12 + > arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 + > arch/arm/include/asm/arch-bcm281xx/sysmap.h| 25 + > arch/arm/include/asm/kona-common/clk.h | 29 + > arch/arm/include/asm/kona-common/kona_sdhci.h | 12 + > board/broadcom/bcm28155_ap/Makefile|7 + > board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++ > boards.cfg |1 + > drivers/gpio/Makefile |1 + > drivers/gpio/kona_gpio.c | 141 + > drivers/i2c/Makefile |1 + > drivers/i2c/kona_i2c.c | 730 > > drivers/mmc/Makefile |1 + > drivers/mmc/kona_sdhci.c | 134 + > include/bitfield.h | 58 ++ > include/configs/bcm28155_ap.h | 140 + > 27 files changed, 3135 insertions(+) > create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c > create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile > create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c > create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c > create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c > create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h > create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h > create mode 100644 arch/arm/include/asm/kona-common/clk.h > create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h > create mode 100644 board/broadcom/bcm28155_ap/Makefile > create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c > create mode 100644 drivers/gpio/kona_gpio.c > create mode 100644 drivers/i2c/kona_i2c.c > create mode 100644 drivers/mmc/kona_sdhci.c > create mode 100644 include/bitfield.h > create mode 100644 include/configs/bcm28155_ap.h > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/bcm281xx/Makefile| 11 +
arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 +++
arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 +++
arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 ++
arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 +
arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73
arch/arm/cpu/armv7/bcm281xx/reset.c | 27 ++
arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 +
arch/arm/include/asm/arch-bcm281xx/sysmap.h | 25 ++
include/bitfield.h | 58 +++
10 files changed, 1792 insertions(+)
create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c
create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h
create mode 100644 include/bitfield.h
diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile
b/arch/arm/cpu/armv7/bcm281xx/Makefile
new file mode 100644
index 000..46c4943
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/Makefile
@@ -0,0 +1,11 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += reset.o
+obj-y += clk-core.o
+obj-y += clk-bcm281xx.o
+obj-y += clk-sdio.o
+obj-y += clk-bsc.o
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
new file mode 100644
index 000..58cff55
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ *
+ * bcm281xx-specific clock tables
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include "clk-core.h"
+
+#define CLOCK_1K 1000
+#define CLOCK_1M (CLOCK_1K * 1000)
+
+/* declare a reference clock */
+#define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \
+static struct refclk clk_name = { \
+ .clk= { \
+ .name = #clk_name, \
+ .parent = clk_parent, \
+ .rate = clk_rate, \
+ .div= clk_div, \
+ .ops= &ref_clk_ops, \
+ }, \
+}
+
+/*
+ * Reference clocks
+ */
+
+/* Declare a list of reference clocks */
+DECLARE_REF_CLK(ref_crystal, 0, 26 * CLOCK_1M, 1);
+DECLARE_REF_CLK(var_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(ref_104m, &ref_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(ref_52m, &ref_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(ref_13m, &ref_52m.clk, 13 * CLOCK_1M, 4);
+DECLARE_REF_CLK(var_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(var_104m, &var_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(var_52m, &var_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(var_13m, &var_52m.clk, 13 * CLOCK_1M, 4);
+
+struct refclk_lkup {
+ struct refclk *procclk;
+ const char *name;
+};
+
+/* Lookup table for string to clk tranlation */
+#define MKSTR(x) {&x, #x}
+static struct refclk_lkup refclk_str_tbl[] = {
+ MKSTR(ref_crystal), MKSTR(var_96m), MKSTR(ref_96m),
+ MKSTR(ref_312m), MKSTR(ref_104m), MKSTR(ref_52m),
+ MKSTR(ref_13m), MKSTR(var_312m), MKSTR(var_104m),
+ MKSTR(var_52m), MKSTR(var_13m),
+};
+
+int refclk_entries = sizeof(refclk_str_tbl)/sizeof(refclk_str_tbl[0]);
+
+/* convert ref clock string to clock structure pointer */
+struct refclk *refclk_str_to_clk(const char *name)
+{
+ int i;
+ struct refclk_lkup *tblp = refclk_str_tbl;
+ for (i = 0; i < refclk_entries; i++, tblp++) {
+ if (!(strcmp(name, tblp->name)))
+ return tblp->procclk;
+ }
+ return NULL;
+}
+
+/* frequency tables indexed by freq_id */
+unsigned long master_axi_freq_tbl[8] = {
+ 26 * CLOCK_1M,
+ 52 * CLOCK_1M,
+ 104 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 208 * CLOCK_1M,
+ 312 * CLOCK_1M,
+ 312 * CLOCK_1M
+};
+
+
[U-Boot] [PATCH v3 4/6] i2c: kona: Add Kona I2C driver
Add support for the Kona I2C controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/i2c/Makefile |1 +
drivers/i2c/kona_i2c.c | 730
2 files changed, 731 insertions(+)
create mode 100644 drivers/i2c/kona_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index fa3a875..36d5e5f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
new file mode 100644
index 000..9f18b74
--- /dev/null
+++ b/drivers/i2c/kona_i2c.c
@@ -0,0 +1,730 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Hardware register offsets and field defintions */
+#define CS_OFFSET 0x0020
+#define CS_ACK_SHIFT 3
+#define CS_ACK_MASK0x0008
+#define CS_ACK_CMD_GEN_START 0x
+#define CS_ACK_CMD_GEN_RESTART 0x0001
+#define CS_CMD_SHIFT 1
+#define CS_CMD_CMD_NO_ACTION 0x
+#define CS_CMD_CMD_START_RESTART 0x0001
+#define CS_CMD_CMD_STOP0x0002
+#define CS_EN_SHIFT0
+#define CS_EN_CMD_ENABLE_BSC 0x0001
+
+#define TIM_OFFSET 0x0024
+#define TIM_PRESCALE_SHIFT 6
+#define TIM_P_SHIFT3
+#define TIM_NO_DIV_SHIFT 2
+#define TIM_DIV_SHIFT 0
+
+#define DAT_OFFSET 0x0028
+
+#define TOUT_OFFSET0x002c
+
+#define TXFCR_OFFSET 0x003c
+#define TXFCR_FIFO_FLUSH_MASK 0x0080
+#define TXFCR_FIFO_EN_MASK 0x0040
+
+#define IER_OFFSET 0x0044
+#define IER_READ_COMPLETE_INT_MASK 0x0010
+#define IER_I2C_INT_EN_MASK0x0008
+#define IER_FIFO_INT_EN_MASK 0x0002
+#define IER_NOACK_EN_MASK 0x0001
+
+#define ISR_OFFSET 0x0048
+#define ISR_RESERVED_MASK 0xff60
+#define ISR_CMDBUSY_MASK 0x0080
+#define ISR_READ_COMPLETE_MASK 0x0010
+#define ISR_SES_DONE_MASK 0x0008
+#define ISR_ERR_MASK 0x0004
+#define ISR_TXFIFOEMPTY_MASK 0x0002
+#define ISR_NOACK_MASK 0x0001
+
+#define CLKEN_OFFSET 0x004c
+#define CLKEN_AUTOSENSE_OFF_MASK 0x0080
+#define CLKEN_M_SHIFT 4
+#define CLKEN_N_SHIFT 1
+#define CLKEN_CLKEN_MASK 0x0001
+
+#define FIFO_STATUS_OFFSET 0x0054
+#define FIFO_STATUS_RXFIFO_EMPTY_MASK 0x0004
+#define FIFO_STATUS_TXFIFO_EMPTY_MASK 0x0010
+
+#define HSTIM_OFFSET 0x0058
+#define HSTIM_HS_MODE_MASK 0x8000
+#define HSTIM_HS_HOLD_SHIFT10
+#define HSTIM_HS_HIGH_PHASE_SHIFT 5
+#define HSTIM_HS_SETUP_SHIFT 0
+
+#define PADCTL_OFFSET 0x005c
+#define PADCTL_PAD_OUT_EN_MASK 0x0004
+
+#define RXFCR_OFFSET 0x0068
+#define RXFCR_NACK_EN_SHIFT7
+#define RXFCR_READ_COUNT_SHIFT 0
+#define RXFIFORDOUT_OFFSET 0x006c
+
+/* Locally used constants */
+#define MAX_RX_FIFO_SIZE 64U /* bytes */
+#define MAX_TX_FIFO_SIZE 64U /* bytes */
+
+#define I2C_TIMEOUT10 /* usecs */
+
+#define WAIT_INT_CHK 100 /* usecs */
+#if I2C_TIMEOUT % WAIT_INT_CHK
+#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK
+#endif
+
+/* Operations that can be commanded to the controller */
+enum bcm_kona_cmd_t {
+ BCM_CMD_NOACTION = 0,
+ BCM_CMD_START,
+ BCM_CMD_RESTART,
+ BCM_CMD_STOP,
+};
+
+enum bus_speed_index {
+ BCM_SPD_100K = 0,
+ BCM_SPD_400K,
+ BCM_SPD_1MHZ,
+};
+
+/* Internal divider settings for
[U-Boot] [PATCH v3 3/6] gpio: kona: Add Kona gpio driver
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Markus Mayer
Reviewed-by: Tim Kryger
---
drivers/gpio/Makefile|1 +
drivers/gpio/kona_gpio.c | 141 ++
2 files changed, 142 insertions(+)
create mode 100644 drivers/gpio/kona_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b903c45..ed2c0c7 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
+obj-$(CONFIG_KONA_GPIO)+= kona_gpio.o
obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
obj-$(CONFIG_MARVELL_MFP) += mvmfp.o
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c
new file mode 100644
index 000..ce0e499
--- /dev/null
+++ b/drivers/gpio/kona_gpio.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+#define GPIO_BASE (void *)GPIO2_BASE_ADDR
+
+#define GPIO_PASSWD0x00a5a501
+#define GPIO_PER_BANK 32
+#define GPIO_MAX_BANK_NUM 8
+
+#define GPIO_BANK(gpio)((gpio) >> 5)
+#define GPIO_BITMASK(gpio) \
+ (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
+
+#define GPIO_OUT_STATUS(bank) (0x + ((bank) << 2))
+#define GPIO_IN_STATUS(bank) (0x0020 + ((bank) << 2))
+#define GPIO_OUT_SET(bank) (0x0040 + ((bank) << 2))
+#define GPIO_OUT_CLEAR(bank) (0x0060 + ((bank) << 2))
+#define GPIO_INT_STATUS(bank) (0x0080 + ((bank) << 2))
+#define GPIO_INT_MASK(bank)(0x00a0 + ((bank) << 2))
+#define GPIO_INT_MSKCLR(bank) (0x00c0 + ((bank) << 2))
+#define GPIO_CONTROL(bank) (0x0100 + ((bank) << 2))
+#define GPIO_PWD_STATUS(bank) (0x0500 + ((bank) << 2))
+
+#define GPIO_GPPWR_OFFSET 0x0520
+
+#define GPIO_GPCTR0_DBR_SHIFT 5
+#define GPIO_GPCTR0_DBR_MASK 0x01e0
+
+#define GPIO_GPCTR0_ITR_SHIFT 3
+#define GPIO_GPCTR0_ITR_MASK 0x0018
+#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE0x0001
+#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x0002
+#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x0003
+
+#define GPIO_GPCTR0_IOTR_MASK 0x0001
+#define GPIO_GPCTR0_IOTR_CMD_0UTPUT0x
+#define GPIO_GPCTR0_IOTR_CMD_INPUT 0x0001
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ u32 val;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+ off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
+
+ val = readl(GPIO_BASE + off);
+ val |= bitmask;
+ writel(val, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ /* determine the GPIO pin direction */
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= GPIO_GPCTR0_IOTR_MASK;
+
+ /* read the GPIO bank status */
+ off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
+ GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
+ val = readl(GPIO_BASE + off);
+
+ /* return the specified bit status */
+ return
[U-Boot] [PATCH v3 5/6] mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/mmc/Makefile |1 +
drivers/mmc/kona_sdhci.c | 134 ++
2 files changed, 135 insertions(+)
create mode 100644 drivers/mmc/kona_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e793ed9..931922b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SDHCI) += sdhci.o
obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
+obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
new file mode 100644
index 000..b7c53e8
--- /dev/null
+++ b/drivers/mmc/kona_sdhci.c
@@ -0,0 +1,134 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SDHCI_CORECTRL_OFFSET 0x8000
+#define SDHCI_CORECTRL_EN 0x01
+#define SDHCI_CORECTRL_RESET 0x02
+
+#define SDHCI_CORESTAT_OFFSET 0x8004
+#define SDHCI_CORESTAT_CD_SW 0x01
+
+#define SDHCI_COREIMR_OFFSET 0x8008
+#define SDHCI_COREIMR_IP 0x01
+
+static int init_kona_mmc_core(struct sdhci_host *host)
+{
+ unsigned int mask;
+ unsigned int timeout;
+
+ if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
+ printf("%s: sd host controller reset error\n", __func__);
+ return 1;
+ }
+
+ /* For kona a hardware reset before anything else. */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ do {
+ if (timeout == 0) {
+ printf("%s: reset timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ } while (0 ==
+(sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
+ SDHCI_CORECTRL_RESET));
+
+ /* Clear the reset bit. */
+ mask = mask & ~SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable AHB clock */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable interrupts */
+ sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
+
+ /* Make sure Card is detected in controller */
+ mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ while (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
+ if (timeout == 0) {
+ printf("%s: CARD DETECT timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ }
+ return 0;
+}
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
+{
+ int ret = 0;
+ u32 max_clk;
+ void *reg_base;
+ struct sdhci_host *host = NULL;
+
+ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!host) {
+ printf("%s: sdhci host malloc fail!\n", __func__);
+ return -ENOMEM;
+ }
+ switch (dev_index) {
+ case 0:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE0;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK,
+ &max_clk);
+ break;
+ case 1:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE1;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK,
+ &max_clk);
+ break;
+ case 2:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE2;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK,
+ &max_clk);
+ break;
+ case 3:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE3;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK,
+ &max_clk);
+ break;
+ default:
+ printf("%s: sdio dev index %d not supported\n",
+ __func__, dev_index);
+ ret = -EINVAL;
+ }
+ if (ret)
+
[U-Boot] [PATCH v3 6/6] board: bcm28155_ap: Add board files
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
board/broadcom/bcm28155_ap/Makefile |7 ++
board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++
boards.cfg |1 +
include/configs/bcm28155_ap.h| 140 ++
4 files changed, 235 insertions(+)
create mode 100644 board/broadcom/bcm28155_ap/Makefile
create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c
create mode 100644 include/configs/bcm28155_ap.h
diff --git a/board/broadcom/bcm28155_ap/Makefile
b/board/broadcom/bcm28155_ap/Makefile
new file mode 100644
index 000..b6159dc
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += $(BOARD).o
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c
b/board/broadcom/bcm28155_ap/bcm28155_ap.c
new file mode 100644
index 000..814e6b4
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SECWATCHDOG_SDOGCR_OFFSET 0x
+#define SECWATCHDOG_SDOGCR_EN_SHIFT27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT0
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+ printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ clk_init();
+
+ return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+ /* Disable watchdog reset - watchdog unused */
+ writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
+ (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
+ (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
+ (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
+ (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
+
+ return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+#ifdef CONFIG_KONA_SDHCI
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ /* Register eMMC - SDIO2 */
+ ret = kona_sdhci_init(1, 40, 0);
+ if (ret)
+ return ret;
+
+ /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+ ret = kona_sdhci_init(3, 40, 0);
+ return ret;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..e4ab8ac 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -272,6 +272,7 @@ Active arm armv7 am33xx ti
ti816x
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH
Bo Shen
+Active arm armv7 bcm281xxbroadcombcm28155_ap
bcm28155_ap bcm28155_ap
Tim Kryger
Active arm armv7 exynos samsung arndale
arndale -
Inderpal Singh
Active arm armv7 exynos samsung origen
origen -
[U-Boot] [PATCH v3 1/6] arch: kona: Initial commit of kona-common architecture code
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/Makefile|1 +
arch/arm/cpu/armv7/kona-common/Makefile|9
arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 +
arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 +
arch/arm/cpu/armv7/kona-common/s_init.c| 12 ++
arch/arm/include/asm/kona-common/clk.h | 29
arch/arm/include/asm/kona-common/kona_sdhci.h | 12 ++
7 files changed, 100 insertions(+)
create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile
create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c
create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c
create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c
create mode 100644 arch/arm/include/asm/kona-common/clk.h
create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0467d00..119ebb3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -23,6 +23,7 @@ obj-y += nonsec_virt.o
obj-y += virt-v7.o
endif
+obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
obj-$(CONFIG_TEGRA) += tegra-common/
diff --git a/arch/arm/cpu/armv7/kona-common/Makefile
b/arch/arm/cpu/armv7/kona-common/Makefile
new file mode 100644
index 000..8af6f2c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += s_init.o
+obj-y += hwinit-common.o
+obj-y += clk-stubs.o
diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c
b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
new file mode 100644
index 000..824d597
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+
+/*
+ * These weak functions are available to kona architectures that don't
+ * require clock enables from the driver code.
+ */
+int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
+
+int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
new file mode 100644
index 000..eb046a5
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/kona-common/s_init.c
b/arch/arm/cpu/armv7/kona-common/s_init.c
new file mode 100644
index 000..000442c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/s_init.c
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2014 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Early system init. Currently empty.
+ */
+void s_init(void)
+{
+}
diff --git a/arch/arm/include/asm/kona-common/clk.h
b/arch/arm/include/asm/kona-common/clk.h
new file mode 100644
index 000..52031d3
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/clk.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* This API file is loosely based on u-boot/drivers/video/ipu.h and linux */
+
+#ifndef __KONA_COMMON_CLK_H
+#define __KONA_COMMON_CLK_H
+
+#include
+
+struct clk;
+
+/* Only implement required functions for your specific architecture */
+int clk_init(void);
+struct clk *clk_get(const char *id);
+int clk_enable(struct clk *clk);
+void clk_disable(struct clk *clk);
+unsigned long clk_get_rate(struct clk *clk);
+long clk_round_rate(struct clk *clk, unsigned long rate);
+int clk_set_rate(struct clk *clk, unsigned long rate);
+int clk_set_parent(struct clk *clk, struct clk *parent);
+struct clk *clk_get_parent(struct clk *clk);
+int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep);
+int clk_bsc_enable(void *base);
+
+#endif
diff --git a/arch/arm/include/asm/kona-common/kona_sdhci.h
b/arch/arm/include/asm/kona-common/kona_sdhci.h
new file mode 100644
index 000..03f04dd
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/kona_sdhci.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __KONA_SDHCI_H
+#define __KONA_SDHCI_H
+
+int kona_sdhci_init(int dev_index, u32 mi
[U-Boot] [PATCH v3 0/6] Introducing the Broadcom bcm281xx Architecture
This patchset introduces the Broadcom bcm281xx family of mobile SoC chips. Broadcom kona hardware blocks are often found in Broadcom mobile SoC chips including the bcm281xx family, so support for some of these kona blocks is also provided here. These patches work on u-boot master as well as the u-boot-arm custodian tree. v3 changes -- Rename init_mmc_core() to init_kona_mmc_core(). Add check for card presence in init_kona_mmc_core(). Add copyright line to s_init.c. Cleanup header for bitfield.h v2 changes -- Delete lowlevel_init.S and create s_init.c. File header cleanup, cosmetic changes, dead code removal. Create include/bitfield.h. Use get_ram_size(). Use weak timer_init(); Skip lowlevel init. Remove memory test config. Use standard baud table and prompt. Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files arch/arm/cpu/armv7/Makefile|1 + arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 + arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 ++ arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 + arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 +++ arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + arch/arm/cpu/armv7/kona-common/Makefile|9 + arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 + arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 + arch/arm/cpu/armv7/kona-common/s_init.c| 12 + arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 + arch/arm/include/asm/arch-bcm281xx/sysmap.h| 25 + arch/arm/include/asm/kona-common/clk.h | 29 + arch/arm/include/asm/kona-common/kona_sdhci.h | 12 + board/broadcom/bcm28155_ap/Makefile|7 + board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++ boards.cfg |1 + drivers/gpio/Makefile |1 + drivers/gpio/kona_gpio.c | 141 + drivers/i2c/Makefile |1 + drivers/i2c/kona_i2c.c | 730 drivers/mmc/Makefile |1 + drivers/mmc/kona_sdhci.c | 134 + include/bitfield.h | 58 ++ include/configs/bcm28155_ap.h | 140 + 27 files changed, 3135 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h create mode 100644 arch/arm/include/asm/kona-common/clk.h create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h create mode 100644 board/broadcom/bcm28155_ap/Makefile create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c create mode 100644 drivers/gpio/kona_gpio.c create mode 100644 drivers/i2c/kona_i2c.c create mode 100644 drivers/mmc/kona_sdhci.c create mode 100644 include/bitfield.h create mode 100644 include/configs/bcm28155_ap.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/6] i2c: kona: Add Kona I2C driver
On 14-02-03 11:22 PM, Heiko Schocher wrote:
> Hello Darwin,
>
> Am 03.02.2014 23:12, schrieb Darwin Rambo:
>> Add support for the Kona I2C controller found on Broadcom mobile SoCs.
>>
>> Signed-off-by: Darwin Rambo
>> Reviewed-by: Steve Rae
>> Reviewed-by: Tim Kryger
>> ---
>
> What has changed in the v2 of your patch?
>From the initial patch set nothing has changed functionally, just some
comment style cleanup.
>
>> drivers/i2c/Makefile |1 +
>> drivers/i2c/kona_i2c.c | 730
>>
>> 2 files changed, 731 insertions(+)
>> create mode 100644 drivers/i2c/kona_i2c.c
> [...]
>> diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
>> new file mode 100644
>> index 000..9f18b74
>> --- /dev/null
>> +++ b/drivers/i2c/kona_i2c.c
>> @@ -0,0 +1,730 @@
>> +/*
>> + * Copyright 2013 Broadcom Corporation. All rights reserved.
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +/* Hardware register offsets and field defintions */
>> +#define CS_OFFSET0x0020
>> +#define CS_ACK_SHIFT3
>> +#define CS_ACK_MASK0x0008
>> +#define CS_ACK_CMD_GEN_START0x
>> +#define CS_ACK_CMD_GEN_RESTART0x0001
>> +#define CS_CMD_SHIFT1
>> +#define CS_CMD_CMD_NO_ACTION0x
>> +#define CS_CMD_CMD_START_RESTART0x0001
>> +#define CS_CMD_CMD_STOP0x0002
>> +#define CS_EN_SHIFT0
>> +#define CS_EN_CMD_ENABLE_BSC0x0001
>> +
>> +#define TIM_OFFSET0x0024
>> +#define TIM_PRESCALE_SHIFT6
>> +#define TIM_P_SHIFT3
>> +#define TIM_NO_DIV_SHIFT2
>> +#define TIM_DIV_SHIFT0
>> +
>> +#define DAT_OFFSET0x0028
>> +
>> +#define TOUT_OFFSET0x002c
>> +
>> +#define TXFCR_OFFSET0x003c
>> +#define TXFCR_FIFO_FLUSH_MASK0x0080
>> +#define TXFCR_FIFO_EN_MASK0x0040
>> +
>> +#define IER_OFFSET0x0044
>> +#define IER_READ_COMPLETE_INT_MASK0x0010
>> +#define IER_I2C_INT_EN_MASK0x0008
>> +#define IER_FIFO_INT_EN_MASK0x0002
>> +#define IER_NOACK_EN_MASK0x0001
>> +
>> +#define ISR_OFFSET0x0048
>> +#define ISR_RESERVED_MASK0xff60
>> +#define ISR_CMDBUSY_MASK0x0080
>> +#define ISR_READ_COMPLETE_MASK0x0010
>> +#define ISR_SES_DONE_MASK0x0008
>> +#define ISR_ERR_MASK0x0004
>> +#define ISR_TXFIFOEMPTY_MASK0x0002
>> +#define ISR_NOACK_MASK0x0001
>> +
>> +#define CLKEN_OFFSET0x004c
>> +#define CLKEN_AUTOSENSE_OFF_MASK0x0080
>> +#define CLKEN_M_SHIFT4
>> +#define CLKEN_N_SHIFT1
>> +#define CLKEN_CLKEN_MASK0x0001
>> +
>> +#define FIFO_STATUS_OFFSET0x0054
>> +#define FIFO_STATUS_RXFIFO_EMPTY_MASK0x0004
>> +#define FIFO_STATUS_TXFIFO_EMPTY_MASK0x0010
>> +
>> +#define HSTIM_OFFSET0x0058
>> +#define HSTIM_HS_MODE_MASK0x8000
>> +#define HSTIM_HS_HOLD_SHIFT10
>> +#define HSTIM_HS_HIGH_PHASE_SHIFT5
>> +#define HSTIM_HS_SETUP_SHIFT0
>> +
>> +#define PADCTL_OFFSET0x005c
>> +#define PADCTL_PAD_OUT_EN_MASK0x0004
>> +
>> +#define RXFCR_OFFSET0x0068
>> +#define RXFCR_NACK_EN_SHIFT7
>> +#define RXFCR_READ_COUNT_SHIFT0
>> +#define RXFIFORDOUT_OFFSET0x006c
>> +
>> +/* Locally used constants */
>> +#define MAX_RX_FIFO_SIZE64U/* bytes */
>> +#define MAX_TX_FIFO_SIZE64U/* bytes */
>> +
>> +#define I2C_TIMEOUT10/* usecs */
>> +
>> +#define WAIT_INT_CHK100/* usecs */
>> +#if I2C_TIMEOUT % WAIT_INT_CHK
>> +#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK
>> +#endif
>> +
>> +/* Operations that can be commanded to the controller */
>> +enum bcm_kona_cmd_t {
>&g
Re: [U-Boot] [PATCH v1 5/6] mmc: kona: Add Kona mmc driver
On 14-02-03 05:12 PM, Jaehoon Chung wrote:
> On 02/04/2014 06:03 AM, Darwin Rambo wrote:
>> Add support for the Kona SDHCI found on Broadcom mobile SoCs.
>>
>> Signed-off-by: Darwin Rambo
>> Reviewed-by: Steve Rae
>> Reviewed-by: Tim Kryger
>> ---
>> drivers/mmc/Makefile |1 +
>> drivers/mmc/kona_sdhci.c | 125
>> ++
>> 2 files changed, 126 insertions(+)
>> create mode 100644 drivers/mmc/kona_sdhci.c
>>
>> diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
>> index e793ed9..931922b 100644
>> --- a/drivers/mmc/Makefile
>> +++ b/drivers/mmc/Makefile
>> @@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
>> obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
>> obj-$(CONFIG_SDHCI) += sdhci.o
>> obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
>> +obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
>> obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
>> obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
>> obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
>> diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
>> new file mode 100644
>> index 000..69e6f17
>> --- /dev/null
>> +++ b/drivers/mmc/kona_sdhci.c
>> @@ -0,0 +1,125 @@
>> +/*
>> + * Copyright 2013 Broadcom Corporation. All rights reserved.
>> + *
>> + * SPDX-License-Identifier: GPL-2.0+
>> + */
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +#define SDHCI_CORECTRL_OFFSET 0x8000
>> +#define SDHCI_CORECTRL_EN 0x01
>> +#define SDHCI_CORECTRL_RESET0x02
>> +
>> +#define SDHCI_CORESTAT_OFFSET 0x8004
>> +#define SDHCI_CORESTAT_CD_SW0x01
>> +
>> +#define SDHCI_COREIMR_OFFSET0x8008
>> +#define SDHCI_COREIMR_IP0x01
>> +
>> +static int init_mmc_core(struct sdhci_host *host)
>
> I think that function name is used to "_kona_".
> This function isn't general mmc function, right?
Correct. I should rename it to init_kona_mmc_core(). Thanks.
>
> Best Regards,
> Jaehoon Chung
>
>> +{
>> +unsigned int mask;
>> +unsigned int timeout;
>> +
>> +if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
>> +printf("%s: sd host controller reset error\n", __func__);
>> +return 1;
>> +}
>> +
>> +/* For kona a hardware reset before anything else. */
>> +mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
>> +sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
>> +
>> +/* Wait max 100 ms */
>> +timeout = 1000;
>> +do {
>> +if (timeout == 0) {
>> +printf("%s: reset timeout error\n", __func__);
>> +return 1;
>> +}
>> +timeout--;
>> +udelay(100);
>> +} while (0 ==
>> + (sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
>> + SDHCI_CORECTRL_RESET));
>> +
>> +/* Clear the reset bit. */
>> +mask = mask & ~SDHCI_CORECTRL_RESET;
>> +sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
>> +udelay(10);
>> +
>> +/* Enable AHB clock */
>> +mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
>> +sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
>> +
>> +/* Enable interrupts */
>> +sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
>> +
>> +/* Make sure Card is detected in controller */
>> +mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
>> +sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
BTW I think that this is a good spot to test and wait for CARD_PRESENT
with timeout. I should add it here. This avoids timing issues if the
core code tries to power up the card before it is recognized. Thanks.
>> +
>> +return 0;
>> +}
>> +
>> +int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
>> +{
>> +int ret = 0;
>> +u32 max_clk;
>> +void *reg_base;
>> +struct sdhci_host *host = NULL;
>> +
>> +host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
>> +if (!host) {
>> +printf("%s: sdhci host malloc fail!\n", __func__);
>> +return -ENOMEM;
>> +}
>> +switch (dev_index) {
>> +case 0:
>> +
[U-Boot] [PATCH v2 5/6] mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/mmc/Makefile |1 +
drivers/mmc/kona_sdhci.c | 125 ++
2 files changed, 126 insertions(+)
create mode 100644 drivers/mmc/kona_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e793ed9..931922b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SDHCI) += sdhci.o
obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
+obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
new file mode 100644
index 000..69e6f17
--- /dev/null
+++ b/drivers/mmc/kona_sdhci.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SDHCI_CORECTRL_OFFSET 0x8000
+#define SDHCI_CORECTRL_EN 0x01
+#define SDHCI_CORECTRL_RESET 0x02
+
+#define SDHCI_CORESTAT_OFFSET 0x8004
+#define SDHCI_CORESTAT_CD_SW 0x01
+
+#define SDHCI_COREIMR_OFFSET 0x8008
+#define SDHCI_COREIMR_IP 0x01
+
+static int init_mmc_core(struct sdhci_host *host)
+{
+ unsigned int mask;
+ unsigned int timeout;
+
+ if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
+ printf("%s: sd host controller reset error\n", __func__);
+ return 1;
+ }
+
+ /* For kona a hardware reset before anything else. */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ do {
+ if (timeout == 0) {
+ printf("%s: reset timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ } while (0 ==
+(sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
+ SDHCI_CORECTRL_RESET));
+
+ /* Clear the reset bit. */
+ mask = mask & ~SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+ udelay(10);
+
+ /* Enable AHB clock */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable interrupts */
+ sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
+
+ /* Make sure Card is detected in controller */
+ mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
+
+ return 0;
+}
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
+{
+ int ret = 0;
+ u32 max_clk;
+ void *reg_base;
+ struct sdhci_host *host = NULL;
+
+ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!host) {
+ printf("%s: sdhci host malloc fail!\n", __func__);
+ return -ENOMEM;
+ }
+ switch (dev_index) {
+ case 0:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE0;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK,
+ &max_clk);
+ break;
+ case 1:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE1;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK,
+ &max_clk);
+ break;
+ case 2:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE2;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK,
+ &max_clk);
+ break;
+ case 3:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE3;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK,
+ &max_clk);
+ break;
+ default:
+ printf("%s: sdio dev index %d not supported\n",
+ __func__, dev_index);
+ ret = -EINVAL;
+ }
+ if (ret)
+ return ret;
+
+ host->name = "kona-sdhci";
+ host->ioaddr = reg_base;
+ host->quirks = quirks;
+ host->host_caps = MMC_MODE_HC;
+
+ if (init_mmc_core(host))
+ return -EINVAL;
+
+ if (quirks & SDHCI_QUIRK_REG32_RW)
+ host->version = sdhci_readl(host, SDHCI_HOST_VERS
[U-Boot] [PATCH v2 4/6] i2c: kona: Add Kona I2C driver
Add support for the Kona I2C controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/i2c/Makefile |1 +
drivers/i2c/kona_i2c.c | 730
2 files changed, 731 insertions(+)
create mode 100644 drivers/i2c/kona_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index fa3a875..36d5e5f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
new file mode 100644
index 000..9f18b74
--- /dev/null
+++ b/drivers/i2c/kona_i2c.c
@@ -0,0 +1,730 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Hardware register offsets and field defintions */
+#define CS_OFFSET 0x0020
+#define CS_ACK_SHIFT 3
+#define CS_ACK_MASK0x0008
+#define CS_ACK_CMD_GEN_START 0x
+#define CS_ACK_CMD_GEN_RESTART 0x0001
+#define CS_CMD_SHIFT 1
+#define CS_CMD_CMD_NO_ACTION 0x
+#define CS_CMD_CMD_START_RESTART 0x0001
+#define CS_CMD_CMD_STOP0x0002
+#define CS_EN_SHIFT0
+#define CS_EN_CMD_ENABLE_BSC 0x0001
+
+#define TIM_OFFSET 0x0024
+#define TIM_PRESCALE_SHIFT 6
+#define TIM_P_SHIFT3
+#define TIM_NO_DIV_SHIFT 2
+#define TIM_DIV_SHIFT 0
+
+#define DAT_OFFSET 0x0028
+
+#define TOUT_OFFSET0x002c
+
+#define TXFCR_OFFSET 0x003c
+#define TXFCR_FIFO_FLUSH_MASK 0x0080
+#define TXFCR_FIFO_EN_MASK 0x0040
+
+#define IER_OFFSET 0x0044
+#define IER_READ_COMPLETE_INT_MASK 0x0010
+#define IER_I2C_INT_EN_MASK0x0008
+#define IER_FIFO_INT_EN_MASK 0x0002
+#define IER_NOACK_EN_MASK 0x0001
+
+#define ISR_OFFSET 0x0048
+#define ISR_RESERVED_MASK 0xff60
+#define ISR_CMDBUSY_MASK 0x0080
+#define ISR_READ_COMPLETE_MASK 0x0010
+#define ISR_SES_DONE_MASK 0x0008
+#define ISR_ERR_MASK 0x0004
+#define ISR_TXFIFOEMPTY_MASK 0x0002
+#define ISR_NOACK_MASK 0x0001
+
+#define CLKEN_OFFSET 0x004c
+#define CLKEN_AUTOSENSE_OFF_MASK 0x0080
+#define CLKEN_M_SHIFT 4
+#define CLKEN_N_SHIFT 1
+#define CLKEN_CLKEN_MASK 0x0001
+
+#define FIFO_STATUS_OFFSET 0x0054
+#define FIFO_STATUS_RXFIFO_EMPTY_MASK 0x0004
+#define FIFO_STATUS_TXFIFO_EMPTY_MASK 0x0010
+
+#define HSTIM_OFFSET 0x0058
+#define HSTIM_HS_MODE_MASK 0x8000
+#define HSTIM_HS_HOLD_SHIFT10
+#define HSTIM_HS_HIGH_PHASE_SHIFT 5
+#define HSTIM_HS_SETUP_SHIFT 0
+
+#define PADCTL_OFFSET 0x005c
+#define PADCTL_PAD_OUT_EN_MASK 0x0004
+
+#define RXFCR_OFFSET 0x0068
+#define RXFCR_NACK_EN_SHIFT7
+#define RXFCR_READ_COUNT_SHIFT 0
+#define RXFIFORDOUT_OFFSET 0x006c
+
+/* Locally used constants */
+#define MAX_RX_FIFO_SIZE 64U /* bytes */
+#define MAX_TX_FIFO_SIZE 64U /* bytes */
+
+#define I2C_TIMEOUT10 /* usecs */
+
+#define WAIT_INT_CHK 100 /* usecs */
+#if I2C_TIMEOUT % WAIT_INT_CHK
+#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK
+#endif
+
+/* Operations that can be commanded to the controller */
+enum bcm_kona_cmd_t {
+ BCM_CMD_NOACTION = 0,
+ BCM_CMD_START,
+ BCM_CMD_RESTART,
+ BCM_CMD_STOP,
+};
+
+enum bus_speed_index {
+ BCM_SPD_100K = 0,
+ BCM_SPD_400K,
+ BCM_SPD_1MHZ,
+};
+
+/* Internal divider settings for
[U-Boot] [PATCH v2 3/6] gpio: kona: Add Kona gpio driver
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Markus Mayer
Reviewed-by: Tim Kryger
---
drivers/gpio/Makefile|1 +
drivers/gpio/kona_gpio.c | 141 ++
2 files changed, 142 insertions(+)
create mode 100644 drivers/gpio/kona_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b903c45..ed2c0c7 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
+obj-$(CONFIG_KONA_GPIO)+= kona_gpio.o
obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
obj-$(CONFIG_MARVELL_MFP) += mvmfp.o
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c
new file mode 100644
index 000..ce0e499
--- /dev/null
+++ b/drivers/gpio/kona_gpio.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+#define GPIO_BASE (void *)GPIO2_BASE_ADDR
+
+#define GPIO_PASSWD0x00a5a501
+#define GPIO_PER_BANK 32
+#define GPIO_MAX_BANK_NUM 8
+
+#define GPIO_BANK(gpio)((gpio) >> 5)
+#define GPIO_BITMASK(gpio) \
+ (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
+
+#define GPIO_OUT_STATUS(bank) (0x + ((bank) << 2))
+#define GPIO_IN_STATUS(bank) (0x0020 + ((bank) << 2))
+#define GPIO_OUT_SET(bank) (0x0040 + ((bank) << 2))
+#define GPIO_OUT_CLEAR(bank) (0x0060 + ((bank) << 2))
+#define GPIO_INT_STATUS(bank) (0x0080 + ((bank) << 2))
+#define GPIO_INT_MASK(bank)(0x00a0 + ((bank) << 2))
+#define GPIO_INT_MSKCLR(bank) (0x00c0 + ((bank) << 2))
+#define GPIO_CONTROL(bank) (0x0100 + ((bank) << 2))
+#define GPIO_PWD_STATUS(bank) (0x0500 + ((bank) << 2))
+
+#define GPIO_GPPWR_OFFSET 0x0520
+
+#define GPIO_GPCTR0_DBR_SHIFT 5
+#define GPIO_GPCTR0_DBR_MASK 0x01e0
+
+#define GPIO_GPCTR0_ITR_SHIFT 3
+#define GPIO_GPCTR0_ITR_MASK 0x0018
+#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE0x0001
+#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x0002
+#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x0003
+
+#define GPIO_GPCTR0_IOTR_MASK 0x0001
+#define GPIO_GPCTR0_IOTR_CMD_0UTPUT0x
+#define GPIO_GPCTR0_IOTR_CMD_INPUT 0x0001
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ u32 val;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+ off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
+
+ val = readl(GPIO_BASE + off);
+ val |= bitmask;
+ writel(val, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ /* determine the GPIO pin direction */
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= GPIO_GPCTR0_IOTR_MASK;
+
+ /* read the GPIO bank status */
+ off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
+ GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
+ val = readl(GPIO_BASE + off);
+
+ /* return the specified bit status */
+ return
[U-Boot] [PATCH v2 6/6] board: bcm28155_ap: Add board files
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
board/broadcom/bcm28155_ap/Makefile |7 ++
board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++
boards.cfg |1 +
include/configs/bcm28155_ap.h| 140 ++
4 files changed, 235 insertions(+)
create mode 100644 board/broadcom/bcm28155_ap/Makefile
create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c
create mode 100644 include/configs/bcm28155_ap.h
diff --git a/board/broadcom/bcm28155_ap/Makefile
b/board/broadcom/bcm28155_ap/Makefile
new file mode 100644
index 000..b6159dc
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += $(BOARD).o
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c
b/board/broadcom/bcm28155_ap/bcm28155_ap.c
new file mode 100644
index 000..814e6b4
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SECWATCHDOG_SDOGCR_OFFSET 0x
+#define SECWATCHDOG_SDOGCR_EN_SHIFT27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT0
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+ printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ clk_init();
+
+ return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+ /* Disable watchdog reset - watchdog unused */
+ writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
+ (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
+ (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
+ (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
+ (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
+
+ return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+#ifdef CONFIG_KONA_SDHCI
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ /* Register eMMC - SDIO2 */
+ ret = kona_sdhci_init(1, 40, 0);
+ if (ret)
+ return ret;
+
+ /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+ ret = kona_sdhci_init(3, 40, 0);
+ return ret;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..e4ab8ac 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -272,6 +272,7 @@ Active arm armv7 am33xx ti
ti816x
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH
Bo Shen
+Active arm armv7 bcm281xxbroadcombcm28155_ap
bcm28155_ap bcm28155_ap
Tim Kryger
Active arm armv7 exynos samsung arndale
arndale -
Inderpal Singh
Active arm armv7 exynos samsung origen
origen -
[U-Boot] [PATCH v2 0/6] Introducing the Broadcom bcm281xx Architecture
This patchset introduces the Broadcom bcm281xx family of mobile SoC chips. Broadcom kona hardware blocks are often found in Broadcom mobile SoC chips including the bcm281xx family, so support for some of these kona blocks is also provided here. These patches work on u-boot master as well as the u-boot-arm custodian tree. v2 changes -- Delete lowlevel_init.S and create s_init.c. File header cleanup, cosmetic changes, dead code removal. Create include/bitfield.h. Use get_ram_size(). Use weak timer_init(); Skip lowlevel init. Remove memory test config. Use standard baud table and prompt. Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files arch/arm/cpu/armv7/Makefile|1 + arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 + arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 ++ arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 + arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 +++ arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + arch/arm/cpu/armv7/kona-common/Makefile|9 + arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 + arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 + arch/arm/cpu/armv7/kona-common/s_init.c| 12 + arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 + arch/arm/include/asm/arch-bcm281xx/sysmap.h| 25 + arch/arm/include/asm/kona-common/clk.h | 29 + arch/arm/include/asm/kona-common/kona_sdhci.h | 12 + board/broadcom/bcm28155_ap/Makefile|7 + board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++ boards.cfg |1 + drivers/gpio/Makefile |1 + drivers/gpio/kona_gpio.c | 141 + drivers/i2c/Makefile |1 + drivers/i2c/kona_i2c.c | 730 drivers/mmc/Makefile |1 + drivers/mmc/kona_sdhci.c | 125 include/bitfield.h | 56 ++ include/configs/bcm28155_ap.h | 140 + 27 files changed, 3124 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h create mode 100644 arch/arm/include/asm/kona-common/clk.h create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h create mode 100644 board/broadcom/bcm28155_ap/Makefile create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c create mode 100644 drivers/gpio/kona_gpio.c create mode 100644 drivers/i2c/kona_i2c.c create mode 100644 drivers/mmc/kona_sdhci.c create mode 100644 include/bitfield.h create mode 100644 include/configs/bcm28155_ap.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/bcm281xx/Makefile| 11 +
arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 +++
arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 +++
arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 ++
arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 +
arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73
arch/arm/cpu/armv7/bcm281xx/reset.c | 27 ++
arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 +
arch/arm/include/asm/arch-bcm281xx/sysmap.h | 25 ++
include/bitfield.h | 56 +++
10 files changed, 1790 insertions(+)
create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c
create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h
create mode 100644 include/bitfield.h
diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile
b/arch/arm/cpu/armv7/bcm281xx/Makefile
new file mode 100644
index 000..46c4943
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/Makefile
@@ -0,0 +1,11 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += reset.o
+obj-y += clk-core.o
+obj-y += clk-bcm281xx.o
+obj-y += clk-sdio.o
+obj-y += clk-bsc.o
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
new file mode 100644
index 000..58cff55
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ *
+ * bcm281xx-specific clock tables
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include "clk-core.h"
+
+#define CLOCK_1K 1000
+#define CLOCK_1M (CLOCK_1K * 1000)
+
+/* declare a reference clock */
+#define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \
+static struct refclk clk_name = { \
+ .clk= { \
+ .name = #clk_name, \
+ .parent = clk_parent, \
+ .rate = clk_rate, \
+ .div= clk_div, \
+ .ops= &ref_clk_ops, \
+ }, \
+}
+
+/*
+ * Reference clocks
+ */
+
+/* Declare a list of reference clocks */
+DECLARE_REF_CLK(ref_crystal, 0, 26 * CLOCK_1M, 1);
+DECLARE_REF_CLK(var_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(ref_104m, &ref_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(ref_52m, &ref_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(ref_13m, &ref_52m.clk, 13 * CLOCK_1M, 4);
+DECLARE_REF_CLK(var_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(var_104m, &var_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(var_52m, &var_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(var_13m, &var_52m.clk, 13 * CLOCK_1M, 4);
+
+struct refclk_lkup {
+ struct refclk *procclk;
+ const char *name;
+};
+
+/* Lookup table for string to clk tranlation */
+#define MKSTR(x) {&x, #x}
+static struct refclk_lkup refclk_str_tbl[] = {
+ MKSTR(ref_crystal), MKSTR(var_96m), MKSTR(ref_96m),
+ MKSTR(ref_312m), MKSTR(ref_104m), MKSTR(ref_52m),
+ MKSTR(ref_13m), MKSTR(var_312m), MKSTR(var_104m),
+ MKSTR(var_52m), MKSTR(var_13m),
+};
+
+int refclk_entries = sizeof(refclk_str_tbl)/sizeof(refclk_str_tbl[0]);
+
+/* convert ref clock string to clock structure pointer */
+struct refclk *refclk_str_to_clk(const char *name)
+{
+ int i;
+ struct refclk_lkup *tblp = refclk_str_tbl;
+ for (i = 0; i < refclk_entries; i++, tblp++) {
+ if (!(strcmp(name, tblp->name)))
+ return tblp->procclk;
+ }
+ return NULL;
+}
+
+/* frequency tables indexed by freq_id */
+unsigned long master_axi_freq_tbl[8] = {
+ 26 * CLOCK_1M,
+ 52 * CLOCK_1M,
+ 104 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 208 * CLOCK_1M,
+ 312 * CLOCK_1M,
+ 312 * CLOCK_1M
+};
+
+
[U-Boot] [PATCH v2 1/6] arch: kona: Initial commit of kona-common architecture code
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/Makefile|1 +
arch/arm/cpu/armv7/kona-common/Makefile|9
arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 +
arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 +
arch/arm/cpu/armv7/kona-common/s_init.c| 12 ++
arch/arm/include/asm/kona-common/clk.h | 29
arch/arm/include/asm/kona-common/kona_sdhci.h | 12 ++
7 files changed, 100 insertions(+)
create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile
create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c
create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c
create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c
create mode 100644 arch/arm/include/asm/kona-common/clk.h
create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0467d00..119ebb3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -23,6 +23,7 @@ obj-y += nonsec_virt.o
obj-y += virt-v7.o
endif
+obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
obj-$(CONFIG_TEGRA) += tegra-common/
diff --git a/arch/arm/cpu/armv7/kona-common/Makefile
b/arch/arm/cpu/armv7/kona-common/Makefile
new file mode 100644
index 000..8af6f2c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += s_init.o
+obj-y += hwinit-common.o
+obj-y += clk-stubs.o
diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c
b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
new file mode 100644
index 000..824d597
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+
+/*
+ * These weak functions are available to kona architectures that don't
+ * require clock enables from the driver code.
+ */
+int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
+
+int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
new file mode 100644
index 000..eb046a5
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/kona-common/s_init.c
b/arch/arm/cpu/armv7/kona-common/s_init.c
new file mode 100644
index 000..510896c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/s_init.c
@@ -0,0 +1,12 @@
+/*
+ * System init
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Early system init. Currently empty.
+ */
+void s_init(void)
+{
+}
diff --git a/arch/arm/include/asm/kona-common/clk.h
b/arch/arm/include/asm/kona-common/clk.h
new file mode 100644
index 000..52031d3
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/clk.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* This API file is loosely based on u-boot/drivers/video/ipu.h and linux */
+
+#ifndef __KONA_COMMON_CLK_H
+#define __KONA_COMMON_CLK_H
+
+#include
+
+struct clk;
+
+/* Only implement required functions for your specific architecture */
+int clk_init(void);
+struct clk *clk_get(const char *id);
+int clk_enable(struct clk *clk);
+void clk_disable(struct clk *clk);
+unsigned long clk_get_rate(struct clk *clk);
+long clk_round_rate(struct clk *clk, unsigned long rate);
+int clk_set_rate(struct clk *clk, unsigned long rate);
+int clk_set_parent(struct clk *clk, struct clk *parent);
+struct clk *clk_get_parent(struct clk *clk);
+int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep);
+int clk_bsc_enable(void *base);
+
+#endif
diff --git a/arch/arm/include/asm/kona-common/kona_sdhci.h
b/arch/arm/include/asm/kona-common/kona_sdhci.h
new file mode 100644
index 000..03f04dd
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/kona_sdhci.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __KONA_SDHCI_H
+#define __KONA_SDHCI_H
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks);
+
+#endif
--
1.
Re: [U-Boot] [PATCH v1 0/6] Introducing the Broadcom bcm281xx Architecture
Sorry folks, I missed my morning caffeine and mislabeled the patch version in the subject as v1. I will be resending the series with the proper v2 versioning asap to avoid confusion. Regards, Darwin > -Original Message- > From: Darwin Rambo [mailto:dra...@broadcom.com] > Sent: Monday, February 03, 2014 1:03 PM > To: u-boot@lists.denx.de > Cc: Darwin Rambo > Subject: [PATCH v1 0/6] Introducing the Broadcom bcm281xx Architecture > > This patchset introduces the Broadcom bcm281xx family of mobile SoC > chips. Broadcom kona hardware blocks are often found in Broadcom mobile > SoC chips including the bcm281xx family, so support for some of these > kona blocks is also provided here. These patches work on u-boot master > as well as the u-boot-arm custodian tree. > > v1 changes > -- > Delete lowlevel_init.S and create s_init.c. File header cleanup, > cosmetic changes, dead code removal. Create include/bitfield.h. > Use get_ram_size(). Use weak timer_init(); Skip lowlevel init. > Remove memory test config. Use standard baud table and prompt. > > > Darwin Rambo (6): > arch: kona: Initial commit of kona-common architecture code > arch: bcm281xx: Initial commit of bcm281xx architecture code > gpio: kona: Add Kona gpio driver > i2c: kona: Add Kona I2C driver > mmc: kona: Add Kona mmc driver > board: bcm28155_ap: Add board files > > arch/arm/cpu/armv7/Makefile|1 + > arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + > arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 > + > arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 ++ > arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 + > arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 > arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 +++ > arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + > arch/arm/cpu/armv7/kona-common/Makefile|9 + > arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 + > arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 + > arch/arm/cpu/armv7/kona-common/s_init.c| 12 + > arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 + > arch/arm/include/asm/arch-bcm281xx/sysmap.h| 25 + > arch/arm/include/asm/kona-common/clk.h | 29 + > arch/arm/include/asm/kona-common/kona_sdhci.h | 12 + > board/broadcom/bcm28155_ap/Makefile|7 + > board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++ > boards.cfg |1 + > drivers/gpio/Makefile |1 + > drivers/gpio/kona_gpio.c | 141 + > drivers/i2c/Makefile |1 + > drivers/i2c/kona_i2c.c | 730 > > drivers/mmc/Makefile |1 + > drivers/mmc/kona_sdhci.c | 125 > include/bitfield.h | 56 ++ > include/configs/bcm28155_ap.h | 140 + > 27 files changed, 3124 insertions(+) > create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h > create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c > create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c > create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile > create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c > create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c > create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c > create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h > create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h > create mode 100644 arch/arm/include/asm/kona-common/clk.h > create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h > create mode 100644 board/broadcom/bcm28155_ap/Makefile > create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c > create mode 100644 drivers/gpio/kona_gpio.c > create mode 100644 drivers/i2c/kona_i2c.c > create mode 100644 drivers/mmc/kona_sdhci.c > create mode 100644 include/bitfield.h > create mode 100644 include/configs/bcm28155_ap.h > > -- > 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v1 6/6] board: bcm28155_ap: Add board files
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
board/broadcom/bcm28155_ap/Makefile |7 ++
board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++
boards.cfg |1 +
include/configs/bcm28155_ap.h| 140 ++
4 files changed, 235 insertions(+)
create mode 100644 board/broadcom/bcm28155_ap/Makefile
create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c
create mode 100644 include/configs/bcm28155_ap.h
diff --git a/board/broadcom/bcm28155_ap/Makefile
b/board/broadcom/bcm28155_ap/Makefile
new file mode 100644
index 000..b6159dc
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += $(BOARD).o
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c
b/board/broadcom/bcm28155_ap/bcm28155_ap.c
new file mode 100644
index 000..814e6b4
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SECWATCHDOG_SDOGCR_OFFSET 0x
+#define SECWATCHDOG_SDOGCR_EN_SHIFT27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT0
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+ printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ clk_init();
+
+ return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ */
+int misc_init_r(void)
+{
+ /* Disable watchdog reset - watchdog unused */
+ writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
+ (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
+ (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
+ (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
+ (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
+
+ return 0;
+}
+
+/*
+ * dram_init - sets uboots idea of sdram size
+ */
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+ return 0;
+}
+
+/* This is called after dram_init() so use get_ram_size result */
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = gd->ram_size;
+}
+
+#ifdef CONFIG_KONA_SDHCI
+/*
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ /* Register eMMC - SDIO2 */
+ ret = kona_sdhci_init(1, 40, 0);
+ if (ret)
+ return ret;
+
+ /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+ ret = kona_sdhci_init(3, 40, 0);
+ return ret;
+}
+#endif
diff --git a/boards.cfg b/boards.cfg
index 2dfd2b4..e4ab8ac 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -272,6 +272,7 @@ Active arm armv7 am33xx ti
ti816x
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH
Bo Shen
+Active arm armv7 bcm281xxbroadcombcm28155_ap
bcm28155_ap bcm28155_ap
Tim Kryger
Active arm armv7 exynos samsung arndale
arndale -
Inderpal Singh
Active arm armv7 exynos samsung origen
origen -
[U-Boot] [PATCH v1 5/6] mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/mmc/Makefile |1 +
drivers/mmc/kona_sdhci.c | 125 ++
2 files changed, 126 insertions(+)
create mode 100644 drivers/mmc/kona_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e793ed9..931922b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SDHCI) += sdhci.o
obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
+obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
new file mode 100644
index 000..69e6f17
--- /dev/null
+++ b/drivers/mmc/kona_sdhci.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#define SDHCI_CORECTRL_OFFSET 0x8000
+#define SDHCI_CORECTRL_EN 0x01
+#define SDHCI_CORECTRL_RESET 0x02
+
+#define SDHCI_CORESTAT_OFFSET 0x8004
+#define SDHCI_CORESTAT_CD_SW 0x01
+
+#define SDHCI_COREIMR_OFFSET 0x8008
+#define SDHCI_COREIMR_IP 0x01
+
+static int init_mmc_core(struct sdhci_host *host)
+{
+ unsigned int mask;
+ unsigned int timeout;
+
+ if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
+ printf("%s: sd host controller reset error\n", __func__);
+ return 1;
+ }
+
+ /* For kona a hardware reset before anything else. */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ do {
+ if (timeout == 0) {
+ printf("%s: reset timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ } while (0 ==
+(sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
+ SDHCI_CORECTRL_RESET));
+
+ /* Clear the reset bit. */
+ mask = mask & ~SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+ udelay(10);
+
+ /* Enable AHB clock */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable interrupts */
+ sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
+
+ /* Make sure Card is detected in controller */
+ mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
+
+ return 0;
+}
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
+{
+ int ret = 0;
+ u32 max_clk;
+ void *reg_base;
+ struct sdhci_host *host = NULL;
+
+ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!host) {
+ printf("%s: sdhci host malloc fail!\n", __func__);
+ return -ENOMEM;
+ }
+ switch (dev_index) {
+ case 0:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE0;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK,
+ &max_clk);
+ break;
+ case 1:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE1;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK,
+ &max_clk);
+ break;
+ case 2:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE2;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK,
+ &max_clk);
+ break;
+ case 3:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE3;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK,
+ &max_clk);
+ break;
+ default:
+ printf("%s: sdio dev index %d not supported\n",
+ __func__, dev_index);
+ ret = -EINVAL;
+ }
+ if (ret)
+ return ret;
+
+ host->name = "kona-sdhci";
+ host->ioaddr = reg_base;
+ host->quirks = quirks;
+ host->host_caps = MMC_MODE_HC;
+
+ if (init_mmc_core(host))
+ return -EINVAL;
+
+ if (quirks & SDHCI_QUIRK_REG32_RW)
+ host->version = sdhci_readl(host, SDHCI_HOST_VERS
[U-Boot] [PATCH v1 4/6] i2c: kona: Add Kona I2C driver
Add support for the Kona I2C controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/i2c/Makefile |1 +
drivers/i2c/kona_i2c.c | 730
2 files changed, 731 insertions(+)
create mode 100644 drivers/i2c/kona_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index fa3a875..36d5e5f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
new file mode 100644
index 000..9f18b74
--- /dev/null
+++ b/drivers/i2c/kona_i2c.c
@@ -0,0 +1,730 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Hardware register offsets and field defintions */
+#define CS_OFFSET 0x0020
+#define CS_ACK_SHIFT 3
+#define CS_ACK_MASK0x0008
+#define CS_ACK_CMD_GEN_START 0x
+#define CS_ACK_CMD_GEN_RESTART 0x0001
+#define CS_CMD_SHIFT 1
+#define CS_CMD_CMD_NO_ACTION 0x
+#define CS_CMD_CMD_START_RESTART 0x0001
+#define CS_CMD_CMD_STOP0x0002
+#define CS_EN_SHIFT0
+#define CS_EN_CMD_ENABLE_BSC 0x0001
+
+#define TIM_OFFSET 0x0024
+#define TIM_PRESCALE_SHIFT 6
+#define TIM_P_SHIFT3
+#define TIM_NO_DIV_SHIFT 2
+#define TIM_DIV_SHIFT 0
+
+#define DAT_OFFSET 0x0028
+
+#define TOUT_OFFSET0x002c
+
+#define TXFCR_OFFSET 0x003c
+#define TXFCR_FIFO_FLUSH_MASK 0x0080
+#define TXFCR_FIFO_EN_MASK 0x0040
+
+#define IER_OFFSET 0x0044
+#define IER_READ_COMPLETE_INT_MASK 0x0010
+#define IER_I2C_INT_EN_MASK0x0008
+#define IER_FIFO_INT_EN_MASK 0x0002
+#define IER_NOACK_EN_MASK 0x0001
+
+#define ISR_OFFSET 0x0048
+#define ISR_RESERVED_MASK 0xff60
+#define ISR_CMDBUSY_MASK 0x0080
+#define ISR_READ_COMPLETE_MASK 0x0010
+#define ISR_SES_DONE_MASK 0x0008
+#define ISR_ERR_MASK 0x0004
+#define ISR_TXFIFOEMPTY_MASK 0x0002
+#define ISR_NOACK_MASK 0x0001
+
+#define CLKEN_OFFSET 0x004c
+#define CLKEN_AUTOSENSE_OFF_MASK 0x0080
+#define CLKEN_M_SHIFT 4
+#define CLKEN_N_SHIFT 1
+#define CLKEN_CLKEN_MASK 0x0001
+
+#define FIFO_STATUS_OFFSET 0x0054
+#define FIFO_STATUS_RXFIFO_EMPTY_MASK 0x0004
+#define FIFO_STATUS_TXFIFO_EMPTY_MASK 0x0010
+
+#define HSTIM_OFFSET 0x0058
+#define HSTIM_HS_MODE_MASK 0x8000
+#define HSTIM_HS_HOLD_SHIFT10
+#define HSTIM_HS_HIGH_PHASE_SHIFT 5
+#define HSTIM_HS_SETUP_SHIFT 0
+
+#define PADCTL_OFFSET 0x005c
+#define PADCTL_PAD_OUT_EN_MASK 0x0004
+
+#define RXFCR_OFFSET 0x0068
+#define RXFCR_NACK_EN_SHIFT7
+#define RXFCR_READ_COUNT_SHIFT 0
+#define RXFIFORDOUT_OFFSET 0x006c
+
+/* Locally used constants */
+#define MAX_RX_FIFO_SIZE 64U /* bytes */
+#define MAX_TX_FIFO_SIZE 64U /* bytes */
+
+#define I2C_TIMEOUT10 /* usecs */
+
+#define WAIT_INT_CHK 100 /* usecs */
+#if I2C_TIMEOUT % WAIT_INT_CHK
+#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK
+#endif
+
+/* Operations that can be commanded to the controller */
+enum bcm_kona_cmd_t {
+ BCM_CMD_NOACTION = 0,
+ BCM_CMD_START,
+ BCM_CMD_RESTART,
+ BCM_CMD_STOP,
+};
+
+enum bus_speed_index {
+ BCM_SPD_100K = 0,
+ BCM_SPD_400K,
+ BCM_SPD_1MHZ,
+};
+
+/* Internal divider settings for
[U-Boot] [PATCH v1 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/bcm281xx/Makefile| 11 +
arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 +++
arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 +++
arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 ++
arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 +
arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73
arch/arm/cpu/armv7/bcm281xx/reset.c | 27 ++
arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 +
arch/arm/include/asm/arch-bcm281xx/sysmap.h | 25 ++
include/bitfield.h | 56 +++
10 files changed, 1790 insertions(+)
create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c
create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h
create mode 100644 include/bitfield.h
diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile
b/arch/arm/cpu/armv7/bcm281xx/Makefile
new file mode 100644
index 000..46c4943
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/Makefile
@@ -0,0 +1,11 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += reset.o
+obj-y += clk-core.o
+obj-y += clk-bcm281xx.o
+obj-y += clk-sdio.o
+obj-y += clk-bsc.o
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
new file mode 100644
index 000..58cff55
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -0,0 +1,523 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/*
+ *
+ * bcm281xx-specific clock tables
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include "clk-core.h"
+
+#define CLOCK_1K 1000
+#define CLOCK_1M (CLOCK_1K * 1000)
+
+/* declare a reference clock */
+#define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \
+static struct refclk clk_name = { \
+ .clk= { \
+ .name = #clk_name, \
+ .parent = clk_parent, \
+ .rate = clk_rate, \
+ .div= clk_div, \
+ .ops= &ref_clk_ops, \
+ }, \
+}
+
+/*
+ * Reference clocks
+ */
+
+/* Declare a list of reference clocks */
+DECLARE_REF_CLK(ref_crystal, 0, 26 * CLOCK_1M, 1);
+DECLARE_REF_CLK(var_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(ref_104m, &ref_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(ref_52m, &ref_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(ref_13m, &ref_52m.clk, 13 * CLOCK_1M, 4);
+DECLARE_REF_CLK(var_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(var_104m, &var_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(var_52m, &var_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(var_13m, &var_52m.clk, 13 * CLOCK_1M, 4);
+
+struct refclk_lkup {
+ struct refclk *procclk;
+ const char *name;
+};
+
+/* Lookup table for string to clk tranlation */
+#define MKSTR(x) {&x, #x}
+static struct refclk_lkup refclk_str_tbl[] = {
+ MKSTR(ref_crystal), MKSTR(var_96m), MKSTR(ref_96m),
+ MKSTR(ref_312m), MKSTR(ref_104m), MKSTR(ref_52m),
+ MKSTR(ref_13m), MKSTR(var_312m), MKSTR(var_104m),
+ MKSTR(var_52m), MKSTR(var_13m),
+};
+
+int refclk_entries = sizeof(refclk_str_tbl)/sizeof(refclk_str_tbl[0]);
+
+/* convert ref clock string to clock structure pointer */
+struct refclk *refclk_str_to_clk(const char *name)
+{
+ int i;
+ struct refclk_lkup *tblp = refclk_str_tbl;
+ for (i = 0; i < refclk_entries; i++, tblp++) {
+ if (!(strcmp(name, tblp->name)))
+ return tblp->procclk;
+ }
+ return NULL;
+}
+
+/* frequency tables indexed by freq_id */
+unsigned long master_axi_freq_tbl[8] = {
+ 26 * CLOCK_1M,
+ 52 * CLOCK_1M,
+ 104 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 156 * CLOCK_1M,
+ 208 * CLOCK_1M,
+ 312 * CLOCK_1M,
+ 312 * CLOCK_1M
+};
+
+
[U-Boot] [PATCH v1 3/6] gpio: kona: Add Kona gpio driver
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Markus Mayer
Reviewed-by: Tim Kryger
---
drivers/gpio/Makefile|1 +
drivers/gpio/kona_gpio.c | 141 ++
2 files changed, 142 insertions(+)
create mode 100644 drivers/gpio/kona_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b903c45..ed2c0c7 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
+obj-$(CONFIG_KONA_GPIO)+= kona_gpio.o
obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
obj-$(CONFIG_MARVELL_MFP) += mvmfp.o
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c
new file mode 100644
index 000..ce0e499
--- /dev/null
+++ b/drivers/gpio/kona_gpio.c
@@ -0,0 +1,141 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+#include
+
+#define GPIO_BASE (void *)GPIO2_BASE_ADDR
+
+#define GPIO_PASSWD0x00a5a501
+#define GPIO_PER_BANK 32
+#define GPIO_MAX_BANK_NUM 8
+
+#define GPIO_BANK(gpio)((gpio) >> 5)
+#define GPIO_BITMASK(gpio) \
+ (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
+
+#define GPIO_OUT_STATUS(bank) (0x + ((bank) << 2))
+#define GPIO_IN_STATUS(bank) (0x0020 + ((bank) << 2))
+#define GPIO_OUT_SET(bank) (0x0040 + ((bank) << 2))
+#define GPIO_OUT_CLEAR(bank) (0x0060 + ((bank) << 2))
+#define GPIO_INT_STATUS(bank) (0x0080 + ((bank) << 2))
+#define GPIO_INT_MASK(bank)(0x00a0 + ((bank) << 2))
+#define GPIO_INT_MSKCLR(bank) (0x00c0 + ((bank) << 2))
+#define GPIO_CONTROL(bank) (0x0100 + ((bank) << 2))
+#define GPIO_PWD_STATUS(bank) (0x0500 + ((bank) << 2))
+
+#define GPIO_GPPWR_OFFSET 0x0520
+
+#define GPIO_GPCTR0_DBR_SHIFT 5
+#define GPIO_GPCTR0_DBR_MASK 0x01e0
+
+#define GPIO_GPCTR0_ITR_SHIFT 3
+#define GPIO_GPCTR0_ITR_MASK 0x0018
+#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE0x0001
+#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x0002
+#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x0003
+
+#define GPIO_GPCTR0_IOTR_MASK 0x0001
+#define GPIO_GPCTR0_IOTR_CMD_0UTPUT0x
+#define GPIO_GPCTR0_IOTR_CMD_INPUT 0x0001
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ u32 val;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+ off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
+
+ val = readl(GPIO_BASE + off);
+ val |= bitmask;
+ writel(val, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ /* determine the GPIO pin direction */
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= GPIO_GPCTR0_IOTR_MASK;
+
+ /* read the GPIO bank status */
+ off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
+ GPIO_IN_STATUS(bank_id) : GPIO_OUT_STATUS(bank_id);
+ val = readl(GPIO_BASE + off);
+
+ /* return the specified bit status */
+ return
[U-Boot] [PATCH v1 1/6] arch: kona: Initial commit of kona-common architecture code
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/Makefile|1 +
arch/arm/cpu/armv7/kona-common/Makefile|9
arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 +
arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 +
arch/arm/cpu/armv7/kona-common/s_init.c| 12 ++
arch/arm/include/asm/kona-common/clk.h | 29
arch/arm/include/asm/kona-common/kona_sdhci.h | 12 ++
7 files changed, 100 insertions(+)
create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile
create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c
create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c
create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c
create mode 100644 arch/arm/include/asm/kona-common/clk.h
create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0467d00..119ebb3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -23,6 +23,7 @@ obj-y += nonsec_virt.o
obj-y += virt-v7.o
endif
+obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
obj-$(CONFIG_TEGRA) += tegra-common/
diff --git a/arch/arm/cpu/armv7/kona-common/Makefile
b/arch/arm/cpu/armv7/kona-common/Makefile
new file mode 100644
index 000..8af6f2c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/Makefile
@@ -0,0 +1,9 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += s_init.o
+obj-y += hwinit-common.o
+obj-y += clk-stubs.o
diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c
b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
new file mode 100644
index 000..824d597
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+
+/*
+ * These weak functions are available to kona architectures that don't
+ * require clock enables from the driver code.
+ */
+int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
+
+int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
new file mode 100644
index 000..eb046a5
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include
+#include
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/kona-common/s_init.c
b/arch/arm/cpu/armv7/kona-common/s_init.c
new file mode 100644
index 000..510896c
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/s_init.c
@@ -0,0 +1,12 @@
+/*
+ * System init
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Early system init. Currently empty.
+ */
+void s_init(void)
+{
+}
diff --git a/arch/arm/include/asm/kona-common/clk.h
b/arch/arm/include/asm/kona-common/clk.h
new file mode 100644
index 000..52031d3
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/clk.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+/* This API file is loosely based on u-boot/drivers/video/ipu.h and linux */
+
+#ifndef __KONA_COMMON_CLK_H
+#define __KONA_COMMON_CLK_H
+
+#include
+
+struct clk;
+
+/* Only implement required functions for your specific architecture */
+int clk_init(void);
+struct clk *clk_get(const char *id);
+int clk_enable(struct clk *clk);
+void clk_disable(struct clk *clk);
+unsigned long clk_get_rate(struct clk *clk);
+long clk_round_rate(struct clk *clk, unsigned long rate);
+int clk_set_rate(struct clk *clk, unsigned long rate);
+int clk_set_parent(struct clk *clk, struct clk *parent);
+struct clk *clk_get_parent(struct clk *clk);
+int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep);
+int clk_bsc_enable(void *base);
+
+#endif
diff --git a/arch/arm/include/asm/kona-common/kona_sdhci.h
b/arch/arm/include/asm/kona-common/kona_sdhci.h
new file mode 100644
index 000..03f04dd
--- /dev/null
+++ b/arch/arm/include/asm/kona-common/kona_sdhci.h
@@ -0,0 +1,12 @@
+/*
+ * Copyright 2013 Broadcom Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __KONA_SDHCI_H
+#define __KONA_SDHCI_H
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks);
+
+#endif
--
1.
[U-Boot] [PATCH v1 0/6] Introducing the Broadcom bcm281xx Architecture
This patchset introduces the Broadcom bcm281xx family of mobile SoC chips. Broadcom kona hardware blocks are often found in Broadcom mobile SoC chips including the bcm281xx family, so support for some of these kona blocks is also provided here. These patches work on u-boot master as well as the u-boot-arm custodian tree. v1 changes -- Delete lowlevel_init.S and create s_init.c. File header cleanup, cosmetic changes, dead code removal. Create include/bitfield.h. Use get_ram_size(). Use weak timer_init(); Skip lowlevel init. Remove memory test config. Use standard baud table and prompt. Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files arch/arm/cpu/armv7/Makefile|1 + arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 523 + arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 52 ++ arch/arm/cpu/armv7/bcm281xx/clk-core.c | 513 + arch/arm/cpu/armv7/bcm281xx/clk-core.h | 495 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 73 +++ arch/arm/cpu/armv7/bcm281xx/reset.c| 27 + arch/arm/cpu/armv7/kona-common/Makefile|9 + arch/arm/cpu/armv7/kona-common/clk-stubs.c | 21 + arch/arm/cpu/armv7/kona-common/hwinit-common.c | 16 + arch/arm/cpu/armv7/kona-common/s_init.c| 12 + arch/arm/include/asm/arch-bcm281xx/gpio.h | 15 + arch/arm/include/asm/arch-bcm281xx/sysmap.h| 25 + arch/arm/include/asm/kona-common/clk.h | 29 + arch/arm/include/asm/kona-common/kona_sdhci.h | 12 + board/broadcom/bcm28155_ap/Makefile|7 + board/broadcom/bcm28155_ap/bcm28155_ap.c | 87 +++ boards.cfg |1 + drivers/gpio/Makefile |1 + drivers/gpio/kona_gpio.c | 141 + drivers/i2c/Makefile |1 + drivers/i2c/kona_i2c.c | 730 drivers/mmc/Makefile |1 + drivers/mmc/kona_sdhci.c | 125 include/bitfield.h | 56 ++ include/configs/bcm28155_ap.h | 140 + 27 files changed, 3124 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c create mode 100644 arch/arm/cpu/armv7/kona-common/s_init.c create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h create mode 100644 arch/arm/include/asm/kona-common/clk.h create mode 100644 arch/arm/include/asm/kona-common/kona_sdhci.h create mode 100644 board/broadcom/bcm28155_ap/Makefile create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c create mode 100644 drivers/gpio/kona_gpio.c create mode 100644 drivers/i2c/kona_i2c.c create mode 100644 drivers/mmc/kona_sdhci.c create mode 100644 include/bitfield.h create mode 100644 include/configs/bcm28155_ap.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
On 14-01-31 09:54 AM, Tom Rini wrote:
> On Thu, Jan 30, 2014 at 02:03:41PM -0800, Darwin Rambo wrote:
>>
>>
>> On 14-01-29 02:32 PM, Tom Rini wrote:
>>> On Mon, Jan 27, 2014 at 10:53:26AM -0800, Darwin Rambo wrote:
>>>
>>>> Add bcm281xx architecture support code including a clock framework and
>>>> chip reset. Define register block base addresses for the bcm281xx
>>>> architecture and create an empty gpio header file required when
>>>> CONFIG_CMD_GPIO is set.
>>> [snip]
>>>> +/* Bitfield operations */
>>>> +
>>>> +/* Produces a mask of set bits covering a range of a 32-bit value */
>>>> +static inline u32 bitfield_mask(u32 shift, u32 width)
>>>> +{
>>>> + return ((1 << width) - 1) << shift;
>>>> +}
>>>> +
>>>> +/* Extract the value of a bitfield found within a given register value */
>>>> +static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width)
>>>> +{
>>>> + return (reg_val & bitfield_mask(shift, width)) >> shift;
>>>> +}
>>>> +
>>>> +/* Replace the value of a bitfield found within a given register value */
>>>> +static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32
>>>> val)
>>>> +{
>>>> + u32 mask = bitfield_mask(shift, width);
>>>> +
>>>> + return (reg_val & ~mask) | (val << shift);
>>>> +}
>>>
>>> This all feels horribly generic, isn't there some linux header we've
>>> already got that I can't think off of the top of my head that gives us
>>> these kind of functions?
>> Hi Tom,
>>
>> I had a similar feeling. There are files such as include/linux/bitops.h
>> and arch/arm/include/asm/bitops.h and a host of others, but these seem
>> single bit oriented, and don't provide the functionality here. The
>> bcm281xx clock registers are a myriad of bit fields of different widths
>> and positions, and the driver code is simpler because it uses these
>> generic bitfield functions and data tables to describe the bitfields.
>> Perhaps the bcm281xx clock register hardware has revealed the need for
>> more functions like this now. I've searched through the tree for
>> equivalent functions and they don't seem to exist, but I could be wrong.
>> We could create include/bitfield.h with functions specifically for
>> bitfield operations if it were warranted. But if it only ever got used
>> by one driver, it might be wrong to make it generic. But my gut feel is
>> that if we did create include/bitfield.h it probably would be used by
>> others who wanted to take a similar data-driven approach to register
>> fields. We would also have to make it non-u32 specific I imagine,
>> possibly just 'int' types. Thanks.
>
> With Matt chiming in on where this is within the kernel, lets go with
> creating a include/bitfield.h here. Thanks!
Will implement this and will try to remove the u32's everywhere. Thanks.
>
___
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Re: [U-Boot] [PATCH 6/6] board: bcm28155_ap: Add board files
On 14-01-31 09:15 AM, Tom Rini wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA1 > > On 01/31/2014 12:05 PM, Tim Kryger wrote: >> On Fri, Jan 31, 2014 at 6:17 AM, Tom Rini wrote: >>> On 01/30/2014 06:05 PM, Darwin Rambo wrote: >>>> We tried using this on our reference board and it hangs accessing >>>> memory regions that are not populated. Our memory controller >>>> doesn't appear to properly support accessing regions that are not >>>> backed by physical sdram. So I think it's best to keep this code as >>>> is and consider this approach for future designs. >>> >>> Wait, what did you do? get_ram_size(base, max) must work and return >>> CONFIG_SYS_SDRAM_SIZE, or you haven't properly configured your >>> controller (as get_ram_size just pokes parts of the specified range). >> >> Tom, >> >> In my experience, there are three general ways memory controllers >> behave when an access is made to an address that could be backed by >> RAM but isn't on a particular board. >> >> 1. All reads return a fixed pattern and writes are ignored >> 2. A bus error is triggered that the CPU sees as a data abort >> 3. No response to the transaction so the bus and CPU lock up >> >> I believe the Broadcom memory controller can only behave in the third, >> least desirable way. > > That's fine. You should still use get_ram_size(base, > CONFIG_SYS_SDRAM_SIZE) like other platforms use as this go above the max > size it's given. If this hangs, you have a problem with your > configuration of the memory controller. Make sense? Yes. We have tested that this works and will implement this way. Thanks. > > - -- > Tom > -BEGIN PGP SIGNATURE- > Version: GnuPG v1.4.11 (GNU/Linux) > Comment: Using GnuPG with Thunderbird - http://www.enigmail.net/ > > iQIcBAEBAgAGBQJS69oUAAoJENk4IS6UOR1Wf/AP/2ApLwjAffxJ7LmEFFEK7hlr > +dq1FW9ZRppfLRbfUrZz8Q/muyrx1ZuF9pIjjrFxLkNSLS3t8LZrJmfeswePqGC+ > dq6qLl+ovk0VNYsxEhS77j1QQ/LLri67QCiGEZuS8vDB7qxiyuuCXkzyyW8hRFZ7 > yfKpbfdRYpzWTJhAYnB0b1OaBi1jamsnjhXNU5XNa/H3PfDDofNA2fFQQfKbleOH > BVOka1LP/+28gqKksEziM9cbcjPYJdE/FfY75nkbqKl9PWl+qIUZli90QO3Qdbgy > uJJB1d3v6amfHZYbJymR3r8FoRjjCKxnCza5rCLpwFLxAKCUIIGHBFUGpvdcFoVa > YctuEu2Dx2SgQ9dEGbLT1d2bsbfxOATEr5CyCpD7vD/9e/Ze7XaXALVKocfQmDbs > 77s0YvHuXLGQPudPzYrEqPvgxf/NlNjeLj5IWqF++AE3j5U1sE26x95qk8jobMSn > KjYGwzsxnd/gErqiYBawkrHxS2f4beAucsoprCh0WmSXiqSh6Wzc/+XlAIVSV7vm > UE969gAzP1F2j37QfWR2/B0ILP27Pk3Ano8Dj2MIVKCAVkkpSQ5SCqAA7wvMzHej > 801O52kArhG3/G/WrAbeLoQxKsdUyNI92+T0UaquTI4hRZk5GSvHQNCaZAcx6fCa > hZ1o6zG9nMsp/yzVe7VZ > =0yIj > -END PGP SIGNATURE- > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] Introducing the Broadcom bcm281xx Architecture
On 14-01-29 02:32 PM, Tom Rini wrote: > On Mon, Jan 27, 2014 at 10:53:24AM -0800, Darwin Rambo wrote: > >> This patchset introduces the Broadcom bcm281xx family of mobile SoC >> chips. Broadcom kona hardware blocks are often found in Broadcom mobile >> SoC chips including the bcm281xx family, so support for some of these >> kona blocks is also provided here. These patches work on u-boot master >> as well as the u-boot-arm custodian tree. >> >> Darwin Rambo (6): >> arch: kona: Initial commit of kona-common architecture code >> arch: bcm281xx: Initial commit of bcm281xx architecture code >> gpio: kona: Add Kona gpio driver >> i2c: kona: Add Kona I2C driver >> mmc: kona: Add Kona mmc driver >> board: bcm28155_ap: Add board files > > Thanks for posting. Globally, please don't introduce another style for > the file header, > /* > * This works > * just fine. > * > * Including what the file is about > */ OK - legacy stuff will be fixed. > > And I also see the incorrect style sprinkled throughout. > > I saw some '#define' mixed in with '#define', and some other > things I'd have sworn checkpatch complains about, so please make sure > things are checkpatch clean (except for very long printed strings, which > are an exception to line length rules). Well, checkpatch was clean, so I think there's a problem with the tool. Another minor gripe is that checkpatch and "indent -linux" don't agree on everything, "int * foo" being one of them. :) > > Finally, please CC the custodians for i2c/mmc for those drivers as they > may have further comments than the above list. OK. There are mmc, i2c and gpio drivers. I assume each driver gets a different CC:? > > Thanks! > Thanks to you too! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/6] arch: kona: Initial commit of kona-common architecture code
On 14-01-29 02:32 PM, Tom Rini wrote:
> On Mon, Jan 27, 2014 at 10:53:25AM -0800, Darwin Rambo wrote:
>
>> The Kona architecture is present on a number of Broadcom mobile SoCs
>> including the bcm281xx family of chips.
> [snip]
>> +int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
>> +{
>> +return 0;
>> +}
>> +int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)
>> +{
>> +return 0;
>> +}
>
> Blank lines between functions please.
OK
>
>> diff --git a/arch/arm/cpu/armv7/kona-common/lowlevel_init.S
>> b/arch/arm/cpu/armv7/kona-common/lowlevel_init.S
>> new file mode 100644
>> index 000..a03afcc
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/kona-common/lowlevel_init.S
>> @@ -0,0 +1,15 @@
>> +/*
>> +*
>> +* Copyright 2013 Broadcom Corporation. All rights reserved.
>> +*
>> +* SPDX-License-Identifier: GPL-2.0+
>> +*
>> +*/
>> +
>> +//#include
>> +//#include
>> +//#include
>> +
>> +.globl lowlevel_init
>> +lowlevel_init:
>> +mov pc, lr
>
> (a) no commented out include lines
OK
> (b) This is empty, which seems wrong. I strongly suspect you want to
> make use of arch/arm/cpu/armv7/lowlevel_init.S and have an s_init
> function, ala omap*/tegra/rmobile/etc.
Will check this out. Thanks.
>
>> diff --git a/arch/arm/cpu/armv7/kona-common/proc.c
>> b/arch/arm/cpu/armv7/kona-common/proc.c
>> new file mode 100644
>> index 000..92fb39b
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/kona-common/proc.c
>> @@ -0,0 +1,20 @@
>> +/*
>> +*
>> +* Copyright 2013 Broadcom Corporation. All rights reserved.
>> +*
>> +* SPDX-License-Identifier: GPL-2.0+
>> +*
>> +*/
>> +
>> +#include
>> +#include
>> +#include
>> +#include
>> +
>> +void do_proc_wfe(int forever)
>> +{
>> +do {
>> +asm volatile ("wfe @ wait for event\n");
>> +/*printf("wake up from wfe\n"); */
>
> No commented out printf, thanks.
>
OK
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Re: [U-Boot] [PATCH 6/6] board: bcm28155_ap: Add board files
On 14-01-29 02:33 PM, Tom Rini wrote:
> On Mon, Jan 27, 2014 at 10:53:30AM -0800, Darwin Rambo wrote:
>
>> Add support for the bcm28155_ap reference board.
>>
>> Signed-off-by: Darwin Rambo
>> Reviewed-by: Steve Rae
>> Reviewed-by: Tim Kryger
> [snip]
>> +gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
>
> Please use get_ram_size(...);
We tried using this on our reference board and it hangs accessing memory
regions that are not populated. Our memory controller doesn't appear to
properly support accessing regions that are not backed by physical
sdram. So I think it's best to keep this code as is and consider this
approach for future designs.
>
>> +/* Memory testing range */
>> +#define CONFIG_SYS_MEMTEST_STARTCONFIG_SYS_SDRAM_BASE
>> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START +
>> SZ_1M)
>
> Please see doc/README.memory-test
OK. I think I'll disable CONFIG_CMD_MEMORY and remove this stuff.
>
>> +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, \
>> +115200, 230400, 460800, 921600}
>
> Unless you really use those higher values in U-Boot, please use the
> default table.
OK
>
>> +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
>
> Unneeded now.
OK
>
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Re: [U-Boot] [PATCH 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
On 14-01-29 02:32 PM, Tom Rini wrote:
> On Mon, Jan 27, 2014 at 10:53:26AM -0800, Darwin Rambo wrote:
>
>> Add bcm281xx architecture support code including a clock framework and
>> chip reset. Define register block base addresses for the bcm281xx
>> architecture and create an empty gpio header file required when
>> CONFIG_CMD_GPIO is set.
> [snip]
>> +/* Bitfield operations */
>> +
>> +/* Produces a mask of set bits covering a range of a 32-bit value */
>> +static inline u32 bitfield_mask(u32 shift, u32 width)
>> +{
>> +return ((1 << width) - 1) << shift;
>> +}
>> +
>> +/* Extract the value of a bitfield found within a given register value */
>> +static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width)
>> +{
>> +return (reg_val & bitfield_mask(shift, width)) >> shift;
>> +}
>> +
>> +/* Replace the value of a bitfield found within a given register value */
>> +static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32
>> val)
>> +{
>> +u32 mask = bitfield_mask(shift, width);
>> +
>> +return (reg_val & ~mask) | (val << shift);
>> +}
>
> This all feels horribly generic, isn't there some linux header we've
> already got that I can't think off of the top of my head that gives us
> these kind of functions?
Hi Tom,
I had a similar feeling. There are files such as include/linux/bitops.h
and arch/arm/include/asm/bitops.h and a host of others, but these seem
single bit oriented, and don't provide the functionality here. The
bcm281xx clock registers are a myriad of bit fields of different widths
and positions, and the driver code is simpler because it uses these
generic bitfield functions and data tables to describe the bitfields.
Perhaps the bcm281xx clock register hardware has revealed the need for
more functions like this now. I've searched through the tree for
equivalent functions and they don't seem to exist, but I could be wrong.
We could create include/bitfield.h with functions specifically for
bitfield operations if it were warranted. But if it only ever got used
by one driver, it might be wrong to make it generic. But my gut feel is
that if we did create include/bitfield.h it probably would be used by
others who wanted to take a similar data-driven approach to register
fields. We would also have to make it non-u32 specific I imagine,
possibly just 'int' types. Thanks.
Darwin
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[U-Boot] [PATCH 5/6] mmc: kona: Add Kona mmc driver
Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/mmc/Makefile |1 +
drivers/mmc/kona_sdhci.c | 127 ++
2 files changed, 128 insertions(+)
create mode 100644 drivers/mmc/kona_sdhci.c
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index e793ed9..931922b 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o
obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o
obj-$(CONFIG_SDHCI) += sdhci.o
obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
+obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o
diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c
new file mode 100644
index 000..c38e18e
--- /dev/null
+++ b/drivers/mmc/kona_sdhci.c
@@ -0,0 +1,127 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+#include
+#include
+#include
+#include
+#include
+
+#define SDHCI_CORECTRL_OFFSET 0x8000
+#define SDHCI_CORECTRL_EN 0x01
+#define SDHCI_CORECTRL_RESET 0x02
+
+#define SDHCI_CORESTAT_OFFSET 0x8004
+#define SDHCI_CORESTAT_CD_SW 0x01
+
+#define SDHCI_COREIMR_OFFSET 0x8008
+#define SDHCI_COREIMR_IP 0x01
+
+static int init_mmc_core(struct sdhci_host *host)
+{
+ unsigned int mask;
+ unsigned int timeout;
+
+ if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) {
+ printf("%s: sd host controller reset error\n", __func__);
+ return 1;
+ }
+
+ /* For kona a hardware reset before anything else. */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+
+ /* Wait max 100 ms */
+ timeout = 1000;
+ do {
+ if (timeout == 0) {
+ printf("%s: reset timeout error\n", __func__);
+ return 1;
+ }
+ timeout--;
+ udelay(100);
+ } while (0 ==
+(sdhci_readl(host, SDHCI_CORECTRL_OFFSET) &
+ SDHCI_CORECTRL_RESET));
+
+ /* Clear the reset bit. */
+ mask = mask & ~SDHCI_CORECTRL_RESET;
+ sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET);
+ udelay(10);
+
+ /* Enable AHB clock */
+ mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET);
+
+ /* Enable interrupts */
+ sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET);
+
+ /* Make sure Card is detected in controller */
+ mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET);
+ sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET);
+
+ return 0;
+}
+
+int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks)
+{
+ int ret = 0;
+ u32 max_clk;
+ void *reg_base;
+ struct sdhci_host *host = NULL;
+
+ host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
+ if (!host) {
+ printf("%s: sdhci host malloc fail!\n", __func__);
+ return -ENOMEM;
+ }
+ switch (dev_index) {
+ case 0:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE0;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK,
+ &max_clk);
+ break;
+ case 1:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE1;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK,
+ &max_clk);
+ break;
+ case 2:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE2;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK,
+ &max_clk);
+ break;
+ case 3:
+ reg_base = (void *)CONFIG_SYS_SDIO_BASE3;
+ ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK,
+ &max_clk);
+ break;
+ default:
+ printf("%s: sdio dev index %d not supported\n",
+ __func__, dev_index);
+ ret = -EINVAL;
+ }
+ if (ret)
+ return ret;
+
+ host->name = "kona-sdhci";
+ host->ioaddr = reg_base;
+ host->quirks = quirks;
+ host->host_caps = MMC_MODE_HC;
+
+ if (init_m
[U-Boot] [PATCH 2/6] arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/bcm281xx/Makefile| 11 +
arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 525 ++
arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 54 +++
arch/arm/cpu/armv7/bcm281xx/clk-core.c | 536 +++
arch/arm/cpu/armv7/bcm281xx/clk-core.h | 510 +
arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 75
arch/arm/cpu/armv7/bcm281xx/reset.c | 29 ++
arch/arm/include/asm/arch-bcm281xx/gpio.h | 17 +
arch/arm/include/asm/arch-bcm281xx/sysmap.h | 27 ++
9 files changed, 1784 insertions(+)
create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h
create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c
create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c
create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h
create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h
diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile
b/arch/arm/cpu/armv7/bcm281xx/Makefile
new file mode 100644
index 000..46c4943
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/Makefile
@@ -0,0 +1,11 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += reset.o
+obj-y += clk-core.o
+obj-y += clk-bcm281xx.o
+obj-y += clk-sdio.o
+obj-y += clk-bsc.o
diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
new file mode 100644
index 000..2726cfb
--- /dev/null
+++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c
@@ -0,0 +1,525 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+/*
+*
+* bcm281xx-specific clock tables
+*
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include "clk-core.h"
+
+#defineCLOCK_1K1000
+#defineCLOCK_1M(CLOCK_1K * 1000)
+
+/* declare a reference clock */
+#define DECLARE_REF_CLK(clk_name, clk_parent, clk_rate, clk_div) \
+static struct refclk clk_name = { \
+ .clk= { \
+ .name = #clk_name, \
+ .parent = clk_parent, \
+ .rate = clk_rate, \
+ .div= clk_div, \
+ .ops= &ref_clk_ops, \
+ }, \
+}
+
+/*
+ Reference clocks
+*/
+/* Declare a list of reference clocks */
+DECLARE_REF_CLK(ref_crystal, 0, 26 * CLOCK_1M, 1);
+DECLARE_REF_CLK(var_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_96m, 0, 96 * CLOCK_1M, 1);
+DECLARE_REF_CLK(ref_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(ref_104m, &ref_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(ref_52m, &ref_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(ref_13m, &ref_52m.clk, 13 * CLOCK_1M, 4);
+DECLARE_REF_CLK(var_312m, 0, 312 * CLOCK_1M, 0);
+DECLARE_REF_CLK(var_104m, &var_312m.clk, 104 * CLOCK_1M, 3);
+DECLARE_REF_CLK(var_52m, &var_104m.clk, 52 * CLOCK_1M, 2);
+DECLARE_REF_CLK(var_13m, &var_52m.clk, 13 * CLOCK_1M, 4);
+
+struct refclk_lkup {
+ struct refclk *procclk;
+ const char *name;
+};
+
+/* Lookup table for string to clk tranlation */
+#define MKSTR(x) {&x, #x}
+static struct refclk_lkup refclk_str_tbl[] = {
+ MKSTR(ref_crystal), MKSTR(var_96m), MKSTR(ref_96m),
+ MKSTR(ref_312m), MKSTR(ref_104m), MKSTR(ref_52m),
+ MKSTR(ref_13m), MKSTR(var_312m), MKSTR(var_104m),
+ MKSTR(var_52m), MKSTR(var_13m),
+};
+
+int refclk_entries = sizeof(refclk_str_tbl)/sizeof(refclk_str_tbl[0]);
+
+/* convert ref clock string to clock structure pointer */
+struct refclk *refclk_str_to_clk(const char *name)
+{
+ int i;
+ struct refclk_lkup *tblp = refclk_str_tbl;
+ for (i = 0; i < refclk_entries; i++, tblp++) {
+ if (!(strcmp(name, tblp->name
[U-Boot] [PATCH 3/6] gpio: kona: Add Kona gpio driver
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Markus Mayer
Reviewed-by: Tim Kryger
---
drivers/gpio/Makefile|1 +
drivers/gpio/kona_gpio.c | 143 ++
2 files changed, 144 insertions(+)
create mode 100644 drivers/gpio/kona_gpio.c
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index b903c45..ed2c0c7 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -8,6 +8,7 @@
obj-$(CONFIG_AT91_GPIO)+= at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
obj-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
+obj-$(CONFIG_KONA_GPIO)+= kona_gpio.o
obj-$(CONFIG_MARVELL_GPIO) += mvgpio.o
obj-$(CONFIG_MARVELL_MFP) += mvmfp.o
obj-$(CONFIG_MXC_GPIO) += mxc_gpio.o
diff --git a/drivers/gpio/kona_gpio.c b/drivers/gpio/kona_gpio.c
new file mode 100644
index 000..a5782cc
--- /dev/null
+++ b/drivers/gpio/kona_gpio.c
@@ -0,0 +1,143 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+#include
+#include
+#include
+
+#define GPIO_BASE (void *)GPIO2_BASE_ADDR
+
+#define GPIO_PASSWD0x00a5a501
+#define GPIO_PER_BANK 32
+#define GPIO_MAX_BANK_NUM 8
+
+#define GPIO_BANK(gpio)((gpio) >> 5)
+#define GPIO_BITMASK(gpio) \
+ (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
+
+#define GPIO_OUT_STATUS(bank) (0x + ((bank) << 2))
+#define GPIO_IN_STATUS(bank) (0x0020 + ((bank) << 2))
+#define GPIO_OUT_SET(bank) (0x0040 + ((bank) << 2))
+#define GPIO_OUT_CLEAR(bank) (0x0060 + ((bank) << 2))
+#define GPIO_INT_STATUS(bank) (0x0080 + ((bank) << 2))
+#define GPIO_INT_MASK(bank)(0x00a0 + ((bank) << 2))
+#define GPIO_INT_MSKCLR(bank) (0x00c0 + ((bank) << 2))
+#define GPIO_CONTROL(bank) (0x0100 + ((bank) << 2))
+#define GPIO_PWD_STATUS(bank) (0x0500 + ((bank) << 2))
+
+#define GPIO_GPPWR_OFFSET 0x0520
+
+#define GPIO_GPCTR0_DBR_SHIFT 5
+#define GPIO_GPCTR0_DBR_MASK 0x01e0
+
+#define GPIO_GPCTR0_ITR_SHIFT 3
+#define GPIO_GPCTR0_ITR_MASK 0x0018
+#define GPIO_GPCTR0_ITR_CMD_RISING_EDGE0x0001
+#define GPIO_GPCTR0_ITR_CMD_FALLING_EDGE 0x0002
+#define GPIO_GPCTR0_ITR_CMD_BOTH_EDGE 0x0003
+
+#define GPIO_GPCTR0_IOTR_MASK 0x0001
+#define GPIO_GPCTR0_IOTR_CMD_0UTPUT0x
+#define GPIO_GPCTR0_IOTR_CMD_INPUT 0x0001
+
+int gpio_request(unsigned gpio, const char *label)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_free(unsigned gpio)
+{
+ unsigned int value, off;
+
+ writel(GPIO_PASSWD, GPIO_BASE + GPIO_GPPWR_OFFSET);
+ off = GPIO_PWD_STATUS(GPIO_BANK(gpio));
+ value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio);
+ writel(value, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+ u32 val;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_INPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+
+ return 0;
+}
+
+int gpio_direction_output(unsigned gpio, int value)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= ~GPIO_GPCTR0_IOTR_MASK;
+ val |= GPIO_GPCTR0_IOTR_CMD_0UTPUT;
+ writel(val, GPIO_BASE + GPIO_CONTROL(gpio));
+ off = value ? GPIO_OUT_SET(bank_id) : GPIO_OUT_CLEAR(bank_id);
+
+ val = readl(GPIO_BASE + off);
+ val |= bitmask;
+ writel(val, GPIO_BASE + off);
+
+ return 0;
+}
+
+int gpio_get_value(unsigned gpio)
+{
+ int bank_id = GPIO_BANK(gpio);
+ int bitmask = GPIO_BITMASK(gpio);
+ u32 val, off;
+
+ /* determine the GPIO pin direction */
+ val = readl(GPIO_BASE + GPIO_CONTROL(gpio));
+ val &= GPIO_GPCTR0_IOTR_MASK;
+
+ /* read the GPIO bank status */
+ off = (GPIO_GPCTR0_IOTR_CMD_INPUT == val) ?
+ G
[U-Boot] [PATCH 0/6] Introducing the Broadcom bcm281xx Architecture
This patchset introduces the Broadcom bcm281xx family of mobile SoC chips. Broadcom kona hardware blocks are often found in Broadcom mobile SoC chips including the bcm281xx family, so support for some of these kona blocks is also provided here. These patches work on u-boot master as well as the u-boot-arm custodian tree. Darwin Rambo (6): arch: kona: Initial commit of kona-common architecture code arch: bcm281xx: Initial commit of bcm281xx architecture code gpio: kona: Add Kona gpio driver i2c: kona: Add Kona I2C driver mmc: kona: Add Kona mmc driver board: bcm28155_ap: Add board files arch/arm/cpu/armv7/Makefile|1 + arch/arm/cpu/armv7/bcm281xx/Makefile | 11 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 525 + arch/arm/cpu/armv7/bcm281xx/clk-bsc.c | 54 ++ arch/arm/cpu/armv7/bcm281xx/clk-core.c | 536 + arch/arm/cpu/armv7/bcm281xx/clk-core.h | 510 + arch/arm/cpu/armv7/bcm281xx/clk-sdio.c | 75 +++ arch/arm/cpu/armv7/bcm281xx/reset.c| 29 + arch/arm/cpu/armv7/kona-common/Makefile| 10 + arch/arm/cpu/armv7/kona-common/clk-stubs.c | 22 + arch/arm/cpu/armv7/kona-common/hwinit-common.c | 18 + arch/arm/cpu/armv7/kona-common/lowlevel_init.S | 15 + arch/arm/cpu/armv7/kona-common/proc.c | 20 + arch/arm/include/asm/arch-bcm281xx/gpio.h | 17 + arch/arm/include/asm/arch-bcm281xx/sysmap.h| 27 + arch/arm/include/asm/kona-common/clk.h | 31 + arch/arm/include/asm/kona-common/misc.h| 20 + board/broadcom/bcm28155_ap/Makefile|7 + board/broadcom/bcm28155_ap/bcm28155_ap.c | 99 boards.cfg |1 + drivers/gpio/Makefile |1 + drivers/gpio/kona_gpio.c | 143 + drivers/i2c/Makefile |1 + drivers/i2c/kona_i2c.c | 730 drivers/mmc/Makefile |1 + drivers/mmc/kona_sdhci.c | 127 + include/configs/bcm28155_ap.h | 148 + 27 files changed, 3179 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/Makefile create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-bsc.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-core.h create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-sdio.c create mode 100644 arch/arm/cpu/armv7/bcm281xx/reset.c create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c create mode 100644 arch/arm/cpu/armv7/kona-common/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/kona-common/proc.c create mode 100644 arch/arm/include/asm/arch-bcm281xx/gpio.h create mode 100644 arch/arm/include/asm/arch-bcm281xx/sysmap.h create mode 100644 arch/arm/include/asm/kona-common/clk.h create mode 100644 arch/arm/include/asm/kona-common/misc.h create mode 100644 board/broadcom/bcm28155_ap/Makefile create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c create mode 100644 drivers/gpio/kona_gpio.c create mode 100644 drivers/i2c/kona_i2c.c create mode 100644 drivers/mmc/kona_sdhci.c create mode 100644 include/configs/bcm28155_ap.h -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/6] arch: kona: Initial commit of kona-common architecture code
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
arch/arm/cpu/armv7/Makefile|1 +
arch/arm/cpu/armv7/kona-common/Makefile| 10
arch/arm/cpu/armv7/kona-common/clk-stubs.c | 22 +
arch/arm/cpu/armv7/kona-common/hwinit-common.c | 18 ++
arch/arm/cpu/armv7/kona-common/lowlevel_init.S | 15
arch/arm/cpu/armv7/kona-common/proc.c | 20 +++
arch/arm/include/asm/kona-common/clk.h | 31
arch/arm/include/asm/kona-common/misc.h| 20 +++
8 files changed, 137 insertions(+)
create mode 100644 arch/arm/cpu/armv7/kona-common/Makefile
create mode 100644 arch/arm/cpu/armv7/kona-common/clk-stubs.c
create mode 100644 arch/arm/cpu/armv7/kona-common/hwinit-common.c
create mode 100644 arch/arm/cpu/armv7/kona-common/lowlevel_init.S
create mode 100644 arch/arm/cpu/armv7/kona-common/proc.c
create mode 100644 arch/arm/include/asm/kona-common/clk.h
create mode 100644 arch/arm/include/asm/kona-common/misc.h
diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index 0467d00..119ebb3 100644
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -23,6 +23,7 @@ obj-y += nonsec_virt.o
obj-y += virt-v7.o
endif
+obj-$(CONFIG_KONA) += kona-common/
obj-$(CONFIG_OMAP_COMMON) += omap-common/
obj-$(CONFIG_TEGRA) += tegra-common/
diff --git a/arch/arm/cpu/armv7/kona-common/Makefile
b/arch/arm/cpu/armv7/kona-common/Makefile
new file mode 100644
index 000..9a7c167
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/Makefile
@@ -0,0 +1,10 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += clk-stubs.o
+obj-y += hwinit-common.o
+obj-y += proc.o
+obj-y += lowlevel_init.o
diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c
b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
new file mode 100644
index 000..dd3ce34
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c
@@ -0,0 +1,22 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+#include
+
+/*
+ * These weak functions are available to kona architectures that don't
+ * require clock enables from the driver code.
+ */
+int __weak clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
+int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep)
+{
+ return 0;
+}
diff --git a/arch/arm/cpu/armv7/kona-common/hwinit-common.c
b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
new file mode 100644
index 000..5d6b131
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/hwinit-common.c
@@ -0,0 +1,18 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+#include
+#include
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif
diff --git a/arch/arm/cpu/armv7/kona-common/lowlevel_init.S
b/arch/arm/cpu/armv7/kona-common/lowlevel_init.S
new file mode 100644
index 000..a03afcc
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/lowlevel_init.S
@@ -0,0 +1,15 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+//#include
+//#include
+//#include
+
+.globl lowlevel_init
+lowlevel_init:
+ mov pc, lr
diff --git a/arch/arm/cpu/armv7/kona-common/proc.c
b/arch/arm/cpu/armv7/kona-common/proc.c
new file mode 100644
index 000..92fb39b
--- /dev/null
+++ b/arch/arm/cpu/armv7/kona-common/proc.c
@@ -0,0 +1,20 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+#include
+#include
+#include
+#include
+
+void do_proc_wfe(int forever)
+{
+ do {
+ asm volatile ("wfe @ wait for event\n");
+ /*printf("wake up from wfe\n"); */
+ } while (forever);
+}
diff --git a/arch/arm/include/asm/kona-common/clk.h
b/arch/arm/include/asm/kona-common/clk.h
new file
[U-Boot] [PATCH 6/6] board: bcm28155_ap: Add board files
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
board/broadcom/bcm28155_ap/Makefile |7 ++
board/broadcom/bcm28155_ap/bcm28155_ap.c | 99
boards.cfg |1 +
include/configs/bcm28155_ap.h| 148 ++
4 files changed, 255 insertions(+)
create mode 100644 board/broadcom/bcm28155_ap/Makefile
create mode 100644 board/broadcom/bcm28155_ap/bcm28155_ap.c
create mode 100644 include/configs/bcm28155_ap.h
diff --git a/board/broadcom/bcm28155_ap/Makefile
b/board/broadcom/bcm28155_ap/Makefile
new file mode 100644
index 000..b6159dc
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright 2013 Broadcom Corporation. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += $(BOARD).o
diff --git a/board/broadcom/bcm28155_ap/bcm28155_ap.c
b/board/broadcom/bcm28155_ap/bcm28155_ap.c
new file mode 100644
index 000..b86dbda
--- /dev/null
+++ b/board/broadcom/bcm28155_ap/bcm28155_ap.c
@@ -0,0 +1,99 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define SECWATCHDOG_SDOGCR_OFFSET 0x
+#define SECWATCHDOG_SDOGCR_EN_SHIFT27
+#define SECWATCHDOG_SDOGCR_SRSTEN_SHIFT26
+#define SECWATCHDOG_SDOGCR_CLKS_SHIFT 20
+#define SECWATCHDOG_SDOGCR_LD_SHIFT0
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * board_init - early hardware init
+ */
+int board_init(void)
+{
+ printf("Relocation Offset is: %08lx\n", gd->reloc_off);
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+
+ clk_init();
+
+ return 0;
+}
+
+/*
+ * misc_init_r - miscellaneous platform dependent initializations
+ **/
+int misc_init_r(void)
+{
+ /* Disable watchdog reset - watchdog unused */
+ writel((0 << SECWATCHDOG_SDOGCR_EN_SHIFT) |
+ (0 << SECWATCHDOG_SDOGCR_SRSTEN_SHIFT) |
+ (4 << SECWATCHDOG_SDOGCR_CLKS_SHIFT) |
+ (0x5a0 << SECWATCHDOG_SDOGCR_LD_SHIFT),
+ (SECWD_BASE_ADDR + SECWATCHDOG_SDOGCR_OFFSET));
+
+ return 0;
+}
+
+/**
+ * dram_init - sets uboots idea of sdram size
+ **/
+int dram_init(void)
+{
+ gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
+ gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE;
+}
+
+#ifdef CONFIG_KONA_SDHCI
+/***
+ * mmc_init - Initializes mmc
+ */
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ /* Register eMMC - SDIO2 */
+ ret = kona_sdhci_init(1, 40, 0);
+ if (ret)
+ return ret;
+
+ /* Register SD Card - SDIO4 kona_mmc_init assumes 0 based index */
+ ret = kona_sdhci_init(3, 40, 0);
+ return ret;
+}
+#endif
+
+/*
+ * The timer functionality is now in u-boot/lib/time.c, enabled with
+ * CONFIG_SYS_TIMER_COUNTER and CONFIG_SYS_TIMER_RATE
+ */
+
+/* Replace by __weak timer_init() framework function later */
+int timer_init(void)
+{
+ return 0;
+}
diff --git a/boards.cfg b/boards.cfg
index a8336cc..2105ecc 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -271,6 +271,7 @@ Active arm armv7 am33xx ti
ti816x
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_mmc sama5d3xek:SAMA5D3,SYS_USE_MMC
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_nandflash sama5d3xek:SAMA5D3,SYS_USE_NANDFLASH
Bo Shen
Active arm armv7 at91atmel sama5d3xek
sama5d3xek_spiflash sama5d3xek:SAMA5D3,SYS_USE_SERIALFLASH
Bo Shen
+Active arm armv7 bcm281xxbroadcombcm28155_ap
[U-Boot] [PATCH 4/6] i2c: kona: Add Kona I2C driver
Add support for the Kona I2C controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
---
drivers/i2c/Makefile |1 +
drivers/i2c/kona_i2c.c | 730
2 files changed, 731 insertions(+)
create mode 100644 drivers/i2c/kona_i2c.c
diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index fa3a875..36d5e5f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
+obj-$(CONFIG_SYS_I2C_KONA) += kona_i2c.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
diff --git a/drivers/i2c/kona_i2c.c b/drivers/i2c/kona_i2c.c
new file mode 100644
index 000..049457a
--- /dev/null
+++ b/drivers/i2c/kona_i2c.c
@@ -0,0 +1,730 @@
+/*
+*
+* Copyright 2013 Broadcom Corporation. All rights reserved.
+*
+* SPDX-License-Identifier: GPL-2.0+
+*
+*/
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Hardware register offsets and field defintions */
+#define CS_OFFSET 0x0020
+#define CS_ACK_SHIFT 3
+#define CS_ACK_MASK0x0008
+#define CS_ACK_CMD_GEN_START 0x
+#define CS_ACK_CMD_GEN_RESTART 0x0001
+#define CS_CMD_SHIFT 1
+#define CS_CMD_CMD_NO_ACTION 0x
+#define CS_CMD_CMD_START_RESTART 0x0001
+#define CS_CMD_CMD_STOP0x0002
+#define CS_EN_SHIFT0
+#define CS_EN_CMD_ENABLE_BSC 0x0001
+
+#define TIM_OFFSET 0x0024
+#define TIM_PRESCALE_SHIFT 6
+#define TIM_P_SHIFT3
+#define TIM_NO_DIV_SHIFT 2
+#define TIM_DIV_SHIFT 0
+
+#define DAT_OFFSET 0x0028
+
+#define TOUT_OFFSET0x002c
+
+#define TXFCR_OFFSET 0x003c
+#define TXFCR_FIFO_FLUSH_MASK 0x0080
+#define TXFCR_FIFO_EN_MASK 0x0040
+
+#define IER_OFFSET 0x0044
+#define IER_READ_COMPLETE_INT_MASK 0x0010
+#define IER_I2C_INT_EN_MASK0x0008
+#define IER_FIFO_INT_EN_MASK 0x0002
+#define IER_NOACK_EN_MASK 0x0001
+
+#define ISR_OFFSET 0x0048
+#define ISR_RESERVED_MASK 0xff60
+#define ISR_CMDBUSY_MASK 0x0080
+#define ISR_READ_COMPLETE_MASK 0x0010
+#define ISR_SES_DONE_MASK 0x0008
+#define ISR_ERR_MASK 0x0004
+#define ISR_TXFIFOEMPTY_MASK 0x0002
+#define ISR_NOACK_MASK 0x0001
+
+#define CLKEN_OFFSET 0x004c
+#define CLKEN_AUTOSENSE_OFF_MASK 0x0080
+#define CLKEN_M_SHIFT 4
+#define CLKEN_N_SHIFT 1
+#define CLKEN_CLKEN_MASK 0x0001
+
+#define FIFO_STATUS_OFFSET 0x0054
+#define FIFO_STATUS_RXFIFO_EMPTY_MASK 0x0004
+#define FIFO_STATUS_TXFIFO_EMPTY_MASK 0x0010
+
+#define HSTIM_OFFSET 0x0058
+#define HSTIM_HS_MODE_MASK 0x8000
+#define HSTIM_HS_HOLD_SHIFT10
+#define HSTIM_HS_HIGH_PHASE_SHIFT 5
+#define HSTIM_HS_SETUP_SHIFT 0
+
+#define PADCTL_OFFSET 0x005c
+#define PADCTL_PAD_OUT_EN_MASK 0x0004
+
+#define RXFCR_OFFSET 0x0068
+#define RXFCR_NACK_EN_SHIFT7
+#define RXFCR_READ_COUNT_SHIFT 0
+#define RXFIFORDOUT_OFFSET 0x006c
+
+/* Locally used constants */
+#define MAX_RX_FIFO_SIZE 64U /* bytes */
+#define MAX_TX_FIFO_SIZE 64U /* bytes */
+
+#define I2C_TIMEOUT10 /* usecs */
+
+#define WAIT_INT_CHK 100 /* usecs */
+#if I2C_TIMEOUT % WAIT_INT_CHK
+#error I2C_TIMEOUT must be a multiple of WAIT_INT_CHK
+#endif
+
+/* Operations that can be commanded to the controller */
+enum bcm_kona_cmd_t {
+ BCM_CMD_NOACTION = 0,
+ BCM_CMD_START,
+ BCM_CMD_RESTART
Re: [U-Boot] how to get u-boot code with arm64: core support
On 14-01-23 07:58 AM, Detlev Zundel wrote: Hi Bhupesh, -Original Message- From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On Behalf Of drambo Sent: Thursday, January 23, 2014 12:32 AM To: u-boot@lists.denx.de Subject: Re: [U-Boot] how to get u-boot code with arm64: core support Hi Bhupesh, U-boot doesn't have ARM trusted firmware support as of now. U-boot for ARMv8 starts in EL3, whereas UEFI starts in EL2 as trusted firmware itself is working in EL3. Since the ATF software doesn't really care whether it is loading uefi or u-boot and since it wants to load non-secure images as EL2 or EL1 (https://github.com/ARM-software/arm-trusted- firmware/blob/master/docs/user-guide.md See section "Normal World Software Execution"), why would we want to assume u-boot starts in EL3 mode by default? If we want to support EL3 execution for convenience to those that don't have ATF setup, that might make sense, but then shouldn't initial EL3 execution and subsequent switching levels be debug CONFIG options? Thanks. In the past I remember using u-boot as the bare-metal s/w to debug a Silicon without any BootROM/firmware code running before the same on ARM 32-bit architectures. Many of our customers (in the embedded market) use U-Boot in such a way very successfully. armv8 and ATF bring in a new security model and with that, secure monitor/dispatch, secure OS support and secure power control. It may not be good to assume that we can work in a historical way here. The ATF is presently tested only for UEFI and UEFI comes up in EL2 while the ATF itself is running in EL3. I don't know what would be the popular vote on this, but personally I feel that the u-boot for ARMv8 should also be launched by the ATF (similar to UEFI) and should start execution in EL2 so that it can launch a hypervisor (running in EL2) or Linux (running in EL1). But this might hurt the popular premise that u-boot can be used as a bare-metal s/w to debug a silicon without additional firmware components. Perhaps u-boot experts can guide us on this ! I have to admit that I'm only reading up on the complexities of the security model of aarch64, but my gut response (cf. [1] is that "real security" stems from "few code" rather than adding layer over layer. With this in mind, I'd really like to see that U-Boot with its well known and tested code base can still be the "root of trust" in an embedded product (i.e. EL3 as far as I understand). EL3 is the highest level of trust, and the new armv8 security model treats uefi/u-boot as non-secure firmware. The ATF trusted firmware needs to run, initialize secure hardware, load trusted images, and ultimately launch the non-secure OS loader (uefi or u-boot). As such, I think that running uefi or u-boot at EL3 violates the current arm security model i.e. u-boot cannot be the "root of trust" in this architecture since it is non-secure. Having non-secure firmware run at the same level as the secure dispatcher and secure monitor will fail any secure audit in my opinion. However, if we set up u-boot so that it can wake up at any security level and migrate to non-secure EL1, that might be a nice compromise. But having specific EL3 startup assumptions and code that is always present in u-boot seems like the wrong approach to me. At the very least, we should wrap the EL3 code in a CONFIG option since this is not the planned entry state for final deployment. Note that these are just my opinions above. Any ARM security experts would be welcome to contribute thoughts here. Many of the embedded U-Boot users who excercise full control over the whole software stack very likely want to see the same. The ATF secure software is freely available. The interesting question will be if we can reconcile the requirements of "classic embedded U-Boot users" and this "OEM server market" that seems to drive much of these new concepts here. But I sincerely hope so. After all, in the end we want to boot an OS to get the real work done ;) As armv8 goes mobile, we have less of a server market issue and more of a mobile security issue. Best wishes Detlev [1] Reading one presentation I found about ATF[2] actually made my head hurt around page 12 which looks more like "security soup" than clearcut concepts, but maybe I'm just not into all the details yet. [2] http://lcu-13.zerista.com/event/member/85121 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: Minor cleanup of sdhci.c
> -Original Message-
> From: Jaehoon Chung [mailto:jh80.ch...@samsung.com]
> Sent: Wednesday, December 25, 2013 11:32 PM
> To: Darwin Rambo; u-boot@lists.denx.de
> Cc: Pantelis Antoniou
> Subject: Re: [U-Boot] [PATCH] mmc: Minor cleanup of sdhci.c
>
> Hi, Darwin.
>
> I didn't think that "__func__" is needs...in my case.
> There isn't the duplicated message, anywhere.
Hi Jaehoon,
I think that the __func__ is needed to show where the prints are coming from
when there are prints coming from many other functions outside of the sdhci
subsystem as well. It is less confusing and faster to debug if prints in
general show where they are coming from. Just because the prints are unique
inside sdhci.c is not enough to remove the need for the prefix. This is
especially true since the prints in this module are very generic such as "Error
detected in status" or "Transfer data timeout". These messages are so generic
that they could be from USB, I2C, NET, DMA, etc. Having the function prefix is
a nice way to avoid having to search the code base for these generic strings.
Best regards,
Darwin Rambo
>
> Best Regards,
> Jaehoon Chung
>
> On 12/20/2013 08:13 AM, Darwin Rambo wrote:
> > Fixup prints to show where the print is done from, and
> > a few minor formatting/grammar issues.
> >
> > Signed-off-by: Darwin Rambo
> > ---
> > drivers/mmc/sdhci.c | 32 +++-
> > 1 file changed, 19 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
> > index 46ae9cb..1e86b92 100644
> > --- a/drivers/mmc/sdhci.c
> > +++ b/drivers/mmc/sdhci.c
> > @@ -24,7 +24,8 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask)
> > sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
> > while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
> > if (timeout == 0) {
> > - printf("Reset 0x%x never completed.\n", (int)mask);
> > + printf("%s: Reset 0x%x never completed.\n",
> > + __func__, (int)mask);
> > return;
> > }
> > timeout--;
> > @@ -79,7 +80,8 @@ static int sdhci_transfer_data(struct sdhci_host *host,
> struct mmc_data *data,
> > do {
> > stat = sdhci_readl(host, SDHCI_INT_STATUS);
> > if (stat & SDHCI_INT_ERROR) {
> > - printf("Error detected in status(0x%X)!\n", stat);
> > + printf("%s: Error detected in status(0x%X)!\n",
> > + __func__, stat);
> > return -1;
> > }
> > if (stat & rdy) {
> > @@ -102,7 +104,7 @@ static int sdhci_transfer_data(struct sdhci_host *host,
> struct mmc_data *data,
> > if (timeout-- > 0)
> > udelay(10);
> > else {
> > - printf("Transfer data timeout\n");
> > + printf("%s: Transfer data timeout\n", __func__);
> > return -1;
> > }
> > } while (!(stat & SDHCI_INT_DATA_END));
> > @@ -147,7 +149,7 @@ int sdhci_send_command(struct mmc *mmc, struct
> mmc_cmd *cmd,
> >
> > while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
> > if (time >= cmd_timeout) {
> > - printf("MMC: %d busy ", mmc_dev);
> > + printf("%s: MMC: %d busy ", __func__, mmc_dev);
> > if (2 * cmd_timeout <=
> CONFIG_SDHCI_CMD_MAX_TIMEOUT) {
> > cmd_timeout += cmd_timeout;
> > printf("timeout increasing to: %u ms.\n",
> > @@ -179,7 +181,7 @@ int sdhci_send_command(struct mmc *mmc, struct
> mmc_cmd *cmd,
> > if (data)
> > flags |= SDHCI_CMD_DATA;
> >
> > - /*Set Transfer mode regarding to data flag*/
> > + /* Set Transfer mode regarding to data flag */
> > if (data != 0) {
> > sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
> > mode = SDHCI_TRNS_BLK_CNT_EN;
> > @@ -230,7 +232,7 @@ int sdhci_send_command(struct mmc *mmc, struct
> mmc_cmd *cmd,
> > if (host->quirks & SDHCI_QUIRK_BROKEN_R1B)
> > return 0;
> > else {
> > - printf("Timeout for status update!\n");
> > + printf("%s: Timeout for status update!\n", __func__);
[U-Boot] [PATCH] lib: fix return codes when CONFIG_SYS_VSNPRINTF is enabled
When CONFIG_SYS_VSNPRINTF is enabled, it protects print operations such as sprintf, snprintf, vsnprintf, etc., from buffer overflows. But vsnprintf_internal includes the terminating NULL character in the calculation of number of characters written. This affects sprintf and snprintf return values. Fix this issue by setting pointer 'str' back to the location of the '\0'. Signed-off-by: Darwin Rambo Reviewed-by: Steve Rae --- lib/vsprintf.c |1 + 1 file changed, 1 insertion(+) diff --git a/lib/vsprintf.c b/lib/vsprintf.c index 82e5c13..60874da 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c @@ -750,6 +750,7 @@ repeat: ADDCH(str, '\0'); if (str > end) end[-1] = '\0'; + --str; } #else *str = '\0'; -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: Minor cleanup of sdhci.c
Fixup prints to show where the print is done from, and
a few minor formatting/grammar issues.
Signed-off-by: Darwin Rambo
---
drivers/mmc/sdhci.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 46ae9cb..1e86b92 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -24,7 +24,8 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask)
sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
if (timeout == 0) {
- printf("Reset 0x%x never completed.\n", (int)mask);
+ printf("%s: Reset 0x%x never completed.\n",
+ __func__, (int)mask);
return;
}
timeout--;
@@ -79,7 +80,8 @@ static int sdhci_transfer_data(struct sdhci_host *host,
struct mmc_data *data,
do {
stat = sdhci_readl(host, SDHCI_INT_STATUS);
if (stat & SDHCI_INT_ERROR) {
- printf("Error detected in status(0x%X)!\n", stat);
+ printf("%s: Error detected in status(0x%X)!\n",
+ __func__, stat);
return -1;
}
if (stat & rdy) {
@@ -102,7 +104,7 @@ static int sdhci_transfer_data(struct sdhci_host *host,
struct mmc_data *data,
if (timeout-- > 0)
udelay(10);
else {
- printf("Transfer data timeout\n");
+ printf("%s: Transfer data timeout\n", __func__);
return -1;
}
} while (!(stat & SDHCI_INT_DATA_END));
@@ -147,7 +149,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
if (time >= cmd_timeout) {
- printf("MMC: %d busy ", mmc_dev);
+ printf("%s: MMC: %d busy ", __func__, mmc_dev);
if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) {
cmd_timeout += cmd_timeout;
printf("timeout increasing to: %u ms.\n",
@@ -179,7 +181,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
if (data)
flags |= SDHCI_CMD_DATA;
- /*Set Transfer mode regarding to data flag*/
+ /* Set Transfer mode regarding to data flag */
if (data != 0) {
sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
mode = SDHCI_TRNS_BLK_CNT_EN;
@@ -230,7 +232,7 @@ int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd,
if (host->quirks & SDHCI_QUIRK_BROKEN_R1B)
return 0;
else {
- printf("Timeout for status update!\n");
+ printf("%s: Timeout for status update!\n", __func__);
return TIMEOUT;
}
}
@@ -307,7 +309,8 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int
clock)
while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
& SDHCI_CLOCK_INT_STABLE)) {
if (timeout == 0) {
- printf("Internal clock never stabilised.\n");
+ printf("%s: Internal clock never stabilised.\n",
+ __func__);
return -1;
}
timeout--;
@@ -397,7 +400,8 @@ int sdhci_init(struct mmc *mmc)
if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) {
aligned_buffer = memalign(8, 512*1024);
if (!aligned_buffer) {
- printf("Aligned buffer alloc failed!!!");
+ printf("%s: Aligned buffer alloc failed!!!\n",
+ __func__);
return -1;
}
}
@@ -418,8 +422,8 @@ int sdhci_init(struct mmc *mmc)
}
/* Enable only interrupts served by the SD controller */
- sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK
-, SDHCI_INT_ENABLE);
+ sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK,
+SDHCI_INT_ENABLE);
/* Mask all sdhci interrupt sources */
sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
@@ -433,7 +437,7 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32
min_clk)
mmc = malloc(sizeof(struct mmc));
if (!mmc) {
- printf("mmc malloc fail!\n");
+ printf("%s
[U-Boot] [PATCH] lib: time: add weak timer_init() function
If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.
Signed-off-by: Darwin Rambo
Reviewed-by: Tim Kryger
---
arch/arm/cpu/arm1176/bcm2835/timer.c|5 -
arch/arm/cpu/sa1100/timer.c |5 -
board/armltd/vexpress/vexpress_common.c |5 -
board/nvidia/common/board.c | 11 ---
board/sandbox/sandbox/sandbox.c |5 -
lib/time.c |5 +
6 files changed, 5 insertions(+), 31 deletions(-)
diff --git a/arch/arm/cpu/arm1176/bcm2835/timer.c
b/arch/arm/cpu/arm1176/bcm2835/timer.c
index 2edd671..017907c 100644
--- a/arch/arm/cpu/arm1176/bcm2835/timer.c
+++ b/arch/arm/cpu/arm1176/bcm2835/timer.c
@@ -18,11 +18,6 @@
#include
#include
-int timer_init(void)
-{
- return 0;
-}
-
ulong get_timer_us(ulong base)
{
struct bcm2835_timer_regs *regs =
diff --git a/arch/arm/cpu/sa1100/timer.c b/arch/arm/cpu/sa1100/timer.c
index 4b981e4..0a0006b 100644
--- a/arch/arm/cpu/sa1100/timer.c
+++ b/arch/arm/cpu/sa1100/timer.c
@@ -13,11 +13,6 @@
#include
#include
-int timer_init (void)
-{
- return 0;
-}
-
ulong get_timer (ulong base)
{
return get_timer_masked ();
diff --git a/board/armltd/vexpress/vexpress_common.c
b/board/armltd/vexpress/vexpress_common.c
index da5cb01..cb2de2f 100644
--- a/board/armltd/vexpress/vexpress_common.c
+++ b/board/armltd/vexpress/vexpress_common.c
@@ -119,11 +119,6 @@ void dram_init_banksize(void)
get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
}
-int timer_init(void)
-{
- return 0;
-}
-
/*
* Start timer:
*Setup a 32 bit timer, running at 1KHz
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 1972527..e650fed 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -48,17 +48,6 @@ const struct tegra_sysinfo sysinfo = {
CONFIG_TEGRA_BOARD_STRING
};
-#ifndef CONFIG_SPL_BUILD
-/*
- * Routine: timer_init
- * Description: init the timestamp and lastinc value
- */
-int timer_init(void)
-{
- return 0;
-}
-#endif
-
void __pin_mux_usb(void)
{
}
diff --git a/board/sandbox/sandbox/sandbox.c b/board/sandbox/sandbox/sandbox.c
index 65dcce8..95efaff 100644
--- a/board/sandbox/sandbox/sandbox.c
+++ b/board/sandbox/sandbox/sandbox.c
@@ -23,11 +23,6 @@ unsigned long timer_read_counter(void)
return os_get_nsec() / 1000;
}
-int timer_init(void)
-{
- return 0;
-}
-
int dram_init(void)
{
gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
diff --git a/lib/time.c b/lib/time.c
index 8085aa4..73c3b6a 100644
--- a/lib/time.c
+++ b/lib/time.c
@@ -60,6 +60,11 @@ static unsigned long long notrace tick_to_time(uint64_t tick)
return tick;
}
+int __weak timer_init(void)
+{
+ return 0;
+}
+
ulong __weak get_timer(ulong base)
{
return tick_to_time(get_ticks()) - base;
--
1.7.9.5
___
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[U-Boot] [PATCH] i2c: Fix i2c speed command
This corrects i2c core to interpret the value returned by i2c_set_bus_speed as a success indicator rather than the actual speed that was set. When i2c_set_bus_speed returns a failure code, the speed is unknown so the adapter speed is set to zero. Signed-off-by: Darwin Rambo Reviewed-by: Tim Kryger Reviewed-by: Steve Rae --- drivers/i2c/i2c_core.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/i2c_core.c b/drivers/i2c/i2c_core.c index e1767f4..18d6736 100644 --- a/drivers/i2c/i2c_core.c +++ b/drivers/i2c/i2c_core.c @@ -349,7 +349,7 @@ unsigned int i2c_set_bus_speed(unsigned int speed) return 0; ret = I2C_ADAP->set_bus_speed(I2C_ADAP, speed); if (gd->flags & GD_FLG_RELOC) - I2C_ADAP->speed = ret; + I2C_ADAP->speed = (ret == 0) ? speed : 0; return ret; } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
