[U-Boot] Armada 8k IO windows

[Dirk Eibach]

I am trying to find out where the IOB windows are setup. I see that
the values do not matched the documented defaults, but I also do not
see access from u-boot to these registers. I am especially interested
where the values for CP-0/PEX0 are coming from (and how to to properly
modify them).

Cheers
Dirk
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Re: [U-Boot] i2c: Fix pca953x endianess issue, commit daa75b34828d45b7c1d63009188d45f4a32d06ba

[Dirk Eibach]

Hello,

we have a 16 bit value here, so we have to define whether bit0(containin
the information for IO0.0) is in the first or the second byte. Since the
PCA9555 does this encoding little endian, the conversion is allright.

Cheers
Dirk
Am Do., 11. Okt. 2018 um 07:42 Uhr schrieb Heiko Schocher :
>
> Hello Joakim,
>
> Am 10.10.2018 um 19:34 schrieb Joakim Tjernlund:
> > This commit broke our pca953x usage(on ppc).
> >
> > I wonder why gpio pins here has an endian, its not a number.
> > If there must be an endian connected with this, should it not
> > be a cpu_to_be16 instead, which will retain compatibility ?
>
> Hmm.. good question, I think you are right. May dirk can do a test?
> I have no pca953x with 16bit for doing a test.
>
> bye,
> Heiko
> --
> DENX Software Engineering GmbH,  Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
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Re: [U-Boot] Orphan Freescale PowerPC boards

[Dirk Eibach]

Hi Tom,

2017-05-17 19:36 GMT+02:00 Tom Rini :
> ...
> There's also a number of gdsys boards in mpc83xx too, Dirk,
> do you have interest in becoming the mpc83xx custodian?
> Co-custodianship is fine too.  Thanks!

We have some new mpc83xx boards coming. Mario Six is doing most of
gdsys u-boot maintenance at the moment. He would also be interested in
custodianship. Would that be allright for everyone involved?

Cheers
Dirk
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Re: [U-Boot] [PATCH 04/17] mvebu: Add board_pex_config()

[Dirk Eibach]

2016-12-01 9:30 GMT+01:00 Stefan Roese :
> On 23.11.2016 16:12, Mario Six wrote:
>>
>> Allow boards to do some initialization when PCIe comes up.
>
>
> What is it that your boards needs to do when PCIe comes up? Could
> you please give me an example here?

You might have a look at Patch 00 of this series. We have a quirky
FPGA as a PCIe device that needs some special treamtment when PCIe is
is coming up.

> ...
>> +void __board_pex_config(void)
>> +{
>> +   /* nothing in this weak default implementation */
>> +}
>> +void board_pex_config(void)
>> +   __attribute__((weak, alias("__board_pex_config")));
>> +
>
>
> Its easier to use this syntax instead:
>
> __weak board_pex_config(void)
> ...
>
> You don't need to add the __attribute this way.

Mario could you take car of this in V2?

Cheers
Dirk
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Re: [U-Boot] [PATCH 03/17] net: phy: Support Marvell 88E1680

[Dirk Eibach]

2016-11-30 0:00 GMT+01:00 Joe Hershberger <joe.hershber...@gmail.com>:
> On Wed, Nov 23, 2016 at 9:12 AM, Mario Six <mario@gdsys.cc> wrote:
>> From: Dirk Eibach <dirk.eib...@gdsys.cc>
>>
>> Add support for Marvell 88E1680 Integrated Octal
>> 10/100/1000 Mbps Energy Efficient Ethernet Transceiver.
>>
>> Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
>> ---
>>  drivers/net/phy/marvell.c | 51 
>> +++
>>  1 file changed, 51 insertions(+)
>>
>> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
>> index 4eeb0f6..72f3f92 100644
>> --- a/drivers/net/phy/marvell.c
>> +++ b/drivers/net/phy/marvell.c
>> @@ -480,6 +480,46 @@ static int m88e1310_config(struct phy_device *phydev)
>> return genphy_config_aneg(phydev);
>>  }
>>
>> +static int m88e1680_config(struct phy_device *phydev)
>> +{
>> +   /*
>> +* As per Marvell Release Notes - Alaska V 88E1680 Rev A2
>> +* Errata Section 4.1
>> +*/
>> +   u16 reg;
>> +
>> +   /* Matrix LED mode (not neede if single LED mode is used */
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x0004);
>
> I realize the 88e151* driver went in without my ack (35fa0dda: "net:
> phy: marvell: add errata w/a for 88E151* chips"), and is loaded with
> magic numbers, but let's not proliferate the problem. Please define
> register offsets or use already-defined register offsets. If
> reasonable, use defined field values to build values from defines and
> something like bitfield_replace() from bitfield.h or clrsetbits_le32()
> from asm/io.h. When it is a constant that represents an encoded
> physical value that will never be used elsewhere, it's ok to just keep
> the hard-coded number in the write, but it should be preceeded with a
> comment that describes the actual meaning in engineering units and
> prefereably the equation used to come up with the constant.  If you
> have the information to improve the 151* implementation as well, that
> would be very welcome.

Problem is that the initialization sequence from the Marvell Release
Notes is writing undocumented values to undocumented registers. It
should be considered a binary blob to get this chip up and running.
All the information that is available is added as comments.

>
>> +   reg = phy_read(phydev, MDIO_DEVAD_NONE, 27);
>> +   reg |= (1 << 5);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 27, reg);
>> +
>> +   /* QSGMII TX amplitude change */
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x00fd);
>> +   phy_write(phydev, MDIO_DEVAD_NONE,  8, 0x0b53);
>> +   phy_write(phydev, MDIO_DEVAD_NONE,  7, 0x200d);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x);
>> +
>> +   /* EEE initialization */
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x00ff);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 17, 0xb030);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 16, 0x215c);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x00fc);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 24, 0x888c);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 25, 0x888c);
>> +   phy_write(phydev, MDIO_DEVAD_NONE, 22, 0x);
>> +   phy_write(phydev, MDIO_DEVAD_NONE,  0, 0x9140);
>> +
>> +   genphy_config_aneg(phydev);
>
> This should check the return code and return it if negative.

Mario, would you take care of this in V2?

Cheers
Dirk
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[U-Boot] [PATCH v1] ppc4xx: Fix platform support

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Commit "ecc3066 Fix board init code to respect the C runtime environment"
broke platform support for ppc4xx.
start.S prepares a stackframe that is later rendered unusable by appending
the reserved space for global data.
Instead the reserved space has to be put first. Then the stackframe can
be pushed.

I can only test the 405EP OCM case. At least all other ppc4xx boards still
build.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 arch/powerpc/cpu/ppc4xx/start.S | 66 -
 1 file changed, 45 insertions(+), 21 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index b432b18..f357726 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -743,8 +743,16 @@ _start:
/**/
/* Setup the stack in internal SRAM */
/**/
-   lis r1,CONFIG_SYS_INIT_RAM_ADDR@h
-   ori r1,r1,CONFIG_SYS_INIT_SP_OFFSET@l
+   lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+   ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+   /*
+* Reserve space for globals and store address for initialization
+* with board_init_f_init_reserve() in r14
+*/
+   mr  r3, r1
+   bl  board_init_f_alloc_reserve
+   mr  r1, r3
+   mr  r14, r3
li  r0,0
stwur0,-4(r1)
stwur0,-4(r1)   /* Terminate call chain */
@@ -760,13 +768,9 @@ _start:
 #endif
 
bl  cpu_init_f  /* run low-level CPU init code (from Flash) 
*/
-   mr  r3, r1
-   bl  board_init_f_alloc_reserve
-   mr  r1, r3
+   /* address for globals was stored in r14 */
+   mr  r3, r14
bl  board_init_f_init_reserve
-   li  r0,0
-   stwur0, -4(r1)
-   stwur0, -4(r1)
li  r3, 0
bl  board_init_f
/* NOTREACHED - board_init_f() does not return */
@@ -831,8 +835,16 @@ _start:
 * for their primordial stack, setup stack here directly after the
 * SDRAM is initialized in ext_bus_cntlr_init.
 */
-   lis r1, CONFIG_SYS_INIT_RAM_ADDR@h
-   ori r1,r1,CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in SDRAM */
+   lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+   ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+   /*
+* Reserve space for globals and store address for initialization
+* with board_init_f_init_reserve() in r14
+*/
+   mr  r3, r1
+   bl  board_init_f_alloc_reserve
+   mr  r1, r3
+   mr  r14, r3
 
li  r0, 0   /* Make room for stack frame header and 
*/
stwur0, -4(r1)  /* clear final stack frame so that  
*/
@@ -972,8 +984,16 @@ _start:
 * Load the initial stack pointer and data area and convert the size,
 * in bytes, to the number of words to initialize to a known value.
 */
-   lis r1, CONFIG_SYS_INIT_RAM_ADDR@h
-   ori r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
+   lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+   ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+   /*
+* Reserve space for globals and store address for initialization
+* with board_init_f_init_reserve() in r14
+*/
+   mr  r3, r1
+   bl  board_init_f_alloc_reserve
+   mr  r1, r3
+   mr  r14, r3
 
lis r4, (CONFIG_SYS_INIT_RAM_SIZE >> 2)@h
ori r4, r4, (CONFIG_SYS_INIT_RAM_SIZE >> 2)@l
@@ -993,6 +1013,7 @@ _start:
 * Make room for stack frame header and clear final stack frame so
 * that stack backtraces terminate cleanly.
 */
+   li  r0, 0
stwur0, -4(r1)
stwur0, -4(r1)
 
@@ -1011,10 +1032,16 @@ _start:
/*
 * Stack in OCM.
 */
-
-   /* Set up Stack at top of OCM */
-   lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@h
-   ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@l
+   lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+   ori r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+   /*
+* Reserve space for globals and store address for initialization
+* with board_init_f_init_reserve() in r14
+*/
+   mr  r3, r1
+   bl  board_init_f_alloc_reserve
+   mr  r1, r3
+   mr  r14, r3
 
/* Set up a zeroized stack frame so that backtrace works right */
li  r0, 0
@@ -1035,12 

Re: [U-Boot] [PATCH] fw_env: Make env flash lock optional

[Dirk Eibach]

Hi Wolfgang,

2016-06-02 15:36 GMT+02:00 Wolfgang Denk :
> ...
>> There are  cornercases where lock/unlock works properly in the kernel
>> but not in u-boot. So we might have an environment that was locked by
>> u-boot and are able to unlock it with fw_env.
>
> But then such a "fix" looks wrong to me.  If it works in Linux, why
> not fix the code so it works in U-Boot, too?  I mean, if you have a
> working example, that should be possible, or not?
> ...

Sometimes I simply need a tool to repair a device in the field where
updating u-boot or kernel is not an option.
But uploading modified fw_env tools is.

Cheers
Dirk
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Re: [U-Boot] [PATCH] gdsys: Drop print_fpga_state function

[Dirk Eibach]

Hi Tom,

sorry for the delay, and thanks for keeping iocon alive :)

2016-06-02 16:05 GMT+02:00 Reinhard Pfau <reinhard.p...@gdsys.cc>:
...
>> diff --git a/board/gdsys/405ep/dlvision-10g.c
>> b/board/gdsys/405ep/dlvision-10g.c
>> index 54c7eb3..def4f9c 100644
>> --- a/board/gdsys/405ep/dlvision-10g.c
>> +++ b/board/gdsys/405ep/dlvision-10g.c
>> @@ -109,7 +109,10 @@ static void print_fpga_info(unsigned dev)
>> && !((hardware_version == HWVER_101)
>>  && (fpga_state == FPGA_STATE_DONE_FAILED))) {
>> puts("not available\n");
>> -   print_fpga_state(dev);
>> +   if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
>> +   puts("   Waiting for FPGA-DONE timed out.\n");
>> +   if (gd->arch.fpga_state[dev] &
>> FPGA_STATE_REFLECTION_FAILED)
>> +   puts("   FPGA reflection test failed.\n");
>
>
> At this point the FPGA state is already available in the local var
> "fpga_state".
> So please replace "gd->arch.fpga_state[dev]" with just "fpga_state".
>
>> return;
>> }
>>
> [...]
>

Apart from that
Acked-by: Dirk Eibach <dirk.eib...@gdsys.cc>
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Re: [U-Boot] [PATCH] fw_env: Make env flash lock optional

[Dirk Eibach]

Hi Anatolij,

2016-06-02 10:14 GMT+02:00 Anatolij Gustschin :
...
> when MEMLOCK ist broken on a platform and disabled by your patch,
> shouldn't MEMUNLOCK be isolated as well?

There are  cornercases where lock/unlock works properly in the kernel
but not in u-boot. So we might have an environment that was locked by
u-boot and are able to unlock it with fw_env.

Cheers
Dirk
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[U-Boot] [PATCH 4/4] strider: Support cpu-dp flavor

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

There is new strider cpu flavor with DisplayPort video.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>

---

 configs/strider_cpu_dp_defconfig | 20 
 include/configs/strider.h| 10 +-
 2 files changed, 29 insertions(+), 1 deletion(-)
 create mode 100644 configs/strider_cpu_dp_defconfig

diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig
new file mode 100644
index 000..db75c0d
--- /dev/null
+++ b/configs/strider_cpu_dp_defconfig
@@ -0,0 +1,20 @@
+CONFIG_PPC=y
+CONFIG_MPC83xx=y
+CONFIG_TARGET_STRIDER=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CPU,STRIDER_CPU_DP"
+CONFIG_HUSH_PARSER=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
diff --git a/include/configs/strider.h b/include/configs/strider.h
index 20ffc0c..90492f4 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -20,7 +20,9 @@
 
 #defineCONFIG_SYS_TEXT_BASE0xFE00
 
-#ifdef CONFIG_STRIDER_CPU
+#ifdef CONFIG_STRIDER_CPU_DP
+#define CONFIG_IDENT_STRING" strider cpu dp 0.01"
+#elif defined(CONFIG_STRIDER_CPU)
 #define CONFIG_IDENT_STRING" strider cpu 0.01"
 #elif defined(CONFIG_STRIDER_CON_DP)
 #define CONFIG_IDENT_STRING" strider con dp 0.01"
@@ -414,6 +416,12 @@
 #define CONFIG_SYS_DP501_I2C   {1, 3, 5, 7, 2, 4, 6, 8}
 #define CONFIG_STRIDER_FANS{ {10, 0x4c}, {11, 0x4c}, \
  {12, 0x4c} }
+#elif defined(CONFIG_STRIDER_CPU_DP)
+#define CONFIG_SYS_CH7301_I2C  {1, 2, 3, 4}
+#define CONFIG_SYS_ADV7611_I2C {1, 2, 3, 4}
+#define CONFIG_SYS_DP501_I2C   {1, 2, 3, 4}
+#define CONFIG_STRIDER_FANS{ {6, 0x4c}, {7, 0x4c}, \
+ {8, 0x4c} }
 #else
 #define CONFIG_SYS_CH7301_I2C  {1, 2, 3, 4}
 #define CONFIG_SYS_ADV7611_I2C {1, 2, 3, 4}
-- 
2.1.3

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[U-Boot] [PATCH 2/4] gdsys: osd: Allow osdsize on valid screens only

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Limit "osdsize"-command to access valid screens only.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/osd.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index 4e292f5..add9574 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -469,6 +469,9 @@ int osd_size(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
}
 
for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
+   if (!(osd_screen_mask & (1 << screen)))
+   continue;
+
OSD_SET_REG(screen, xy_size, ((x - 1) << 8) | (y - 1));
OSD_SET_REG(screen, x_pos, 32767 * (640 - 12 * x) / 65535);
OSD_SET_REG(screen, y_pos, 32767 * (480 - 18 * y) / 65535);
-- 
2.1.3

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[U-Boot] [PATCH 0/4] Update gdsys board support

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>




Dirk Eibach (4):
  ioep-fpga: Support intempo compression
  gdsys: osd: Allow osdsize on valid screens only
  strider: Support con-dp flavor
  strider: Support cpu-dp flavor

 board/gdsys/common/Makefile  |  1 +
 board/gdsys/common/ioep-fpga.c   | 17 +
 board/gdsys/common/osd.c |  3 ++
 board/gdsys/mpc8308/strider.c| 37 +++
 configs/strider_con_dp_defconfig | 20 +++
 configs/strider_cpu_dp_defconfig | 20 +++
 include/configs/strider.h| 77 
 include/gdsys_fpga.h |  2 +-
 8 files changed, 164 insertions(+), 13 deletions(-)
 create mode 100644 configs/strider_con_dp_defconfig
 create mode 100644 configs/strider_cpu_dp_defconfig

-- 
2.1.3

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[U-Boot] [PATCH] fw_env: Make env flash lock optional

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Since locking flash is horribly broken on some platforms,
offer an option to build fw_env tools without locking.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>

---

 tools/env/fw_env.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 06cf63d..e47232a 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -908,8 +908,10 @@ static int flash_write_buf (int dev, int fd, void *buf, 
size_t count,
return -1;
}
 
+#ifndef NO_MEMLOCK
if (mtd_type != MTD_ABSENT)
ioctl(fd, MEMLOCK, );
+#endif
 
processed  += erasesize;
block_seek = 0;
@@ -941,7 +943,9 @@ static int flash_flag_obsolete (int dev, int fd, off_t 
offset)
}
ioctl (fd, MEMUNLOCK, );
rc = write (fd, _flag, sizeof (obsolete_flag));
+#ifndef NO_MEMLOCK
ioctl (fd, MEMLOCK, );
+#endif
if (rc < 0)
perror ("Could not set obsolete flag");
 
-- 
2.1.3

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[U-Boot] [PATCH 3/4] strider: Support con-dp flavor

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

There is a new strider console flavor with DisplayPort
video.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/Makefile  |  1 +
 board/gdsys/mpc8308/strider.c| 37 ++
 configs/strider_con_dp_defconfig | 20 
 include/configs/strider.h| 67 +---
 include/gdsys_fpga.h |  2 +-
 5 files changed, 121 insertions(+), 6 deletions(-)
 create mode 100644 configs/strider_con_dp_defconfig

diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index ce23045..d4f0e70 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -16,3 +16,4 @@ obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o 
ioep-fpga.o fanctrl.o
 obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
 obj-$(CONFIG_STRIDER) += fanctrl.o
 obj-$(CONFIG_STRIDER_CON) += osd.o
+obj-$(CONFIG_STRIDER_CON_DP) += osd.o
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index eee582b..121977d 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -133,6 +133,9 @@ int last_stage_init(void)
unsigned char mclink_controllers_dp[] = { 0x24, 0x25, 0x26 };
 #endif
bool hw_type_cat = pca9698_get_value(0x20, 18);
+#ifdef CONFIG_STRIDER_CON_DP
+   bool is_dh = pca9698_get_value(0x20, 25);
+#endif
bool ch0_sgmii2_present = false;
 
/* Turn on Analog Devices ADV7611 */
@@ -140,6 +143,7 @@ int last_stage_init(void)
 
/* Turn on Parade DP501 */
pca9698_direction_output(0x20, 10, 1);
+   pca9698_direction_output(0x20, 11, 1);
 
ch0_sgmii2_present = !pca9698_get_value(0x20, 37);
 
@@ -202,6 +206,14 @@ int last_stage_init(void)
osd_probe(0);
 #endif
 
+#ifdef CONFIG_STRIDER_CON_DP
+   if (ioep_fpga_has_osd(0)) {
+   osd_probe(0);
+   if (is_dh)
+   osd_probe(4);
+   }
+#endif
+
 #ifdef CONFIG_STRIDER_CPU
ch7301_probe(0, false);
dp501_probe(0, false);
@@ -226,6 +238,13 @@ int last_stage_init(void)
if (ioep_fpga_has_osd(k))
osd_probe(k);
 #endif
+#ifdef CONFIG_STRIDER_CON_DP
+   if (ioep_fpga_has_osd(k)) {
+   osd_probe(k);
+   if (is_dh)
+   osd_probe(k + 4);
+   }
+#endif
 #ifdef CONFIG_STRIDER_CPU
if (!adv7611_probe(k))
printf("   Advantiv ADV7611 HDMI Receiver\n");
@@ -270,6 +289,24 @@ int fpga_gpio_get(unsigned int bus, int pin)
return val & pin;
 }
 
+#ifdef CONFIG_STRIDER_CON_DP
+void fpga_control_set(unsigned int bus, int pin)
+{
+   u16 val;
+
+   FPGA_GET_REG(bus, control, );
+   FPGA_SET_REG(bus, control, val | pin);
+}
+
+void fpga_control_clear(unsigned int bus, int pin)
+{
+   u16 val;
+
+   FPGA_GET_REG(bus, control, );
+   FPGA_SET_REG(bus, control, val & ~pin);
+}
+#endif
+
 void mpc8308_init(void)
 {
pca9698_direction_output(0x20, 26, 1);
diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig
new file mode 100644
index 000..b7a16b7
--- /dev/null
+++ b/configs/strider_con_dp_defconfig
@@ -0,0 +1,20 @@
+CONFIG_PPC=y
+CONFIG_MPC83xx=y
+CONFIG_TARGET_STRIDER=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_SYS_EXTRA_OPTIONS="STRIDER_CON_DP"
+CONFIG_HUSH_PARSER=y
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_CMD_MEMTEST=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_MII=y
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT2=y
+CONFIG_SYS_NS16550=y
+CONFIG_OF_LIBFDT=y
diff --git a/include/configs/strider.h b/include/configs/strider.h
index 5803b66..20ffc0c 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -22,6 +22,8 @@
 
 #ifdef CONFIG_STRIDER_CPU
 #define CONFIG_IDENT_STRING" strider cpu 0.01"
+#elif defined(CONFIG_STRIDER_CON_DP)
+#define CONFIG_IDENT_STRING" strider con dp 0.01"
 #else
 #define CONFIG_IDENT_STRING" strider con 0.01"
 #endif
@@ -225,15 +227,11 @@
 /*
  * FLASH on the Local Bus
  */
-#if 1
 #define CONFIG_SYS_FLASH_CFI   /* use the Common Flash Interface */
 #define CONFIG_FLASH_CFI_DRIVER/* use the CFI driver */
 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
 #define CONFIG_FLASH_CFI_LEGACY
 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
-#else
-#define CONFIG_SYS_NO_FLASH
-#endif
 
 #define CONFIG_SYS_FLASH_BASE  0xFE00 /* FLASH base address */
 #define CONFIG_SYS_FLASH_SIZE  8 /* FLASH size is up to 8M */
@@ -341,6 +339,22 @@
 #define CONFIG_SYS_I2C_IHS_SPEED_3 5
 #define CONFIG_SYS_I2C_IHS_SLAVE_3   

[U-Boot] [PATCH 1/4] ioep-fpga: Support intempo compression

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

There is a new "intempo" compression type that can
be reported on startup.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/ioep-fpga.c | 17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/board/gdsys/common/ioep-fpga.c b/board/gdsys/common/ioep-fpga.c
index 96f02d6..f72a01e 100644
--- a/board/gdsys/common/ioep-fpga.c
+++ b/board/gdsys/common/ioep-fpga.c
@@ -25,8 +25,9 @@ enum {
 
 enum {
COMPRESSION_NONE = 0,
-   COMPRESSION_TYPE1_DELTA = 1,
-   COMPRESSION_TYPE1_TYPE2_DELTA = 3,
+   COMPRESSION_TYPE_1 = 1,
+   COMPRESSION_TYPE_1_2 = 3,
+   COMPRESSION_TYPE_1_2_3 = 7,
 };
 
 enum {
@@ -158,12 +159,16 @@ void ioep_fpga_print_info(unsigned int fpga)
printf(" no compression");
break;
 
-   case COMPRESSION_TYPE1_DELTA:
-   printf(" type1-deltacompression");
+   case COMPRESSION_TYPE_1:
+   printf(" compression type1(delta)");
break;
 
-   case COMPRESSION_TYPE1_TYPE2_DELTA:
-   printf(" type1-deltacompression, type2-inlinecompression");
+   case COMPRESSION_TYPE_1_2:
+   printf(" compression type1(delta), type2(inline)");
+   break;
+
+   case COMPRESSION_TYPE_1_2_3:
+   printf(" compression type1(delta), type2(inline), 
type3(intempo)");
break;
 
default:
-- 
2.1.3

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[U-Boot] [PATCH 2/3] strider: Define pca593x widths

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 include/configs/strider.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/configs/strider.h b/include/configs/strider.h
index 8771cdc..1cae9ab 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -334,6 +334,11 @@
 #define CONFIG_SYS_FSL_I2C_OFFSET  0x3000
 
 #define CONFIG_PCA953X /* NXP PCA9554 */
+#define CONFIG_CMD_PCA953X
+#define CONFIG_CMD_PCA953X_INFO
+#define CONFIG_SYS_I2C_PCA953X_WIDTH{ {0x24, 16}, {0x25, 16}, {0x26, 16}, \
+ {0x3c, 8}, {0x3d, 8}, {0x3e, 8} }
+
 #define CONFIG_PCA9698 /* NXP PCA9698 */
 
 #define CONFIG_SYS_I2C_IHS
-- 
2.1.3

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[U-Boot] [PATCH 3/3] strider: use optimised bus timing for FPGA access

[dirk . eibach]

From: Reinhard Pfau <reinhard.p...@gdsys.cc>

Use optimised bus timing for FPGA access.

Signed-off-by: Reinhard Pfau <reinhard.p...@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 include/configs/strider.h | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/include/configs/strider.h b/include/configs/strider.h
index 1cae9ab..737c2ed 100644
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -283,14 +283,13 @@
| BR_PS_16  /* 16 bit port */ \
| BR_MS_GPCM/* MSEL = GPCM */ \
| BR_V) /* valid */
-#define CONFIG_SYS_OR1_PRELIM  (MEG_TO_AM(CONFIG_SYS_FPGA0_SIZE) \
+
+#define CONFIG_SYS_OR1_PRELIM   (MEG_TO_AM(CONFIG_SYS_FPGA0_SIZE) \
| OR_UPM_XAM \
| OR_GPCM_CSNT \
-   | OR_GPCM_ACS_DIV2 \
-   | OR_GPCM_XACS \
-   | OR_GPCM_SCY_15 \
-   | OR_GPCM_TRLX_SET \
-   | OR_GPCM_EHTR_SET)
+   | OR_GPCM_SCY_5 \
+   | OR_GPCM_TRLX_CLEAR \
+   | OR_GPCM_EHTR_CLEAR)
 
 #define CONFIG_SYS_FPGA_BASE(k)CONFIG_SYS_FPGA0_BASE
 #define CONFIG_SYS_FPGA_DONE(k)0x0010
-- 
2.1.3

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[U-Boot] [PATCH 1/3] strider: Add DP501 support for cpu model

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/dp501.c| 31 +++
 board/gdsys/common/dp501.h|  1 +
 board/gdsys/common/osd.c  | 22 +-
 board/gdsys/mpc8308/strider.c | 31 ++-
 4 files changed, 59 insertions(+), 26 deletions(-)

diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index d35aee0..54e7f63 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -12,6 +12,16 @@
 #include 
 #include 
 
+#define DP501_I2C_ADDR 0x08
+
+#ifdef CONFIG_SYS_DP501_I2C
+int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
+#endif
+
+#ifdef CONFIG_SYS_DP501_BASE
+int dp501_base[] = CONFIG_SYS_DP501_BASE;
+#endif
+
 static void dp501_setbits(u8 addr, u8 reg, u8 mask)
 {
u8 val;
@@ -125,3 +135,24 @@ void dp501_powerdown(u8 addr)
 {
dp501_setbits(addr, 0x0a, 0x30); /* power down encoder, standby mode */
 }
+
+
+int dp501_probe(unsigned screen, bool power)
+{
+#ifdef CONFIG_SYS_DP501_BASE
+   uint8_t dp501_addr = dp501_base[screen];
+#else
+   uint8_t dp501_addr = DP501_I2C_ADDR;
+#endif
+
+#ifdef CONFIG_SYS_DP501_I2C
+   i2c_set_bus_num(dp501_i2c[screen]);
+#endif
+
+   if (i2c_probe(dp501_addr))
+   return -1;
+
+   dp501_powerup(dp501_addr);
+
+   return 0;
+}
diff --git a/board/gdsys/common/dp501.h b/board/gdsys/common/dp501.h
index 8dc3215..b98b54e 100644
--- a/board/gdsys/common/dp501.h
+++ b/board/gdsys/common/dp501.h
@@ -26,5 +26,6 @@
 
 void dp501_powerup(u8 addr);
 void dp501_powerdown(u8 addr);
+int dp501_probe(unsigned screen, bool power);
 
 #endif
diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index 7444bee..4e292f5 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -24,8 +24,6 @@
 #define SIL1178_MASTER_I2C_ADDRESS 0x38
 #define SIL1178_SLAVE_I2C_ADDRESS 0x39
 
-#define DP501_I2C_ADDR 0x08
-
 #define PIXCLK_640_480_60 2518
 #define MAX_X_CHARS 53
 #define MAX_Y_CHARS 26
@@ -78,14 +76,6 @@ int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;
 int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C;
 #endif
 
-#ifdef CONFIG_SYS_DP501_I2C
-int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
-#endif
-
-#ifdef CONFIG_SYS_DP501_BASE
-int dp501_base[] = CONFIG_SYS_DP501_BASE;
-#endif
-
 #ifdef CONFIG_SYS_MPC92469AC
 static void mpc92469ac_calc_parameters(unsigned int fout,
unsigned int *post_div, unsigned int *feedback_div)
@@ -317,13 +307,6 @@ int osd_probe(unsigned screen)
int old_bus = i2c_get_bus_num();
bool pixclock_present = false;
bool output_driver_present = false;
-#ifdef CONFIG_SYS_DP501_I2C
-#ifdef CONFIG_SYS_DP501_BASE
-   uint8_t dp501_addr = dp501_base[screen];
-#else
-   uint8_t dp501_addr = DP501_I2C_ADDR;
-#endif
-#endif
 
OSD_GET_REG(0, version, );
OSD_GET_REG(0, features, );
@@ -393,11 +376,8 @@ int osd_probe(unsigned screen)
 #endif
 
 #ifdef CONFIG_SYS_DP501_I2C
-   i2c_set_bus_num(dp501_i2c[screen]);
-   if (!i2c_probe(dp501_addr)) {
-   dp501_powerup(dp501_addr);
+   if (!dp501_probe(screen, true))
output_driver_present = true;
-   }
 #endif
 
if (!output_driver_present)
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index ef5b6c0..eee582b 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -24,6 +24,7 @@
 
 #include "../common/adv7611.h"
 #include "../common/ch7301.h"
+#include "../common/dp501.h"
 #include "../common/ioep-fpga.h"
 #include "../common/mclink.h"
 #include "../common/osd.h"
@@ -127,7 +128,10 @@ int last_stage_init(void)
int slaves;
unsigned int k;
unsigned int mux_ch;
-   unsigned char mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
+   unsigned char mclink_controllers_dvi[] = { 0x3c, 0x3d, 0x3e };
+#ifdef CONFIG_STRIDER_CPU
+   unsigned char mclink_controllers_dp[] = { 0x24, 0x25, 0x26 };
+#endif
bool hw_type_cat = pca9698_get_value(0x20, 18);
bool ch0_sgmii2_present = false;
 
@@ -135,17 +139,25 @@ int last_stage_init(void)
pca9698_direction_output(0x20, 8, 0);
 
/* Turn on Parade DP501 */
-   pca9698_direction_output(0x20, 9, 1);
+   pca9698_direction_output(0x20, 10, 1);
 
ch0_sgmii2_present = !pca9698_get_value(0x20, 37);
 
/* wait for FPGA done, then reset FPGA */
-   for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
+   for (k = 0; k < ARRAY_SIZE(mclink_controllers_dvi); ++k) {
unsigned int ctr = 0;
+   unsigned char *mclink_controllers = mclink_controllers_dvi;
 
+#ifdef CONFIG_STRIDER_CPU
+   if (i2c_probe(mclink_controllers[k])) {
+   mclink_controllers = mclink_controllers_dp;
+   if (i2c_probe(mclink_contr

[U-Boot] [PATCH 0/3] Update gdsys board support

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>




Dirk Eibach (2):
  strider: Add DP501 support for cpu model
  strider: Define pca593x widths

Reinhard Pfau (1):
  strider: use optimised bus timing for FPGA access

 board/gdsys/common/dp501.c| 31 +++
 board/gdsys/common/dp501.h|  1 +
 board/gdsys/common/osd.c  | 22 +-
 board/gdsys/mpc8308/strider.c | 31 ++-
 include/configs/strider.h | 16 ++--
 5 files changed, 69 insertions(+), 32 deletions(-)

-- 
2.1.3

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Re: [U-Boot] [PATCH] iocon / bamboo: Drop CONFIG_SYS_LONGHELP

[Dirk Eibach]

2016-01-19 19:01 GMT+01:00 Tom Rini <tr...@konsulko.com>:
> The iocon and bamboo boards are often on the verge of, or going over,
> their allowed size limits depending on toolchain used.  If we turn off
> CONFIG_SYS_LONGHELP we can gain approximately 14KiB back.
>
> Cc: Dirk Eibach <eib...@gdsys.de>
> Cc: Stefan Roese <s...@denx.de>
> Signed-off-by: Tom Rini <tr...@konsulko.com>

Acked-by: Dirk Eibach <dirk.eib...@gdsys.cc>

Cheers
Dirk
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Re: [U-Boot] Pull request: u-boot-net

[Dirk Eibach]

Hi Bin,

> ...
> The simple fix is to change change iocon to a more larger size since
> it has a 64MB flash. Dirk, can you please comment?

The problem is the flash partition layout, coming from a time where
u-boot was an order of magnitude smaller :)

Updating partition layout in tens of thousands of devices in the field
is not an option for us.

Cheers
Dirk
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Re: [U-Boot] [PATCH] iocon: Disable FIT_VERBOSE

[Dirk Eibach]

Hi Tom,

2015-12-01 21:50 GMT+01:00 Tom Rini :
> In order to fit into image constraints again, remove this feature.
>
> Signed-off-by: Tom Rini 
> ---
>  configs/iocon_defconfig |1 +
>  include/configs/iocon.h |2 --
>  2 files changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig
> index bc5e026..a6532d1 100644
> --- a/configs/iocon_defconfig
> +++ b/configs/iocon_defconfig
> @@ -1,6 +1,7 @@
>  CONFIG_PPC=y
>  CONFIG_4xx=y
>  CONFIG_TARGET_IOCON=y
> +CONFIG_FIT=y
>  CONFIG_AUTOBOOT_KEYED=y
>  CONFIG_AUTOBOOT_STOP_STR=" "
>  # CONFIG_CMD_ELF is not set
> diff --git a/include/configs/iocon.h b/include/configs/iocon.h
> index 385a644..8663c17 100644
> --- a/include/configs/iocon.h
> +++ b/include/configs/iocon.h
> @@ -35,8 +35,6 @@
>  #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
>
>  /* new uImage format support */
> -#define CONFIG_FIT
> -#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
>  #define CONFIG_FIT_DISABLE_SHA256
>
>  #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
> --
> 1.7.9.5

NAK.
CONFIG_FIT is an essential feature for this board.
It is unnerving to find our older PPC boards failing to compile
because of size constraints after every new release. We are slowly
running out of features to cut. Maybe we have a bloat problem here?
I will have a look where we could squeeze out some bytes. I would hate
to drop support for boards that are still in production :(

BTW is there a specific reason there was no CC to the board maintainer?

Cheers
Dirk
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Re: [U-Boot] [PATCH] iocon: Disable FIT_VERBOSE

[Dirk Eibach]

Hi Tom,

2015-12-03 13:19 GMT+01:00 Tom Rini <tr...@konsulko.com>:
> On Thu, Dec 03, 2015 at 09:40:46AM +0100, Dirk Eibach wrote:
>> Hi Tom,
>>
>> 2015-12-01 21:50 GMT+01:00 Tom Rini <tr...@konsulko.com>:
>> > In order to fit into image constraints again, remove this feature.
>> >
>> > Signed-off-by: Tom Rini <tr...@konsulko.com>
>> > ---
>> >  configs/iocon_defconfig |1 +
>> >  include/configs/iocon.h |2 --
>> >  2 files changed, 1 insertion(+), 2 deletions(-)
>> >
>> > diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig
>> > index bc5e026..a6532d1 100644
>> > --- a/configs/iocon_defconfig
>> > +++ b/configs/iocon_defconfig
>> > @@ -1,6 +1,7 @@
>> >  CONFIG_PPC=y
>> >  CONFIG_4xx=y
>> >  CONFIG_TARGET_IOCON=y
>> > +CONFIG_FIT=y
>> >  CONFIG_AUTOBOOT_KEYED=y
>> >  CONFIG_AUTOBOOT_STOP_STR=" "
>> >  # CONFIG_CMD_ELF is not set
>> > diff --git a/include/configs/iocon.h b/include/configs/iocon.h
>> > index 385a644..8663c17 100644
>> > --- a/include/configs/iocon.h
>> > +++ b/include/configs/iocon.h
>> > @@ -35,8 +35,6 @@
>> >  #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 
>> > */
>> >
>> >  /* new uImage format support */
>> > -#define CONFIG_FIT
>> > -#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
>> >  #define CONFIG_FIT_DISABLE_SHA256
>> >
>> >  #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
>> > --
>> > 1.7.9.5
>>
>> NAK.
>> CONFIG_FIT is an essential feature for this board.
>
> FIT is enabled (and migrated to the config file), FIT_VERBOSE is
> removed.

Ooops. Sorry for the noise. So:
Reviewed-by:  Dirk Eibach <dirk.eib...@gdsys.cc>

Cheers
Dirk
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Re: [U-Boot] [PATCH v0 1/5] pci: mvebu: Fix Armada 38x support

[Dirk Eibach]

Hi Anton,

2015-11-17 13:55 GMT+01:00 Anton Schubert <anton.schub...@gmx.de>:
> Hi Dirk,
>
> 2015-10-28 16:44 GMT+01:00 <dirk.eib...@gdsys.cc>:
>>
>> From: Dirk Eibach <dirk.eib...@gdsys.cc>
>>
>> @@ -344,7 +345,6 @@ void pci_init_board(void)
>>
>> /* Don't read at all from pci registers if port power is
>> down */
>> if (pcie->lane == 0 && SELECT(soc_ctrl, pcie->port) == 0)
>> {
>> -   i += 3;
>> debug("%s: skipping port %d\n", __func__,
>> pcie->port);
>> continue;
>> }
>
>
> Is there a specific reason why you removed this line or was it just by
> mistake? Because I think doing so would break Armada XP in certain Serdes
> Configurations, as it doesn't like it's PCI registers being read if the port
> is off.

I assume the idea is to go to the next port if the current port is
disabled. But adding 3 to the index does not seem to be the right
thing to do, since Armada XP has ports with 4 lanes, but also with
ports with one lane.
I assume that iterating over all lanes would not be a problem, but by
mistake the pcie->lane == 0  was left in the condition. So this should
perform better:

/* Don't read at all from pci registers if port power is down */
if (SELECT(soc_ctrl, pcie->port) == 0) {
if (pcie->lane == 0)
debug("%s: skipping port %d\n", __func__, pcie->port);
continue;
}

What do you think?

Cheers
Dirk
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Re: [U-Boot] [PATCH v0 1/5] pci: mvebu: Fix Armada 38x support

[Dirk Eibach]

2015-11-18 14:23 GMT+01:00 Anton Schubert <anton.schub...@gmx.de>:
> Am 18.11.2015 um 13:48 schrieb Dirk Eibach:
>> I assume the idea is to go to the next port if the current port is
>> disabled. But adding 3 to the index does not seem to be the right
>> thing to do, since Armada XP has ports with 4 lanes, but also with
>> ports with one lane.
>> I assume that iterating over all lanes would not be a problem, but by
>> mistake the pcie->lane == 0  was left in the condition.
> Yeah you are right. The additional condition was superfluous in the
> original version.
>
>> So this should perform better:
>>
>> /* Don't read at all from pci registers if port power is down */
>> if (SELECT(soc_ctrl, pcie->port) == 0) {
>> if (pcie->lane == 0)
>> debug("%s: skipping port %d\n", __func__, pcie->port);
>> continue;
>> }
> I agree.

Fine. I will add this to the v1 series.

Cheers
Dirk
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Re: [U-Boot] [PATCH V2 05/12] board: gdsys: Move common headers to board-common directory

[Dirk Eibach]

Hi Nishanth,

Am 13.11.2015 06:43 schrieb "Nishanth Menon" :
>
> Header files can be located in a generic location without
> needing to reference them with ../common/

sorry, I just don't get it. You collect vendor specific include files
and put them in a common directory to avoid including relative paths.
What is the problem with realtive paths? And is it really a good idea
to throw random files together in a common directory? Our vendor
filenames are pretty generic, and you cannot determine which files are
from wich vendor. I am not convinced, that this is agood idea.

Cheers
Dirk
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Re: [U-Boot] [PATCH V2 05/12] board: gdsys: Move common headers to board-common directory

[Dirk Eibach]

Sorry for the noise,  I just saw that there is already some discussion on this.
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[U-Boot] [PATCH] i2c: Fix pca953x endianess issue

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

By reading 2 consecutive bytes from i2c to an u16 value
we have an endianess issue.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 drivers/gpio/pca953x.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index 7371cd4..c8c8637 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -88,8 +88,10 @@ static int pca953x_reg_write(uint8_t chip, uint addr, uint 
mask, uint data)
if (i2c_read(chip, addr << 1, 1, (u8*), 2))
return -1;
 
+   valw = le16_to_cpu(valw);
valw &= ~mask;
valw |= data;
+   valw = cpu_to_le16(valw);
 
return i2c_write(chip, addr << 1, 1, (u8*), 2);
}
@@ -107,7 +109,7 @@ static int pca953x_reg_read(uint8_t chip, uint addr, uint 
*data)
} else {
if (i2c_read(chip, addr << 1, 1, (u8*), 2))
return -1;
-   *data = (int)valw;
+   *data = (uint)le16_to_cpu(valw);
}
return 0;
 }
-- 
2.1.3

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Re: [U-Boot] [PATCH v0 3/5] arm: mvebu: Fix SAR1_CPU_CORE_MASK

[Dirk Eibach]

Hi Stefan,

2015-10-28 17:34 GMT+01:00 Stefan Roese :
> Thanks for spotting. Seems to be correct from the datasheet. How did
> you find this problem? What exactly did happen on your board?

I did a code review when we had some DDR3 problems on initial board
bringup. This issue had no visible consequences.

Cheers
Dirk
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Re: [U-Boot] [PATCH v0 4/5] arm: mvebu: Fix ddr3_init() cpu config

[Dirk Eibach]

Hi Stefan,

2015-10-28 17:35 GMT+01:00 Stefan Roese <s...@denx.de>:
> Hi Dirk,
>
> On 28.10.2015 16:44, dirk.eib...@gdsys.cc wrote:
>>
>> From: Dirk Eibach <dirk.eib...@gdsys.cc>
>>
>> Armada 38x has a maximum of two cores. Probably copy/paste
>> bug from Armada XP.
>>
>> Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
>> ---
>>
>>   drivers/ddr/marvell/a38x/ddr3_init.c | 2 --
>>   1 file changed, 2 deletions(-)
>>
>> diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c
>> b/drivers/ddr/marvell/a38x/ddr3_init.c
>> index d6ed8e0..cbfc58c 100644
>> --- a/drivers/ddr/marvell/a38x/ddr3_init.c
>> +++ b/drivers/ddr/marvell/a38x/ddr3_init.c
>> @@ -306,8 +306,6 @@ int ddr3_init(void)
>> SAR1_CPU_CORE_OFFSET;
>> switch (soc_num) {
>> case 0x3:
>> -   reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET);
>> -   reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET);
>> case 0x1:
>> reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET);
>> case 0x0:
>
>
> Shouldn't you remove the "case 0x3:" line as well?

Nope, according to Reset Configuration Pins table in the hardware spec
0 means Armada 380 (singlecore), 1 means Armada 385 (dualcore) and 3
means Armada 388 (dualcore). So handling soc_num 1 and 3 the same way
is perfectly allright.

Cheers
Dirk
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Re: [U-Boot] [PATCH v0 5/5] spi: Add support for Armada 38x second controller

[Dirk Eibach]

Hi Stefan,

2015-10-28 17:39 GMT+01:00 Stefan Roese :
> ...  And please note that you can use the
> runtime SoC detection for this:
>
> if (mvebu_soc_family() == MVEBU_SOC_A38X)
>
> So no new #idefs are needed in such places.

Just give me a quick update please.  Why is runtime detection better?
Is it about code coverage? What about binary footprint?

Cheers
Dirk
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Re: [U-Boot] [PATCH v0 5/5] spi: Add support for Armada 38x second controller

[Dirk Eibach]

Hi Stefan,

2015-10-29 11:02 GMT+01:00 Stefan Roese <s...@denx.de>:
> Hi Dirk,
>
> On 29.10.2015 10:54, Dirk Eibach wrote:
>>
>> 2015-10-28 17:39 GMT+01:00 Stefan Roese <s...@denx.de>:
>>>
>>> ...  And please note that you can use the
>>> runtime SoC detection for this:
>>>
>>>  if (mvebu_soc_family() == MVEBU_SOC_A38X)
>>>
>>> So no new #idefs are needed in such places.
>>
>>
>> Just give me a quick update please.  Why is runtime detection better?
>> Is it about code coverage? What about binary footprint?
>
>
> We try hard not to add more #idef's to the U-Boot source code
> if possible. This is definitely one of the reasons. Another
> is, that this runtime detection will enable support for
> multiple SoC's in one binary image. This is currently not the
> case, but we should try to work this way if its not too
> hard. And these places for the SoC detection are pretty easy
> to achieve.
>
> The image size will of course be affected. But this drawback is
> outweighed by the pros noted above. At least from my point of
> view.

Ok, that's the information I needed. I will adapt this to runtime detection.

Cheers
Dirk
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Re: [U-Boot] [PATCH v1 01/18] i2c: ihs_i2c: Dual channel support

[Dirk Eibach]

Hello Heiko,

2015-10-28 12:23 GMT+01:00 Heiko Schocher :
> I twould be nice to see a patch, which converts this driver to DM ;-)

me too ;)
Are there any known good examples?

Cheers
Dirk
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Re: [U-Boot] [PATCH v1 04/18] board: gdsys: Configure DP501 SPDIF input

[Dirk Eibach]

Hello Heiko,

2015-10-28 12:25 GMT+01:00 Heiko Schocher :
> Hmm... a lot of magical values ... some defines would be nice here.

Agreed. Documenting all the ugly mess Parade Technologies calls an
interface would result in a list of enums, that would be as long as
(at  least) the driver itself. So I decided to comment line by line
what happens. Since this is (at least as far I as know) the only open
source code for DP501, I hope one day I will find some time to invest
some more effort here.

Cheers
Dirk
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[U-Boot] MPC83xx maintainership

[Dirk Eibach]

Hello York,

is Kim Philipps still active as MPC83xx maintainer? Is he active at
freescale at all?
His mails are bouncing with "User unknown"...

Cheers
Dirk
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Re: [U-Boot] [PATCH v1 00/18] Fixes on gdsys boards and some new functionality

[Dirk Eibach]

Hi Simon,

2015-10-28 14:42 GMT+01:00 Simon Glass <s...@chromium.org>:
>> Dirk Eibach (17):
>>   i2c: ihs_i2c: Dual channel support
>>   i2c: ihs_i2c: Use macro bestpractices
>>   i2c: ihs_i2c: Fix hold_bus control
>>   board: gdsys: Configure DP501 SPDIF input
>>   board: gdsys: Increase DP501 I2C retry interval
>>   board: gdsys: Consider DP501 limits on link training
>>   dlvision-10g: Support displayport
>>   controlcenterd: Disable sideband clocks
>>   hrcon: Remove CH7301 configuration
>>   mpc83xx: Add strider board
>>   hrcon: Use generic ioep-fpga support
>>   hrcon: Fix videoboard i2c setup
>>   hrcon: Add support for the DH variant
>>   hrcon: Add fan controllers
>>   board: gdsys: Add osdsize command
>>   board: gdsys: Enable osd on output only
>>   i2c: soft_i2c: Fix bus indizes
>>
>> Reinhard Pfau (1):
>>   iocon: reset FPGAs in last_stage_init()
>
> Would this be a good opportunity to convert these boards over to
> driver model for I2C?

I'd love to, devicetrees are already there. But I am still working on
a concept to deploy this on *all* our boards and not only for I2C. So
please remain patient, I think this will be for the next merge window.

Cheers
Dirk
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[U-Boot] [PATCH v0 2/5] arm: mvebu: Add gpio support

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

mvebu gpio is based on kirkwood.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 arch/arm/mach-mvebu/include/mach/gpio.h | 41 +++--
 1 file changed, 39 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-mvebu/include/mach/gpio.h 
b/arch/arm/mach-mvebu/include/mach/gpio.h
index 09e3c50..cd869ee 100644
--- a/arch/arm/mach-mvebu/include/mach/gpio.h
+++ b/arch/arm/mach-mvebu/include/mach/gpio.h
@@ -1,10 +1,47 @@
 /*
- * SPDX-License-Identifier:  GPL-2.0+
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/*
+ * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
+ * Removed kernel level irq handling. Took some macros from kernel to
+ * allow build.
+ *
+ * Dieter Kiermaier dk-arm-li...@gmx.de
  */
 
 #ifndef __MACH_MVEBU_GPIO_H
 #define __MACH_MVEBU_GPIO_H
 
-/* Empty file - sdhci requires this. */
+/* got from kernel include/linux/bitops.h */
+#define BITS_PER_BYTE 8
+#define BITS_TO_LONGS(nr)  DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
+
+#define GPIO_MAX   59
+#define GPIO_OFF(pin)  (((pin) >> 5) ? 0x0040 : 0x)
+#define GPIO_OUT(pin)  (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x00)
+#define GPIO_IO_CONF(pin)  (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x04)
+#define GPIO_BLINK_EN(pin) (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x08)
+#define GPIO_IN_POL(pin)   (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x0c)
+#define GPIO_DATA_IN(pin)  (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x10)
+#define GPIO_EDGE_CAUSE(pin)   (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x14)
+#define GPIO_EDGE_MASK(pin)(MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x18)
+#define GPIO_LEVEL_MASK(pin)   (MVEBU_GPIO0_BASE + GPIO_OFF(pin) + 0x1c)
+
+/*
+ * Kirkwood-specific GPIO API
+ */
+
+void kw_gpio_set_valid(unsigned pin, int mode);
+int kw_gpio_is_valid(unsigned pin, int mode);
+int kw_gpio_direction_input(unsigned pin);
+int kw_gpio_direction_output(unsigned pin, int value);
+int kw_gpio_get_value(unsigned pin);
+void kw_gpio_set_value(unsigned pin, int value);
+void kw_gpio_set_blink(unsigned pin, int blink);
+void kw_gpio_set_unused(unsigned pin);
+
+#define GPIO_INPUT_OK  (1 << 0)
+#define GPIO_OUTPUT_OK (1 << 1)
 
 #endif
-- 
2.1.3

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[U-Boot] [PATCH v0 1/5] pci: mvebu: Fix Armada 38x support

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Armada 38x has 4 pci ports, not 3.
The optimization in pci_init_board() seems to assume,
that every port has 3 lanes. This is obviously wrong
and breaks support for Armada 38x.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 arch/arm/mach-mvebu/include/mach/soc.h |  1 +
 drivers/pci/pci_mvebu.c| 22 +++---
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-mvebu/include/mach/soc.h 
b/arch/arm/mach-mvebu/include/mach/soc.h
index 02c21bc..a1014b3 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -67,6 +67,7 @@
 #define MVEBU_USB20_BASE   (MVEBU_REGISTER(0x58000))
 #define MVEBU_EGIGA0_BASE  (MVEBU_REGISTER(0x7))
 #define MVEBU_EGIGA1_BASE  (MVEBU_REGISTER(0x74000))
+#define MVEBU_REG_PCIE0_BASE   (MVEBU_REGISTER(0x8))
 #define MVEBU_AXP_SATA_BASE(MVEBU_REGISTER(0xa))
 #define MVEBU_SATA0_BASE   (MVEBU_REGISTER(0xa8000))
 #define MVEBU_NAND_BASE(MVEBU_REGISTER(0xd))
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index fd2744d..50e6419 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -90,26 +90,27 @@ static void __iomem *mvebu_pcie_membase = (void __iomem 
*)MBUS_PCI_MEM_BASE;
 
 #if defined(CONFIG_ARMADA_38X)
 #define PCIE_BASE(if)  \
-   ((if) == 0 ?\
-MVEBU_REG_PCIE_BASE + 0x4 :\
-MVEBU_REG_PCIE_BASE + 0x4000 * (if))
+   ((if) == 0 ?\
+   MVEBU_REG_PCIE0_BASE : \
+   (MVEBU_REG_PCIE_BASE + 0x4000 * (if - 1)))
 
 /*
  * On A38x MV6820 these PEX ports are supported:
  *  0 - Port 0.0
- *  1 - Port 0.1
- *  2 - Port 0.2
+ *  1 - Port 1.0
+ *  2 - Port 2.0
+ *  3 - Port 3.0
  */
-#define MAX_PEX 3
+#define MAX_PEX 4
 static struct mvebu_pcie pcie_bus[MAX_PEX];
 
 static void mvebu_get_port_lane(struct mvebu_pcie *pcie, int pex_idx,
int *mem_target, int *mem_attr)
 {
-   u8 port[] = { 0, 1, 2 };
-   u8 lane[] = { 0, 0, 0 };
-   u8 target[] = { 8, 4, 4 };
-   u8 attr[] = { 0xe8, 0xe8, 0xd8 };
+   u8 port[] = { 0, 1, 2, 3 };
+   u8 lane[] = { 0, 0, 0, 0 };
+   u8 target[] = { 8, 4, 4, 4 };
+   u8 attr[] = { 0xe8, 0xe8, 0xd8, 0xb8 };
 
pcie->port = port[pex_idx];
pcie->lane = lane[pex_idx];
@@ -344,7 +345,6 @@ void pci_init_board(void)
 
/* Don't read at all from pci registers if port power is down */
if (pcie->lane == 0 && SELECT(soc_ctrl, pcie->port) == 0) {
-   i += 3;
debug("%s: skipping port %d\n", __func__, pcie->port);
continue;
}
-- 
2.1.3

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[U-Boot] [PATCH v0 4/5] arm: mvebu: Fix ddr3_init() cpu config

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Armada 38x has a maximum of two cores. Probably copy/paste
bug from Armada XP.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 drivers/ddr/marvell/a38x/ddr3_init.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/ddr/marvell/a38x/ddr3_init.c 
b/drivers/ddr/marvell/a38x/ddr3_init.c
index d6ed8e0..cbfc58c 100644
--- a/drivers/ddr/marvell/a38x/ddr3_init.c
+++ b/drivers/ddr/marvell/a38x/ddr3_init.c
@@ -306,8 +306,6 @@ int ddr3_init(void)
SAR1_CPU_CORE_OFFSET;
switch (soc_num) {
case 0x3:
-   reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET);
-   reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET);
case 0x1:
reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET);
case 0x0:
-- 
2.1.3

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[U-Boot] [PATCH v0 0/5] Some improvements for mvebu/a38x

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>




Dirk Eibach (5):
  pci: mvebu: Fix Armada 38x support
  arm: mvebu: Add gpio support
  arm: mvebu: Fix SAR1_CPU_CORE_MASK
  arm: mvebu: Fix ddr3_init() cpu config
  spi: Add support for Armada 38x second controller

 arch/arm/mach-mvebu/include/mach/gpio.h| 41 -
 arch/arm/mach-mvebu/include/mach/soc.h |  1 +
 .../ddr/marvell/a38x/ddr3_hws_hw_training_def.h|  7 +--
 drivers/ddr/marvell/a38x/ddr3_init.c   |  2 -
 drivers/pci/pci_mvebu.c| 22 -
 drivers/spi/kirkwood_spi.c | 52 +++---
 6 files changed, 98 insertions(+), 27 deletions(-)

-- 
2.1.3

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[U-Boot] [PATCH v0 5/5] spi: Add support for Armada 38x second controller

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Armada 38x has two spi controllers.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 drivers/spi/kirkwood_spi.c | 52 +++---
 1 file changed, 45 insertions(+), 7 deletions(-)

diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index e7b0982..200c391 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -18,17 +18,25 @@
 #endif
 #include 
 
-static struct kwspi_registers *spireg =
-   (struct kwspi_registers *)MVEBU_SPI_BASE;
-
 #ifdef CONFIG_KIRKWOOD
 static u32 cs_spi_mpp_back[2];
 #endif
 
+struct kwspi_slave {
+   struct spi_slave slave;
+   struct kwspi_registers *spireg;
+};
+
+static inline struct kwspi_slave *to_kwspi(struct spi_slave *slave)
+{
+   return container_of(slave, struct kwspi_slave, slave);
+}
+
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
 {
-   struct spi_slave *slave;
+   struct kwspi_slave *kwspi_slave;
+   struct kwspi_registers *spireg;
u32 data;
 #ifdef CONFIG_KIRKWOOD
static const u32 kwspi_mpp_config[2][2] = {
@@ -40,10 +48,27 @@ struct spi_slave *spi_setup_slave(unsigned int bus, 
unsigned int cs,
if (!spi_cs_is_valid(bus, cs))
return NULL;
 
-   slave = spi_alloc_slave_base(bus, cs);
-   if (!slave)
+   kwspi_slave = spi_alloc_slave(struct kwspi_slave, bus, cs);
+   if (!kwspi_slave)
return NULL;
 
+   switch (bus) {
+   case 0:
+   kwspi_slave->spireg = (struct kwspi_registers *)MVEBU_SPI_BASE;
+   break;
+#ifdef CONFIG_ARMADA_38X
+   /* Armada 38x has two SPI controllers */
+   case 1:
+   kwspi_slave->spireg =
+   (struct kwspi_registers *)(MVEBU_SPI_BASE + 0x80);
+   break;
+#endif
+   default:
+   return NULL;
+   }
+
+   spireg = kwspi_slave->spireg;
+
writel(KWSPI_SMEMRDY, >ctrl);
 
/* calculate spi clock prescaller using max_hz */
@@ -63,7 +88,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned 
int cs,
kirkwood_mpp_conf(kwspi_mpp_config[cs ? 1 : 0], cs_spi_mpp_back);
 #endif
 
-   return slave;
+   return _slave->slave;
 }
 
 void spi_free_slave(struct spi_slave *slave)
@@ -137,7 +162,12 @@ void spi_release_bus(struct spi_slave *slave)
  */
 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
+#ifdef CONFIG_ARMADA_38X
+   /* Armada 38x has two SPI controllers */
+   return (bus < 2) && (cs < 3);
+#else
return bus == 0 && (cs == 0 || cs == 1);
+#endif
 }
 #endif
 
@@ -147,11 +177,17 @@ void spi_init(void)
 
 void spi_cs_activate(struct spi_slave *slave)
 {
+   struct kwspi_slave *kwspi_slave = to_kwspi(slave);
+   struct kwspi_registers *spireg = kwspi_slave->spireg;
+
setbits_le32(>ctrl, KWSPI_CSN_ACT);
 }
 
 void spi_cs_deactivate(struct spi_slave *slave)
 {
+   struct kwspi_slave *kwspi_slave = to_kwspi(slave);
+   struct kwspi_registers *spireg = kwspi_slave->spireg;
+
clrbits_le32(>ctrl, KWSPI_CSN_ACT);
 }
 
@@ -160,6 +196,8 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, 
const void *dout,
 {
unsigned int tmpdout, tmpdin;
int tm, isread = 0;
+   struct kwspi_slave *kwspi_slave = to_kwspi(slave);
+   struct kwspi_registers *spireg = kwspi_slave->spireg;
 
debug("spi_xfer: slave %u:%u dout %p din %p bitlen %u\n",
  slave->bus, slave->cs, dout, din, bitlen);
-- 
2.1.3

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[U-Boot] [PATCH v0 3/5] arm: mvebu: Fix SAR1_CPU_CORE_MASK

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

SAR1_CPU_CORE_MASK was wrong, probably copy/paste
from another architecture.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h 
b/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
index 7500a72..06d0ab1 100644
--- a/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
+++ b/drivers/ddr/marvell/a38x/ddr3_hws_hw_training_def.h
@@ -23,8 +23,8 @@
 
 #define CPU_CONFIGURATION_REG(id)  (0x21800 + (id * 0x100))
 #define CPU_MRVL_ID_OFFSET 0x10
-#define SAR1_CPU_CORE_MASK 0x0018
-#define SAR1_CPU_CORE_OFFSET   3
+#define SAR1_CPU_CORE_MASK 0x3800
+#define SAR1_CPU_CORE_OFFSET   27
 
 #define NEW_FABRIC_TWSI_ADDR   0x4e
 #ifdef DB_784MP_GP
@@ -461,7 +461,4 @@
 #define CLK_CPU_2200   13
 #define CLK_CPU_2400   14
 
-#define SAR1_CPU_CORE_MASK 0x0018
-#define SAR1_CPU_CORE_OFFSET   3
-
 #endif /* _DDR3_HWS_HW_TRAINING_DEF_H */
-- 
2.1.3

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[U-Boot] [PATCH v1 03/18] i2c: ihs_i2c: Fix hold_bus control

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Bus has to be held for repeated start regardless of
read/write access.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 drivers/i2c/ihs_i2c.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index e001459..b05c15f 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -135,7 +135,7 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar 
chip, uint addr,
if (len <= 0)
return 1;
 
-   if (ihs_i2c_address(chip, addr, alen, !read))
+   if (ihs_i2c_address(chip, addr, alen, len))
return 1;
 
while (len) {
-- 
2.1.3

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[U-Boot] [PATCH v1 00/18] Fixes on gdsys boards and some new functionality

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>




Dirk Eibach (17):
  i2c: ihs_i2c: Dual channel support
  i2c: ihs_i2c: Use macro bestpractices
  i2c: ihs_i2c: Fix hold_bus control
  board: gdsys: Configure DP501 SPDIF input
  board: gdsys: Increase DP501 I2C retry interval
  board: gdsys: Consider DP501 limits on link training
  dlvision-10g: Support displayport
  controlcenterd: Disable sideband clocks
  hrcon: Remove CH7301 configuration
  mpc83xx: Add strider board
  hrcon: Use generic ioep-fpga support
  hrcon: Fix videoboard i2c setup
  hrcon: Add support for the DH variant
  hrcon: Add fan controllers
  board: gdsys: Add osdsize command
  board: gdsys: Enable osd on output only
  i2c: soft_i2c: Fix bus indizes

Reinhard Pfau (1):
  iocon: reset FPGAs in last_stage_init()

 README |   9 +
 arch/powerpc/cpu/mpc83xx/Kconfig   |   3 +
 board/gdsys/405ep/dlvision-10g.c   |  67 ++--
 board/gdsys/405ep/iocon.c  |   8 +-
 board/gdsys/common/Makefile|   9 +-
 board/gdsys/common/adv7611.c   | 177 ++
 board/gdsys/common/adv7611.h   |  13 +
 board/gdsys/common/ch7301.c|  64 
 board/gdsys/common/ch7301.h|  13 +
 board/gdsys/common/dp501.c |  27 +-
 board/gdsys/common/fanctrl.c   |  32 ++
 board/gdsys/common/fanctrl.h   |  13 +
 board/gdsys/common/ioep-fpga.c | 232 +
 board/gdsys/common/ioep-fpga.h |  14 +
 board/gdsys/common/osd.c   | 194 +++
 board/gdsys/common/osd.h   |   1 +
 board/gdsys/mpc8308/Kconfig|  13 +
 board/gdsys/mpc8308/MAINTAINERS|   4 +
 board/gdsys/mpc8308/Makefile   |   1 +
 board/gdsys/mpc8308/hrcon.c| 293 +++--
 board/gdsys/mpc8308/strider.c  | 479 +++
 board/gdsys/p1022/controlcenterd.c |   5 +
 configs/hrcon_dh_defconfig |   5 +
 configs/strider_con_defconfig  |   7 +
 configs/strider_cpu_defconfig  |   7 +
 drivers/i2c/ihs_i2c.c  |  82 -
 drivers/i2c/soft_i2c.c |  64 +++-
 include/configs/dlvision-10g.h |  18 +-
 include/configs/hrcon.h|  89 -
 include/configs/strider.h  | 653 +
 include/gdsys_fpga.h   | 101 +-
 31 files changed, 2310 insertions(+), 387 deletions(-)
 create mode 100644 board/gdsys/common/adv7611.c
 create mode 100644 board/gdsys/common/adv7611.h
 create mode 100644 board/gdsys/common/ch7301.c
 create mode 100644 board/gdsys/common/ch7301.h
 create mode 100644 board/gdsys/common/fanctrl.c
 create mode 100644 board/gdsys/common/fanctrl.h
 create mode 100644 board/gdsys/common/ioep-fpga.c
 create mode 100644 board/gdsys/common/ioep-fpga.h
 create mode 100644 board/gdsys/mpc8308/strider.c
 create mode 100644 configs/hrcon_dh_defconfig
 create mode 100644 configs/strider_con_defconfig
 create mode 100644 configs/strider_cpu_defconfig
 create mode 100644 include/configs/strider.h

-- 
2.1.3

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[U-Boot] [PATCH v1 12/18] hrcon: Use generic ioep-fpga support

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

The strider platform moved some generic code into ioep-fpga.c.
Make use of that on hrcon platform.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/Makefile|   2 +-
 board/gdsys/common/ioep-fpga.c |   5 +
 board/gdsys/mpc8308/hrcon.c| 241 +
 3 files changed, 9 insertions(+), 239 deletions(-)

diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index ba48e8b..0aa1849 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -12,6 +12,6 @@ obj-$(CONFIG_IO64) += miiphybb.o
 obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o ch7301.o
 obj-$(CONFIG_DLVISION_10G) += osd.o dp501.o
 obj-$(CONFIG_CONTROLCENTERD) += dp501.o
-obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o
+obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o
 obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
 obj-$(CONFIG_STRIDER_CON) += osd.o
diff --git a/board/gdsys/common/ioep-fpga.c b/board/gdsys/common/ioep-fpga.c
index 18d37dc..96f02d6 100644
--- a/board/gdsys/common/ioep-fpga.c
+++ b/board/gdsys/common/ioep-fpga.c
@@ -43,6 +43,7 @@ enum {
 enum {
RAM_DDR2_32 = 0,
RAM_DDR3_32 = 1,
+   RAM_DDR3_48 = 2,
 };
 
 enum {
@@ -215,6 +216,10 @@ void ioep_fpga_print_info(unsigned int fpga)
printf(", RAM 32 bit DDR3");
break;
 
+   case RAM_DDR3_48:
+   printf(", RAM 48 bit DDR3");
+   break;
+
default:
printf(", RAM %d(not supported)", feature_ramconfig);
break;
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index e4434b3..29c85c8 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -22,6 +22,7 @@
 
 #include 
 
+#include "../common/ioep-fpga.h"
 #include "../common/osd.h"
 #include "../common/mclink.h"
 #include "../common/phy.h"
@@ -36,57 +37,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #define MAX_MUX_CHANNELS 2
 
 enum {
-   UNITTYPE_MAIN_SERVER = 0,
-   UNITTYPE_MAIN_USER = 1,
-   UNITTYPE_VIDEO_SERVER = 2,
-   UNITTYPE_VIDEO_USER = 3,
-};
-
-enum {
-   UNITTYPEPCB_DVI = 0,
-   UNITTYPEPCB_DP_165 = 1,
-   UNITTYPEPCB_DP_300 = 2,
-   UNITTYPEPCB_HDMI = 3,
-};
-
-enum {
-   HWVER_100 = 0,
-   HWVER_110 = 1,
-};
-
-enum {
-   FPGA_HWVER_200 = 0,
-   FPGA_HWVER_210 = 1,
-};
-
-enum {
-   COMPRESSION_NONE = 0,
-   COMPRESSION_TYPE1_DELTA = 1,
-   COMPRESSION_TYPE1_TYPE2_DELTA = 3,
-};
-
-enum {
-   AUDIO_NONE = 0,
-   AUDIO_TX = 1,
-   AUDIO_RX = 2,
-   AUDIO_RXTX = 3,
-};
-
-enum {
-   SYSCLK_147456 = 0,
-};
-
-enum {
-   RAM_DDR2_32 = 0,
-   RAM_DDR3_32 = 1,
-};
-
-enum {
-   CARRIER_SPEED_1G = 0,
-   CARRIER_SPEED_2_5G = 1,
-};
-
-enum {
MCFPGA_DONE = 1 << 0,
MCFPGA_INIT_N = 1 << 1,
MCFPGA_PROGRAM_N = 1 << 2,
@@ -164,191 +114,6 @@ int checkboard(void)
return 0;
 }
 
-static void print_fpga_info(unsigned int fpga, bool rgmii2_present)
-{
-   u16 versions;
-   u16 fpga_version;
-   u16 fpga_features;
-   unsigned unit_type;
-   unsigned unit_type_pcb_video;
-   unsigned hardware_version;
-   unsigned feature_compression;
-   unsigned feature_osd;
-   unsigned feature_audio;
-   unsigned feature_sysclock;
-   unsigned feature_ramconfig;
-   unsigned feature_carrier_speed;
-   unsigned feature_carriers;
-   unsigned feature_video_channels;
-
-   FPGA_GET_REG(fpga, versions, );
-   FPGA_GET_REG(fpga, fpga_version, _version);
-   FPGA_GET_REG(fpga, fpga_features, _features);
-
-   unit_type = (versions & 0xf000) >> 12;
-   unit_type_pcb_video = (versions & 0x01c0) >> 6;
-   feature_compression = (fpga_features & 0xe000) >> 13;
-   feature_osd = fpga_features & (1<<11);
-   feature_audio = (fpga_features & 0x0600) >> 9;
-   feature_sysclock = (fpga_features & 0x0180) >> 7;
-   feature_ramconfig = (fpga_features & 0x0060) >> 5;
-   feature_carrier_speed = fpga_features & (1<<4);
-   feature_carriers = (fpga_features & 0x000c) >> 2;
-   feature_video_channels = fpga_features & 0x0003;
-
-   switch (unit_type) {
-   case UNITTYPE_MAIN_USER:
-   printf("Mainchannel");
-   break;
-
-   case UNITTYPE_VIDEO_USER:
-   printf("Videochannel");
-   break;
-
-   default:
-   printf("UnitType %d(not supported)", unit_type);
-   break;
-   }
-
-   if (unit_type == UNITTYPE_MAIN_USER) {
-   hardware_version =
- 

[U-Boot] [PATCH v1 08/18] controlcenterd: Disable sideband clocks

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/p1022/controlcenterd.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/board/gdsys/p1022/controlcenterd.c 
b/board/gdsys/p1022/controlcenterd.c
index 64d90dd..2f98e47 100644
--- a/board/gdsys/p1022/controlcenterd.c
+++ b/board/gdsys/p1022/controlcenterd.c
@@ -57,6 +57,8 @@ struct ihs_fpga {
u32 versions;   /* 0x0004 */
u32 fpga_version;   /* 0x0008 */
u32 fpga_features;  /* 0x000c */
+   u32 reserved[4];/* 0x0010 */
+   u32 control;/* 0x0020 */
 };
 
 #ifndef CONFIG_TRAILBLAZER
@@ -384,6 +386,9 @@ static void hydra_initialize(void)
fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0,
PCI_REGION_MEM);
 
+   /* disable sideband clocks */
+   writel(1, >control);
+
versions = readl(>versions);
fpga_version = readl(>fpga_version);
fpga_features = readl(>fpga_features);
-- 
2.1.3

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[U-Boot] [PATCH v1 04/18] board: gdsys: Configure DP501 SPDIF input

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/dp501.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index 7eb15ed..baace38 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -77,6 +77,8 @@ void dp501_powerup(u8 addr)
i2c_reg_write(addr + 2, 0x24, 0x02); /* clock input single ended */
 #endif
 
+   i2c_reg_write(addr + 2, 0x1a, 0x04); /* SPDIF input method TTL */
+
i2c_reg_write(addr + 2, 0x00, 0x18); /* driving strength */
i2c_reg_write(addr + 2, 0x03, 0x06); /* driving strength */
i2c_reg_write(addr, 0x2c, 0x00); /* configure N value */
-- 
2.1.3

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[U-Boot] [PATCH v1 14/18] hrcon: Add support for the DH variant

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

hrcon DH(dual head) has two video outputs per FPGA.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/osd.c| 111 +++-
 board/gdsys/mpc8308/MAINTAINERS |   1 +
 board/gdsys/mpc8308/hrcon.c |  31 +--
 configs/hrcon_dh_defconfig  |   5 ++
 drivers/i2c/soft_i2c.c  |  28 ++
 include/configs/hrcon.h |  56 
 include/gdsys_fpga.h|  30 +++
 7 files changed, 225 insertions(+), 37 deletions(-)
 create mode 100644 configs/hrcon_dh_defconfig

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index f11e26f..b288df8 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -28,12 +28,45 @@
 
 #define PIXCLK_640_480_60 2518
 
+#ifdef CONFIG_SYS_OSD_DH
+#define MAX_OSD_SCREEN 8
+#define OSD_DH_BASE 4
+#else
+#define MAX_OSD_SCREEN 4
+#endif
+
+#ifdef CONFIG_SYS_OSD_DH
+#define OSD_SET_REG(screen, fld, val) \
+   do { \
+   if (screen >= OSD_DH_BASE) \
+   FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
+   else \
+   FPGA_SET_REG(screen, osd0.fld, val); \
+   } while (0)
+#else
+#define OSD_SET_REG(screen, fld, val) \
+   FPGA_SET_REG(screen, osd0.fld, val)
+#endif
+
+#ifdef CONFIG_SYS_OSD_DH
+#define OSD_GET_REG(screen, fld, val) \
+   do {\
+   if (screen >= OSD_DH_BASE) \
+   FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
+   else \
+   FPGA_GET_REG(screen, osd0.fld, val); \
+   } while (0)
+#else
+#define OSD_GET_REG(screen, fld, val) \
+   FPGA_GET_REG(screen, osd0.fld, val)
+#endif
+
 unsigned int base_width;
 unsigned int base_height;
 size_t bufsize;
 u16 *buf;
 
-unsigned int max_osd_screen = CONFIG_SYS_OSD_SCREENS - 1;
+unsigned int osd_screen_mask = 0;
 
 #ifdef CONFIG_SYS_ICS8N3QV01_I2C
 int ics8n3qv01_i2c[] = CONFIG_SYS_ICS8N3QV01_I2C;
@@ -47,6 +80,9 @@ int sil1178_i2c[] = CONFIG_SYS_SIL1178_I2C;
 int dp501_i2c[] = CONFIG_SYS_DP501_I2C;
 #endif
 
+#ifdef CONFIG_SYS_DP501_BASE
+int dp501_base[] = CONFIG_SYS_DP501_BASE;
+#endif
 
 #ifdef CONFIG_SYS_MPC92469AC
 static void mpc92469ac_calc_parameters(unsigned int fout,
@@ -216,7 +252,15 @@ static int osd_write_videomem(unsigned screen, unsigned 
offset,
for (k = 0; k < charcount; ++k) {
if (offset + k >= bufsize)
return -1;
-   FPGA_SET_REG(screen, videomem[offset + k], data[k]);
+#ifdef CONFIG_SYS_OSD_DH
+   if (screen >= OSD_DH_BASE)
+   FPGA_SET_REG(screen - OSD_DH_BASE,
+videomem1[offset + k], data[k]);
+   else
+   FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
+#else
+   FPGA_SET_REG(screen, videomem0[offset + k], data[k]);
+#endif
}
 
return charcount;
@@ -226,7 +270,12 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
 {
unsigned screen;
 
-   for (screen = 0; screen <= max_osd_screen; ++screen) {
+   if (argc < 5) {
+   cmd_usage(cmdtp);
+   return 1;
+   }
+
+   for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
unsigned x;
unsigned y;
unsigned charcount;
@@ -236,10 +285,8 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
char *text;
int res;
 
-   if (argc < 5) {
-   cmd_usage(cmdtp);
-   return 1;
-   }
+   if (!(osd_screen_mask & (1 << screen)))
+   continue;
 
x = simple_strtoul(argv[1], NULL, 16);
y = simple_strtoul(argv[2], NULL, 16);
@@ -266,9 +313,16 @@ int osd_probe(unsigned screen)
int old_bus = i2c_get_bus_num();
bool pixclock_present = false;
bool output_driver_present = false;
+#ifdef CONFIG_SYS_DP501_I2C
+#ifdef CONFIG_SYS_DP501_BASE
+   uint8_t dp501_addr = dp501_base[screen];
+#else
+   uint8_t dp501_addr = DP501_I2C_ADDR;
+#endif
+#endif
 
-   FPGA_GET_REG(0, osd.version, );
-   FPGA_GET_REG(0, osd.features, );
+   OSD_GET_REG(0, version, );
+   OSD_GET_REG(0, features, );
 
base_width = ((features & 0x3f00) >> 8) + 1;
base_height = (features & 0x001f) + 1;
@@ -277,9 +331,15 @@ int osd_probe(unsigned screen)
if (!buf)
return -1;
 
+#ifdef CONFIG_SYS_OSD_DH
+   printf("OSD%d-%d: Digital-OSD version %01d.%02d, %d" "x%d characters\n",
+  (screen >= OSD_DH_BASE) ? (screen - OSD_DH_BAS

[U-Boot] [PATCH v1 18/18] i2c: soft_i2c: Fix bus indizes

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Since busses are sorted in alphabetical order, introducing more
than nine busses led to unexpected behaviour.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 drivers/i2c/soft_i2c.c | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index 5ffc974..05bf4d4 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -448,68 +448,68 @@ static int  soft_i2c_write(struct i2c_adapter *adap, 
uchar chip, uint addr,
 /*
  * Register soft i2c adapters
  */
-U_BOOT_I2C_ADAP_COMPLETE(soft0, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft00, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
 0)
 #if defined(I2C_SOFT_DECLARATIONS2)
-U_BOOT_I2C_ADAP_COMPLETE(soft1, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft01, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_2,
 CONFIG_SYS_I2C_SOFT_SLAVE_2,
 1)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS3)
-U_BOOT_I2C_ADAP_COMPLETE(soft2, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft02, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_3,
 CONFIG_SYS_I2C_SOFT_SLAVE_3,
 2)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS4)
-U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft03, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_4,
 CONFIG_SYS_I2C_SOFT_SLAVE_4,
 3)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS5)
-U_BOOT_I2C_ADAP_COMPLETE(soft4, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft04, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_5,
 CONFIG_SYS_I2C_SOFT_SLAVE_5,
 4)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS6)
-U_BOOT_I2C_ADAP_COMPLETE(soft5, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft05, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_6,
 CONFIG_SYS_I2C_SOFT_SLAVE_6,
 5)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS7)
-U_BOOT_I2C_ADAP_COMPLETE(soft6, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft06, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_7,
 CONFIG_SYS_I2C_SOFT_SLAVE_7,
 6)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS8)
-U_BOOT_I2C_ADAP_COMPLETE(soft7, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft07, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_8,
 CONFIG_SYS_I2C_SOFT_SLAVE_8,
 7)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS9)
-U_BOOT_I2C_ADAP_COMPLETE(soft8, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft08, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_9,
 CONFIG_SYS_I2C_SOFT_SLAVE_9,
 8)
 #endif
 #if defined(I2C_SOFT_DECLARATIONS10)
-U_BOOT_I2C_ADAP_COMPLETE(soft9, soft_i2c_init, soft_i2c_probe,
+U_BOOT_I2C_ADAP_COMPLETE(soft09, soft_i2c_init, soft_i2c_probe,
 soft_i2c_read, soft_i2c_write, NULL,
 CONFIG_SYS_I2C_SOFT_SPEED_10,
 CONFIG_SYS_I2C_SOFT_SLAVE_10,
-- 
2.1.3

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[U-Boot] [PATCH v1 06/18] board: gdsys: Consider DP501 limits on link training

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

DP501 only supports DP 1.1a.
Limit settings for link bandwidth and lane count to
values allowed by DP 1.1a.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/dp501.c | 22 --
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index 0389fd1..d35aee0 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -40,11 +40,29 @@ static int dp501_detect_cable_adapter(u8 addr)
 static void dp501_link_training(u8 addr)
 {
u8 val;
+   u8 link_bw;
+   u8 max_lane_cnt;
+   u8 lane_cnt;
 
val = i2c_reg_read(addr, 0x51);
-   i2c_reg_write(addr, 0x5d, val); /* set link_bw */
+   if (val >= 0x0a)
+   link_bw = 0x0a;
+   else
+   link_bw = 0x06;
+   if (link_bw != val)
+   printf("DP sink supports %d Mbps link rate, set to %d Mbps\n",
+  val * 270, link_bw * 270);
+   i2c_reg_write(addr, 0x5d, link_bw); /* set link_bw */
val = i2c_reg_read(addr, 0x52);
-   i2c_reg_write(addr, 0x5e, val); /* set lane_cnt */
+   max_lane_cnt = val & 0x1f;
+   if (max_lane_cnt >= 4)
+   lane_cnt = 4;
+   else
+   lane_cnt = max_lane_cnt;
+   if (lane_cnt != max_lane_cnt)
+   printf("DP sink supports %d lanes, set to %d lanes\n",
+  max_lane_cnt, lane_cnt);
+   i2c_reg_write(addr, 0x5e, lane_cnt | (val & 0x80)); /* set lane_cnt */
val = i2c_reg_read(addr, 0x53);
i2c_reg_write(addr, 0x5c, val); /* set downspread_ctl */
 
-- 
2.1.3

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[U-Boot] [PATCH v1 16/18] board: gdsys: Add osdsize command

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

osdsize adjusts the gdsys IHS osd dimensions in characters.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/osd.c | 38 ++
 1 file changed, 38 insertions(+)

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index b288df8..a774bec 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -27,6 +27,8 @@
 #define DP501_I2C_ADDR 0x08
 
 #define PIXCLK_640_480_60 2518
+#define MAX_X_CHARS 53
+#define MAX_Y_CHARS 26
 
 #ifdef CONFIG_SYS_OSD_DH
 #define MAX_OSD_SCREEN 8
@@ -464,6 +466,35 @@ int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
return 0;
 }
 
+int osd_size(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+   unsigned screen;
+   unsigned x;
+   unsigned y;
+
+   if (argc < 3) {
+   cmd_usage(cmdtp);
+   return 1;
+   }
+
+   x = simple_strtoul(argv[1], NULL, 16);
+   y = simple_strtoul(argv[2], NULL, 16);
+
+   if (!x || (x > 64) || (x > MAX_X_CHARS) ||
+   !y || (y > 32) || (y > MAX_Y_CHARS)) {
+   cmd_usage(cmdtp);
+   return 1;
+   }
+
+   for (screen = 0; screen < MAX_OSD_SCREEN; ++screen) {
+   OSD_SET_REG(screen, xy_size, ((x - 1) << 8) | (y - 1));
+   OSD_SET_REG(screen, x_pos, 32767 * (640 - 12 * x) / 65535);
+   OSD_SET_REG(screen, y_pos, 32767 * (480 - 18 * y) / 65535);
+   }
+
+   return 0;
+}
+
 U_BOOT_CMD(
osdw, 5, 0, osd_write,
"write 16-bit hex encoded buffer to osd memory",
@@ -475,3 +506,10 @@ U_BOOT_CMD(
"write ASCII buffer to osd memory",
"pos_x pos_y color text\n"
 );
+
+U_BOOT_CMD(
+   osdsize, 3, 0, osd_size,
+   "set OSD XY size in characters",
+   "size_x(max. " __stringify(MAX_X_CHARS)
+   ") size_y(max. " __stringify(MAX_Y_CHARS) ")\n"
+);
-- 
2.1.3

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[U-Boot] [PATCH v1 13/18] hrcon: Fix videoboard i2c setup

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

- i2c addresses for the videoboard port expanders were
  wrong.
- the fpga reset signal was not initialized.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/mpc8308/hrcon.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 29c85c8..5492718 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -119,7 +119,7 @@ int last_stage_init(void)
int slaves;
unsigned int k;
unsigned int mux_ch;
-   unsigned char mclink_controllers[] = { 0x24, 0x25, 0x26 };
+   unsigned char mclink_controllers[] = { 0x3c, 0x3d, 0x3e };
u16 fpga_features;
bool hw_type_cat = pca9698_get_value(0x20, 20);
bool ch0_rgmii2_present = false;
@@ -131,7 +131,7 @@ int last_stage_init(void)
 
ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
 
-   /* wait for FPGA done */
+   /* wait for FPGA done, then reset FPGA */
for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
unsigned int ctr = 0;
 
@@ -146,6 +146,12 @@ int last_stage_init(void)
break;
}
}
+
+   pca953x_set_dir(mclink_controllers[k], MCFPGA_RESET_N, 0);
+   pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, 0);
+   udelay(10);
+   pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N,
+   MCFPGA_RESET_N);
}
 
if (hw_type_cat) {
-- 
2.1.3

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[U-Boot] [PATCH v1 09/18] iocon: reset FPGAs in last_stage_init()

[dirk . eibach]

From: Reinhard Pfau <p...@gdsys.de>

- Reset FPGAs in last_stage_init()

Signed-off-by: Reinhard Pfau <p...@gdsys.de>
Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/405ep/iocon.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 3a51d86..7484624 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -381,7 +381,7 @@ int last_stage_init(void)
ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
}
 
-   /* wait for FPGA done */
+   /* wait for FPGA done; then reset FPGA */
for (k = 0; k < ARRAY_SIZE(mclink_controllers); ++k) {
unsigned int ctr = 0;
 
@@ -396,6 +396,12 @@ int last_stage_init(void)
break;
}
}
+
+   pca953x_set_dir(mclink_controllers[k], MCFPGA_RESET_N, 0);
+   pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N, 0);
+   udelay(10);
+   pca953x_set_val(mclink_controllers[k], MCFPGA_RESET_N,
+   MCFPGA_RESET_N);
}
 
if (!legacy && (feature_carrier_speed == CARRIER_SPEED_1G)) {
-- 
2.1.3

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[U-Boot] [PATCH v1 17/18] board: gdsys: Enable osd on output only

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/osd.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index a774bec..7444bee 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -303,6 +303,8 @@ static int osd_print(cmd_tbl_t *cmdtp, int flag, int argc, 
char * const argv[])
res = osd_write_videomem(screen, y * base_width + x, buf, len);
if (res < 0)
return res;
+
+   OSD_SET_REG(screen, control, 0x0049);
}
 
return 0;
@@ -401,8 +403,6 @@ int osd_probe(unsigned screen)
if (!output_driver_present)
printf("   no output driver found\n");
 
-   OSD_SET_REG(screen, control, 0x0049);
-
OSD_SET_REG(screen, xy_size, ((32 - 1) << 8) | (16 - 1));
OSD_SET_REG(screen, x_pos, 0x007f);
OSD_SET_REG(screen, y_pos, 0x005f);
@@ -461,6 +461,8 @@ int osd_write(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
osd_write_videomem(screen, offset, buffer,
wp - buffer);
}
+
+   OSD_SET_REG(screen, control, 0x0049);
}
 
return 0;
-- 
2.1.3

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[U-Boot] [PATCH v1 15/18] hrcon: Add fan controllers

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/Makefile   |  3 ++-
 board/gdsys/common/fanctrl.c  | 32 +++
 board/gdsys/common/fanctrl.h  | 13 +
 board/gdsys/mpc8308/hrcon.c   | 11 +++
 board/gdsys/mpc8308/strider.c | 24 +--
 drivers/i2c/soft_i2c.c| 28 +++
 include/configs/hrcon.h   | 44 +++
 7 files changed, 119 insertions(+), 36 deletions(-)
 create mode 100644 board/gdsys/common/fanctrl.c
 create mode 100644 board/gdsys/common/fanctrl.h

diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index 0aa1849..ce23045 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_IO64) += miiphybb.o
 obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o ch7301.o
 obj-$(CONFIG_DLVISION_10G) += osd.o dp501.o
 obj-$(CONFIG_CONTROLCENTERD) += dp501.o
-obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o
+obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o ioep-fpga.o fanctrl.o
 obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
+obj-$(CONFIG_STRIDER) += fanctrl.o
 obj-$(CONFIG_STRIDER_CON) += osd.o
diff --git a/board/gdsys/common/fanctrl.c b/board/gdsys/common/fanctrl.c
new file mode 100644
index 000..44569bb
--- /dev/null
+++ b/board/gdsys/common/fanctrl.c
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2015
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+enum {
+   FAN_CONFIG = 0x03,
+   FAN_TACHLIM_LSB = 0x48,
+   FAN_TACHLIM_MSB = 0x49,
+   FAN_PWM_FREQ = 0x4D,
+};
+
+void init_fan_controller(u8 addr)
+{
+   int val;
+
+   /* set PWM Frequency to 2.5% resolution */
+   i2c_reg_write(addr, FAN_PWM_FREQ, 20);
+
+   /* set Tachometer Limit */
+   i2c_reg_write(addr, FAN_TACHLIM_LSB, 0x10);
+   i2c_reg_write(addr, FAN_TACHLIM_MSB, 0x0a);
+
+   /* enable Tach input */
+   val = i2c_reg_read(addr, FAN_CONFIG) | 0x04;
+   i2c_reg_write(addr, FAN_CONFIG, val);
+}
diff --git a/board/gdsys/common/fanctrl.h b/board/gdsys/common/fanctrl.h
new file mode 100644
index 000..12bc850
--- /dev/null
+++ b/board/gdsys/common/fanctrl.h
@@ -0,0 +1,13 @@
+/*
+ * (C) Copyright 2015
+ * Dirk Eibach,  Guntermann & Drunck GmbH, dirk.eib...@gdsys.cc
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _FANCTRL_H_
+#define _FANCTRL_H_
+
+void init_fan_controller(u8 addr);
+
+#endif
diff --git a/board/gdsys/mpc8308/hrcon.c b/board/gdsys/mpc8308/hrcon.c
index 3cc03cb..880b638 100644
--- a/board/gdsys/mpc8308/hrcon.c
+++ b/board/gdsys/mpc8308/hrcon.c
@@ -26,6 +26,7 @@
 #include "../common/osd.h"
 #include "../common/mclink.h"
 #include "../common/phy.h"
+#include "../common/fanctrl.h"
 
 #include 
 #include 
@@ -52,6 +53,11 @@ enum {
 unsigned int mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
+struct {
+   u8 bus;
+   u8 addr;
+} hrcon_fans[] = CONFIG_HRCON_FANS;
+
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
 {
int res;
@@ -199,6 +205,11 @@ int last_stage_init(void)
}
}
 
+   for (k = 0; k < ARRAY_SIZE(hrcon_fans); ++k) {
+   i2c_set_bus_num(hrcon_fans[k].bus);
+   init_fan_controller(hrcon_fans[k].addr);
+   }
+
return 0;
 }
 
diff --git a/board/gdsys/mpc8308/strider.c b/board/gdsys/mpc8308/strider.c
index 8e5d5de..ef5b6c0 100644
--- a/board/gdsys/mpc8308/strider.c
+++ b/board/gdsys/mpc8308/strider.c
@@ -28,6 +28,7 @@
 #include "../common/mclink.h"
 #include "../common/osd.h"
 #include "../common/phy.h"
+#include "../common/fanctrl.h"
 
 #include 
 #include 
@@ -51,13 +52,6 @@ enum {
GPIO_MDIO = 1 << 15,
 };
 
-enum {
-   FAN_CONFIG = 0x03,
-   FAN_TACHLIM_LSB = 0x48,
-   FAN_TACHLIM_MSB = 0x49,
-   FAN_PWM_FREQ = 0x4D,
-};
-
 unsigned int mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
@@ -128,22 +122,6 @@ int checkboard(void)
return 0;
 }
 
-static void init_fan_controller(u8 addr)
-{
-   int val;
-
-   /* set PWM Frequency to 2.5% resolution */
-   i2c_reg_write(addr, FAN_PWM_FREQ, 20);
-
-   /* set Tachometer Limit */
-   i2c_reg_write(addr, FAN_TACHLIM_LSB, 0x10);
-   i2c_reg_write(addr, FAN_TACHLIM_MSB, 0x0a);
-
-   /* enable Tach input */
-   val = i2c_reg_read(addr, FAN_CONFIG) | 0x04;
-   i2c_reg_write(addr, FAN_CONFIG, val);
-}
-
 int last_stage_init(void)
 {
int slaves;
diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c
index b000a0e..5ffc974 100644
--- a/drivers/i2c/soft_i2c.c
+++ b/drivers/i2c/soft_i2c.c
@@ -501,3 +501,31 @@ U_BOOT_

[U-Boot] [PATCH v1 02/18] i2c: ihs_i2c: Use macro bestpractices

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Reinhard Pfau complained that macros in ihs_i2c do not follow best practices.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 drivers/i2c/ihs_i2c.c | 24 ++--
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index 737beaf..e001459 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -13,24 +13,28 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifdef CONFIG_SYS_I2C_IHS_DUAL
 #define I2C_SET_REG(fld, val) \
-   { if (I2C_ADAP_HWNR & 0x10) \
-   FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
-   else \
-   FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); }
+   do { \
+   if (I2C_ADAP_HWNR & 0x10) \
+   FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
+   else \
+   FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
+   } while (0)
 #else
 #define I2C_SET_REG(fld, val) \
-   FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val);
+   FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
 #endif
 
 #ifdef CONFIG_SYS_I2C_IHS_DUAL
 #define I2C_GET_REG(fld, val) \
-   { if (I2C_ADAP_HWNR & 0x10) \
-   FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
-   else \
-   FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); }
+   do {\
+   if (I2C_ADAP_HWNR & 0x10) \
+   FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
+   else \
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); \
+   } while (0)
 #else
 #define I2C_GET_REG(fld, val) \
-   FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val);
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val)
 #endif
 
 enum {
-- 
2.1.3

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[U-Boot] [PATCH v1 01/18] i2c: ihs_i2c: Dual channel support

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Support two i2c masters per FPGA.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 README|  9 ++
 drivers/i2c/ihs_i2c.c | 76 ++-
 include/gdsys_fpga.h  | 12 
 3 files changed, 79 insertions(+), 18 deletions(-)

diff --git a/README b/README
index 0dc657d..25bd711 100644
--- a/README
+++ b/README
@@ -2446,6 +2446,15 @@ CBFS (Coreboot Filesystem) support
  - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
  - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
  - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
+ - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
+ - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
+ - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
+ - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
+ - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
+ - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
+ - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
+ - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
+ - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
 
additional defines:
 
diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c
index 19fbe59..737beaf 100644
--- a/drivers/i2c/ihs_i2c.c
+++ b/drivers/i2c/ihs_i2c.c
@@ -11,6 +11,28 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_SYS_I2C_IHS_DUAL
+#define I2C_SET_REG(fld, val) \
+   { if (I2C_ADAP_HWNR & 0x10) \
+   FPGA_SET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
+   else \
+   FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val); }
+#else
+#define I2C_SET_REG(fld, val) \
+   FPGA_SET_REG(I2C_ADAP_HWNR, i2c0.fld, val);
+#endif
+
+#ifdef CONFIG_SYS_I2C_IHS_DUAL
+#define I2C_GET_REG(fld, val) \
+   { if (I2C_ADAP_HWNR & 0x10) \
+   FPGA_GET_REG(I2C_ADAP_HWNR & 0xf, i2c1.fld, val); \
+   else \
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val); }
+#else
+#define I2C_GET_REG(fld, val) \
+   FPGA_GET_REG(I2C_ADAP_HWNR, i2c0.fld, val);
+#endif
+
 enum {
I2CINT_ERROR_EV = 1 << 13,
I2CINT_TRANSMIT_EV = 1 << 14,
@@ -29,14 +51,14 @@ static int wait_for_int(bool read)
u16 val;
unsigned int ctr = 0;
 
-   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, );
+   I2C_GET_REG(interrupt_status, );
while (!(val & (I2CINT_ERROR_EV
   | (read ? I2CINT_RECEIVE_EV : I2CINT_TRANSMIT_EV {
udelay(10);
if (ctr++ > 5000) {
return 1;
}
-   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, );
+   I2C_GET_REG(interrupt_status, );
}
 
return (val & I2CINT_ERROR_EV) ? 1 : 0;
@@ -47,30 +69,30 @@ static int ihs_i2c_transfer(uchar chip, uchar *buffer, int 
len, bool read,
 {
u16 val;
 
-   FPGA_SET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, I2CINT_ERROR_EV
+   I2C_SET_REG(interrupt_status, I2CINT_ERROR_EV
 | I2CINT_RECEIVE_EV | I2CINT_TRANSMIT_EV);
-   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.interrupt_status, );
+   I2C_GET_REG(interrupt_status, );
 
if (!read && len) {
val = buffer[0];
 
if (len > 1)
val |= buffer[1] << 8;
-   FPGA_SET_REG(I2C_ADAP_HWNR, i2c.write_mailbox_ext, val);
+   I2C_SET_REG(write_mailbox_ext, val);
}
 
-   FPGA_SET_REG(I2C_ADAP_HWNR, i2c.write_mailbox,
-I2CMB_NATIVE
-| (read ? 0 : I2CMB_WRITE)
-| (chip << 1)
-| ((len > 1) ? I2CMB_2BYTE : 0)
-| (is_last ? 0 : I2CMB_HOLD_BUS));
+   I2C_SET_REG(write_mailbox,
+   I2CMB_NATIVE
+   | (read ? 0 : I2CMB_WRITE)
+   | (chip << 1)
+   | ((len > 1) ? I2CMB_2BYTE : 0)
+   | (is_last ? 0 : I2CMB_HOLD_BUS));
 
if (wait_for_int(read))
return 1;
 
if (read) {
-   FPGA_GET_REG(I2C_ADAP_HWNR, i2c.read_mailbox_ext, );
+   I2C_GET_REG(read_mailbox_ext, );
buffer[0] = val & 0xff;
if (len > 1)
buffer[1] = val >> 8;
@@ -163,7 +185,7 @@ static int ihs_i2c_write(struct i2c_adapter *adap, uchar 
chip, uint addr,
 }
 
 static unsigned int ihs_i2c_set_bus_speed(struct i2c_adapter *adap,
-unsigned int speed)
+ unsigned int speed)
 {
if (speed != adap->speed)
return 1;
@@ -179,6 +201,13 @@ U_BO

[U-Boot] [PATCH v1 10/18] hrcon: Remove CH7301 configuration

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

hrcon has no CH7301 DVI-transmitter.
Probably not removed when copying from iocon.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 include/configs/hrcon.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h
index 558edfc..f1a69a3 100644
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -361,7 +361,6 @@
 #define CONFIG_SYS_I2C_SOFT_SLAVE_40x7F
 
 #define CONFIG_SYS_ICS8N3QV01_I2C  {5, 6, 7, 8}
-#define CONFIG_SYS_CH7301_I2C  {5, 6, 7, 8}
 #define CONFIG_SYS_DP501_I2C   {1, 2, 3, 4}
 
 #ifndef __ASSEMBLY__
-- 
2.1.3

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[U-Boot] [PATCH v1 11/18] mpc83xx: Add strider board

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

The gdsys strider board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x 10/100 Mbit/s Ethernet (optional)
- Lattice ECP3 FPGA connected via eLBC

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 arch/powerpc/cpu/mpc83xx/Kconfig |   3 +
 board/gdsys/common/Makefile  |   4 +-
 board/gdsys/common/adv7611.c | 177 +++
 board/gdsys/common/adv7611.h |  13 +
 board/gdsys/common/ch7301.c  |  64 
 board/gdsys/common/ch7301.h  |  13 +
 board/gdsys/common/ioep-fpga.c   | 227 ++
 board/gdsys/common/ioep-fpga.h   |  14 +
 board/gdsys/common/osd.c |  43 +--
 board/gdsys/common/osd.h |   1 +
 board/gdsys/mpc8308/Kconfig  |  13 +
 board/gdsys/mpc8308/MAINTAINERS  |   3 +
 board/gdsys/mpc8308/Makefile |   1 +
 board/gdsys/mpc8308/strider.c| 501 ++
 configs/strider_con_defconfig|   7 +
 configs/strider_cpu_defconfig|   7 +
 include/configs/strider.h| 653 +++
 include/gdsys_fpga.h |  63 
 18 files changed, 1766 insertions(+), 41 deletions(-)
 create mode 100644 board/gdsys/common/adv7611.c
 create mode 100644 board/gdsys/common/adv7611.h
 create mode 100644 board/gdsys/common/ch7301.c
 create mode 100644 board/gdsys/common/ch7301.h
 create mode 100644 board/gdsys/common/ioep-fpga.c
 create mode 100644 board/gdsys/common/ioep-fpga.h
 create mode 100644 board/gdsys/mpc8308/strider.c
 create mode 100644 configs/strider_con_defconfig
 create mode 100644 configs/strider_cpu_defconfig
 create mode 100644 include/configs/strider.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 3fb901f..3ea62ca 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -67,6 +67,9 @@ config TARGET_TQM834X
 config TARGET_HRCON
bool "Support hrcon"
 
+config TARGET_STRIDER
+   bool "Support strider"
+
 endchoice
 
 source "board/esd/vme8349/Kconfig"
diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index 95e41de..ba48e8b 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -9,7 +9,9 @@ obj-$(CONFIG_SYS_FPGA_COMMON) += fpga.o
 obj-$(CONFIG_CMD_IOLOOP) += cmd_ioloop.o
 obj-$(CONFIG_IO) += miiphybb.o
 obj-$(CONFIG_IO64) += miiphybb.o
-obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o
+obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o ch7301.o
 obj-$(CONFIG_DLVISION_10G) += osd.o dp501.o
 obj-$(CONFIG_CONTROLCENTERD) += dp501.o
 obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o
+obj-$(CONFIG_STRIDER) += mclink.o dp501.o phy.o ioep-fpga.o adv7611.o ch7301.o
+obj-$(CONFIG_STRIDER_CON) += osd.o
diff --git a/board/gdsys/common/adv7611.c b/board/gdsys/common/adv7611.c
new file mode 100644
index 000..b728274
--- /dev/null
+++ b/board/gdsys/common/adv7611.c
@@ -0,0 +1,177 @@
+/*
+ * (C) Copyright 2014
+ * Dirk Eibach, Guntermann & Drunck GmbH, eib...@gdsys.de
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include 
+#include 
+
+#define ADV7611_I2C_ADDR 0x4c
+#define ADV7611_RDINFO 0x2051
+
+/*
+ * ADV7611 I2C Addresses in u-boot notation
+ */
+enum {
+   CP_I2C_ADDR = 0x22,
+   DPLL_I2C_ADDR = 0x26,
+   KSV_I2C_ADDR = 0x32,
+   HDMI_I2C_ADDR = 0x34,
+   EDID_I2C_ADDR = 0x36,
+   INFOFRAME_I2C_ADDR = 0x3e,
+   CEC_I2C_ADDR = 0x40,
+   IO_I2C_ADDR = ADV7611_I2C_ADDR,
+};
+
+/*
+ * Global Control Registers
+ */
+enum {
+   IO_RD_INFO_MSB = 0xea,
+   IO_RD_INFO_LSB = 0xeb,
+   IO_CEC_ADDR = 0xf4,
+   IO_INFOFRAME_ADDR = 0xf5,
+   IO_DPLL_ADDR = 0xf8,
+   IO_KSV_ADDR = 0xf9,
+   IO_EDID_ADDR = 0xfa,
+   IO_HDMI_ADDR = 0xfb,
+   IO_CP_ADDR = 0xfd,
+};
+
+int adv7611_i2c[] = CONFIG_SYS_ADV7611_I2C;
+
+int adv7611_probe(unsigned int screen)
+{
+   int old_bus = i2c_get_bus_num();
+   unsigned int rd_info;
+   int res = 0;
+
+   i2c_set_bus_num(adv7611_i2c[screen]);
+
+   rd_info = (i2c_reg_read(IO_I2C_ADDR, IO_RD_INFO_MSB) << 8)
+ | i2c_reg_read(IO_I2C_ADDR, IO_RD_INFO_LSB);
+
+   if (rd_info != ADV7611_RDINFO) {
+   res = -1;
+   goto out;
+   }
+
+   /*
+* set I2C addresses to default values
+*/
+   i2c_reg_write(IO_I2C_ADDR, IO_CEC_ADDR, CEC_I2C_ADDR << 1);
+   i2c_reg_write(IO_I2C_ADDR, IO_INFOFRAME_ADDR, INFOFRAME_I2C_ADDR << 1);
+   i2c_reg_write(IO_I2C_ADDR, IO_DPLL_ADDR, DPLL_I2C_ADDR << 1);
+   i2c_reg_write(IO_I2C_ADDR, IO_KSV_ADDR, KSV_I2C_ADDR << 1);
+   i2c_reg_write(IO_I2C_ADDR, IO_EDID_ADDR, EDID_I2C_ADDR << 1);
+   i2c_reg_write(IO_I2C_ADDR, IO_HDMI_ADDR, HDMI_I2C_ADDR << 1);
+   i2c_reg_write(IO_I2C_ADDR, IO_CP_ADDR, CP_I2C_ADDR << 

[U-Boot] [PATCH v1 07/18] dlvision-10g: Support displayport

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

Support dlvision-10g hardware with displayport output.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/405ep/dlvision-10g.c | 67 ++--
 board/gdsys/common/Makefile  |  2 +-
 include/configs/dlvision-10g.h   | 18 ---
 3 files changed, 51 insertions(+), 36 deletions(-)

diff --git a/board/gdsys/405ep/dlvision-10g.c b/board/gdsys/405ep/dlvision-10g.c
index 35dfbbc..54c7eb3 100644
--- a/board/gdsys/405ep/dlvision-10g.c
+++ b/board/gdsys/405ep/dlvision-10g.c
@@ -25,17 +25,19 @@
 #define LATCH2_MC2_PRESENT_N 0x0080
 
 enum {
-   UNITTYPE_VIDEO_USER = 0,
-   UNITTYPE_MAIN_USER = 1,
-   UNITTYPE_VIDEO_SERVER = 2,
-   UNITTYPE_MAIN_SERVER = 3,
+   UNITTYPE_MAIN = 1<<0,
+   UNITTYPE_SERVER = 1<<1,
+   UNITTYPE_DISPLAYPORT = 1<<2,
 };
 
 enum {
HWVER_101 = 0,
HWVER_110 = 1,
-   HWVER_120 = 2,
-   HWVER_130 = 3,
+   HWVER_130 = 2,
+   HWVER_140 = 3,
+   HWVER_150 = 4,
+   HWVER_160 = 5,
+   HWVER_170 = 6,
 };
 
 enum {
@@ -121,43 +123,48 @@ static void print_fpga_info(unsigned dev)
feature_carriers = (fpga_features >> 2) & 0x0003;
feature_video_channels = fpga_features & 0x0003;
 
-   switch (unit_type) {
-   case UNITTYPE_VIDEO_USER:
-   printf("Videochannel Userside");
-   break;
+   if (unit_type & UNITTYPE_MAIN)
+   printf("Mainchannel ");
+   else
+   printf("Videochannel ");
 
-   case UNITTYPE_MAIN_USER:
-   printf("Mainchannel Userside");
-   break;
+   if (unit_type & UNITTYPE_SERVER)
+   printf("Serverside ");
+   else
+   printf("Userside ");
+
+   if (unit_type & UNITTYPE_DISPLAYPORT)
+   printf("DisplayPort");
+   else
+   printf("DVI-DL");
 
-   case UNITTYPE_VIDEO_SERVER:
-   printf("Videochannel Serverside");
+   switch (hardware_version) {
+   case HWVER_101:
+   printf(" HW-Ver 1.01\n");
break;
 
-   case UNITTYPE_MAIN_SERVER:
-   printf("Mainchannel Serverside");
+   case HWVER_110:
+   printf(" HW-Ver 1.10-1.20\n");
break;
 
-   default:
-   printf("UnitType %d(not supported)", unit_type);
+   case HWVER_130:
+   printf(" HW-Ver 1.30\n");
break;
-   }
 
-   switch (hardware_version) {
-   case HWVER_101:
-   printf(" HW-Ver 1.01\n");
+   case HWVER_140:
+   printf(" HW-Ver 1.40-1.43\n");
break;
 
-   case HWVER_110:
-   printf(" HW-Ver 1.10-1.12\n");
+   case HWVER_150:
+   printf(" HW-Ver 1.50\n");
break;
 
-   case HWVER_120:
-   printf(" HW-Ver 1.20\n");
+   case HWVER_160:
+   printf(" HW-Ver 1.60-1.61\n");
break;
 
-   case HWVER_130:
-   printf(" HW-Ver 1.30\n");
+   case HWVER_170:
+   printf(" HW-Ver 1.70\n");
break;
 
default:
@@ -260,7 +267,7 @@ int last_stage_init(void)
if (get_mc2_present())
print_fpga_info(1);
 
-   if (((versions >> 4) & 0x000f) != UNITTYPE_MAIN_USER)
+   if (((versions >> 4) & 0x000f) & UNITTYPE_SERVER)
return 0;
 
if (!get_fpga_state(0) || (get_hwver() == HWVER_101))
diff --git a/board/gdsys/common/Makefile b/board/gdsys/common/Makefile
index 4957943..95e41de 100644
--- a/board/gdsys/common/Makefile
+++ b/board/gdsys/common/Makefile
@@ -10,6 +10,6 @@ obj-$(CONFIG_CMD_IOLOOP) += cmd_ioloop.o
 obj-$(CONFIG_IO) += miiphybb.o
 obj-$(CONFIG_IO64) += miiphybb.o
 obj-$(CONFIG_IOCON) += osd.o mclink.o dp501.o phy.o
-obj-$(CONFIG_DLVISION_10G) += osd.o
+obj-$(CONFIG_DLVISION_10G) += osd.o dp501.o
 obj-$(CONFIG_CONTROLCENTERD) += dp501.o
 obj-$(CONFIG_HRCON) += osd.o mclink.o dp501.o phy.o
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index e6bfe58..08cd1dd 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -69,7 +69,7 @@
 #undef CONFIG_CMD_DIAG
 #undef CONFIG_CMD_EEPROM
 #undef CONFIG_CMD_ELF
-#undef CONFIG_CMD_I2C
+#define CONFIG_CMD_I2C
 #undef CONFIG_CMD_IRQ
 
 /*
@@ -107,17 +107,22 @@
 #define CONFIG_SYS_I2C_PPC4XX_SLAVE_0  0x7F
 
 #define CONFIG_SYS_I2C_IHS
+#define CONFIG_SYS_I2C_IHS_DUAL
 #define CONFIG_SYS_I2C_IHS_CH0
 #define CONFIG_SYS_I2C_IHS_SPEED_0 5
 #define CONFIG_SYS_I2C_IHS_SLAVE_0 0x7F
+#define

[U-Boot] [PATCH v1 05/18] board: gdsys: Increase DP501 I2C retry interval

[dirk . eibach]

From: Dirk Eibach <dirk.eib...@gdsys.cc>

With Club 3D dual link adapter there are AUX-channel timeouts
when EDID is read. Increasing retry interval time to max (400us)
fixes this.

Signed-off-by: Dirk Eibach <dirk.eib...@gdsys.cc>
---

 board/gdsys/common/dp501.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index baace38..0389fd1 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -88,7 +88,8 @@ void dp501_powerup(u8 addr)
dp501_setbits(addr, 0x78, 0x03); /* clear all interrupt */
i2c_reg_write(addr, 0x75, 0xf8); /* aux channel reset */
i2c_reg_write(addr, 0x75, 0x00); /* clear aux channel reset */
-   i2c_reg_write(addr, 0x87, 0x70); /* set retry counter as 7 */
+   i2c_reg_write(addr, 0x87, 0x7f); /* set retry counter as 7
+   retry interval 400us */
 
if (dp501_detect_cable_adapter(addr)) {
printf("DVI/HDMI cable adapter detected\n");
-- 
2.1.3

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Re: [U-Boot] [PATCH] arm: mvebu: Fix internal register config on A38x

[Dirk Eibach]

Hey Stefan,

shouldn't this go into v2015.10? Since booting A38x is essentially
broken without it ...

Cheers
Dirk
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Re: [U-Boot] Copy to Flash... 9Flash not Erased

[Dirk Eibach]

Hi Rudi,

this sounds oddly familiar. Which gcc version are you using? 4.8? gcc
4.8 is broken for powerpc u-boot.
For more background search for the Relocation issue - need help!
started by Wolfgang Denk on the mailing list.

Cheers
Dirk
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Re: [U-Boot] [PATCH v2 0/7] Update gdsys board support

[Dirk Eibach]

Hi Kim, Hi Stefan,

do you see any chance too get this merged soon? mpc83xx: Add gdsys
hrcon board fixes a build failure and it would be nice to get it in
before rc2.

Kim offered to ack  mpc83xx: Add gdsys hrcon board. Stefan, can you
please get this through your repo afterwards?

Cheers
Dirk
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Re: [U-Boot] [PATCH v2 0/7] Update gdsys board support

[Dirk Eibach]

Hi Kim,

thanks for having a look. As I said I am preparing a RFC for migrating
things to generic PHY, but this will be bigger step scheduled for
v2015.04.

Cheers
Dirk
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Re: [U-Boot] [ANN] U-Boot v2015.01-rc1 released

[Dirk Eibach]

Hey Tom,

2014-11-10 22:29 GMT+01:00 Tom Rini tr...@ti.com:
 ...
 When I do a buildman of most things I see:
   blackfin: +   ip04
arm: +   Ippo_q8h_v5 novena openrd_base maxbcm openrd_ultimate 
 openrd_client tricorder db-mv784mp-gp Linksprite_pcDuino3_fdt tricorder_flash 
 cm_t3517
powerpc: +   kmcoge4 taishan kmlion1 dlvision

 And I'd really like to see those sorted out, one way or another for
 -rc2.

dlvision should be fixed with the Update gdsys board support series
that is already under review by Stefan Roese and Kim Phillips.

Cheers
Dirk
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[U-Boot] [PATCH v2 5/7] board: iocon: Fix fpga index in print_fpga_info()

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 board/gdsys/405ep/iocon.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 1bac970..fffed73 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -180,11 +180,11 @@ static void print_fpga_info(unsigned int fpga, bool 
rgmii2_present)
unsigned feature_carriers;
unsigned feature_video_channels;
 
-   int legacy = get_fpga_state(0)  FPGA_STATE_PLATFORM;
+   int legacy = get_fpga_state(fpga)  FPGA_STATE_PLATFORM;
 
-   FPGA_GET_REG(0, versions, versions);
-   FPGA_GET_REG(0, fpga_version, fpga_version);
-   FPGA_GET_REG(0, fpga_features, fpga_features);
+   FPGA_GET_REG(fpga, versions, versions);
+   FPGA_GET_REG(fpga, fpga_version, fpga_version);
+   FPGA_GET_REG(fpga, fpga_features, fpga_features);
 
unit_type = (versions  0xf000)  12;
feature_compression = (fpga_features  0xe000)  13;
-- 
1.8.3

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[U-Boot] [PATCH v2 2/7] mtd: Handle 29LV800BT

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

The device id makes u-boot think that this chip needs
cfi_reverse_geometry(), which is not the case.
Add it to jedec_flash, so it is handled properly.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 drivers/mtd/jedec_flash.c | 51 +++
 include/flash.h   |  1 +
 2 files changed, 52 insertions(+)

diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 593b9b8..ce9af8f 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -333,6 +333,57 @@ static const struct amd_flash_info jedec_table[] = {
}
},
{
+   .mfr_id = (u16)AMD_MANUFACT,
+   .dev_id = AM29LV800BT,
+   .name   = AMD AM29LV800BT,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x1, 15),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x04000, 1),
+   }
+   },
+   {
+   .mfr_id = (u16)MX_MANUFACT,
+   .dev_id = AM29LV800BT,
+   .name   = MXIC MX29LV800BT,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x1, 15),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x04000, 1),
+   }
+   },
+   {
+   .mfr_id = (u16)EON_ALT_MANU,
+   .dev_id = AM29LV800BT,
+   .name   = EON EN29LV800BT,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x1, 15),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x04000, 1),
+   }
+   },
+   {
.mfr_id = (u16)STM_MANUFACT,
.dev_id = STM29F400BB,
.name   = ST Micro M29F400BB,
diff --git a/include/flash.h b/include/flash.h
index 5454c9e..30aa080 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -158,6 +158,7 @@ extern flash_info_t *flash_get_info(ulong base);
 #define EXCEL_MANUFACT 0x004A004A  /* Excel Semiconductor  
*/
 #define AMIC_MANUFACT  0x00370037  /* AMICmanuf. ID in D23..D16, 
D7..D0 */
 #define WINB_MANUFACT  0x00DA00DA  /* Winbond manuf. ID in D23..D16, 
D7..D0 */
+#define EON_ALT_MANU   0x001C001C  /* EON manuf. ID in D23..D16, 
D7..D0 */
 
 /* Manufacturers inside bank 1 have ids like 0x01xx01xx */
 #define EON_MANUFACT   0x011C011C  /* EON manuf. ID in D23..D16, 
D7..D0 */
-- 
1.8.3

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[U-Boot] [PATCH v2 0/7] Update gdsys board support

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc



Changes in v2:
- fix compiler warning
- fix cppcheck finding reported by Wolfgang
- move cmd_ioloop from common to board/gdsys/common
- remove debug code from hrcon.c

Dirk Eibach (7):
  board: dlvision: Reduce memory footprint
  mtd: Handle 29LV800BT
  common: Fix cmd_fpgad addressing
  board: dlvision-10g: Compile fix
  board: iocon: Fix fpga index in print_fpga_info()
  board: iocon: Fix uninitialized access
  mpc83xx: Add gdsys hrcon board

 arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
 board/gdsys/405ep/iocon.c| 201 +---
 board/gdsys/common/Makefile  |   4 +-
 board/gdsys/common/cmd_ioloop.c  | 295 +
 board/gdsys/common/ihs_mdio.c|  88 +
 board/gdsys/common/ihs_mdio.h|  18 ++
 board/gdsys/common/osd.c |   7 +-
 board/gdsys/common/phy.c | 280 
 board/gdsys/common/phy.h |  14 +
 board/gdsys/mpc8308/Kconfig  |  12 +
 board/gdsys/mpc8308/MAINTAINERS  |   6 +
 board/gdsys/mpc8308/Makefile |   9 +
 board/gdsys/mpc8308/hrcon.c  | 675 +++
 board/gdsys/mpc8308/mpc8308.c| 109 +++
 board/gdsys/mpc8308/mpc8308.h|  10 +
 board/gdsys/mpc8308/sdram.c  |  82 +
 common/cmd_fpgad.c   |  32 +-
 configs/hrcon_defconfig  |   3 +
 drivers/mtd/jedec_flash.c|  51 +++
 include/configs/dlvision.h   |   9 +-
 include/configs/hrcon.h  | 614 +++
 include/flash.h  |   1 +
 include/gdsys_fpga.h |  64 +++-
 23 files changed, 2375 insertions(+), 213 deletions(-)
 create mode 100644 board/gdsys/common/cmd_ioloop.c
 create mode 100644 board/gdsys/common/ihs_mdio.c
 create mode 100644 board/gdsys/common/ihs_mdio.h
 create mode 100644 board/gdsys/common/phy.c
 create mode 100644 board/gdsys/common/phy.h
 create mode 100644 board/gdsys/mpc8308/Kconfig
 create mode 100644 board/gdsys/mpc8308/MAINTAINERS
 create mode 100644 board/gdsys/mpc8308/Makefile
 create mode 100644 board/gdsys/mpc8308/hrcon.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.h
 create mode 100644 board/gdsys/mpc8308/sdram.c
 create mode 100644 configs/hrcon_defconfig
 create mode 100644 include/configs/hrcon.h

-- 
1.8.3

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[U-Boot] [PATCH v2 3/7] common: Fix cmd_fpgad addressing

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Addressing was completely broken for cmd_fpgad.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 common/cmd_fpgad.c | 32 
 1 file changed, 24 insertions(+), 8 deletions(-)

diff --git a/common/cmd_fpgad.c b/common/cmd_fpgad.c
index 1b25ed8..1f1d00f 100644
--- a/common/cmd_fpgad.c
+++ b/common/cmd_fpgad.c
@@ -31,7 +31,8 @@ int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
unsigned int fpga;
ulong   addr, length;
int rc = 0;
-   u16 linebuf[DISP_LINE_LEN/sizeof(u16)];
+   u16 linebuf[DISP_LINE_LEN/sizeof(u16)];
+   ulong nbytes;
 
/*
 * We use the last specified parameters, unless new ones are
@@ -63,13 +64,28 @@ int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
length = simple_strtoul(argv[3], NULL, 16);
}
 
-   /* Print the lines. */
-   for (k = 0; k  DISP_LINE_LEN / sizeof(u16); ++k)
-   fpga_get_reg(fpga, (u16 *)fpga_ptr[fpga] + k, k * sizeof(u16),
-linebuf[k]);
-   print_buffer(addr, (void *)linebuf, sizeof(u16),
-length, DISP_LINE_LEN / sizeof(u16));
-   addr += sizeof(u16)*length;
+   nbytes = length * sizeof(u16);
+   do {
+   ulong linebytes = (nbytes  DISP_LINE_LEN) ?
+ DISP_LINE_LEN : nbytes;
+
+   for (k = 0; k  linebytes / sizeof(u16); ++k)
+   fpga_get_reg(fpga,
+(u16 *)fpga_ptr[fpga] + addr
+/ sizeof(u16) + k,
+addr + k * sizeof(u16),
+linebuf[k]);
+   print_buffer(addr, (void *)linebuf, sizeof(u16),
+linebytes / sizeof(u16),
+DISP_LINE_LEN / sizeof(u16));
+
+   nbytes -= linebytes;
+   addr += linebytes;
+   if (ctrlc()) {
+   rc = 1;
+   break;
+   }
+   } while (nbytes  0);
 
dp_last_fpga = fpga;
dp_last_addr = addr;
-- 
1.8.3

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[U-Boot] [PATCH v2 1/7] board: dlvision: Reduce memory footprint

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Tune dlvision configuration similar to other gdsys boards to reduce memory
footprint.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 include/configs/dlvision.h | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index af0d602..a9cfc10 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -35,6 +35,7 @@
 /* new uImage format support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+#define CONFIG_FIT_DISABLE_SHA256
 
 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
 
@@ -59,8 +60,14 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
-#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DTT
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DIAG
 #undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_NFS
 
 /*
  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
-- 
1.8.3

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[U-Boot] [PATCH v2 7/7] mpc83xx: Add gdsys hrcon board

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIe

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2:
- move cmd_ioloop from common to board/gdsys/common
- remove debug code from hrcon.c

 arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
 board/gdsys/405ep/iocon.c| 190 +--
 board/gdsys/common/Makefile  |   4 +-
 board/gdsys/common/cmd_ioloop.c  | 295 +
 board/gdsys/common/ihs_mdio.c|  88 +
 board/gdsys/common/ihs_mdio.h|  18 ++
 board/gdsys/common/phy.c | 280 
 board/gdsys/common/phy.h |  14 +
 board/gdsys/mpc8308/Kconfig  |  12 +
 board/gdsys/mpc8308/MAINTAINERS  |   6 +
 board/gdsys/mpc8308/Makefile |   9 +
 board/gdsys/mpc8308/hrcon.c  | 675 +++
 board/gdsys/mpc8308/mpc8308.c| 109 +++
 board/gdsys/mpc8308/mpc8308.h|  10 +
 board/gdsys/mpc8308/sdram.c  |  82 +
 configs/hrcon_defconfig  |   3 +
 include/configs/hrcon.h  | 614 +++
 include/gdsys_fpga.h |  64 +++-
 18 files changed, 2282 insertions(+), 195 deletions(-)
 create mode 100644 board/gdsys/common/cmd_ioloop.c
 create mode 100644 board/gdsys/common/ihs_mdio.c
 create mode 100644 board/gdsys/common/ihs_mdio.h
 create mode 100644 board/gdsys/common/phy.c
 create mode 100644 board/gdsys/common/phy.h
 create mode 100644 board/gdsys/mpc8308/Kconfig
 create mode 100644 board/gdsys/mpc8308/MAINTAINERS
 create mode 100644 board/gdsys/mpc8308/Makefile
 create mode 100644 board/gdsys/mpc8308/hrcon.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.h
 create mode 100644 board/gdsys/mpc8308/sdram.c
 create mode 100644 configs/hrcon_defconfig
 create mode 100644 include/configs/hrcon.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 2a1abe0..69a600c 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -68,6 +68,9 @@ config TARGET_TUXX1
 config TARGET_TQM834X
bool Support TQM834x
 
+config TARGET_HRCON
+   bool Support hrcon
+
 endchoice
 
 source board/esd/vme8349/Kconfig
@@ -88,5 +91,6 @@ source board/mpc8308_p1m/Kconfig
 source board/sbc8349/Kconfig
 source board/tqc/tqm834x/Kconfig
 source board/ve8313/Kconfig
+source board/gdsys/mpc8308/Kconfig
 
 endmenu
diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 1d7e141..3a51d86 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -17,6 +17,7 @@
 
 #include ../common/osd.h
 #include ../common/mclink.h
+#include ../common/phy.h
 
 #include i2c.h
 #include pca953x.h
@@ -98,8 +99,6 @@ enum {
 unsigned int mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
-static int setup_88e1518(const char *bus, unsigned char addr);
-
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
 {
int res;
@@ -647,190 +646,3 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
 
 int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
  sizeof(bb_miiphy_buses[0]);
-
-enum {
-   MIICMD_SET,
-   MIICMD_MODIFY,
-   MIICMD_VERIFY_VALUE,
-   MIICMD_WAIT_FOR_VALUE,
-};
-
-struct mii_setupcmd {
-   u8 token;
-   u8 reg;
-   u16 data;
-   u16 mask;
-   u32 timeout;
-};
-
-/*
- * verify we are talking to a 88e1518
- */
-struct mii_setupcmd verify_88e1518[] = {
-   { MIICMD_SET, 22, 0x },
-   { MIICMD_VERIFY_VALUE, 2, 0x0141, 0x },
-   { MIICMD_VERIFY_VALUE, 3, 0x0dd0, 0xfff0 },
-};
-
-/*
- * workaround for erratum mentioned in 88E1518 release notes
- */
-struct mii_setupcmd fixup_88e1518[] = {
-   { MIICMD_SET, 22, 0x00ff },
-   { MIICMD_SET, 17, 0x214b },
-   { MIICMD_SET, 16, 0x2144 },
-   { MIICMD_SET, 17, 0x0c28 },
-   { MIICMD_SET, 16, 0x2146 },
-   { MIICMD_SET, 17, 0xb233 },
-   { MIICMD_SET, 16, 0x214d },
-   { MIICMD_SET, 17, 0xcc0c },
-   { MIICMD_SET, 16, 0x2159 },
-   { MIICMD_SET, 22, 0x00fb },
-   { MIICMD_SET,  7, 0xc00d },
-   { MIICMD_SET, 22, 0x },
-};
-
-/*
- * default initialization:
- * - set RGMII receive timing to receive clock transition when data stable
- * - set RGMII transmit timing to transmit clock internally delayed
- * - set RGMII output impedance target to 78,8 Ohm
- * - run output impedance calibration
- * - set autonegotiation advertise to 1000FD only
- */
-struct mii_setupcmd default_88e1518[] = {
-   { MIICMD_SET, 22, 0x0002 },
-   { MIICMD_MODIFY, 21, 0x0030, 0x0030 },
-   { MIICMD_MODIFY, 25, 0x, 0x0003 },
-   { MIICMD_MODIFY, 24, 0x8000, 0x8000 },
-   { MIICMD_WAIT_FOR_VALUE, 24, 0x4000, 0x4000, 2000 },
-   { MIICMD_SET, 22

[U-Boot] [PATCH v2 4/7] board: dlvision-10g: Compile fix

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2:
- fix compiler warning

 board/gdsys/common/osd.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index 1c765e4..55ecdf1 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -289,7 +289,6 @@ int osd_probe(unsigned screen)
 {
u16 version;
u16 features;
-   u8 value;
int old_bus = i2c_get_bus_num();
bool pixclock_present = false;
bool output_driver_present = false;
@@ -330,7 +329,8 @@ int osd_probe(unsigned screen)
 #ifdef CONFIG_SYS_CH7301_I2C
i2c_set_bus_num(ch7301_i2c[screen]);
if (!i2c_probe(CH7301_I2C_ADDR)) {
-   value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID);
+   u8 value = i2c_reg_read(CH7301_I2C_ADDR, CH7301_DID);
+
if (value == 0x17) {
i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPCP, 0x08);
i2c_reg_write(CH7301_I2C_ADDR, CH7301_TPD, 0x16);
@@ -345,8 +345,7 @@ int osd_probe(unsigned screen)
 #ifdef CONFIG_SYS_SIL1178_I2C
i2c_set_bus_num(sil1178_i2c[screen]);
if (!i2c_probe(SIL1178_SLAVE_I2C_ADDRESS)) {
-   value = i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02);
-   if (value == 0x06) {
+   if (i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02) == 0x06) {
/*
 * magic initialization sequence,
 * adapted from datasheet
-- 
1.8.3

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[U-Boot] [PATCH v2 6/7] board: iocon: Fix uninitialized access

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Wolfgang Denk found this issue using cppcheck:
(error) Uninitialized variable: fpga_features

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2:
- fix cppcheck finding reported by Wolfgang

 board/gdsys/405ep/iocon.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index fffed73..1d7e141 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -369,10 +369,11 @@ int last_stage_init(void)
unsigned char mclink_controllers[] = { 0x24, 0x25, 0x26 };
int legacy = get_fpga_state(0)  FPGA_STATE_PLATFORM;
u16 fpga_features;
-   int feature_carrier_speed = fpga_features  (14);
+   int feature_carrier_speed;
bool ch0_rgmii2_present = false;
 
FPGA_GET_REG(0, fpga_features, fpga_features);
+   feature_carrier_speed = fpga_features  (14);
 
if (!legacy) {
/* Turn on Parade DP501 */
-- 
1.8.3

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Re: [U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

[Dirk Eibach]

Hi Kim,

2014-11-07 1:18 GMT+01:00 Kim Phillips kim.phill...@freescale.com:
 ...
 sorry for the delay, I bricked a board when going through my queue
 lately, and haven't been able to fully recover since.

no problem, Thanks for the review,  I'm very happy we have some progress now.

  arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
  board/gdsys/405ep/iocon.c| 190 +--
  board/gdsys/common/Makefile  |   3 +-
  board/gdsys/common/ihs_mdio.c|  88 +
  board/gdsys/common/ihs_mdio.h|  18 ++
  board/gdsys/common/phy.c | 280 
  board/gdsys/common/phy.h |  14 +

 is it me, or should PHY support go under drivers/net/phy/gdsys.c (or
 something like that)?  Even if not immediately ported to the Generic
 PHY Management layer, still, I think it would be a good idea to get
 it in the right vicinity.

 Taking a closer look, it looks like at least one of the PHYs
 involved here (the Marvell 88E1518) is already implemented in
 drivers/phy/marvell.c to a certain degree, so it might be helpful to
 define CONFIG_PHY_MARVELL as a first step to migrating to the
 generic PHY subsystem.

The first step was to factor out the common PHY code from iocon.c. The
next step is merging this with the PHY subsystem.
For the moment I would prefer it going in this way and doing a merge
with the PHY subsystem for the next release.
There are more boards coming that use this and I will clean it up alltogether.

  board/gdsys/mpc8308/Kconfig  |  12 +
  board/gdsys/mpc8308/MAINTAINERS  |   6 +
  board/gdsys/mpc8308/Makefile |   9 +
  board/gdsys/mpc8308/hrcon.c  | 677 
 +++
  board/gdsys/mpc8308/mpc8308.c| 109 +++
  board/gdsys/mpc8308/mpc8308.h|  10 +
  board/gdsys/mpc8308/sdram.c  |  82 +

  common/Makefile  |   1 +
  common/cmd_ioloop.c  | 295 +

 IDK what this is (FPGA io-endpoint looper/reflector?), but I'm
 guessing since it's in common/, it should be separated from this
 board support patch, otherwise it won't get the intended audience's
 attention.

Since this is very gdsys FPGA specific I should probably move it to
our board directory.

 +int last_stage_init(void)
 +{
 + int slaves;
 + unsigned int k;
 + unsigned int mux_ch;
 + unsigned char mclink_controllers[] = { 0x24, 0x25, 0x26 };
 + u16 fpga_features;
 + bool hw_type_cat = pca9698_get_value(0x20, 20);
 + bool ch0_rgmii2_present = false;
 +
 + FPGA_GET_REG(0, fpga_features, fpga_features);
 +
 + /* Turn on Parade DP501 */
 + pca9698_direction_output(0x20, 10, 1);
 +
 + ch0_rgmii2_present = !pca9698_get_value(0x20, 30);
 +
 + /* wait for FPGA done */
 + for (k = 0; k  ARRAY_SIZE(mclink_controllers); ++k) {
 + unsigned int ctr = 0;
 +
 + if (i2c_probe(mclink_controllers[k]))
 + continue;
 +
 + while (!(pca953x_get_val(mclink_controllers[k])
 + MCFPGA_DONE)) {
 + udelay(10);
 + if (ctr++  5) {
 + printf(no done for mclink_controller %d\n, 
 k);
 + break;
 + }
 + }
 + }
 +
 + if (hw_type_cat) {
 + miiphy_register(bb_miiphy_buses[0].name, bb_miiphy_read,
 + bb_miiphy_write);
 + for (mux_ch = 0; mux_ch  MAX_MUX_CHANNELS; ++mux_ch) {
 + if ((mux_ch == 1)  !ch0_rgmii2_present)
 + continue;
 +
 + setup_88e1514(bb_miiphy_buses[0].name, mux_ch);
 + }
 + }
 +
 + /* give slave-PLLs and Parade DP501 some time to be up and running */
 + udelay(50);
 +
 + mclink_fpgacount = CONFIG_SYS_MCLINK_MAX;
 + slaves = mclink_probe();
 + mclink_fpgacount = 0;
 +
 + print_fpga_info(0, ch0_rgmii2_present);
 + osd_probe(0);
 + return 0;

 unless this was left in from debugging (in which case it should be
 removed), it implies the remaining code in the fn..:

Oops, you are absolutely rigth this is debugcode. Wonder how that crept in...

 +
 + if (slaves = 0)
 + return 0;
 +
 + mclink_fpgacount = slaves;
 +
 + for (k = 1; k = slaves; ++k) {
 + FPGA_GET_REG(k, fpga_features, fpga_features);
 +
 + print_fpga_info(k, false);
 + osd_probe(k);
 + if (hw_type_cat) {
 + miiphy_register(bb_miiphy_buses[k].name,
 + bb_miiphy_read, bb_miiphy_write);
 + setup_88e1514(bb_miiphy_buses[k].name, 0);
 + }
 + }
 +
 + return 0;
 +}

 ..is dead code, and therefore not welcome here.

 +int board_early_init_r(void)
 +{
 + unsigned k;
 + unsigned ctr;
 +
 + for (k = 0; k  CONFIG_SYS_FPGA_COUNT; ++k)
 + gd-arch.fpga_state[k] = 0;
 +
 + /*
 +  

Re: [U-Boot] [PATCH v1 0/6] Update gdsys board support

[Dirk Eibach]

Hi Kim,

2014-11-05 11:43 GMT+01:00 Stefan Roese s...@denx.de:
 Hi Dirk,

 On 05.11.2014 10:45, Dirk Eibach wrote:

 will you look after this series? I ask because there is also some
 mpc83xx stuff involved.


 Yes, I just looked again. Not sure how we should handle this patch series. I
 can ack the PPC4xx and CFI flash related patches and someone else can pull
 this series (Kim for mpc83xx. Or Kim ack's the 83xx patch and I'll pull all
 and push it forward.

 Comments?

what way of handling this would you prefer?

Cheers
Dirk
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Re: [U-Boot] [board/gdsys/405ep/iocon.c:372]: (error) Uninitialized variable: fpga_features

[Dirk Eibach]

Hello Wolfgang,

2014-11-06 13:31 GMT+01:00 Wolfgang Denk w...@denx.de:
 Hello,

 cppcheck reports:

 [board/gdsys/405ep/iocon.c:372]: (error) Uninitialized variable:
 fpga_features

 can you please have a look?  Thanks!

oops, nice one, thanks.

Will fix.

Cheers
Dirk
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Re: [U-Boot] [PATCH v1 0/6] Update gdsys board support

[Dirk Eibach]

Hello Stefan,

will you look after this series? I ask because there is also some
mpc83xx stuff involved.

Cheers Dirk
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Re: [U-Boot] [PATCH v1 0/6] Update gdsys board support

[Dirk Eibach]

Hi Stefan,

2014-11-05 11:43 GMT+01:00 Stefan Roese s...@denx.de:
 ...
 Yes, I just looked again. Not sure how we should handle this patch series. I
 can ack the PPC4xx and CFI flash related patches and someone else can pull
 this series (Kim for mpc83xx. Or Kim ack's the 83xx patch and I'll pull all
 and push it forward.

Is Kim still active? Last message from him on the list I found was from may.

Cheers
Dirk
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Re: [U-Boot] [PATCH v1 0/6] Update gdsys board support

[Dirk Eibach]

Hi Stefan,

 Is Kim still active? Last message from him on the list I found was from
 may.


 Not sure. Lets wait and see if Kim responds...

looks not so good.
I put Scott and York from Freescale to CC. Maybe they can inquire at Freescale.

Cheers
Dirk
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[U-Boot] [PATCH v1] ppc: Fix ppc4xx CONFIG_SYS_GENERIC_BOARD

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

I realized that with v2014.10 u-boot is not starting up on
ppc4xx boards with CONFIG_SYS_GENERIC_BOARD set.

I bisected it down to this:
d54d7eb support blackfin board initialization in generic board_f

With
d29437a ppc: Make ppc4xx ready for CONFIG_SYS_GENERIC_BOARD
I set gd to a defined value for ppc4xx in cpu_init_f().
I did not realize that the gd struct has also to be memset()
to zero at this point.

But at least commit d54d7eb assumes it is:
@@ -516,11 +528,13 @@ static int reserve_malloc(void)
 /* (permanently) allocate a Board Info struct */
 static int reserve_board(void)
 {
-   gd-start_addr_sp -= sizeof(bd_t);
-   gd-bd = (bd_t *)map_sysmem(gd-start_addr_sp, sizeof(bd_t));
-   memset(gd-bd, '\0', sizeof(bd_t));
-   debug(Reserving %zu Bytes for Board Info at: %08lx\n,
-   sizeof(bd_t), gd-start_addr_sp);
+   if (!gd-bd) {
+   gd-start_addr_sp -= sizeof(bd_t);
+   gd-bd = (bd_t *)map_sysmem(gd-start_addr_sp, sizeof(bd_t));
+   memset(gd-bd, '\0', sizeof(bd_t));
+   debug(Reserving %zu Bytes for Board Info at: %08lx\n,
+ sizeof(bd_t), gd-start_addr_sp);
+   }
return 0;
 }
 #endif

This might also be an issue on other architectures, so maintainers should
check.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 arch/powerpc/cpu/ppc4xx/cpu_init.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index 2256123..e5a0e21 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -451,6 +451,9 @@ cpu_init_f (void)
 #endif /* CONFIG_440SP/SPE || CONFIG_460EX/GT || CONFIG_405EX */
 
gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
+
+   /* Clear initial global data */
+   memset((void *)gd, 0, sizeof(gd_t));
 }
 
 /*
-- 
1.8.3

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Re: [U-Boot] [PATCH v1 2/2] ppc4xx: Handle i2c stuck on combined xfer

[Dirk Eibach]

Hello Heiko,

 +++ b/drivers/i2c/ppc4xx_i2c.c
 @@ -289,6 +289,27 @@ static int _i2c_transfer(struct i2c_adapter *adap,
 /* Transfer aborted? */
 if (status  IIC_EXTSTS_XFRA)
 result = IIC_NOK_XFRA;
 +   /* Is bus free?


 Nitpick only: wrong comment style ... Is it OK for you, if I fix it,
 when applying this patch?

Oops, yes please fix it when applying. Shouldn't checkpatch catch this?

Cheers
Dirk
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[U-Boot] [PATCH v1 2/2] ppc4xx: Handle i2c stuck on combined xfer

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

ppc4xx i2c master gets stuck on errors while repeated start is
active. Can be easily reproduced by i2c md on an unpopulated
i2c address. There is not stop condition given, scl remains
pulled low.
The only way out seems to be doing a stop manually and then a
soft reset.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 arch/powerpc/include/asm/ppc4xx-i2c.h |  2 ++
 drivers/i2c/ppc4xx_i2c.c  | 21 +
 2 files changed, 23 insertions(+)

diff --git a/arch/powerpc/include/asm/ppc4xx-i2c.h 
b/arch/powerpc/include/asm/ppc4xx-i2c.h
index 09189cf..df97f17 100644
--- a/arch/powerpc/include/asm/ppc4xx-i2c.h
+++ b/arch/powerpc/include/asm/ppc4xx-i2c.h
@@ -72,6 +72,8 @@ struct ppc4xx_i2c {
 #define IIC_EXTSTS_XFRA0x01
 #define IIC_EXTSTS_ICT 0x02
 #define IIC_EXTSTS_LA  0x04
+#define IIC_EXTSTS_BCS_MASK0x70
+#define IIC_EXTSTS_BCS_FREE0x40
 
 /* XTCNTLSS Register Bit definition */
 #define IIC_XTCNTLSS_SRST  0x01
diff --git a/drivers/i2c/ppc4xx_i2c.c b/drivers/i2c/ppc4xx_i2c.c
index d2ff86c..df5 100644
--- a/drivers/i2c/ppc4xx_i2c.c
+++ b/drivers/i2c/ppc4xx_i2c.c
@@ -289,6 +289,27 @@ static int _i2c_transfer(struct i2c_adapter *adap,
/* Transfer aborted? */
if (status  IIC_EXTSTS_XFRA)
result = IIC_NOK_XFRA;
+   /* Is bus free?
+* If error happened during combined xfer
+* IIC interface is usually stuck in some strange
+* state without a valid stop condition.
+* Brute, but working: generate stop, then soft reset.
+*/
+   if ((status  IIC_EXTSTS_BCS_MASK)
+   != IIC_EXTSTS_BCS_FREE){
+   u8 mdcntl = in_8(i2c-mdcntl);
+
+   /* Generate valid stop condition */
+   out_8(i2c-xtcntlss, IIC_XTCNTLSS_SRST);
+   out_8(i2c-directcntl, IIC_DIRCNTL_SCC);
+   udelay(10);
+   out_8(i2c-directcntl,
+ IIC_DIRCNTL_SCC | IIC_DIRCNTL_SDAC);
+   out_8(i2c-xtcntlss, 0);
+
+   ppc4xx_i2c_init(adap, (mdcntl  IIC_MDCNTL_FSM)
+   ? 40 : 10, 0);
+   }
} else if ( status  IIC_STS_PT) {
result = IIC_NOK_TOUT;
}
-- 
1.8.3

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[U-Boot] [PATCH v1 2/6] mtd: Handle 29LV800BT

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

The device id makes u-boot think that this chip needs
cfi_reverse_geometry(), which is not the case.
Add it to jedec_flash, so it is handled properly.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 drivers/mtd/jedec_flash.c | 51 +++
 include/flash.h   |  1 +
 2 files changed, 52 insertions(+)

diff --git a/drivers/mtd/jedec_flash.c b/drivers/mtd/jedec_flash.c
index 593b9b8..ce9af8f 100644
--- a/drivers/mtd/jedec_flash.c
+++ b/drivers/mtd/jedec_flash.c
@@ -333,6 +333,57 @@ static const struct amd_flash_info jedec_table[] = {
}
},
{
+   .mfr_id = (u16)AMD_MANUFACT,
+   .dev_id = AM29LV800BT,
+   .name   = AMD AM29LV800BT,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x1, 15),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x04000, 1),
+   }
+   },
+   {
+   .mfr_id = (u16)MX_MANUFACT,
+   .dev_id = AM29LV800BT,
+   .name   = MXIC MX29LV800BT,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x1, 15),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x04000, 1),
+   }
+   },
+   {
+   .mfr_id = (u16)EON_ALT_MANU,
+   .dev_id = AM29LV800BT,
+   .name   = EON EN29LV800BT,
+   .uaddr  = {
+   [1] = MTD_UADDR_0x0555_0x02AA /* x16 */
+   },
+   .DevSize= SIZE_1MiB,
+   .CmdSet = CFI_CMDSET_AMD_LEGACY,
+   .NumEraseRegions= 4,
+   .regions= {
+   ERASEINFO(0x1, 15),
+   ERASEINFO(0x08000, 1),
+   ERASEINFO(0x02000, 2),
+   ERASEINFO(0x04000, 1),
+   }
+   },
+   {
.mfr_id = (u16)STM_MANUFACT,
.dev_id = STM29F400BB,
.name   = ST Micro M29F400BB,
diff --git a/include/flash.h b/include/flash.h
index 5454c9e..30aa080 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -158,6 +158,7 @@ extern flash_info_t *flash_get_info(ulong base);
 #define EXCEL_MANUFACT 0x004A004A  /* Excel Semiconductor  
*/
 #define AMIC_MANUFACT  0x00370037  /* AMICmanuf. ID in D23..D16, 
D7..D0 */
 #define WINB_MANUFACT  0x00DA00DA  /* Winbond manuf. ID in D23..D16, 
D7..D0 */
+#define EON_ALT_MANU   0x001C001C  /* EON manuf. ID in D23..D16, 
D7..D0 */
 
 /* Manufacturers inside bank 1 have ids like 0x01xx01xx */
 #define EON_MANUFACT   0x011C011C  /* EON manuf. ID in D23..D16, 
D7..D0 */
-- 
1.8.3

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[U-Boot] [PATCH v1 1/6] board: dlvision: Reduce memory footprint

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Tune dlvision configuration similar to other gdsys boards to reduce memory
footprint.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 include/configs/dlvision.h | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index af0d602..a9cfc10 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -35,6 +35,7 @@
 /* new uImage format support */
 #define CONFIG_FIT
 #define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
+#define CONFIG_FIT_DISABLE_SHA256
 
 #define CONFIG_ENV_IS_IN_FLASH /* use FLASH for environment vars */
 
@@ -59,8 +60,14 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
-#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DTT
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DIAG
 #undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_NFS
 
 /*
  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
-- 
1.8.3

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[U-Boot] [PATCH v1 3/6] common: Fix cmd_fpgad addressing

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Addressing was completely broken for cmd_fpgad.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 common/cmd_fpgad.c | 32 
 1 file changed, 24 insertions(+), 8 deletions(-)

diff --git a/common/cmd_fpgad.c b/common/cmd_fpgad.c
index 1b25ed8..1f1d00f 100644
--- a/common/cmd_fpgad.c
+++ b/common/cmd_fpgad.c
@@ -31,7 +31,8 @@ int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
unsigned int fpga;
ulong   addr, length;
int rc = 0;
-   u16 linebuf[DISP_LINE_LEN/sizeof(u16)];
+   u16 linebuf[DISP_LINE_LEN/sizeof(u16)];
+   ulong nbytes;
 
/*
 * We use the last specified parameters, unless new ones are
@@ -63,13 +64,28 @@ int do_fpga_md(cmd_tbl_t *cmdtp, int flag, int argc, char * 
const argv[])
length = simple_strtoul(argv[3], NULL, 16);
}
 
-   /* Print the lines. */
-   for (k = 0; k  DISP_LINE_LEN / sizeof(u16); ++k)
-   fpga_get_reg(fpga, (u16 *)fpga_ptr[fpga] + k, k * sizeof(u16),
-linebuf[k]);
-   print_buffer(addr, (void *)linebuf, sizeof(u16),
-length, DISP_LINE_LEN / sizeof(u16));
-   addr += sizeof(u16)*length;
+   nbytes = length * sizeof(u16);
+   do {
+   ulong linebytes = (nbytes  DISP_LINE_LEN) ?
+ DISP_LINE_LEN : nbytes;
+
+   for (k = 0; k  linebytes / sizeof(u16); ++k)
+   fpga_get_reg(fpga,
+(u16 *)fpga_ptr[fpga] + addr
+/ sizeof(u16) + k,
+addr + k * sizeof(u16),
+linebuf[k]);
+   print_buffer(addr, (void *)linebuf, sizeof(u16),
+linebytes / sizeof(u16),
+DISP_LINE_LEN / sizeof(u16));
+
+   nbytes -= linebytes;
+   addr += linebytes;
+   if (ctrlc()) {
+   rc = 1;
+   break;
+   }
+   } while (nbytes  0);
 
dp_last_fpga = fpga;
dp_last_addr = addr;
-- 
1.8.3

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[U-Boot] [PATCH v1 0/6] Update gdsys board support

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc




Dirk Eibach (6):
  board: dlvision: Reduce memory footprint
  mtd: Handle 29LV800BT
  common: Fix cmd_fpgad addressing
  board: dlvision-10g: Compile fix
  board: iocon: Fix fpga index in print_fpga_info()
  mpc83xx: Add gdsys hrcon board

 arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
 board/gdsys/405ep/iocon.c| 198 +---
 board/gdsys/common/Makefile  |   3 +-
 board/gdsys/common/ihs_mdio.c|  88 +
 board/gdsys/common/ihs_mdio.h|  18 ++
 board/gdsys/common/osd.c |   3 +-
 board/gdsys/common/phy.c | 280 
 board/gdsys/common/phy.h |  14 +
 board/gdsys/mpc8308/Kconfig  |  12 +
 board/gdsys/mpc8308/MAINTAINERS  |   6 +
 board/gdsys/mpc8308/Makefile |   9 +
 board/gdsys/mpc8308/hrcon.c  | 677 +++
 board/gdsys/mpc8308/mpc8308.c| 109 +++
 board/gdsys/mpc8308/mpc8308.h|  10 +
 board/gdsys/mpc8308/sdram.c  |  82 +
 common/Makefile  |   1 +
 common/cmd_fpgad.c   |  32 +-
 common/cmd_ioloop.c  | 295 +
 configs/hrcon_defconfig  |   3 +
 drivers/mtd/jedec_flash.c|  51 +++
 include/configs/dlvision.h   |   9 +-
 include/configs/hrcon.h  | 614 +++
 include/flash.h  |   1 +
 include/gdsys_fpga.h |  64 +++-
 24 files changed, 2373 insertions(+), 210 deletions(-)
 create mode 100644 board/gdsys/common/ihs_mdio.c
 create mode 100644 board/gdsys/common/ihs_mdio.h
 create mode 100644 board/gdsys/common/phy.c
 create mode 100644 board/gdsys/common/phy.h
 create mode 100644 board/gdsys/mpc8308/Kconfig
 create mode 100644 board/gdsys/mpc8308/MAINTAINERS
 create mode 100644 board/gdsys/mpc8308/Makefile
 create mode 100644 board/gdsys/mpc8308/hrcon.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.h
 create mode 100644 board/gdsys/mpc8308/sdram.c
 create mode 100644 common/cmd_ioloop.c
 create mode 100644 configs/hrcon_defconfig
 create mode 100644 include/configs/hrcon.h

-- 
1.8.3

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[U-Boot] [PATCH v1 5/6] board: iocon: Fix fpga index in print_fpga_info()

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 board/gdsys/405ep/iocon.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index 1bac970..fffed73 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -180,11 +180,11 @@ static void print_fpga_info(unsigned int fpga, bool 
rgmii2_present)
unsigned feature_carriers;
unsigned feature_video_channels;
 
-   int legacy = get_fpga_state(0)  FPGA_STATE_PLATFORM;
+   int legacy = get_fpga_state(fpga)  FPGA_STATE_PLATFORM;
 
-   FPGA_GET_REG(0, versions, versions);
-   FPGA_GET_REG(0, fpga_version, fpga_version);
-   FPGA_GET_REG(0, fpga_features, fpga_features);
+   FPGA_GET_REG(fpga, versions, versions);
+   FPGA_GET_REG(fpga, fpga_version, fpga_version);
+   FPGA_GET_REG(fpga, fpga_features, fpga_features);
 
unit_type = (versions  0xf000)  12;
feature_compression = (fpga_features  0xe000)  13;
-- 
1.8.3

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[U-Boot] [PATCH v1 4/6] board: dlvision-10g: Compile fix

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 board/gdsys/common/osd.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/board/gdsys/common/osd.c b/board/gdsys/common/osd.c
index 1c765e4..f26b336 100644
--- a/board/gdsys/common/osd.c
+++ b/board/gdsys/common/osd.c
@@ -345,8 +345,7 @@ int osd_probe(unsigned screen)
 #ifdef CONFIG_SYS_SIL1178_I2C
i2c_set_bus_num(sil1178_i2c[screen]);
if (!i2c_probe(SIL1178_SLAVE_I2C_ADDRESS)) {
-   value = i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02);
-   if (value == 0x06) {
+   if (i2c_reg_read(SIL1178_SLAVE_I2C_ADDRESS, 0x02) == 0x06) {
/*
 * magic initialization sequence,
 * adapted from datasheet
-- 
1.8.3

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[U-Boot] [PATCH v1 6/6] mpc83xx: Add gdsys hrcon board

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.

On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIe

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 arch/powerpc/cpu/mpc83xx/Kconfig |   4 +
 board/gdsys/405ep/iocon.c| 190 +--
 board/gdsys/common/Makefile  |   3 +-
 board/gdsys/common/ihs_mdio.c|  88 +
 board/gdsys/common/ihs_mdio.h|  18 ++
 board/gdsys/common/phy.c | 280 
 board/gdsys/common/phy.h |  14 +
 board/gdsys/mpc8308/Kconfig  |  12 +
 board/gdsys/mpc8308/MAINTAINERS  |   6 +
 board/gdsys/mpc8308/Makefile |   9 +
 board/gdsys/mpc8308/hrcon.c  | 677 +++
 board/gdsys/mpc8308/mpc8308.c| 109 +++
 board/gdsys/mpc8308/mpc8308.h|  10 +
 board/gdsys/mpc8308/sdram.c  |  82 +
 common/Makefile  |   1 +
 common/cmd_ioloop.c  | 295 +
 configs/hrcon_defconfig  |   3 +
 include/configs/hrcon.h  | 614 +++
 include/gdsys_fpga.h |  64 +++-
 19 files changed, 2284 insertions(+), 195 deletions(-)
 create mode 100644 board/gdsys/common/ihs_mdio.c
 create mode 100644 board/gdsys/common/ihs_mdio.h
 create mode 100644 board/gdsys/common/phy.c
 create mode 100644 board/gdsys/common/phy.h
 create mode 100644 board/gdsys/mpc8308/Kconfig
 create mode 100644 board/gdsys/mpc8308/MAINTAINERS
 create mode 100644 board/gdsys/mpc8308/Makefile
 create mode 100644 board/gdsys/mpc8308/hrcon.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.c
 create mode 100644 board/gdsys/mpc8308/mpc8308.h
 create mode 100644 board/gdsys/mpc8308/sdram.c
 create mode 100644 common/cmd_ioloop.c
 create mode 100644 configs/hrcon_defconfig
 create mode 100644 include/configs/hrcon.h

diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig
index 42e0e29..dadff32 100644
--- a/arch/powerpc/cpu/mpc83xx/Kconfig
+++ b/arch/powerpc/cpu/mpc83xx/Kconfig
@@ -67,6 +67,9 @@ config TARGET_TUXX1
 config TARGET_TQM834X
bool Support TQM834x
 
+config TARGET_HRCON
+   bool Support hrcon
+
 endchoice
 
 source board/esd/vme8349/Kconfig
@@ -87,5 +90,6 @@ source board/mpc8308_p1m/Kconfig
 source board/sbc8349/Kconfig
 source board/tqc/tqm834x/Kconfig
 source board/ve8313/Kconfig
+source board/gdsys/mpc8308/Kconfig
 
 endmenu
diff --git a/board/gdsys/405ep/iocon.c b/board/gdsys/405ep/iocon.c
index fffed73..b9b6ded 100644
--- a/board/gdsys/405ep/iocon.c
+++ b/board/gdsys/405ep/iocon.c
@@ -17,6 +17,7 @@
 
 #include ../common/osd.h
 #include ../common/mclink.h
+#include ../common/phy.h
 
 #include i2c.h
 #include pca953x.h
@@ -98,8 +99,6 @@ enum {
 unsigned int mclink_fpgacount;
 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
 
-static int setup_88e1518(const char *bus, unsigned char addr);
-
 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data)
 {
int res;
@@ -646,190 +645,3 @@ struct bb_miiphy_bus bb_miiphy_buses[] = {
 
 int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
  sizeof(bb_miiphy_buses[0]);
-
-enum {
-   MIICMD_SET,
-   MIICMD_MODIFY,
-   MIICMD_VERIFY_VALUE,
-   MIICMD_WAIT_FOR_VALUE,
-};
-
-struct mii_setupcmd {
-   u8 token;
-   u8 reg;
-   u16 data;
-   u16 mask;
-   u32 timeout;
-};
-
-/*
- * verify we are talking to a 88e1518
- */
-struct mii_setupcmd verify_88e1518[] = {
-   { MIICMD_SET, 22, 0x },
-   { MIICMD_VERIFY_VALUE, 2, 0x0141, 0x },
-   { MIICMD_VERIFY_VALUE, 3, 0x0dd0, 0xfff0 },
-};
-
-/*
- * workaround for erratum mentioned in 88E1518 release notes
- */
-struct mii_setupcmd fixup_88e1518[] = {
-   { MIICMD_SET, 22, 0x00ff },
-   { MIICMD_SET, 17, 0x214b },
-   { MIICMD_SET, 16, 0x2144 },
-   { MIICMD_SET, 17, 0x0c28 },
-   { MIICMD_SET, 16, 0x2146 },
-   { MIICMD_SET, 17, 0xb233 },
-   { MIICMD_SET, 16, 0x214d },
-   { MIICMD_SET, 17, 0xcc0c },
-   { MIICMD_SET, 16, 0x2159 },
-   { MIICMD_SET, 22, 0x00fb },
-   { MIICMD_SET,  7, 0xc00d },
-   { MIICMD_SET, 22, 0x },
-};
-
-/*
- * default initialization:
- * - set RGMII receive timing to receive clock transition when data stable
- * - set RGMII transmit timing to transmit clock internally delayed
- * - set RGMII output impedance target to 78,8 Ohm
- * - run output impedance calibration
- * - set autonegotiation advertise to 1000FD only
- */
-struct mii_setupcmd default_88e1518[] = {
-   { MIICMD_SET, 22, 0x0002 },
-   { MIICMD_MODIFY, 21, 0x0030, 0x0030 },
-   { MIICMD_MODIFY, 25, 0x, 0x0003 },
-   { MIICMD_MODIFY, 24, 0x8000, 0x8000 },
-   { MIICMD_WAIT_FOR_VALUE, 24, 0x4000, 0x4000, 2000 },
-   { MIICMD_SET, 22, 0x },
-   { MIICMD_MODIFY, 4, 0x, 0x01e0

[U-Boot] [PATCH v1 1/2] ppc4xx: Fix i2c repeated start

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Debugging some i2c trouble I saw on my scope that repeated
start is not working properply. The 4xx even held clock pulled down
after transfers. Having a look in the driver I realized
that IIC_CNTL_RPST is set on that part of the transfer that should
begin with a repeated start. But repeated start is about not sending a
stop condition, so IIC_CNTL_RPST has to be set on the last transfer
before the repeated start happens.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

 drivers/i2c/ppc4xx_i2c.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/ppc4xx_i2c.c b/drivers/i2c/ppc4xx_i2c.c
index e7a15ba..d2ff86c 100644
--- a/drivers/i2c/ppc4xx_i2c.c
+++ b/drivers/i2c/ppc4xx_i2c.c
@@ -158,8 +158,7 @@ static void ppc4xx_i2c_init(struct i2c_adapter *adap, int 
speed, int slaveaddr)
  *
  * Typical case is a Write of an addr followd by a Read. The
  * IBM FAQ does not cover this. On the last byte of the write
- * we don't set the creg CHT bit, and on the first bytes of the
- * read we set the RPST bit.
+ * we don't set the creg CHT bit but the RPST bit.
  *
  * It does not support address only transfers, there must be
  * a data part. If you want to write the address yourself, put
@@ -247,6 +246,10 @@ static int _i2c_transfer(struct i2c_adapter *adap,
if ((!cmd_type  (ptr == addr)) || ((tran + bc) != cnt))
creg |= IIC_CNTL_CHT;
 
+   /* last part of address, prepare for repeated start on read */
+   if (cmd_type  (ptr == addr)  ((tran + bc) == cnt))
+   creg |= IIC_CNTL_RPST;
+
if (reading) {
creg |= IIC_CNTL_READ;
} else {
@@ -314,8 +317,6 @@ static int _i2c_transfer(struct i2c_adapter *adap,
cnt = data_len;
tran = 0;
reading = cmd_type;
-   if (reading)
-   creg = IIC_CNTL_RPST;
}
}
return result;
-- 
1.8.3

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[U-Boot] [PATCH v1 0/2] Fix some ppc4xx i2c controller issues

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc




Dirk Eibach (2):
  ppc4xx: Fix i2c repeated start
  ppc4xx: Handle i2c stuck on combined xfer

 arch/powerpc/include/asm/ppc4xx-i2c.h |  2 ++
 drivers/i2c/ppc4xx_i2c.c  | 30 ++
 2 files changed, 28 insertions(+), 4 deletions(-)

-- 
1.8.3

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Re: [U-Boot] Buildman cookbook

[Dirk Eibach]

BTW is it possible to define toolchains per CPU and not per
architecture? I did not find anything on this in the README.

Cheers
Dirk
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Re: [U-Boot] Relocation issue - need help!

[Dirk Eibach]

Hello Wolfgang,

2014-10-22 18:56 GMT+02:00 Wolfgang Denk w...@denx.de:
 Dear Dirk,

 In message 
 CANVMifLGzKz+=-k-e9_ssxbxpypdg1yqexc-tscapi7wvxq...@mail.gmail.com you 
 wrote:
 I had exactly the same behaviour some time ago and tracked it down to
 this (and posted it on the mailing list, but sadly got no feedback):

 Thanks a lot for this pointer.

I am really glad this was helpful. It was very nasty to track down, so
I was really concerned when I found it. For that reson I chose u-boot
ppc does not work with gcc 4.8 as a topic when I reported it to
U-Boot mailing list and put you on CC on august 5th. But maybe I
should have been more explicit, something like APOCALYPSE NOW: u-boot
ppc does not work with gcc 4.8 ;)

This problem is *not* fixed by the links Marek addressed.

Just a quick explanation of what is going on:
Since gcc 4.8 we have new sections .data.rel.ro and
.data.rel.ro.local. They contain absolute addresses that should really
be fixed up in our relocation process but are not considered yet.
In your case  you wre running u-boot referencing the not fixed-up
addresses which worked perfectly as long as they still pointed to
valid content. But as soon as you erased flash this was no longer the
case. To make debugging even more fun, behaviour also depends on cache
contents.

In my original mail I referenced this potential solution, at least it
worked for me:
https://gcc.gnu.org/ml/gcc-help/2014-02/msg00054.html

Cheers
DIrk
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Re: [U-Boot] Relocation issue - need help!

[Dirk Eibach]

Hello Wolfgang,

2014-10-23 15:10 GMT+02:00 Wolfgang Denk w...@denx.de:
 Given that GCC 4.9.1 apparently solves this issue I wonder which
 approach we should take?

 Should we blacklist GCC 4.8.x (and 4.9.0) like the kernel folks are
 doing [1] ?

 [1] https://lkml.org/lkml/2014/10/10/272

question is: what are the gcc folks going to do with the relro stuff?
It seems the sections are not used in 4.9.1, but will this be true for
future releases? If we are not absolutely sure they will not be used
anymore, adding them to the linker scripts is probably the best
option. Anybody with deeper gcc insights following this thread?

Cheers
Dirk
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Re: [U-Boot] Relocation issue - need help!

[Dirk Eibach]

I had exactly the same behaviour some time ago and tracked it down to
this (and posted it on the mailing list, but sadly got no feedback):

In my latest u-boot builds I had some strange behaviour that I finally
tracked down to not fixed up flash addresses in relocated u-boot.
These addresses come from symbols in the .data.rel.ro.local section
that is not handled by u-boot linker scripts at the moment.

Some background on relro: http://www.airs.com/blog/archives/189

Joerg Albert already inquired about this on the gcc ML:
https://gcc.gnu.org/ml/gcc-help/2014-02/msg00017.html and he already
suggested a solution:
https://gcc.gnu.org/ml/gcc-help/2014-02/msg00054.html

So there a three things to notice:
1. Do not use gcc 4.8 and u-boot at the moment.
2. You might not notice that you have a problem until you erase u-boot
from flash (and get your cache flushed).
3. Handling relro properly should be on the TODO-List

Maybe this is already common knowledge an maybe somebody is already
working on this - but I did not notice yet. So in this case: sorry for
the noise :)

2014-10-22 14:39 GMT+02:00 Wolfgang Denk w...@denx.de:
 Hi,

 I'm trying to track down a syntax error issue that gets triggered
 when erasing the U-Boot image in NOR flash.  Symptoms look like this:

 = print update
 update=protect off 0xfc00 +${filesize};erase 0xfc00 
 +${filesize};cp.b 20 0xfc00 ${filesize};protect on 0xfc00 
 +${filesize}
 = run update
 Un-Protected 2 sectors

 .. done
 Erased 2 sectors
 syntax error
 Protected 2 sectors
 = run update
 syntax error

 git bisect found commit 199adb6 common/misc: sparse fixes as
 culprit; breaking this down further showed a single line in
 common/cli_hush.c to trigger the problem. This patch fixes it:

 ---
  common/cli_hush.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

 diff --git a/common/cli_hush.c b/common/cli_hush.c
 index 38da5a0..5bbcfe6 100644
 --- a/common/cli_hush.c
 +++ b/common/cli_hush.c
 @@ -3127,7 +3127,7 @@ static void mapset(const unsigned char *set, int code)
 for (s=set; *s; s++) map[*s] = code;
  }

 -static void update_ifs_map(void)
 +void update_ifs_map(void)
  {
 /* char *ifs and char map[256] are both globals. */
 ifs = (uchar *)getenv(IFS);
 --
 1.8.3.1

 But I still have bad feelings - symptoms indicate that this is
 actually a relocation issue, as it only gets triggered when erasing
 the U-Boot image in NOR flash, so probably there are still pointers to
 data in NOR being used.  This patch here is not suited to fix the
 original cause of this issue.  But then, I do not see where there
 might be a relocation problem.  To be sure I even verified that ifs
 and map[] are really in RAM all the time.

 Has anybody an idea how to further track this down?  Or is the patch
 above actually a real fix?  If so, why?

 Best regards,

 Wolfgang Denk

 --
 DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
 HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
 Old programmers never die, they just branch to a new address.
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[U-Boot] u-boot ppc does not work with gcc 4.8

[Dirk Eibach]

In my latest u-boot builds I had some strange behaviour that I finally
tracked down to not fixed up flash addresses in relocated u-boot.
These addresses come from symbols in the .data.rel.ro.local section
that is not handled by u-boot linker scripts at the moment.

Some background on relro: http://www.airs.com/blog/archives/189

Joerg Albert already inquired about this on the gcc ML:
https://gcc.gnu.org/ml/gcc-help/2014-02/msg00017.html and he already
suggested a solution:
https://gcc.gnu.org/ml/gcc-help/2014-02/msg00054.html

So there a three things to notice:
1. Do not use gcc 4.8 and u-boot at the moment.
2. You might not notice that you have a problem until you erase u-boot
from flash (and get your cache flushed).
3. Handling relro properly should be on the TODO-List

Maybe this is already common knowledge an maybe somebody is already
working on this - but I did not notice yet. So in this case: sorry for
the noise :)

Cheers
Dirk
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[U-Boot] [PATCH v2 2/2] board: Add CONFIG_SYS_GENERIC_BOARD to all gdsys boards

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

Add the generic board infrastructure to all gdsys boards.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---

Changes in v2: None

 include/configs/controlcenterd.h | 2 ++
 include/configs/dlvision-10g.h   | 1 +
 include/configs/dlvision.h   | 1 +
 include/configs/gdppc440etx.h| 1 +
 include/configs/intip.h  | 1 +
 include/configs/io.h | 1 +
 include/configs/io64.h   | 1 +
 include/configs/iocon.h  | 1 +
 include/configs/neo.h| 1 +
 9 files changed, 10 insertions(+)

diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index ec3145f..7eaaf69 100644
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -45,6 +45,8 @@
 #define CONFIG_CONTROLCENTERD
 #define CONFIG_MP  /* support multiple processors */
 
+#define CONFIG_SYS_GENERIC_BOARD
+
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_ENABLE_36BIT_PHYS
 #define CONFIG_FSL_LAW /* Use common FSL init code */
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index 6153a40..d9bd564 100644
--- a/include/configs/dlvision-10g.h
+++ b/include/configs/dlvision-10g.h
@@ -24,6 +24,7 @@
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_MISC_INIT_R
 #define CONFIG_LAST_STAGE_INIT
+#define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_SYS_CLK_FREQ /* external frequency to pll   */
 
diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h
index 1e86c55..af0d602 100644
--- a/include/configs/dlvision.h
+++ b/include/configs/dlvision.h
@@ -22,6 +22,7 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F  /* call board_early_init_f */
 #define CONFIG_MISC_INIT_R /* call misc_init_r */
+#define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_SYS_CLK_FREQ /* external frequency to pll   */
 
diff --git a/include/configs/gdppc440etx.h b/include/configs/gdppc440etx.h
index 6810b3b..12fd75d 100644
--- a/include/configs/gdppc440etx.h
+++ b/include/configs/gdppc440etx.h
@@ -32,6 +32,7 @@
 
 #define CONFIG_BOARD_EARLY_INIT_F  1   /* call board_early_init_f*/
 #define CONFIG_MISC_INIT_R 1   /* call misc_init_r() */
+#define CONFIG_SYS_GENERIC_BOARD
 
 #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
 #define CONFIG_AUTOBOOT_KEYED  /* use key strings to stop autoboot */
diff --git a/include/configs/intip.h b/include/configs/intip.h
index b56b3aa..928eb5b 100644
--- a/include/configs/intip.h
+++ b/include/configs/intip.h
@@ -45,6 +45,7 @@
 #define CONFIG_BOARD_EARLY_INIT_F  1   /* Call board_early_init_f */
 #define CONFIG_BOARD_EARLY_INIT_R  1   /* Call board_early_init_r */
 #define CONFIG_MISC_INIT_R 1   /* Call misc_init_r */
+#define CONFIG_SYS_GENERIC_BOARD
 #define CONFIG_BOARD_TYPES 1   /* support board types */
 #define CONFIG_FIT
 #define CFG_ALT_MEMTEST
diff --git a/include/configs/io.h b/include/configs/io.h
index 8e32c25..d4ae0ad 100644
--- a/include/configs/io.h
+++ b/include/configs/io.h
@@ -24,6 +24,7 @@
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_MISC_INIT_R
 #define CONFIG_LAST_STAGE_INIT
+#define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_SYS_CLK_FREQ /* external frequency to pll   */
 
diff --git a/include/configs/io64.h b/include/configs/io64.h
index 6915b20..2a9ff37 100644
--- a/include/configs/io64.h
+++ b/include/configs/io64.h
@@ -43,6 +43,7 @@
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_MISC_INIT_R
 #define CONFIG_LAST_STAGE_INIT
+#define CONFIG_SYS_GENERIC_BOARD
 
 #undef CONFIG_ZERO_BOOTDELAY_CHECK /* ignore keypress on bootdelay==0 */
 #define CONFIG_AUTOBOOT_KEYED  /* use key strings to stop autoboot */
diff --git a/include/configs/iocon.h b/include/configs/iocon.h
index ae05bcb..38d473d 100644
--- a/include/configs/iocon.h
+++ b/include/configs/iocon.h
@@ -23,6 +23,7 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_LAST_STAGE_INIT
+#define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_SYS_CLK_FREQ /* external frequency to pll   */
 
diff --git a/include/configs/neo.h b/include/configs/neo.h
index 4937730..09300ca 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -25,6 +25,7 @@
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_MISC_INIT_R
 #define CONFIG_LAST_STAGE_INIT
+#define CONFIG_SYS_GENERIC_BOARD
 
 #define CONFIG_SYS_CLK_FREQ /* external frequency to pll   */
 
-- 
1.8.3

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[U-Boot] [PATCH v2 0/2] Add CONFIG_SYS_GENERIC_BOARD to all gdsys boards

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc



Changes in v2:
- make this work for all 4xx flavours

Dirk Eibach (2):
  ppc: Make ppc4xx ready for CONFIG_SYS_GENERIC_BOARD
  board: Add CONFIG_SYS_GENERIC_BOARD to all gdsys boards

 arch/powerpc/cpu/ppc4xx/cpu_init.c | 4 ++--
 include/configs/controlcenterd.h   | 2 ++
 include/configs/dlvision-10g.h | 1 +
 include/configs/dlvision.h | 1 +
 include/configs/gdppc440etx.h  | 1 +
 include/configs/intip.h| 1 +
 include/configs/io.h   | 1 +
 include/configs/io64.h | 1 +
 include/configs/iocon.h| 1 +
 include/configs/neo.h  | 1 +
 10 files changed, 12 insertions(+), 2 deletions(-)

-- 
1.8.3

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[U-Boot] [PATCH v2 1/2] ppc: Make ppc4xx ready for CONFIG_SYS_GENERIC_BOARD

[dirk . eibach]

From: Dirk Eibach dirk.eib...@gdsys.cc

The generic board  infrastructure assumes that gd is set by
arch code.

Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc

---

Changes in v2:
- make this work for all 4xx flavours

 arch/powerpc/cpu/ppc4xx/cpu_init.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d465dcd..0b27d29 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -12,9 +12,7 @@
 #include asm/ppc4xx-gpio.h
 #include asm/ppc4xx.h
 
-#if defined(CONFIG_405GP)  || defined(CONFIG_405EP)
 DECLARE_GLOBAL_DATA_PTR;
-#endif
 
 #ifndef CONFIG_SYS_PLL_RECONFIG
 #define CONFIG_SYS_PLL_RECONFIG0
@@ -451,6 +449,8 @@ cpu_init_f (void)
mtdcr(PLB4A1_ACR, (mfdcr(PLB4A1_ACR)  ~PLB4Ax_ACR_RDP_MASK) |
  PLB4Ax_ACR_RDP_4DEEP);
 #endif /* CONFIG_440SP/SPE || CONFIG_460EX/GT || CONFIG_405EX */
+
+   gd = (gd_t *)(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
 }
 
 /*
-- 
1.8.3

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