Re: [U-Boot] [PATCH v2 08/13] video: exynos: fimd: add support for various display color modes
Hi,
On 19 Dec, 2013 03:31, Przemyslaw Marczak wrote:
Now fimd BPP color mode depends on vl_bpp value in struct panel_info.
There is only 16BPP mode check, default mode is 24BPP.
Other fimd modes are usually unneeded and also needs some fimd driver
modifications and tests.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
- check panel_info vl_bpix when setting fimd color mode
- move boards configs update to another commit.
---
drivers/video/exynos_fimd.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index f962c4f..cebbba7 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -73,18 +73,19 @@ static void exynos_fimd_set_par(unsigned int win_id)
/* DATAPATH is DMA */
cfg |= EXYNOS_WINCON_DATAPATH_DMA;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_WSWP_ENABLE;
- else /* To get output console on LCD */
- cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+ cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
/* dma burst is 16 */
cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
- else /* To get output console on LCD */
+ switch (pvid-vl_bpix) {
+ case 4:
cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+ break;
+ default:
+ cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+ break;
+ }
writel(cfg, (unsigned int)fimd_ctrl-wincon0 +
EXYNOS_WINCON(win_id));
It looks good to me.
Acked-by: Donghwa Lee dh09@samsung.com
BR,
Donghwa Lee.
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Re: [U-Boot] [PATCH 06/10] video: exynos: fimd: always use 16bpp display mode.
On 10 Dec 2013 17:15, Przemyslaw Marczak wrote:
Hello Donghwa,
On 12/10/2013 06:47 AM, Donghwa Lee wrote:
Hi,
On 3 Dec 2013 18:03, Przemyslaw wrote:
This change updates exynos board files too.
16 bpp mode is required by LCD console mode.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/trats/trats.c |2 +-
board/samsung/trats2/trats2.c|2 +-
board/samsung/universal_c210/universal.c |2 +-
drivers/video/exynos_fimd.c | 10 ++
include/configs/s5pc210_universal.h |2 +-
include/configs/trats.h |2 +-
include/configs/trats2.h |2 +-
7 files changed, 8 insertions(+), 14 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index ce4b41f..db527c7 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -739,7 +739,7 @@ vidinfo_t panel_info = {
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_LOW,
- .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
+ .vl_bpix= 4,/* Bits per pixel, 2^4 = 16 */
/* s6e8ax0 Panel infomation */
.vl_hspw= 5,
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 73b8cc1..6fa02c9 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -542,7 +542,7 @@ vidinfo_t panel_info = {
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_LOW,
- .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
+ .vl_bpix= 4,/* Bits per pixel, 2^4 = 16 */
/* s6e8ax0 Panel infomation */
.vl_hspw= 5,
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
index 166d5ee..1ebea0f 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -446,7 +446,7 @@ vidinfo_t panel_info = {
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
- .vl_bpix= 5,/* Bits per pixel */
+ .vl_bpix= 4,/* Bits per pixel */
/* LD9040 LCD Panel */
.vl_hspw= 2,
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index f962c4f..847fbe8 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -73,18 +73,12 @@ static void exynos_fimd_set_par(unsigned int win_id)
/* DATAPATH is DMA */
cfg |= EXYNOS_WINCON_DATAPATH_DMA;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_WSWP_ENABLE;
- else /* To get output console on LCD */
- cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+ cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
/* dma burst is 16 */
cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
- else /* To get output console on LCD */
- cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+ cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
Why does exynos fimd always use 16bpp display mode?
Good question. I switched fimd to 16BPP because of LCD framework which
supports in max 16BPP mode for LCD console. Leaving fimd 32BPP mode and
16BPP console is possible but it causes wrong setup of lcd console row
and columns, it also displays wrong size fonts.
It could be used as other bpp modes in exynos.
How do you use above vl_bpix variable in panel_info structure to check bpp
mode?
Actually vl_bpix was never used to check BPP mode in fimd driver, it was
only used to set proper memory space. Fimd BPP mode was set by checking
logo_on in panel_info structure.
This is good reason to use vl_bpix in fimd driver to set proper BPP. I
will change this to something like this:
if (pvid-vl_bpix == 4)
cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
else
cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
Do you agree?
There is many others bpp modes, but in most cases, we usually use 16bpp or
24bpp modes.
To support many bpp modes more than two, it looks good to use 'switch' like
below.
switch(pvid-vl_bpix) {
case 0;
...
case 1:
...
...
case 5:
...
}
BR,
Donghwa Lee.
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Re: [U-Boot] FW: [PATCH 06/10] video: exynos: fimd: always use 16bpp display mode.
Hi,
On 3 Dec 2013 18:03, Przemyslaw wrote:
This change updates exynos board files too.
16 bpp mode is required by LCD console mode.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
board/samsung/trats/trats.c |2 +-
board/samsung/trats2/trats2.c|2 +-
board/samsung/universal_c210/universal.c |2 +-
drivers/video/exynos_fimd.c | 10 ++
include/configs/s5pc210_universal.h |2 +-
include/configs/trats.h |2 +-
include/configs/trats2.h |2 +-
7 files changed, 8 insertions(+), 14 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index ce4b41f..db527c7 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -739,7 +739,7 @@ vidinfo_t panel_info = {
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_LOW,
- .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
+ .vl_bpix= 4,/* Bits per pixel, 2^4 = 16 */
/* s6e8ax0 Panel infomation */
.vl_hspw= 5,
diff --git a/board/samsung/trats2/trats2.c b/board/samsung/trats2/trats2.c
index 73b8cc1..6fa02c9 100644
--- a/board/samsung/trats2/trats2.c
+++ b/board/samsung/trats2/trats2.c
@@ -542,7 +542,7 @@ vidinfo_t panel_info = {
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_LOW,
- .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
+ .vl_bpix= 4,/* Bits per pixel, 2^4 = 16 */
/* s6e8ax0 Panel infomation */
.vl_hspw= 5,
diff --git a/board/samsung/universal_c210/universal.c
b/board/samsung/universal_c210/universal.c
index 166d5ee..1ebea0f 100644
--- a/board/samsung/universal_c210/universal.c
+++ b/board/samsung/universal_c210/universal.c
@@ -446,7 +446,7 @@ vidinfo_t panel_info = {
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
- .vl_bpix= 5,/* Bits per pixel */
+ .vl_bpix= 4,/* Bits per pixel */
/* LD9040 LCD Panel */
.vl_hspw= 2,
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index f962c4f..847fbe8 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -73,18 +73,12 @@ static void exynos_fimd_set_par(unsigned int win_id)
/* DATAPATH is DMA */
cfg |= EXYNOS_WINCON_DATAPATH_DMA;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_WSWP_ENABLE;
- else /* To get output console on LCD */
- cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+ cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
/* dma burst is 16 */
cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
- if (pvid-logo_on) /* To get proprietary LOGO */
- cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
- else /* To get output console on LCD */
- cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+ cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
Why does exynos fimd always use 16bpp display mode?
It could be used as other bpp modes in exynos.
How do you use above vl_bpix variable in panel_info structure to check bpp mode?
BR,
Donghwa Lee.
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Re: [U-Boot] [PATCH V2] Origen: Set FIMD as the default display path
On Fri, Aug 16, 2013 at 16:31, Ajay kumar wrote: On Thu, Aug 15, 2013 at 6:53 PM, Tushar Behera tushar.beh...@linaro.org mailto:tushar.beh...@linaro.org wrote: On EXYNOS4210, there are three paths for display data to be processed, namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller is used. Signed-off-by: Tushar Behera tushar.beh...@linaro.org mailto:tushar.beh...@linaro.org --- Changes for V2: * Updated review comments from Ajay Kumar, reusing the code from arch/arm/cpu/armv7/exynos/system.c. board/samsung/origen/origen.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c index 15f77ca..bb16699 100644 --- a/board/samsung/origen/origen.c +++ b/board/samsung/origen/origen.c @@ -22,6 +22,9 @@ int board_init(void) gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); + + set_system_display_ctrl(); + Ok. You are trying to get the display up in the kernel, without enabling the display in u-boot. And, thats why you are making an explicit call here? Previously, Ajay kumar said set_system_display_ctrl() function is already called by lcd_ctrl_init() of exynos_fb.c. If you need to use FIMD path, you'd better use the existing one. return 0; } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] Origen: Set FIMD as the default display path
On 2013년 08월 19일 12:06, Tushar Behera wrote: On 19 August 2013 07:22, Donghwa Lee dh09@samsung.com wrote: On Fri, Aug 16, 2013 at 16:31, Ajay kumar wrote: On Thu, Aug 15, 2013 at 6:53 PM, Tushar Behera tushar.beh...@linaro.org wrote: On EXYNOS4210, there are three paths for display data to be processed, namely MIE, MDNIE and FIMD. On Origen board, FIMD display controller is used. Signed-off-by: Tushar Behera tushar.beh...@linaro.org --- Changes for V2: * Updated review comments from Ajay Kumar, reusing the code from arch/arm/cpu/armv7/exynos/system.c. board/samsung/origen/origen.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/board/samsung/origen/origen.c b/board/samsung/origen/origen.c index 15f77ca..bb16699 100644 --- a/board/samsung/origen/origen.c +++ b/board/samsung/origen/origen.c @@ -22,6 +22,9 @@ int board_init(void) gpio2 = (struct exynos4_gpio_part2 *) EXYNOS4_GPIO_PART2_BASE; gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); + + set_system_display_ctrl(); + Ok. You are trying to get the display up in the kernel, without enabling the display in u-boot. And, thats why you are making an explicit call here? Yes, as of now, I don't want LCD support in u-boot, but I want to just enable the display path. If you don't need to LCD support in u-boot, which case do you need to enable the display path to FIMD? Previously, Ajay kumar said set_system_display_ctrl() function is already called by lcd_ctrl_init() of exynos_fb.c. If you need to use FIMD path, you'd better use the existing one. I tried enabling CONFIG_LCD and related config options so that existing display path in u-boot is called. That somehow stalls the u-boot and I didn't want to pursue that much as calling this function fixes my issue. return 0; } -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH RESEND] exynos: video: change mipi dsi write function parameters correctly
This patch have changed mipi dsi write functions' parameters correctly
so that type cast operations were removed. And mipi dsi payload is
composed with array of panel commands to improve readability.
Signed-off-by: Donghwa Lee dh09@samsung.com
---
arch/arm/include/asm/arch-exynos/mipi_dsim.h |2 +-
drivers/video/exynos_mipi_dsi_common.c | 62 --
drivers/video/exynos_mipi_dsi_common.h |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.c |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.h |2 +-
drivers/video/s6e8ax0.c | 59 +---
6 files changed, 66 insertions(+), 63 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index b73263d..afe7c08 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -304,7 +304,7 @@ struct exynos_platform_mipi_dsim {
*/
struct mipi_dsim_master_ops {
int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
- unsigned int data0, unsigned int data1);
+ const unsigned char *data0, unsigned int data1);
int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
unsigned int data0, unsigned int data1);
int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
diff --git a/drivers/video/exynos_mipi_dsi_common.c
b/drivers/video/exynos_mipi_dsi_common.c
index 6eeb464..1fc6102 100644
--- a/drivers/video/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos_mipi_dsi_common.c
@@ -63,7 +63,7 @@ static unsigned int dpll_table[15] = {
};
static void exynos_mipi_dsi_long_data_wr(struct mipi_dsim_device *dsim,
- unsigned int data0, unsigned int data1)
+ const unsigned char *data0, unsigned int data1)
{
unsigned int data_cnt = 0, payload = 0;
@@ -75,42 +75,40 @@ static void exynos_mipi_dsi_long_data_wr(struct
mipi_dsim_device *dsim,
*/
if ((data1 - data_cnt) 4) {
if ((data1 - data_cnt) == 3) {
- payload = *(u8 *)(data0 + data_cnt) |
- (*(u8 *)(data0 + (data_cnt + 1))) 8 |
- (*(u8 *)(data0 + (data_cnt + 2))) 16;
+ payload = data0[data_cnt] |
+ data0[data_cnt + 1] 8 |
+ data0[data_cnt + 2] 16;
debug(count = 3 payload = %x, %x %x %x\n,
- payload, *(u8 *)(data0 + data_cnt),
- *(u8 *)(data0 + (data_cnt + 1)),
- *(u8 *)(data0 + (data_cnt + 2)));
+ payload, data0[data_cnt],
+ data0[data_cnt + 1],
+ data0[data_cnt + 2]);
} else if ((data1 - data_cnt) == 2) {
- payload = *(u8 *)(data0 + data_cnt) |
- (*(u8 *)(data0 + (data_cnt + 1))) 8;
+ payload = data0[data_cnt] |
+ data0[data_cnt + 1] 8;
debug(count = 2 payload = %x, %x %x\n, payload,
- *(u8 *)(data0 + data_cnt),
- *(u8 *)(data0 + (data_cnt + 1)));
+ data0[data_cnt], data0[data_cnt + 1]);
} else if ((data1 - data_cnt) == 1) {
- payload = *(u8 *)(data0 + data_cnt);
+ payload = data0[data_cnt];
}
} else {
/* send 4bytes per one time. */
- payload = *(u8 *)(data0 + data_cnt) |
- (*(u8 *)(data0 + (data_cnt + 1))) 8 |
- (*(u8 *)(data0 + (data_cnt + 2))) 16 |
- (*(u8 *)(data0 + (data_cnt + 3))) 24;
+ payload = data0[data_cnt] |
+ data0[data_cnt + 1] 8 |
+ data0[data_cnt + 2] 16 |
+ data0[data_cnt + 3] 24;
debug(count = 4 payload = %x, %x %x %x %x\n,
payload, *(u8 *)(data0 + data_cnt),
- *(u8 *)(data0 + (data_cnt + 1)),
- *(u8 *)(data0 + (data_cnt + 2)),
- *(u8 *)(data0 + (data_cnt + 3)));
-
+ data0[data_cnt + 1],
+ data0[data_cnt + 2],
+ data0[data_cnt + 3]);
}
exynos_mipi_dsi_wr_tx_data(dsim, payload);
}
}
int
[U-Boot] [PATCH RESEND] video: exynos: change mipi dsi write function parameters correctly
The previous patches is broken, so I send again.
This patch have changed mipi dsi write functions' parameters correctly.
- exynos_mipi_dsi_wr_data()'s 3rd parameter is changed to
'const unsigned char' type.
- exynos_mipi_dsi_wr_tx_header()'s 3rd and 4th parameters were changed
to 'const unsigned char' type.
- s6e8ax0 panel driver does not use type cast operations to write
mipi dsi commands anymore.
- mipi dsi payload is composed with array of panel commands to improve
readability.
- removes unused variable of exynos_mipi_dsi_wr_data()
Signed-off-by: Donghwa Lee dh09@samsung.com
---
arch/arm/include/asm/arch-exynos/mipi_dsim.h |2 +-
drivers/video/exynos_mipi_dsi_common.c | 62
--
drivers/video/exynos_mipi_dsi_common.h |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.c |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.h |2 +-
drivers/video/s6e8ax0.c | 59
+---
6 files changed, 66 insertions(+), 63 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index b73263d..afe7c08 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -304,7 +304,7 @@ struct exynos_platform_mipi_dsim {
*/
struct mipi_dsim_master_ops {
int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
-unsigned int data0, unsigned int data1);
+const unsigned char *data0, unsigned int data1);
int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
unsigned int data0, unsigned int data1);
int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
diff --git a/drivers/video/exynos_mipi_dsi_common.c
b/drivers/video/exynos_mipi_dsi_common.c
index 6eeb464..1fc6102 100644
--- a/drivers/video/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos_mipi_dsi_common.c
@@ -63,7 +63,7 @@ static unsigned int dpll_table[15] = {
};
static void exynos_mipi_dsi_long_data_wr(struct mipi_dsim_device *dsim,
-unsigned int data0, unsigned int data1)
+const unsigned char *data0, unsigned int data1)
{
unsigned int data_cnt = 0, payload = 0;
@@ -75,42 +75,40 @@ static void exynos_mipi_dsi_long_data_wr(struct
mipi_dsim_device *dsim,
*/
if ((data1 - data_cnt) 4) {
if ((data1 - data_cnt) == 3) {
-payload = *(u8 *)(data0 + data_cnt) |
-(*(u8 *)(data0 + (data_cnt + 1))) 8 |
-(*(u8 *)(data0 + (data_cnt + 2))) 16;
+payload = data0[data_cnt] |
+data0[data_cnt + 1] 8 |
+data0[data_cnt + 2] 16;
debug(count = 3 payload = %x, %x %x %x\n,
-payload, *(u8 *)(data0 + data_cnt),
-*(u8 *)(data0 + (data_cnt + 1)),
-*(u8 *)(data0 + (data_cnt + 2)));
+payload, data0[data_cnt],
+data0[data_cnt + 1],
+data0[data_cnt + 2]);
} else if ((data1 - data_cnt) == 2) {
-payload = *(u8 *)(data0 + data_cnt) |
-(*(u8 *)(data0 + (data_cnt + 1))) 8;
+payload = data0[data_cnt] |
+data0[data_cnt + 1] 8;
debug(count = 2 payload = %x, %x %x\n, payload,
-*(u8 *)(data0 + data_cnt),
-*(u8 *)(data0 + (data_cnt + 1)));
+data0[data_cnt], data0[data_cnt + 1]);
} else if ((data1 - data_cnt) == 1) {
-payload = *(u8 *)(data0 + data_cnt);
+payload = data0[data_cnt];
}
} else {
/* send 4bytes per one time. */
-payload = *(u8 *)(data0 + data_cnt) |
-(*(u8 *)(data0 + (data_cnt + 1))) 8 |
-(*(u8 *)(data0 + (data_cnt + 2))) 16 |
-(*(u8 *)(data0 + (data_cnt + 3))) 24;
+payload = data0[data_cnt] |
+data0[data_cnt + 1] 8 |
+data0[data_cnt + 2] 16 |
+data0[data_cnt + 3] 24;
debug(count = 4 payload = %x, %x %x %x %x\n,
payload, *(u8 *)(data0 + data_cnt),
-*(u8 *)(data0 + (data_cnt + 1)),
-*(u8 *)(data0 + (data_cnt + 2)),
-*(u8 *)(data0 + (data_cnt + 3)));
-
+data0[data_cnt + 1],
+data0[data_cnt + 2],
+data0[data_cnt + 3]);
}
exynos_mipi_dsi_wr_tx_data(dsim, payload);
}
}
int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned
int data_id,
-unsigned int data0, unsigned int data1)
+const unsigned char *data0, unsigned int data1)
{
unsigned int timeout = TRY_GET_FIFO_TIMEOUT;
unsigned long delay_val, delay;
@@ -149,8 +147,8 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device
*dsim, unsigned int data_id,
case
[U-Boot] [PATCH] video: exynos: Change mipi dsi write function parameters correctly
This patch have changed mipi dsi write functions' parameters correctly.
- exynos_mipi_dsi_wr_data()'s 3rd parameter is changed to
'const unsigned char' type.
- exynos_mipi_dsi_wr_tx_header()'s 3rd and 4th parameters were
changed to
'const unsigned char' type.
- s6e8ax0 panel driver does not use type cast operations to write
mipi dsi
commands anymore.
- mipi dsi payload is composed with array of panel commands to improve
readability.
Signed-off-by: Donghwa Lee dh09@samsung.com
---
arch/arm/include/asm/arch-exynos/mipi_dsim.h |2 +-
drivers/video/exynos_mipi_dsi_common.c | 60
--
drivers/video/exynos_mipi_dsi_common.h |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.c |2 +-
drivers/video/exynos_mipi_dsi_lowlevel.h |2 +-
drivers/video/s6e8ax0.c | 59
++---
6 files changed, 65 insertions(+), 62 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index b73263d..afe7c08 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -304,7 +304,7 @@ struct exynos_platform_mipi_dsim {
*/
struct mipi_dsim_master_ops {
int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
-unsigned int data0, unsigned int data1);
+const unsigned char *data0, unsigned int data1);
int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
unsigned int data0, unsigned int data1);
int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
diff --git a/drivers/video/exynos_mipi_dsi_common.c
b/drivers/video/exynos_mipi_dsi_common.c
index 6eeb464..ceb6084 100644
--- a/drivers/video/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos_mipi_dsi_common.c
@@ -63,7 +63,7 @@ static unsigned int dpll_table[15] = {
};
static void exynos_mipi_dsi_long_data_wr(struct mipi_dsim_device *dsim,
-unsigned int data0, unsigned int data1)
+const unsigned char *data0, unsigned int data1)
{
unsigned int data_cnt = 0, payload = 0;
@@ -75,42 +75,40 @@ static void exynos_mipi_dsi_long_data_wr(struct
mipi_dsim_device *dsim,
*/
if ((data1 - data_cnt) 4) {
if ((data1 - data_cnt) == 3) {
-payload = *(u8 *)(data0 + data_cnt) |
-(*(u8 *)(data0 + (data_cnt + 1))) 8 |
-(*(u8 *)(data0 + (data_cnt + 2))) 16;
+payload = data0[data_cnt] |
+data0[data_cnt + 1] 8 |
+data0[data_cnt + 2] 16;
debug(count = 3 payload = %x, %x %x %x\n,
-payload, *(u8 *)(data0 + data_cnt),
-*(u8 *)(data0 + (data_cnt + 1)),
-*(u8 *)(data0 + (data_cnt + 2)));
+payload, data0[data_cnt],
+data0[data_cnt + 1],
+data0[data_cnt + 2]);
} else if ((data1 - data_cnt) == 2) {
-payload = *(u8 *)(data0 + data_cnt) |
-(*(u8 *)(data0 + (data_cnt + 1))) 8;
+payload = data0[data_cnt] |
+data0[data_cnt + 1] 8;
debug(count = 2 payload = %x, %x %x\n, payload,
-*(u8 *)(data0 + data_cnt),
-*(u8 *)(data0 + (data_cnt + 1)));
+data0[data_cnt], data0[data_cnt + 1]);
} else if ((data1 - data_cnt) == 1) {
-payload = *(u8 *)(data0 + data_cnt);
+payload = data0[data_cnt];
}
} else {
/* send 4bytes per one time. */
-payload = *(u8 *)(data0 + data_cnt) |
-(*(u8 *)(data0 + (data_cnt + 1))) 8 |
-(*(u8 *)(data0 + (data_cnt + 2))) 16 |
-(*(u8 *)(data0 + (data_cnt + 3))) 24;
+payload = data0[data_cnt] |
+data0[data_cnt + 1] 8 |
+data0[data_cnt + 2] 16 |
+data0[data_cnt + 3] 24;
debug(count = 4 payload = %x, %x %x %x %x\n,
payload, *(u8 *)(data0 + data_cnt),
-*(u8 *)(data0 + (data_cnt + 1)),
-*(u8 *)(data0 + (data_cnt + 2)),
-*(u8 *)(data0 + (data_cnt + 3)));
-
+data0[data_cnt + 1],
+data0[data_cnt + 2],
+data0[data_cnt + 3]);
}
exynos_mipi_dsi_wr_tx_data(dsim, payload);
}
}
int exynos_mipi_dsi_wr_data(struct mipi_dsim_device *dsim, unsigned
int data_id,
-unsigned int data0, unsigned int data1)
+const unsigned char *data0, unsigned int data1)
{
unsigned int timeout = TRY_GET_FIFO_TIMEOUT;
unsigned long delay_val, delay;
@@ -149,8 +147,8 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device
*dsim, unsigned int data_id,
case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
case
[U-Boot] [PATCH] video: exynos: remove unused variable of exynos_mipi_dsi_wr_data()
This patch removes unused variable of exynos_mipi_dsi_wr_data()
Signed-off-by: Donghwa Lee dh09@samsung.com
---
drivers/video/exynos_mipi_dsi_common.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/exynos_mipi_dsi_common.c
b/drivers/video/exynos_mipi_dsi_common.c
index ceb6084..1fc6102 100644
--- a/drivers/video/exynos_mipi_dsi_common.c
+++ b/drivers/video/exynos_mipi_dsi_common.c
@@ -194,7 +194,7 @@ int exynos_mipi_dsi_wr_data(struct mipi_dsim_device
*dsim, unsigned int data_id,
case MIPI_DSI_GENERIC_LONG_WRITE:
case MIPI_DSI_DCS_LONG_WRITE:
{
-unsigned int data_cnt = 0, payload = 0;
+unsigned int payload = 0;
/* if data count is less then 4, then send 3bytes data. */
if (data1 4) {
--
1.7.9.5
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Re: [U-Boot] [PATCH] video: exynos_fb: Add the missing #else clause
It looks good to me. Acked-by: Donghwa Lee dh09@samsung.com Thank you, Donghwa Lee On Mon, Apr 22, 2013 at 02:03, Ajay kumar wrote: ping. On Thu, Apr 4, 2013 at 7:55 PM, Ajay Kumar ajaykumar...@samsung.com mailto:ajaykumar...@samsung.com wrote: This patch fixes a bug introduced while adding DT support to Exynos FIMD driver: commit c23f3157d69bbb6c044256870f745f195b12431e Author: Ajay Kumar ajaykumar...@samsung.com mailto:ajaykumar...@samsung.com Date: Thu Feb 21 23:53:01 2013 + video: exynos_fb: add DT support for FIMD driver Even though this part of code was missing, things were working fine on Exynos5250 because, samsung_get_base_fimd() used to give the correct base address for Exynos5250 FIMD. Signed-off-by: Ajay Kumar ajaykumar...@samsung.com mailto:ajaykumar...@samsung.com --- drivers/video/exynos_fimd.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c index 3359949..7243ea3 100644 --- a/drivers/video/exynos_fimd.c +++ b/drivers/video/exynos_fimd.c @@ -280,8 +280,9 @@ void exynos_fimd_lcd_init(vidinfo_t *vid) node, reg); if (fimd_ctrl == NULL) debug(Can't get the FIMD base address\n); -#endif +#else fimd_ctrl = (struct exynos_fb *)samsung_get_base_fimd(); +#endif offset = exynos_fimd_get_base_offset(); -- 1.8.0 ___ U-Boot mailing list U-Boot@lists.denx.de mailto:U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] EXYNOS: EXYNOS5250: add gpio structure for EXYNOS5250
This patch add gpio structure of exynos5250.
Exynos5xxx series has each different gpio bank, so it is needed to separate.
After separation task, useless variables will be removed.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/gpio.h | 80
+++
1 files changed, 80 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/gpio.h
b/arch/arm/include/asm/arch-exynos/gpio.h
index cfe1024..be84b87 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
@@ -196,6 +196,62 @@ struct exynos5_gpio_part4 {
struct s5p_gpio_bank z;
};
+struct exynos5250_gpio_part1 {
+struct s5p_gpio_bank a0;
+struct s5p_gpio_bank a1;
+struct s5p_gpio_bank a2;
+struct s5p_gpio_bank b0;
+struct s5p_gpio_bank b1;
+struct s5p_gpio_bank b2;
+struct s5p_gpio_bank b3;
+struct s5p_gpio_bank c0;
+struct s5p_gpio_bank c1;
+struct s5p_gpio_bank c2;
+struct s5p_gpio_bank c3;
+struct s5p_gpio_bank d0;
+struct s5p_gpio_bank d1;
+struct s5p_gpio_bank y0;
+struct s5p_gpio_bank y1;
+struct s5p_gpio_bank y2;
+struct s5p_gpio_bank y3;
+struct s5p_gpio_bank y4;
+struct s5p_gpio_bank y5;
+struct s5p_gpio_bank y6;
+struct s5p_gpio_bank res1[0x3];
+struct s5p_gpio_bank c4;
+struct s5p_gpio_bank res2[0x48];
+struct s5p_gpio_bank x0;
+struct s5p_gpio_bank x1;
+struct s5p_gpio_bank x2;
+struct s5p_gpio_bank x3;
+};
+
+struct exynos5250_gpio_part2 {
+struct s5p_gpio_bank e0;
+struct s5p_gpio_bank e1;
+struct s5p_gpio_bank f0;
+struct s5p_gpio_bank f1;
+struct s5p_gpio_bank g0;
+struct s5p_gpio_bank g1;
+struct s5p_gpio_bank g2;
+struct s5p_gpio_bank h0;
+struct s5p_gpio_bank h1;
+};
+
+struct exynos5250_gpio_part3 {
+struct s5p_gpio_bank v0;
+struct s5p_gpio_bank v1;
+struct s5p_gpio_bank res1[0x1];
+struct s5p_gpio_bank v2;
+struct s5p_gpio_bank v3;
+struct s5p_gpio_bank res2[0x1];
+struct s5p_gpio_bank v4;
+};
+
+struct exynos5250_gpio_part4 {
+struct s5p_gpio_bank z;
+};
+
/* functions */
void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio,
int en);
@@ -272,6 +328,30 @@ void s5p_gpio_set_rate(struct s5p_gpio_bank *bank,
int gpio, int mode);
- EXYNOS5_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \
* GPIO_PER_BANK) + pin) + EXYNOS5_GPIO_PART2_MAX)
+#define exynos5250_gpio_part1_get_nr(bank, pin) \
+((unsigned int) (((struct exynos5250_gpio_part1 *) \
+ EXYNOS5250_GPIO_PART1_BASE)-bank)) \
+- EXYNOS5250_GPIO_PART1_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin)
+
+#define EXYNOS5250_GPIO_PART1_MAX ((sizeof(struct exynos5250_gpio_part1) \
+/ sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos5250_gpio_part2_get_nr(bank, pin) \
+(((unsigned int) (((struct exynos5250_gpio_part2 *) \
+EXYNOS5250_GPIO_PART2_BASE)-bank)) \
+- EXYNOS52590_GPIO_PART2_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS5250_GPIO_PART1_MAX)
+
+#define EXYNOS5250_GPIO_PART2_MAX ((sizeof(struct exynos5250_gpio_part2) \
+/ sizeof(struct s5p_gpio_bank)) * GPIO_PER_BANK)
+
+#define exynos5250_gpio_part3_get_nr(bank, pin) \
+(((unsigned int) (((struct exynos5250_gpio_part3 *) \
+EXYNOS5250_GPIO_PART3_BASE)-bank)) \
+- EXYNOS5250_GPIO_PART3_BASE) / sizeof(struct s5p_gpio_bank)) \
+ * GPIO_PER_BANK) + pin) + EXYNOS5250_GPIO_PART2_MAX)
+
static inline unsigned int s5p_gpio_base(int nr)
{
if (cpu_is_exynos5()) {
--
1.7.4.1
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[U-Boot] [PATCH 1/2] EXYNOS: EXYNOS5250: add exynos5250 register addresses
This patch add exynos5250 register addresses.
Exynos5xxx series has each different register, so it is needed to separate.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/cpu.h | 33
1 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index eb34422..0b382be 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -130,6 +130,37 @@
#define EXYNOS5_ADC_BASEDEVICE_NOT_AVAILABLE
#define EXYNOS5_MODEM_BASEDEVICE_NOT_AVAILABLE
+#define EXYNOS5250_GPIO_PART4_BASE0x0386
+#define EXYNOS5250_PRO_ID0x1000
+#define EXYNOS5250_CLOCK_BASE0x1001
+#define EXYNOS5250_POWER_BASE0x1004
+#define EXYNOS5250_SWRESET0x10040400
+#define EXYNOS5250_SYSREG_BASE0x1005
+#define EXYNOS5250_WATCHDOG_BASE0x101D
+#define EXYNOS5250_DMC_PHY0_BASE0x10C0
+#define EXYNOS5250_DMC_PHY1_BASE0x10C1
+#define EXYNOS5250_GPIO_PART3_BASE0x10D1
+#define EXYNOS5250_DMC_CTRL_BASE0x10DD
+#define EXYNOS5250_GPIO_PART1_BASE0x1140
+#define EXYNOS5250_MIPI_DSIM_BASE0x11D0
+#define EXYNOS5250_USB_HOST_EHCI_BASE0x1211
+#define EXYNOS5250_USBPHY_BASE0x1213
+#define EXYNOS5250_USBOTG_BASE0x1214
+#define EXYNOS5250_MMC_BASE0x1220
+#define EXYNOS5250_SROMC_BASE0x1225
+#define EXYNOS5250_UART_BASE0x12C0
+#define EXYNOS5250_I2C_BASE0x12C6
+#define EXYNOS5250_SPI_BASE0x12D2
+#define EXYNOS5250_I2S_BASE0x12D6
+#define EXYNOS5250_PWMTIMER_BASE0x12DD
+#define EXYNOS5250_SPI_ISP_BASE0x131A
+#define EXYNOS5250_GPIO_PART2_BASE0x1340
+#define EXYNOS5250_FIMD_BASE0x1440
+#define EXYNOS5250_DP_BASE0x145B
+
+#define EXYNOS5250_ADC_BASEDEVICE_NOT_AVAILABLE
+#define EXYNOS5250_MODEM_BASEDEVICE_NOT_AVAILABLE
+
#ifndef __ASSEMBLY__
#include asm/io.h
/* CPU detection macros */
@@ -198,6 +229,8 @@ static inline unsigned int
samsung_get_base_##device(void)\
return EXYNOS4X12_##base;\
return EXYNOS4_##base;\
} else if (cpu_is_exynos5()) {\
+if (proid_is_exynos5250())\
+return EXYNOS5250_##base;\
return EXYNOS5_##base;\
}\
return 0;\
--
1.7.4.1
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[U-Boot] [PATCH 0/2] EXYNOS: EXYNOS5250: Separate setting configuration of exynos5250 from exynos5
Hi, Exynos5xxx series have each different HW configurations, for example, some register addresses, gpio banks configuration, and so on. So, each series are needed to separate from existing exynos5 configuration. [1/2] EXYNOS: EXYNOS5250: add exynos5250 register addresses [2/2] EXYNOS: EXYNOS5250: add gpio structure for EXYNOS5250 Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RESEND V2 1/4] EXYNOS5: Change parent clock of FIMD to MPLL
On 2012년 12월 20일 21:35, Ajay Kumar wrote: With VPLL as source clock to FIMD, Exynos DP Initializaton was failing sometimes with unstable clock. Changing FIMD source to MPLL resolves this issue. Signed-off-by: Ajay Kumar ajaykumar...@samsung.com Acked-by: Simon Glass s...@chromium.org --- arch/arm/cpu/armv7/exynos/clock.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index fe61f88..bfcd5f7 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -603,7 +603,7 @@ void exynos5_set_lcd_clk(void) */ cfg = readl(clk-src_disp1_0); cfg = ~(0xf); - cfg |= 0x8; + cfg |= 0x6; writel(cfg, clk-src_disp1_0); /* It looks good to me. Acked-by: Donghwa Lee dh09@samsung.com Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V3 2/4] EXYNOS: Add dummy definition to fix compilation dependency on CONFIG_EXYNOS_MIPI_DSIM
On 2012년 12월 20일 21:35, Ajay Kumar wrote:
When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM.
But if we do not select CONFIG_EXYNOS_MIPI_DSIM, exynos_fb.c throws
error saying exynos_mipi_dsi_init() not defined. So, we add
dummy definition for exynos_mipi_dsi_init when CONFIG_EXYNOS_MIPI_DSIM
is not defined.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
arch/arm/include/asm/arch-exynos/mipi_dsim.h |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index 9a7cbeb..b73263d 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -358,7 +358,14 @@ struct mipi_dsim_lcd_driver {
void(*mipi_display_on)(struct mipi_dsim_device *dsim_dev);
};
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
int exynos_mipi_dsi_init(void);
+#else
+int exynos_mipi_dsi_init(void)
+{
+ return 0;
+}
+#endif
/*
* register mipi_dsim_lcd_driver object defined by lcd panel driver
It looks good to me.
Acked-by: Donghwa Lee dh09@samsung.com
Thank you,
Donghwa Lee
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Re: [U-Boot] [PATCH V3 3/4] video: Modify exynos_fimd driver to support LCD console
On 2012년 12월 20일 21:35, Ajay Kumar wrote:
Currently, exynos FIMD driver is being used to support only TIZEN LOGOs.
In order to get LCD console, we need to enable half word swap feature
of FIMD and use 16 BPP.
LCD console and proprietary Logo cannot be used simultaneously.
You should define CONFIG_EXYNOS_LOGO for proprietary Logo, and if
CONFIG_EXYNOS_LOGO is not defined you get output console on LCD.
CONFIG_EXYNOS_LOGO is added to Trats configuration to keep
existing logo feature intact in Trats.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
drivers/video/exynos_fb.c |5 -
drivers/video/exynos_fimd.c | 10 --
include/configs/trats.h |1 +
3 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index d9a3f9a..c111a09 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -65,6 +65,7 @@ static void exynos_lcd_init(vidinfo_t *vid)
exynos_fimd_lcd_init(vid);
}
+#ifdef CONFIG_EXYNOS_LOGO
static void draw_logo(void)
{
int x, y;
@@ -87,6 +88,7 @@ static void draw_logo(void)
addr = panel_info.logo_addr;
bmp_display(addr, x, y);
}
+#endif
static void lcd_panel_on(vidinfo_t *vid)
{
@@ -142,12 +144,13 @@ void lcd_ctrl_init(void *lcdbase)
void lcd_enable(void)
{
+#ifdef CONFIG_EXYNOS_LOGO
if (panel_info.logo_on) {
memset(lcd_base, 0, panel_width * panel_height *
(NBITS(panel_info.vl_bpix) 3));
draw_logo();
}
-
+#endif
lcd_panel_on(panel_info);
}
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 06eae2e..f2e4c27 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -88,14 +88,20 @@ static void exynos_fimd_set_par(unsigned int win_id)
/* DATAPATH is DMA */
cfg |= EXYNOS_WINCON_DATAPATH_DMA;
- /* bpp is 32 */
+#ifdef CONFIG_EXYNOS_LOGO /* To get proprietary LOGO */
cfg |= EXYNOS_WINCON_WSWP_ENABLE;
+#else /* To get output console on LCD */
+ cfg |= EXYNOS_WINCON_HAWSWP_ENABLE;
+#endif
/* dma burst is 16 */
cfg |= EXYNOS_WINCON_BURSTLEN_16WORD;
- /* pixel format is unpacked RGB888 */
+#ifdef CONFIG_EXYNOS_LOGO /* To get proprietary LOGO */
cfg |= EXYNOS_WINCON_BPPMODE_24BPP_888;
+#else /* To get output console on LCD */
+ cfg |= EXYNOS_WINCON_BPPMODE_16BPP_565;
+#endif
writel(cfg, (unsigned int)fimd_ctrl-wincon0 +
EXYNOS_WINCON(win_id));
diff --git a/include/configs/trats.h b/include/configs/trats.h
index a24e945..1573573 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -252,6 +252,7 @@
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
#define CONFIG_CMD_BMP
+#define CONFIG_EXYNOS_LOGO
#define CONFIG_BMP_32BPP
#define CONFIG_FB_ADDR0x52504000
#define CONFIG_S6E8AX0
Hi,
How about use 'if (vid-logo_on)' instead of #ifdef CONFIG_EXYNOS_LOGO?
In the vidinfo_t structure, 'logo_on' flag already exist.
Thank you,
Donghwa Lee
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Re: [U-Boot] [PATCH] input: Add MELFAS mms144 touchscreen driver
On 2012-12-18 01:41, Wolfgang Denk wrote: Dear Donghwa Lee, In message 50ce7957.6070...@samsung.com you wrote: From: Sanggun Leesg0724@samsung.com This is a TSP driver for touchscreen chip mms144 of MELFAS. It uses soft I2C interface and supports single touch. This driver uses polling method. If there are touch events, mms144_interrupt() reads and returns 0. If not, mms144_interrupt() returns -1. Where exactly will this driver be used inside U-Boot? So far, we don't have any GUI support, do what is a touch driver good for? Are you just adding dead code here? Best regards, Wolfgang Denk From: Sanggun Lee Hi, We are testing various codes on TRATS board. If this patch would be submitted, we can test the codes in a pleasant working environment. If this driver is not used for any other purposes in the u-boot, we would use it only inside the local tree. Thank you, Sanggun Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RESEND 2/4] video: Fix compilation dependency of exynos_dp and exynos_mipi on exynos_fb
On 2012년 12월 15일 14:25, Minkyu Kang wrote:
Dear Ajay,
On 13/12/12 20:29, Ajay Kumar wrote:
When only DP is used, we need not enable CONFIG_EXYNOS_MIPI_DSIM.
Similarly, when only MIPI is used, we need not enable CONFIG_EXYNOS_DP.
But the current structuring of code forces us to enable both
CONFIG_EXYNOS_MIPI_DSIM and CONFIG_EXYNOS_DP.
This patch adds conditional compilation check to remove the dependency.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
drivers/video/exynos_fb.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index d9a3f9a..39d3b74 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -103,8 +103,10 @@ static void lcd_panel_on(vidinfo_t *vid)
udelay(vid-power_on_delay);
+#ifdef CONFIG_EXYNOS_DP
if (vid-dp_enabled)
exynos_init_dp();
+#endif
Unnecessary.
please see arch/arm/include/asm/arch-exynos/dp_info.h
#ifdef CONFIG_EXYNOS_DP
unsigned int exynos_init_dp(void);
#else
unsigned int exynos_init_dp(void)
{
return 0;
}
#endif
if (vid-reset_lcd) {
vid-reset_lcd();
@@ -120,8 +122,10 @@ static void lcd_panel_on(vidinfo_t *vid)
if (vid-enable_ldo)
vid-enable_ldo(1);
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
if (vid-mipi_enabled)
exynos_mipi_dsi_init();
+#endif
This should be modified like exynos_init_dp?
Donghwa, how you think?
I agree with you. It looks better than using #ifdef.
Thank you,
Donghwa Lee
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Re: [U-Boot] [PATCH V2 1/4] EXYNOS5: Change parent clock of FIMD to MPLL
On 2012년 12월 15일 14:13, Minkyu Kang wrote: Dear Donghwa, On 13/12/12 20:29, Ajay Kumar wrote: With VPLL as source clock to FIMD, Exynos DP Initializaton was failing sometimes with unstable clock. Changing FIMD source to MPLL resolves this issue. Signed-off-by: Ajay Kumar ajaykumar...@samsung.com Acked-by: Simon Glass s...@chromium.org --- arch/arm/cpu/armv7/exynos/clock.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index fe61f88..bfcd5f7 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -603,7 +603,7 @@ void exynos5_set_lcd_clk(void) */ cfg = readl(clk-src_disp1_0); cfg = ~(0xf); - cfg |= 0x8; + cfg |= 0x6; Please check it. In order to use the configured refresh rate as closely as possible, it is more proper value(MPLL: 0x6) than using VPLL as source clock. Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] input: Add MELFAS mms144 touchscreen driver
From: Sanggun Leesg0724@samsung.com
This is a TSP driver for touchscreen chip mms144 of MELFAS.
It uses soft I2C interface and supports single touch.
This driver uses polling method.
If there are touch events, mms144_interrupt() reads and returns 0.
If not, mms144_interrupt() returns -1.
Signed-off-by: SangGun Leesg0724@samsung.com
Signed-off-by: Joonyoung Shimjy0922.s...@samsung.com
Signed-off=by: MyungJoo Hammyungjoo@samsung.com
---
drivers/input/Makefile |1 +
drivers/input/mms144.c | 202
include/mms144.h | 41 ++
3 files changed, 244 insertions(+), 0 deletions(-)
create mode 100644 drivers/input/mms144.c
create mode 100644 include/mms144.h
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 0805e86..c802188 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -33,6 +33,7 @@ COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
endif
COBJS-y += input.o
COBJS-$(CONFIG_OF_CONTROL) += key_matrix.o
+COBJS-$(CONFIG_MMS144) += mms144.o
COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
diff --git a/drivers/input/mms144.c b/drivers/input/mms144.c
new file mode 100644
index 000..7532131
--- /dev/null
+++ b/drivers/input/mms144.c
@@ -0,0 +1,202 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Sang-gun Leesg0724@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include common.h
+#include mms144.h
+#include i2c.h
+
+/* Operating Mode */
+#define mms144_SLEEP 0x01
+#define mms144_ACTIVE 0x02
+#define mms144_SW_RESET0x03
+
+/* Write only registers */
+#define mms144_MODE_CONTROL0x01
+
+/* Read only registers */
+#define mms144_PACKET_SIZE 0x0F
+#define mms144_INFOMATION 0x10
+
+/* Minimum delay time is 50us between stop and start signal of i2c */
+#define mms144_I2C_DELAY 50
+
+/* 200ms needs after power on */
+#define mms144_POWERON_DELAY 200
+
+/* Touchscreen absolute values */
+#define mms144_MAX_TOUCH 10
+
+/* XY calculate */
+#define X_SHIFT8
+#define Y_SHIFT4
+#define XY_HI_MASK 0xF00
+#define XY_LOW_MASK0xFF
+#define X_LOW_MASK 0x0F
+#define Y_LOW_MASK 0xF0
+
+/* Others */
+#define SETUP_REG_LEN 6
+#define POWER_ON 1
+#define POWER_OFF 0
+
+struct mms144_touch {
+ unsigned char info;
+ unsigned char xy_hi;
+ unsigned char x_lo;
+ unsigned char y_lo;
+} __packed;
+
+static struct mms144_platform *pdata;
+
+static int
+mms144_read_reg(unsigned int addr, unsigned char *val, unsigned int len)
+{
+ int error;
+
+ i2c_set_bus_num(pdata-bus_num);
+
+ error = i2c_read(pdata-chip, addr, 1, val, len);
+ if (error != 0) {
+ printf(mms144_read_reg is failed\n);
+ return error;
+ }
+ udelay(mms144_I2C_DELAY);
+
+ return 0;
+}
+
+static int
+mms144_write_reg(unsigned int addr, unsigned char *val, unsigned int len)
+{
+ int error;
+
+ i2c_set_bus_num(pdata-bus_num);
+
+ error = i2c_write(pdata-chip, addr, 1, val, len);
+ if (error != 0) {
+ printf(mms144_write_reg is failed\n);
+ return error;
+ }
+ udelay(mms144_I2C_DELAY);
+
+ return 0;
+}
+
+static int mms144_setup_reg(void)
+{
+ unsigned char setup_reg_buf[SETUP_REG_LEN];
+ int error;
+
+ /*
+* 0 = Mode Control
+* 1 = XY hi resolution
+* 2 = X low resolution
+* 3 = Y low resolution
+* 4 = Contact on event Threshold
+* 5 = Moving event Threshold
+*/
+ setup_reg_buf[0] = mms144_ACTIVE;
+ setup_reg_buf[1] = ((pdata-y_size Y_SHIFT) Y_LOW_MASK) |
+ ((pdata-x_size X_SHIFT) X_LOW_MASK);
+ setup_reg_buf[2] = pdata-x_size XY_LOW_MASK;
+ setup_reg_buf[3] = pdata-y_size XY_LOW_MASK;
+ setup_reg_buf[4] = pdata-contact_threshold;
+ setup_reg_buf[5] = pdata-moving_threshold;
+
+ /* burst write */
+ error =
[U-Boot] [PATCH v3]: video: support exynos fimd driver for various exynos series
This patch supports exynos fimd driver for various exynos series different from
existing it supports only exynos4 chip.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes for v1:
- moves exynos_fimd_get_base_offset() to exynos_fb.h
Changes for v2:
- moves exynos_fimd_get_base_offset() to asm/arch/fb.h to remove
compiler warining.
- remove useless reserved variable of exynos_fb structure
arch/arm/include/asm/arch-exynos/fb.h | 25 ++-
drivers/video/exynos_fimd.c | 76 ++--
2 files changed, 67 insertions(+), 34 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
index b10b0da..c96683a 100644
--- a/arch/arm/include/asm/arch-exynos/fb.h
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -23,7 +23,7 @@
#define __ASM_ARM_ARCH_FB_H_
#ifndef __ASSEMBLY__
-struct exynos4_fb {
+struct exynos_fb {
unsigned int vidcon0;
unsigned int vidcon1;
unsigned int vidcon2;
@@ -154,6 +154,18 @@ struct exynos4_fb {
};
#endif
+/* LCD IF register offset */
+#define EXYNOS4_LCD_IF_BASE_OFFSET 0x0
+#define EXYNOS5_LCD_IF_BASE_OFFSET 0x2
+
+static inline unsigned int exynos_fimd_get_base_offset(void)
+{
+ if (cpu_is_exynos5())
+ return EXYNOS5_LCD_IF_BASE_OFFSET;
+ else
+ return EXYNOS4_LCD_IF_BASE_OFFSET;
+}
+
/*
* Register offsets
*/
@@ -253,6 +265,8 @@ struct exynos4_fb {
/* VIDTCON2 */
#define EXYNOS_VIDTCON2_LINEVAL(x) (((x) 0x7ff) 11)
#define EXYNOS_VIDTCON2_HOZVAL(x) (((x) 0x7ff) 0)
+#define EXYNOS_VIDTCON2_LINEVAL_E(x) x) 0x800) 11)
23)
+#define EXYNOS_VIDTCON2_HOZVAL_E(x)x) 0x800) 11)
22)
/* Window 0~4 Control - WINCONx */
#define EXYNOS_WINCON_DATAPATH_DMA (0 22)
@@ -330,6 +344,8 @@ struct exynos4_fb {
#define EXYNOS_VIDOSD_TOP_Y(x) (((x) 0x7ff) 0)
#define EXYNOS_VIDOSD_RIGHT_X(x) (((x) 0x7ff) 11)
#define EXYNOS_VIDOSD_BOTTOM_Y(x) (((x) 0x7ff) 0)
+#define EXYNOS_VIDOSD_RIGHT_X_E(x) (((x) 0x1) 23)
+#define EXYNOS_VIDOSD_BOTTOM_Y_E(x)(((x) 0x1) 22)
/* VIDOSD0C, VIDOSDxD */
#define EXYNOS_VIDOSD_SIZE(x) (((x) 0xff) 0)
@@ -354,6 +370,8 @@ struct exynos4_fb {
/* Buffer Size */
#define EXYNOS_VIDADDR_OFFSIZE(x) (((x) 0x1fff) 13)
#define EXYNOS_VIDADDR_PAGEWIDTH(x)(((x) 0x1fff) 0)
+#define EXYNOS_VIDADDR_OFFSIZE_E(x)x) 0x2000) 13)
27)
+#define EXYNOS_VIDADDR_PAGEWIDTH_E(x) x) 0x2000) 13)
26)
/* WIN Color Map */
#define EXYNOS_WINMAP_COLOR(x) ((x) 0xff)
@@ -443,4 +461,9 @@ struct exynos4_fb {
#define EXYNOS_I80START_TRIG (1 1)
#define EXYNOS_I80STATUS_TRIG_DONE (1 2)
+/* DP_MIE_CLKCON */
+#define EXYNOS_DP_MIE_DISABLE (0 0)
+#define EXYNOS_DP_CLK_ENABLE (1 1)
+#define EXYNOS_MIE_CLK_ENABLE (3 0)
+
#endif /* _REGS_FB_H */
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index f07568a..9aaa2c7 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -41,8 +41,8 @@ void exynos_fimd_lcd_init_mem(u_long screen_base, u_long
fb_size,
static void exynos_fimd_set_dualrgb(unsigned int enabled)
{
- struct exynos4_fb *fimd_ctrl =
- (struct exynos4_fb *)samsung_get_base_fimd();
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
unsigned int cfg = 0;
if (enabled) {
@@ -60,8 +60,8 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled)
static void exynos_fimd_set_par(unsigned int win_id)
{
unsigned int cfg = 0;
- struct exynos4_fb *fimd_ctrl =
- (struct exynos4_fb *)samsung_get_base_fimd();
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
/* set window control */
cfg = readl((unsigned int)fimd_ctrl-wincon0 +
@@ -93,7 +93,10 @@ static void exynos_fimd_set_par(unsigned int win_id)
EXYNOS_VIDOSD(win_id));
cfg = EXYNOS_VIDOSD_RIGHT_X(pvid-vl_col - 1) |
- EXYNOS_VIDOSD_BOTTOM_Y(pvid-vl_row - 1);
+ EXYNOS_VIDOSD_BOTTOM_Y(pvid-vl_row - 1) |
+ EXYNOS_VIDOSD_RIGHT_X_E(1) |
+ EXYNOS_VIDOSD_BOTTOM_Y_E(0);
+
writel(cfg, (unsigned int)fimd_ctrl-vidosd0b +
EXYNOS_VIDOSD(win_id));
@@ -106,8 +109,8 @@ static void exynos_fimd_set_par(unsigned int win_id
[U-Boot] [PATCH v2] video: support exynos fimd driver for various exynos series
This patch support exynos fimd driver for various exynos series different from
existing it supports only exynos4 chip.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes for v1:
- moves exynos_fimd_get_base_offset() to exynos_fb.h
arch/arm/include/asm/arch-exynos/fb.h | 18 +++-
drivers/video/exynos_fb.h |8 +++
drivers/video/exynos_fimd.c | 76 ++--
3 files changed, 68 insertions(+), 34 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
index b10b0da..dae0cfc 100644
--- a/arch/arm/include/asm/arch-exynos/fb.h
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -23,7 +23,7 @@
#define __ASM_ARM_ARCH_FB_H_
#ifndef __ASSEMBLY__
-struct exynos4_fb {
+struct exynos_fb {
unsigned int vidcon0;
unsigned int vidcon1;
unsigned int vidcon2;
@@ -151,9 +151,14 @@ struct exynos4_fb {
unsigned char res15[156];
unsigned int dualrgb;
+ unsigned char res16[16];
};
#endif
+/* LCD IF register offset */
+#define EXYNOS4_LCD_IF_BASE_OFFSET 0x0
+#define EXYNOS5_LCD_IF_BASE_OFFSET 0x2
+
/*
* Register offsets
*/
@@ -253,6 +258,8 @@ struct exynos4_fb {
/* VIDTCON2 */
#define EXYNOS_VIDTCON2_LINEVAL(x) (((x) 0x7ff) 11)
#define EXYNOS_VIDTCON2_HOZVAL(x) (((x) 0x7ff) 0)
+#define EXYNOS_VIDTCON2_LINEVAL_E(x) x) 0x800) 11)
23)
+#define EXYNOS_VIDTCON2_HOZVAL_E(x)x) 0x800) 11)
22)
/* Window 0~4 Control - WINCONx */
#define EXYNOS_WINCON_DATAPATH_DMA (0 22)
@@ -330,6 +337,8 @@ struct exynos4_fb {
#define EXYNOS_VIDOSD_TOP_Y(x) (((x) 0x7ff) 0)
#define EXYNOS_VIDOSD_RIGHT_X(x) (((x) 0x7ff) 11)
#define EXYNOS_VIDOSD_BOTTOM_Y(x) (((x) 0x7ff) 0)
+#define EXYNOS_VIDOSD_RIGHT_X_E(x) (((x) 0x1) 23)
+#define EXYNOS_VIDOSD_BOTTOM_Y_E(x)(((x) 0x1) 22)
/* VIDOSD0C, VIDOSDxD */
#define EXYNOS_VIDOSD_SIZE(x) (((x) 0xff) 0)
@@ -354,6 +363,8 @@ struct exynos4_fb {
/* Buffer Size */
#define EXYNOS_VIDADDR_OFFSIZE(x) (((x) 0x1fff) 13)
#define EXYNOS_VIDADDR_PAGEWIDTH(x)(((x) 0x1fff) 0)
+#define EXYNOS_VIDADDR_OFFSIZE_E(x)x) 0x2000) 13)
27)
+#define EXYNOS_VIDADDR_PAGEWIDTH_E(x) x) 0x2000) 13)
26)
/* WIN Color Map */
#define EXYNOS_WINMAP_COLOR(x) ((x) 0xff)
@@ -443,4 +454,9 @@ struct exynos4_fb {
#define EXYNOS_I80START_TRIG (1 1)
#define EXYNOS_I80STATUS_TRIG_DONE (1 2)
+/* DP_MIE_CLKCON */
+#define EXYNOS_DP_MIE_DISABLE (0 0)
+#define EXYNOS_DP_CLK_ENABLE (1 1)
+#define EXYNOS_MIE_CLK_ENABLE (3 0)
+
#endif /* _REGS_FB_H */
diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos_fb.h
index 4ff2efd..9338b61 100644
--- a/drivers/video/exynos_fb.h
+++ b/drivers/video/exynos_fb.h
@@ -51,4 +51,12 @@ void exynos_fimd_lcd_init_mem(unsigned long screen_base,
unsigned long fb_size,
void exynos_fimd_lcd_init(vidinfo_t *vid);
unsigned long exynos_fimd_calc_fbsize(void);
+static unsigned int exynos_fimd_get_base_offset(void)
+{
+ if (cpu_is_exynos5())
+ return EXYNOS5_LCD_IF_BASE_OFFSET;
+ else
+ return EXYNOS4_LCD_IF_BASE_OFFSET;
+}
+
#endif
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index f07568a..9aaa2c7 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -41,8 +41,8 @@ void exynos_fimd_lcd_init_mem(u_long screen_base, u_long
fb_size,
static void exynos_fimd_set_dualrgb(unsigned int enabled)
{
- struct exynos4_fb *fimd_ctrl =
- (struct exynos4_fb *)samsung_get_base_fimd();
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
unsigned int cfg = 0;
if (enabled) {
@@ -60,8 +60,8 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled)
static void exynos_fimd_set_par(unsigned int win_id)
{
unsigned int cfg = 0;
- struct exynos4_fb *fimd_ctrl =
- (struct exynos4_fb *)samsung_get_base_fimd();
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
/* set window control */
cfg = readl((unsigned int)fimd_ctrl-wincon0 +
@@ -93,7 +93,10 @@ static void exynos_fimd_set_par(unsigned int win_id)
EXYNOS_VIDOSD(win_id));
cfg = EXYNOS_VIDOSD_RIGHT_X(pvid-vl_col - 1) |
- EXYNOS_VIDOSD_BOTTOM_Y(pvid-vl_row - 1
Re: [U-Boot] [PATCH] video: fixed exynos_mipi_dsi_init() declaration
On 4 July 2012 12:29, Minkyu Kang wrote:
On 2 July 2012 20:18, Donghwa Lee dh09@samsung.com wrote:
To avoid compilers error in case of not using
CONFIG_EXYNOS_MIPI_DSIM, add no operation function.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/mipi_dsim.h |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index 9a7cbeb..b73263d 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -358,7 +358,14 @@ struct mipi_dsim_lcd_driver {
void(*mipi_display_on)(struct mipi_dsim_device *dsim_dev);
};
+#ifdef CONFIG_EXYNOS_MIPI_DSIM
int exynos_mipi_dsi_init(void);
+#else
+int exynos_mipi_dsi_init(void)
+{
+ return 0;
+}
+#endif
How about weak function instead of ifdef?
Thanks.
Minkyu Kang.
Ok, It looks like better. I will fix it later.
Thank you,
Donghwa Lee.
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[U-Boot] [PATCH 0/8] video: support newly exynos5 display feature
This patch set supports newly exynos5 display features. [1/8] EXYNOS5: support exynos5 lcd clock control [2/8] EXYNOS5: support display system register control [3/8] EXYNOS5: support display port phy control function [4/8] EXYNOS5: add display port base address [5/8] video: support exynos display port drivers [6/8] video: add dp_enabled variable in vidinfo structure [7/8] video: exynos fb driver supports display port feature -This patch depends on [PATCH] video: support exynos fimd driver for various exynos series. http://marc.info/?l=u-bootm=134119605104467w=2 [8/8] video: support exynos pwm backlight driver ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/8] EXYNOS5: support exynos5 lcd clock control
This patch support exynos5 lcd clock control.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 108 -
1 files changed, 107 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 7326655..3143f7e 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -480,6 +480,48 @@ static unsigned long exynos4_get_lcd_clk(void)
return pclk;
}
+/* get_lcd_clk: return lcd clock frequency */
+static unsigned long exynos5_get_lcd_clk(void)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned long pclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL [3:0]
+*/
+ sel = readl(clk-src_disp1_0);
+ sel = sel 0xf;
+
+ /*
+* 0x6: SCLK_MPLL
+* 0x7: SCLK_EPLL
+* 0x8: SCLK_VPLL
+*/
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+*/
+ ratio = readl(clk-div_disp1_0);
+ ratio = ratio 0xf;
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
void exynos4_set_lcd_clk(void)
{
struct exynos4_clock *clk =
@@ -542,6 +584,68 @@ void exynos4_set_lcd_clk(void)
writel(cfg, clk-div_lcd0);
}
+void exynos5_set_lcd_clk(void)
+{
+ struct exynos5_clock *clk =
+ (struct exynos5_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /*
+* CLK_GATE_BLOCK
+* CLK_CAM [0]
+* CLK_TV [1]
+* CLK_MFC [2]
+* CLK_G3D [3]
+* CLK_LCD0 [4]
+* CLK_LCD1 [5]
+* CLK_GPS [7]
+*/
+ cfg = readl(clk-gate_block);
+ cfg |= 1 4;
+ writel(cfg, clk-gate_block);
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL[3:0]
+* MDNIE0_SEL [7:4]
+* MDNIE_PWM0_SEL [8:11]
+* MIPI0_SEL[12:15]
+* set lcd0 src clock 0x6: SCLK_MPLL
+*/
+ cfg = readl(clk-src_disp1_0);
+ cfg = ~(0xf);
+ cfg |= 0x8;
+ writel(cfg, clk-src_disp1_0);
+
+ /*
+* CLK_GATE_IP_LCD0
+* CLK_FIMD0[0]
+* CLK_MIE0 [1]
+* CLK_MDNIE0 [2]
+* CLK_DSIM0[3]
+* CLK_SMMUFIMD0[4]
+* CLK_PPMULCD0 [5]
+* Gating all clocks for FIMD0
+*/
+ cfg = readl(clk-gate_ip_disp1);
+ cfg |= 1 0;
+ writel(cfg, clk-gate_ip_disp1);
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+* MDNIE0_RATIO [7:4]
+* MDNIE_PWM0_RATIO [11:8]
+* MDNIE_PWM_PRE_RATIO [15:12]
+* MIPI0_RATIO [19:16]
+* MIPI0_PRE_RATIO [23:20]
+* set fimd ratio
+*/
+ cfg = ~(0xf);
+ cfg |= 0x0;
+ writel(cfg, clk-div_disp1_0);
+}
+
void exynos4_set_mipi_clk(void)
{
struct exynos4_clock *clk =
@@ -680,13 +784,15 @@ unsigned long get_lcd_clk(void)
if (cpu_is_exynos4())
return exynos4_get_lcd_clk();
else
- return 0;
+ return exynos5_get_lcd_clk();
}
void set_lcd_clk(void)
{
if (cpu_is_exynos4())
exynos4_set_lcd_clk();
+ else
+ exynos5_set_lcd_clk();
}
void set_mipi_clk(void)
--
1.7.4.1
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[U-Boot] [PATCH 2/8] EXYNOS5: support display system register control
This patch supports display block system regisger control.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/system.c | 18 ++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/system.c
b/arch/arm/cpu/armv7/exynos/system.c
index cc6ee03..5a6747a 100644
--- a/arch/arm/cpu/armv7/exynos/system.c
+++ b/arch/arm/cpu/armv7/exynos/system.c
@@ -63,8 +63,26 @@ static void exynos4_set_system_display(void)
writel(cfg, sysreg-display_ctrl);
}
+static void exynos5_set_system_display(void)
+{
+ struct exynos5_sysreg *sysreg =
+ (struct exynos5_sysreg *)samsung_get_base_sysreg();
+ unsigned int cfg = 0;
+
+ /*
+* system register path set
+* 0: MIE/MDNIE
+* 1: FIMD Bypass
+*/
+ cfg = readl(sysreg-disp1blk_cfg);
+ cfg |= (1 15);
+ writel(cfg, sysreg-disp1blk_cfg);
+}
+
void set_system_display_ctrl(void)
{
if (cpu_is_exynos4())
exynos4_set_system_display();
+ else
+ exynos5_set_system_display();
}
--
1.7.4.1
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[U-Boot] [PATCH 4/8] EXYNOS5: add display port base address
This patch add display port base address for EXYNOS5. In case of EXYNOS4, use DEVICE_NOT_AVAILABLE macro because DP is not supported. Signed-off-by: Donghwa Lee dh09@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- arch/arm/include/asm/arch-exynos/cpu.h |3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index 76ef776..0068bb5 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -57,6 +57,7 @@ #define EXYNOS4_USBPHY_CONTROL 0x10020704 #define EXYNOS4_GPIO_PART4_BASEDEVICE_NOT_AVAILABLE +#define EXYNOS4_DP_BASEDEVICE_NOT_AVAILABLE /* EXYNOS5 */ #define EXYNOS5_GPIO_PART4_BASE0x0386 @@ -83,6 +84,7 @@ #define EXYNOS5_PWMTIMER_BASE 0x12DD #define EXYNOS5_GPIO_PART2_BASE0x1340 #define EXYNOS5_FIMD_BASE 0x1440 +#define EXYNOS5_DP_BASE0x145B #define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE @@ -150,6 +152,7 @@ static inline unsigned int samsung_get_base_##device(void) \ SAMSUNG_BASE(adc, ADC_BASE) SAMSUNG_BASE(clock, CLOCK_BASE) +SAMSUNG_BASE(dp, DP_BASE) SAMSUNG_BASE(sysreg, SYSREG_BASE) SAMSUNG_BASE(fimd, FIMD_BASE) SAMSUNG_BASE(i2c, I2C_BASE) -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 6/8] video: add dp_enabled variable in vidinfo structure
To support display port in exynos fb driver, added dp_enabled variable
in vidinfo structure that set in board file.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/lcd.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/include/lcd.h b/include/lcd.h
index 6e0a2a3..42070d7 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -240,6 +240,7 @@ typedef struct vidinfo {
unsigned int reset_delay;
unsigned int interface_mode;
unsigned int mipi_enabled;
+ unsigned int dp_enabled;
unsigned int cs_setup;
unsigned int wr_setup;
unsigned int wr_act;
--
1.7.4.1
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[U-Boot] [PATCH 3/8] EXYNOS5: support display port phy control function
This patch support display port phy control function.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/power.c| 21 +
arch/arm/include/asm/arch-exynos/power.h |5 +
2 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/power.c
b/arch/arm/cpu/armv7/exynos/power.c
index 4116781..d4bce6d 100644
--- a/arch/arm/cpu/armv7/exynos/power.c
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -74,3 +74,24 @@ void set_usbhost_phy_ctrl(unsigned int enable)
if (cpu_is_exynos5())
exynos5_set_usbhost_phy_ctrl(enable);
}
+
+static void exynos5_dp_phy_control(unsigned int enable)
+{
+ unsigned int cfg;
+ struct exynos5_power *power =
+ (struct exynos5_power *)samsung_get_base_power();
+
+ cfg = readl(power-dptx_phy_control);
+ if (enable)
+ cfg |= EXYNOS_DP_PHY_ENABLE;
+ else
+ cfg = ~EXYNOS_DP_PHY_ENABLE;
+
+ writel(cfg, power-dptx_phy_control);
+}
+
+void set_dp_phy_ctrl(unsigned int enable)
+{
+ if (cpu_is_exynos5())
+ exynos5_dp_phy_control(enable);
+}
diff --git a/arch/arm/include/asm/arch-exynos/power.h
b/arch/arm/include/asm/arch-exynos/power.h
index e5467e2..d2fdb59 100644
--- a/arch/arm/include/asm/arch-exynos/power.h
+++ b/arch/arm/include/asm/arch-exynos/power.h
@@ -859,4 +859,9 @@ void set_usbhost_phy_ctrl(unsigned int enable);
#define POWER_USB_HOST_PHY_CTRL_EN (1 0)
#define POWER_USB_HOST_PHY_CTRL_DISABLE(0 0)
+
+void set_dp_phy_ctrl(unsigned int enable);
+
+#define EXYNOS_DP_PHY_ENABLE (1 0)
+
#endif
--
1.7.4.1
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[U-Boot] [PATCH 7/8] video: exynos fb driver supports display port feature
If dp_enabled was set, exynos fb driver support display port feature.
This patch depends on [PATCH] video: support exynos fimd driver
for various exynos series.
http://marc.info/?l=u-bootm=134119605104467w=2
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/fb.h |1 +
drivers/video/exynos_fb.c |5 -
drivers/video/exynos_fimd.c | 15 +++
3 files changed, 20 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
index bc0a4cb..a3790e2 100644
--- a/arch/arm/include/asm/arch-exynos/fb.h
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -152,6 +152,7 @@ struct exynos_fb {
unsigned char res15[156];
unsigned int dualrgb;
unsigned char res16[16];
+ unsigned int dp_mie_clkcon;
};
#endif
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 49fdfec..e31a0fd 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -28,6 +28,7 @@
#include asm/arch/clock.h
#include asm/arch/clk.h
#include asm/arch/mipi_dsim.h
+#include asm/arch/dp_info.h
#include asm/arch/system.h
#include exynos_fb.h
@@ -91,6 +92,9 @@ static void lcd_panel_on(vidinfo_t *vid)
udelay(vid-power_on_delay);
+ if (vid-dp_enabled)
+ exynos_init_dp();
+
if (vid-reset_lcd) {
vid-reset_lcd();
udelay(vid-reset_delay);
@@ -130,7 +134,6 @@ void lcd_enable(void)
if (panel_info.logo_on) {
memset(lcd_base, 0, panel_width * panel_height *
(NBITS(panel_info.vl_bpix) 3));
-
draw_logo();
}
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 989063d..6539902 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -57,6 +57,19 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled)
writel(cfg, fimd_ctrl-dualrgb);
}
+static void exynos_fimd_set_dp_clkcon(unsigned int enabled)
+{
+
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
+ unsigned int cfg = 0;
+
+ if (enabled)
+ cfg = EXYNOS_DP_CLK_ENABLE;
+
+ writel(cfg, fimd_ctrl-dp_mie_clkcon);
+}
+
static void exynos_fimd_set_par(unsigned int win_id)
{
unsigned int cfg = 0;
@@ -363,6 +376,8 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
/* window on */
exynos_fimd_window_on(pvid-win_id);
+
+ exynos_fimd_set_dp_clkcon(pvid-dp_enabled);
}
unsigned long exynos_fimd_calc_fbsize(void)
--
1.7.4.1
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[U-Boot] [PATCH 8/8] video: support exynos pwm backlight driver
This patch support exynos pwm backlight driver. It can control backlight
power and brightness by using pwm.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/pwm_backlight.h | 34 +
drivers/video/Makefile |1 +
drivers/video/exynos_pwm_bl.c| 57 ++
3 files changed, 92 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/pwm_backlight.h
create mode 100644 drivers/video/exynos_pwm_bl.c
diff --git a/arch/arm/include/asm/arch-exynos/pwm_backlight.h
b/arch/arm/include/asm/arch-exynos/pwm_backlight.h
new file mode 100644
index 000..368ffc5
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/pwm_backlight.h
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Author: Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _PWM_BACKLIGHT_H_
+#define _PWM_BACKLIGHT_H_
+
+struct pwm_backlight_data {
+ int pwm_id;
+ int period;
+ int max_brightness;
+ int brightness;
+};
+
+extern int exynos_pwm_backlight_init(struct pwm_backlight_data *pd);
+
+#endif /* _PWM_BACKLIGHT_H_ */
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index a7530a4..4a0a5b4 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -33,6 +33,7 @@ COBJS-$(CONFIG_EXYNOS_DP) += exynos_dp.o exynos_dp_lowlevel.o
COBJS-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
COBJS-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o
\
exynos_mipi_dsi_lowlevel.o
+COBJS-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o
COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o
COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
diff --git a/drivers/video/exynos_pwm_bl.c b/drivers/video/exynos_pwm_bl.c
new file mode 100644
index 000..27fb0b5
--- /dev/null
+++ b/drivers/video/exynos_pwm_bl.c
@@ -0,0 +1,57 @@
+/*
+ * PWM BACKLIGHT driver for Board based on EXYNOS.
+ *
+ * Author: Donghwa Lee dh09@samsung.com
+ *
+ * Derived from linux/drivers/video/backlight/pwm_backlight.c
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include common.h
+#include pwm.h
+#include linux/types.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/gpio.h
+#include asm/arch/pwm.h
+#include asm/arch/pwm_backlight.h
+
+static struct pwm_backlight_data *pwm;
+
+static int exynos_pwm_backlight_update_status(void)
+{
+ int brightness = pwm-brightness;
+ int max = pwm-max_brightness;
+
+ if (brightness == 0) {
+ pwm_config(pwm-pwm_id, 0, pwm-period);
+ pwm_disable(pwm-pwm_id);
+ } else {
+ pwm_config(pwm-pwm_id,
+ brightness * pwm-period / max, pwm-period);
+ pwm_enable(pwm-pwm_id);
+ }
+ return 0;
+}
+
+int exynos_pwm_backlight_init(struct pwm_backlight_data *pd)
+{
+ pwm = pd;
+
+ exynos_pwm_backlight_update_status();
+
+ return 0;
+}
--
1.7.4.1
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[U-Boot] [PATCH] video: support exynos fimd driver for various exynos series
This patch supports exynos fimd driver for various exynos series different from
existing it supports only exynos4 chip.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/fb.h | 15 +-
drivers/video/exynos_fimd.c | 85 -
2 files changed, 66 insertions(+), 34 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
index b10b0da..b56ab55 100644
--- a/arch/arm/include/asm/arch-exynos/fb.h
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -23,7 +23,7 @@
#define __ASM_ARM_ARCH_FB_H_
#ifndef __ASSEMBLY__
-struct exynos4_fb {
+struct exynos_fb {
unsigned int vidcon0;
unsigned int vidcon1;
unsigned int vidcon2;
@@ -154,6 +154,9 @@ struct exynos4_fb {
};
#endif
+/* LCD IF register offset */
+#define EXYNOS_LCD_IF_BASE_OFFSET (0x2)
+
/*
* Register offsets
*/
@@ -253,6 +256,10 @@ struct exynos4_fb {
/* VIDTCON2 */
#define EXYNOS_VIDTCON2_LINEVAL(x) (((x) 0x7ff) 11)
#define EXYNOS_VIDTCON2_HOZVAL(x) (((x) 0x7ff) 0)
+#define EXYNOS_VIDTCON2_LINEVAL_E(x) x) 0x800) \
+11) 23)
+#define EXYNOS_VIDTCON2_HOZVAL_E(x)x) 0x800) \
+11) 22)
/* Window 0~4 Control - WINCONx */
#define EXYNOS_WINCON_DATAPATH_DMA (0 22)
@@ -330,6 +337,8 @@ struct exynos4_fb {
#define EXYNOS_VIDOSD_TOP_Y(x) (((x) 0x7ff) 0)
#define EXYNOS_VIDOSD_RIGHT_X(x) (((x) 0x7ff) 11)
#define EXYNOS_VIDOSD_BOTTOM_Y(x) (((x) 0x7ff) 0)
+#define EXYNOS_VIDOSD_RIGHT_X_E(x) (((x) 0x1) 23)
+#define EXYNOS_VIDOSD_BOTTOM_Y_E(x)(((x) 0x1) 22)
/* VIDOSD0C, VIDOSDxD */
#define EXYNOS_VIDOSD_SIZE(x) (((x) 0xff) 0)
@@ -354,6 +363,10 @@ struct exynos4_fb {
/* Buffer Size */
#define EXYNOS_VIDADDR_OFFSIZE(x) (((x) 0x1fff) 13)
#define EXYNOS_VIDADDR_PAGEWIDTH(x)(((x) 0x1fff) 0)
+#define EXYNOS_VIDADDR_OFFSIZE_E(x)x) 0x2000) \
+13) 27)
+#define EXYNOS_VIDADDR_PAGEWIDTH_E(x) x) 0x2000) \
+13) 26)
/* WIN Color Map */
#define EXYNOS_WINMAP_COLOR(x) ((x) 0xff)
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index f07568a..f8eac9d 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -41,8 +41,8 @@ void exynos_fimd_lcd_init_mem(u_long screen_base, u_long
fb_size,
static void exynos_fimd_set_dualrgb(unsigned int enabled)
{
- struct exynos4_fb *fimd_ctrl =
- (struct exynos4_fb *)samsung_get_base_fimd();
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
unsigned int cfg = 0;
if (enabled) {
@@ -60,8 +60,8 @@ static void exynos_fimd_set_dualrgb(unsigned int enabled)
static void exynos_fimd_set_par(unsigned int win_id)
{
unsigned int cfg = 0;
- struct exynos4_fb *fimd_ctrl =
- (struct exynos4_fb *)samsung_get_base_fimd();
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
/* set window control */
cfg = readl((unsigned int)fimd_ctrl-wincon0 +
@@ -93,7 +93,10 @@ static void exynos_fimd_set_par(unsigned int win_id)
EXYNOS_VIDOSD(win_id));
cfg = EXYNOS_VIDOSD_RIGHT_X(pvid-vl_col - 1) |
- EXYNOS_VIDOSD_BOTTOM_Y(pvid-vl_row - 1);
+ EXYNOS_VIDOSD_BOTTOM_Y(pvid-vl_row - 1) |
+ EXYNOS_VIDOSD_RIGHT_X_E(1) |
+ EXYNOS_VIDOSD_BOTTOM_Y_E(0);
+
writel(cfg, (unsigned int)fimd_ctrl-vidosd0b +
EXYNOS_VIDOSD(win_id));
@@ -106,8 +109,8 @@ static void exynos_fimd_set_par(unsigned int win_id)
static void exynos_fimd_set_buffer_address(unsigned int win_id)
{
unsigned long start_addr, end_addr;
- struct exynos4_fb *fimd_ctrl =
- (struct exynos4_fb *)samsung_get_base_fimd();
+ struct exynos_fb *fimd_ctrl =
+ (struct exynos_fb *)samsung_get_base_fimd();
start_addr = (unsigned long)lcd_base_addr;
end_addr = start_addr + ((pvid-vl_col * (NBITS(pvid-vl_bpix) / 8)) *
@@ -124,8 +127,8 @@ static void exynos_fimd_set_clock(vidinfo_t *pvid)
unsigned int cfg = 0, div = 0, remainder, remainder_div;
unsigned long pixel_clock;
unsigned long long src_clock;
- struct exynos4_fb *fimd_ctrl =
- (struct
Re: [U-Boot] FDT: Question about embedded fdt enable
On Wed, May 23, 2012 at 15:13, Simon Glass wrote:
HI Donghwa,
On Wed, May 23, 2012 at 12:39 AM, Donghwa Lee dh09@samsung.com
mailto:dh09@samsung.com wrote:
Dear, Simon Glass
I am preparing device tree in Exynos SoC and had already tested by using
CONFIG_OF_SEPARATE. But, I couldn't test by using CONFIG_OF_EMBED because
it has a compiler problem to make a binary in the dts/Makefile.
When I had used configuration as seaboard that I had changed configuration
from CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, it had a same problem.
How did you test in seaboard as it embedded? Is there any more
configuration
to compile ebedded option?
Can you please send me the compiler output - then I can help with this.
I do use embedded for testing only. But there is an alignment patch which is
needed and was NAKed. So it is not reliable at present.
please reply my question.
Thank you,
Donghwa Lee
Regards,
Simon
Dear, Simon Glass
Thank you for your reply. Below log is my compiler problem that was stopped
while objcopy.
# We want the output format and arch.
# We also hope to win a prize for ugliest Makefile / shell interaction
# We look in the LDSCRIPT first.
# Then try the linker which should give us the answer.
# Then check it worked.
oformat=`cat | sed -r -n 's/^OUTPUT_FORMAT[ (]*([^)]*).*/\1/p'` ;\
oarch=`cat | sed -r -n 's/^OUTPUT_ARCH[ (]*([^)]*).*/\1/p'` ;\
\
[ -z ${oformat} ] \
oformat=`/opt/tools/gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux/bin/arm-linux-gnueabi-gcc
-g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__
-DCONFIG_SYS_TEXT_BASE=0x6330
-I/home/leedonghwa/project/mainline/u-boot-trats/include -fno-builtin
-ffreestanding -nostdinc -isystem
/opt/tools/gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux/bin/../lib/gcc/arm-linux-gnueabi/4.7.1/include
-pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork
-march=armv5 -Wall -Wstrict-prototypes -fno-stack-protector
-Wno-format-nonliteral -Wno-format-security -fstack-usage -Wl,--verbose 21 |
sed -r -n 's/^OUTPUT_FORMAT[ (]*([^)]*).*/\1/p'` ;\
[ -z ${oarch} ] \
oarch=`/opt/tools/gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux/bin/arm-linux-gnueabi-gcc
-g -Os -fno-common -ffixed-r8 -msoft-float -D__KERNEL__
-DCONFIG_SYS_TEXT_BASE=0x6330
-I/home/leedonghwa/project/mainline/u-boot-trats/include -fno-builtin
-ffreestanding -nostdinc -isystem
/opt/tools/gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux/bin/../lib/gcc/arm-linux-gnueabi/4.7.1/include
-pipe -DCONFIG_ARM -D__ARM__ -marm -mabi=aapcs-linux -mno-thumb-interwork
-march=armv5 -Wall -Wstrict-prototypes -fno-stack-protector
-Wno-format-nonliteral -Wno-format-security -fstack-usage -Wl,--verbose 21 |
sed -r -n 's/^OUTPUT_ARCH[ (]*([^)]*).*/\1/p'` ;\
\
[ -z ${oformat} ] \
echo Cannot read OUTPUT_FORMAT from lds file \
exit 1 || true ;\
[ -z ${oarch} ] \
echo Cannot read OUTPUT_ARCH from lds file \
exit 1 || true ;\
\
cd ./ \
/opt/tools/gcc-linaro-arm-linux-gnueabi-2012.04-20120426_linux/bin/arm-linux-gnueabi-objcopy
-I binary -O ${oformat} -B ${oarch} \
dt.dtb dt.o
And I have one more question about passing *.dtb to kernel.
I had make a .dtb binary by using CONFIG_OF_SEPARATE and confirmed normally
working in u-boot.
When kernel is booting, how could kernel access .dtb binary?
Could kernel access dtb binary by setting /memreserve/ in u-boot .dts file or
by using fdtaddrcontrol
environment variable in u-boot board file?
But, by my result, dt_phys address in setup_machine_fdt() in arch/arm/devtree.c
had always indicated only
one point regardless of /memreserve/ or fdtcontroladdr.
Thank you,
Donghwa Lee
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[U-Boot] FDT: Question about embedded fdt enable
Dear, Simon Glass I am preparing device tree in Exynos SoC and had already tested by using CONFIG_OF_SEPARATE. But, I couldn't test by using CONFIG_OF_EMBED because it has a compiler problem to make a binary in the dts/Makefile. When I had used configuration as seaboard that I had changed configuration from CONFIG_OF_SEPARATE to CONFIG_OF_EMBED, it had a same problem. How did you test in seaboard as it embedded? Is there any more configuration to compile ebedded option? please reply my question. Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 2/3] create lib/tizen directory
On Monday 14 May 2012 03:27:55 Kyungmin Park wrote: On 5/14/12, Mike Frysinger wrote: On Monday 14 May 2012 01:37:10 Kyungmin Park wrote: On 5/14/12, Mike Frysinger wrote: On Thursday 10 May 2012 01:23:40 Donghwa Lee wrote: Makefile |1 + include/libtizen.h | 30 + lib/tizen/Makefile | 46 + lib/tizen/tizen.c | 40 + lib/tizen/tizen_hd_logo.h | 5071 lib/tizen/tizen_hd_logo_data.h | 30 + do you really need your own lib/tizen/ dir for a logo ? every one who doesn't build this still has to waste time going into lib/tizen/ to create an empty object. at least make the addition of lib/tizen/ depend on CONFIG_TIZEN too. It uses the same method as others does. e.g., libfdt In Makefile LIBS += lib/libfdt/libfdt.o In lib/libfdt/Makefile SOBJS = COBJS-libfdt += fdt.o fdt_ro.o fdt_rw.o fdt_strerror.o fdt_sw.o fdt_wip.o COBJS-$(CONFIG_OF_LIBFDT) += $(COBJS-libfdt) COBJS-$(CONFIG_FIT) += $(COBJS-libfdt) the difference is they have more than one CONFIG symbol going on, and their code base is sizable, and many arches/boards utilize it. you're adding a single file with a single function with a single CONFIG knob for a single board. Right, So we asked it first, which directory is proper. and suggested that the create the lib/tizen instead of others. since it's not platform, nor soc specific. you can still do in the top level to avoid affecting other people: ifeq ($(CONFIG_TIZEN),y) LIBS += lib/tizen/libtizen.o endif -mike Ok, I will update it later. Thank you, Donghwa Lee. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 0/3] support 32bpp bitmap image drawing and TIZEN logo
This patch set supports 32bpp bitmap image drwaing and TIZEN logo. LCD: display 32bpp decompressed bitmap image create lib/tizen directory EXYNOS: display 32bpp bitmap TIZEN logo Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v5 1/3] LCD: display 32bpp decompressed bitmap image
This patch supports drawing 32bpp decompressed bitmap image.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin.park kyungmin.p...@samsung.com
---
Changes for v4:
- read image sequentially just as it is.
Changes for v1/v2/v3:
- use lcd_line_length variable
- convert BGR to RGB because BMP data format aligned BGR.
common/lcd.c | 19 ---
1 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/common/lcd.c b/common/lcd.c
index bf1a6a9..00cbf05 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -645,14 +645,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
bpix = NBITS(panel_info.vl_bpix);
- if ((bpix != 1) (bpix != 8) (bpix != 16)) {
+ if ((bpix != 1) (bpix != 8) (bpix != 16) (bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix, bmp_bpix);
return 1;
}
/* We support displaying 8bpp BMPs on 16bpp LCDs */
- if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16)) {
+ if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16 || bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix,
le16_to_cpu(bmp-header.bit_count));
@@ -669,7 +669,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
cmap = (ushort *)fbi-palette;
#elif defined(CONFIG_MPC823)
cmap = (ushort *)(cp-lcd_cmap[255*sizeof(ushort)]);
-#elif !defined(CONFIG_ATMEL_LCD)
+#elif !defined(CONFIG_ATMEL_LCD) !defined(CONFIG_EXYNOS_FB)
cmap = panel_info.cmap;
#endif
@@ -791,6 +791,19 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
break;
#endif /* CONFIG_BMP_16BPP */
+#if defined(CONFIG_BMP_32BPP)
+ case 32:
+ for (i = 0; i height; ++i) {
+ for (j = 0; j width; j++) {
+ *(fb++) = *(bmap++);
+ *(fb++) = *(bmap++);
+ *(fb++) = *(bmap++);
+ *(fb++) = *(bmap++);
+ }
+ fb -= (lcd_line_length + width * (bpix / 8));
+ }
+ break;
+#endif /* CONFIG_BMP_32BPP */
default:
break;
};
--
1.7.4.1
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[U-Boot] [PATCH v5 3/3] EXYNOS: display 32bpp bitmap TIZEN logo
This patches support drawing 32bpp bitmap TIZEN logo in exynos fb.
trats_logo.h data is compressed from trats_logo.bmp to
trats_logo.bmp.gz by gzip and converted to trats_logo.h header file
format by some application. And then it is decomressed at the exynos
fb driver by gunzip_bmp().
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.comyy
---
Changes for v4:
- revert RGB order from BGR to RGB to suite lcd_display_bmp()
- get_tizen_logo_info() is called only defined CONFIG_TIZEN
Changes for v3:
- use logo resulution variable.
- get logo info through get_tizen_logo_info()
- change draw_tizen_logo() to common draw_logo()
- and so on.
Changes for v2:
- move fb_rgb_mode_t variable to include/lcd.h
- some bug fixes.
- define CONFIG_TIZEN
- use bmp_display() common display function
Changes for v1:
- set CONFIG_SYS_VIDEO_LOGO_MAX_SIZE bigger than BMP header file size.
- drawing logo when boot_logo_on variable sets in board file.
- move trats_logo* header file to another patch.
- set RGB order depending on file format in board file.
- and so on.
board/samsung/trats/trats.c |7 +++
drivers/video/exynos_fb.c | 27 +++
drivers/video/exynos_fb.h |7 ---
drivers/video/exynos_fimd.c |2 +-
include/configs/trats.h |6 +-
include/lcd.h | 13 +
6 files changed, 53 insertions(+), 9 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 084b67a..c3bba8f 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -37,6 +37,7 @@
#include pmic.h
#include usb/s3c_udc.h
#include max8997_pmic.h
+#include libtizen.h
#include setup.h
@@ -489,10 +490,16 @@ vidinfo_t panel_info = {
.reset_delay= 0,
.interface_mode = FIMD_RGB_INTERFACE,
.mipi_enabled = 1,
+ .logo_on= 1,
+ .resolution = HD_RESOLUTION,
+ .rgb_mode = MODE_RGB_P,
};
void init_panel_info(vidinfo_t *vid)
{
+#ifdef CONFIG_TIZEN
+ get_tizen_logo_info(vid);
+#endif
strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
s6e8ax0_platform_data.lcd_power = lcd_power;
s6e8ax0_platform_data.mipi_power = mipi_power;
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 96a8ec1..8a5a46d 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -64,6 +64,26 @@ static void exynos_lcd_init(vidinfo_t *vid)
exynos_fimd_lcd_init(vid);
}
+static void draw_logo(void)
+{
+ int x, y;
+ bmp_image_t *bmp;
+ ulong addr, len;
+
+ x = ((panel_width - panel_info.logo_width) 1);
+ y = ((panel_height - panel_info.logo_height) 1) - 4;
+
+ addr = panel_info.logo_addr;
+ bmp = (bmp_image_t *)addr;
+
+ if (!((bmp-header.signature[0]=='B')
+ (bmp-header.signature[1]=='M'))) {
+ addr = (ulong)gunzip_bmp(addr, len);
+ }
+
+ bmp_display((ulong)addr, x, y);
+}
+
static void lcd_panel_on(vidinfo_t *vid)
{
udelay(vid-init_delay);
@@ -115,6 +135,13 @@ void lcd_ctrl_init(void *lcdbase)
void lcd_enable(void)
{
+ if (panel_info.logo_on) {
+ memset(lcd_base, 0, panel_width * panel_height *
+ (NBITS(panel_info.vl_bpix) 3));
+
+ draw_logo();
+ }
+
lcd_panel_on(panel_info);
}
diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos_fb.h
index 66f5da6..4ff2efd 100644
--- a/drivers/video/exynos_fb.h
+++ b/drivers/video/exynos_fb.h
@@ -27,13 +27,6 @@
#define MAX_CLOCK (86 * 100)
-enum exynos_fb_rgb_mode_t {
- MODE_RGB_P = 0,
- MODE_BGR_P = 1,
- MODE_RGB_S = 2,
- MODE_BGR_S = 3,
-};
-
enum exynos_cpu_auto_cmd_rate {
DISABLE_AUTO_FRM,
PER_TWO_FRM,
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 6416b90..f07568a 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -273,7 +273,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
/* store panel info to global variable */
pvid = vid;
- rgb_mode = MODE_RGB_P;
+ rgb_mode = vid-rgb_mode;
if (vid-interface_mode == FIMD_RGB_INTERFACE) {
cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5f913ca..2f96a18 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -34,6 +34,7 @@
#define CONFIG_S5P /* which is in a S5P Family */
#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
#define CONFIG_TRATS /* working with TRATS */
+#define CONFIG_TIZEN /* TIZEN lib */
#include asm/arch/cpu.h /* get chip and board defs */
@@ -216,9 +217,12
[U-Boot] [PATCH v4 1/3]: LCD: display 32bpp decompressed bitmap image
This patch supports drawing 32bpp decompressed bitmap image.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin.park kyungmin.p...@samsung.com
---
Changes for v1/v2/v3:
- use lcd_line_length variable
- convert RGB to BGR because BMP data format aligned BGR.
common/lcd.c | 27 ---
1 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/common/lcd.c b/common/lcd.c
index bf1a6a9..460442d 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -616,6 +616,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
#if !defined(CONFIG_MCC200)
ushort *cmap = NULL;
#endif
+#if defined(CONFIG_BMP_32BPP)
+ uchar r, g, b, a;
+#endif
ushort *cmap_base = NULL;
ushort i, j;
uchar *fb;
@@ -645,14 +648,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
bpix = NBITS(panel_info.vl_bpix);
- if ((bpix != 1) (bpix != 8) (bpix != 16)) {
+ if ((bpix != 1) (bpix != 8) (bpix != 16) (bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix, bmp_bpix);
return 1;
}
/* We support displaying 8bpp BMPs on 16bpp LCDs */
- if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16)) {
+ if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16 || bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix,
le16_to_cpu(bmp-header.bit_count));
@@ -669,7 +672,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
cmap = (ushort *)fbi-palette;
#elif defined(CONFIG_MPC823)
cmap = (ushort *)(cp-lcd_cmap[255*sizeof(ushort)]);
-#elif !defined(CONFIG_ATMEL_LCD)
+#elif !defined(CONFIG_ATMEL_LCD) !defined(CONFIG_EXYNOS_FB)
cmap = panel_info.cmap;
#endif
@@ -791,6 +794,24 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
break;
#endif /* CONFIG_BMP_16BPP */
+#if defined(CONFIG_BMP_32BPP)
+ case 32:
+ for (i = 0; i height; ++i) {
+ for (j = 0; j width; j++) {
+ b = *(bmap++);
+ g = *(bmap++);
+ r = *(bmap++);
+ a = *(bmap++);
+
+ *(fb++) = r;
+ *(fb++) = g;
+ *(fb++) = b;
+ *(fb++) = a;
+ }
+ fb -= (lcd_line_length + width * (bpix / 8));
+ }
+ break;
+#endif /* CONFIG_BMP_32BPP */
default:
break;
};
--
1.7.4.1
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[U-Boot] [PATCH v3 3/3]: EXYNOS: display 32bpp bitmap TIZEN logo
This patches support drawing 32bpp bitmap TIZEN logo in exynos fb.
trats_logo.h data is compressed from trats_logo.bmp to
trats_logo.bmp.gz by gzip and converted to trats_logo.h header file
format by some application. And then it is decomressed at the exynos
fb driver by gunzip_bmp().
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes for v1:
- set CONFIG_SYS_VIDEO_LOGO_MAX_SIZE bigger than BMP header file size.
- drawing logo when boot_logo_on variable sets in board file.
- move trats_logo* header file to another patch.
- set RGB order depending on file format in board file.
- and so on.
Changes for v2:
- move fb_rgb_mode_t variable to include/lcd.h
- some bug fixes.
- define CONFIG_TIZEN
- use bmp_display() common display function
Changes for v3:
- use logo resulution variable.
- get logo info through get_tizen_logo_info()
- change draw_tizen_logo() to common draw_logo()
- and so on.
board/samsung/trats/trats.c |5 +
drivers/video/exynos_fb.c | 27 +++
drivers/video/exynos_fb.h |7 ---
drivers/video/exynos_fimd.c |2 +-
include/configs/trats.h |6 +-
include/lcd.h | 13 +
6 files changed, 51 insertions(+), 9 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 084b67a..fca210d 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -37,6 +37,7 @@
#include pmic.h
#include usb/s3c_udc.h
#include max8997_pmic.h
+#include libtizen.h
#include setup.h
@@ -489,10 +490,14 @@ vidinfo_t panel_info = {
.reset_delay= 0,
.interface_mode = FIMD_RGB_INTERFACE,
.mipi_enabled = 1,
+ .logo_on= 1,
+ .resolution = HD_RESOLUTION,
+ .rgb_mode = MODE_BGR_P,
};
void init_panel_info(vidinfo_t *vid)
{
+ get_tizen_logo_info();
strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
s6e8ax0_platform_data.lcd_power = lcd_power;
s6e8ax0_platform_data.mipi_power = mipi_power;
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 96a8ec1..8a5a46d 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -64,6 +64,26 @@ static void exynos_lcd_init(vidinfo_t *vid)
exynos_fimd_lcd_init(vid);
}
+static void draw_logo(void)
+{
+ int x, y;
+ bmp_image_t *bmp;
+ ulong addr, len;
+
+ x = ((panel_width - panel_info.logo_width) 1);
+ y = ((panel_height - panel_info.logo_height) 1) - 4;
+
+ addr = panel_info.logo_addr;
+ bmp = (bmp_image_t *)addr;
+
+ if (!((bmp-header.signature[0]=='B')
+ (bmp-header.signature[1]=='M'))) {
+ addr = (ulong)gunzip_bmp(addr, len);
+ }
+
+ bmp_display((ulong)addr, x, y);
+}
+
static void lcd_panel_on(vidinfo_t *vid)
{
udelay(vid-init_delay);
@@ -115,6 +135,13 @@ void lcd_ctrl_init(void *lcdbase)
void lcd_enable(void)
{
+ if (panel_info.logo_on) {
+ memset(lcd_base, 0, panel_width * panel_height *
+ (NBITS(panel_info.vl_bpix) 3));
+
+ draw_logo();
+ }
+
lcd_panel_on(panel_info);
}
diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos_fb.h
index 66f5da6..4ff2efd 100644
--- a/drivers/video/exynos_fb.h
+++ b/drivers/video/exynos_fb.h
@@ -27,13 +27,6 @@
#define MAX_CLOCK (86 * 100)
-enum exynos_fb_rgb_mode_t {
- MODE_RGB_P = 0,
- MODE_BGR_P = 1,
- MODE_RGB_S = 2,
- MODE_BGR_S = 3,
-};
-
enum exynos_cpu_auto_cmd_rate {
DISABLE_AUTO_FRM,
PER_TWO_FRM,
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 6416b90..f07568a 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -273,7 +273,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
/* store panel info to global variable */
pvid = vid;
- rgb_mode = MODE_RGB_P;
+ rgb_mode = vid-rgb_mode;
if (vid-interface_mode == FIMD_RGB_INTERFACE) {
cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5f913ca..2f96a18 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -34,6 +34,7 @@
#define CONFIG_S5P /* which is in a S5P Family */
#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
#define CONFIG_TRATS /* working with TRATS */
+#define CONFIG_TIZEN /* TIZEN lib */
#include asm/arch/cpu.h /* get chip and board defs */
@@ -216,9 +217,12 @@
/* LCD */
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_32BPP
#define CONFIG_FB_ADDR 0x52504000
#define CONFIG_S6E8AX0
#define
[U-Boot] [PATCH] disk: generate GUID Partiton Tables
This patch manipulates GUID Papartition Tables.
I send this patch on behalf of Gwuieon Jin.
Signed-off-by: Gwuieon Jin ge@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
disk/part_efi.c | 107 +++
disk/part_efi.h |2 +
include/part.h |2 +
3 files changed, 111 insertions(+), 0 deletions(-)
diff --git a/disk/part_efi.c b/disk/part_efi.c
index b6cda57..ce25ad5 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -433,4 +433,111 @@ static int is_pte_valid(gpt_entry * pte)
return 1;
}
}
+
+void set_gpt_table(block_dev_desc_t *dev_desc, unsigned int part_start_lba,
+ int parts, unsigned int *blocks, unsigned int *part_offset)
+{
+ legacy_mbr protective_mbr;
+ gpt_header p_gpt_head, s_gpt_head;
+ gpt_entry p_gpt_entry[GPT_ENTRY_NUMBERS],
+ s_gpt_entry[GPT_ENTRY_NUMBERS];
+ efi_guid_t disk_uuid, part_uuid;
+ unsigned long crc32_tmp, tmp_val;
+ unsigned int size = 0;
+ unsigned int offset = part_start_lba;
+ int i;
+
+ memset(protective_mbr, 0, sizeof(legacy_mbr));
+ memset(p_gpt_head, 0, sizeof(gpt_header));
+ memset(s_gpt_head, 0, sizeof(gpt_header));
+ memset(p_gpt_entry, 0, GPT_ENTRY_NUMBERS * sizeof(gpt_entry));
+ memset(s_gpt_entry, 0, GPT_ENTRY_NUMBERS * sizeof(gpt_entry));
+
+ /* protective MBR (LBA0) */
+ *(unsigned short *) protective_mbr.signature = MSDOS_MBR_SIGNATURE;
+ protective_mbr.partition_record[0].sys_ind = EFI_PMBR_OSTYPE_EFI_GPT;
+ tmp_val = 1UL;
+ memcpy(protective_mbr.partition_record[0].start_sect, tmp_val, 4);
+ tmp_val = (unsigned long) (dev_desc-lba - 1);
+ memcpy(protective_mbr.partition_record[0].nr_sects, tmp_val, 4);
+ dev_desc-block_write(dev_desc-dev, 0, 1, protective_mbr);
+
+ /* primary GPT header (LBA1) */
+ *(unsigned long long *) p_gpt_head.signature = GPT_HEADER_SIGNATURE;
+ *(unsigned long *) p_gpt_head.revision = GPT_HEADER_REVISION_V1;
+ *(unsigned long *) p_gpt_head.header_size = sizeof(gpt_header);
+ *(unsigned long long *) p_gpt_head.my_lba = 1;
+ *(unsigned long long *) p_gpt_head.alternate_lba = dev_desc-lba - 1;
+ *(unsigned long long *) p_gpt_head.first_usable_lba = 34;
+ *(unsigned long long *) p_gpt_head.last_usable_lba = dev_desc-lba - 34;
+ *(unsigned long long *) p_gpt_head.partition_entry_lba = 2;
+ *(unsigned long *) p_gpt_head.num_partition_entries = GPT_ENTRY_NUMBERS;
+ *(unsigned long *) p_gpt_head.sizeof_partition_entry = GPT_ENTRY_SIZE;
+ *(unsigned long *) p_gpt_head.header_crc32 = 0;
+ *(unsigned long *) p_gpt_head.partition_entry_array_crc32 = 0;
+
+ /* primary partition entrys (LBA2-33) */
+ for (i = 0; i parts; i++) {
+ memcpy(p_gpt_entry[i].partition_type_guid.b,
+ PARTITION_BASIC_DATA_GUID, 16);
+
+ *(unsigned long long *) p_gpt_entry[i].starting_lba = offset;
+ /* allocate remaining memory in last partition */
+ if (i != parts - 1)
+ *(unsigned long long *) p_gpt_entry[i].ending_lba =
+ offset + blocks[i] - 1;
+ else
+ *(unsigned long long *) p_gpt_entry[i].ending_lba =
+ dev_desc-lba - 33;
+ memset(p_gpt_entry[i].attributes, 0,
+ sizeof(gpt_entry_attributes));
+ part_offset[i] = offset;
+ offset += blocks[i];
+ }
+
+ crc32_tmp = efi_crc32((const unsigned char *)p_gpt_entry,
+ le32_to_int(p_gpt_head.num_partition_entries) *
+ le32_to_int(p_gpt_head.sizeof_partition_entry));
+ memcpy(p_gpt_head.partition_entry_array_crc32, crc32_tmp,
+ sizeof(crc32_tmp));
+
+ crc32_tmp = efi_crc32((const unsigned char *)p_gpt_head,
+ le32_to_int(p_gpt_head.header_size));
+ memcpy(p_gpt_head.header_crc32, crc32_tmp, sizeof(crc32_tmp));
+
+ dev_desc-block_write(dev_desc-dev, 1, 1, p_gpt_head);
+ dev_desc-block_write(dev_desc-dev, 2, 32, p_gpt_entry);
+
+ /* secondary partition entrys */
+ memcpy(s_gpt_entry, p_gpt_entry,
+ GPT_ENTRY_NUMBERS * sizeof(gpt_entry));
+
+ /* secondary gpt header */
+ memcpy(s_gpt_head, p_gpt_head, sizeof(gpt_header));
+ *(unsigned long long *) s_gpt_head.my_lba =
+ le64_to_int(p_gpt_head.alternate_lba);
+ *(unsigned long long *) s_gpt_head.alternate_lba =
+ le64_to_int(p_gpt_head.my_lba);
+ *(unsigned long long *) s_gpt_head.partition_entry_lba =
+ le64_to_int(p_gpt_head.last_usable_lba) + 1;
+ *(unsigned long *) s_gpt_head.header_crc32 = 0;
+
Re: [U-Boot] [PATCH v2 2/3] LCD: add compressed 32bpp BMP image data
Dear Wolfgang Denk, Mr.Kang and I think TIZEN logo is not a board/vendor specific although samsung will release it. So, Mr.kang had proposed new directory include/video or include/video/logo/. How do you think about that? When you receive this e-mail, please replay with your opinions. Thank you, Donghwa Lee On 27 April 2012 09:18, Minkyu Kang wrote: Dear Wolfgang Denk, On 26 April 2012 21:43, Wolfgang Denk w...@denx.de wrote: Dear Donghwa Lee, In message 4f99057f.5040...@samsung.com you wrote: This patch is 32bpp BMP image data that is converted to header after gzip. I had agonized about where these data located. I think TIZEN is not specific on board and SoC, so I determined that position is proper in include/. If you have other opinions, please comment to me. Signed-off-by: Donghwa Lee dh09@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- include/tizen_logo.h | 5071 + include/tizen_logo_data.h | 30 + 2 files changed, 5101 insertions(+), 0 deletions(-) create mode 100644 include/tizen_logo.h create mode 100644 include/tizen_logo_data.h Please make sure to include a changelog; this is a mandatory requirement, see http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions I reject your patch. I will not accept to have such board and/or vendor specific data in the top level include/ directory. Please move this to the respective board or vendor directory, as I have asked you do to before. But I think TIZEN logo is not a board/vendor specific. It's a platform specific. How do you think that makes a new directory? (e.g: include/video/ or include/video/logo/) Thnaks. Minkyu Kang. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/3] LCD: display 32bpp decompressed bitmap image
This patch supports drawing 32bpp decompressed bitmap image.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin.park kyungmin.p...@samsung.com
---
Changes for v1/v2:
- use lcd_line_length variable
- convert RGB to BGR because BMP data format aligned BGR.
common/lcd.c | 27 ---
1 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/common/lcd.c b/common/lcd.c
index bf1a6a9..460442d 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -616,6 +616,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
#if !defined(CONFIG_MCC200)
ushort *cmap = NULL;
#endif
+#if defined(CONFIG_BMP_32BPP)
+ uchar r, g, b, a;
+#endif
ushort *cmap_base = NULL;
ushort i, j;
uchar *fb;
@@ -645,14 +648,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
bpix = NBITS(panel_info.vl_bpix);
- if ((bpix != 1) (bpix != 8) (bpix != 16)) {
+ if ((bpix != 1) (bpix != 8) (bpix != 16) (bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix, bmp_bpix);
return 1;
}
/* We support displaying 8bpp BMPs on 16bpp LCDs */
- if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16)) {
+ if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16 || bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix,
le16_to_cpu(bmp-header.bit_count));
@@ -669,7 +672,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
cmap = (ushort *)fbi-palette;
#elif defined(CONFIG_MPC823)
cmap = (ushort *)(cp-lcd_cmap[255*sizeof(ushort)]);
-#elif !defined(CONFIG_ATMEL_LCD)
+#elif !defined(CONFIG_ATMEL_LCD) !defined(CONFIG_EXYNOS_FB)
cmap = panel_info.cmap;
#endif
@@ -791,6 +794,24 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
break;
#endif /* CONFIG_BMP_16BPP */
+#if defined(CONFIG_BMP_32BPP)
+ case 32:
+ for (i = 0; i height; ++i) {
+ for (j = 0; j width; j++) {
+ b = *(bmap++);
+ g = *(bmap++);
+ r = *(bmap++);
+ a = *(bmap++);
+
+ *(fb++) = r;
+ *(fb++) = g;
+ *(fb++) = b;
+ *(fb++) = a;
+ }
+ fb -= (lcd_line_length + width * (bpix / 8));
+ }
+ break;
+#endif /* CONFIG_BMP_32BPP */
default:
break;
};
--
1.7.4.1
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[U-Boot] [PATCH v 3/3] EXYNOS: display 32bpp bitmap TIZEN logo
This patches support drawing 32bpp bitmap TIZEN logo in exynos fb.
trats_logo.h data is compressed from trats_logo.bmp to
trats_logo.bmp.gz by gzip and converted to trats_logo.h header file
format by some application. And then it is decomressed at the exynos
fb driver by gunzip_bmp().
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes for v1:
- set CONFIG_SYS_VIDEO_LOGO_MAX_SIZE bigger than BMP header file size.
- drawing logo when boot_logo_on variable sets in board file.
- move trats_logo* header file to another patch.
- set RGB order depending on file format in board file.
- and so on.
Changes for v2:
- move fb_rgb_mode_t variable to include/lcd.h
- some bug fixes.
- define CONFIG_TIZEN
- use bmp_display() common display function
board/samsung/trats/trats.c |2 ++
drivers/video/exynos_fb.c | 36
drivers/video/exynos_fb.h |7 ---
drivers/video/exynos_fimd.c |2 +-
include/configs/trats.h |6 +-
include/lcd.h |9 +
6 files changed, 53 insertions(+), 9 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 084b67a..6ae15b7 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -489,6 +489,8 @@ vidinfo_t panel_info = {
.reset_delay= 0,
.interface_mode = FIMD_RGB_INTERFACE,
.mipi_enabled = 1,
+ .logo_on= 1,
+ .rgb_mode = MODE_BGR_P,
};
void init_panel_info(vidinfo_t *vid)
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 96a8ec1..009533e 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -32,6 +32,9 @@
#include exynos_fb.h
+#ifdef CONFIG_TIZEN
+#include libtizen.h
+#endif
int lcd_line_length;
int lcd_color_fg;
int lcd_color_bg;
@@ -64,6 +67,31 @@ static void exynos_lcd_init(vidinfo_t *vid)
exynos_fimd_lcd_init(vid);
}
+#ifdef CONFIG_TIZEN
+static void draw_tizen_logo(void)
+{
+ int x, y;
+ bmp_image_t *bmp;
+ ulong addr, len;
+ unsigned int logo_width, logo_height;
+
+ logo_width = panel_info.logo_width;
+ logo_height = panel_info.logo_height;
+ x = ((panel_width - get_tizen_logo_width()) 1);
+ y = ((panel_height - get_tizen_logo_height()) 1) - 4;
+
+ addr = (ulong)get_tizen_logo_data();
+ bmp = (bmp_image_t *)addr;
+
+ if (!((bmp-header.signature[0]=='B')
+ (bmp-header.signature[1]=='M'))) {
+ addr = (ulong)gunzip_bmp(addr, len);
+ }
+
+ bmp_display((ulong)addr, x, y);
+}
+#endif
+
static void lcd_panel_on(vidinfo_t *vid)
{
udelay(vid-init_delay);
@@ -115,6 +143,14 @@ void lcd_ctrl_init(void *lcdbase)
void lcd_enable(void)
{
+ if (panel_info.logo_on) {
+ memset(lcd_base, 0, panel_width * panel_height *
+ (NBITS(panel_info.vl_bpix) 3));
+#ifdef CONFIG_TIZEN
+ draw_tizen_logo();
+#endif
+ }
+
lcd_panel_on(panel_info);
}
diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos_fb.h
index 66f5da6..4ff2efd 100644
--- a/drivers/video/exynos_fb.h
+++ b/drivers/video/exynos_fb.h
@@ -27,13 +27,6 @@
#define MAX_CLOCK (86 * 100)
-enum exynos_fb_rgb_mode_t {
- MODE_RGB_P = 0,
- MODE_BGR_P = 1,
- MODE_RGB_S = 2,
- MODE_BGR_S = 3,
-};
-
enum exynos_cpu_auto_cmd_rate {
DISABLE_AUTO_FRM,
PER_TWO_FRM,
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 6416b90..f07568a 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -273,7 +273,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
/* store panel info to global variable */
pvid = vid;
- rgb_mode = MODE_RGB_P;
+ rgb_mode = vid-rgb_mode;
if (vid-interface_mode == FIMD_RGB_INTERFACE) {
cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5f913ca..2f96a18 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -34,6 +34,7 @@
#define CONFIG_S5P /* which is in a S5P Family */
#define CONFIG_EXYNOS4210 /* which is in a EXYNOS4210 */
#define CONFIG_TRATS /* working with TRATS */
+#define CONFIG_TIZEN /* TIZEN lib */
#include asm/arch/cpu.h /* get chip and board defs */
@@ -216,9 +217,12 @@
/* LCD */
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_32BPP
#define CONFIG_FB_ADDR 0x52504000
#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1280 * 720 * 4)
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 12))
#endif /* __CONFIG_H */
diff
[U-Boot] [PATCH v2 1/3] LCD: display 32bpp decompressed bitmap image
This patch supports drawing 32bpp decompressed bitmap image.
change of v1:
- use lcd_line_length variable
- convert RGB to BGR because BMP data format aligned BGR.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin.park kyungmin.p...@samsung.com
---
common/lcd.c | 27 ---
1 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/common/lcd.c b/common/lcd.c
index bf1a6a9..460442d 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -616,6 +616,9 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
#if !defined(CONFIG_MCC200)
ushort *cmap = NULL;
#endif
+#if defined(CONFIG_BMP_32BPP)
+ uchar r, g, b, a;
+#endif
ushort *cmap_base = NULL;
ushort i, j;
uchar *fb;
@@ -645,14 +648,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
bpix = NBITS(panel_info.vl_bpix);
- if ((bpix != 1) (bpix != 8) (bpix != 16)) {
+ if ((bpix != 1) (bpix != 8) (bpix != 16) (bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix, bmp_bpix);
return 1;
}
/* We support displaying 8bpp BMPs on 16bpp LCDs */
- if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16)) {
+ if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16 || bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix,
le16_to_cpu(bmp-header.bit_count));
@@ -669,7 +672,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
cmap = (ushort *)fbi-palette;
#elif defined(CONFIG_MPC823)
cmap = (ushort *)(cp-lcd_cmap[255*sizeof(ushort)]);
-#elif !defined(CONFIG_ATMEL_LCD)
+#elif !defined(CONFIG_ATMEL_LCD) !defined(CONFIG_EXYNOS_FB)
cmap = panel_info.cmap;
#endif
@@ -791,6 +794,24 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
break;
#endif /* CONFIG_BMP_16BPP */
+#if defined(CONFIG_BMP_32BPP)
+ case 32:
+ for (i = 0; i height; ++i) {
+ for (j = 0; j width; j++) {
+ b = *(bmap++);
+ g = *(bmap++);
+ r = *(bmap++);
+ a = *(bmap++);
+
+ *(fb++) = r;
+ *(fb++) = g;
+ *(fb++) = b;
+ *(fb++) = a;
+ }
+ fb -= (lcd_line_length + width * (bpix / 8));
+ }
+ break;
+#endif /* CONFIG_BMP_32BPP */
default:
break;
};
--
1.7.4.1
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[U-Boot] [PATCH v2 3/3] EXYNOS: display 32bpp bitmap TIZEN logo
This patches support drawing 32bpp bitmap TIZEN logo in exynos fb.
trats_logo.h data is compressed from trats_logo.bmp to
trats_logo.bmp.gz by gzip and converted to trats_logo.h header file
format by some application. And then it is decomressed at the exynos
fb driver by gunzip_bmp().
change of v1:
- set CONFIG_SYS_VIDEO_LOGO_MAX_SIZE bigger than BMP header file size.
- drawing logo when boot_logo_on variable sets in board file.
- move trats_logo* header file to another patch.
- set RGB order depending on file format in board file.
- and so on.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
board/samsung/trats/trats.c | 12
drivers/video/exynos_fb.c | 33 +
drivers/video/exynos_fb.h |7 ---
drivers/video/exynos_fimd.c |2 +-
include/configs/trats.h |5 -
include/lcd.h |4
6 files changed, 54 insertions(+), 9 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 084b67a..9d75b8f 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -37,6 +37,7 @@
#include pmic.h
#include usb/s3c_udc.h
#include max8997_pmic.h
+#include tizen_logo_data.h
#include setup.h
@@ -455,6 +456,13 @@ static int mipi_power(void)
return 0;
}
+enum exynos_fb_rgb_mode_t {
+ MODE_RGB_P = 0,
+ MODE_BGR_P = 1,
+ MODE_RGB_S = 2,
+ MODE_BGR_S = 3,
+};
+
vidinfo_t panel_info = {
.vl_freq= 60,
.vl_col = 720,
@@ -489,6 +497,10 @@ vidinfo_t panel_info = {
.reset_delay= 0,
.interface_mode = FIMD_RGB_INTERFACE,
.mipi_enabled = 1,
+ .boot_logo_on = 1,
+ .rgb_mode = MODE_BGR_P,
+ .logo_height = TIZEN_LOGO_HEIGHT,
+ .logo_width = TIZEN_LOGO_WIDTH,
};
void init_panel_info(vidinfo_t *vid)
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 96a8ec1..f669b65 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -32,6 +32,10 @@
#include exynos_fb.h
+#ifdef CONFIG_TRATS
+#include tizen_logo.h
+#endif
+
int lcd_line_length;
int lcd_color_fg;
int lcd_color_bg;
@@ -64,6 +68,29 @@ static void exynos_lcd_init(vidinfo_t *vid)
exynos_fimd_lcd_init(vid);
}
+static void draw_logo(void)
+{
+ int x, y;
+ bmp_image_t *bmp;
+ ulong addr, len;
+ unsigned int logo_width, logo_height;
+
+ logo_width = panel_info.logo_width;
+ logo_height = panel_info.logo_height;
+ x = ((panel_width - logo_width) 1);
+ y = ((panel_height - logo_height) 1) - 4;
+
+ addr = (ulong)logo;
+ bmp = (bmp_image_t *)addr;
+
+ if (!((bmp-header.signature[0] =='B')
+ (bmp-header.signature[1] =='M'))) {
+ addr = (ulong)gunzip_bmp(addr, len);
+ }
+
+ lcd_display_bitmap((ulong)addr, x, y);
+}
+
static void lcd_panel_on(vidinfo_t *vid)
{
udelay(vid-init_delay);
@@ -115,6 +142,12 @@ void lcd_ctrl_init(void *lcdbase)
void lcd_enable(void)
{
+ if (panel_info.boot_logo_on) {
+ memset(lcd_base, 0, panel_width * panel_height *
+ (NBITS(panel_info.vl_bpix) 3));
+ draw_logo();
+ }
+
lcd_panel_on(panel_info);
}
diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos_fb.h
index 66f5da6..4ff2efd 100644
--- a/drivers/video/exynos_fb.h
+++ b/drivers/video/exynos_fb.h
@@ -27,13 +27,6 @@
#define MAX_CLOCK (86 * 100)
-enum exynos_fb_rgb_mode_t {
- MODE_RGB_P = 0,
- MODE_BGR_P = 1,
- MODE_RGB_S = 2,
- MODE_BGR_S = 3,
-};
-
enum exynos_cpu_auto_cmd_rate {
DISABLE_AUTO_FRM,
PER_TWO_FRM,
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 6416b90..f07568a 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -273,7 +273,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
/* store panel info to global variable */
pvid = vid;
- rgb_mode = MODE_RGB_P;
+ rgb_mode = vid-rgb_mode;
if (vid-interface_mode == FIMD_RGB_INTERFACE) {
cfg |= EXYNOS_VIDCON0_VIDOUT_RGB;
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 5f913ca..e611ace 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -216,9 +216,12 @@
/* LCD */
#define CONFIG_EXYNOS_FB
#define CONFIG_LCD
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_32BPP
#define CONFIG_FB_ADDR 0x52504000
#define CONFIG_S6E8AX0
#define CONFIG_EXYNOS_MIPI_DSIM
-#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (1280 * 720 * 4)
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 12))
#endif /* __CONFIG_H */
diff --git a/include/lcd.h b/include/lcd.h
index 3d9ef16..5d09696 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -235,6
[U-Boot] [PATCH] LCD: support another s6e8ax0 panel type
s6e8ax0 panel has many panel of types. This patch support another panel
on TIZEN lunchbox board(HWREVISION 2). This panel has reversed panel
display type. So, I had added necessary command.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/mipi_dsim.h |1 +
board/samsung/trats/trats.c |8
drivers/video/s6e8ax0.c | 17 -
3 files changed, 25 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
index ef6a3d1..9a7cbeb 100644
--- a/arch/arm/include/asm/arch-exynos/mipi_dsim.h
+++ b/arch/arm/include/asm/arch-exynos/mipi_dsim.h
@@ -329,6 +329,7 @@ struct mipi_dsim_lcd_device {
char*name;
int id;
int bus_id;
+ int reverse_panel;
struct mipi_dsim_device *master;
void*platform_data;
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 9d75b8f..4a314c0 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -54,6 +54,11 @@ u32 get_board_rev(void)
static void check_hw_revision(void);
+static int hwrevision(int rev)
+{
+ return (board_rev 0xf) == rev;
+}
+
int board_init(void)
{
gd-bd-bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -505,6 +510,9 @@ vidinfo_t panel_info = {
void init_panel_info(vidinfo_t *vid)
{
+ if (hwrevision(2))
+ mipi_lcd_device.reverse_panel = 1;
+
strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
s6e8ax0_platform_data.lcd_power = lcd_power;
s6e8ax0_platform_data.mipi_power = mipi_power;
diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c
index 02c5ccf..176c518 100644
--- a/drivers/video/s6e8ax0.c
+++ b/drivers/video/s6e8ax0.c
@@ -28,6 +28,7 @@
static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+ int reverse = dsim_dev-dsim_lcd_dev-reverse_panel;
const unsigned char data_to_send[] = {
0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
@@ -36,8 +37,22 @@ static void s6e8ax0_panel_cond(struct mipi_dsim_device
*dsim_dev)
0xff, 0xff, 0xc8
};
- ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ const unsigned char data_to_send_reverse[] = {
+ 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
+ 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
+ 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
+ 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
+ 0xf6, 0xf6, 0xc1
+ };
+
+ if (reverse) {
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send_reverse,
+ ARRAY_SIZE(data_to_send_reverse));
+ } else {
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
(unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
+ }
}
static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
--
1.7.4.1
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[U-Boot] [PATCH] LCD: change s6e8ax0 panel gamma value
s6e8ax0 panel init gamma value is changed because existing it was not
proper value for this panel.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
drivers/video/s6e8ax0.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c
index 1ec7fd6..02c5ccf 100644
--- a/drivers/video/s6e8ax0.c
+++ b/drivers/video/s6e8ax0.c
@@ -55,11 +55,11 @@ static void s6e8ax0_display_cond(struct mipi_dsim_device
*dsim_dev)
static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
{
struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
- /* 7500K 2.2 Set (M3, 300cd) */
+ /* 7500K 2.2 Set : 30cd */
const unsigned char data_to_send[] = {
- 0xfa, 0x01, 0x0f, 0x00, 0x0f, 0xda, 0xc0, 0xe4, 0xc8,
- 0xc8, 0xc6, 0xd3, 0xd6, 0xd0, 0xab, 0xb2, 0xa6, 0xbf,
- 0xc2, 0xb9, 0x00, 0x93, 0x00, 0x86, 0x00, 0xd1
+ 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
+ 0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
+ 0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
};
ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
--
1.7.4.1
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[U-Boot] [PATCH] TRATS: initialize panel_info data structure in board file
panel_info data structure is global variable, so, I have initialized it
in board file. If it is initialized in init_panel_info() like existing,
it can't be used in drv_lcd_init() in common/lcd.c because
init_panel_info() is called after drv_lcd_init().
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
board/samsung/trats/trats.c | 72 ++
drivers/video/exynos_fb.c |3 --
2 files changed, 38 insertions(+), 37 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 3085de1..a569c83 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -455,43 +455,47 @@ static int mipi_power(void)
return 0;
}
-void init_panel_info(vidinfo_t *vid)
-{
- vid-vl_freq= 60;
- vid-vl_col = 720;
- vid-vl_row = 1280;
- vid-vl_width = 720;
- vid-vl_height = 1280;
- vid-vl_clkp= CONFIG_SYS_HIGH;
- vid-vl_hsp = CONFIG_SYS_LOW;
- vid-vl_vsp = CONFIG_SYS_LOW;
- vid-vl_dp = CONFIG_SYS_LOW;
-
- vid-vl_bpix= 5;
- vid-dual_lcd_enabled = 0;
+vidinfo_t panel_info = {
+ .vl_freq = 60,
+ .vl_col = 720,
+ .vl_row = 1280,
+ .vl_width = 720,
+ .vl_height = 1280,
+ .vl_clkp= CONFIG_SYS_HIGH,
+ .vl_hsp = CONFIG_SYS_LOW,
+ .vl_vsp = CONFIG_SYS_LOW,
+ .vl_dp = CONFIG_SYS_LOW,
+
+ .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
/* s6e8ax0 Panel */
- vid-vl_hspw= 5;
- vid-vl_hbpd= 10;
- vid-vl_hfpd= 10;
-
- vid-vl_vspw= 2;
- vid-vl_vbpd= 1;
- vid-vl_vfpd= 13;
- vid-vl_cmd_allow_len = 0xf;
-
- vid-win_id = 3;
- vid-cfg_gpio = NULL;
- vid-backlight_on = NULL;
- vid-lcd_power_on = NULL; /* lcd_power_on in mipi dsi driver */
- vid-reset_lcd = lcd_reset;
-
- vid-init_delay = 0;
- vid-power_on_delay = 0;
- vid-reset_delay = 0;
- vid-interface_mode = FIMD_RGB_INTERFACE;
- vid-mipi_enabled = 1;
+ .vl_hspw= 5,
+ .vl_hbpd= 10,
+ .vl_hfpd= 10,
+
+ .vl_vspw= 2,
+ .vl_vbpd= 1,
+ .vl_vfpd= 13,
+ .vl_cmd_allow_len = 0xf,
+
+ .win_id = 3,
+ .cfg_gpio = NULL,
+ .backlight_on = NULL,
+ .lcd_power_on = NULL, /* lcd_power_on in mipi dsi driver */
+ .reset_lcd = lcd_reset,
+
+ .init_delay = 0,
+ .power_on_delay = 0,
+ .reset_delay = 0,
+ .interface_mode = FIMD_RGB_INTERFACE,
+ .mipi_enabled = 1,
+ .boot_logo_on = 1,
+ .logo_height = TIZEN_LOGO_HEIGHT,
+ .logo_width = TIZEN_LOGO_WIDTH,
+};
+void init_panel_info(vidinfo_t *vid)
+{
strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
s6e8ax0_platform_data.lcd_power = lcd_power;
s6e8ax0_platform_data.mipi_power = mipi_power;
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index a1cf449..96a8ec1 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -44,9 +44,6 @@ short console_row;
static unsigned int panel_width, panel_height;
-/* LCD Panel data */
-vidinfo_t panel_info;
-
static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
{
unsigned long palette_size;
--
1.7.4.1
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[U-Boot] [PATCH v2] TRATS: initialize panel_info data structure in board file
panel_info data structure is gloable variable, so, I have initialized it
in board file. If it is initialized in init_panel_info() like existing,
it can't be used in drv_lcd_init() in common/lcd.c because
init_panel_info() is called after drv_lcd_init().
change of v1:
- I had made a mistake that must do not included variables of vidinfo_t
data structure was included in the file. So, I removed it.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
board/samsung/trats/trats.c | 71 ++-
drivers/video/exynos_fb.c |3 --
2 files changed, 36 insertions(+), 38 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index 3085de1..084b67a 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -455,43 +455,44 @@ static int mipi_power(void)
return 0;
}
+vidinfo_t panel_info = {
+ .vl_freq= 60,
+ .vl_col = 720,
+ .vl_row = 1280,
+ .vl_width = 720,
+ .vl_height = 1280,
+ .vl_clkp= CONFIG_SYS_HIGH,
+ .vl_hsp = CONFIG_SYS_LOW,
+ .vl_vsp = CONFIG_SYS_LOW,
+ .vl_dp = CONFIG_SYS_LOW,
+ .vl_bpix= 5,/* Bits per pixel, 2^5 = 32 */
+
+ /* s6e8ax0 Panel infomation */
+ .vl_hspw= 5,
+ .vl_hbpd= 10,
+ .vl_hfpd= 10,
+
+ .vl_vspw= 2,
+ .vl_vbpd= 1,
+ .vl_vfpd= 13,
+ .vl_cmd_allow_len = 0xf,
+
+ .win_id = 3,
+ .cfg_gpio = NULL,
+ .backlight_on = NULL,
+ .lcd_power_on = NULL, /* lcd_power_on in mipi dsi driver */
+ .reset_lcd = lcd_reset,
+ .dual_lcd_enabled = 0,
+
+ .init_delay = 0,
+ .power_on_delay = 0,
+ .reset_delay= 0,
+ .interface_mode = FIMD_RGB_INTERFACE,
+ .mipi_enabled = 1,
+};
+
void init_panel_info(vidinfo_t *vid)
{
- vid-vl_freq= 60;
- vid-vl_col = 720;
- vid-vl_row = 1280;
- vid-vl_width = 720;
- vid-vl_height = 1280;
- vid-vl_clkp= CONFIG_SYS_HIGH;
- vid-vl_hsp = CONFIG_SYS_LOW;
- vid-vl_vsp = CONFIG_SYS_LOW;
- vid-vl_dp = CONFIG_SYS_LOW;
-
- vid-vl_bpix= 5;
- vid-dual_lcd_enabled = 0;
-
- /* s6e8ax0 Panel */
- vid-vl_hspw= 5;
- vid-vl_hbpd= 10;
- vid-vl_hfpd= 10;
-
- vid-vl_vspw= 2;
- vid-vl_vbpd= 1;
- vid-vl_vfpd= 13;
- vid-vl_cmd_allow_len = 0xf;
-
- vid-win_id = 3;
- vid-cfg_gpio = NULL;
- vid-backlight_on = NULL;
- vid-lcd_power_on = NULL; /* lcd_power_on in mipi dsi driver */
- vid-reset_lcd = lcd_reset;
-
- vid-init_delay = 0;
- vid-power_on_delay = 0;
- vid-reset_delay = 0;
- vid-interface_mode = FIMD_RGB_INTERFACE;
- vid-mipi_enabled = 1;
-
strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name);
s6e8ax0_platform_data.lcd_power = lcd_power;
s6e8ax0_platform_data.mipi_power = mipi_power;
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index a1cf449..96a8ec1 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -44,9 +44,6 @@ short console_row;
static unsigned int panel_width, panel_height;
-/* LCD Panel data */
-vidinfo_t panel_info;
-
static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
{
unsigned long palette_size;
--
1.7.4.1
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Re: [U-Boot] [PATCH 2/2] EXYNOS: draw 32bpp bitmap TIZEN logo
Thank you for your comment.
On 23 April 2012 18:00, Minkyu Kang wrote:
On 23 April 2012 10:47, Donghwa Lee dh09@samsung.com wrote:
This patches support drawing 32bpp bitmap TIZEN logo in exynos fb.
asm/arch/trats_logo.h data is compressed by zip and decomressed at
the exynos fb driver.
And vl_bpix of vidinfo_t is changed proper value for u-boot.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/trats_logo.h | 5070
+
board/samsung/trats/trats.c |2 +-
drivers/video/exynos_fb.c | 40 +-
drivers/video/exynos_fimd.c |6 +-
include/configs/trats.h |4 +-
5 files changed, 5116 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/trats_logo.h
diff --git a/arch/arm/include/asm/arch-exynos/trats_logo.h
b/arch/arm/include/asm/arch-exynos/trats_logo.h
new file mode 100644
index 000..a595abd
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/trats_logo.h
@@ -0,0 +1,5070 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * aint with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#defineTRATS_LOGO_WIDTH520
+#defineTRATS_LOGO_HEIGHT 120
+#defineTRATS_LOGO_BPP 32
+
+unsigned char trats_logo[]={
+};
trats logo?
I feel, it's a TIZEN logo maybe.
Also, Is it a board specific? then it should be moved to boards/samsung/trats/
Ok, I will change to TIZEN logo and move it to board/samsung/trats.
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index f9894b1..d067bb4 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -467,7 +467,7 @@ void init_panel_info(vidinfo_t *vid)
vid-vl_vsp = CONFIG_SYS_LOW;
vid-vl_dp = CONFIG_SYS_LOW;
- vid-vl_bpix= 32;
+ vid-vl_bpix= 5;
vid-dual_lcd_enabled = 0;
/* s6e8ax0 Panel */
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 0eb7f58..c111855 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -22,6 +22,7 @@
#include config.h
#include common.h
+#include malloc.h
#include lcd.h
#include asm/io.h
#include asm/arch/cpu.h
@@ -29,6 +30,7 @@
#include asm/arch/clk.h
#include asm/arch/mipi_dsim.h
#include asm/arch/system.h
+#include asm/arch/trats_logo.h
#include exynos_fb.h
@@ -52,7 +54,7 @@ static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t
*vid)
unsigned long palette_size;
unsigned int fb_size;
- fb_size = vid-vl_row * vid-vl_col * (vid-vl_bpix 3);
+ fb_size = vid-vl_row * vid-vl_col * (NBITS(vid-vl_bpix) 3);
lcd_base = lcdbase;
@@ -67,6 +69,38 @@ static void exynos_lcd_init(vidinfo_t *vid)
exynos_fimd_lcd_init(vid);
}
+static void draw_logo(void *lcdbase)
+{
+ int x, y;
+ unsigned int in_len, width, height;
+ unsigned long out_len =
+ (ARRAY_SIZE(trats_logo) * sizeof(*trats_logo)) + 1;
+ void *dst = NULL;
+
+ width = TRATS_LOGO_WIDTH;
+ height = TRATS_LOGO_HEIGHT;
NAK.
trats_logo and TRATS_* are board specific.
I will add logo size variable in the vidinfo_t structure.
+ x = ((panel_width - width) 1);
+ y = ((panel_height - height) 1) - 5;
+
+ in_len = width * height * 8;
+ dst = malloc(in_len);
+ if (dst == NULL) {
+ printf(Error: malloc in gunzip failed!\n);
+ return;
+ }
need space here.
+ if (gunzip(dst, in_len, (uchar *)trats_logo, out_len) != 0) {
+ free(dst);
+ return;
+ }
need space here.
Ok, I will fix it.
+ if (out_len == CONFIG_SYS_VIDEO_LOGO_MAX_SIZE)
need brace at this if statement.
And maybe it should be if (out_len = CONFIG_SYS_VIDEO_LOGO_MAX_SIZE) ?
+ printf(Image could be truncated
+(increase
CONFIG_SYS_VIDEO_LOGO_MAX_SIZE)!\n);
+
+ lcd_display_bitmap((ulong)dst, x, y
[U-Boot] [PATCH] EXYNOS: Change bits per pixel value proper for u-boot.
vl_bpix of vidinfo_t was changed proper value for u-boot.
It is used to multiple of 2 by using NBITS() macro.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
board/samsung/trats/trats.c |2 +-
drivers/video/exynos_fb.c |2 +-
drivers/video/exynos_fimd.c |6 +++---
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index f0775fd..3085de1 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -467,7 +467,7 @@ void init_panel_info(vidinfo_t *vid)
vid-vl_vsp = CONFIG_SYS_LOW;
vid-vl_dp = CONFIG_SYS_LOW;
- vid-vl_bpix= 32;
+ vid-vl_bpix= 5;
vid-dual_lcd_enabled = 0;
/* s6e8ax0 Panel */
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
index 0eb7f58..a1cf449 100644
--- a/drivers/video/exynos_fb.c
+++ b/drivers/video/exynos_fb.c
@@ -52,7 +52,7 @@ static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
unsigned long palette_size;
unsigned int fb_size;
- fb_size = vid-vl_row * vid-vl_col * (vid-vl_bpix 3);
+ fb_size = vid-vl_row * vid-vl_col * (NBITS(vid-vl_bpix) 3);
lcd_base = lcdbase;
diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c
index 2a60fcf..6416b90 100644
--- a/drivers/video/exynos_fimd.c
+++ b/drivers/video/exynos_fimd.c
@@ -110,7 +110,7 @@ static void exynos_fimd_set_buffer_address(unsigned int
win_id)
(struct exynos4_fb *)samsung_get_base_fimd();
start_addr = (unsigned long)lcd_base_addr;
- end_addr = start_addr + ((pvid-vl_col * (pvid-vl_bpix / 8)) *
+ end_addr = start_addr + ((pvid-vl_col * (NBITS(pvid-vl_bpix) / 8)) *
pvid-vl_row);
writel(start_addr, (unsigned int)fimd_ctrl-vidw00add0b0 +
@@ -331,7 +331,7 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
exynos_fimd_set_buffer_address(pvid-win_id);
/* set buffer size */
- cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid-vl_col * pvid-vl_bpix / 8);
+ cfg = EXYNOS_VIDADDR_PAGEWIDTH(pvid-vl_col * NBITS(pvid-vl_bpix) / 8);
writel(cfg, (unsigned int)fimd_ctrl-vidw00add2 +
EXYNOS_BUFFER_SIZE(pvid-win_id));
@@ -350,5 +350,5 @@ void exynos_fimd_lcd_init(vidinfo_t *vid)
unsigned long exynos_fimd_calc_fbsize(void)
{
- return pvid-vl_col * pvid-vl_row * (pvid-vl_bpix / 8);
+ return pvid-vl_col * pvid-vl_row * (NBITS(pvid-vl_bpix) / 8);
}
--
1.7.4.1
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Re: [U-Boot] [PATCH 2/2] EXYNOS: draw 32bpp bitmap TIZEN logo
Dear Wolfgang, On 23 April 2012 18:22, Wolfgang Denk wrote: Dear Donghwa Lee, In message 4f94b49e.5020...@samsung.com you wrote: This patches support drawing 32bpp bitmap TIZEN logo in exynos fb. asm/arch/trats_logo.h data is compressed by zip and decomressed at the exynos fb driver. And vl_bpix of vidinfo_t is changed proper value for u-boot. Signed-off-by: Donghwa Lee dh09@samsung.com Signed-off-by: Kyungmin park kyungmin.p...@samsung.com --- arch/arm/include/asm/arch-exynos/trats_logo.h | 5070 + board/samsung/trats/trats.c |2 +- drivers/video/exynos_fb.c | 40 +- drivers/video/exynos_fimd.c |6 +- include/configs/trats.h |4 +- 5 files changed, 5116 insertions(+), 6 deletions(-) create mode 100644 arch/arm/include/asm/arch-exynos/trats_logo.h diff --git a/arch/arm/include/asm/arch-exynos/trats_logo.h b/arch/arm/include/asm/arch-exynos/trats_logo.h new file mode 100644 index 000..a595abd --- /dev/null +++ b/arch/arm/include/asm/arch-exynos/trats_logo.h This is not a good location for the logo data. Either this is vendor specific, in which place it should go to the vendor directory, or it's board specific, in which case it should go into the board directory. In no case I want to have this in arch/arm/include/ thanks. Best regards, Wolfgang Denk Thank you for your comment. This logo data is TIZEN logo for TRATS board. Current TIZEN reference board is TRATS based on EXYNOS SoC. But, I don'know exactly any others boards that loaded TIZEN based on others SoC will be appeared in the future. So, I think this logo data is not board(TRATS) and vendor(EXYNOS) specific. So, I want to move this data in include/ How do you think about that? Plese tell me your opinions. Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] LCD: drawing 32bpp uncompressed bitmap image
This patch supports drawing 32bpp uncompressed bitmap image.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin.park kyungmin.p...@samsung.com
---
common/lcd.c | 26 ++
1 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/common/lcd.c b/common/lcd.c
index bf1a6a9..a7b04d2 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -645,14 +645,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
bpix = NBITS(panel_info.vl_bpix);
- if ((bpix != 1) (bpix != 8) (bpix != 16)) {
+ if ((bpix != 1) (bpix != 8) (bpix != 16) (bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix, bmp_bpix);
return 1;
}
/* We support displaying 8bpp BMPs on 16bpp LCDs */
- if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16)) {
+ if (bpix != bmp_bpix (bmp_bpix != 8 || bpix != 16 || bpix != 32)) {
printf (Error: %d bit/pixel mode, but BMP has %d bit/pixel\n,
bpix,
le16_to_cpu(bmp-header.bit_count));
@@ -669,7 +669,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
cmap = (ushort *)fbi-palette;
#elif defined(CONFIG_MPC823)
cmap = (ushort *)(cp-lcd_cmap[255*sizeof(ushort)]);
-#elif !defined(CONFIG_ATMEL_LCD)
+#elif !defined(CONFIG_ATMEL_LCD) !defined(CONFIG_EXYNOS_FB)
cmap = panel_info.cmap;
#endif
@@ -739,8 +739,14 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
height = panel_info.vl_row - y;
bmap = (uchar *)bmp + le32_to_cpu (bmp-header.data_offset);
+
+#ifndef CONFIG_EXYNOS_FB
fb = (uchar *) (lcd_base +
(y + height - 1) * lcd_line_length + x * bpix / 8);
+#else
+ fb = (uchar *) (lcd_base + (y + height) *
+ (panel_info.vl_col * (bpix / 8)) + x * (bpix / 8));
+#endif
switch (bmp_bpix) {
case 1: /* pass through */
@@ -788,9 +794,21 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
bmap += (padded_line - width) * 2;
fb -= (width * 2 + lcd_line_length);
}
+
break;
#endif /* CONFIG_BMP_16BPP */
-
+ case 32:
+ for (i = 0; i height; ++i) {
+ for (j = 0; j width; j++) {
+ *(fb++) = *(bmap++);
+ *(fb++) = *(bmap++);
+ *(fb++) = *(bmap++);
+ *(fb++) = *(bmap++);
+ }
+ fb -= ((panel_info.vl_col *
+ (bpix / 8)) + width * (bpix / 8));
+ }
+ break;
default:
break;
};
--
1.7.4.1
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[U-Boot] Question about toots/bmp_logo.c
Hi, I have some questions about tools/bmp_logo.c that converts from *.bmp to include/bmp_logo* header files. I think bmp_logo.c can't support various *.bmp files becuase it uses bmp_logo_palette[] that limited size to 240. It seems to assumed working with an 8-bits files. When image files have so many colors, maybe I think bmp_logo_palette[] cannot be used. Now I am working in order to convert bmp files that have colors more than 240 to data header files. I think it can't use palette, so I want to create new files can convert from .bmp to data header. What do you think about it? Does it can be merged in u-boot mainline? Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/7] EXYNOS: support display drivers
This patch support EXYNOS display drivers including Framebuffer and MIPI DSI interface. [PATCH 1/7] EXYNOS: definitions of system resgister and power management registers. [PATCH 2/7] EXYNOS: add LCD and MIPI DSI clock interface. [PATCH 3/7] LCD: add data structure for EXYNOS display driver [PATCH 4/7] EXYNOS: support EXYNOS framebuffer and FIMD display drivers. [PATCH 5/7] EXYNOS: support EXYNOS MIPI DSI interface driver. [PATCH 6/7] LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI. [PATCH 7/7] EXYNOS: support TRATS board display function Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/7] EXYNOS: definitions of system resgister and power management registers.
This is definitions of system registers and power mananagement registers for
EXYNOS SoC.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
arch/arm/cpu/armv7/exynos/Makefile|2 +-
arch/arm/cpu/armv7/exynos/power.c | 54 +
arch/arm/cpu/armv7/exynos/system.c| 48 +
arch/arm/include/asm/arch-exynos/cpu.h|5 +++
arch/arm/include/asm/arch-exynos/power.h |6 +++
arch/arm/include/asm/arch-exynos/system.h | 53
6 files changed, 167 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/armv7/exynos/power.c
create mode 100644 arch/arm/cpu/armv7/exynos/system.c
create mode 100644 arch/arm/include/asm/arch-exynos/system.h
diff --git a/arch/arm/cpu/armv7/exynos/Makefile
b/arch/arm/cpu/armv7/exynos/Makefile
index 124c380..90ec2bd 100644
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS += clock.o soc.o
+COBJS += clock.o power.o soc.o system.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/exynos/power.c
b/arch/arm/cpu/armv7/exynos/power.c
new file mode 100644
index 000..af7aecf
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/power.h
+
+static void exynos4_mipi_phy_control(unsigned int enable,
+ unsigned int dev_index)
+{
+ struct exynos4_power *pmu =
+ (struct exynos4_power *)samsung_get_base_power();
+ unsigned int addr, cfg = 0;
+
+ if (dev_index 1)
+ addr = (unsigned int)pmu-mipi_phy0_control;
+ else
+ addr = (unsigned int)pmu-mipi_phy1_control;
+
+
+ cfg = readl(addr);
+ if (enable)
+ cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+ else
+ cfg = ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+
+ writel(cfg, addr);
+}
+
+void set_mipi_phy_ctrl(unsigned int enable, unsigned int dev_index)
+{
+ if (cpu_is_exynos4())
+ exynos4_mipi_phy_control(enable, dev_index);
+}
diff --git a/arch/arm/cpu/armv7/exynos/system.c
b/arch/arm/cpu/armv7/exynos/system.c
new file mode 100644
index 000..6c34730
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/system.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/system.h
+
+static void exynos4_set_system_display(void)
+{
+ struct exynos4_sysreg *sysreg =
+ (struct exynos4_sysreg *)samsung_get_base_sysreg();
+ unsigned int cfg = 0;
+
+ /*
+* system register path set
+* 0: MIE/MDNIE
+* 1: FIMD Bypass
+*/
+ cfg = readl(sysreg-display_ctrl);
+ cfg |= (1 1);
+ writel(cfg, sysreg-display_ctrl);
+}
+
+void set_system_display_ctrl(void)
+{
+ if (cpu_is_exynos4())
+ exynos4_set_system_display
[U-Boot] [PATCH 2/7] EXYNOS: add LCD and MIPI DSI clock interface.
To sets up lcd and mipi clock in EXYNOS display driver, added clock interface.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 184
arch/arm/include/asm/arch-exynos/clk.h |3 +
2 files changed, 187 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 2f7048b..330bd75 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -414,6 +414,170 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* get_lcd_clk: return lcd clock frequency */
+static unsigned long exynos4_get_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long pclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL [3:0]
+*/
+ sel = readl(clk-src_lcd0);
+ sel = sel 0xf;
+
+ /*
+* 0x6: SCLK_MPLL
+* 0x7: SCLK_EPLL
+* 0x8: SCLK_VPLL
+*/
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+*/
+ ratio = readl(clk-div_lcd0);
+ ratio = ratio 0xf;
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
+void exynos4_set_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /*
+* CLK_GATE_BLOCK
+* CLK_CAM [0]
+* CLK_TV [1]
+* CLK_MFC [2]
+* CLK_G3D [3]
+* CLK_LCD0 [4]
+* CLK_LCD1 [5]
+* CLK_GPS [7]
+*/
+ cfg = readl(clk-gate_block);
+ cfg |= 1 4;
+ writel(cfg, clk-gate_block);
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL[3:0]
+* MDNIE0_SEL [7:4]
+* MDNIE_PWM0_SEL [8:11]
+* MIPI0_SEL[12:15]
+* set lcd0 src clock 0x6: SCLK_MPLL
+*/
+ cfg = readl(clk-src_lcd0);
+ cfg = ~(0xf);
+ cfg |= 0x6;
+ writel(cfg, clk-src_lcd0);
+
+ /*
+* CLK_GATE_IP_LCD0
+* CLK_FIMD0[0]
+* CLK_MIE0 [1]
+* CLK_MDNIE0 [2]
+* CLK_DSIM0[3]
+* CLK_SMMUFIMD0[4]
+* CLK_PPMULCD0 [5]
+* Gating all clocks for FIMD0
+*/
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 0;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+* MDNIE0_RATIO [7:4]
+* MDNIE_PWM0_RATIO [11:8]
+* MDNIE_PWM_PRE_RATIO [15:12]
+* MIPI0_RATIO [19:16]
+* MIPI0_PRE_RATIO [23:20]
+* set fimd ratio
+*/
+ cfg = ~(0xf);
+ cfg |= 0x1;
+ writel(cfg, clk-div_lcd0);
+}
+
+void exynos4_set_mipi_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL[3:0]
+* MDNIE0_SEL [7:4]
+* MDNIE_PWM0_SEL [8:11]
+* MIPI0_SEL[12:15]
+* set mipi0 src clock 0x6: SCLK_MPLL
+*/
+ cfg = readl(clk-src_lcd0);
+ cfg = ~(0xf 12);
+ cfg |= (0x6 12);
+ writel(cfg, clk-src_lcd0);
+
+ /*
+* CLK_SRC_MASK_LCD0
+* FIMD0_MASK [0]
+* MDNIE0_MASK [4]
+* MDNIE_PWM0_MASK [8]
+* MIPI0_MASK [12]
+* set src mask mipi0 0x1: Unmask
+*/
+ cfg = readl(clk-src_mask_lcd0);
+ cfg |= (0x1 12);
+ writel(cfg, clk-src_mask_lcd0);
+
+ /*
+* CLK_GATE_IP_LCD0
+* CLK_FIMD0[0]
+* CLK_MIE0 [1]
+* CLK_MDNIE0 [2]
+* CLK_DSIM0[3]
+* CLK_SMMUFIMD0[4]
+* CLK_PPMULCD0 [5]
+* Gating all clocks for MIPI0
+*/
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 3;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+* MDNIE0_RATIO [7:4]
+* MDNIE_PWM0_RATIO [11:8]
+* MDNIE_PWM_PRE_RATIO [15:12]
+* MIPI0_RATIO [19:16]
+* MIPI0_PRE_RATIO [23:20]
+* set mipi ratio
+*/
+ cfg = ~(0xf 16
[U-Boot] [PATCH 3/7] LCD: add data structure for EXYNOS display driver
Add vidinfo data structure for EXYNOS display driver
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
include/lcd.h | 64 +
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/include/lcd.h b/include/lcd.h
index d95feeb..3d9ef16 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -183,6 +183,70 @@ typedef struct vidinfo {
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
+#elif defined(CONFIG_EXYNOS_FB)
+
+enum {
+ FIMD_RGB_INTERFACE = 1,
+ FIMD_CPU_INTERFACE = 2,
+};
+
+typedef struct vidinfo {
+ ushort vl_col; /* Number of columns (i.e. 640) */
+ ushort vl_row; /* Number of rows (i.e. 480) */
+ ushort vl_width;/* Width of display area in millimeters */
+ ushort vl_height; /* Height of display area in millimeters */
+
+ /* LCD configuration register */
+ u_char vl_freq; /* Frequency */
+ u_char vl_clkp; /* Clock polarity */
+ u_char vl_oep; /* Output Enable polarity */
+ u_char vl_hsp; /* Horizontal Sync polarity */
+ u_char vl_vsp; /* Vertical Sync polarity */
+ u_char vl_dp; /* Data polarity */
+ u_char vl_bpix; /* Bits per pixel */
+
+ /* Horizontal control register. Timing from data sheet */
+ u_char vl_hspw; /* Horz sync pulse width */
+ u_char vl_hfpd; /* Wait before of line */
+ u_char vl_hbpd; /* Wait end of line */
+
+ /* Vertical control register. */
+ u_char vl_vspw;/* Vertical sync pulse width */
+ u_char vl_vfpd;/* Wait before of frame */
+ u_char vl_vbpd;/* Wait end of frame */
+ u_char vl_cmd_allow_len; /* Wait end of frame */
+
+ void (*cfg_gpio)(void);
+ void (*backlight_on)(unsigned int onoff);
+ void (*reset_lcd)(void);
+ void (*lcd_power_on)(void);
+ void (*cfg_ldo)(void);
+ void (*enable_ldo)(unsigned int onoff);
+ void (*mipi_power)(void);
+ void (*backlight_reset)(void);
+
+ unsigned int win_id;
+ unsigned int init_delay;
+ unsigned int power_on_delay;
+ unsigned int reset_delay;
+ unsigned int interface_mode;
+ unsigned int mipi_enabled;
+ unsigned int cs_setup;
+ unsigned int wr_setup;
+ unsigned int wr_act;
+ unsigned int wr_hold;
+
+ /* parent clock name(MPLL, EPLL or VPLL) */
+ unsigned int pclk_name;
+ /* ratio value for source clock from parent clock. */
+ unsigned int sclk_div;
+
+ unsigned int dual_lcd_enabled;
+
+} vidinfo_t;
+
+void init_panel_info(vidinfo_t *vid);
+
#else
typedef struct vidinfo {
--
1.7.4.1
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[U-Boot] [PATCH 4/7] EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
This patch support EXYNOS FB and FIMD display drivers.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
arch/arm/include/asm/arch-exynos/fb.h | 446 +
drivers/video/Makefile|4 +
drivers/video/exynos_fb.c | 129 ++
drivers/video/exynos_fb.h | 61 +
drivers/video/exynos_fimd.c | 354 ++
5 files changed, 994 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/fb.h
create mode 100644 drivers/video/exynos_fb.c
create mode 100644 drivers/video/exynos_fb.h
create mode 100644 drivers/video/exynos_fimd.c
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
new file mode 100644
index 000..b10b0da
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -0,0 +1,446 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * aint with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_FB_H_
+#define __ASM_ARM_ARCH_FB_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_fb {
+ unsigned int vidcon0;
+ unsigned int vidcon1;
+ unsigned int vidcon2;
+ unsigned int vidcon3;
+ unsigned int vidtcon0;
+ unsigned int vidtcon1;
+ unsigned int vidtcon2;
+ unsigned int vidtcon3;
+ unsigned int wincon0;
+ unsigned int wincon1;
+ unsigned int wincon2;
+ unsigned int wincon3;
+ unsigned int wincon4;
+
+ unsigned int winshmap;
+ unsigned int res1;
+
+ unsigned int winchmap2;
+ unsigned int vidosd0a;
+ unsigned int vidosd0b;
+ unsigned int vidosd0c;
+ unsigned int res2;
+
+ unsigned int vidosd1a;
+ unsigned int vidosd1b;
+ unsigned int vidosd1c;
+ unsigned int vidosd1d;
+
+ unsigned int vidosd2a;
+ unsigned int vidosd2b;
+ unsigned int vidosd2c;
+ unsigned int vidosd2d;
+
+ unsigned int vidosd3a;
+ unsigned int vidosd3b;
+ unsigned int vidosd3c;
+ unsigned int res3;
+
+ unsigned int vidosd4a;
+ unsigned int vidosd4b;
+ unsigned int vidosd4c;
+ unsigned int res4[5];
+
+ unsigned int vidw00add0b0;
+ unsigned int vidw00add0b1;
+ unsigned int vidw01add0b0;
+ unsigned int vidw01add0b1;
+
+ unsigned int vidw02add0b0;
+ unsigned int vidw02add0b1;
+ unsigned int vidw03add0b0;
+ unsigned int vidw03add0b1;
+ unsigned int vidw04add0b0;
+ unsigned int vidw04add0b1;
+ unsigned int res5[2];
+
+ unsigned int vidw00add1b0;
+ unsigned int vidw00add1b1;
+ unsigned int vidw01add1b0;
+ unsigned int vidw01add1b1;
+
+ unsigned int vidw02add1b0;
+ unsigned int vidw02add1b1;
+ unsigned int vidw03add1b0;
+ unsigned int vidw03add1b1;
+
+ unsigned int vidw04add1b0;
+ unsigned int vidw04add1b1;
+ unsigned int res7[2];
+
+ unsigned int vidw00add2;
+ unsigned int vidw01add2;
+ unsigned int vidw02add2;
+ unsigned int vidw03add2;
+ unsigned int vidw04add2;
+ unsigned int res8[7];
+
+ unsigned int vidintcon0;
+ unsigned int vidintcon1;
+ unsigned int res9[1];
+
+ unsigned int w1keycon0;
+ unsigned int w1keycon1;
+ unsigned int w2keycon0;
+ unsigned int w2keycon1;
+ unsigned int w3keycon0;
+ unsigned int w3keycon1;
+ unsigned int w4keycon0;
+ unsigned int w4keycon1;
+
+ unsigned int w1keyalpha;
+ unsigned int w2keyalpha;
+ unsigned int w3keyalpha;
+ unsigned int w4keyalpha;
+
+ unsigned int dithmode;
+ unsigned int res10[2];
+
+ unsigned int win0map;
+ unsigned int win1map;
+ unsigned int win2map;
+ unsigned int win3map;
+ unsigned int win4map;
+ unsigned int res11[1];
+
+ unsigned int wpalcon_h;
+ unsigned int wpalcon_l;
+
+ unsigned int trigcon;
+ unsigned int res12[2];
+
+ unsigned int i80ifcona0;
+ unsigned int i80ifcona1;
+ unsigned int i80ifconb0;
+ unsigned int i80ifconb1
[U-Boot] [PATCH 6/7] LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI.
This patch support S6E8AX0 amoled driver based on EXYNOS MIPI DSI interface.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
drivers/video/s6e8ax0.c | 289 +++
1 files changed, 289 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/s6e8ax0.c
diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c
new file mode 100644
index 000..364e137
--- /dev/null
+++ b/drivers/video/s6e8ax0.c
@@ -0,0 +1,289 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Author: Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include lcd.h
+#include asm/errno.h
+#include asm/arch/dsim.h
+#include asm/arch/mipi_dsim.h
+#include asm/arch/power.h
+#include asm/arch/cpu.h
+#include linux/types.h
+#include linux/list.h
+
+#include exynos_mipi_dsi_lowlevel.h
+#include exynos_mipi_dsi_common.h
+
+#define DSIM_PM_STABLE_TIME(10)
+#define MIN_BRIGHTNESS (0)
+#define MAX_BRIGHTNESS (10)
+
+#define lcd_to_master(a) (a-dsim_dev-master)
+#define lcd_to_master_ops(a) ((lcd_to_master(a))-master_ops)
+
+enum {
+ DSIM_NONE_STATE = 0,
+ DSIM_RESUME_COMPLETE = 1,
+ DSIM_FRAME_DONE = 2,
+};
+
+struct s6e8ax0 {
+ unsigned intpower;
+ unsigned intupdated;
+ unsigned intgamma;
+ unsigned intresume_complete;
+
+ struct mipi_dsim_lcd_device *lcd_dev;
+ struct lcd_platform_data*ddi_pd;
+};
+
+static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+
+ const unsigned char data_to_send[] = {
+ 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
+ 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
+ 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
+ 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
+ 0xff, 0xff, 0xc8
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+
+ const unsigned char data_to_send[] = {
+ 0xf2, 0x80, 0x03, 0x0d
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send,
+ ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+
+ /* 7500K 2.2 Set (M3, 300cd) */
+ const unsigned char data_to_send[] = {
+ 0xfa, 0x01, 0x0f, 0x00, 0x0f, 0xda, 0xc0, 0xe4, 0xc8,
+ 0xc8, 0xc6, 0xd3, 0xd6, 0xd0, 0xab, 0xb2, 0xa6, 0xbf,
+ 0xc2, 0xb9, 0x00, 0x93, 0x00, 0x86, 0x00, 0xd1
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send,
+ ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xf7, 0x3);
+}
+
+static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+
+ const unsigned char data_to_send[] = {
+ 0xf6, 0x00, 0x02, 0x00
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send,
+ ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+
+ const unsigned char data_to_send[] = {
+ 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
+ 0x00
+ };
+
+ ops-cmd_write(dsim_dev
[U-Boot] [PATCH 7/7] EXYNOS: support TRATS board display function
This patch support TRATS board configuration and display function.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
board/samsung/trats/trats.c | 147 +++
include/configs/trats.h |8 +++
2 files changed, 155 insertions(+), 0 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index a7b4e4a..a6861e1 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -2,6 +2,7 @@
* Copyright (C) 2011 Samsung Electronics
* Heungjun Kim riverful@samsung.com
* Kyungmin Park kyungmin.p...@samsung.com
+ * Donghwa Lee dh09@samsung.com
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -22,12 +23,15 @@
* MA 02111-1307 USA
*/
+#include lcd.h
#include common.h
#include asm/io.h
#include asm/arch/cpu.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
#include asm/arch/clock.h
+#include asm/arch/clk.h
+#include asm/arch/mipi_dsim.h
#include asm/arch/watchdog.h
#include asm/arch/power.h
#include pmic.h
@@ -357,3 +361,146 @@ int board_early_init_f(void)
return 0;
}
+
+static void lcd_reset(void)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+
+ s5p_gpio_direction_output(gpio2-y4, 5, 1);
+ udelay(1);
+ s5p_gpio_direction_output(gpio2-y4, 5, 0);
+ udelay(1);
+ s5p_gpio_direction_output(gpio2-y4, 5, 1);
+}
+
+static int lcd_power(void)
+{
+ int ret = 0;
+ struct pmic *p = get_pmic();
+
+ if (pmic_probe(p))
+ return -1;
+
+ /* LDO15 voltage: 2.2v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO15CTRL, 0x1c | EN_LDO);
+ /* LDO13 voltage: 3.0v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO13CTRL, 0x2c | EN_LDO);
+
+ if (ret) {
+ puts(MAX8997 LDO setting error!\n);
+ return -1;
+ }
+
+ return 0;
+}
+
+static struct mipi_dsim_config dsim_config = {
+ .e_interface= DSIM_VIDEO,
+ .e_virtual_ch = DSIM_VIRTUAL_CH_0,
+ .e_pixel_format = DSIM_24BPP_888,
+ .e_burst_mode = DSIM_BURST_SYNC_EVENT,
+ .e_no_data_lane = DSIM_DATA_LANE_4,
+ .e_byte_clk = DSIM_PLL_OUT_DIV8,
+ .hfp= 1,
+
+ .p = 3,
+ .m = 120,
+ .s = 1,
+
+ /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
+ .pll_stable_time= 500,
+
+ /* escape clk : 10MHz */
+ .esc_clk= 20 * 100,
+
+ /* stop state holding counter after bta change count 0 ~ 0xfff */
+ .stop_holding_cnt = 0x7ff,
+ /* bta timeout 0 ~ 0xff */
+ .bta_timeout= 0xff,
+ /* lp rx timeout 0 ~ 0x */
+ .rx_timeout = 0x,
+};
+
+static struct exynos_platform_mipi_dsim s6e8ax0_platform_data = {
+ .lcd_panel_info = NULL,
+ .dsim_config = dsim_config,
+};
+
+static struct mipi_dsim_lcd_device mipi_lcd_device = {
+ .name = s6e8ax0,
+ .id = -1,
+ .bus_id = 0,
+ .platform_data = (void *)s6e8ax0_platform_data,
+};
+
+static int mipi_power(void)
+{
+ int ret = 0;
+ struct pmic *p = get_pmic();
+
+ if (pmic_probe(p))
+ return -1;
+
+ /* LDO3 voltage: 1.1v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, 0x6 | EN_LDO);
+ /* LDO4 voltage: 1.8v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO4CTRL, 0x14 | EN_LDO);
+
+ if (ret) {
+ puts(MAX8997 LDO setting error!\n);
+ return -1;
+ }
+
+ return 0;
+}
+
+void init_panel_info(vidinfo_t *vid)
+{
+ vid-vl_freq= 60;
+ vid-vl_col = 720;
+ vid-vl_row = 1280;
+ vid-vl_width = 720;
+ vid-vl_height = 1280;
+ vid-vl_clkp= CONFIG_SYS_HIGH;
+ vid-vl_hsp = CONFIG_SYS_LOW;
+ vid-vl_vsp = CONFIG_SYS_LOW;
+ vid-vl_dp = CONFIG_SYS_LOW;
+
+ vid-vl_bpix= 32;
+ vid-dual_lcd_enabled = 0;
+
+ /* s6e8ax0 Panel */
+ vid-vl_hspw= 5;
+ vid-vl_hbpd= 10;
+ vid-vl_hfpd= 10;
+
+ vid-vl_vspw= 2;
+ vid-vl_vbpd= 1;
+ vid-vl_vfpd= 13;
+ vid-vl_cmd_allow_len = 0xf;
+
+ vid-win_id = 3;
+ vid-cfg_gpio = NULL;
+ vid-backlight_on = NULL;
+ vid-lcd_power_on = NULL; /* lcd_power_on in mipi dsi driver */
+ vid-reset_lcd = lcd_reset;
+
+ vid-init_delay = 0;
+ vid-power_on_delay = 0;
+ vid-reset_delay = 0;
+ vid-interface_mode = FIMD_RGB_INTERFACE;
+ vid-mipi_enabled = 1;
+
+ strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name
Re: [U-Boot] [PATCH 7/7] EXYNOS: support TRATS board display function
Thank you for your comment. I will fix all this patch according to your comments and send version2. Thank you, Donghwa Lee On Fri, 06 Apr 2012 08:44, Anatolij Gustschin wrote: Hi, On Thu, 05 Apr 2012 15:29:34 +0900 Donghwa Lee dh09@samsung.com wrote: This patch support TRATS board configuration and display function. Signed-off-by: Donghwa Lee dh09@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com Signed-off-by: Inki Dae inki@samsung.com --- board/samsung/trats/trats.c | 147 +++ include/configs/trats.h |8 +++ 2 files changed, 155 insertions(+), 0 deletions(-) diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c index a7b4e4a..a6861e1 100644 --- a/board/samsung/trats/trats.c +++ b/board/samsung/trats/trats.c ... @@ -22,12 +23,15 @@ * MA 02111-1307 USA */ +#include lcd.h Please put this lcd.h include after '#include common.h'. Otherwise the code is broken. lcd.h expects some macros defined elsewhere and these definitions will be included in common.h. #include common.h Thanks, Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 0/7] EXYNOS: support display drivers
This patch support EXYNOS display drivers including Framebuffer and MIPI DSI interface version 2. [PATCH v2 1/7] EXYNOS: definitions of system resgister and power management registers. [PATCH v2 2/7] EXYNOS: add LCD and MIPI DSI clock interface. [PATCH v2 3/7] LCD: add data structure for EXYNOS display driver [PATCH v2 4/7] EXYNOS: support EXYNOS framebuffer and FIMD display drivers. [PATCH v2 5/7] EXYNOS: support EXYNOS MIPI DSI interface driver. [PATCH v2 6/7] LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI. [PATCH v2 7/7] EXYNOS: support TRATS board display function change of v1: - modify minor issues(code style, remove compiler warnings, and so on) Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 1/7] EXYNOS: definitions of system resgister and power management registers.
This is definitions of system registers and power mananagement registers for
EXYNOS SoC.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
arch/arm/cpu/armv7/exynos/Makefile|2 +-
arch/arm/cpu/armv7/exynos/power.c | 54 +
arch/arm/cpu/armv7/exynos/system.c| 48 +
arch/arm/include/asm/arch-exynos/cpu.h|5 +++
arch/arm/include/asm/arch-exynos/power.h |6 +++
arch/arm/include/asm/arch-exynos/system.h | 53
6 files changed, 167 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/armv7/exynos/power.c
create mode 100644 arch/arm/cpu/armv7/exynos/system.c
create mode 100644 arch/arm/include/asm/arch-exynos/system.h
diff --git a/arch/arm/cpu/armv7/exynos/Makefile
b/arch/arm/cpu/armv7/exynos/Makefile
index 124c380..90ec2bd 100644
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS += clock.o soc.o
+COBJS += clock.o power.o soc.o system.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/exynos/power.c
b/arch/arm/cpu/armv7/exynos/power.c
new file mode 100644
index 000..7e77094
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/power.h
+
+static void exynos4_mipi_phy_control(unsigned int dev_index,
+ unsigned int enable)
+{
+ struct exynos4_power *pmu =
+ (struct exynos4_power *)samsung_get_base_power();
+ unsigned int addr, cfg = 0;
+
+ if (dev_index == 0)
+ addr = (unsigned int)pmu-mipi_phy0_control;
+ else
+ addr = (unsigned int)pmu-mipi_phy1_control;
+
+
+ cfg = readl(addr);
+ if (enable)
+ cfg |= (EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+ else
+ cfg = ~(EXYNOS_MIPI_PHY_MRESETN | EXYNOS_MIPI_PHY_ENABLE);
+
+ writel(cfg, addr);
+}
+
+void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable)
+{
+ if (cpu_is_exynos4())
+ exynos4_mipi_phy_control(dev_index, enable);
+}
diff --git a/arch/arm/cpu/armv7/exynos/system.c
b/arch/arm/cpu/armv7/exynos/system.c
new file mode 100644
index 000..6c34730
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/system.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/system.h
+
+static void exynos4_set_system_display(void)
+{
+ struct exynos4_sysreg *sysreg =
+ (struct exynos4_sysreg *)samsung_get_base_sysreg();
+ unsigned int cfg = 0;
+
+ /*
+* system register path set
+* 0: MIE/MDNIE
+* 1: FIMD Bypass
+*/
+ cfg = readl(sysreg-display_ctrl);
+ cfg |= (1 1);
+ writel(cfg, sysreg-display_ctrl);
+}
+
+void set_system_display_ctrl(void)
+{
+ if (cpu_is_exynos4())
+ exynos4_set_system_display
[U-Boot] [PATCH v2 2/7] EXYNOS: add LCD and MIPI DSI clock interface.
To sets up lcd and mipi clock in EXYNOS display driver, added clock interface.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 184
arch/arm/include/asm/arch-exynos/clk.h |3 +
2 files changed, 187 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 2f7048b..330bd75 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -414,6 +414,170 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* get_lcd_clk: return lcd clock frequency */
+static unsigned long exynos4_get_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long pclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL [3:0]
+*/
+ sel = readl(clk-src_lcd0);
+ sel = sel 0xf;
+
+ /*
+* 0x6: SCLK_MPLL
+* 0x7: SCLK_EPLL
+* 0x8: SCLK_VPLL
+*/
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+*/
+ ratio = readl(clk-div_lcd0);
+ ratio = ratio 0xf;
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
+void exynos4_set_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /*
+* CLK_GATE_BLOCK
+* CLK_CAM [0]
+* CLK_TV [1]
+* CLK_MFC [2]
+* CLK_G3D [3]
+* CLK_LCD0 [4]
+* CLK_LCD1 [5]
+* CLK_GPS [7]
+*/
+ cfg = readl(clk-gate_block);
+ cfg |= 1 4;
+ writel(cfg, clk-gate_block);
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL[3:0]
+* MDNIE0_SEL [7:4]
+* MDNIE_PWM0_SEL [8:11]
+* MIPI0_SEL[12:15]
+* set lcd0 src clock 0x6: SCLK_MPLL
+*/
+ cfg = readl(clk-src_lcd0);
+ cfg = ~(0xf);
+ cfg |= 0x6;
+ writel(cfg, clk-src_lcd0);
+
+ /*
+* CLK_GATE_IP_LCD0
+* CLK_FIMD0[0]
+* CLK_MIE0 [1]
+* CLK_MDNIE0 [2]
+* CLK_DSIM0[3]
+* CLK_SMMUFIMD0[4]
+* CLK_PPMULCD0 [5]
+* Gating all clocks for FIMD0
+*/
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 0;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+* MDNIE0_RATIO [7:4]
+* MDNIE_PWM0_RATIO [11:8]
+* MDNIE_PWM_PRE_RATIO [15:12]
+* MIPI0_RATIO [19:16]
+* MIPI0_PRE_RATIO [23:20]
+* set fimd ratio
+*/
+ cfg = ~(0xf);
+ cfg |= 0x1;
+ writel(cfg, clk-div_lcd0);
+}
+
+void exynos4_set_mipi_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL[3:0]
+* MDNIE0_SEL [7:4]
+* MDNIE_PWM0_SEL [8:11]
+* MIPI0_SEL[12:15]
+* set mipi0 src clock 0x6: SCLK_MPLL
+*/
+ cfg = readl(clk-src_lcd0);
+ cfg = ~(0xf 12);
+ cfg |= (0x6 12);
+ writel(cfg, clk-src_lcd0);
+
+ /*
+* CLK_SRC_MASK_LCD0
+* FIMD0_MASK [0]
+* MDNIE0_MASK [4]
+* MDNIE_PWM0_MASK [8]
+* MIPI0_MASK [12]
+* set src mask mipi0 0x1: Unmask
+*/
+ cfg = readl(clk-src_mask_lcd0);
+ cfg |= (0x1 12);
+ writel(cfg, clk-src_mask_lcd0);
+
+ /*
+* CLK_GATE_IP_LCD0
+* CLK_FIMD0[0]
+* CLK_MIE0 [1]
+* CLK_MDNIE0 [2]
+* CLK_DSIM0[3]
+* CLK_SMMUFIMD0[4]
+* CLK_PPMULCD0 [5]
+* Gating all clocks for MIPI0
+*/
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 3;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+* MDNIE0_RATIO [7:4]
+* MDNIE_PWM0_RATIO [11:8]
+* MDNIE_PWM_PRE_RATIO [15:12]
+* MIPI0_RATIO [19:16]
+* MIPI0_PRE_RATIO [23:20]
+* set mipi ratio
+*/
+ cfg = ~(0xf 16
[U-Boot] [PATCH v2 3/7] LCD: add data structure for EXYNOS display driver
Add vidinfo data structure for EXYNOS display driver
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
include/lcd.h | 64 +
1 files changed, 64 insertions(+), 0 deletions(-)
diff --git a/include/lcd.h b/include/lcd.h
index d95feeb..3d9ef16 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -183,6 +183,70 @@ typedef struct vidinfo {
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
+#elif defined(CONFIG_EXYNOS_FB)
+
+enum {
+ FIMD_RGB_INTERFACE = 1,
+ FIMD_CPU_INTERFACE = 2,
+};
+
+typedef struct vidinfo {
+ ushort vl_col; /* Number of columns (i.e. 640) */
+ ushort vl_row; /* Number of rows (i.e. 480) */
+ ushort vl_width;/* Width of display area in millimeters */
+ ushort vl_height; /* Height of display area in millimeters */
+
+ /* LCD configuration register */
+ u_char vl_freq; /* Frequency */
+ u_char vl_clkp; /* Clock polarity */
+ u_char vl_oep; /* Output Enable polarity */
+ u_char vl_hsp; /* Horizontal Sync polarity */
+ u_char vl_vsp; /* Vertical Sync polarity */
+ u_char vl_dp; /* Data polarity */
+ u_char vl_bpix; /* Bits per pixel */
+
+ /* Horizontal control register. Timing from data sheet */
+ u_char vl_hspw; /* Horz sync pulse width */
+ u_char vl_hfpd; /* Wait before of line */
+ u_char vl_hbpd; /* Wait end of line */
+
+ /* Vertical control register. */
+ u_char vl_vspw;/* Vertical sync pulse width */
+ u_char vl_vfpd;/* Wait before of frame */
+ u_char vl_vbpd;/* Wait end of frame */
+ u_char vl_cmd_allow_len; /* Wait end of frame */
+
+ void (*cfg_gpio)(void);
+ void (*backlight_on)(unsigned int onoff);
+ void (*reset_lcd)(void);
+ void (*lcd_power_on)(void);
+ void (*cfg_ldo)(void);
+ void (*enable_ldo)(unsigned int onoff);
+ void (*mipi_power)(void);
+ void (*backlight_reset)(void);
+
+ unsigned int win_id;
+ unsigned int init_delay;
+ unsigned int power_on_delay;
+ unsigned int reset_delay;
+ unsigned int interface_mode;
+ unsigned int mipi_enabled;
+ unsigned int cs_setup;
+ unsigned int wr_setup;
+ unsigned int wr_act;
+ unsigned int wr_hold;
+
+ /* parent clock name(MPLL, EPLL or VPLL) */
+ unsigned int pclk_name;
+ /* ratio value for source clock from parent clock. */
+ unsigned int sclk_div;
+
+ unsigned int dual_lcd_enabled;
+
+} vidinfo_t;
+
+void init_panel_info(vidinfo_t *vid);
+
#else
typedef struct vidinfo {
--
1.7.4.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 4/7] EXYNOS: support EXYNOS framebuffer and FIMD display drivers.
This patch support EXYNOS FB and FIMD display drivers.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
arch/arm/include/asm/arch-exynos/fb.h | 446 +
drivers/video/Makefile|1 +
drivers/video/exynos_fb.c | 128 ++
drivers/video/exynos_fb.h | 61 +
drivers/video/exynos_fimd.c | 354 ++
5 files changed, 990 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/fb.h
create mode 100644 drivers/video/exynos_fb.c
create mode 100644 drivers/video/exynos_fb.h
create mode 100644 drivers/video/exynos_fimd.c
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
new file mode 100644
index 000..b10b0da
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -0,0 +1,446 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * aint with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_FB_H_
+#define __ASM_ARM_ARCH_FB_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_fb {
+ unsigned int vidcon0;
+ unsigned int vidcon1;
+ unsigned int vidcon2;
+ unsigned int vidcon3;
+ unsigned int vidtcon0;
+ unsigned int vidtcon1;
+ unsigned int vidtcon2;
+ unsigned int vidtcon3;
+ unsigned int wincon0;
+ unsigned int wincon1;
+ unsigned int wincon2;
+ unsigned int wincon3;
+ unsigned int wincon4;
+
+ unsigned int winshmap;
+ unsigned int res1;
+
+ unsigned int winchmap2;
+ unsigned int vidosd0a;
+ unsigned int vidosd0b;
+ unsigned int vidosd0c;
+ unsigned int res2;
+
+ unsigned int vidosd1a;
+ unsigned int vidosd1b;
+ unsigned int vidosd1c;
+ unsigned int vidosd1d;
+
+ unsigned int vidosd2a;
+ unsigned int vidosd2b;
+ unsigned int vidosd2c;
+ unsigned int vidosd2d;
+
+ unsigned int vidosd3a;
+ unsigned int vidosd3b;
+ unsigned int vidosd3c;
+ unsigned int res3;
+
+ unsigned int vidosd4a;
+ unsigned int vidosd4b;
+ unsigned int vidosd4c;
+ unsigned int res4[5];
+
+ unsigned int vidw00add0b0;
+ unsigned int vidw00add0b1;
+ unsigned int vidw01add0b0;
+ unsigned int vidw01add0b1;
+
+ unsigned int vidw02add0b0;
+ unsigned int vidw02add0b1;
+ unsigned int vidw03add0b0;
+ unsigned int vidw03add0b1;
+ unsigned int vidw04add0b0;
+ unsigned int vidw04add0b1;
+ unsigned int res5[2];
+
+ unsigned int vidw00add1b0;
+ unsigned int vidw00add1b1;
+ unsigned int vidw01add1b0;
+ unsigned int vidw01add1b1;
+
+ unsigned int vidw02add1b0;
+ unsigned int vidw02add1b1;
+ unsigned int vidw03add1b0;
+ unsigned int vidw03add1b1;
+
+ unsigned int vidw04add1b0;
+ unsigned int vidw04add1b1;
+ unsigned int res7[2];
+
+ unsigned int vidw00add2;
+ unsigned int vidw01add2;
+ unsigned int vidw02add2;
+ unsigned int vidw03add2;
+ unsigned int vidw04add2;
+ unsigned int res8[7];
+
+ unsigned int vidintcon0;
+ unsigned int vidintcon1;
+ unsigned int res9[1];
+
+ unsigned int w1keycon0;
+ unsigned int w1keycon1;
+ unsigned int w2keycon0;
+ unsigned int w2keycon1;
+ unsigned int w3keycon0;
+ unsigned int w3keycon1;
+ unsigned int w4keycon0;
+ unsigned int w4keycon1;
+
+ unsigned int w1keyalpha;
+ unsigned int w2keyalpha;
+ unsigned int w3keyalpha;
+ unsigned int w4keyalpha;
+
+ unsigned int dithmode;
+ unsigned int res10[2];
+
+ unsigned int win0map;
+ unsigned int win1map;
+ unsigned int win2map;
+ unsigned int win3map;
+ unsigned int win4map;
+ unsigned int res11[1];
+
+ unsigned int wpalcon_h;
+ unsigned int wpalcon_l;
+
+ unsigned int trigcon;
+ unsigned int res12[2];
+
+ unsigned int i80ifcona0;
+ unsigned int i80ifcona1;
+ unsigned int i80ifconb0;
+ unsigned int i80ifconb1
[U-Boot] [PATCH v2 6/7] LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI.
From f3326ff482ebebe3eea72621b354fd6e93f957a7 Mon Sep 17 00:00:00 2001
From: Donghwa Lee dh09@samsung.com
Date: Fri, 6 Apr 2012 14:24:01 +0900
Subject: [PATCH] PATCH v2: LCD: support S6E8AX0 amoled driver based on EXYNOS
MIPI DSI
This patch support S6E8AX0 amoled driver based on EXYNOS MIPI DSI interface.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
drivers/video/Makefile |1 +
drivers/video/s6e8ax0.c | 256 +++
2 files changed, 257 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/s6e8ax0.c
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 43bc7b4..4fad20d 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o
COBJS-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o
\
exynos_mipi_dsi_lowlevel.o
COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o
+COBJS-$(CONFIG_S6E8AX0) += s6e8ax0.o
COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
COBJS-$(CONFIG_SED156X) += sed156x.o
COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
diff --git a/drivers/video/s6e8ax0.c b/drivers/video/s6e8ax0.c
new file mode 100644
index 000..1ec7fd6
--- /dev/null
+++ b/drivers/video/s6e8ax0.c
@@ -0,0 +1,256 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * Author: Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/mipi_dsim.h
+
+#include exynos_mipi_dsi_lowlevel.h
+#include exynos_mipi_dsi_common.h
+
+static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+ const unsigned char data_to_send[] = {
+ 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
+ 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
+ 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
+ 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
+ 0xff, 0xff, 0xc8
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+ const unsigned char data_to_send[] = {
+ 0xf2, 0x80, 0x03, 0x0d
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send,
+ ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+ /* 7500K 2.2 Set (M3, 300cd) */
+ const unsigned char data_to_send[] = {
+ 0xfa, 0x01, 0x0f, 0x00, 0x0f, 0xda, 0xc0, 0xe4, 0xc8,
+ 0xc8, 0xc6, 0xd3, 0xd6, 0xd0, 0xab, 0xb2, 0xa6, 0xbf,
+ 0xc2, 0xb9, 0x00, 0x93, 0x00, 0x86, 0x00, 0xd1
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send,
+ ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xf7, 0x3);
+}
+
+static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+ const unsigned char data_to_send[] = {
+ 0xf6, 0x00, 0x02, 0x00
+ };
+
+ ops-cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
+ (unsigned int)data_to_send,
+ ARRAY_SIZE(data_to_send));
+}
+
+static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
+{
+ struct mipi_dsim_master_ops *ops = dsim_dev-master_ops;
+ const unsigned char data_to_send[] = {
+ 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
+ 0x00
+ };
+
+ ops-cmd_write(dsim_dev
[U-Boot] [PATCH v2 7/7] EXYNOS: support TRATS board display function
This patch support TRATS board configuration and display function.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
---
board/samsung/trats/trats.c | 147 +++
include/configs/trats.h |8 +++
2 files changed, 155 insertions(+), 0 deletions(-)
diff --git a/board/samsung/trats/trats.c b/board/samsung/trats/trats.c
index a7b4e4a..f9894b1 100644
--- a/board/samsung/trats/trats.c
+++ b/board/samsung/trats/trats.c
@@ -2,6 +2,7 @@
* Copyright (C) 2011 Samsung Electronics
* Heungjun Kim riverful@samsung.com
* Kyungmin Park kyungmin.p...@samsung.com
+ * Donghwa Lee dh09@samsung.com
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -23,11 +24,14 @@
*/
#include common.h
+#include lcd.h
#include asm/io.h
#include asm/arch/cpu.h
#include asm/arch/gpio.h
#include asm/arch/mmc.h
#include asm/arch/clock.h
+#include asm/arch/clk.h
+#include asm/arch/mipi_dsim.h
#include asm/arch/watchdog.h
#include asm/arch/power.h
#include pmic.h
@@ -357,3 +361,146 @@ int board_early_init_f(void)
return 0;
}
+
+static void lcd_reset(void)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+
+ s5p_gpio_direction_output(gpio2-y4, 5, 1);
+ udelay(1);
+ s5p_gpio_direction_output(gpio2-y4, 5, 0);
+ udelay(1);
+ s5p_gpio_direction_output(gpio2-y4, 5, 1);
+}
+
+static int lcd_power(void)
+{
+ int ret = 0;
+ struct pmic *p = get_pmic();
+
+ if (pmic_probe(p))
+ return 0;
+
+ /* LDO15 voltage: 2.2v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO15CTRL, 0x1c | EN_LDO);
+ /* LDO13 voltage: 3.0v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO13CTRL, 0x2c | EN_LDO);
+
+ if (ret) {
+ puts(MAX8997 LDO setting error!\n);
+ return -1;
+ }
+
+ return 0;
+}
+
+static struct mipi_dsim_config dsim_config = {
+ .e_interface= DSIM_VIDEO,
+ .e_virtual_ch = DSIM_VIRTUAL_CH_0,
+ .e_pixel_format = DSIM_24BPP_888,
+ .e_burst_mode = DSIM_BURST_SYNC_EVENT,
+ .e_no_data_lane = DSIM_DATA_LANE_4,
+ .e_byte_clk = DSIM_PLL_OUT_DIV8,
+ .hfp= 1,
+
+ .p = 3,
+ .m = 120,
+ .s = 1,
+
+ /* D-PHY PLL stable time spec :min = 200usec ~ max 400usec */
+ .pll_stable_time= 500,
+
+ /* escape clk : 10MHz */
+ .esc_clk= 20 * 100,
+
+ /* stop state holding counter after bta change count 0 ~ 0xfff */
+ .stop_holding_cnt = 0x7ff,
+ /* bta timeout 0 ~ 0xff */
+ .bta_timeout= 0xff,
+ /* lp rx timeout 0 ~ 0x */
+ .rx_timeout = 0x,
+};
+
+static struct exynos_platform_mipi_dsim s6e8ax0_platform_data = {
+ .lcd_panel_info = NULL,
+ .dsim_config = dsim_config,
+};
+
+static struct mipi_dsim_lcd_device mipi_lcd_device = {
+ .name = s6e8ax0,
+ .id = -1,
+ .bus_id = 0,
+ .platform_data = (void *)s6e8ax0_platform_data,
+};
+
+static int mipi_power(void)
+{
+ int ret = 0;
+ struct pmic *p = get_pmic();
+
+ if (pmic_probe(p))
+ return 0;
+
+ /* LDO3 voltage: 1.1v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO3CTRL, 0x6 | EN_LDO);
+ /* LDO4 voltage: 1.8v */
+ ret |= pmic_reg_write(p, MAX8997_REG_LDO4CTRL, 0x14 | EN_LDO);
+
+ if (ret) {
+ puts(MAX8997 LDO setting error!\n);
+ return -1;
+ }
+
+ return 0;
+}
+
+void init_panel_info(vidinfo_t *vid)
+{
+ vid-vl_freq= 60;
+ vid-vl_col = 720;
+ vid-vl_row = 1280;
+ vid-vl_width = 720;
+ vid-vl_height = 1280;
+ vid-vl_clkp= CONFIG_SYS_HIGH;
+ vid-vl_hsp = CONFIG_SYS_LOW;
+ vid-vl_vsp = CONFIG_SYS_LOW;
+ vid-vl_dp = CONFIG_SYS_LOW;
+
+ vid-vl_bpix= 32;
+ vid-dual_lcd_enabled = 0;
+
+ /* s6e8ax0 Panel */
+ vid-vl_hspw= 5;
+ vid-vl_hbpd= 10;
+ vid-vl_hfpd= 10;
+
+ vid-vl_vspw= 2;
+ vid-vl_vbpd= 1;
+ vid-vl_vfpd= 13;
+ vid-vl_cmd_allow_len = 0xf;
+
+ vid-win_id = 3;
+ vid-cfg_gpio = NULL;
+ vid-backlight_on = NULL;
+ vid-lcd_power_on = NULL; /* lcd_power_on in mipi dsi driver */
+ vid-reset_lcd = lcd_reset;
+
+ vid-init_delay = 0;
+ vid-power_on_delay = 0;
+ vid-reset_delay = 0;
+ vid-interface_mode = FIMD_RGB_INTERFACE;
+ vid-mipi_enabled = 1;
+
+ strcpy(s6e8ax0_platform_data.lcd_panel_name, mipi_lcd_device.name
[U-Boot] [PATCH 0/2] ARM: EXYNOS: support MIPI DSI interface driver
EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI based LCD Panel could be used with it. This patch supports MIPI-DSI driver based Samsung SoC chip. LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at board file and LCD panel driver specific function registered to mipi_dsim_ddi structure at lcd panel init function called system init. In the MIPI-DSI driver, find lcd panel driver by using registered lcd panel name, and then initialize lcd panel driver. This patch set has take a dependency on some patch set that I had already sended. [PATCH v3 1/4] ARM: EXYNOS: definition of system registers - updated Makefile [PATCH v3 3/4] ARM: EXYNOS: add exynos lcd clock interface - updated setting mipi dsi clock [PATCH v3 4/4] ARM: EXYNOS: support EXYNOS display driver - to interface mipi dsi, add mipi dsi init function in exynos_fb.c and add vidinfo_t field to notify to use mipi dsi interface. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2]ARM: EXYNOS: add mipi dsi control operation
To control mipi dsi interface for EXYNOS SoC, base register address, device
clock and any others control register must be set up.
This patch sets up above control operation.
[PATCH v3 1/4] ARM: EXYNOS: definition of system registers
[PATCH v3 3/4] ARM: EXYNOS: add exynos lcd clock interface
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/Makefile |2 +-
arch/arm/cpu/armv7/exynos/clock.c| 34 +
arch/arm/cpu/armv7/exynos/power.c| 47 ++
arch/arm/include/asm/arch-exynos/clk.h |1 +
arch/arm/include/asm/arch-exynos/cpu.h |3 ++
arch/arm/include/asm/arch-exynos/power.h |6
6 files changed, 92 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/armv7/exynos/power.c
diff --git a/arch/arm/cpu/armv7/exynos/Makefile
b/arch/arm/cpu/armv7/exynos/Makefile
index 75c31dc..90ec2bd 100644
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS += clock.o soc.o system.o
+COBJS += clock.o power.o soc.o system.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index ecaa11e..e4735a3 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -479,6 +479,34 @@ void exynos4_set_lcd_clk(void)
writel(cfg, clk-div_lcd0);
}
+void exynos4_set_mipi_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /* set mipi0 src clock 0x6: SCLK_MPLL */
+ cfg = readl(clk-src_lcd0);
+ cfg = ~(0xf 12);
+ cfg |= (0x6 12);
+ writel(cfg, clk-src_lcd0);
+
+ /* set src mask mipi0 0x1: Unmask*/
+ cfg = readl(clk-src_mask_lcd0);
+ cfg |= (0x1 12);
+ writel(cfg, clk-src_mask_lcd0);
+
+ /* Gating all clocks for MIPI0 */
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 3;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /* set fimd ratio */
+ cfg = ~(0xf 16);
+ cfg |= (0x1 16);
+ writel(cfg, clk-div_lcd0);
+}
+
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
@@ -532,3 +560,9 @@ void set_lcd_clk(void)
if (cpu_is_exynos4())
exynos4_set_lcd_clk();
}
+
+void set_mipi_clk(void)
+{
+ if (cpu_is_exynos4())
+ exynos4_set_mipi_clk();
+}
diff --git a/arch/arm/cpu/armv7/exynos/power.c
b/arch/arm/cpu/armv7/exynos/power.c
new file mode 100644
index 000..cbd91ef
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/power.c
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/power.h
+
+static void exynos4_mipi_phy0_control(int enable, unsigned int reset)
+{
+ struct exynos4_power *pmu =
+ (struct exynos4_power *)samsung_get_base_power();
+ unsigned int cfg = 0;
+
+ cfg = readl(pmu-mipi_phy0_control);
+ if (enable)
+ cfg |= (reset | EXYNOS_MIPI_PHY_ENABLE);
+ else
+ cfg = ~(reset | EXYNOS_MIPI_PHY_ENABLE);
+
+ writel(cfg, pmu-mipi_phy0_control);
+}
+
+void set_mipi_phy0_ctrl(int enable, unsigned int reset)
+{
+ if (cpu_is_exynos4())
+ exynos4_mipi_phy0_control(enable, reset);
+}
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index cf00dea..637fb4b 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -35,5 +35,6 @@ unsigned long get_uart_clk(int dev_index);
void set_mmc_clk(int dev_index, unsigned int div);
unsigned long get_lcd_clk(void);
void set_lcd_clk(void);
+void set_mipi_clk(void);
#endif
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 70048f0..ac4ddc7
Re: [U-Boot] [PATCH v3 0/4] ARM: EXYNOS: add display driver for EXYNOS SoC
Hi, I will modify as your comments. On Wen, 04 Apr 2012 23:25, Anatolij Gustschin wrote: Hi! On Wed, 4 Apr 2012 17:24:17 +0900 Minkyu Kang proms...@gmail.com wrote: On 2 April 2012 17:39, Donghwa Lee dh09@samsung.com wrote: This patch is for display driver version 3 of EXYNOS SoC. [1/4]: ARM: EXYNOS: definition of system registers - to contorl FIMD of LBLK0 bypass selection, add missed definitions of system register [2/4]: ARM: EXYNOS: add data structure for EXYNOS display driver - It is needed to specific vidinfo_t data structure for EXYNOS display driver. [3/4]: ARM: EXYNOS: add exynos lcd clock interface - Is is newly defined to interface to get lcd source clock. [4/4]: ARM: EXYNOS: support EXYNOS display driver change of v2: - define missing function declaration - correct the wrong return value for some function - etc Donghwa, Looks good to me. Anatolij, How you think about patch 2 and 4? If you are OK, I will merge this patchset to samsung tree with your ACK. Please send review to him or ACK to me. I've send my comments for patches 2 and 4, these patches look pretty good, but need some minor fixing. Thanks. Minkyu Kang. Thanks, Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/4] ARM: EXYNOS: add data structure for EXYNOS display driver
Hi,
Thank you for your comments.
On Wen, 04 Apr 2012 21:53, Anatolij Gustschin wrote:
Hi!
Sorry for not looking at this earlier. The patch looks pretty good, but
there are some style issues, please see some comments below.
Also the patch subject should reflect on which subsystem the patch is
doing the changes, so I would suggest using the patch subject like
LCD: add data structure for EXYNOS display driver
Ok, I will change the title.
On Mon, 02 Apr 2012 17:39:24 +0900
Donghwa Lee dh09@samsung.com wrote:
add vidinfo data structure for EXYNOS display driver
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/lcd.h | 63
+
1 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/include/lcd.h b/include/lcd.h
index d95feeb..651ff42 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -56,6 +56,11 @@ extern void lcd_initcolregs (void);
/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long
*lenp);
+enum {
+FIMD_RGB_INTERFACE = 1,
+FIMD_CPU_INTERFACE = 2,
+};
This is EXYNOS specific so please move it under
#elif defined(CONFIG_EXYNOS_FB) line.
...
Ok, I will move it.
+/* LCD configuration register */
+u_char vl_freq; /* Frequency */
+u_char vl_clkp; /* Clock polarity */
+u_char vl_oep; /* Output Enable polarity */
+u_char vl_hsp; /* Horizontal Sync polarity */
+u_char vl_vsp; /* Vertical Sync polarity */
+u_char vl_dp; /* Data polarity */
+u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8,
4 = 16 */
The above line is too long, we have 80 chars/line limit. I know
there are other bad examples in this file, but please change to
u_char vl_bpix; /* Bits per pixel, bpp = pow(2, vl_bpix) */
...
@@ -213,6 +275,7 @@ void lcd_puts(const char *s);
voidlcd_printf (const char *fmt, ...);
voidlcd_clear(void);
int lcd_display_bitmap(ulong bmp_image, int x, int y);
+voidinit_panel_info (vidinfo_t *vid);
Please remove space between function name and open parenthesis '('.
There are other examples with spaces between function names and '('
in this file, I'll fix them later.
Btw, where is init_panel_info() defined? I only see that it is used
in drivers/video/exynos_fb.c, but do not see the function code. So the
driver cannot be build at all. How did you test it?
Also try to check your patches with 'tools/checkpatch.pl'. It will
warn you about such style issues. Some of the warnings will be Linux
style specific, these can be disabled using --ignore= option, e.g.
using --ignore=NEW_TYPEDEFS would be appropriate for checking this
patch.
This function is used in TRATS board file to get vidinfo data that sets up in
board file,
Although I had already check by using checkpatch.pl, maybe some file was missed.
I will send patch next version.
Thank you,
Donghwa Lee
___
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http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/2] ARM: EXYNOS: support MIPI DSI interface driver
Hi, I will abandon this patch set because of some dependency on previously sended patch set and update next version. Thank you. On Wen 4 Apr 2012 15:28, Donghwa Lee wrote: EXYNOS SoC platform has MIPI-DSI controller and MIPI-DSI based LCD Panel could be used with it. This patch supports MIPI-DSI driver based Samsung SoC chip. LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at board file and LCD panel driver specific function registered to mipi_dsim_ddi structure at lcd panel init function called system init. In the MIPI-DSI driver, find lcd panel driver by using registered lcd panel name, and then initialize lcd panel driver. This patch set has take a dependency on some patch set that I had already sended. [PATCH v3 1/4] ARM: EXYNOS: definition of system registers - updated Makefile [PATCH v3 3/4] ARM: EXYNOS: add exynos lcd clock interface - updated setting mipi dsi clock [PATCH v3 4/4] ARM: EXYNOS: support EXYNOS display driver - to interface mipi dsi, add mipi dsi init function in exynos_fb.c and add vidinfo_t field to notify to use mipi dsi interface. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 0/4] ARM: EXYNOS: add display driver for EXYNOS SoC
This patch is for display driver version 3 of EXYNOS SoC. [1/4]: ARM: EXYNOS: definition of system registers - to contorl FIMD of LBLK0 bypass selection, add missed definitions of system register [2/4]: ARM: EXYNOS: add data structure for EXYNOS display driver - It is needed to specific vidinfo_t data structure for EXYNOS display driver. [3/4]: ARM: EXYNOS: add exynos lcd clock interface - Is is newly defined to interface to get lcd source clock. [4/4]: ARM: EXYNOS: support EXYNOS display driver change of v2: - define missing function declaration - correct the wrong return value for some function - etc Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 1/4] ARM: EXYNOS: definition of system registers
This is definition of system registers for EXYNOS SoC.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/Makefile|2 +-
arch/arm/cpu/armv7/exynos/system.c| 48 ++
arch/arm/include/asm/arch-exynos/cpu.h|2 +
arch/arm/include/asm/arch-exynos/system.h | 53 +
4 files changed, 104 insertions(+), 1 deletions(-)
create mode 100644 arch/arm/cpu/armv7/exynos/system.c
create mode 100644 arch/arm/include/asm/arch-exynos/system.h
diff --git a/arch/arm/cpu/armv7/exynos/Makefile
b/arch/arm/cpu/armv7/exynos/Makefile
index 124c380..75c31dc 100644
--- a/arch/arm/cpu/armv7/exynos/Makefile
+++ b/arch/arm/cpu/armv7/exynos/Makefile
@@ -22,7 +22,7 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-COBJS += clock.o soc.o
+COBJS += clock.o soc.o system.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/exynos/system.c
b/arch/arm/cpu/armv7/exynos/system.c
new file mode 100644
index 000..6c34730
--- /dev/null
+++ b/arch/arm/cpu/armv7/exynos/system.c
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/system.h
+
+static void exynos4_set_system_display(void)
+{
+ struct exynos4_sysreg *sysreg =
+ (struct exynos4_sysreg *)samsung_get_base_sysreg();
+ unsigned int cfg = 0;
+
+ /*
+* system register path set
+* 0: MIE/MDNIE
+* 1: FIMD Bypass
+*/
+ cfg = readl(sysreg-display_ctrl);
+ cfg |= (1 1);
+ writel(cfg, sysreg-display_ctrl);
+}
+
+void set_system_display_ctrl(void)
+{
+ if (cpu_is_exynos4())
+ exynos4_set_system_display();
+}
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 89f2c2e..70048f0 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -29,6 +29,7 @@
/* EXYNOS4 */
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
+#define EXYNOS4_SYSREG_BASE0x1001
#define EXYNOS4_POWER_BASE 0x1002
#define EXYNOS4_SWRESET0x10020400
#define EXYNOS4_CLOCK_BASE 0x1003
@@ -127,6 +128,7 @@ static inline unsigned int samsung_get_base_##device(void)
\
SAMSUNG_BASE(adc, ADC_BASE)
SAMSUNG_BASE(clock, CLOCK_BASE)
+SAMSUNG_BASE(sysreg, SYSREG_BASE)
SAMSUNG_BASE(fimd, FIMD_BASE)
SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
diff --git a/arch/arm/include/asm/arch-exynos/system.h
b/arch/arm/include/asm/arch-exynos/system.h
new file mode 100644
index 000..c85f949
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/system.h
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_SYSTEM_H_
+#define __ASM_ARM_ARCH_SYSTEM_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_sysreg {
+ unsigned char res1[0x210];
+ unsigned intdisplay_ctrl;
+ unsigned intdisplay_ctrl2;
+ unsigned intcamera_control;
+ unsigned intaudio_endian;
+ unsigned intjtag_con;
+};
+
+struct
[U-Boot] [PATCH v3 2/4] ARM: EXYNOS: add data structure for EXYNOS display driver
add vidinfo data structure for EXYNOS display driver
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/lcd.h | 63 +
1 files changed, 63 insertions(+), 0 deletions(-)
diff --git a/include/lcd.h b/include/lcd.h
index d95feeb..651ff42 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -56,6 +56,11 @@ extern void lcd_initcolregs (void);
/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
+enum {
+ FIMD_RGB_INTERFACE = 1,
+ FIMD_CPU_INTERFACE = 2,
+};
+
#if defined CONFIG_MPC823
/*
* LCD controller stucture for MPC823 CPU
@@ -183,6 +188,63 @@ typedef struct vidinfo {
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
+#elif defined(CONFIG_EXYNOS_FB)
+
+typedef struct vidinfo {
+ ushort vl_col; /* Number of columns (i.e. 640) */
+ ushort vl_row; /* Number of rows (i.e. 480) */
+ ushort vl_width;/* Width of display area in millimeters */
+ ushort vl_height; /* Height of display area in millimeters */
+
+ /* LCD configuration register */
+ u_char vl_freq; /* Frequency */
+ u_char vl_clkp; /* Clock polarity */
+ u_char vl_oep; /* Output Enable polarity */
+ u_char vl_hsp; /* Horizontal Sync polarity */
+ u_char vl_vsp; /* Vertical Sync polarity */
+ u_char vl_dp; /* Data polarity */
+ u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8,
4 = 16 */
+
+ /* Horizontal control register. Timing from data sheet */
+ u_char vl_hspw; /* Horz sync pulse width */
+ u_char vl_hfpd; /* Wait before of line */
+ u_char vl_hbpd; /* Wait end of line */
+
+ /* Vertical control register. */
+ u_char vl_vspw;/* Vertical sync pulse width */
+ u_char vl_vfpd;/* Wait before of frame */
+ u_char vl_vbpd;/* Wait end of frame */
+ u_char vl_cmd_allow_len; /* Wait end of frame */
+
+ void (*cfg_gpio)(void);
+ void (*backlight_on)(unsigned int onoff);
+ void (*reset_lcd)(void);
+ void (*lcd_power_on)(void);
+ void (*cfg_ldo)(void);
+ void (*enable_ldo)(unsigned int onoff);
+ void (*mipi_power)(void);
+ void (*backlight_reset)(void);
+
+ unsigned int win_id;
+ unsigned int init_delay;
+ unsigned int power_on_delay;
+ unsigned int reset_delay;
+ unsigned int interface_mode;
+ unsigned int cs_setup;
+ unsigned int wr_setup;
+ unsigned int wr_act;
+ unsigned int wr_hold;
+
+ /* parent clock name(MPLL, EPLL or VPLL) */
+ unsigned int pclk_name;
+ /* ratio value for source clock from parent clock. */
+ unsigned int sclk_div;
+
+ unsigned int lcd_rotate;
+ unsigned int dual_lcd_enabled;
+
+} vidinfo_t;
+
#else
typedef struct vidinfo {
@@ -213,6 +275,7 @@ voidlcd_puts(const char *s);
void lcd_printf (const char *fmt, ...);
void lcd_clear(void);
intlcd_display_bitmap(ulong bmp_image, int x, int y);
+void init_panel_info (vidinfo_t *vid);
/* Allow boards to customize the information displayed */
void lcd_show_board_info(void);
--
1.7.4.1
___
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U-Boot@lists.denx.de
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[U-Boot] [PATCH v3 3/4] ARM: EXYNOS: add exynos lcd clock interface
To get lcd clock in EXYNOS display driver, added get_lcd_clk() interface.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 79
arch/arm/include/asm/arch-exynos/clk.h |2 +
2 files changed, 81 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 2f7048b..ecaa11e 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -414,6 +414,71 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* get_lcd_clk: return lcd clock frequency */
+static unsigned long exynos4_get_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long pclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL [3:0]
+*/
+ sel = readl(clk-src_lcd0);
+ sel = sel 0xf;
+
+ /*
+* 0x6: SCLK_MPLL
+* 0x7: SCLK_EPLL
+* 0x8: SCLK_VPLL
+*/
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+*/
+ ratio = readl(clk-div_lcd0);
+ ratio = ratio 0xf;
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
+void exynos4_set_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /* set lcd src clock 0x6: SCLK_VPLL */
+ cfg = readl(clk-src_lcd0);
+ cfg = ~(0xf);
+ cfg |= 0x6;
+ writel(cfg, clk-src_lcd0);
+
+ /* Gating all clocks for FIMD0 */
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 0;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /* set fimd ratio */
+ cfg = ~(0xf);
+ cfg |= 0x1;
+ writel(cfg, clk-div_lcd0);
+}
+
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
@@ -453,3 +518,17 @@ void set_mmc_clk(int dev_index, unsigned int div)
else
exynos4_set_mmc_clk(dev_index, div);
}
+
+unsigned long get_lcd_clk(void)
+{
+ if (cpu_is_exynos4())
+ return exynos4_get_lcd_clk();
+ else
+ return 0;
+}
+
+void set_lcd_clk(void)
+{
+ if (cpu_is_exynos4())
+ exynos4_set_lcd_clk();
+}
diff --git a/arch/arm/include/asm/arch-exynos/clk.h
b/arch/arm/include/asm/arch-exynos/clk.h
index ff0f641..cf00dea 100644
--- a/arch/arm/include/asm/arch-exynos/clk.h
+++ b/arch/arm/include/asm/arch-exynos/clk.h
@@ -33,5 +33,7 @@ unsigned long get_arm_clk(void);
unsigned long get_pwm_clk(void);
unsigned long get_uart_clk(int dev_index);
void set_mmc_clk(int dev_index, unsigned int div);
+unsigned long get_lcd_clk(void);
+void set_lcd_clk(void);
#endif
--
1.7.4.1
___
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[U-Boot] [PATCH v3 4/4] ARM: EXYNOS: support EXYNOS display driver
This patch is for EXYNOS Display driver.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/fb.h | 446 +
drivers/video/Makefile|1 +
drivers/video/exynos_fb.c | 134 ++
drivers/video/exynos_fb.h | 59 +
drivers/video/exynos_fimd.c | 354 ++
5 files changed, 994 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/fb.h
create mode 100644 drivers/video/exynos_fb.c
create mode 100644 drivers/video/exynos_fb.h
create mode 100644 drivers/video/exynos_fimd.c
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
new file mode 100644
index 000..b10b0da
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -0,0 +1,446 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * aint with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_FB_H_
+#define __ASM_ARM_ARCH_FB_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_fb {
+ unsigned int vidcon0;
+ unsigned int vidcon1;
+ unsigned int vidcon2;
+ unsigned int vidcon3;
+ unsigned int vidtcon0;
+ unsigned int vidtcon1;
+ unsigned int vidtcon2;
+ unsigned int vidtcon3;
+ unsigned int wincon0;
+ unsigned int wincon1;
+ unsigned int wincon2;
+ unsigned int wincon3;
+ unsigned int wincon4;
+
+ unsigned int winshmap;
+ unsigned int res1;
+
+ unsigned int winchmap2;
+ unsigned int vidosd0a;
+ unsigned int vidosd0b;
+ unsigned int vidosd0c;
+ unsigned int res2;
+
+ unsigned int vidosd1a;
+ unsigned int vidosd1b;
+ unsigned int vidosd1c;
+ unsigned int vidosd1d;
+
+ unsigned int vidosd2a;
+ unsigned int vidosd2b;
+ unsigned int vidosd2c;
+ unsigned int vidosd2d;
+
+ unsigned int vidosd3a;
+ unsigned int vidosd3b;
+ unsigned int vidosd3c;
+ unsigned int res3;
+
+ unsigned int vidosd4a;
+ unsigned int vidosd4b;
+ unsigned int vidosd4c;
+ unsigned int res4[5];
+
+ unsigned int vidw00add0b0;
+ unsigned int vidw00add0b1;
+ unsigned int vidw01add0b0;
+ unsigned int vidw01add0b1;
+
+ unsigned int vidw02add0b0;
+ unsigned int vidw02add0b1;
+ unsigned int vidw03add0b0;
+ unsigned int vidw03add0b1;
+ unsigned int vidw04add0b0;
+ unsigned int vidw04add0b1;
+ unsigned int res5[2];
+
+ unsigned int vidw00add1b0;
+ unsigned int vidw00add1b1;
+ unsigned int vidw01add1b0;
+ unsigned int vidw01add1b1;
+
+ unsigned int vidw02add1b0;
+ unsigned int vidw02add1b1;
+ unsigned int vidw03add1b0;
+ unsigned int vidw03add1b1;
+
+ unsigned int vidw04add1b0;
+ unsigned int vidw04add1b1;
+ unsigned int res7[2];
+
+ unsigned int vidw00add2;
+ unsigned int vidw01add2;
+ unsigned int vidw02add2;
+ unsigned int vidw03add2;
+ unsigned int vidw04add2;
+ unsigned int res8[7];
+
+ unsigned int vidintcon0;
+ unsigned int vidintcon1;
+ unsigned int res9[1];
+
+ unsigned int w1keycon0;
+ unsigned int w1keycon1;
+ unsigned int w2keycon0;
+ unsigned int w2keycon1;
+ unsigned int w3keycon0;
+ unsigned int w3keycon1;
+ unsigned int w4keycon0;
+ unsigned int w4keycon1;
+
+ unsigned int w1keyalpha;
+ unsigned int w2keyalpha;
+ unsigned int w3keyalpha;
+ unsigned int w4keyalpha;
+
+ unsigned int dithmode;
+ unsigned int res10[2];
+
+ unsigned int win0map;
+ unsigned int win1map;
+ unsigned int win2map;
+ unsigned int win3map;
+ unsigned int win4map;
+ unsigned int res11[1];
+
+ unsigned int wpalcon_h;
+ unsigned int wpalcon_l;
+
+ unsigned int trigcon;
+ unsigned int res12[2];
+
+ unsigned int i80ifcona0;
+ unsigned int i80ifcona1;
+ unsigned int i80ifconb0;
+ unsigned int i80ifconb1;
+
+ unsigned int
[U-Boot] [PATCH v2 0/4] ARM: EXYNOS: add display driver for EXYNOS SoC
This patch is for display driver of EXYNOS SoC. [1/4]: ARM: EXYNOS: definition of system registers - to contorl FIMD of LBLK0 bypass selection, add missed definitions of system register [2/4]: ARM: EXYNOS: add data structure for EXYNOS display driver - It is needed to specific vidinfo_t data structure for EXYNOS display driver. [3/4]: ARM: EXYNOS: add exynos lcd clock interface - Is is newly defined to interface to get lcd source clock. [4/4]: ARM: EXYNOS: support EXYNOS display driver change of v1: - move system register control function to system.c - move lcd clock control function to clock driver - remove private debug macro - etc Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 2/4] ARM: EXYNOS: add data structure for EXYNOS display driver
add vidinfo data structure for EXYNOS display driver
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/lcd.h | 62 +
1 files changed, 62 insertions(+), 0 deletions(-)
diff --git a/include/lcd.h b/include/lcd.h
index d95feeb..e829093 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -56,6 +56,11 @@ extern void lcd_initcolregs (void);
/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
+enum {
+ FIMD_RGB_INTERFACE = 1,
+ FIMD_CPU_INTERFACE = 2,
+};
+
#if defined CONFIG_MPC823
/*
* LCD controller stucture for MPC823 CPU
@@ -183,6 +188,62 @@ typedef struct vidinfo {
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
+#elif defined(CONFIG_EXYNOS_FB)
+
+typedef struct vidinfo {
+ ushort vl_col; /* Number of columns (i.e. 640) */
+ ushort vl_row; /* Number of rows (i.e. 480) */
+ ushort vl_width;/* Width of display area in millimeters */
+ ushort vl_height; /* Height of display area in millimeters */
+
+ /* LCD configuration register */
+ u_char vl_freq; /* Frequency */
+ u_char vl_clkp; /* Clock polarity */
+ u_char vl_oep; /* Output Enable polarity */
+ u_char vl_hsp; /* Horizontal Sync polarity */
+ u_char vl_vsp; /* Vertical Sync polarity */
+ u_char vl_dp; /* Data polarity */
+ u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8,
4 = 16 */
+
+ /* Horizontal control register. Timing from data sheet */
+ u_char vl_hspw; /* Horz sync pulse width */
+ u_char vl_hfpd; /* Wait before of line */
+ u_char vl_hbpd; /* Wait end of line */
+
+ /* Vertical control register. */
+ u_char vl_vspw;/* Vertical sync pulse width */
+ u_char vl_vfpd;/* Wait before of frame */
+ u_char vl_vbpd;/* Wait end of frame */
+ u_char vl_cmd_allow_len; /* Wait end of frame */
+
+ void (*cfg_gpio)(void);
+ void (*backlight_on)(unsigned int onoff);
+ void (*reset_lcd)(void);
+ void (*lcd_power_on)(void);
+ void (*cfg_ldo)(void);
+ void (*enable_ldo)(unsigned int onoff);
+ void (*mipi_power)(void);
+ void (*backlight_reset)(void);
+
+ unsigned int init_delay;
+ unsigned int power_on_delay;
+ unsigned int reset_delay;
+ unsigned int interface_mode;
+ unsigned int cs_setup;
+ unsigned int wr_setup;
+ unsigned int wr_act;
+ unsigned int wr_hold;
+
+ /* parent clock name(MPLL, EPLL or VPLL) */
+ unsigned int pclk_name;
+ /* ratio value for source clock from parent clock. */
+ unsigned int sclk_div;
+
+ unsigned int lcd_rotate;
+ unsigned int dual_lcd_enabled;
+
+} vidinfo_t;
+
#else
typedef struct vidinfo {
@@ -213,6 +274,7 @@ voidlcd_puts(const char *s);
void lcd_printf (const char *fmt, ...);
void lcd_clear(void);
intlcd_display_bitmap(ulong bmp_image, int x, int y);
+void init_panel_info (vidinfo_t *vid);
/* Allow boards to customize the information displayed */
void lcd_show_board_info(void);
--
1.7.4.1
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/4] ARM: EXYNOS: add exynos lcd clock interface
To get lcd clock in EXYNOS display driver, added get_lcd_clk() interface.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 72 +
1 files changed, 72 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 2f7048b..b13fba3 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -414,6 +414,66 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* get_lcd_clk: return lcd clock frequency */
+static unsigned long exynos4_get_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long pclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL [3:0]
+*/
+ sel = readl(clk-src_lcd0);
+ sel = sel 0xf;
+
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+*/
+ ratio = readl(clk-div_lcd0);
+ ratio = ratio 0xf;
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
+static unsigned long exynos4_set_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned int cfg = 0;
+
+ /* set lcd src clock */
+ cfg = readl(clk-src_lcd0);
+ cfg = ~(0xf);
+ cfg |= 0x6;
+ writel(cfg, clk-src_lcd0);
+
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 0;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /* set fimd ratio */
+ cfg = ~(0xf);
+ cfg |= 0x1;
+ writel(cfg, clk-div_lcd0);
+
+}
+
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
@@ -453,3 +513,15 @@ void set_mmc_clk(int dev_index, unsigned int div)
else
exynos4_set_mmc_clk(dev_index, div);
}
+
+unsigned long get_lcd_clk(void)
+{
+ if (cpu_is_exynos4())
+ return exynos4_get_lcd_clk();
+}
+
+unsigned long set_lcd_clk(void)
+{
+ if (cpu_is_exynos4())
+ return exynos4_set_lcd_clk();
+}
--
1.7.4.1
___
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[U-Boot] [PATCH v2 4/4] ARM: EXYNOS: support EXYNOS display driver
This patch is for EXYNOS Display driver.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/fb.h | 446 +
drivers/video/Makefile|1 +
drivers/video/exynos_fb.c | 219
drivers/video/exynos_fb.h | 51
drivers/video/exynos_fimd.c | 357 ++
5 files changed, 1074 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/fb.h
create mode 100644 drivers/video/exynos_fb.c
create mode 100644 drivers/video/exynos_fb.h
create mode 100644 drivers/video/exynos_fimd.c
diff --git a/arch/arm/include/asm/arch-exynos/fb.h
b/arch/arm/include/asm/arch-exynos/fb.h
new file mode 100644
index 000..b10b0da
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/fb.h
@@ -0,0 +1,446 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * aint with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_FB_H_
+#define __ASM_ARM_ARCH_FB_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_fb {
+ unsigned int vidcon0;
+ unsigned int vidcon1;
+ unsigned int vidcon2;
+ unsigned int vidcon3;
+ unsigned int vidtcon0;
+ unsigned int vidtcon1;
+ unsigned int vidtcon2;
+ unsigned int vidtcon3;
+ unsigned int wincon0;
+ unsigned int wincon1;
+ unsigned int wincon2;
+ unsigned int wincon3;
+ unsigned int wincon4;
+
+ unsigned int winshmap;
+ unsigned int res1;
+
+ unsigned int winchmap2;
+ unsigned int vidosd0a;
+ unsigned int vidosd0b;
+ unsigned int vidosd0c;
+ unsigned int res2;
+
+ unsigned int vidosd1a;
+ unsigned int vidosd1b;
+ unsigned int vidosd1c;
+ unsigned int vidosd1d;
+
+ unsigned int vidosd2a;
+ unsigned int vidosd2b;
+ unsigned int vidosd2c;
+ unsigned int vidosd2d;
+
+ unsigned int vidosd3a;
+ unsigned int vidosd3b;
+ unsigned int vidosd3c;
+ unsigned int res3;
+
+ unsigned int vidosd4a;
+ unsigned int vidosd4b;
+ unsigned int vidosd4c;
+ unsigned int res4[5];
+
+ unsigned int vidw00add0b0;
+ unsigned int vidw00add0b1;
+ unsigned int vidw01add0b0;
+ unsigned int vidw01add0b1;
+
+ unsigned int vidw02add0b0;
+ unsigned int vidw02add0b1;
+ unsigned int vidw03add0b0;
+ unsigned int vidw03add0b1;
+ unsigned int vidw04add0b0;
+ unsigned int vidw04add0b1;
+ unsigned int res5[2];
+
+ unsigned int vidw00add1b0;
+ unsigned int vidw00add1b1;
+ unsigned int vidw01add1b0;
+ unsigned int vidw01add1b1;
+
+ unsigned int vidw02add1b0;
+ unsigned int vidw02add1b1;
+ unsigned int vidw03add1b0;
+ unsigned int vidw03add1b1;
+
+ unsigned int vidw04add1b0;
+ unsigned int vidw04add1b1;
+ unsigned int res7[2];
+
+ unsigned int vidw00add2;
+ unsigned int vidw01add2;
+ unsigned int vidw02add2;
+ unsigned int vidw03add2;
+ unsigned int vidw04add2;
+ unsigned int res8[7];
+
+ unsigned int vidintcon0;
+ unsigned int vidintcon1;
+ unsigned int res9[1];
+
+ unsigned int w1keycon0;
+ unsigned int w1keycon1;
+ unsigned int w2keycon0;
+ unsigned int w2keycon1;
+ unsigned int w3keycon0;
+ unsigned int w3keycon1;
+ unsigned int w4keycon0;
+ unsigned int w4keycon1;
+
+ unsigned int w1keyalpha;
+ unsigned int w2keyalpha;
+ unsigned int w3keyalpha;
+ unsigned int w4keyalpha;
+
+ unsigned int dithmode;
+ unsigned int res10[2];
+
+ unsigned int win0map;
+ unsigned int win1map;
+ unsigned int win2map;
+ unsigned int win3map;
+ unsigned int win4map;
+ unsigned int res11[1];
+
+ unsigned int wpalcon_h;
+ unsigned int wpalcon_l;
+
+ unsigned int trigcon;
+ unsigned int res12[2];
+
+ unsigned int i80ifcona0;
+ unsigned int i80ifcona1;
+ unsigned int i80ifconb0;
+ unsigned int i80ifconb1;
+
+ unsigned
[U-Boot] [PATCH] ARM: EXYNOS: definition of system registers
This is definition of system registers for EXYNOS SoC.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/cpu.h|2 +
arch/arm/include/asm/arch-exynos/system.h | 51 +
2 files changed, 53 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/system.h
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 89f2c2e..70048f0 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -29,6 +29,7 @@
/* EXYNOS4 */
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
+#define EXYNOS4_SYSREG_BASE0x1001
#define EXYNOS4_POWER_BASE 0x1002
#define EXYNOS4_SWRESET0x10020400
#define EXYNOS4_CLOCK_BASE 0x1003
@@ -127,6 +128,7 @@ static inline unsigned int samsung_get_base_##device(void)
\
SAMSUNG_BASE(adc, ADC_BASE)
SAMSUNG_BASE(clock, CLOCK_BASE)
+SAMSUNG_BASE(sysreg, SYSREG_BASE)
SAMSUNG_BASE(fimd, FIMD_BASE)
SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
diff --git a/arch/arm/include/asm/arch-exynos/system.h
b/arch/arm/include/asm/arch-exynos/system.h
new file mode 100644
index 000..2e99c0d
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/system.h
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_SYSTEM_H_
+#define __ASM_ARM_ARCH_SYSTEM_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_sysreg {
+ unsigned char res1[0x210];
+ unsigned intdisplay_ctrl;
+ unsigned intdisplay_ctrl2;
+ unsigned intcamera_control;
+ unsigned intaudio_endian;
+ unsigned intjtag_con;
+};
+
+struct exynos5_sysreg {
+ unsigned char res1[0x214];
+ unsigned intdisp1blk_cfg;
+ unsigned intdisp2blk_cfg;
+ unsigned inthdcp_e_fuse;
+ unsigned intgsclblk_cfg0;
+ unsigned intgsclblk_cfg1;
+ unsigned intreserved;
+ unsigned intispblk_cfg;
+ unsigned intusb20phy_cfg;
+ unsigned intmipi_dphy;
+ unsigned intdptx_dphy;
+ unsigned intphyclk_sel;
+};
+#endif
+
+#endif /* _EXYNOS4_SYSTEM_H */
--
1.7.4.1
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Re: [U-Boot] [PATCH] ARM: EXYNOS: definition of system registers
Hi,
On 29 March 2012 23:37, Minkyu Kang wrote:
Dear Donghwa,
On 29 March 2012 17:50, Donghwa Lee dh09@samsung.com wrote:
This is definition of system registers for EXYNOS SoC.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/cpu.h|2 +
arch/arm/include/asm/arch-exynos/system.h | 51
+
2 files changed, 53 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/system.h
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 89f2c2e..70048f0 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -29,6 +29,7 @@
/* EXYNOS4 */
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
+#define EXYNOS4_SYSREG_BASE0x1001
#define EXYNOS4_POWER_BASE 0x1002
#define EXYNOS4_SWRESET0x10020400
#define EXYNOS4_CLOCK_BASE 0x1003
need base address of exynos5 also.
SYSREG_BASE address of exynos5 was already included in this file.
diff --git a/arch/arm/include/asm/arch-exynos/system.h
b/arch/arm/include/asm/arch-exynos/system.h
new file mode 100644
index 000..2e99c0d
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/system.h
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_SYSTEM_H_
+#define __ASM_ARM_ARCH_SYSTEM_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_sysreg {
+ unsigned char res1[0x210];
+ unsigned intdisplay_ctrl;
+ unsigned intdisplay_ctrl2;
+ unsigned intcamera_control;
+ unsigned intaudio_endian;
+ unsigned intjtag_con;
+};
+
+struct exynos5_sysreg {
+ unsigned char res1[0x214];
+ unsigned intdisp1blk_cfg;
+ unsigned intdisp2blk_cfg;
+ unsigned inthdcp_e_fuse;
+ unsigned intgsclblk_cfg0;
+ unsigned intgsclblk_cfg1;
+ unsigned intreserved;
+ unsigned intispblk_cfg;
+ unsigned intusb20phy_cfg;
+ unsigned intmipi_dphy;
+ unsigned intdptx_dphy;
+ unsigned intphyclk_sel;
+};
+#endif
+
+#endif /* _EXYNOS4_SYSTEM_H */
--
Where is it use?
Need codes for using it.
This is used to control various signal of exynos. For example, it can contorl
to FIMD of LBLK0 bypass selection.
Thank you,
Donghwa Lee.
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[U-Boot] [PATCH 1/5] ARM: EXYNOS: definition of system registers
This is definition of system registers for EXYNOS SoC.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/include/asm/arch-exynos/cpu.h|2 +
arch/arm/include/asm/arch-exynos/system.h | 51 +
2 files changed, 53 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/include/asm/arch-exynos/system.h
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h
b/arch/arm/include/asm/arch-exynos/cpu.h
index 89f2c2e..70048f0 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -29,6 +29,7 @@
/* EXYNOS4 */
#define EXYNOS4_GPIO_PART3_BASE0x0386
#define EXYNOS4_PRO_ID 0x1000
+#define EXYNOS4_SYSREG_BASE0x1001
#define EXYNOS4_POWER_BASE 0x1002
#define EXYNOS4_SWRESET0x10020400
#define EXYNOS4_CLOCK_BASE 0x1003
@@ -127,6 +128,7 @@ static inline unsigned int samsung_get_base_##device(void)
\
SAMSUNG_BASE(adc, ADC_BASE)
SAMSUNG_BASE(clock, CLOCK_BASE)
+SAMSUNG_BASE(sysreg, SYSREG_BASE)
SAMSUNG_BASE(fimd, FIMD_BASE)
SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
diff --git a/arch/arm/include/asm/arch-exynos/system.h
b/arch/arm/include/asm/arch-exynos/system.h
new file mode 100644
index 000..2e99c0d
--- /dev/null
+++ b/arch/arm/include/asm/arch-exynos/system.h
@@ -0,0 +1,51 @@
+/*
+ * (C) Copyright 2012 Samsung Electronics
+ * Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __ASM_ARM_ARCH_SYSTEM_H_
+#define __ASM_ARM_ARCH_SYSTEM_H_
+
+#ifndef __ASSEMBLY__
+struct exynos4_sysreg {
+ unsigned char res1[0x210];
+ unsigned intdisplay_ctrl;
+ unsigned intdisplay_ctrl2;
+ unsigned intcamera_control;
+ unsigned intaudio_endian;
+ unsigned intjtag_con;
+};
+
+struct exynos5_sysreg {
+ unsigned char res1[0x214];
+ unsigned intdisp1blk_cfg;
+ unsigned intdisp2blk_cfg;
+ unsigned inthdcp_e_fuse;
+ unsigned intgsclblk_cfg0;
+ unsigned intgsclblk_cfg1;
+ unsigned intreserved;
+ unsigned intispblk_cfg;
+ unsigned intusb20phy_cfg;
+ unsigned intmipi_dphy;
+ unsigned intdptx_dphy;
+ unsigned intphyclk_sel;
+};
+#endif
+
+#endif /* _EXYNOS4_SYSTEM_H */
--
1.7.4.1
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[U-Boot] [PATCH 0/5] ARM: EXYNOS: add display driver for EXYNOS SoC
This patch is for display driver of EXYNOS SoC. [1/5]: ARM: EXYNOS: definition of system registers - to contorl FIMD of LBLK0 bypass selection, add missed definitions of system register [2/5]: ARM: EXYNOS: add data structure for EXYNOS display driver - It is needed to specific vidinfo_t data structure for EXYNOS display driver. [3/5]: ARM: EXYNOS: add exynos lcd clock interface - Is is newly defined to interface to get lcd source clock. [4/5]: ARM: EXYNOS: support EXYNOS display driver [5/5]: ARM: EXYNOS: add Makefile for exynos display driver Thank you, Donghwa Lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/5]: ARM: EXYNOS: add data structure for EXYNOS display driver
add vidinfo data structure for EXYNOS display driver.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
include/lcd.h | 63 -
1 files changed, 62 insertions(+), 1 deletions(-)
diff --git a/include/lcd.h b/include/lcd.h
index d95feeb..b2a1bc4 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -56,6 +56,11 @@ extern void lcd_initcolregs (void);
/* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
extern struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp);
+enum {
+ FIMD_RGB_INTERFACE = 1,
+ FIMD_CPU_INTERFACE = 2,
+};
+
#if defined CONFIG_MPC823
/*
* LCD controller stucture for MPC823 CPU
@@ -183,6 +188,62 @@ typedef struct vidinfo {
u_long mmio; /* Memory mapped registers */
} vidinfo_t;
+#elif defined(CONFIG_EXYNOS_FB)
+
+typedef struct vidinfo {
+ ushort vl_col; /* Number of columns (i.e. 640) */
+ ushort vl_row; /* Number of rows (i.e. 480) */
+ ushort vl_width;/* Width of display area in millimeters */
+ ushort vl_height; /* Height of display area in millimeters */
+
+ /* LCD configuration register */
+ u_char vl_freq; /* Frequency */
+ u_char vl_clkp; /* Clock polarity */
+ u_char vl_oep; /* Output Enable polarity */
+ u_char vl_hsp; /* Horizontal Sync polarity */
+ u_char vl_vsp; /* Vertical Sync polarity */
+ u_char vl_dp; /* Data polarity */
+ u_char vl_bpix; /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8,
4 = 16 */
+
+ /* Horizontal control register. Timing from data sheet */
+ u_char vl_hspw; /* Horz sync pulse width */
+ u_char vl_hfpd; /* Wait before of line */
+ u_char vl_hbpd; /* Wait end of line */
+
+ /* Vertical control register. */
+ u_char vl_vspw;/* Vertical sync pulse width */
+ u_char vl_vfpd;/* Wait before of frame */
+ u_char vl_vbpd;/* Wait end of frame */
+ u_char vl_cmd_allow_len; /* Wait end of frame */
+
+ void (*cfg_gpio)(void);
+ void (*backlight_on)(unsigned int onoff);
+ void (*reset_lcd)(void);
+ void (*lcd_power_on)(void);
+ void (*cfg_ldo)(void);
+ void (*enable_ldo)(unsigned int onoff);
+ void (*mipi_power)(void);
+ void (*backlight_reset)(void);
+
+ unsigned int init_delay;
+ unsigned int power_on_delay;
+ unsigned int reset_delay;
+ unsigned int interface_mode;
+ unsigned int cs_setup;
+ unsigned int wr_setup;
+ unsigned int wr_act;
+ unsigned int wr_hold;
+
+ /* parent clock name(MPLL, EPLL or VPLL) */
+ unsigned int pclk_name;
+ /* ratio value for source clock from parent clock. */
+ unsigned int sclk_div;
+
+ unsigned int lcd_rotate;
+ unsigned int dual_lcd_enabled;
+
+} vidinfo_t;
+
#else
typedef struct vidinfo {
@@ -195,7 +256,6 @@ typedef struct vidinfo {
void*priv; /* Pointer to driver-specific data */
} vidinfo_t;
-
#endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
extern vidinfo_t panel_info;
@@ -213,6 +273,7 @@ voidlcd_puts(const char *s);
void lcd_printf (const char *fmt, ...);
void lcd_clear(void);
intlcd_display_bitmap(ulong bmp_image, int x, int y);
+void init_panel_info (vidinfo_t *vid);
/* Allow boards to customize the information displayed */
void lcd_show_board_info(void);
--
1.7.4.1
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[U-Boot] [PATCH 3/5] ARM: EXYNOS: add exynos lcd clock interface
To get lcd source clock in EXYNOS display driver, added get_lcd_clk() interface.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 50 +
1 files changed, 50 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/exynos/clock.c
b/arch/arm/cpu/armv7/exynos/clock.c
index 2f7048b..af66d5c 100644
--- a/arch/arm/cpu/armv7/exynos/clock.c
+++ b/arch/arm/cpu/armv7/exynos/clock.c
@@ -414,6 +414,51 @@ static void exynos5_set_mmc_clk(int dev_index, unsigned
int div)
writel(val, addr);
}
+/* get_lcd_clk: return lcd clock frequency */
+static unsigned long exynos4_get_lcd_clk(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ unsigned long pclk, sclk;
+ unsigned int sel;
+ unsigned int ratio;
+
+ /*
+* CLK_SRC_LCD0
+* FIMD0_SEL [3:0]
+*/
+#if defined(CONFIG_EXYNOS4210)
+ sel = readl(clk-src_lcd0);
+#else
+ sel = readl(clk-src_lcd);
+#endif
+ sel = sel 0xf;
+
+ if (sel == 0x6)
+ sclk = get_pll_clk(MPLL);
+ else if (sel == 0x7)
+ sclk = get_pll_clk(EPLL);
+ else if (sel == 0x8)
+ sclk = get_pll_clk(VPLL);
+ else
+ return 0;
+
+ /*
+* CLK_DIV_LCD0
+* FIMD0_RATIO [3:0]
+*/
+#if defined(CONFIG_EXYNOS4210)
+ ratio = readl(clk-div_lcd0);
+#else
+ ratio = readl(clk-div_lcd);
+#endif
+ ratio = ratio 0xf;
+
+ pclk = sclk / (ratio + 1);
+
+ return pclk;
+}
+
unsigned long get_pll_clk(int pllreg)
{
if (cpu_is_exynos5())
@@ -453,3 +498,8 @@ void set_mmc_clk(int dev_index, unsigned int div)
else
exynos4_set_mmc_clk(dev_index, div);
}
+
+unsigned long get_lcd_clk(void)
+{
+ return exynos4_get_lcd_clk();
+}
--
1.7.4.1
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[U-Boot] [PATCH 4/5] ARM: EXYNOS: support EXYNOS display driver
This patch is for EXYNOS Display driver.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Inki Dae inki@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/video/exynos_fb.c | 160 +
drivers/video/exynos_fb.h | 62 +++
drivers/video/exynos_fimd.c | 416 +++
3 files changed, 638 insertions(+), 0 deletions(-)
create mode 100644 drivers/video/exynos_fb.c
create mode 100644 drivers/video/exynos_fb.h
create mode 100644 drivers/video/exynos_fimd.c
diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c
new file mode 100644
index 000..5067b22
--- /dev/null
+++ b/drivers/video/exynos_fb.c
@@ -0,0 +1,160 @@
+/*
+ * EXYNOS LCD Controller driver.
+ *
+ * Author: InKi Dae inki@samsung.com
+ * Author: Donghwa Lee dh09@samsung.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include config.h
+#include common.h
+#include lcd.h
+#include version.h
+#include stdarg.h
+#include linux/types.h
+#include asm/io.h
+#include asm/arch/cpu.h
+#include asm/arch/clock.h
+#include asm/arch/clk.h
+#include asm/arch/system.h
+#include malloc.h
+#include exynos_fb.h
+
+int lcd_line_length;
+int lcd_color_fg;
+int lcd_color_bg;
+
+void *lcd_base;
+void *lcd_console_address;
+
+short console_col;
+short console_row;
+
+static unsigned int panel_width, panel_height;
+
+/* LCD Panel data */
+vidinfo_t panel_info;
+
+static void exynos_lcd_init_mem(void *lcdbase, vidinfo_t *vid)
+{
+ unsigned long palette_size, palette_mem_size;
+ unsigned int fb_size;
+
+ fb_size = vid-vl_row * vid-vl_col * (vid-vl_bpix 3);
+
+ lcd_base = lcdbase;
+
+ palette_size = NBITS(vid-vl_bpix) == 8 ? 256 : 16;
+ palette_mem_size = palette_size * sizeof(u32);
+
+ exynos_fimd_lcd_init_mem((unsigned long)lcd_base,
+ (unsigned long)fb_size, palette_size);
+}
+
+static void exynos_lcd_init(vidinfo_t *vid)
+{
+ exynos_fimd_lcd_init(vid);
+}
+
+static void lcd_panel_on(vidinfo_t *vid)
+{
+ udelay(vid-init_delay);
+
+ if (vid-backlight_reset)
+ vid-backlight_reset();
+
+ if (vid-cfg_gpio)
+ vid-cfg_gpio();
+
+ if (vid-lcd_power_on)
+ vid-lcd_power_on();
+
+ udelay(vid-power_on_delay);
+
+ if (vid-reset_lcd) {
+ vid-reset_lcd();
+ udelay(vid-reset_delay);
+ }
+
+ if (vid-backlight_on)
+ vid-backlight_on(1);
+
+ if (vid-cfg_ldo)
+ vid-cfg_ldo();
+
+ if (vid-enable_ldo)
+ vid-enable_ldo(1);
+}
+
+static void lcd_clk_set(void)
+{
+ struct exynos4_clock *clk =
+ (struct exynos4_clock *)samsung_get_base_clock();
+ struct exynos4_sysreg *sysreg =
+ (struct exynos4_sysreg *)samsung_get_base_sysreg();
+ unsigned int cfg = 0;
+
+ /* system register path set */
+ cfg = readl(sysreg-display_ctrl);
+ cfg |= (1 1);
+ writel(cfg, sysreg-display_ctrl);
+
+ /* set lcd src clock */
+ cfg = ~(0xf);
+ cfg |= 0x6;
+ writel(cfg, clk-src_lcd0);
+
+ cfg = readl(clk-gate_ip_lcd0);
+ cfg |= 1 0;
+ writel(cfg, clk-gate_ip_lcd0);
+
+ /* set fimd ratio */
+ cfg = ~(0xf);
+ cfg |= 0x1;
+ writel(cfg, clk-div_lcd0);
+
+}
+
+void lcd_ctrl_init(void *lcdbase)
+{
+ lcd_clk_set();
+ /* initialize parameters which is specific to panel. */
+ init_panel_info(panel_info);
+
+ panel_width = panel_info.vl_width;
+ panel_height = panel_info.vl_height;
+
+ exynos_lcd_init_mem(lcdbase, panel_info);
+
+ exynos_lcd_init(panel_info);
+}
+
+
+void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blud)
+{
+ return;
+}
+
+void lcd_enable(void)
+{
+ lcd_panel_on(panel_info);
+}
+
+ulong calc_fbsize(void)
+{
+ return exynos_fimd_calc_fbsize();
+}
diff --git a/drivers/video/exynos_fb.h b/drivers/video/exynos_fb.h
new file mode 100644
index 000..3b8b0f6
--- /dev/null
+++ b/drivers/video/exynos_fb.h
@@ -0,0 +1,62 @@
+/*
+ * drivers/video/exynos_fb.h
+ *
+ * Copyright (C) 2012 Donghwa Lee dh09@samsung.com
+ *
+ * This file is subject to the terms
[U-Boot] [PATCH 5/5] ARM: EXYNOS: add Makefile for exynos display driver
Update Makefile for EXYNOS display driver. Signed-off-by: Donghwa Lee dh09@samsung.com Signed-off-by: Inki Dae inki@samsung.com Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com --- drivers/video/Makefile |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 6252f6a..8896abe 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -28,6 +28,7 @@ LIB := $(obj)libvideo.o COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o +COBJS-$(CONFIG_EXYNOS_FB) += exynos_fb.o exynos_fimd.o COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o COBJS-$(CONFIG_S6E63D6) += s6e63d6.o COBJS-$(CONFIG_SED156X) += sed156x.o -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] ARM: s5p: pwm driver support
This is common pwm driver of S5P.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes since v2:
- Timer4 was blocked to access compare buffer register
- code clean
arch/arm/cpu/armv7/s5p-common/Makefile |1 +
arch/arm/cpu/armv7/s5p-common/pwm.c | 198 +++
arch/arm/include/asm/arch-s5pc1xx/pwm.h |7 +
arch/arm/include/asm/arch-s5pc2xx/pwm.h |7 +
include/pwm.h | 31 +
5 files changed, 244 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5p-common/pwm.c
create mode 100644 include/pwm.h
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index 922cd95..ce0a41e 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -27,6 +27,7 @@ LIB = $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM)+= pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c
b/arch/arm/cpu/armv7/s5p-common/pwm.c
new file mode 100644
index 000..29e996e
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -0,0 +1,198 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include errno.h
+#include pwm.h
+#include asm/io.h
+#include asm/arch/pwm.h
+#include asm/arch/clk.h
+
+#define PRESCALER_0(8 - 1) /* prescaler of timer 0, 1 */
+#define PRESCALER_1(16 - 1)/* prescaler of timer 2, 3, 4 */
+#define MUX_DIV_1 0 /* 1/1 period */
+#define MUX_DIV_2 1 /* 1/2 period */
+#define MUX_DIV_4 2 /* 1/4 period */
+#define MUX_DIV_8 3 /* 1/8 period */
+#define MUX_DIV_16 4 /* 1/16 period */
+
+#define MUX_DIV_SHIFT(x) (x * 4)
+
+int pwm_enable(int pwm_id)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+ tcon |= TCON_START(pwm_id);
+
+ writel(tcon, pwm-tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+ tcon = ~TCON_START(pwm_id);
+
+ writel(tcon, pwm-tcon);
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_pwm_clk();
+
+ for (div = 2; div = 16; div *= 2) {
+ if ((tin_parent_rate / (div 16)) freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long timer_rate_hz;
+ unsigned long tcmp;
+
+ /*
+* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits.
+*/
+ if (period_ns NS_IN_HZ || duty_ns NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+ timer_rate_hz = tin_rate;
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+
+ /* Note, counters count down */
+ tcmp = duty_ns / tin_ns
[U-Boot] [PATCH v4] ARM: S5P: pwm driver support
This is common pwm driver of S5P.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Changes since v3:
- fixed pwm register offset
- move definitions of register to header file
Changes since v2:
- Timer4 was blocked to access compare buffer register
- code clean
arch/arm/cpu/armv7/s5p-common/Makefile |1 +
arch/arm/cpu/armv7/s5p-common/pwm.c | 189 +++
arch/arm/include/asm/arch-s5pc1xx/pwm.h | 19 +++
arch/arm/include/asm/arch-s5pc2xx/pwm.h | 19 +++
include/pwm.h | 31 +
5 files changed, 259 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5p-common/pwm.c
create mode 100644 include/pwm.h
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index 922cd95..ce0a41e 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -27,6 +27,7 @@ LIB = $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM)+= pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c
b/arch/arm/cpu/armv7/s5p-common/pwm.c
new file mode 100644
index 000..ff95b84
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include errno.h
+#include pwm.h
+#include asm/io.h
+#include asm/arch/pwm.h
+#include asm/arch/clk.h
+
+int pwm_enable(int pwm_id)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+ tcon |= TCON_START(pwm_id);
+
+ writel(tcon, pwm-tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+ tcon = ~TCON_START(pwm_id);
+
+ writel(tcon, pwm-tcon);
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_pwm_clk();
+
+ for (div = 2; div = 16; div *= 2) {
+ if ((tin_parent_rate / (div 16)) freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s5p_timer *pwm =
+ (struct s5p_timer *)samsung_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long timer_rate_hz;
+ unsigned long tcmp;
+
+ /*
+* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits.
+*/
+ if (period_ns NS_IN_HZ || duty_ns NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+ timer_rate_hz = tin_rate;
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+
+ /* Note, counters count down */
+ tcmp = duty_ns / tin_ns;
+ tcmp = tcnt - tcmp;
+
+ /*
+* the pwm hw only checks the compare register after a decrement,
+* so the pin never toggles if tcmp = tcnt
+*/
+ if (tcmp == tcnt)
+ tcmp--;
+
+ if (tcmp 0)
+ tcmp = 0;
+
+ /* Update the PWM register block. */
+ offset = pwm_id * 3;
+ if (pwm_id 4) {
+ writel(tcnt, pwm-tcntb0 + offset
Re: [U-Boot] [PATCH] armv7: s5p: pwm driver support
Dear Minkyu Kang,
On 2011-02-28 8:36 Minkyu Kang wrote:
Dear Donghwa Lee,
On 24 February 2011 16:56, Donghwa Lee dh09@samsung.com wrote:
This is common pwm driver of S5P.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/s5p-common/Makefile |1 +
arch/arm/cpu/armv7/s5p-common/pwm.c | 214
+++
arch/arm/include/asm/arch-s5pc1xx/pwm.h | 14 ++
arch/arm/include/asm/arch-s5pc2xx/pwm.h | 14 ++
include/pwm.h | 21 +++
5 files changed, 264 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5p-common/pwm.c
create mode 100644 include/pwm.h
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c
b/arch/arm/cpu/armv7/s5p-common/pwm.c
new file mode 100644
index 000..eed2206
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include errno.h
+#include pwm.h
+#include asm/io.h
+#include asm/arch/pwm.h
+#include asm/arch/clk.h
+
+#define PRESCALER_0(8 - 1) /* prescaler of timer 0, 1 */
+#define PRESCALER_1(16 - 1)/* prescaler of timer 2, 3,
4 */
+#define MUX_DIV_1 0 /* 1/1 period */
+#define MUX_DIV_2 1 /* 1/2 period */
+#define MUX_DIV_4 2 /* 1/4 period */
+#define MUX_DIV_8 3 /* 1/8 period */
+#define MUX_DIV_16 4 /* 1/16 period */
+
+#define MUX_DIV_SHIFT(x) ((x) * 4)
+
+#define TCON0_TIMER_SHIFT 0
+#define TCON_TIMER_SHIFT(x)(8 + ((x - 1) * 4))
+
+
please remove this space
Yes, I will remove it.
+int pwm_enable(int pwm_id)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+
+ if (pwm_id == 0)
+ tcon |= TCON0_START;
+ else
+ tcon |= TCON_START(pwm_id);
+ writel(tcon, pwm-tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+ if (pwm_id == 0)
+ tcon = ~TCON0_START;
+ else
+ tcon = ~TCON_START(pwm_id);
+
+ writel(tcon, pwm-tcon);
+
please remove this space
Yes, I will remove it.
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_pwm_clk();
+
+ for (div = 2; div = 16; div *= 2) {
+ if ((tin_parent_rate / (div 16)) freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long timer_rate_hz;
+
please remove this space
Yes, I will remove it.
+ long tcmp;
unsigned long?
Yes, I will fix it next version.
+
+ /* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits. */
Please keep multi-line comment rule.
Please see chapter 8.
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=Documentation/CodingStyle
Thank you, your comment. I will fix it.
+ if (period_ns NS_IN_HZ || duty_ns NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns
[U-Boot] [PATCH v2] armv7: s5p: pwm driver support
This is common pwm driver version2 of S5P.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/s5p-common/Makefile |1 +
arch/arm/cpu/armv7/s5p-common/pwm.c | 218 +++
arch/arm/include/asm/arch-s5pc1xx/pwm.h | 14 ++
arch/arm/include/asm/arch-s5pc2xx/pwm.h | 14 ++
include/pwm.h | 32 +
5 files changed, 279 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5p-common/pwm.c
create mode 100644 include/pwm.h
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index 922cd95..da5623d 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -28,6 +28,7 @@ LIB = $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM)+= pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c
b/arch/arm/cpu/armv7/s5p-common/pwm.c
new file mode 100644
index 000..2e0601a
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -0,0 +1,218 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include errno.h
+#include pwm.h
+#include asm/io.h
+#include asm/arch/pwm.h
+#include asm/arch/clk.h
+
+#define PRESCALER_0(8 - 1) /* prescaler of timer 0, 1 */
+#define PRESCALER_1(16 - 1)/* prescaler of timer 2, 3, 4 */
+#define MUX_DIV_1 0 /* 1/1 period */
+#define MUX_DIV_2 1 /* 1/2 period */
+#define MUX_DIV_4 2 /* 1/4 period */
+#define MUX_DIV_8 3 /* 1/8 period */
+#define MUX_DIV_16 4 /* 1/16 period */
+
+#define MUX_DIV_SHIFT(x) ((x) * 4)
+
+#define TCON0_TIMER_SHIFT 0
+#define TCON_TIMER_SHIFT(x)(8 + ((x - 1) * 4))
+
+int pwm_enable(int pwm_id)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+
+ if (pwm_id == 0)
+ tcon |= TCON0_START;
+ else
+ tcon |= TCON_START(pwm_id);
+ writel(tcon, pwm-tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+ if (pwm_id == 0)
+ tcon = ~TCON0_START;
+ else
+ tcon = ~TCON_START(pwm_id);
+
+ writel(tcon, pwm-tcon);
+
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_pwm_clk();
+
+ for (div = 2; div = 16; div *= 2) {
+ if ((tin_parent_rate / (div 16)) freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long timer_rate_hz;
+ unsigned long tcmp;
+
+ /*
+* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits.
+*/
+ if (period_ns NS_IN_HZ || duty_ns NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+ timer_rate_hz = tin_rate;
+
+ tin_ns = NS_IN_HZ / tin_rate
[U-Boot] [PATCH] armv7: s5p: pwm driver support
This is common pwm driver of S5P.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/s5p-common/Makefile |1 +
arch/arm/cpu/armv7/s5p-common/pwm.c | 214 +++
arch/arm/include/asm/arch-s5pc1xx/pwm.h | 14 ++
arch/arm/include/asm/arch-s5pc2xx/pwm.h | 14 ++
include/pwm.h | 21 +++
5 files changed, 264 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/s5p-common/pwm.c
create mode 100644 include/pwm.h
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile
b/arch/arm/cpu/armv7/s5p-common/Makefile
index 922cd95..da5623d 100644
--- a/arch/arm/cpu/armv7/s5p-common/Makefile
+++ b/arch/arm/cpu/armv7/s5p-common/Makefile
@@ -28,6 +28,7 @@ LIB = $(obj)libs5p-common.o
COBJS-y+= cpu_info.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM)+= pwm.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
diff --git a/arch/arm/cpu/armv7/s5p-common/pwm.c
b/arch/arm/cpu/armv7/s5p-common/pwm.c
new file mode 100644
index 000..eed2206
--- /dev/null
+++ b/arch/arm/cpu/armv7/s5p-common/pwm.c
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics
+ *
+ * Donghwa Lee dh09@samsung.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include errno.h
+#include pwm.h
+#include asm/io.h
+#include asm/arch/pwm.h
+#include asm/arch/clk.h
+
+#define PRESCALER_0(8 - 1) /* prescaler of timer 0, 1 */
+#define PRESCALER_1(16 - 1)/* prescaler of timer 2, 3, 4 */
+#define MUX_DIV_1 0 /* 1/1 period */
+#define MUX_DIV_2 1 /* 1/2 period */
+#define MUX_DIV_4 2 /* 1/4 period */
+#define MUX_DIV_8 3 /* 1/8 period */
+#define MUX_DIV_16 4 /* 1/16 period */
+
+#define MUX_DIV_SHIFT(x) ((x) * 4)
+
+#define TCON0_TIMER_SHIFT 0
+#define TCON_TIMER_SHIFT(x)(8 + ((x - 1) * 4))
+
+
+int pwm_enable(int pwm_id)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+
+ if (pwm_id == 0)
+ tcon |= TCON0_START;
+ else
+ tcon |= TCON_START(pwm_id);
+ writel(tcon, pwm-tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(pwm-tcon);
+ if (pwm_id == 0)
+ tcon = ~TCON0_START;
+ else
+ tcon = ~TCON_START(pwm_id);
+
+ writel(tcon, pwm-tcon);
+
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_pwm_clk();
+
+ for (div = 2; div = 16; div *= 2) {
+ if ((tin_parent_rate / (div 16)) freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s5p_timer *pwm = (struct s5p_timer
*)samsung_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long timer_rate_hz;
+
+ long tcmp;
+
+ /* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits. */
+ if (period_ns NS_IN_HZ || duty_ns NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+ timer_rate_hz = tin_rate;
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns
Re: [U-Boot] [PATCH] tools: fw_printenv supports mmc device
On 2010-12-16 오후 3:42 , Stefano Babic wrote: On 12/16/2010 02:22 AM, Donghwa Lee wrote: diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c index 8ff7052..5a707f6 100644 --- a/tools/env/fw_env.c +++ b/tools/env/fw_env.c @@ -855,6 +855,7 @@ static int flash_write_buf (int dev, int fd, void *buf, size_t count, } erase.start = blockstart; +#ifndef CONFIG_ENV_IS_IN_MMC Can we get rid of this #ifdef statement ? This does not allow to include the binary in a distro, because it is decided at compile time where the environment is stored. We already check if we are using a flash device in fw_env.c, when we call ioctl (fd, MEMGETINFO, mtdinfo). At the moment, we set the mtd_type field in the envdevices structure only with MTD_NORFLASH or MTD_NANDFLASH. I think it should be better to improve the check to find on which medium we store the environment and set the mtd_type according to its result if a SD/MMC is found (with MTD_MMC, maybe ?). I think SD/MMC may not use MEMGETINFO ioctl. If mmc device doesn't use MTD, use only one partition, it can not use MEMGETINFO ioctl? Actually, environment variables are very small area in SD/MMC, it doesn't need to divide own partition. But, I think my patch that uses #ifndef statement was wrong, it needs to change another way. # Notice, that the Number of sectors is ignored on NOR. # MTD device name Device offset Env. size Flash sector size Number of sectors -/dev/mtd1 0x 0x4000 0x4000 -/dev/mtd2 0x 0x4000 0x4000 +#/dev/mtd1 0x 0x4000 0x4000 +#/dev/mtd2 0x 0x4000 0x4000 I do not see any change in these lines.. yes, there is no change, i added avobe to tell that case of not using /dev/mtd# node. # NAND example #/dev/mtd0 0x4000 0x4000 0x2 2 + +# MMC device name Device offset Env. size Flash sector size Number of sectors +/dev/mmcblk00x7000 0x1000 0x1000 Do we need Flash sector size for MMC ? MMC doesn't need to flash sector size. MMC can overwrite. Best regards, Stefano Babic ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tools: fw_printenv supports mmc device
On 2010-12-17 오전 3:45 , Steve Sakoman wrote: On Wed, Dec 15, 2010 at 5:22 PM, Donghwa Lee dh09@samsung.com wrote: I modified fw_printenv tools to use /dev/mmcblk0 node. Original fw_printenv tool can be access MTD devices, but, in some cases, environment variables can be stored other memory devices, for example, mmc devices. So, I modified a few code to use /dev/mmcblk0. I submitted a similar patch series from Loïc Minier a couple of weeks ago: http://old.nabble.com/-U-Boot---RFC-0-3--Enhance-env-tools-td30373328.html I've been working a a v2 to address the comments received. Do you think a variant of that patch series will work for you? Perhaps we could combine efforts for a patch series to solve the mmc and normal file write targets? Steve I think your ideas are quite similar to me. I tested your patch to my target. In my kernel your patch can not recognize file type, but, when 'is_mtd' is 0, it work well. Best regards, Donghwa lee ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] tools: fw_printenv supports mmc device
I modified fw_printenv tools to use /dev/mmcblk0 node. Original fw_printenv tool
can be access MTD devices, but, in some cases, environment variables can be
stored
other memory devices, for example, mmc devices.
So, I modified a few code to use /dev/mmcblk0.
Signed-off-by: Donghwa Lee dh09@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
tools/env/fw_env.c | 13 ++---
tools/env/fw_env.config |7 +--
2 files changed, 15 insertions(+), 5 deletions(-)
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index 8ff7052..5a707f6 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -855,6 +855,7 @@ static int flash_write_buf (int dev, int fd, void *buf,
size_t count,
}
erase.start = blockstart;
+#ifndef CONFIG_ENV_IS_IN_MMC
ioctl (fd, MEMUNLOCK, erase);
if (ioctl (fd, MEMERASE, erase) != 0) {
@@ -863,7 +864,7 @@ static int flash_write_buf (int dev, int fd, void *buf,
size_t count,
strerror (errno));
return -1;
}
-
+#endif
if (lseek (fd, blockstart, SEEK_SET) == -1) {
fprintf (stderr,
Seek error on %s: %s\n,
@@ -880,8 +881,9 @@ static int flash_write_buf (int dev, int fd, void *buf,
size_t count,
return -1;
}
+#ifndef CONFIG_ENV_IS_IN_MMC
ioctl (fd, MEMLOCK, erase);
-
+#endif
processed += blocklen;
block_seek = 0;
blockstart += blocklen;
@@ -964,9 +966,10 @@ static int flash_write (int fd_current, int fd_target, int
dev_target)
static int flash_read (int fd)
{
- struct mtd_info_user mtdinfo;
int rc;
+#ifndef CONFIG_ENV_IS_IN_MMC
+ struct mtd_info_user mtdinfo;
rc = ioctl (fd, MEMGETINFO, mtdinfo);
if (rc 0) {
perror (Cannot get MTD information);
@@ -982,6 +985,10 @@ static int flash_read (int fd)
rc = flash_read_buf (dev_current, fd, environment.image,
CONFIG_ENV_SIZE,
DEVOFFSET (dev_current), mtdinfo.type);
+#else
+ rc = flash_read_buf (dev_current, fd, environment.image,
CONFIG_ENV_SIZE,
+DEVOFFSET (dev_current), 0);
+#endif
return (rc != CONFIG_ENV_SIZE) ? -1 : 0;
}
diff --git a/tools/env/fw_env.config b/tools/env/fw_env.config
index c8f12cf..228ded8 100644
--- a/tools/env/fw_env.config
+++ b/tools/env/fw_env.config
@@ -4,8 +4,11 @@
# Notice, that the Number of sectors is ignored on NOR.
# MTD device name Device offset Env. size Flash sector size
Number of sectors
-/dev/mtd1 0x 0x4000 0x4000
-/dev/mtd2 0x 0x4000 0x4000
+#/dev/mtd1 0x 0x4000 0x4000
+#/dev/mtd2 0x 0x4000 0x4000
# NAND example
#/dev/mtd0 0x4000 0x4000 0x2
2
+
+# MMC device name Device offset Env. size Flash sector size
Number of sectors
+/dev/mmcblk0 0x7000 0x1000 0x1000
--
1.6.0.4
___
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