[PATCH 3/3] doc: stm32mp1: fix/improve basic reStructuredText syntax

2024-07-26 Thread Grzegorz Szymaszek
Drop some unnecessary/unintended blockquotes, improve formatting
consistency, simplify tables, add some inline literals, fix several
other minor issues.

Signed-off-by: Grzegorz Szymaszek 
---
 doc/board/st/stm32mp1.rst | 859 +++---
 1 file changed, 421 insertions(+), 438 deletions(-)

diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
index 98167e80618..fc5cc294b51 100644
--- a/doc/board/st/stm32mp1.rst
+++ b/doc/board/st/stm32mp1.rst
@@ -6,20 +6,20 @@ STM32MP1xx boards
 
 This is a quick instruction for setup STMicroelectronics STM32MP1xx boards.
 
-Further information can be found in STMicroelectronics STM32 WIKI_.
+Further information can be found in STMicroelectronics STM32 Wiki_.
 
 Supported devices
 -
 
 U-Boot supports all the STMicroelectronics MPU with the associated boards
 
- - STMP32MP15x SoCs:
+- STMP32MP15x SoCs:
 
   - STM32MP157
   - STM32MP153
   - STM32MP151
 
- - STMP32MP13x SoCs:
+- STMP32MP13x SoCs:
 
   - STM32MP135
   - STM32MP133
@@ -27,25 +27,25 @@ U-Boot supports all the STMicroelectronics MPU with the 
associated boards
 
 Everything is supported in Linux but U-Boot is limited to the boot device:
 
- 1. UART
- 2. SD card/MMC controller (SDMMC)
- 3. NAND controller (FMC)
- 4. NOR controller (QSPI)
- 5. USB controller (OTG DWC2)
- 6. Ethernet controller
+1. UART
+2. SD card/MMC controller (SDMMC)
+3. NAND controller (FMC)
+4. NOR controller (QSPI)
+5. USB controller (OTG DWC2)
+6. Ethernet controller
 
 And the necessary drivers
 
- 1. I2C
- 2. STPMIC1 (PMIC and regulator)
- 3. Clock, Reset, Sysreset
- 4. Fuse (BSEC)
- 5. OP-TEE
- 6. ETH
- 7. USB host
- 8. WATCHDOG
- 9. RNG
- 10. RTC
+1. I2C
+2. STPMIC1 (PMIC and regulator)
+3. Clock, Reset, Sysreset
+4. Fuse (BSEC)
+5. OP-TEE
+6. ETH
+7. USB host
+8. WATCHDOG
+9. RNG
+10. RTC
 
 STM32MP15x
 ``
@@ -54,37 +54,38 @@ The STM32MP15x is a Cortex-A7 MPU aimed at various 
applications.
 
 It features:
 
- - Dual core Cortex-A7 application core (Single on STM32MP151)
- - 2D/3D image composition with GPU (only on STM32MP157)
- - Standard memories interface support
- - Standard connectivity, widely inherited from the STM32 MCU family
- - Comprehensive security support
- - Cortex M4 coprocessor
+- Dual core Cortex-A7 application core (Single on STM32MP151)
+- 2D/3D image composition with GPU (only on STM32MP157)
+- Standard memories interface support
+- Standard connectivity, widely inherited from the STM32 MCU family
+- Comprehensive security support
+- Cortex M4 coprocessor
 
-Each line comes with a security option (cryptography & secure boot) and
-a Cortex-A frequency option:
+Each line comes with a security option (cryptography & secure boot) and a
+Cortex-A frequency option:
 
- - A : Cortex-A7 @ 650 MHz
- - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- - D : Cortex-A7 @ 800 MHz
- - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
+:A: Cortex-A7 @ 650 MHz
+:C: Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
+:D: Cortex-A7 @ 800 MHz
+:F: Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz
 
 Currently the following boards are supported:
 
- + stm32mp157a-dk1.dts
- + stm32mp157c-dk2.dts
- + stm32mp157c-ed1.dts
- + stm32mp157c-ev1.dts
- + stm32mp15xx-dhcor-avenger96.dts
++ stm32mp157a-dk1.dts
++ stm32mp157c-dk2.dts
++ stm32mp157c-ed1.dts
++ stm32mp157c-ev1.dts
++ stm32mp15xx-dhcor-avenger96.dts
 
 The SCMI variant of each board is supported by a specific "scmi" device tree:
- + stm32mp157a-dk1-scmi.dts
- + stm32mp157c-dk2-scmi.dts
- + stm32mp157c-ed1-scmi.dts
- + stm32mp157c-ev1-scmi.dts
+
++ stm32mp157a-dk1-scmi.dts
++ stm32mp157c-dk2-scmi.dts
++ stm32mp157c-ed1-scmi.dts
++ stm32mp157c-ev1-scmi.dts
 
 SCMI variant is used only with stm32mp15_defconfig, when the resources are
-secured with RCC_TZCR.TZEN=1 in OP-TEE. The access to these reset and clock
+secured with ``RCC_TZCR.TZEN=1`` in OP-TEE. The access to these reset and clock
 resources are provided by OP-TEE and the associated SCMI services.
 
 STM32MP13x
@@ -94,157 +95,163 @@ The STM32MP13x is a single Cortex-A7 MPU aimed at various 
applications.
 
 Currently the following boards are supported:
 
- + stm32mp135f-dk.dts
-
++ stm32mp135f-dk.dts
 
 Boot Sequences
 --
 
 2 boot configurations are supported with:
 
-+--++-+--+
-| **ROM**  | **FSBL**   | **SSBL**| **OS**   |
-+ **code** ++-+--+
-|  | First Stage Bootloader | Second Stage Bootloader | Linux Kernel |
-+  ++-+--+
-|  | embedded RAM   | DDR|
-+--++-+--+
-| TrustZone| 

[PATCH 2/3] doc: stm32mp1: fix literal block markers (::)

2024-07-26 Thread Grzegorz Szymaszek
Signed-off-by: Grzegorz Szymaszek 
---
 doc/board/st/stm32mp1.rst | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
index 239e18b5e17..98167e80618 100644
--- a/doc/board/st/stm32mp1.rst
+++ b/doc/board/st/stm32mp1.rst
@@ -265,7 +265,7 @@ Build Procedure
  # make stm32mp15_defconfig
  # make DEVICE_TREE=stm32mp157c-ev1-scmi all
 
-or without SCMI support
+or without SCMI support::
 
  # export KBUILD_OUTPUT=stm32mp15
  # make stm32mp15_defconfig
@@ -796,7 +796,7 @@ You can update the boot device:
 When the board is booting for nor0 or nand0,
 only the MTD partition on the boot devices are available, for example:
 
-- NOR (nor0 = alt 20, nor1 = alt 26) & NAND (nand0 = alt 27) :
+- NOR (nor0 = alt 20, nor1 = alt 26) & NAND (nand0 = alt 27)::
 
   $> dfu-util -d 0483:5720 -a 21 -D tf-a-stm32mp157c-ev1.stm32
   $> dfu-util -d 0483:5720 -a 22 -D tf-a-stm32mp157c-ev1.stm32
-- 
2.43.0


[PATCH 1/3] doc: board: stm32mp1: add missing newline at EOF

2024-07-26 Thread Grzegorz Szymaszek
Signed-off-by: Grzegorz Szymaszek 
---
 doc/board/st/stm32mp1.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst
index 63b44776ffc..239e18b5e17 100644
--- a/doc/board/st/stm32mp1.rst
+++ b/doc/board/st/stm32mp1.rst
@@ -838,4 +838,4 @@ Arm TrustZone technology
   + https://www.op-tee.org/
   + https://optee.readthedocs.io/en/latest/
   + https://optee.readthedocs.io/en/latest/building/devices/stm32mp1.html
-  + https://github.com/OP-TEE/optee_os
\ No newline at end of file
+  + https://github.com/OP-TEE/optee_os
-- 
2.43.0


[PATCH] doc: fix three-dash references in reStructuredText

2024-01-06 Thread Grzegorz Szymaszek
The "Sending patches" and "Patman patch manager" documents refer to the
three-dash, "---", that separates patch parts. The symbol is written in
the documentation in the same form as it is in actual patches: as three
U+002D HYPHEN-MINUS characters. When building the documentation, Sphinx
converts this symbol to a U+2014 EM DASH, that is invalid in this case.

Make the three-dash symbol a reStructuredText inline literal to prevent
its conversion; that is, enclose it in a pair of double backquotes (`).

Signed-off-by: Grzegorz Szymaszek 
---
 doc/develop/sending_patches.rst | 4 ++--
 tools/patman/patman.rst | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/doc/develop/sending_patches.rst b/doc/develop/sending_patches.rst
index 5a6962f102..3f25b1d046 100644
--- a/doc/develop/sending_patches.rst
+++ b/doc/develop/sending_patches.rst
@@ -121,7 +121,7 @@ General Patch Submission Rules
* For new features: a description of the feature and your implementation.
 
 * Additional comments which you don't want included in U-Boot's history can be
-  included below the first "---" in the message body.
+  included below the first "``---``" in the message body.
 
 * If your description gets too long, that's a strong indication that you should
   split up your patch.
@@ -253,7 +253,7 @@ to observe the following rules.
 
 * Please make sure to keep a "change log", i.e. a description of what you have
   changed compared to previous versions of this patch. This change log should
-  be added below the "---" line in the patch, which starts the "comment
+  be added below the "``---``" line in the patch, which starts the "comment
   section", i.e. which contains text that does not get included into the
   actual commit message.
   Note: it is *not* sufficient to provide a change log in some cover letter
diff --git a/tools/patman/patman.rst b/tools/patman/patman.rst
index a8b317eed6..e01355824c 100644
--- a/tools/patman/patman.rst
+++ b/tools/patman/patman.rst
@@ -280,7 +280,7 @@ Series-notes:
 
 Commit-notes:
 Similar, but for a single commit (patch). These notes will appear
-immediately below the --- cut in the patch file::
+immediately below the ``---`` cut in the patch file::
 
 Commit-notes:
 blah blah
-- 
2.43.0


Re: [PATCH 1/7] rng: stm32: rename STM32 RNG driver

2023-09-11 Thread Grzegorz Szymaszek
On Mon, Sep 11, 2023 at 10:27:38AM +0200, Grzegorz Szymaszek wrote:
> [...] Shouldn't the "depends on" be updated as well?
> ("depends on ARCH_STM32 || ARCH_STM32MP", like in STM32_RESET.)

Forgot to add:

Reviewed-by: Grzegorz Szymaszek 


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Re: [PATCH 1/7] rng: stm32: rename STM32 RNG driver

2023-09-11 Thread Grzegorz Szymaszek
Hi,

On Thu, Sep 07, 2023 at 06:21:54PM +0200, Gatien Chevallier wrote:
> diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
> -%<-
> -config RNG_STM32MP1
> - bool "Enable random number generator for STM32MP1"
> +config RNG_STM32
> + bool "Enable random number generator for STM32"
>   depends on ARCH_STM32MP

Shouldn't the "depends on" be updated as well?
("depends on ARCH_STM32 || ARCH_STM32MP", like in STM32_RESET.)


All the best

-- 
Grzegorz Szymaszek


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Re: [PATCH v2] board: stm32mp1: add splash screen on dk2

2023-07-04 Thread Grzegorz Szymaszek
On Tue, Jul 04, 2023 at 07:31:21PM +0200, Dario Binacchi wrote:
> Display the STMicroelectronics logo.
> 
> Signed-off-by: Dario Binacchi 

Reviewed-by: Grzegorz Szymaszek 


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Re: [PATCH] board: stm32mp1: add splash screen on dk2

2023-07-04 Thread Grzegorz Szymaszek
On Tue, Jul 04, 2023 at 11:14:39AM +0200, Dario Binacchi wrote:
> On Tue, Jul 4, 2023 at 10:11 AM Grzegorz Szymaszek  
> wrote:
> > > + ulong logo =
> > > + (ulong)stmicroelectronics_uboot_logo_8bit_rle;
> > > + bmp_display(logo, BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
> > 
> > Technically logo is const.
> 
> int bmp_display(ulong addr, int x, int y);
> And throughout the code, I only find ulong parameters being passed to
> this function.
> Perhaps I can replace "logo" with "addr".

I'm afraid my comment was perhaps too terse: I wanted to point out that
your "ulong logo" variable is assigned to only once, its value is never
changed, so instead of plain "ulong", you could declare its type as
"const ulong". I won't insist on this change since the code is trivial.

Consider simply removing the new variable and just passing
"(ulong)stmicroelectronics_uboot_logo_8bit_rle" directly as the
bmp_display()'s argument, like in
board/st/stm32f746-disco/stm32f746-disco.c.


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Re: [PATCH] board: stm32mp1: add splash screen on dk2

2023-07-04 Thread Grzegorz Szymaszek
Hi,

On Mon, Jul 03, 2023 at 06:27:54PM +0200, Dario Binacchi wrote:
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> -%<-
>  #include 
> +#include 
> +#include 
>  #include 

These two should be put above syscon.h if you want to keep the includes
sorted alphabetically.

> + ulong logo =
> + (ulong)stmicroelectronics_uboot_logo_8bit_rle;
> + bmp_display(logo, BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);

Technically logo is const.


All the best

-- 
Grzegorz


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Re: [PATCH] configs: stih410-b2260: Fix SYS_HZ_CLOCK value

2022-08-24 Thread Grzegorz Szymaszek
Hi,

On Wed, Aug 24, 2022 at 05:06:59PM +0200, Patrice Chotard wrote:
> SYS_HZ_CLOCK was wrongly set to 1MHz whereas it's set to 750MHz
> by default by bootrom.

s/1MHz/1GHz/, it seems. Otherwise:
Reviewed-by: Grzegorz Szymaszek 


All the best

-- 
Grzegorz


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Re: [PATCH v2 1/3] clk: Add directory for STM32 clock drivers

2022-05-21 Thread Grzegorz Szymaszek
On Thu, May 19, 2022 at 05:56:45PM +0200, Patrick Delaunay wrote:
> Add a directory in drivers/clk to regroup the clock drivers for all
> STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or
> CONFIG_ARCH_STM32MP (MPUs with cortex A).

Some nits:
- s/Soc/SoCs/
- s/cortex /Cortex-/

Even if you will not include these two changes, feel free to add:
Reviewed-by: Grzegorz Szymaszek 


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Re: [Uboot-stm32] [PATCH 2/4] clk: stm32mp13: add a STM32MP13 RCC clock driver

2022-05-10 Thread Grzegorz Szymaszek
Hi,

On Tue, May 10, 2022 at 09:51:11AM +0200, Patrick Delaunay wrote:
> Introduce a minimal STM32MP13 RCC driver only to allow bind of RCC MISC
> driver.

Consider s/only/just/ and s/bind of/binding of the/.

> diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile
> -%<-
>  obj-$(CONFIG_CLK_STM32MP1) += clk_stm32mp1.o
> +obj-$(CONFIG_CLK_STM32MP13) += clk-stm32mp13.o
> \ No newline at end of file

Could you add a newline here? I think it was there in the previous
patch. Also, note that the new file name seems to break the convention
of using underscores.


All the best

-- 
Grzegorz


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Re: [PATCH 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply

2021-08-05 Thread Grzegorz Szymaszek
Hi,

On Wed, Jun 02, 2021 at 09:18:57AM +0200, Patrice Chotard wrote:
> On 5/28/21 6:54 PM, Grzegorz Szymaszek wrote:
> > Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
> > corresponding Linux kernel device tree, the supply is set to v3v3
> > (buck4), which is wrong.
> 
> Do you intend to send similar patch to kernel mailing list to fix it ?

I’m sorry for not replying, I missed this question. FWIW, yes, I’ve had
sent a patch[1] and it has since been applied at least on stm32-next and
some stable branches.

[1]: https://lore.kernel.org/linux-arm-kernel/YLj4AMTCi84yO9GO@nx64de-df6d00/

All the best!

-- 
Grzegorz


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[PATCH v2 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL

2021-06-02 Thread Grzegorz Szymaszek
Enable the SDMMC2 device tree node, as well as the pins it uses, in
U-Boot SPL.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
Changes for v2:
   - rebased on current master
   - added a short commit message body

 .../dts/stm32mp157c-odyssey-som-u-boot.dtsi   | 21 +++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
index 6be728846e..4ff848350d 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
@@ -123,3 +123,24 @@
u-boot,dm-pre-reloc;
};
 };
+
+ {
+   u-boot,dm-spl;
+};
+
+_b4_pins_a {
+   u-boot,dm-spl;
+   pins1 {
+   u-boot,dm-spl;
+   };
+   pins2 {
+   u-boot,dm-spl;
+   };
+};
+
+_d47_pins_d {
+   u-boot,dm-spl;
+   pins {
+   u-boot,dm-spl;
+   };
+};
-- 
2.30.2



[PATCH v2 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode

2021-06-02 Thread Grzegorz Szymaszek
Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
Changes for v2:
   - rebased on current master
   - added a short commit message body

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 583812f137..1510a5b364 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -274,6 +274,7 @@
bus-width = <8>;
vmmc-supply = <>;
vqmmc-supply = <>;
+   mmc-ddr-3_3v;
status = "okay";
 };
 
-- 
2.30.2



[PATCH v2 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply

2021-06-02 Thread Grzegorz Szymaszek
Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
corresponding Linux kernel device tree, the supply is set to v3v3
(buck4), which is wrong.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Reviewed-by: Patrice Chotard 
---
Changes for v2:
   - rebased on current master (patch not changed)
   - added Patrice Chotard’s Reviewed-by

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 7323325e60..583812f137 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -273,6 +273,7 @@
st,neg-edge;
bus-width = <8>;
vmmc-supply = <>;
+   vqmmc-supply = <>;
status = "okay";
 };
 
-- 
2.30.2



[PATCH v2 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes

2021-06-02 Thread Grzegorz Szymaszek
Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
bus width from four to eight.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Reviewed-by: Patrice Chotard 
---
Changes for v2:
   - rebased on current master (patch not changed)
   - added Patrice Chotard’s Reviewed-by

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index ed399c00d1..7323325e60 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -264,14 +264,14 @@
 
  {
pinctrl-names = "default", "opendrain", "sleep";
-   pinctrl-0 = <_b4_pins_a>;
-   pinctrl-1 = <_b4_od_pins_a>;
-   pinctrl-2 = <_b4_sleep_pins_a>;
+   pinctrl-0 = <_b4_pins_a _d47_pins_d>;
+   pinctrl-1 = <_b4_od_pins_a _d47_pins_d>;
+   pinctrl-2 = <_b4_sleep_pins_a _d47_sleep_pins_d>;
non-removable;
no-sd;
no-sdio;
st,neg-edge;
-   bus-width = <4>;
+   bus-width = <8>;
vmmc-supply = <>;
status = "okay";
 };
-- 
2.30.2



[PATCH v2 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties

2021-06-02 Thread Grzegorz Szymaszek
The SDMMC2 interface hosts an eMMC. Replace the interface properties
that would only apply to SD cards—“broken-cd” and “disable-wp”—with
relevant ones: “non-removable”, “no-sd” and “no-sdio”.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
Reviewed-by: Patrice Chotard 
---
Changes for v2:
   - rebased on current master (patch not changed)
   - added Patrice Chotard’s Reviewed-by

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index e367a311c4..ed399c00d1 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -267,8 +267,9 @@
pinctrl-0 = <_b4_pins_a>;
pinctrl-1 = <_b4_od_pins_a>;
pinctrl-2 = <_b4_sleep_pins_a>;
-   broken-cd;
-   disable-wp;
+   non-removable;
+   no-sd;
+   no-sdio;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <>;
-- 
2.30.2



[PATCH v2 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A

2021-06-02 Thread Grzegorz Szymaszek
This patchset updates the properties of the SDMMC2 device tree node so
that they match their Linux kernel and Trusted Firmware A counterparts.
Two differences will remain:
— in the Linux kernel device tree, the VQMMC supply is incorrectly set
  to v3v3 (buck4) instead of vdd (buck3);
— in the TF‑A device tree, only the “default” pinctrl is configured.

Additionally, this patchset enables SDMMC2 in SPL.

Changes for v2:
— rebased on current master (no code changes);
— added Patrice Chotard’s Reviewed-by (thanks!);
— added missing commit message bodies.

Grzegorz Szymaszek (5):
  arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
  arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
  arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
  arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
  arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL

 .../dts/stm32mp157c-odyssey-som-u-boot.dtsi   | 21 +++
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 15 +++--
 2 files changed, 30 insertions(+), 6 deletions(-)

-- 
2.30.2



[PATCH 5/5] arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL

2021-05-28 Thread Grzegorz Szymaszek
Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
 .../dts/stm32mp157c-odyssey-som-u-boot.dtsi   | 21 +++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
index 6be728846e..4ff848350d 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som-u-boot.dtsi
@@ -123,3 +123,24 @@
u-boot,dm-pre-reloc;
};
 };
+
+ {
+   u-boot,dm-spl;
+};
+
+_b4_pins_a {
+   u-boot,dm-spl;
+   pins1 {
+   u-boot,dm-spl;
+   };
+   pins2 {
+   u-boot,dm-spl;
+   };
+};
+
+_d47_pins_d {
+   u-boot,dm-spl;
+   pins {
+   u-boot,dm-spl;
+   };
+};
-- 
2.30.2



[PATCH 4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode

2021-05-28 Thread Grzegorz Szymaszek
Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 76a364d4ca..0dfdc29db6 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -270,6 +270,7 @@
bus-width = <8>;
vmmc-supply = <>;
vqmmc-supply = <>;
+   mmc-ddr-3_3v;
status = "okay";
 };
 
-- 
2.30.2



[PATCH 3/5] arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply

2021-05-28 Thread Grzegorz Szymaszek
Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
corresponding Linux kernel device tree, the supply is set to v3v3
(buck4), which is wrong.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 5801b7a968..76a364d4ca 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -269,6 +269,7 @@
st,neg-edge;
bus-width = <8>;
vmmc-supply = <>;
+   vqmmc-supply = <>;
status = "okay";
 };
 
-- 
2.30.2



[PATCH 2/5] arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes

2021-05-28 Thread Grzegorz Szymaszek
Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
bus width from four to eight.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 5c758b0f72..5801b7a968 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -260,14 +260,14 @@
 
  {
pinctrl-names = "default", "opendrain", "sleep";
-   pinctrl-0 = <_b4_pins_a>;
-   pinctrl-1 = <_b4_od_pins_a>;
-   pinctrl-2 = <_b4_sleep_pins_a>;
+   pinctrl-0 = <_b4_pins_a _d47_pins_d>;
+   pinctrl-1 = <_b4_od_pins_a _d47_pins_d>;
+   pinctrl-2 = <_b4_sleep_pins_a _d47_sleep_pins_d>;
non-removable;
no-sd;
no-sdio;
st,neg-edge;
-   bus-width = <4>;
+   bus-width = <8>;
vmmc-supply = <>;
status = "okay";
 };
-- 
2.30.2



[PATCH 1/5] arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties

2021-05-28 Thread Grzegorz Szymaszek
The SDMMC2 interface hosts an eMMC. Replace the interface properties
that would only apply to SD cards—“broken-cd” and “disable-wp”—with
relevant ones: “non-removable”, “no-sd” and “no-sdio”.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 83ff2e7ce1..5c758b0f72 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -263,8 +263,9 @@
pinctrl-0 = <_b4_pins_a>;
pinctrl-1 = <_b4_od_pins_a>;
pinctrl-2 = <_b4_sleep_pins_a>;
-   broken-cd;
-   disable-wp;
+   non-removable;
+   no-sd;
+   no-sdio;
st,neg-edge;
bus-width = <4>;
vmmc-supply = <>;
-- 
2.30.2



[PATCH 0/5] arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A

2021-05-28 Thread Grzegorz Szymaszek
This patchset updates the properties of the SDMMC2 device tree node so
that they match their Linux kernel and Trusted Firmware A counterparts.
Two differences will remain:
— in the Linux kernel device tree, the VQMMC supply is incorrectly set
  to v3v3 (buck4) instead of vdd (buck3);
— in the TF‑A device tree, only the “default” pinctrl is configured.

Additionally, this patchset enables SDMMC2 in SPL.

Grzegorz Szymaszek (5):
  arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
  arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
  arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
  arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
  arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL

 .../dts/stm32mp157c-odyssey-som-u-boot.dtsi   | 21 +++
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 15 +++--
 2 files changed, 30 insertions(+), 6 deletions(-)

-- 
2.30.2



Re: [PORT] Help Porting U-BOOT master branch to GT90X V4 sun7i a20 tablet board

2021-05-25 Thread Grzegorz Szymaszek
Hi,

You may find some help on the linux-sunxi Wiki:
. Consider adding a page for your device as
well.

Best of luck!

-- 
Grzegorz


signature.asc
Description: PGP signature


[PATCH] arm: dts: stm32mp157c-odyssey-som: enable the RNG1

2021-04-19 Thread Grzegorz Szymaszek
Enable the true random number generator. It can be used, for example, to
generate partition UUIDs when partitioning with the gpt command. The
generator is already enabled in the device trees of several other
STM32MP1‐based boards, like DKx or DHCOM.

Signed-off-by: Grzegorz Szymaszek 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi 
b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 83ff2e7ce1..e367a311c4 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -258,6 +258,10 @@
status = "okay";
 };
 
+ {
+   status = "okay";
+};
+
  {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <_b4_pins_a>;
-- 
2.30.2