[U-Boot] [PATCH v5 2/7] cros: add I2C support for cros_ec

[Hung-ying Tyan]

This patch adds I2C support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added Commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_i2c.c | 199 +
 2 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_i2c.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 33fe822..9363ef9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
new file mode 100644
index 000..b0060ac
--- /dev/null
+++ b/drivers/misc/cros_ec_i2c.c
@@ -0,0 +1,199 @@
+/*
+ * Chromium OS cros_ec driver - I2C interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include i2c.h
+#include cros_ec.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, #b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int old_bus = 0;
+   /* version8, cmd8, arglen8, out8[dout_len], csum8 */
+   int out_bytes = dout_len + 4;
+   /* response8, arglen8, in8[din_len], checksum8 */
+   int in_bytes = din_len + 3;
+   uint8_t *ptr;
+   /* Receive input data, so that args will be dword aligned */
+   uint8_t *in_ptr;
+   int ret;
+
+   old_bus = i2c_get_bus_num();
+
+   /*
+* Sanity-check I/O sizes given transaction overhead in internal
+* buffers.
+*/
+   if (out_bytes  sizeof(dev-dout)) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+   assert(dout_len = 0);
+   assert(dinp);
+
+   /*
+* Copy command and data into output buffer so we can do a single I2C
+* burst transaction.
+*/
+   ptr = dev-dout;
+
+   /*
+* in_ptr starts of pointing to a dword-aligned input data buffer.
+* We decrement it back by the number of header bytes we expect to
+* receive, so that the first parameter of the resulting input data
+* will be dword aligned.
+*/
+   in_ptr = dev-din + sizeof(int64_t);
+   if (!dev-cmd_version_is_supported) {
+   /* Send an old-style command */
+   *ptr++ = cmd;
+   out_bytes = dout_len + 1;
+   in_bytes = din_len + 2;
+   in_ptr--;   /* Expect just a status byte */
+   } else {
+   *ptr++ = EC_CMD_VERSION0 + cmd_version;
+   *ptr++ = cmd;
+   *ptr++ = dout_len;
+   in_ptr -= 2;/* Expect status, length bytes */
+   }
+   memcpy(ptr, dout, dout_len);
+   ptr += dout_len;
+
+   if (dev-cmd_version_is_supported)
+   *ptr++ = (uint8_t)
+cros_ec_calc_checksum(dev-dout, dout_len + 3);
+
+   /* Set to the proper i2c bus */
+   if (i2c_set_bus_num(dev-bus_num)) {
+   debug(%s: Cannot change to I2C bus %d

[U-Boot] [PATCH v5 0/7] Add cros-ec protocol driver and enable it in smdk5250

[Hung-ying Tyan]

This patch series adds the drivers for the cros-ec protocol that is used to
communicate with the Chrome OS Embedded Controller (EC). The series also enables
its use in Google Snow which is based on smdk5250.

The last patch in this series depends on the patch in the MMC series that brings
in exynos5-dt.c:
http://patchwork.ozlabs.org/patch/240084.
-

Changes in v5:
- Change ec-interrupt gpio pin from 174 to 782. This has to be changed again
  after the GPIO pin numbering patches
  (http://patchwork.ozlabs.org/patch/233417) are in.
- Add exynos: tag wherever applicable.
- Add/change dependency description.

Changes in v4:
- Removed unrelated exynos-spi.txt.
- Moved cros-ec-keyb.txt to the cros-ec-keyb patch.
- Removed old code and comment.

Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added gpio node to exynos5250.dtsi.
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

Hung-ying Tyan (7):
  cros: add cros_ec driver
  cros: add I2C support for cros_ec
  cros: exynos: add SPI support for cros_ec
  cros: add LPC support for cros_ec
  cros: adds cros_ec keyboard driver
  cros: exynos: add cros-ec device nodes to exynos5250-snow.dts
  cros: exynos: enable cros-ec for smdk5250

 README  |5 +
 arch/arm/dts/exynos5250.dtsi|3 +
 board/samsung/dts/exynos5250-snow.dts   |   81 ++
 board/samsung/smdk5250/exynos5-dt.c |   45 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |   79 ++
 doc/device-tree-bindings/misc/cros-ec.txt   |   38 +
 drivers/input/Makefile  |1 +
 drivers/input/cros_ec_keyb.c|  261 
 drivers/misc/Makefile   |4 +
 drivers/misc/cros_ec.c  | 1304 
 drivers/misc/cros_ec_i2c.c  |  199 
 drivers/misc/cros_ec_lpc.c  |  283 +
 drivers/misc/cros_ec_spi.c  |  161 +++
 drivers/spi/exynos_spi.c|   22 +
 include/configs/exynos5250-dt.h |   10 +-
 include/cros_ec.h   |  449 +++
 include/cros_ec_message.h   |   44 +
 include/ec_commands.h   | 1440 +++
 include/fdtdec.h|2 +
 include/spi.h   |   16 +
 lib/fdtdec.c|2 +
 21 files changed, 4448 insertions(+), 1 deletion(-)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 doc/device-tree-bindings/misc/cros-ec.txt
 create mode 100644 drivers/input/cros_ec_keyb.c
 create mode 100644 drivers/misc/cros_ec.c
 create mode 100644 drivers/misc/cros_ec_i2c.c
 create mode 100644 drivers/misc/cros_ec_lpc.c
 create mode 100644 drivers/misc/cros_ec_spi.c
 create mode 100644 include/cros_ec.h
 create mode 100644 include/cros_ec_message.h
 create mode 100644 include/ec_commands.h

-- 
1.8.2.1

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH v5 5/7] cros: adds cros_ec keyboard driver

[Hung-ying Tyan]

This patch adds the driver for keyboard that's controlled by ChromeOS EC.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v5: None
Changes in v4:
- Added cros-ec-keyb.txt.

Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 README  |   5 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |  79 +++
 drivers/input/Makefile  |   1 +
 drivers/input/cros_ec_keyb.c| 261 
 include/fdtdec.h|   1 +
 lib/fdtdec.c|   1 +
 6 files changed, 348 insertions(+)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 drivers/input/cros_ec_keyb.c

diff --git a/README b/README
index 0d37d56..55a9e35 100644
--- a/README
+++ b/README
@@ -1412,6 +1412,11 @@ CBFS (Coreboot Filesystem) support
Export function i8042_kbd_init, i8042_tstc and i8042_getc
for cfb_console. Supports cursor blinking.
 
+   CONFIG_CROS_EC_KEYB
+   Enables a Chrome OS keyboard using the CROS_EC interface.
+   This uses CROS_EC to communicate with a second microcontroller
+   which provides key scans on request.
+
 - Video support:
CONFIG_VIDEO
 
diff --git a/doc/device-tree-bindings/input/cros-ec-keyb.txt 
b/doc/device-tree-bindings/input/cros-ec-keyb.txt
new file mode 100644
index 000..3118276
--- /dev/null
+++ b/doc/device-tree-bindings/input/cros-ec-keyb.txt
@@ -0,0 +1,79 @@
+CROS_EC Keyboard
+
+The CROS_EC (Matrix Keyboard Protocol) allows communcation with a secondary
+micro used for keyboard, and possible other features.
+
+The CROS_EC keyboard uses this protocol to receive key scans and produce input
+in U-Boot.
+
+Required properties :
+- compatible : google,cros-ec-keyb
+- google,key-rows : Number of key rows
+- google,key-columns : Number of key columns
+
+Optional properties, in addition to those specified by the shared
+matrix-keyboard bindings:
+
+- linux,fn-keymap: a second keymap, same specification as the
+  matrix-keyboard-controller spec but to be used when the KEY_FN modifier
+  key is pressed.
+- google,repeat-delay-ms : delay in milliseconds before repeat starts
+- google,repeat-rate-ms : delay between each subsequent key press
+- google,ghost-filter : enable ghost filtering for this device
+
+Example, taken from daisy:
+
+cros-ec-keyb {
+   compatible = google,cros-ec-keyb;
+   google,key-rows = 8;
+   google,key-columns = 13;
+   google,ghost-filter;
+   google,repeat-delay-ms = 240;
+   google,repeat-rate-ms = 30;
+   /*
+   * Keymap entries take the form of 0xRRCC where
+   * RR=Row CC=Column =Key Code
+   * The values below are for a US keyboard layout and
+   * are taken from the Linux driver. Note that the
+   * 102ND key is not used for US keyboards.
+   */
+   linux,keymap = 
+   /* CAPSLCK F1 B  F10 */
+   0x0001003a 0x0002003c 0x00030030 0x00040044
+   /* N   =  R_ALT  ESC */
+   0x00060031 0x0008000d 0x000a0064 0x01010001
+   /* F4  G  F7 H   */
+   0x0102003e 0x01030022 0x01040041 0x01060023
+   /* '   F9 BKSPACEL_CTRL  */
+   0x01080028 0x01090043 0x010b000e 0x021d
+   /* TAB F3 T  F6  */
+   0x0201000f 0x0202003d 0x02030014 0x02040040
+   /* ]   Y  102ND  [   */
+   0x0205001b 0x02060015 0x02070056 0x0208001a
+   /* F8  GRAVE  F2 5   */
+   0x02090042 0x03010029 0x0302003c 0x03030006
+   /* F5  6  -  \   */
+   0x0304003f 0x03060007 0x0308000c 0x030b002b
+   /* R_CTRL  A  D  F   */
+   0x0461 0x0401001e 0x04020020 0x04030021
+   /* S   K  J  ;   */
+   0x0404001f 0x04050025 0x04060024 0x04080027
+   /* L   ENTER  Z  C   */
+   0x04090026 0x040b001c 0x0501002c 0x0502002e
+   /* V   X  ,  M   */
+   0x0503002f 0x0504002d 0x05050033 0x05060032
+   /* L_SHIFT /  .  SPACE   */
+   0x0507002a 0x05080035 0x05090034 0x050B0039
+   /* 1

[U-Boot] [PATCH v5 4/7] cros: add LPC support for cros_ec

[Hung-ying Tyan]

This patch adds LPC support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_lpc.c | 283 +
 2 files changed, 284 insertions(+)
 create mode 100644 drivers/misc/cros_ec_lpc.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 18209ec..3553ff6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
new file mode 100644
index 000..cf0435b
--- /dev/null
+++ b/drivers/misc/cros_ec_lpc.c
@@ -0,0 +1,283 @@
+/*
+ * Chromium OS cros_ec driver - LPC interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include command.h
+#include cros_ec.h
+#include asm/io.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, ##b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+static int wait_for_sync(struct cros_ec_dev *dev)
+{
+   unsigned long start;
+
+   start = get_timer(0);
+   while (inb(EC_LPC_ADDR_HOST_CMD)  EC_LPC_STATUS_BUSY_MASK) {
+   if (get_timer(start)  1000) {
+   debug(%s: Timeout waiting for CROS_EC sync\n,
+ __func__);
+   return -1;
+   }
+   }
+
+   return 0;
+}
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout  Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp  Place to put pointer to response data
+ * @param din_len   Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+static int old_lpc_command(struct cros_ec_dev *dev, uint8_t cmd,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int ret, i;
+
+   if (dout_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   if (din_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   debug_trace(cmd: %02x, , cmd);
+   for (i = 0; i  dout_len; i++) {
+   debug_trace(%02x , dout[i]);
+   outb(dout[i], EC_LPC_ADDR_OLD_PARAM + i);
+   }
+   outb(cmd, EC_LPC_ADDR_HOST_CMD);
+   debug_trace(\n);
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   ret = inb(EC_LPC_ADDR_HOST_DATA);
+   if (ret) {
+   debug(%s: CROS_EC result code %d\n, __func__, ret);
+   return -ret;
+   }
+
+   debug_trace(resp: %02x, , ret);
+   for (i = 0; i  din_len; i++) {
+   dev-din[i] = inb

[U-Boot] [PATCH v5 3/7] cros: exynos: add SPI support for cros_ec

[Hung-ying Tyan]

This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan ty...@chromium.org
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org

---
Changes in v5:
- Add exynos: tag as the patch includes changes in exynos_spi.c.

Changes in v4:
- Removed old code and comment.

Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_spi.c | 161 +
 drivers/spi/exynos_spi.c   |  22 +++
 include/spi.h  |  16 +
 4 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_spi.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9363ef9..18209ec 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
+COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
new file mode 100644
index 000..e15c833
--- /dev/null
+++ b/drivers/misc/cros_ec_spi.c
@@ -0,0 +1,161 @@
+/*
+ * Chromium OS cros_ec driver - SPI interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include cros_ec.h
+#include spi.h
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp Returns pointer to response data. This will be
+ * untouched unless we return a value  0.
+ * @param din_len  Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int in_bytes = din_len + 4; /* status, length, checksum, trailer */
+   uint8_t *out;
+   uint8_t *p;
+   int csum, len;
+   int rv;
+
+   /*
+* Sanity-check input size to make sure it plus transaction overhead
+* fits in the internal device buffer.
+*/
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   /* We represent message length as a byte */
+   if (dout_len  0xff) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   /*
+* Clear input buffer so we don't get false hits for MSG_HEADER
+*/
+   memset(dev-din, '\0', in_bytes);
+
+   if (spi_claim_bus(dev-spi)) {
+   debug(%s: Cannot claim SPI bus\n, __func__);
+   return -1;
+   }
+
+   out = dev-dout;
+   out[0] = cmd_version;
+   out[1] = cmd;
+   out[2] = (uint8_t)dout_len;
+   memcpy(out + 3, dout, dout_len);
+   csum = cros_ec_calc_checksum(out, 3)
+  + cros_ec_calc_checksum(dout, dout_len);
+   out[3 + dout_len] = (uint8_t)csum;
+
+   /*
+* Send output data and receive input data starting such that the
+* message body will be dword aligned.
+*/
+   p = dev-din + sizeof(int64_t) - 2;
+   len = dout_len + 4;
+   cros_ec_dump_data

[U-Boot] [PATCH v5 6/7] cros: exynos: add cros-ec device nodes to exynos5250-snow.dts

[Hung-ying Tyan]

This patch adds cros-ec related device nodes to exynos5250-snow.dts.
It also adds a gpio node to exynos5250.dtsi.

Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v5:
- Change ec-interrupt gpio pin from 174 to 782. This has to be changed again
  after the GPIO pin numbering patches
  (http://patchwork.ozlabs.org/patch/233417) are in.

Changes in v4:
- Added commit message.

Changes in v3: None
Changes in v2:
- Added gpio node to exynos5250.dtsi.
- Dropped the period from commit subject.

 arch/arm/dts/exynos5250.dtsi  |  3 ++
 board/samsung/dts/exynos5250-snow.dts | 81 +++
 2 files changed, 84 insertions(+)

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 9c4e686..2d6dfff 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -201,4 +201,7 @@
reg = 0x1223 0x1000;
interrupts = 0 78 0;
};
+
+   gpio: gpio {
+   };
 };
diff --git a/board/samsung/dts/exynos5250-snow.dts 
b/board/samsung/dts/exynos5250-snow.dts
index 24658c1..d2ccc66 100644
--- a/board/samsung/dts/exynos5250-snow.dts
+++ b/board/samsung/dts/exynos5250-snow.dts
@@ -32,6 +32,33 @@
spi4 = /spi@131b;
};
 
+   i2c4: i2c@12ca {
+   cros-ec@1e {
+   reg = 0x1e;
+   compatible = google,cros-ec;
+   i2c-max-frequency = 10;
+   ec-interrupt = gpio 782 1;
+   };
+
+   power-regulator@48 {
+   compatible = ti,tps65090;
+   reg = 0x48;
+   };
+   };
+
+   spi@131b {
+   spi-max-frequency = 100;
+   spi-deactivate-delay = 100;
+   cros-ec@0 {
+   reg = 0;
+   compatible = google,cros-ec;
+   spi-max-frequency = 500;
+   ec-interrupt = gpio 782 1;
+   optimise-flash-write;
+   status = disabled;
+   };
+   };
+
sound@12d6 {
samsung,i2s-epll-clock-frequency = 19200;
samsung,i2s-sampling-rate = 48000;
@@ -69,4 +96,58 @@
samsung,dc-value= 25;
};
 
+   cros-ec-keyb {
+   compatible = google,cros-ec-keyb;
+   google,key-rows = 8;
+   google,key-columns = 13;
+   google,repeat-delay-ms = 240;
+   google,repeat-rate-ms = 30;
+   google,ghost-filter;
+   /*
+* Keymap entries take the form of 0xRRCC where
+* RR=Row CC=Column =Key Code
+* The values below are for a US keyboard layout and
+* are taken from the Linux driver. Note that the
+* 102ND key is not used for US keyboards.
+*/
+   linux,keymap = 
+   /* CAPSLCK F1 B  F10 */
+   0x0001003a 0x0002003b 0x00030030 0x00040044
+   /* N   =  R_ALT  ESC */
+   0x00060031 0x0008000d 0x000a0064 0x01010001
+   /* F4  G  F7 H   */
+   0x0102003e 0x01030022 0x01040041 0x01060023
+   /* '   F9 BKSPACEL_CTRL  */
+   0x01080028 0x01090043 0x010b000e 0x021d
+   /* TAB F3 T  F6  */
+   0x0201000f 0x0202003d 0x02030014 0x02040040
+   /* ]   Y  102ND  [   */
+   0x0205001b 0x02060015 0x02070056 0x0208001a
+   /* F8  GRAVE  F2 5   */
+   0x02090042 0x03010029 0x0302003c 0x03030006
+   /* F5  6  -  \   */
+   0x0304003f 0x03060007 0x0308000c 0x030b002b
+   /* R_CTRL  A  D  F   */
+   0x0461 0x0401001e 0x04020020 0x04030021
+   /* S   K  J  ;   */
+   0x0404001f 0x04050025 0x04060024 0x04080027
+   /* L   ENTER  Z  C   */
+   0x04090026 0x040b001c 0x0501002c 0x0502002e
+   /* V   X  ,  M   */
+   0x0503002f 0x0504002d 0x05050033 0x05060032
+   /* L_SHIFT /  .  SPACE   */
+   0x0507002a 0x05080035 0x05090034 0x050B0039
+   /* 1   3  4  2   */
+   0x06010002 0x06020004 0x06030005 0x06040003
+   /* 8   7  0  9

[U-Boot] [PATCH v5 7/7] cros: exynos: enable cros-ec for smdk5250

[Hung-ying Tyan]

This patch initiates cros-ec in board_init() to enable it for smdk5250.

This patch depends on the patch in the MMC series that brings in exynos5-dt.c.
Refer to http://patchwork.ozlabs.org/patch/240084.

Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v5:
- Add exynos: tag.
- Add dependency description.

Changes in v4: None
Changes in v3: None
Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added commit message.
- Dropped the period from commit subject.

 board/samsung/smdk5250/exynos5-dt.c | 45 +
 include/configs/exynos5250-dt.h | 10 -
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/board/samsung/smdk5250/exynos5-dt.c 
b/board/samsung/smdk5250/exynos5-dt.c
index b01fe72..8be3192 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -21,6 +21,7 @@
  */
 
 #include common.h
+#include cros_ec.h
 #include fdtdec.h
 #include asm/io.h
 #include errno.h
@@ -39,6 +40,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct local_info {
+   struct cros_ec_dev *cros_ec_dev;/* Pointer to cros_ec device */
+   int cros_ec_err;/* Error for cros_ec, 0 if ok */
+};
+
+static struct local_info local;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
 int board_usb_vbus_init(void)
 {
@@ -55,12 +63,30 @@ int board_usb_vbus_init(void)
 }
 #endif
 
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+   return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+   local.cros_ec_err = cros_ec_init(blob, local.cros_ec_dev);
+   if (local.cros_ec_err)
+   return -1;  /* Will report in board_late_init() */
+
+   return 0;
+}
+
 int board_init(void)
 {
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 #ifdef CONFIG_EXYNOS_SPI
spi_init();
 #endif
+
+   if (board_init_cros_ec_devices(gd-fdt_blob))
+   return -1;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
 #endif
@@ -337,3 +363,22 @@ int board_early_init_f(void)
return err;
 }
 #endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   stdio_print_current_devices();
+
+   if (local.cros_ec_err) {
+   /* Force console on */
+   gd-flags = ~GD_FLG_SILENT;
+
+   printf(cros-ec communications failure %d\n,
+  local.cros_ec_err);
+   puts(\nPlease reset with Power+Refresh\n\n);
+   panic(Cannot init cros-ec device);
+   return -1;
+   }
+   return 0;
+}
+#endif
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 97c8825..289db00 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -82,11 +82,19 @@
 #define CONFIG_BAUDRATE115200
 #define EXYNOS5_DEFAULT_UART_OFFSET0x01
 
+/* Enable keyboard */
+#define CONFIG_CROS_EC /* CROS_EC protocol */
+#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
+#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
+#define CONFIG_CROS_EC_KEYB/* CROS_EC keyboard input */
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_KEYBOARD
+
 /* Console configuration */
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define EXYNOS_DEVICE_SETTINGS \
-   stdin=serial\0 \
+   stdin=serial,cros-ec-keyb\0 \
stdout=serial,lcd\0 \
stderr=serial,lcd\0
 
-- 
1.8.2.1

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Re: [U-Boot] [PATCH] Exynos5: i2c: Fix read NACK handling and remove some redundancy

[Hung-ying Tyan]

On which branch is this patch based? It looks quite off from ToT.


On Mon, Mar 25, 2013 at 7:46 PM, Akshay Saraswat aksha...@samsung.comwrote:

 From: Gabe Black gabebl...@google.com

 The exynos s3c24x0 i2c driver wouldn't do the right thing when a NACK was
 received on a read because it didn't attempt a read before waiting for the
 read to finish. Putting a call to ReadWriteByte in the NACK path fixed a
 problem where getting a NACK reading from a device would jam up the bus and
 prevent future accesses like probing from working.

 Because other than the ReadWriteByte call the NACK and normal paths were
 almost the same thing, and to avoid future instances of the NACK path not
 working because it's not exercised normally, this change also consolidates
 those two paths.

 Signed-off-by: Gabe Black gabebl...@google.com
 Signed-off-by: Akshay Saraswat aksha...@samsung.com
 ---
  drivers/i2c/s3c24x0_i2c.c | 53
 ---
  1 file changed, 18 insertions(+), 35 deletions(-)

 diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
 index d2b4eb0..91298a7 100644
 --- a/drivers/i2c/s3c24x0_i2c.c
 +++ b/drivers/i2c/s3c24x0_i2c.c
 @@ -366,21 +366,25 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
 break;

 case I2C_READ:
 -   if (result == I2C_OK) {
 -   writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
 -   writel(chip, i2c-iicds);
 -   /* send START */
 -   writel(readl(i2c-iicstat) | I2C_START_STOP,
 -  i2c-iicstat);
 -   ReadWriteByte(i2c);
 -   result = WaitForXfer(i2c);
 +   {
 +   int was_ok = (result == I2C_OK);
 +
 +   writel(chip, i2c-iicds);
 +   /* resend START */
 +   writel(I2C_MODE_MR | I2C_TXRX_ENA |
 +   I2C_START_STOP, i2c-iicstat);
 +   ReadWriteByte(i2c);
 +   result = WaitForXfer(i2c);
 +
 +   if (was_ok || IsACK(i2c)) {
 i = 0;
 while ((i  data_len)  (result == I2C_OK)) {
 /* disable ACK for final READ */
 -   if (i == data_len - 1)
 -   writel(readl(i2c-iiccon)
 -~I2CCON_ACKGEN,
 -   i2c-iiccon);
 +   if (i == data_len - 1) {
 +   writel(readl(i2c-iiccon) 
 + ~I2CCON_ACKGEN,
 + i2c-iiccon);
 +   }
 ReadWriteByte(i2c);
 result = WaitForXfer(i2c);
 data[i] = readl(i2c-iicds);
 @@ -388,35 +392,14 @@ static int i2c_transfer(struct s3c24x0_i2c *i2c,
 }

 } else {
 -   writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
 -   writel(chip, i2c-iicds);
 -   /* send START */
 -   writel(readl(i2c-iicstat) | I2C_START_STOP,
 -  i2c-iicstat);
 -   result = WaitForXfer(i2c);
 -
 -   if (IsACK(i2c)) {
 -   i = 0;
 -   while ((i  data_len)  (result ==
 I2C_OK)) {
 -   /* disable ACK for final READ */
 -   if (i == data_len - 1)
 -   writel(readl(i2c-iiccon)
 
 -   ~I2CCON_ACKGEN,
 -   i2c-iiccon);
 -   ReadWriteByte(i2c);
 -   result = WaitForXfer(i2c);
 -   data[i] = readl(i2c-iicds);
 -   i++;
 -   }
 -   } else {
 -   result = I2C_NACK;
 -   }
 +   result = I2C_NACK;
 }

 /* send STOP */
 writel(I2C_MODE_MR | I2C_TXRX_ENA, i2c-iicstat);
 ReadWriteByte(i2c);
 break;
 +   }

 default:
 debug(i2c_transfer: bad call\n);
 --
 1.8.0

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[U-Boot] [PATCH v4 0/7] Add cros-ec protocol driver and enable it in smdk5250

[Hung-ying Tyan]

This patch series adds the drivers for the cros-ec protocol that is used to
communicate with the ChromeOS Embedded Controller (EC). The series also enables
its use in Google Snow based on smdk5250.

The series depends on the following patches:
1) http://patchwork.ozlabs.org/patch/217347 add dts file for Snow
2) mmc series: http://patchwork.ozlabs.org/patch/225008
3) power patches needed by one of the mmc patches
   http://patchwork.ozlabs.org/patch/220060 EXYNOS5: Add function to setup set 
ps hold
   http://patchwork.ozlabs.org/patch/220061 SMDK5250: Add PMIC voltage settings 
(needed by one of the mmc patches)
-

Changes in v4:
- Removed unrelated exynos-spi.txt.
- Moved cros-ec-keyb.txt to the cros-ec-keyb patch.
- Removed old code and comment.

Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added gpio node to exynos5250.dtsi.
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

Hung-ying Tyan (7):
  cros: add cros_ec driver
  cros: add I2C support for cros_ec
  cros: add SPI support for cros_ec
  cros: add LPC support for cros_ec
  cros: adds cros_ec keyboard driver
  cros: exynos: add cros-ec device nodes to exynos5250-snow.dts
  cros: enable cros-ec for smdk5250

 README  |5 +
 arch/arm/dts/exynos5250.dtsi|3 +
 board/samsung/dts/exynos5250-snow.dts   |   82 ++
 board/samsung/smdk5250/exynos5-dt.c |   45 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |   79 ++
 doc/device-tree-bindings/misc/cros-ec.txt   |   38 +
 drivers/input/Makefile  |1 +
 drivers/input/cros_ec_keyb.c|  261 
 drivers/misc/Makefile   |4 +
 drivers/misc/cros_ec.c  | 1304 
 drivers/misc/cros_ec_i2c.c  |  199 
 drivers/misc/cros_ec_lpc.c  |  283 +
 drivers/misc/cros_ec_spi.c  |  161 +++
 drivers/spi/exynos_spi.c|   22 +
 include/configs/exynos5250-dt.h |   10 +-
 include/cros_ec.h   |  449 +++
 include/cros_ec_message.h   |   44 +
 include/ec_commands.h   | 1440 +++
 include/fdtdec.h|2 +
 include/spi.h   |   16 +
 lib/fdtdec.c|2 +
 21 files changed, 4449 insertions(+), 1 deletion(-)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 doc/device-tree-bindings/misc/cros-ec.txt
 create mode 100644 drivers/input/cros_ec_keyb.c
 create mode 100644 drivers/misc/cros_ec.c
 create mode 100644 drivers/misc/cros_ec_i2c.c
 create mode 100644 drivers/misc/cros_ec_lpc.c
 create mode 100644 drivers/misc/cros_ec_spi.c
 create mode 100644 include/cros_ec.h
 create mode 100644 include/cros_ec_message.h
 create mode 100644 include/ec_commands.h

-- 
1.8.1.3

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[U-Boot] [PATCH v4 4/7] cros: add LPC support for cros_ec

[Hung-ying Tyan]

This patch adds LPC support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_lpc.c | 283 +
 2 files changed, 284 insertions(+)
 create mode 100644 drivers/misc/cros_ec_lpc.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 18209ec..3553ff6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
new file mode 100644
index 000..cf0435b
--- /dev/null
+++ b/drivers/misc/cros_ec_lpc.c
@@ -0,0 +1,283 @@
+/*
+ * Chromium OS cros_ec driver - LPC interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include command.h
+#include cros_ec.h
+#include asm/io.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, ##b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+static int wait_for_sync(struct cros_ec_dev *dev)
+{
+   unsigned long start;
+
+   start = get_timer(0);
+   while (inb(EC_LPC_ADDR_HOST_CMD)  EC_LPC_STATUS_BUSY_MASK) {
+   if (get_timer(start)  1000) {
+   debug(%s: Timeout waiting for CROS_EC sync\n,
+ __func__);
+   return -1;
+   }
+   }
+
+   return 0;
+}
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout  Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp  Place to put pointer to response data
+ * @param din_len   Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+static int old_lpc_command(struct cros_ec_dev *dev, uint8_t cmd,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int ret, i;
+
+   if (dout_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   if (din_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   debug_trace(cmd: %02x, , cmd);
+   for (i = 0; i  dout_len; i++) {
+   debug_trace(%02x , dout[i]);
+   outb(dout[i], EC_LPC_ADDR_OLD_PARAM + i);
+   }
+   outb(cmd, EC_LPC_ADDR_HOST_CMD);
+   debug_trace(\n);
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   ret = inb(EC_LPC_ADDR_HOST_DATA);
+   if (ret) {
+   debug(%s: CROS_EC result code %d\n, __func__, ret);
+   return -ret;
+   }
+
+   debug_trace(resp: %02x, , ret);
+   for (i = 0; i  din_len; i++) {
+   dev-din[i] = inb(EC_LPC_ADDR_OLD_PARAM

[U-Boot] [PATCH v4 6/7] cros: exynos: add cros-ec device nodes to exynos5250-snow.dts

[Hung-ying Tyan]

This patch adds cros-ec related device nodes to exynos5250-snow.dts.
It also adds a gpio node to exynos5250.dtsi.

Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v4:
- Added commit message.

Changes in v3: None
Changes in v2:
- Added gpio node to exynos5250.dtsi.
- Dropped the period from commit subject.

 arch/arm/dts/exynos5250.dtsi  |  3 ++
 board/samsung/dts/exynos5250-snow.dts | 82 +++
 2 files changed, 85 insertions(+)

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 6c08eb7..2644131 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -182,4 +182,7 @@
reg = 0x1223 0x1000;
interrupts = 0 78 0;
};
+
+   gpio: gpio {
+   };
 };
diff --git a/board/samsung/dts/exynos5250-snow.dts 
b/board/samsung/dts/exynos5250-snow.dts
index af788a6..a7526e5 100644
--- a/board/samsung/dts/exynos5250-snow.dts
+++ b/board/samsung/dts/exynos5250-snow.dts
@@ -43,6 +43,33 @@
};
};
 
+   i2c4: i2c@12ca {
+   cros-ec@1e {
+   reg = 0x1e;
+   compatible = google,cros-ec;
+   i2c-max-frequency = 10;
+   ec-interrupt = gpio 174 1;
+   };
+
+   power-regulator@48 {
+   compatible = ti,tps65090;
+   reg = 0x48;
+   };
+   };
+
+   spi@131b {
+   spi-max-frequency = 100;
+   spi-deactivate-delay = 100;
+   cros-ec@0 {
+   reg = 0;
+   compatible = google,cros-ec;
+   spi-max-frequency = 500;
+   ec-interrupt = gpio 174 1;
+   optimise-flash-write;
+   status = disabled;
+   };
+   };
+
sound@12d6 {
samsung,i2s-epll-clock-frequency = 19200;
samsung,i2s-sampling-rate = 48000;
@@ -66,4 +93,59 @@
compatible = maxim,max77686_pmic;
};
};
+
+   cros-ec-keyb {
+   compatible = google,cros-ec-keyb;
+   google,key-rows = 8;
+   google,key-columns = 13;
+   google,repeat-delay-ms = 240;
+   google,repeat-rate-ms = 30;
+   google,ghost-filter;
+   /*
+* Keymap entries take the form of 0xRRCC where
+* RR=Row CC=Column =Key Code
+* The values below are for a US keyboard layout and
+* are taken from the Linux driver. Note that the
+* 102ND key is not used for US keyboards.
+*/
+   linux,keymap = 
+   /* CAPSLCK F1 B  F10 */
+   0x0001003a 0x0002003b 0x00030030 0x00040044
+   /* N   =  R_ALT  ESC */
+   0x00060031 0x0008000d 0x000a0064 0x01010001
+   /* F4  G  F7 H   */
+   0x0102003e 0x01030022 0x01040041 0x01060023
+   /* '   F9 BKSPACEL_CTRL  */
+   0x01080028 0x01090043 0x010b000e 0x021d
+   /* TAB F3 T  F6  */
+   0x0201000f 0x0202003d 0x02030014 0x02040040
+   /* ]   Y  102ND  [   */
+   0x0205001b 0x02060015 0x02070056 0x0208001a
+   /* F8  GRAVE  F2 5   */
+   0x02090042 0x03010029 0x0302003c 0x03030006
+   /* F5  6  -  \   */
+   0x0304003f 0x03060007 0x0308000c 0x030b002b
+   /* R_CTRL  A  D  F   */
+   0x0461 0x0401001e 0x04020020 0x04030021
+   /* S   K  J  ;   */
+   0x0404001f 0x04050025 0x04060024 0x04080027
+   /* L   ENTER  Z  C   */
+   0x04090026 0x040b001c 0x0501002c 0x0502002e
+   /* V   X  ,  M   */
+   0x0503002f 0x0504002d 0x05050033 0x05060032
+   /* L_SHIFT /  .  SPACE   */
+   0x0507002a 0x05080035 0x05090034 0x050B0039
+   /* 1   3  4  2   */
+   0x06010002 0x06020004 0x06030005 0x06040003
+   /* 8   7  0  9   */
+   0x06050009 0x06060008 0x0608000b 0x0609000a
+   /* L_ALT   DOWN   RIGHT  Q   */
+   0x060a0038

[U-Boot] [PATCH v4 5/7] cros: adds cros_ec keyboard driver

[Hung-ying Tyan]

This patch adds the driver for keyboard that's controlled by ChromeOS EC.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v4:
- Added cros-ec-keyb.txt.

Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 README  |   5 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |  79 +++
 drivers/input/Makefile  |   1 +
 drivers/input/cros_ec_keyb.c| 261 
 include/fdtdec.h|   1 +
 lib/fdtdec.c|   1 +
 6 files changed, 348 insertions(+)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 drivers/input/cros_ec_keyb.c

diff --git a/README b/README
index 42544ce..769d1bf 100644
--- a/README
+++ b/README
@@ -1371,6 +1371,11 @@ CBFS (Coreboot Filesystem) support
Export function i8042_kbd_init, i8042_tstc and i8042_getc
for cfb_console. Supports cursor blinking.
 
+   CONFIG_CROS_EC_KEYB
+   Enables a Chrome OS keyboard using the CROS_EC interface.
+   This uses CROS_EC to communicate with a second microcontroller
+   which provides key scans on request.
+
 - Video support:
CONFIG_VIDEO
 
diff --git a/doc/device-tree-bindings/input/cros-ec-keyb.txt 
b/doc/device-tree-bindings/input/cros-ec-keyb.txt
new file mode 100644
index 000..3118276
--- /dev/null
+++ b/doc/device-tree-bindings/input/cros-ec-keyb.txt
@@ -0,0 +1,79 @@
+CROS_EC Keyboard
+
+The CROS_EC (Matrix Keyboard Protocol) allows communcation with a secondary
+micro used for keyboard, and possible other features.
+
+The CROS_EC keyboard uses this protocol to receive key scans and produce input
+in U-Boot.
+
+Required properties :
+- compatible : google,cros-ec-keyb
+- google,key-rows : Number of key rows
+- google,key-columns : Number of key columns
+
+Optional properties, in addition to those specified by the shared
+matrix-keyboard bindings:
+
+- linux,fn-keymap: a second keymap, same specification as the
+  matrix-keyboard-controller spec but to be used when the KEY_FN modifier
+  key is pressed.
+- google,repeat-delay-ms : delay in milliseconds before repeat starts
+- google,repeat-rate-ms : delay between each subsequent key press
+- google,ghost-filter : enable ghost filtering for this device
+
+Example, taken from daisy:
+
+cros-ec-keyb {
+   compatible = google,cros-ec-keyb;
+   google,key-rows = 8;
+   google,key-columns = 13;
+   google,ghost-filter;
+   google,repeat-delay-ms = 240;
+   google,repeat-rate-ms = 30;
+   /*
+   * Keymap entries take the form of 0xRRCC where
+   * RR=Row CC=Column =Key Code
+   * The values below are for a US keyboard layout and
+   * are taken from the Linux driver. Note that the
+   * 102ND key is not used for US keyboards.
+   */
+   linux,keymap = 
+   /* CAPSLCK F1 B  F10 */
+   0x0001003a 0x0002003c 0x00030030 0x00040044
+   /* N   =  R_ALT  ESC */
+   0x00060031 0x0008000d 0x000a0064 0x01010001
+   /* F4  G  F7 H   */
+   0x0102003e 0x01030022 0x01040041 0x01060023
+   /* '   F9 BKSPACEL_CTRL  */
+   0x01080028 0x01090043 0x010b000e 0x021d
+   /* TAB F3 T  F6  */
+   0x0201000f 0x0202003d 0x02030014 0x02040040
+   /* ]   Y  102ND  [   */
+   0x0205001b 0x02060015 0x02070056 0x0208001a
+   /* F8  GRAVE  F2 5   */
+   0x02090042 0x03010029 0x0302003c 0x03030006
+   /* F5  6  -  \   */
+   0x0304003f 0x03060007 0x0308000c 0x030b002b
+   /* R_CTRL  A  D  F   */
+   0x0461 0x0401001e 0x04020020 0x04030021
+   /* S   K  J  ;   */
+   0x0404001f 0x04050025 0x04060024 0x04080027
+   /* L   ENTER  Z  C   */
+   0x04090026 0x040b001c 0x0501002c 0x0502002e
+   /* V   X  ,  M   */
+   0x0503002f 0x0504002d 0x05050033 0x05060032
+   /* L_SHIFT /  .  SPACE   */
+   0x0507002a 0x05080035 0x05090034 0x050B0039
+   /* 1   3  4

[U-Boot] [PATCH v4 3/7] cros: add SPI support for cros_ec

[Hung-ying Tyan]

This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan ty...@chromium.org
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org

---
Changes in v4:
- Removed old code and comment.

Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_spi.c | 161 +
 drivers/spi/exynos_spi.c   |  22 +++
 include/spi.h  |  16 +
 4 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_spi.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9363ef9..18209ec 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
+COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
new file mode 100644
index 000..e15c833
--- /dev/null
+++ b/drivers/misc/cros_ec_spi.c
@@ -0,0 +1,161 @@
+/*
+ * Chromium OS cros_ec driver - SPI interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include cros_ec.h
+#include spi.h
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp Returns pointer to response data. This will be
+ * untouched unless we return a value  0.
+ * @param din_len  Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int in_bytes = din_len + 4; /* status, length, checksum, trailer */
+   uint8_t *out;
+   uint8_t *p;
+   int csum, len;
+   int rv;
+
+   /*
+* Sanity-check input size to make sure it plus transaction overhead
+* fits in the internal device buffer.
+*/
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   /* We represent message length as a byte */
+   if (dout_len  0xff) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   /*
+* Clear input buffer so we don't get false hits for MSG_HEADER
+*/
+   memset(dev-din, '\0', in_bytes);
+
+   if (spi_claim_bus(dev-spi)) {
+   debug(%s: Cannot claim SPI bus\n, __func__);
+   return -1;
+   }
+
+   out = dev-dout;
+   out[0] = cmd_version;
+   out[1] = cmd;
+   out[2] = (uint8_t)dout_len;
+   memcpy(out + 3, dout, dout_len);
+   csum = cros_ec_calc_checksum(out, 3)
+  + cros_ec_calc_checksum(dout, dout_len);
+   out[3 + dout_len] = (uint8_t)csum;
+
+   /*
+* Send output data and receive input data starting such that the
+* message body will be dword aligned.
+*/
+   p = dev-din + sizeof(int64_t) - 2;
+   len = dout_len + 4;
+   cros_ec_dump_data(out, cmd, out, len);
+   rv = spi_xfer(dev-spi, max(len, in_bytes) * 8, out

[U-Boot] [PATCH v4 7/7] cros: enable cros-ec for smdk5250

[Hung-ying Tyan]

This patch initiates cros-ec in board_init() to enable it for smdk5250.

Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added commit message.
- Dropped the period from commit subject.

 board/samsung/smdk5250/exynos5-dt.c | 45 +
 include/configs/exynos5250-dt.h | 10 -
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/board/samsung/smdk5250/exynos5-dt.c 
b/board/samsung/smdk5250/exynos5-dt.c
index b01fe72..8be3192 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -21,6 +21,7 @@
  */
 
 #include common.h
+#include cros_ec.h
 #include fdtdec.h
 #include asm/io.h
 #include errno.h
@@ -39,6 +40,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct local_info {
+   struct cros_ec_dev *cros_ec_dev;/* Pointer to cros_ec device */
+   int cros_ec_err;/* Error for cros_ec, 0 if ok */
+};
+
+static struct local_info local;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
 int board_usb_vbus_init(void)
 {
@@ -55,12 +63,30 @@ int board_usb_vbus_init(void)
 }
 #endif
 
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+   return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+   local.cros_ec_err = cros_ec_init(blob, local.cros_ec_dev);
+   if (local.cros_ec_err)
+   return -1;  /* Will report in board_late_init() */
+
+   return 0;
+}
+
 int board_init(void)
 {
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 #ifdef CONFIG_EXYNOS_SPI
spi_init();
 #endif
+
+   if (board_init_cros_ec_devices(gd-fdt_blob))
+   return -1;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
 #endif
@@ -337,3 +363,22 @@ int board_early_init_f(void)
return err;
 }
 #endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   stdio_print_current_devices();
+
+   if (local.cros_ec_err) {
+   /* Force console on */
+   gd-flags = ~GD_FLG_SILENT;
+
+   printf(cros-ec communications failure %d\n,
+  local.cros_ec_err);
+   puts(\nPlease reset with Power+Refresh\n\n);
+   panic(Cannot init cros-ec device);
+   return -1;
+   }
+   return 0;
+}
+#endif
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 0721c17..80dfce7 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -77,11 +77,19 @@
 #define CONFIG_BAUDRATE115200
 #define EXYNOS5_DEFAULT_UART_OFFSET0x01
 
+/* Enable keyboard */
+#define CONFIG_CROS_EC /* CROS_EC protocol */
+#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
+#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
+#define CONFIG_CROS_EC_KEYB/* CROS_EC keyboard input */
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_KEYBOARD
+
 /* Console configuration */
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define EXYNOS_DEVICE_SETTINGS \
-   stdin=serial\0 \
+   stdin=serial,cros-ec-keyb\0 \
stdout=serial,lcd\0 \
stderr=serial,lcd\0
 
-- 
1.8.1.3

___
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[U-Boot] [PATCH v4 2/7] cros: add I2C support for cros_ec

[Hung-ying Tyan]

This patch adds I2C support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added Commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_i2c.c | 199 +
 2 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_i2c.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 33fe822..9363ef9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
new file mode 100644
index 000..b0060ac
--- /dev/null
+++ b/drivers/misc/cros_ec_i2c.c
@@ -0,0 +1,199 @@
+/*
+ * Chromium OS cros_ec driver - I2C interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include i2c.h
+#include cros_ec.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, #b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int old_bus = 0;
+   /* version8, cmd8, arglen8, out8[dout_len], csum8 */
+   int out_bytes = dout_len + 4;
+   /* response8, arglen8, in8[din_len], checksum8 */
+   int in_bytes = din_len + 3;
+   uint8_t *ptr;
+   /* Receive input data, so that args will be dword aligned */
+   uint8_t *in_ptr;
+   int ret;
+
+   old_bus = i2c_get_bus_num();
+
+   /*
+* Sanity-check I/O sizes given transaction overhead in internal
+* buffers.
+*/
+   if (out_bytes  sizeof(dev-dout)) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+   assert(dout_len = 0);
+   assert(dinp);
+
+   /*
+* Copy command and data into output buffer so we can do a single I2C
+* burst transaction.
+*/
+   ptr = dev-dout;
+
+   /*
+* in_ptr starts of pointing to a dword-aligned input data buffer.
+* We decrement it back by the number of header bytes we expect to
+* receive, so that the first parameter of the resulting input data
+* will be dword aligned.
+*/
+   in_ptr = dev-din + sizeof(int64_t);
+   if (!dev-cmd_version_is_supported) {
+   /* Send an old-style command */
+   *ptr++ = cmd;
+   out_bytes = dout_len + 1;
+   in_bytes = din_len + 2;
+   in_ptr--;   /* Expect just a status byte */
+   } else {
+   *ptr++ = EC_CMD_VERSION0 + cmd_version;
+   *ptr++ = cmd;
+   *ptr++ = dout_len;
+   in_ptr -= 2;/* Expect status, length bytes */
+   }
+   memcpy(ptr, dout, dout_len);
+   ptr += dout_len;
+
+   if (dev-cmd_version_is_supported)
+   *ptr++ = (uint8_t)
+cros_ec_calc_checksum(dev-dout, dout_len + 3);
+
+   /* Set to the proper i2c bus */
+   if (i2c_set_bus_num(dev-bus_num)) {
+   debug(%s: Cannot change to I2C bus %d\n, __func__

[U-Boot] [PATCH v3 0/7] This patch series adds the drivers for the cros-ec protocol that is used to

[Hung-ying Tyan]

communicate with the ChromeOS Embedded Controller (EC). The series also enables
its use in Google Snow based on smdk5250.

The series depends on the following patches:
1) http://patchwork.ozlabs.org/patch/217347 add dts file for Snow
2) mmc series: http://patchwork.ozlabs.org/patch/225008
3) power patches needed by one of the mmc patches
   http://patchwork.ozlabs.org/patch/220060 EXYNOS5: Add function to setup set 
ps hold
   http://patchwork.ozlabs.org/patch/220061 SMDK5250: Add PMIC voltage settings 
(needed by one of the mmc patches)
-
Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added gpio node to exynos5250.dtsi.
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message to each patch.
- Dropped the period from commit subjects.

Hung-ying Tyan (7):
  cros: add cros_ec driver
  cros: add I2C support for cros_ec
  cros: add SPI support for cros_ec
  cros: add LPC support for cros_ec
  cros: adds cros_ec keyboard driver
  cros: exynos: add cros-ec device nodes to exynos5250-snow.dts
  cros: enable cros-ec for smdk5250

 README  |5 +
 arch/arm/dts/exynos5250.dtsi|3 +
 board/samsung/dts/exynos5250-snow.dts   |   82 ++
 board/samsung/smdk5250/exynos5-dt.c |   45 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |   79 ++
 doc/device-tree-bindings/misc/cros-ec.txt   |   38 +
 doc/device-tree-bindings/spi/exynos-spi.txt |   55 +
 drivers/input/Makefile  |1 +
 drivers/input/cros_ec_keyb.c|  261 
 drivers/misc/Makefile   |4 +
 drivers/misc/cros_ec.c  | 1304 
 drivers/misc/cros_ec_i2c.c  |  199 
 drivers/misc/cros_ec_lpc.c  |  283 +
 drivers/misc/cros_ec_spi.c  |  166 +++
 drivers/spi/exynos_spi.c|   22 +
 include/configs/exynos5250-dt.h |   10 +-
 include/cros_ec.h   |  449 +++
 include/cros_ec_message.h   |   44 +
 include/ec_commands.h   | 1440 +++
 include/fdtdec.h|2 +
 include/spi.h   |   16 +
 lib/fdtdec.c|2 +
 22 files changed, 4509 insertions(+), 1 deletion(-)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 doc/device-tree-bindings/misc/cros-ec.txt
 create mode 100644 doc/device-tree-bindings/spi/exynos-spi.txt
 create mode 100644 drivers/input/cros_ec_keyb.c
 create mode 100644 drivers/misc/cros_ec.c
 create mode 100644 drivers/misc/cros_ec_i2c.c
 create mode 100644 drivers/misc/cros_ec_lpc.c
 create mode 100644 drivers/misc/cros_ec_spi.c
 create mode 100644 include/cros_ec.h
 create mode 100644 include/cros_ec_message.h
 create mode 100644 include/ec_commands.h

-- 
1.8.1.3

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[U-Boot] [PATCH v3 3/7] cros: add SPI support for cros_ec

[Hung-ying Tyan]

This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan ty...@chromium.org
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org

---
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_spi.c | 166 +
 drivers/spi/exynos_spi.c   |  22 ++
 include/spi.h  |  16 +
 4 files changed, 205 insertions(+)
 create mode 100644 drivers/misc/cros_ec_spi.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9363ef9..18209ec 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
+COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
new file mode 100644
index 000..82cc1bb
--- /dev/null
+++ b/drivers/misc/cros_ec_spi.c
@@ -0,0 +1,166 @@
+/*
+ * Chromium OS cros_ec driver - SPI interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include cros_ec.h
+#include spi.h
+
+#ifdef CONFIG_NEW_SPI_XFER
+#error CONFIG_NEW_SPI_XFER not supported in CROS_EC
+#endif
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp Returns pointer to response data. This will be
+ * untouched unless we return a value  0.
+ * @param din_len  Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int in_bytes = din_len + 4; /* status, length, checksum, trailer */
+   uint8_t *out;
+   uint8_t *p;
+   int csum, len;
+   int rv;
+
+   /*
+* Sanity-check input size to make sure it plus transaction overhead
+* fits in the internal device buffer.
+*/
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   /* We represent message length as a byte */
+   if (dout_len  0xff) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   /*
+* TODO(s...@chromium.org): Clear input buffer so we don't get false
+* hits for MSG_HEADER
+*/
+   memset(dev-din, '\0', in_bytes);
+
+   if (spi_claim_bus(dev-spi)) {
+   debug(%s: Cannot claim SPI bus\n, __func__);
+   return -1;
+   }
+
+   out = dev-dout;
+   out[0] = cmd_version;
+   out[1] = cmd;
+   out[2] = (uint8_t)dout_len;
+   memcpy(out + 3, dout, dout_len);
+   csum = cros_ec_calc_checksum(out, 3)
+  + cros_ec_calc_checksum(dout, dout_len);
+   out[3 + dout_len] = (uint8_t)csum;
+
+   /*
+* Send output data and receive input data starting such that the
+* message body will be dword aligned.
+*/
+   p = dev-din + sizeof(int64_t) - 2;
+   len = dout_len + 4;
+   cros_ec_dump_data

[U-Boot] [PATCH v3 5/7] cros: adds cros_ec keyboard driver

[Hung-ying Tyan]

This patch adds the driver for keyboard that's controlled by ChromeOS EC.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v3:
- Rearranged #include directives in alphabetical order.
- Removed outdated TODO and irrelevant bug reference in comments.

Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 README   |   5 +
 drivers/input/Makefile   |   1 +
 drivers/input/cros_ec_keyb.c | 261 +++
 include/fdtdec.h |   1 +
 lib/fdtdec.c |   1 +
 5 files changed, 269 insertions(+)
 create mode 100644 drivers/input/cros_ec_keyb.c

diff --git a/README b/README
index 42544ce..769d1bf 100644
--- a/README
+++ b/README
@@ -1371,6 +1371,11 @@ CBFS (Coreboot Filesystem) support
Export function i8042_kbd_init, i8042_tstc and i8042_getc
for cfb_console. Supports cursor blinking.
 
+   CONFIG_CROS_EC_KEYB
+   Enables a Chrome OS keyboard using the CROS_EC interface.
+   This uses CROS_EC to communicate with a second microcontroller
+   which provides key scans on request.
+
 - Video support:
CONFIG_VIDEO
 
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 0805e86..4331190 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -27,6 +27,7 @@ LIB   := $(obj)libinput.o
 
 COBJS-$(CONFIG_I8042_KBD) += i8042.o
 COBJS-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
+COBJS-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
 ifdef CONFIG_PS2KBD
 COBJS-y += keyboard.o pc_keyb.o
 COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
diff --git a/drivers/input/cros_ec_keyb.c b/drivers/input/cros_ec_keyb.c
new file mode 100644
index 000..c197308
--- /dev/null
+++ b/drivers/input/cros_ec_keyb.c
@@ -0,0 +1,261 @@
+/*
+ * Chromium OS Matrix Keyboard
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include cros_ec.h
+#include fdtdec.h
+#include input.h
+#include key_matrix.h
+#include stdio_dev.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   KBC_MAX_KEYS= 8,/* Maximum keys held down at once */
+};
+
+static struct keyb {
+   struct cros_ec_dev *dev;/* The CROS_EC device */
+   struct input_config input;  /* The input layer */
+   struct key_matrix matrix;   /* The key matrix layer */
+   int key_rows;   /* Number of keyboard rows */
+   int key_cols;   /* Number of keyboard columns */
+   unsigned int repeat_delay_ms;   /* Time before autorepeat starts */
+   unsigned int repeat_rate_ms;/* Autorepeat rate in ms */
+   int ghost_filter;   /* 1 to enable ghost filter, else 0 */
+   int inited; /* 1 if keyboard is ready */
+} config;
+
+
+/**
+ * Check the keyboard controller and return a list of key matrix positions
+ * for which a key is pressed
+ *
+ * @param config   Keyboard config
+ * @param keys List of keys that we have detected
+ * @param max_countMaximum number of keys to return
+ * @return number of pressed keys, 0 for none
+ */
+static int check_for_keys(struct keyb *config,
+  struct key_matrix_key *keys, int max_count)
+{
+   struct key_matrix_key *key;
+   struct mbkp_keyscan scan;
+   unsigned int row, col, bit, data;
+   int num_keys;
+
+   if (cros_ec_scan_keyboard(config-dev, scan)) {
+   debug(%s: keyboard scan failed\n, __func__);
+   return -1;
+   }
+
+   for (col = num_keys = bit = 0; col  config-matrix.num_cols;
+   col++) {
+   for (row = 0; row  config-matrix.num_rows; row++) {
+   unsigned int mask = 1  (bit  7);
+
+   data = scan.data[bit / 8];
+   if ((data  mask)  num_keys  max_count) {
+   key = keys

[U-Boot] [PATCH v3 7/7] cros: enable cros-ec for smdk5250

[Hung-ying Tyan]

This patch initiates cros-ec in board_init() to enable it for smdk5250.

Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v3: None
Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Added commit message.
- Dropped the period from commit subject.

 board/samsung/smdk5250/exynos5-dt.c | 45 +
 include/configs/exynos5250-dt.h | 10 -
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/board/samsung/smdk5250/exynos5-dt.c 
b/board/samsung/smdk5250/exynos5-dt.c
index b01fe72..8be3192 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -21,6 +21,7 @@
  */
 
 #include common.h
+#include cros_ec.h
 #include fdtdec.h
 #include asm/io.h
 #include errno.h
@@ -39,6 +40,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct local_info {
+   struct cros_ec_dev *cros_ec_dev;/* Pointer to cros_ec device */
+   int cros_ec_err;/* Error for cros_ec, 0 if ok */
+};
+
+static struct local_info local;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
 int board_usb_vbus_init(void)
 {
@@ -55,12 +63,30 @@ int board_usb_vbus_init(void)
 }
 #endif
 
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+   return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+   local.cros_ec_err = cros_ec_init(blob, local.cros_ec_dev);
+   if (local.cros_ec_err)
+   return -1;  /* Will report in board_late_init() */
+
+   return 0;
+}
+
 int board_init(void)
 {
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 #ifdef CONFIG_EXYNOS_SPI
spi_init();
 #endif
+
+   if (board_init_cros_ec_devices(gd-fdt_blob))
+   return -1;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
 #endif
@@ -337,3 +363,22 @@ int board_early_init_f(void)
return err;
 }
 #endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   stdio_print_current_devices();
+
+   if (local.cros_ec_err) {
+   /* Force console on */
+   gd-flags = ~GD_FLG_SILENT;
+
+   printf(cros-ec communications failure %d\n,
+  local.cros_ec_err);
+   puts(\nPlease reset with Power+Refresh\n\n);
+   panic(Cannot init cros-ec device);
+   return -1;
+   }
+   return 0;
+}
+#endif
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 0721c17..80dfce7 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -77,11 +77,19 @@
 #define CONFIG_BAUDRATE115200
 #define EXYNOS5_DEFAULT_UART_OFFSET0x01
 
+/* Enable keyboard */
+#define CONFIG_CROS_EC /* CROS_EC protocol */
+#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
+#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
+#define CONFIG_CROS_EC_KEYB/* CROS_EC keyboard input */
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_KEYBOARD
+
 /* Console configuration */
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define EXYNOS_DEVICE_SETTINGS \
-   stdin=serial\0 \
+   stdin=serial,cros-ec-keyb\0 \
stdout=serial,lcd\0 \
stderr=serial,lcd\0
 
-- 
1.8.1.3

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[U-Boot] [PATCH v3 6/7] cros: exynos: add cros-ec device nodes to exynos5250-snow.dts

[Hung-ying Tyan]

Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v3: None
Changes in v2:
- Added gpio node to exynos5250.dtsi.
- Added commit message.
- Dropped the period from commit subject.

 arch/arm/dts/exynos5250.dtsi  |  3 ++
 board/samsung/dts/exynos5250-snow.dts | 82 +++
 2 files changed, 85 insertions(+)

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 6c08eb7..2644131 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -182,4 +182,7 @@
reg = 0x1223 0x1000;
interrupts = 0 78 0;
};
+
+   gpio: gpio {
+   };
 };
diff --git a/board/samsung/dts/exynos5250-snow.dts 
b/board/samsung/dts/exynos5250-snow.dts
index af788a6..a7526e5 100644
--- a/board/samsung/dts/exynos5250-snow.dts
+++ b/board/samsung/dts/exynos5250-snow.dts
@@ -43,6 +43,33 @@
};
};
 
+   i2c4: i2c@12ca {
+   cros-ec@1e {
+   reg = 0x1e;
+   compatible = google,cros-ec;
+   i2c-max-frequency = 10;
+   ec-interrupt = gpio 174 1;
+   };
+
+   power-regulator@48 {
+   compatible = ti,tps65090;
+   reg = 0x48;
+   };
+   };
+
+   spi@131b {
+   spi-max-frequency = 100;
+   spi-deactivate-delay = 100;
+   cros-ec@0 {
+   reg = 0;
+   compatible = google,cros-ec;
+   spi-max-frequency = 500;
+   ec-interrupt = gpio 174 1;
+   optimise-flash-write;
+   status = disabled;
+   };
+   };
+
sound@12d6 {
samsung,i2s-epll-clock-frequency = 19200;
samsung,i2s-sampling-rate = 48000;
@@ -66,4 +93,59 @@
compatible = maxim,max77686_pmic;
};
};
+
+   cros-ec-keyb {
+   compatible = google,cros-ec-keyb;
+   google,key-rows = 8;
+   google,key-columns = 13;
+   google,repeat-delay-ms = 240;
+   google,repeat-rate-ms = 30;
+   google,ghost-filter;
+   /*
+* Keymap entries take the form of 0xRRCC where
+* RR=Row CC=Column =Key Code
+* The values below are for a US keyboard layout and
+* are taken from the Linux driver. Note that the
+* 102ND key is not used for US keyboards.
+*/
+   linux,keymap = 
+   /* CAPSLCK F1 B  F10 */
+   0x0001003a 0x0002003b 0x00030030 0x00040044
+   /* N   =  R_ALT  ESC */
+   0x00060031 0x0008000d 0x000a0064 0x01010001
+   /* F4  G  F7 H   */
+   0x0102003e 0x01030022 0x01040041 0x01060023
+   /* '   F9 BKSPACEL_CTRL  */
+   0x01080028 0x01090043 0x010b000e 0x021d
+   /* TAB F3 T  F6  */
+   0x0201000f 0x0202003d 0x02030014 0x02040040
+   /* ]   Y  102ND  [   */
+   0x0205001b 0x02060015 0x02070056 0x0208001a
+   /* F8  GRAVE  F2 5   */
+   0x02090042 0x03010029 0x0302003c 0x03030006
+   /* F5  6  -  \   */
+   0x0304003f 0x03060007 0x0308000c 0x030b002b
+   /* R_CTRL  A  D  F   */
+   0x0461 0x0401001e 0x04020020 0x04030021
+   /* S   K  J  ;   */
+   0x0404001f 0x04050025 0x04060024 0x04080027
+   /* L   ENTER  Z  C   */
+   0x04090026 0x040b001c 0x0501002c 0x0502002e
+   /* V   X  ,  M   */
+   0x0503002f 0x0504002d 0x05050033 0x05060032
+   /* L_SHIFT /  .  SPACE   */
+   0x0507002a 0x05080035 0x05090034 0x050B0039
+   /* 1   3  4  2   */
+   0x06010002 0x06020004 0x06030005 0x06040003
+   /* 8   7  0  9   */
+   0x06050009 0x06060008 0x0608000b 0x0609000a
+   /* L_ALT   DOWN   RIGHT  Q   */
+   0x060a0038 0x060b006c 0x060c006a 0x07010010
+   /* E   R  W  I

[U-Boot] [PATCH v3 4/7] cros: add LPC support for cros_ec

[Hung-ying Tyan]

This patch adds LPC support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_lpc.c | 283 +
 2 files changed, 284 insertions(+)
 create mode 100644 drivers/misc/cros_ec_lpc.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 18209ec..3553ff6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
new file mode 100644
index 000..cf0435b
--- /dev/null
+++ b/drivers/misc/cros_ec_lpc.c
@@ -0,0 +1,283 @@
+/*
+ * Chromium OS cros_ec driver - LPC interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include command.h
+#include cros_ec.h
+#include asm/io.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, ##b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+static int wait_for_sync(struct cros_ec_dev *dev)
+{
+   unsigned long start;
+
+   start = get_timer(0);
+   while (inb(EC_LPC_ADDR_HOST_CMD)  EC_LPC_STATUS_BUSY_MASK) {
+   if (get_timer(start)  1000) {
+   debug(%s: Timeout waiting for CROS_EC sync\n,
+ __func__);
+   return -1;
+   }
+   }
+
+   return 0;
+}
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout  Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp  Place to put pointer to response data
+ * @param din_len   Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+static int old_lpc_command(struct cros_ec_dev *dev, uint8_t cmd,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int ret, i;
+
+   if (dout_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   if (din_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   debug_trace(cmd: %02x, , cmd);
+   for (i = 0; i  dout_len; i++) {
+   debug_trace(%02x , dout[i]);
+   outb(dout[i], EC_LPC_ADDR_OLD_PARAM + i);
+   }
+   outb(cmd, EC_LPC_ADDR_HOST_CMD);
+   debug_trace(\n);
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   ret = inb(EC_LPC_ADDR_HOST_DATA);
+   if (ret) {
+   debug(%s: CROS_EC result code %d\n, __func__, ret);
+   return -ret;
+   }
+
+   debug_trace(resp: %02x, , ret);
+   for (i = 0; i  din_len; i++) {
+   dev-din[i] = inb(EC_LPC_ADDR_OLD_PARAM + i

[U-Boot] [PATCH v3 2/7] cros: add I2C support for cros_ec

[Hung-ying Tyan]

This patch adds I2C support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v3: None
Changes in v2:
- Fixed warnings of exceeding 80 chars in a line.
- Added Commit message.
- Dropped the period from commit subject.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_i2c.c | 199 +
 2 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_i2c.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 33fe822..9363ef9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
new file mode 100644
index 000..b0060ac
--- /dev/null
+++ b/drivers/misc/cros_ec_i2c.c
@@ -0,0 +1,199 @@
+/*
+ * Chromium OS cros_ec driver - I2C interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include i2c.h
+#include cros_ec.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, #b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int old_bus = 0;
+   /* version8, cmd8, arglen8, out8[dout_len], csum8 */
+   int out_bytes = dout_len + 4;
+   /* response8, arglen8, in8[din_len], checksum8 */
+   int in_bytes = din_len + 3;
+   uint8_t *ptr;
+   /* Receive input data, so that args will be dword aligned */
+   uint8_t *in_ptr;
+   int ret;
+
+   old_bus = i2c_get_bus_num();
+
+   /*
+* Sanity-check I/O sizes given transaction overhead in internal
+* buffers.
+*/
+   if (out_bytes  sizeof(dev-dout)) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+   assert(dout_len = 0);
+   assert(dinp);
+
+   /*
+* Copy command and data into output buffer so we can do a single I2C
+* burst transaction.
+*/
+   ptr = dev-dout;
+
+   /*
+* in_ptr starts of pointing to a dword-aligned input data buffer.
+* We decrement it back by the number of header bytes we expect to
+* receive, so that the first parameter of the resulting input data
+* will be dword aligned.
+*/
+   in_ptr = dev-din + sizeof(int64_t);
+   if (!dev-cmd_version_is_supported) {
+   /* Send an old-style command */
+   *ptr++ = cmd;
+   out_bytes = dout_len + 1;
+   in_bytes = din_len + 2;
+   in_ptr--;   /* Expect just a status byte */
+   } else {
+   *ptr++ = EC_CMD_VERSION0 + cmd_version;
+   *ptr++ = cmd;
+   *ptr++ = dout_len;
+   in_ptr -= 2;/* Expect status, length bytes */
+   }
+   memcpy(ptr, dout, dout_len);
+   ptr += dout_len;
+
+   if (dev-cmd_version_is_supported)
+   *ptr++ = (uint8_t)
+cros_ec_calc_checksum(dev-dout, dout_len + 3);
+
+   /* Set to the proper i2c bus */
+   if (i2c_set_bus_num(dev-bus_num)) {
+   debug(%s: Cannot change to I2C bus %d\n, __func__

[U-Boot] [PATCH v2 4/7] cros: add LPC support for cros_ec

[Hung-ying Tyan]

This patch adds LPC support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v2:
- Wrapped lines to comply with the 80-char rule.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_lpc.c | 283 +
 2 files changed, 284 insertions(+)
 create mode 100644 drivers/misc/cros_ec_lpc.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 18209ec..3553ff6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
new file mode 100644
index 000..cf0435b
--- /dev/null
+++ b/drivers/misc/cros_ec_lpc.c
@@ -0,0 +1,283 @@
+/*
+ * Chromium OS cros_ec driver - LPC interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include command.h
+#include cros_ec.h
+#include asm/io.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, ##b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+static int wait_for_sync(struct cros_ec_dev *dev)
+{
+   unsigned long start;
+
+   start = get_timer(0);
+   while (inb(EC_LPC_ADDR_HOST_CMD)  EC_LPC_STATUS_BUSY_MASK) {
+   if (get_timer(start)  1000) {
+   debug(%s: Timeout waiting for CROS_EC sync\n,
+ __func__);
+   return -1;
+   }
+   }
+
+   return 0;
+}
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout  Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp  Place to put pointer to response data
+ * @param din_len   Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+static int old_lpc_command(struct cros_ec_dev *dev, uint8_t cmd,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int ret, i;
+
+   if (dout_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   if (din_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   debug_trace(cmd: %02x, , cmd);
+   for (i = 0; i  dout_len; i++) {
+   debug_trace(%02x , dout[i]);
+   outb(dout[i], EC_LPC_ADDR_OLD_PARAM + i);
+   }
+   outb(cmd, EC_LPC_ADDR_HOST_CMD);
+   debug_trace(\n);
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   ret = inb(EC_LPC_ADDR_HOST_DATA);
+   if (ret) {
+   debug(%s: CROS_EC result code %d\n, __func__, ret);
+   return -ret;
+   }
+
+   debug_trace(resp: %02x, , ret);
+   for (i = 0; i  din_len; i++) {
+   dev-din[i] = inb(EC_LPC_ADDR_OLD_PARAM + i);
+   debug_trace(%02x , dev-din[i]);
+   }
+   debug_trace(\n);
+   *dinp

[U-Boot] [PATCH v2 2/7] cros: add I2C support for cros_ec

[Hung-ying Tyan]

This patch adds I2C support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v2:
- Wrapped lines to comply with the 80-char rule.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_i2c.c | 199 +
 2 files changed, 200 insertions(+)
 create mode 100644 drivers/misc/cros_ec_i2c.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 33fe822..9363ef9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
new file mode 100644
index 000..b0060ac
--- /dev/null
+++ b/drivers/misc/cros_ec_i2c.c
@@ -0,0 +1,199 @@
+/*
+ * Chromium OS cros_ec driver - I2C interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include i2c.h
+#include cros_ec.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, #b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int old_bus = 0;
+   /* version8, cmd8, arglen8, out8[dout_len], csum8 */
+   int out_bytes = dout_len + 4;
+   /* response8, arglen8, in8[din_len], checksum8 */
+   int in_bytes = din_len + 3;
+   uint8_t *ptr;
+   /* Receive input data, so that args will be dword aligned */
+   uint8_t *in_ptr;
+   int ret;
+
+   old_bus = i2c_get_bus_num();
+
+   /*
+* Sanity-check I/O sizes given transaction overhead in internal
+* buffers.
+*/
+   if (out_bytes  sizeof(dev-dout)) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+   assert(dout_len = 0);
+   assert(dinp);
+
+   /*
+* Copy command and data into output buffer so we can do a single I2C
+* burst transaction.
+*/
+   ptr = dev-dout;
+
+   /*
+* in_ptr starts of pointing to a dword-aligned input data buffer.
+* We decrement it back by the number of header bytes we expect to
+* receive, so that the first parameter of the resulting input data
+* will be dword aligned.
+*/
+   in_ptr = dev-din + sizeof(int64_t);
+   if (!dev-cmd_version_is_supported) {
+   /* Send an old-style command */
+   *ptr++ = cmd;
+   out_bytes = dout_len + 1;
+   in_bytes = din_len + 2;
+   in_ptr--;   /* Expect just a status byte */
+   } else {
+   *ptr++ = EC_CMD_VERSION0 + cmd_version;
+   *ptr++ = cmd;
+   *ptr++ = dout_len;
+   in_ptr -= 2;/* Expect status, length bytes */
+   }
+   memcpy(ptr, dout, dout_len);
+   ptr += dout_len;
+
+   if (dev-cmd_version_is_supported)
+   *ptr++ = (uint8_t)
+cros_ec_calc_checksum(dev-dout, dout_len + 3);
+
+   /* Set to the proper i2c bus */
+   if (i2c_set_bus_num(dev-bus_num)) {
+   debug(%s: Cannot change to I2C bus %d\n, __func__,
+   dev-bus_num);
+   return -1;
+   }
+
+   /* Send output data

[U-Boot] [PATCH v2 3/7] cros: add SPI support for cros_ec

[Hung-ying Tyan]

This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan ty...@chromium.org
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org

---
Changes in v2:
- Wrapped lines to comply with the 80-char rule.

 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_spi.c | 166 +
 drivers/spi/exynos_spi.c   |  22 ++
 include/spi.h  |  16 +
 4 files changed, 205 insertions(+)
 create mode 100644 drivers/misc/cros_ec_spi.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9363ef9..18209ec 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
+COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
new file mode 100644
index 000..82cc1bb
--- /dev/null
+++ b/drivers/misc/cros_ec_spi.c
@@ -0,0 +1,166 @@
+/*
+ * Chromium OS cros_ec driver - SPI interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include cros_ec.h
+#include spi.h
+
+#ifdef CONFIG_NEW_SPI_XFER
+#error CONFIG_NEW_SPI_XFER not supported in CROS_EC
+#endif
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp Returns pointer to response data. This will be
+ * untouched unless we return a value  0.
+ * @param din_len  Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int in_bytes = din_len + 4; /* status, length, checksum, trailer */
+   uint8_t *out;
+   uint8_t *p;
+   int csum, len;
+   int rv;
+
+   /*
+* Sanity-check input size to make sure it plus transaction overhead
+* fits in the internal device buffer.
+*/
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   /* We represent message length as a byte */
+   if (dout_len  0xff) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   /*
+* TODO(s...@chromium.org): Clear input buffer so we don't get false
+* hits for MSG_HEADER
+*/
+   memset(dev-din, '\0', in_bytes);
+
+   if (spi_claim_bus(dev-spi)) {
+   debug(%s: Cannot claim SPI bus\n, __func__);
+   return -1;
+   }
+
+   out = dev-dout;
+   out[0] = cmd_version;
+   out[1] = cmd;
+   out[2] = (uint8_t)dout_len;
+   memcpy(out + 3, dout, dout_len);
+   csum = cros_ec_calc_checksum(out, 3)
+  + cros_ec_calc_checksum(dout, dout_len);
+   out[3 + dout_len] = (uint8_t)csum;
+
+   /*
+* Send output data and receive input data starting such that the
+* message body will be dword aligned.
+*/
+   p = dev-din + sizeof(int64_t) - 2;
+   len = dout_len + 4;
+   cros_ec_dump_data(out, cmd, out, len);
+   rv = spi_xfer(dev-spi, max(len, in_bytes) * 8, out, p

[U-Boot] [PATCH v2 7/7] cros: enable cros-ec for smdk5250

[Hung-ying Tyan]

This patch initiates cros-ec in board_init() to enable it for smdk5250.

Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v2:
- Code moved from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Code moved from smdk5250.h to exynos5250-dt.h.

 board/samsung/smdk5250/exynos5-dt.c | 45 +
 include/configs/exynos5250-dt.h | 10 -
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/board/samsung/smdk5250/exynos5-dt.c 
b/board/samsung/smdk5250/exynos5-dt.c
index b01fe72..8be3192 100644
--- a/board/samsung/smdk5250/exynos5-dt.c
+++ b/board/samsung/smdk5250/exynos5-dt.c
@@ -21,6 +21,7 @@
  */
 
 #include common.h
+#include cros_ec.h
 #include fdtdec.h
 #include asm/io.h
 #include errno.h
@@ -39,6 +40,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct local_info {
+   struct cros_ec_dev *cros_ec_dev;/* Pointer to cros_ec device */
+   int cros_ec_err;/* Error for cros_ec, 0 if ok */
+};
+
+static struct local_info local;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
 int board_usb_vbus_init(void)
 {
@@ -55,12 +63,30 @@ int board_usb_vbus_init(void)
 }
 #endif
 
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+   return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+   local.cros_ec_err = cros_ec_init(blob, local.cros_ec_dev);
+   if (local.cros_ec_err)
+   return -1;  /* Will report in board_late_init() */
+
+   return 0;
+}
+
 int board_init(void)
 {
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 #ifdef CONFIG_EXYNOS_SPI
spi_init();
 #endif
+
+   if (board_init_cros_ec_devices(gd-fdt_blob))
+   return -1;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
 #endif
@@ -337,3 +363,22 @@ int board_early_init_f(void)
return err;
 }
 #endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   stdio_print_current_devices();
+
+   if (local.cros_ec_err) {
+   /* Force console on */
+   gd-flags = ~GD_FLG_SILENT;
+
+   printf(cros-ec communications failure %d\n,
+  local.cros_ec_err);
+   puts(\nPlease reset with Power+Refresh\n\n);
+   panic(Cannot init cros-ec device);
+   return -1;
+   }
+   return 0;
+}
+#endif
diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h
index 0721c17..80dfce7 100644
--- a/include/configs/exynos5250-dt.h
+++ b/include/configs/exynos5250-dt.h
@@ -77,11 +77,19 @@
 #define CONFIG_BAUDRATE115200
 #define EXYNOS5_DEFAULT_UART_OFFSET0x01
 
+/* Enable keyboard */
+#define CONFIG_CROS_EC /* CROS_EC protocol */
+#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
+#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
+#define CONFIG_CROS_EC_KEYB/* CROS_EC keyboard input */
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_KEYBOARD
+
 /* Console configuration */
 #define CONFIG_CONSOLE_MUX
 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 #define EXYNOS_DEVICE_SETTINGS \
-   stdin=serial\0 \
+   stdin=serial,cros-ec-keyb\0 \
stdout=serial,lcd\0 \
stderr=serial,lcd\0
 
-- 
1.8.1.3

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[U-Boot] [PATCH v2 6/7] cros: exynos: add cros-ec device nodes to exynos5250-snow.dts

[Hung-ying Tyan]

Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v2:
- Add gpio node to exynos5250.dtsi.

 arch/arm/dts/exynos5250.dtsi  |  3 ++
 board/samsung/dts/exynos5250-snow.dts | 82 +++
 2 files changed, 85 insertions(+)

diff --git a/arch/arm/dts/exynos5250.dtsi b/arch/arm/dts/exynos5250.dtsi
index 6c08eb7..2644131 100644
--- a/arch/arm/dts/exynos5250.dtsi
+++ b/arch/arm/dts/exynos5250.dtsi
@@ -182,4 +182,7 @@
reg = 0x1223 0x1000;
interrupts = 0 78 0;
};
+
+   gpio: gpio {
+   };
 };
diff --git a/board/samsung/dts/exynos5250-snow.dts 
b/board/samsung/dts/exynos5250-snow.dts
index af788a6..a7526e5 100644
--- a/board/samsung/dts/exynos5250-snow.dts
+++ b/board/samsung/dts/exynos5250-snow.dts
@@ -43,6 +43,33 @@
};
};
 
+   i2c4: i2c@12ca {
+   cros-ec@1e {
+   reg = 0x1e;
+   compatible = google,cros-ec;
+   i2c-max-frequency = 10;
+   ec-interrupt = gpio 174 1;
+   };
+
+   power-regulator@48 {
+   compatible = ti,tps65090;
+   reg = 0x48;
+   };
+   };
+
+   spi@131b {
+   spi-max-frequency = 100;
+   spi-deactivate-delay = 100;
+   cros-ec@0 {
+   reg = 0;
+   compatible = google,cros-ec;
+   spi-max-frequency = 500;
+   ec-interrupt = gpio 174 1;
+   optimise-flash-write;
+   status = disabled;
+   };
+   };
+
sound@12d6 {
samsung,i2s-epll-clock-frequency = 19200;
samsung,i2s-sampling-rate = 48000;
@@ -66,4 +93,59 @@
compatible = maxim,max77686_pmic;
};
};
+
+   cros-ec-keyb {
+   compatible = google,cros-ec-keyb;
+   google,key-rows = 8;
+   google,key-columns = 13;
+   google,repeat-delay-ms = 240;
+   google,repeat-rate-ms = 30;
+   google,ghost-filter;
+   /*
+* Keymap entries take the form of 0xRRCC where
+* RR=Row CC=Column =Key Code
+* The values below are for a US keyboard layout and
+* are taken from the Linux driver. Note that the
+* 102ND key is not used for US keyboards.
+*/
+   linux,keymap = 
+   /* CAPSLCK F1 B  F10 */
+   0x0001003a 0x0002003b 0x00030030 0x00040044
+   /* N   =  R_ALT  ESC */
+   0x00060031 0x0008000d 0x000a0064 0x01010001
+   /* F4  G  F7 H   */
+   0x0102003e 0x01030022 0x01040041 0x01060023
+   /* '   F9 BKSPACEL_CTRL  */
+   0x01080028 0x01090043 0x010b000e 0x021d
+   /* TAB F3 T  F6  */
+   0x0201000f 0x0202003d 0x02030014 0x02040040
+   /* ]   Y  102ND  [   */
+   0x0205001b 0x02060015 0x02070056 0x0208001a
+   /* F8  GRAVE  F2 5   */
+   0x02090042 0x03010029 0x0302003c 0x03030006
+   /* F5  6  -  \   */
+   0x0304003f 0x03060007 0x0308000c 0x030b002b
+   /* R_CTRL  A  D  F   */
+   0x0461 0x0401001e 0x04020020 0x04030021
+   /* S   K  J  ;   */
+   0x0404001f 0x04050025 0x04060024 0x04080027
+   /* L   ENTER  Z  C   */
+   0x04090026 0x040b001c 0x0501002c 0x0502002e
+   /* V   X  ,  M   */
+   0x0503002f 0x0504002d 0x05050033 0x05060032
+   /* L_SHIFT /  .  SPACE   */
+   0x0507002a 0x05080035 0x05090034 0x050B0039
+   /* 1   3  4  2   */
+   0x06010002 0x06020004 0x06030005 0x06040003
+   /* 8   7  0  9   */
+   0x06050009 0x06060008 0x0608000b 0x0609000a
+   /* L_ALT   DOWN   RIGHT  Q   */
+   0x060a0038 0x060b006c 0x060c006a 0x07010010
+   /* E   R  W  I   */
+   0x07020012 0x07030013 0x07040011 0x07050017
+   /* U   R_SHIFTP

[U-Boot] [PATCH v2 5/7] cros: adds cros_ec keyboard driver

[Hung-ying Tyan]

This patch adds the driver for keyboard that's controlled by ChromeOS EC.

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org

---
Changes in v2:
- Wrapped lines to comply with the 80-char rule.

 README   |   5 +
 drivers/input/Makefile   |   1 +
 drivers/input/cros_ec_keyb.c | 264 +++
 include/fdtdec.h |   1 +
 lib/fdtdec.c |   1 +
 5 files changed, 272 insertions(+)
 create mode 100644 drivers/input/cros_ec_keyb.c

diff --git a/README b/README
index 42544ce..769d1bf 100644
--- a/README
+++ b/README
@@ -1371,6 +1371,11 @@ CBFS (Coreboot Filesystem) support
Export function i8042_kbd_init, i8042_tstc and i8042_getc
for cfb_console. Supports cursor blinking.
 
+   CONFIG_CROS_EC_KEYB
+   Enables a Chrome OS keyboard using the CROS_EC interface.
+   This uses CROS_EC to communicate with a second microcontroller
+   which provides key scans on request.
+
 - Video support:
CONFIG_VIDEO
 
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 0805e86..4331190 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -27,6 +27,7 @@ LIB   := $(obj)libinput.o
 
 COBJS-$(CONFIG_I8042_KBD) += i8042.o
 COBJS-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
+COBJS-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
 ifdef CONFIG_PS2KBD
 COBJS-y += keyboard.o pc_keyb.o
 COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
diff --git a/drivers/input/cros_ec_keyb.c b/drivers/input/cros_ec_keyb.c
new file mode 100644
index 000..21fab15
--- /dev/null
+++ b/drivers/input/cros_ec_keyb.c
@@ -0,0 +1,264 @@
+/*
+ * Chromium OS Matrix Keyboard
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include input.h
+#include key_matrix.h
+#include cros_ec.h
+#include stdio_dev.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   KBC_MAX_KEYS= 8,/* Maximum keys held down at once */
+};
+
+static struct keyb {
+   struct cros_ec_dev *dev;/* The CROS_EC device */
+   struct input_config input;  /* The input layer */
+   struct key_matrix matrix;   /* The key matrix layer */
+   int key_rows;   /* Number of keyboard rows */
+   int key_cols;   /* Number of keyboard columns */
+   unsigned int repeat_delay_ms;   /* Time before autorepeat starts */
+   unsigned int repeat_rate_ms;/* Autorepeat rate in ms */
+   int ghost_filter;   /* 1 to enable ghost filter, else 0 */
+   int inited; /* 1 if keyboard is ready */
+} config;
+
+
+/**
+ * Check the keyboard controller and return a list of key matrix positions
+ * for which a key is pressed
+ *
+ * @param config   Keyboard config
+ * @param keys List of keys that we have detected
+ * @param max_countMaximum number of keys to return
+ * @return number of pressed keys, 0 for none
+ */
+static int check_for_keys(struct keyb *config,
+  struct key_matrix_key *keys, int max_count)
+{
+   struct key_matrix_key *key;
+   struct mbkp_keyscan scan;
+   unsigned int row, col, bit, data;
+   int num_keys;
+
+   if (cros_ec_scan_keyboard(config-dev, scan)) {
+   debug(%s: keyboard scan failed\n, __func__);
+   return -1;
+   }
+
+   /* TODO(sjg@chromium,org): Should perhaps optimize this algorithm */
+   for (col = num_keys = bit = 0; col  config-matrix.num_cols;
+   col++) {
+   for (row = 0; row  config-matrix.num_rows; row++) {
+   unsigned int mask = 1  (bit  7);
+
+   data = scan.data[bit / 8];
+   if ((data  mask)  num_keys  max_count) {
+   key = keys + num_keys++;
+   key-row = row;
+   key-col = col

[U-Boot] [PATCH v2 0/7] Add cros-ec protocol driver and enable it in smdk5250

[Hung-ying Tyan]

This patch series adds the drivers for the cros-ec protocol that is used to
communicate with the ChromeOS Embedded Controller (EC). The series also enables
its use in Google Snow based on smdk5250.

The series depends on the following patches:
1) http://patchwork.ozlabs.org/patch/217347 add dts file for Snow
2) mmc series: http://patchwork.ozlabs.org/patch/225008
3) power patches needed by one of the mmc patches
   http://patchwork.ozlabs.org/patch/220060 EXYNOS5: Add function to setup set 
ps hold
   http://patchwork.ozlabs.org/patch/220061 SMDK5250: Add PMIC voltage settings 
(needed by one of the mmc patches)
-
Changes in v2:
- Moved code from smdk5250.c (non-FDT) to exynos5-dt.c (FDT).
- Moved code from smdk5250.h to exynos5250-dt.h.
- Add gpio node to exynos5250.dtsi.
- Fixed warnings of exceeding 80 chars in a line.
- Added commit messages to each patch.
- Dropped the period from commit subjects.

Hung-ying Tyan (7):
  cros: add cros_ec driver
  cros: add I2C support for cros_ec
  cros: add SPI support for cros_ec
  cros: add LPC support for cros_ec
  cros: adds cros_ec keyboard driver
  cros: exynos: add cros-ec device nodes to exynos5250-snow.dts
  cros: enable cros-ec for smdk5250

 README  |5 +
 arch/arm/dts/exynos5250.dtsi|3 +
 board/samsung/dts/exynos5250-snow.dts   |   82 ++
 board/samsung/smdk5250/exynos5-dt.c |   45 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |   79 ++
 doc/device-tree-bindings/misc/cros-ec.txt   |   38 +
 doc/device-tree-bindings/spi/exynos-spi.txt |   55 +
 drivers/input/Makefile  |1 +
 drivers/input/cros_ec_keyb.c|  264 +
 drivers/misc/Makefile   |4 +
 drivers/misc/cros_ec.c  | 1304 
 drivers/misc/cros_ec_i2c.c  |  199 
 drivers/misc/cros_ec_lpc.c  |  283 +
 drivers/misc/cros_ec_spi.c  |  166 +++
 drivers/spi/exynos_spi.c|   22 +
 include/configs/exynos5250-dt.h |   10 +-
 include/cros_ec.h   |  449 +++
 include/cros_ec_message.h   |   44 +
 include/ec_commands.h   | 1440 +++
 include/fdtdec.h|2 +
 include/spi.h   |   16 +
 lib/fdtdec.c|2 +
 22 files changed, 4512 insertions(+), 1 deletion(-)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 doc/device-tree-bindings/misc/cros-ec.txt
 create mode 100644 doc/device-tree-bindings/spi/exynos-spi.txt
 create mode 100644 drivers/input/cros_ec_keyb.c
 create mode 100644 drivers/misc/cros_ec.c
 create mode 100644 drivers/misc/cros_ec_i2c.c
 create mode 100644 drivers/misc/cros_ec_lpc.c
 create mode 100644 drivers/misc/cros_ec_spi.c
 create mode 100644 include/cros_ec.h
 create mode 100644 include/cros_ec_message.h
 create mode 100644 include/ec_commands.h

-- 
1.8.1.3

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Re: [U-Boot] [PATCH] I2C: S3C24X0: Bug fixes in i2c_transfer

[Hung-ying Tyan]

On Tue, Feb 19, 2013 at 8:19 PM, Rajeshwari Shinde rajeshwar...@samsung.com
 wrote:

 This patch corrects the following issues

 1) Write the correct M/T Stop value to I2CSTAT after i2c write.
According to the spec, after finish the data transmission, we should
write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of
a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA).
 2) Not split the write to I2CSTAT into 2 steps in i2c read.
According to the spec, we should write the combined M/R Start value to
I2CSTAT after setting the slave address to I2CDS
 3) Fix the mistake of making an equality check to an assignment.
In the case of I2C write with the zero-length address, while tranfering
 the
data, it should be an equality check (==) instead of an assignment (=).

 Signed-off-by: Tom Wai-Hong Tam waih...@chromium.org
 Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com


 Tested-by: Hung-ying Tyan ty...@chromium.org
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Re: [U-Boot] [PATCH V7 10/10] EXYNOS5: I2C: Added FDT and non-FDT support for I2C

[Hung-ying Tyan]

On Tue, Mar 5, 2013 at 9:11 PM, Amar amarendra...@samsung.com wrote:

 This patch adds FDT and non-FDT support for I2C, and initialise
 the I2C channels.

 Signed-off-by: Amar amarendra...@samsung.com


Tested-by: Hung-ying Tyan ty...@chromium.org
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[U-Boot] [PATCH 4/7] Add cros_ec_lpc.

[Hung-ying Tyan]

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_lpc.c | 282 +
 2 files changed, 283 insertions(+)
 create mode 100644 drivers/misc/cros_ec_lpc.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 18209ec..3553ff6 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
diff --git a/drivers/misc/cros_ec_lpc.c b/drivers/misc/cros_ec_lpc.c
new file mode 100644
index 000..a015a06
--- /dev/null
+++ b/drivers/misc/cros_ec_lpc.c
@@ -0,0 +1,282 @@
+/*
+ * Chromium OS cros_ec driver - LPC interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include command.h
+#include cros_ec.h
+#include asm/io.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, ##b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+static int wait_for_sync(struct cros_ec_dev *dev)
+{
+   unsigned long start;
+
+   start = get_timer(0);
+   while (inb(EC_LPC_ADDR_HOST_CMD)  EC_LPC_STATUS_BUSY_MASK) {
+   if (get_timer(start)  1000) {
+   debug(%s: Timeout waiting for CROS_EC sync\n, 
__func__);
+   return -1;
+   }
+   }
+
+   return 0;
+}
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout  Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp  Place to put pointer to response data
+ * @param din_len   Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+static int old_lpc_command(struct cros_ec_dev *dev, uint8_t cmd,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int ret, i;
+
+   if (dout_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   if (din_len  EC_OLD_PARAM_SIZE) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   debug_trace(cmd: %02x, , cmd);
+   for (i = 0; i  dout_len; i++) {
+   debug_trace(%02x , dout[i]);
+   outb(dout[i], EC_LPC_ADDR_OLD_PARAM + i);
+   }
+   outb(cmd, EC_LPC_ADDR_HOST_CMD);
+   debug_trace(\n);
+
+   if (wait_for_sync(dev)) {
+   debug(%s: Timeout waiting ready\n, __func__);
+   return -1;
+   }
+
+   ret = inb(EC_LPC_ADDR_HOST_DATA);
+   if (ret) {
+   debug(%s: CROS_EC result code %d\n, __func__, ret);
+   return -ret;
+   }
+
+   debug_trace(resp: %02x, , ret);
+   for (i = 0; i  din_len; i++) {
+   dev-din[i] = inb(EC_LPC_ADDR_OLD_PARAM + i);
+   debug_trace(%02x , dev-din[i]);
+   }
+   debug_trace(\n);
+   *dinp = dev-din;
+
+   return din_len;
+}
+
+int cros_ec_lpc_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int

[U-Boot] [PATCH 0/7] Add cros-ec protocol driver and enable it in smdk5250.

[Hung-ying Tyan]

The series depends on http://patchwork.ozlabs.org/patch/217347.


Hung-ying Tyan (7):
  Add cros_ec driver.
  Add cros_ec_i2c.
  Add cros_ec_spi.
  Add cros_ec_lpc.
  Add cros_ec_keyb.
  Add cros-ec-keyb to exynos5250-snow.dts.
  Enable cros-ec for smdk5250.

 README  |5 +
 board/samsung/dts/exynos5250-snow.dts   |   82 ++
 board/samsung/smdk5250/smdk5250.c   |   44 +
 doc/device-tree-bindings/input/cros-ec-keyb.txt |   79 ++
 doc/device-tree-bindings/misc/cros-ec.txt   |   38 +
 doc/device-tree-bindings/spi/exynos-spi.txt |   55 +
 drivers/input/Makefile  |1 +
 drivers/input/cros_ec_keyb.c|  263 +
 drivers/misc/Makefile   |4 +
 drivers/misc/cros_ec.c  | 1303 
 drivers/misc/cros_ec_i2c.c  |  198 
 drivers/misc/cros_ec_lpc.c  |  282 +
 drivers/misc/cros_ec_spi.c  |  165 +++
 drivers/spi/exynos_spi.c|   22 +
 include/configs/smdk5250.h  |   14 +
 include/cros_ec.h   |  449 +++
 include/cros_ec_message.h   |   44 +
 include/ec_commands.h   | 1440 +++
 include/fdtdec.h|2 +
 include/spi.h   |   16 +
 lib/fdtdec.c|2 +
 21 files changed, 4508 insertions(+)
 create mode 100644 doc/device-tree-bindings/input/cros-ec-keyb.txt
 create mode 100644 doc/device-tree-bindings/misc/cros-ec.txt
 create mode 100644 doc/device-tree-bindings/spi/exynos-spi.txt
 create mode 100644 drivers/input/cros_ec_keyb.c
 create mode 100644 drivers/misc/cros_ec.c
 create mode 100644 drivers/misc/cros_ec_i2c.c
 create mode 100644 drivers/misc/cros_ec_lpc.c
 create mode 100644 drivers/misc/cros_ec_spi.c
 create mode 100644 include/cros_ec.h
 create mode 100644 include/cros_ec_message.h
 create mode 100644 include/ec_commands.h

-- 
1.8.1

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[U-Boot] [PATCH 5/7] Add cros_ec_keyb.

[Hung-ying Tyan]

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
 README   |   5 +
 drivers/input/Makefile   |   1 +
 drivers/input/cros_ec_keyb.c | 263 +++
 include/fdtdec.h |   1 +
 lib/fdtdec.c |   1 +
 5 files changed, 271 insertions(+)
 create mode 100644 drivers/input/cros_ec_keyb.c

diff --git a/README b/README
index 2352e38..8d340b2 100644
--- a/README
+++ b/README
@@ -1369,6 +1369,11 @@ CBFS (Coreboot Filesystem) support
Export function i8042_kbd_init, i8042_tstc and i8042_getc
for cfb_console. Supports cursor blinking.
 
+   CONFIG_CROS_EC_KEYB
+   Enables a Chrome OS keyboard using the CROS_EC interface.
+   This uses CROS_EC to communicate with a second microcontroller
+   which provides key scans on request.
+
 - Video support:
CONFIG_VIDEO
 
diff --git a/drivers/input/Makefile b/drivers/input/Makefile
index 0805e86..4331190 100644
--- a/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@ -27,6 +27,7 @@ LIB   := $(obj)libinput.o
 
 COBJS-$(CONFIG_I8042_KBD) += i8042.o
 COBJS-$(CONFIG_TEGRA_KEYBOARD) += tegra-kbc.o
+COBJS-$(CONFIG_CROS_EC_KEYB) += cros_ec_keyb.o
 ifdef CONFIG_PS2KBD
 COBJS-y += keyboard.o pc_keyb.o
 COBJS-$(CONFIG_PS2MULT) += ps2mult.o ps2ser.o
diff --git a/drivers/input/cros_ec_keyb.c b/drivers/input/cros_ec_keyb.c
new file mode 100644
index 000..260a3de
--- /dev/null
+++ b/drivers/input/cros_ec_keyb.c
@@ -0,0 +1,263 @@
+/*
+ * Chromium OS Matrix Keyboard
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include fdtdec.h
+#include input.h
+#include key_matrix.h
+#include cros_ec.h
+#include stdio_dev.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+   KBC_MAX_KEYS= 8,/* Maximum keys held down at once */
+};
+
+static struct keyb {
+   struct cros_ec_dev *dev;/* The CROS_EC device */
+   struct input_config input;  /* The input layer */
+   struct key_matrix matrix;   /* The key matrix layer */
+   int key_rows;   /* Number of keyboard rows */
+   int key_cols;   /* Number of keyboard columns */
+   unsigned int repeat_delay_ms;   /* Time before autorepeat starts */
+   unsigned int repeat_rate_ms;/* Autorepeat rate in ms */
+   int ghost_filter;   /* 1 to enable ghost filter, else 0 */
+   int inited; /* 1 if keyboard is ready */
+} config;
+
+
+/**
+ * Check the keyboard controller and return a list of key matrix positions
+ * for which a key is pressed
+ *
+ * @param config   Keyboard config
+ * @param keys List of keys that we have detected
+ * @param max_countMaximum number of keys to return
+ * @return number of pressed keys, 0 for none
+ */
+static int check_for_keys(struct keyb *config,
+  struct key_matrix_key *keys, int max_count)
+{
+   struct key_matrix_key *key;
+   struct mbkp_keyscan scan;
+   unsigned int row, col, bit, data;
+   int num_keys;
+
+   if (cros_ec_scan_keyboard(config-dev, scan)) {
+   debug(%s: keyboard scan failed\n, __func__);
+   return -1;
+   }
+
+   /* TODO(sjg@chromium,org): Should perhaps optimize this algorithm */
+   for (col = num_keys = bit = 0; col  config-matrix.num_cols;
+   col++) {
+   for (row = 0; row  config-matrix.num_rows; row++) {
+   unsigned int mask = 1  (bit  7);
+
+   data = scan.data[bit / 8];
+   if ((data  mask)  num_keys  max_count) {
+   key = keys + num_keys++;
+   key-row = row;
+   key-col = col;
+   key-valid = 1;
+   }
+   bit++;
+   }
+   }
+
+   return num_keys

[U-Boot] [PATCH 7/7] Enable cros-ec for smdk5250.

[Hung-ying Tyan]

Signed-off-by: Abhilash Kesavan a.kesa...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Bernie Thompson bhthomp...@chromium.org
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Che-Liang Chiou clch...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Gabe Black gabebl...@chromium.org
Signed-off-by: Hatim Ali hatim...@samsung.com
Signed-off-by: Prathyush K prathyus...@samsung.com
Signed-off-by: Sean Paul seanp...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Taylor Hutt th...@chromium.org
Signed-off-by: Terry Lambert tlamb...@chromium.org
Signed-off-by: Tom Wai-Hong Tam waih...@chromium.org
Signed-off-by: Vic Yang victory...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
 board/samsung/smdk5250/smdk5250.c | 44 +++
 include/configs/smdk5250.h| 14 +
 2 files changed, 58 insertions(+)

diff --git a/board/samsung/smdk5250/smdk5250.c 
b/board/samsung/smdk5250/smdk5250.c
index 7a5f132..eec4f53 100644
--- a/board/samsung/smdk5250/smdk5250.c
+++ b/board/samsung/smdk5250/smdk5250.c
@@ -21,6 +21,7 @@
  */
 
 #include common.h
+#include cros_ec.h
 #include fdtdec.h
 #include asm/io.h
 #include i2c.h
@@ -38,6 +39,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+struct local_info {
+   struct cros_ec_dev *cros_ec_dev;/* Pointer to cros_ec device */
+   int cros_ec_err;/* Error for cros_ec, 0 if ok */
+};
+
+static struct local_info local;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
 int board_usb_vbus_init(void)
 {
@@ -54,12 +62,30 @@ int board_usb_vbus_init(void)
 }
 #endif
 
+struct cros_ec_dev *board_get_cros_ec_dev(void)
+{
+   return local.cros_ec_dev;
+}
+
+static int board_init_cros_ec_devices(const void *blob)
+{
+   local.cros_ec_err = cros_ec_init(blob, local.cros_ec_dev);
+   if (local.cros_ec_err)
+   return -1;  /* Will report in board_late_init() */
+
+   return 0;
+}
+
 int board_init(void)
 {
gd-bd-bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
 #ifdef CONFIG_EXYNOS_SPI
spi_init();
 #endif
+
+   if (board_init_cros_ec_devices(gd-fdt_blob))
+   return -1;
+
 #ifdef CONFIG_USB_EHCI_EXYNOS
board_usb_vbus_init();
 #endif
@@ -376,3 +402,21 @@ void init_panel_info(vidinfo_t *vid)
exynos_set_dp_platform_data(dp_platform_data);
 }
 #endif
+
+#ifdef CONFIG_BOARD_LATE_INIT
+int board_late_init(void)
+{
+   stdio_print_current_devices();
+
+   if (local.cros_ec_err) {
+   /* Force console on */
+   gd-flags = ~GD_FLG_SILENT;
+
+   printf(cros-ec communications failure %d\n, 
local.cros_ec_err);
+   puts(\nPlease reset with Power+Refresh\n\n);
+   panic(Cannot init cros-ec device);
+   return -1;
+   }
+   return 0;
+}
+#endif
diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h
index 81f83a8..4c61620 100644
--- a/include/configs/smdk5250.h
+++ b/include/configs/smdk5250.h
@@ -30,4 +30,18 @@
 #undef CONFIG_DEFAULT_DEVICE_TREE
 #define CONFIG_DEFAULT_DEVICE_TREE exynos5250-smdk5250
 
+/* Enable keyboard */
+#define CONFIG_CROS_EC /* CROS_EC protocol */
+#define CONFIG_CROS_EC_SPI /* Support CROS_EC over SPI */
+#define CONFIG_CROS_EC_I2C /* Support CROS_EC over I2C */
+#define CONFIG_CROS_EC_KEYB/* CROS_EC keyboard input */
+#define CONFIG_CMD_CROS_EC
+#define CONFIG_KEYBOARD
+
+#undef EXYNOS_DEVICE_SETTINGS
+#define EXYNOS_DEVICE_SETTINGS stdin=serial,cros-ec-keyb\0 \
+   stdout=serial,lcd\0 \
+   stderr=serial,lcd\0
+
+
 #endif /* __CONFIG_SMDK_H */
-- 
1.8.1

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[U-Boot] [PATCH 3/7] Add cros_ec_spi.

[Hung-ying Tyan]

Signed-off-by: Hung-ying Tyan ty...@chromium.org
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
---
 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_spi.c | 165 +
 drivers/spi/exynos_spi.c   |  22 ++
 include/spi.h  |  16 +
 4 files changed, 204 insertions(+)
 create mode 100644 drivers/misc/cros_ec_spi.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 9363ef9..18209ec 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -32,6 +32,7 @@ COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
 COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
+COBJS-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_spi.c b/drivers/misc/cros_ec_spi.c
new file mode 100644
index 000..968b6c8
--- /dev/null
+++ b/drivers/misc/cros_ec_spi.c
@@ -0,0 +1,165 @@
+/*
+ * Chromium OS cros_ec driver - SPI interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include cros_ec.h
+#include spi.h
+
+#ifdef CONFIG_NEW_SPI_XFER
+#error CONFIG_NEW_SPI_XFER not supported in CROS_EC
+#endif
+
+/**
+ * Send a command to a LPC CROS_EC device and return the reply.
+ *
+ * The device's internal input/output buffers are used.
+ *
+ * @param dev  CROS_EC device
+ * @param cmd  Command to send (EC_CMD_...)
+ * @param cmd_version  Version of command to send (EC_VER_...)
+ * @param dout Output data (may be NULL If dout_len=0)
+ * @param dout_len  Size of output data in bytes
+ * @param dinp Returns pointer to response data. This will be
+ * untouched unless we return a value  0.
+ * @param din_len  Maximum size of response in bytes
+ * @return number of bytes in response, or -1 on error
+ */
+int cros_ec_spi_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int in_bytes = din_len + 4; /* status, length, checksum, trailer */
+   uint8_t *out;
+   uint8_t *p;
+   int csum, len;
+   int rv;
+
+   /*
+* Sanity-check input size to make sure it plus transaction overhead
+* fits in the internal device buffer.
+*/
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+
+   /* We represent message length as a byte */
+   if (dout_len  0xff) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+
+   /*
+* TODO(s...@chromium.org): Clear input buffer so we don't get false
+* hits for MSG_HEADER
+*/
+   memset(dev-din, '\0', in_bytes);
+
+   if (spi_claim_bus(dev-spi)) {
+   debug(%s: Cannot claim SPI bus\n, __func__);
+   return -1;
+   }
+
+   out = dev-dout;
+   out[0] = cmd_version;
+   out[1] = cmd;
+   out[2] = (uint8_t)dout_len;
+   memcpy(out + 3, dout, dout_len);
+   csum = cros_ec_calc_checksum(out, 3) + cros_ec_calc_checksum(dout, 
dout_len);
+   out[3 + dout_len] = (uint8_t)csum;
+
+   /*
+* Send output data and receive input data starting such that the
+* message body will be dword aligned.
+*/
+   p = dev-din + sizeof(int64_t) - 2;
+   len = dout_len + 4;
+   cros_ec_dump_data(out, cmd, out, len);
+   rv = spi_xfer(dev-spi, max(len, in_bytes) * 8, out, p,
+ SPI_XFER_BEGIN | SPI_XFER_END);
+
+   spi_release_bus(dev-spi);
+
+   if (rv) {
+   debug(%s: Cannot complete

[U-Boot] [PATCH 2/7] Add cros_ec_i2c.

[Hung-ying Tyan]

Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
 drivers/misc/Makefile  |   1 +
 drivers/misc/cros_ec_i2c.c | 198 +
 2 files changed, 199 insertions(+)
 create mode 100644 drivers/misc/cros_ec_i2c.c

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 33fe822..9363ef9 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -31,6 +31,7 @@ COBJS-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
 COBJS-$(CONFIG_GPIO_LED) += gpio_led.o
 COBJS-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 COBJS-$(CONFIG_CROS_EC) += cros_ec.o
+COBJS-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 COBJS-$(CONFIG_NS87308) += ns87308.o
 COBJS-$(CONFIG_PDSP188x) += pdsp188x.o
 COBJS-$(CONFIG_STATUS_LED) += status_led.o
diff --git a/drivers/misc/cros_ec_i2c.c b/drivers/misc/cros_ec_i2c.c
new file mode 100644
index 000..941e170
--- /dev/null
+++ b/drivers/misc/cros_ec_i2c.c
@@ -0,0 +1,198 @@
+/*
+ * Chromium OS cros_ec driver - I2C interface
+ *
+ * Copyright (c) 2012 The Chromium OS Authors.
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * The Matrix Keyboard Protocol driver handles talking to the keyboard
+ * controller chip. Mostly this is for keyboard functions, but some other
+ * things have slipped in, so we provide generic services to talk to the
+ * KBC.
+ */
+
+#include common.h
+#include i2c.h
+#include cros_ec.h
+
+#ifdef DEBUG_TRACE
+#define debug_trace(fmt, b...) debug(fmt, #b)
+#else
+#define debug_trace(fmt, b...)
+#endif
+
+int cros_ec_i2c_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
+const uint8_t *dout, int dout_len,
+uint8_t **dinp, int din_len)
+{
+   int old_bus = 0;
+   /* version8, cmd8, arglen8, out8[dout_len], csum8 */
+   int out_bytes = dout_len + 4;
+   /* response8, arglen8, in8[din_len], checksum8 */
+   int in_bytes = din_len + 3;
+   uint8_t *ptr;
+   /* Receive input data, so that args will be dword aligned */
+   uint8_t *in_ptr;
+   int ret;
+
+   old_bus = i2c_get_bus_num();
+
+   /*
+* Sanity-check I/O sizes given transaction overhead in internal
+* buffers.
+*/
+   if (out_bytes  sizeof(dev-dout)) {
+   debug(%s: Cannot send %d bytes\n, __func__, dout_len);
+   return -1;
+   }
+   if (in_bytes  sizeof(dev-din)) {
+   debug(%s: Cannot receive %d bytes\n, __func__, din_len);
+   return -1;
+   }
+   assert(dout_len = 0);
+   assert(dinp);
+
+   /*
+* Copy command and data into output buffer so we can do a single I2C
+* burst transaction.
+*/
+   ptr = dev-dout;
+
+   /*
+* in_ptr starts of pointing to a dword-aligned input data buffer.
+* We decrement it back by the number of header bytes we expect to
+* receive, so that the first parameter of the resulting input data
+* will be dword aligned.
+*/
+   in_ptr = dev-din + sizeof(int64_t);
+   if (!dev-cmd_version_is_supported) {
+   /* Send an old-style command */
+   *ptr++ = cmd;
+   out_bytes = dout_len + 1;
+   in_bytes = din_len + 2;
+   in_ptr--;   /* Expect just a status byte */
+   } else {
+   *ptr++ = EC_CMD_VERSION0 + cmd_version;
+   *ptr++ = cmd;
+   *ptr++ = dout_len;
+   in_ptr -= 2;/* Expect status, length bytes */
+   }
+   memcpy(ptr, dout, dout_len);
+   ptr += dout_len;
+
+   if (dev-cmd_version_is_supported)
+   *ptr++ = (uint8_t)cros_ec_calc_checksum(dev-dout, dout_len + 
3);
+
+   /* Set to the proper i2c bus */
+   if (i2c_set_bus_num(dev-bus_num)) {
+   debug(%s: Cannot change to I2C bus %d\n, __func__,
+   dev-bus_num);
+   return -1;
+   }
+
+   /* Send output data */
+   cros_ec_dump_data(out, -1, dev-dout, out_bytes);
+   ret = i2c_write(dev-addr, 0, 0, dev-dout, out_bytes);
+   if (ret) {
+   debug(%s

[U-Boot] [PATCH 6/7] Add cros-ec-keyb to exynos5250-snow.dts.

[Hung-ying Tyan]

Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Bernie Thompson bhthomp...@chromium.org
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Gabe Black gabebl...@chromium.org
Signed-off-by: Hatim Ali hatim...@samsung.com
Signed-off-by: Sean Paul seanp...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin vpala...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
 board/samsung/dts/exynos5250-snow.dts | 82 +++
 1 file changed, 82 insertions(+)

diff --git a/board/samsung/dts/exynos5250-snow.dts 
b/board/samsung/dts/exynos5250-snow.dts
index af788a6..a7526e5 100644
--- a/board/samsung/dts/exynos5250-snow.dts
+++ b/board/samsung/dts/exynos5250-snow.dts
@@ -43,6 +43,33 @@
};
};
 
+   i2c4: i2c@12ca {
+   cros-ec@1e {
+   reg = 0x1e;
+   compatible = google,cros-ec;
+   i2c-max-frequency = 10;
+   ec-interrupt = gpio 174 1;
+   };
+
+   power-regulator@48 {
+   compatible = ti,tps65090;
+   reg = 0x48;
+   };
+   };
+
+   spi@131b {
+   spi-max-frequency = 100;
+   spi-deactivate-delay = 100;
+   cros-ec@0 {
+   reg = 0;
+   compatible = google,cros-ec;
+   spi-max-frequency = 500;
+   ec-interrupt = gpio 174 1;
+   optimise-flash-write;
+   status = disabled;
+   };
+   };
+
sound@12d6 {
samsung,i2s-epll-clock-frequency = 19200;
samsung,i2s-sampling-rate = 48000;
@@ -66,4 +93,59 @@
compatible = maxim,max77686_pmic;
};
};
+
+   cros-ec-keyb {
+   compatible = google,cros-ec-keyb;
+   google,key-rows = 8;
+   google,key-columns = 13;
+   google,repeat-delay-ms = 240;
+   google,repeat-rate-ms = 30;
+   google,ghost-filter;
+   /*
+* Keymap entries take the form of 0xRRCC where
+* RR=Row CC=Column =Key Code
+* The values below are for a US keyboard layout and
+* are taken from the Linux driver. Note that the
+* 102ND key is not used for US keyboards.
+*/
+   linux,keymap = 
+   /* CAPSLCK F1 B  F10 */
+   0x0001003a 0x0002003b 0x00030030 0x00040044
+   /* N   =  R_ALT  ESC */
+   0x00060031 0x0008000d 0x000a0064 0x01010001
+   /* F4  G  F7 H   */
+   0x0102003e 0x01030022 0x01040041 0x01060023
+   /* '   F9 BKSPACEL_CTRL  */
+   0x01080028 0x01090043 0x010b000e 0x021d
+   /* TAB F3 T  F6  */
+   0x0201000f 0x0202003d 0x02030014 0x02040040
+   /* ]   Y  102ND  [   */
+   0x0205001b 0x02060015 0x02070056 0x0208001a
+   /* F8  GRAVE  F2 5   */
+   0x02090042 0x03010029 0x0302003c 0x03030006
+   /* F5  6  -  \   */
+   0x0304003f 0x03060007 0x0308000c 0x030b002b
+   /* R_CTRL  A  D  F   */
+   0x0461 0x0401001e 0x04020020 0x04030021
+   /* S   K  J  ;   */
+   0x0404001f 0x04050025 0x04060024 0x04080027
+   /* L   ENTER  Z  C   */
+   0x04090026 0x040b001c 0x0501002c 0x0502002e
+   /* V   X  ,  M   */
+   0x0503002f 0x0504002d 0x05050033 0x05060032
+   /* L_SHIFT /  .  SPACE   */
+   0x0507002a 0x05080035 0x05090034 0x050B0039
+   /* 1   3  4  2   */
+   0x06010002 0x06020004 0x06030005 0x06040003
+   /* 8   7  0  9   */
+   0x06050009 0x06060008 0x0608000b 0x0609000a
+   /* L_ALT   DOWN   RIGHT  Q   */
+   0x060a0038 0x060b006c 0x060c006a 0x07010010
+   /* E   R  W  I   */
+   0x07020012 0x07030013 0x07040011 0x07050017
+   /* U   R_SHIFTP  O