[U-Boot] [PATCH] powerpc/mpc8572ds: Enable bank interleaving to cs0+cs1 for dual-rank DIMMs
The controller interleaving only takes the usable memory mapped to cs0. In the case of bank interleaving not enabled, only half of dual-rank DIMM will be used. For single-rank DIMM bank interleaving will be auto disabled. Signed-off-by: Jia Hongtao b38...@freescale.com Signed-off-by: Li Yang le...@freescale.com --- include/configs/MPC8572DS.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index a62b7d5..d233365 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -735,7 +735,7 @@ #define CONFIG_BAUDRATE115200 #defineCONFIG_EXTRA_ENV_SETTINGS \ -hwconfig=fsl_ddr:ctlr_intlv=bank,ecc=off\0 \ +hwconfig=fsl_ddr:ctlr_intlv=bank,bank_intlv=cs0_cs1,ecc=off\0 \ netdev=eth0\0\ uboot= __stringify(CONFIG_UBOOTPATH) \0\ tftpflash=tftpboot $loadaddr $uboot; \ -- 1.7.5.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/mpc8544ds: Add USB controller support for MPC8544DS
USB controller in uboot is a required feature for MPC8544DS. Without this support there is no 'usb' command in uboot. Signed-off-by: Jia Hongtao b38...@freescale.com Signed-off-by: Li Yang le...@freescale.com --- include/configs/MPC8544DS.h | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 83b8668..d5f3c5f 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -415,6 +415,18 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_CMD_EXT2 #endif +/* + * USB + */ +#define CONFIG_USB_EHCI + +#ifdef CONFIG_USB_EHCI +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI_PCI +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_USB_STORAGE +#define CONFIG_PCI_EHCI_DEVICE 0 +#endif #undef CONFIG_WATCHDOG /* watchdog disabled */ -- 1.7.5.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/sgmii: To support PHY link state auto detect in SGMII mode
PHYs on SGMII riser card are used in SGMII mode with different external
IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type
under ethernet node should be updated. Otherwise the PHY interrupt can not
be handled therefor PHY link state change can not be auto detected.
For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed
but it's still be kept to guarantee the sgmii mode could work with old
device tree.
Signed-off-by: Li Yang le...@freescale.com
Signed-off-by: Jia Hongtao b38...@freescale.com
---
board/freescale/common/sgmii_riser.c | 57 +-
1 files changed, 49 insertions(+), 8 deletions(-)
diff --git a/board/freescale/common/sgmii_riser.c
b/board/freescale/common/sgmii_riser.c
index 4f40a1d..5c3c593 100644
--- a/board/freescale/common/sgmii_riser.c
+++ b/board/freescale/common/sgmii_riser.c
@@ -17,6 +17,7 @@
#include net.h
#include libfdt.h
#include tsec.h
+#include fdt_support.h
void fsl_sgmii_riser_init(struct tsec_info_struct *tsec_info, int num)
{
@@ -31,6 +32,7 @@ void fsl_sgmii_riser_fdt_fixup(void *fdt)
{
struct eth_device *dev;
int node;
+ int mdio_node;
int i = -1;
int etsec_num = 0;
@@ -40,16 +42,38 @@ void fsl_sgmii_riser_fdt_fixup(void *fdt)
while ((dev = eth_get_dev_by_index(++i)) != NULL) {
struct tsec_private *priv;
+ int phy_node;
int enet_node;
+ uint32_t ph;
+ char sgmii_phy[16];
char enet[16];
const u32 *phyh;
- int phynode;
const char *model;
const char *path;
if (!strstr(dev-name, eTSEC))
continue;
+ priv = dev-priv;
+ if (!(priv-flags TSEC_SGMII)) {
+ etsec_num++;
+ continue;
+ }
+
+ mdio_node = fdt_node_offset_by_compatible(fdt, -1,
+ fsl,gianfar-mdio);
+ if (mdio_node 0)
+ return;
+
+ sprintf(sgmii_phy, sgmii-phy@%d, etsec_num);
+ phy_node = fdt_subnode_offset(fdt, mdio_node, sgmii_phy);
+ if (phy_node 0) {
+ fdt_increase_size(fdt, 32);
+ ph = fdt_create_phandle(fdt, phy_node);
+ if (!ph)
+ continue;
+ }
+
sprintf(enet, ethernet%d, etsec_num++);
path = fdt_getprop(fdt, node, enet, NULL);
if (!path) {
@@ -74,15 +98,32 @@ void fsl_sgmii_riser_fdt_fixup(void *fdt)
if (!strstr(model, TSEC))
continue;
- phyh = fdt_getprop(fdt, enet_node, phy-handle, NULL);
- if (!phyh)
- continue;
+ if (phy_node 0) {
+ /*
+* This part is only for old device tree without
+* sgmii_phy nodes. It's kept just for compatible
+* reason. Soon to be deprecated if all device tree
+* get updated.
+*/
+ phyh = fdt_getprop(fdt, enet_node, phy-handle, NULL);
+ if (!phyh)
+ continue;
- phynode = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*phyh));
+ phy_node = fdt_node_offset_by_phandle(fdt,
+ fdt32_to_cpu(*phyh));
- priv = dev-priv;
+ priv = dev-priv;
- if (priv-flags TSEC_SGMII)
- fdt_setprop_cell(fdt, phynode, reg, priv-phyaddr);
+ if (priv-flags TSEC_SGMII)
+ fdt_setprop_cell(fdt, phy_node, reg,
+ priv-phyaddr);
+ } else {
+ fdt_setprop(fdt, enet_node, phy-handle, ph,
+ sizeof(ph));
+ fdt_setprop_string(fdt, enet_node,
+ phy-connection-type,
+ phy_string_for_interface(
+ PHY_INTERFACE_MODE_SGMII));
+ }
}
}
--
1.7.5.1
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Re: [U-Boot] [PATCH] powerpc/sgmii: To support PHY link state auto detect in SGMII mode
Note that this patch works with new dts. Please refer to: http://patchwork.ozlabs.org/patch/170617/ -Hongtao. -Original Message- From: Jia Hongtao-B38951 Sent: Thursday, July 12, 2012 5:40 PM To: u-boot@lists.denx.de Cc: aflem...@gmail.com; sun york-R58495; Li Yang-R58472; Jia Hongtao- B38951 Subject: [PATCH] powerpc/sgmii: To support PHY link state auto detect in SGMII mode PHYs on SGMII riser card are used in SGMII mode with different external IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection- type under ethernet node should be updated. Otherwise the PHY interrupt can not be handled therefor PHY link state change can not be auto detected. For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed but it's still be kept to guarantee the sgmii mode could work with old device tree. Signed-off-by: Li Yang le...@freescale.com Signed-off-by: Jia Hongtao b38...@freescale.com --- board/freescale/common/sgmii_riser.c | 57 +- 1 files changed, 49 insertions(+), 8 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot][PATCH] uboot/flexcan: fixup flexcan clock-frequency
Hi Kumar, We want more comments on this patch to speed up the pushing-to-source progress. Thanks. -Original Message- From: Jia Hongtao-B38951 Sent: Tuesday, November 15, 2011 3:04 PM To: u-boot@lists.denx.de Cc: Li Yang-R58472; Jia Hongtao-B38951 Subject: [u-boot][PATCH] uboot/flexcan: fixup flexcan clock-frequency Make the fixup matchable with dts and kernel. Update the compatible from fsl,flexcan-v1.0 to fsl,p1010-flexcan and Change the clock-freq property to clock-frequency. We also change flexcan frequency from CCB-clock to CCB-clock/2 according to P1010 spec. We now keep the old interfaces to make previous kernel work. They should be removed in the future. Signed-off-by: Jia Hongtao b38...@freescale.com Signed-off-by: Li Yang le...@freescale.com --- arch/powerpc/cpu/mpc85xx/fdt.c | 13 - 1 files changed, 12 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 9d31568..a53a31d 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -660,8 +660,19 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, fsl,gianfar-ptp-timer, timer-frequency, gd-bus_clk/2, 1); + /* +* clock-freq should change to clock-frequency and +* flexcan-v1.0 should change to p1010-flexcan respectively +* in the future. +*/ do_fixup_by_compat_u32(blob, fsl,flexcan-v1.0, - clock_freq, gd-bus_clk, 1); + clock_freq, gd-bus_clk/2, 1); + + do_fixup_by_compat_u32(blob, fsl,flexcan-v1.0, + clock-frequency, gd-bus_clk/2, 1); + + do_fixup_by_compat_u32(blob, fsl,p1010-flexcan, + clock-frequency, gd-bus_clk/2, 1); fdt_fixup_usb(blob); } -- 1.7.5.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [u-boot][PATCH] uboot/flexcan: fixup flexcan clock-frequency
Make the fixup matchable with dts and kernel. Update the compatible from fsl,flexcan-v1.0 to fsl,p1010-flexcan and Change the clock-freq property to clock-frequency. We also change flexcan frequency from CCB-clock to CCB-clock/2 according to P1010 spec. We now keep the old interfaces to make previous kernel work. They should be removed in the future. Signed-off-by: Jia Hongtao b38...@freescale.com Signed-off-by: Li Yang le...@freescale.com --- arch/powerpc/cpu/mpc85xx/fdt.c | 13 - 1 files changed, 12 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 9d31568..a53a31d 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -660,8 +660,19 @@ void ft_cpu_setup(void *blob, bd_t *bd) do_fixup_by_compat_u32(blob, fsl,gianfar-ptp-timer, timer-frequency, gd-bus_clk/2, 1); + /* +* clock-freq should change to clock-frequency and +* flexcan-v1.0 should change to p1010-flexcan respectively +* in the future. +*/ do_fixup_by_compat_u32(blob, fsl,flexcan-v1.0, - clock_freq, gd-bus_clk, 1); + clock_freq, gd-bus_clk/2, 1); + + do_fixup_by_compat_u32(blob, fsl,flexcan-v1.0, + clock-frequency, gd-bus_clk/2, 1); + + do_fixup_by_compat_u32(blob, fsl,p1010-flexcan, + clock-frequency, gd-bus_clk/2, 1); fdt_fixup_usb(blob); } -- 1.7.5.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
