Re: [U-Boot] [U-Boot,v5,09/11] S3C24XX: Add NAND Flash driver

2013-11-14 Thread José Miguel Gonçalves

Hi Scott,

This patch series was missed by Minkyu when I posted it one year ago.
I've promised to rebase it on the latest u-boot tree, but still did not 
have time for doing it;


http://lists.denx.de/pipermail/u-boot/2013-September/163467.html

Best regards,
José Gonçalves

On 14-11-2013 01:56, Scott Wood wrote:

On Fri, Sep 21, 2012 at 07:47:46PM +0100, José Miguel Gonçalves wrote:

NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt

---
Changes for v2:
- Coding style cleanup
- Use of clrsetbits_le32()
- Use of register bit macros instead of magic numbers

Changes for v3:
- Removed magic numbers
- Removed a macro to declare a void printf()
- Replaced one printf() with a puts()

Changes for v4:
- Coding style cleanup
- Use of a struct to store chip private data
- Replaced u_long by u32
- Replaced u_char by uint8_t
- Added error message in s3c_nand_select_chip()
- Optimization of s3c_nand_hwcontrol()

Changes for v5:
- Dropped const attribute in the private struct
- Added const attribute to 'cs' field in the private struct
---
  drivers/mtd/nand/Makefile   |1 +
  drivers/mtd/nand/s3c24xx_nand.c |  255 +++
  2 files changed, 256 insertions(+)
  create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

Minkyu, what's the status of this patchset?  I don't see any comments in
patchwork.  Is this patch still active and needing my ack?

-Scott




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Re: [U-Boot] About patch S3C24XX: Add support to MINI2416 board

2013-09-25 Thread José Miguel Gonçalves

On 21-09-2013 16:56, Marek Vasut wrote:



Hi,

Precisely one year after my patch submission to add support to the
MINI2416 board, seems a good time to ask this question, is there any
good reason for not integrating this patch on the u-boot mainline?

http://lists.denx.de/pipermail/u-boot/2012-September/134779.html

Best regards,
José Gonçalves

CCing Minkyu and Albert.



Ping.

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Re: [U-Boot] About patch S3C24XX: Add support to MINI2416 board

2013-09-25 Thread José Miguel Gonçalves

Hi Minkyu,

On 25-09-2013 09:55, Minkyu Kang wrote:

Hello,

On 25/09/13 17:06, José Miguel Gonçalves wrote:

On 21-09-2013 16:56, Marek Vasut wrote:

Hi,

Precisely one year after my patch submission to add support to the
MINI2416 board, seems a good time to ask this question, is there any
good reason for not integrating this patch on the u-boot mainline?

http://lists.denx.de/pipermail/u-boot/2012-September/134779.html

I'm sorry to missing your patches.
It seems to stay at mailing queue for a long time.
So could you please resend the patchset?
Maybe it need some modification about license, maintainer entry,,,



There is no changes to made. You can find the patchset in the mailing 
list archive:


http://lists.denx.de/pipermail/u-boot/2012-September/134779.html
http://lists.denx.de/pipermail/u-boot/2012-September/134774.html
http://lists.denx.de/pipermail/u-boot/2012-September/134782.html
http://lists.denx.de/pipermail/u-boot/2012-September/134778.html
http://lists.denx.de/pipermail/u-boot/2012-September/134772.html
http://lists.denx.de/pipermail/u-boot/2012-September/134775.html
http://lists.denx.de/pipermail/u-boot/2012-September/134781.html
http://lists.denx.de/pipermail/u-boot/2012-September/134773.html
http://lists.denx.de/pipermail/u-boot/2012-September/134776.html
http://lists.denx.de/pipermail/u-boot/2012-September/134783.html
http://lists.denx.de/pipermail/u-boot/2012-September/134780.html
http://lists.denx.de/pipermail/u-boot/2012-September/134777.html

or in patchwork:

http://patchwork.ozlabs.org/patch/185877/
http://patchwork.ozlabs.org/patch/185884/
http://patchwork.ozlabs.org/patch/185881/
http://patchwork.ozlabs.org/patch/185875/
http://patchwork.ozlabs.org/patch/185878/
http://patchwork.ozlabs.org/patch/185883/
http://patchwork.ozlabs.org/patch/185876/
http://patchwork.ozlabs.org/patch/185879/
http://patchwork.ozlabs.org/patch/185885/
http://patchwork.ozlabs.org/patch/185882/
http://patchwork.ozlabs.org/patch/185880/

Best regards,
José Gonçalves
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Re: [U-Boot] About patch S3C24XX: Add support to MINI2416 board

2013-09-25 Thread José Miguel Gonçalves

On 25-09-2013 10:30, Minkyu Kang wrote:

On 25/09/13 18:18, José Miguel Gonçalves wrote:

Hi Minkyu,

On 25-09-2013 09:55, Minkyu Kang wrote:

Hello,

On 25/09/13 17:06, José Miguel Gonçalves wrote:

On 21-09-2013 16:56, Marek Vasut wrote:

Hi,

Precisely one year after my patch submission to add support to the
MINI2416 board, seems a good time to ask this question, is there any
good reason for not integrating this patch on the u-boot mainline?

http://lists.denx.de/pipermail/u-boot/2012-September/134779.html

I'm sorry to missing your patches.
It seems to stay at mailing queue for a long time.
So could you please resend the patchset?
Maybe it need some modification about license, maintainer entry,,,


There is no changes to made. You can find the patchset in the mailing list 
archive:

http://lists.denx.de/pipermail/u-boot/2012-September/134779.html
http://lists.denx.de/pipermail/u-boot/2012-September/134774.html
http://lists.denx.de/pipermail/u-boot/2012-September/134782.html
http://lists.denx.de/pipermail/u-boot/2012-September/134778.html
http://lists.denx.de/pipermail/u-boot/2012-September/134772.html
http://lists.denx.de/pipermail/u-boot/2012-September/134775.html
http://lists.denx.de/pipermail/u-boot/2012-September/134781.html
http://lists.denx.de/pipermail/u-boot/2012-September/134773.html
http://lists.denx.de/pipermail/u-boot/2012-September/134776.html
http://lists.denx.de/pipermail/u-boot/2012-September/134783.html
http://lists.denx.de/pipermail/u-boot/2012-September/134780.html
http://lists.denx.de/pipermail/u-boot/2012-September/134777.html

or in patchwork:

http://patchwork.ozlabs.org/patch/185877/
http://patchwork.ozlabs.org/patch/185884/
http://patchwork.ozlabs.org/patch/185881/
http://patchwork.ozlabs.org/patch/185875/
http://patchwork.ozlabs.org/patch/185878/
http://patchwork.ozlabs.org/patch/185883/
http://patchwork.ozlabs.org/patch/185876/
http://patchwork.ozlabs.org/patch/185879/
http://patchwork.ozlabs.org/patch/185885/
http://patchwork.ozlabs.org/patch/185882/
http://patchwork.ozlabs.org/patch/185880/

Best regards,
José Gonçalves


I mean, your patch will not be applied to current tree clearly.



OK, I will rebase that patchset on the current tree (can't promise it 
for soon, though).


Don't you have any comments on it before I resubmit?

Best regards,
José Gonçalves

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Re: [U-Boot] Does u-boot support S3C24xx nand ecc?

2013-09-24 Thread José Miguel Gonçalves
I've added this support for an S3C2416 based board over 2012.10 u-boot 
sources.

Please check this patch at:

http://patchwork.ozlabs.org/patch/185885/

José Gonçalves
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Re: [U-Boot] s3c2416 usb ohci issue

2013-09-24 Thread José Miguel Gonçalves

Hi Zoltan,

Did not try this myself on the MINI2416 board, so I can not give you any 
hints on that.

But I'm curious, why do you need u-boot's OHCI support for that board?

Best regards,
José Gonçalves
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[U-Boot] About patch S3C24XX: Add support to MINI2416 board

2013-09-21 Thread José Miguel Gonçalves

Hi,

Precisely one year after my patch submission to add support to the 
MINI2416 board, seems a good time to ask this question, is there any 
good reason for not integrating this patch on the u-boot mainline?


http://lists.denx.de/pipermail/u-boot/2012-September/134779.html

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v5 00/11] S3C24XX: Add support to MINI2416 board

2012-11-27 Thread José Miguel Gonçalves

Hi,

Can you tell me if this patch series is going to be included on next u-boot 
release?
Do you need anything from my side in order to push this?

Best regards,
José Gonçalves

On 21-09-2012 19:47, José Miguel Gonçalves wrote:

Support for the MINI2416 board based on a Samsung's S3C2416 SoC with
64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a
WM8731 Audio CODEC.

Changes for v2:
- Coding style cleanup
- Removed new serial and rtc drivers
- Use of in-tree serial and rtc drivers

Changes for v3:
- Rebased on new SPL framework:
  http://github.com/trini/u-boot WIP/spl-improvements
- Removed patch ARM: fix relocation on ARM926EJS
- Add patch to configure printf() inclusion on SPL
- Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin
- Removed magic numbers
- Checkpatch clean except:
  - False positive:
ERROR: spaces required around that ':' (ctx:VxV)
#692: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDR FE:11:22:33:44:55
  - Following preexistent coding style:
WARNING: please, no spaces at the start of a line
#1716: FILE: include/common.h:631:
+defined(CONFIG_S3C24XX) || \$

Changes for v4:
- NAND Flash driver cleanup and optimization

Changes for v5:
- Changed image filename for SPL + u-boot
- Minor change in the NAND Flash driver
- Coding style cleanup
- Removal of #define CONFIG_SYS_BAUDRATE_TABLE as this in the defaults now
- Checkpatch clean with the exceptions indicated in the v3 changes

José Miguel Gonçalves (11):
   Add configuration option to select printf() inclusion on SPL
   S3C24XX: Add core support for Samsung's S3C24XX SoCs
   serial: Add support to 4 ports in serial_s3c24x0
   serial: Use a more precise baud rate generation for serial_s3c24x0
   serial: Remove unnecessary delay in serial_s3c24x0
   rtc: Improve rtc_get() on s3c24x0_rtc
   rtc: Fix rtc_reset() on s3c24x0_rtc
   rtc: Don't allow setting unsuported years on s3c24x0_rtc
   S3C24XX: Add NAND Flash driver
   Add u-boot-with-spl.bin target to the Makefile
   S3C24XX: Add support to MINI2416 board

  MAINTAINERS |4 +
  Makefile|   11 +-
  README  |3 +
  arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   56 +++
  arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   57 +++
  arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   57 +++
  arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
  arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +
  arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  152 ++
  arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  130 +
  arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  183 +++
  arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
  arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  615 +++
  arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
  arch/arm/include/asm/arch-s3c24xx/spl.h |   29 ++
  board/boardcon/mini2416/Makefile|   47 ++
  board/boardcon/mini2416/config.mk   |4 +
  board/boardcon/mini2416/mini2416.c  |  104 
  board/boardcon/mini2416/mini2416_spl.c  |  202 
  board/boardcon/mini2416/u-boot-spl.lds  |   63 +++
  boards.cfg  |1 +
  drivers/mtd/nand/Makefile   |1 +
  drivers/mtd/nand/s3c24xx_nand.c |  255 ++
  drivers/rtc/s3c24x0_rtc.c   |   30 +-
  drivers/serial/serial_s3c24x0.c |   52 +-
  include/common.h|   12 +
  include/configs/VCMA9.h |2 +-
  include/configs/mini2416.h  |  202 
  include/configs/smdk2410.h  |2 +-
  spl/Makefile|4 +-
  30 files changed, 2550 insertions(+), 29 deletions(-)
  create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
  create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
  create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
  create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
  create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
  create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
  create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
  create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
  create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
  create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
  create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
  create mode 100644 arch/arm/include/asm/arch-s3c24xx/spl.h
  create mode 100644 board/boardcon/mini2416/Makefile
  create mode 100644 board/boardcon/mini2416/config.mk

Re: [U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-21 Thread José Miguel Gonçalves

Hi Wolfgang,

On 09/21/2012 06:43 AM, Wolfgang Denk wrote:

Dear Tom,

In message 5fbf8e85ca34454794f0f7ecba79798f379f6fd...@hqmail04.nvidia.com you 
wrote:

If you flash u-boot-dtb-tegra.bin, you'll get a fully functioning
U-Boot. There's an intermediate file (u-boot-dtb.bin) that I assume
is u-boot.bin+dtb - I'm not sure why it's left around - Allen could
comment here.

I _dislike_ the idea of having image names which include architecture
or even board parts.  I would really like to have generic names, that
can be used in a consistent way across platforms, architectures and
boards.


So in my eyes, all you really need is u-boot-dtb-tegra.bin - an
unwieldy name, to be sure, but it seems to satisfy your request for a
Soc identifier in the name. I voted for just having u-boot.bin be the

Please reconsider.  I definitely do NOT want to have SoC names or that
in any such images!


IIRC, the original idea was to provide image names (common for all
architectures, SoCs, boards) that only depend on where you install
U-Boot to.  in this way, we would have:

- u-boot.binfor the generic case (say, for installation into NOR
 flash, no SPL or similar needed).
- u-boot-nand.bin
for installation in NAND (with all needed headers,
padding etc. included)
- u-boot-onenand.bin
for installation in OneNAND
- u-boot.sd for installation on a SDCard
[actually we have an inconsistency in names here; this
should have been u-boot-sd.bin or maybe even better
u-boot-sdcard.bin]
etc.

It is very important to me that we do NOT include any architectures,
SoCs, or board specifc parts in the names because this will cause
major PITA for all kind of automatic test suites etc.



To me this seems also a cleaner solution, as any end user, that simply 
takes the u-boot sources and performs a make, would easily find the 
appropriate file to burn on his boot media.


But in that case, as the NAND image format (for instance) is 
architecture and/or SoC dependant, what do you suggest is to add 
conditionals in the Makefile that adequate the 'u-boot-nand.bin' file to 
the target SoC?


Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-21 Thread José Miguel Gonçalves

On 21-09-2012 17:13, Tom Rini wrote:

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 09/21/12 08:52, Wolfgang Denk wrote:

Dear José Miguel Gonçalves,

In message 505c21bb.7000...@inov.pt you wrote:

It is very important to me that we do NOT include any
architectures, SoCs, or board specifc parts in the names
because this will cause major PITA for all kind of automatic
test suites etc.

To me this seems also a cleaner solution, as any end user, that
simply takes the u-boot sources and performs a make, would
easily find the appropriate file to burn on his boot media.

But in that case, as the NAND image format (for instance) is
architecture and/or SoC dependant, what do you suggest is to add
conditionals in the Makefile that adequate the 'u-boot-nand.bin'
file to the target SoC?

SoC specific make rules can probably be added to the respective SoC
specific makefiles, thus still avoiding to clutter the top level
Makefile with lots of conditionals.

Ideally? Yes, Possible today?  Not sure.  I have a hazy recollection
that it wasn't so easy when I tried adding some build rules to one of
the config.mk files.  When I post SPI SPL for am335x support I'll try
again since for that I need to add a rule to generate a byte-swapped
MLO file.  If that can go somewhere other than spl/Makefile that would
be nice (but needs to be visible to a number of TI SoCs is an issue).



So what is your suggestion for my patch?
Can I push it with a new u-boot-with-spl.bin target and you'll handle the 
unification of all NAND targets later?


Best regards,
José Gonçalves
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[U-Boot] [PATCH v5 04/11] serial: Use a more precise baud rate generation for serial_s3c24x0

2012-09-21 Thread José Miguel Gonçalves
The values stored in the baud rate divisor register (UBRDIVn) and dividing
slot register (UDIVSLOTn), are used to determine the serial baudrate.
Previously only UBRDIVn was set. This patch initializes also UDIVSLOTn
which allows to obtain a more precise baudrate.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - Verbose patch description

Changes for v4:
   - None

Changes for v5:
   - None
---
 drivers/serial/serial_s3c24x0.c |   24 
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 280cd2d..c9bc121 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -92,16 +92,32 @@ DECLARE_GLOBAL_DATA_PTR;
 static int hwflow;
 #endif
 
+/*
+ * The values stored in the baud rate divisor register (UBRDIVn) and dividing
+ * slot register (UDIVSLOTn), are used to determine the serial Tx/Rx clock rate
+ * (baud rate) as follows:
+ * DIV_VAL = UBRDIVn + (num of 1’s in UDIVSLOTn) / 16
+ * Using UDIVSLOT, which is the factor of floating point divisor, you can make
+ * more accurate baud rate. Section 2.1.10 of the S3C2416 User's Manual 
suggests
+ * using the constants on the following table.
+ */
+static const int udivslot[] = {
+   0x, 0x0080, 0x0808, 0x0888, 0x, 0x4924, 0x4A52, 0x54AA,
+   0x, 0xD555, 0xD5D5, 0xDDD5, 0x, 0xDFDD, 0xDFDF, 0xFFDF,
+};
+
 void _serial_setbrg(const int dev_index)
 {
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-   unsigned int reg = 0;
+   u32 pclk;
+   u32 baudrate;
int i;
 
-   /* value is calculated so : (int)(PCLK/16./baudrate) -1 */
-   reg = get_PCLK() / (16 * gd-baudrate) - 1;
+   pclk = get_PCLK();
+   baudrate = gd-baudrate;
 
-   writel(reg, uart-ubrdiv);
+   writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
+   writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
for (i = 0; i  100; i++)
/* Delay */ ;
 }
-- 
1.7.9.5

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[U-Boot] [PATCH v5 07/11] rtc: Fix rtc_reset() on s3c24x0_rtc

2012-09-21 Thread José Miguel Gonçalves
rtc_reset() must set the RTC date to the UNIX Epoch.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None

Changes for v5:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |   15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index b31dc53..3fd5cec 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -167,10 +167,17 @@ int rtc_set(struct rtc_time *tmp)
 
 void rtc_reset(void)
 {
-   struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
-
-   writeb((readb(rtc-rtccon)  ~0x06) | 0x08, rtc-rtccon);
-   writeb(readb(rtc-rtccon)  ~(0x08 | 0x01), rtc-rtccon);
+   static struct rtc_time tmp = {
+   .tm_year = 1970,
+   .tm_mon = 1,
+   .tm_mday = 1,
+   .tm_wday = 4,
+   .tm_hour = 0,
+   .tm_min = 0,
+   .tm_sec = 0,
+   };
+
+   rtc_set(tmp);
 }
 
 #endif
-- 
1.7.9.5

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[U-Boot] [PATCH v5 01/11] Add configuration option to select printf() inclusion on SPL

2012-09-21 Thread José Miguel Gonçalves
The printf() implementation needs 4~5KB of storage space which may not be
available when building an SPL for SoCs with scarce internal RAM
(8KB or less). This patch adds a new option, CONFIG_SPL_PRINTF_SUPPORT,
to deal with this.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v3:
   - New patch

Changes for v4:
   - None

Changes for v5:
   - None
---
 README   |3 +++
 include/common.h |   11 +++
 2 files changed, 14 insertions(+)

diff --git a/README b/README
index 016d8bc..988812c 100644
--- a/README
+++ b/README
@@ -2576,6 +2576,9 @@ FIT uImage format:
CONFIG_SPL_LIBCOMMON_SUPPORT
Support for common/libcommon.o in SPL binary
 
+   CONFIG_SPL_PRINTF_SUPPORT
+   Enable printf() support in common/libcommon.o
+
CONFIG_SPL_LIBDISK_SUPPORT
Support for disk/libdisk.o in SPL binary
 
diff --git a/include/common.h b/include/common.h
index 55025c0..c10d745 100644
--- a/include/common.h
+++ b/include/common.h
@@ -805,9 +805,20 @@ inttstc(void);
 /* stdout */
 void   putc(const char c);
 void   puts(const char *s);
+/*
+ * The printf() implementation needs 4~5KB of storage space which may not be
+ * available when building an SPL for SoCs with scarce internal RAM
+ * (8KB or less). To force printf() inclusion on an SPL we must define
+ * CONFIG_SPL_LIBCOMMON_SUPPORT and CONFIG_SPL_PRINTF_SUPPORT.
+ */
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_PRINTF_SUPPORT)
 intprintf(const char *fmt, ...)
__attribute__ ((format (__printf__, 1, 2)));
 intvprintf(const char *fmt, va_list args);
+#else
+#define printf(fmt...) do {} while (0)
+#define vprintf(fmt, args) do {} while (0)
+#endif
 
 /* stderr */
 #define eputc(c)   fputc(stderr, c)
-- 
1.7.9.5

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[U-Boot] [PATCH v5 05/11] serial: Remove unnecessary delay in serial_s3c24x0

2012-09-21 Thread José Miguel Gonçalves
The loop used to make a delay after baudrate setting is not necessary.
Moreover it is removed by the GCC optimizer (at least with GCC 4.6).

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None

Changes for v5:
   - None
---
 drivers/serial/serial_s3c24x0.c |3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index c9bc121..ec5d1cb 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -111,15 +111,12 @@ void _serial_setbrg(const int dev_index)
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
u32 pclk;
u32 baudrate;
-   int i;
 
pclk = get_PCLK();
baudrate = gd-baudrate;
 
writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
-   for (i = 0; i  100; i++)
-   /* Delay */ ;
 }
 
 #if defined(CONFIG_SERIAL_MULTI)
-- 
1.7.9.5

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[U-Boot] [PATCH v5 08/11] rtc: Don't allow setting unsuported years on s3c24x0_rtc

2012-09-21 Thread José Miguel Gonçalves
This RTC only supports a 100 years range so rtc_set() should not allow setting
years bellow 1970 or above 2069.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None

Changes for v5:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index 3fd5cec..bcd6d44 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -139,6 +139,11 @@ int rtc_set(struct rtc_time *tmp)
   tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
   tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
 #endif
+   if (tmp-tm_year  1970 || tmp-tm_year  2069) {
+   puts(ERROR: year should be between 1970 and 2069!\n);
+   return -1;
+   }
+
year = bin2bcd(tmp-tm_year % 100);
mon  = bin2bcd(tmp-tm_mon);
wday = bin2bcd(tmp-tm_wday);
-- 
1.7.9.5

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[U-Boot] [PATCH v5 11/11] S3C24XX: Add support to MINI2416 board

2012-09-21 Thread José Miguel Gonçalves
The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of Use of clrbits_le32(), setbits_le32() and clrsetbits_le32()
   - Use of register bit macros instead of magic numbers
   - Use of serial and rtc drivers implemented for s3c24x0

Changes for v3:
   - Changed target name from u-boot-ubl.bin to u-boot-pad.bin
   - Removed magic numbers
   - Changes to support new SPL framework

Changes for v4:
   - None

Changes for v5:
   - Changed target name from u-boot-pad.bin to u-boot-with-spl.bin
   - Coding style cleanup - removal of TABS after #define (this is not
 detected by checkpatch.pl!)
   - Removal of #define CONFIG_SYS_BAUDRATE_TABLE as this in the defaults now
---
 MAINTAINERS|4 +
 board/boardcon/mini2416/Makefile   |   47 
 board/boardcon/mini2416/config.mk  |4 +
 board/boardcon/mini2416/mini2416.c |  104 
 board/boardcon/mini2416/mini2416_spl.c |  202 
 board/boardcon/mini2416/u-boot-spl.lds |   63 ++
 boards.cfg |1 +
 include/configs/mini2416.h |  202 
 8 files changed, 627 insertions(+)
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 include/configs/mini2416.h

diff --git a/MAINTAINERS b/MAINTAINERS
index c5a6f2f..80ad29e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,10 @@ Fabio Estevam fabio.este...@freescale.com
mx53ard i.MX53
mx53smd i.MX53
 
+José Gonçalves jose.goncal...@inov.pt
+
+   mini2416ARM926EJS (S3C2416 SoC)
+
 Daniel Gorsulowski daniel.gorsulow...@esd.eu
 
meesc   ARM926EJS (AT91SAM9263 SoC)
diff --git a/board/boardcon/mini2416/Makefile b/board/boardcon/mini2416/Makefile
new file mode 100644
index 000..bf92ba1
--- /dev/null
+++ b/board/boardcon/mini2416/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves jose.goncal...@inov.pt
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifdef CONFIG_SPL_BUILD
+COBJS  += mini2416_spl.o
+else
+COBJS  += mini2416.o
+endif
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/boardcon/mini2416/config.mk 
b/board/boardcon/mini2416/config.mk
new file mode 100644
index 000..17d8166
--- /dev/null
+++ b/board/boardcon/mini2416/config.mk
@@ -0,0 +1,4 @@
+PAD_TO := 0x2000
+ifndef CONFIG_SPL_BUILD
+ALL-y += $(obj)u-boot-with-spl.bin
+endif
diff --git a/board/boardcon/mini2416/mini2416.c 
b/board/boardcon/mini2416/mini2416.c
new file mode 100644
index 000..b2c049b
--- /dev/null
+++ b/board/boardcon/mini2416/mini2416.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful

[U-Boot] [PATCH v5 03/11] serial: Add support to 4 ports in serial_s3c24x0

2012-09-21 Thread José Miguel Gonçalves
S3C2416 and S3C2450 have 4 UARTs insted of 3 found on older chips.
This patch adds support to the additional UART port and changes the
mapping between CONFIG_SERIAL? and S3C24X0_UART? in order they have
a direct correspondence.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None

Changes for v5:
   - None
---
 drivers/serial/serial_s3c24x0.c |   25 ++---
 include/configs/VCMA9.h |2 +-
 include/configs/smdk2410.h  |2 +-
 3 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 12bcdd3..280cd2d 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2002
  * Gary Jennejohn, DENX Software Engineering, ga...@denx.de
  *
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -24,17 +27,20 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_SERIAL1
+#if defined(CONFIG_SERIAL0)
 #define UART_NRS3C24X0_UART0
 
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
 #define UART_NRS3C24X0_UART1
 
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
 #define UART_NRS3C24X0_UART2
 
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C24X0_UART3
+
 #else
-#error Bad: you didn't configure serial ...
+#error You didn't configure serial.
 #endif
 
 #include asm/io.h
@@ -310,15 +316,20 @@ INIT_S3C_SERIAL_STRUCTURE(1, s3ser1);
 DECLARE_S3C_SERIAL_FUNCTIONS(2);
 struct serial_device s3c24xx_serial2_device =
 INIT_S3C_SERIAL_STRUCTURE(2, s3ser2);
+DECLARE_S3C_SERIAL_FUNCTIONS(3);
+struct serial_device s3c24xx_serial3_device =
+INIT_S3C_SERIAL_STRUCTURE(3, s3ser3);
 
 __weak struct serial_device *default_serial_console(void)
 {
-#if defined(CONFIG_SERIAL1)
+#if defined(CONFIG_SERIAL0)
return s3c24xx_serial0_device;
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
return s3c24xx_serial1_device;
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
return s3c24xx_serial2_device;
+#elif defined(CONFIG_SERIAL3)
+   return s3c24xx_serial3_device;
 #else
 #error CONFIG_SERIAL? missing.
 #endif
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 6ad4a6b..82db58f 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -122,7 +122,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on VCMA9 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on VCMA9 */
 
 /* USB support (currently only works with D-cache off) */
 #define CONFIG_USB_OHCI
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 8792c85..ea05f16 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -62,7 +62,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on SMDK2410 */
 
 /
  * USB support (currently only works with D-cache off)
-- 
1.7.9.5

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[U-Boot] [PATCH v5 00/11] S3C24XX: Add support to MINI2416 board

2012-09-21 Thread José Miguel Gonçalves
Support for the MINI2416 board based on a Samsung's S3C2416 SoC with
64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a
WM8731 Audio CODEC.

Changes for v2:
   - Coding style cleanup
   - Removed new serial and rtc drivers
   - Use of in-tree serial and rtc drivers

Changes for v3:
   - Rebased on new SPL framework:
 http://github.com/trini/u-boot WIP/spl-improvements
   - Removed patch ARM: fix relocation on ARM926EJS
   - Add patch to configure printf() inclusion on SPL
   - Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin
   - Removed magic numbers
   - Checkpatch clean except:
 - False positive:
ERROR: spaces required around that ':' (ctx:VxV)
#692: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDR FE:11:22:33:44:55
 - Following preexistent coding style:
WARNING: please, no spaces at the start of a line
#1716: FILE: include/common.h:631:
+defined(CONFIG_S3C24XX) || \$

Changes for v4:
   - NAND Flash driver cleanup and optimization

Changes for v5:
   - Changed image filename for SPL + u-boot
   - Minor change in the NAND Flash driver
   - Coding style cleanup
   - Removal of #define CONFIG_SYS_BAUDRATE_TABLE as this in the defaults now
   - Checkpatch clean with the exceptions indicated in the v3 changes

José Miguel Gonçalves (11):
  Add configuration option to select printf() inclusion on SPL
  S3C24XX: Add core support for Samsung's S3C24XX SoCs
  serial: Add support to 4 ports in serial_s3c24x0
  serial: Use a more precise baud rate generation for serial_s3c24x0
  serial: Remove unnecessary delay in serial_s3c24x0
  rtc: Improve rtc_get() on s3c24x0_rtc
  rtc: Fix rtc_reset() on s3c24x0_rtc
  rtc: Don't allow setting unsuported years on s3c24x0_rtc
  S3C24XX: Add NAND Flash driver
  Add u-boot-with-spl.bin target to the Makefile
  S3C24XX: Add support to MINI2416 board

 MAINTAINERS |4 +
 Makefile|   11 +-
 README  |3 +
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  152 ++
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  130 +
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  183 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  615 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 arch/arm/include/asm/arch-s3c24xx/spl.h |   29 ++
 board/boardcon/mini2416/Makefile|   47 ++
 board/boardcon/mini2416/config.mk   |4 +
 board/boardcon/mini2416/mini2416.c  |  104 
 board/boardcon/mini2416/mini2416_spl.c  |  202 
 board/boardcon/mini2416/u-boot-spl.lds  |   63 +++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  255 ++
 drivers/rtc/s3c24x0_rtc.c   |   30 +-
 drivers/serial/serial_s3c24x0.c |   52 +-
 include/common.h|   12 +
 include/configs/VCMA9.h |2 +-
 include/configs/mini2416.h  |  202 
 include/configs/smdk2410.h  |2 +-
 spl/Makefile|4 +-
 30 files changed, 2550 insertions(+), 29 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/spl.h
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c
 create mode 100644 include/configs/mini2416.h

-- 
1.7.9.5

[U-Boot] [PATCH v5 10/11] Add u-boot-with-spl.bin target to the Makefile

2012-09-21 Thread José Miguel Gonçalves
Samsung's S3C24XX SoCs need this in order to generate a binary image
with a padded SPL concatenated with U-Boot.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - None

Changes for v3:
   - Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin

Changes for v4:
   - None

Changes for v5:
   - Changed new binary target name from u-boot-pad.bin to u-boot-with-spl.bin
   - The padded SPL is now generated in the SPL directory
---
 Makefile |   11 +--
 spl/Makefile |4 +++-
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/Makefile b/Makefile
index 8738d55..fad8b33 100644
--- a/Makefile
+++ b/Makefile
@@ -433,13 +433,12 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
 $(obj)u-boot.dis:  $(obj)u-boot
$(OBJDUMP) -d $  $@
 
-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-   $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary 
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
-   cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-ubl.bin
+$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+   cat $^  $@
+
+$(obj)u-boot.ubl:   $(obj)u-boot-with-spl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-   -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin 
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
-   rm $(obj)spl/u-boot-spl-pad.bin
+   -e $(CONFIG_SYS_TEXT_BASE) -d $ $@
 
 $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
$(obj)tools/mkimage -s -n /dev/null -T aisimage \
diff --git a/spl/Makefile b/spl/Makefile
index f96c08e..6ea9f26 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -23,6 +23,8 @@ include $(TOPDIR)/config.mk
 # We want the final binaries in this directory
 obj := $(OBJTREE)/spl/
 
+PAD_TO ?= 1
+
 HAVE_VENDOR_COMMON_LIB := $(shell [ -f 
$(SRCTREE)/board/$(VENDOR)/common/Makefile ] \
 echo y || echo n)
 
@@ -124,7 +126,7 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
 endif
 
 $(obj)u-boot-spl.bin:  $(obj)u-boot-spl
-   $(OBJCOPY) $(OBJCFLAGS) -O binary $ $@
+   $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $ $@
 
 GEN_UBOOT = \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) | \
-- 
1.7.9.5

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[U-Boot] [PATCH v5 06/11] rtc: Improve rtc_get() on s3c24x0_rtc

2012-09-21 Thread José Miguel Gonçalves
A better approach to avoid reading the RTC during updates, as sugested in
the S3C2416 User's Manual.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - Removed unneeded parenthesis

Changes for v4:
   - None

Changes for v5:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |   10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index c16ff2e..b31dc53 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -65,20 +65,26 @@ int rtc_get(struct rtc_time *tmp)
uchar sec, min, hour, mday, wday, mon, year;
__maybe_unused uchar a_sec, a_min, a_hour, a_date,
 a_mon, a_year, a_armed;
+   int have_retried = 0;
 
/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);
 
/* read RTC registers */
do {
-   sec  = readb(rtc-bcdsec);
min  = readb(rtc-bcdmin);
hour = readb(rtc-bcdhour);
mday = readb(rtc-bcddate);
wday = readb(rtc-bcdday);
mon  = readb(rtc-bcdmon);
year = readb(rtc-bcdyear);
-   } while (sec != readb(rtc-bcdsec));
+   sec  = readb(rtc-bcdsec);
+   /*
+* The only way to work out whether the RTC was mid-update
+* when we read it is to check the seconds counter.
+* If it's zero, then we re-try the entire read.
+*/
+   } while (sec == 0  !have_retried++);
 
/* read ALARM registers */
a_sec   = readb(rtc-almsec);
-- 
1.7.9.5

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[U-Boot] [PATCH v5 09/11] S3C24XX: Add NAND Flash driver

2012-09-21 Thread José Miguel Gonçalves
NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of clrsetbits_le32()
   - Use of register bit macros instead of magic numbers

Changes for v3:
   - Removed magic numbers
   - Removed a macro to declare a void printf()
   - Replaced one printf() with a puts()

Changes for v4:
   - Coding style cleanup
   - Use of a struct to store chip private data
   - Replaced u_long by u32
   - Replaced u_char by uint8_t
   - Added error message in s3c_nand_select_chip()
   - Optimization of s3c_nand_hwcontrol()

Changes for v5:
   - Dropped const attribute in the private struct
   - Added const attribute to 'cs' field in the private struct
---
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  255 +++
 2 files changed, 256 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 29dc20e..791ec44 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,6 +60,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+COBJS-$(CONFIG_NAND_S3C24XX) += s3c24xx_nand.o
 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c24xx_nand.c b/drivers/mtd/nand/s3c24xx_nand.c
new file mode 100644
index 000..77a3155
--- /dev/null
+++ b/drivers/mtd/nand/s3c24xx_nand.c
@@ -0,0 +1,255 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/mtd/nand/s3c64xx.c and U-Boot 1.3.4 from Samsung.
+ * Supports only SLC NAND Flash chips.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/arch/s3c24xx_cpu.h
+
+#define TACLS_VAL  7   /* CLE  ALE duration setting (0~7) */
+#define TWRPH0_VAL 7   /* TWRPH0 duration setting (0~7) */
+#define TWRPH1_VAL 7   /* TWRPH1 duration setting (0~7) */
+
+#define MAX_CHIPS  2
+
+/* Struct to store NAND chip private data */
+struct s3c_chip_info {
+   const int cs;
+};
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u32 nfcont;
+
+   nfcont = readl(nand-nfcont);
+
+   switch (chip) {
+   case -1:
+   nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+   break;
+   case 0:
+   nfcont = ~NFCONT_NCE0;
+   break;
+   case 1:
+   nfcont = ~NFCONT_NCE1;
+   break;
+   default:
+   printf(S3C24XX NAND: Invalid chip select (%d).\n, chip);
+   return;
+   }
+
+   writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this;
+   struct s3c_chip_info *info;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_NCE) {
+   this = mtd-priv;
+   info = this-priv;
+   s3c_nand_select_chip(mtd, info-cs);
+   } else {
+   s3c_nand_select_chip(mtd, -1);
+   }
+   }
+
+   if (cmd == NAND_CMD_NONE)
+   return;
+
+   if (ctrl  NAND_CLE)
+   writeb(cmd, nand-nfcmmd);
+   else
+   writeb(cmd, nand-nfaddr);
+}
+
+/*
+ * Function for checking device ready pin
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+
+   return readl(nand-nfstat)  NFSTAT_RNB;
+}
+
+#ifdef CONFIG_S3C24XX_NAND_HWECC
+/*
+ * This function is called before encoding ECC codes to ready ECC engine

Re: [U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-20 Thread José Miguel Gonçalves

On 20-09-2012 19:09, Scott Wood wrote:

On 09/20/2012 11:01:42 AM, Tom Warren wrote:

 -Original Message-
 From: Tom Rini [mailto:tr...@ti.com]
 Sent: Wednesday, September 19, 2012 6:29 PM
 To: José Miguel Gonçalves
 Cc: Scott Wood; u-boot@lists.denx.de; ma...@denx.de; mk7.k...@samsung.com;
 Tom Warren
 Subject: Re: [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

 Tom W, since I'd like you to upgrade the tegra rules after this change goes
 in (since they do a u-boot-spl.bin + pad + u-boot.bin + stuff), does this
 look good to you as well?  Thanks!

I'm not clear what you want the final binary names to be. I seem to be missing 
segments of this discussion - maybe not CC'd on all threads?


With Tegra, if you flash u-boot.bin, you'll get a DT-less, non-functional 
binary that will print a 'DT missing!' message and reset ad infinitum. Most 
folks won't see or care about u-boot-spl.bin, since it's hidden in the spl/ 
subdir. I don't see the use of having a 'u-boot-with-spl.bin' - doesn't 
u-boot-spl.bin say the same thing?


u-boot-spl.bin is just the SPL.  u-boot-with-spl.bin is SPL plus u-boot.

Or maybe the former could just become spl.bin, and then u-boot-spl.bin could 
mean the latter?  There's really no reason to put u-boot in the name of every 
intermediate file that represents something more specific.


So, before I resubmit my patch, can you please tell me what should be the name for 
the file with SPL plus u-boot;


1) u-boot-with-spl.bin
2) u-boot-spl.bin (and rename the SPL only file to 'spl.bin')
3) ???



If you flash u-boot-dtb-tegra.bin, you'll get a fully functioning U-Boot. 
There's an intermediate file (u-boot-dtb.bin) that I assume is u-boot.bin+dtb - 
I'm not sure why it's left around - Allen could comment here.


It's useful to leave intermediate files around for debugging.

So in my eyes, all you really need is u-boot-dtb-tegra.bin - an unwieldy name, 
to be sure, but it seems to satisfy your request for a Soc identifier in the name.


If the only thing Tegra-specific about the output format is that it has a dtb 
bundled, I think it should have a more generic name, as other targets could end 
up using a dtb as well.





Best regards,
José Gonçalves
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[U-Boot] [PATCH v4 05/11] serial: Remove unnecessary delay in serial_s3c24x0

2012-09-19 Thread José Miguel Gonçalves
The loop used to make a delay after baudrate setting is not necessary.
Moreover it is removed by the GCC optimizer (at least with GCC 4.6).

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None
---
 drivers/serial/serial_s3c24x0.c |3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index c9bc121..ec5d1cb 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -111,15 +111,12 @@ void _serial_setbrg(const int dev_index)
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
u32 pclk;
u32 baudrate;
-   int i;
 
pclk = get_PCLK();
baudrate = gd-baudrate;
 
writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
-   for (i = 0; i  100; i++)
-   /* Delay */ ;
 }
 
 #if defined(CONFIG_SERIAL_MULTI)
-- 
1.7.9.5

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[U-Boot] [PATCH v4 11/11] S3C24XX: Add support to MINI2416 board

2012-09-19 Thread José Miguel Gonçalves
The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of Use of clrbits_le32(), setbits_le32() and clrsetbits_le32()
   - Use of register bit macros instead of magic numbers
   - Use of serial and rtc drivers implemented for s3c24x0

Changes for v3:
   - Changed target name from u-boot-ubl.bin to u-boot-pad.bin
   - Removed magic numbers
   - Changes to support new SPL framework

Changes for v4:
   - None
---
 MAINTAINERS|4 +
 board/boardcon/mini2416/Makefile   |   47 
 board/boardcon/mini2416/config.mk  |4 +
 board/boardcon/mini2416/mini2416.c |  104 
 board/boardcon/mini2416/mini2416_spl.c |  202 
 board/boardcon/mini2416/u-boot-spl.lds |   63 ++
 boards.cfg |1 +
 include/configs/mini2416.h |  202 +++
 8 files changed, 627 insertions(+)
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 include/configs/mini2416.h

diff --git a/MAINTAINERS b/MAINTAINERS
index c5a6f2f..80ad29e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,10 @@ Fabio Estevam fabio.este...@freescale.com
mx53ard i.MX53
mx53smd i.MX53
 
+José Gonçalves jose.goncal...@inov.pt
+
+   mini2416ARM926EJS (S3C2416 SoC)
+
 Daniel Gorsulowski daniel.gorsulow...@esd.eu
 
meesc   ARM926EJS (AT91SAM9263 SoC)
diff --git a/board/boardcon/mini2416/Makefile b/board/boardcon/mini2416/Makefile
new file mode 100644
index 000..bf92ba1
--- /dev/null
+++ b/board/boardcon/mini2416/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves jose.goncal...@inov.pt
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifdef CONFIG_SPL_BUILD
+COBJS  += mini2416_spl.o
+else
+COBJS  += mini2416.o
+endif
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/boardcon/mini2416/config.mk 
b/board/boardcon/mini2416/config.mk
new file mode 100644
index 000..ff08568
--- /dev/null
+++ b/board/boardcon/mini2416/config.mk
@@ -0,0 +1,4 @@
+PAD_TO := 0x2000
+ifndef CONFIG_SPL_BUILD
+ALL-y += $(obj)u-boot-pad.bin
+endif
diff --git a/board/boardcon/mini2416/mini2416.c 
b/board/boardcon/mini2416/mini2416.c
new file mode 100644
index 000..b2c049b
--- /dev/null
+++ b/board/boardcon/mini2416/mini2416.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along

[U-Boot] [PATCH v4 07/11] rtc: Fix rtc_reset() on s3c24x0_rtc

2012-09-19 Thread José Miguel Gonçalves
rtc_reset() must set the RTC date to the UNIX Epoch.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |   15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index b31dc53..3fd5cec 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -167,10 +167,17 @@ int rtc_set(struct rtc_time *tmp)
 
 void rtc_reset(void)
 {
-   struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
-
-   writeb((readb(rtc-rtccon)  ~0x06) | 0x08, rtc-rtccon);
-   writeb(readb(rtc-rtccon)  ~(0x08 | 0x01), rtc-rtccon);
+   static struct rtc_time tmp = {
+   .tm_year = 1970,
+   .tm_mon = 1,
+   .tm_mday = 1,
+   .tm_wday = 4,
+   .tm_hour = 0,
+   .tm_min = 0,
+   .tm_sec = 0,
+   };
+
+   rtc_set(tmp);
 }
 
 #endif
-- 
1.7.9.5

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[U-Boot] [PATCH v4 06/11] rtc: Improve rtc_get() on s3c24x0_rtc

2012-09-19 Thread José Miguel Gonçalves
A better approach to avoid reading the RTC during updates, as sugested in
the S3C2416 User's Manual.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - Removed unneeded parenthesis

Changes for v4:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |   10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index c16ff2e..b31dc53 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -65,20 +65,26 @@ int rtc_get(struct rtc_time *tmp)
uchar sec, min, hour, mday, wday, mon, year;
__maybe_unused uchar a_sec, a_min, a_hour, a_date,
 a_mon, a_year, a_armed;
+   int have_retried = 0;
 
/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);
 
/* read RTC registers */
do {
-   sec  = readb(rtc-bcdsec);
min  = readb(rtc-bcdmin);
hour = readb(rtc-bcdhour);
mday = readb(rtc-bcddate);
wday = readb(rtc-bcdday);
mon  = readb(rtc-bcdmon);
year = readb(rtc-bcdyear);
-   } while (sec != readb(rtc-bcdsec));
+   sec  = readb(rtc-bcdsec);
+   /*
+* The only way to work out whether the RTC was mid-update
+* when we read it is to check the seconds counter.
+* If it's zero, then we re-try the entire read.
+*/
+   } while (sec == 0  !have_retried++);
 
/* read ALARM registers */
a_sec   = readb(rtc-almsec);
-- 
1.7.9.5

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[U-Boot] [PATCH v4 01/11] Add configuration option to select printf() inclusion on SPL

2012-09-19 Thread José Miguel Gonçalves
The printf() implementation needs 4~5KB of storage space which may not be
available when building an SPL for SoCs with scarce internal RAM
(8KB or less). This patch adds a new option, CONFIG_SPL_PRINTF_SUPPORT,
to deal with this.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v3:
   - New patch

Changes for v4:
   - None
---
 README   |3 +++
 include/common.h |   11 +++
 2 files changed, 14 insertions(+)

diff --git a/README b/README
index 016d8bc..988812c 100644
--- a/README
+++ b/README
@@ -2576,6 +2576,9 @@ FIT uImage format:
CONFIG_SPL_LIBCOMMON_SUPPORT
Support for common/libcommon.o in SPL binary
 
+   CONFIG_SPL_PRINTF_SUPPORT
+   Enable printf() support in common/libcommon.o
+
CONFIG_SPL_LIBDISK_SUPPORT
Support for disk/libdisk.o in SPL binary
 
diff --git a/include/common.h b/include/common.h
index 55025c0..c10d745 100644
--- a/include/common.h
+++ b/include/common.h
@@ -805,9 +805,20 @@ inttstc(void);
 /* stdout */
 void   putc(const char c);
 void   puts(const char *s);
+/*
+ * The printf() implementation needs 4~5KB of storage space which may not be
+ * available when building an SPL for SoCs with scarce internal RAM
+ * (8KB or less). To force printf() inclusion on an SPL we must define
+ * CONFIG_SPL_LIBCOMMON_SUPPORT and CONFIG_SPL_PRINTF_SUPPORT.
+ */
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_PRINTF_SUPPORT)
 intprintf(const char *fmt, ...)
__attribute__ ((format (__printf__, 1, 2)));
 intvprintf(const char *fmt, va_list args);
+#else
+#define printf(fmt...) do {} while (0)
+#define vprintf(fmt, args) do {} while (0)
+#endif
 
 /* stderr */
 #define eputc(c)   fputc(stderr, c)
-- 
1.7.9.5

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[U-Boot] [PATCH v4 04/11] serial: Use a more precise baud rate generation for serial_s3c24x0

2012-09-19 Thread José Miguel Gonçalves
The values stored in the baud rate divisor register (UBRDIVn) and dividing
slot register (UDIVSLOTn), are used to determine the serial baudrate.
Previously only UBRDIVn was set. This patch initializes also UDIVSLOTn
which allows to obtain a more precise baudrate.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - Verbose patch description

Changes for v4:
   - None
---
 drivers/serial/serial_s3c24x0.c |   24 
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 280cd2d..c9bc121 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -92,16 +92,32 @@ DECLARE_GLOBAL_DATA_PTR;
 static int hwflow;
 #endif
 
+/*
+ * The values stored in the baud rate divisor register (UBRDIVn) and dividing
+ * slot register (UDIVSLOTn), are used to determine the serial Tx/Rx clock rate
+ * (baud rate) as follows:
+ * DIV_VAL = UBRDIVn + (num of 1’s in UDIVSLOTn) / 16
+ * Using UDIVSLOT, which is the factor of floating point divisor, you can make
+ * more accurate baud rate. Section 2.1.10 of the S3C2416 User's Manual 
suggests
+ * using the constants on the following table.
+ */
+static const int udivslot[] = {
+   0x, 0x0080, 0x0808, 0x0888, 0x, 0x4924, 0x4A52, 0x54AA,
+   0x, 0xD555, 0xD5D5, 0xDDD5, 0x, 0xDFDD, 0xDFDF, 0xFFDF,
+};
+
 void _serial_setbrg(const int dev_index)
 {
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-   unsigned int reg = 0;
+   u32 pclk;
+   u32 baudrate;
int i;
 
-   /* value is calculated so : (int)(PCLK/16./baudrate) -1 */
-   reg = get_PCLK() / (16 * gd-baudrate) - 1;
+   pclk = get_PCLK();
+   baudrate = gd-baudrate;
 
-   writel(reg, uart-ubrdiv);
+   writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
+   writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
for (i = 0; i  100; i++)
/* Delay */ ;
 }
-- 
1.7.9.5

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[U-Boot] [PATCH v4 08/11] rtc: Don't allow setting unsuported years on s3c24x0_rtc

2012-09-19 Thread José Miguel Gonçalves
This RTC only supports a 100 years range so rtc_set() should not allow setting
years bellow 1970 or above 2069.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index 3fd5cec..bcd6d44 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -139,6 +139,11 @@ int rtc_set(struct rtc_time *tmp)
   tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
   tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
 #endif
+   if (tmp-tm_year  1970 || tmp-tm_year  2069) {
+   puts(ERROR: year should be between 1970 and 2069!\n);
+   return -1;
+   }
+
year = bin2bcd(tmp-tm_year % 100);
mon  = bin2bcd(tmp-tm_mon);
wday = bin2bcd(tmp-tm_wday);
-- 
1.7.9.5

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[U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-19 Thread José Miguel Gonçalves
Samsung's S3C24XX SoCs need this in order to generate a binary image
with a padded SPL concatenated with U-Boot.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - None

Changes for v3:
   - Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin

Changes for v4:
   - None
---
 Makefile |   11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/Makefile b/Makefile
index 8738d55..86dedca 100644
--- a/Makefile
+++ b/Makefile
@@ -433,14 +433,15 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
 $(obj)u-boot.dis:  $(obj)u-boot
$(OBJDUMP) -d $  $@
 
-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+$(obj)u-boot-pad.bin:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary 
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
-   cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-ubl.bin
-   $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-   -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin 
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
+   cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-pad.bin
rm $(obj)spl/u-boot-spl-pad.bin
 
+$(obj)u-boot.ubl:   $(obj)spl/u-boot-pad.bin
+   $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
+   -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-pad.bin 
$(obj)u-boot.ubl
+
 $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
$(obj)tools/mkimage -s -n /dev/null -T aisimage \
-e $(CONFIG_SPL_TEXT_BASE) \
-- 
1.7.9.5

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[U-Boot] [PATCH v4 03/11] serial: Add support to 4 ports in serial_s3c24x0

2012-09-19 Thread José Miguel Gonçalves
S3C2416 and S3C2450 have 4 UARTs insted of 3 found on older chips.
This patch adds support to the additional UART port and changes the
mapping between CONFIG_SERIAL? and S3C24X0_UART? in order they have
a direct correspondence.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None

Changes for v4:
   - None
---
 drivers/serial/serial_s3c24x0.c |   25 ++---
 include/configs/VCMA9.h |2 +-
 include/configs/smdk2410.h  |2 +-
 3 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 12bcdd3..280cd2d 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2002
  * Gary Jennejohn, DENX Software Engineering, ga...@denx.de
  *
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -24,17 +27,20 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_SERIAL1
+#if defined(CONFIG_SERIAL0)
 #define UART_NRS3C24X0_UART0
 
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
 #define UART_NRS3C24X0_UART1
 
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
 #define UART_NRS3C24X0_UART2
 
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C24X0_UART3
+
 #else
-#error Bad: you didn't configure serial ...
+#error You didn't configure serial.
 #endif
 
 #include asm/io.h
@@ -310,15 +316,20 @@ INIT_S3C_SERIAL_STRUCTURE(1, s3ser1);
 DECLARE_S3C_SERIAL_FUNCTIONS(2);
 struct serial_device s3c24xx_serial2_device =
 INIT_S3C_SERIAL_STRUCTURE(2, s3ser2);
+DECLARE_S3C_SERIAL_FUNCTIONS(3);
+struct serial_device s3c24xx_serial3_device =
+INIT_S3C_SERIAL_STRUCTURE(3, s3ser3);
 
 __weak struct serial_device *default_serial_console(void)
 {
-#if defined(CONFIG_SERIAL1)
+#if defined(CONFIG_SERIAL0)
return s3c24xx_serial0_device;
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
return s3c24xx_serial1_device;
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
return s3c24xx_serial2_device;
+#elif defined(CONFIG_SERIAL3)
+   return s3c24xx_serial3_device;
 #else
 #error CONFIG_SERIAL? missing.
 #endif
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 6ad4a6b..82db58f 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -122,7 +122,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on VCMA9 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on VCMA9 */
 
 /* USB support (currently only works with D-cache off) */
 #define CONFIG_USB_OHCI
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 8792c85..ea05f16 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -62,7 +62,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on SMDK2410 */
 
 /
  * USB support (currently only works with D-cache off)
-- 
1.7.9.5

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[U-Boot] [PATCH v4 09/11] S3C24XX: Add NAND Flash driver

2012-09-19 Thread José Miguel Gonçalves
NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of clrsetbits_le32()
   - Use of register bit macros instead of magic numbers

Changes for v3:
   - Removed magic numbers
   - Removed a macro to declare a void printf()
   - Replaced one printf() with a puts()

Changes for v4:
   - Coding style cleanup
   - Use of a struct to store chip private data
   - Replaced u_long by u32
   - Replaced u_char by uint8_t
   - Added error message in s3c_nand_select_chip()
   - Optimization of s3c_nand_hwcontrol()
---
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  255 +++
 2 files changed, 256 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 29dc20e..791ec44 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,6 +60,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+COBJS-$(CONFIG_NAND_S3C24XX) += s3c24xx_nand.o
 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c24xx_nand.c b/drivers/mtd/nand/s3c24xx_nand.c
new file mode 100644
index 000..384ffbf
--- /dev/null
+++ b/drivers/mtd/nand/s3c24xx_nand.c
@@ -0,0 +1,255 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/mtd/nand/s3c64xx.c and U-Boot 1.3.4 from Samsung.
+ * Supports only SLC NAND Flash chips.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/arch/s3c24xx_cpu.h
+
+#define TACLS_VAL  7   /* CLE  ALE duration setting (0~7) */
+#define TWRPH0_VAL 7   /* TWRPH0 duration setting (0~7) */
+#define TWRPH1_VAL 7   /* TWRPH1 duration setting (0~7) */
+
+#define MAX_CHIPS  2
+
+/* Struct to store NAND chip private data */
+struct s3c_chip_info {
+   int cs;
+};
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u32 nfcont;
+
+   nfcont = readl(nand-nfcont);
+
+   switch (chip) {
+   case -1:
+   nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+   break;
+   case 0:
+   nfcont = ~NFCONT_NCE0;
+   break;
+   case 1:
+   nfcont = ~NFCONT_NCE1;
+   break;
+   default:
+   printf(S3C24XX NAND: Invalid chip select (%d).\n, chip);
+   return;
+   }
+
+   writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this;
+   const struct s3c_chip_info *info;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_NCE) {
+   this = mtd-priv;
+   info = this-priv;
+   s3c_nand_select_chip(mtd, info-cs);
+   } else {
+   s3c_nand_select_chip(mtd, -1);
+   }
+   }
+
+   if (cmd == NAND_CMD_NONE)
+   return;
+
+   if (ctrl  NAND_CLE)
+   writeb(cmd, nand-nfcmmd);
+   else
+   writeb(cmd, nand-nfaddr);
+}
+
+/*
+ * Function for checking device ready pin
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+
+   return readl(nand-nfstat)  NFSTAT_RNB;
+}
+
+#ifdef CONFIG_S3C24XX_NAND_HWECC
+/*
+ * This function is called before encoding ECC codes to ready ECC engine.
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   struct s3c24xx_nand *const nand

[U-Boot] [PATCH v4 00/11] S3C24XX: Add support to MINI2416 board

2012-09-19 Thread José Miguel Gonçalves
Support for the MINI2416 board based on a Samsung's S3C2416 SoC with
64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a
WM8731 Audio CODEC.

Changes for v2:
   - Coding style cleanup
   - Removed new serial and rtc drivers
   - Use of in-tree serial and rtc drivers

Changes for v3:
   - Rebased on new SPL framework:
 http://github.com/trini/u-boot WIP/spl-improvements
   - Removed patch ARM: fix relocation on ARM926EJS
   - Add patch to configure printf() inclusion on SPL
   - Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin
   - Removed magic numbers
   - Checkpatch clean except:
 - False positive:
ERROR: spaces required around that ':' (ctx:VxV)
#692: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDR FE:11:22:33:44:55
 - Following preexistent coding style:
WARNING: please, no spaces at the start of a line
#1716: FILE: include/common.h:631:
+defined(CONFIG_S3C24XX) || \$

Changes for v4:
   - NAND Flash driver cleanup and optimization

José Miguel Gonçalves (11):
  Add configuration option to select printf() inclusion on SPL
  S3C24XX: Add core support for Samsung's S3C24XX SoCs
  serial: Add support to 4 ports in serial_s3c24x0
  serial: Use a more precise baud rate generation for serial_s3c24x0
  serial: Remove unnecessary delay in serial_s3c24x0
  rtc: Improve rtc_get() on s3c24x0_rtc
  rtc: Fix rtc_reset() on s3c24x0_rtc
  rtc: Don't allow setting unsuported years on s3c24x0_rtc
  S3C24XX: Add NAND Flash driver
  Add u-boot-pad.bin target to the Makefile
  S3C24XX: Add support to MINI2416 board

 MAINTAINERS |4 +
 Makefile|   11 +-
 README  |3 +
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  152 ++
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  130 +
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  183 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  615 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 arch/arm/include/asm/arch-s3c24xx/spl.h |   29 ++
 board/boardcon/mini2416/Makefile|   47 ++
 board/boardcon/mini2416/config.mk   |4 +
 board/boardcon/mini2416/mini2416.c  |  104 
 board/boardcon/mini2416/mini2416_spl.c  |  203 
 board/boardcon/mini2416/u-boot-spl.lds  |   63 +++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  255 +
 drivers/rtc/s3c24x0_rtc.c   |   30 +-
 drivers/serial/serial_s3c24x0.c |   52 +-
 include/common.h|   12 +
 include/configs/VCMA9.h |2 +-
 include/configs/mini2416.h  |  202 
 include/configs/smdk2410.h  |2 +-
 29 files changed, 2549 insertions(+), 27 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/spl.h
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c
 create mode 100644 include/configs/mini2416.h

-- 
1.7.9.5

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Re: [U-Boot] [PATCH v4 09/11] S3C24XX: Add NAND Flash driver

2012-09-19 Thread José Miguel Gonçalves

On 19-09-2012 17:19, Scott Wood wrote:

On 09/19/2012 06:25:25 AM, José Miguel Gonçalves wrote:

NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of clrsetbits_le32()
   - Use of register bit macros instead of magic numbers

Changes for v3:
   - Removed magic numbers
   - Removed a macro to declare a void printf()
   - Replaced one printf() with a puts()

Changes for v4:
   - Coding style cleanup
   - Use of a struct to store chip private data
   - Replaced u_long by u32
   - Replaced u_char by uint8_t
   - Added error message in s3c_nand_select_chip()
   - Optimization of s3c_nand_hwcontrol()
---
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  255 +++
 2 files changed, 256 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c


Acked-by: Scott Wood scottw...@freescale.com


+nand-priv = (void *)chip_info[chip_n++];


Hmm, I was going to say that the cast could be dropped, but I guess it's because 
of the const. 


Yes, it's needed because of the declaration of the private struct as const.

It doesn't need to hold up acceptance of the patch, but it'd probably be better 
to drop the const instead (more flexible too if additional private data needs to 
be declared).


I think a better option would be to drop the const in the struct and set only the 
'cs' member to const.


José Gonçalves
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Re: [U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-19 Thread José Miguel Gonçalves

On 19-09-2012 17:10, Scott Wood wrote:

On 09/19/2012 06:25:26 AM, José Miguel Gonçalves wrote:

Samsung's S3C24XX SoCs need this in order to generate a binary image
with a padded SPL concatenated with U-Boot.


I still think pad is a lousy name for this.  It refers to a minor 
implementation detail of how the image was put together.


If you don't like the suggestions in 
http://lists.denx.de/pipermail/u-boot/2012-September/134191.html, how about

u-boot-with-spl.bin?


I used a suggestion made by Christian Riesch and accepted by Tom Rini.

I'm totally cool with any name that the U-Boot core maintainers would like to use, 
though I would prefer a shorter name than u-boot-with-spl.bin because I'm lazy 
and don't like to type too many keys when I upgrade by tftp :-) Because of that I 
think I would prefer u-boot-all.bin. So, everybody agrees with that name?


Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-19 Thread José Miguel Gonçalves

On 19-09-2012 18:08, Scott Wood wrote:

On 09/19/2012 11:58:06 AM, José Miguel Gonçalves wrote:

On 19-09-2012 17:10, Scott Wood wrote:

On 09/19/2012 06:25:26 AM, José Miguel Gonçalves wrote:

Samsung's S3C24XX SoCs need this in order to generate a binary image
with a padded SPL concatenated with U-Boot.


I still think pad is a lousy name for this.  It refers to a minor 
implementation detail of how the image was put together.


If you don't like the suggestions in 
http://lists.denx.de/pipermail/u-boot/2012-September/134191.html, how about

u-boot-with-spl.bin?


I used a suggestion made by Christian Riesch and accepted by Tom Rini.

I'm totally cool with any name that the U-Boot core maintainers would like to 
use, though I would prefer a shorter name than u-boot-with-spl.bin because 
I'm lazy and don't like to type too many keys when I upgrade by tftp :-) 
Because of that I think I would prefer u-boot-all.bin. So, everybody agrees 
with that name?


setenv uboot pathname/u-boot-with-as-much-verbosity-as-you-want.bin
setenv tftpnand 'tftp $loadaddr $uboot  nand erase 0 $filesize  nand write 
$loadaddr 0 $filesize'

saveenv
run tftpnand


I already had a script but only for the nand programming part.
I suppose the '' on the command line is for conditional execution, right?
In my u-boot that does not work, but looking at the README, I see that I need 
CONFIG_SYS_HUSH_PARSER for it.

I'll give it a try. Thanks!

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Re: [U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-19 Thread José Miguel Gonçalves

On 19-09-2012 19:19, Tom Rini wrote:

On Wed, Sep 19, 2012 at 11:11:08AM -0600, Stephen Warren wrote:

On 09/19/2012 10:58 AM, Jos? Miguel Gon?alves wrote:

On 19-09-2012 17:10, Scott Wood wrote:

On 09/19/2012 06:25:26 AM, Jos? Miguel Gon?alves wrote:

Samsung's S3C24XX SoCs need this in order to generate a binary image
with a padded SPL concatenated with U-Boot.

I still think pad is a lousy name for this.  It refers to a minor
implementation detail of how the image was put together.

If you don't like the suggestions in
http://lists.denx.de/pipermail/u-boot/2012-September/134191.html, how
about
u-boot-with-spl.bin?

I used a suggestion made by Christian Riesch and accepted by Tom Rini.

Sorry for the churn, really, but..


I'm totally cool with any name that the U-Boot core maintainers would
like to use, though I would prefer a shorter name than
u-boot-with-spl.bin because I'm lazy and don't like to type too many
keys when I upgrade by tftp :-) Because of that I think I would prefer
u-boot-all.bin. So, everybody agrees with that name?

Hmmm. What does all mean? It's not that descriptive.

On Tegra we currently have:

u-boot-spl.bin - just SPL.
u-boot.bin - just main U-Boot, I think.
u-boot-dtb.bin - main U-Boot plus an appended DTB, I think.
u-boot-dtb-tegra.bin - SPL+U-Boot+DTB.

As this, and other examples show, there's not really good generic names.
Go with u-boot.s3c24xx as the target and output, please.  This is
consistent with the other targets and outputs where we throw something
that identifies the SoC/etc into the target/name.



I'm fine with throwing something that identifies the SoC into the u-boot image 
name.
In that case I would suggest using instead u-boot.s3c, because, AFAIK, all 
Samsung's S3C SoCs that support NAND/SD boot through an internal ROM use raw 
images to boot and would be fine with this format. Nevertheless, before I proceed 
with the change, a confirmation for this from someone with a better knowledge of 
Samsung SoCs would be nice...


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Re: [U-Boot] [PATCH v4 11/11] S3C24XX: Add support to MINI2416 board

2012-09-19 Thread José Miguel Gonçalves

On 09/19/2012 08:18 PM, Tom Rini wrote:

On Wed, Sep 19, 2012 at 12:25:27PM +0100, Jos?? Miguel Gon??alves wrote:

The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

Signed-off-by: Jos?? Miguel Gon??alves jose.goncal...@inov.pt
---
Changes for v2:
- Coding style cleanup

There's still at least one #define[tab]NAME in the code, please
checkpatch.pl the whole series.


I've done that!
I only get the warnings/errors that are justified on the cover letter 
(in the v3 changes), i.e., one were I followed a pre-existent coding style:


$ tools/checkpatch.pl 
../0002-S3C24XX-Add-core-support-for-Samsung-s-S3C24XX-SoCs.patch

WARNING: please, no spaces at the start of a line
#1719: FILE: include/common.h:631:
+defined(CONFIG_S3C24XX) || \$

total: 0 errors, 1 warnings, 1587 lines checked

and another that is a false positive in the Ethernet address 
definitionin the config file;


$ tools/checkpatch.pl ../0011-S3C24XX-Add-support-to-MINI2416-board.patch
ERROR: spaces required around that ':' (ctx:VxV)
#694: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDRFE:11:22:33:44:55
^

ERROR: spaces required around that ':' (ctx:VxV)
#694: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDRFE:11:22:33:44:55
   ^

ERROR: spaces required around that ':' (ctx:VxV)
#694: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDRFE:11:22:33:44:55
  ^

ERROR: spaces required around that ':' (ctx:VxV)
#694: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDRFE:11:22:33:44:55
 ^

total: 4 errors, 0 warnings, 639 lines checked





+#define CONFIG_SYS_BAUDRATE_TABLE  { 9600, 19200, 38400, 57600, 115200 }

This is in the defaults now, please remove.



OK.

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v4 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-19 Thread José Miguel Gonçalves

Tom  Scott,

On 09/20/2012 12:40 AM, Tom Rini wrote:

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 09/19/12 16:36, Scott Wood wrote:

On 09/19/2012 06:31:29 PM, Tom Rini wrote:

-BEGIN PGP SIGNED MESSAGE- Hash: SHA1

On 09/19/12 15:39, Scott Wood wrote:

On 09/19/2012 06:25:26 AM, José Miguel Gonçalves wrote:

Samsung's S3C24XX SoCs need this in order to generate a
binary image with a padded SPL concatenated with U-Boot.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
--- Changes for v2: - None

Changes for v3: - Changed new binary target name from
u-boot-ubl.bin to u-boot-pad.bin

Changes for v4: - None --- Makefile |   11 ++- 1 file
changed, 6 insertions(+), 5 deletions(-)

diff --git a/Makefile b/Makefile index 8738d55..86dedca
100644 --- a/Makefile +++ b/Makefile @@ -433,14 +433,15 @@
$(obj)u-boot.sha1:$(obj)u-boot.bin $(obj)u-boot.dis:
$(obj)u-boot $(OBJDUMP) -d $  $@

-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin
$(obj)u-boot.bin +$(obj)u-boot-pad.bin:
$(obj)spl/u-boot-spl.bin $(obj)u-boot.bin $(OBJCOPY)
${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin - cat
$(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin 
$(obj)u-boot-ubl.bin -$(obj)tools/mkimage -n
$(UBL_CONFIG) -T ublimage \ --e
$(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin
$(obj)u-boot.ubl -rm $(obj)u-boot-ubl.bin + cat
$(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin 
$(obj)u-boot-pad.bin rm $(obj)spl/u-boot-spl-pad.bin

This rule lists u-boot-spl.bin as a prerequisite, but it
doesn't appear to use it -- it uses u-boot-spl instead.

It seems that either spl/Makefile should produce u-boot-spl
rather than u-boot-spl.bin and let the toplevel Makefile deal
with converting it to a binary, or spl/Makefile should take
care of adding any needed padding for the target and the final
rule should just be a concatenation.

So, if we use a weak PAD_TO value of say 0x1, we could always
pad u-boot-spl.bin out and then do the concatenation here and
in a few other targets as well.

Yes, or use a variable that includes the linker option, so that it
  expands to an empty string if padding isn't required.

Yes, I don't know if say IMAGE_PAD ?=  and having boards set that to
- --pad-to=... or just saying --pad-to=$(PAD_SIZE) and PAD_SIZE ?= 0x1
ends up looking cleaner once all is said and done.  First one to try
both and patch... :)



Please check the following patch. It seems to work for me...

diff --git a/Makefile b/Makefile
index 8738d55..fad8b33 100644
--- a/Makefile
+++ b/Makefile
@@ -433,13 +433,12 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin
 $(obj)u-boot.dis:$(obj)u-boot
 $(OBJDUMP) -d $  $@

-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary 
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
-cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-ubl.bin

+$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+cat $^  $@
+
+$(obj)u-boot.ubl:   $(obj)u-boot-with-spl.bin
 $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
--e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin $(obj)u-boot.ubl
-rm $(obj)u-boot-ubl.bin
-rm $(obj)spl/u-boot-spl-pad.bin
+-e $(CONFIG_SYS_TEXT_BASE) -d $ $@

 $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
 $(obj)tools/mkimage -s -n /dev/null -T aisimage \
diff --git a/spl/Makefile b/spl/Makefile
index f96c08e..6ea9f26 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -23,6 +23,8 @@ include $(TOPDIR)/config.mk
 # We want the final binaries in this directory
 obj := $(OBJTREE)/spl/

+PAD_TO ?= 1
+
 HAVE_VENDOR_COMMON_LIB := $(shell [ -f 
$(SRCTREE)/board/$(VENDOR)/common/Makefile ] \

  echo y || echo n)

@@ -124,7 +126,7 @@ $(obj)$(BOARD)-spl.bin: $(obj)u-boot-spl.bin
 endif

 $(obj)u-boot-spl.bin:$(obj)u-boot-spl
-$(OBJCOPY) $(OBJCFLAGS) -O binary $ $@
+$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $ $@

 GEN_UBOOT = \
 UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) | \

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 11/11] S3C24XX: Add support to MINI2416 board

2012-09-18 Thread José Miguel Gonçalves

Hi Tom,

On 17-09-2012 16:11, Tom Rini wrote:

On Mon, Sep 17, 2012 at 03:47:46PM +0100, Jos? Miguel Gon?alves wrote:

On 17-09-2012 15:39, Tom Rini wrote:

On Sun, Sep 16, 2012 at 10:11:07AM +0100, Jos? Miguel Gon?alves wrote:

On 09/14/2012 07:58 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 06:29:02PM +0100, Jos?? Miguel Gon??alves wrote:


The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

[snip]

Can you please try this on top of my SPL framework series?  Thanks!

I thought I was using the latest SPL framework!
Can you please detail on what I should do different?

Please see
http://www.mail-archive.com/u-boot@lists.denx.de/msg92156.html


As this is still not merged, I reckon you only want to check if this
new SPL framework works fine with my board.

I'm not expected to resubmit my patch to be according with the new framework, 
correct?

v1 of your patches was posted well after the merge window for v2012.10
closed.  My SPL series will be merged to mainline shortly (taking care
of everyone elses merge requests first).  So yes, to get into v2013.01
you will need to update.  If you check the archives you can see how the
altera soc support changed to adapt to this framework.  And if there's a
shortcoming in the framework, I really do want to know.  Thanks!



I already have my board working on the top of this new SPL framework.
It was easy to migrate and the interface is easier to use for a new U-Boot 
developer (like me). Good work!

I'll resubmit my new patch later on.

Here are my board's SPL sizes for both older and new frameworks:

text data bss dec hex filename
4083 8 588 4679 1247 u-boot/spl/u-boot-spl

text data bss dec hex filename
3905 160 500 4565 11d5 u-boot-spl-framework/spl/u-boot-spl

So I get around 30 bytes of additional IRAM space (text + data).

I have a comment, though. As you use memset() to initialize the .bss, wouldn’t be 
better that CONFIG_SPL_LIBGENERIC_SUPPORT would be automaticaly included when 
adding CONFIG_SPL_FRAMEWORK to the board config?


Best regards,
José Gonçalves
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[U-Boot] [PATCH v3 01/11] Add configuration option to select printf() inclusion on SPL

2012-09-18 Thread José Miguel Gonçalves
The printf() implementation needs 4~5KB of storage space which may not be
available when building an SPL for SoCs with scarce internal RAM
(8KB or less). This patch adds a new option, CONFIG_SPL_PRINTF_SUPPORT,
to deal with this.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v3:
   - new patch
---
 README   |3 +++
 include/common.h |   11 +++
 2 files changed, 14 insertions(+)

diff --git a/README b/README
index 016d8bc..988812c 100644
--- a/README
+++ b/README
@@ -2576,6 +2576,9 @@ FIT uImage format:
CONFIG_SPL_LIBCOMMON_SUPPORT
Support for common/libcommon.o in SPL binary
 
+   CONFIG_SPL_PRINTF_SUPPORT
+   Enable printf() support in common/libcommon.o
+
CONFIG_SPL_LIBDISK_SUPPORT
Support for disk/libdisk.o in SPL binary
 
diff --git a/include/common.h b/include/common.h
index 55025c0..c10d745 100644
--- a/include/common.h
+++ b/include/common.h
@@ -805,9 +805,20 @@ inttstc(void);
 /* stdout */
 void   putc(const char c);
 void   puts(const char *s);
+/*
+ * The printf() implementation needs 4~5KB of storage space which may not be
+ * available when building an SPL for SoCs with scarce internal RAM
+ * (8KB or less). To force printf() inclusion on an SPL we must define
+ * CONFIG_SPL_LIBCOMMON_SUPPORT and CONFIG_SPL_PRINTF_SUPPORT.
+ */
+#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_PRINTF_SUPPORT)
 intprintf(const char *fmt, ...)
__attribute__ ((format (__printf__, 1, 2)));
 intvprintf(const char *fmt, va_list args);
+#else
+#define printf(fmt...) do {} while (0)
+#define vprintf(fmt, args) do {} while (0)
+#endif
 
 /* stderr */
 #define eputc(c)   fputc(stderr, c)
-- 
1.7.9.5

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[U-Boot] [PATCH v3 05/11] serial: Remove unnecessary delay in serial_s3c24x0

2012-09-18 Thread José Miguel Gonçalves
The loop used to make a delay after baudrate setting is not necessary.
Moreover it is removed by the GCC optimizer (at least with GCC 4.6).

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None
---
 drivers/serial/serial_s3c24x0.c |3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index c9bc121..ec5d1cb 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -111,15 +111,12 @@ void _serial_setbrg(const int dev_index)
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
u32 pclk;
u32 baudrate;
-   int i;
 
pclk = get_PCLK();
baudrate = gd-baudrate;
 
writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
-   for (i = 0; i  100; i++)
-   /* Delay */ ;
 }
 
 #if defined(CONFIG_SERIAL_MULTI)
-- 
1.7.9.5

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[U-Boot] [PATCH v3 07/11] rtc: Fix rtc_reset() on s3c24x0_rtc

2012-09-18 Thread José Miguel Gonçalves
rtc_reset() must set the RTC date to the UNIX Epoch.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |   15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index b31dc53..3fd5cec 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -167,10 +167,17 @@ int rtc_set(struct rtc_time *tmp)
 
 void rtc_reset(void)
 {
-   struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
-
-   writeb((readb(rtc-rtccon)  ~0x06) | 0x08, rtc-rtccon);
-   writeb(readb(rtc-rtccon)  ~(0x08 | 0x01), rtc-rtccon);
+   static struct rtc_time tmp = {
+   .tm_year = 1970,
+   .tm_mon = 1,
+   .tm_mday = 1,
+   .tm_wday = 4,
+   .tm_hour = 0,
+   .tm_min = 0,
+   .tm_sec = 0,
+   };
+
+   rtc_set(tmp);
 }
 
 #endif
-- 
1.7.9.5

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[U-Boot] [PATCH v3 04/11] serial: Use a more precise baud rate generation for serial_s3c24x0

2012-09-18 Thread José Miguel Gonçalves
The values stored in the baud rate divisor register (UBRDIVn) and dividing
slot register (UDIVSLOTn), are used to determine the serial baudrate.
Previously only UBRDIVn was set. This patch initializes also UDIVSLOTn
which allows to obtain a more precise baudrate.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - Verbose patch description
---
 drivers/serial/serial_s3c24x0.c |   24 
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 280cd2d..c9bc121 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -92,16 +92,32 @@ DECLARE_GLOBAL_DATA_PTR;
 static int hwflow;
 #endif
 
+/*
+ * The values stored in the baud rate divisor register (UBRDIVn) and dividing
+ * slot register (UDIVSLOTn), are used to determine the serial Tx/Rx clock rate
+ * (baud rate) as follows:
+ * DIV_VAL = UBRDIVn + (num of 1’s in UDIVSLOTn) / 16
+ * Using UDIVSLOT, which is the factor of floating point divisor, you can make
+ * more accurate baud rate. Section 2.1.10 of the S3C2416 User's Manual 
suggests
+ * using the constants on the following table.
+ */
+static const int udivslot[] = {
+   0x, 0x0080, 0x0808, 0x0888, 0x, 0x4924, 0x4A52, 0x54AA,
+   0x, 0xD555, 0xD5D5, 0xDDD5, 0x, 0xDFDD, 0xDFDF, 0xFFDF,
+};
+
 void _serial_setbrg(const int dev_index)
 {
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-   unsigned int reg = 0;
+   u32 pclk;
+   u32 baudrate;
int i;
 
-   /* value is calculated so : (int)(PCLK/16./baudrate) -1 */
-   reg = get_PCLK() / (16 * gd-baudrate) - 1;
+   pclk = get_PCLK();
+   baudrate = gd-baudrate;
 
-   writel(reg, uart-ubrdiv);
+   writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
+   writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
for (i = 0; i  100; i++)
/* Delay */ ;
 }
-- 
1.7.9.5

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[U-Boot] [PATCH v3 00/11] S3C24XX: Add support to MINI2416 board

2012-09-18 Thread José Miguel Gonçalves
Support for the MINI2416 board based on a Samsung's S3C2416 SoC with
64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a
WM8731 Audio CODEC.

Changes for v2:
   - Coding style cleanup
   - Removed new serial and rtc drivers
   - Use of in-tree serial and rtc drivers

Changes for v3:
   - Rebased on new SPL framework:
 http://github.com/trini/u-boot WIP/spl-improvements
   - Removed patch ARM: fix relocation on ARM926EJS
   - Add patch to configure printf() inclusion on SPL
   - Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin
   - Removed magic numbers
   - Checkpatch clean except:
 - False positive:
ERROR: spaces required around that ':' (ctx:VxV)
#692: FILE: include/configs/mini2416.h:165:
+#define CONFIG_ETHADDR FE:11:22:33:44:55
 - Following preexistent coding style:
WARNING: please, no spaces at the start of a line
#1716: FILE: include/common.h:631:
+defined(CONFIG_S3C24XX) || \$

José Miguel Gonçalves (11):
  Add configuration option to select printf() inclusion on SPL
  S3C24XX: Add core support for Samsung's S3C24XX SoCs
  serial: Add support to 4 ports in serial_s3c24x0
  serial: Use a more precise baud rate generation for serial_s3c24x0
  serial: Remove unnecessary delay in serial_s3c24x0
  rtc: Improve rtc_get() on s3c24x0_rtc
  rtc: Fix rtc_reset() on s3c24x0_rtc
  rtc: Don't allow setting unsuported years on s3c24x0_rtc
  S3C24XX: Add NAND Flash driver
  Add u-boot-pad.bin target to the Makefile
  S3C24XX: Add support to MINI2416 board

 MAINTAINERS |4 +
 Makefile|   11 +-
 README  |3 +
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  152 ++
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  130 +
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  183 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  615 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 arch/arm/include/asm/arch-s3c24xx/spl.h |   29 ++
 board/boardcon/mini2416/Makefile|   47 ++
 board/boardcon/mini2416/config.mk   |4 +
 board/boardcon/mini2416/mini2416.c  |  104 
 board/boardcon/mini2416/mini2416_spl.c  |  203 
 board/boardcon/mini2416/u-boot-spl.lds  |   63 +++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  246 +
 drivers/rtc/s3c24x0_rtc.c   |   30 +-
 drivers/serial/serial_s3c24x0.c |   52 +-
 include/common.h|   12 +
 include/configs/VCMA9.h |2 +-
 include/configs/mini2416.h  |  202 
 include/configs/smdk2410.h  |2 +-
 29 files changed, 2540 insertions(+), 27 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/spl.h
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c
 create mode 100644 include/configs/mini2416.h

-- 
1.7.9.5

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[U-Boot] [PATCH v3 08/11] rtc: Don't allow setting unsuported years on s3c24x0_rtc

2012-09-18 Thread José Miguel Gonçalves
This RTC only supports a 100 years range so rtc_set() should not allow setting
years bellow 1970 or above 2069.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None
---
 drivers/rtc/s3c24x0_rtc.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index 3fd5cec..bcd6d44 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -139,6 +139,11 @@ int rtc_set(struct rtc_time *tmp)
   tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
   tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
 #endif
+   if (tmp-tm_year  1970 || tmp-tm_year  2069) {
+   puts(ERROR: year should be between 1970 and 2069!\n);
+   return -1;
+   }
+
year = bin2bcd(tmp-tm_year % 100);
mon  = bin2bcd(tmp-tm_mon);
wday = bin2bcd(tmp-tm_wday);
-- 
1.7.9.5

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[U-Boot] [PATCH v3 06/11] rtc: Improve rtc_get() on s3c24x0_rtc

2012-09-18 Thread José Miguel Gonçalves
A better approach to avoid reading the RTC during updates, as sugested in
the S3C2416 User's Manual.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - Removed unneeded parenthesis
---
 drivers/rtc/s3c24x0_rtc.c |   10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index c16ff2e..b31dc53 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -65,20 +65,26 @@ int rtc_get(struct rtc_time *tmp)
uchar sec, min, hour, mday, wday, mon, year;
__maybe_unused uchar a_sec, a_min, a_hour, a_date,
 a_mon, a_year, a_armed;
+   int have_retried = 0;
 
/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);
 
/* read RTC registers */
do {
-   sec  = readb(rtc-bcdsec);
min  = readb(rtc-bcdmin);
hour = readb(rtc-bcdhour);
mday = readb(rtc-bcddate);
wday = readb(rtc-bcdday);
mon  = readb(rtc-bcdmon);
year = readb(rtc-bcdyear);
-   } while (sec != readb(rtc-bcdsec));
+   sec  = readb(rtc-bcdsec);
+   /*
+* The only way to work out whether the RTC was mid-update
+* when we read it is to check the seconds counter.
+* If it's zero, then we re-try the entire read.
+*/
+   } while (sec == 0  !have_retried++);
 
/* read ALARM registers */
a_sec   = readb(rtc-almsec);
-- 
1.7.9.5

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[U-Boot] [PATCH v3 03/11] serial: Add support to 4 ports in serial_s3c24x0

2012-09-18 Thread José Miguel Gonçalves
S3C2416 and S3C2450 have 4 UARTs insted of 3 found on older chips.
This patch adds support to the additional UART port and changes the
mapping between CONFIG_SERIAL? and S3C24X0_UART? in order they have
a direct correspondence.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch

Changes for v3:
   - None
---
 drivers/serial/serial_s3c24x0.c |   25 ++---
 include/configs/VCMA9.h |2 +-
 include/configs/smdk2410.h  |2 +-
 3 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 12bcdd3..280cd2d 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2002
  * Gary Jennejohn, DENX Software Engineering, ga...@denx.de
  *
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -24,17 +27,20 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_SERIAL1
+#if defined(CONFIG_SERIAL0)
 #define UART_NRS3C24X0_UART0
 
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
 #define UART_NRS3C24X0_UART1
 
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
 #define UART_NRS3C24X0_UART2
 
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C24X0_UART3
+
 #else
-#error Bad: you didn't configure serial ...
+#error You didn't configure serial.
 #endif
 
 #include asm/io.h
@@ -310,15 +316,20 @@ INIT_S3C_SERIAL_STRUCTURE(1, s3ser1);
 DECLARE_S3C_SERIAL_FUNCTIONS(2);
 struct serial_device s3c24xx_serial2_device =
 INIT_S3C_SERIAL_STRUCTURE(2, s3ser2);
+DECLARE_S3C_SERIAL_FUNCTIONS(3);
+struct serial_device s3c24xx_serial3_device =
+INIT_S3C_SERIAL_STRUCTURE(3, s3ser3);
 
 __weak struct serial_device *default_serial_console(void)
 {
-#if defined(CONFIG_SERIAL1)
+#if defined(CONFIG_SERIAL0)
return s3c24xx_serial0_device;
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
return s3c24xx_serial1_device;
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
return s3c24xx_serial2_device;
+#elif defined(CONFIG_SERIAL3)
+   return s3c24xx_serial3_device;
 #else
 #error CONFIG_SERIAL? missing.
 #endif
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 6ad4a6b..82db58f 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -122,7 +122,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on VCMA9 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on VCMA9 */
 
 /* USB support (currently only works with D-cache off) */
 #define CONFIG_USB_OHCI
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 8792c85..ea05f16 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -62,7 +62,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on SMDK2410 */
 
 /
  * USB support (currently only works with D-cache off)
-- 
1.7.9.5

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[U-Boot] [PATCH v3 10/11] Add u-boot-pad.bin target to the Makefile

2012-09-18 Thread José Miguel Gonçalves
Samsung's S3C24XX SoCs need this in order to generate a binary image
with a padded SPL concatenated with U-Boot.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - None

Changes for v3:
   - Changed new binary target name from u-boot-ubl.bin to u-boot-pad.bin
---
 Makefile |   11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/Makefile b/Makefile
index 8738d55..86dedca 100644
--- a/Makefile
+++ b/Makefile
@@ -433,14 +433,15 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
 $(obj)u-boot.dis:  $(obj)u-boot
$(OBJDUMP) -d $  $@
 
-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+$(obj)u-boot-pad.bin:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary 
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
-   cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-ubl.bin
-   $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-   -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin 
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
+   cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-pad.bin
rm $(obj)spl/u-boot-spl-pad.bin
 
+$(obj)u-boot.ubl:   $(obj)spl/u-boot-pad.bin
+   $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
+   -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-pad.bin 
$(obj)u-boot.ubl
+
 $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.img
$(obj)tools/mkimage -s -n /dev/null -T aisimage \
-e $(CONFIG_SPL_TEXT_BASE) \
-- 
1.7.9.5

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[U-Boot] [PATCH v3 09/11] S3C24XX: Add NAND Flash driver

2012-09-18 Thread José Miguel Gonçalves
NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of clrsetbits_le32()
   - Use of register bit macros instead of magic numbers

Changes for v3:
   - Removed magic numbers
   - Removed a macro to declare a void printf()
   - Replaced one printf() with a puts()
---
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  246 +++
 2 files changed, 247 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 29dc20e..791ec44 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,6 +60,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+COBJS-$(CONFIG_NAND_S3C24XX) += s3c24xx_nand.o
 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c24xx_nand.c b/drivers/mtd/nand/s3c24xx_nand.c
new file mode 100644
index 000..3c13709
--- /dev/null
+++ b/drivers/mtd/nand/s3c24xx_nand.c
@@ -0,0 +1,246 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/mtd/nand/s3c64xx.c and U-Boot 1.3.4 from Samsung.
+ * Supports only SLC NAND Flash chips.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/arch/s3c24xx_cpu.h
+
+#define TACLS_VAL  7   /* CLE  ALE duration setting (0~7) */
+#defineTWRPH0_VAL  7   /* TWRPH0 duration setting (0~7) */
+#define TWRPH1_VAL 7   /* TWRPH1 duration setting (0~7) */
+
+#define MAX_CHIPS  2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u_long nfcont;
+
+   nfcont = readl(nand-nfcont);
+
+   switch (chip) {
+   case -1:
+   nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+   break;
+   case 0:
+   nfcont = ~NFCONT_NCE0;
+   break;
+   case 1:
+   nfcont = ~NFCONT_NCE1;
+   break;
+   default:
+   return;
+   }
+
+   writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = nand-nfcmmd;
+   else if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = nand-nfaddr;
+   else
+   this-IO_ADDR_W = nand-nfdata;
+   if (ctrl  NAND_NCE)
+   s3c_nand_select_chip(mtd, *(int *)this-priv);
+   else
+   s3c_nand_select_chip(mtd, -1);
+   }
+
+   if (cmd != NAND_CMD_NONE)
+   writeb(cmd, this-IO_ADDR_W);
+}
+
+/*
+ * Function for checking device ready pin
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+
+   return readl(nand-nfstat)  NFSTAT_RNB;
+}
+
+#ifdef CONFIG_S3C24XX_NAND_HWECC
+/*
+ * This function is called before encoding ECC codes to ready ECC engine.
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+
+   /* Set 1-bit ECC */
+   clrsetbits_le32(nand-nfconf, NFCONF_ECCTYPE_MASK,
+   NFCONF_ECCTYPE_1BIT);
+
+   /* Initialize  unlock ECC */
+   clrsetbits_le32(nand-nfcont, NFCONT_MECCLOCK, NFCONT_INITMECC);
+}
+
+/*
+ * This function is called immediately after encoding ECC codes

[U-Boot] [PATCH v3 11/11] S3C24XX: Add support to MINI2416 board

2012-09-18 Thread José Miguel Gonçalves
The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of Use of clrbits_le32(), setbits_le32() and clrsetbits_le32()
   - Use of register bit macros instead of magic numbers
   - Use of serial and rtc drivers implemented for s3c24x0

Changes for v3:
   - Changed target name from u-boot-ubl.bin to u-boot-pad.bin
   - Removed magic numbers
   - Changes to support new SPL framework
---
 MAINTAINERS|4 +
 board/boardcon/mini2416/Makefile   |   47 
 board/boardcon/mini2416/config.mk  |4 +
 board/boardcon/mini2416/mini2416.c |  104 
 board/boardcon/mini2416/mini2416_spl.c |  202 
 board/boardcon/mini2416/u-boot-spl.lds |   63 ++
 boards.cfg |1 +
 include/configs/mini2416.h |  202 +++
 8 files changed, 627 insertions(+)
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 include/configs/mini2416.h

diff --git a/MAINTAINERS b/MAINTAINERS
index c5a6f2f..80ad29e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -653,6 +653,10 @@ Fabio Estevam fabio.este...@freescale.com
mx53ard i.MX53
mx53smd i.MX53
 
+José Gonçalves jose.goncal...@inov.pt
+
+   mini2416ARM926EJS (S3C2416 SoC)
+
 Daniel Gorsulowski daniel.gorsulow...@esd.eu
 
meesc   ARM926EJS (AT91SAM9263 SoC)
diff --git a/board/boardcon/mini2416/Makefile b/board/boardcon/mini2416/Makefile
new file mode 100644
index 000..bf92ba1
--- /dev/null
+++ b/board/boardcon/mini2416/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves jose.goncal...@inov.pt
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifdef CONFIG_SPL_BUILD
+COBJS  += mini2416_spl.o
+else
+COBJS  += mini2416.o
+endif
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/boardcon/mini2416/config.mk 
b/board/boardcon/mini2416/config.mk
new file mode 100644
index 000..ff08568
--- /dev/null
+++ b/board/boardcon/mini2416/config.mk
@@ -0,0 +1,4 @@
+PAD_TO := 0x2000
+ifndef CONFIG_SPL_BUILD
+ALL-y += $(obj)u-boot-pad.bin
+endif
diff --git a/board/boardcon/mini2416/mini2416.c 
b/board/boardcon/mini2416/mini2416.c
new file mode 100644
index 000..b2c049b
--- /dev/null
+++ b/board/boardcon/mini2416/mini2416.c
@@ -0,0 +1,104 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write

Re: [U-Boot] [PATCH v3 09/11] S3C24XX: Add NAND Flash driver

2012-09-18 Thread José Miguel Gonçalves

On 18-09-2012 19:02, Scott Wood wrote:

On 09/18/2012 12:40:36 PM, José Miguel Gonçalves wrote:

NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of clrsetbits_le32()
   - Use of register bit macros instead of magic numbers

Changes for v3:
   - Removed magic numbers
   - Removed a macro to declare a void printf()
   - Replaced one printf() with a puts()
---
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  246 +++
 2 files changed, 247 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 29dc20e..791ec44 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,6 +60,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+COBJS-$(CONFIG_NAND_S3C24XX) += s3c24xx_nand.o
 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c24xx_nand.c b/drivers/mtd/nand/s3c24xx_nand.c
new file mode 100644
index 000..3c13709
--- /dev/null
+++ b/drivers/mtd/nand/s3c24xx_nand.c
@@ -0,0 +1,246 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/mtd/nand/s3c64xx.c and U-Boot 1.3.4 from Samsung.
+ * Supports only SLC NAND Flash chips.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/errno.h
+#include asm/arch/s3c24xx_cpu.h
+
+#define TACLS_VAL7/* CLE  ALE duration setting (0~7) */
+#defineTWRPH0_VAL7/* TWRPH0 duration setting (0~7) */
+#define TWRPH1_VAL7/* TWRPH1 duration setting (0~7) */


Please use space, not tab, as a word separator (after the second #define).


OK.




+
+#define MAX_CHIPS2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };


This needs explanation (and const).  Better would be to use a priv struct, as 
discussed before.



+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+u_long nfcont;


s/u_long/u32/


Didn't catch this...




+
+nfcont = readl(nand-nfcont);
+
+switch (chip) {
+case -1:
+nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+break;
+case 0:
+nfcont = ~NFCONT_NCE0;
+break;
+case 1:
+nfcont = ~NFCONT_NCE1;
+break;
+default:
+return;


error message on default?


OK.




+}
+
+writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+struct nand_chip *this = mtd-priv;
+
+if (ctrl  NAND_CTRL_CHANGE) {
+if (ctrl  NAND_CLE)
+this-IO_ADDR_W = nand-nfcmmd;
+else if (ctrl  NAND_ALE)
+this-IO_ADDR_W = nand-nfaddr;
+else
+this-IO_ADDR_W = nand-nfdata;
+if (ctrl  NAND_NCE)
+s3c_nand_select_chip(mtd, *(int *)this-priv);
+else
+s3c_nand_select_chip(mtd, -1);
+}
+
+if (cmd != NAND_CMD_NONE)
+writeb(cmd, this-IO_ADDR_W);
+}


As discussed earlier, do you really need to mess with IO_ADDR_W or can you do it 
the way ndfc.c does?


I will take a look at ndfc.c. Most of this driver was copy-paste from s3c64xx.c 
driver and an older patched U-Boot sources from Samsung, so I did not make any 
real code examination after it started to work...




I.e.:

static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
struct nand_chip *this = mtd-priv;

if (cmd == NAND_CMD_NONE)
return;

if (ctrl  NAND_CLE)
writeb(cmd, nand-nfcmmd);
else
writeb(cmd, nand

Re: [U-Boot] [PATCH v3 09/11] S3C24XX: Add NAND Flash driver

2012-09-18 Thread José Miguel Gonçalves

On 18-09-2012 19:30, Scott Wood wrote:

On 09/18/2012 01:22:58 PM, José Miguel Gonçalves wrote:

On 18-09-2012 19:02, Scott Wood wrote:

On 09/18/2012 12:40:36 PM, José Miguel Gonçalves wrote:

+#define TACLS_VAL7/* CLE  ALE duration setting (0~7) */
+#defineTWRPH0_VAL7/* TWRPH0 duration setting (0~7) */
+#define TWRPH1_VAL7/* TWRPH1 duration setting (0~7) */


Please use space, not tab, as a word separator (after the second #define).


OK.




+
+#define MAX_CHIPS2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };


This needs explanation (and const).  Better would be to use a priv struct, as 
discussed before.



+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+u_long nfcont;


s/u_long/u32/


Didn't catch this...


Replace u_long with u32.


OK (didn't expected a regex expression in that context...)




+nfcont = readl(nand-nfcont);
+
+switch (chip) {
+case -1:
+nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+break;
+case 0:
+nfcont = ~NFCONT_NCE0;
+break;
+case 1:
+nfcont = ~NFCONT_NCE1;
+break;
+default:
+return;


error message on default?


OK.




+}
+
+writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)

+{
+struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+struct nand_chip *this = mtd-priv;
+
+if (ctrl  NAND_CTRL_CHANGE) {
+if (ctrl  NAND_CLE)
+this-IO_ADDR_W = nand-nfcmmd;
+else if (ctrl  NAND_ALE)
+this-IO_ADDR_W = nand-nfaddr;
+else
+this-IO_ADDR_W = nand-nfdata;
+if (ctrl  NAND_NCE)
+s3c_nand_select_chip(mtd, *(int *)this-priv);
+else
+s3c_nand_select_chip(mtd, -1);
+}
+
+if (cmd != NAND_CMD_NONE)
+writeb(cmd, this-IO_ADDR_W);
+}


As discussed earlier, do you really need to mess with IO_ADDR_W or can you do 
it the way ndfc.c does?


I will take a look at ndfc.c.




Most of this driver was copy-paste from s3c64xx.c driver and an older patched 
U-Boot sources from Samsung, so I did not make any real code examination after 
it started to work...




I.e.:

static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
struct nand_chip *this = mtd-priv;

if (cmd == NAND_CMD_NONE)
return;

if (ctrl  NAND_CLE)
writeb(cmd, nand-nfcmmd);
else
writeb(cmd, nand-nfaddr);
}


Oh sorry -- the above is missing the NCE part.  Before the NAND_CMD_NONE check 
insert:


if (ctrl  NAND_CTRL_CHANGE) {
if (ctrl  NAND_NCE)
s3c_nand_select_chip(mtd, *(const int *)this-priv);
else
s3c_nand_select_chip(mtd, -1);
}






+/*
+ * Board-specific NAND initialization.
+ */
+int board_nand_init(struct nand_chip *nand)
+{
+static int chip_n;
+struct s3c24xx_nand *const nand_reg = s3c24xx_get_base_nand();
+
+if (chip_n == 0) {
+/* Extend NAND timings to the maximum */
+clrsetbits_le32(nand_reg-nfconf,
+NFCONF_TACLS_MASK | NFCONF_TWRPH0_MASK |
+NFCONF_TWRPH1_MASK,
+NFCONF_TACLS(TACLS_VAL) |
+NFCONF_TWRPH0(TWRPH0_VAL) |
+NFCONF_TWRPH1(TWRPH1_VAL));
+
+/* Disable chip selects and soft lock, enable controller */
+clrsetbits_le32(nand_reg-nfcont, NFCONT_WP,
+NFCONT_NCE1 | NFCONT_NCE0 | NFCONT_ENABLE);
+} else if (chip_n = MAX_CHIPS) {
+return -ENODEV;
+}
+
+nand-IO_ADDR_R = nand_reg-nfdata;
+nand-IO_ADDR_W = nand_reg-nfdata;
+nand-cmd_ctrl = s3c_nand_hwcontrol;
+nand-dev_ready = s3c_nand_device_ready;
+nand-select_chip = s3c_nand_select_chip;
+nand-options = 0;
+#ifdef CONFIG_SPL_BUILD
+nand-read_buf = nand_read_buf;
+#endif
+
+#ifdef CONFIG_S3C24XX_NAND_HWECC
+nand-ecc.hwctl = s3c_nand_enable_hwecc;
+nand-ecc.calculate = s3c_nand_calculate_ecc;
+nand-ecc.correct = s3c_nand_correct_data;
+nand-ecc.mode = NAND_ECC_HW_OOB_FIRST;
+nand-ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+nand-ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+#else
+nand-ecc.mode = NAND_ECC_SOFT;
+#endif /* ! CONFIG_S3C24XX_NAND_HWECC */
+
+nand-priv = nand_cs + chip_n++;
+
+return 0;
+}


Please consider using the new SELF_INIT mechanism.



Can you explain and/or point_to_resources for what this means (I'm a U-Boot 
newbie)...


See CONFIG_SYS_NAND_SELF_INIT in doc/README.nand

I'd like the old way to be removed at some point.


From what I've seen there is an incompatibility between the SPL simple nand 
driver and the SELF_INIT mechanism.
The nand_init() function in drivers/mtd/nand/nand_spl_simple.c calls 
board_nand_init

Re: [U-Boot] [PATCH v2 10/11] Add u-boot-ubl.bin target to the Makefile

2012-09-17 Thread José Miguel Gonçalves

On 09/17/2012 07:47 AM, Christian Riesch wrote:

Hi,

On Sun, Sep 16, 2012 at 11:27 AM, José Miguel Gonçalves
jose.goncal...@inov.pt wrote:

On 09/14/2012 08:08 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 06:29:01PM +0100, Jos?? Miguel Gon??alves wrote:


Samsung's S3C24XX SoCs need this in order to generate a binary image
with the SPL and U-Boot concatenated.

Signed-off-by: Jos?? Miguel Gon??alves jose.goncal...@inov.pt
---
Changes for v2:
 - None
---
   Makefile |7 ---
   1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 058fb53..595b5f6 100644
--- a/Makefile
+++ b/Makefile
@@ -442,13 +442,14 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
   $(obj)u-boot.dis: $(obj)u-boot
 $(OBJDUMP) -d $  $@
   -$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+$(obj)u-boot-ubl.bin:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
 cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin 
$(obj)u-boot-ubl.bin
+   rm $(obj)spl/u-boot-spl-pad.bin
+
+$(obj)u-boot.ubl:   $(obj)u-boot-ubl.bin
 $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
 -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
-   rm $(obj)spl/u-boot-spl-pad.bin
 $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 $(obj)tools/mkimage -s -n $(if
$(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),/dev/null) \

This diff is hard to read, but what exactly are you changing?  The
u-boot-ubl target is also used on TI platforms.  It looks like you're
making it such that u-boot-ubl.bin produces the old binary and
u-boot-ubl adds a new target which is the mkimage header on top of the
same bits as before, but without possibly padding the output image.  I
suspect in your case you could just set PAD_TO to 8192 in
board/../config.mk and use the existing target.


In the S3C2416 I don't need the mkimage stuff. I only need the raw SPL image
padded at 8KB concatenated with the standard U-Boot. What I've done was to
split the existing u-boot-ubl target in two; u-boot-ubl.bin, that I use to
program the Flash, and u-boot-ubl that remains with the same functionality
as before, just now it depends on u-boot-ubl.bin.

I think you should drop the UBL names from your padding target
(u-boot-ubl.bin) since this is TI specific, use something more
generic.


I only reused a temporary filename used for the u-boot-ubl target and 
make it a new target.

If you think this is not an adequate name, can you suggest a new one?

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 01/11] ARM: fix relocation on ARM926EJS

2012-09-17 Thread José Miguel Gonçalves

On 09/17/2012 07:28 AM, Christian Riesch wrote:

Hi,

On Sun, Sep 16, 2012 at 5:36 PM, Marek Vasut ma...@denx.de wrote:

Dear José Miguel Gonçalves,


On 09/16/2012 11:06 AM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


On 09/15/2012 07:03 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Jumping to board_init_r is not performed due to a bug on address
computation.

Is your CONFIG_SYS_TEXT_BASE configured correctly? I don't detect any
misbehavior on my arm926 boards.

Maybe because you are not using it to build an SPL?

I do ... and I use CONFIG_SPL_TEXT_BASE properly .

Please check the same chunk of code in other start.S for arm1176 and
armv7. They have the same code that I put for arm926ejs.

Please wait and please first explain what is the issue.

The issue is what I've explained in the patch comments.

Jumping to board_init_r is not performed due to a bug on address computation.

Ok, I don't know how to replicate the bug from this comment or what effects it
causes or ... well, anything. So please, try to be more elaborate in your patch
description next time. Anyway ..

Same for me - I have no idea what you are trying to fix here. In my
SPL configuration, _TEXT_BASE and _start point to the same location,
so please explain why they are different on your board.


They are different because of how start.S is implemented in arm926ejs.

In my SPL map file I see:

.text   0x  0xc24
 arch/arm/cpu/arm926ejs/start.o(.text)
 .text  0x  0x120 
arch/arm/cpu/arm926ejs/start.o

0x_start
0x0040_TEXT_BASE
0x0044_bss_start_ofs
0x0048_bss_end_ofs
0x004c_end_ofs
0x0050IRQ_STACK_START_IN
0x0074relocate_code



Without this
change the code never reaches board_init_r in the SPL and I think I have
all the configurations correctly set.

I wonder why you'd ever want to reach board_init_r in the SPL. SPL is there only
to load the real U-Boot from whatever media, so you usually use either NAND SPL
or something like that.


Marek, going into board_init_r is fine for SPL, for example the
davinci SPL does some hw initialization in board_init_f and then loads
u-boot in board_init_r.
Regards, Christian


What do you boot the rest from ?


If the bug is not from here please
suggest me what I need to change in the configuration in order to
correctly boot my board.


Relocation offsets are not needed when building SPL.

Do they cause any trouble?

No! Just not needed.


Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---

Changes for v2:
  - None

---

arch/arm/cpu/arm926ejs/start.S |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..2da5342 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S

@@ -325,7 +325,7 @@ _nand_boot_ofs:
  .word nand_boot

#else

  ldr r0, _board_init_r_ofs

-ldr r1, _TEXT_BASE
+adr r1, _start

  add lr, r0, r1
  add lr, lr, r9
  /* setup parameters for board_init_r */

@@ -338,12 +338,14 @@ _board_init_r_ofs:
  .word board_init_r - _start

#endif

+#ifndef CONFIG_SPL_BUILD

_rel_dyn_start_ofs:
  .word __rel_dyn_start - _start

_rel_dyn_end_ofs:
  .word __rel_dyn_end - _start

_dynsym_start_ofs:
  .word __dynsym_start - _start

+#endif

/*

 **
 *** 

Best regards,
Marek Vasut

Best regards,
José Gonçalves

Best regards,
Marek Vasut

Best regards,
José Gonçalves


Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 01/11] ARM: fix relocation on ARM926EJS

2012-09-17 Thread José Miguel Gonçalves

Hi Christian,

On 09/17/2012 10:03 AM, Christian Riesch wrote:

Hi,

On Mon, Sep 17, 2012 at 10:34 AM, José Miguel Gonçalves
jose.goncal...@inov.pt wrote:

On 09/17/2012 07:28 AM, Christian Riesch wrote:

Hi,

On Sun, Sep 16, 2012 at 5:36 PM, Marek Vasut ma...@denx.de wrote:

Dear José Miguel Gonçalves,


On 09/16/2012 11:06 AM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


On 09/15/2012 07:03 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Jumping to board_init_r is not performed due to a bug on address
computation.

Is your CONFIG_SYS_TEXT_BASE configured correctly? I don't detect any
misbehavior on my arm926 boards.

Maybe because you are not using it to build an SPL?

I do ... and I use CONFIG_SPL_TEXT_BASE properly .

Please check the same chunk of code in other start.S for arm1176 and
armv7. They have the same code that I put for arm926ejs.

Please wait and please first explain what is the issue.

The issue is what I've explained in the patch comments.

Jumping to board_init_r is not performed due to a bug on address
computation.

Ok, I don't know how to replicate the bug from this comment or what
effects it
causes or ... well, anything. So please, try to be more elaborate in your
patch
description next time. Anyway ..

Same for me - I have no idea what you are trying to fix here. In my
SPL configuration, _TEXT_BASE and _start point to the same location,
so please explain why they are different on your board.


They are different because of how start.S is implemented in arm926ejs.

In my SPL map file I see:

.text   0x  0xc24
  arch/arm/cpu/arm926ejs/start.o(.text)
  .text  0x  0x120 arch/arm/cpu/arm926ejs/start.o
 0x_start
 0x0040_TEXT_BASE
 0x0044_bss_start_ofs
 0x0048_bss_end_ofs
 0x004c_end_ofs
 0x0050IRQ_STACK_START_IN
 0x0074relocate_code

So _start is 0x, and in your
config/include/include/configs/mini2416.h you have

#define CONFIG_SPL_TEXT_BASE   0x

and in arch/arm/cpu/arm926ejs/start.S we have

.globl _TEXT_BASE
_TEXT_BASE:
#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
 .word   CONFIG_SYS_TEXT_BASE
#else
#ifdef CONFIG_SPL_BUILD
 .word   CONFIG_SPL_TEXT_BASE
#else
 .word   CONFIG_SYS_TEXT_BASE
#endif
#endif

So

ldr r1, _TEXT_BASE

should be the same as

adr r1, _start

However, if you do not load your SPL to 0x but to another
address and execute it from there, it will be different, since adr
uses relative adressing, right? Are you sure you are loading it to
0x?


Not an expert on ARM assembly, so cannot give any feedback on the 
differences between adr and ldr mnemonics.


What I know for a fact is that the S3C2416, when booting from it's 
internal ROM, makes a copy of the first 8KB of the NAND flash to an 
internal RAM (named SteppingStone), maps it at address 0 and the jumps 
to the start of it. This mapping is not clear in Samsung's user manual 
but I retrieved that information from here:


http://barebox.org/documentation/barebox-2011.05.0/dev_s3c24xx_arch.html



Regards, Christian





Without this
change the code never reaches board_init_r in the SPL and I think I have
all the configurations correctly set.

I wonder why you'd ever want to reach board_init_r in the SPL. SPL is
there only
to load the real U-Boot from whatever media, so you usually use either
NAND SPL
or something like that.


Marek, going into board_init_r is fine for SPL, for example the
davinci SPL does some hw initialization in board_init_f and then loads
u-boot in board_init_r.
Regards, Christian


What do you boot the rest from ?


If the bug is not from here please
suggest me what I need to change in the configuration in order to
correctly boot my board.


Relocation offsets are not needed when building SPL.

Do they cause any trouble?

No! Just not needed.


Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---

Changes for v2:
   - None

---

 arch/arm/cpu/arm926ejs/start.S |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..2da5342 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S

@@ -325,7 +325,7 @@ _nand_boot_ofs:
   .word nand_boot

 #else

   ldr r0, _board_init_r_ofs

-ldr r1, _TEXT_BASE
+adr r1, _start

   add lr, r0, r1
   add lr, lr, r9
   /* setup parameters for board_init_r */

@@ -338,12 +338,14 @@ _board_init_r_ofs:
   .word board_init_r - _start

 #endif

+#ifndef CONFIG_SPL_BUILD

Re: [U-Boot] [PATCH v2 10/11] Add u-boot-ubl.bin target to the Makefile

2012-09-17 Thread José Miguel Gonçalves

On 09/17/2012 10:10 AM, Christian Riesch wrote:

On Mon, Sep 17, 2012 at 10:30 AM, José Miguel Gonçalves
jose.goncal...@inov.pt wrote:

On 09/17/2012 07:47 AM, Christian Riesch wrote:

Hi,

On Sun, Sep 16, 2012 at 11:27 AM, José Miguel Gonçalves
jose.goncal...@inov.pt wrote:

On 09/14/2012 08:08 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 06:29:01PM +0100, Jos?? Miguel Gon??alves wrote:


Samsung's S3C24XX SoCs need this in order to generate a binary image
with the SPL and U-Boot concatenated.

Signed-off-by: Jos?? Miguel Gon??alves jose.goncal...@inov.pt
---
Changes for v2:
  - None
---
Makefile |7 ---
1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 058fb53..595b5f6 100644
--- a/Makefile
+++ b/Makefile
@@ -442,13 +442,14 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
$(obj)u-boot.dis: $(obj)u-boot
  $(OBJDUMP) -d $  $@
-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+$(obj)u-boot-ubl.bin:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
  $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
  cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin 
$(obj)u-boot-ubl.bin
+   rm $(obj)spl/u-boot-spl-pad.bin
+
+$(obj)u-boot.ubl:   $(obj)u-boot-ubl.bin
  $(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
  -e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
-   rm $(obj)spl/u-boot-spl-pad.bin
  $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
  $(obj)tools/mkimage -s -n $(if
$(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),/dev/null) \

This diff is hard to read, but what exactly are you changing?  The
u-boot-ubl target is also used on TI platforms.  It looks like you're
making it such that u-boot-ubl.bin produces the old binary and
u-boot-ubl adds a new target which is the mkimage header on top of the
same bits as before, but without possibly padding the output image.  I
suspect in your case you could just set PAD_TO to 8192 in
board/../config.mk and use the existing target.


In the S3C2416 I don't need the mkimage stuff. I only need the raw SPL
image
padded at 8KB concatenated with the standard U-Boot. What I've done was
to
split the existing u-boot-ubl target in two; u-boot-ubl.bin, that I use
to
program the Flash, and u-boot-ubl that remains with the same
functionality
as before, just now it depends on u-boot-ubl.bin.

I think you should drop the UBL names from your padding target
(u-boot-ubl.bin) since this is TI specific, use something more
generic.


I only reused a temporary filename used for the u-boot-ubl target and make
it a new target.
If you think this is not an adequate name, can you suggest a new one?

u-boot.pad? u-boot-pad.bin?



If no one else has anything against, I will change the name of the new 
target to u-boot-pad.bin


Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 09/11] S3C24XX: Add NAND Flash driver

2012-09-17 Thread José Miguel Gonçalves

Hi Marek,

On 14-09-2012 19:21, Marek Vasut wrote:

Dear José Miguel Gonçalves,


NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt

[...]


+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+#include asm/errno.h
+
+#define MAX_CHIPS  2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };
+
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)

This doesn't seem quite right ...

1) this should be in CPU directory
2) should be enabled only if CONFIG_SPL_SERIAL_SUPPORT is not set
3) should be inline function, not a macro



I'm having difficulties in following this suggestion. No problem if I migrate the 
printf as a macro to a header in the CPU directory. The problem is when I try to 
put it as an inline function. In this case if I define it like this;


#ifdef CONFIG_SPL_BUILD
static inline int printf(const char *fmt, ...)
{
return 0;
}
#endif

I will get an static declaration of `printf' follows non-static declaration 
error due to the printf() declaration in common.h.


If I put this inline printf function (without the static) in a .c file in the CPU 
directory, it will compile but, as I expected, it will not be inlined, but it will 
be compiled as a normal function.


Can you detail on how to do this?

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 11/11] S3C24XX: Add support to MINI2416 board

2012-09-17 Thread José Miguel Gonçalves

On 17-09-2012 15:39, Tom Rini wrote:

On Sun, Sep 16, 2012 at 10:11:07AM +0100, Jos? Miguel Gon?alves wrote:

On 09/14/2012 07:58 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 06:29:02PM +0100, Jos?? Miguel Gon??alves wrote:


The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

[snip]

Can you please try this on top of my SPL framework series?  Thanks!

I thought I was using the latest SPL framework!
Can you please detail on what I should do different?

Please see
http://www.mail-archive.com/u-boot@lists.denx.de/msg92156.html



As this is still not merged, I reckon you only want to check if this new SPL 
framework works fine with my board.


I'm not expected to resubmit my patch to be according with the new framework, 
correct?

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 09/11] S3C24XX: Add NAND Flash driver

2012-09-17 Thread José Miguel Gonçalves

On 17-09-2012 17:57, Tom Rini wrote:

On Sun, Sep 16, 2012 at 10:16:47AM +0100, Jos? Miguel Gon?alves wrote:

On 09/14/2012 08:01 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 07:45:40PM +0100, Jos? Miguel Gon?alves wrote:

On 14-09-2012 19:21, Marek Vasut wrote:

Dear Jos? Miguel Gon?alves,


NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: Jos? Miguel Gon?alves jose.goncal...@inov.pt

[...]


+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+#include asm/errno.h
+
+#define MAX_CHIPS  2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };
+
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)

This doesn't seem quite right ...

1) this should be in CPU directory
2) should be enabled only if CONFIG_SPL_SERIAL_SUPPORT is not set
3) should be inline function, not a macro

1) and 3) OK.
Don't quite understand 2). I want to remove the printfs in the SPL
build, as it would blown up the internal SoC RAM space available.
So why add a condition with CONFIG_SPL_SERIAL_SUPPORT?

You've got 8KB, based on the final patch in the series.  At least in my
SPL series that's still enough to get you printf/puts (I believe 4kb was
the cutoff where that had to be dropped).


Barely:

$ size u-boot-spl
text   databssdechexfilename
3337  8588   3933f5du-boot-spl

$ size u-boot-spl-printf
text   databssdechexfilename
7968  8604   8580   2184 u-boot-spl-printf

The printf is not so important that justifies exhausting the IRAM
space available and preventing any future SPL expansion...

There's two parts to this:
- What else can you do in a single binary, in theory?  Is there boot
   medium detection and you would want to have, for example, NAND and SD
   support in the same binary?  I would say memory is meant for using,
   but this is a board maintainer decision and that's you :)


That's exactly what I've got in mind when I talked about a future expansion! Being 
able to boot also from an SD card.
With only 8KB for .text and .data, I can not use printfs in the SPL for this 
platform (at least with the present printf support for SPL).



- We have a define today (CONFIG_SPL_LIBCOMMON_SUPPORT) that toggles
   printf or no printf.  If we really need to say yes to
   LIBCOMMON_SUPPORT and no to printf, we need finer grained config
   options and then a do-nothing printf is used for SPL.  Doing the
   opt-out driver by driver just punts this problem down the road to the
   next developer and that's not very nice (and adding
   CONFIG_SPL_PRINTF_SUPPORT shouldn't be a big patch, modify a few
   Makefiles, update a bunch of config files, add
   common/spl/dummy_funcs.c and a __weak printf).



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Re: [U-Boot] [PATCH v2 01/11] ARM: fix relocation on ARM926EJS

2012-09-17 Thread José Miguel Gonçalves

On 17-09-2012 18:18, Tom Rini wrote:

On Sun, Sep 16, 2012 at 05:36:47PM +0200, Marek Vasut wrote:

Dear Jos? Miguel Gon?alves,


On 09/16/2012 11:06 AM, Marek Vasut wrote:

Dear Jos? Miguel Gon?alves,


On 09/15/2012 07:03 PM, Marek Vasut wrote:

Dear Jos? Miguel Gon?alves,


Jumping to board_init_r is not performed due to a bug on address
computation.

Is your CONFIG_SYS_TEXT_BASE configured correctly? I don't detect any
misbehavior on my arm926 boards.

Maybe because you are not using it to build an SPL?

I do ... and I use CONFIG_SPL_TEXT_BASE properly .

Please check the same chunk of code in other start.S for arm1176 and
armv7. They have the same code that I put for arm926ejs.

Please wait and please first explain what is the issue.

The issue is what I've explained in the patch comments.

Jumping to board_init_r is not performed due to a bug on address computation.

Ok, I don't know how to replicate the bug from this comment or what effects it
causes or ... well, anything. So please, try to be more elaborate in your patch
description next time. Anyway ..


Without this
change the code never reaches board_init_r in the SPL and I think I have
all the configurations correctly set.

I wonder why you'd ever want to reach board_init_r in the SPL. SPL is there only
to load the real U-Boot from whatever media, so you usually use either NAND SPL

Here's a good point for me to jump in, I think.  There's two things to
understand:
- In the current in-tree SPL implementations the code flow is
   board_init_f calls relocate_code() to clear the BSS _and_ get our jump
   to board_init_r.  It does not actually relocate the running U-Boot,
   just clears the BSS.  board_init_r is what calls the things to load
   and boot the next stage (U-Boot or Linux).

- In my series this has been changed slightly to be board_init_f calls
   memset and then board_init_r directly.  So this patch should not be
   needed once rebased on that series.


OK Tom. I will start working on rebasing the MINI2416 board support on the new SPL 
framework.

If I have any doubts I will get in touch with you...

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 09/11] S3C24XX: Add NAND Flash driver

2012-09-17 Thread José Miguel Gonçalves

On 17-09-2012 18:56, Tom Rini wrote:

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 09/17/12 10:08, José Miguel Gonçalves wrote:

On 17-09-2012 17:57, Tom Rini wrote:

On Sun, Sep 16, 2012 at 10:16:47AM +0100, Jos? Miguel Gon?alves
wrote:

On 09/14/2012 08:01 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 07:45:40PM +0100, Jos? Miguel
Gon?alves wrote:

On 14-09-2012 19:21, Marek Vasut wrote:

Dear Jos? Miguel Gon?alves,


NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: Jos? Miguel Gon?alves
jose.goncal...@inov.pt

[...]


+#include common.h +#include nand.h +#include
asm/io.h +#include asm/arch/s3c24xx_cpu.h +#include
asm/errno.h + +#define MAX_CHIPS2 +static int
nand_cs[MAX_CHIPS] = { 0, 1 }; + +#ifdef
CONFIG_SPL_BUILD +#define printf(arg...) do {} while
(0)

This doesn't seem quite right ...

1) this should be in CPU directory 2) should be enabled
only if CONFIG_SPL_SERIAL_SUPPORT is not set 3) should be
inline function, not a macro

1) and 3) OK. Don't quite understand 2). I want to remove
the printfs in the SPL build, as it would blown up the
internal SoC RAM space available. So why add a condition
with CONFIG_SPL_SERIAL_SUPPORT?

You've got 8KB, based on the final patch in the series.  At
least in my SPL series that's still enough to get you
printf/puts (I believe 4kb was the cutoff where that had to
be dropped).


Barely:

$ size u-boot-spl text   databssdec
hexfilename 3337  8588   3933
f5du-boot-spl

$ size u-boot-spl-printf text   databssdec
hexfilename 7968  8604   8580
2184 u-boot-spl-printf

The printf is not so important that justifies exhausting the
IRAM space available and preventing any future SPL
expansion...

There's two parts to this: - What else can you do in a single
binary, in theory?  Is there boot medium detection and you would
want to have, for example, NAND and SD support in the same
binary?  I would say memory is meant for using, but this is a
board maintainer decision and that's you :)

That's exactly what I've got in mind when I talked about a future
expansion! Being able to boot also from an SD card. With only 8KB
for .text and .data, I can not use printfs in the SPL for this
platform (at least with the present printf support for SPL).


- We have a define today (CONFIG_SPL_LIBCOMMON_SUPPORT) that
toggles printf or no printf.  If we really need to say yes to
LIBCOMMON_SUPPORT and no to printf, we need finer grained config
options and then a do-nothing printf is used for SPL.  Doing the
opt-out driver by driver just punts this problem down the road to
the next developer and that's not very nice (and adding
CONFIG_SPL_PRINTF_SUPPORT shouldn't be a big patch, modify a few
Makefiles, update a bunch of config files, add
common/spl/dummy_funcs.c and a __weak printf).

OK, so please take a stab at option two, on top of my SPL series,
keeping in mind what Scott has said (which makes sense) because
otherwise you'll be changing a lot of MMC files too to drop out printf :)


The solution that I sorted out on the current SPL framework was to add this:

#ifdef CONFIG_SPL_BUILD
#define printf(arg...) do {} while (0)
#ifdef CONFIG_SPL_SERIAL_SUPPORT
#define puts(arg) serial_puts(arg)
#endif
#endif

on a CPU specific header. Marek told me to not use macros, but to use inline 
functions instead, but has I told earlier on this thread, I am unable to do that. 
Suggestions for doing this in a better way are welcome...

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Re: [U-Boot] [PATCH v2 09/11] S3C24XX: Add NAND Flash driver

2012-09-17 Thread José Miguel Gonçalves

On 17-09-2012 19:27, Tom Rini wrote:

On Mon, Sep 17, 2012 at 07:05:48PM +0100, Jos? Miguel Gon?alves wrote:

On 17-09-2012 18:56, Tom Rini wrote:

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1

On 09/17/12 10:08, Jos? Miguel Gon?alves wrote:

On 17-09-2012 17:57, Tom Rini wrote:

On Sun, Sep 16, 2012 at 10:16:47AM +0100, Jos? Miguel Gon?alves
wrote:

On 09/14/2012 08:01 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 07:45:40PM +0100, Jos? Miguel
Gon?alves wrote:

On 14-09-2012 19:21, Marek Vasut wrote:

Dear Jos? Miguel Gon?alves,


NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: Jos? Miguel Gon?alves
jose.goncal...@inov.pt

[...]


+#include common.h +#include nand.h +#include
asm/io.h +#include asm/arch/s3c24xx_cpu.h +#include
asm/errno.h + +#define MAX_CHIPS2 +static int
nand_cs[MAX_CHIPS] = { 0, 1 }; + +#ifdef
CONFIG_SPL_BUILD +#define printf(arg...) do {} while
(0)

This doesn't seem quite right ...

1) this should be in CPU directory 2) should be enabled
only if CONFIG_SPL_SERIAL_SUPPORT is not set 3) should be
inline function, not a macro

1) and 3) OK. Don't quite understand 2). I want to remove
the printfs in the SPL build, as it would blown up the
internal SoC RAM space available. So why add a condition
with CONFIG_SPL_SERIAL_SUPPORT?

You've got 8KB, based on the final patch in the series.  At
least in my SPL series that's still enough to get you
printf/puts (I believe 4kb was the cutoff where that had to
be dropped).


Barely:

$ size u-boot-spl text   databssdec
hexfilename 3337  8588   3933
f5du-boot-spl

$ size u-boot-spl-printf text   databssdec
hexfilename 7968  8604   8580
2184 u-boot-spl-printf

The printf is not so important that justifies exhausting the
IRAM space available and preventing any future SPL
expansion...

There's two parts to this: - What else can you do in a single
binary, in theory?  Is there boot medium detection and you would
want to have, for example, NAND and SD support in the same
binary?  I would say memory is meant for using, but this is a
board maintainer decision and that's you :)

That's exactly what I've got in mind when I talked about a future
expansion! Being able to boot also from an SD card. With only 8KB
for .text and .data, I can not use printfs in the SPL for this
platform (at least with the present printf support for SPL).


- We have a define today (CONFIG_SPL_LIBCOMMON_SUPPORT) that
toggles printf or no printf.  If we really need to say yes to
LIBCOMMON_SUPPORT and no to printf, we need finer grained config
options and then a do-nothing printf is used for SPL.  Doing the
opt-out driver by driver just punts this problem down the road to
the next developer and that's not very nice (and adding
CONFIG_SPL_PRINTF_SUPPORT shouldn't be a big patch, modify a few
Makefiles, update a bunch of config files, add
common/spl/dummy_funcs.c and a __weak printf).

OK, so please take a stab at option two, on top of my SPL series,
keeping in mind what Scott has said (which makes sense) because
otherwise you'll be changing a lot of MMC files too to drop out printf :)

The solution that I sorted out on the current SPL framework was to add this:

#ifdef CONFIG_SPL_BUILD
#define printf(arg...) do {} while (0)
#ifdef CONFIG_SPL_SERIAL_SUPPORT
#define puts(arg) serial_puts(arg)
#endif
#endif

on a CPU specific header. Marek told me to not use macros, but to
use inline functions instead, but has I told earlier on this thread,
I am unable to do that. Suggestions for doing this in a better way
are welcome...

It's gotta go in common.h, and something like
/* Big comment what / why */
#if !defined(CONFIG_SPL_BUILD) || \
(CONFIG_SPL_BUILD  CONFIG_SPL_PRINTF_SUPPORT)
void putc(...);
void puts(...);
int printf();
#else
#define putc(c) serial_putc(c)
#define puts(s) serial_puts(s)
#define printf(arg...) do {} while (0)
#endif



Are macros OK to remove printf() and to replace putc()/puts() by 
serial_putc()/serial_puts() in the SPL?

Shouldn’t we be using inline functions instead?

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Re: [U-Boot] [PATCH v2 11/11] S3C24XX: Add support to MINI2416 board

2012-09-16 Thread José Miguel Gonçalves

On 09/14/2012 07:58 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 06:29:02PM +0100, Jos?? Miguel Gon??alves wrote:


The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

[snip]

Can you please try this on top of my SPL framework series?  Thanks!



I thought I was using the latest SPL framework!
Can you please detail on what I should do different?

Best regards,
José Gonçalves

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Re: [U-Boot] [PATCH v2 09/11] S3C24XX: Add NAND Flash driver

2012-09-16 Thread José Miguel Gonçalves

On 09/14/2012 08:01 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 07:45:40PM +0100, Jos? Miguel Gon?alves wrote:

On 14-09-2012 19:21, Marek Vasut wrote:

Dear Jos? Miguel Gon?alves,


NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: Jos? Miguel Gon?alves jose.goncal...@inov.pt

[...]


+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+#include asm/errno.h
+
+#define MAX_CHIPS  2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };
+
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)

This doesn't seem quite right ...

1) this should be in CPU directory
2) should be enabled only if CONFIG_SPL_SERIAL_SUPPORT is not set
3) should be inline function, not a macro

1) and 3) OK.
Don't quite understand 2). I want to remove the printfs in the SPL
build, as it would blown up the internal SoC RAM space available.
So why add a condition with CONFIG_SPL_SERIAL_SUPPORT?

You've got 8KB, based on the final patch in the series.  At least in my
SPL series that's still enough to get you printf/puts (I believe 4kb was
the cutoff where that had to be dropped).



Barely:

$ size u-boot-spl
   text   databssdechexfilename
   3337  8588   3933f5du-boot-spl

$ size u-boot-spl-printf
   text   databssdechexfilename
   7968  8604   8580   2184 u-boot-spl-printf

The printf is not so important that justifies exhausting the IRAM space 
available and preventing any future SPL expansion...



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Re: [U-Boot] [PATCH v2 10/11] Add u-boot-ubl.bin target to the Makefile

2012-09-16 Thread José Miguel Gonçalves

On 09/14/2012 08:08 PM, Tom Rini wrote:

On Fri, Sep 14, 2012 at 06:29:01PM +0100, Jos?? Miguel Gon??alves wrote:


Samsung's S3C24XX SoCs need this in order to generate a binary image
with the SPL and U-Boot concatenated.

Signed-off-by: Jos?? Miguel Gon??alves jose.goncal...@inov.pt
---
Changes for v2:
- None
---
  Makefile |7 ---
  1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 058fb53..595b5f6 100644
--- a/Makefile
+++ b/Makefile
@@ -442,13 +442,14 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
  $(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $  $@
  
-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin

+$(obj)u-boot-ubl.bin:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary 
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-ubl.bin
+   rm $(obj)spl/u-boot-spl-pad.bin
+
+$(obj)u-boot.ubl:   $(obj)u-boot-ubl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin 
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
-   rm $(obj)spl/u-boot-spl-pad.bin
  
  $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin

$(obj)tools/mkimage -s -n $(if 
$(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),/dev/null) \

This diff is hard to read, but what exactly are you changing?  The
u-boot-ubl target is also used on TI platforms.  It looks like you're
making it such that u-boot-ubl.bin produces the old binary and
u-boot-ubl adds a new target which is the mkimage header on top of the
same bits as before, but without possibly padding the output image.  I
suspect in your case you could just set PAD_TO to 8192 in
board/../config.mk and use the existing target.



In the S3C2416 I don't need the mkimage stuff. I only need the raw SPL 
image padded at 8KB concatenated with the standard U-Boot. What I've 
done was to split the existing u-boot-ubl target in two; u-boot-ubl.bin, 
that I use to program the Flash, and u-boot-ubl that remains with the 
same functionality as before, just now it depends on u-boot-ubl.bin.


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Re: [U-Boot] [PATCH v2 01/11] ARM: fix relocation on ARM926EJS

2012-09-16 Thread José Miguel Gonçalves

On 09/15/2012 07:03 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Jumping to board_init_r is not performed due to a bug on address
computation.

Is your CONFIG_SYS_TEXT_BASE configured correctly? I don't detect any
misbehavior on my arm926 boards.


Maybe because you are not using it to build an SPL?
Please check the same chunk of code in other start.S for arm1176 and 
armv7. They have the same code that I put for arm926ejs.





Relocation offsets are not needed when building SPL.

Do they cause any trouble?


No! Just not needed.




Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
- None
---
  arch/arm/cpu/arm926ejs/start.S |4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..2da5342 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -325,7 +325,7 @@ _nand_boot_ofs:
.word nand_boot
  #else
ldr r0, _board_init_r_ofs
-   ldr r1, _TEXT_BASE
+   adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
@@ -338,12 +338,14 @@ _board_init_r_ofs:
.word board_init_r - _start
  #endif

+#ifndef CONFIG_SPL_BUILD
  _rel_dyn_start_ofs:
.word __rel_dyn_start - _start
  _rel_dyn_end_ofs:
.word __rel_dyn_end - _start
  _dynsym_start_ofs:
.word __dynsym_start - _start
+#endif

  /*
   *

Best regards,
Marek Vasut



Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 01/11] ARM: fix relocation on ARM926EJS

2012-09-16 Thread José Miguel Gonçalves

On 09/16/2012 11:06 AM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


On 09/15/2012 07:03 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Jumping to board_init_r is not performed due to a bug on address
computation.

Is your CONFIG_SYS_TEXT_BASE configured correctly? I don't detect any
misbehavior on my arm926 boards.

Maybe because you are not using it to build an SPL?

I do ... and I use CONFIG_SPL_TEXT_BASE properly .


Please check the same chunk of code in other start.S for arm1176 and
armv7. They have the same code that I put for arm926ejs.

Please wait and please first explain what is the issue.


The issue is what I've explained in the patch comments. Without this 
change the code never reaches board_init_r in the SPL and I think I have 
all the configurations correctly set. If the bug is not from here please 
suggest me what I need to change in the configuration in order to 
correctly boot my board.





Relocation offsets are not needed when building SPL.

Do they cause any trouble?

No! Just not needed.


Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---

Changes for v2:
 - None

---

   arch/arm/cpu/arm926ejs/start.S |4 +++-
   1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..2da5342 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S

@@ -325,7 +325,7 @@ _nand_boot_ofs:
.word nand_boot
   
   #else
   
   	ldr	r0, _board_init_r_ofs


-   ldr r1, _TEXT_BASE
+   adr r1, _start

add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */

@@ -338,12 +338,14 @@ _board_init_r_ofs:
.word board_init_r - _start
   
   #endif


+#ifndef CONFIG_SPL_BUILD

   _rel_dyn_start_ofs:
.word __rel_dyn_start - _start
   
   _rel_dyn_end_ofs:

.word __rel_dyn_end - _start
   
   _dynsym_start_ofs:

.word __dynsym_start - _start

+#endif

   /*
   
*



Best regards,
Marek Vasut

Best regards,
José Gonçalves

Best regards,
Marek Vasut


Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH v2 01/11] ARM: fix relocation on ARM926EJS

2012-09-16 Thread José Miguel Gonçalves

On 09/16/2012 04:36 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


On 09/16/2012 11:06 AM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


On 09/15/2012 07:03 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Jumping to board_init_r is not performed due to a bug on address
computation.

Is your CONFIG_SYS_TEXT_BASE configured correctly? I don't detect any
misbehavior on my arm926 boards.

Maybe because you are not using it to build an SPL?

I do ... and I use CONFIG_SPL_TEXT_BASE properly .

Please check the same chunk of code in other start.S for arm1176 and
armv7. They have the same code that I put for arm926ejs.

Please wait and please first explain what is the issue.

The issue is what I've explained in the patch comments.

Jumping to board_init_r is not performed due to a bug on address computation.

Ok, I don't know how to replicate the bug from this comment or what effects it
causes or ... well, anything. So please, try to be more elaborate in your patch
description next time. Anyway ..


My bad. I should be more explicit on the patch description.


Without this
change the code never reaches board_init_r in the SPL and I think I have
all the configurations correctly set.

I wonder why you'd ever want to reach board_init_r in the SPL. SPL is there only
to load the real U-Boot from whatever media, so you usually use either NAND SPL
or something like that.

What do you boot the rest from ?


Both SPL and U-Boot are in NAND Flash.

The board's SPL code in board/boardcon/mini2416/mini2416_spl.c that 
needs this patch was based on existing code from 
arch/arm/cpu/arm926ejs/davinci/spl.c and arm/cpu/armv7/omap-common/spl.c


The need to call relocate_code() in board_init_f() is explained on the 
SPL source comment, i.e., only to initialize .bss before we could use it 
in board_init_r() (in the serial driver initialization).






If the bug is not from here please
suggest me what I need to change in the configuration in order to
correctly boot my board.


Relocation offsets are not needed when building SPL.

Do they cause any trouble?

No! Just not needed.


Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---

Changes for v2:
  - None

---

arch/arm/cpu/arm926ejs/start.S |4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S
b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..2da5342 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S

@@ -325,7 +325,7 @@ _nand_boot_ofs:
.word nand_boot

#else

	ldr	r0, _board_init_r_ofs


-   ldr r1, _TEXT_BASE
+   adr r1, _start

add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */

@@ -338,12 +338,14 @@ _board_init_r_ofs:
.word board_init_r - _start

#endif


+#ifndef CONFIG_SPL_BUILD

_rel_dyn_start_ofs:
.word __rel_dyn_start - _start

_rel_dyn_end_ofs:

.word __rel_dyn_end - _start

_dynsym_start_ofs:

.word __dynsym_start - _start

+#endif

/*

 **

 *** 

Best regards,
Marek Vasut

Best regards,
José Gonçalves

Best regards,
Marek Vasut

Best regards,
José Gonçalves


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[U-Boot] [PATCH v2 01/11] ARM: fix relocation on ARM926EJS

2012-09-14 Thread José Miguel Gonçalves
Jumping to board_init_r is not performed due to a bug on address computation.
Relocation offsets are not needed when building SPL.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - None
---
 arch/arm/cpu/arm926ejs/start.S |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 6f05f1a..2da5342 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -325,7 +325,7 @@ _nand_boot_ofs:
.word nand_boot
 #else
ldr r0, _board_init_r_ofs
-   ldr r1, _TEXT_BASE
+   adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
@@ -338,12 +338,14 @@ _board_init_r_ofs:
.word board_init_r - _start
 #endif
 
+#ifndef CONFIG_SPL_BUILD
 _rel_dyn_start_ofs:
.word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
.word __rel_dyn_end - _start
 _dynsym_start_ofs:
.word __dynsym_start - _start
+#endif
 
 /*
  *
-- 
1.7.9.5

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[U-Boot] [PATCH v2 06/11] rtc: Improve rtc_get() on s3c24x0_rtc

2012-09-14 Thread José Miguel Gonçalves
A better approach to avoid reading the RTC during updates, as sugested in
the S3C2416 User's Manual.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch
---
 drivers/rtc/s3c24x0_rtc.c |   10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index c16ff2e..7d04b74 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -65,20 +65,26 @@ int rtc_get(struct rtc_time *tmp)
uchar sec, min, hour, mday, wday, mon, year;
__maybe_unused uchar a_sec, a_min, a_hour, a_date,
 a_mon, a_year, a_armed;
+   int have_retried = 0;
 
/* enable access to RTC registers */
SetRTC_Access(RTC_ENABLE);
 
/* read RTC registers */
do {
-   sec  = readb(rtc-bcdsec);
min  = readb(rtc-bcdmin);
hour = readb(rtc-bcdhour);
mday = readb(rtc-bcddate);
wday = readb(rtc-bcdday);
mon  = readb(rtc-bcdmon);
year = readb(rtc-bcdyear);
-   } while (sec != readb(rtc-bcdsec));
+   sec  = readb(rtc-bcdsec);
+   /*
+* The only way to work out whether the RTC was mid-update
+* when we read it is to check the seconds counter.
+* If it's zero, then we re-try the entire read.
+*/
+   } while ((sec == 0)  !(have_retried++));
 
/* read ALARM registers */
a_sec   = readb(rtc-almsec);
-- 
1.7.9.5

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[U-Boot] [PATCH v2 05/11] serial: Remove unnecessary delay in serial_s3c24x0

2012-09-14 Thread José Miguel Gonçalves
The loop used to make a delay after baudrate setting is not necessary.
Moreover it is removed by the GCC optimizer (at least with GCC 4.6).

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch
---
 drivers/serial/serial_s3c24x0.c |3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index c9bc121..ec5d1cb 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -111,15 +111,12 @@ void _serial_setbrg(const int dev_index)
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
u32 pclk;
u32 baudrate;
-   int i;
 
pclk = get_PCLK();
baudrate = gd-baudrate;
 
writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
-   for (i = 0; i  100; i++)
-   /* Delay */ ;
 }
 
 #if defined(CONFIG_SERIAL_MULTI)
-- 
1.7.9.5

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[U-Boot] [PATCH v2 07/11] rtc: Fix rtc_reset() on s3c24x0_rtc

2012-09-14 Thread José Miguel Gonçalves
rtc_reset() must set the RTC date to the UNIX Epoch.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch
---
 drivers/rtc/s3c24x0_rtc.c |   15 +++
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index 7d04b74..54bf6e3 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -167,10 +167,17 @@ int rtc_set(struct rtc_time *tmp)
 
 void rtc_reset(void)
 {
-   struct s3c24x0_rtc *rtc = s3c24x0_get_base_rtc();
-
-   writeb((readb(rtc-rtccon)  ~0x06) | 0x08, rtc-rtccon);
-   writeb(readb(rtc-rtccon)  ~(0x08 | 0x01), rtc-rtccon);
+   static struct rtc_time tmp = {
+   .tm_year = 1970,
+   .tm_mon = 1,
+   .tm_mday = 1,
+   .tm_wday = 4,
+   .tm_hour = 0,
+   .tm_min = 0,
+   .tm_sec = 0,
+   };
+
+   rtc_set(tmp);
 }
 
 #endif
-- 
1.7.9.5

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[U-Boot] [PATCH v2 00/11] S3C24XX: Add support to MINI2416 board

2012-09-14 Thread José Miguel Gonçalves
Support for the MINI2416 board based on a Samsung's S3C2416 SoC with
64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a
WM8731 Audio CODEC.

Changes for v2:
   - Coding style cleanup
   - Removed new serial and rtc drivers
   - Use of in-tree serial and rtc drivers

José Miguel Gonçalves (11):
  ARM: fix relocation on ARM926EJS
  S3C24XX: Add core support for Samsung's S3C24XX SoCs
  serial: Add support to 4 ports in serial_s3c24x0
  serial: Use a more precise baud rate generation for serial_s3c24x0
  serial: Remove unnecessary delay in serial_s3c24x0
  rtc: Improve rtc_get() on s3c24x0_rtc
  rtc: Fix rtc_reset() on s3c24x0_rtc
  rtc: Don't allow setting unsuported years on s3c24x0_rtc
  S3C24XX: Add NAND Flash driver
  Add u-boot-ubl.bin target to the Makefile
  S3C24XX: Add support to MINI2416 board

 MAINTAINERS |4 +
 Makefile|7 +-
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   52 ++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  152 ++
 arch/arm/cpu/arm926ejs/start.S  |4 +-
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  120 +
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  175 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  598 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 board/boardcon/mini2416/Makefile|   47 ++
 board/boardcon/mini2416/config.mk   |4 +
 board/boardcon/mini2416/mini2416.c  |   98 
 board/boardcon/mini2416/mini2416_spl.c  |  200 
 board/boardcon/mini2416/u-boot-spl.lds  |   63 +++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  245 ++
 drivers/rtc/s3c24x0_rtc.c   |   30 +-
 drivers/serial/serial_s3c24x0.c |   52 +-
 include/common.h|1 +
 include/configs/VCMA9.h |2 +-
 include/configs/mini2416.h  |  200 
 include/configs/smdk2410.h  |2 +-
 28 files changed, 2446 insertions(+), 26 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c
 create mode 100644 include/configs/mini2416.h

-- 
1.7.9.5

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[U-Boot] [PATCH v2 04/11] serial: Use a more precise baud rate generation for serial_s3c24x0

2012-09-14 Thread José Miguel Gonçalves
Program udivslot register in order to obtain a more precise baudrate.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch
---
 drivers/serial/serial_s3c24x0.c |   24 
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 280cd2d..c9bc121 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -92,16 +92,32 @@ DECLARE_GLOBAL_DATA_PTR;
 static int hwflow;
 #endif
 
+/*
+ * The values stored in the baud rate divisor register (UBRDIVn) and dividing
+ * slot register (UDIVSLOTn), are used to determine the serial Tx/Rx clock rate
+ * (baud rate) as follows:
+ * DIV_VAL = UBRDIVn + (num of 1’s in UDIVSLOTn) / 16
+ * Using UDIVSLOT, which is the factor of floating point divisor, you can make
+ * more accurate baud rate. Section 2.1.10 of the S3C2416 User's Manual 
suggests
+ * using the constants on the following table.
+ */
+static const int udivslot[] = {
+   0x, 0x0080, 0x0808, 0x0888, 0x, 0x4924, 0x4A52, 0x54AA,
+   0x, 0xD555, 0xD5D5, 0xDDD5, 0x, 0xDFDD, 0xDFDF, 0xFFDF,
+};
+
 void _serial_setbrg(const int dev_index)
 {
struct s3c24x0_uart *uart = s3c24x0_get_base_uart(dev_index);
-   unsigned int reg = 0;
+   u32 pclk;
+   u32 baudrate;
int i;
 
-   /* value is calculated so : (int)(PCLK/16./baudrate) -1 */
-   reg = get_PCLK() / (16 * gd-baudrate) - 1;
+   pclk = get_PCLK();
+   baudrate = gd-baudrate;
 
-   writel(reg, uart-ubrdiv);
+   writel((pclk / baudrate / 16) - 1, uart-ubrdiv);
+   writel(udivslot[(pclk / baudrate) % 16], uart-udivslot);
for (i = 0; i  100; i++)
/* Delay */ ;
 }
-- 
1.7.9.5

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[U-Boot] [PATCH v2 08/11] rtc: Don't allow setting unsuported years on s3c24x0_rtc

2012-09-14 Thread José Miguel Gonçalves
This RTC only supports a 100 years range so rtc_set() should not allow setting
years bellow 1970 or above 2069.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch
---
 drivers/rtc/s3c24x0_rtc.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/rtc/s3c24x0_rtc.c b/drivers/rtc/s3c24x0_rtc.c
index 54bf6e3..f96cb11 100644
--- a/drivers/rtc/s3c24x0_rtc.c
+++ b/drivers/rtc/s3c24x0_rtc.c
@@ -139,6 +139,11 @@ int rtc_set(struct rtc_time *tmp)
   tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
   tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
 #endif
+   if (tmp-tm_year  1970 || tmp-tm_year  2069) {
+   puts(ERROR: year should be between 1970 and 2069!\n);
+   return -1;
+   }
+
year = bin2bcd(tmp-tm_year % 100);
mon  = bin2bcd(tmp-tm_mon);
wday = bin2bcd(tmp-tm_wday);
-- 
1.7.9.5

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[U-Boot] [PATCH v2 03/11] serial: Add support to 4 ports in serial_s3c24x0

2012-09-14 Thread José Miguel Gonçalves
S3C2416 and S3C2450 have 4 UARTs insted of 3 found on older chips.
This patch adds support to the additional UART port and changes the
mapping between CONFIG_SERIAL? and S3C24X0_UART? in order they have
a direct correspondence.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - New patch
---
 drivers/serial/serial_s3c24x0.c |   25 ++---
 include/configs/VCMA9.h |2 +-
 include/configs/smdk2410.h  |2 +-
 3 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/drivers/serial/serial_s3c24x0.c b/drivers/serial/serial_s3c24x0.c
index 12bcdd3..280cd2d 100644
--- a/drivers/serial/serial_s3c24x0.c
+++ b/drivers/serial/serial_s3c24x0.c
@@ -2,6 +2,9 @@
  * (C) Copyright 2002
  * Gary Jennejohn, DENX Software Engineering, ga...@denx.de
  *
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
@@ -24,17 +27,20 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifdef CONFIG_SERIAL1
+#if defined(CONFIG_SERIAL0)
 #define UART_NRS3C24X0_UART0
 
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
 #define UART_NRS3C24X0_UART1
 
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
 #define UART_NRS3C24X0_UART2
 
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C24X0_UART3
+
 #else
-#error Bad: you didn't configure serial ...
+#error You didn't configure serial.
 #endif
 
 #include asm/io.h
@@ -310,15 +316,20 @@ INIT_S3C_SERIAL_STRUCTURE(1, s3ser1);
 DECLARE_S3C_SERIAL_FUNCTIONS(2);
 struct serial_device s3c24xx_serial2_device =
 INIT_S3C_SERIAL_STRUCTURE(2, s3ser2);
+DECLARE_S3C_SERIAL_FUNCTIONS(3);
+struct serial_device s3c24xx_serial3_device =
+INIT_S3C_SERIAL_STRUCTURE(3, s3ser3);
 
 __weak struct serial_device *default_serial_console(void)
 {
-#if defined(CONFIG_SERIAL1)
+#if defined(CONFIG_SERIAL0)
return s3c24xx_serial0_device;
-#elif defined(CONFIG_SERIAL2)
+#elif defined(CONFIG_SERIAL1)
return s3c24xx_serial1_device;
-#elif defined(CONFIG_SERIAL3)
+#elif defined(CONFIG_SERIAL2)
return s3c24xx_serial2_device;
+#elif defined(CONFIG_SERIAL3)
+   return s3c24xx_serial3_device;
 #else
 #error CONFIG_SERIAL? missing.
 #endif
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 06adc94..46bc22d 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -120,7 +120,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on VCMA9 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on VCMA9 */
 
 /* USB support (currently only works with D-cache off) */
 #define CONFIG_USB_OHCI
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 1c0978d..5daa3fe 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -60,7 +60,7 @@
  * select serial console configuration
  */
 #define CONFIG_S3C24X0_SERIAL
-#define CONFIG_SERIAL1 1   /* we use SERIAL 1 on SMDK2410 */
+#define CONFIG_SERIAL0 1   /* we use SERIAL 0 on SMDK2410 */
 
 /
  * USB support (currently only works with D-cache off)
-- 
1.7.9.5

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[U-Boot] [PATCH v2 10/11] Add u-boot-ubl.bin target to the Makefile

2012-09-14 Thread José Miguel Gonçalves
Samsung's S3C24XX SoCs need this in order to generate a binary image
with the SPL and U-Boot concatenated.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - None
---
 Makefile |7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 058fb53..595b5f6 100644
--- a/Makefile
+++ b/Makefile
@@ -442,13 +442,14 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
 $(obj)u-boot.dis:  $(obj)u-boot
$(OBJDUMP) -d $  $@
 
-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+$(obj)u-boot-ubl.bin:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary 
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-ubl.bin
+   rm $(obj)spl/u-boot-spl-pad.bin
+
+$(obj)u-boot.ubl:   $(obj)u-boot-ubl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin 
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
-   rm $(obj)spl/u-boot-spl-pad.bin
 
 $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(obj)tools/mkimage -s -n $(if 
$(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),/dev/null) \
-- 
1.7.9.5

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[U-Boot] [PATCH v2 02/11] S3C24XX: Add core support for Samsung's S3C24XX SoCs

2012-09-14 Thread José Miguel Gonçalves
This patch adds the support for Samsung's S3C24XX SoCs that have an ARM926EJS 
core.
Currently it supports S3C2412, S3C2413, S3C2416 and S3C2450.
Tested on an S3C2416 platform.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Added register bit macros to avoid magic numbers
   - Removed volatile attribute from register structs
   - Added s3c24x0_cpu.h to be able to use drivers from s3c24x0 family
   - Fixed EPLL computation in get_PLLCLK for S3C2416
   - Added display of UCLK in print_cpu_info
   - Use of clrsetbits_le32()
   
---
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   52 ++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   57 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  116 +
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  152 ++
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  120 +
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  175 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h |   41 ++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  598 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 include/common.h|1 +
 12 files changed, 1512 insertions(+)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24x0_cpu.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h

diff --git a/arch/arm/cpu/arm926ejs/s3c24xx/Makefile 
b/arch/arm/cpu/arm926ejs/s3c24xx/Makefile
new file mode 100644
index 000..62b8378
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/s3c24xx/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves jose.goncal...@inov.pt
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS-$(CONFIG_DISPLAY_CPUINFO)+= cpu_info.o
+ifeq ($(filter y,$(CONFIG_S3C2412) $(CONFIG_S3C2413)),y)
+COBJS-y+= s3c2412_speed.o
+else
+COBJS-y+= s3c2416_speed.o
+endif
+COBJS-y+= cpu.o
+COBJS-y+= timer.o
+
+SRCS   := $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/arm926ejs/s3c24xx/cpu.c 
b/arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
new file mode 100644
index 000..e16ae73
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307

[U-Boot] [PATCH v2 09/11] S3C24XX: Add NAND Flash driver

2012-09-14 Thread José Miguel Gonçalves
NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of clrsetbits_le32()
   - Use of register bit macros instead of magic numbers
---
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  245 +++
 2 files changed, 246 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 29dc20e..791ec44 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,6 +60,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+COBJS-$(CONFIG_NAND_S3C24XX) += s3c24xx_nand.o
 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c24xx_nand.c b/drivers/mtd/nand/s3c24xx_nand.c
new file mode 100644
index 000..9c0f6e2
--- /dev/null
+++ b/drivers/mtd/nand/s3c24xx_nand.c
@@ -0,0 +1,245 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/mtd/nand/s3c64xx.c and U-Boot 1.3.4 from Samsung.
+ * Supports only SLC NAND Flash chips.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+#include asm/errno.h
+
+#define MAX_CHIPS  2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };
+
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)
+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u_long nfcont;
+
+   nfcont = readl(nand-nfcont);
+
+   switch (chip) {
+   case -1:
+   nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+   break;
+   case 0:
+   nfcont = ~NFCONT_NCE0;
+   break;
+   case 1:
+   nfcont = ~NFCONT_NCE1;
+   break;
+   default:
+   return;
+   }
+
+   writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = nand-nfcmmd;
+   else if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = nand-nfaddr;
+   else
+   this-IO_ADDR_W = nand-nfdata;
+   if (ctrl  NAND_NCE)
+   s3c_nand_select_chip(mtd, *(int *)this-priv);
+   else
+   s3c_nand_select_chip(mtd, -1);
+   }
+
+   if (cmd != NAND_CMD_NONE)
+   writeb(cmd, this-IO_ADDR_W);
+}
+
+/*
+ * Function for checking device ready pin
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+
+   return readl(nand-nfstat)  NFSTAT_RNB;
+}
+
+#ifdef CONFIG_S3C24XX_NAND_HWECC
+/*
+ * This function is called before encoding ECC codes to ready ECC engine.
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+
+   /* Set 1-bit ECC */
+   clrsetbits_le32(nand-nfconf, NFCONF_ECCTYPE_MASK,
+   NFCONF_ECCTYPE_1BIT);
+
+   /* Initialize  unlock ECC */
+   clrsetbits_le32(nand-nfcont, NFCONT_MECCLOCK, NFCONT_INITMECC);
+}
+
+/*
+ * This function is called immediately after encoding ECC codes.
+ * This function returns encoded ECC codes.
+ */
+static int s3c_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+ u_char *ecc_code)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u_long nfmecc0

[U-Boot] [PATCH v2 11/11] S3C24XX: Add support to MINI2416 board

2012-09-14 Thread José Miguel Gonçalves
The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
Changes for v2:
   - Coding style cleanup
   - Use of Use of clrbits_le32(), setbits_le32() and clrsetbits_le32()
   - Use of register bit macros instead of magic numbers
   - Use of serial and rtc drivers implemented for s3c24x0
---
 MAINTAINERS|4 +
 board/boardcon/mini2416/Makefile   |   47 
 board/boardcon/mini2416/config.mk  |4 +
 board/boardcon/mini2416/mini2416.c |   98 
 board/boardcon/mini2416/mini2416_spl.c |  200 
 board/boardcon/mini2416/u-boot-spl.lds |   63 ++
 boards.cfg |1 +
 include/configs/mini2416.h |  200 
 8 files changed, 617 insertions(+)
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 include/configs/mini2416.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 4aabcff..593baa0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -655,6 +655,10 @@ Fabio Estevam fabio.este...@freescale.com
mx53ard i.MX53
mx53smd i.MX53
 
+José Gonçalves jose.goncal...@inov.pt
+
+   mini2416ARM926EJS (S3C2416 SoC)
+
 Daniel Gorsulowski daniel.gorsulow...@esd.eu
 
meesc   ARM926EJS (AT91SAM9263 SoC)
diff --git a/board/boardcon/mini2416/Makefile b/board/boardcon/mini2416/Makefile
new file mode 100644
index 000..bf92ba1
--- /dev/null
+++ b/board/boardcon/mini2416/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves jose.goncal...@inov.pt
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifdef CONFIG_SPL_BUILD
+COBJS  += mini2416_spl.o
+else
+COBJS  += mini2416.o
+endif
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/boardcon/mini2416/config.mk 
b/board/boardcon/mini2416/config.mk
new file mode 100644
index 000..f1230d0
--- /dev/null
+++ b/board/boardcon/mini2416/config.mk
@@ -0,0 +1,4 @@
+PAD_TO := 0x2000
+ifndef CONFIG_SPL_BUILD
+ALL-y += $(obj)u-boot-ubl.bin
+endif
diff --git a/board/boardcon/mini2416/mini2416.c 
b/board/boardcon/mini2416/mini2416.c
new file mode 100644
index 000..e31d2c3
--- /dev/null
+++ b/board/boardcon/mini2416/mini2416.c
@@ -0,0 +1,98 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include netdev.h

Re: [U-Boot] [PATCH v2 09/11] S3C24XX: Add NAND Flash driver

2012-09-14 Thread José Miguel Gonçalves

On 14-09-2012 19:21, Marek Vasut wrote:

Dear José Miguel Gonçalves,


NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt

[...]


+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+#include asm/errno.h
+
+#define MAX_CHIPS  2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };
+
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)

This doesn't seem quite right ...

1) this should be in CPU directory
2) should be enabled only if CONFIG_SPL_SERIAL_SUPPORT is not set
3) should be inline function, not a macro


1) and 3) OK.
Don't quite understand 2). I want to remove the printfs in the SPL build, as it 
would blown up the internal SoC RAM space available.

So why add a condition with CONFIG_SPL_SERIAL_SUPPORT?




+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u_long nfcont;
+
+   nfcont = readl(nand-nfcont);
+
+   switch (chip) {
+   case -1:
+   nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+   break;
+   case 0:
+   nfcont = ~NFCONT_NCE0;
+   break;
+   case 1:
+   nfcont = ~NFCONT_NCE1;
+   break;
+   default:
+   return;
+   }
+
+   writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
ctrl) +{
+   struct s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = nand-nfcmmd;
+   else if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = nand-nfaddr;
+   else
+   this-IO_ADDR_W = nand-nfdata;

Why don't you use local variable here?


Because you need to retain the NAND controller register to use between calls to 
s3c_nand_hwcontrol().
If you call the function without the NAND_CTRL_CHANGE bit set in the parameter 
'ctrl' you must use the register used on the last call on the next access.





+   if (ctrl  NAND_NCE)
+   s3c_nand_select_chip(mtd, *(int *)this-priv);

Uh, how's this *(int *) supposed to work?



*(int *)this-priv contains an integer that is the chip id (0 or 1).

Best regards,
José Gonçalves

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH 3/7] S3C24XX: Add serial driver

2012-09-13 Thread José Miguel Gonçalves

Hi Marek,

On 09/13/2012 10:17 AM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Hi Marek,

On 09/12/2012 10:01 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Serial driver for the S3C24XX SoCs.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---

   drivers/serial/Makefile |1 +
   drivers/serial/s3c24xx_serial.c |  146

+++ 2 files changed, 147
insertions(+)

   create mode 100644 drivers/serial/s3c24xx_serial.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 65d0f23..2cbdaac 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -52,6 +52,7 @@ COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o

   COBJS-$(CONFIG_PXA_SERIAL) += serial_pxa.o
   COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o
   COBJS-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o

+COBJS-$(CONFIG_S3C24XX_SERIAL) += s3c24xx_serial.o

What's the difference between those two drivers ?!

No substantial differences exists. The UART controller block is the same
in all S3C24XX chips. One difference is the number of UARTs. The more
recent chips (S3C2416  S3C2450) have 4 instead of the 3 found on the
old ones. Besides that, the driver that I submitted uses a more precise
method for baudrate generation.

So we will have two drivers for the same hardware? No way ... Use the original
one and apply incremental patches onto it to improve it.


+
+#ifdef CONFIG_SERIAL0
+#define UART_NRS3C24XX_UART0
+
+#elif defined(CONFIG_SERIAL1)
+#define UART_NRS3C24XX_UART1
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C24XX_UART2
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C24XX_UART3
+
+#else
+#error Bad: you didn't configure serial ...

Error itself is Bad: so remove it

OK.


+#endif
+
+#define barrier() asm volatile( ::: memory)

Is that even used ?

Yes. Without it the GCC optimization removes the loop at the end of the
baurate generation routine.

So it's yet another accessor issue.
[...]

But anyway, there's more. I'd like to teach you how to do things properly. So
let's focus on the in-tree driver and fix that one. Incrementally and in small
steps.


OK, I will figure out the best way to do this. If I have any doubts I'll 
be back to you...


Best regards,
José Gonçalves
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[U-Boot] [PATCH 4/7] S3C24XX: Add RTC driver

2012-09-12 Thread José Miguel Gonçalves
RTC driver for the S3C24XX SoCs.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
 drivers/rtc/Makefile  |1 +
 drivers/rtc/s3c24xx_rtc.c |  166 +
 2 files changed, 167 insertions(+)
 create mode 100644 drivers/rtc/s3c24xx_rtc.c

diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 8316e8f..bd8b1eb 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -69,6 +69,7 @@ COBJS-$(CONFIG_RTC_RTC4543) += rtc4543.o
 COBJS-$(CONFIG_RTC_RV3029) += rv3029.o
 COBJS-$(CONFIG_RTC_RX8025) += rx8025.o
 COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
+COBJS-$(CONFIG_RTC_S3C24XX) += s3c24xx_rtc.o
 COBJS-$(CONFIG_RTC_S3C44B0) += s3c44b0_rtc.o
 COBJS-$(CONFIG_RTC_X1205) += x1205.o
 
diff --git a/drivers/rtc/s3c24xx_rtc.c b/drivers/rtc/s3c24xx_rtc.c
new file mode 100644
index 000..3844e44
--- /dev/null
+++ b/drivers/rtc/s3c24xx_rtc.c
@@ -0,0 +1,166 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/rtc/s3c24x0_rtc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+
+#if defined(CONFIG_CMD_DATE)
+
+#include rtc.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+
+static inline void rtc_access_enable(void)
+{
+   s3c24xx_rtc *const rtc = s3c24xx_get_base_rtc();
+   uchar rtccon;
+
+   rtccon = readb(rtc-rtccon);
+   rtccon |= 0x01;
+   writeb(rtccon, rtc-rtccon);
+}
+
+static inline void rtc_access_disable(void)
+{
+   s3c24xx_rtc *const rtc = s3c24xx_get_base_rtc();
+   uchar rtccon;
+
+   rtccon = readb(rtc-rtccon);
+   rtccon = ~0x01;
+   writeb(rtccon, rtc-rtccon);
+}
+
+/* - */
+
+int rtc_get(struct rtc_time *tmp)
+{
+   s3c24xx_rtc *const rtc = s3c24xx_get_base_rtc();
+   uchar sec, min, hour, mday, wday, mon, year;
+   int have_retried = 0;
+
+   rtc_access_enable();
+
+   /* Read RTC registers */
+retry_get_time:
+   min = readb(rtc-bcdmin);
+   hour = readb(rtc-bcdhour);
+   mday = readb(rtc-bcddate);
+   wday = readb(rtc-bcdday);
+   mon = readb(rtc-bcdmon);
+   year = readb(rtc-bcdyear);
+   sec = readb(rtc-bcdsec);
+
+   /* The only way to work out whether the RTC was mid-update
+* when we read it is to check the seconds counter.
+* If it's zero, then we re-try the entire read.
+*/
+   if (rtc-bcdsec == 0  !have_retried) {
+   have_retried = 1;
+   goto retry_get_time;
+   }
+
+   rtc_access_disable();
+
+   debug(Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x 
+ hr: %02x min: %02x sec: %02x\n,
+ year, mon, mday, wday, hour, min, sec);
+
+   tmp-tm_sec = bcd2bin(sec  0x7F);
+   tmp-tm_min = bcd2bin(min  0x7F);
+   tmp-tm_hour = bcd2bin(hour  0x3F);
+   tmp-tm_mday = bcd2bin(mday  0x3F);
+   tmp-tm_wday = bcd2bin(wday  0x07);
+   tmp-tm_mon = bcd2bin(mon  0x1F);
+   tmp-tm_year = bcd2bin(year);
+   if (tmp-tm_year  70)
+   tmp-tm_year += 2000;
+   else
+   tmp-tm_year += 1900;
+   tmp-tm_yday = 0;
+   tmp-tm_isdst = 0;
+
+   debug(Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n,
+ tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
+ tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
+
+   return 0;
+}
+
+int rtc_set(struct rtc_time *tmp)
+{
+   s3c24xx_rtc *const rtc = s3c24xx_get_base_rtc();
+   uchar sec, min, hour, mday, wday, mon, year;
+
+   debug(Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n,
+ tmp-tm_year, tmp-tm_mon, tmp-tm_mday, tmp-tm_wday,
+ tmp-tm_hour, tmp-tm_min, tmp-tm_sec);
+
+   if (tmp-tm_year  1970 || tmp-tm_year  2069) {
+   puts(ERROR: year should be between 1970 and 2069!\n);
+   return -1;
+   }
+
+   year = bin2bcd(tmp-tm_year % 100);
+   mon = bin2bcd(tmp-tm_mon);
+   wday = bin2bcd(tmp-tm_wday);
+   mday = bin2bcd(tmp-tm_mday);
+   hour = bin2bcd(tmp-tm_hour);
+   min = bin2bcd(tmp-tm_min);
+   sec

[U-Boot] [PATCH 6/7] Add u-boot-ubl.bin target to the Makefile

2012-09-12 Thread José Miguel Gonçalves
Samsung's S3C24XX SoCs need this in order to generate a binary image with the 
SPL and U-Boot concatenated.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
 Makefile |7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 058fb53..595b5f6 100644
--- a/Makefile
+++ b/Makefile
@@ -442,13 +442,14 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin
 $(obj)u-boot.dis:  $(obj)u-boot
$(OBJDUMP) -d $  $@
 
-$(obj)u-boot.ubl:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+$(obj)u-boot-ubl.bin:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary 
$(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin  
$(obj)u-boot-ubl.bin
+   rm $(obj)spl/u-boot-spl-pad.bin
+
+$(obj)u-boot.ubl:   $(obj)u-boot-ubl.bin
$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
-e $(CONFIG_SYS_TEXT_BASE) -d $(obj)u-boot-ubl.bin 
$(obj)u-boot.ubl
-   rm $(obj)u-boot-ubl.bin
-   rm $(obj)spl/u-boot-spl-pad.bin
 
 $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
$(obj)tools/mkimage -s -n $(if 
$(CONFIG_AIS_CONFIG_FILE),$(CONFIG_AIS_CONFIG_FILE),/dev/null) \
-- 
1.7.9.5

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[U-Boot] [PATCH 1/7] ARM: fix relocation on ARM926EJS

2012-09-12 Thread José Miguel Gonçalves
Jumping to board_init_r is not performed due to a bug on address computation.
Relocation offsets are not needed when building SPL.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
 arch/arm/cpu/arm926ejs/start.S |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 6f05f1a..2da5342 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -325,7 +325,7 @@ _nand_boot_ofs:
.word nand_boot
 #else
ldr r0, _board_init_r_ofs
-   ldr r1, _TEXT_BASE
+   adr r1, _start
add lr, r0, r1
add lr, lr, r9
/* setup parameters for board_init_r */
@@ -338,12 +338,14 @@ _board_init_r_ofs:
.word board_init_r - _start
 #endif
 
+#ifndef CONFIG_SPL_BUILD
 _rel_dyn_start_ofs:
.word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
.word __rel_dyn_end - _start
 _dynsym_start_ofs:
.word __dynsym_start - _start
+#endif
 
 /*
  *
-- 
1.7.9.5

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[U-Boot] [PATCH 3/7] S3C24XX: Add serial driver

2012-09-12 Thread José Miguel Gonçalves
Serial driver for the S3C24XX SoCs.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
 drivers/serial/Makefile |1 +
 drivers/serial/s3c24xx_serial.c |  146 +++
 2 files changed, 147 insertions(+)
 create mode 100644 drivers/serial/s3c24xx_serial.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 65d0f23..2cbdaac 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -52,6 +52,7 @@ COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
 COBJS-$(CONFIG_PXA_SERIAL) += serial_pxa.o
 COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o
 COBJS-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
+COBJS-$(CONFIG_S3C24XX_SERIAL) += s3c24xx_serial.o
 COBJS-$(CONFIG_S3C44B0_SERIAL) += serial_s3c44b0.o
 COBJS-$(CONFIG_XILINX_UARTLITE) += serial_xuartlite.o
 COBJS-$(CONFIG_SANDBOX_SERIAL) += sandbox.o
diff --git a/drivers/serial/s3c24xx_serial.c b/drivers/serial/s3c24xx_serial.c
new file mode 100644
index 000..11f13a5
--- /dev/null
+++ b/drivers/serial/s3c24xx_serial.c
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/serial/s3c64xx.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/s3c24xx_cpu.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_SERIAL0
+#define UART_NRS3C24XX_UART0
+
+#elif defined(CONFIG_SERIAL1)
+#define UART_NRS3C24XX_UART1
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C24XX_UART2
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C24XX_UART3
+
+#else
+#error Bad: you didn't configure serial ...
+#endif
+
+#define barrier() asm volatile( ::: memory)
+
+/*
+ * The coefficient, used to calculate the baudrate on S3C24XX UARTs is
+ * calculated as C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
+ * however, section 2.1.10 of the S3C2416 User's Manual doesn't recommend
+ * using 1 for 1, 3 for 2, ... (2^n - 1) for n, instead, they suggest using
+ * these constants:
+ */
+static const int udivslot[] = {
+   0x, 0x0080, 0x0808, 0x0888, 0x, 0x4924, 0x4A52, 0x54AA,
+   0x, 0xD555, 0xD5D5, 0xDDD5, 0x, 0xDFDD, 0xDFDF, 0xFFDF,
+};
+
+void serial_setbrg(void)
+{
+   s3c24xx_uart *const uart = s3c24xx_get_base_uart(UART_NR);
+   u32 pclk;
+   u32 baudrate;
+   int i;
+
+   pclk = get_PCLK();
+   baudrate = gd-baudrate;
+
+   uart-ubrdiv = (pclk / baudrate / 16) - 1;
+   uart-udivslot = udivslot[(pclk / baudrate) % 16];
+
+   for (i = 0; i  100; i++)
+   barrier();
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ */
+int serial_init(void)
+{
+   s3c24xx_uart *const uart = s3c24xx_get_base_uart(UART_NR);
+
+   /* FIFO enable, Tx/Rx FIFO clear */
+   uart-ufcon = 0x07;
+   uart-umcon = 0x00;
+   /* Normal mode, No parity, 1 stop bit, 8 data bits */
+   uart-ulcon = 0x03;
+   /* Polling mode */
+   uart-ucon = 0x005;
+
+   serial_setbrg();
+
+   return 0;
+}
+
+/*
+ * Read a single byte from the serial port.
+ */
+int serial_getc(void)
+{
+   s3c24xx_uart *const uart = s3c24xx_get_base_uart(UART_NR);
+
+   /* Wait for character to arrive */
+   while (!(uart-utrstat  0x1)) ;
+
+   return uart-urxh  0xff;
+}
+
+/*
+ * Output a single byte to the serial port.
+ */
+void serial_putc(const char c)
+{
+   s3c24xx_uart *const uart = s3c24xx_get_base_uart(UART_NR);
+
+   /* Wait for room in the TX FIFO */
+   while (!(uart-utrstat  0x2)) ;
+
+   uart-utxh = c;
+
+   /* If \n, also do \r */
+   if (c == '\n')
+   serial_putc('\r');
+}
+
+/*
+ * Test whether a character is in the RX buffer.
+ */
+int serial_tstc(void)
+{
+   s3c24xx_uart *const uart = s3c24xx_get_base_uart(UART_NR);
+
+   return uart-utrstat  0x1;
+}
+
+/*
+ * Output a string to the serial port.
+ */
+void serial_puts(const char *s)
+{
+   while (*s)
+   serial_putc(*s++);
+}
-- 
1.7.9.5

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[U-Boot] [PATCH 5/7] S3C24XX: Add NAND Flash driver

2012-09-12 Thread José Miguel Gonçalves
NAND Flash driver with HW ECC for the S3C24XX SoCs.
Currently it only supports SLC NAND chips.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  269 +++
 2 files changed, 270 insertions(+)
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c

diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 29dc20e..791ec44 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -60,6 +60,7 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
+COBJS-$(CONFIG_NAND_S3C24XX) += s3c24xx_nand.o
 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c24xx_nand.c b/drivers/mtd/nand/s3c24xx_nand.c
new file mode 100644
index 000..eed72d5
--- /dev/null
+++ b/drivers/mtd/nand/s3c24xx_nand.c
@@ -0,0 +1,269 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * Based on drivers/mtd/nand/s3c64xx.c and U-Boot 1.3.4 from Samsung.
+ * Supports only SLC NAND Flash chips.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+#include asm/errno.h
+
+#define NFCONT_ECC_ENC (118)
+#define NFCONT_WP  (116)
+#define NFCONT_MECCLOCK(17)
+#define NFCONT_SECCLOCK(16)
+#define NFCONT_INITMECC(15)
+#define NFCONT_INITSECC(14)
+#define NFCONT_NCE1(12)
+#define NFCONT_NCE0(11)
+#define NFCONT_ENABLE  (10)
+
+#define NFSTAT_RNB (10)
+
+#define MAX_CHIPS  2
+static int nand_cs[MAX_CHIPS] = { 0, 1 };
+
+#ifdef CONFIG_SPL_BUILD
+#define printf(arg...) do {} while (0)
+#endif
+
+static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
+{
+   s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u_long nfcont;
+
+   nfcont = readl(nand-nfcont);
+
+   switch (chip) {
+   case -1:
+   nfcont |= NFCONT_NCE1 | NFCONT_NCE0;
+   break;
+   case 0:
+   nfcont = ~NFCONT_NCE0;
+   break;
+   case 1:
+   nfcont = ~NFCONT_NCE1;
+   break;
+   default:
+   return;
+   }
+
+   writel(nfcont, nand-nfcont);
+}
+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+{
+   s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = (void __iomem *)nand-nfcmmd;
+   else if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = (void __iomem *)nand-nfaddr;
+   else
+   this-IO_ADDR_W = (void __iomem *)nand-nfdata;
+   if (ctrl  NAND_NCE)
+   s3c_nand_select_chip(mtd, *(int *)this-priv);
+   else
+   s3c_nand_select_chip(mtd, -1);
+   }
+
+   if (cmd != NAND_CMD_NONE)
+   writeb(cmd, this-IO_ADDR_W);
+}
+
+/*
+ * Function for checking device ready pin
+ */
+static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
+{
+   s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+
+   return readl(nand-nfstat)  NFSTAT_RNB;
+}
+
+#ifdef CONFIG_S3C24XX_NAND_HWECC
+/*
+ * This function is called before encoding ECC codes to ready ECC engine.
+ */
+static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+   s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   u_long nfcont, nfconf;
+
+   /* Set 1-bit ECC */
+   nfconf = readl(nand-nfconf);
+#if defined(CONFIG_S3C2412) || defined(CONFIG_S3C2413)
+   nfconf = ~(0x1  24);
+#else
+   nfconf = ~(0x3  23);
+#endif
+   writel(nfconf, nand-nfconf);
+
+   /* Initialize  unlock ECC */
+   nfcont = readl(nand-nfcont);
+   nfcont |= NFCONT_INITMECC

[U-Boot] [PATCH 7/7] S3C24XX: Add support to MINI2416 board

2012-09-12 Thread José Miguel Gonçalves
The MINI2416 board is based on a Samsung's S3C2416 SoC and has 64MB DDR2 SDRAM,
256MB NAND Flash, a LAN9220 Ethernet Controller and a WM8731 Audio CODEC.
This U-Boot port was implemented and tested on a unit bought to Boardcon
(http://www.armdesigner.com/) but there are some other chinese providers
that can supply it with a selectable NAND chip from 128MB to 1GB.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
 MAINTAINERS|4 +
 board/boardcon/mini2416/Makefile   |   47 +++
 board/boardcon/mini2416/config.mk  |4 +
 board/boardcon/mini2416/mini2416.c |  100 +++
 board/boardcon/mini2416/mini2416_spl.c |  213 
 board/boardcon/mini2416/u-boot-spl.lds |   63 ++
 boards.cfg |1 +
 include/configs/mini2416.h |  200 ++
 8 files changed, 632 insertions(+)
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 include/configs/mini2416.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 4aabcff..593baa0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -655,6 +655,10 @@ Fabio Estevam fabio.este...@freescale.com
mx53ard i.MX53
mx53smd i.MX53
 
+José Gonçalves jose.goncal...@inov.pt
+
+   mini2416ARM926EJS (S3C2416 SoC)
+
 Daniel Gorsulowski daniel.gorsulow...@esd.eu
 
meesc   ARM926EJS (AT91SAM9263 SoC)
diff --git a/board/boardcon/mini2416/Makefile b/board/boardcon/mini2416/Makefile
new file mode 100644
index 000..bf92ba1
--- /dev/null
+++ b/board/boardcon/mini2416/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves jose.goncal...@inov.pt
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifdef CONFIG_SPL_BUILD
+COBJS  += mini2416_spl.o
+else
+COBJS  += mini2416.o
+endif
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/boardcon/mini2416/config.mk 
b/board/boardcon/mini2416/config.mk
new file mode 100644
index 000..f1230d0
--- /dev/null
+++ b/board/boardcon/mini2416/config.mk
@@ -0,0 +1,4 @@
+PAD_TO := 0x2000
+ifndef CONFIG_SPL_BUILD
+ALL-y += $(obj)u-boot-ubl.bin
+endif
diff --git a/board/boardcon/mini2416/mini2416.c 
b/board/boardcon/mini2416/mini2416.c
new file mode 100644
index 000..f4ed34d
--- /dev/null
+++ b/board/boardcon/mini2416/mini2416.c
@@ -0,0 +1,100 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include netdev.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void ether_if_init(void)
+{
+   /* Ethernet chip is on memory bank 1 */
+   s3c24xx_smc *const smc = s3c24xx_get_base_smc(S3C24XX_SMC1

[U-Boot] [PATCH 0/7] Add support to MINI2416 board

2012-09-12 Thread José Miguel Gonçalves
Support for the MINI2416 board based on a Samsung's S3C2416 SoC with
64MB DDR2 SDRAM, 256MB NAND Flash, a LAN9220 Ethernet Controller and a
WM8731 Audio CODEC.

José Miguel Gonçalves (7):
  ARM: fix relocation on ARM926EJS
  S3C24XX: Add core support for Samsung's S3C24XX SoCs
  S3C24XX: Add serial driver
  S3C24XX: Add RTC driver
  S3C24XX: Add NAND Flash driver
  Add u-boot-ubl.bin target to the Makefile
  S3C24XX: Add support to MINI2416 board

 MAINTAINERS |4 +
 Makefile|7 +-
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   52 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  113 +
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  159 +++
 arch/arm/cpu/arm926ejs/start.S  |4 +-
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  120 ++
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  149 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  503 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 board/boardcon/mini2416/Makefile|   47 +++
 board/boardcon/mini2416/config.mk   |4 +
 board/boardcon/mini2416/mini2416.c  |  100 +
 board/boardcon/mini2416/mini2416_spl.c  |  213 ++
 board/boardcon/mini2416/u-boot-spl.lds  |   63 +++
 boards.cfg  |1 +
 drivers/mtd/nand/Makefile   |1 +
 drivers/mtd/nand/s3c24xx_nand.c |  269 
 drivers/rtc/Makefile|1 +
 drivers/rtc/s3c24xx_rtc.c   |  166 
 drivers/serial/Makefile |1 +
 drivers/serial/s3c24xx_serial.c |  146 +++
 include/common.h|1 +
 include/configs/mini2416.h  |  200 +
 27 files changed, 2576 insertions(+), 4 deletions(-)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h
 create mode 100644 board/boardcon/mini2416/Makefile
 create mode 100644 board/boardcon/mini2416/config.mk
 create mode 100644 board/boardcon/mini2416/mini2416.c
 create mode 100644 board/boardcon/mini2416/mini2416_spl.c
 create mode 100644 board/boardcon/mini2416/u-boot-spl.lds
 create mode 100644 drivers/mtd/nand/s3c24xx_nand.c
 create mode 100644 drivers/rtc/s3c24xx_rtc.c
 create mode 100644 drivers/serial/s3c24xx_serial.c
 create mode 100644 include/configs/mini2416.h

-- 
1.7.9.5

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[U-Boot] [PATCH 2/7] S3C24XX: Add core support for Samsung's S3C24XX SoCs

2012-09-12 Thread José Miguel Gonçalves
This patch adds the support for Samsung's S3C24XX SoCs that have an ARM926EJS 
core.
Currently it supports S3C2412, S3C2413, S3C2416 and S3C2450.
Tested on an S3C2416 platform.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
 arch/arm/cpu/arm926ejs/s3c24xx/Makefile |   52 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c|   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c   |   56 +++
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c  |  114 +
 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c  |  113 +
 arch/arm/cpu/arm926ejs/s3c24xx/timer.c  |  159 +++
 arch/arm/include/asm/arch-s3c24xx/s3c2412.h |  120 ++
 arch/arm/include/asm/arch-s3c24xx/s3c2416.h |  149 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h |  503 +++
 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h |   30 ++
 include/common.h|1 +
 11 files changed, 1353 insertions(+)
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/Makefile
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/cpu_info.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2412_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/s3c2416_speed.c
 create mode 100644 arch/arm/cpu/arm926ejs/s3c24xx/timer.c
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2412.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c2416.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx.h
 create mode 100644 arch/arm/include/asm/arch-s3c24xx/s3c24xx_cpu.h

diff --git a/arch/arm/cpu/arm926ejs/s3c24xx/Makefile 
b/arch/arm/cpu/arm926ejs/s3c24xx/Makefile
new file mode 100644
index 000..62b8378
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/s3c24xx/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2012 INOV - INESC Inovacao
+# Jose Goncalves jose.goncal...@inov.pt
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS-$(CONFIG_DISPLAY_CPUINFO)+= cpu_info.o
+ifeq ($(filter y,$(CONFIG_S3C2412) $(CONFIG_S3C2413)),y)
+COBJS-y+= s3c2412_speed.o
+else
+COBJS-y+= s3c2416_speed.o
+endif
+COBJS-y+= cpu.o
+COBJS-y+= timer.o
+
+SRCS   := $(COBJS-y:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS-y))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/arm926ejs/s3c24xx/cpu.c 
b/arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
new file mode 100644
index 000..326748c
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/s3c24xx/cpu.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2012 INOV - INESC Inovacao
+ * Jose Goncalves jose.goncal...@inov.pt
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/s3c24xx_cpu.h
+
+void enable_caches(void)
+{
+#ifndef CONFIG_SYS_ICACHE_OFF
+   icache_enable();
+#endif
+#ifndef CONFIG_SYS_DCACHE_OFF
+   dcache_enable();
+#endif
+}
+
+/*
+ * Reset the cpu by setting up the watchdog timer and let him time out.
+ */
+void reset_cpu(ulong addr)
+{
+   s3c24xx_watchdog *const watchdog = s3c24xx_get_base_watchdog();
+
+   /* Disable

Re: [U-Boot] [PATCH 5/7] S3C24XX: Add NAND Flash driver

2012-09-12 Thread José Miguel Gonçalves

Hi Marek,

On 09/12/2012 10:11 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
ctrl) +{
+   s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = (void __iomem *)nand-nfcmmd;
+   else if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = (void __iomem *)nand-nfaddr;
+   else
+   this-IO_ADDR_W = (void __iomem *)nand-nfdata;

Do you need this cast ?


Without it gcc gives me a warning:

s3c24xx_nand.c:90:20: warning: assignment discards `volatile' qualifier 
from pointer target type [enabled by default]



+/*
+ * Board-specific NAND initialization.
+ */
+int board_nand_init(struct nand_chip *nand)
+{
+   static int chip_n = 0;
+   s3c24xx_nand *const nand_reg = s3c24xx_get_base_nand();
+   u_long nfconf, nfcont;
+
+   if (chip_n == 0) {
+   /* Extend NAND timings to the maximum */
+   nfconf = readl(nand_reg-nfconf);
+   nfconf |= 0x7770;
Magic


+   writel(nfconf, nand_reg-nfconf);
+
+   /* Disable chip selects and soft lock, enable controller */
+   nfcont = readl(nand_reg-nfcont);
+   nfcont = ~NFCONT_WP;
+   nfcont |= NFCONT_NCE1 | NFCONT_NCE0 | NFCONT_ENABLE;
+   writel(nfcont, nand_reg-nfcont);

use clrsetbits_le32()


I will do that and also define some macros for the magic values.

Regards,
José Gonçalves
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Re: [U-Boot] [PATCH 4/7] S3C24XX: Add RTC driver

2012-09-12 Thread José Miguel Gonçalves

Hi Marek,

On 09/12/2012 10:03 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


+static inline void rtc_access_disable(void)
+{
+   s3c24xx_rtc *const rtc = s3c24xx_get_base_rtc();
+   uchar rtccon;
+
+   rtccon = readb(rtc-rtccon);
+   rtccon = ~0x01;

Magic numbers, fix globally in the patchset


OK.


+   writeb(rtccon, rtc-rtccon);
+}
+
+/*
-
*/ +
+int rtc_get(struct rtc_time *tmp)
+{
+   s3c24xx_rtc *const rtc = s3c24xx_get_base_rtc();
+   uchar sec, min, hour, mday, wday, mon, year;
+   int have_retried = 0;
+
+   rtc_access_enable();
+
+   /* Read RTC registers */
+retry_get_time:
+   min = readb(rtc-bcdmin);
+   hour = readb(rtc-bcdhour);
+   mday = readb(rtc-bcddate);
+   wday = readb(rtc-bcdday);
+   mon = readb(rtc-bcdmon);
+   year = readb(rtc-bcdyear);
+   sec = readb(rtc-bcdsec);
+
+   /* The only way to work out whether the RTC was mid-update
+* when we read it is to check the seconds counter.
+* If it's zero, then we re-try the entire read.
+*/

Wrong multiline comment style ... use ./tools/checkpatch.pl before resending


OK.




+   if (rtc-bcdsec == 0  !have_retried) {

I'm sure you can avoid the goto here ...besides, this rtc-bcdsec doesn't make
much sense


I could do it with a do..while loop instead... this part was copied from 
the linux driver.

And there is a bug... instead of 'rtc-bcdsec' it should be 'sec'!


Regards,
José Gonçalves
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Re: [U-Boot] [PATCH 5/7] S3C24XX: Add NAND Flash driver

2012-09-12 Thread José Miguel Gonçalves

On 09/13/2012 12:45 AM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Hi Marek,

On 09/12/2012 10:11 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned
int ctrl) +{
+   s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+   struct nand_chip *this = mtd-priv;
+
+   if (ctrl  NAND_CTRL_CHANGE) {
+   if (ctrl  NAND_CLE)
+   this-IO_ADDR_W = (void __iomem *)nand-nfcmmd;
+   else if (ctrl  NAND_ALE)
+   this-IO_ADDR_W = (void __iomem *)nand-nfaddr;
+   else
+   this-IO_ADDR_W = (void __iomem *)nand-nfdata;

Do you need this cast ?

Without it gcc gives me a warning:

s3c24xx_nand.c:90:20: warning: assignment discards `volatile' qualifier
from pointer target type [enabled by default]

Not that you need to do the assignment into the structure  use local
variable, no ?


Understood. I agree, it makes more sense to use a local variable to 
address the proper NAND controller register.

I will update that.

Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH 5/7] S3C24XX: Add NAND Flash driver

2012-09-12 Thread José Miguel Gonçalves

Hi Scott,

On 09/13/2012 12:20 AM, Scott Wood wrote:

On 09/12/2012 06:16 PM, José Miguel Gonçalves wrote:

Hi Marek,

On 09/12/2012 10:11 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int
ctrl) +{
+s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+struct nand_chip *this = mtd-priv;
+
+if (ctrl  NAND_CTRL_CHANGE) {
+if (ctrl  NAND_CLE)
+this-IO_ADDR_W = (void __iomem *)nand-nfcmmd;
+else if (ctrl  NAND_ALE)
+this-IO_ADDR_W = (void __iomem *)nand-nfaddr;
+else
+this-IO_ADDR_W = (void __iomem *)nand-nfdata;

Do you need this cast ?

Without it gcc gives me a warning:

s3c24xx_nand.c:90:20: warning: assignment discards `volatile' qualifier
from pointer target type [enabled by default]

Why do you have volatile in your s3c24xx_nand struct?



I use that as a rule to memory mapping of hardware registers.
Without it GCC optimization sometimes do bad things, like completely 
removing sequences of code.
For instance, if you need to pause in a loop until some bit of a 
register is changed (as it's done in the serial driver) and the struct 
were this register is mapped don't have the volatile attribute, the GCC 
optimizer removes the loop.


Regards,
José Gonçalves

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Re: [U-Boot] [PATCH 5/7] S3C24XX: Add NAND Flash driver

2012-09-12 Thread José Miguel Gonçalves

On 09/13/2012 01:24 AM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Hi Scott,

On 09/13/2012 12:20 AM, Scott Wood wrote:

On 09/12/2012 06:16 PM, José Miguel Gonçalves wrote:

Hi Marek,

On 09/12/2012 10:11 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


+
+/*
+ * Hardware specific access to control-lines function
+ */
+static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd,
unsigned int
ctrl) +{
+s3c24xx_nand *const nand = s3c24xx_get_base_nand();
+struct nand_chip *this = mtd-priv;
+
+if (ctrl  NAND_CTRL_CHANGE) {
+if (ctrl  NAND_CLE)
+this-IO_ADDR_W = (void __iomem *)nand-nfcmmd;
+else if (ctrl  NAND_ALE)
+this-IO_ADDR_W = (void __iomem *)nand-nfaddr;
+else
+this-IO_ADDR_W = (void __iomem *)nand-nfdata;

Do you need this cast ?

Without it gcc gives me a warning:

s3c24xx_nand.c:90:20: warning: assignment discards `volatile' qualifier
from pointer target type [enabled by default]

Why do you have volatile in your s3c24xx_nand struct?

I use that as a rule to memory mapping of hardware registers.
Without it GCC optimization sometimes do bad things, like completely
removing sequences of code.

Not true unless your gcc is broken. Use proper accessors (readl()/writel()),
they have proper barriers already.


For instance, if you need to pause in a loop until some bit of a
register is changed (as it's done in the serial driver) and the struct
were this register is mapped don't have the volatile attribute, the GCC
optimizer removes the loop.

Yes, see above.



When I was debugging U-Boot on the MIN2416 I saw this over-optimization 
situation in the serial driver so I added the volatile attribute to all 
structs that map the SoC registers. But, after you pointed to me that 
the I/O macros have already incorporated the proper barriers, I looked 
again to the serial driver source and noticed that I forgot to use that 
macros on register accesses! I will change this and test it tomorrow 
before resubmitting the patch.


Best regards,
José Gonçalves
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Re: [U-Boot] [PATCH 3/7] S3C24XX: Add serial driver

2012-09-12 Thread José Miguel Gonçalves

Hi Marek,

On 09/12/2012 10:01 PM, Marek Vasut wrote:

Dear José Miguel Gonçalves,


Serial driver for the S3C24XX SoCs.

Signed-off-by: José Miguel Gonçalves jose.goncal...@inov.pt
---
  drivers/serial/Makefile |1 +
  drivers/serial/s3c24xx_serial.c |  146
+++ 2 files changed, 147 insertions(+)
  create mode 100644 drivers/serial/s3c24xx_serial.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 65d0f23..2cbdaac 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -52,6 +52,7 @@ COBJS-$(CONFIG_PL011_SERIAL) += serial_pl01x.o
  COBJS-$(CONFIG_PXA_SERIAL) += serial_pxa.o
  COBJS-$(CONFIG_SA1100_SERIAL) += serial_sa1100.o
  COBJS-$(CONFIG_S3C24X0_SERIAL) += serial_s3c24x0.o
+COBJS-$(CONFIG_S3C24XX_SERIAL) += s3c24xx_serial.o

What's the difference between those two drivers ?!


No substantial differences exists. The UART controller block is the same 
in all S3C24XX chips. One difference is the number of UARTs. The more 
recent chips (S3C2416  S3C2450) have 4 instead of the 3 found on the 
old ones. Besides that, the driver that I submitted uses a more precise 
method for baudrate generation.



+
+#ifdef CONFIG_SERIAL0
+#define UART_NRS3C24XX_UART0
+
+#elif defined(CONFIG_SERIAL1)
+#define UART_NRS3C24XX_UART1
+
+#elif defined(CONFIG_SERIAL2)
+#define UART_NRS3C24XX_UART2
+
+#elif defined(CONFIG_SERIAL3)
+#define UART_NRS3C24XX_UART3
+
+#else
+#error Bad: you didn't configure serial ...

Error itself is Bad: so remove it


OK.




+#endif
+
+#define barrier() asm volatile( ::: memory)

Is that even used ?


Yes. Without it the GCC optimization removes the loop at the end of the 
baurate generation routine.



+/*
+ * The coefficient, used to calculate the baudrate on S3C24XX UARTs is
+ * calculated as C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
+ * however, section 2.1.10 of the S3C2416 User's Manual doesn't recommend
+ * using 1 for 1, 3 for 2, ... (2^n - 1) for n, instead, they suggest
using + * these constants:
+ */
+static const int udivslot[] = {

const int const ... const array const members


It don't see the need for that because you have a constant array when 
their members are constant and;


static const int udivslot[];
static int const udivslot[];

are both (correct) forms to declare an array of constant integers.


+   0x, 0x0080, 0x0808, 0x0888, 0x, 0x4924, 0x4A52, 0x54AA,
+   0x, 0xD555, 0xD5D5, 0xDDD5, 0x, 0xDFDD, 0xDFDF, 0xFFDF,
+};
+
+void serial_setbrg(void)
+{
+   s3c24xx_uart *const uart = s3c24xx_get_base_uart(UART_NR);
+   u32 pclk;
+   u32 baudrate;
+   int i;
+
+   pclk = get_PCLK();
+   baudrate = gd-baudrate;
+
+   uart-ubrdiv = (pclk / baudrate / 16) - 1;
+   uart-udivslot = udivslot[(pclk / baudrate) % 16];
+
+   for (i = 0; i  100; i++)
+   barrier();
+}
+
+/*
+ * Initialise the serial port with the given baudrate. The settings
+ * are always 8 data bits, no parity, 1 stop bit, no start bits.
+ */
+int serial_init(void)
+{
+   s3c24xx_uart *const uart = s3c24xx_get_base_uart(UART_NR);
+
+   /* FIFO enable, Tx/Rx FIFO clear */
+   uart-ufcon = 0x07;
+   uart-umcon = 0x00;

Magic numbers, fix


OK.


Can you implement it as a serial multi (CONFIG_SERIAL_MULTI) right away ?
thanks.



I will look at that option and change the driver to support it.

Best regards,
José Gonçalves
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[U-Boot] Memtest end address

2012-08-31 Thread José Miguel Gonçalves

Hi,

The end address for memtest set with CONFIG_SYS_MEMTEST_END is supposed to be 
included or not in the test?


Checking on the source code I see that the quick implementation does not include 
it, but the more extensive implementation enabled with CONFIG_SYS_ALT_MEMTEST does 
include the end address. Both implementation should be synced to test (or not) the 
memory position at CONFIG_SYS_MEMTEST_END.


Best regards,
José Gonçalves
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