[U-Boot] [PATCH] JFFS2: bug fix for summary support.
This patch fixes some issues with JFFS2 summary support in U-Boot. 1/ Bug fix for summary support: we need to get the latest DIRENT. 2/ Avoid allocate too big memory if the biggest file in JFFS2 is too long. We only allocate one node size for pL-readbuf. 3/ Free memory space if we fail to scan the JFFS2. Signed-off-by: Leo Liu liucai@gmail.com --- fs/jffs2/jffs2_1pass.c | 53 +- fs/jffs2/jffs2_nand_1pass.c | 24 ++- include/jffs2/jffs2.h | 11 + 3 files changed, 60 insertions(+), 28 deletions(-) diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index c4f7445..dfb1745 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -662,7 +662,8 @@ jffs2_free_cache(struct part_info *part) pL = (struct b_lists *)part-jffs2_priv; free_nodes(pL-frag); free_nodes(pL-dir); - free(pL-readbuf); + if(pL-readbuf) + free(pL-readbuf); free(pL); } } @@ -676,14 +677,19 @@ jffs_init_1pass_list(struct part_info *part) if (NULL != (part-jffs2_priv = malloc(sizeof(struct b_lists { pL = (struct b_lists *)part-jffs2_priv; - memset(pL, 0, sizeof(*pL)); + + pL-readbuf = malloc(sizeof(union jffs2_node_union)); + if(!pL-readbuf) { + printf(jffs_init_1pass_list: malloc failed\n); + return 0; + } #ifdef CONFIG_SYS_JFFS2_SORT_FRAGMENTS pL-dir.listCompare = compare_dirents; pL-frag.listCompare = compare_inodes; #endif } - return 0; + return 1; } /* find the inode from the slashless name given a parent */ @@ -748,8 +754,8 @@ jffs2_1pass_read_inode(struct b_lists *pL, u32 inode, char *dest) if(dest) { src = ((uchar *) jNode) + sizeof(struct jffs2_raw_inode); - /* ignore data behind latest known EOF */ - if (jNode-offset totalSize) { + /* ignore data which exceed file length */ + if (jNode-offset + jNode-dsize totalSize) { put_fl_mem(jNode, pL-readbuf); continue; } @@ -835,10 +841,10 @@ jffs2_1pass_find_inode(struct b_lists * pL, const char *name, u32 pino) for(b = pL-dir.listHead; b; b = b-next, counter++) { jDir = (struct jffs2_raw_dirent *) get_node_mem(b-offset, pL-readbuf); - if ((pino == jDir-pino) (len == jDir-nsize) - (jDir-ino) /* 0 for unlink */ + if ((pino == jDir-pino) + (len == jDir-nsize) (!strncmp((char *)jDir-name, name, len))) {/* a match */ - if (jDir-version version) { + if (jDir-version version) { /*ignore the old DIRENT*/ put_fl_mem(jDir, pL-readbuf); continue; } @@ -963,6 +969,13 @@ jffs2_1pass_list_inodes(struct b_lists * pL, u32 pino) struct jffs2_raw_inode *jNode, *i = NULL; struct b_node *b2 = pL-frag.listHead; + /* + we compare the DIRENT's ino with the latest DIRENT's ino t determine whether this DIRENT + is the latest. If the DIRENT is not the latest,ignore it. + */ + if(jDir-ino != jffs2_1pass_find_inode(pL, jDir-name, pino)) + continue; + while (b2) { jNode = (struct jffs2_raw_inode *) get_fl_mem(b2-offset, sizeof(ojNode), ojNode); @@ -1448,7 +1461,6 @@ jffs2_1pass_build_lists(struct part_info * part) u32 counter4 = 0; u32 counterF = 0; u32 counterN = 0; - u32 max_totlen = 0; u32 buf_size = DEFAULT_EMPTY_SCAN_SIZE; char *buf; @@ -1458,9 +1470,16 @@ jffs2_1pass_build_lists(struct part_info * part) /* lcd_off(); */ /* if we are building a list we need to refresh the cache. */ - jffs_init_1pass_list(part); - pL = (struct b_lists *)part-jffs2_priv; + if(! jffs_init_1pass_list(part)) + return 0; + + pL = (struct b_lists *)part-jffs2_priv; buf = malloc(buf_size); + if (!buf) { + printf(jffs2_1pass_build_lists: malloc failed\n); + return 0; + } + puts (Scanning JFFS2 FS
[U-Boot] [PATCH] JFFS2: accelerate scanning.
This patch make the JFFS2 scanning faster in U-Boot. 1). if we find 1KB 0xFF data from the beginning of the erase block,skip it. 2). if the 1KB data is 0xFF after the cleanmarker, ship this erase block. For the 16MB nor flash, the scanning time is changed from about 9s to 1s. Signed-off-by: Leo Liu liucai@gmail.com --- fs/jffs2/jffs2_1pass.c | 31 +-- fs/jffs2/jffs2_nand_1pass.c |2 +- 2 files changed, 22 insertions(+), 11 deletions(-) diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index dfb1745..f38f755 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -1441,7 +1441,7 @@ dump_dirents(struct b_lists *pL) } #endif -#define DEFAULT_EMPTY_SCAN_SIZE4096 +#define DEFAULT_EMPTY_SCAN_SIZE1024 static inline uint32_t EMPTY_SCAN_SIZE(uint32_t sector_size) { @@ -1461,7 +1461,7 @@ jffs2_1pass_build_lists(struct part_info * part) u32 counter4 = 0; u32 counterF = 0; u32 counterN = 0; - u32 buf_size = DEFAULT_EMPTY_SCAN_SIZE; + u32 buf_size = 128*1024;; char *buf; /* turn off the lcd. Refreshing the lcd adds 50% overhead to the */ @@ -1559,14 +1559,17 @@ jffs2_1pass_build_lists(struct part_info * part) /* We temporarily use 'ofs' as a pointer into the buffer/jeb */ ofs = 0; - /* Scan only 4KiB of 0xFF before declaring it's empty */ + /* Scan only 1KiB of 0xFF before declaring it's empty */ while (ofs EMPTY_SCAN_SIZE(part-sector_size) *(uint32_t *)(buf[ofs]) == 0x) ofs += 4; - if (ofs == EMPTY_SCAN_SIZE(part-sector_size)) + if (ofs == EMPTY_SCAN_SIZE(part-sector_size)) { + printf(Block at 0x%08x is empty (erased)\n, sector_ofs); continue; + } + /* Now ofs is a complete physical flash offset as it always was... */ ofs += sector_ofs; prevofs = ofs - 1; @@ -1594,16 +1597,14 @@ jffs2_1pass_build_lists(struct part_info * part) if (*(uint32_t *)(buf[ofs-buf_ofs]) == 0x) { uint32_t inbuf_ofs; - uint32_t empty_start, scan_end; + uint32_t empty_start; empty_start = ofs; ofs += 4; - scan_end = min_t(uint32_t, EMPTY_SCAN_SIZE( - part-sector_size)/8, - buf_len); + more_empty: inbuf_ofs = ofs - buf_ofs; - while (inbuf_ofs scan_end) { + while (inbuf_ofs buf_len) { if (*(uint32_t *)(buf[inbuf_ofs]) != 0x) goto scan_more; @@ -1613,6 +1614,12 @@ jffs2_1pass_build_lists(struct part_info * part) } /* Ran off end. */ + /* If we're only checking the beginning of a block with a cleanmarker, + bail now */ + if((buf_ofs == sector_ofs) + (node ==(struct jffs2_unknown_node *)buf[ofs-buf_ofs])) + break; + /* See how much more there is to read in this * eraseblock... */ @@ -1627,12 +1634,12 @@ jffs2_1pass_build_lists(struct part_info * part) */ break; } - scan_end = buf_len; get_fl_mem((u32)part-offset + ofs, buf_len, buf); buf_ofs = ofs; goto more_empty; } + if (node-magic != JFFS2_MAGIC_BITMASK || !hdr_crc(node)) { ofs += 4; @@ -1650,6 +1657,8 @@ jffs2_1pass_build_lists(struct part_info * part) case JFFS2_NODETYPE_INODE: if (buf_ofs + buf_len ofs + sizeof(struct jffs2_raw_inode)) { + buf_len = min_t(uint32_t, buf_size, sector_ofs
Re: [U-Boot] [PATCH V4] mpc83xx:fix pcie configuration space read/write
2011/2/6 Kim Phillips kim.phill...@freescale.com: On Wed, 19 Jan 2011 19:50:47 +0800 Leo Liu liucai@gmail.com wrote: This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Leo Liu liucai@gmail.com --- applied after fixing some comment format, and moving: +/*private structure for mpc83xx pcie hose*/ +static struct mpc83xx_pcie_priv { + u8 index; +} pcie_priv[PCIE_MAX_BUSES] = { into a CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES protected area to avoid a compiler warning: 'pcie_priv' defined but not used. Thanks, Kim Thanks so much! ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4] mpc83xx:fix pcie configuration space read/write
Hi: 2011/1/19 Leo Liu liucai@gmail.com: This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Leo Liu liucai@gmail.com --- Changes for V2: - Avoid line wrap in the patch Changes for V3 - Add space between ) and { Changes for V4 - Add and use priv_data pointer in pci_controller to save the mpc83xx pcie private data arch/powerpc/cpu/mpc83xx/pcie.c | 20 +++- include/pci.h | 2 ++ 2 files changed, 21 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 46a706d..ee94a8b 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -30,6 +30,21 @@ DECLARE_GLOBAL_DATA_PTR; #define PCIE_MAX_BUSES 2 +/*private structure for mpc83xx pcie hose*/ +static struct mpc83xx_pcie_priv { + u8 index; +} pcie_priv[PCIE_MAX_BUSES] = { + { + /*pcie controller 1*/ + .index = 0, + }, + { + /*pcie controller 2*/ + .index = 1, + }, +}; + + static struct { u32 base; u32 size; @@ -52,7 +67,8 @@ static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev) { int bus = PCI_BUS(dev) - hose-first_busno; immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; - pex83xx_t *pex = immr-pciexp[bus]; + struct mpc83xx_pcie_priv *pcie_priv = hose-priv_data; + pex83xx_t *pex = immr-pciexp[pcie_priv-index]; struct pex_outbound_window *out_win = pex-bridge.pex_outbound_win[0]; u8 devfn = PCI_DEV(dev) 3 | PCI_FUNC(dev); u32 dev_base = bus 24 | devfn 16; @@ -142,6 +158,8 @@ static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg, hose-cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base; + hose-priv_data = pcie_priv[bus]; + pci_set_ops(hose, pcie_read_config_byte, pcie_read_config_word, diff --git a/include/pci.h b/include/pci.h index c456006..8b3bdbb 100644 --- a/include/pci.h +++ b/include/pci.h @@ -420,6 +420,8 @@ struct pci_controller { /* Used by ppc405 autoconfig*/ struct pci_region *pci_fb; int current_busno; + + void *priv_data; }; extern __inline__ void pci_set_ops(struct pci_controller *hose, -- 1.7.3.1.msysgit.0 Will this patch be applied in the next release? This patch is not for performence improvement, it is a critical bug fix. Without this, the mpc83xx pcie can not work correctly. Thanks ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V4] mpc83xx:fix pcie configuration space read/write
This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Leo Liu liucai@gmail.com --- Changes for V2: - Avoid line wrap in the patch Changes for V3 - Add space between ) and { Changes for V4 - Add and use priv_data pointer in pci_controller to save the mpc83xx pcie private data arch/powerpc/cpu/mpc83xx/pcie.c | 20 +++- include/pci.h |2 ++ 2 files changed, 21 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 46a706d..ee94a8b 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -30,6 +30,21 @@ DECLARE_GLOBAL_DATA_PTR; #define PCIE_MAX_BUSES 2 +/*private structure for mpc83xx pcie hose*/ +static struct mpc83xx_pcie_priv { + u8 index; +} pcie_priv[PCIE_MAX_BUSES] = { + { + /*pcie controller 1*/ + .index = 0, + }, + { + /*pcie controller 2*/ + .index = 1, + }, +}; + + static struct { u32 base; u32 size; @@ -52,7 +67,8 @@ static int mpc83xx_pcie_remap_cfg(struct pci_controller *hose, pci_dev_t dev) { int bus = PCI_BUS(dev) - hose-first_busno; immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; - pex83xx_t *pex = immr-pciexp[bus]; + struct mpc83xx_pcie_priv *pcie_priv = hose-priv_data; + pex83xx_t *pex = immr-pciexp[pcie_priv-index]; struct pex_outbound_window *out_win = pex-bridge.pex_outbound_win[0]; u8 devfn = PCI_DEV(dev) 3 | PCI_FUNC(dev); u32 dev_base = bus 24 | devfn 16; @@ -142,6 +158,8 @@ static void mpc83xx_pcie_register_hose(int bus, struct pci_region *reg, hose-cfg_addr = (unsigned int *)mpc83xx_pcie_cfg_space[bus].base; + hose-priv_data = pcie_priv[bus]; + pci_set_ops(hose, pcie_read_config_byte, pcie_read_config_word, diff --git a/include/pci.h b/include/pci.h index c456006..8b3bdbb 100644 --- a/include/pci.h +++ b/include/pci.h @@ -420,6 +420,8 @@ struct pci_controller { /* Used by ppc405 autoconfig*/ struct pci_region *pci_fb; int current_busno; + + void *priv_data; }; extern __inline__ void pci_set_ops(struct pci_controller *hose, -- 1.7.3.1.msysgit.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V4] mpc83xx:fix pcie configuration space read/write
2011/1/19 Leo Liu liucai@gmail.com: This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Baidu Boy liucai@gmail.com --- Ignore this one, the name is not changed ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] bug report: the 8378 can not boot up when we enable the debug log
I test the mpc8378 board when I enable the DEBUG macro in common.h file Log is below: -- U-Boot 2010.12 (Jan 15 2011 - 11:40:03) MPC83XX Reset Status: Software Hard, External/Internal Soft, External/Internal Hard CPU: e300c4, MPC8378E, Rev: 2.1 at 297 MHz, CSB: 198 MHz Board: Freescale MPC837xEMDS I2C: Requested speed:40, i2c_clk:6600 FDR:0x24, div:320, ga:0x4, gb:0x1, a:10, b:32, speed:206250 Tr = 348 ns FDR:0x21, div:192, ga:0x5, gb:0x0, a:12, b:16, speed:343750 Tr = 106 ns divider:165, est_div:192, DFSR:3 FDR:0x21, speed:343750 Requested speed:40, i2c_clk:19800 FDR:0x28, div:640, ga:0x4, gb:0x2, a:10, b:64, speed:309375 Tr = 186 ns FDR:0x27, div:512, ga:0x7, gb:0x1, a:16, b:32, speed:386718 Tr = 25 ns divider:495, est_div:512, DFSR:9 FDR:0x27, speed:386718 ready DRAM: 512 MiB (DDR2, 64-bit, ECC off, 198 MHz) Top of RAM usable for U-Boot at: 2000 Reserving 545k for U-Boot at: 1ff77000 Reserving 520k for malloc() at: 1fef5000 Reserving 68 Bytes for Board Info at: 1fef4fbc Reserving 152 Bytes for Global Data at: 1fef4f24 Stack Pointer at: 1fef4f08 New Stack Pointer is: 1fef4f08 Now running in RAM - U-Boot at: 1ff77000 i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK i2c_wait: No RXACK PCI 32bit bus on PMC1 PMC2 PMC3 FLASH: flash detect cfi fwc addr fe00 cmd f0 f0 8bit x 8 bit fwc addr fe00 cmd ff ff 8bit x 8 bit fwc addr fe55 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr fe10 is= 0 51 fwc addr fe000555 cmd 98 98 8bit x 8 bit is= cmd 51(Q) addr fe10 is= 0 51 fwc addr fe00 cmd f0 f0f0 16bit x 8 bit fwc addr fe00 cmd ff 16bit x 8 bit fwc addr feaa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr fe20 is= 0051 5151 fwc addr fe000aaa cmd 98 9898 16bit x 8 bit is= cmd 51(Q) addr fe20 is= 0051 5151 fwc addr fe00 cmd f0 00f0 16bit x 16 bit fwc addr fe00 cmd ff 00ff 16bit x 16 bit fwc addr feaa cmd 98 0098 16bit x 16 bit is= cmd 51(Q) addr fe20 is= 0051 0051 is= cmd 52(R) addr fe22 is= 0052 0052 is= cmd 59(Y) addr fe24 is= 0059 0059 device interface is 2 found port 2 chip 2 port 16 bits chip 16 bits 00 : 51 52 59 02 00 40 00 00 00 00 00 27 36 00 00 07 QRY..@.'6... 10 : 07 0a 00 03 05 04 00 18 02 00 05 00 01 7f 00 00 20 : 02 00 00 00 00 00 00 00 00 00 00 00 00 fb ce 28 ...( fwc addr fe00 cmd f0 00f0 16bit x 16 bit fwc addr fe000aaa cmd aa 00aa 16bit x 16 bit fwc addr fe000554 cmd 55 0055 16bit x 16 bit fwc addr fe000aaa cmd 90 0090 16bit x 16 bit fwc addr fe00 cmd f0 00f0 16bit x 16 bit fwc addr feaa cmd 98 0098 16bit x 16 bit manufacturer is 2 manufacturer id is 0x1 device id is 0x227e device id2 is 0x0 cfi version is 0x3133 size_ratio 1 port 16 bits chip 16 bits found 1 erase regions erase region 0: 0x027f erase_region_count = 128 erase_region_size = 131072 fwc addr fe00 cmd f0 00f0 16bit x 16 bit flash_protect ON: from 0xFE00 to 0xFE051FFF flash_is_busy: 0 protect on 0 flash_is_busy: 0 protect on 1 flash_is_busy: 0 protect on 2 flash_protect ON: from 0xFE06 to 0xFE07 flash_is_busy: 0 protect on 3 16 MiB NAND: No NAND device found!!! 0 MiB MMC: * Warning - bad CRC, using default environment Destroy Hash Table: 1ffca978 table = (null) Create Hash Table: N=172 INSERT: table 1ffca978, filled 1/173 rv 1fef57b8 == name=bootcmd value=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr Bad trap at PC: 10820010, SR: 1000, vector=200 NIP: 10820010 XER: LR: 10480030 REGS: 0001 TRAP: 200 DAR: 08000200 MSR: 1000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00 GPR00: 00990080 0100 00800040 0100 0082 04000800 20080010 1000 GPR08: 0080 02001100 30E0 4000 004A 8200 2102 GPR16: 00010020 2A00 300C 08000200 002B 1000 00100070 3B005000 GPR24: 0001 0100 2052 4100 001A 4100 0100 4900 Call backtrace: 6000 Exception in kernel pc 10820010 signal 0 Resetting the board. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot