Re: [U-Boot] [PATCH] MAINTAINERS: update ARM Snapdragon
Hi, On 06/10/2018 01:51 PM, Ramon Fried wrote: Replace Mateusz as Maintainer for ARM Snapdragon arch. Signed-off-by: Ramon Fried --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 642c448093..b2c9717cb7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -184,7 +184,7 @@ F: arch/arm/mach-s5pc1xx/ F:arch/arm/cpu/armv7/s5p-common/ ARM SNAPDRAGON -M: Mateusz Kulikowski +M: Ramon Fried S:Maintained F:arch/arm/mach-snapdragon/ Acked-by: Mateusz Kulikowski M. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] MAINTAINERS: board: qcom: db410c: Maintainer changed
On Mon, Sep 11, 2017 at 04:07:02PM +0200, Jorge Ramirez-Ortiz wrote: > Replacing original author Mateusz Kulikowski > as db410c maintainer > > Signed-off-by: Jorge Ramirez-Ortiz Ack. Good luck. You may also want to take maintainership for snapdragon and spmi, as you'll need it for non-trivial updates to board. Thanks, M. > --- > board/qualcomm/dragonboard410c/MAINTAINERS | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/board/qualcomm/dragonboard410c/MAINTAINERS > b/board/qualcomm/dragonboard410c/MAINTAINERS > index 65cb47c..f9ddc9d 100644 > --- a/board/qualcomm/dragonboard410c/MAINTAINERS > +++ b/board/qualcomm/dragonboard410c/MAINTAINERS > @@ -1,5 +1,5 @@ > DRAGONBOARD410C BOARD > -M: Mateusz Kulikowski > +M: Jorge Ramirez-Ortiz > S: Maintained > F: board/qualcomm/dragonboard410c/ > F: include/configs/dragonboard410c.h > -- > 2.7.4 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/5] db410c: updates for grub + gfxterm
Hi Rob, On 25.06.2017 01:05, Rob Clark wrote: > In particular, support for display setup by lk. This introduces a > simplefb display driver that uses the framebuffer fdt node populated > by the firmware[1] for u-boot display support (and, at least for > what I am working on, more interestingly, EFI GOP support). [...] > A few related patches so that on db410c we actually use the fdt > passed by lk (and so that dm/core is clever enough to notice fdt > nodes under "chosen"), config updates, and related fixes. [...] I finally had time to look at patches (this and the earlier series). Enabling the output is pretty cool - I thought of that myself some time ago. Question: Do you have non-standard partition layout? I have flashed most recent 96boards debian image, but my device doesn't have splash partition. (It initializes screen properly, just doesn't display anything) Question2: Are you sure you have included all the patches? I've applied this series (also included patches from 2017-06-20), but u-boot doesn't parse device tree properly and things like usb cease to work - both with your and official lk: U-Boot 2017.07-rc3-00015-ga2592ee (Jul 06 2017 - 13:48:40 +0200) Qualcomm-DragonBoard 410C DRAM: 986 MiB MMC: sdhci@07824000: 0, sdhci@07864000: 1 Using default environment In:serial Out: serial Err: serial Failed to find PMIC pon node. Check device tree Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 On the other hand it works properly with your pre-built binary [1]. I assume the difference may be that you have added proper (instead of fake) device tree into mkbootimg - is that the case? Thanks, Mateusz > > [1] https://github.com/robclark/lk/commits/db410c-display > > Rob Clark (5): > board/db410c: use fdt passed from lk > dm: core: also parse chosen node > video: simplefb > efi_loader: gop: fixes for CONFIG_DM_VIDEO without CONFIG_LCD > configs: db410c: config updates > > arch/arm/Kconfig | 2 +- > board/qualcomm/dragonboard410c/dragonboard410c.c | 16 ++ > cmd/bootefi.c| 2 +- > configs/dragonboard410c_defconfig| 7 +++ > drivers/core/root.c | 22 +++- > drivers/video/Kconfig| 10 > drivers/video/Makefile | 2 +- > drivers/video/simplefb.c | 68 > > lib/efi_loader/Makefile | 1 + > lib/efi_loader/efi_gop.c | 7 ++- > 10 files changed, 132 insertions(+), 5 deletions(-) > create mode 100644 drivers/video/simplefb.c > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] arm: start.S: Fix startup of dragonboard410c
Commit d73718f3 breaks devices where: - There is EL2/EL3 firmware and - U-Boot starts in NS EL1 and - EL2/EL3 firmware didn't unlocked write-access to CPUECTLR_EL1. This patch makes that change opt-out configuration option, and disables it for dragonboard410c. Signed-off-by: Mateusz Kulikowski --- I make it opt-out so nobody will complain that I broke someones board. If you prefer opt-in - just let me know, I'll flip the switch in Kconfig. BTW. I wonder if this register should be written at all on devices that implement ARMv8 but are *not* ARM Cortex. Mateusz arch/arm/cpu/armv8/Kconfig| 13 + arch/arm/cpu/armv8/start.S| 7 +-- configs/dragonboard410c_defconfig | 1 + 3 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig index 3d19bbf..33af0a2 100644 --- a/arch/arm/cpu/armv8/Kconfig +++ b/arch/arm/cpu/armv8/Kconfig @@ -3,4 +3,17 @@ if ARM64 config ARMV8_MULTIENTRY boolean "Enable multiple CPUs to enter into U-Boot" +config ARMV8_SET_SMPEN +boolean "Enable data coherency with other cores in cluster" +default y if ARM64 +help + Cortex A53/57/72 cores require CPUECTLR_EL1.SMPEN set even + for single core systems. Unfortunately write access to this + register may be controlled by EL3/EL2 firmware. To be more + precise, by default (if there is EL2/EL3 firmware running) + this register is RO for NS EL1. + This switch can be used to avoid writing to CPUECTLR_EL1, + it can be safely enabled when El2/EL3 initialized SMPEN bit + or when CPU implementation doesn't include that register. + endif diff --git a/arch/arm/cpu/armv8/start.S b/arch/arm/cpu/armv8/start.S index dfce469..777cad3 100644 --- a/arch/arm/cpu/armv8/start.S +++ b/arch/arm/cpu/armv8/start.S @@ -81,13 +81,16 @@ reset: msr cpacr_el1, x0 /* Enable FP/SIMD */ 0: - /* Enalbe SMPEN bit for coherency. + /* Enable SMPEN bit for coherency. * This register is not architectural but at the moment * this bit should be set for A53/A57/A72. +* */ - mrs x0, S3_1_c15_c2_1 /* cpuactlr_el1 */ +#ifdef CONFIG_ARMV8_SET_SMPEN + mrs x0, S3_1_c15_c2_1 /* cpuectlr_el1 */ orr x0, x0, #0x40 msr S3_1_c15_c2_1, x0 +#endif /* Apply ARM core specific erratas */ bl apply_core_errata diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index ad2e8b8..d3cfa69 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SNAPDRAGON=y +CONFIG_ARMV8_SET_SMPEN=n CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="dragonboard410c => " -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] dragonboard410c: adding missing default addr for script and pxe boot
On 03.07.2016 19:16, Ricardo Salveti wrote: > Cc: Mateusz Kulikowski > Signed-off-by: Ricardo Salveti > --- > include/configs/dragonboard410c.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/configs/dragonboard410c.h > b/include/configs/dragonboard410c.h > index 74a827d..1dbe219 100644 > --- a/include/configs/dragonboard410c.h > +++ b/include/configs/dragonboard410c.h > @@ -126,6 +126,8 @@ REFLASH(dragonboard/u-boot.img, 8)\ > "fdtfile=apq8016-sbc.dtb\0" \ > "fdt_addr_r=0x8300\0"\ > "ramdisk_addr_r=0x8400\0"\ > + "scriptaddr=0x9000\0"\ > + "pxefile_addr_r=0x9010\0"\ > BOOTENV > > #define CONFIG_ENV_IS_NOWHERE > Tested-By & Acked-By: Mateusz Kulikowski Btw: It would be cool to add that to hikey as well. Mateusz ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] dragonboard410c: prefer sdcard boot over emmc
On 03.07.2016 18:59, Ricardo Salveti wrote: > Make the external devices the preferred ones when booting the system > (usb is already the first option). This allows users to easily boot > custom distributions without requiring them to reflash/customize u-boot. > > Cc: Mateusz Kulikowski > Signed-off-by: Ricardo Salveti > --- > include/configs/dragonboard410c.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/configs/dragonboard410c.h > b/include/configs/dragonboard410c.h > index 4b00922..74a827d 100644 > --- a/include/configs/dragonboard410c.h > +++ b/include/configs/dragonboard410c.h > @@ -84,8 +84,8 @@ > > #define BOOT_TARGET_DEVICES(func) \ > func(USB, usb, 0) \ > - func(MMC, mmc, 0) \ > func(MMC, mmc, 1) \ > + func(MMC, mmc, 0) \ > func(DHCP, dhcp, na) > > #include > +1, I don't know why didn't I thought about that. Acked-by: Mateusz Kulikowski ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mmc: msm_sdhci: Set mmc->dev pointer in msm_sdc_probe()
Friendly poke, I would really like to see that in 2016.07 release as MMC is currently not working for dragonboard :( Mateusz On 26.06.2016 22:43, Mateusz Kulikowski wrote: > MMC core expects (now) valid mmc->dev pointer. > During conversion in commit cffe5d86 not every driver was updated. > > This patch fixes crash while accessing MMC on > boards using Qualcomm SDHCI controller. > > Signed-off-by: Mateusz Kulikowski > --- > This patch fixes MMC support on dragonboard. > > Without it attempts to access MMC caused null-pointer derefernece. > > > drivers/mmc/msm_sdhci.c | 7 ++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c > index 64bbf0c..96dcdbe 100644 > --- a/drivers/mmc/msm_sdhci.c > +++ b/drivers/mmc/msm_sdhci.c > @@ -136,7 +136,12 @@ static int msm_sdc_probe(struct udevice *dev) > host->version = sdhci_readw(host, SDHCI_HOST_VERSION); > > /* automatically detect max and min speed */ > - return add_sdhci(host, 0, 0); > + ret = add_sdhci(host, 0, 0); > + if (ret) > + return ret; > + host->mmc->dev = dev; > + > + return 0; > } > > static int msm_sdc_remove(struct udevice *dev) > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] MMC: Do not write to mmc_uclass_priv if it was not allocated
On 29.06.2016 05:27, Simon Glass wrote: > Hi Matt, > > On 25 June 2016 at 14:57, Matt Corallo wrote: >> Signed-off-by: Matt Corallo >> --- >> drivers/mmc/mmc.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c >> index aabfc71..eba20f0 100644 >> --- a/drivers/mmc/mmc.c >> +++ b/drivers/mmc/mmc.c >> @@ -1734,7 +1734,8 @@ int mmc_init(struct mmc *mmc) >> #ifdef CONFIG_DM_MMC >> struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev); >> >> - upriv->mmc = mmc; >> + if (upriv) >> + upriv->mmc = mmc; >> #endif >> if (mmc->has_init) >> return 0; >> -- >> 2.1.4 > > Can you please add a commit message explaining why this is needed and > what it fixes? How can mmc_init() be called before the MMC device is > there? Is this related to this patch? > > http://patchwork.ozlabs.org/patch/640735/ It's related in a way that it fixed crash of dragonboard before I submitted my patch :) Not sure if it meant to fix dragonboard or some other board. Although - imho - it's nice to make check like that.. or at least some kind of assert. Mateusz ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: msm_sdhci: Set mmc->dev pointer in msm_sdc_probe()
MMC core expects (now) valid mmc->dev pointer. During conversion in commit cffe5d86 not every driver was updated. This patch fixes crash while accessing MMC on boards using Qualcomm SDHCI controller. Signed-off-by: Mateusz Kulikowski --- This patch fixes MMC support on dragonboard. Without it attempts to access MMC caused null-pointer derefernece. drivers/mmc/msm_sdhci.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index 64bbf0c..96dcdbe 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -136,7 +136,12 @@ static int msm_sdc_probe(struct udevice *dev) host->version = sdhci_readw(host, SDHCI_HOST_VERSION); /* automatically detect max and min speed */ - return add_sdhci(host, 0, 0); + ret = add_sdhci(host, 0, 0); + if (ret) + return ret; + host->mmc->dev = dev; + + return 0; } static int msm_sdc_remove(struct udevice *dev) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v7 3/9] armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure
Hi Dirk, On 23.06.2016 13:33, Dirk Behme wrote: [...] Idea: perhaps after this series is merged we can add 2 new commands to u-boot (SMC/HVC) to play with hypervisors/secure monitors (and perhaps use some simple functionality if needed). >>> >>> How this should look like? >> >> I thought of something like this (I did such code few times): >> >> u-boot> smc 42 42 42 42 42 42 >> ret => (0x1, 0x2, 0x3, 0x4) > > > Could you share any (example?) code you have for such an smc/hvc U-Boot > command? I'm afraid I don't have it anymore :( SMC call itself is trivial, you can use smc_call @ u-boot: arch/arm/cpu/armv8/fwcall.c (this is code for armv8 in 64-bit mode, but you can easily port it to armv7) As for adding custom commands - just use any existing as template (sleep may be a good idea :) ). Regards, Mateusz ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] dragonboard410c: Increase default environment size.
Due to changes in distro environment, ENV_SIZE limit was reached on Dragonboard. This patch increases environment size to 8KiB. Signed-off-by: Mateusz Kulikowski --- Hi all, I'm back after a short break (sorry for that). This patch fixes environment for dragonboard - it grew during my absence beyond limit (0x1000). This caused rather nasty isuses: U-Boot 2016.07-rc1-00222-g9ab165d (Jun 19 2016 - 22:59:30 +0200) [...] *** Error - default environment is too large [...] dragonboard410c => print Environment size: 1/4092 bytes There are still 2 issues pending for dragonboard: - BOOTDELAY migration - I have to catch up with all the mails, but I assume this will be fixed "globally" - non-working MMC - will investigate that, and post patch in next days. Of course patch was target tested. Thanks, Mateusz include/configs/dragonboard410c.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index d32889d..4b00922 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -129,7 +129,7 @@ REFLASH(dragonboard/u-boot.img, 8)\ BOOTENV #define CONFIG_ENV_IS_NOWHERE -#define CONFIG_ENV_SIZE0x1000 +#define CONFIG_ENV_SIZE0x2000 #define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_SYS_NO_FLASH -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] drivers/gpio/pm8916_gpio.c: Make pid be uint32_t
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi, On 20.04.2016 23:25, Tom Rini wrote: > On Mon, Apr 18, 2016 at 10:23:24PM +0200, Mateusz Kulikowski wrote: [..] >> >> I think (now, when the coverity pointed out mistake) that we should add >> in that case check if pid fits in 16-bits, as this is maximum pid value on >> spmi bus. >> >> This checks should be done in pm8916_gpio_probe() and pm8916_probe(). >> >> Would you like to do it in your series or want me to post another patch on >> top of them? > > Please do a follow up, thanks! > Will do that, but it will take a few days as I have a lot of non-coding related assignments now :) btw. SPMI core checks pid and sid internally during reads/writes so we're pretty safe anyway. Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJXGjE2AAoJELvtohmVtQzBMj4H/3+zypiWH9BZdDheztNA6yZt vN2fIz9kWQB8GFoBktU7kRAAWXaTDB0CWsKQmcqnJtZJeqyUV0Dj1CEJoS4fcptD Lq0uljuufLkfkSb/XhRe5sLxWbvygHVrGBz/OemFCQivBlu8MEe4pwNyEUFwTHrc otF9Uk1y92HjsyaQhjMX6WWR5Ei8hrVSryppt1eRFoGBAw9uL7TcKnc96IKrbFZ+ ns/40n/K8O2k8J2JMxMXB1QbJj/lEj/y4yY2Il2B2Z3WHb4ZhErtoko55uh0bGf4 PoGH1wPTZxNrcKn0CCwnHxmIxGJMpJ8XyZYhsEI4J+ZBs7izzb4dSn8ekOsr1nI= =Y2ca -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] drivers/gpio/pm8916_gpio.c: Make pid be uint32_t
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 18.04.2016 22:23, Mateusz Kulikowski wrote: > Hi, > > Sorry for slow reply. > > On 12.04.2016 21:11, Tom Rini wrote: >> If get_dev_addr fails it will return FDT_ADDR_T_NONE and: >>>>> "priv->pid == 4294967295U" is always false regardless of the values >>>>> of its operands. This occurs as the logical operand of if. > >> Cc: Mateusz Kulikowski >> Reported-by: Coverity (CID: 143913) > [...] > >> -uint16_t pid; /* Peripheral ID on SPMI bus */ >> +uint32_t pid; /* Peripheral ID on SPMI bus */ >> }; > >> static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset, > > > Note applies to two patches in this series (pm8916_gpio.c and pm8916.c) > > I think (now, when the coverity pointed out mistake) that we should add > in that case check if pid fits in 16-bits, as this is maximum pid value on > spmi bus. > > This checks should be done in pm8916_gpio_probe() and pm8916_probe(). > > Would you like to do it in your series or want me to post another patch on > top of them? Or even better - leave it as uint16_t and do check & cast in probe() Matuesz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJXFUJtAAoJELvtohmVtQzBblgH/ROdYlG668Kz8ak/sUo/xksn NFeWMDC8pORbCOLhPnHcEJhAPzx+a0c5pUWUvsloTnj8t08rM+pcmnVV+jW4DhAC TxUgXYKjXMzbNlYYGn4cfb1Qlyss0+/xkv3C33LwI4hQYmE46RtThYtZqt6Uk+lk 9/eGCHt+H1tbKoD1BZIbzUwoDMTGlv7FgpzsH0/iW1QsDhbfUc27jkZNUvDgZO3Y ElX9I9cSFD5oqSVO3X+iDtGXaD6UEOGU+nb42wkTc9gyg9qunS9TV2kJsrrJu2DD Le4mN8NevrxyYbRZZM7EThkBD7skHr8wKUm6ccoQZLuMK+ZaYaukGirYTFSBQS0= =MwzG -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] drivers/gpio/pm8916_gpio.c: Make pid be uint32_t
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi, Sorry for slow reply. On 12.04.2016 21:11, Tom Rini wrote: > If get_dev_addr fails it will return FDT_ADDR_T_NONE and: >>>> "priv->pid == 4294967295U" is always false regardless of the values of >>>> its operands. This occurs as the logical operand of if. > > Cc: Mateusz Kulikowski > Reported-by: Coverity (CID: 143913) [...] > - uint16_t pid; /* Peripheral ID on SPMI bus */ > + uint32_t pid; /* Peripheral ID on SPMI bus */ > }; > > static int pm8916_gpio_set_direction(struct udevice *dev, unsigned offset, > Note applies to two patches in this series (pm8916_gpio.c and pm8916.c) I think (now, when the coverity pointed out mistake) that we should add in that case check if pid fits in 16-bits, as this is maximum pid value on spmi bus. This checks should be done in pm8916_gpio_probe() and pm8916_probe(). Would you like to do it in your series or want me to post another patch on top of them? Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJXFUIWAAoJELvtohmVtQzBow8H/i4ojMv7MM+4YdHZs/Tf1gdy LWh68je+eGX+Nt1pwVXdgh52NJ6/PFJvUstlHaPKpPhlCAfOEEno6aI05dp0UQ5E VG5bqyL1k1IoqDue+3xoL2tJ0IZvBTKDpeqw8rVDH5PEFp5/aXs9FKwZm9VcVpny +3fi0sxFACAOs+PjMPqP9meXVTZyRRCTh/dAeH4bwLRGp249Tgq50vMajYjq1CW5 SM5TGFKeUgs17xVs163INW5s6UnNmqjj+gmVr7HRDH2uDWoQ6P77U9Z+l4yvSb72 Fw/vi6pqnxWsj6DCBEBkZ+jY2SVGB4LXm3bhQH2FO6ljXAW7KYamt1w4DoD9ABU= =bczK -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] dragonboard410c: Add CONFIG_SYS_CACHELINE_SIZE
Add missing define to board header file. Signed-off-by: Mateusz Kulikowski --- This patch fixes issue with efi_runtime patch: http://lists.denx.de/pipermail/u-boot/2016-April/251121.html include/configs/dragonboard410c.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index a63440f..26f95a7 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -27,6 +27,8 @@ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x8) #define CONFIG_SYS_BOOTM_LEN 0x100 /* 16MB max kernel size */ +#define CONFIG_SYS_CACHELINE_SIZE 64 + /* UART */ #define CONFIG_BAUDRATE115200 -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,v4,15/21] spmi: Add sandbox test driver
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi, On 04.04.2016 19:09, Stephen Warren wrote: > On 04/04/2016 10:19 AM, Mateusz Kulikowski wrote: [...] >>>> ... but note that the tests fail currently, please fix :) >>> >>> Yup, my automated build/test systems all started failing due to >>> this. You can easily reproduce this by running: >> >> Working on it. Weird thing is - it works on sandbox.dtb, and >> segfaults on test.dtb even if entries are exactly the same :0 > > I wonder if there's some kind of memory corruption going on; IIRC I > checked out the committed version of this patch in u-boot/master's > history, and 3 tests failed, but by the time you reach the current > u-boot/master, only 2 tests fail, and I don't think there were any > more spmi-related commits between the two. That would indicate some > kind of outside interference, which would also be consistent with > your unusual findings. Yeah.. we all love off-by-one don't we? ;) Patch already posted - please check it if you want to. Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJXAqwwAAoJELvtohmVtQzBqUcH/jftQFrkTNQMv/fGu++IuB/I ALdidN9YiOAX+d9fFCl8xuNf1vd3x15YNc14nSohMiQ9+RW8tbkV7zN6PSQSg0jb 44Ccvpi29vJwTwi5A5oyIA/0b3N5jzwMpWssD9vbjgxrpExsXiHKQI1XNLfAZsr0 WI16YD1TTe0xZXtvqv3ueNfXXivG8O6ezqxhg2fgJf//Q7w5sBT7n0/injc2JCBJ 3tMoFKsU28Al7WMqmbo5tti1Z2QmJOsTBq0mUNrzDS0vFWNX9UBvPalKVpzUANwF U1IDGRIowBmK+xA1brwqyl9WumxDKZPffTqO5RdYbRyoAVRzyXDpulqRnz3Pt7I= =zCXi -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] spmi: Fix sandbox spmi driver memory corruption
There is off-by-one error in sandbox_emul_gpio that causes
segfault of certain tests.
EMUL_GPIO_REG_END is the address of last valid (emulated) register.
This patch fixed this (by adding one more element to emulated register array).
Signed-off-by: Mateusz Kulikowski
---
drivers/spmi/spmi-sandbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spmi/spmi-sandbox.c b/drivers/spmi/spmi-sandbox.c
index 2f0fea0..980aff2 100644
--- a/drivers/spmi/spmi-sandbox.c
+++ b/drivers/spmi/spmi-sandbox.c
@@ -35,7 +35,8 @@ struct sandbox_emul_fake_regs {
};
struct sandbox_emul_gpio {
- struct sandbox_emul_fake_regs r[EMUL_GPIO_REG_END]; /* Fake registers */
+ /* Fake registers - need one more entry as REG_END is valid address. */
+ struct sandbox_emul_fake_regs r[EMUL_GPIO_REG_END + 1];
};
struct sandbox_spmi_priv {
--
2.5.0
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Re: [U-Boot] [U-Boot,v4,15/21] spmi: Add sandbox test driver
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi, On 04.04.2016 17:49, Stephen Warren wrote: > On 04/01/2016 08:04 PM, Tom Rini wrote: >> On Thu, Mar 31, 2016 at 11:12:28PM +0200, Mateusz Kulikowski wrote: >> >>> This patch adds emulated spmi bus controller with part of >>> pm8916 pmic on it to sandbox and tests validating SPMI uclass. >>> >>> Signed-off-by: Mateusz Kulikowski >>> Reviewed-by: Simon Glass >> >> Applied to u-boot/master, thanks! >> >> ... but note that the tests fail currently, please fix :) > > Yup, my automated build/test systems all started failing due to this. You can > easily reproduce this by running: Working on it. Weird thing is - it works on sandbox.dtb, and segfaults on test.dtb even if entries are exactly the same :0 Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJXApQMAAoJELvtohmVtQzBeTsH+wZAa2q+gdeIJARK/1I0uBU5 3Hl/S3RMYFLWgOfOpeAGxDghfMnxO99uV7LG9QewcQgiD3DuNobzmDJ7JBE36kPK vPK4RUmO9Y4o0zxEbPdenxL9y1COvulll5+RZS4iLvo7bBHfYFv5RmVgbC98OkNR Lai4o3bkagvUhrlPGUA5ZYFRAR7PvNxJ0/upP7yFKFV4bsubwdOM3/Ju/Gh0H8SU jKdj+Gtuf0S3eDzT7WaU1HDBFtc0Xe82z4Uvg4SdxP+7O9uGU6jTJQGLReaPUMTi 8ajz/KZFjX0PwLmDN2mjo12D6kgW7rr6Sxfj4pnra4fzpBAj+1nDUeDBmp2o1Ck= =oRm0 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,v4,04/21] ehci-hcd: Add init_after_reset
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 03.04.2016 12:58, Bernhard Nortmann wrote: > Commit 3f9f8a5b83f8aec40c9f4ee496046a695e333c45 breaks U-Boot on Banana Pi > (tested using FEL mode): Fix posted - thanks :) http://lists.denx.de/pipermail/u-boot/2016-April/250373.html Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJXAQEWAAoJELvtohmVtQzBz8cIAIxlJaxT7yu6MmcfH4wtHjf7 kMJSMxq7wFW1SAvdVpRFkj/E4nl5LQFUIND+r4/bh28sS14+ALYSXB9I9v9vsO/o pLP6i1DjI2t+CyNeX/VeQTIur7QY1qC4KK4wocI84565E87+mLCRSR70+CvTAVJs MdVHRzrjbS1/ZCJB6cXe58DPThXFnM3l6PucFNF2vF7scWVGkqrq72jVx+wlkRDr yQ8GvduH5rE3o4rJTK3IjCs9VVW3PVG6IVdbHUxMLYES4FIakgqN1rhTlyKlSmvM ESueg1aXT7PWQC/D89a9AtnnFunAJsHkgLlmSjKT3MYC1pRuWNdPXL1aMbw/gug= =8y4d -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] usb: ehci-hcd: Fix crash when no ops are provided to ehci_register()
This commit fixes crash on BananaPi (and possibly others)
casued by 3f9f8a5b83f8aec40c9f4ee496046a695e333c45.
Crash reason:
When no ops were passed to ehci_register(), USB host driver caused
NULL pointer dereference.
Signed-off-by: Mateusz Kulikowski
---
drivers/usb/host/ehci-hcd.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 598f444..fa5d584 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1615,8 +1615,8 @@ int ehci_register(struct udevice *dev, struct ehci_hccr
*hccr,
if (ret)
goto err;
- if (ops->init_after_reset) {
- ret = ops->init_after_reset(ctrl);
+ if (ctrl->ops.init_after_reset) {
+ ret = ctrl->ops.init_after_reset(ctrl);
if (ret)
goto err;
}
--
2.5.0
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[U-Boot] [PATCH v4 20/21] board: Add Qualcomm Dragonboard 410C support
This commit add support for 96Boards Dragonboard410C.
It is board based on APQ8016 Qualcomm SoC, complying with
96boards specification.
Features (present out of the box):
- 4x Cortex A53 (ARMv8)
- 2x USB Host port
- 1x USB Device port
- 4x LEDs
- 1x HDMI connector
- 1x uSD connector
- 3x buttons (Power, Vol+, Vol-/Reset)
- WIFI, Bluetooth with integrated antenna
- 8GiB eMMC
U-Boot boots chained with fastboot in 64-bit mode.
For detailed build instructions see readme.txt in board directory.
Signed-off-by: Mateusz Kulikowski
Tested-by: Simon Glass
---
Changes in v4:
- Move CONFIG_OF_LIBFDT to defconfig and cleaned it up with savedefconfig
Changes in v3:
- readme: Added info on how to enter fastboot mode and that
dtbTool is also part of skales. Added more explanation
on image generation.
- head: Add comment why it's needed, drop MZ EFI signature
that makes no sense on this particular SoC, fix confusing
entry point name (+update .lds file)
Changes in v2:
- Renamed CONFIG_DM_SPMI -> CONFIG_SPMI
- Removed extra enter in dragonboard file
- Added ULPI* to defconfig
- Added MAINTAINERS to board
- Cleaned up config file - use distro defaults/environment:
- Dropped multiple CONFIG_CMD* and other CONFIG_*
- Added distro env/config
- Dropped old boot commands
- Split dts - pm8916_gpio entries are taken directly from
Linux Dragonboard dts; Add handles for u-boot in -uboot.dtsi;
They will be removed once gpio drivers are converted to pinctrl.
- Renamed some pmic nodes, fixed dragonboard.c to find them properly.
- Added header and converted comments to c98-style in head.S
- Print error if pmic gpio node is not found.
Changes in v1:
- Add better help for dragonboard
- Move static structures to board_prepare_usb
- Add DM_SPMI to defconfig
arch/arm/dts/Makefile| 2 +
arch/arm/dts/dragonboard410c-uboot.dtsi | 28 +
arch/arm/dts/dragonboard410c.dts | 148 ++
arch/arm/mach-snapdragon/Kconfig | 20 +++
board/qualcomm/dragonboard410c/Kconfig | 15 +++
board/qualcomm/dragonboard410c/MAINTAINERS | 6 +
board/qualcomm/dragonboard410c/Makefile | 8 ++
board/qualcomm/dragonboard410c/dragonboard410c.c | 131
board/qualcomm/dragonboard410c/head.S| 34 +
board/qualcomm/dragonboard410c/readme.txt| 71 +++
board/qualcomm/dragonboard410c/u-boot.lds| 90 ++
configs/dragonboard410c_defconfig| 26
include/configs/dragonboard410c.h| 150 +++
13 files changed, 729 insertions(+)
create mode 100644 arch/arm/dts/dragonboard410c-uboot.dtsi
create mode 100644 arch/arm/dts/dragonboard410c.dts
create mode 100644 board/qualcomm/dragonboard410c/Kconfig
create mode 100644 board/qualcomm/dragonboard410c/MAINTAINERS
create mode 100644 board/qualcomm/dragonboard410c/Makefile
create mode 100644 board/qualcomm/dragonboard410c/dragonboard410c.c
create mode 100644 board/qualcomm/dragonboard410c/head.S
create mode 100644 board/qualcomm/dragonboard410c/readme.txt
create mode 100644 board/qualcomm/dragonboard410c/u-boot.lds
create mode 100644 configs/dragonboard410c_defconfig
create mode 100644 include/configs/dragonboard410c.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 50bcc0b..5bd4b02 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -107,6 +107,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \
fsl-ls1043a-rdb.dtb
+dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
+
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi
b/arch/arm/dts/dragonboard410c-uboot.dtsi
new file mode 100644
index 000..cc2c175
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -0,0 +1,28 @@
+/*
+ * U-Boot addition to handle Dragonboard 410c pins
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+&pm8916_gpios {
+ usb_hub_reset_pm {
+ gpios = <&pm8916_gpios 2 0>;
+ };
+
+ usb_sw_sel_pm {
+ gpios = <&pm8916_gpios 3 0>;
+ };
+};
+
+
+&pm8916_pon {
+ key_vol_down {
+ gpios = <&pm8916_pon 1 0>;
+ };
+
+ key_power {
+ gpios = <&pm8916_pon 0 0>;
+ };
+};
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
new file mode 100644
index 000..7746622
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -0,0 +1,148 @@
+/*
+ * Qualcomm APQ8016 based Dragonboard 410C board device tree source
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "skeleton64.dtsi"
+
+/ {
+ model =
[U-Boot] [PATCH v4 19/21] arm: Add support for Qualcomm Snapdragon family
First supported chip is APQ8016 (that is compatible with MSM8916). Drivers in SoC code: - Reset controller (PSHOLD) - Clock controller (very simple clock configuration for MMC and UART) Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass Tested-by: Simon Glass --- Changes in v4: - Add sysmap for apq8016 (required to enable MMU) Changes in v3: None Changes in v2: - Rename DM_SPMI -> SPMI - Make MND divider comments more compact :) - p -> priv - Add reviewed-by - Reordered Kconfig to keep alphabetical order - Renamed reset_sandbox -> msm_reset (typo in reset.c) Changes in v1: - Fix include order - Cleanup defines (added spaces for readibility) - Base address is integer to avoid casting - Use setbits_* family where possible - Drop unneded comments, added newlines where needed - Check return value of dev_get_addr - Add binding for apq8016 - Cleaned up divider calculation - Drop most of gpio.h (only empty file is needed) arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/mach-snapdragon/Kconfig | 6 + arch/arm/mach-snapdragon/Makefile | 9 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 + arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 ++ arch/arm/mach-snapdragon/reset.c | 40 arch/arm/mach-snapdragon/sysmap-apq8016.c | 30 +++ 9 files changed, 383 insertions(+) create mode 100644 arch/arm/mach-snapdragon/Kconfig create mode 100644 arch/arm/mach-snapdragon/Makefile create mode 100644 arch/arm/mach-snapdragon/clock-apq8016.c create mode 100644 arch/arm/mach-snapdragon/include/mach/gpio.h create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h create mode 100644 arch/arm/mach-snapdragon/reset.c create mode 100644 arch/arm/mach-snapdragon/sysmap-apq8016.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 9851065..fc0c03f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -511,6 +511,16 @@ config RMOBILE bool "Renesas ARM SoCs" select CPU_V7 +config ARCH_SNAPDRAGON + bool "Qualcomm Snapdragon SoCs" + select ARM64 + select DM + select DM_GPIO + select DM_SERIAL + select SPMI + select OF_CONTROL + select OF_SEPARATE + config ARCH_SOCFPGA bool "Altera SOCFPGA family" select CPU_V7 @@ -774,6 +784,8 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" +source "arch/arm/mach-snapdragon/Kconfig" + source "arch/arm/mach-socfpga/Kconfig" source "arch/arm/mach-stm32/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6defdfb..bb2666c 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -54,6 +54,7 @@ machine-$(CONFIG_ARCH_MVEBU) += mvebu # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx +machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip machine-$(CONFIG_STM32)+= stm32 diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig new file mode 100644 index 000..156e733 --- /dev/null +++ b/arch/arm/mach-snapdragon/Kconfig @@ -0,0 +1,6 @@ +if ARCH_SNAPDRAGON + +config SYS_SOC + default "snapdragon" + +endif diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile new file mode 100644 index 000..4735844 --- /dev/null +++ b/arch/arm/mach-snapdragon/Makefile @@ -0,0 +1,9 @@ +# +# (C) Copyright 2015 Mateusz Kulikowski +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += clock-apq8016.o +obj-y += sysmap-apq8016.o +obj-y += reset.o diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c new file mode 100644 index 000..d548d75 --- /dev/null +++ b/arch/arm/mach-snapdragon/clock-apq8016.c @@ -0,0 +1,262 @@ +/* + * Clock drivers for Qualcomm APQ8016 + * + * (C) Copyright 2015 Mateusz Kulikowski + * + * Based on Little Kernel driver, simplified + * + * SPDX-License-Identifier:BSD-3-Clause + */ + +#include +#include +#include +#include +#include +#include + +/* GPLL0 clock control registers */ +#define GPLL0_STATUS0x2101C +#define GPLL0_STATUS_ACTIVE BIT(17) + +#define APCS_GPLL_ENA_VOTE 0x45000 +#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0) + +/* vote reg for blsp1 clock */ +#define APCS_CLOCK_BRANCH_ENA_VOTE 0x45004 +#define APCS_CLOCK_BRANCH_ENA_VOTE_BLSP1 BIT(10) + +/* SDC(n) clock control registers; n=1,2 */ + +/* block control register */ +#define SDCC_BCR(n) ((n * 0x1000) + 0x41000) +/* cmd */ +#define SD
[U-Boot] [PATCH v4 21/21] Add myself as Snapdragon and SPMI maintainer
- Update MAINTAINERS - Update git-mailrc Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v4: None Changes in v3: None Changes in v2: - New patch Changes in v1: None MAINTAINERS| 11 +++ doc/git-mailrc | 3 +++ 2 files changed, 14 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 32f97b2..6061139 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -125,6 +125,11 @@ F: arch/arm/mach-s5pc1xx/ F: arch/arm/cpu/armv7/s5p-common/ F: arch/arm/include/asm/arch-s3c24x0/ +ARM SNAPDRAGON +M: Mateusz Kulikowski +S: Maintained +F: arch/arm/mach-snapdragon/ + ARM STM SPEAR #M:Vipin Kumar S: Orphaned (Since 2016-02) @@ -396,6 +401,12 @@ F: drivers/mtd/spi/ F: drivers/spi/ F: include/spi* +SPMI +M: Mateusz Kulikowski +S: Maintained +F: drivers/spmi/ +F: include/spmi/ + TQ GROUP #M:Martin Krause S: Orphaned (Since 2016-02) diff --git a/doc/git-mailrc b/doc/git-mailrc index ced7085..1201d4a 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -33,6 +33,7 @@ alias lukma Lukasz Majewski alias macpaulMacpaul Lin alias marex Marek Vasut alias masahiro Masahiro Yamada +alias mateuszMateusz Kulikowski alias monstr Michal Simek alias panto Pantelis Antoniou alias prafulla Prafulla Wadaskar @@ -67,6 +68,7 @@ alias rmobileuboot, iwamatsu alias s3csamsung alias s5pc samsung alias samsunguboot, prom +alias snapdragon uboot, mateusz alias socfpgauboot, marex, Dinh Nguyen alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren , Stephen Warren @@ -127,6 +129,7 @@ alias nand uboot, scottwood alias netuboot, jhersh alias phyuboot, jhersh alias spiuboot, jagan +alias spmi uboot, mateusz alias ubiuboot, hs alias usbuboot, marex alias video uboot, ag -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 17/21] pmic: Add support for Qualcomm PM8916 PMIC
This PMIC is connected on SPMI bus so needs SPMI support enabled.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add reviewed-by
- Reordered Kconfig & Makefile (to keep alphabetical ordering)
- Added link to dt binding @ help
Changes in v1:
- Added dt bindings
- Reoder includes
- Replaced extract_* macros with ordinary shift/mask
- Added error checking and whitespaces in probe
doc/device-tree-bindings/pmic/pm8916.txt | 18 ++
drivers/power/pmic/Kconfig | 16 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/pm8916.c | 96
4 files changed, 131 insertions(+)
create mode 100644 doc/device-tree-bindings/pmic/pm8916.txt
create mode 100644 drivers/power/pmic/pm8916.c
diff --git a/doc/device-tree-bindings/pmic/pm8916.txt
b/doc/device-tree-bindings/pmic/pm8916.txt
new file mode 100644
index 000..15c598b
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/pm8916.txt
@@ -0,0 +1,18 @@
+Qualcomm pm8916 PMIC
+
+This PMIC is connected using SPMI bus so should be child of SPMI bus
controller.
+
+Required properties:
+- compatible: "qcom,spmi-pmic";
+- reg: SPMI Slave ID, size (ignored)
+- #address-cells: 0x1 (peripheral ID)
+- #size-cells: 0x1 (size of peripheral register space)
+
+Example:
+
+pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+};
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 7f69ae1..69f8d51 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -54,6 +54,22 @@ config DM_PMIC_MAX77686
This config enables implementation of driver-model pmic uclass features
for PMIC MAX77686. The driver implements read/write operations.
+config PMIC_PM8916
+ bool "Enable Driver Model for Qualcomm PM8916 PMIC"
+ depends on DM_PMIC
+ ---help---
+ The PM8916 is a PMIC connected to one (or several) processors
+ with SPMI bus. It has 2 slaves with several peripherals:
+ - 18x LDO
+ - 4x GPIO
+ - Power and Reset buttons
+ - Watchdog
+ - RTC
+ - Vibrator drivers
+ - Others
+
+ Driver binding info: doc/device-tree-bindings/pmic/pm8916.txt
+
config PMIC_RK808
bool "Enable support for Rockchip PMIC RK808"
depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index c6e8d0c..52b4f71 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
+obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_RK808) += rk808.o
obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
diff --git a/drivers/power/pmic/pm8916.c b/drivers/power/pmic/pm8916.c
new file mode 100644
index 000..9acf5f5
--- /dev/null
+++ b/drivers/power/pmic/pm8916.c
@@ -0,0 +1,96 @@
+/*
+ * Qualcomm pm8916 pmic driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define PID_SHIFT 8
+#define PID_MASK (0xFF << PID_SHIFT)
+#define REG_MASK 0xFF
+
+struct pm8916_priv {
+ uint16_t usid; /* Slave ID on SPMI bus */
+};
+
+static int pm8916_reg_count(struct udevice *dev)
+{
+ return 0x;
+}
+
+static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ if (len != 1)
+ return -EINVAL;
+
+ return spmi_reg_write(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK,
+ *buff);
+}
+
+static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+ int val;
+
+ if (len != 1)
+ return -EINVAL;
+
+ val = spmi_reg_read(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK);
+
+ if (val < 0)
+ return val;
+ *buff = val;
+ return 0;
+}
+
+static struct dm_pmic_ops pm8916_ops = {
+ .reg_count = pm8916_reg_count,
+ .read = pm8916_read,
+ .write = pm8916_write,
+};
+
+static const struct udevice_id pm8916_ids[] = {
+ { .compatible = "qcom,spmi-pmic" },
+ { }
+};
+
+static int pm8916_probe(struct udevice *dev)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ priv-&
[U-Boot] [PATCH v4 15/21] spmi: Add sandbox test driver
This patch adds emulated spmi bus controller with part of
pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
---
Changes in v4: None
Changes in v3:
- Updated test.dts to include SPMI like sandbox.dts does
Changes in v2:
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Rename r -> regs, p -> priv
- Add reviewed-by
- Update binding doc (drop unused bindig)
Changes in v1: None
arch/sandbox/dts/sandbox.dts | 20
arch/sandbox/dts/test.dts | 20
configs/sandbox_defconfig | 4 +
doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 +
drivers/spmi/Kconfig | 8 ++
drivers/spmi/Makefile | 1 +
drivers/spmi/spmi-sandbox.c| 157 +
test/dm/Makefile | 1 +
test/dm/spmi.c | 115 ++
9 files changed, 357 insertions(+)
create mode 100644 doc/device-tree-bindings/spmi/spmi-sandbox.txt
create mode 100644 drivers/spmi/spmi-sandbox.c
create mode 100644 test/dm/spmi.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index e3f02bf..2ae4014 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -240,6 +240,26 @@
status = "disabled";
};
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
};
#include "cros-ec-keyboard.dtsi"
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 9b8d658..8930009 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -351,6 +351,26 @@
status = "disabled";
};
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index d69c9fc..bfc8b61 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -31,6 +31,7 @@ CONFIG_ADC_SANDBOX=y
CONFIG_BLK=y
CONFIG_CLK=y
CONFIG_SANDBOX_GPIO=y
+CONFIG_PM8916_GPIO=y
CONFIG_SYS_I2C_SANDBOX=y
CONFIG_CROS_EC_KEYB=y
CONFIG_LED=y
@@ -59,6 +60,9 @@ CONFIG_PINCONF=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_SANDBOX=y
+CONFIG_PMIC_PM8916=y
+CONFIG_SPMI=y
+CONFIG_SPMI_SANDBOX=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_SANDBOX=y
CONFIG_RAM=y
diff --git a/doc/device-tree-bindings/spmi/spmi-sandbox.txt
b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
new file mode 100644
index 000..8569a1a
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
@@ -0,0 +1,31 @@
+Sandbox SPMI emulated arbiter.
+
+This is bus driver for Sandbox. It includes part of emulated pm8916 pmic.
+
+Required properties:
+- compatible: "sandbox,spmi"
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+Example:
+
+spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: g
[U-Boot] [PATCH v4 18/21] gpio: Add support for Qualcomm PM8916 gpios
This driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itself as GPIO with 2 inputs (power and reset)
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add Reviewed-by
Changes in v1:
- Add binding doc
- Fixed inlcude ordering
- Merged direction_input and direction_output functions
- gpio_get: use switch instead of stacked if
- use pmic_clrsetbits
- add possibility to change prwkey bank name
- Handle invalid bindings
- Sanity HW check (i.e. check type/subtype registers)
doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48
drivers/gpio/Kconfig | 10 +
drivers/gpio/Makefile | 1 +
drivers/gpio/pm8916_gpio.c| 302 ++
4 files changed, 361 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/pm8916_gpio.txt
create mode 100644 drivers/gpio/pm8916_gpio.c
diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt
b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
new file mode 100644
index 000..58185b8
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
@@ -0,0 +1,48 @@
+Driver for part of pm8916 PMIC - gpio and power/reset keys
+
+This device should be child of SPMI pmic.
+
+1) GPIO driver
+
+Required properties:
+- compatible: "qcom,pm8916-gpio"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- gpio-count: number of GPIOs
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916" is used)
+
+Example:
+
+pmic_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="pmic";
+};
+
+
+2) Power/Reset key driver
+
+Required properties:
+- compatible: "qcom,pm8916-pwrkey"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916_key" is used)
+
+
+Example:
+
+pmic_pon: pon@800 {
+ compatible = "qcom,pm8916-pwrkey";
+ reg = <0x800 0x96>;
+ #gpio-cells = <2>;
+ gpio-controller;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 4d9e74c..f56a606 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -69,6 +69,16 @@ config MSM_GPIO
- APQ8016
- MSM8916
+config PM8916_GPIO
+ bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
+ depends on DM_GPIO && PMIC_PM8916
+ help
+ Support for GPIO pins and power/reset buttons found on
+ Qualcomm PM8916 PMIC.
+ Default name for GPIO bank is "pm8916".
+ Power and reset buttons are placed in "pm8916_key" bank and
+ have gpio numbers 0 and 1 respectively.
+
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 4162c3c..4f071c4 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -51,3 +51,4 @@ obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
+obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o
diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c
new file mode 100644
index 000..1abab7f
--- /dev/null
+++ b/drivers/gpio/pm8916_gpio.c
@@ -0,0 +1,302 @@
+/*
+ * Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register offset for each gpio */
+#define REG_OFFSET(x) ((x) * 0x100)
+
+/* Register maps */
+
+/* Type and subtype are shared for all pm8916 peripherals */
+#define REG_TYPE 0x4
+#define REG_SUBTYPE0x5
+
+#define REG_STATUS 0x08
+#define REG_STATUS_VAL_MASK0x1
+
+/* MODE_CTL */
+#define REG_CTL 0x40
+#define REG_CTL_MODE_MASK 0x70
+#define REG_CTL_MODE_INPUT 0x00
+#define REG_CTL_MODE_INOUT 0x20
+#define REG_CTL_MODE_OUTPUT 0x10
+#define REG_CTL_OUTPUT_MASK 0x0F
+
+#define REG_DIG_VIN_CTL0x41
+#define REG_DIG_VIN_VIN0 0
+
+#define REG_DIG_PULL_CTL 0x42
+#define REG_DIG_PULL_NO_PU 0x5
+
+#define REG_DIG_OUT_CTL0x45
+#define REG_DIG_OUT_CTL_CMOS (0x0 << 4)
+#define REG_DIG_OUT_CTL_DRIVE_L 0x1
+
+#define REG_EN_CTL 0x46
+#define REG_EN_CTL_ENABLE (1 <&
[U-Boot] [PATCH v4 14/21] drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use proper entry order in Kconfig
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Fix header ordering
- Add reviewed-by
Changes in v1:
- Reorder includes
- Add read/write arguments documentation
drivers/Kconfig| 2 ++
drivers/Makefile | 1 +
drivers/spmi/Kconfig | 10 ++
drivers/spmi/Makefile | 7 +++
drivers/spmi/spmi-uclass.c | 48 ++
include/dm/uclass-id.h | 1 +
include/spmi/spmi.h| 47 +
7 files changed, 116 insertions(+)
create mode 100644 drivers/spmi/Kconfig
create mode 100644 drivers/spmi/Makefile
create mode 100644 drivers/spmi/spmi-uclass.c
create mode 100644 include/spmi/spmi.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 70993fd..c82a94b 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -60,6 +60,8 @@ source "drivers/sound/Kconfig"
source "drivers/spi/Kconfig"
+source "drivers/spmi/Kconfig"
+
source "drivers/thermal/Kconfig"
source "drivers/timer/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index e7eab66..6900097 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -54,6 +54,7 @@ obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += rtc/
obj-y += sound/
+obj-y += spmi/
obj-y += timer/
obj-y += tpm/
obj-y += twserial/
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
new file mode 100644
index 000..0b9bd31
--- /dev/null
+++ b/drivers/spmi/Kconfig
@@ -0,0 +1,10 @@
+menu "SPMI support"
+
+config SPMI
+ bool "Enable SPMI bus support"
+ depends on DM
+ ---help---
+ Select this to enable to support SPMI bus.
+ SPMI (System Power Management Interface) bus is used
+ to connect PMIC devices on various SoCs.
+endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
new file mode 100644
index 000..99092eb
--- /dev/null
+++ b/drivers/spmi/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Mateusz Kulikowski
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_SPMI) += spmi-uclass.o
diff --git a/drivers/spmi/spmi-uclass.c b/drivers/spmi/spmi-uclass.c
new file mode 100644
index 000..4ddd51b
--- /dev/null
+++ b/drivers/spmi/spmi-uclass.c
@@ -0,0 +1,48 @@
+/*
+ * SPMI bus uclass driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->read)
+ return -ENOSYS;
+
+ return ops->read(dev, usid, pid, reg);
+}
+
+int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
+ uint8_t value)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->write)
+ return -ENOSYS;
+
+ return ops->write(dev, usid, pid, reg, value);
+}
+
+static int spmi_post_bind(struct udevice *dev)
+{
+ return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+}
+
+UCLASS_DRIVER(spmi) = {
+ .id = UCLASS_SPMI,
+ .name = "spmi",
+ .post_bind = spmi_post_bind,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 37c4176..cbf9b2c 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -66,6 +66,7 @@ enum uclass_id {
UCLASS_RTC, /* Real time clock device */
UCLASS_SERIAL, /* Serial UART */
UCLASS_SPI, /* SPI bus */
+ UCLASS_SPMI,/* System Power Management Interface bus */
UCLASS_SPI_FLASH, /* SPI flash */
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_SYSCON, /* System configuration device */
diff --git a/include/spmi/spmi.h b/include/spmi/spmi.h
new file mode 100644
index 000..65a49bd
--- /dev/null
+++ b/include/spmi/spmi.h
@@ -0,0 +1,47 @@
+#ifndef _SPMI_SPMI_H
+#define _SPMI_SPMI_H
+
+/**
+ * struct dm_spmi_ops - SPMI device I/O interface
+ *
+ * Should be implemented by UCLASS_SPMI device drivers. The standard
+ * device operations provides the I/O interface for it's childs.
+ *
+ * @read: read register 'reg' of slave 'usid' and peripheral 'pid'
+ * @write: wr
[U-Boot] [PATCH v4 16/21] drivers: spmi: Add support for Qualcomm SPMI bus driver
Support SPMI arbiter on Qualcomm Snapdragon devices.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Rename DM_SPMI -> SPMI
- Rename p -> priv (in write/read)
- Fix header ordering (again)
- Add reviewed-by
Changes in v1:
- add binding documentation and better Kconfig help
- Changed a bit mapping
- Change include order
- Use clrsetbits* where possible
- Add one more supported dts id
- Handle missing fields in dt properly
doc/device-tree-bindings/spmi/spmi-msm.txt | 26
drivers/spmi/Kconfig | 7 +-
drivers/spmi/Makefile | 1 +
drivers/spmi/spmi-msm.c| 189 +
4 files changed, 222 insertions(+), 1 deletion(-)
create mode 100644 doc/device-tree-bindings/spmi/spmi-msm.txt
create mode 100644 drivers/spmi/spmi-msm.c
diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt
b/doc/device-tree-bindings/spmi/spmi-msm.txt
new file mode 100644
index 000..ae47673
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-msm.txt
@@ -0,0 +1,26 @@
+Qualcomm SPMI arbiter/bus driver
+
+This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs.
+
+Required properties:
+- compatible: "qcom,spmi-pmic-arb"
+- reg: Register block adresses and sizes for various parts of device:
+ 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn)
+ 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS)
+ 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS)
+
+Optional properties (if not set by parent):
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+All PMICs should be placed as a child nodes of bus arbiter.
+Automatic detection of childs is currently not supported.
+
+Example:
+
+spmi@200f000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x200f800 0x200 0x240 0x40 0x2c0 0x40>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+};
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index c70d675..8d25b45 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -8,11 +8,16 @@ config SPMI
SPMI (System Power Management Interface) bus is used
to connect PMIC devices on various SoCs.
+config SPMI_MSM
+ boolean "Support Qualcomm SPMI bus"
+ depends on SPMI
+ ---help---
+ Support SPMI bus implementation found on Qualcomm Snapdragon SoCs.
+
config SPMI_SANDBOX
boolean "Support for Sandbox SPMI bus"
depends on SPMI
---help---
Demo SPMI bus implementation. Emulates part of PM8916 as single
slave (0) on bus. It has 4 GPIO peripherals, pid 0xC0-0xC3.
-
endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 4ca65a9..c0b1220 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -5,4 +5,5 @@
#
obj-$(CONFIG_SPMI) += spmi-uclass.o
+obj-$(CONFIG_SPMI_MSM) += spmi-msm.o
obj-$(CONFIG_SPMI_SANDBOX) += spmi-sandbox.o
diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
new file mode 100644
index 000..0cef505
--- /dev/null
+++ b/drivers/spmi/spmi-msm.c
@@ -0,0 +1,189 @@
+/*
+ * Qualcomm SPMI bus driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Loosely based on Little Kernel driver
+ *
+ * SPDX-License-Identifier:BSD-3-Clause
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ARB_CHANNEL_OFFSET(n) (0x4 * (n))
+#define SPMI_CH_OFFSET(chnl) ((chnl) * 0x8000)
+
+#define SPMI_REG_CMD0 0x0
+#define SPMI_REG_CONFIG0x4
+#define SPMI_REG_STATUS0x8
+#define SPMI_REG_WDATA 0x10
+#define SPMI_REG_RDATA 0x18
+
+#define SPMI_CMD_OPCODE_SHIFT 27
+#define SPMI_CMD_SLAVE_ID_SHIFT20
+#define SPMI_CMD_ADDR_SHIFT12
+#define SPMI_CMD_ADDR_OFFSET_SHIFT 4
+#define SPMI_CMD_BYTE_CNT_SHIFT0
+
+#define SPMI_CMD_EXT_REG_WRITE_LONG0x00
+#define SPMI_CMD_EXT_REG_READ_LONG 0x01
+
+#define SPMI_STATUS_DONE 0x1
+
+#define SPMI_MAX_CHANNELS 128
+#define SPMI_MAX_SLAVES16
+#define SPMI_MAX_PERIPH256
+
+struct msm_spmi_priv {
+ phys_addr_t arb_chnl; /* ARB channel mapping base */
+ phys_addr_t spmi_core; /* SPMI core */
+ phys_addr_t spmi_obs; /* SPMI observer */
+ /* SPMI channel map */
+ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];
+};
+
+static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
+ uint8_t val)
+{
+ struct msm_spmi_priv *priv = dev_get_priv(dev);
+ unsigned channel;
+ uint32_t reg = 0;
+
+ if (usid >= SPMI_MAX_SLAV
[U-Boot] [PATCH v4 10/21] usb: Rename ehci-fsl.h to ehci-ci.h
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v4:
- Add missing renames (arch/* and board/*)
Changes in v3: None
Changes in v2:
- Add acked-by
Changes in v1: None
arch/powerpc/cpu/mpc83xx/cpu_init.c | 2 +-
board/boundary/nitrogen6x/nitrogen6x.c| 2 +-
board/denx/m53evk/m53evk.c| 2 +-
board/freescale/mx51evk/mx51evk.c | 2 +-
board/freescale/mx6slevk/mx6slevk.c | 2 +-
board/freescale/mx6sxsabreauto/mx6sxsabreauto.c | 2 +-
board/freescale/mx6sxsabresd/mx6sxsabresd.c | 2 +-
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c | 2 +-
board/freescale/mx7dsabresd/mx7dsabresd.c | 2 +-
board/solidrun/mx6cuboxi/mx6cuboxi.c | 2 +-
drivers/usb/host/ehci-fsl.c | 2 +-
drivers/usb/host/ehci-mpc512x.c | 2 +-
drivers/usb/host/ehci-mx5.c | 2 +-
drivers/usb/host/ehci-mx6.c | 2 +-
drivers/usb/host/ehci-mxc.c | 2 +-
drivers/usb/host/ehci-vf.c| 2 +-
drivers/usb/host/ehci-zynq.c | 2 +-
include/usb/{ehci-fsl.h => ehci-ci.h} | 6 +++---
18 files changed, 20 insertions(+), 20 deletions(-)
rename include/usb/{ehci-fsl.h => ehci-ci.h} (99%)
diff --git a/arch/powerpc/cpu/mpc83xx/cpu_init.c
b/arch/powerpc/cpu/mpc83xx/cpu_init.c
index 00572de..0791043 100644
--- a/arch/powerpc/cpu/mpc83xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc83xx/cpu_init.c
@@ -9,7 +9,7 @@
#include
#include
#ifdef CONFIG_USB_EHCI_FSL
-#include
+#include
#endif
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
b/board/boundary/nitrogen6x/nitrogen6x.c
index 104d71f..a3a56ca 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -31,7 +31,7 @@
#include
#include
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22)
diff --git a/board/denx/m53evk/m53evk.c b/board/denx/m53evk/m53evk.c
index 5dd6cdd..934f009 100644
--- a/board/denx/m53evk/m53evk.c
+++ b/board/denx/m53evk/m53evk.c
@@ -22,7 +22,7 @@
#include
#include
#include
-#include
+#include
#include
#include
diff --git a/board/freescale/mx51evk/mx51evk.c
b/board/freescale/mx51evk/mx51evk.c
index c7c21f3..2ea5346 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -20,7 +20,7 @@
#include
#include
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mx6slevk/mx6slevk.c
b/board/freescale/mx6slevk/mx6slevk.c
index f440ce6..f1915a8 100644
--- a/board/freescale/mx6slevk/mx6slevk.c
+++ b/board/freescale/mx6slevk/mx6slevk.c
@@ -28,7 +28,7 @@
#include
#include "../common/pfuze.h"
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
index a240982..886373c 100644
--- a/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
+++ b/board/freescale/mx6sxsabreauto/mx6sxsabreauto.c
@@ -28,7 +28,7 @@
#include
#include "../common/pfuze.h"
#include
-#include
+#include
#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
index 41319c6..25e009e 100644
--- a/board/freescale/mx6sxsabresd/mx6sxsabresd.c
+++ b/board/freescale/mx6sxsabresd/mx6sxsabresd.c
@@ -27,7 +27,7 @@
#include
#include "../common/pfuze.h"
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
index 98d5675..88d3fbd 100644
--- a/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
+++ b/board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
@@ -27,7 +27,7 @@
#include
#include "../common/pfuze.h"
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c
b/board/freescale/mx7dsabresd/mx7dsabresd.c
index 4d0b195..c3062f1 100644
--- a/board/freescale/mx7dsabresd/mx7dsabresd.c
+++ b/board/freescale/mx7dsabresd/mx7dsabresd.c
@@ -24,7 +24,7 @@
#include
#include
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/board/solidrun/mx6cuboxi/mx6cuboxi.c
b/board/solidrun/mx6cuboxi/mx6cuboxi.c
index 823b70f..bcc9729 100644
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -33,7 +33,7 @@
#include
#include
#include
-#include
+#include
DECLARE_GLOBAL_DATA_PTR;
diff --git a/
[U-Boot] [PATCH v4 13/21] ehci: Add support for Qualcomm EHCI
This driver is able to reconfigure OTG controller into HOST mode.
Board can add board-specific initialization as board_prepare_usb().
It requires USB_ULPI_VIEWPORT enabled in board configuration.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Use PORT_... macro to write to portsc
- Remove extra whitespace in probe()
- Add acked-by
Changes in v1:
- Reordered header files
- Removed braces around constant
- Added more verbose help to KConfig
- Added ULPI dependency to Kconfig
- Drop register #defines - use ehci-ci.h instead
- Create fixed ulpi viewport for device
- Use setbits/clearbits where possible
- Use wait_for_bit to reset controller
- Add dt binding documents
doc/device-tree-bindings/usb/ehci-msm.txt | 10 ++
drivers/usb/host/Kconfig | 11 ++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-msm.c | 178 ++
4 files changed, 200 insertions(+)
create mode 100644 doc/device-tree-bindings/usb/ehci-msm.txt
create mode 100644 drivers/usb/host/ehci-msm.c
diff --git a/doc/device-tree-bindings/usb/ehci-msm.txt
b/doc/device-tree-bindings/usb/ehci-msm.txt
new file mode 100644
index 000..205bb07
--- /dev/null
+++ b/doc/device-tree-bindings/usb/ehci-msm.txt
@@ -0,0 +1,10 @@
+Chipidea EHCI controller (part of OTG controller) used on Qualcomm devices.
+
+Required properties:
+- compatible: must be "qcom,ehci-host"
+- reg: start address and size of the registers
+
+ehci@78d9000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x78d9000 0x400>;
+};
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 9332374..d2363c8 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -74,6 +74,17 @@ config USB_EHCI_MX6
---help---
Enables support for the on-chip EHCI controller on i.MX6 SoCs.
+config USB_EHCI_MSM
+ bool "Support for Qualcomm on-chip EHCI USB controller"
+ depends on DM_USB
+ select USB_ULPI_VIEWPORT
+ default n
+ ---help---
+ Enables support for the on-chip EHCI controller on Qualcomm
+ Snapdragon SoCs.
+ This driver supports combination of Chipidea USB controller
+ and Synapsys USB PHY in host mode only.
+
config USB_EHCI_GENERIC
bool "Support for generic EHCI USB controller"
depends on OF_CONTROL
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 9a87d2b..507519e 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o
obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
+obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
new file mode 100644
index 000..6484c1c
--- /dev/null
+++ b/drivers/usb/host/ehci-msm.c
@@ -0,0 +1,178 @@
+/*
+ * Qualcomm EHCI driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Based on Linux driver
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "ehci.h"
+
+/* PHY viewport regs */
+#define ULPI_MISC_A_READ 0x96
+#define ULPI_MISC_A_SET 0x97
+#define ULPI_MISC_A_CLEAR0x98
+#define ULPI_MISC_A_VBUSVLDEXTSEL(1 << 1)
+#define ULPI_MISC_A_VBUSVLDEXT (1 << 0)
+
+#define GEN2_SESS_VLD_CTRL_EN (1 << 7)
+
+#define SESS_VLD_CTRL (1 << 25)
+
+struct msm_ehci_priv {
+ struct ehci_ctrl ctrl; /* Needed by EHCI */
+ struct usb_ehci *ehci; /* Start of IP core*/
+ struct ulpi_viewport ulpi_vp; /* ULPI Viewport */
+};
+
+int __weak board_prepare_usb(enum usb_init_type type)
+{
+ return 0;
+}
+
+static void setup_usb_phy(struct msm_ehci_priv *priv)
+{
+ /* Select and enable external configuration with USB PHY */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_SET,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+}
+
+static void reset_usb_phy(struct msm_ehci_priv *priv)
+{
+ /* Disable VBUS mimicing in the controller. */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_CLEAR,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+}
+
+
+static int msm_init_after_reset(struct ehci_ctrl *dev)
+{
+ struct msm_ehci_priv *p = container_of(dev, struct msm_ehci_priv, ctrl);
+ struct usb_ehci *ehci = p->ehci;
+
+ /* select ULPI phy */
+ writel(PORT_PTS_ULPI, &ehci->portsc);
+ setup_u
[U-Boot] [PATCH v4 11/21] usb: ehci-ci: Add missing registers.
Some registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have
meaning on other devices.
The following registers were added:
sbusstatus/sbusmode: AHB-related registers
genconfig*: Auxiluary IP core configuration registers.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1: None
include/usb/ehci-ci.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 725aec5..305b180 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -191,7 +191,11 @@ struct usb_ehci {
u32 gptimer1_ld;/* 0x088 - General Purpose Timer 1 load value */
u32 gptimer1_ctrl; /* 0x08C - General Purpose Timer 1 control */
u32 sbuscfg;/* 0x090 - System Bus Interface Control */
- u8 res2[0x6C];
+ u32 sbusstatus; /* 0x094 - System Bus Interface Status */
+ u32 sbusmode; /* 0x098 - System Bus Interface Mode */
+ u32 genconfig; /* 0x09C - USB Core Configuration */
+ u32 genconfig2; /* 0x0A0 - USB Core Configuration 2 */
+ u8 res2[0x5c];
u8 caplength; /* 0x100 - Capability Register Length */
u8 res3[0x1];
u16 hciversion; /* 0x102 - Host Interface Version */
--
2.5.0
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[U-Boot] [PATCH v4 09/21] eth: asix88179: Print packet length properly
Debug printf used '%u' to print size_t variable.
This caused warnings on 64-bit machines.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Acked-by: Joe Hershberger
---
Changes in v4:
- Add Ack from Marek and Joe
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
drivers/usb/eth/asix88179.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c
index cf4085d..5e1ea86 100644
--- a/drivers/usb/eth/asix88179.c
+++ b/drivers/usb/eth/asix88179.c
@@ -497,7 +497,7 @@ static int asix_send(struct eth_device *eth, void *packet,
int length)
length + sizeof(packet_len) + sizeof(tx_hdr2),
&actual_len,
USB_BULK_SEND_TIMEOUT);
- debug("Tx: len = %u, actual = %u, err = %d\n",
+ debug("Tx: len = %zu, actual = %u, err = %d\n",
length + sizeof(packet_len), actual_len, err);
return err;
--
2.5.0
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[U-Boot] [PATCH v4 12/21] ehci-ci.h: drop generic USBCMD fields
Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add Acked-by
Changes in v1: None
drivers/usb/host/ehci-mpc512x.c | 4 ++--
include/usb/ehci-ci.h | 4
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index 4b50ac8..bb4f461 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -93,7 +93,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
unsigned int i;
/* Command a reset of the USB Controller */
- out_be32(&(ehci->usbcmd), EHCI_FSL_USBCMD_RST);
+ out_be32(&(ehci->usbcmd), CMD_RESET);
/* Wait for the reset process to finish */
for (i = 65535 ; i > 0 ; i--) {
@@ -101,7 +101,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
* The host will set this bit to zero once the
* reset process is complete
*/
- if ((in_be32(&(ehci->usbcmd)) & EHCI_FSL_USBCMD_RST) == 0)
+ if ((in_be32(&(ehci->usbcmd)) & CMD_RESET) == 0)
return 0;
}
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 305b180..586d32a 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -97,10 +97,6 @@
#define INTR_DATA_PULSING_EN (0x1<<30)
#define INTSTS_MASK(0x00ff)
-/* USBCMD Bits of interest */
-#define EHCI_FSL_USBCMD_RST(1 << 1)
-#define EHCI_FSL_USBCMD_RS (1 << 0)
-
#define INTERRUPT_ENABLE_BITS_MASK \
(INTR_USB_ID_EN | \
INTR_1MS_TIMER_EN | \
--
2.5.0
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[U-Boot] [PATCH v4 07/21] usb: ulpi: Fix viewport_addr type
viewport_addr is address of memory mapped ULPI viewport.
It is used only as argument to readl/writel later
causing compile warnings on 64-bit devices.
This fix changes its type to match pointer size.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
---
Changes in v4:
- Add Ack from Marek
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
include/usb/ulpi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index 4fa765b..dfea395 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -32,7 +32,7 @@
* be extended from this structure
*/
struct ulpi_viewport {
- u32 viewport_addr;
+ uintptr_t viewport_addr;
u32 port_num;
};
--
2.5.0
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[U-Boot] [PATCH v4 08/21] usb: ulpi: Fix compile warning in read/write on 64-bit machines.
ulpi_read and ulpi_write are used to read/write registers via ULPI bus.
Code generates compilation warnings on 64-bit machines where pointer
is cast to u32.
This patch drops all but last 8 bits of register address.
It is possible, because addresses on ULPI bus are 6- or 8-bit.
It is not possible (according to ULPI 1.1 spec) to have more
than 8-bit addressing.
This patch should not cause regressions as all calls to
ulpi_read/write use either structure pointer (@ address 0) or integer
offsets cast to pointer - addresses requested are way below 8-bit range.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
---
Changes in v4:
- Add Ack from Marek
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
drivers/usb/ulpi/ulpi-viewport.c | 5 +++--
include/usb/ulpi.h | 2 ++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
index 72a06de..d111680 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -92,7 +92,8 @@ static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32
value)
int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
{
- u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg << 16) | (value & 0xff);
+ u32 addr = (uintptr_t)reg & 0xFF;
+ u32 val = ULPI_RWRUN | ULPI_RWCTRL | addr << 16 | (value & 0xff);
val |= (ulpi_vp->port_num & 0x7) << 24;
return ulpi_request(ulpi_vp, val);
@@ -101,7 +102,7 @@ int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32
value)
u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
{
int err;
- u32 val = ULPI_RWRUN | ((u32)reg << 16);
+ u32 val = ULPI_RWRUN | ((uintptr_t)reg & 0xFF) << 16;
val |= (ulpi_vp->port_num & 0x7) << 24;
err = ulpi_request(ulpi_vp, val);
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index dfea395..747fb0a 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -123,6 +123,7 @@ int ulpi_reset(struct ulpi_viewport *ulpi_vp);
/*
* Write to the ULPI PHY register via the viewport.
* @reg- the ULPI register (one of the fields in struct
ulpi_regs).
+ * Due to ULPI design, only 8 lsb of address are used.
* @value - the value - only 8 lower bits are used, others ignored.
*
* returns 0 on success, ULPI_ERROR on failure.
@@ -132,6 +133,7 @@ int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32
value);
/*
* Read the ULPI PHY register content via the viewport.
* @reg- the ULPI register (one of the fields in struct
ulpi_regs).
+ * Due to ULPI design, only 8 lsb of address are used.
*
* returns register content on success, ULPI_ERROR on failure.
*/
--
2.5.0
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[U-Boot] [PATCH v4 06/21] Migrate CONFIG_ULPI* to Kconfig
Move CONFIG_USB_ULPI* from headers to defconfigs for boards that use it. Also - add CONFIG_USB where necesarry - all boards use it, but some are not defining it explicitly. Affected boards: colibri_t20, harmony, mcx, mt_ventoux, twister, zynq_(picozed, zc702, zc706, zed, zybo) Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v4: None Changes in v3: None Changes in v2: - New patch, independent of the rest - Should compile cleanly on all affected platforms - Is orthogonal to series (i.e. if get's NAK will not break rest of series) Changes in v1: None configs/colibri_t20_defconfig| 2 ++ configs/harmony_defconfig| 2 ++ configs/mcx_defconfig| 3 +++ configs/mt_ventoux_defconfig | 3 +++ configs/twister_defconfig| 3 +++ configs/zynq_picozed_defconfig | 2 ++ configs/zynq_zc702_defconfig | 2 ++ configs/zynq_zc706_defconfig | 2 ++ configs/zynq_zed_defconfig | 2 ++ configs/zynq_zybo_defconfig | 2 ++ include/configs/colibri_t20.h| 3 +-- include/configs/harmony.h| 2 -- include/configs/mcx.h| 2 -- include/configs/tam3517-common.h | 2 -- include/configs/zynq-common.h| 2 -- 15 files changed, 24 insertions(+), 10 deletions(-) diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index c36967d..3813e96 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -21,4 +21,6 @@ CONFIG_DM_USB=y CONFIG_USB_GADGET=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index c150f6e..d4aafe9 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -21,4 +21,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index a25ffcf..9c9d51a 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -12,3 +12,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index c537440..45913d4 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -10,3 +10,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index 06c98eb..064cf91 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -10,3 +10,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y CONFIG_OF_LIBFDT=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 67e38e5..c730f3c 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -14,3 +14,5 @@ CONFIG_ZYNQ_SDHCI=y CONFIG_ZYNQ_GEM=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index d1740a7..e8d28e4 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -26,3 +26,5 @@ CONFIG_DEBUG_UART_CLOCK=5000 CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index d3ae438..d19108f 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -23,3 +23,5 @@ CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 9ad33ff..b13de10 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -23,3 +23,5 @@ CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 470c9cb..4a59890 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -24,3 +24,5 @@ CONFIG_DEBUG_UART_CLOCK=5000 CONFIG_ZYNQ_QSPI=y CONFIG_USB=y CONFIG_USB_GADGET=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index b7ad189..e97e5a1 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -36,8 +36,7 @@ /* USB host support */ #define CONFIG_USB_EHCI #define CONFIG_USB_EHCI_TEGRA -#define CONFIG_USB_ULPI -#define CONFIG_USB_ULPI_VIEWPORT +#define CONFIG_USB_MAX_CONTROLLER_COUNT3 #define CONFIG_USB_STORAGE #define CONFIG_CMD_USB diff --git a/include/co
[U-Boot] [PATCH v4 05/21] usb: ulpi: Add Kconfig options for ULPI
The following options can be now enabled via defconfig: - CONFIG_USB_ULPI - CONFIG_USB_ULPI_VIEWPORT - CONFIG_USB_ULPI_VIEWPORT_OMAP Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass Acked-by: Marek Vasut --- Changes in v4: - Add Ack from Marek Changes in v3: None Changes in v2: - Add better (any) descriptions for Kconfig items. Changes in v1: None drivers/usb/Kconfig | 2 ++ drivers/usb/ulpi/Kconfig | 33 + 2 files changed, 35 insertions(+) create mode 100644 drivers/usb/ulpi/Kconfig diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 7fa99c6..bccf43e 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -53,6 +53,8 @@ source "drivers/usb/musb-new/Kconfig" source "drivers/usb/emul/Kconfig" +source "drivers/usb/ulpi/Kconfig" + comment "USB peripherals" config USB_STORAGE diff --git a/drivers/usb/ulpi/Kconfig b/drivers/usb/ulpi/Kconfig new file mode 100644 index 000..329d2df --- /dev/null +++ b/drivers/usb/ulpi/Kconfig @@ -0,0 +1,33 @@ +comment "ULPI drivers" + +choice + prompt "ULPI Viewport type" + optional + default n + help + Select ULPI viewport (SoC-side interface to ULPI) implementation + appropriate for the device if you want to communicate with + UTMI (USB PHY) via ULPI interface. + +config USB_ULPI_VIEWPORT + bool "Generic ULPI Viewport" + help + Support generic ULPI Viewport implementation that is used on + some Tegra and Snapdragon devices. + +config USB_ULPI_VIEWPORT_OMAP + bool "OMAP ULPI Viewport" + help + Support ULPI Viewport implementation that is used on OMAP devices. + +endchoice + +config USB_ULPI + bool "ULPI support" + depends on (USB_ULPI_VIEWPORT || USB_ULPI_VIEWPORT_OMAP) + help + Select to commnicate with USB PHY via ULPI interface. + ULPI is wrapper on UTMI+ core that is used as + PHY Transreceiver for USB controllers. + + This driver uses ULPI viewports that are specific for each SoC. -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 03/21] mmc: Add support for Qualcomm SDHCI controller
Add support for SD/eMMC controller present on some Qualcomm Snapdragon
devices. This controller implements SDHCI 2.0 interface but requires
vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1:
- Added commit message
- Added DT binding documentation
- Added Kconfig help
- Reordered includes
- Dropped redundant fields from msm_sdhc
- Cleaned up clock init code (+ added error handling)
- Dropped mdelay - use wait_for_bit instead in reset code
- Added missing newline after declarations
- Added error handling if "reg" is missing
- Converted base address to pointer
doc/device-tree-bindings/mmc/msm_sdhci.txt | 25
drivers/mmc/Kconfig| 9 ++
drivers/mmc/Makefile | 1 +
drivers/mmc/msm_sdhci.c| 180 +
4 files changed, 215 insertions(+)
create mode 100644 doc/device-tree-bindings/mmc/msm_sdhci.txt
create mode 100644 drivers/mmc/msm_sdhci.c
diff --git a/doc/device-tree-bindings/mmc/msm_sdhci.txt
b/doc/device-tree-bindings/mmc/msm_sdhci.txt
new file mode 100644
index 000..08a290c
--- /dev/null
+++ b/doc/device-tree-bindings/mmc/msm_sdhci.txt
@@ -0,0 +1,25 @@
+Qualcomm Snapdragon SDHCI controller
+
+Required properties:
+- compatible : "qcom,sdhci-msm-v4"
+- reg: Base address and length of registers:
+ - Host controller registers (SDHCI)
+ - SD Core registers
+- clock: interface clock (must accept SD bus clock as a frequency)
+
+Optional properties:
+- index: If there is more than one controller - controller index (required
+ by generic SDHCI code).
+- bus_width: Width of SD/eMMC bus (default 4)
+- clock-frequency: Frequency of SD/eMMC bus (default 400 kHz)
+
+Example:
+
+sdhci@07864000 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7864900 0x11c 0x7864000 0x800>;
+ index = <0x1>;
+ bus-width = <0x4>;
+ clock = <&clkc 1>;
+ clock-frequency = <2>;
+};
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index dc8532f..4d3df11 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -16,6 +16,15 @@ config DM_MMC
appear as block devices in U-Boot and can support filesystems such
as EXT4 and FAT.
+config MSM_SDHCI
+ bool "Qualcomm SDHCI controller"
+ depends on DM_MMC
+ help
+ Enables support for SDHCI 2.0 controller present on some Qualcomm
+ Snapdragon devices. This device is compatible with eMMC v4.5 and
+ SD 3.0 specifications. Both SD and eMMC devices are supported.
+ Card-detect gpios are not supported.
+
config ROCKCHIP_DWMMC
bool "Rockchip SD/MMC controller support"
depends on DM_MMC && OF_CONTROL
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index b85e4bf..585aaf3 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -50,3 +50,4 @@ else
obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
endif
obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
+obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
new file mode 100644
index 000..1e2a29b
--- /dev/null
+++ b/drivers/mmc/msm_sdhci.c
@@ -0,0 +1,180 @@
+/*
+ * Qualcomm SDHCI driver - SD/eMMC controller
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Based on Linux driver
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Non-standard registers needed for SDHCI startup */
+#define SDCC_MCI_POWER 0x0
+#define SDCC_MCI_POWER_SW_RST BIT(7)
+
+/* This is undocumented register */
+#define SDCC_MCI_VERSION 0x50
+#define SDCC_MCI_VERSION_MAJOR_SHIFT 28
+#define SDCC_MCI_VERSION_MAJOR_MASK (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
+#define SDCC_MCI_VERSION_MINOR_MASK 0xff
+
+#define SDCC_MCI_STATUS2 0x6C
+#define SDCC_MCI_STATUS2_MCI_ACT 0x1
+#define SDCC_MCI_HC_MODE 0x78
+
+/* Offset to SDHCI registers */
+#define SDCC_SDHCI_OFFSET 0x900
+
+/* Non standard (?) SDHCI register */
+#define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c
+
+struct msm_sdhc {
+ struct sdhci_host host;
+ void *base;
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int msm_sdc_clk_init(struct udevice *dev)
+{
+ uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+ "clock-frequency", 40);
+ uint clkd[2]; /* clk_id and clk_no */
+ int clk_offset;
+ struct udevice *clk;
+ int ret;
+
+ ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clock", clkd,
+ 2);
+ if (ret)
+ return ret;
+
+
[U-Boot] [PATCH v4 02/21] gpio: Add support for Qualcomm gpio controller
Add support for gpio controllers on Qualcomm Snapdragon devices.
This devices are usually called Top Level Mode Multiplexing in
Qualcomm documentation.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Reordered includes (again)
- Added newlines between returns
- Fixed error handling in msm_gpio_probe
- Added reviewed-by
Changes in v1:
- Added dt binding documentation
- Added help to KConfig
- Use clrsetbits() to switch direction
- Fixed include order
- Added #defines for registers/register fields
- Added secondary compatible string
doc/device-tree-bindings/gpio/gpio-msm.txt | 22 +
drivers/gpio/Kconfig | 14 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/msm_gpio.c| 135 +
4 files changed, 172 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/gpio-msm.txt
create mode 100644 drivers/gpio/msm_gpio.c
diff --git a/doc/device-tree-bindings/gpio/gpio-msm.txt
b/doc/device-tree-bindings/gpio/gpio-msm.txt
new file mode 100644
index 000..966ce0a
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio-msm.txt
@@ -0,0 +1,22 @@
+Qualcomm Snapdragon GPIO controller
+
+Required properties:
+- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl"
+- reg : Physical base address and length of the controller's registers.
+ This controller is called "Top Level Mode Multiplexing" in
+ Qualcomm documentation.
+- #gpio-cells : Should be one (pin number).
+- gpio-controller : Marks the device node as a GPIO controller.
+- gpio-count: Number of GPIO pins.
+- gpio-bank-name: (optional) name of gpio bank. As default "soc" is used.
+
+Example:
+
+soc_gpios: pinctrl@100 {
+ compatible = "qcom,msm8916-pinctrl";
+ reg = <0x100 0x30>;
+ gpio-controller;
+ gpio-count = <122>;
+ gpio-bank-name="soc";
+ #gpio-cells = <1>;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 2311309..4d9e74c 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -55,6 +55,20 @@ config LPC32XX_GPIO
help
Support for the LPC32XX GPIO driver.
+config MSM_GPIO
+ bool "Qualcomm GPIO driver"
+ depends on DM_GPIO
+ default n
+ help
+ Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
+ This controller have single bank (default name "soc"), every
+ gpio has it's own set of registers.
+ Only simple GPIO operations are supported (get/set, change of
+ direction and checking pin function).
+ Supported devices:
+ - APQ8016
+ - MSM8916
+
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index ea6e2ed..4162c3c 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -50,3 +50,4 @@ obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
obj-$(CONFIG_MVEBU_GPIO) += mvebu_gpio.o
+obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
new file mode 100644
index 000..950f309
--- /dev/null
+++ b/drivers/gpio/msm_gpio.c
@@ -0,0 +1,135 @@
+/*
+ * Qualcomm GPIO driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register offsets */
+#define GPIO_CONFIG_OFF(no) ((no) * 0x1000)
+#define GPIO_IN_OUT_OFF(no) ((no) * 0x1000 + 0x4)
+
+/* OE */
+#define GPIO_OE_DISABLE (0x0 << 9)
+#define GPIO_OE_ENABLE (0x1 << 9)
+#define GPIO_OE_MASK (0x1 << 9)
+
+/* GPIO_IN_OUT register shifts. */
+#define GPIO_IN 0
+#define GPIO_OUT 1
+
+struct msm_gpio_bank {
+ phys_addr_t base;
+};
+
+static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+ phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
+
+ /* Disable OE bit */
+ clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE);
+
+ return 0;
+}
+
+static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+
+ value = !!value;
+ /* set value */
+ writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
+
+ return 0;
+}
+
+static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
+int value)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+ phys_addr_t reg = priv-&
[U-Boot] [PATCH v4 04/21] ehci-hcd: Add init_after_reset
Some host controllers need addidional initialization after ehci_reset()
In non-dm implementation it is possible to use CONFIG_EHCI_HCD_INIT_AFTER_RESET.
This patch adds similar option to ehci drivers using dm.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Reviewed-by: Tom Rini
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- Add Reviewed-by (sjg)
Changes in v1:
- No changes, just added Acked-by, Reviewed-by
drivers/usb/host/ehci-hcd.c | 6 ++
drivers/usb/host/ehci.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 0113c6c..598f444 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1615,6 +1615,12 @@ int ehci_register(struct udevice *dev, struct ehci_hccr
*hccr,
if (ret)
goto err;
+ if (ops->init_after_reset) {
+ ret = ops->init_after_reset(ctrl);
+ if (ret)
+ goto err;
+ }
+
ret = ehci_common_init(ctrl, tweaks);
if (ret)
goto err;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 826b3fe..734d7f0 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -240,6 +240,7 @@ struct ehci_ops {
void (*powerup_fixup)(struct ehci_ctrl *ctrl, uint32_t *status_reg,
uint32_t *reg);
uint32_t *(*get_portsc_register)(struct ehci_ctrl *ctrl, int port);
+ int (*init_after_reset)(struct ehci_ctrl *ctrl);
};
struct ehci_ctrl {
--
2.5.0
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 01/21] serial: Add support for Qualcomm serial port
This driver works in "new" Data Mover UART mode, so
will be compatible with modern Qualcomm chips only.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v4: None
Changes in v3:
- Add msm_serial_fetch that tries to fetch characters from FIFO
- Decrease no of characters requested in RX transaction
- Try to fetch characters from FIFO when tstc()/pending() is called
Changes in v2:
- Added newline before return... (globally)
- Renamed p to priv (priv data) - it required some rewrapping
- Added Reviewed-by
Changes in v1:
- Added (better) help to KConfig
- Added dt binding documentation
- Fixed include ordering
- Reworked msm_serial_getc
- Added error handling to msm_uart_clk_init (that is ignored later for now)
- Dropped unneeded DM_FLAG_PRE_RELOC
doc/device-tree-bindings/serial/msm-serial.txt | 6 +
drivers/serial/Kconfig | 8 +
drivers/serial/Makefile| 1 +
drivers/serial/serial_msm.c| 217 +
4 files changed, 232 insertions(+)
create mode 100644 doc/device-tree-bindings/serial/msm-serial.txt
create mode 100644 drivers/serial/serial_msm.c
diff --git a/doc/device-tree-bindings/serial/msm-serial.txt
b/doc/device-tree-bindings/serial/msm-serial.txt
new file mode 100644
index 000..48b8428
--- /dev/null
+++ b/doc/device-tree-bindings/serial/msm-serial.txt
@@ -0,0 +1,6 @@
+Qualcomm UART (Data Mover mode)
+
+Required properties:
+- compatible: must be "qcom,msm-uartdm-v1.4"
+- reg: start address and size of the registers
+- clock: interface clock (must accept baudrate as a frequency)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 2a770a1..a9a5d47 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -320,4 +320,12 @@ config XILINX_UARTLITE
If you have a Xilinx based board and want to use the uartlite
serial ports, say Y to this option. If unsure, say N.
+config MSM_SERIAL
+ bool "Qualcomm on-chip UART"
+ depends on DM_SERIAL
+ help
+ Support Data Mover UART used on Qualcomm Snapdragon SoCs.
+ It should support all Qualcomm devices with UARTDM version 1.4,
+ for example APQ8016 and MSM8916.
+ Single baudrate is supported in current implementation (115200).
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index ee7147a..b0ac9d8 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
obj-$(CONFIG_BCM283X_MU_SERIAL) += serial_bcm283x_mu.o
+obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
new file mode 100644
index 000..80fb89e
--- /dev/null
+++ b/drivers/serial/serial_msm.c
@@ -0,0 +1,217 @@
+/*
+ * Qualcomm UART driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * UART will work in Data Mover mode.
+ * Based on Linux driver.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Serial registers - this driver works in uartdm mode*/
+
+#define UARTDM_DMRX 0x34 /* Max RX transfer length */
+#define UARTDM_NCF_TX 0x40 /* Number of chars to TX */
+
+#define UARTDM_RXFS 0x50 /* RX channel status register */
+#define UARTDM_RXFS_BUF_SHIFT 0x7 /* Number of bytes in the packing buffer
*/
+#define UARTDM_RXFS_BUF_MASK0x7
+
+#define UARTDM_SR0xA4 /* Status register */
+#define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */
+#define UARTDM_SR_TX_EMPTY (1 << 3) /* Transmitter underrun */
+#define UARTDM_SR_UART_OVERRUN (1 << 4) /* Receive overrun */
+
+#define UARTDM_CR 0xA8 /* Command register */
+#define UARTDM_CR_CMD_RESET_ERR (3 << 4) /* Clear overrun error */
+#define UARTDM_CR_CMD_RESET_STALE_INT (8 << 4) /* Clears stale irq */
+#define UARTDM_CR_CMD_RESET_TX_READY (3 << 8) /* Clears TX Ready irq*/
+#define UARTDM_CR_CMD_FORCE_STALE (4 << 8) /* Causes stale event */
+#define UARTDM_CR_CMD_STALE_EVENT_DISABLE (6 << 8) /* Disable stale event */
+
+#define UARTDM_IMR0xB0 /* Interrupt mask register */
+#define UARTDM_ISR0xB4 /* Interrupt status register */
+#define UARTDM_ISR_TX_READY 0x80 /* TX FIFO empty */
+
+#define UARTDM_TF 0x100 /* UART Transmit FIFO register */
+#define UARTDM_RF 0x140 /* UART Receive FIFO register */
+
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct msm_serial_data {
+ phys_addr_t base;
+ unsigned chars_cnt; /* number of buffered chars */
+
[U-Boot] [PATCH v4 00/21] Add support for 96boards Dragonboard410C board
ndbox -> msm_reset (typo in reset.c) - Renamed CONFIG_DM_SPMI -> CONFIG_SPMI - Removed extra enter in dragonboard file - Added ULPI* to defconfig - Added MAINTAINERS to board - Cleaned up config file - use distro defaults/environment: - Dropped multiple CONFIG_CMD* and other CONFIG_* - Added distro env/config - Dropped old boot commands - Split dts - pm8916_gpio entries are taken directly from Linux Dragonboard dts; Add handles for u-boot in -uboot.dtsi; They will be removed once gpio drivers are converted to pinctrl. - Renamed some pmic nodes, fixed dragonboard.c to find them properly. - Added header and converted comments to c98-style in head.S - Print error if pmic gpio node is not found. - New patch Changes in v1: - Added (better) help to KConfig - Added dt binding documentation - Fixed include ordering - Reworked msm_serial_getc - Added error handling to msm_uart_clk_init (that is ignored later for now) - Dropped unneeded DM_FLAG_PRE_RELOC - Added dt binding documentation - Added help to KConfig - Use clrsetbits() to switch direction - Fixed include order - Added #defines for registers/register fields - Added secondary compatible string - Added commit message - Added DT binding documentation - Added Kconfig help - Reordered includes - Dropped redundant fields from msm_sdhc - Cleaned up clock init code (+ added error handling) - Dropped mdelay - use wait_for_bit instead in reset code - Added missing newline after declarations - Added error handling if "reg" is missing - Converted base address to pointer - No changes, just added Acked-by, Reviewed-by - Reordered header files - Removed braces around constant - Added more verbose help to KConfig - Added ULPI dependency to Kconfig - Drop register #defines - use ehci-ci.h instead - Create fixed ulpi viewport for device - Use setbits/clearbits where possible - Use wait_for_bit to reset controller - Add dt binding documents - Reorder includes - Add read/write arguments documentation - add binding documentation and better Kconfig help - Changed a bit mapping - Change include order - Use clrsetbits* where possible - Add one more supported dts id - Handle missing fields in dt properly - Added dt bindings - Reoder includes - Replaced extract_* macros with ordinary shift/mask - Added error checking and whitespaces in probe - Add binding doc - Fixed inlcude ordering - Merged direction_input and direction_output functions - gpio_get: use switch instead of stacked if - use pmic_clrsetbits - add possibility to change prwkey bank name - Handle invalid bindings - Sanity HW check (i.e. check type/subtype registers) - Fix include order - Cleanup defines (added spaces for readibility) - Base address is integer to avoid casting - Use setbits_* family where possible - Drop unneded comments, added newlines where needed - Check return value of dev_get_addr - Add binding for apq8016 - Cleaned up divider calculation - Drop most of gpio.h (only empty file is needed) - Add better help for dragonboard - Move static structures to board_prepare_usb - Add DM_SPMI to defconfig Mateusz Kulikowski (21): serial: Add support for Qualcomm serial port gpio: Add support for Qualcomm gpio controller mmc: Add support for Qualcomm SDHCI controller ehci-hcd: Add init_after_reset usb: ulpi: Add Kconfig options for ULPI Migrate CONFIG_ULPI* to Kconfig usb: ulpi: Fix viewport_addr type usb: ulpi: Fix compile warning in read/write on 64-bit machines. eth: asix88179: Print packet length properly usb: Rename ehci-fsl.h to ehci-ci.h usb: ehci-ci: Add missing registers. ehci-ci.h: drop generic USBCMD fields ehci: Add support for Qualcomm EHCI drivers: Add SPMI bus uclass spmi: Add sandbox test driver drivers: spmi: Add support for Qualcomm SPMI bus driver pmic: Add support for Qualcomm PM8916 PMIC gpio: Add support for Qualcomm PM8916 gpios arm: Add support for Qualcomm Snapdragon family board: Add Qualcomm Dragonboard 410C support Add myself as Snapdragon and SPMI maintainer MAINTAINERS| 11 + arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/dragonboard410c-uboot.dtsi| 28 ++ arch/arm/dts/dragonboard410c.dts | 148 ++ arch/arm/mach-snapdragon/Kconfig | 26 ++ arch/arm/mach-snapdragon/Makefile | 9 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 ++ arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 + arch/arm/mach-snapdragon/reset.c | 40 +++ arch/arm/mach-snapdragon/sysmap-apq8016.c | 30 ++ arch/powerpc/cpu/mpc83xx/cpu_init.c| 2 +- arch/sandbox/dts/sandbox.dts | 20 ++ arch/sandbox/dts/test.dts
[U-Boot] [PATCH v3 20/21] board: Add Qualcomm Dragonboard 410C support
This commit add support for 96Boards Dragonboard410C.
It is board based on APQ8016 Qualcomm SoC, complying with
96boards specification.
Features (present out of the box):
- 4x Cortex A53 (ARMv8)
- 2x USB Host port
- 1x USB Device port
- 4x LEDs
- 1x HDMI connector
- 1x uSD connector
- 3x buttons (Power, Vol+, Vol-/Reset)
- WIFI, Bluetooth with integrated antenna
- 8GiB eMMC
U-Boot boots chained with fastboot in 64-bit mode.
For detailed build instructions see readme.txt in board directory.
Signed-off-by: Mateusz Kulikowski
Tested-by: Simon Glass
---
Changes in v3:
- readme: Added info on how to enter fastboot mode and that
dtbTool is also part of skales. Added more explanation
on image generation.
- head: Add comment why it's needed, drop MZ EFI signature
that makes no sense on this particular SoC, fix confusing
entry point name (+update .lds file)
Changes in v2:
- Renamed CONFIG_DM_SPMI -> CONFIG_SPMI
- Removed extra enter in dragonboard file
- Added ULPI* to defconfig
- Added MAINTAINERS to board
- Cleaned up config file - use distro defaults/environment:
- Dropped multiple CONFIG_CMD* and other CONFIG_*
- Added distro env/config
- Dropped old boot commands
- Split dts - pm8916_gpio entries are taken directly from
Linux Dragonboard dts; Add handles for u-boot in -uboot.dtsi;
They will be removed once gpio drivers are converted to pinctrl.
- Renamed some pmic nodes, fixed dragonboard.c to find them properly.
- Added header and converted comments to c98-style in head.S
- Print error if pmic gpio node is not found.
Changes in v1:
- Add better help for dragonboard
- Move static structures to board_prepare_usb
- Add DM_SPMI to defconfig
arch/arm/dts/Makefile| 2 +
arch/arm/dts/dragonboard410c-uboot.dtsi | 28 +
arch/arm/dts/dragonboard410c.dts | 148 ++
arch/arm/mach-snapdragon/Kconfig | 20 +++
board/qualcomm/dragonboard410c/Kconfig | 15 +++
board/qualcomm/dragonboard410c/MAINTAINERS | 6 +
board/qualcomm/dragonboard410c/Makefile | 8 ++
board/qualcomm/dragonboard410c/dragonboard410c.c | 131 +++
board/qualcomm/dragonboard410c/head.S| 34 +
board/qualcomm/dragonboard410c/readme.txt| 71 +++
board/qualcomm/dragonboard410c/u-boot.lds| 90 +
configs/dragonboard410c_defconfig| 31 +
include/configs/dragonboard410c.h| 153 +++
13 files changed, 737 insertions(+)
create mode 100644 arch/arm/dts/dragonboard410c-uboot.dtsi
create mode 100644 arch/arm/dts/dragonboard410c.dts
create mode 100644 board/qualcomm/dragonboard410c/Kconfig
create mode 100644 board/qualcomm/dragonboard410c/MAINTAINERS
create mode 100644 board/qualcomm/dragonboard410c/Makefile
create mode 100644 board/qualcomm/dragonboard410c/dragonboard410c.c
create mode 100644 board/qualcomm/dragonboard410c/head.S
create mode 100644 board/qualcomm/dragonboard410c/readme.txt
create mode 100644 board/qualcomm/dragonboard410c/u-boot.lds
create mode 100644 configs/dragonboard410c_defconfig
create mode 100644 include/configs/dragonboard410c.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 578038b..3515bea 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -105,6 +105,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \
fsl-ls1043a-rdb.dtb
+dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
+
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi
b/arch/arm/dts/dragonboard410c-uboot.dtsi
new file mode 100644
index 000..cc2c175
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -0,0 +1,28 @@
+/*
+ * U-Boot addition to handle Dragonboard 410c pins
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+&pm8916_gpios {
+ usb_hub_reset_pm {
+ gpios = <&pm8916_gpios 2 0>;
+ };
+
+ usb_sw_sel_pm {
+ gpios = <&pm8916_gpios 3 0>;
+ };
+};
+
+
+&pm8916_pon {
+ key_vol_down {
+ gpios = <&pm8916_pon 1 0>;
+ };
+
+ key_power {
+ gpios = <&pm8916_pon 0 0>;
+ };
+};
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
new file mode 100644
index 000..7746622
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -0,0 +1,148 @@
+/*
+ * Qualcomm APQ8016 based Dragonboard 410C board device tree source
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "skeleton64.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. Dragonboard 410c";
+ compatible = "qcom,dr
[U-Boot] [PATCH v3 21/21] Add myself as Snapdragon and SPMI maintainer
- Update MAINTAINERS - Update git-mailrc Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v3: None Changes in v2: - New patch Changes in v1: None MAINTAINERS| 11 +++ doc/git-mailrc | 3 +++ 2 files changed, 14 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 9d447ea..93c6c72 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -125,6 +125,11 @@ F: arch/arm/mach-s5pc1xx/ F: arch/arm/cpu/armv7/s5p-common/ F: arch/arm/include/asm/arch-s3c24x0/ +ARM SNAPDRAGON +M: Mateusz Kulikowski +S: Maintained +F: arch/arm/mach-snapdragon/ + ARM STM SPEAR #M:Vipin Kumar S: Orphaned (Since 2016-02) @@ -389,6 +394,12 @@ F: drivers/mtd/spi/ F: drivers/spi/ F: include/spi* +SPMI +M: Mateusz Kulikowski +S: Maintained +F: drivers/spmi/ +F: include/spmi/ + TQ GROUP #M:Martin Krause S: Orphaned (Since 2016-02) diff --git a/doc/git-mailrc b/doc/git-mailrc index ced7085..1201d4a 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -33,6 +33,7 @@ alias lukma Lukasz Majewski alias macpaulMacpaul Lin alias marex Marek Vasut alias masahiro Masahiro Yamada +alias mateuszMateusz Kulikowski alias monstr Michal Simek alias panto Pantelis Antoniou alias prafulla Prafulla Wadaskar @@ -67,6 +68,7 @@ alias rmobileuboot, iwamatsu alias s3csamsung alias s5pc samsung alias samsunguboot, prom +alias snapdragon uboot, mateusz alias socfpgauboot, marex, Dinh Nguyen alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren , Stephen Warren @@ -127,6 +129,7 @@ alias nand uboot, scottwood alias netuboot, jhersh alias phyuboot, jhersh alias spiuboot, jagan +alias spmi uboot, mateusz alias ubiuboot, hs alias usbuboot, marex alias video uboot, ag -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 19/21] arm: Add support for Qualcomm Snapdragon family
First supported chip is APQ8016 (that is compatible with MSM8916). Drivers in SoC code: - Reset controller (PSHOLD) - Clock controller (very simple clock configuration for MMC and UART) Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass Tested-by: Simon Glass --- Changes in v3: None Changes in v2: - Rename DM_SPMI -> SPMI - Make MND divider comments more compact :) - p -> priv - Add reviewed-by - Reordered Kconfig to keep alphabetical order - Renamed reset_sandbox -> msm_reset (typo in reset.c) Changes in v1: - Fix include order - Cleanup defines (added spaces for readibility) - Base address is integer to avoid casting - Use setbits_* family where possible - Drop unneded comments, added newlines where needed - Check return value of dev_get_addr - Add binding for apq8016 - Cleaned up divider calculation - Drop most of gpio.h (only empty file is needed) arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/mach-snapdragon/Kconfig | 6 + arch/arm/mach-snapdragon/Makefile | 8 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 + arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 ++ arch/arm/mach-snapdragon/reset.c | 40 8 files changed, 352 insertions(+) create mode 100644 arch/arm/mach-snapdragon/Kconfig create mode 100644 arch/arm/mach-snapdragon/Makefile create mode 100644 arch/arm/mach-snapdragon/clock-apq8016.c create mode 100644 arch/arm/mach-snapdragon/include/mach/gpio.h create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h create mode 100644 arch/arm/mach-snapdragon/reset.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6e5544f..2cb96e2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -504,6 +504,16 @@ config RMOBILE bool "Renesas ARM SoCs" select CPU_V7 +config ARCH_SNAPDRAGON + bool "Qualcomm Snapdragon SoCs" + select ARM64 + select DM + select DM_GPIO + select DM_SERIAL + select SPMI + select OF_CONTROL + select OF_SEPARATE + config ARCH_SOCFPGA bool "Altera SOCFPGA family" select CPU_V7 @@ -762,6 +772,8 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" +source "arch/arm/mach-snapdragon/Kconfig" + source "arch/arm/mach-socfpga/Kconfig" source "arch/arm/mach-stm32/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 6defdfb..bb2666c 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -54,6 +54,7 @@ machine-$(CONFIG_ARCH_MVEBU) += mvebu # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx +machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip machine-$(CONFIG_STM32)+= stm32 diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig new file mode 100644 index 000..156e733 --- /dev/null +++ b/arch/arm/mach-snapdragon/Kconfig @@ -0,0 +1,6 @@ +if ARCH_SNAPDRAGON + +config SYS_SOC + default "snapdragon" + +endif diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile new file mode 100644 index 000..8e84705 --- /dev/null +++ b/arch/arm/mach-snapdragon/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2015 Mateusz Kulikowski +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += clock-apq8016.o +obj-y += reset.o diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c new file mode 100644 index 000..d548d75 --- /dev/null +++ b/arch/arm/mach-snapdragon/clock-apq8016.c @@ -0,0 +1,262 @@ +/* + * Clock drivers for Qualcomm APQ8016 + * + * (C) Copyright 2015 Mateusz Kulikowski + * + * Based on Little Kernel driver, simplified + * + * SPDX-License-Identifier:BSD-3-Clause + */ + +#include +#include +#include +#include +#include +#include + +/* GPLL0 clock control registers */ +#define GPLL0_STATUS0x2101C +#define GPLL0_STATUS_ACTIVE BIT(17) + +#define APCS_GPLL_ENA_VOTE 0x45000 +#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0) + +/* vote reg for blsp1 clock */ +#define APCS_CLOCK_BRANCH_ENA_VOTE 0x45004 +#define APCS_CLOCK_BRANCH_ENA_VOTE_BLSP1 BIT(10) + +/* SDC(n) clock control registers; n=1,2 */ + +/* block control register */ +#define SDCC_BCR(n) ((n * 0x1000) + 0x41000) +/* cmd */ +#define SDCC_CMD_RCGR(n)((n * 0x1000) + 0x41004) +/* cfg */ +#define SDCC_CFG_RCGR(n)((n * 0x1000) + 0x41008) +/* m */ +#define SDCC_M(n) ((n * 0x1000) + 0x4100C) +/* n */ +#define
[U-Boot] [PATCH v3 18/21] gpio: Add support for Qualcomm PM8916 gpios
This driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itself as GPIO with 2 inputs (power and reset)
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add Reviewed-by
Changes in v1:
- Add binding doc
- Fixed inlcude ordering
- Merged direction_input and direction_output functions
- gpio_get: use switch instead of stacked if
- use pmic_clrsetbits
- add possibility to change prwkey bank name
- Handle invalid bindings
- Sanity HW check (i.e. check type/subtype registers)
doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48
drivers/gpio/Kconfig | 10 +
drivers/gpio/Makefile | 1 +
drivers/gpio/pm8916_gpio.c| 302 ++
4 files changed, 361 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/pm8916_gpio.txt
create mode 100644 drivers/gpio/pm8916_gpio.c
diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt
b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
new file mode 100644
index 000..58185b8
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
@@ -0,0 +1,48 @@
+Driver for part of pm8916 PMIC - gpio and power/reset keys
+
+This device should be child of SPMI pmic.
+
+1) GPIO driver
+
+Required properties:
+- compatible: "qcom,pm8916-gpio"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- gpio-count: number of GPIOs
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916" is used)
+
+Example:
+
+pmic_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="pmic";
+};
+
+
+2) Power/Reset key driver
+
+Required properties:
+- compatible: "qcom,pm8916-pwrkey"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916_key" is used)
+
+
+Example:
+
+pmic_pon: pon@800 {
+ compatible = "qcom,pm8916-pwrkey";
+ reg = <0x800 0x96>;
+ #gpio-cells = <2>;
+ gpio-controller;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index befb4af..7b4f0ed 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -60,6 +60,16 @@ config MSM_GPIO
- APQ8016
- MSM8916
+config PM8916_GPIO
+ bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
+ depends on DM_GPIO && PMIC_PM8916
+ help
+ Support for GPIO pins and power/reset buttons found on
+ Qualcomm PM8916 PMIC.
+ Default name for GPIO bank is "pm8916".
+ Power and reset buttons are placed in "pm8916_key" bank and
+ have gpio numbers 0 and 1 respectively.
+
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 830d7a6..fe06f8e 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -49,3 +49,4 @@ obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
+obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o
diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c
new file mode 100644
index 000..1abab7f
--- /dev/null
+++ b/drivers/gpio/pm8916_gpio.c
@@ -0,0 +1,302 @@
+/*
+ * Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register offset for each gpio */
+#define REG_OFFSET(x) ((x) * 0x100)
+
+/* Register maps */
+
+/* Type and subtype are shared for all pm8916 peripherals */
+#define REG_TYPE 0x4
+#define REG_SUBTYPE0x5
+
+#define REG_STATUS 0x08
+#define REG_STATUS_VAL_MASK0x1
+
+/* MODE_CTL */
+#define REG_CTL 0x40
+#define REG_CTL_MODE_MASK 0x70
+#define REG_CTL_MODE_INPUT 0x00
+#define REG_CTL_MODE_INOUT 0x20
+#define REG_CTL_MODE_OUTPUT 0x10
+#define REG_CTL_OUTPUT_MASK 0x0F
+
+#define REG_DIG_VIN_CTL0x41
+#define REG_DIG_VIN_VIN0 0
+
+#define REG_DIG_PULL_CTL 0x42
+#define REG_DIG_PULL_NO_PU 0x5
+
+#define REG_DIG_OUT_CTL0x45
+#define REG_DIG_OUT_CTL_CMOS (0x0 << 4)
+#define REG_DIG_OUT_CTL_DRIVE_L 0x1
+
+#define REG_EN_CTL 0x46
+#define REG_EN_CTL_ENABLE (1 << 7)
+
+struct pm8916_gpio_bank {
+ uint16_t p
[U-Boot] [PATCH v3 16/21] drivers: spmi: Add support for Qualcomm SPMI bus driver
Support SPMI arbiter on Qualcomm Snapdragon devices.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Rename DM_SPMI -> SPMI
- Rename p -> priv (in write/read)
- Fix header ordering (again)
- Add reviewed-by
Changes in v1:
- add binding documentation and better Kconfig help
- Changed a bit mapping
- Change include order
- Use clrsetbits* where possible
- Add one more supported dts id
- Handle missing fields in dt properly
doc/device-tree-bindings/spmi/spmi-msm.txt | 26
drivers/spmi/Kconfig | 7 +-
drivers/spmi/Makefile | 1 +
drivers/spmi/spmi-msm.c| 189 +
4 files changed, 222 insertions(+), 1 deletion(-)
create mode 100644 doc/device-tree-bindings/spmi/spmi-msm.txt
create mode 100644 drivers/spmi/spmi-msm.c
diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt
b/doc/device-tree-bindings/spmi/spmi-msm.txt
new file mode 100644
index 000..ae47673
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-msm.txt
@@ -0,0 +1,26 @@
+Qualcomm SPMI arbiter/bus driver
+
+This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs.
+
+Required properties:
+- compatible: "qcom,spmi-pmic-arb"
+- reg: Register block adresses and sizes for various parts of device:
+ 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn)
+ 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS)
+ 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS)
+
+Optional properties (if not set by parent):
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+All PMICs should be placed as a child nodes of bus arbiter.
+Automatic detection of childs is currently not supported.
+
+Example:
+
+spmi@200f000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x200f800 0x200 0x240 0x40 0x2c0 0x40>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+};
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index c70d675..8d25b45 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -8,11 +8,16 @@ config SPMI
SPMI (System Power Management Interface) bus is used
to connect PMIC devices on various SoCs.
+config SPMI_MSM
+ boolean "Support Qualcomm SPMI bus"
+ depends on SPMI
+ ---help---
+ Support SPMI bus implementation found on Qualcomm Snapdragon SoCs.
+
config SPMI_SANDBOX
boolean "Support for Sandbox SPMI bus"
depends on SPMI
---help---
Demo SPMI bus implementation. Emulates part of PM8916 as single
slave (0) on bus. It has 4 GPIO peripherals, pid 0xC0-0xC3.
-
endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 4ca65a9..c0b1220 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -5,4 +5,5 @@
#
obj-$(CONFIG_SPMI) += spmi-uclass.o
+obj-$(CONFIG_SPMI_MSM) += spmi-msm.o
obj-$(CONFIG_SPMI_SANDBOX) += spmi-sandbox.o
diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
new file mode 100644
index 000..0cef505
--- /dev/null
+++ b/drivers/spmi/spmi-msm.c
@@ -0,0 +1,189 @@
+/*
+ * Qualcomm SPMI bus driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Loosely based on Little Kernel driver
+ *
+ * SPDX-License-Identifier:BSD-3-Clause
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ARB_CHANNEL_OFFSET(n) (0x4 * (n))
+#define SPMI_CH_OFFSET(chnl) ((chnl) * 0x8000)
+
+#define SPMI_REG_CMD0 0x0
+#define SPMI_REG_CONFIG0x4
+#define SPMI_REG_STATUS0x8
+#define SPMI_REG_WDATA 0x10
+#define SPMI_REG_RDATA 0x18
+
+#define SPMI_CMD_OPCODE_SHIFT 27
+#define SPMI_CMD_SLAVE_ID_SHIFT20
+#define SPMI_CMD_ADDR_SHIFT12
+#define SPMI_CMD_ADDR_OFFSET_SHIFT 4
+#define SPMI_CMD_BYTE_CNT_SHIFT0
+
+#define SPMI_CMD_EXT_REG_WRITE_LONG0x00
+#define SPMI_CMD_EXT_REG_READ_LONG 0x01
+
+#define SPMI_STATUS_DONE 0x1
+
+#define SPMI_MAX_CHANNELS 128
+#define SPMI_MAX_SLAVES16
+#define SPMI_MAX_PERIPH256
+
+struct msm_spmi_priv {
+ phys_addr_t arb_chnl; /* ARB channel mapping base */
+ phys_addr_t spmi_core; /* SPMI core */
+ phys_addr_t spmi_obs; /* SPMI observer */
+ /* SPMI channel map */
+ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];
+};
+
+static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
+ uint8_t val)
+{
+ struct msm_spmi_priv *priv = dev_get_priv(dev);
+ unsigned channel;
+ uint32_t reg = 0;
+
+ if (usid >= SPMI_MAX_SLAVES)
+ return -E
[U-Boot] [PATCH v3 15/21] spmi: Add sandbox test driver
This patch adds emulated spmi bus controller with part of
pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
---
Changes in v3:
- Updated test.dts to include SPMI like sandbox.dts does
Changes in v2:
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Rename r -> regs, p -> priv
- Add reviewed-by
- Update binding doc (drop unused bindig)
Changes in v1: None
arch/sandbox/dts/sandbox.dts | 20
arch/sandbox/dts/test.dts | 20
configs/sandbox_defconfig | 4 +
doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 +
drivers/spmi/Kconfig | 8 ++
drivers/spmi/Makefile | 1 +
drivers/spmi/spmi-sandbox.c| 157 +
test/dm/Makefile | 1 +
test/dm/spmi.c | 115 ++
9 files changed, 357 insertions(+)
create mode 100644 doc/device-tree-bindings/spmi/spmi-sandbox.txt
create mode 100644 drivers/spmi/spmi-sandbox.c
create mode 100644 test/dm/spmi.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index e3f02bf..2ae4014 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -240,6 +240,26 @@
status = "disabled";
};
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
};
#include "cros-ec-keyboard.dtsi"
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 9b8d658..8930009 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -351,6 +351,26 @@
status = "disabled";
};
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 02534bf..d77710d 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -30,6 +30,7 @@ CONFIG_ADC=y
CONFIG_ADC_SANDBOX=y
CONFIG_CLK=y
CONFIG_SANDBOX_GPIO=y
+CONFIG_PM8916_GPIO=y
CONFIG_SYS_I2C_SANDBOX=y
CONFIG_CROS_EC_KEYB=y
CONFIG_LED=y
@@ -58,6 +59,9 @@ CONFIG_PINCONF=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_SANDBOX=y
+CONFIG_PMIC_PM8916=y
+CONFIG_SPMI=y
+CONFIG_SPMI_SANDBOX=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_SANDBOX=y
CONFIG_RAM=y
diff --git a/doc/device-tree-bindings/spmi/spmi-sandbox.txt
b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
new file mode 100644
index 000..8569a1a
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
@@ -0,0 +1,31 @@
+Sandbox SPMI emulated arbiter.
+
+This is bus driver for Sandbox. It includes part of emulated pm8916 pmic.
+
+Required properties:
+- compatible: "sandbox,spmi"
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+Example:
+
+spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: g
[U-Boot] [PATCH v3 17/21] pmic: Add support for Qualcomm PM8916 PMIC
This PMIC is connected on SPMI bus so needs SPMI support enabled.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add reviewed-by
- Reordered Kconfig & Makefile (to keep alphabetical ordering)
- Added link to dt binding @ help
Changes in v1:
- Added dt bindings
- Reoder includes
- Replaced extract_* macros with ordinary shift/mask
- Added error checking and whitespaces in probe
doc/device-tree-bindings/pmic/pm8916.txt | 18 ++
drivers/power/pmic/Kconfig | 16 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/pm8916.c | 96
4 files changed, 131 insertions(+)
create mode 100644 doc/device-tree-bindings/pmic/pm8916.txt
create mode 100644 drivers/power/pmic/pm8916.c
diff --git a/doc/device-tree-bindings/pmic/pm8916.txt
b/doc/device-tree-bindings/pmic/pm8916.txt
new file mode 100644
index 000..15c598b
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/pm8916.txt
@@ -0,0 +1,18 @@
+Qualcomm pm8916 PMIC
+
+This PMIC is connected using SPMI bus so should be child of SPMI bus
controller.
+
+Required properties:
+- compatible: "qcom,spmi-pmic";
+- reg: SPMI Slave ID, size (ignored)
+- #address-cells: 0x1 (peripheral ID)
+- #size-cells: 0x1 (size of peripheral register space)
+
+Example:
+
+pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+};
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 7f69ae1..69f8d51 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -54,6 +54,22 @@ config DM_PMIC_MAX77686
This config enables implementation of driver-model pmic uclass features
for PMIC MAX77686. The driver implements read/write operations.
+config PMIC_PM8916
+ bool "Enable Driver Model for Qualcomm PM8916 PMIC"
+ depends on DM_PMIC
+ ---help---
+ The PM8916 is a PMIC connected to one (or several) processors
+ with SPMI bus. It has 2 slaves with several peripherals:
+ - 18x LDO
+ - 4x GPIO
+ - Power and Reset buttons
+ - Watchdog
+ - RTC
+ - Vibrator drivers
+ - Others
+
+ Driver binding info: doc/device-tree-bindings/pmic/pm8916.txt
+
config PMIC_RK808
bool "Enable support for Rockchip PMIC RK808"
depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index c6e8d0c..52b4f71 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
+obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_RK808) += rk808.o
obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
diff --git a/drivers/power/pmic/pm8916.c b/drivers/power/pmic/pm8916.c
new file mode 100644
index 000..9acf5f5
--- /dev/null
+++ b/drivers/power/pmic/pm8916.c
@@ -0,0 +1,96 @@
+/*
+ * Qualcomm pm8916 pmic driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define PID_SHIFT 8
+#define PID_MASK (0xFF << PID_SHIFT)
+#define REG_MASK 0xFF
+
+struct pm8916_priv {
+ uint16_t usid; /* Slave ID on SPMI bus */
+};
+
+static int pm8916_reg_count(struct udevice *dev)
+{
+ return 0x;
+}
+
+static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ if (len != 1)
+ return -EINVAL;
+
+ return spmi_reg_write(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK,
+ *buff);
+}
+
+static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+ int val;
+
+ if (len != 1)
+ return -EINVAL;
+
+ val = spmi_reg_read(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK);
+
+ if (val < 0)
+ return val;
+ *buff = val;
+ return 0;
+}
+
+static struct dm_pmic_ops pm8916_ops = {
+ .reg_count = pm8916_reg_count,
+ .read = pm8916_read,
+ .write = pm8916_write,
+};
+
+static const struct udevice_id pm8916_ids[] = {
+ { .compatible = "qcom,spmi-pmic" },
+ { }
+};
+
+static int pm8916_probe(struct udevice *dev)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ priv->usid = dev_get_ad
[U-Boot] [PATCH v3 13/21] ehci: Add support for Qualcomm EHCI
This driver is able to reconfigure OTG controller into HOST mode.
Board can add board-specific initialization as board_prepare_usb().
It requires USB_ULPI_VIEWPORT enabled in board configuration.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Use PORT_... macro to write to portsc
- Remove extra whitespace in probe()
- Add acked-by
Changes in v1:
- Reordered header files
- Removed braces around constant
- Added more verbose help to KConfig
- Added ULPI dependency to Kconfig
- Drop register #defines - use ehci-ci.h instead
- Create fixed ulpi viewport for device
- Use setbits/clearbits where possible
- Use wait_for_bit to reset controller
- Add dt binding documents
doc/device-tree-bindings/usb/ehci-msm.txt | 10 ++
drivers/usb/host/Kconfig | 11 ++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-msm.c | 178 ++
4 files changed, 200 insertions(+)
create mode 100644 doc/device-tree-bindings/usb/ehci-msm.txt
create mode 100644 drivers/usb/host/ehci-msm.c
diff --git a/doc/device-tree-bindings/usb/ehci-msm.txt
b/doc/device-tree-bindings/usb/ehci-msm.txt
new file mode 100644
index 000..205bb07
--- /dev/null
+++ b/doc/device-tree-bindings/usb/ehci-msm.txt
@@ -0,0 +1,10 @@
+Chipidea EHCI controller (part of OTG controller) used on Qualcomm devices.
+
+Required properties:
+- compatible: must be "qcom,ehci-host"
+- reg: start address and size of the registers
+
+ehci@78d9000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x78d9000 0x400>;
+};
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 9332374..d2363c8 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -74,6 +74,17 @@ config USB_EHCI_MX6
---help---
Enables support for the on-chip EHCI controller on i.MX6 SoCs.
+config USB_EHCI_MSM
+ bool "Support for Qualcomm on-chip EHCI USB controller"
+ depends on DM_USB
+ select USB_ULPI_VIEWPORT
+ default n
+ ---help---
+ Enables support for the on-chip EHCI controller on Qualcomm
+ Snapdragon SoCs.
+ This driver supports combination of Chipidea USB controller
+ and Synapsys USB PHY in host mode only.
+
config USB_EHCI_GENERIC
bool "Support for generic EHCI USB controller"
depends on OF_CONTROL
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 9a87d2b..507519e 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o
obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
+obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
new file mode 100644
index 000..6484c1c
--- /dev/null
+++ b/drivers/usb/host/ehci-msm.c
@@ -0,0 +1,178 @@
+/*
+ * Qualcomm EHCI driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Based on Linux driver
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "ehci.h"
+
+/* PHY viewport regs */
+#define ULPI_MISC_A_READ 0x96
+#define ULPI_MISC_A_SET 0x97
+#define ULPI_MISC_A_CLEAR0x98
+#define ULPI_MISC_A_VBUSVLDEXTSEL(1 << 1)
+#define ULPI_MISC_A_VBUSVLDEXT (1 << 0)
+
+#define GEN2_SESS_VLD_CTRL_EN (1 << 7)
+
+#define SESS_VLD_CTRL (1 << 25)
+
+struct msm_ehci_priv {
+ struct ehci_ctrl ctrl; /* Needed by EHCI */
+ struct usb_ehci *ehci; /* Start of IP core*/
+ struct ulpi_viewport ulpi_vp; /* ULPI Viewport */
+};
+
+int __weak board_prepare_usb(enum usb_init_type type)
+{
+ return 0;
+}
+
+static void setup_usb_phy(struct msm_ehci_priv *priv)
+{
+ /* Select and enable external configuration with USB PHY */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_SET,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+}
+
+static void reset_usb_phy(struct msm_ehci_priv *priv)
+{
+ /* Disable VBUS mimicing in the controller. */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_CLEAR,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+}
+
+
+static int msm_init_after_reset(struct ehci_ctrl *dev)
+{
+ struct msm_ehci_priv *p = container_of(dev, struct msm_ehci_priv, ctrl);
+ struct usb_ehci *ehci = p->ehci;
+
+ /* select ULPI phy */
+ writel(PORT_PTS_ULPI, &ehci->portsc);
+ setup_usb_phy(p);
+
+ /* Enable sess_
[U-Boot] [PATCH v3 14/21] drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Use proper entry order in Kconfig
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Fix header ordering
- Add reviewed-by
Changes in v1:
- Reorder includes
- Add read/write arguments documentation
drivers/Kconfig| 2 ++
drivers/Makefile | 1 +
drivers/spmi/Kconfig | 10 ++
drivers/spmi/Makefile | 7 +++
drivers/spmi/spmi-uclass.c | 48 ++
include/dm/uclass-id.h | 1 +
include/spmi/spmi.h| 47 +
7 files changed, 116 insertions(+)
create mode 100644 drivers/spmi/Kconfig
create mode 100644 drivers/spmi/Makefile
create mode 100644 drivers/spmi/spmi-uclass.c
create mode 100644 include/spmi/spmi.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 70993fd..c82a94b 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -60,6 +60,8 @@ source "drivers/sound/Kconfig"
source "drivers/spi/Kconfig"
+source "drivers/spmi/Kconfig"
+
source "drivers/thermal/Kconfig"
source "drivers/timer/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index e7eab66..6900097 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -54,6 +54,7 @@ obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += rtc/
obj-y += sound/
+obj-y += spmi/
obj-y += timer/
obj-y += tpm/
obj-y += twserial/
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
new file mode 100644
index 000..0b9bd31
--- /dev/null
+++ b/drivers/spmi/Kconfig
@@ -0,0 +1,10 @@
+menu "SPMI support"
+
+config SPMI
+ bool "Enable SPMI bus support"
+ depends on DM
+ ---help---
+ Select this to enable to support SPMI bus.
+ SPMI (System Power Management Interface) bus is used
+ to connect PMIC devices on various SoCs.
+endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
new file mode 100644
index 000..99092eb
--- /dev/null
+++ b/drivers/spmi/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Mateusz Kulikowski
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_SPMI) += spmi-uclass.o
diff --git a/drivers/spmi/spmi-uclass.c b/drivers/spmi/spmi-uclass.c
new file mode 100644
index 000..4ddd51b
--- /dev/null
+++ b/drivers/spmi/spmi-uclass.c
@@ -0,0 +1,48 @@
+/*
+ * SPMI bus uclass driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->read)
+ return -ENOSYS;
+
+ return ops->read(dev, usid, pid, reg);
+}
+
+int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
+ uint8_t value)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->write)
+ return -ENOSYS;
+
+ return ops->write(dev, usid, pid, reg, value);
+}
+
+static int spmi_post_bind(struct udevice *dev)
+{
+ return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+}
+
+UCLASS_DRIVER(spmi) = {
+ .id = UCLASS_SPMI,
+ .name = "spmi",
+ .post_bind = spmi_post_bind,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 3bea308..917d550 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -65,6 +65,7 @@ enum uclass_id {
UCLASS_RTC, /* Real time clock device */
UCLASS_SERIAL, /* Serial UART */
UCLASS_SPI, /* SPI bus */
+ UCLASS_SPMI,/* System Power Management Interface bus */
UCLASS_SPI_FLASH, /* SPI flash */
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_SYSCON, /* System configuration device */
diff --git a/include/spmi/spmi.h b/include/spmi/spmi.h
new file mode 100644
index 000..65a49bd
--- /dev/null
+++ b/include/spmi/spmi.h
@@ -0,0 +1,47 @@
+#ifndef _SPMI_SPMI_H
+#define _SPMI_SPMI_H
+
+/**
+ * struct dm_spmi_ops - SPMI device I/O interface
+ *
+ * Should be implemented by UCLASS_SPMI device drivers. The standard
+ * device operations provides the I/O interface for it's childs.
+ *
+ * @read: read register 'reg' of slave 'usid' and peripheral 'pid'
+ * @write: write register 'r
[U-Boot] [PATCH v3 11/21] usb: ehci-ci: Add missing registers.
Some registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have
meaning on other devices.
The following registers were added:
sbusstatus/sbusmode: AHB-related registers
genconfig*: Auxiluary IP core configuration registers.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1: None
include/usb/ehci-ci.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 725aec5..305b180 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -191,7 +191,11 @@ struct usb_ehci {
u32 gptimer1_ld;/* 0x088 - General Purpose Timer 1 load value */
u32 gptimer1_ctrl; /* 0x08C - General Purpose Timer 1 control */
u32 sbuscfg;/* 0x090 - System Bus Interface Control */
- u8 res2[0x6C];
+ u32 sbusstatus; /* 0x094 - System Bus Interface Status */
+ u32 sbusmode; /* 0x098 - System Bus Interface Mode */
+ u32 genconfig; /* 0x09C - USB Core Configuration */
+ u32 genconfig2; /* 0x0A0 - USB Core Configuration 2 */
+ u8 res2[0x5c];
u8 caplength; /* 0x100 - Capability Register Length */
u8 res3[0x1];
u16 hciversion; /* 0x102 - Host Interface Version */
--
2.5.0
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[U-Boot] [PATCH v3 12/21] ehci-ci.h: drop generic USBCMD fields
Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add Acked-by
Changes in v1: None
drivers/usb/host/ehci-mpc512x.c | 4 ++--
include/usb/ehci-ci.h | 4
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index 4b50ac8..bb4f461 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -93,7 +93,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
unsigned int i;
/* Command a reset of the USB Controller */
- out_be32(&(ehci->usbcmd), EHCI_FSL_USBCMD_RST);
+ out_be32(&(ehci->usbcmd), CMD_RESET);
/* Wait for the reset process to finish */
for (i = 65535 ; i > 0 ; i--) {
@@ -101,7 +101,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
* The host will set this bit to zero once the
* reset process is complete
*/
- if ((in_be32(&(ehci->usbcmd)) & EHCI_FSL_USBCMD_RST) == 0)
+ if ((in_be32(&(ehci->usbcmd)) & CMD_RESET) == 0)
return 0;
}
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 305b180..586d32a 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -97,10 +97,6 @@
#define INTR_DATA_PULSING_EN (0x1<<30)
#define INTSTS_MASK(0x00ff)
-/* USBCMD Bits of interest */
-#define EHCI_FSL_USBCMD_RST(1 << 1)
-#define EHCI_FSL_USBCMD_RS (1 << 0)
-
#define INTERRUPT_ENABLE_BITS_MASK \
(INTR_USB_ID_EN | \
INTR_1MS_TIMER_EN | \
--
2.5.0
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[U-Boot] [PATCH v3 10/21] usb: Rename ehci-fsl.h to ehci-ci.h
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add acked-by
Changes in v1: None
drivers/usb/host/ehci-fsl.c | 2 +-
drivers/usb/host/ehci-mpc512x.c | 2 +-
drivers/usb/host/ehci-mx5.c | 2 +-
drivers/usb/host/ehci-mx6.c | 2 +-
drivers/usb/host/ehci-mxc.c | 2 +-
drivers/usb/host/ehci-vf.c| 2 +-
drivers/usb/host/ehci-zynq.c | 2 +-
include/usb/{ehci-fsl.h => ehci-ci.h} | 6 +++---
8 files changed, 10 insertions(+), 10 deletions(-)
rename include/usb/{ehci-fsl.h => ehci-ci.h} (99%)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 97b7f14..4bcea9d 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -12,7 +12,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index b320c4a..4b50ac8 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -17,7 +17,7 @@
#include
#include
#include
-#include
+#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index d319962..2b36ceb 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -9,7 +9,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index e1c67f7..a981b50 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -10,7 +10,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index f09c75a..f8324ee 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -9,7 +9,7 @@
#include
#include
#include
-#include
+#include
#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index 335e303..61789dd 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -17,7 +17,7 @@
#include
#include
#include
-#include
+#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c
index 7770d05..37a7935 100644
--- a/drivers/usb/host/ehci-zynq.c
+++ b/drivers/usb/host/ehci-zynq.c
@@ -11,7 +11,7 @@
#include
#include
#include
-#include
+#include
#include
#include "ehci.h"
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-ci.h
similarity index 99%
rename from include/usb/ehci-fsl.h
rename to include/usb/ehci-ci.h
index e9349b5..725aec5 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-ci.h
@@ -6,8 +6,8 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#ifndef _EHCI_FSL_H
-#define _EHCI_FSL_H
+#ifndef _EHCI_CI_H
+#define _EHCI_CI_H
#include
@@ -285,4 +285,4 @@ int usb_phy_mode(int port);
int board_ehci_hcd_init(int port);
int board_usb_phy_mode(int port);
-#endif /* _EHCI_FSL_H */
+#endif /* _EHCI_CI_H */
--
2.5.0
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[U-Boot] [PATCH v3 09/21] eth: asix88179: Print packet length properly
Debug printf used '%u' to print size_t variable.
This caused warnings on 64-bit machines.
Signed-off-by: Mateusz Kulikowski
---
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
drivers/usb/eth/asix88179.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/eth/asix88179.c b/drivers/usb/eth/asix88179.c
index cf4085d..5e1ea86 100644
--- a/drivers/usb/eth/asix88179.c
+++ b/drivers/usb/eth/asix88179.c
@@ -497,7 +497,7 @@ static int asix_send(struct eth_device *eth, void *packet,
int length)
length + sizeof(packet_len) + sizeof(tx_hdr2),
&actual_len,
USB_BULK_SEND_TIMEOUT);
- debug("Tx: len = %u, actual = %u, err = %d\n",
+ debug("Tx: len = %zu, actual = %u, err = %d\n",
length + sizeof(packet_len), actual_len, err);
return err;
--
2.5.0
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[U-Boot] [PATCH v3 07/21] usb: ulpi: Fix viewport_addr type
viewport_addr is address of memory mapped ULPI viewport.
It is used only as argument to readl/writel later
causing compile warnings on 64-bit devices.
This fix changes its type to match pointer size.
Signed-off-by: Mateusz Kulikowski
---
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
include/usb/ulpi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index 4fa765b..dfea395 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -32,7 +32,7 @@
* be extended from this structure
*/
struct ulpi_viewport {
- u32 viewport_addr;
+ uintptr_t viewport_addr;
u32 port_num;
};
--
2.5.0
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[U-Boot] [PATCH v3 08/21] usb: ulpi: Fix compile warning in read/write on 64-bit machines.
ulpi_read and ulpi_write are used to read/write registers via ULPI bus.
Code generates compilation warnings on 64-bit machines where pointer
is cast to u32.
This patch drops all but last 8 bits of register address.
It is possible, because addresses on ULPI bus are 6- or 8-bit.
It is not possible (according to ULPI 1.1 spec) to have more
than 8-bit addressing.
This patch should not cause regressions as all calls to
ulpi_read/write use either structure pointer (@ address 0) or integer
offsets cast to pointer - addresses requested are way below 8-bit range.
Signed-off-by: Mateusz Kulikowski
---
Changes in v3:
- New patch
Changes in v2: None
Changes in v1: None
drivers/usb/ulpi/ulpi-viewport.c | 5 +++--
include/usb/ulpi.h | 2 ++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/ulpi/ulpi-viewport.c b/drivers/usb/ulpi/ulpi-viewport.c
index 72a06de..d111680 100644
--- a/drivers/usb/ulpi/ulpi-viewport.c
+++ b/drivers/usb/ulpi/ulpi-viewport.c
@@ -92,7 +92,8 @@ static int ulpi_request(struct ulpi_viewport *ulpi_vp, u32
value)
int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32 value)
{
- u32 val = ULPI_RWRUN | ULPI_RWCTRL | ((u32)reg << 16) | (value & 0xff);
+ u32 addr = (uintptr_t)reg & 0xFF;
+ u32 val = ULPI_RWRUN | ULPI_RWCTRL | addr << 16 | (value & 0xff);
val |= (ulpi_vp->port_num & 0x7) << 24;
return ulpi_request(ulpi_vp, val);
@@ -101,7 +102,7 @@ int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32
value)
u32 ulpi_read(struct ulpi_viewport *ulpi_vp, u8 *reg)
{
int err;
- u32 val = ULPI_RWRUN | ((u32)reg << 16);
+ u32 val = ULPI_RWRUN | ((uintptr_t)reg & 0xFF) << 16;
val |= (ulpi_vp->port_num & 0x7) << 24;
err = ulpi_request(ulpi_vp, val);
diff --git a/include/usb/ulpi.h b/include/usb/ulpi.h
index dfea395..747fb0a 100644
--- a/include/usb/ulpi.h
+++ b/include/usb/ulpi.h
@@ -123,6 +123,7 @@ int ulpi_reset(struct ulpi_viewport *ulpi_vp);
/*
* Write to the ULPI PHY register via the viewport.
* @reg- the ULPI register (one of the fields in struct
ulpi_regs).
+ * Due to ULPI design, only 8 lsb of address are used.
* @value - the value - only 8 lower bits are used, others ignored.
*
* returns 0 on success, ULPI_ERROR on failure.
@@ -132,6 +133,7 @@ int ulpi_write(struct ulpi_viewport *ulpi_vp, u8 *reg, u32
value);
/*
* Read the ULPI PHY register content via the viewport.
* @reg- the ULPI register (one of the fields in struct
ulpi_regs).
+ * Due to ULPI design, only 8 lsb of address are used.
*
* returns register content on success, ULPI_ERROR on failure.
*/
--
2.5.0
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[U-Boot] [PATCH v3 04/21] ehci-hcd: Add init_after_reset
Some host controllers need addidional initialization after ehci_reset()
In non-dm implementation it is possible to use CONFIG_EHCI_HCD_INIT_AFTER_RESET.
This patch adds similar option to ehci drivers using dm.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Reviewed-by: Tom Rini
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add Reviewed-by (sjg)
Changes in v1:
- No changes, just added Acked-by, Reviewed-by
drivers/usb/host/ehci-hcd.c | 6 ++
drivers/usb/host/ehci.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 0113c6c..598f444 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1615,6 +1615,12 @@ int ehci_register(struct udevice *dev, struct ehci_hccr
*hccr,
if (ret)
goto err;
+ if (ops->init_after_reset) {
+ ret = ops->init_after_reset(ctrl);
+ if (ret)
+ goto err;
+ }
+
ret = ehci_common_init(ctrl, tweaks);
if (ret)
goto err;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 826b3fe..734d7f0 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -240,6 +240,7 @@ struct ehci_ops {
void (*powerup_fixup)(struct ehci_ctrl *ctrl, uint32_t *status_reg,
uint32_t *reg);
uint32_t *(*get_portsc_register)(struct ehci_ctrl *ctrl, int port);
+ int (*init_after_reset)(struct ehci_ctrl *ctrl);
};
struct ehci_ctrl {
--
2.5.0
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[U-Boot] [PATCH v3 06/21] Migrate CONFIG_ULPI* to Kconfig
Move CONFIG_USB_ULPI* from headers to defconfigs for boards that use it. Also - add CONFIG_USB where necesarry - all boards use it, but some are not defining it explicitly. Affected boards: colibri_t20, harmony, mcx, mt_ventoux, twister, zynq_(picozed, zc702, zc706, zed, zybo) Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v3: None Changes in v2: - New patch, independent of the rest - Should compile cleanly on all affected platforms - Is orthogonal to series (i.e. if get's NAK will not break rest of series) Changes in v1: None configs/colibri_t20_defconfig| 2 ++ configs/harmony_defconfig| 2 ++ configs/mcx_defconfig| 3 +++ configs/mt_ventoux_defconfig | 3 +++ configs/twister_defconfig| 3 +++ configs/zynq_picozed_defconfig | 3 +++ configs/zynq_zc702_defconfig | 3 +++ configs/zynq_zc706_defconfig | 3 +++ configs/zynq_zed_defconfig | 3 +++ configs/zynq_zybo_defconfig | 3 +++ include/configs/colibri_t20.h| 3 +-- include/configs/harmony.h| 2 -- include/configs/mcx.h| 2 -- include/configs/tam3517-common.h | 2 -- include/configs/zynq-common.h| 2 -- 15 files changed, 29 insertions(+), 10 deletions(-) diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index e8b3e0c..c964387 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -20,4 +20,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index 14125b4..0b2422e 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -21,4 +21,6 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_DM_VIDEO=y CONFIG_VIDEO_TEGRA20=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index 1e204d5..612bf66 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -10,3 +10,6 @@ CONFIG_SYS_PROMPT="mcx # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index a0153e4..8b3298b 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -8,3 +8,6 @@ CONFIG_SYS_PROMPT="mt_ventoux => " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index e721edb..a1abbe1 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -8,3 +8,6 @@ CONFIG_SYS_PROMPT="twister => " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index f34e2e3..540b0dd 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -12,3 +12,6 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ZYNQ_SDHCI=y CONFIG_ZYNQ_GEM=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index f01874f..a6db9ff 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -24,3 +24,6 @@ CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=5000 CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 215f00d..d9a9bff 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -21,3 +21,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 4a2a2fc..25df8e5 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -21,3 +21,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 7c23fec..dd8cb62 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -22,3 +22,6 @@ CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=5000 CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index b7ad189..e97e5a1 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -36,8 +36,7 @@ /* USB host sup
[U-Boot] [PATCH v3 05/21] usb: ulpi: Add Kconfig options for ULPI
The following options can be now enabled via defconfig: - CONFIG_USB_ULPI - CONFIG_USB_ULPI_VIEWPORT - CONFIG_USB_ULPI_VIEWPORT_OMAP Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v3: None Changes in v2: - Add better (any) descriptions for Kconfig items. Changes in v1: None drivers/usb/Kconfig | 2 ++ drivers/usb/ulpi/Kconfig | 33 + 2 files changed, 35 insertions(+) create mode 100644 drivers/usb/ulpi/Kconfig diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index abb06fc..57b99f2 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -53,6 +53,8 @@ source "drivers/usb/musb-new/Kconfig" source "drivers/usb/emul/Kconfig" +source "drivers/usb/ulpi/Kconfig" + comment "USB peripherals" config USB_STORAGE diff --git a/drivers/usb/ulpi/Kconfig b/drivers/usb/ulpi/Kconfig new file mode 100644 index 000..329d2df --- /dev/null +++ b/drivers/usb/ulpi/Kconfig @@ -0,0 +1,33 @@ +comment "ULPI drivers" + +choice + prompt "ULPI Viewport type" + optional + default n + help + Select ULPI viewport (SoC-side interface to ULPI) implementation + appropriate for the device if you want to communicate with + UTMI (USB PHY) via ULPI interface. + +config USB_ULPI_VIEWPORT + bool "Generic ULPI Viewport" + help + Support generic ULPI Viewport implementation that is used on + some Tegra and Snapdragon devices. + +config USB_ULPI_VIEWPORT_OMAP + bool "OMAP ULPI Viewport" + help + Support ULPI Viewport implementation that is used on OMAP devices. + +endchoice + +config USB_ULPI + bool "ULPI support" + depends on (USB_ULPI_VIEWPORT || USB_ULPI_VIEWPORT_OMAP) + help + Select to commnicate with USB PHY via ULPI interface. + ULPI is wrapper on UTMI+ core that is used as + PHY Transreceiver for USB controllers. + + This driver uses ULPI viewports that are specific for each SoC. -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 03/21] mmc: Add support for Qualcomm SDHCI controller
Add support for SD/eMMC controller present on some Qualcomm Snapdragon
devices. This controller implements SDHCI 2.0 interface but requires
vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1:
- Added commit message
- Added DT binding documentation
- Added Kconfig help
- Reordered includes
- Dropped redundant fields from msm_sdhc
- Cleaned up clock init code (+ added error handling)
- Dropped mdelay - use wait_for_bit instead in reset code
- Added missing newline after declarations
- Added error handling if "reg" is missing
- Converted base address to pointer
doc/device-tree-bindings/mmc/msm_sdhci.txt | 25
drivers/mmc/Kconfig| 9 ++
drivers/mmc/Makefile | 1 +
drivers/mmc/msm_sdhci.c| 180 +
4 files changed, 215 insertions(+)
create mode 100644 doc/device-tree-bindings/mmc/msm_sdhci.txt
create mode 100644 drivers/mmc/msm_sdhci.c
diff --git a/doc/device-tree-bindings/mmc/msm_sdhci.txt
b/doc/device-tree-bindings/mmc/msm_sdhci.txt
new file mode 100644
index 000..08a290c
--- /dev/null
+++ b/doc/device-tree-bindings/mmc/msm_sdhci.txt
@@ -0,0 +1,25 @@
+Qualcomm Snapdragon SDHCI controller
+
+Required properties:
+- compatible : "qcom,sdhci-msm-v4"
+- reg: Base address and length of registers:
+ - Host controller registers (SDHCI)
+ - SD Core registers
+- clock: interface clock (must accept SD bus clock as a frequency)
+
+Optional properties:
+- index: If there is more than one controller - controller index (required
+ by generic SDHCI code).
+- bus_width: Width of SD/eMMC bus (default 4)
+- clock-frequency: Frequency of SD/eMMC bus (default 400 kHz)
+
+Example:
+
+sdhci@07864000 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7864900 0x11c 0x7864000 0x800>;
+ index = <0x1>;
+ bus-width = <0x4>;
+ clock = <&clkc 1>;
+ clock-frequency = <2>;
+};
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index dc8532f..4d3df11 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -16,6 +16,15 @@ config DM_MMC
appear as block devices in U-Boot and can support filesystems such
as EXT4 and FAT.
+config MSM_SDHCI
+ bool "Qualcomm SDHCI controller"
+ depends on DM_MMC
+ help
+ Enables support for SDHCI 2.0 controller present on some Qualcomm
+ Snapdragon devices. This device is compatible with eMMC v4.5 and
+ SD 3.0 specifications. Both SD and eMMC devices are supported.
+ Card-detect gpios are not supported.
+
config ROCKCHIP_DWMMC
bool "Rockchip SD/MMC controller support"
depends on DM_MMC && OF_CONTROL
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index b85e4bf..585aaf3 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -50,3 +50,4 @@ else
obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
endif
obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
+obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
new file mode 100644
index 000..1e2a29b
--- /dev/null
+++ b/drivers/mmc/msm_sdhci.c
@@ -0,0 +1,180 @@
+/*
+ * Qualcomm SDHCI driver - SD/eMMC controller
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Based on Linux driver
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Non-standard registers needed for SDHCI startup */
+#define SDCC_MCI_POWER 0x0
+#define SDCC_MCI_POWER_SW_RST BIT(7)
+
+/* This is undocumented register */
+#define SDCC_MCI_VERSION 0x50
+#define SDCC_MCI_VERSION_MAJOR_SHIFT 28
+#define SDCC_MCI_VERSION_MAJOR_MASK (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
+#define SDCC_MCI_VERSION_MINOR_MASK 0xff
+
+#define SDCC_MCI_STATUS2 0x6C
+#define SDCC_MCI_STATUS2_MCI_ACT 0x1
+#define SDCC_MCI_HC_MODE 0x78
+
+/* Offset to SDHCI registers */
+#define SDCC_SDHCI_OFFSET 0x900
+
+/* Non standard (?) SDHCI register */
+#define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c
+
+struct msm_sdhc {
+ struct sdhci_host host;
+ void *base;
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int msm_sdc_clk_init(struct udevice *dev)
+{
+ uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+ "clock-frequency", 40);
+ uint clkd[2]; /* clk_id and clk_no */
+ int clk_offset;
+ struct udevice *clk;
+ int ret;
+
+ ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clock", clkd,
+ 2);
+ if (ret)
+ return ret;
+
+ clk_offset
[U-Boot] [PATCH v3 01/21] serial: Add support for Qualcomm serial port
This driver works in "new" Data Mover UART mode, so
will be compatible with modern Qualcomm chips only.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3:
- Add msm_serial_fetch that tries to fetch characters from FIFO
- Decrease no of characters requested in RX transaction
- Try to fetch characters from FIFO when tstc()/pending() is called
Changes in v2:
- Added newline before return... (globally)
- Renamed p to priv (priv data) - it required some rewrapping
- Added Reviewed-by
Changes in v1:
- Added (better) help to KConfig
- Added dt binding documentation
- Fixed include ordering
- Reworked msm_serial_getc
- Added error handling to msm_uart_clk_init (that is ignored later for now)
- Dropped unneeded DM_FLAG_PRE_RELOC
doc/device-tree-bindings/serial/msm-serial.txt | 6 +
drivers/serial/Kconfig | 8 +
drivers/serial/Makefile| 1 +
drivers/serial/serial_msm.c| 217 +
4 files changed, 232 insertions(+)
create mode 100644 doc/device-tree-bindings/serial/msm-serial.txt
create mode 100644 drivers/serial/serial_msm.c
diff --git a/doc/device-tree-bindings/serial/msm-serial.txt
b/doc/device-tree-bindings/serial/msm-serial.txt
new file mode 100644
index 000..48b8428
--- /dev/null
+++ b/doc/device-tree-bindings/serial/msm-serial.txt
@@ -0,0 +1,6 @@
+Qualcomm UART (Data Mover mode)
+
+Required properties:
+- compatible: must be "qcom,msm-uartdm-v1.4"
+- reg: start address and size of the registers
+- clock: interface clock (must accept baudrate as a frequency)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 92d4212..e748663 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -311,4 +311,12 @@ config XILINX_UARTLITE
If you have a Xilinx based board and want to use the uartlite
serial ports, say Y to this option. If unsure, say N.
+config MSM_SERIAL
+ bool "Qualcomm on-chip UART"
+ depends on DM_SERIAL
+ help
+ Support Data Mover UART used on Qualcomm Snapdragon SoCs.
+ It should support all Qualcomm devices with UARTDM version 1.4,
+ for example APQ8016 and MSM8916.
+ Single baudrate is supported in current implementation (115200).
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 05bdf56..462dba1 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
obj-$(CONFIG_STM32X7_SERIAL) += serial_stm32x7.o
+obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
new file mode 100644
index 000..80fb89e
--- /dev/null
+++ b/drivers/serial/serial_msm.c
@@ -0,0 +1,217 @@
+/*
+ * Qualcomm UART driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * UART will work in Data Mover mode.
+ * Based on Linux driver.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Serial registers - this driver works in uartdm mode*/
+
+#define UARTDM_DMRX 0x34 /* Max RX transfer length */
+#define UARTDM_NCF_TX 0x40 /* Number of chars to TX */
+
+#define UARTDM_RXFS 0x50 /* RX channel status register */
+#define UARTDM_RXFS_BUF_SHIFT 0x7 /* Number of bytes in the packing buffer
*/
+#define UARTDM_RXFS_BUF_MASK0x7
+
+#define UARTDM_SR0xA4 /* Status register */
+#define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */
+#define UARTDM_SR_TX_EMPTY (1 << 3) /* Transmitter underrun */
+#define UARTDM_SR_UART_OVERRUN (1 << 4) /* Receive overrun */
+
+#define UARTDM_CR 0xA8 /* Command register */
+#define UARTDM_CR_CMD_RESET_ERR (3 << 4) /* Clear overrun error */
+#define UARTDM_CR_CMD_RESET_STALE_INT (8 << 4) /* Clears stale irq */
+#define UARTDM_CR_CMD_RESET_TX_READY (3 << 8) /* Clears TX Ready irq*/
+#define UARTDM_CR_CMD_FORCE_STALE (4 << 8) /* Causes stale event */
+#define UARTDM_CR_CMD_STALE_EVENT_DISABLE (6 << 8) /* Disable stale event */
+
+#define UARTDM_IMR0xB0 /* Interrupt mask register */
+#define UARTDM_ISR0xB4 /* Interrupt status register */
+#define UARTDM_ISR_TX_READY 0x80 /* TX FIFO empty */
+
+#define UARTDM_TF 0x100 /* UART Transmit FIFO register */
+#define UARTDM_RF 0x140 /* UART Receive FIFO register */
+
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct msm_serial_data {
+ phys_addr_t base;
+ unsigned chars_cnt; /* number of buffered chars */
+ uint32_t chars_bu
[U-Boot] [PATCH v3 00/21] Add support for 96boards Dragonboard410C board
ng documentation - Added help to KConfig - Use clrsetbits() to switch direction - Fixed include order - Added #defines for registers/register fields - Added secondary compatible string - Added commit message - Added DT binding documentation - Added Kconfig help - Reordered includes - Dropped redundant fields from msm_sdhc - Cleaned up clock init code (+ added error handling) - Dropped mdelay - use wait_for_bit instead in reset code - Added missing newline after declarations - Added error handling if "reg" is missing - Converted base address to pointer - No changes, just added Acked-by, Reviewed-by - Reordered header files - Removed braces around constant - Added more verbose help to KConfig - Added ULPI dependency to Kconfig - Drop register #defines - use ehci-ci.h instead - Create fixed ulpi viewport for device - Use setbits/clearbits where possible - Use wait_for_bit to reset controller - Add dt binding documents - Reorder includes - Add read/write arguments documentation - add binding documentation and better Kconfig help - Changed a bit mapping - Change include order - Use clrsetbits* where possible - Add one more supported dts id - Handle missing fields in dt properly - Added dt bindings - Reoder includes - Replaced extract_* macros with ordinary shift/mask - Added error checking and whitespaces in probe - Add binding doc - Fixed inlcude ordering - Merged direction_input and direction_output functions - gpio_get: use switch instead of stacked if - use pmic_clrsetbits - add possibility to change prwkey bank name - Handle invalid bindings - Sanity HW check (i.e. check type/subtype registers) - Fix include order - Cleanup defines (added spaces for readibility) - Base address is integer to avoid casting - Use setbits_* family where possible - Drop unneded comments, added newlines where needed - Check return value of dev_get_addr - Add binding for apq8016 - Cleaned up divider calculation - Drop most of gpio.h (only empty file is needed) - Add better help for dragonboard - Move static structures to board_prepare_usb - Add DM_SPMI to defconfig Mateusz Kulikowski (21): serial: Add support for Qualcomm serial port gpio: Add support for Qualcomm gpio controller mmc: Add support for Qualcomm SDHCI controller ehci-hcd: Add init_after_reset usb: ulpi: Add Kconfig options for ULPI Migrate CONFIG_ULPI* to Kconfig usb: ulpi: Fix viewport_addr type usb: ulpi: Fix compile warning in read/write on 64-bit machines. eth: asix88179: Print packet length properly usb: Rename ehci-fsl.h to ehci-ci.h usb: ehci-ci: Add missing registers. ehci-ci.h: drop generic USBCMD fields ehci: Add support for Qualcomm EHCI drivers: Add SPMI bus uclass spmi: Add sandbox test driver drivers: spmi: Add support for Qualcomm SPMI bus driver pmic: Add support for Qualcomm PM8916 PMIC gpio: Add support for Qualcomm PM8916 gpios arm: Add support for Qualcomm Snapdragon family board: Add Qualcomm Dragonboard 410C support Add myself as Snapdragon and SPMI maintainer MAINTAINERS| 11 + arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/dragonboard410c-uboot.dtsi| 28 ++ arch/arm/dts/dragonboard410c.dts | 148 ++ arch/arm/mach-snapdragon/Kconfig | 26 ++ arch/arm/mach-snapdragon/Makefile | 8 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 ++ arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 + arch/arm/mach-snapdragon/reset.c | 40 +++ arch/sandbox/dts/sandbox.dts | 20 ++ arch/sandbox/dts/test.dts | 20 ++ board/qualcomm/dragonboard410c/Kconfig | 15 + board/qualcomm/dragonboard410c/MAINTAINERS | 6 + board/qualcomm/dragonboard410c/Makefile| 8 + board/qualcomm/dragonboard410c/dragonboard410c.c | 131 + board/qualcomm/dragonboard410c/head.S | 34 +++ board/qualcomm/dragonboard410c/readme.txt | 71 + board/qualcomm/dragonboard410c/u-boot.lds | 90 ++ configs/colibri_t20_defconfig | 2 + configs/dragonboard410c_defconfig | 31 +++ configs/harmony_defconfig | 2 + configs/mcx_defconfig | 3 + configs/mt_ventoux_defconfig | 3 + configs/sandbox_defconfig | 4 + configs/twister_defconfig | 3 + configs/zynq_picozed_defconfig | 3 + configs/zynq_zc702_defconfig | 3 + configs/zynq_zc706_defconfig | 3 + configs/zynq_zed_defconfig | 3
[U-Boot] [PATCH v3 02/21] gpio: Add support for Qualcomm gpio controller
Add support for gpio controllers on Qualcomm Snapdragon devices.
This devices are usually called Top Level Mode Multiplexing in
Qualcomm documentation.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Reordered includes (again)
- Added newlines between returns
- Fixed error handling in msm_gpio_probe
- Added reviewed-by
Changes in v1:
- Added dt binding documentation
- Added help to KConfig
- Use clrsetbits() to switch direction
- Fixed include order
- Added #defines for registers/register fields
- Added secondary compatible string
doc/device-tree-bindings/gpio/gpio-msm.txt | 22 +
drivers/gpio/Kconfig | 14 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/msm_gpio.c| 135 +
4 files changed, 172 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/gpio-msm.txt
create mode 100644 drivers/gpio/msm_gpio.c
diff --git a/doc/device-tree-bindings/gpio/gpio-msm.txt
b/doc/device-tree-bindings/gpio/gpio-msm.txt
new file mode 100644
index 000..966ce0a
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio-msm.txt
@@ -0,0 +1,22 @@
+Qualcomm Snapdragon GPIO controller
+
+Required properties:
+- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl"
+- reg : Physical base address and length of the controller's registers.
+ This controller is called "Top Level Mode Multiplexing" in
+ Qualcomm documentation.
+- #gpio-cells : Should be one (pin number).
+- gpio-controller : Marks the device node as a GPIO controller.
+- gpio-count: Number of GPIO pins.
+- gpio-bank-name: (optional) name of gpio bank. As default "soc" is used.
+
+Example:
+
+soc_gpios: pinctrl@100 {
+ compatible = "qcom,msm8916-pinctrl";
+ reg = <0x100 0x30>;
+ gpio-controller;
+ gpio-count = <122>;
+ gpio-bank-name="soc";
+ #gpio-cells = <1>;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 94fabb9..befb4af 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -46,6 +46,20 @@ config LPC32XX_GPIO
help
Support for the LPC32XX GPIO driver.
+config MSM_GPIO
+ bool "Qualcomm GPIO driver"
+ depends on DM_GPIO
+ default n
+ help
+ Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
+ This controller have single bank (default name "soc"), every
+ gpio has it's own set of registers.
+ Only simple GPIO operations are supported (get/set, change of
+ direction and checking pin function).
+ Supported devices:
+ - APQ8016
+ - MSM8916
+
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index ca8c487..830d7a6 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -48,3 +48,4 @@ obj-$(CONFIG_ZYNQ_GPIO) += zynq_gpio.o
obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
+obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
new file mode 100644
index 000..950f309
--- /dev/null
+++ b/drivers/gpio/msm_gpio.c
@@ -0,0 +1,135 @@
+/*
+ * Qualcomm GPIO driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register offsets */
+#define GPIO_CONFIG_OFF(no) ((no) * 0x1000)
+#define GPIO_IN_OUT_OFF(no) ((no) * 0x1000 + 0x4)
+
+/* OE */
+#define GPIO_OE_DISABLE (0x0 << 9)
+#define GPIO_OE_ENABLE (0x1 << 9)
+#define GPIO_OE_MASK (0x1 << 9)
+
+/* GPIO_IN_OUT register shifts. */
+#define GPIO_IN 0
+#define GPIO_OUT 1
+
+struct msm_gpio_bank {
+ phys_addr_t base;
+};
+
+static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+ phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
+
+ /* Disable OE bit */
+ clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE);
+
+ return 0;
+}
+
+static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+
+ value = !!value;
+ /* set value */
+ writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
+
+ return 0;
+}
+
+static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
+int value)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+ phys_addr_t reg = priv->base + GPIO_CONFIG
Re: [U-Boot] [PATCH v2 17/18] board: Add Qualcomm Dragonboard 410C support
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi Daniel, Thanks for the hints! On 12.03.2016 00:58, Daniel Glöckner wrote: > On Sun, Feb 07, 2016 at 09:57:37PM +0100, Mateusz Kulikowski wrote: [...] >> +.global _fastboot_header >> +_fastboot_header: >> +b _start >> +add x13, x18, #0x16 >> +/* Image load offset from start of RAM, little-endian */ >> +.quad CONFIG_SYS_TEXT_BASE-PHYS_SDRAM_1 >> +/* Effective size of kernel image, little-endian */ >> +.quad 0 /* 0x6 */ >> +/* Informative flags, little-endian */ >> +.quad 0 >> +.quad 0 /* reserved */ >> +.quad 0 /* reserved */ >> +.quad 0 /* reserved */ >> +.byte 0x41/* Magic number, "ARM\x64" */ >> +.byte 0x52 >> +.byte 0x4d >> +.byte 0x64 >> +.word 0 /* reserved */ > > I don't think fastboot is the correct term to use here. The structure in > head.S is the ARM64 Linux kernel header described in section 4 of this > document: https://www.kernel.org/doc/Documentation/arm64/booting.txt > Fastboot is AFAIK a USB protocol spoken by bootloaders used on Android > devices. Little Kernel can do fastboot, but it doesn't do it to run this > image. Good point, in that case I'll just rename it to arm64_header :) > > It is also confusing to have the "add" instruction in there without an > explanation, especially because having it at offset 4 instead of 0 defeats > its original purpose (MZ EXE signature for EFI). My bad, I should have put it the other way around: add x13, x18, #0x16, b _start Will do that for v3 > >> +6) generate qualcomm device tree, use dtbTool to generate it >> +$ dtbTool -o dt.img arch/arm/dts >> + >> +7) generate image with mkbootimg: >> +$ mkbootimg --kernel=u-boot-dtb.bin --output=u-boot.img --dt=dt.img >> --pagesize 2048 --base 0x8000 --ramdisk=rd --cmdline="" > > I would have liked a bit more text about what is done with the device > trees here. Little Kernel refuses to run the "kernel" unless it can > find a device tree matching the hardware it is running on. It adds some > information to the device tree and passes it to the kernel in the x0 > register. U-Boot discards the contents of the x0 register and uses the > device tree appended to its image. So there is no need to point dtbTool > to the same dtb file used by U-Boot. A smaller one containing only the > IDs checked by Little Kernel would be enough. And dtbTool does not > generate a device tree, it generates the Qualcomm device tree table > containing all dtb files in the directory. I'll clarify readme, thanks for verbose explanation. I know (almost) empty dtb is enough (I use it personally), but I didn't wanted to pollute dts directory with fake device trees. > I know the goal is to eventually replace Little Kernel, but how about > using the device tree passed by it? We could add some code to head.S that > saves x0 in sp_el0 and abuse CONFIG_OF_HOSTFILE to retrieve it. I prefer not to (at least for now) - It will not give us significant benefits (image will be a bit smaller and boot slightly faster, but it's not an issue as U-Boot replaces huge kernel image) and will just confuse people that already are using it. Is it fine with you? Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJW5IZ7AAoJELvtohmVtQzBjj0IAJMwf9zutegyq5bmzG5ZYYJW dcdqRUXXDDV5IocWDxYK1BGALoFocxxqkRaimwT04r+0ZZ4SsLKXnmKkGJcwSE6p VfWW3aXG437VlVTDwyo8idSRESrFXkjtdrke+4xDQxoFWlCfUifKJJ53NYH2AzYt lj/ZDvuGikAJPDN27DeITlJVqq1OXcOTXfJbooIMGqTFbt/R8bZb1dIP/wF6GobS OqivQcMPh12pKped7Ym1kWMWJ01CWiauePjSK4xRJyAvZUjbvzke/8joBcpHDpaw IGMR5g1RNN6d9flV/W25Ryzrz5XS9M5+ikqucBnSkQD/POnvhHKOkPL9SdMHeYY= =zhqu -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 00/18] Add support for 96boards Dragonboard410C board
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi Tom, I finally was able to do some coding and so: On 25.02.2016 00:42, Tom Rini wrote: > On Sun, Feb 07, 2016 at 09:57:20PM +0100, Mateusz Kulikowski wrote: [...] >> - Rebased to recent master > > Please note that I see a lot of warnings when building this both with > gcc-5 and gcc-4.9, please fix. Thanks! > For v3 I've created 3 patches that fix asix and ULPI warnings. It was easier than I was afraid :) I will post it soon (tm). Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJW21yKAAoJELvtohmVtQzBZ5sH/iMISpeCogU0CDbxfGU1lMMN R8RypqqLYnKnOoeMM3KZMiDCIUkqa2chBNUnJc6huAWfg+2ZoodCQcDhCv5akwhS R52XHWyLXsNISZOq2STczLpPKgJyKqUH0ymtOHfuMKIYXeX8QWTbasFglaLoyNgg 8ugpq0XcqfsQMFdjx6qJ6SXw0+7Xef+dGoMHYW+7nduOqBSDVCz9q1uRgTE92Exh hKu81QN/Byy5sFY9lqfy96WSeGqsJX4H3jy/SijmauXRVrYzAZ/kebEYQnCCBUdS QiVr2BltTriG++h/LfbIrWhmdgJwMQW6Ul+QWk9Tc3L+yGMGMAPPk+FW7tEgbEI= =INFx -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 03/18] mmc: Add support for Qualcomm SDHCI controller
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi,
Ouch - I missed this one - sorry for late reply.
On 09.02.2016 22:33, Jagan Teki wrote:
> On 8 February 2016 at 02:27, Mateusz Kulikowski
> wrote:
[...]
>> +/* Non-standard registers needed for SDHCI startup */
>> +#define SDCC_MCI_POWER 0x0
>> +#define SDCC_MCI_POWER_SW_RST BIT(7)
>> +
>> +/* This is undocumented register */
>> +#define SDCC_MCI_VERSION 0x50
>> +#define SDCC_MCI_VERSION_MAJOR_SHIFT 28
>> +#define SDCC_MCI_VERSION_MAJOR_MASK (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
>> +#define SDCC_MCI_VERSION_MINOR_MASK 0xff
>> +
>> +#define SDCC_MCI_STATUS2 0x6C
>> +#define SDCC_MCI_STATUS2_MCI_ACT 0x1
>> +#define SDCC_MCI_HC_MODE 0x78
>> +
>> +/* Offset to SDHCI registers */
>> +#define SDCC_SDHCI_OFFSET 0x900
>> +
>> +/* Non standard (?) SDHCI register */
>> +#define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c
>
> IMHO, since this is based on Linux please use similar macro's to make
> easy changes in future.
I disagree (and I don't like names used on Linux on this particular driver);
"My" names are taken from Qualcomm documentation (HRD to be specific)
except for VERSION that was named like that for coherency.
IMHO it's less confusing and allows faster documentation lookups.
Unless Linux names are from some (public) IP Core documentation - then
please point me to it and I will do the rename (and add reference
to it in the driver).
>
[...]
>> +
>> +static const struct udevice_id msm_mmc_ids[] = {
>> + { .compatible = "qcom,sdhci-msm-v4" },
>> + { }
>> +};
>> +
>> +U_BOOT_DRIVER(msm_sdc_drv) = {
>
> Same as above - msm_sdhci_drv looks more readable and with below
> driver attributes as well.
Ok, Agree - this will be more coherent with DT bindings / file names.
Regards,
Mateusz
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Re: [U-Boot] [PATCH v2 16/18] arm: Add support for Qualcomm Snapdragon family
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 09.02.2016 22:51, Jagan Teki wrote: > On 8 February 2016 at 02:27, Mateusz Kulikowski > wrote: [..] >> 8 files changed, 352 insertions(+) >> create mode 100644 arch/arm/mach-snapdragon/Kconfig >> create mode 100644 arch/arm/mach-snapdragon/Makefile >> create mode 100644 arch/arm/mach-snapdragon/clock-apq8016.c >> create mode 100644 arch/arm/mach-snapdragon/include/mach/gpio.h >> create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h >> create mode 100644 arch/arm/mach-snapdragon/reset.c > > I think mach-qcom looks readable, I understand snapdragon is an soc > name but why can't we place all qcom soc code to mach-qcom (I think > Linux also doing the same)? I know Linux has mach-qcom, also it was the first name I used, but IMO it's wrong. This is Snapdragon-only code - it will not work with, say, wireless SoCs (previously Atheros).. And it will be in-line with other mach-* in U-Boot: We have mach-exynos, not mach-samsung; mach-at91 not mach-atmel etc. Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJWyDKlAAoJELvtohmVtQzB8UQH/jF/DWJSRiWvdBtvXDf0AGLy 6/2MMjhhDJDyz2C8zlwv5FlpVVggrNyX3NJoFoIuO7JAwECTnmYAiOj41AyRAYEW vVeoK+rX4nlD3flYv4UevW+Np0HxYVPyjRX2ONsqWj1u0798Wu5sF4m7H1QC24Pi iEFSTEdyNCVLaAqK2ELxL72OTiA3Xc+BQq9rvcHe8Q2wIEiAvP5F9LaWCl0z3dK8 ossNUA76d/YYfkczCgDeeY6xR6pdSizaxW7CsKdDaWFLgDQhZUzhJSgCWIGfgdgJ nY+lVVV3FbJy1Xwe6pgs6vyIqzhb0/9m9d4DTIVZFF+voLzKzE8dREseNzpx+TQ= =hT5h -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 15/18] gpio: Add support for Qualcomm PM8916 gpios
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi Jagan, On 09.02.2016 22:44, Jagan Teki wrote: > On 8 February 2016 at 02:27, Mateusz Kulikowski > wrote: [...] >> - Sanity HW check (i.e. check type/subtype registers) >> >> doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 >> drivers/gpio/Kconfig | 10 + >> drivers/gpio/Makefile | 1 + >> drivers/gpio/pm8916_gpio.c >| 302 ++ > > 4 GPIO's pin design, I think this is also comes under pincontrol. Same comment as for cpu GPIO (for now I decided to keep it as is and convert it to pincontrol in the future); Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJWyDFwAAoJELvtohmVtQzBghoH/2FniGKIXsGBt9K/WLC2K2u5 H5GV13GmZyeJ6kBgqTVZsfzTr4GAwhzLZF4Sh1zpM/BipPrS31VmNfbYhlk43drY v7Fbr2Xk2cCModJ+GzKpOX8OPEdsu079VxSHzcfnnIj3u9fTEA72oPJUVBwGJ+wd r/tOUFc8TLVEEf2pZE2hkYO+0FN+wm7MYVjzwLWWwmnpovhMKRfbT56w4d7HCodj sHdVs0UXBSNtIct7i3/yVA+hEtG5ambXkiwXZDl0SAaJBywuBxBTnoMYyw0T8MxP eRzvGTzggYvTdjOehxQxxeQYzd8qcbvjmi8CL6QWDIp25P/JtQYhlA0z1gdOy94= =6bX5 -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 13/18] drivers: spmi: Add support for Qualcomm SPMI bus driver
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi, On 09.02.2016 22:37, Jagan Teki wrote: > On 8 February 2016 at 02:27, Mateusz Kulikowski > wrote: [..] >> doc/device-tree-bindings/spmi/spmi-msm.txt | 26 >> drivers/spmi/Kconfig | 7 +- >> drivers/spmi/Makefile | 1 + >> drivers/spmi/spmi-msm.c| 189 > > spmi-pmic-arb.c looks fine along with binding file name as well. To be honest it's bus driver, not (only) arbiter driver. And it's nice to have vendor name there - as some other company may implemented their own SPMI arbiter. I would prefer to keep it as is. Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJWx4L1AAoJELvtohmVtQzBX88H/A6iAEM/XanbhKtnMdxLnMrm nA3mMoXZlQ/jqiWXxuzh5MhdPUnzqS8r3R8eVVLy/+/NyYblWSyBJqIjCfQNTWct jhHahHrcLRdje5cU2C8R0DuVqL02mLzcvDHbFKJojS0fGlVqhcWJPCLBkmdjkmpH gjE73dUVBhdTXkuvuj+La15wHr0a0G33oNKDFMhCUnXXHTWJ+ngYBqOrIeOJHmQ8 ykiBRO1qvgRtPwAGd2gpAIUCFZxcMRZvbMm6u+NdTKjCcJsNiE86OiWK7o/xMEZZ Fak1Hs9xHKoStrxgOziZ4CAg4F7odhJr96s7XOC2VFXcf7ropM341vQ14Awjxf8= =vJOo -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 02/18] gpio: Add support for Qualcomm gpio controller
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi All,
Sorry for long delay :)
On 16.02.2016 16:59, Simon Glass wrote:
> Hi,
>
> On 9 February 2016 at 14:25, Jagan Teki wrote:
>> On 8 February 2016 at 02:27, Mateusz Kulikowski
>> wrote:
[...]
>>> +
>>> +Required properties:
>>> +- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl"
>>> +- reg : Physical base address and length of the controller's registers.
>>> + This controller is called "Top Level Mode Multiplexing" in
>>> + Qualcomm documentation.
>>> +- #gpio-cells : Should be one (pin number).
>>> +- gpio-controller : Marks the device node as a GPIO controller.
>>> +- gpio-count: Number of GPIO pins.
>>> +- gpio-bank-name: (optional) name of gpio bank. As default "soc" is used.
>>> +
>>> +Example:
>>> +
>>> +soc_gpios: pinctrl@100 {
>>> + compatible = "qcom,msm8916-pinctrl";
>>
>> Can't this driver goes into pinctrl (I mean gpio handling pincontrol),
>> because Linux handle these gpio msm8916-pinctrl through pinctrl
>> subsystem as per as I know, let me know in case if I miss anything
>> here.
>
> I think Mateusz is planning to add this later. It would be good to get
> this in as a starting point for this platform.
It was exactly my plan. Is it OK with you Jagan?
Regards,
Mateusz
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Re: [U-Boot] [PATCH v2 17/18] board: Add Qualcomm Dragonboard 410C support
-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 Hi, On 31.01.2016 16:17, Simon Glass wrote: > On 24 January 2016 at 13:53, Mateusz Kulikowski > wrote: [...] > > For the readme, can you please do a patch to add a few more things? > > - How to enter fastboot mode I've added it (sorry, it was kind-of obvious for me :) ). > - How pressing power on reset works - it didn't do anything for me For now it's not very helpful as by pressing vol- you end up in fastboot first. But, if you then use fastboot to load u-boot it will stop autoboot command (In case you don't have serial port). = U-Boot 2016.03-rc1-00047-gffd9b24 (Feb 07 2016 - 22:03:00 +0100) Qualcomm-DragonBoard 410C DRAM: 986 MiB MMC: sdhci@07824000: 0, sdhci@07864000: 1 Using default environment In:serial@78b Out: serial@78b Err: serial@78b Power button pressed - dropping to console. Net: Net Initialization Skipped No ethernet found. dragonboard410c => Once I enable UDC controller it will launch fastboot/dfu mode. This will be especially useful when U-Boot will replace little-kernel (that's my goal eventually). Regards, Mateusz -BEGIN PGP SIGNATURE- Version: GnuPG v2 iQEcBAEBCAAGBQJWt7GVAAoJELvtohmVtQzBmoIH/iFrAOtd27Ui98PIv1xVoU+V EwjVuLFVzRxQPAvjb7fMQQ/dZgz29dfgA5eTN5h1Lzs4KM+cQd8H++pNBxwrW8LM 32K9dj9pRVKRsS99jeVjulbOPnIRNRvRqsC4SpBh7iMUATpE/mjY4ELz0y5IY6/h 94TlcNlJk/gUZE+/Nk6XGzpgGV9s5tXjpOVqKvEAQyXju/EuXxUv1AcB54JrZfAT 5w65sHkFo7whdldX8Wub3rJG/BoSR+K1Wxz546zYswSbcbzK3lDN0SJ5Fa+ks8qb 5j1PCV3aP3rQ3iD/md5HdDd5InILNxvNZO9gQweCbYYhnPCXUWdHuVkU7pcu6rA= =AkEV -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 15/18] gpio: Add support for Qualcomm PM8916 gpios
This driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itself as GPIO with 2 inputs (power and reset)
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add Reviewed-by
Changes in v1:
- Add binding doc
- Fixed inlcude ordering
- Merged direction_input and direction_output functions
- gpio_get: use switch instead of stacked if
- use pmic_clrsetbits
- add possibility to change prwkey bank name
- Handle invalid bindings
- Sanity HW check (i.e. check type/subtype registers)
doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48
drivers/gpio/Kconfig | 10 +
drivers/gpio/Makefile | 1 +
drivers/gpio/pm8916_gpio.c| 302 ++
4 files changed, 361 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/pm8916_gpio.txt
create mode 100644 drivers/gpio/pm8916_gpio.c
diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt
b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
new file mode 100644
index 000..58185b8
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
@@ -0,0 +1,48 @@
+Driver for part of pm8916 PMIC - gpio and power/reset keys
+
+This device should be child of SPMI pmic.
+
+1) GPIO driver
+
+Required properties:
+- compatible: "qcom,pm8916-gpio"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- gpio-count: number of GPIOs
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916" is used)
+
+Example:
+
+pmic_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="pmic";
+};
+
+
+2) Power/Reset key driver
+
+Required properties:
+- compatible: "qcom,pm8916-pwrkey"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916_key" is used)
+
+
+Example:
+
+pmic_pon: pon@800 {
+ compatible = "qcom,pm8916-pwrkey";
+ reg = <0x800 0x96>;
+ #gpio-cells = <2>;
+ gpio-controller;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index a5e8182..bbafc63 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -60,6 +60,16 @@ config MSM_GPIO
- APQ8016
- MSM8916
+config PM8916_GPIO
+ bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
+ depends on DM_GPIO && PMIC_PM8916
+ help
+ Support for GPIO pins and power/reset buttons found on
+ Qualcomm PM8916 PMIC.
+ Default name for GPIO bank is "pm8916".
+ Power and reset buttons are placed in "pm8916_key" bank and
+ have gpio numbers 0 and 1 respectively.
+
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 6083c4a..8e880bd 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -48,3 +48,4 @@ obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
+obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o
diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c
new file mode 100644
index 000..1abab7f
--- /dev/null
+++ b/drivers/gpio/pm8916_gpio.c
@@ -0,0 +1,302 @@
+/*
+ * Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register offset for each gpio */
+#define REG_OFFSET(x) ((x) * 0x100)
+
+/* Register maps */
+
+/* Type and subtype are shared for all pm8916 peripherals */
+#define REG_TYPE 0x4
+#define REG_SUBTYPE0x5
+
+#define REG_STATUS 0x08
+#define REG_STATUS_VAL_MASK0x1
+
+/* MODE_CTL */
+#define REG_CTL 0x40
+#define REG_CTL_MODE_MASK 0x70
+#define REG_CTL_MODE_INPUT 0x00
+#define REG_CTL_MODE_INOUT 0x20
+#define REG_CTL_MODE_OUTPUT 0x10
+#define REG_CTL_OUTPUT_MASK 0x0F
+
+#define REG_DIG_VIN_CTL0x41
+#define REG_DIG_VIN_VIN0 0
+
+#define REG_DIG_PULL_CTL 0x42
+#define REG_DIG_PULL_NO_PU 0x5
+
+#define REG_DIG_OUT_CTL0x45
+#define REG_DIG_OUT_CTL_CMOS (0x0 << 4)
+#define REG_DIG_OUT_CTL_DRIVE_L 0x1
+
+#define REG_EN_CTL 0x46
+#define REG_EN_CTL_ENABLE (1 << 7)
+
+struct pm8916_gpio_bank {
+ uint16_t p
[U-Boot] [PATCH v2 17/18] board: Add Qualcomm Dragonboard 410C support
This commit add support for 96Boards Dragonboard410C.
It is board based on APQ8016 Qualcomm SoC, complying with
96boards specification.
Features (present out of the box):
- 4x Cortex A53 (ARMv8)
- 2x USB Host port
- 1x USB Device port
- 4x LEDs
- 1x HDMI connector
- 1x uSD connector
- 3x buttons (Power, Vol+, Vol-/Reset)
- WIFI, Bluetooth with integrated antenna
- 8GiB eMMC
U-Boot boots chained with fastboot in 64-bit mode.
For detailed build instructions see readme.txt in board directory.
Signed-off-by: Mateusz Kulikowski
Tested-by: Simon Glass
---
Changes in v3:
- readme: Added info on how to enter fastboot mode and that
dtbTool is also part of skales
Changes in v2:
- Renamed CONFIG_DM_SPMI -> CONFIG_SPMI
- Removed extra enter in dragonboard file
- Added ULPI* to defconfig
- Added MAINTAINERS to board
- Cleaned up config file - use distro defaults/environment:
- Dropped multiple CONFIG_CMD* and other CONFIG_*
- Added distro env/config
- Dropped old boot commands
- Split dts - pm8916_gpio entries are taken directly from
Linux Dragonboard dts; Add handles for u-boot in -uboot.dtsi;
They will be removed once gpio drivers are converted to pinctrl.
- Renamed some pmic nodes, fixed dragonboard.c to find them properly.
- Added header and converted comments to c98-style in head.S
- Print error if pmic gpio node is not found.
Changes in v1:
- Add better help for dragonboard
- Move static structures to board_prepare_usb
- Add DM_SPMI to defconfig
arch/arm/dts/Makefile| 2 +
arch/arm/dts/dragonboard410c-uboot.dtsi | 28 +
arch/arm/dts/dragonboard410c.dts | 148 ++
arch/arm/mach-snapdragon/Kconfig | 20 +++
board/qualcomm/dragonboard410c/Kconfig | 15 +++
board/qualcomm/dragonboard410c/MAINTAINERS | 6 +
board/qualcomm/dragonboard410c/Makefile | 8 ++
board/qualcomm/dragonboard410c/dragonboard410c.c | 131 +++
board/qualcomm/dragonboard410c/head.S| 28 +
board/qualcomm/dragonboard410c/readme.txt| 43 +++
board/qualcomm/dragonboard410c/u-boot.lds| 90 +
configs/dragonboard410c_defconfig| 31 +
include/configs/dragonboard410c.h| 153 +++
13 files changed, 703 insertions(+)
create mode 100644 arch/arm/dts/dragonboard410c-uboot.dtsi
create mode 100644 arch/arm/dts/dragonboard410c.dts
create mode 100644 board/qualcomm/dragonboard410c/Kconfig
create mode 100644 board/qualcomm/dragonboard410c/MAINTAINERS
create mode 100644 board/qualcomm/dragonboard410c/Makefile
create mode 100644 board/qualcomm/dragonboard410c/dragonboard410c.c
create mode 100644 board/qualcomm/dragonboard410c/head.S
create mode 100644 board/qualcomm/dragonboard410c/readme.txt
create mode 100644 board/qualcomm/dragonboard410c/u-boot.lds
create mode 100644 configs/dragonboard410c_defconfig
create mode 100644 include/configs/dragonboard410c.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0fa5796..ee584de 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -102,6 +102,8 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1043a-qds-lpuart.dtb \
fsl-ls1043a-rdb.dtb
+dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
+
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi
b/arch/arm/dts/dragonboard410c-uboot.dtsi
new file mode 100644
index 000..cc2c175
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -0,0 +1,28 @@
+/*
+ * U-Boot addition to handle Dragonboard 410c pins
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+&pm8916_gpios {
+ usb_hub_reset_pm {
+ gpios = <&pm8916_gpios 2 0>;
+ };
+
+ usb_sw_sel_pm {
+ gpios = <&pm8916_gpios 3 0>;
+ };
+};
+
+
+&pm8916_pon {
+ key_vol_down {
+ gpios = <&pm8916_pon 1 0>;
+ };
+
+ key_power {
+ gpios = <&pm8916_pon 0 0>;
+ };
+};
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
new file mode 100644
index 000..7746622
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -0,0 +1,148 @@
+/*
+ * Qualcomm APQ8016 based Dragonboard 410C board device tree source
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "skeleton64.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. Dragonboard 410c";
+ compatible = "qcom,dragonboard", "qcom,apq8016-sbc";
+ qcom,msm-id = <0xce 0x0 0xf8 0x0 0xf9 0x0 0xfa 0x0 0xf7 0x0>;
+ qcom,board-id = <0x10018 0x0>;
+ #address-cells = <0x2>;
+
[U-Boot] [PATCH v2 16/18] arm: Add support for Qualcomm Snapdragon family
First supported chip is APQ8016 (that is compatible with MSM8916). Drivers in SoC code: - Reset controller (PSHOLD) - Clock controller (very simple clock configuration for MMC and UART) Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass Tested-by: Simon Glass --- Changes in v3: None Changes in v2: - Rename DM_SPMI -> SPMI - Make MND divider comments more compact :) - p -> priv - Add reviewed-by - Reordered Kconfig to keep alphabetical order - Renamed reset_sandbox -> msm_reset (typo in reset.c) Changes in v1: - Fix include order - Cleanup defines (added spaces for readibility) - Base address is integer to avoid casting - Use setbits_* family where possible - Drop unneded comments, added newlines where needed - Check return value of dev_get_addr - Add binding for apq8016 - Cleaned up divider calculation - Drop most of gpio.h (only empty file is needed) arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/mach-snapdragon/Kconfig | 6 + arch/arm/mach-snapdragon/Makefile | 8 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 + arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 ++ arch/arm/mach-snapdragon/reset.c | 40 8 files changed, 352 insertions(+) create mode 100644 arch/arm/mach-snapdragon/Kconfig create mode 100644 arch/arm/mach-snapdragon/Makefile create mode 100644 arch/arm/mach-snapdragon/clock-apq8016.c create mode 100644 arch/arm/mach-snapdragon/include/mach/gpio.h create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h create mode 100644 arch/arm/mach-snapdragon/reset.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d2dbb1a..f16d0d9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -504,6 +504,16 @@ config RMOBILE bool "Renesas ARM SoCs" select CPU_V7 +config ARCH_SNAPDRAGON + bool "Qualcomm Snapdragon SoCs" + select ARM64 + select DM + select DM_GPIO + select DM_SERIAL + select SPMI + select OF_CONTROL + select OF_SEPARATE + config ARCH_SOCFPGA bool "Altera SOCFPGA family" select CPU_V7 @@ -760,6 +770,8 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" +source "arch/arm/mach-snapdragon/Kconfig" + source "arch/arm/mach-socfpga/Kconfig" source "arch/arm/mach-stm32/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index cd7d880..661de56 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -54,6 +54,7 @@ machine-$(CONFIG_ARCH_MVEBU) += mvebu # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx +machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip machine-$(CONFIG_STM32)+= stm32 diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig new file mode 100644 index 000..156e733 --- /dev/null +++ b/arch/arm/mach-snapdragon/Kconfig @@ -0,0 +1,6 @@ +if ARCH_SNAPDRAGON + +config SYS_SOC + default "snapdragon" + +endif diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile new file mode 100644 index 000..8e84705 --- /dev/null +++ b/arch/arm/mach-snapdragon/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2015 Mateusz Kulikowski +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += clock-apq8016.o +obj-y += reset.o diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c new file mode 100644 index 000..d548d75 --- /dev/null +++ b/arch/arm/mach-snapdragon/clock-apq8016.c @@ -0,0 +1,262 @@ +/* + * Clock drivers for Qualcomm APQ8016 + * + * (C) Copyright 2015 Mateusz Kulikowski + * + * Based on Little Kernel driver, simplified + * + * SPDX-License-Identifier:BSD-3-Clause + */ + +#include +#include +#include +#include +#include +#include + +/* GPLL0 clock control registers */ +#define GPLL0_STATUS0x2101C +#define GPLL0_STATUS_ACTIVE BIT(17) + +#define APCS_GPLL_ENA_VOTE 0x45000 +#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0) + +/* vote reg for blsp1 clock */ +#define APCS_CLOCK_BRANCH_ENA_VOTE 0x45004 +#define APCS_CLOCK_BRANCH_ENA_VOTE_BLSP1 BIT(10) + +/* SDC(n) clock control registers; n=1,2 */ + +/* block control register */ +#define SDCC_BCR(n) ((n * 0x1000) + 0x41000) +/* cmd */ +#define SDCC_CMD_RCGR(n)((n * 0x1000) + 0x41004) +/* cfg */ +#define SDCC_CFG_RCGR(n)((n * 0x1000) + 0x41008) +/* m */ +#define SDCC_M(n) ((n * 0x1000) + 0x4100C) +/* n */ +#define
[U-Boot] [PATCH v2 18/18] Add myself as Snapdragon and SPMI maintainer
- Update MAINTAINERS - Update git-mailrc Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v3: None Changes in v2: - New patch Changes in v1: None MAINTAINERS| 11 +++ doc/git-mailrc | 3 +++ 2 files changed, 14 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b387207..56a0eba 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -125,6 +125,11 @@ F: arch/arm/mach-s5pc1xx/ F: arch/arm/cpu/armv7/s5p-common/ F: arch/arm/include/asm/arch-s3c24x0/ +ARM SNAPDRAGON +M: Mateusz Kulikowski +S: Maintained +F: arch/arm/mach-snapdragon/ + ARM STM SPEAR M: Vipin Kumar S: Maintained @@ -389,6 +394,12 @@ F: drivers/mtd/spi/ F: drivers/spi/ F: include/spi* +SPMI +M: Mateusz Kulikowski +S: Maintained +F: drivers/spmi/ +F: include/spmi/ + TQ GROUP M: Martin Krause S: Maintained diff --git a/doc/git-mailrc b/doc/git-mailrc index ced7085..1201d4a 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -33,6 +33,7 @@ alias lukma Lukasz Majewski alias macpaulMacpaul Lin alias marex Marek Vasut alias masahiro Masahiro Yamada +alias mateuszMateusz Kulikowski alias monstr Michal Simek alias panto Pantelis Antoniou alias prafulla Prafulla Wadaskar @@ -67,6 +68,7 @@ alias rmobileuboot, iwamatsu alias s3csamsung alias s5pc samsung alias samsunguboot, prom +alias snapdragon uboot, mateusz alias socfpgauboot, marex, Dinh Nguyen alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren , Stephen Warren @@ -127,6 +129,7 @@ alias nand uboot, scottwood alias netuboot, jhersh alias phyuboot, jhersh alias spiuboot, jagan +alias spmi uboot, mateusz alias ubiuboot, hs alias usbuboot, marex alias video uboot, ag -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 12/18] spmi: Add sandbox test driver
This patch adds emulated spmi bus controller with part of
pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
---
Changes in v3:
- Updated test.dts to include SPMI like sandbox.dts does
Changes in v2:
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Rename r -> regs, p -> priv
- Add reviewed-by
- Update binding doc (drop unused bindig)
Changes in v1: None
arch/sandbox/dts/sandbox.dts | 20
arch/sandbox/dts/test.dts | 20
configs/sandbox_defconfig | 4 +
doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 +
drivers/spmi/Kconfig | 8 ++
drivers/spmi/Makefile | 1 +
drivers/spmi/spmi-sandbox.c| 157 +
test/dm/Makefile | 1 +
test/dm/spmi.c | 115 ++
9 files changed, 357 insertions(+)
create mode 100644 doc/device-tree-bindings/spmi/spmi-sandbox.txt
create mode 100644 drivers/spmi/spmi-sandbox.c
create mode 100644 test/dm/spmi.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index e3f02bf..2ae4014 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -240,6 +240,26 @@
status = "disabled";
};
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
};
#include "cros-ec-keyboard.dtsi"
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 9b8d658..8930009 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -351,6 +351,26 @@
status = "disabled";
};
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
};
#include "sandbox_pmic.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index b5b81ca..e349234 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -31,6 +31,7 @@ CONFIG_ADC=y
CONFIG_ADC_SANDBOX=y
CONFIG_CLK=y
CONFIG_SANDBOX_GPIO=y
+CONFIG_PM8916_GPIO=y
CONFIG_SYS_I2C_SANDBOX=y
CONFIG_CROS_EC_KEYB=y
CONFIG_LED=y
@@ -58,6 +59,9 @@ CONFIG_PINCONF=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_SANDBOX=y
+CONFIG_PMIC_PM8916=y
+CONFIG_SPMI=y
+CONFIG_SPMI_SANDBOX=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_SANDBOX=y
CONFIG_RAM=y
diff --git a/doc/device-tree-bindings/spmi/spmi-sandbox.txt
b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
new file mode 100644
index 000..8569a1a
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
@@ -0,0 +1,31 @@
+Sandbox SPMI emulated arbiter.
+
+This is bus driver for Sandbox. It includes part of emulated pm8916 pmic.
+
+Required properties:
+- compatible: "sandbox,spmi"
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+Example:
+
+spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: g
[U-Boot] [PATCH v2 14/18] pmic: Add support for Qualcomm PM8916 PMIC
This PMIC is connected on SPMI bus so needs SPMI support enabled.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add reviewed-by
- Reordered Kconfig & Makefile (to keep alphabetical ordering)
- Added link to dt binding @ help
Changes in v1:
- Added dt bindings
- Reoder includes
- Replaced extract_* macros with ordinary shift/mask
- Added error checking and whitespaces in probe
doc/device-tree-bindings/pmic/pm8916.txt | 18 ++
drivers/power/pmic/Kconfig | 16 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/pm8916.c | 96
4 files changed, 131 insertions(+)
create mode 100644 doc/device-tree-bindings/pmic/pm8916.txt
create mode 100644 drivers/power/pmic/pm8916.c
diff --git a/doc/device-tree-bindings/pmic/pm8916.txt
b/doc/device-tree-bindings/pmic/pm8916.txt
new file mode 100644
index 000..15c598b
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/pm8916.txt
@@ -0,0 +1,18 @@
+Qualcomm pm8916 PMIC
+
+This PMIC is connected using SPMI bus so should be child of SPMI bus
controller.
+
+Required properties:
+- compatible: "qcom,spmi-pmic";
+- reg: SPMI Slave ID, size (ignored)
+- #address-cells: 0x1 (peripheral ID)
+- #size-cells: 0x1 (size of peripheral register space)
+
+Example:
+
+pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+};
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 7f69ae1..69f8d51 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -54,6 +54,22 @@ config DM_PMIC_MAX77686
This config enables implementation of driver-model pmic uclass features
for PMIC MAX77686. The driver implements read/write operations.
+config PMIC_PM8916
+ bool "Enable Driver Model for Qualcomm PM8916 PMIC"
+ depends on DM_PMIC
+ ---help---
+ The PM8916 is a PMIC connected to one (or several) processors
+ with SPMI bus. It has 2 slaves with several peripherals:
+ - 18x LDO
+ - 4x GPIO
+ - Power and Reset buttons
+ - Watchdog
+ - RTC
+ - Vibrator drivers
+ - Others
+
+ Driver binding info: doc/device-tree-bindings/pmic/pm8916.txt
+
config PMIC_RK808
bool "Enable support for Rockchip PMIC RK808"
depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index c6e8d0c..52b4f71 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
+obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_RK808) += rk808.o
obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
diff --git a/drivers/power/pmic/pm8916.c b/drivers/power/pmic/pm8916.c
new file mode 100644
index 000..9acf5f5
--- /dev/null
+++ b/drivers/power/pmic/pm8916.c
@@ -0,0 +1,96 @@
+/*
+ * Qualcomm pm8916 pmic driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define PID_SHIFT 8
+#define PID_MASK (0xFF << PID_SHIFT)
+#define REG_MASK 0xFF
+
+struct pm8916_priv {
+ uint16_t usid; /* Slave ID on SPMI bus */
+};
+
+static int pm8916_reg_count(struct udevice *dev)
+{
+ return 0x;
+}
+
+static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ if (len != 1)
+ return -EINVAL;
+
+ return spmi_reg_write(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK,
+ *buff);
+}
+
+static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+ int val;
+
+ if (len != 1)
+ return -EINVAL;
+
+ val = spmi_reg_read(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK);
+
+ if (val < 0)
+ return val;
+ *buff = val;
+ return 0;
+}
+
+static struct dm_pmic_ops pm8916_ops = {
+ .reg_count = pm8916_reg_count,
+ .read = pm8916_read,
+ .write = pm8916_write,
+};
+
+static const struct udevice_id pm8916_ids[] = {
+ { .compatible = "qcom,spmi-pmic" },
+ { }
+};
+
+static int pm8916_probe(struct udevice *dev)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ priv->usid = dev_get_ad
[U-Boot] [PATCH v2 11/18] drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Use proper entry order in Kconfig
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Fix header ordering
- Add reviewed-by
Changes in v1:
- Reorder includes
- Add read/write arguments documentation
drivers/Kconfig| 2 ++
drivers/Makefile | 1 +
drivers/spmi/Kconfig | 10 ++
drivers/spmi/Makefile | 7 +++
drivers/spmi/spmi-uclass.c | 48 ++
include/dm/uclass-id.h | 1 +
include/spmi/spmi.h| 47 +
7 files changed, 116 insertions(+)
create mode 100644 drivers/spmi/Kconfig
create mode 100644 drivers/spmi/Makefile
create mode 100644 drivers/spmi/spmi-uclass.c
create mode 100644 include/spmi/spmi.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 70993fd..c82a94b 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -60,6 +60,8 @@ source "drivers/sound/Kconfig"
source "drivers/spi/Kconfig"
+source "drivers/spmi/Kconfig"
+
source "drivers/thermal/Kconfig"
source "drivers/timer/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index e7eab66..6900097 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -54,6 +54,7 @@ obj-y += dfu/
obj-$(CONFIG_X86) += pch/
obj-y += rtc/
obj-y += sound/
+obj-y += spmi/
obj-y += timer/
obj-y += tpm/
obj-y += twserial/
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
new file mode 100644
index 000..0b9bd31
--- /dev/null
+++ b/drivers/spmi/Kconfig
@@ -0,0 +1,10 @@
+menu "SPMI support"
+
+config SPMI
+ bool "Enable SPMI bus support"
+ depends on DM
+ ---help---
+ Select this to enable to support SPMI bus.
+ SPMI (System Power Management Interface) bus is used
+ to connect PMIC devices on various SoCs.
+endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
new file mode 100644
index 000..99092eb
--- /dev/null
+++ b/drivers/spmi/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Mateusz Kulikowski
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_SPMI) += spmi-uclass.o
diff --git a/drivers/spmi/spmi-uclass.c b/drivers/spmi/spmi-uclass.c
new file mode 100644
index 000..4ddd51b
--- /dev/null
+++ b/drivers/spmi/spmi-uclass.c
@@ -0,0 +1,48 @@
+/*
+ * SPMI bus uclass driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->read)
+ return -ENOSYS;
+
+ return ops->read(dev, usid, pid, reg);
+}
+
+int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
+ uint8_t value)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->write)
+ return -ENOSYS;
+
+ return ops->write(dev, usid, pid, reg, value);
+}
+
+static int spmi_post_bind(struct udevice *dev)
+{
+ return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+}
+
+UCLASS_DRIVER(spmi) = {
+ .id = UCLASS_SPMI,
+ .name = "spmi",
+ .post_bind = spmi_post_bind,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 73cd3ac..956b63f 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -64,6 +64,7 @@ enum uclass_id {
UCLASS_RTC, /* Real time clock device */
UCLASS_SERIAL, /* Serial UART */
UCLASS_SPI, /* SPI bus */
+ UCLASS_SPMI,/* System Power Management Interface bus */
UCLASS_SPI_FLASH, /* SPI flash */
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_SYSCON, /* System configuration device */
diff --git a/include/spmi/spmi.h b/include/spmi/spmi.h
new file mode 100644
index 000..65a49bd
--- /dev/null
+++ b/include/spmi/spmi.h
@@ -0,0 +1,47 @@
+#ifndef _SPMI_SPMI_H
+#define _SPMI_SPMI_H
+
+/**
+ * struct dm_spmi_ops - SPMI device I/O interface
+ *
+ * Should be implemented by UCLASS_SPMI device drivers. The standard
+ * device operations provides the I/O interface for it's childs.
+ *
+ * @read: read register 'reg' of slave 'usid' and peripheral 'pid'
+ * @write: write register 'r
[U-Boot] [PATCH v2 13/18] drivers: spmi: Add support for Qualcomm SPMI bus driver
Support SPMI arbiter on Qualcomm Snapdragon devices.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Rename DM_SPMI -> SPMI
- Rename p -> priv (in write/read)
- Fix header ordering (again)
- Add reviewed-by
Changes in v1:
- add binding documentation and better Kconfig help
- Changed a bit mapping
- Change include order
- Use clrsetbits* where possible
- Add one more supported dts id
- Handle missing fields in dt properly
doc/device-tree-bindings/spmi/spmi-msm.txt | 26
drivers/spmi/Kconfig | 7 +-
drivers/spmi/Makefile | 1 +
drivers/spmi/spmi-msm.c| 189 +
4 files changed, 222 insertions(+), 1 deletion(-)
create mode 100644 doc/device-tree-bindings/spmi/spmi-msm.txt
create mode 100644 drivers/spmi/spmi-msm.c
diff --git a/doc/device-tree-bindings/spmi/spmi-msm.txt
b/doc/device-tree-bindings/spmi/spmi-msm.txt
new file mode 100644
index 000..ae47673
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-msm.txt
@@ -0,0 +1,26 @@
+Qualcomm SPMI arbiter/bus driver
+
+This is bus driver for Qualcomm chips that use SPMI to communicate with PMICs.
+
+Required properties:
+- compatible: "qcom,spmi-pmic-arb"
+- reg: Register block adresses and sizes for various parts of device:
+ 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn)
+ 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS)
+ 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS)
+
+Optional properties (if not set by parent):
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+All PMICs should be placed as a child nodes of bus arbiter.
+Automatic detection of childs is currently not supported.
+
+Example:
+
+spmi@200f000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg = <0x200f800 0x200 0x240 0x40 0x2c0 0x40>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+};
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index c70d675..8d25b45 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -8,11 +8,16 @@ config SPMI
SPMI (System Power Management Interface) bus is used
to connect PMIC devices on various SoCs.
+config SPMI_MSM
+ boolean "Support Qualcomm SPMI bus"
+ depends on SPMI
+ ---help---
+ Support SPMI bus implementation found on Qualcomm Snapdragon SoCs.
+
config SPMI_SANDBOX
boolean "Support for Sandbox SPMI bus"
depends on SPMI
---help---
Demo SPMI bus implementation. Emulates part of PM8916 as single
slave (0) on bus. It has 4 GPIO peripherals, pid 0xC0-0xC3.
-
endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 4ca65a9..c0b1220 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -5,4 +5,5 @@
#
obj-$(CONFIG_SPMI) += spmi-uclass.o
+obj-$(CONFIG_SPMI_MSM) += spmi-msm.o
obj-$(CONFIG_SPMI_SANDBOX) += spmi-sandbox.o
diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
new file mode 100644
index 000..0cef505
--- /dev/null
+++ b/drivers/spmi/spmi-msm.c
@@ -0,0 +1,189 @@
+/*
+ * Qualcomm SPMI bus driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Loosely based on Little Kernel driver
+ *
+ * SPDX-License-Identifier:BSD-3-Clause
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ARB_CHANNEL_OFFSET(n) (0x4 * (n))
+#define SPMI_CH_OFFSET(chnl) ((chnl) * 0x8000)
+
+#define SPMI_REG_CMD0 0x0
+#define SPMI_REG_CONFIG0x4
+#define SPMI_REG_STATUS0x8
+#define SPMI_REG_WDATA 0x10
+#define SPMI_REG_RDATA 0x18
+
+#define SPMI_CMD_OPCODE_SHIFT 27
+#define SPMI_CMD_SLAVE_ID_SHIFT20
+#define SPMI_CMD_ADDR_SHIFT12
+#define SPMI_CMD_ADDR_OFFSET_SHIFT 4
+#define SPMI_CMD_BYTE_CNT_SHIFT0
+
+#define SPMI_CMD_EXT_REG_WRITE_LONG0x00
+#define SPMI_CMD_EXT_REG_READ_LONG 0x01
+
+#define SPMI_STATUS_DONE 0x1
+
+#define SPMI_MAX_CHANNELS 128
+#define SPMI_MAX_SLAVES16
+#define SPMI_MAX_PERIPH256
+
+struct msm_spmi_priv {
+ phys_addr_t arb_chnl; /* ARB channel mapping base */
+ phys_addr_t spmi_core; /* SPMI core */
+ phys_addr_t spmi_obs; /* SPMI observer */
+ /* SPMI channel map */
+ uint8_t channel_map[SPMI_MAX_SLAVES][SPMI_MAX_PERIPH];
+};
+
+static int msm_spmi_write(struct udevice *dev, int usid, int pid, int off,
+ uint8_t val)
+{
+ struct msm_spmi_priv *priv = dev_get_priv(dev);
+ unsigned channel;
+ uint32_t reg = 0;
+
+ if (usid >= SPMI_MAX_SLAVES)
+ return -E
[U-Boot] [PATCH v2 10/18] ehci: Add support for Qualcomm EHCI
This driver is able to reconfigure OTG controller into HOST mode.
Board can add board-specific initialization as board_prepare_usb().
It requires USB_ULPI_VIEWPORT enabled in board configuration.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Use PORT_... macro to write to portsc
- Remove extra whitespace in probe()
- Add acked-by
Changes in v1:
- Reordered header files
- Removed braces around constant
- Added more verbose help to KConfig
- Added ULPI dependency to Kconfig
- Drop register #defines - use ehci-ci.h instead
- Create fixed ulpi viewport for device
- Use setbits/clearbits where possible
- Use wait_for_bit to reset controller
- Add dt binding documents
doc/device-tree-bindings/usb/ehci-msm.txt | 10 ++
drivers/usb/host/Kconfig | 11 ++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/ehci-msm.c | 178 ++
4 files changed, 200 insertions(+)
create mode 100644 doc/device-tree-bindings/usb/ehci-msm.txt
create mode 100644 drivers/usb/host/ehci-msm.c
diff --git a/doc/device-tree-bindings/usb/ehci-msm.txt
b/doc/device-tree-bindings/usb/ehci-msm.txt
new file mode 100644
index 000..205bb07
--- /dev/null
+++ b/doc/device-tree-bindings/usb/ehci-msm.txt
@@ -0,0 +1,10 @@
+Chipidea EHCI controller (part of OTG controller) used on Qualcomm devices.
+
+Required properties:
+- compatible: must be "qcom,ehci-host"
+- reg: start address and size of the registers
+
+ehci@78d9000 {
+ compatible = "qcom,ehci-host";
+ reg = <0x78d9000 0x400>;
+};
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 39f7185..ff5e843 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -74,6 +74,17 @@ config USB_EHCI_MX6
---help---
Enables support for the on-chip EHCI controller on i.MX6 SoCs.
+config USB_EHCI_MSM
+ bool "Support for Qualcomm on-chip EHCI USB controller"
+ depends on DM_USB
+ select USB_ULPI_VIEWPORT
+ default n
+ ---help---
+ Enables support for the on-chip EHCI controller on Qualcomm
+ Snapdragon SoCs.
+ This driver supports combination of Chipidea USB controller
+ and Synapsys USB PHY in host mode only.
+
config USB_EHCI_UNIPHIER
bool "Support for UniPhier on-chip EHCI USB controller"
depends on ARCH_UNIPHIER && OF_CONTROL
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 6183b80..426b066 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o
obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
+obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
obj-$(CONFIG_USB_EHCI_SPEAR) += ehci-spear.o
obj-$(CONFIG_USB_EHCI_SUNXI) += ehci-sunxi.o
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
new file mode 100644
index 000..6484c1c
--- /dev/null
+++ b/drivers/usb/host/ehci-msm.c
@@ -0,0 +1,178 @@
+/*
+ * Qualcomm EHCI driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Based on Linux driver
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "ehci.h"
+
+/* PHY viewport regs */
+#define ULPI_MISC_A_READ 0x96
+#define ULPI_MISC_A_SET 0x97
+#define ULPI_MISC_A_CLEAR0x98
+#define ULPI_MISC_A_VBUSVLDEXTSEL(1 << 1)
+#define ULPI_MISC_A_VBUSVLDEXT (1 << 0)
+
+#define GEN2_SESS_VLD_CTRL_EN (1 << 7)
+
+#define SESS_VLD_CTRL (1 << 25)
+
+struct msm_ehci_priv {
+ struct ehci_ctrl ctrl; /* Needed by EHCI */
+ struct usb_ehci *ehci; /* Start of IP core*/
+ struct ulpi_viewport ulpi_vp; /* ULPI Viewport */
+};
+
+int __weak board_prepare_usb(enum usb_init_type type)
+{
+ return 0;
+}
+
+static void setup_usb_phy(struct msm_ehci_priv *priv)
+{
+ /* Select and enable external configuration with USB PHY */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_SET,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+}
+
+static void reset_usb_phy(struct msm_ehci_priv *priv)
+{
+ /* Disable VBUS mimicing in the controller. */
+ ulpi_write(&priv->ulpi_vp, (u8 *)ULPI_MISC_A_CLEAR,
+ ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT);
+}
+
+
+static int msm_init_after_reset(struct ehci_ctrl *dev)
+{
+ struct msm_ehci_priv *p = container_of(dev, struct msm_ehci_priv, ctrl);
+ struct usb_ehci *ehci = p->ehci;
+
+ /* select ULPI phy */
+ writel(PORT_PTS_ULPI, &ehci->portsc);
+
[U-Boot] [PATCH v2 09/18] ehci-ci.h: drop generic USBCMD fields
Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add Acked-by
Changes in v1: None
drivers/usb/host/ehci-mpc512x.c | 4 ++--
include/usb/ehci-ci.h | 4
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index 4b50ac8..bb4f461 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -93,7 +93,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
unsigned int i;
/* Command a reset of the USB Controller */
- out_be32(&(ehci->usbcmd), EHCI_FSL_USBCMD_RST);
+ out_be32(&(ehci->usbcmd), CMD_RESET);
/* Wait for the reset process to finish */
for (i = 65535 ; i > 0 ; i--) {
@@ -101,7 +101,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
* The host will set this bit to zero once the
* reset process is complete
*/
- if ((in_be32(&(ehci->usbcmd)) & EHCI_FSL_USBCMD_RST) == 0)
+ if ((in_be32(&(ehci->usbcmd)) & CMD_RESET) == 0)
return 0;
}
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 305b180..586d32a 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -97,10 +97,6 @@
#define INTR_DATA_PULSING_EN (0x1<<30)
#define INTSTS_MASK(0x00ff)
-/* USBCMD Bits of interest */
-#define EHCI_FSL_USBCMD_RST(1 << 1)
-#define EHCI_FSL_USBCMD_RS (1 << 0)
-
#define INTERRUPT_ENABLE_BITS_MASK \
(INTR_USB_ID_EN | \
INTR_1MS_TIMER_EN | \
--
2.5.0
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[U-Boot] [PATCH v2 06/18] Migrate CONFIG_ULPI* to Kconfig
Move CONFIG_USB_ULPI* from headers to defconfigs for boards that use it. Also - add CONFIG_USB where necesarry - all boards use it, but some are not defining it explicitly. Affected boards: colibri_t20, harmony, mcx, mt_ventoux, twister, zynq_(picozed, zc702, zc706, zed, zybo) Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v3: None Changes in v2: - New patch, independent of the rest - Should compile cleanly on all affected platforms - Is orthogonal to series (i.e. if get's NAK will not break rest of series) Changes in v1: None configs/colibri_t20_defconfig| 2 ++ configs/harmony_defconfig| 2 ++ configs/mcx_defconfig| 3 +++ configs/mt_ventoux_defconfig | 3 +++ configs/twister_defconfig| 3 +++ configs/zynq_picozed_defconfig | 3 +++ configs/zynq_zc702_defconfig | 3 +++ configs/zynq_zc706_defconfig | 3 +++ configs/zynq_zed_defconfig | 3 +++ configs/zynq_zybo_defconfig | 3 +++ include/configs/colibri_t20.h| 2 -- include/configs/harmony.h| 2 -- include/configs/mcx.h| 2 -- include/configs/tam3517-common.h | 2 -- include/configs/zynq-common.h| 2 -- 15 files changed, 28 insertions(+), 10 deletions(-) diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 982cee4..143d33a 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -14,4 +14,6 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index a3f73cc..1a301f8 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -15,4 +15,6 @@ CONFIG_CMD_GPIO=y CONFIG_SYS_NS16550=y CONFIG_USB=y CONFIG_DM_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index 1e204d5..612bf66 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -10,3 +10,6 @@ CONFIG_SYS_PROMPT="mcx # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index a0153e4..8b3298b 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -8,3 +8,6 @@ CONFIG_SYS_PROMPT="mt_ventoux => " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index e721edb..a1abbe1 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -8,3 +8,6 @@ CONFIG_SYS_PROMPT="twister => " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_SYS_NS16550=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT_OMAP=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index fbc603f..33f9d3b 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -11,3 +11,6 @@ CONFIG_CMD_GPIO=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ZYNQ_GEM=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 3540653..3a2341a 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -23,3 +23,6 @@ CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=5000 CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index f333b7a..e85d5f9 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -20,3 +20,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 5868012..fd62966 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -20,3 +20,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index ebaae49..a87c167 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -21,3 +21,6 @@ CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_DEBUG_UART_CLOCK=5000 CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_VIEWPORT=y diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index 7611fc5..270eb1d 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -36,8 +36,6 @@ /* USB host support */ #define CONFI
[U-Boot] [PATCH v2 05/18] usb: ulpi: Add Kconfig options for ULPI
The following options can be now enabled via defconfig: - CONFIG_USB_ULPI - CONFIG_USB_ULPI_VIEWPORT - CONFIG_USB_ULPI_VIEWPORT_OMAP Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v3: None Changes in v2: - Add better (any) descriptions for Kconfig items. Changes in v1: None drivers/usb/Kconfig | 2 ++ drivers/usb/ulpi/Kconfig | 33 + 2 files changed, 35 insertions(+) create mode 100644 drivers/usb/ulpi/Kconfig diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index abb06fc..57b99f2 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -53,6 +53,8 @@ source "drivers/usb/musb-new/Kconfig" source "drivers/usb/emul/Kconfig" +source "drivers/usb/ulpi/Kconfig" + comment "USB peripherals" config USB_STORAGE diff --git a/drivers/usb/ulpi/Kconfig b/drivers/usb/ulpi/Kconfig new file mode 100644 index 000..329d2df --- /dev/null +++ b/drivers/usb/ulpi/Kconfig @@ -0,0 +1,33 @@ +comment "ULPI drivers" + +choice + prompt "ULPI Viewport type" + optional + default n + help + Select ULPI viewport (SoC-side interface to ULPI) implementation + appropriate for the device if you want to communicate with + UTMI (USB PHY) via ULPI interface. + +config USB_ULPI_VIEWPORT + bool "Generic ULPI Viewport" + help + Support generic ULPI Viewport implementation that is used on + some Tegra and Snapdragon devices. + +config USB_ULPI_VIEWPORT_OMAP + bool "OMAP ULPI Viewport" + help + Support ULPI Viewport implementation that is used on OMAP devices. + +endchoice + +config USB_ULPI + bool "ULPI support" + depends on (USB_ULPI_VIEWPORT || USB_ULPI_VIEWPORT_OMAP) + help + Select to commnicate with USB PHY via ULPI interface. + ULPI is wrapper on UTMI+ core that is used as + PHY Transreceiver for USB controllers. + + This driver uses ULPI viewports that are specific for each SoC. -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/18] gpio: Add support for Qualcomm gpio controller
Add support for gpio controllers on Qualcomm Snapdragon devices.
This devices are usually called Top Level Mode Multiplexing in
Qualcomm documentation.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Reordered includes (again)
- Added newlines between returns
- Fixed error handling in msm_gpio_probe
- Added reviewed-by
Changes in v1:
- Added dt binding documentation
- Added help to KConfig
- Use clrsetbits() to switch direction
- Fixed include order
- Added #defines for registers/register fields
- Added secondary compatible string
doc/device-tree-bindings/gpio/gpio-msm.txt | 22 +
drivers/gpio/Kconfig | 14 +++
drivers/gpio/Makefile | 1 +
drivers/gpio/msm_gpio.c| 135 +
4 files changed, 172 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/gpio-msm.txt
create mode 100644 drivers/gpio/msm_gpio.c
diff --git a/doc/device-tree-bindings/gpio/gpio-msm.txt
b/doc/device-tree-bindings/gpio/gpio-msm.txt
new file mode 100644
index 000..966ce0a
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/gpio-msm.txt
@@ -0,0 +1,22 @@
+Qualcomm Snapdragon GPIO controller
+
+Required properties:
+- compatible : "qcom,msm8916-pinctrl" or "qcom,apq8016-pinctrl"
+- reg : Physical base address and length of the controller's registers.
+ This controller is called "Top Level Mode Multiplexing" in
+ Qualcomm documentation.
+- #gpio-cells : Should be one (pin number).
+- gpio-controller : Marks the device node as a GPIO controller.
+- gpio-count: Number of GPIO pins.
+- gpio-bank-name: (optional) name of gpio bank. As default "soc" is used.
+
+Example:
+
+soc_gpios: pinctrl@100 {
+ compatible = "qcom,msm8916-pinctrl";
+ reg = <0x100 0x30>;
+ gpio-controller;
+ gpio-count = <122>;
+ gpio-bank-name="soc";
+ #gpio-cells = <1>;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 845dc72..a5e8182 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -46,6 +46,20 @@ config LPC32XX_GPIO
help
Support for the LPC32XX GPIO driver.
+config MSM_GPIO
+ bool "Qualcomm GPIO driver"
+ depends on DM_GPIO
+ default n
+ help
+ Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
+ This controller have single bank (default name "soc"), every
+ gpio has it's own set of registers.
+ Only simple GPIO operations are supported (get/set, change of
+ direction and checking pin function).
+ Supported devices:
+ - APQ8016
+ - MSM8916
+
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 845a6d4..6083c4a 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -47,3 +47,4 @@ obj-$(CONFIG_ZYNQ_GPIO) += zynq_gpio.o
obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_PIC32_GPIO) += pic32_gpio.o
+obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
diff --git a/drivers/gpio/msm_gpio.c b/drivers/gpio/msm_gpio.c
new file mode 100644
index 000..950f309
--- /dev/null
+++ b/drivers/gpio/msm_gpio.c
@@ -0,0 +1,135 @@
+/*
+ * Qualcomm GPIO driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register offsets */
+#define GPIO_CONFIG_OFF(no) ((no) * 0x1000)
+#define GPIO_IN_OUT_OFF(no) ((no) * 0x1000 + 0x4)
+
+/* OE */
+#define GPIO_OE_DISABLE (0x0 << 9)
+#define GPIO_OE_ENABLE (0x1 << 9)
+#define GPIO_OE_MASK (0x1 << 9)
+
+/* GPIO_IN_OUT register shifts. */
+#define GPIO_IN 0
+#define GPIO_OUT 1
+
+struct msm_gpio_bank {
+ phys_addr_t base;
+};
+
+static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+ phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
+
+ /* Disable OE bit */
+ clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE);
+
+ return 0;
+}
+
+static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+
+ value = !!value;
+ /* set value */
+ writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
+
+ return 0;
+}
+
+static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
+int value)
+{
+ struct msm_gpio_bank *priv = dev_get_priv(dev);
+ phys_addr_t reg = priv->base + GPIO_CONFIG
[U-Boot] [PATCH v2 08/18] usb: ehci-ci: Add missing registers.
Some registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have
meaning on other devices.
The following registers were added:
sbusstatus/sbusmode: AHB-related registers
genconfig*: Auxiluary IP core configuration registers.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1: None
include/usb/ehci-ci.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 725aec5..305b180 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -191,7 +191,11 @@ struct usb_ehci {
u32 gptimer1_ld;/* 0x088 - General Purpose Timer 1 load value */
u32 gptimer1_ctrl; /* 0x08C - General Purpose Timer 1 control */
u32 sbuscfg;/* 0x090 - System Bus Interface Control */
- u8 res2[0x6C];
+ u32 sbusstatus; /* 0x094 - System Bus Interface Status */
+ u32 sbusmode; /* 0x098 - System Bus Interface Mode */
+ u32 genconfig; /* 0x09C - USB Core Configuration */
+ u32 genconfig2; /* 0x0A0 - USB Core Configuration 2 */
+ u8 res2[0x5c];
u8 caplength; /* 0x100 - Capability Register Length */
u8 res3[0x1];
u16 hciversion; /* 0x102 - Host Interface Version */
--
2.5.0
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[U-Boot] [PATCH v2 07/18] usb: Rename ehci-fsl.h to ehci-ci.h
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add acked-by
Changes in v1: None
drivers/usb/host/ehci-fsl.c | 2 +-
drivers/usb/host/ehci-mpc512x.c | 2 +-
drivers/usb/host/ehci-mx5.c | 2 +-
drivers/usb/host/ehci-mx6.c | 2 +-
drivers/usb/host/ehci-mxc.c | 2 +-
drivers/usb/host/ehci-vf.c| 2 +-
drivers/usb/host/ehci-zynq.c | 2 +-
include/usb/{ehci-fsl.h => ehci-ci.h} | 6 +++---
8 files changed, 10 insertions(+), 10 deletions(-)
rename include/usb/{ehci-fsl.h => ehci-ci.h} (99%)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 97b7f14..4bcea9d 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -12,7 +12,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index b320c4a..4b50ac8 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -17,7 +17,7 @@
#include
#include
#include
-#include
+#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index d319962..2b36ceb 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -9,7 +9,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index e1c67f7..a981b50 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -10,7 +10,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index f09c75a..f8324ee 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -9,7 +9,7 @@
#include
#include
#include
-#include
+#include
#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index 335e303..61789dd 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -17,7 +17,7 @@
#include
#include
#include
-#include
+#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c
index 7770d05..37a7935 100644
--- a/drivers/usb/host/ehci-zynq.c
+++ b/drivers/usb/host/ehci-zynq.c
@@ -11,7 +11,7 @@
#include
#include
#include
-#include
+#include
#include
#include "ehci.h"
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-ci.h
similarity index 99%
rename from include/usb/ehci-fsl.h
rename to include/usb/ehci-ci.h
index e9349b5..725aec5 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-ci.h
@@ -6,8 +6,8 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#ifndef _EHCI_FSL_H
-#define _EHCI_FSL_H
+#ifndef _EHCI_CI_H
+#define _EHCI_CI_H
#include
@@ -285,4 +285,4 @@ int usb_phy_mode(int port);
int board_ehci_hcd_init(int port);
int board_usb_phy_mode(int port);
-#endif /* _EHCI_FSL_H */
+#endif /* _EHCI_CI_H */
--
2.5.0
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[U-Boot] [PATCH v2 04/18] ehci-hcd: Add init_after_reset
Some host controllers need addidional initialization after ehci_reset()
In non-dm implementation it is possible to use CONFIG_EHCI_HCD_INIT_AFTER_RESET.
This patch adds similar option to ehci drivers using dm.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Reviewed-by: Tom Rini
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add Reviewed-by (sjg)
Changes in v1:
- No changes, just added Acked-by, Reviewed-by
drivers/usb/host/ehci-hcd.c | 6 ++
drivers/usb/host/ehci.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index c664b16..a4635ef 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1614,6 +1614,12 @@ int ehci_register(struct udevice *dev, struct ehci_hccr
*hccr,
if (ret)
goto err;
+ if (ops->init_after_reset) {
+ ret = ops->init_after_reset(ctrl);
+ if (ret)
+ goto err;
+ }
+
ret = ehci_common_init(ctrl, tweaks);
if (ret)
goto err;
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index b41c04a..ed567fc 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -239,6 +239,7 @@ struct ehci_ops {
void (*powerup_fixup)(struct ehci_ctrl *ctrl, uint32_t *status_reg,
uint32_t *reg);
uint32_t *(*get_portsc_register)(struct ehci_ctrl *ctrl, int port);
+ int (*init_after_reset)(struct ehci_ctrl *ctrl);
};
struct ehci_ctrl {
--
2.5.0
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[U-Boot] [PATCH v2 03/18] mmc: Add support for Qualcomm SDHCI controller
Add support for SD/eMMC controller present on some Qualcomm Snapdragon
devices. This controller implements SDHCI 2.0 interface but requires
vendor-specific initialization.
Driver works in PIO mode as ADMA is not supported by U-Boot (yet).
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Add reviewed-by
Changes in v1:
- Added commit message
- Added DT binding documentation
- Added Kconfig help
- Reordered includes
- Dropped redundant fields from msm_sdhc
- Cleaned up clock init code (+ added error handling)
- Dropped mdelay - use wait_for_bit instead in reset code
- Added missing newline after declarations
- Added error handling if "reg" is missing
- Converted base address to pointer
doc/device-tree-bindings/mmc/msm_sdhci.txt | 25
drivers/mmc/Kconfig| 9 ++
drivers/mmc/Makefile | 1 +
drivers/mmc/msm_sdhci.c| 180 +
4 files changed, 215 insertions(+)
create mode 100644 doc/device-tree-bindings/mmc/msm_sdhci.txt
create mode 100644 drivers/mmc/msm_sdhci.c
diff --git a/doc/device-tree-bindings/mmc/msm_sdhci.txt
b/doc/device-tree-bindings/mmc/msm_sdhci.txt
new file mode 100644
index 000..08a290c
--- /dev/null
+++ b/doc/device-tree-bindings/mmc/msm_sdhci.txt
@@ -0,0 +1,25 @@
+Qualcomm Snapdragon SDHCI controller
+
+Required properties:
+- compatible : "qcom,sdhci-msm-v4"
+- reg: Base address and length of registers:
+ - Host controller registers (SDHCI)
+ - SD Core registers
+- clock: interface clock (must accept SD bus clock as a frequency)
+
+Optional properties:
+- index: If there is more than one controller - controller index (required
+ by generic SDHCI code).
+- bus_width: Width of SD/eMMC bus (default 4)
+- clock-frequency: Frequency of SD/eMMC bus (default 400 kHz)
+
+Example:
+
+sdhci@07864000 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7864900 0x11c 0x7864000 0x800>;
+ index = <0x1>;
+ bus-width = <0x4>;
+ clock = <&clkc 1>;
+ clock-frequency = <2>;
+};
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 9f4b766..e178935 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -16,6 +16,15 @@ config DM_MMC
appear as block devices in U-Boot and can support filesystems such
as EXT4 and FAT.
+config MSM_SDHCI
+ bool "Qualcomm SDHCI controller"
+ depends on DM_MMC
+ help
+ Enables support for SDHCI 2.0 controller present on some Qualcomm
+ Snapdragon devices. This device is compatible with eMMC v4.5 and
+ SD 3.0 specifications. Both SD and eMMC devices are supported.
+ Card-detect gpios are not supported.
+
config ROCKCHIP_DWMMC
bool "Rockchip SD/MMC controller support"
depends on DM_MMC && OF_CONTROL
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index c9c3e3e..3df92f6 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -49,3 +49,4 @@ else
obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
endif
obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
+obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
new file mode 100644
index 000..1e2a29b
--- /dev/null
+++ b/drivers/mmc/msm_sdhci.c
@@ -0,0 +1,180 @@
+/*
+ * Qualcomm SDHCI driver - SD/eMMC controller
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * Based on Linux driver
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Non-standard registers needed for SDHCI startup */
+#define SDCC_MCI_POWER 0x0
+#define SDCC_MCI_POWER_SW_RST BIT(7)
+
+/* This is undocumented register */
+#define SDCC_MCI_VERSION 0x50
+#define SDCC_MCI_VERSION_MAJOR_SHIFT 28
+#define SDCC_MCI_VERSION_MAJOR_MASK (0xf << SDCC_MCI_VERSION_MAJOR_SHIFT)
+#define SDCC_MCI_VERSION_MINOR_MASK 0xff
+
+#define SDCC_MCI_STATUS2 0x6C
+#define SDCC_MCI_STATUS2_MCI_ACT 0x1
+#define SDCC_MCI_HC_MODE 0x78
+
+/* Offset to SDHCI registers */
+#define SDCC_SDHCI_OFFSET 0x900
+
+/* Non standard (?) SDHCI register */
+#define SDHCI_VENDOR_SPEC_CAPABILITIES0 0x11c
+
+struct msm_sdhc {
+ struct sdhci_host host;
+ void *base;
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int msm_sdc_clk_init(struct udevice *dev)
+{
+ uint clk_rate = fdtdec_get_uint(gd->fdt_blob, dev->of_offset,
+ "clock-frequency", 40);
+ uint clkd[2]; /* clk_id and clk_no */
+ int clk_offset;
+ struct udevice *clk;
+ int ret;
+
+ ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clock", clkd,
+ 2);
+ if (ret)
+ return ret;
+
+ clk_offset
[U-Boot] [PATCH v2 01/18] serial: Add support for Qualcomm serial port
This driver works in "new" Data Mover UART mode, so
will be compatible with modern Qualcomm chips only.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Added newline before return... (globally)
- Renamed p to priv (priv data) - it required some rewrapping
- Added Reviewed-by
Changes in v1:
- Added (better) help to KConfig
- Added dt binding documentation
- Fixed include ordering
- Reworked msm_serial_getc
- Added error handling to msm_uart_clk_init (that is ignored later for now)
- Dropped unneeded DM_FLAG_PRE_RELOC
doc/device-tree-bindings/serial/msm-serial.txt | 6 +
drivers/serial/Kconfig | 8 +
drivers/serial/Makefile| 1 +
drivers/serial/serial_msm.c| 212 +
4 files changed, 227 insertions(+)
create mode 100644 doc/device-tree-bindings/serial/msm-serial.txt
create mode 100644 drivers/serial/serial_msm.c
diff --git a/doc/device-tree-bindings/serial/msm-serial.txt
b/doc/device-tree-bindings/serial/msm-serial.txt
new file mode 100644
index 000..48b8428
--- /dev/null
+++ b/doc/device-tree-bindings/serial/msm-serial.txt
@@ -0,0 +1,6 @@
+Qualcomm UART (Data Mover mode)
+
+Required properties:
+- compatible: must be "qcom,msm-uartdm-v1.4"
+- reg: start address and size of the registers
+- clock: interface clock (must accept baudrate as a frequency)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index fac3176..14c0d0c 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -300,4 +300,12 @@ config XILINX_UARTLITE
If you have a Xilinx based board and want to use the uartlite
serial ports, say Y to this option. If unsure, say N.
+config MSM_SERIAL
+ bool "Qualcomm on-chip UART"
+ depends on DM_SERIAL
+ help
+ Support Data Mover UART used on Qualcomm Snapdragon SoCs.
+ It should support all Qualcomm devices with UARTDM version 1.4,
+ for example APQ8016 and MSM8916.
+ Single baudrate is supported in current implementation (115200).
endmenu
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 57cd38b..d5d2ec9 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o
obj-$(CONFIG_PIC32_SERIAL) += serial_pic32.o
+obj-$(CONFIG_MSM_SERIAL) += serial_msm.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
new file mode 100644
index 000..1e2b3e1
--- /dev/null
+++ b/drivers/serial/serial_msm.c
@@ -0,0 +1,212 @@
+/*
+ * Qualcomm UART driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * UART will work in Data Mover mode.
+ * Based on Linux driver.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Serial registers - this driver works in uartdm mode*/
+
+#define UARTDM_DMRX 0x34 /* Max RX transfer length */
+#define UARTDM_NCF_TX 0x40 /* Number of chars to TX */
+
+#define UARTDM_RXFS 0x50 /* RX channel status register */
+#define UARTDM_RXFS_BUF_SHIFT 0x7 /* Number of bytes in the packing buffer
*/
+#define UARTDM_RXFS_BUF_MASK0x7
+
+#define UARTDM_SR0xA4 /* Status register */
+#define UARTDM_SR_RX_READY (1 << 0) /* Word is the receiver FIFO */
+#define UARTDM_SR_TX_EMPTY (1 << 3) /* Transmitter underrun */
+#define UARTDM_SR_UART_OVERRUN (1 << 4) /* Receive overrun */
+
+#define UARTDM_CR 0xA8 /* Command register */
+#define UARTDM_CR_CMD_RESET_ERR (3 << 4) /* Clear overrun error */
+#define UARTDM_CR_CMD_RESET_STALE_INT (8 << 4) /* Clears stale irq */
+#define UARTDM_CR_CMD_RESET_TX_READY (3 << 8) /* Clears TX Ready irq*/
+#define UARTDM_CR_CMD_FORCE_STALE (4 << 8) /* Causes stale event */
+#define UARTDM_CR_CMD_STALE_EVENT_DISABLE (6 << 8) /* Disable stale event */
+
+#define UARTDM_IMR0xB0 /* Interrupt mask register */
+#define UARTDM_ISR0xB4 /* Interrupt status register */
+#define UARTDM_ISR_TX_READY 0x80 /* TX FIFO empty */
+
+#define UARTDM_TF 0x100 /* UART Transmit FIFO register */
+#define UARTDM_RF 0x140 /* UART Receive FIFO register */
+
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct msm_serial_data {
+ phys_addr_t base;
+ unsigned chars_cnt; /* number of buffered chars */
+ uint32_t chars_buf; /* buffered chars */
+};
+
+static int msm_serial_getc(struct udevice *dev)
+{
+ struct msm_serial_data *priv = dev_get_priv(dev);
+ char c;
+ unsigned sr;
+
+ if
[U-Boot] [PATCH v2 00/18] Add support for 96boards Dragonboard410C board
r #defines - use ehci-ci.h instead - Create fixed ulpi viewport for device - Use setbits/clearbits where possible - Use wait_for_bit to reset controller - Add dt binding documents - Reorder includes - Add read/write arguments documentation - add binding documentation and better Kconfig help - Changed a bit mapping - Change include order - Use clrsetbits* where possible - Add one more supported dts id - Handle missing fields in dt properly - Added dt bindings - Reoder includes - Replaced extract_* macros with ordinary shift/mask - Added error checking and whitespaces in probe - Add binding doc - Fixed inlcude ordering - Merged direction_input and direction_output functions - gpio_get: use switch instead of stacked if - use pmic_clrsetbits - add possibility to change prwkey bank name - Handle invalid bindings - Sanity HW check (i.e. check type/subtype registers) - Fix include order - Cleanup defines (added spaces for readibility) - Base address is integer to avoid casting - Use setbits_* family where possible - Drop unneded comments, added newlines where needed - Check return value of dev_get_addr - Add binding for apq8016 - Cleaned up divider calculation - Drop most of gpio.h (only empty file is needed) - Add better help for dragonboard - Move static structures to board_prepare_usb - Add DM_SPMI to defconfig Mateusz Kulikowski (18): serial: Add support for Qualcomm serial port gpio: Add support for Qualcomm gpio controller mmc: Add support for Qualcomm SDHCI controller ehci-hcd: Add init_after_reset usb: ulpi: Add Kconfig options for ULPI Migrate CONFIG_ULPI* to Kconfig usb: Rename ehci-fsl.h to ehci-ci.h usb: ehci-ci: Add missing registers. ehci-ci.h: drop generic USBCMD fields ehci: Add support for Qualcomm EHCI drivers: Add SPMI bus uclass spmi: Add sandbox test driver drivers: spmi: Add support for Qualcomm SPMI bus driver pmic: Add support for Qualcomm PM8916 PMIC gpio: Add support for Qualcomm PM8916 gpios arm: Add support for Qualcomm Snapdragon family board: Add Qualcomm Dragonboard 410C support Add myself as Snapdragon and SPMI maintainer MAINTAINERS| 11 + arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/dts/Makefile | 2 + arch/arm/dts/dragonboard410c-uboot.dtsi| 28 ++ arch/arm/dts/dragonboard410c.dts | 148 ++ arch/arm/mach-snapdragon/Kconfig | 26 ++ arch/arm/mach-snapdragon/Makefile | 8 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 ++ arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 + arch/arm/mach-snapdragon/reset.c | 40 +++ arch/sandbox/dts/sandbox.dts | 20 ++ arch/sandbox/dts/test.dts | 20 ++ board/qualcomm/dragonboard410c/Kconfig | 15 + board/qualcomm/dragonboard410c/MAINTAINERS | 6 + board/qualcomm/dragonboard410c/Makefile| 8 + board/qualcomm/dragonboard410c/dragonboard410c.c | 131 + board/qualcomm/dragonboard410c/head.S | 28 ++ board/qualcomm/dragonboard410c/readme.txt | 43 +++ board/qualcomm/dragonboard410c/u-boot.lds | 90 ++ configs/colibri_t20_defconfig | 2 + configs/dragonboard410c_defconfig | 31 +++ configs/harmony_defconfig | 2 + configs/mcx_defconfig | 3 + configs/mt_ventoux_defconfig | 3 + configs/sandbox_defconfig | 4 + configs/twister_defconfig | 3 + configs/zynq_picozed_defconfig | 3 + configs/zynq_zc702_defconfig | 3 + configs/zynq_zc706_defconfig | 3 + configs/zynq_zed_defconfig | 3 + configs/zynq_zybo_defconfig| 3 + doc/device-tree-bindings/gpio/gpio-msm.txt | 22 ++ doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48 doc/device-tree-bindings/mmc/msm_sdhci.txt | 25 ++ doc/device-tree-bindings/pmic/pm8916.txt | 18 ++ doc/device-tree-bindings/serial/msm-serial.txt | 6 + doc/device-tree-bindings/spmi/spmi-msm.txt | 26 ++ doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 +++ doc/device-tree-bindings/usb/ehci-msm.txt | 10 + doc/git-mailrc | 3 + drivers/Kconfig| 2 + drivers/Makefile | 1 + drivers/gpio/Kconfig | 24 ++ drivers/gpio/Makefile | 2 + drivers/gpio/msm_gpio.c
[U-Boot] [PATCH v2 07/18] usb: Rename ehci-fsl.h to ehci-ci.h
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
---
Changes in v2:
- Add acked-by
Changes in v1: None
drivers/usb/host/ehci-fsl.c | 2 +-
drivers/usb/host/ehci-mpc512x.c | 2 +-
drivers/usb/host/ehci-mx5.c | 2 +-
drivers/usb/host/ehci-mx6.c | 2 +-
drivers/usb/host/ehci-mxc.c | 2 +-
drivers/usb/host/ehci-vf.c| 2 +-
drivers/usb/host/ehci-zynq.c | 2 +-
include/usb/{ehci-fsl.h => ehci-ci.h} | 6 +++---
8 files changed, 10 insertions(+), 10 deletions(-)
rename include/usb/{ehci-fsl.h => ehci-ci.h} (99%)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 97b7f14..4bcea9d 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -12,7 +12,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index b320c4a..4b50ac8 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -17,7 +17,7 @@
#include
#include
#include
-#include
+#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c
index d319962..2b36ceb 100644
--- a/drivers/usb/host/ehci-mx5.c
+++ b/drivers/usb/host/ehci-mx5.c
@@ -9,7 +9,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index e1c67f7..a981b50 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -10,7 +10,7 @@
#include
#include
#include
-#include
+#include
#include
#include
#include
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index f09c75a..f8324ee 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -9,7 +9,7 @@
#include
#include
#include
-#include
+#include
#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-vf.c b/drivers/usb/host/ehci-vf.c
index 335e303..61789dd 100644
--- a/drivers/usb/host/ehci-vf.c
+++ b/drivers/usb/host/ehci-vf.c
@@ -17,7 +17,7 @@
#include
#include
#include
-#include
+#include
#include "ehci.h"
diff --git a/drivers/usb/host/ehci-zynq.c b/drivers/usb/host/ehci-zynq.c
index 7770d05..37a7935 100644
--- a/drivers/usb/host/ehci-zynq.c
+++ b/drivers/usb/host/ehci-zynq.c
@@ -11,7 +11,7 @@
#include
#include
#include
-#include
+#include
#include
#include "ehci.h"
diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-ci.h
similarity index 99%
rename from include/usb/ehci-fsl.h
rename to include/usb/ehci-ci.h
index e9349b5..725aec5 100644
--- a/include/usb/ehci-fsl.h
+++ b/include/usb/ehci-ci.h
@@ -6,8 +6,8 @@
* SPDX-License-Identifier:GPL-2.0+
*/
-#ifndef _EHCI_FSL_H
-#define _EHCI_FSL_H
+#ifndef _EHCI_CI_H
+#define _EHCI_CI_H
#include
@@ -285,4 +285,4 @@ int usb_phy_mode(int port);
int board_ehci_hcd_init(int port);
int board_usb_phy_mode(int port);
-#endif /* _EHCI_FSL_H */
+#endif /* _EHCI_CI_H */
--
2.5.0
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[U-Boot] [PATCH v2 16/18] arm: Add support for Qualcomm Snapdragon family
First supported chip is APQ8016 (that is compatible with MSM8916). Drivers in SoC code: - Reset controller (PSHOLD) - Clock controller (very simple clock configuration for MMC and UART) Signed-off-by: Mateusz Kulikowski Reviewed-by: Simon Glass --- Changes in v2: - Rename DM_SPMI -> SPMI - Make MND divider comments more compact :) - p -> priv - Add reviewed-by - Reordered Kconfig to keep alphabetical order - Renamed reset_sandbox -> msm_reset (typo in reset.c) Changes in v1: - Fix include order - Cleanup defines (added spaces for readibility) - Base address is integer to avoid casting - Use setbits_* family where possible - Drop unneded comments, added newlines where needed - Check return value of dev_get_addr - Add binding for apq8016 - Cleaned up divider calculation - Drop most of gpio.h (only empty file is needed) arch/arm/Kconfig | 12 + arch/arm/Makefile | 1 + arch/arm/mach-snapdragon/Kconfig | 6 + arch/arm/mach-snapdragon/Makefile | 8 + arch/arm/mach-snapdragon/clock-apq8016.c | 262 + arch/arm/mach-snapdragon/include/mach/gpio.h | 9 + .../mach-snapdragon/include/mach/sysmap-apq8016.h | 14 ++ arch/arm/mach-snapdragon/reset.c | 40 8 files changed, 352 insertions(+) create mode 100644 arch/arm/mach-snapdragon/Kconfig create mode 100644 arch/arm/mach-snapdragon/Makefile create mode 100644 arch/arm/mach-snapdragon/clock-apq8016.c create mode 100644 arch/arm/mach-snapdragon/include/mach/gpio.h create mode 100644 arch/arm/mach-snapdragon/include/mach/sysmap-apq8016.h create mode 100644 arch/arm/mach-snapdragon/reset.c diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 876a620..d0a22ac 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -504,6 +504,16 @@ config RMOBILE bool "Renesas ARM SoCs" select CPU_V7 +config ARCH_SNAPDRAGON + bool "Qualcomm Snapdragon SoCs" + select ARM64 + select DM + select DM_GPIO + select DM_SERIAL + select SPMI + select OF_CONTROL + select OF_SEPARATE + config ARCH_SOCFPGA bool "Altera SOCFPGA family" select CPU_V7 @@ -760,6 +770,8 @@ source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-s5pc1xx/Kconfig" +source "arch/arm/mach-snapdragon/Kconfig" + source "arch/arm/mach-socfpga/Kconfig" source "arch/arm/mach-stm32/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index cd7d880..661de56 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -54,6 +54,7 @@ machine-$(CONFIG_ARCH_MVEBU) += mvebu # TODO: rename CONFIG_ORION5X -> CONFIG_ARCH_ORION5X machine-$(CONFIG_ORION5X) += orion5x machine-$(CONFIG_ARCH_S5PC1XX) += s5pc1xx +machine-$(CONFIG_ARCH_SNAPDRAGON) += snapdragon machine-$(CONFIG_ARCH_SOCFPGA) += socfpga machine-$(CONFIG_ARCH_ROCKCHIP)+= rockchip machine-$(CONFIG_STM32)+= stm32 diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig new file mode 100644 index 000..156e733 --- /dev/null +++ b/arch/arm/mach-snapdragon/Kconfig @@ -0,0 +1,6 @@ +if ARCH_SNAPDRAGON + +config SYS_SOC + default "snapdragon" + +endif diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile new file mode 100644 index 000..8e84705 --- /dev/null +++ b/arch/arm/mach-snapdragon/Makefile @@ -0,0 +1,8 @@ +# +# (C) Copyright 2015 Mateusz Kulikowski +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += clock-apq8016.o +obj-y += reset.o diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c new file mode 100644 index 000..d548d75 --- /dev/null +++ b/arch/arm/mach-snapdragon/clock-apq8016.c @@ -0,0 +1,262 @@ +/* + * Clock drivers for Qualcomm APQ8016 + * + * (C) Copyright 2015 Mateusz Kulikowski + * + * Based on Little Kernel driver, simplified + * + * SPDX-License-Identifier:BSD-3-Clause + */ + +#include +#include +#include +#include +#include +#include + +/* GPLL0 clock control registers */ +#define GPLL0_STATUS0x2101C +#define GPLL0_STATUS_ACTIVE BIT(17) + +#define APCS_GPLL_ENA_VOTE 0x45000 +#define APCS_GPLL_ENA_VOTE_GPLL0 BIT(0) + +/* vote reg for blsp1 clock */ +#define APCS_CLOCK_BRANCH_ENA_VOTE 0x45004 +#define APCS_CLOCK_BRANCH_ENA_VOTE_BLSP1 BIT(10) + +/* SDC(n) clock control registers; n=1,2 */ + +/* block control register */ +#define SDCC_BCR(n) ((n * 0x1000) + 0x41000) +/* cmd */ +#define SDCC_CMD_RCGR(n)((n * 0x1000) + 0x41004) +/* cfg */ +#define SDCC_CFG_RCGR(n)((n * 0x1000) + 0x41008) +/* m */ +#define SDCC_M(n) ((n * 0x1000) + 0x4100C) +/* n */ +#define SDCC_N(n) ((n * 0x1000
[U-Boot] [PATCH v2 18/18] Add myself as Snapdragon and SPMI maintainer
- Update MAINTAINERS - Update git-mailrc Signed-off-by: Mateusz Kulikowski --- Changes in v2: - New patch Changes in v1: None MAINTAINERS| 11 +++ doc/git-mailrc | 3 +++ 2 files changed, 14 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index b387207..56a0eba 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -125,6 +125,11 @@ F: arch/arm/mach-s5pc1xx/ F: arch/arm/cpu/armv7/s5p-common/ F: arch/arm/include/asm/arch-s3c24x0/ +ARM SNAPDRAGON +M: Mateusz Kulikowski +S: Maintained +F: arch/arm/mach-snapdragon/ + ARM STM SPEAR M: Vipin Kumar S: Maintained @@ -389,6 +394,12 @@ F: drivers/mtd/spi/ F: drivers/spi/ F: include/spi* +SPMI +M: Mateusz Kulikowski +S: Maintained +F: drivers/spmi/ +F: include/spmi/ + TQ GROUP M: Martin Krause S: Maintained diff --git a/doc/git-mailrc b/doc/git-mailrc index ced7085..1201d4a 100644 --- a/doc/git-mailrc +++ b/doc/git-mailrc @@ -33,6 +33,7 @@ alias lukma Lukasz Majewski alias macpaulMacpaul Lin alias marex Marek Vasut alias masahiro Masahiro Yamada +alias mateuszMateusz Kulikowski alias monstr Michal Simek alias panto Pantelis Antoniou alias prafulla Prafulla Wadaskar @@ -67,6 +68,7 @@ alias rmobileuboot, iwamatsu alias s3csamsung alias s5pc samsung alias samsunguboot, prom +alias snapdragon uboot, mateusz alias socfpgauboot, marex, Dinh Nguyen alias sunxi uboot, ijc, jwrdegoede alias tegra uboot, sjg, Tom Warren , Stephen Warren @@ -127,6 +129,7 @@ alias nand uboot, scottwood alias netuboot, jhersh alias phyuboot, jhersh alias spiuboot, jagan +alias spmi uboot, mateusz alias ubiuboot, hs alias usbuboot, marex alias video uboot, ag -- 2.5.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 17/18] board: Add Qualcomm Dragonboard 410C support
This commit add support for 96Boards Dragonboard410C.
It is board based on APQ8016 Qualcomm SoC, complying with
96boards specification.
Features (present out of the box):
- 4x Cortex A53 (ARMv8)
- 2x USB Host port
- 1x USB Device port
- 4x LEDs
- 1x HDMI connector
- 1x uSD connector
- 3x buttons (Power, Vol+, Vol-/Reset)
- WIFI, Bluetooth with integrated antenna
- 8GiB eMMC
U-Boot boots chained with fastboot in 64-bit mode.
For detailed build instructions see readme.txt in board directory.
Signed-off-by: Mateusz Kulikowski
---
Changes in v2:
- Renamed CONFIG_DM_SPMI -> CONFIG_SPMI
- Removed extra enter in dragonboard file
- Added ULPI* to defconfig
- Added MAINTAINERS to board
- Cleaned up config file - use distro defaults/environment:
- Dropped multiple CONFIG_CMD* and other CONFIG_*
- Added distro env/config
- Dropped old boot commands
- Split dts - pm8916_gpio entries are taken directly from
Linux Dragonboard dts; Add handles for u-boot in -uboot.dtsi;
They will be removed once gpio drivers are converted to pinctrl.
- Renamed some pmic nodes, fixed dragonboard.c to find them properly.
- Added header and converted comments to c98-style in head.S
- Print error if pmic gpio node is not found.
Changes in v1:
- Add better help for dragonboard
- Move static structures to board_prepare_usb
- Add DM_SPMI to defconfig
arch/arm/dts/Makefile| 2 +
arch/arm/dts/dragonboard410c-uboot.dtsi | 28 +
arch/arm/dts/dragonboard410c.dts | 148 ++
arch/arm/mach-snapdragon/Kconfig | 20 +++
board/qualcomm/dragonboard410c/Kconfig | 15 +++
board/qualcomm/dragonboard410c/MAINTAINERS | 6 +
board/qualcomm/dragonboard410c/Makefile | 8 ++
board/qualcomm/dragonboard410c/dragonboard410c.c | 131 +++
board/qualcomm/dragonboard410c/head.S| 28 +
board/qualcomm/dragonboard410c/readme.txt| 40 ++
board/qualcomm/dragonboard410c/u-boot.lds| 90 +
configs/dragonboard410c_defconfig| 31 +
include/configs/dragonboard410c.h| 153 +++
13 files changed, 700 insertions(+)
create mode 100644 arch/arm/dts/dragonboard410c-uboot.dtsi
create mode 100644 arch/arm/dts/dragonboard410c.dts
create mode 100644 board/qualcomm/dragonboard410c/Kconfig
create mode 100644 board/qualcomm/dragonboard410c/MAINTAINERS
create mode 100644 board/qualcomm/dragonboard410c/Makefile
create mode 100644 board/qualcomm/dragonboard410c/dragonboard410c.c
create mode 100644 board/qualcomm/dragonboard410c/head.S
create mode 100644 board/qualcomm/dragonboard410c/readme.txt
create mode 100644 board/qualcomm/dragonboard410c/u-boot.lds
create mode 100644 configs/dragonboard410c_defconfig
create mode 100644 include/configs/dragonboard410c.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 641510c..2e48a11 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -100,6 +100,8 @@ dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2080a-qds.dtb \
dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds.dtb \
fsl-ls1043a-rdb.dtb
+dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
+
dtb-$(CONFIG_MACH_SUN4I) += \
sun4i-a10-a1000.dtb \
sun4i-a10-ba10-tvbox.dtb \
diff --git a/arch/arm/dts/dragonboard410c-uboot.dtsi
b/arch/arm/dts/dragonboard410c-uboot.dtsi
new file mode 100644
index 000..cc2c175
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c-uboot.dtsi
@@ -0,0 +1,28 @@
+/*
+ * U-Boot addition to handle Dragonboard 410c pins
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+&pm8916_gpios {
+ usb_hub_reset_pm {
+ gpios = <&pm8916_gpios 2 0>;
+ };
+
+ usb_sw_sel_pm {
+ gpios = <&pm8916_gpios 3 0>;
+ };
+};
+
+
+&pm8916_pon {
+ key_vol_down {
+ gpios = <&pm8916_pon 1 0>;
+ };
+
+ key_power {
+ gpios = <&pm8916_pon 0 0>;
+ };
+};
diff --git a/arch/arm/dts/dragonboard410c.dts b/arch/arm/dts/dragonboard410c.dts
new file mode 100644
index 000..7746622
--- /dev/null
+++ b/arch/arm/dts/dragonboard410c.dts
@@ -0,0 +1,148 @@
+/*
+ * Qualcomm APQ8016 based Dragonboard 410C board device tree source
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+/dts-v1/;
+
+#include "skeleton64.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. Dragonboard 410c";
+ compatible = "qcom,dragonboard", "qcom,apq8016-sbc";
+ qcom,msm-id = <0xce 0x0 0xf8 0x0 0xf9 0x0 0xfa 0x0 0xf7 0x0>;
+ qcom,board-id = <0x10018 0x0>;
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+
+ memory {
+ device_type = "memory";
+
[U-Boot] [PATCH v2 15/18] gpio: Add support for Qualcomm PM8916 gpios
This driver supports GPIOs present on PM8916 PMIC.
There are 2 device drivers inside:
- GPIO driver (4 "generic" GPIOs)
- Keypad driver that presents itself as GPIO with 2 inputs (power and reset)
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
---
Changes in v2:
- Add Reviewed-by
Changes in v1:
- Add binding doc
- Fixed inlcude ordering
- Merged direction_input and direction_output functions
- gpio_get: use switch instead of stacked if
- use pmic_clrsetbits
- add possibility to change prwkey bank name
- Handle invalid bindings
- Sanity HW check (i.e. check type/subtype registers)
doc/device-tree-bindings/gpio/pm8916_gpio.txt | 48
drivers/gpio/Kconfig | 10 +
drivers/gpio/Makefile | 1 +
drivers/gpio/pm8916_gpio.c| 302 ++
4 files changed, 361 insertions(+)
create mode 100644 doc/device-tree-bindings/gpio/pm8916_gpio.txt
create mode 100644 drivers/gpio/pm8916_gpio.c
diff --git a/doc/device-tree-bindings/gpio/pm8916_gpio.txt
b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
new file mode 100644
index 000..58185b8
--- /dev/null
+++ b/doc/device-tree-bindings/gpio/pm8916_gpio.txt
@@ -0,0 +1,48 @@
+Driver for part of pm8916 PMIC - gpio and power/reset keys
+
+This device should be child of SPMI pmic.
+
+1) GPIO driver
+
+Required properties:
+- compatible: "qcom,pm8916-gpio"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- gpio-count: number of GPIOs
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916" is used)
+
+Example:
+
+pmic_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="pmic";
+};
+
+
+2) Power/Reset key driver
+
+Required properties:
+- compatible: "qcom,pm8916-pwrkey"
+- reg: peripheral ID, size of register block
+- gpio-controller
+- #gpio-cells: 2
+
+Optional properties:
+- gpio-bank-name: name of bank (as default "pm8916_key" is used)
+
+
+Example:
+
+pmic_pon: pon@800 {
+ compatible = "qcom,pm8916-pwrkey";
+ reg = <0x800 0x96>;
+ #gpio-cells = <2>;
+ gpio-controller;
+};
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 3d112b9..a81ad1d 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -60,6 +60,16 @@ config MSM_GPIO
- APQ8016
- MSM8916
+config PM8916_GPIO
+ bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
+ depends on DM_GPIO && PMIC_PM8916
+ help
+ Support for GPIO pins and power/reset buttons found on
+ Qualcomm PM8916 PMIC.
+ Default name for GPIO bank is "pm8916".
+ Power and reset buttons are placed in "pm8916_key" bank and
+ have gpio numbers 0 and 1 respectively.
+
config ROCKCHIP_GPIO
bool "Rockchip GPIO driver"
depends on DM_GPIO
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9520b1e..aaa9f8d 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -47,3 +47,4 @@ obj-$(CONFIG_ZYNQ_GPIO) += zynq_gpio.o
obj-$(CONFIG_VYBRID_GPIO) += vybrid_gpio.o
obj-$(CONFIG_HIKEY_GPIO) += hi6220_gpio.o
obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
+obj-$(CONFIG_PM8916_GPIO) += pm8916_gpio.o
diff --git a/drivers/gpio/pm8916_gpio.c b/drivers/gpio/pm8916_gpio.c
new file mode 100644
index 000..1abab7f
--- /dev/null
+++ b/drivers/gpio/pm8916_gpio.c
@@ -0,0 +1,302 @@
+/*
+ * Qualcomm pm8916 pmic gpio driver - part of Qualcomm PM8916 PMIC
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Register offset for each gpio */
+#define REG_OFFSET(x) ((x) * 0x100)
+
+/* Register maps */
+
+/* Type and subtype are shared for all pm8916 peripherals */
+#define REG_TYPE 0x4
+#define REG_SUBTYPE0x5
+
+#define REG_STATUS 0x08
+#define REG_STATUS_VAL_MASK0x1
+
+/* MODE_CTL */
+#define REG_CTL 0x40
+#define REG_CTL_MODE_MASK 0x70
+#define REG_CTL_MODE_INPUT 0x00
+#define REG_CTL_MODE_INOUT 0x20
+#define REG_CTL_MODE_OUTPUT 0x10
+#define REG_CTL_OUTPUT_MASK 0x0F
+
+#define REG_DIG_VIN_CTL0x41
+#define REG_DIG_VIN_VIN0 0
+
+#define REG_DIG_PULL_CTL 0x42
+#define REG_DIG_PULL_NO_PU 0x5
+
+#define REG_DIG_OUT_CTL0x45
+#define REG_DIG_OUT_CTL_CMOS (0x0 << 4)
+#define REG_DIG_OUT_CTL_DRIVE_L 0x1
+
+#define REG_EN_CTL 0x46
+#define REG_EN_CTL_ENABLE (1 << 7)
+
+struct pm8916_gpio_bank {
+ uint16_t pid; /* Peripheral ID on S
[U-Boot] [PATCH v2 14/18] pmic: Add support for Qualcomm PM8916 PMIC
This PMIC is connected on SPMI bus so needs SPMI support enabled.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
---
Changes in v2:
- Add reviewed-by
- Reordered Kconfig & Makefile (to keep alphabetical ordering)
- Added link to dt binding @ help
Changes in v1:
- Added dt bindings
- Reoder includes
- Replaced extract_* macros with ordinary shift/mask
- Added error checking and whitespaces in probe
doc/device-tree-bindings/pmic/pm8916.txt | 18 ++
drivers/power/pmic/Kconfig | 16 ++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/pm8916.c | 96
4 files changed, 131 insertions(+)
create mode 100644 doc/device-tree-bindings/pmic/pm8916.txt
create mode 100644 drivers/power/pmic/pm8916.c
diff --git a/doc/device-tree-bindings/pmic/pm8916.txt
b/doc/device-tree-bindings/pmic/pm8916.txt
new file mode 100644
index 000..15c598b
--- /dev/null
+++ b/doc/device-tree-bindings/pmic/pm8916.txt
@@ -0,0 +1,18 @@
+Qualcomm pm8916 PMIC
+
+This PMIC is connected using SPMI bus so should be child of SPMI bus
controller.
+
+Required properties:
+- compatible: "qcom,spmi-pmic";
+- reg: SPMI Slave ID, size (ignored)
+- #address-cells: 0x1 (peripheral ID)
+- #size-cells: 0x1 (size of peripheral register space)
+
+Example:
+
+pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+};
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 7f69ae1..69f8d51 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -54,6 +54,22 @@ config DM_PMIC_MAX77686
This config enables implementation of driver-model pmic uclass features
for PMIC MAX77686. The driver implements read/write operations.
+config PMIC_PM8916
+ bool "Enable Driver Model for Qualcomm PM8916 PMIC"
+ depends on DM_PMIC
+ ---help---
+ The PM8916 is a PMIC connected to one (or several) processors
+ with SPMI bus. It has 2 slaves with several peripherals:
+ - 18x LDO
+ - 4x GPIO
+ - Power and Reset buttons
+ - Watchdog
+ - RTC
+ - Vibrator drivers
+ - Others
+
+ Driver binding info: doc/device-tree-bindings/pmic/pm8916.txt
+
config PMIC_RK808
bool "Enable support for Rockchip PMIC RK808"
depends on DM_PMIC
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index c6e8d0c..52b4f71 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_DM_PMIC_PFUZE100) += pfuze100.o
obj-$(CONFIG_PMIC_S2MPS11) += s2mps11.o
obj-$(CONFIG_DM_PMIC_SANDBOX) += sandbox.o i2c_pmic_emul.o
obj-$(CONFIG_PMIC_ACT8846) += act8846.o
+obj-$(CONFIG_PMIC_PM8916) += pm8916.o
obj-$(CONFIG_PMIC_RK808) += rk808.o
obj-$(CONFIG_PMIC_TPS65090) += tps65090.o
obj-$(CONFIG_PMIC_S5M8767) += s5m8767.o
diff --git a/drivers/power/pmic/pm8916.c b/drivers/power/pmic/pm8916.c
new file mode 100644
index 000..9acf5f5
--- /dev/null
+++ b/drivers/power/pmic/pm8916.c
@@ -0,0 +1,96 @@
+/*
+ * Qualcomm pm8916 pmic driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define PID_SHIFT 8
+#define PID_MASK (0xFF << PID_SHIFT)
+#define REG_MASK 0xFF
+
+struct pm8916_priv {
+ uint16_t usid; /* Slave ID on SPMI bus */
+};
+
+static int pm8916_reg_count(struct udevice *dev)
+{
+ return 0x;
+}
+
+static int pm8916_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ if (len != 1)
+ return -EINVAL;
+
+ return spmi_reg_write(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK,
+ *buff);
+}
+
+static int pm8916_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+ int val;
+
+ if (len != 1)
+ return -EINVAL;
+
+ val = spmi_reg_read(dev->parent, priv->usid,
+ (reg & PID_MASK) >> PID_SHIFT, reg & REG_MASK);
+
+ if (val < 0)
+ return val;
+ *buff = val;
+ return 0;
+}
+
+static struct dm_pmic_ops pm8916_ops = {
+ .reg_count = pm8916_reg_count,
+ .read = pm8916_read,
+ .write = pm8916_write,
+};
+
+static const struct udevice_id pm8916_ids[] = {
+ { .compatible = "qcom,spmi-pmic" },
+ { }
+};
+
+static int pm8916_probe(struct udevice *dev)
+{
+ struct pm8916_priv *priv = dev_get_priv(dev);
+
+ priv->usid = dev_get_addr(dev);
+
+ if (priv->usid == FDT_ADDR_T_
[U-Boot] [PATCH v2 09/18] ehci-ci.h: drop generic USBCMD fields
Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
---
Changes in v2:
- Add Acked-by
Changes in v1: None
drivers/usb/host/ehci-mpc512x.c | 4 ++--
include/usb/ehci-ci.h | 4
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/usb/host/ehci-mpc512x.c b/drivers/usb/host/ehci-mpc512x.c
index 4b50ac8..bb4f461 100644
--- a/drivers/usb/host/ehci-mpc512x.c
+++ b/drivers/usb/host/ehci-mpc512x.c
@@ -93,7 +93,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
unsigned int i;
/* Command a reset of the USB Controller */
- out_be32(&(ehci->usbcmd), EHCI_FSL_USBCMD_RST);
+ out_be32(&(ehci->usbcmd), CMD_RESET);
/* Wait for the reset process to finish */
for (i = 65535 ; i > 0 ; i--) {
@@ -101,7 +101,7 @@ static int reset_usb_controller(volatile struct usb_ehci
*ehci)
* The host will set this bit to zero once the
* reset process is complete
*/
- if ((in_be32(&(ehci->usbcmd)) & EHCI_FSL_USBCMD_RST) == 0)
+ if ((in_be32(&(ehci->usbcmd)) & CMD_RESET) == 0)
return 0;
}
diff --git a/include/usb/ehci-ci.h b/include/usb/ehci-ci.h
index 305b180..586d32a 100644
--- a/include/usb/ehci-ci.h
+++ b/include/usb/ehci-ci.h
@@ -97,10 +97,6 @@
#define INTR_DATA_PULSING_EN (0x1<<30)
#define INTSTS_MASK(0x00ff)
-/* USBCMD Bits of interest */
-#define EHCI_FSL_USBCMD_RST(1 << 1)
-#define EHCI_FSL_USBCMD_RS (1 << 0)
-
#define INTERRUPT_ENABLE_BITS_MASK \
(INTR_USB_ID_EN | \
INTR_1MS_TIMER_EN | \
--
2.5.0
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[U-Boot] [PATCH v2 12/18] spmi: Add sandbox test driver
This patch adds emulated spmi bus controller with part of
pm8916 pmic on it to sandbox and tests validating SPMI uclass.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
---
Changes in v2:
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Rename r -> regs, p -> priv
- Add reviewed-by
- Update binding doc (drop unused bindig)
Changes in v1: None
arch/sandbox/dts/sandbox.dts | 20
configs/sandbox_defconfig | 4 +
doc/device-tree-bindings/spmi/spmi-sandbox.txt | 31 +
drivers/spmi/Kconfig | 8 ++
drivers/spmi/Makefile | 1 +
drivers/spmi/spmi-sandbox.c| 157 +
test/dm/Makefile | 1 +
test/dm/spmi.c | 115 ++
8 files changed, 337 insertions(+)
create mode 100644 doc/device-tree-bindings/spmi/spmi-sandbox.txt
create mode 100644 drivers/spmi/spmi-sandbox.c
create mode 100644 test/dm/spmi.c
diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts
index e3f02bf..2ae4014 100644
--- a/arch/sandbox/dts/sandbox.dts
+++ b/arch/sandbox/dts/sandbox.dts
@@ -240,6 +240,26 @@
status = "disabled";
};
+ spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+ };
};
#include "cros-ec-keyboard.dtsi"
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 09ced01..42dbc80 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -31,6 +31,7 @@ CONFIG_ADC=y
CONFIG_ADC_SANDBOX=y
CONFIG_CLK=y
CONFIG_SANDBOX_GPIO=y
+CONFIG_PM8916_GPIO=y
CONFIG_SYS_I2C_SANDBOX=y
CONFIG_CROS_EC_KEYB=y
CONFIG_LED=y
@@ -58,6 +59,9 @@ CONFIG_PINCONF=y
CONFIG_PINCTRL_SANDBOX=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_SANDBOX=y
+CONFIG_PMIC_PM8916=y
+CONFIG_SPMI=y
+CONFIG_SPMI_SANDBOX=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_SANDBOX=y
CONFIG_RAM=y
diff --git a/doc/device-tree-bindings/spmi/spmi-sandbox.txt
b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
new file mode 100644
index 000..8569a1a
--- /dev/null
+++ b/doc/device-tree-bindings/spmi/spmi-sandbox.txt
@@ -0,0 +1,31 @@
+Sandbox SPMI emulated arbiter.
+
+This is bus driver for Sandbox. It includes part of emulated pm8916 pmic.
+
+Required properties:
+- compatible: "sandbox,spmi"
+- #address-cells: 0x1 - childs slave ID address
+- #size-cells: 0x1
+
+Example:
+
+spmi: spmi@0 {
+ compatible = "sandbox,spmi";
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+ pm8916@0 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x0 0x1>;
+ #address-cells = <0x1>;
+ #size-cells = <0x1>;
+
+ spmi_gpios: gpios@c000 {
+ compatible = "qcom,pm8916-gpio";
+ reg = <0xc000 0x400>;
+ gpio-controller;
+ gpio-count = <4>;
+ #gpio-cells = <2>;
+ gpio-bank-name="spmi";
+ };
+ };
+};
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
index 0b9bd31..c70d675 100644
--- a/drivers/spmi/Kconfig
+++ b/drivers/spmi/Kconfig
@@ -7,4 +7,12 @@ config SPMI
Select this to enable to support SPMI bus.
SPMI (System Power Management Interface) bus is used
to connect PMIC devices on various SoCs.
+
+config SPMI_SANDBOX
+ boolean "Support for Sandbox SPMI bus"
+ depends on SPMI
+ ---help---
+ Demo SPMI bus implementation. Emulates part of PM8916 as single
+ slave (0) on bus. It has 4 GPIO peripherals, pid 0xC0-0xC3.
+
endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
index 99092eb..4ca65a9 100644
--- a/drivers/spmi/Makefile
+++ b/drivers/spmi/Makefile
@@ -5,3 +5,4 @@
#
obj-$(CONFIG_SPMI) += spmi-uclass.o
+obj-$(CONFIG_SPMI_SANDBOX) += spmi-sandbox.o
diff --git a/drivers/spmi/spmi-sandbox.c b/drivers/spmi/spmi-sandbox.c
new file mode 100644
index 00
[U-Boot] [PATCH v2 11/18] drivers: Add SPMI bus uclass
Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.
Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
---
Changes in v2:
- Use proper entry order in Kconfig
- Rename CONFIG_DM_SPMI -> CONFIG_SPMI
- Fix header ordering
- Add reviewed-by
Changes in v1:
- Reorder includes
- Add read/write arguments documentation
drivers/Kconfig| 2 ++
drivers/Makefile | 1 +
drivers/spmi/Kconfig | 10 ++
drivers/spmi/Makefile | 7 +++
drivers/spmi/spmi-uclass.c | 48 ++
include/dm/uclass-id.h | 1 +
include/spmi/spmi.h| 47 +
7 files changed, 116 insertions(+)
create mode 100644 drivers/spmi/Kconfig
create mode 100644 drivers/spmi/Makefile
create mode 100644 drivers/spmi/spmi-uclass.c
create mode 100644 include/spmi/spmi.h
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 70993fd..c82a94b 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -60,6 +60,8 @@ source "drivers/sound/Kconfig"
source "drivers/spi/Kconfig"
+source "drivers/spmi/Kconfig"
+
source "drivers/thermal/Kconfig"
source "drivers/timer/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 00da40b..2b2a9cf 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -53,6 +53,7 @@ obj-y += pcmcia/
obj-y += dfu/
obj-y += rtc/
obj-y += sound/
+obj-y += spmi/
obj-y += timer/
obj-y += tpm/
obj-y += twserial/
diff --git a/drivers/spmi/Kconfig b/drivers/spmi/Kconfig
new file mode 100644
index 000..0b9bd31
--- /dev/null
+++ b/drivers/spmi/Kconfig
@@ -0,0 +1,10 @@
+menu "SPMI support"
+
+config SPMI
+ bool "Enable SPMI bus support"
+ depends on DM
+ ---help---
+ Select this to enable to support SPMI bus.
+ SPMI (System Power Management Interface) bus is used
+ to connect PMIC devices on various SoCs.
+endmenu
diff --git a/drivers/spmi/Makefile b/drivers/spmi/Makefile
new file mode 100644
index 000..99092eb
--- /dev/null
+++ b/drivers/spmi/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2015 Mateusz Kulikowski
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-$(CONFIG_SPMI) += spmi-uclass.o
diff --git a/drivers/spmi/spmi-uclass.c b/drivers/spmi/spmi-uclass.c
new file mode 100644
index 000..4ddd51b
--- /dev/null
+++ b/drivers/spmi/spmi-uclass.c
@@ -0,0 +1,48 @@
+/*
+ * SPMI bus uclass driver
+ *
+ * (C) Copyright 2015 Mateusz Kulikowski
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int spmi_reg_read(struct udevice *dev, int usid, int pid, int reg)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->read)
+ return -ENOSYS;
+
+ return ops->read(dev, usid, pid, reg);
+}
+
+int spmi_reg_write(struct udevice *dev, int usid, int pid, int reg,
+ uint8_t value)
+{
+ const struct dm_spmi_ops *ops = dev_get_driver_ops(dev);
+
+ if (!ops || !ops->write)
+ return -ENOSYS;
+
+ return ops->write(dev, usid, pid, reg, value);
+}
+
+static int spmi_post_bind(struct udevice *dev)
+{
+ return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+}
+
+UCLASS_DRIVER(spmi) = {
+ .id = UCLASS_SPMI,
+ .name = "spmi",
+ .post_bind = spmi_post_bind,
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index 8391e38..e896c2f 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -61,6 +61,7 @@ enum uclass_id {
UCLASS_RTC, /* Real time clock device */
UCLASS_SERIAL, /* Serial UART */
UCLASS_SPI, /* SPI bus */
+ UCLASS_SPMI,/* System Power Management Interface bus */
UCLASS_SPI_FLASH, /* SPI flash */
UCLASS_SPI_GENERIC, /* Generic SPI flash target */
UCLASS_SYSCON, /* System configuration device */
diff --git a/include/spmi/spmi.h b/include/spmi/spmi.h
new file mode 100644
index 000..65a49bd
--- /dev/null
+++ b/include/spmi/spmi.h
@@ -0,0 +1,47 @@
+#ifndef _SPMI_SPMI_H
+#define _SPMI_SPMI_H
+
+/**
+ * struct dm_spmi_ops - SPMI device I/O interface
+ *
+ * Should be implemented by UCLASS_SPMI device drivers. The standard
+ * device operations provides the I/O interface for it's childs.
+ *
+ * @read: read register 'reg' of slave 'usid' and peripheral 'pid'
+ * @write: write register 'reg' of slave 'usid' and peripheral
