[PATCH v12] driver: spi: add bcm iproc qspi support
From: Rayagonda Kokatanur IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- Changes in v12: - fix typo FLASH_BIT to FLUSH_BIT - return -EBUSY instead of -1 from bspi_disable - replace (bytes+3)/4 with macro CEIL(bytes,4) - replace constants with macros - remove misleading comment - remove debug instructions - replace void __iomem * with fdt_addr_t Changes in v11: - fix condition for readl_poll_timeout in bspi_read_via_raf Changes in v10: - remove binding document - use defined values for delays and timeouts - replace timer-based logic with readl_poll_timeout - format selected commands to single line - remove unnecessary entries from struct bcmspi_priv - simplify and move bspi strap override to bspi_set_flex_mode Changes in v9: - merge bspi_set_4byte_mode to bspi_set_flex_mode - simplify bspi_set_flex_mode using data from spi_mem_op - rename mode_4byte to bspi_4byte - use BIT(x) istead of 1<mode_4byte - remove IPROC_BSPI_READ_SUPPORTED Changes in v5: - add binding document - implement spi-mem interface for bspi mode - use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG - move iproc_qspi.c to spi Changes in v4: - move iproc_qspi.c from spi to mtd/spi - remove iproc_qspi.h - rename IPROC_QSPI to SPI_FLASH_IPROC Changes in v3: - fix warning by including linux/delay.h - change ofdata_to_platdata to of_to_plat - change priv_auto_alloc_size to priv_auto Changes in v2: - remove include spi-nor.h - define and use named BITs for writing register values - remove bspi_set_4byte_mode() method drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/iproc_qspi.c | 576 +++ 3 files changed, 583 insertions(+) create mode 100644 drivers/spi/iproc_qspi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d07e9a28af82..faebc212753e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -178,6 +178,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config IPROC_QSPI + bool "Broadcom iProc QSPI Flash Controller driver" + help + Enable Broadcom iProc QSPI Flash Controller driver. + This driver can be used to access the SPI NOR flash. + config KIRKWOOD_SPI bool "Marvell Kirkwood SPI Driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d2f24bccefd3..869763187062 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o obj-$(CONFIG_ICH_SPI) += ich.o +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c new file mode 100644 index ..b5c274314b5b --- /dev/null +++ b/drivers/spi/iproc_qspi.c @@ -0,0 +1,576 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020-2021 Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Delay required to change the mode of operation */ +#define BUSY_DELAY_US 1 +#define BUSY_TIMEOUT_US20 +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) + +/* Chip attributes */ +#define QSPI_AXI_CLK 17500 +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define NUM_CDRAM 16U + +#define CDRAM_PCS0 2 +#define CDRAM_CONT BIT(7) +#define CDRAM_BITS_EN BIT(6) +#define CDRAM_QUAD_MODEBIT(8) +#define CDRAM_RBIT_INPUT BIT(10) +#define MSPI_SPE BIT(6) +#define MSPI_CONT_AFTER_CMDBIT(7) +#define MSPI_MSTR BIT(7) + +/* Register fields */ +#define MSPI_SPCR0_MSB_BITS_8 0x0020 +#define BSPI_RAF_CONTROL_START_MASK0x0001 +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 +#define BSPI_STRAP_OVERRIDE_4BYTE_SHIFT2 +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 +#define BSPI_STRAP_OVERRIDE_SHIFT 0 +#define BSPI_BPC_DATA_SHIFT0 +#define BSPI_BPC_MODE_SHIFT8 +#define BSPI_BPC_ADDR_SHIFT16 +#define BSPI_BPC_CMD_SHIFT 24 +#define BSPI_BPP_ADDR_SHIFT16 +
Re: [PATCH u-boot-pci] pci: iproc: Set all 24 bits of PCI class code
On Wed, Jan 5, 2022 at 1:50 AM Pali Rohár wrote: > > Register 0x43c in its low 24 bits contains PCI class code. > > Update code to set all 24 bits of PCI class code and not only upper 16 bits > of PCI class code. > > Use standard U-Boot macro (PCI_CLASS_BRIDGE_PCI << 8) for constructing all > 24-bits of PCI class for PCI bridge Normal decode. > > Signed-off-by: Pali Rohár > > --- > Roman helped me with this change and confirmed that class code is stored > really in bits [23:0] of custom register 0x43c (normally class code is > stored in bits [31:8] of pci register 0x08). > --- > drivers/pci/pcie_iproc.c | 9 - > 1 file changed, 4 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/pcie_iproc.c b/drivers/pci/pcie_iproc.c > index be03dcbd97c0..fe68e417ae80 100644 > --- a/drivers/pci/pcie_iproc.c > +++ b/drivers/pci/pcie_iproc.c > @@ -1127,15 +1127,14 @@ static int iproc_pcie_check_link(struct iproc_pcie > *pcie) > u32 link_status, class; > > pcie->link_is_active = false; > - /* force class to PCI_CLASS_BRIDGE_PCI (0x0604) */ > + /* force class to PCI bridge Normal decode (0x060400) */ > #define PCI_BRIDGE_CTRL_REG_OFFSET 0x43c > -#define PCI_CLASS_BRIDGE_MASK 0x00 > -#define PCI_CLASS_BRIDGE_SHIFT 8 > +#define PCI_BRIDGE_CTRL_REG_CLASS_MASK 0xff > iproc_pci_raw_config_read32(pcie, 0, > PCI_BRIDGE_CTRL_REG_OFFSET, > 4, ); > - class &= ~PCI_CLASS_BRIDGE_MASK; > - class |= (PCI_CLASS_BRIDGE_PCI << PCI_CLASS_BRIDGE_SHIFT); > + class &= ~PCI_BRIDGE_CTRL_REG_CLASS_MASK; > + class |= (PCI_CLASS_BRIDGE_PCI << 8); > iproc_pci_raw_config_write32(pcie, 0, > PCI_BRIDGE_CTRL_REG_OFFSET, > 4, class); > -- > 2.20.1 > Acked-by: Roman Bacik -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it.
[PATCH v11] driver: spi: add bcm iproc qspi support
From: Rayagonda Kokatanur IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- Changes in v11: - fix condition for readl_poll_timeout in bspi_read_via_raf Changes in v10: - remove binding document - use defined values for delays and timeouts - replace timer-based logic with readl_poll_timeout - format selected commands to single line - remove unnecessary entries from struct bcmspi_priv - simplify and move bspi strap override to bspi_set_flex_mode Changes in v9: - merge bspi_set_4byte_mode to bspi_set_flex_mode - simplify bspi_set_flex_mode using data from spi_mem_op - rename mode_4byte to bspi_4byte - use BIT(x) istead of 1<mode_4byte - remove IPROC_BSPI_READ_SUPPORTED Changes in v5: - add binding document - implement spi-mem interface for bspi mode - use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG - move iproc_qspi.c to spi Changes in v4: - move iproc_qspi.c from spi to mtd/spi - remove iproc_qspi.h - rename IPROC_QSPI to SPI_FLASH_IPROC Changes in v3: - fix warning by including linux/delay.h - change ofdata_to_platdata to of_to_plat - change priv_auto_alloc_size to priv_auto Changes in v2: - remove include spi-nor.h - define and use named BITs for writing register values - remove bspi_set_4byte_mode() method drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/iproc_qspi.c | 573 +++ 3 files changed, 580 insertions(+) create mode 100644 drivers/spi/iproc_qspi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d07e9a28af82..faebc212753e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -178,6 +178,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config IPROC_QSPI + bool "Broadcom iProc QSPI Flash Controller driver" + help + Enable Broadcom iProc QSPI Flash Controller driver. + This driver can be used to access the SPI NOR flash. + config KIRKWOOD_SPI bool "Marvell Kirkwood SPI Driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d2f24bccefd3..869763187062 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o obj-$(CONFIG_ICH_SPI) += ich.o +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c new file mode 100644 index ..0f9c2f9729c4 --- /dev/null +++ b/drivers/spi/iproc_qspi.c @@ -0,0 +1,573 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020-2021 Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Delay required to change the mode of operation */ +#define BUSY_DELAY_US 1 +#define BUSY_TIMEOUT_US20 +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) + +/* Chip attributes */ +#define QSPI_AXI_CLK 17500 +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define NUM_CDRAM 16U + +#define CDRAM_PCS0 2 +#define CDRAM_CONT BIT(7) +#define CDRAM_BITS_EN BIT(6) +#define CDRAM_QUAD_MODEBIT(8) +#define CDRAM_RBIT_INPUT BIT(10) +#define MSPI_SPE BIT(6) +#define MSPI_CONT_AFTER_CMDBIT(7) + +/* Register fields */ +#define MSPI_SPCR0_MSB_BITS_8 0x0020 +#define BSPI_RAF_CONTROL_START_MASK0x0001 +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 +#define BSPI_STRAP_OVERRIDE_4BYTE_SHIFT2 +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 +#define BSPI_STRAP_OVERRIDE_SHIFT 0 +#define BSPI_BPC_DATA_SHIFT0 +#define BSPI_BPC_MODE_SHIFT8 +#define BSPI_BPC_ADDR_SHIFT16 +#define BSPI_BPC_CMD_SHIFT 24 +#define BSPI_BPP_ADDR_SHIFT16 + +/* MSPI registers */ +#define MSPI_SPCR0_LSB_REG 0x000 +#define MSPI_SPCR0_MSB_REG 0x004 +#define MSPI_SPCR1_LSB_REG 0x008 +#define MSPI_SPCR1_MSB_REG 0x00c +#define MSPI_NEWQP_REG 0x010 +#define MSPI_ENDQP_REG
[PATCH v10] driver: spi: add bcm iproc qspi support
IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- Changes in v10: - remove binding document - use defined values for delays and timeouts - replace timer-based logic with readl_poll_timeout - format selected commands to single line - remove unnecessary entries from struct bcmspi_priv - simplify and move bspi strap override to bspi_set_flex_mode Changes in v9: - merge bspi_set_4byte_mode to bspi_set_flex_mode - simplify bspi_set_flex_mode using data from spi_mem_op - rename mode_4byte to bspi_4byte - use BIT(x) istead of 1<mode_4byte - remove IPROC_BSPI_READ_SUPPORTED Changes in v5: - add binding document - implement spi-mem interface for bspi mode - use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG - move iproc_qspi.c to spi Changes in v4: - move iproc_qspi.c from spi to mtd/spi - remove iproc_qspi.h - rename IPROC_QSPI to SPI_FLASH_IPROC Changes in v3: - fix warning by including linux/delay.h - change ofdata_to_platdata to of_to_plat - change priv_auto_alloc_size to priv_auto Changes in v2: - remove include spi-nor.h - define and use named BITs for writing register values - remove bspi_set_4byte_mode() method drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/iproc_qspi.c | 578 +++ 3 files changed, 585 insertions(+) create mode 100644 drivers/spi/iproc_qspi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d07e9a28af82..faebc212753e 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -178,6 +178,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config IPROC_QSPI + bool "Broadcom iProc QSPI Flash Controller driver" + help + Enable Broadcom iProc QSPI Flash Controller driver. + This driver can be used to access the SPI NOR flash. + config KIRKWOOD_SPI bool "Marvell Kirkwood SPI Driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d2f24bccefd3..869763187062 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o obj-$(CONFIG_ICH_SPI) += ich.o +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c new file mode 100644 index ..2eb09058c286 --- /dev/null +++ b/drivers/spi/iproc_qspi.c @@ -0,0 +1,578 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020-2021 Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Delay required to change the mode of operation */ +#define BUSY_DELAY_US 1 +#define BUSY_TIMEOUT_US20 +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) + +/* Chip attributes */ +#define QSPI_AXI_CLK 17500 +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define NUM_CDRAM 16U + +#define CDRAM_PCS0 2 +#define CDRAM_CONT BIT(7) +#define CDRAM_BITS_EN BIT(6) +#define CDRAM_QUAD_MODEBIT(8) +#define CDRAM_RBIT_INPUT BIT(10) +#define MSPI_SPE BIT(6) +#define MSPI_CONT_AFTER_CMDBIT(7) + +/* Register fields */ +#define MSPI_SPCR0_MSB_BITS_8 0x0020 +#define BSPI_RAF_CONTROL_START_MASK0x0001 +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 +#define BSPI_STRAP_OVERRIDE_4BYTE_SHIFT2 +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 +#define BSPI_STRAP_OVERRIDE_SHIFT 0 +#define BSPI_BPC_DATA_SHIFT0 +#define BSPI_BPC_MODE_SHIFT8 +#define BSPI_BPC_ADDR_SHIFT16 +#define BSPI_BPC_CMD_SHIFT 24 +#define BSPI_BPP_ADDR_SHIFT16 + +/* MSPI registers */ +#define MSPI_SPCR0_LSB_REG 0x000 +#define MSPI_SPCR0_MSB_REG 0x004 +#define MSPI_SPCR1_LSB_REG 0x008 +#define MSPI_SPCR1_MSB_REG 0x00c +#define MSPI_NEWQP_REG 0x010 +#define MSPI_ENDQP_REG 0x014 +#define MSPI_SPCR2_REG 0x018 +#define MSPI_STATUS_REG
Re: [PATCH v9] driver: spi: add bcm iproc qspi support
Hi Jagan,
On Wed, Dec 15, 2021 at 11:49 PM Jagan Teki wrote:
>
> On Wed, Dec 1, 2021 at 11:40 PM Roman Bacik wrote:
> >
> > IPROC qspi driver supports both BSPI and MSPI modes.
> >
> > Signed-off-by: Rayagonda Kokatanur
> > Signed-off-by: Bharat Gooty
> > Acked-by: Rayagonda Kokatanur
> >
> > Signed-off-by: Roman Bacik
> > ---
> >
> > Changes in v9:
> > - merge bspi_set_4byte_mode to bspi_set_flex_mode
> > - simplify bspi_set_flex_mode using data from spi_mem_op
> > - rename mode_4byte to bspi_4byte
> > - use BIT(x) istead of 1< >
> > Changes in v8:
> > - add 4-byte address support
> >
> > Changes in v7:
> > - remove hardcorded IPROC_BSPI_READ_DUMMY_CYCLES
> > - remove unnecessary flags from bspi_read
> > - fix BSPI supported operation condition
> >
> > Changes in v6:
> > - remove priv->mode_4byte
> > - remove IPROC_BSPI_READ_SUPPORTED
> >
> > Changes in v5:
> > - add binding document
> > - implement spi-mem interface for bspi mode
> > - use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG
> > - move iproc_qspi.c to spi
> >
> > Changes in v4:
> > - move iproc_qspi.c from spi to mtd/spi
> > - remove iproc_qspi.h
> > - rename IPROC_QSPI to SPI_FLASH_IPROC
> >
> > Changes in v3:
> > - fix warning by including linux/delay.h
> > - change ofdata_to_platdata to of_to_plat
> > - change priv_auto_alloc_size to priv_auto
> >
> > Changes in v2:
> > - remove include spi-nor.h
> > - define and use named BITs for writing register values
> > - remove bspi_set_4byte_mode() method
> >
> > .../spi/spi-iproc-qspi.txt| 29 +
> > drivers/spi/Kconfig | 6 +
> > drivers/spi/Makefile | 1 +
> > drivers/spi/iproc_qspi.c | 657 ++
> > 4 files changed, 693 insertions(+)
> > create mode 100644 doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> > create mode 100644 drivers/spi/iproc_qspi.c
> >
> > diff --git a/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> > b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> > new file mode 100644
> > index ..fb9f1c2ae2da
> > --- /dev/null
> > +++ b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> > @@ -0,0 +1,29 @@
> > +Broadcom Iproc QSPI controller Device Tree Bindings
> > +---
> > +
> > +Required properties:
> > +- compatible: should be "brcm,iproc-qspi".
> > +- reg: Base address and size of the controllers memory area.
> > +- reg-names: "bspi", "bspi_raf", "mspi".
> > +- #address-cells: <1>, as required by generic SPI binding.
> > +- #size-cells: <0>, also as required by generic SPI binding.
> > +
> > +Example:
> > + qspi: spi@37 {
> > + compatible = "brcm,iproc-qspi";
> > + reg = <0x0037 0x100>,
> > + <0x00370100 0x100>,
> > + <0x00370200 0x200>;
> > + reg-names = "bspi", "bspi_raf", "mspi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + spi_nor_flash: spi_flash@0 {
> > + compatible = "jedec,spi-nor";
> > + reg = <0>;
> > + spi-max-frequency = <1250>;
> > + spi-cpol;
> > + spi-cpha;
> > + spi-tx-bus-width = <1>;
> > + spi-rx-bus-width = <4>;
> > + };
> > + };
>
> Please drop this binding away from this patch.
>
We will remove it in the next version.
> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> > index d07e9a28af82..faebc212753e 100644
> > --- a/drivers/spi/Kconfig
> > +++ b/drivers/spi/Kconfig
> > @@ -178,6 +178,12 @@ config ICH_SPI
> > access the SPI NOR flash on platforms embedding this Intel
> > ICH IP core.
> >
> > +config IPROC_QSPI
> > + bool "Broadcom iProc QSPI Flash Controller driver"
> > + help
> > + Enable Broadcom iProc QSPI Flash Controller driver.
> > + This driver can be used to access the SPI NOR flash.
> > +
> > config KIRKWOOD_SPI
> > bool "Marvell Kirkwood SPI Driver&qu
[PATCH v9] driver: spi: add bcm iproc qspi support
IPROC qspi driver supports both BSPI and MSPI modes.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Signed-off-by: Roman Bacik
---
Changes in v9:
- merge bspi_set_4byte_mode to bspi_set_flex_mode
- simplify bspi_set_flex_mode using data from spi_mem_op
- rename mode_4byte to bspi_4byte
- use BIT(x) istead of 1<mode_4byte
- remove IPROC_BSPI_READ_SUPPORTED
Changes in v5:
- add binding document
- implement spi-mem interface for bspi mode
- use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG
- move iproc_qspi.c to spi
Changes in v4:
- move iproc_qspi.c from spi to mtd/spi
- remove iproc_qspi.h
- rename IPROC_QSPI to SPI_FLASH_IPROC
Changes in v3:
- fix warning by including linux/delay.h
- change ofdata_to_platdata to of_to_plat
- change priv_auto_alloc_size to priv_auto
Changes in v2:
- remove include spi-nor.h
- define and use named BITs for writing register values
- remove bspi_set_4byte_mode() method
.../spi/spi-iproc-qspi.txt| 29 +
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/iproc_qspi.c | 657 ++
4 files changed, 693 insertions(+)
create mode 100644 doc/device-tree-bindings/spi/spi-iproc-qspi.txt
create mode 100644 drivers/spi/iproc_qspi.c
diff --git a/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
new file mode 100644
index ..fb9f1c2ae2da
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
@@ -0,0 +1,29 @@
+Broadcom Iproc QSPI controller Device Tree Bindings
+---
+
+Required properties:
+- compatible: should be "brcm,iproc-qspi".
+- reg: Base address and size of the controllers memory area.
+- reg-names: "bspi", "bspi_raf", "mspi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Example:
+ qspi: spi@37 {
+ compatible = "brcm,iproc-qspi";
+ reg = <0x0037 0x100>,
+ <0x00370100 0x100>,
+ <0x00370200 0x200>;
+ reg-names = "bspi", "bspi_raf", "mspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi_nor_flash: spi_flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1250>;
+ spi-cpol;
+ spi-cpha;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ };
+ };
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d07e9a28af82..faebc212753e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -178,6 +178,12 @@ config ICH_SPI
access the SPI NOR flash on platforms embedding this Intel
ICH IP core.
+config IPROC_QSPI
+ bool "Broadcom iProc QSPI Flash Controller driver"
+ help
+ Enable Broadcom iProc QSPI Flash Controller driver.
+ This driver can be used to access the SPI NOR flash.
+
config KIRKWOOD_SPI
bool "Marvell Kirkwood SPI Driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d2f24bccefd3..869763187062 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o
obj-$(CONFIG_ICH_SPI) += ich.o
+obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o
obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c
new file mode 100644
index ..d3c3a8c7f028
--- /dev/null
+++ b/drivers/spi/iproc_qspi.c
@@ -0,0 +1,657 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020-2021 Broadcom
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* 175MHz */
+#define QSPI_AXI_CLK 17500
+#define QSPI_WAIT_TIMEOUT_MS 200U
+#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3))
+
+/* Chip attributes */
+#define SPBR_MIN 8U
+#define SPBR_MAX 255U
+#define NUM_CDRAM 16U
+
+#define CDRAM_PCS0 2
+#define CDRAM_CONT BIT(7)
+#define CDRAM_BITS_EN BIT(6)
+#define CDRAM_QUAD_MODEBIT(8)
+#define CDRAM_RBIT_INPUT
[PATCH v8] driver: spi: add bcm iproc qspi support
From: Rayagonda Kokatanur
IPROC qspi driver supports both BSPI and MSPI modes.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Signed-off-by: Roman Bacik
---
Changes in v8:
- add 4-byte address support
Changes in v7:
- remove hardcorded IPROC_BSPI_READ_DUMMY_CYCLES
- remove unnecessary flags from bspi_read
- fix BSPI supported operation condition
Changes in v6:
- remove priv->mode_4byte
- remove IPROC_BSPI_READ_SUPPORTED
Changes in v5:
- add binding document
- implement spi-mem interface for bspi mode
- use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG
- move iproc_qspi.c to spi
Changes in v4:
- move iproc_qspi.c from spi to mtd/spi
- remove iproc_qspi.h
- rename IPROC_QSPI to SPI_FLASH_IPROC
Changes in v3:
- fix warning by including linux/delay.h
- change ofdata_to_platdata to of_to_plat
- change priv_auto_alloc_size to priv_auto
Changes in v2:
- remove include spi-nor.h
- define and use named BITs for writing register values
- remove bspi_set_4byte_mode() method
.../spi/spi-iproc-qspi.txt| 29 +
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/iproc_qspi.c | 679 ++
4 files changed, 715 insertions(+)
create mode 100644 doc/device-tree-bindings/spi/spi-iproc-qspi.txt
create mode 100644 drivers/spi/iproc_qspi.c
diff --git a/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
new file mode 100644
index ..fb9f1c2ae2da
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
@@ -0,0 +1,29 @@
+Broadcom Iproc QSPI controller Device Tree Bindings
+---
+
+Required properties:
+- compatible: should be "brcm,iproc-qspi".
+- reg: Base address and size of the controllers memory area.
+- reg-names: "bspi", "bspi_raf", "mspi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Example:
+ qspi: spi@37 {
+ compatible = "brcm,iproc-qspi";
+ reg = <0x0037 0x100>,
+ <0x00370100 0x100>,
+ <0x00370200 0x200>;
+ reg-names = "bspi", "bspi_raf", "mspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi_nor_flash: spi_flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1250>;
+ spi-cpol;
+ spi-cpha;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ };
+ };
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d07e9a28af82..faebc212753e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -178,6 +178,12 @@ config ICH_SPI
access the SPI NOR flash on platforms embedding this Intel
ICH IP core.
+config IPROC_QSPI
+ bool "Broadcom iProc QSPI Flash Controller driver"
+ help
+ Enable Broadcom iProc QSPI Flash Controller driver.
+ This driver can be used to access the SPI NOR flash.
+
config KIRKWOOD_SPI
bool "Marvell Kirkwood SPI Driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d2f24bccefd3..869763187062 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o
obj-$(CONFIG_ICH_SPI) += ich.o
+obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o
obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c
new file mode 100644
index ..72b1d09c0b58
--- /dev/null
+++ b/drivers/spi/iproc_qspi.c
@@ -0,0 +1,679 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020-2021 Broadcom
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* 175MHz */
+#define QSPI_AXI_CLK 17500
+#define QSPI_WAIT_TIMEOUT_MS 200U
+#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3))
+
+/* Chip attributes */
+#define SPBR_MIN 8U
+#define SPBR_MAX 255U
+#define NUM_CDRAM 16U
+
+#define CDRAM_PCS0 2
+#define CDRAM_CONT BIT(7)
+#define CDRAM_BITS_EN BIT(6)
+#define CDRAM_QUAD_MODE
[PATCH v7] driver: spi: add bcm iproc qspi support.
From: Rayagonda Kokatanur
IPROC qspi driver supports both BSPI and MSPI modes.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Signed-off-by: Roman Bacik
---
Changes in v7:
- remove hardcorded IPROC_BSPI_READ_DUMMY_CYCLES
- remove unnecessary flags from bspi_read
- fix BSPI supported operation condition
Changes in v6:
- remove priv->mode_4byte
- remove IPROC_BSPI_READ_SUPPORTED
Changes in v5:
- add binding document
- implement spi-mem interface for bspi mode
- use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG
- move iproc_qspi.c to spi
Changes in v4:
- move iproc_qspi.c from spi to mtd/spi
- remove iproc_qspi.h
- rename IPROC_QSPI to SPI_FLASH_IPROC
Changes in v3:
- fix warning by including linux/delay.h
- change ofdata_to_platdata to of_to_plat
- change priv_auto_alloc_size to priv_auto
Changes in v2:
- remove include spi-nor.h
- define and use named BITs for writing register values
- remove bspi_set_4byte_mode() method
.../spi/spi-iproc-qspi.txt| 29 +
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/iproc_qspi.c | 624 ++
4 files changed, 660 insertions(+)
create mode 100644 doc/device-tree-bindings/spi/spi-iproc-qspi.txt
create mode 100644 drivers/spi/iproc_qspi.c
diff --git a/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
new file mode 100644
index ..fb9f1c2ae2da
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
@@ -0,0 +1,29 @@
+Broadcom Iproc QSPI controller Device Tree Bindings
+---
+
+Required properties:
+- compatible: should be "brcm,iproc-qspi".
+- reg: Base address and size of the controllers memory area.
+- reg-names: "bspi", "bspi_raf", "mspi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Example:
+ qspi: spi@37 {
+ compatible = "brcm,iproc-qspi";
+ reg = <0x0037 0x100>,
+ <0x00370100 0x100>,
+ <0x00370200 0x200>;
+ reg-names = "bspi", "bspi_raf", "mspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi_nor_flash: spi_flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1250>;
+ spi-cpol;
+ spi-cpha;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ };
+ };
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d07e9a28af82..faebc212753e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -178,6 +178,12 @@ config ICH_SPI
access the SPI NOR flash on platforms embedding this Intel
ICH IP core.
+config IPROC_QSPI
+ bool "Broadcom iProc QSPI Flash Controller driver"
+ help
+ Enable Broadcom iProc QSPI Flash Controller driver.
+ This driver can be used to access the SPI NOR flash.
+
config KIRKWOOD_SPI
bool "Marvell Kirkwood SPI Driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d2f24bccefd3..869763187062 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o
obj-$(CONFIG_ICH_SPI) += ich.o
+obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o
obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c
new file mode 100644
index ..80a35288af9b
--- /dev/null
+++ b/drivers/spi/iproc_qspi.c
@@ -0,0 +1,624 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020-2021 Broadcom
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* 175MHz */
+#define QSPI_AXI_CLK 17500
+#define QSPI_WAIT_TIMEOUT_MS 200U
+#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3))
+
+/* Chip attributes */
+#define SPBR_MIN 8U
+#define SPBR_MAX 255U
+#define NUM_CDRAM 16U
+
+#define CDRAM_PCS0 2
+#define CDRAM_CONT BIT(7)
+#define CDRAM_BITS_EN BIT(6)
+#define CDRAM_QUAD_MODEBIT(8)
+#define CDRAM_RBIT_INPUT
Re: [PATCH v6] driver: spi: add bcm iproc qspi support.
On Wed, Nov 17, 2021 at 1:25 PM Roman Bacik wrote:
>
> From: Rayagonda Kokatanur
>
> IPROC qspi driver supports both BSPI and MSPI modes.
>
> Signed-off-by: Rayagonda Kokatanur
> Signed-off-by: Bharat Gooty
> Acked-by: Rayagonda Kokatanur
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in v6:
> - remove priv->mode_4byte
> - remove IPROC_BSPI_READ_SUPPORTED
>
> Changes in v5:
> - add binding document
> - implement spi-mem interface for bspi mode
> - use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG
> - move iproc_qspi.c to spi
>
> Changes in v4:
> - move iproc_qspi.c from spi to mtd/spi
> - remove iproc_qspi.h
> - rename IPROC_QSPI to SPI_FLASH_IPROC
>
> Changes in v3:
> - fix warning by including linux/delay.h
> - change ofdata_to_platdata to of_to_plat
> - change priv_auto_alloc_size to priv_auto
>
> Changes in v2:
> - remove include spi-nor.h
> - define and use named BITs for writing register values
> - remove bspi_set_4byte_mode() method
>
> .../spi/spi-iproc-qspi.txt| 29 +
> drivers/spi/Kconfig | 6 +
> drivers/spi/Makefile | 1 +
> drivers/spi/iproc_qspi.c | 630 ++
> 4 files changed, 666 insertions(+)
> create mode 100644 doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> create mode 100644 drivers/spi/iproc_qspi.c
>
> diff --git a/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> new file mode 100644
> index ..fb9f1c2ae2da
> --- /dev/null
> +++ b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
> @@ -0,0 +1,29 @@
> +Broadcom Iproc QSPI controller Device Tree Bindings
> +---
> +
> +Required properties:
> +- compatible: should be "brcm,iproc-qspi".
> +- reg: Base address and size of the controllers memory area.
> +- reg-names: "bspi", "bspi_raf", "mspi".
> +- #address-cells: <1>, as required by generic SPI binding.
> +- #size-cells: <0>, also as required by generic SPI binding.
> +
> +Example:
> + qspi: spi@37 {
> + compatible = "brcm,iproc-qspi";
> + reg = <0x0037 0x100>,
> + <0x00370100 0x100>,
> + <0x00370200 0x200>;
> + reg-names = "bspi", "bspi_raf", "mspi";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + spi_nor_flash: spi_flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <1250>;
> + spi-cpol;
> + spi-cpha;
> + spi-tx-bus-width = <1>;
> + spi-rx-bus-width = <4>;
> + };
> + };
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index d07e9a28af82..faebc212753e 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -178,6 +178,12 @@ config ICH_SPI
> access the SPI NOR flash on platforms embedding this Intel
> ICH IP core.
>
> +config IPROC_QSPI
> + bool "Broadcom iProc QSPI Flash Controller driver"
> + help
> + Enable Broadcom iProc QSPI Flash Controller driver.
> + This driver can be used to access the SPI NOR flash.
> +
> config KIRKWOOD_SPI
> bool "Marvell Kirkwood SPI Driver"
> help
> diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
> index d2f24bccefd3..869763187062 100644
> --- a/drivers/spi/Makefile
> +++ b/drivers/spi/Makefile
> @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
> obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
> obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o
> obj-$(CONFIG_ICH_SPI) += ich.o
> +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o
> obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
> obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o
> obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
> diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c
> new file mode 100644
> index ..4969ba83171a
> --- /dev/null
> +++ b/drivers/spi/iproc_qspi.c
> @@ -0,0 +1,630 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2020-2021 Broadcom
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +/* 175MHz */
> +#define QSPI_AXI_CLK 17500
> +#define QSPI_WAIT_
[PATCH v6] driver: spi: add bcm iproc qspi support.
From: Rayagonda Kokatanur
IPROC qspi driver supports both BSPI and MSPI modes.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Signed-off-by: Roman Bacik
---
Changes in v6:
- remove priv->mode_4byte
- remove IPROC_BSPI_READ_SUPPORTED
Changes in v5:
- add binding document
- implement spi-mem interface for bspi mode
- use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG
- move iproc_qspi.c to spi
Changes in v4:
- move iproc_qspi.c from spi to mtd/spi
- remove iproc_qspi.h
- rename IPROC_QSPI to SPI_FLASH_IPROC
Changes in v3:
- fix warning by including linux/delay.h
- change ofdata_to_platdata to of_to_plat
- change priv_auto_alloc_size to priv_auto
Changes in v2:
- remove include spi-nor.h
- define and use named BITs for writing register values
- remove bspi_set_4byte_mode() method
.../spi/spi-iproc-qspi.txt| 29 +
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/iproc_qspi.c | 630 ++
4 files changed, 666 insertions(+)
create mode 100644 doc/device-tree-bindings/spi/spi-iproc-qspi.txt
create mode 100644 drivers/spi/iproc_qspi.c
diff --git a/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
new file mode 100644
index ..fb9f1c2ae2da
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
@@ -0,0 +1,29 @@
+Broadcom Iproc QSPI controller Device Tree Bindings
+---
+
+Required properties:
+- compatible: should be "brcm,iproc-qspi".
+- reg: Base address and size of the controllers memory area.
+- reg-names: "bspi", "bspi_raf", "mspi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Example:
+ qspi: spi@37 {
+ compatible = "brcm,iproc-qspi";
+ reg = <0x0037 0x100>,
+ <0x00370100 0x100>,
+ <0x00370200 0x200>;
+ reg-names = "bspi", "bspi_raf", "mspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi_nor_flash: spi_flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1250>;
+ spi-cpol;
+ spi-cpha;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ };
+ };
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d07e9a28af82..faebc212753e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -178,6 +178,12 @@ config ICH_SPI
access the SPI NOR flash on platforms embedding this Intel
ICH IP core.
+config IPROC_QSPI
+ bool "Broadcom iProc QSPI Flash Controller driver"
+ help
+ Enable Broadcom iProc QSPI Flash Controller driver.
+ This driver can be used to access the SPI NOR flash.
+
config KIRKWOOD_SPI
bool "Marvell Kirkwood SPI Driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d2f24bccefd3..869763187062 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o
obj-$(CONFIG_ICH_SPI) += ich.o
+obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o
obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c
new file mode 100644
index ..4969ba83171a
--- /dev/null
+++ b/drivers/spi/iproc_qspi.c
@@ -0,0 +1,630 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020-2021 Broadcom
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* 175MHz */
+#define QSPI_AXI_CLK 17500
+#define QSPI_WAIT_TIMEOUT_MS 200U
+#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3))
+
+/*SPI configuration */
+#define IPROC_BSPI_READ_DUMMY_CYCLES 0x08
+
+/* Chip attributes */
+#define SPBR_MIN 8U
+#define SPBR_MAX 255U
+#define NUM_CDRAM 16U
+
+#define CDRAM_PCS0 2
+#define CDRAM_CONT BIT(7)
+#define CDRAM_BITS_EN BIT(6)
+#define CDRAM_QUAD_MODEBIT(8)
+#define CDRAM_RBIT_INPUT BIT(10)
+#define MSPI_SPE
[PATCH v5] driver: spi: add bcm iproc qspi support.
From: Rayagonda Kokatanur
IPROC qspi driver supports both BSPI and MSPI modes.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Signed-off-by: Roman Bacik
---
Changes in v5:
- add binding document
- implement spi-mem interface for bspi mode
- use op->cmd.opcode for BSPI_CMD_AND_MODE_BYTE_REG
- move iproc_qspi.c to spi
Changes in v4:
- move iproc_qspi.c from spi to mtd/spi
- remove iproc_qspi.h
- rename IPROC_QSPI to SPI_FLASH_IPROC
Changes in v3:
- fix warning by including linux/delay.h
- change ofdata_to_platdata to of_to_plat
- change priv_auto_alloc_size to priv_auto
Changes in v2:
- remove include spi-nor.h
- define and use named BITs for writing register values
- remove bspi_set_4byte_mode() method
.../spi/spi-iproc-qspi.txt| 29 +
drivers/spi/Kconfig | 6 +
drivers/spi/Makefile | 1 +
drivers/spi/iproc_qspi.c | 656 ++
4 files changed, 692 insertions(+)
create mode 100644 doc/device-tree-bindings/spi/spi-iproc-qspi.txt
create mode 100644 drivers/spi/iproc_qspi.c
diff --git a/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
new file mode 100644
index ..fb9f1c2ae2da
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-iproc-qspi.txt
@@ -0,0 +1,29 @@
+Broadcom Iproc QSPI controller Device Tree Bindings
+---
+
+Required properties:
+- compatible: should be "brcm,iproc-qspi".
+- reg: Base address and size of the controllers memory area.
+- reg-names: "bspi", "bspi_raf", "mspi".
+- #address-cells: <1>, as required by generic SPI binding.
+- #size-cells: <0>, also as required by generic SPI binding.
+
+Example:
+ qspi: spi@37 {
+ compatible = "brcm,iproc-qspi";
+ reg = <0x0037 0x100>,
+ <0x00370100 0x100>,
+ <0x00370200 0x200>;
+ reg-names = "bspi", "bspi_raf", "mspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spi_nor_flash: spi_flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1250>;
+ spi-cpol;
+ spi-cpha;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ };
+ };
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d07e9a28af82..faebc212753e 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -178,6 +178,12 @@ config ICH_SPI
access the SPI NOR flash on platforms embedding this Intel
ICH IP core.
+config IPROC_QSPI
+ bool "Broadcom iProc QSPI Flash Controller driver"
+ help
+ Enable Broadcom iProc QSPI Flash Controller driver.
+ This driver can be used to access the SPI NOR flash.
+
config KIRKWOOD_SPI
bool "Marvell Kirkwood SPI Driver"
help
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index d2f24bccefd3..869763187062 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o
obj-$(CONFIG_FSL_ESPI) += fsl_espi.o
obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o
obj-$(CONFIG_ICH_SPI) += ich.o
+obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o
obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o
obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o
diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c
new file mode 100644
index ..2452a587b0dd
--- /dev/null
+++ b/drivers/spi/iproc_qspi.c
@@ -0,0 +1,656 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020-2021 Broadcom
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* 175MHz */
+#define QSPI_AXI_CLK 17500
+#define QSPI_WAIT_TIMEOUT_MS 200U
+#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3))
+
+/*SPI configuration */
+#define IPROC_BSPI_READ_DUMMY_CYCLES 0x08
+#define IPROC_BSPI_READ_SUPPORTED 0x0b
+
+/* Chip attributes */
+#define SPBR_MIN 8U
+#define SPBR_MAX 255U
+#define NUM_CDRAM 16U
+
+#define CDRAM_PCS0 2
+#define CDRAM_CONT BIT(7)
+#define CDRAM_BITS_EN BIT(6)
+#define CDRAM_QUAD_MODEBIT(8)
+#define CDRAM_RBIT_INPUT BIT(10)
+#define MSPI_SPE BIT(6)
+#define MSPI_CONT_AFTE
Re: [PATCH v10 1/2] net: brcm: netXtreme driver
On Tue, Nov 9, 2021 at 12:37 AM Ramon Fried wrote: > > On Tue, Nov 9, 2021 at 4:55 AM Marek Behún wrote: > > > > On Mon, 8 Nov 2021 18:20:43 -0800 > > Roman Bacik wrote: > > > > > On Mon, Nov 8, 2021 at 5:12 PM Marek Behún wrote: > > > > > > > > On Mon, 8 Nov 2021 16:48:33 -0800 > > > > Roman Bacik wrote: > > > > > > > > > To be honest changing status codes coming from FW does not seem > > > > > right. But > > > > > we will try to make the requested changes. > > > > > > > > I looked at kernel's implementation of this driver and these hwrm > > > > functions and they don't return STATUS_*. > > > > > > > > Marek > > > > > > Marek, > > > > > > This is quite a different driver and it was written for uboot. > > > > Hello Roman > > > > The drivers clearly have a common ancestor, there are far too many > > similarities. It clearly wasn't written from scratch for U-Boot. > > > > > If the > > > main objection is that Linux driver is different then maybe we should > > > use v10 as is. Currently hwrm methods return HW status and bnxt > > > methods return uboot error codes consistently. > > > > I will leave this to U-Boot's network subsystem maintainers. As I said, > > beggars cannot be choosers in U-Boot. As long as the driver does not > > introduce vendor specific stuff to the user API (in U-Boot command > > line), then I guess I'll have to be satisfied. > > > > Marek > I'll accept the v10, you all made good comments and surely the patch > looks much better then now. > Thanks, > Ramon. Ramon, Marek, Pali, Thank you very much for your comments and reviewing our code. Regards, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it.
Re: [PATCH v10 1/2] net: brcm: netXtreme driver
On Mon, Nov 8, 2021 at 5:12 PM Marek Behún wrote: > > On Mon, 8 Nov 2021 16:48:33 -0800 > Roman Bacik wrote: > > > To be honest changing status codes coming from FW does not seem right. But > > we will try to make the requested changes. > > I looked at kernel's implementation of this driver and these hwrm > functions and they don't return STATUS_*. > > Marek Marek, This is quite a different driver and it was written for uboot. If the main objection is that Linux driver is different then maybe we should use v10 as is. Currently hwrm methods return HW status and bnxt methods return uboot error codes consistently. Thanks, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it.
RE: [PATCH v10 1/2] net: brcm: netXtreme driver
Hi Marek,
> -Original Message-
> From: Marek Behún
> Sent: Monday, November 8, 2021 3:43 PM
> To: Roman Bacik
> Cc: U-Boot Mailing List ; Pali Rohar
> ; Bharat Gooty ; Joe
> Hershberger ; Ramon Fried
>
> Subject: Re: [PATCH v10 1/2] net: brcm: netXtreme driver
>
> Hello Roman,
>
> some last requests from me.
>
> On Mon, 8 Nov 2021 14:46:10 -0800
> Roman Bacik wrote:
>
> > +#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
> > +#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
>
> Could these be changed to functions instead of macros, please?
Ok, we will make the change.
>
> > +int bnxt_free_rx_iob(struct bnxt *bp)
> > +{
> > + unsigned int i;
> > +
> > + if (!(FLAG_TEST(bp->flag_hwrm, VALID_RX_IOB)))
> > + return STATUS_SUCCESS;
>
> Please change all STATUS_SUCCESS to 0 and STATUS_FAILURE to either -1
> or appropriate -errno, as is customary in U-Boot.
This status is returned from our HW/FW so it would make more sense to keep
it as is.
But we will change it per your request and we will replace STATUS_SUCCESS
with 0 and STATUS_FAILURE with -1 and hence loose status codes actually
returned by HW/FW.
>
> At first I thought that you have implemented this driver by starting
> from kernel's implementation. They look very similar. But it was
> probably an old version of kernel implementation (perhaps broadcom
> internal?), because many things are different now.
>
> > +static void set_rx_desc(u8 *buf, void *iob, u16 cons_id, u32 iob_idx)
> > +{
> > + struct rx_prod_pkt_bd *desc;
> > + u16 off = cons_id * sizeof(struct rx_prod_pkt_bd);
> > +
> > + desc = (struct rx_prod_pkt_bd *)[off];
> > + desc->flags_type = RX_PROD_PKT_BD_TYPE_RX_PROD_PKT;
> > + desc->len= MAX_ETHERNET_PACKET_BUFFER_SIZE;
>
> What bugs me with this driver most is that it reimplements many things
on
> its own. MAX_ETHERNET_PACKET_BUFFER_SIZE is 1536, but we have
> PKTSIZE_ALIGN in include/net.h for that.
>
> > + bp->link_status = STATUS_LINK_DOWN;
>
> This can be a simple bool: link is either up or down...
The bp structure is passed to our HW/FW, which expects a valid integer
link_status. We cannot make this change and have the driver working.
>
>
> > +typedef int (*hwrm_func_t)(struct bnxt *bp);
> > +
> > +hwrm_func_t down_chip[] = {
> > + bnxt_hwrm_cfa_l2_filter_free,/* Free l2 filter */
> > + bnxt_free_rx_iob,/* Free rx iob */
> > + bnxt_hwrm_vnic_free, /* Free vnic */
> > + bnxt_hwrm_ring_free_grp, /* Free ring group */
> > + bnxt_hwrm_ring_free_rx, /* Free rx ring*/
> > + bnxt_hwrm_ring_free_tx, /* Free tx ring*/
> > + bnxt_hwrm_ring_free_cq, /* Free CQ ring*/
> > + bnxt_hwrm_stat_ctx_free, /* Free Stat ctx */
> > + bnxt_hwrm_func_drv_unrgtr, /* unreg driver*/
> > + NULL,
> > +};
> > +
> > +hwrm_func_t bring_chip[] = {
> > + bnxt_hwrm_ver_get, /* HWRM_VER_GET */
> > + bnxt_hwrm_func_reset_req, /* HWRM_FUNC_RESET */
> > + bnxt_hwrm_func_drv_rgtr,/* HWRM_FUNC_DRV_RGTR */
> > + bnxt_hwrm_func_resource_qcaps, /*
> HWRM_FUNC_RESOURCE_QCAPS */
> > + bnxt_hwrm_func_qcfg_req,/* HWRM_FUNC_QCFG */
> > + bnxt_hwrm_func_qcaps_req, /* HWRM_FUNC_QCAPS */
> > + bnxt_hwrm_get_link_speed, /* HWRM_NVM_GET_VARIABLE -
> 203 */
> > + bnxt_hwrm_port_mac_cfg, /* HWRM_PORT_MAC_CFG*/
> > + bnxt_qphy_link, /* HWRM_PORT_PHY_QCFG */
> > + bnxt_hwrm_func_cfg_req, /* HWRM_FUNC_CFG - ring
> resource*/
> > + bnxt_hwrm_stat_ctx_alloc, /* Allocate Stat Ctx ID */
> > + bnxt_hwrm_ring_alloc_cq,/* Allocate CQ Ring */
> > + bnxt_hwrm_ring_alloc_tx,/* Allocate Tx ring */
> > + bnxt_hwrm_ring_alloc_rx,/* Allocate Rx Ring */
> > + bnxt_hwrm_ring_alloc_grp, /* Create Ring Group*/
> > + post_rx_buffers,/* Post RX buffers */
> > + bnxt_hwrm_set_async_event, /* ENABLES_ASYNC_EVENT_CR
> */
> > + bnxt_hwrm_vnic_alloc, /* Alloc VNIC */
> > + bnxt_hwrm_vnic_cfg, /* Config VNIC */
> > + bnxt_hwrm_cfa_l2_filter_alloc, /* Alloc L2 Filter */
> > + get_phy_link, /* Get Physical Link
[PATCH v10 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v10:
- move unnecessary code from bnxt_read_rom_hwaddr to bnxt_eth_probe
Changes in v9:
- remove bnxt_ver.h
- add DRIVER_VERSION_* definitions to bnxt.h
- remove pci_read_/pci_write_/pci_map_ definitions from bnxt.h
Changes in v8:
- remove PCICFG_ME_REGISTER
Changes in v7:
- move bnxt_*.h files to drivers/net/bnxt/
- remove display_banner()
- replace pci_map_bar() with dm_pci_map_bar()
- remove changes to dev->flags_
- move PCI DID and VID definitions to include/pci_ids.h
- move bnxt_nics[] to bnxt.c
- move bnxt_alloc_mem to bnxt_read_rom_hw
- return proper error codes in bnxt_read_rom_hwaddr
Changes in v6:
- remove bnxt_eth_* env variables
- clean up include headers
Changes in v5:
- remove bnxt_env_set_ethaddr/bnxt_env_del_ethaddr methods
- add .read_rom_hwaddr = bnxt_read_rom_hwaddr
- move bnxt_bring_pci/bnxt_bring_chip to bnxt_read_rom_hwddr
- move mac copy from priv to plat to bnxt_read_rom_hwaddr
Changes in v4:
- remove static num_cards and use dev_seq(dev) instead
- add .probe
- merged probe/remove methods
- select PCI_INIT_R when BNXT_ETH is selected
Changes in v3:
- change printf to debug in display_banner
- remove get/set/print mac/speed
- remove bnxt_hwrm_set_nvmem
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|7 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 1708 +++
drivers/net/bnxt/bnxt.h | 390
drivers/net/bnxt/bnxt_dbg.h | 536 +++
drivers/net/bnxt/bnxt_hsi.h | 889 ++
include/pci_ids.h |3 +
9 files changed, 3540 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt.h
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/bnxt_hsi.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..412ecd430335
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,7 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ select PCI_INIT_R
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..9844e96072e7
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,1708 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt.h"
+#include "bnxt_dbg.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ dm_pci_read_config16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ dm_pci_read_config16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ dm_pci_read_config16(bp->pdev, PCI_SUBSYSTEM_VENDOR_ID,
>subsystem_vendor);
+ dm_pci_read_config16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ dm_pci_read_config16(bp->pdev, PCI_COMMAND, >cmd_reg);
+ dm_pci_read_config8(bp->pdev, PCI_INTERRUPT_LINE, >irq);
+ bp->bar0 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+ bp->bar1 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_2, PCI_RE
[PATCH v10 2/2] board: brcm-ns3: Load netXtreme firmware
From: Bharat Gooty
Load NetXtreme firmware in board_init when BNXT_ETH is selected.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v4)
Changes in v4:
- remove bnxt commands
- load bnxt firmware in board_init
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
board/broadcom/bcmns3/ns3.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 32acf367842a..88036c16c951 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
if (bl33_info->version != BL33_INFO_VERSION)
printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+ if (chimp_fastboot_optee() != 0)
+ printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
return 0;
}
--
2.17.1
--
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smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v9 1/2] net: brcm: netXtreme driver
On Mon, Nov 8, 2021 at 10:40 AM Roman Bacik wrote:
>
> From: Bharat Gooty
>
> Broadcom bnxt L2 driver support. Used by the Broadcom
> iproc platforms.
>
> Signed-off-by: Bharat Gooty
> Reviewed-by: Ramon Fried
>
> Signed-off-by: Roman Bacik
> ---
>
> Changes in v9:
> - remove bnxt_ver.h
> - add DRIVER_VERSION_* definitions to bnxt.h
> - remove pci_read_/pci_write_/pci_map_ definitions from bnxt.h
>
> Changes in v8:
> - remove PCICFG_ME_REGISTER
>
> Changes in v7:
> - move bnxt_*.h files to drivers/net/bnxt/
> - remove display_banner()
> - replace pci_map_bar() with dm_pci_map_bar()
> - remove changes to dev->flags_
> - move PCI DID and VID definitions to include/pci_ids.h
> - move bnxt_nics[] to bnxt.c
> - move bnxt_alloc_mem to bnxt_read_rom_hw
> - return proper error codes in bnxt_read_rom_hwaddr
>
> Changes in v6:
> - remove bnxt_eth_* env variables
> - clean up include headers
>
> Changes in v5:
> - remove bnxt_env_set_ethaddr/bnxt_env_del_ethaddr methods
> - add .read_rom_hwaddr = bnxt_read_rom_hwaddr
> - move bnxt_bring_pci/bnxt_bring_chip to bnxt_read_rom_hwddr
> - move mac copy from priv to plat to bnxt_read_rom_hwaddr
>
> Changes in v4:
> - remove static num_cards and use dev_seq(dev) instead
> - add .probe
> - merged probe/remove methods
> - select PCI_INIT_R when BNXT_ETH is selected
>
> Changes in v3:
> - change printf to debug in display_banner
> - remove get/set/print mac/speed
> - remove bnxt_hwrm_set_nvmem
>
> Changes in v2:
> - rebase and remove DM_PCI dependency from BNXT_ETH
> - remove tautology assignment from debug_resp()
>
> drivers/net/Kconfig |1 +
> drivers/net/Makefile|1 +
> drivers/net/bnxt/Kconfig|7 +
> drivers/net/bnxt/Makefile |5 +
> drivers/net/bnxt/bnxt.c | 1706 +++
> drivers/net/bnxt/bnxt.h | 390
> drivers/net/bnxt/bnxt_dbg.h | 536 +++
> drivers/net/bnxt/bnxt_hsi.h | 889 ++
> include/pci_ids.h |3 +
> 9 files changed, 3538 insertions(+)
> create mode 100644 drivers/net/bnxt/Kconfig
> create mode 100644 drivers/net/bnxt/Makefile
> create mode 100644 drivers/net/bnxt/bnxt.c
> create mode 100644 drivers/net/bnxt/bnxt.h
> create mode 100644 drivers/net/bnxt/bnxt_dbg.h
> create mode 100644 drivers/net/bnxt/bnxt_hsi.h
>
> +static int bnxt_read_rom_hwaddr(struct udevice *dev)
> +{
> + struct eth_pdata *plat = dev_get_plat(dev);
> + struct bnxt *bp = dev_get_priv(dev);
> + int ret;
> +
> + ret = bnxt_alloc_mem(bp);
> + if (ret) {
> + printf("*** error: bnxt_alloc_mem failed! ***\n");
> + return ret;
> + }
> + bp->pdev = (struct udevice *)dev;
> + bnxt_bring_pci(bp);
> + ret = bnxt_bring_chip(bp);
> + if (ret) {
> + printf("*** error: bnxt_bring_chip failed! ***\n");
> + return -ENODATA;
> + }
We will move the code above back to the probe method in v10 as
requested. I was wrong, there was no need to move it here.
Thanks,
Roman
--
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the use of the individual or entity to whom it is addressed and may contain
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laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
copying, distributing, dissemination, forwarding, printing, or copying of
this e-mail is strictly prohibited. If you received this e-mail in error,
please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
[PATCH v9 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v9:
- remove bnxt_ver.h
- add DRIVER_VERSION_* definitions to bnxt.h
- remove pci_read_/pci_write_/pci_map_ definitions from bnxt.h
Changes in v8:
- remove PCICFG_ME_REGISTER
Changes in v7:
- move bnxt_*.h files to drivers/net/bnxt/
- remove display_banner()
- replace pci_map_bar() with dm_pci_map_bar()
- remove changes to dev->flags_
- move PCI DID and VID definitions to include/pci_ids.h
- move bnxt_nics[] to bnxt.c
- move bnxt_alloc_mem to bnxt_read_rom_hw
- return proper error codes in bnxt_read_rom_hwaddr
Changes in v6:
- remove bnxt_eth_* env variables
- clean up include headers
Changes in v5:
- remove bnxt_env_set_ethaddr/bnxt_env_del_ethaddr methods
- add .read_rom_hwaddr = bnxt_read_rom_hwaddr
- move bnxt_bring_pci/bnxt_bring_chip to bnxt_read_rom_hwddr
- move mac copy from priv to plat to bnxt_read_rom_hwaddr
Changes in v4:
- remove static num_cards and use dev_seq(dev) instead
- add .probe
- merged probe/remove methods
- select PCI_INIT_R when BNXT_ETH is selected
Changes in v3:
- change printf to debug in display_banner
- remove get/set/print mac/speed
- remove bnxt_hwrm_set_nvmem
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|7 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 1706 +++
drivers/net/bnxt/bnxt.h | 390
drivers/net/bnxt/bnxt_dbg.h | 536 +++
drivers/net/bnxt/bnxt_hsi.h | 889 ++
include/pci_ids.h |3 +
9 files changed, 3538 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt.h
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/bnxt_hsi.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..412ecd430335
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,7 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ select PCI_INIT_R
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..210fb55891d7
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,1706 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt.h"
+#include "bnxt_dbg.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ dm_pci_read_config16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ dm_pci_read_config16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ dm_pci_read_config16(bp->pdev, PCI_SUBSYSTEM_VENDOR_ID,
>subsystem_vendor);
+ dm_pci_read_config16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ dm_pci_read_config16(bp->pdev, PCI_COMMAND, >cmd_reg);
+ dm_pci_read_config8(bp->pdev, PCI_INTERRUPT_LINE, >irq);
+ bp->bar0 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+ bp->bar1 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_2, PCI_REGION_MEM);
+ bp->bar2 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_4, PCI_RE
[PATCH v9 2/2] board: brcm-ns3: Load netXtreme firmware
From: Bharat Gooty
Load NetXtreme firmware in board_init when BNXT_ETH is selected.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v4)
Changes in v4:
- remove bnxt commands
- load bnxt firmware in board_init
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
board/broadcom/bcmns3/ns3.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 32acf367842a..88036c16c951 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
if (bl33_info->version != BL33_INFO_VERSION)
printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+ if (chimp_fastboot_optee() != 0)
+ printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
return 0;
}
--
2.17.1
--
This electronic communication and the information and any files transmitted
with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
copying, distributing, dissemination, forwarding, printing, or copying of
this e-mail is strictly prohibited. If you received this e-mail in error,
please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
smime.p7s
Description: S/MIME Cryptographic Signature
RE: [PATCH v8 1/2] net: brcm: netXtreme driver
> -Original Message-
> From: Pali Rohár
> Sent: Sunday, November 7, 2021 1:44 AM
> To: Roman Bacik
> Cc: U-Boot Mailing List ; Bharat Gooty
> ; Joe Hershberger
> ; Ramon Fried
> Subject: Re: [PATCH v8 1/2] net: brcm: netXtreme driver
>
> Hello!
>
> When sending a new version of patch, try to put into CC reviewers of
> previous versions, so they can approve new version (if objections were
> fixed). Not everybody is following all emails on mailing list as there
> are lot of emails...
Ok, we will.
>
> On Friday 05 November 2021 15:36:51 Roman Bacik wrote:
> > --- /dev/null
> > +++ b/drivers/net/bnxt/bnxt.c
> > @@ -0,0 +1,1710 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2019-2021 Broadcom.
> > + */
> > +
> > +#include
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +#include "bnxt.h"
> > +#include "bnxt_dbg.h"
> > +
> > +#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
> > +#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
> > +
> > +/* Broadcom ethernet driver PCI APIs. */
> > +static void bnxt_bring_pci(struct bnxt *bp)
> > +{
> > + u16 cmd_reg = 0;
> > +
> > + pci_read_word16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
> > + pci_read_word16(bp->pdev, PCI_DEVICE_ID, >device_id);
> > + pci_read_word16(bp->pdev,
> > + PCI_SUBSYSTEM_VENDOR_ID,
> > + >subsystem_vendor);
> > + pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID,
> >subsystem_device);
> > + pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg);
> > + pci_read_byte(bp->pdev, PCI_INTERRUPT_LINE, >irq);
> > + bp->bar0 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_0,
> PCI_REGION_MEM);
> > + bp->bar1 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_2,
> PCI_REGION_MEM);
> > + bp->bar2 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_4,
> PCI_REGION_MEM);
> > + cmd_reg = bp->cmd_reg | PCI_COMMAND_MEMORY |
> PCI_COMMAND_MASTER;
> > + cmd_reg |= PCI_COMMAND_INTX_DISABLE; /* disable intr */
> > + pci_write_word(bp->pdev, PCI_COMMAND, cmd_reg);
> > + pci_read_word16(bp->pdev, PCI_COMMAND, _reg);
>
> I cannot find any pci_read_word16() function in the current U-Boot
> master repository. So this patch cannot be compiled.
It is defined in bnxt.h as dm_pci_read_config16. But we will remove
pci_read_/pci_write_/pci_map_ definitions from the header and replace.
>
> Could you check that you are developing this patch on top of the recent
> version of U-Boot git master branch?
We rebase, compile and test with the latest before posting the patch.
>
> Also you should use pci_dm_* functions as Driver Model API is preferred
> now and drivers are being converting to this new API, so old API can be
> later dropped.
>
> > + dbg_pci(bp, __func__, cmd_reg);
> > +}
This is our method declared in bnxt_dbg.h.
> ...
> > diff --git a/drivers/net/bnxt/bnxt_ver.h b/drivers/net/bnxt/bnxt_ver.h
> > new file mode 100644
> > index ..fa84397338dd
> > --- /dev/null
> > +++ b/drivers/net/bnxt/bnxt_ver.h
> > @@ -0,0 +1,22 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * Copyright 2019-2021 Broadcom.
> > + */
> > +
> > +#ifndef _BNXT_VER_H_
> > +#define _BNXT_VER_H_
> > +
> > +#ifndef BNXT_EXTRA_VER_H
> > +#define BNXT_EXTRA_VER_H
> > +#define DRV_MODULE_EXTRA_VER "-216.1.182.0"
> > +#endif
> > +
> > +#define DRV_MODULE_NAME "bnxt"
> > +#define DRV_MODULE_VERSION "1.0.0" DRV_MODULE_EXTRA_VER
> > +#define UBOOT_MODULE_VER "1.0.0"
> > +#define UBOOT_VERSION_MAJOR 1
> > +#define UBOOT_VERSION_MINOR 0
> > +#define UBOOT_VERSION_UPDATE 0
> > +#define DRV_MODULE_DESC "Broadcom NetXtreme-C/E driver"
> > +
> > +#endif /* _BNXT_VER_H_ */
>
> It looks like that more macros from this file are completely unused.
> Could you re-check it? Macros which are unused and do not bring any
> value even for documentation purposes is dead code, which should be
> eliminated due to maintenance cost.
>
> For example for documentation purposes it could make sense to define
> unused macro which describe some existing HE register even when this
> macros is not used currently in the driver.
>
> But defining macro UBOOT_VERSION_* is suspicious as 1) U-Boot version is
> a
[PATCH v8 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v8:
- remove PCICFG_ME_REGISTER
Changes in v7:
- move bnxt_*.h files to drivers/net/bnxt/
- remove display_banner()
- replace pci_map_bar() with dm_pci_map_bar()
- remove changes to dev->flags_
- move PCI DID and VID definitions to include/pci_ids.h
- move bnxt_nics[] to bnxt.c
- move bnxt_alloc_mem to bnxt_read_rom_hw
- return proper error codes in bnxt_read_rom_hwaddr
Changes in v6:
- remove bnxt_eth_* env variables
- clean up include headers
Changes in v5:
- remove bnxt_env_set_ethaddr/bnxt_env_del_ethaddr methods
- add .read_rom_hwaddr = bnxt_read_rom_hwaddr
- move bnxt_bring_pci/bnxt_bring_chip to bnxt_read_rom_hwddr
- move mac copy from priv to plat to bnxt_read_rom_hwaddr
Changes in v4:
- remove static num_cards and use dev_seq(dev) instead
- add .probe
- merged probe/remove methods
- select PCI_INIT_R when BNXT_ETH is selected
Changes in v3:
- change printf to debug in display_banner
- remove get/set/print mac/speed
- remove bnxt_hwrm_set_nvmem
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|7 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 1710 +++
drivers/net/bnxt/bnxt.h | 394
drivers/net/bnxt/bnxt_dbg.h | 536 +++
drivers/net/bnxt/bnxt_hsi.h | 889 ++
drivers/net/bnxt/bnxt_ver.h | 22 +
include/pci_ids.h |3 +
10 files changed, 3568 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt.h
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/bnxt_hsi.h
create mode 100644 drivers/net/bnxt/bnxt_ver.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..412ecd430335
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,7 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ select PCI_INIT_R
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..3d0d26fe58da
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,1710 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt.h"
+#include "bnxt_dbg.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ pci_read_word16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ pci_read_word16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ pci_read_word16(bp->pdev,
+ PCI_SUBSYSTEM_VENDOR_ID,
+ >subsystem_vendor);
+ pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg);
+ pci_read_byte(bp->pdev, PCI_INTERRUPT_LINE, >irq);
+ bp->bar0 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+ bp->bar1 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_2, PCI_REGION_MEM);
+ bp->bar2 = dm_pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_4, PCI_REGION_MEM);
+ cmd_reg = bp->cmd_reg |
[PATCH v8 2/2] board: brcm-ns3: Load netXtreme firmware
From: Bharat Gooty
Load NetXtreme firmware in board_init when BNXT_ETH is selected.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v4)
Changes in v4:
- remove bnxt commands
- load bnxt firmware in board_init
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
board/broadcom/bcmns3/ns3.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 32acf367842a..88036c16c951 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
if (bl33_info->version != BL33_INFO_VERSION)
printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+ if (chimp_fastboot_optee() != 0)
+ printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
return 0;
}
--
2.17.1
--
This electronic communication and the information and any files transmitted
with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
copying, distributing, dissemination, forwarding, printing, or copying of
this e-mail is strictly prohibited. If you received this e-mail in error,
please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
smime.p7s
Description: S/MIME Cryptographic Signature
Re: [PATCH v6 1/2] net: brcm: netXtreme driver
On Fri, Nov 5, 2021 at 3:04 PM Pali Rohár wrote: > > On Friday 05 November 2021 22:09:47 Pali Rohár wrote: > > On Friday 05 November 2021 12:54:24 Roman Bacik wrote: > > > > > + pci_read_word16(bp->pdev, > > > > > + PCI_SUBSYSTEM_VENDOR_ID, > > > > > + >subsystem_vendor); > > > > > + pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, > > > > >subsystem_device); > > > > > + pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg); > > > > > + pci_read_byte(bp->pdev, PCICFG_ME_REGISTER, >pf_num); > > > > > > > > PCICFG_ME_REGISTER looks like an error as there is no such PCI config > > > > space macro. What you are trying to read into pf_num? Currently I do not > > > > know what "pf" abbreviation could mean. > > > > > > PF stands for physical function and pf_num is the number of physical > > > functions configured. > > > The macro is defined in bnxt.h: > > > #define PCICFG_ME_REGISTER 0x98 > > > > pci_read_byte() reads from PCI(e) config space, which is standardized. > > Therefore only standard macro constants from include/pci.h should be > > used. Standard PCI config header is 64 byte long and after that is > > linked list of capabilities. Order of capabilities is not defined. > > Extended capabilities from linked list should be located by macro > > constants PCI_CAP_ID_*. > > > > So above register is part of some extended capability. Correctly it > > should be used some function to locate starting offset of that extended > > capability based on PCI_CAP_ID_* (see pci.h file for these functions) > > and then access that register as offset + PCI_* constant (which defined > > as relative to the start of extended capability). In case standard macro > > for this constant in pci.h is missing, it is a good idea to define it, > > or copy it from linux header file pci_regs.h (to have consistent naming > > of macros). > > Just one example how to read PCIe Link Control Register (to make it > clear what I mean): > > int ret; > u16 lnkctl; > int pci_exp_off; > pci_exp_off = dm_pci_find_capability(dev, PCI_CAP_ID_EXP); > if (!pci_exp_off) return -ENOENT; > ret = dm_pci_read_config16(dev, pci_exp_off + PCI_EXP_LNKCTL, ); > if (ret) return ret; The driver should work for 0x14e4:0x16F0 and we usually test it with this one. We will use your recommended method if needed. We will try to remove it in v8, since I do not see bp->pf_num being used. Thank you very much, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it.
Re: [PATCH v6 1/2] net: brcm: netXtreme driver
On Fri, Nov 5, 2021 at 2:29 PM Pali Rohár wrote: > > On Friday 05 November 2021 14:19:46 Roman Bacik wrote: > > Hi Pali, > > > > On Fri, Nov 5, 2021 at 2:09 PM Pali Rohár wrote: > > > > > > On Friday 05 November 2021 12:54:24 Roman Bacik wrote: > > > > > > + pci_read_word16(bp->pdev, > > > > > > + PCI_SUBSYSTEM_VENDOR_ID, > > > > > > + >subsystem_vendor); > > > > > > + pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, > > > > > >subsystem_device); > > > > > > + pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg); > > > > > > + pci_read_byte(bp->pdev, PCICFG_ME_REGISTER, >pf_num); > > > > > > > > > > PCICFG_ME_REGISTER looks like an error as there is no such PCI config > > > > > space macro. What you are trying to read into pf_num? Currently I do > > > > > not > > > > > know what "pf" abbreviation could mean. > > > > > > > > PF stands for physical function and pf_num is the number of physical > > > > functions configured. > > > > The macro is defined in bnxt.h: > > > > #define PCICFG_ME_REGISTER 0x98 > > > > > > pci_read_byte() reads from PCI(e) config space, which is standardized. > > > Therefore only standard macro constants from include/pci.h should be > > > used. Standard PCI config header is 64 byte long and after that is > > > linked list of capabilities. Order of capabilities is not defined. > > > Extended capabilities from linked list should be located by macro > > > constants PCI_CAP_ID_*. > > > > > > So above register is part of some extended capability. Correctly it > > > should be used some function to locate starting offset of that extended > > > capability based on PCI_CAP_ID_* (see pci.h file for these functions) > > > and then access that register as offset + PCI_* constant (which defined > > > as relative to the start of extended capability). In case standard macro > > > for this constant in pci.h is missing, it is a good idea to define it, > > > or copy it from linux header file pci_regs.h (to have consistent naming > > > of macros). > > > > > > Could you provide output of 'lspci -nn -vv' from linux for this card? > > > Or 'pci display.b ?.?.? 0 0x1000' dump from U-Boot? > > > This could help me to under what kind of register that 0x98 is. > > > > > > I can write this part of code, no problem, just I need to see layout of > > > config space of that card. > > > > Here it is: > > > > u-boot> pci display.b ?.?.? 0 1000 > > Hello! '?.?.?' is placeholder for bus-device-function PCI address of > card. So should replace it by correct address at which is that card. > (What you have sent is dump of PCIe Root Port, probably from 0.0.0) Oh right, I thought it would print all. Here is Linux output: 0008:00:00.0 PCI bridge [0604]: Broadcom Limited Device [14e4:d750] (prog-if 00 [Normal decode]) Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [48] Power Management version 3 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=1 PME- Capabilities: [ac] Express (v2) Root Port (Slot-), MSI 00 DevCap: MaxPayload 128 bytes, PhantFunc 0 ExtTag- RBE+ DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported- RlxdOrd+ ExtTag- PhantFunc- AuxPwr+ NoSnoop+ MaxPayload 512 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 8GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <1us, L1 <2us ClockPM+ Surprise- LLActRep- BwNot+ ASPMOptComp+ LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 8GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible- RootCap: CRSVisible- RootSta: PME ReqID , PMEStatus- PMEPending- DevCap2: Completion Tim
Re: [PATCH v6 1/2] net: brcm: netXtreme driver
Hi Pali, On Fri, Nov 5, 2021 at 2:09 PM Pali Rohár wrote: > > On Friday 05 November 2021 12:54:24 Roman Bacik wrote: > > > > + pci_read_word16(bp->pdev, > > > > + PCI_SUBSYSTEM_VENDOR_ID, > > > > + >subsystem_vendor); > > > > + pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, > > > >subsystem_device); > > > > + pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg); > > > > + pci_read_byte(bp->pdev, PCICFG_ME_REGISTER, >pf_num); > > > > > > PCICFG_ME_REGISTER looks like an error as there is no such PCI config > > > space macro. What you are trying to read into pf_num? Currently I do not > > > know what "pf" abbreviation could mean. > > > > PF stands for physical function and pf_num is the number of physical > > functions configured. > > The macro is defined in bnxt.h: > > #define PCICFG_ME_REGISTER 0x98 > > pci_read_byte() reads from PCI(e) config space, which is standardized. > Therefore only standard macro constants from include/pci.h should be > used. Standard PCI config header is 64 byte long and after that is > linked list of capabilities. Order of capabilities is not defined. > Extended capabilities from linked list should be located by macro > constants PCI_CAP_ID_*. > > So above register is part of some extended capability. Correctly it > should be used some function to locate starting offset of that extended > capability based on PCI_CAP_ID_* (see pci.h file for these functions) > and then access that register as offset + PCI_* constant (which defined > as relative to the start of extended capability). In case standard macro > for this constant in pci.h is missing, it is a good idea to define it, > or copy it from linux header file pci_regs.h (to have consistent naming > of macros). > > Could you provide output of 'lspci -nn -vv' from linux for this card? > Or 'pci display.b ?.?.? 0 0x1000' dump from U-Boot? > This could help me to under what kind of register that 0x98 is. > > I can write this part of code, no problem, just I need to see layout of > config space of that card. Here it is: u-boot> pci display.b ?.?.? 0 1000 : e4 14 50 d7 06 00 10 00 00 00 04 06 08 00 01 00 0010: 00 00 00 00 00 00 00 00 00 01 01 00 00 00 00 00 0020: 00 10 50 10 01 10 01 00 00 00 00 00 00 00 00 00 0030: 00 00 00 00 48 00 00 00 00 00 00 00 00 00 00 00 0040: 00 00 00 00 00 00 00 00 01 ac 03 c8 08 20 00 00 0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00a0: 00 00 00 00 00 00 00 00 00 00 00 00 10 00 42 00 00b0: 00 80 00 00 10 2c 10 00 03 5d 65 00 00 00 03 11 00c0: 00 00 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00d0: 1f 08 00 00 00 00 00 00 0e 00 00 00 02 00 00 00 00e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0110: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0180: 0b 00 01 24 00 00 80 02 00 00 00 00 00 00 00 00 0190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 01f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0200: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0210: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0220: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0230: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0240: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0250: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0260: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0270: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0280: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0290: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02d0: 00 00
[PATCH v7 2/2] board: brcm-ns3: Load netXtreme firmware
From: Bharat Gooty
Load NetXtreme firmware in board_init when BNXT_ETH is selected.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v4)
Changes in v4:
- remove bnxt commands
- load bnxt firmware in board_init
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
board/broadcom/bcmns3/ns3.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 32acf367842a..88036c16c951 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
if (bl33_info->version != BL33_INFO_VERSION)
printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+ if (chimp_fastboot_optee() != 0)
+ printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
return 0;
}
--
2.17.1
--
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RE: [PATCH v6 1/2] net: brcm: netXtreme driver
Hi Pali, > -Original Message- > From: Pali Rohár > Sent: Wednesday, November 3, 2021 4:14 PM > To: Roman Bacik > Cc: U-Boot Mailing List ; Bharat Gooty > ; Joe Hershberger > ; Ramon Fried > Subject: Re: [PATCH v6 1/2] net: brcm: netXtreme driver > > Hello! See inline comments below. > > On Tuesday 02 November 2021 11:18:10 Roman Bacik wrote: > > From: Bharat Gooty > > > > Broadcom bnxt L2 driver support. Used by the Broadcom > > iproc platforms. > > > > Signed-off-by: Bharat Gooty > > Reviewed-by: Ramon Fried > > > > Signed-off-by: Roman Bacik > > --- > > > > Changes in v6: > > - remove bnxt_eth_* env variables > > - clean up include headers > > > > Changes in v5: > > - remove bnxt_env_set_ethaddr/bnxt_env_del_ethaddr methods > > - add .read_rom_hwaddr = bnxt_read_rom_hwaddr > > - move bnxt_bring_pci/bnxt_bring_chip to bnxt_read_rom_hwddr > > - move mac copy from priv to plat to bnxt_read_rom_hwaddr > > > > Changes in v4: > > - remove static num_cards and use dev_seq(dev) instead > > - add .probe > > - merged probe/remove methods > > - select PCI_INIT_R when BNXT_ETH is selected > > > > Changes in v3: > > - change printf to debug in display_banner > > - remove get/set/print mac/speed > > - remove bnxt_hwrm_set_nvmem > > > > Changes in v2: > > - rebase and remove DM_PCI dependency from BNXT_ETH > > - remove tautology assignment from debug_resp() > > > > drivers/net/Kconfig |1 + > > drivers/net/Makefile|1 + > > drivers/net/bnxt/Kconfig|7 + > > drivers/net/bnxt/Makefile |5 + > > drivers/net/bnxt/bnxt.c | 1727 > +++ > > drivers/net/bnxt/bnxt_dbg.h | 537 +++ > > drivers/net/bnxt/pci_ids.h | 17 + > > include/broadcom/bnxt.h | 395 > > include/broadcom/bnxt_hsi.h | 889 ++ > > include/broadcom/bnxt_ver.h | 22 + > > These 3 include files looks like that contain only private definitions > for bnxt driver. So should not they be in the drivers/net/bnxt directory? We will move these files to drivers/net/bnxt/. > > > 10 files changed, 3601 insertions(+) > > create mode 100644 drivers/net/bnxt/Kconfig > > create mode 100644 drivers/net/bnxt/Makefile > > create mode 100644 drivers/net/bnxt/bnxt.c > > create mode 100644 drivers/net/bnxt/bnxt_dbg.h > > create mode 100644 drivers/net/bnxt/pci_ids.h > > create mode 100644 include/broadcom/bnxt.h > > create mode 100644 include/broadcom/bnxt_hsi.h > > create mode 100644 include/broadcom/bnxt_ver.h > > > > diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig > > index 6c12959f3794..8dc81a3d6cf9 100644 > > --- a/drivers/net/Kconfig > > +++ b/drivers/net/Kconfig > > @@ -1,6 +1,7 @@ > > source "drivers/net/phy/Kconfig" > > source "drivers/net/pfe_eth/Kconfig" > > source "drivers/net/fsl-mc/Kconfig" > > +source "drivers/net/bnxt/Kconfig" > > > > config ETH > > def_bool y > > diff --git a/drivers/net/Makefile b/drivers/net/Makefile > > index e4078d15a99f..1d9fbd6693cc 100644 > > --- a/drivers/net/Makefile > > +++ b/drivers/net/Makefile > > @@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o > > obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o > > obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o > > obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o > > +obj-$(CONFIG_BNXT_ETH) += bnxt/ > > diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig > > new file mode 100644 > > index ..412ecd430335 > > --- /dev/null > > +++ b/drivers/net/bnxt/Kconfig > > @@ -0,0 +1,7 @@ > > +config BNXT_ETH > > + bool "BNXT PCI support" > > + depends on DM_ETH > > + select PCI_INIT_R > > + help > > + This driver implements support for bnxt pci controller > > + driver of ethernet class. > > diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile > > new file mode 100644 > > index ..a9d6ce00d5e0 > > --- /dev/null > > +++ b/drivers/net/bnxt/Makefile > > @@ -0,0 +1,5 @@ > > +# SPDX-License-Identifier: GPL-2.0+ > > +# Copyright 2019-2021 Broadcom. > > + > > +# Broadcom nxe Ethernet driver > > +obj-y += bnxt.o > > diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c > > new file mode 100644 > > index ..60a65b20a8f1 > > --- /dev/null > &
[PATCH v6 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v6:
- remove bnxt_eth_* env variables
- clean up include headers
Changes in v5:
- remove bnxt_env_set_ethaddr/bnxt_env_del_ethaddr methods
- add .read_rom_hwaddr = bnxt_read_rom_hwaddr
- move bnxt_bring_pci/bnxt_bring_chip to bnxt_read_rom_hwddr
- move mac copy from priv to plat to bnxt_read_rom_hwaddr
Changes in v4:
- remove static num_cards and use dev_seq(dev) instead
- add .probe
- merged probe/remove methods
- select PCI_INIT_R when BNXT_ETH is selected
Changes in v3:
- change printf to debug in display_banner
- remove get/set/print mac/speed
- remove bnxt_hwrm_set_nvmem
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|7 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 1727 +++
drivers/net/bnxt/bnxt_dbg.h | 537 +++
drivers/net/bnxt/pci_ids.h | 17 +
include/broadcom/bnxt.h | 395
include/broadcom/bnxt_hsi.h | 889 ++
include/broadcom/bnxt_ver.h | 22 +
10 files changed, 3601 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/pci_ids.h
create mode 100644 include/broadcom/bnxt.h
create mode 100644 include/broadcom/bnxt_hsi.h
create mode 100644 include/broadcom/bnxt_ver.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..412ecd430335
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,7 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ select PCI_INIT_R
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..60a65b20a8f1
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,1727 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt_dbg.h"
+#include "pci_ids.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+static const char banner[] = DRV_MODULE_DESC " v" UBOOT_MODULE_VER ",";
+static const char fw_ver[] = " FW v";
+
+static void display_banner(struct bnxt *bp)
+{
+ int i;
+
+ debug(banner);
+ debug(fw_ver);
+ debug("%d.%d.", bp->fw_maj, bp->fw_min);
+ debug("%d.%d\n", bp->fw_bld, bp->fw_rsvd);
+ debug("ETH MAC: ");
+ for (i = 0; i < ETH_ALEN; i++) {
+ debug("%02x", bp->mac_set[i]);
+ if (i != (ETH_ALEN - 1))
+ debug(":");
+ }
+
+ debug(", Port(%d), PF(%d)\n", bp->port_idx, bp->ordinal_value);
+}
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ pci_read_word16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ pci_read_word16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ pci_read_word16(bp->pdev,
+ PCI_SUBSYSTEM_VENDOR_ID,
+ >subsystem_vendor);
+ pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ pci_read_word16(bp->
[PATCH v6 2/2] board: brcm-ns3: Load netXtreme firmware
From: Bharat Gooty
Load NetXtreme firmware in board_init when BNXT_ETH is selected.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v4)
Changes in v4:
- remove bnxt commands
- load bnxt firmware in board_init
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
board/broadcom/bcmns3/ns3.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 758a358f5425..cc27dfccc57b 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
if (bl33_info->version != BL33_INFO_VERSION)
printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+ if (chimp_fastboot_optee() != 0)
+ printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
return 0;
}
--
2.17.1
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RE: [PATCH v5 1/2] net: brcm: netXtreme driver
Hi Marek,
> -Original Message-
> From: Marek Behún
> Sent: Tuesday, November 2, 2021 5:07 AM
> To: Roman Bacik
> Cc: U-Boot Mailing List ; Bharat Gooty
> ; Joe Hershberger
> ; Ramon Fried
> Subject: Re: [PATCH v5 1/2] net: brcm: netXtreme driver
>
> On Mon, 1 Nov 2021 13:21:44 -0700
> Roman Bacik wrote:
>
> > +static int set_phy_speed(struct bnxt *bp)
> > +{
> > + char name[20];
> > + char name1[30];
> > + u16 flag = PHY_STATUS | PHY_SPEED | DETECT_MEDIA;
> > +
> > + /* Query Link Status */
> > + if (bnxt_hwrm_port_phy_qcfg(bp, flag) != STATUS_SUCCESS)
> > + return STATUS_FAILURE;
> > +
> > + switch (bp->current_link_speed) {
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_100GB:
> > + sprintf(name, "%s %s", str_100, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_50GB:
> > + sprintf(name, "%s %s", str_50, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_40GB:
> > + sprintf(name, "%s %s", str_40, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_25GB:
> > + sprintf(name, "%s %s", str_25, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_20GB:
> > + sprintf(name, "%s %s", str_20, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_10GB:
> > + sprintf(name, "%s %s", str_10, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_2_5GB:
> > + sprintf(name, "%s %s", str_2_5, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_2GB:
> > + sprintf(name, "%s %s", str_2, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_1GB:
> > + sprintf(name, "%s %s", str_1, str_gbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_100MB:
> > + sprintf(name, "%s %s", str_100, str_mbps);
> > + break;
> > + case PORT_PHY_QCFG_RESP_LINK_SPEED_10MB:
> > + sprintf(name, "%s %s", str_10, str_mbps);
> > + break;
> > + default:
> > + sprintf(name, "%s %x", str_unknown, bp-
> >current_link_speed);
> > + }
> > +
> > + sprintf(name1, "bnxt_eth%u_phy_speed", bp->cardnum);
> > + env_set(name1, name);
> > + dbg_phy_speed(bp, name);
> > +
> > + return STATUS_SUCCESS;
> > +}
> > +
> > +static int set_phy_link(struct bnxt *bp, u32 tmo)
> > +{
> > + char name[32];
> > + int ret;
> > +
> > + set_phy_speed(bp);
> > + dbg_link_status(bp);
> > + if (bp->link_status == STATUS_LINK_ACTIVE) {
> > + dbg_link_state(bp, tmo);
> > + sprintf(name, "bnxt_eth%u_link", bp->cardnum);
> > + env_set(name, "up");
> > + sprintf(name, "bnxt_eth%u_media", bp->cardnum);
> > + env_set(name, "connected");
> > + ret = STATUS_SUCCESS;
> > + } else {
> > + sprintf(name, "bnxt_eth%u_link", bp->cardnum);
> > + env_set(name, "down");
> > + sprintf(name, "bnxt_eth%u_media", bp->cardnum);
> > + env_set(name, "disconnected");
> > + ret = STATUS_FAILURE;
> > + }
> > +
> > + return ret;
> > +}
>
> Hi Roman,
>
> your proposal still contains non-standard and unneeded setting of
> environment variables. An ethernet driver should never do this. In fact
> no driver besides board code or sysinfo driver should do this directly.
>
> There are other mechanisms for reporting PHY connection information in
> U-Boot, please use those if you need them (e.g. implement a PHY
> driver), but remove all env_set() calls from your ethernet driver.
>
> Rationale: historically, many times things were solved with ad-hoc code
> in U-Boot, which did this kind of thing and similar. It got out of hand
> pretty fast, and it was horrible. So some people dedided to fix it,
> proposing APIs, unifying code, deduplicating code and so on. This is
> still, in fact, going on. For your driver to have it's own mechanism
> for reporting link status, by setting env variables, is going against
> this whole work.
>
> I suggest for now just to remove these calls. When the driver is
> merged, we can
RE: [PATCH v4] driver: spi: add bcm iproc qspi support.
Hi Jagan,
> -Original Message-
> From: Jagan Teki
> Sent: Monday, November 1, 2021 10:07 PM
> To: Roman Bacik
> Cc: U-Boot Mailing List ; Rayagonda Kokatanur
> ; Bharat Gooty
> ; Vignesh R
> Subject: Re: [PATCH v4] driver: spi: add bcm iproc qspi support.
>
> On Tue, Nov 2, 2021 at 4:57 AM Roman Bacik
> wrote:
> >
> > Hi Jagan,
> >
> > On Mon, Nov 1, 2021 at 12:12 AM Jagan Teki
> wrote:
> > >
> > > On Tue, Oct 26, 2021 at 1:07 AM Roman Bacik
> wrote:
> > > >
> > > > From: Rayagonda Kokatanur
> > > >
> > > > IPROC qspi driver supports both BSPI and MSPI modes.
> > > >
> > > > Signed-off-by: Rayagonda Kokatanur
>
> > > > Signed-off-by: Bharat Gooty
> > > > Acked-by: Rayagonda Kokatanur
>
> > > >
> > > > Signed-off-by: Roman Bacik
> > > > ---
> > > >
> > > > Changes in v4:
> > > > - move iproc_qspi.c from spi to mtd/spi
> > > > - remove iproc_qspi.h
> > > > - rename IPROC_QSPI to SPI_FLASH_IPROC
> > > >
> > > > Changes in v3:
> > > > - fix warning by including linux/delay.h
> > > > - change ofdata_to_platdata to of_to_plat
> > > > - change priv_auto_alloc_size to priv_auto
> > > >
> > > > Changes in v2:
> > > > - remove include spi-nor.h
> > > > - define and use named BITs for writing register values
> > > > - remove bspi_set_4byte_mode() method
> > > >
> > > > drivers/mtd/spi/Kconfig | 6 +
> > > > drivers/mtd/spi/Makefile | 1 +
> > > > drivers/mtd/spi/iproc_qspi.c | 718
> +++
> > > > 3 files changed, 725 insertions(+)
> > > > create mode 100644 drivers/mtd/spi/iproc_qspi.c
> > >
> > > Look like you confused what I've mentioned before, your driver is
> > > flash specific so add a driver in UCLASS_SPI_FLASH. drivers with
> > > UCLASS_SPI to be in drivers/spi/
> > >
> > > Jagan.
> >
> > This is a controller driver and it is currently meant to be used as
> > follows:
> >
> > qspi: spi@37 {
> > compatible = "brcm,iproc-qspi";
> > reg = <0x0037 0x100>,
> > <0x00370100 0x100>,
> > <0x00370200 0x200>;
> > reg-names = "bspi", "bspi_raf", "mspi";
> > flash-iomap-addr = /bits/ 64 <0x7000>;
> > #address-cells = <1>;
> > #size-cells = <0>;
> > spi_nor_flash: spi_flash@0 {
> > compatible = "jedec,spi-nor";
> > reg = <0>;
> > spi-max-frequency = <1250>;
> > spi-cpol;
> > spi-cpha;
> > spi-tx-bus-width = <1>;
> > spi-rx-bus-width = <4>;
> > };
> > };
>
> Does this binding is from Linux? if yes please share Linux driver.
>
> Jagan.
Here is Linux binding document:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml
And here is Linux driver:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/spi/spi-bcm-qspi.c
Thanks,
Roman
--
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Re: [PATCH v4] driver: spi: add bcm iproc qspi support.
Hi Jagan,
On Mon, Nov 1, 2021 at 12:12 AM Jagan Teki wrote:
>
> On Tue, Oct 26, 2021 at 1:07 AM Roman Bacik wrote:
> >
> > From: Rayagonda Kokatanur
> >
> > IPROC qspi driver supports both BSPI and MSPI modes.
> >
> > Signed-off-by: Rayagonda Kokatanur
> > Signed-off-by: Bharat Gooty
> > Acked-by: Rayagonda Kokatanur
> >
> > Signed-off-by: Roman Bacik
> > ---
> >
> > Changes in v4:
> > - move iproc_qspi.c from spi to mtd/spi
> > - remove iproc_qspi.h
> > - rename IPROC_QSPI to SPI_FLASH_IPROC
> >
> > Changes in v3:
> > - fix warning by including linux/delay.h
> > - change ofdata_to_platdata to of_to_plat
> > - change priv_auto_alloc_size to priv_auto
> >
> > Changes in v2:
> > - remove include spi-nor.h
> > - define and use named BITs for writing register values
> > - remove bspi_set_4byte_mode() method
> >
> > drivers/mtd/spi/Kconfig | 6 +
> > drivers/mtd/spi/Makefile | 1 +
> > drivers/mtd/spi/iproc_qspi.c | 718 +++
> > 3 files changed, 725 insertions(+)
> > create mode 100644 drivers/mtd/spi/iproc_qspi.c
>
> Look like you confused what I've mentioned before, your driver is
> flash specific so add a driver in UCLASS_SPI_FLASH. drivers with
> UCLASS_SPI to be in drivers/spi/
>
> Jagan.
This is a controller driver and it is currently meant to be used as follows:
qspi: spi@37 {
compatible = "brcm,iproc-qspi";
reg = <0x0037 0x100>,
<0x00370100 0x100>,
<0x00370200 0x200>;
reg-names = "bspi", "bspi_raf", "mspi";
flash-iomap-addr = /bits/ 64 <0x7000>;
#address-cells = <1>;
#size-cells = <0>;
spi_nor_flash: spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <1250>;
spi-cpol;
spi-cpha;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
};
};
Can you please provide more details or point us to an example we can
use as a reference when asking us to switch from UCLASS_SPI to
UCLASS_SPI_FLASH? What will the new device tree look like? Do we need
to add read/write/erase methods (likely around our existing xfer
method), which are currently not needed or is there a way around it by
reusing existing code base?
Thanks,
Roman
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[PATCH v5 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v5:
- remove bnxt_env_set_ethaddr/bnxt_env_del_ethaddr methods
- add .read_rom_hwaddr = bnxt_read_rom_hwaddr
- move bnxt_bring_pci/bnxt_bring_chip to bnxt_read_rom_hwddr
- move mac copy from priv to plat to bnxt_read_rom_hwaddr
Changes in v4:
- remove static num_cards and use dev_seq(dev) instead
- add .probe
- merged probe/remove methods
- select PCI_INIT_R when BNXT_ETH is selected
Changes in v3:
- change printf to debug in display_banner
- remove get/set/print mac/speed
- remove bnxt_hwrm_set_nvmem
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|7 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 1748 +++
drivers/net/bnxt/bnxt_dbg.h | 537 +++
drivers/net/bnxt/pci_ids.h | 17 +
include/broadcom/bnxt.h | 395
include/broadcom/bnxt_hsi.h | 889 ++
include/broadcom/bnxt_ver.h | 22 +
10 files changed, 3622 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/pci_ids.h
create mode 100644 include/broadcom/bnxt.h
create mode 100644 include/broadcom/bnxt_hsi.h
create mode 100644 include/broadcom/bnxt_ver.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..412ecd430335
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,7 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ select PCI_INIT_R
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..fe0f0833cd99
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,1748 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt_dbg.h"
+#include "pci_ids.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+static const char banner[] = DRV_MODULE_DESC " v" UBOOT_MODULE_VER ",";
+static const char fw_ver[] = " FW v";
+
+static void display_banner(struct bnxt *bp)
+{
+ int i;
+
+ debug(banner);
+ debug(fw_ver);
+ debug("%d.%d.", bp->fw_maj, bp->fw_min);
+ debug("%d.%d\n", bp->fw_bld, bp->fw_rsvd);
+ debug("ETH MAC: ");
+ for (i = 0; i < ETH_ALEN; i++) {
+ debug("%02x", bp->mac_set[i]);
+ if (i != (ETH_ALEN - 1))
+ debug(":");
+ }
+
+ debug(", Port(%d), PF(%d)\n", bp->port_idx, bp->ordinal_value);
+}
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ pci_read_word16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ pci_read_word16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ pci_read_word16(bp->pdev,
+ PCI_SUBSYSTEM_VENDOR_ID,
+ >subsystem_vendor);
+ pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ pci_read_word16(bp->
[PATCH v5 2/2] board: brcm-ns3: Load netXtreme firmware
From: Bharat Gooty
Load NetXtreme firmware in board_init when BNXT_ETH is selected.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v4)
Changes in v4:
- remove bnxt commands
- load bnxt firmware in board_init
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
board/broadcom/bcmns3/ns3.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 758a358f5425..cc27dfccc57b 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
if (bl33_info->version != BL33_INFO_VERSION)
printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+ if (chimp_fastboot_optee() != 0)
+ printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
return 0;
}
--
2.17.1
--
This electronic communication and the information and any files transmitted
with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
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this e-mail is strictly prohibited. If you received this e-mail in error,
please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
smime.p7s
Description: S/MIME Cryptographic Signature
RE: [PATCH v4 1/2] net: brcm: netXtreme driver
Hi Marek, > -Original Message- > From: Marek Behún > Sent: Sunday, October 31, 2021 3:56 AM > To: Roman Bacik > Cc: U-Boot Mailing List ; Bharat Gooty > ; Joe Hershberger > ; Ramon Fried ; > p...@kernel.org > Subject: Re: [PATCH v4 1/2] net: brcm: netXtreme driver > > On Sat, 30 Oct 2021 08:48:05 -0700 > Roman Bacik wrote: > > > The mac address can be read from bp only after bnxt_bring_chip is > > called, which is after read_rom_hwaddr is called. Theoretically we can > > call bnxt_bring_chip in bind or in read_rom_hwaddr and then one can > > use this method if desired. > > How long does bnxt_bring_chip() take? In milliseconds? If it isn't > extremely long, I think it could be called from read_rom_hwaddr... > > >> eth_env_set_enetaddr_by_index() > > > We can change and use this method. > > Pls do, and drop the env deletion. > > Marek We will make requested changes in v5. Thank you very much for your review, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
Re: [PATCH v4 1/2] net: brcm: netXtreme driver
Hi Marek,
On Sat, Oct 30, 2021 at 8:00 AM Marek Behún wrote:
>
> Hello Roman,
>
> On Thu, 28 Oct 2021 16:29:28 -0700
> Roman Bacik wrote:
>
> > +void bnxt_env_set_ethaddr(struct udevice *dev)
> > +{
> > + struct eth_pdata *plat = dev_get_plat(dev);
> > + char cmd[100];
> > + char var[32];
> > + u8 mac_env[ARP_HLEN];
> > +
> > + eth_env_get_enetaddr_by_index("eth", dev_seq(dev), mac_env);
> > + if (!memcmp(plat->enetaddr, mac_env, ARP_HLEN))
> > + return;
> > +
> > + sprintf(var, dev_seq(dev) ? "%s%daddr" : "%saddr", "eth",
> > dev_seq(dev));
> > + sprintf(cmd, "%s %s %pM", "env set -f", var, plat->enetaddr);
> > + run_command(cmd, CMD_FLAG_ENV);
> > +}
> > +
> > +void bnxt_env_del_ethaddr(struct udevice *dev)
> > +{
> > + struct eth_pdata *plat = dev_get_plat(dev);
> > + char cmd[100];
> > + char var[32];
> > +
> > + sprintf(var, dev_seq(dev) ? "%s%daddr" : "%saddr", "eth",
> > dev_seq(dev));
> > + sprintf(cmd, "%s %s %pM", "env delete -f", var, plat->enetaddr);
> > + run_command(cmd, CMD_FLAG_ENV);
> > +}
>
> And then in bnxt_eth_probe():
> > + eth_env_get_enetaddr_by_index("eth", dev_seq(dev), bp->mac_set);
> ...
> > + memcpy(plat->enetaddr, bp->mac_set, ETH_ALEN);
> > + bnxt_env_set_ethaddr(dev);
>
> So if I understand this correctly, in bnxt_eth_probe(), you read env
> variable ethNaddr into bp->mac_set. Then bnxt_bring_chip() is called,
> which calls various functions, including bnxt_hwrm_func_qcaps_req(),
> which may overwrite bp->mac_set. Then bp->mac_set is copied into
> plat->enetaddr.
>
> Then bnxt_env_set_ethaddr() is called, which reads the env variable
> ethNaddr again, and compares it with value in plat->enetaddr, and if
> they are different, it overwrites the value in ethNaddr with
> plat->enetaddr.
>
> I have this to say:
> - could you please explain why this is done so? I mean the logic behind
> this...
We read env to bp->mac_set in case hw does not have eth addr so it can
use the random value from uboot. The bnxt_bring_chip will read mac
programmed to hw nvram and set it into bp if available. The adress in hw and
address in plat must be the same in the end.
> - it seems to me that you haven't read the documentation for struct
> env_ops in include/net.h: there are methods read_rom_hwaddr() and
> write_hwaddr(), which you could use, instead of implementing this
The mac address can be read from bp only after bnxt_bring_chip is
called, which is after read_rom_hwaddr is called. Theoretically we can
call bnxt_bring_chip in bind or in read_rom_hwaddr and then one can
use this method if desired.
> whole mechanism ad-hoc. You should use those or explain your reasons
> why you aren't doing this
> - why do you need the plat structure? Why not use bp->mac_set directly,
> without plat->enetaddr?
> - the way you set and delete ethNaddr variable, by running U-Boot
> commands, is very weird, when there is a direct function for setting
> the value:
> eth_env_set_enetaddr_by_index()
We can change and use this method.
> As for deleting:
> - why do you need it in the first place? I mean you are removing the
> variable upon driver removal. No other ethernet driver does that...
> - instead of assembling the "env delete" command it would make far
> more sense to include patch that adds env_del() function into
> env/common.c
You are right, we can remove deleting. It is there because our earlier
logic depended on it.
>
> I have another question: does this driver support adapters with SFP
> cages only, or also those with RJ-45 ports?
Boards we have use SFP ports only. But theoretically one can use 10G
traffic with RJ45. Lower than 10G speeds like 1G traffic are not
supported by HW.
>
> Thank you.
>
> Marek
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[PATCH v4 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v4:
- remove static num_cards and use dev_seq(dev) instead
- add .probe
- merged probe/remove methods
- select PCI_INIT_R when BNXT_ETH is selected
Changes in v3:
- change printf to debug in display_banner
- remove get/set/print mac/speed
- remove bnxt_hwrm_set_nvmem
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|7 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 1775 +++
drivers/net/bnxt/bnxt_dbg.h | 537 +++
drivers/net/bnxt/pci_ids.h | 17 +
include/broadcom/bnxt.h | 395
include/broadcom/bnxt_hsi.h | 889 ++
include/broadcom/bnxt_ver.h | 22 +
10 files changed, 3649 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/pci_ids.h
create mode 100644 include/broadcom/bnxt.h
create mode 100644 include/broadcom/bnxt_hsi.h
create mode 100644 include/broadcom/bnxt_ver.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..412ecd430335
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,7 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ select PCI_INIT_R
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..8f5a3574cad1
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,1775 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt_dbg.h"
+#include "pci_ids.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+static const char banner[] = DRV_MODULE_DESC " v" UBOOT_MODULE_VER ",";
+static const char fw_ver[] = " FW v";
+
+static void display_banner(struct bnxt *bp)
+{
+ int i;
+
+ debug(banner);
+ debug(fw_ver);
+ debug("%d.%d.", bp->fw_maj, bp->fw_min);
+ debug("%d.%d\n", bp->fw_bld, bp->fw_rsvd);
+ debug("ETH MAC: ");
+ for (i = 0; i < ETH_ALEN; i++) {
+ debug("%02x", bp->mac_set[i]);
+ if (i != (ETH_ALEN - 1))
+ debug(":");
+ }
+
+ debug(", Port(%d), PF(%d)\n", bp->port_idx, bp->ordinal_value);
+}
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ pci_read_word16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ pci_read_word16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ pci_read_word16(bp->pdev,
+ PCI_SUBSYSTEM_VENDOR_ID,
+ >subsystem_vendor);
+ pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg);
+ pci_read_byte(bp->pdev, PCICFG_ME_REGISTER, >pf_num);
+ pci_read_byte(bp->pdev, PCI_INTERRUPT_LINE, >irq);
+ bp->bar0 = pci_map_bar(bp->pdev, PCI_BASE_AD
[PATCH v4 2/2] board: brcm-ns3: Load netXtreme firmware
From: Bharat Gooty
Load NetXtreme firmware in board_init when BNXT_ETH is selected.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
Changes in v4:
- remove bnxt command
- load bnxt firmware in board_init
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
board/broadcom/bcmns3/ns3.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 758a358f5425..cc27dfccc57b 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -150,7 +150,10 @@ int board_init(void)
if (bl33_info->version != BL33_INFO_VERSION)
printf("*** warning: ATF BL31 and U-Boot not in sync! ***\n");
-
+#if CONFIG_IS_ENABLED(BNXT_ETH)
+ if (chimp_fastboot_optee() != 0)
+ printf("*** warning: secure chimp fastboot failed! ***\n");
+#endif
return 0;
}
--
2.17.1
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smime.p7s
Description: S/MIME Cryptographic Signature
RE: [PATCH v3 2/2] cmd: brcm: netXtreme commands
Hi Marek, > -Original Message- > From: Marek Behún > Sent: Wednesday, October 27, 2021 10:40 AM > To: Roman Bacik > Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Bharat Gooty ; > Aswath Govindraju ; Bin Meng > ; Franck LENORMAND > ; Heinrich Schuchardt > ; Kory Maincent ; > Michal Simek ; Patrick Delaunay > ; Peng Fan ; Priyanka > Jain ; Rayagonda Kokatanur > ; Sean Anderson > > Subject: Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > On Wed, 27 Oct 2021 10:02:41 -0700 > Roman Bacik wrote: > > > Marek, Simon, > > > > Thank you very much for your comments. We will remove bnxt commands > and will > > probe bnxt driver each boot in the next version. > > Thanks, > > Roman > > I think that the idea of not loading fw or initializing the controller > during every boot, but only when needed, is quite reasonable. > > But it has to be done without the need to call custom commands, which > the user may not know about. > > It has to be done in such a way that if the user calls for example the > dhcp > command, it will work. > > I think this could be achieved by creating a new DM driver flag, and > wiring the DM and/or PCI code so that when this flag is set, the PCI > subsystem won't probe the driver, only bind the driver. Thank you very much for your suggestion. To simplify, we will decouple this issue from the current bnxt driver submission. > > That way U-Boot will know that there is another ethernet controller > which can be used by network commands when the `ethact` variable is set > to point to that controller. > > Marek Thanks, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
RE: [PATCH v3 2/2] cmd: brcm: netXtreme commands
Marek, Simon, Thank you very much for your comments. We will remove bnxt commands and will probe bnxt driver each boot in the next version. Thanks, Roman > -Original Message- > From: Roman Bacik > Sent: Wednesday, October 27, 2021 9:47 AM > To: Marek Behún > Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Bharat Gooty ; > Aswath Govindraju ; Bin Meng > ; Franck LENORMAND > ; Heinrich Schuchardt > ; Kory Maincent ; > Michal Simek ; Patrick Delaunay > ; Peng Fan ; Priyanka > Jain ; Rayagonda Kokatanur > ; Sean Anderson > > Subject: RE: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > Hi Marek > > > -Original Message- > > From: Marek Behún > > Sent: Wednesday, October 27, 2021 9:36 AM > > To: Roman Bacik > > Cc: Simon Glass ; U-Boot Mailing List > b...@lists.denx.de>; Bharat Gooty ; > > Aswath Govindraju ; Bin Meng > > ; Franck LENORMAND > > ; Heinrich Schuchardt > > ; Kory Maincent ; > > Michal Simek ; Patrick Delaunay > > ; Peng Fan ; > Priyanka > > Jain ; Rayagonda Kokatanur > > ; Sean Anderson > > > > Subject: Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > > > On Wed, 27 Oct 2021 08:05:11 -0700 > > Roman Bacik wrote: > > > > > chimp_ld_secure #this command loads FW, which is necessary for PCIe to > > > enumerate it > > > pci enum #this command is necessary to call bnxt_bind > > > > Wait, so what is this firmware for? Is it firmware for the netXtreme > > controller or for PCIe controller itself? > > It is FW for netXtreme controller. > > > > > If it is for the ethernet controller, you should be able to determine > > whether there is netXtreme card present on the PCI bus without loading > > the firmware, by looking at PCI vendor / device ID. > > The current code fails to enumerate PCI if FW is not loaded. Loading FW > and trying to enumerate again still fails. Only reset helps after that. > > > > > In that case the firmware should be loaded when the ethernet controller > > is requested for, i.e. the ethact env variable points to that > > controller and a network command is executed (dhcp, tftpboot, ...). > > > > (The ethact variable is used to set which ethernet controller is used > > for network commands when there are multiple etherent controllers.) > > Thanks, > > Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
RE: [PATCH v3 2/2] cmd: brcm: netXtreme commands
Hi Marek > -Original Message- > From: Marek Behún > Sent: Wednesday, October 27, 2021 9:36 AM > To: Roman Bacik > Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Bharat Gooty ; > Aswath Govindraju ; Bin Meng > ; Franck LENORMAND > ; Heinrich Schuchardt > ; Kory Maincent ; > Michal Simek ; Patrick Delaunay > ; Peng Fan ; Priyanka > Jain ; Rayagonda Kokatanur > ; Sean Anderson > > Subject: Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > On Wed, 27 Oct 2021 08:05:11 -0700 > Roman Bacik wrote: > > > chimp_ld_secure #this command loads FW, which is necessary for PCIe to > > enumerate it > > pci enum #this command is necessary to call bnxt_bind > > Wait, so what is this firmware for? Is it firmware for the netXtreme > controller or for PCIe controller itself? It is FW for netXtreme controller. > > If it is for the ethernet controller, you should be able to determine > whether there is netXtreme card present on the PCI bus without loading > the firmware, by looking at PCI vendor / device ID. The current code fails to enumerate PCI if FW is not loaded. Loading FW and trying to enumerate again still fails. Only reset helps after that. > > In that case the firmware should be loaded when the ethernet controller > is requested for, i.e. the ethact env variable points to that > controller and a network command is executed (dhcp, tftpboot, ...). > > (The ethact variable is used to set which ethernet controller is used > for network commands when there are multiple etherent controllers.) Thanks, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
RE: [PATCH v3 2/2] cmd: brcm: netXtreme commands
Hi Simon, > -Original Message- > From: Simon Glass > Sent: Wednesday, October 27, 2021 8:41 AM > To: Roman Bacik > Cc: Marek Behún ; U-Boot Mailing List b...@lists.denx.de>; Bharat Gooty ; > Aswath Govindraju ; Bin Meng > ; Franck LENORMAND > ; Heinrich Schuchardt > ; Kory Maincent ; > Michal Simek ; Patrick Delaunay > ; Peng Fan ; Priyanka > Jain ; Rayagonda Kokatanur > ; Sean Anderson > > Subject: Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > Hi Roman, > > On Wed, 27 Oct 2021 at 09:05, Roman Bacik > wrote: > > > > > -Original Message- > > > From: Marek Behún > > > Sent: Tuesday, October 26, 2021 9:50 AM > > > To: Roman Bacik > > > Cc: Simon Glass ; U-Boot Mailing List > > b...@lists.denx.de>; Bharat Gooty ; > > > Aswath Govindraju ; Bin Meng > > > ; Franck LENORMAND > > > ; Heinrich Schuchardt > > > ; Kory Maincent ; > > > Michal Simek ; Patrick Delaunay > > > ; Peng Fan ; > Priyanka > > > Jain ; Rayagonda Kokatanur > > > ; Sean Anderson > > > > > > Subject: Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > > > > > On Tue, 26 Oct 2021 09:02:54 -0700 > > > Roman Bacik wrote: > > > > > > > On Tue, Oct 26, 2021 at 8:55 AM Marek Behún > wrote: > > > > > > > > > > On Tue, 26 Oct 2021 08:14:28 -0700 > > > > > Roman Bacik wrote: > > > > > > > > > > > Hi Marek, > > > > > > > > > > > > We do not want this driver to be automatically probed. It is not > > > > > > needed > > > > > > all the time and also slows down the boot time. We have stripped > > > > > > down > > > > > > everything else to bare minimum. > > > > > > Thanks, > > > > > > > > > > > > Roman > > > > > > > > > > Hi Roman, > > > > > > > > > > OK, that is reasonable, but not reasonable enough to introduce a > > > > > new > > > > > vendor specific command. > > > > > > > > > > Still NAK. > > > > > > > > > > So you have the bnxt_drv_probe method defined in the driver, but > you > > > > > don't set a pointer to it into the U_BOOT_DRIVER structure, and > > > > > instead > > > > > you call this method when "brcm probe" command is called. > > > > > > > > > > I think this introduction of another vendor specific command is > > > > > wrong. > > > > > > > > > > If probing takes too much time and should be done only when the > device > > > > > is needed, there are 2 things you could do: > > > > > > > > > > - you can create new driver flag saying that the device should be > > > > > probeb only when needed, wire necessary code and add this flag > > > > > to > > > your > > > > > driver (this could get very complicated, though) > > > > > - you can do minimum stuff in probe method, and move the stuff > > > > > that > > > > > takes long time into bnxt_start(), which is called only when > > > > > network > > > > > via this ethernet controller is requested for by U-Boot > > > > > commands. > > > > > > > > So renaming bnxt probe/remove to bnxt start/stop will do, right? > > > > > > No. The whole idea of adding the new "bnxt" command is wrong, > because > > > the command is *vendor specific*. The ethernet controller should work > > > out of the box with standard U-Boot commands, i.e. it if I use the > > > dhcp > > > command, it should work, without needing to call the "bnxt" command. > > > > Hi Marek, > > > > In order to speed up the boot, we do not load bnxt driver on each boot. > Also > > we do not need to load FW and initialize PCI required to bind bnxt. When > > bnxt is required, then we execute these commands: > > > > chimp_ld_secure #this command loads FW, which is necessary for PCIe to > > enumerate it > > pci enum #this command is necessary to call bnxt_bind > > bnxt 0 probe #this command would probe/load the driver > > > > Do you have a suggestion on how to make this work without introducing > bnxt > > commands if we do not want to enumerate PCIe, load FW and l
RE: [PATCH v3 2/2] cmd: brcm: netXtreme commands
> -Original Message- > From: Marek Behún > Sent: Tuesday, October 26, 2021 9:50 AM > To: Roman Bacik > Cc: Simon Glass ; U-Boot Mailing List b...@lists.denx.de>; Bharat Gooty ; > Aswath Govindraju ; Bin Meng > ; Franck LENORMAND > ; Heinrich Schuchardt > ; Kory Maincent ; > Michal Simek ; Patrick Delaunay > ; Peng Fan ; Priyanka > Jain ; Rayagonda Kokatanur > ; Sean Anderson > > Subject: Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > On Tue, 26 Oct 2021 09:02:54 -0700 > Roman Bacik wrote: > > > On Tue, Oct 26, 2021 at 8:55 AM Marek Behún wrote: > > > > > > On Tue, 26 Oct 2021 08:14:28 -0700 > > > Roman Bacik wrote: > > > > > > > Hi Marek, > > > > > > > > We do not want this driver to be automatically probed. It is not > > > > needed > > > > all the time and also slows down the boot time. We have stripped > > > > down > > > > everything else to bare minimum. > > > > Thanks, > > > > > > > > Roman > > > > > > Hi Roman, > > > > > > OK, that is reasonable, but not reasonable enough to introduce a new > > > vendor specific command. > > > > > > Still NAK. > > > > > > So you have the bnxt_drv_probe method defined in the driver, but you > > > don't set a pointer to it into the U_BOOT_DRIVER structure, and > > > instead > > > you call this method when "brcm probe" command is called. > > > > > > I think this introduction of another vendor specific command is wrong. > > > > > > If probing takes too much time and should be done only when the device > > > is needed, there are 2 things you could do: > > > > > > - you can create new driver flag saying that the device should be > > > probeb only when needed, wire necessary code and add this flag to > your > > > driver (this could get very complicated, though) > > > - you can do minimum stuff in probe method, and move the stuff that > > > takes long time into bnxt_start(), which is called only when network > > > via this ethernet controller is requested for by U-Boot commands. > > > > So renaming bnxt probe/remove to bnxt start/stop will do, right? > > No. The whole idea of adding the new "bnxt" command is wrong, because > the command is *vendor specific*. The ethernet controller should work > out of the box with standard U-Boot commands, i.e. it if I use the > dhcp > command, it should work, without needing to call the "bnxt" command. Hi Marek, In order to speed up the boot, we do not load bnxt driver on each boot. Also we do not need to load FW and initialize PCI required to bind bnxt. When bnxt is required, then we execute these commands: chimp_ld_secure #this command loads FW, which is necessary for PCIe to enumerate it pci enum #this command is necessary to call bnxt_bind bnxt 0 probe #this command would probe/load the driver Do you have a suggestion on how to make this work without introducing bnxt commands if we do not want to enumerate PCIe, load FW and load bnxt on each boot? Currently we boot to uboot prompt in 1s, which is our requirement. Thanks, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands
On Tue, Oct 26, 2021 at 9:52 AM Marek Behún wrote:
>
> On Tue, 26 Oct 2021 09:40:44 -0700
> Roman Bacik wrote:
>
> > On Tue, Oct 26, 2021 at 9:02 AM Roman Bacik
> > wrote:
> > >
> > > On Tue, Oct 26, 2021 at 8:55 AM Marek Behún wrote:
> > > >
> > > > On Tue, 26 Oct 2021 08:14:28 -0700
> > > > Roman Bacik wrote:
> > > >
> > > > > Hi Marek,
> > > > >
> > > > > We do not want this driver to be automatically probed. It is not
> > > > > needed
> > > > > all the time and also slows down the boot time. We have stripped down
> > > > > everything else to bare minimum.
> > > > > Thanks,
> > > > >
> > > > > Roman
> > > >
> > > > Hi Roman,
> > > >
> > > > OK, that is reasonable, but not reasonable enough to introduce a new
> > > > vendor specific command.
> > > >
> > > > Still NAK.
> > > >
> > > > So you have the bnxt_drv_probe method defined in the driver, but you
> > > > don't set a pointer to it into the U_BOOT_DRIVER structure, and instead
> > > > you call this method when "brcm probe" command is called.
> > > >
> > > > I think this introduction of another vendor specific command is wrong.
> > > >
> > > > If probing takes too much time and should be done only when the device
> > > > is needed, there are 2 things you could do:
> > > >
> > > > - you can create new driver flag saying that the device should be
> > > > probeb only when needed, wire necessary code and add this flag to your
> > > > driver (this could get very complicated, though)
> > > > - you can do minimum stuff in probe method, and move the stuff that
> > > > takes long time into bnxt_start(), which is called only when network
> > > > via this ethernet controller is requested for by U-Boot commands.
> > >
> > > So renaming bnxt probe/remove to bnxt start/stop will do, right?
> > >
> > > >
> > > > Also, you're still doing
> > > >
> > > > + if (env_get("ethaddr"))
> > > > + secondary = 1;
> > >
> > > Why can't we access the env variable from our "bnxt start" method? Is
> > > there a blacklist of env variables one must not access from a driver?
> >
> > Marek,
> >
> > Sometimes we can have two ethernet devices. One is 10/100/1000M rgmii and
> > another is chip internal 10/100G bnxt. If rgmii is there as eth0, we
> > are incrementing eth number for bnxt:
> >
> > if (env_get("ethaddr"))
> > secondary = 1;
> > eth_env_get_enetaddr_by_index("eth",bp->cardnum+secondary,bp->mac_set);
> >
> > This way the driver can find that rmii has already taken eth0 so it
> > will use eth1 instead. Do you have a suggestion to work around this?
> > Thanks,
>
> I just replied to your first reply:
>
> Every ethernet controller should use a specific ethNaddr, where
> N = dev_seq(dev) of that controller (and if N=0, it is omitted
> entirely).
>
> So no magical things such as
> bp->cardnum+secondary
>
> instead you use dev_seq(dev), which gives you the correct number, i.e.
> for N-th UCLASS_ETH device bound it return the number N.
>
> Marek
Marek,
Thank you very much for your suggestion, we will try it.
Roman
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Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands
On Tue, Oct 26, 2021 at 9:02 AM Roman Bacik wrote:
>
> On Tue, Oct 26, 2021 at 8:55 AM Marek Behún wrote:
> >
> > On Tue, 26 Oct 2021 08:14:28 -0700
> > Roman Bacik wrote:
> >
> > > Hi Marek,
> > >
> > > We do not want this driver to be automatically probed. It is not needed
> > > all the time and also slows down the boot time. We have stripped down
> > > everything else to bare minimum.
> > > Thanks,
> > >
> > > Roman
> >
> > Hi Roman,
> >
> > OK, that is reasonable, but not reasonable enough to introduce a new
> > vendor specific command.
> >
> > Still NAK.
> >
> > So you have the bnxt_drv_probe method defined in the driver, but you
> > don't set a pointer to it into the U_BOOT_DRIVER structure, and instead
> > you call this method when "brcm probe" command is called.
> >
> > I think this introduction of another vendor specific command is wrong.
> >
> > If probing takes too much time and should be done only when the device
> > is needed, there are 2 things you could do:
> >
> > - you can create new driver flag saying that the device should be
> > probeb only when needed, wire necessary code and add this flag to your
> > driver (this could get very complicated, though)
> > - you can do minimum stuff in probe method, and move the stuff that
> > takes long time into bnxt_start(), which is called only when network
> > via this ethernet controller is requested for by U-Boot commands.
>
> So renaming bnxt probe/remove to bnxt start/stop will do, right?
>
> >
> > Also, you're still doing
> >
> > + if (env_get("ethaddr"))
> > + secondary = 1;
>
> Why can't we access the env variable from our "bnxt start" method? Is
> there a blacklist of env variables one must not access from a driver?
Marek,
Sometimes we can have two ethernet devices. One is 10/100/1000M rgmii and
another is chip internal 10/100G bnxt. If rgmii is there as eth0, we
are incrementing eth number for bnxt:
if (env_get("ethaddr"))
secondary = 1;
eth_env_get_enetaddr_by_index("eth",bp->cardnum+secondary,bp->mac_set);
This way the driver can find that rmii has already taken eth0 so it
will use eth1 instead. Do you have a suggestion to work around this?
Thanks,
Roman
>
>
> >
> > in your driver, which is completely against DM.
> >
> > Marek
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Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands
On Tue, Oct 26, 2021 at 8:55 AM Marek Behún wrote:
>
> On Tue, 26 Oct 2021 08:14:28 -0700
> Roman Bacik wrote:
>
> > Hi Marek,
> >
> > We do not want this driver to be automatically probed. It is not needed
> > all the time and also slows down the boot time. We have stripped down
> > everything else to bare minimum.
> > Thanks,
> >
> > Roman
>
> Hi Roman,
>
> OK, that is reasonable, but not reasonable enough to introduce a new
> vendor specific command.
>
> Still NAK.
>
> So you have the bnxt_drv_probe method defined in the driver, but you
> don't set a pointer to it into the U_BOOT_DRIVER structure, and instead
> you call this method when "brcm probe" command is called.
>
> I think this introduction of another vendor specific command is wrong.
>
> If probing takes too much time and should be done only when the device
> is needed, there are 2 things you could do:
>
> - you can create new driver flag saying that the device should be
> probeb only when needed, wire necessary code and add this flag to your
> driver (this could get very complicated, though)
> - you can do minimum stuff in probe method, and move the stuff that
> takes long time into bnxt_start(), which is called only when network
> via this ethernet controller is requested for by U-Boot commands.
So renaming bnxt probe/remove to bnxt start/stop will do, right?
>
> Also, you're still doing
>
> + if (env_get("ethaddr"))
> + secondary = 1;
Why can't we access the env variable from our "bnxt start" method? Is
there a blacklist of env variables one must not access from a driver?
>
> in your driver, which is completely against DM.
>
> Marek
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RE: [PATCH v3 2/2] cmd: brcm: netXtreme commands
> -Original Message- > From: Marek Behún > Sent: Tuesday, October 26, 2021 6:18 AM > To: Roman Bacik > Cc: U-Boot Mailing List ; Bharat Gooty > ; Aswath Govindraju govindr...@ti.com>; Bin Meng ; Franck > LENORMAND ; Heinrich Schuchardt > ; Kory Maincent ; > Michal Simek ; Patrick Delaunay > ; Peng Fan ; Priyanka > Jain ; Rayagonda Kokatanur > ; Sean Anderson > ; Simon Glass > Subject: Re: [PATCH v3 2/2] cmd: brcm: netXtreme commands > > On Mon, 25 Oct 2021 16:44:44 -0700 > Roman Bacik wrote: > > > From: Bharat Gooty > > > > Following netXtreme commands are supported: > > probe, remove. > > > > Signed-off-by: Bharat Gooty > > > > Signed-off-by: Roman Bacik > > Hi Roman, > > why do you need to have custom command for probing / removing the > driver? > > U-Boot PCI code should probe the driver automatically upon recognizing > PCI vendor / device ID. > > Even if not, adding custom command for such a thing isn't nice, when we > have the `dm` command for communicating with driver model. > > Marek Hi Marek, We do not want this driver to be automatically probed. It is not needed all the time and also slows down the boot time. We have stripped down everything else to bare minimum. Thanks, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v3 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v3:
- change printf to debug in display_banner
- remove get/set/print mac/speed
- remove bnxt_hwrm_set_nvmem
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|6 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 1841 +++
drivers/net/bnxt/bnxt_dbg.h | 537 ++
drivers/net/bnxt/pci_ids.h | 17 +
include/broadcom/bnxt.h | 407
include/broadcom/bnxt_hsi.h | 889 +
include/broadcom/bnxt_ver.h | 22 +
10 files changed, 3726 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/pci_ids.h
create mode 100644 include/broadcom/bnxt.h
create mode 100644 include/broadcom/bnxt_hsi.h
create mode 100644 include/broadcom/bnxt_ver.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..edc319a10625
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,6 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..d3663042aba2
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,1841 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt_dbg.h"
+#include "pci_ids.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+static const char banner[] = DRV_MODULE_DESC " v" UBOOT_MODULE_VER ",";
+static const char fw_ver[] = " FW v";
+
+static int num_cards; /* Number of bnxt devices seen so far */
+
+static void display_banner(struct bnxt *bp)
+{
+ int i;
+
+ debug(banner);
+ debug(fw_ver);
+ debug("%d.%d.", bp->fw_maj, bp->fw_min);
+ debug("%d.%d\n", bp->fw_bld, bp->fw_rsvd);
+ debug("ETH MAC: ");
+ for (i = 0; i < ETH_ALEN; i++) {
+ debug("%02x", bp->mac_set[i]);
+ if (i != (ETH_ALEN - 1))
+ debug(":");
+ }
+
+ debug(", Port(%d), PF(%d)\n", bp->port_idx, bp->ordinal_value);
+}
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ pci_read_word16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ pci_read_word16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ pci_read_word16(bp->pdev,
+ PCI_SUBSYSTEM_VENDOR_ID,
+ >subsystem_vendor);
+ pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg);
+ pci_read_byte(bp->pdev, PCICFG_ME_REGISTER, >pf_num);
+ pci_read_byte(bp->pdev, PCI_INTERRUPT_LINE, >irq);
+ bp->bar0 = pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+ bp->bar1 = pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_2, PCI_REGION_MEM);
+ bp->bar2 =
[PATCH v3 2/2] cmd: brcm: netXtreme commands
From: Bharat Gooty
Following netXtreme commands are supported:
probe, remove.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
Changes in v3:
- remove commands set/get mac/speed
- add doc/bnxt.rst
cmd/Kconfig | 2 +
cmd/broadcom/Kconfig | 10 +
cmd/broadcom/Makefile | 3 +-
cmd/broadcom/bnxt.c | 97 +++
doc/usage/bnxt.rst| 35
doc/usage/index.rst | 1 +
6 files changed, 147 insertions(+), 1 deletion(-)
create mode 100644 cmd/broadcom/Kconfig
create mode 100644 cmd/broadcom/bnxt.c
create mode 100644 doc/usage/bnxt.rst
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 5b30b13e438f..e054292dbcd0 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1953,6 +1953,8 @@ endmenu
source "cmd/ti/Kconfig"
+source "cmd/broadcom/Kconfig"
+
config CMD_BOOTSTAGE
bool "Enable the 'bootstage' command"
depends on BOOTSTAGE
diff --git a/cmd/broadcom/Kconfig b/cmd/broadcom/Kconfig
new file mode 100644
index ..6f16b09d1425
--- /dev/null
+++ b/cmd/broadcom/Kconfig
@@ -0,0 +1,10 @@
+menu "Broadcom specific command line interface"
+
+config BNXT_ETH_CMD
+ bool "BNXT commands"
+ depends on BNXT_ETH
+ help
+ Broadcom NXS ethernet controller commands. Commands supported are:-
+ Driver probe, Driver remove, Supported speeds, get/set MAC address
and get/set Link speeds.
+
+endmenu
diff --git a/cmd/broadcom/Makefile b/cmd/broadcom/Makefile
index 62268d98d0dd..0027c1c15e5a 100644
--- a/cmd/broadcom/Makefile
+++ b/cmd/broadcom/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
-# Copyright 2020 Broadcom
+# Copyright 2020-2021 Broadcom
obj-y += chimp_boot.o
obj-y += nitro_image_load.o
obj-y += chimp_handshake.o
+obj-$(CONFIG_BNXT_ETH_CMD) += bnxt.o
diff --git a/cmd/broadcom/bnxt.c b/cmd/broadcom/bnxt.c
new file mode 100644
index ..ddc2ceb98863
--- /dev/null
+++ b/cmd/broadcom/bnxt.c
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Broadcom
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int print_drv(u8 flag)
+{
+ printf("bnxt - Device ");
+ if (flag)
+ printf("already");
+ else
+ printf("not");
+
+ printf(" initialized\n");
+
+ return CMD_RET_SUCCESS;
+}
+
+static int bnxt_parse_input(int argc, char *const argv[])
+{
+ if (!strcmp(argv[2], "probe"))
+ return CMD_PROBE;
+ else if (!strcmp(argv[2], "remove"))
+ return CMD_REMOVE;
+
+ return CMD_UNKNOWN;
+}
+
+static int do_bnxt(struct cmd_tbl *cmdtp, int flag, int argc, char *const
argv[])
+{
+ struct udevice *dev;
+ struct bnxt *bp;
+ char name[30];
+ int ret = CMD_RET_USAGE;
+ int cardnum;
+ int op;
+
+ printf("\n");
+ if (argc < 2)
+ return ret;
+
+ cardnum = simple_strtoul(argv[1], NULL, 10);
+ sprintf(name, "bnxt_eth%u", cardnum);
+ ret = uclass_get_device_by_name(UCLASS_ETH, name, );
+ if (ret)
+ return CMD_RET_USAGE;
+
+ bp = dev_get_priv(dev);
+ op = bnxt_parse_input(argc, argv);
+ ret = CMD_RET_USAGE;
+ switch (op) {
+ case CMD_PROBE:
+ if (!bp->drv_load)
+ ret = bnxt_drv_probe(dev);
+ else
+ ret = print_drv(1);
+ break;
+ case CMD_REMOVE:
+ ret = bnxt_drv_remove(dev);
+ break;
+ default:
+ if (op && !bp->drv_load)
+ ret = print_drv(0);
+ }
+
+ printf("\n");
+
+ return ret;
+}
+
+U_BOOT_CMD
+ (bnxt, 5, 1, do_bnxt,
+ "Broadcom NetXtreme-C/E Management",
+ /* */" probe\n"
+ " - Load Driver Instance.\n"
+ "bnxt remove\n"
+ " - Unload Driver Instance.\n"
+);
diff --git a/doc/usage/bnxt.rst b/doc/usage/bnxt.rst
new file mode 100644
index ..4b0b7b22411a
--- /dev/null
+++ b/doc/usage/bnxt.rst
@@ -0,0 +1,35 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+bnxt command
+
+
+Synopsis
+
+
+::
+
+bnxt bnxt_eth# probe
+bnxt bnxt_eth# remove
+
+Description
+---
+
+The bnxt commands are used to load and unload the bnxt driver. The probe loads
and remove unloads the driver.
+
+Example
+---
+
+::
+
+=> bnxt 0 probe
+=> bnxt 0 remove
+
+Configuration
+-
+
+The bnxt commands are only available if CONFIG_CMD_BNXT=y.
+
+Return value
+
+
+The return value $? is 0 if successful and nonzero
Re: [PATCH v2 1/2] net: brcm: netXtreme driver
On Mon, Oct 25, 2021 at 3:22 PM Marek Behún wrote: > > On Mon, 25 Oct 2021 14:35:20 -0700 > Roman Bacik wrote: > > > > - you are introducing custom mechanism for setting / getting PHY > > > parameters, via custom specific env variables, for example in the > > > set_phy_speed() and set_phy_link() functions, i.e.: > > > sprintf(name1, "bnxt_eth%u_phy_speed", bp->cardnum); > > > env_set(name1, name); > > > > > > The whole point of several people in the past few years was to create > > > generic mechanisms for such things. We have ethernet PHY DM class, > > > you should use this. That way you won't need to introduce custom > > > mechanisms to get the infromation, since there are mii/mdio commands. > > > > These are chip internal settings stored internally in NVM. They are > > not modified via mii/mdio. > > Ah. Well that also shouldn't use custom commands. Unfortunately U-Boot > does not have a generic nvmem API yet, but I plan to write nvmem API > together with `nvmem` command, which would be generic. > > As of now, we have the `mac` and `fuse` commands for this (although > deprecated and will be removed). If you want to write nvmem interface, > you could use the `mac` command. But it will be deprecated once we have > nvmem API, would you be willing to rewrite it then? > > Marek Hi Marek, We will remove get/set mac/speed for now, since we have a workaround. Thanks, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it.
Re: [PATCH v2 1/2] net: brcm: netXtreme driver
On Mon, Oct 25, 2021 at 6:58 AM Marek Behún wrote:
>
> NAK for this driver.
>
> - display_banner() spams the output unnecessarily, the information
> should be printed with debug()
We will make the change as requested.
>
> - you are introducing custom mechanism for setting / getting PHY
> parameters, via custom specific env variables, for example in the
> set_phy_speed() and set_phy_link() functions, i.e.:
> sprintf(name1, "bnxt_eth%u_phy_speed", bp->cardnum);
> env_set(name1, name);
>
> The whole point of several people in the past few years was to create
> generic mechanisms for such things. We have ethernet PHY DM class,
> you should use this. That way you won't need to introduce custom
> mechanisms to get the infromation, since there are mii/mdio commands.
These are chip internal settings stored internally in NVM. They are
not modified via mii/mdio.
>
> - print_mac() - the driver shouldn't even have this function, it should
> just set appropriate ethNaddr variable
The function was added for user convenience. We will remove it.
>
> - in bnxt_eth_probe() you are looking at the variable "ethaddr":
>
> if (env_get("ethaddr"))
> secondary = 1;
>
> a driver should never look itself at this variable.
> Since your driver should be of UCLASS_ETH, the generic mechanism
> should use appropriate env variable by calling you .write_hwaddr
> method
We will try to modify it.
>
> Basically you are going against all the points of the whole idea to
> have a generic API to set network driver parameters, and instead you
> are adding driver-specific custom mechanisms.
>
> Please change that in next version.
>
> Marek
Thank you very much for your review,
Roman
--
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please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
[PATCH v1] driver: usb: Fix brcm xhci includes
Include dm/device_compat.h to fix compilation. Signed-off-by: Roman Bacik --- drivers/usb/host/xhci-brcm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c index 27c4bbfcba72..fe17924028cd 100644 --- a/drivers/usb/host/xhci-brcm.c +++ b/drivers/usb/host/xhci-brcm.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #define DRD2U3H_XHC_REGS_AXIWRA0xC08 -- 2.17.1 -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v4] driver: spi: add bcm iproc qspi support.
From: Rayagonda Kokatanur IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- Changes in v4: - move iproc_qspi.c from spi to mtd/spi - remove iproc_qspi.h - rename IPROC_QSPI to SPI_FLASH_IPROC Changes in v3: - fix warning by including linux/delay.h - change ofdata_to_platdata to of_to_plat - change priv_auto_alloc_size to priv_auto Changes in v2: - remove include spi-nor.h - define and use named BITs for writing register values - remove bspi_set_4byte_mode() method drivers/mtd/spi/Kconfig | 6 + drivers/mtd/spi/Makefile | 1 + drivers/mtd/spi/iproc_qspi.c | 718 +++ 3 files changed, 725 insertions(+) create mode 100644 drivers/mtd/spi/iproc_qspi.c diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index 408a53f86178..53f9f271431e 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -16,6 +16,12 @@ config DM_SPI_FLASH enabled together (it is not possible to use driver model for one and not the other). +config SPI_FLASH_IPROC + bool "QSPI driver for BCM iProc QSPI Controller" + help + This selects the BCM iProc QSPI controller. + This driver support spi flash single, quad and memory reads. + config SPI_FLASH_SANDBOX bool "Support sandbox SPI flash device" depends on SANDBOX && DM_SPI_FLASH diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 99cc41855223..0ea1a69a7919 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -19,5 +19,6 @@ endif obj-$(CONFIG_SPI_FLASH) += spi-nor.o obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o +obj-$(CONFIG_SPI_FLASH_IPROC) += iproc_qspi.o obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_MTD) += sf_mtd.o obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o diff --git a/drivers/mtd/spi/iproc_qspi.c b/drivers/mtd/spi/iproc_qspi.c new file mode 100644 index ..e05c48d1082c --- /dev/null +++ b/drivers/mtd/spi/iproc_qspi.c @@ -0,0 +1,718 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020-2021 Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* 175MHz */ +#define QSPI_AXI_CLK 17500 +#define QSPI_DEF_SCK_FREQ 5000 +#define QSPI_WAIT_TIMEOUT_MS 200U +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) + +/*SPI configuration enable*/ +#define IPROC_QSPI_BUS 0 +#define IPROC_QSPI_CS 0 +#define IPROC_BSPI_READ_DUMMY_CYCLES 0x08 + +/* Chip attributes */ +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define NUM_CDRAM 16U + +#define CDRAM_PCS0 2 +#define CDRAM_CONT BIT(7) +#define CDRAM_BITS_EN BIT(6) +#define CDRAM_QUAD_MODEBIT(8) +#define CDRAM_RBIT_INPUT BIT(10) +#define MSPI_SPE BIT(6) +#define MSPI_CONT_AFTER_CMDBIT(7) + +/* Register fields */ +#define MSPI_SPCR0_MSB_BITS_8 0x0020 +#define BSPI_RAF_CONTROL_START_MASK0x0001 +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 +#define BSPI_BITS_PER_PHASE_ADDR_MARK 0x0001 +#define BSPI_BITS_PER_CYCLE_DATA_SHIFT 0 +#define BSPI_BITS_PER_CYCLE_ADDR_SHIFT 16 +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 +#define BSPI_STRAP_OVERRIDE_SHIFT 0 + +/* MSPI registers */ +#define MSPI_SPCR0_LSB_REG 0x000 +#define MSPI_SPCR0_MSB_REG 0x004 +#define MSPI_SPCR1_LSB_REG 0x008 +#define MSPI_SPCR1_MSB_REG 0x00c +#define MSPI_NEWQP_REG 0x010 +#define MSPI_ENDQP_REG 0x014 +#define MSPI_SPCR2_REG 0x018 +#define MSPI_STATUS_REG0x020 +#define MSPI_CPTQP_REG 0x024 +#define MSPI_TXRAM_REG 0x040 +#define MSPI_RXRAM_REG 0x0c0 +#define MSPI_CDRAM_REG 0x140 +#define MSPI_WRITE_LOCK_REG0x180 +#define MSPI_DISABLE_FLUSH_GEN_REG 0x184 + +/* BSPI registers */ +#define BSPI_REVISION_ID_REG 0x000 +#define BSPI_SCRATCH_REG 0x004 +#define BSPI_MAST_N_BOOT_CTRL_REG 0x008 +#define BSPI_BUSY_STATUS_REG 0x00c +#define BSPI_INTR_STATUS_REG 0
RE: [PATCH v2 2/2] cmd: brcm: netXtreme commands
> -Original Message-
> From: Heinrich Schuchardt
> Sent: Saturday, October 23, 2021 1:02 AM
> To: Roman Bacik ; U-Boot Mailing List b...@lists.denx.de>
> Cc: Bharat Gooty ; Bin Meng
> ; Franck LENORMAND
> ; Kory Maincent
> ; Michal Simek ;
> Patrick Delaunay ; Peng Fan
> ; Priyanka Jain ; Rayagonda
> Kokatanur ; Sean Anderson
> ; Simon Glass
> Subject: Re: [PATCH v2 2/2] cmd: brcm: netXtreme commands
>
>
>
> On 10/23/21 01:23, Roman Bacik wrote:
> > From: Bharat Gooty
> >
> > Following netXtreme commands are supported:-
> > Device probe, remove, supported speeds, get/set speeds and
> > get/set MAC address.
> >
> > Signed-off-by: Bharat Gooty
> >
> > Signed-off-by: Roman Bacik
>
> Please, add a man-page for the new command in doc/usage/.
> Here is an example: doc/usage/loady.rst
> Add the new man-page to doc/usage/index.rst
> Test building with 'make htmldocs'.
>
> > ---
> >
> > (no changes since v1)
> >
> > cmd/Kconfig | 2 +
> > cmd/broadcom/Kconfig | 10 ++
> > cmd/broadcom/Makefile | 3 +-
> > cmd/broadcom/bnxt.c | 237
> ++
> > 4 files changed, 251 insertions(+), 1 deletion(-)
> > create mode 100644 cmd/broadcom/Kconfig
> > create mode 100644 cmd/broadcom/bnxt.c
> >
> > diff --git a/cmd/Kconfig b/cmd/Kconfig
> > index 5b30b13e438f..e054292dbcd0 100644
> > --- a/cmd/Kconfig
> > +++ b/cmd/Kconfig
> > @@ -1953,6 +1953,8 @@ endmenu
> >
> > source "cmd/ti/Kconfig"
> >
> > +source "cmd/broadcom/Kconfig"
> > +
> > config CMD_BOOTSTAGE
> > bool "Enable the 'bootstage' command"
> > depends on BOOTSTAGE
> > diff --git a/cmd/broadcom/Kconfig b/cmd/broadcom/Kconfig
> > new file mode 100644
> > index ..6f16b09d1425
> > --- /dev/null
> > +++ b/cmd/broadcom/Kconfig
> > @@ -0,0 +1,10 @@
> > +menu "Broadcom specific command line interface"
> > +
> > +config BNXT_ETH_CMD
> > + bool "BNXT commands"
> > + depends on BNXT_ETH
> > + help
> > + Broadcom NXS ethernet controller commands. Commands
> supported are:-
> > + Driver probe, Driver remove, Supported speeds, get/set MAC
> address and get/set Link speeds.
> > +
> > +endmenu
> > diff --git a/cmd/broadcom/Makefile b/cmd/broadcom/Makefile
> > index 62268d98d0dd..0027c1c15e5a 100644
> > --- a/cmd/broadcom/Makefile
> > +++ b/cmd/broadcom/Makefile
> > @@ -1,6 +1,7 @@
> > # SPDX-License-Identifier: GPL-2.0+
> > -# Copyright 2020 Broadcom
> > +# Copyright 2020-2021 Broadcom
> >
> > obj-y += chimp_boot.o
> > obj-y += nitro_image_load.o
> > obj-y += chimp_handshake.o
> > +obj-$(CONFIG_BNXT_ETH_CMD) += bnxt.o
> > diff --git a/cmd/broadcom/bnxt.c b/cmd/broadcom/bnxt.c
> > new file mode 100644
> > index ..b9d1e59a74fb
> > --- /dev/null
> > +++ b/cmd/broadcom/bnxt.c
> > @@ -0,0 +1,237 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Copyright 2021 Broadcom
> > + */
> > +
> > +#include
> > +#include
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +static int do_bnxt_set_link(struct bnxt *bp, char *link_str)
> > +{
> > + bp->link_set = simple_strtoul(link_str, NULL, 16);
> > +
> > + switch (bp->link_set) {
> > + case LINK_SPEED_DRV_AUTONEG:
> > + printf("- AutoNeg Not Supported\n");
> > + return 0;
>
> Please, remove the leading '- '. It just increases code size.
> In case of an error, please, return CMD_RET_FAILURE.
> Please, remove captitalization of 'Not Supported'
>
> > + case LINK_SPEED_DRV_1G:
> > + if (!(bp->support_speeds &
> PORT_QCFG_SUPPORT_SPEEDS_1GB)) {
> > + printf("- 1 GBPS: Link Speed is not supported\n");
>
> ditto
>
> > + return 0;
> > + }
> > +
> > + break;
> > + case LINK_SPEED_DRV_10G:
> > + if (!(bp->support_speeds &
> PORT_QCFG_SUPPORT_SPEEDS_10GB)) {
> > + printf("- 10 GBPS: Link Speed is not supported\n");
> > +
RE: [PATCH v3] driver: spi: add bcm iproc qspi support.
> -Original Message- > From: Jagan Teki > Sent: Sunday, October 24, 2021 11:44 PM > To: Roman Bacik > Cc: U-Boot Mailing List ; Rayagonda Kokatanur > ; Bharat Gooty > > Subject: Re: [PATCH v3] driver: spi: add bcm iproc qspi support. > > On Thu, Oct 21, 2021 at 4:01 AM Roman Bacik > wrote: > > > > From: Rayagonda Kokatanur > > > > IPROC qspi driver supports both BSPI and MSPI modes. > > > > Signed-off-by: Rayagonda Kokatanur > > > Signed-off-by: Bharat Gooty > > Acked-by: Rayagonda Kokatanur > > > > Signed-off-by: Roman Bacik > > --- > > > > Changes in v3: > > - fix warning by including linux/delay.h > > - change ofdata_to_platdata to of_to_plat > > - change priv_auto_alloc_size to priv_auto > > > > Changes in v2: > > - remove include spi-nor.h > > - define and use named BITs for writing register values > > - remove bspi_set_4byte_mode() method > > > > drivers/spi/Kconfig | 6 + > > drivers/spi/Makefile | 1 + > > drivers/spi/iproc_qspi.c | 713 > +++ > > drivers/spi/iproc_qspi.h | 20 ++ > > 4 files changed, 740 insertions(+) > > create mode 100644 drivers/spi/iproc_qspi.c > > create mode 100644 drivers/spi/iproc_qspi.h > > > > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig > > index d07e9a28af82..e76fadef32dd 100644 > > --- a/drivers/spi/Kconfig > > +++ b/drivers/spi/Kconfig > > @@ -178,6 +178,12 @@ config ICH_SPI > > access the SPI NOR flash on platforms embedding this Intel > > ICH IP core. > > > > +config IPROC_QSPI > > + bool "QSPI driver for BCM iProc QSPI Controller" > > + help > > + This selects the BCM iProc QSPI controller. > > + This driver support spi flash single, quad and memory reads. > > + > > config KIRKWOOD_SPI > > bool "Marvell Kirkwood SPI Driver" > > help > > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile > > index d2f24bccefd3..869763187062 100644 > > --- a/drivers/spi/Makefile > > +++ b/drivers/spi/Makefile > > @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o > > obj-$(CONFIG_FSL_ESPI) += fsl_espi.o > > obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o > > obj-$(CONFIG_ICH_SPI) += ich.o > > +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o > > obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o > > obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o > > obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o > > diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c > > new file mode 100644 > > index ..08881bf61764 > > --- /dev/null > > +++ b/drivers/spi/iproc_qspi.c > > @@ -0,0 +1,713 @@ > > +// SPDX-License-Identifier: GPL-2.0+ > > +/* > > + * Copyright 2020-2021 Broadcom > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include "iproc_qspi.h" > > + > > +/* 175MHz */ > > +#define QSPI_AXI_CLK 17500 > > +#define QSPI_DEF_SCK_FREQ 5000 > > +#define QSPI_WAIT_TIMEOUT_MS 200U > > +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) > > + > > +/* Chip attributes */ > > +#define SPBR_MIN 8U > > +#define SPBR_MAX 255U > > +#define NUM_CDRAM 16U > > + > > +#define CDRAM_PCS0 2 > > +#define CDRAM_CONT BIT(7) > > +#define CDRAM_BITS_EN BIT(6) > > +#define CDRAM_QUAD_MODEBIT(8) > > +#define CDRAM_RBIT_INPUT BIT(10) > > +#define MSPI_SPE BIT(6) > > +#define MSPI_CONT_AFTER_CMDBIT(7) > > + > > +/* Register fields */ > > +#define MSPI_SPCR0_MSB_BITS_8 0x0020 > > +#define BSPI_RAF_CONTROL_START_MASK0x0001 > > +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 > > +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 > > +#define BSPI_BITS_PER_PHASE_ADDR_MARK 0x0001 > > +#define BSPI_BITS_PER_CYCLE_DATA_SHIFT 0 > > +#define BSPI_BITS_PER_CYCLE_ADDR_SHIFT 16 > > +#define BSPI_STRAP_OVERRI
RE: [PATCH v2 2/2] cmd: brcm: netXtreme commands
> -Original Message- > From: Marek Behún > Sent: Monday, October 25, 2021 7:01 AM > To: Roman Bacik > Cc: U-Boot Mailing List ; Bharat Gooty > ; Bin Meng ; Franck > LENORMAND ; Heinrich Schuchardt > ; Kory Maincent ; > Michal Simek ; Patrick Delaunay > ; Peng Fan ; Priyanka > Jain ; Rayagonda Kokatanur > ; Sean Anderson > ; Simon Glass > Subject: Re: [PATCH v2 2/2] cmd: brcm: netXtreme commands > > On Fri, 22 Oct 2021 16:23:33 -0700 > Roman Bacik wrote: > > > From: Bharat Gooty > > > > Following netXtreme commands are supported:- > > Device probe, remove, supported speeds, get/set speeds and > > get/set MAC address. > > NAK. > > - "bnxt get mac > > U-Boot uses the ethaddr and ethNaddr environment variables for MAC > addresses. You don't need a new custom command for that when there is > a generic mechanism for this. > > - " probe" / " remove" > > You also shouldn't need a command for driver probe / remove. DM should > probe your driver automatically. And if you need it for debugging, > please add such subcommand to the dm command. > > - "bnxt get supported_speed" > "bnxt get link_speed" > > These should be available via the mdio command when you register your > PHY driver via appropriate API. > > Marek Hi Marek, Thank you very much for your feedback. We have two Ethernet drivers. One is 10/100/1000 MB rmii driver, which is being used as you have described. The second one is this 10/100 GB bnxt driver, which is probed and managed on demand with these netXtreme commands. We will have a look and address your comments. Thanks, Roman -- This electronic communication and the information and any files transmitted with it, or attached to it, are confidential and are intended solely for the use of the individual or entity to whom it is addressed and may contain information that is confidential, legally privileged, protected by privacy laws, or otherwise restricted from disclosure to anyone else. If you are not the intended recipient or the person responsible for delivering the e-mail to the intended recipient, you are hereby notified that any use, copying, distributing, dissemination, forwarding, printing, or copying of this e-mail is strictly prohibited. If you received this e-mail in error, please return the e-mail to the sender, delete it from your computer, and destroy any printed copy of it. smime.p7s Description: S/MIME Cryptographic Signature
[PATCH v2 1/2] net: brcm: netXtreme driver
From: Bharat Gooty
Broadcom bnxt L2 driver support. Used by the Broadcom
iproc platforms.
Signed-off-by: Bharat Gooty
Reviewed-by: Ramon Fried
Signed-off-by: Roman Bacik
---
Changes in v2:
- rebase and remove DM_PCI dependency from BNXT_ETH
- remove tautology assignment from debug_resp()
drivers/net/Kconfig |1 +
drivers/net/Makefile|1 +
drivers/net/bnxt/Kconfig|6 +
drivers/net/bnxt/Makefile |5 +
drivers/net/bnxt/bnxt.c | 2025 +++
drivers/net/bnxt/bnxt_dbg.h | 537 ++
drivers/net/bnxt/pci_ids.h | 17 +
include/broadcom/bnxt.h | 419
include/broadcom/bnxt_hsi.h | 889 +++
include/broadcom/bnxt_ver.h | 22 +
10 files changed, 3922 insertions(+)
create mode 100644 drivers/net/bnxt/Kconfig
create mode 100644 drivers/net/bnxt/Makefile
create mode 100644 drivers/net/bnxt/bnxt.c
create mode 100644 drivers/net/bnxt/bnxt_dbg.h
create mode 100644 drivers/net/bnxt/pci_ids.h
create mode 100644 include/broadcom/bnxt.h
create mode 100644 include/broadcom/bnxt_hsi.h
create mode 100644 include/broadcom/bnxt_ver.h
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959f3794..8dc81a3d6cf9 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1,6 +1,7 @@
source "drivers/net/phy/Kconfig"
source "drivers/net/pfe_eth/Kconfig"
source "drivers/net/fsl-mc/Kconfig"
+source "drivers/net/bnxt/Kconfig"
config ETH
def_bool y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index e4078d15a99f..1d9fbd6693cc 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -101,3 +101,4 @@ obj-$(CONFIG_HIGMACV300_ETH) += higmacv300.o
obj-$(CONFIG_MDIO_SANDBOX) += mdio_sandbox.o
obj-$(CONFIG_FSL_ENETC) += fsl_enetc.o fsl_enetc_mdio.o
obj-$(CONFIG_FSL_LS_MDIO) += fsl_ls_mdio.o
+obj-$(CONFIG_BNXT_ETH) += bnxt/
diff --git a/drivers/net/bnxt/Kconfig b/drivers/net/bnxt/Kconfig
new file mode 100644
index ..edc319a10625
--- /dev/null
+++ b/drivers/net/bnxt/Kconfig
@@ -0,0 +1,6 @@
+config BNXT_ETH
+ bool "BNXT PCI support"
+ depends on DM_ETH
+ help
+ This driver implements support for bnxt pci controller
+ driver of ethernet class.
diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile
new file mode 100644
index ..a9d6ce00d5e0
--- /dev/null
+++ b/drivers/net/bnxt/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2019-2021 Broadcom.
+
+# Broadcom nxe Ethernet driver
+obj-y += bnxt.o
diff --git a/drivers/net/bnxt/bnxt.c b/drivers/net/bnxt/bnxt.c
new file mode 100644
index ..144df587f7e4
--- /dev/null
+++ b/drivers/net/bnxt/bnxt.c
@@ -0,0 +1,2025 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019-2021 Broadcom.
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "bnxt_dbg.h"
+#include "pci_ids.h"
+
+#define bnxt_down_chip(bp) bnxt_hwrm_run(down_chip, bp, 0)
+#define bnxt_bring_chip(bp)bnxt_hwrm_run(bring_chip, bp, 1)
+
+static const char banner[] = DRV_MODULE_DESC " v" UBOOT_MODULE_VER ",";
+static const char fw_ver[] = " FW v";
+
+static int num_cards; /* Number of bnxt devices seen so far */
+
+static void display_banner(struct bnxt *bp)
+{
+ int i;
+
+ printf(banner);
+ printf(fw_ver);
+ printf("%d.%d.", bp->fw_maj, bp->fw_min);
+ printf("%d.%d\n", bp->fw_bld, bp->fw_rsvd);
+ printf("ETH MAC: ");
+ for (i = 0; i < ETH_ALEN; i++) {
+ printf("%02x", bp->mac_set[i]);
+ if (i != (ETH_ALEN - 1))
+ printf(":");
+ }
+
+ printf(", Port(%d), PF(%d)\n", bp->port_idx, bp->ordinal_value);
+}
+
+/* Broadcom ethernet driver PCI APIs. */
+static void bnxt_bring_pci(struct bnxt *bp)
+{
+ u16 cmd_reg = 0;
+
+ pci_read_word16(bp->pdev, PCI_VENDOR_ID, >vendor_id);
+ pci_read_word16(bp->pdev, PCI_DEVICE_ID, >device_id);
+ pci_read_word16(bp->pdev,
+ PCI_SUBSYSTEM_VENDOR_ID,
+ >subsystem_vendor);
+ pci_read_word16(bp->pdev, PCI_SUBSYSTEM_ID, >subsystem_device);
+ pci_read_word16(bp->pdev, PCI_COMMAND, >cmd_reg);
+ pci_read_byte(bp->pdev, PCICFG_ME_REGISTER, >pf_num);
+ pci_read_byte(bp->pdev, PCI_INTERRUPT_LINE, >irq);
+ bp->bar0 = pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_0, PCI_REGION_MEM);
+ bp->bar1 = pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_2, PCI_REGION_MEM);
+ bp->bar2 = pci_map_bar(bp->pdev, PCI_BASE_ADDRESS_4, PCI_REGION_MEM);
+ cmd_reg = bp->cmd_reg | PCI_COMMAND_MEMOR
[PATCH v2 2/2] cmd: brcm: netXtreme commands
From: Bharat Gooty
Following netXtreme commands are supported:-
Device probe, remove, supported speeds, get/set speeds and
get/set MAC address.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v1)
cmd/Kconfig | 2 +
cmd/broadcom/Kconfig | 10 ++
cmd/broadcom/Makefile | 3 +-
cmd/broadcom/bnxt.c | 237 ++
4 files changed, 251 insertions(+), 1 deletion(-)
create mode 100644 cmd/broadcom/Kconfig
create mode 100644 cmd/broadcom/bnxt.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 5b30b13e438f..e054292dbcd0 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1953,6 +1953,8 @@ endmenu
source "cmd/ti/Kconfig"
+source "cmd/broadcom/Kconfig"
+
config CMD_BOOTSTAGE
bool "Enable the 'bootstage' command"
depends on BOOTSTAGE
diff --git a/cmd/broadcom/Kconfig b/cmd/broadcom/Kconfig
new file mode 100644
index ..6f16b09d1425
--- /dev/null
+++ b/cmd/broadcom/Kconfig
@@ -0,0 +1,10 @@
+menu "Broadcom specific command line interface"
+
+config BNXT_ETH_CMD
+ bool "BNXT commands"
+ depends on BNXT_ETH
+ help
+ Broadcom NXS ethernet controller commands. Commands supported are:-
+ Driver probe, Driver remove, Supported speeds, get/set MAC address
and get/set Link speeds.
+
+endmenu
diff --git a/cmd/broadcom/Makefile b/cmd/broadcom/Makefile
index 62268d98d0dd..0027c1c15e5a 100644
--- a/cmd/broadcom/Makefile
+++ b/cmd/broadcom/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
-# Copyright 2020 Broadcom
+# Copyright 2020-2021 Broadcom
obj-y += chimp_boot.o
obj-y += nitro_image_load.o
obj-y += chimp_handshake.o
+obj-$(CONFIG_BNXT_ETH_CMD) += bnxt.o
diff --git a/cmd/broadcom/bnxt.c b/cmd/broadcom/bnxt.c
new file mode 100644
index ..b9d1e59a74fb
--- /dev/null
+++ b/cmd/broadcom/bnxt.c
@@ -0,0 +1,237 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Broadcom
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int do_bnxt_set_link(struct bnxt *bp, char *link_str)
+{
+ bp->link_set = simple_strtoul(link_str, NULL, 16);
+
+ switch (bp->link_set) {
+ case LINK_SPEED_DRV_AUTONEG:
+ printf("- AutoNeg Not Supported\n");
+ return 0;
+ case LINK_SPEED_DRV_1G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_1GB)) {
+ printf("- 1 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_10G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_10GB)) {
+ printf("- 10 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_25G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_25GB)) {
+ printf("- 25 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_40G:
+ printf("- 40 GBPS Not Supported\n");
+ return 0;
+ case LINK_SPEED_DRV_50G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_50GB)) {
+ printf("- 50 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_100G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_100GB)) {
+ printf("- 100 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_200G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_200GB)) {
+ printf("- 200 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_2_5G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_2_5GB)) {
+ printf("- 2.5 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_100M:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_100MB)) {
+ printf("- 100 MBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ default:
+ printf("- Invalid Link Speed specified\n");
+ return CMD_RET_US
[PATCH v2 2/2] cmd: brcm: netXtreme commands
From: Bharat Gooty
Following netXtreme commands are supported:-
Device probe, remove, supported speeds, get/set speeds and
get/set MAC address.
Signed-off-by: Bharat Gooty
Signed-off-by: Roman Bacik
---
(no changes since v1)
cmd/Kconfig | 2 +
cmd/broadcom/Kconfig | 10 ++
cmd/broadcom/Makefile | 3 +-
cmd/broadcom/bnxt.c | 237 ++
4 files changed, 251 insertions(+), 1 deletion(-)
create mode 100644 cmd/broadcom/Kconfig
create mode 100644 cmd/broadcom/bnxt.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 5b30b13e438f..e054292dbcd0 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -1953,6 +1953,8 @@ endmenu
source "cmd/ti/Kconfig"
+source "cmd/broadcom/Kconfig"
+
config CMD_BOOTSTAGE
bool "Enable the 'bootstage' command"
depends on BOOTSTAGE
diff --git a/cmd/broadcom/Kconfig b/cmd/broadcom/Kconfig
new file mode 100644
index ..6f16b09d1425
--- /dev/null
+++ b/cmd/broadcom/Kconfig
@@ -0,0 +1,10 @@
+menu "Broadcom specific command line interface"
+
+config BNXT_ETH_CMD
+ bool "BNXT commands"
+ depends on BNXT_ETH
+ help
+ Broadcom NXS ethernet controller commands. Commands supported are:-
+ Driver probe, Driver remove, Supported speeds, get/set MAC address
and get/set Link speeds.
+
+endmenu
diff --git a/cmd/broadcom/Makefile b/cmd/broadcom/Makefile
index 62268d98d0dd..0027c1c15e5a 100644
--- a/cmd/broadcom/Makefile
+++ b/cmd/broadcom/Makefile
@@ -1,6 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
-# Copyright 2020 Broadcom
+# Copyright 2020-2021 Broadcom
obj-y += chimp_boot.o
obj-y += nitro_image_load.o
obj-y += chimp_handshake.o
+obj-$(CONFIG_BNXT_ETH_CMD) += bnxt.o
diff --git a/cmd/broadcom/bnxt.c b/cmd/broadcom/bnxt.c
new file mode 100644
index ..b9d1e59a74fb
--- /dev/null
+++ b/cmd/broadcom/bnxt.c
@@ -0,0 +1,237 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 Broadcom
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static int do_bnxt_set_link(struct bnxt *bp, char *link_str)
+{
+ bp->link_set = simple_strtoul(link_str, NULL, 16);
+
+ switch (bp->link_set) {
+ case LINK_SPEED_DRV_AUTONEG:
+ printf("- AutoNeg Not Supported\n");
+ return 0;
+ case LINK_SPEED_DRV_1G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_1GB)) {
+ printf("- 1 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_10G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_10GB)) {
+ printf("- 10 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_25G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_25GB)) {
+ printf("- 25 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_40G:
+ printf("- 40 GBPS Not Supported\n");
+ return 0;
+ case LINK_SPEED_DRV_50G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_50GB)) {
+ printf("- 50 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_100G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_100GB)) {
+ printf("- 100 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_200G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_200GB)) {
+ printf("- 200 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_2_5G:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_2_5GB)) {
+ printf("- 2.5 GBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ case LINK_SPEED_DRV_100M:
+ if (!(bp->support_speeds & PORT_QCFG_SUPPORT_SPEEDS_100MB)) {
+ printf("- 100 MBPS: Link Speed is not supported\n");
+ return 0;
+ }
+
+ break;
+ default:
+ printf("- Invalid Link Speed specified\n");
+ return CMD_RET_US
[PATCH v3] driver: spi: add bcm iproc qspi support.
From: Rayagonda Kokatanur IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- Changes in v3: - fix warning by including linux/delay.h - change ofdata_to_platdata to of_to_plat - change priv_auto_alloc_size to priv_auto Changes in v2: - remove include spi-nor.h - define and use named BITs for writing register values - remove bspi_set_4byte_mode() method drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/iproc_qspi.c | 713 +++ drivers/spi/iproc_qspi.h | 20 ++ 4 files changed, 740 insertions(+) create mode 100644 drivers/spi/iproc_qspi.c create mode 100644 drivers/spi/iproc_qspi.h diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d07e9a28af82..e76fadef32dd 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -178,6 +178,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config IPROC_QSPI + bool "QSPI driver for BCM iProc QSPI Controller" + help + This selects the BCM iProc QSPI controller. + This driver support spi flash single, quad and memory reads. + config KIRKWOOD_SPI bool "Marvell Kirkwood SPI Driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d2f24bccefd3..869763187062 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o obj-$(CONFIG_ICH_SPI) += ich.o +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c new file mode 100644 index ..08881bf61764 --- /dev/null +++ b/drivers/spi/iproc_qspi.c @@ -0,0 +1,713 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020-2021 Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "iproc_qspi.h" + +/* 175MHz */ +#define QSPI_AXI_CLK 17500 +#define QSPI_DEF_SCK_FREQ 5000 +#define QSPI_WAIT_TIMEOUT_MS 200U +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) + +/* Chip attributes */ +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define NUM_CDRAM 16U + +#define CDRAM_PCS0 2 +#define CDRAM_CONT BIT(7) +#define CDRAM_BITS_EN BIT(6) +#define CDRAM_QUAD_MODEBIT(8) +#define CDRAM_RBIT_INPUT BIT(10) +#define MSPI_SPE BIT(6) +#define MSPI_CONT_AFTER_CMDBIT(7) + +/* Register fields */ +#define MSPI_SPCR0_MSB_BITS_8 0x0020 +#define BSPI_RAF_CONTROL_START_MASK0x0001 +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 +#define BSPI_BITS_PER_PHASE_ADDR_MARK 0x0001 +#define BSPI_BITS_PER_CYCLE_DATA_SHIFT 0 +#define BSPI_BITS_PER_CYCLE_ADDR_SHIFT 16 +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 +#define BSPI_STRAP_OVERRIDE_SHIFT 0 + +/* MSPI registers */ +#define MSPI_SPCR0_LSB_REG 0x000 +#define MSPI_SPCR0_MSB_REG 0x004 +#define MSPI_SPCR1_LSB_REG 0x008 +#define MSPI_SPCR1_MSB_REG 0x00c +#define MSPI_NEWQP_REG 0x010 +#define MSPI_ENDQP_REG 0x014 +#define MSPI_SPCR2_REG 0x018 +#define MSPI_STATUS_REG0x020 +#define MSPI_CPTQP_REG 0x024 +#define MSPI_TXRAM_REG 0x040 +#define MSPI_RXRAM_REG 0x0c0 +#define MSPI_CDRAM_REG 0x140 +#define MSPI_WRITE_LOCK_REG0x180 +#define MSPI_DISABLE_FLUSH_GEN_REG 0x184 + +/* BSPI registers */ +#define BSPI_REVISION_ID_REG 0x000 +#define BSPI_SCRATCH_REG 0x004 +#define BSPI_MAST_N_BOOT_CTRL_REG 0x008 +#define BSPI_BUSY_STATUS_REG 0x00c +#define BSPI_INTR_STATUS_REG 0x010 +#define BSPI_B0_STATUS_REG 0x014 +#define BSPI_B0_CTRL_REG 0x018 +#define BSPI_B1_STATUS_REG 0x01c +#define BSPI_B1_CTRL_REG 0x020 +#define BSPI_STRAP
[PATCH v2] driver: spi: add bcm iproc qspi support.
From: Rayagonda Kokatanur IPROC qspi driver supports both BSPI and MSPI modes. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- Changes in v2: - remove include spi-nor.h - define and use named BITs for writing register values - removed bspi_set_4byte_mode() method drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/iproc_qspi.c | 712 +++ drivers/spi/iproc_qspi.h | 20 ++ 4 files changed, 739 insertions(+) create mode 100644 drivers/spi/iproc_qspi.c create mode 100644 drivers/spi/iproc_qspi.h diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d07e9a28af82..e76fadef32dd 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -178,6 +178,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config IPROC_QSPI + bool "QSPI driver for BCM iProc QSPI Controller" + help + This selects the BCM iProc QSPI controller. + This driver support spi flash single, quad and memory reads. + config KIRKWOOD_SPI bool "Marvell Kirkwood SPI Driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index d2f24bccefd3..869763187062 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o obj-$(CONFIG_ICH_SPI) += ich.o +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c new file mode 100644 index ..91afeb54fc57 --- /dev/null +++ b/drivers/spi/iproc_qspi.c @@ -0,0 +1,712 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020-2021 Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include "iproc_qspi.h" + +/* 175MHz */ +#define QSPI_AXI_CLK 17500 +#define QSPI_DEF_SCK_FREQ 5000 +#define QSPI_WAIT_TIMEOUT_MS 200U +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) + +/* Chip attributes */ +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define NUM_CDRAM 16U + +#define CDRAM_PCS0 2 +#define CDRAM_CONT BIT(7) +#define CDRAM_BITS_EN BIT(6) +#define CDRAM_QUAD_MODEBIT(8) +#define CDRAM_RBIT_INPUT BIT(10) +#define MSPI_SPE BIT(6) +#define MSPI_CONT_AFTER_CMDBIT(7) + +/* Register fields */ +#define MSPI_SPCR0_MSB_BITS_8 0x0020 +#define BSPI_RAF_CONTROL_START_MASK0x0001 +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 +#define BSPI_BITS_PER_PHASE_ADDR_MARK 0x0001 +#define BSPI_BITS_PER_CYCLE_DATA_SHIFT 0 +#define BSPI_BITS_PER_CYCLE_ADDR_SHIFT 16 +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 +#define BSPI_STRAP_OVERRIDE_SHIFT 0 + +/* MSPI registers */ +#define MSPI_SPCR0_LSB_REG 0x000 +#define MSPI_SPCR0_MSB_REG 0x004 +#define MSPI_SPCR1_LSB_REG 0x008 +#define MSPI_SPCR1_MSB_REG 0x00c +#define MSPI_NEWQP_REG 0x010 +#define MSPI_ENDQP_REG 0x014 +#define MSPI_SPCR2_REG 0x018 +#define MSPI_STATUS_REG0x020 +#define MSPI_CPTQP_REG 0x024 +#define MSPI_TXRAM_REG 0x040 +#define MSPI_RXRAM_REG 0x0c0 +#define MSPI_CDRAM_REG 0x140 +#define MSPI_WRITE_LOCK_REG0x180 +#define MSPI_DISABLE_FLUSH_GEN_REG 0x184 + +/* BSPI registers */ +#define BSPI_REVISION_ID_REG 0x000 +#define BSPI_SCRATCH_REG 0x004 +#define BSPI_MAST_N_BOOT_CTRL_REG 0x008 +#define BSPI_BUSY_STATUS_REG 0x00c +#define BSPI_INTR_STATUS_REG 0x010 +#define BSPI_B0_STATUS_REG 0x014 +#define BSPI_B0_CTRL_REG 0x018 +#define BSPI_B1_STATUS_REG 0x01c +#define BSPI_B1_CTRL_REG 0x020 +#define BSPI_STRAP_OVERRIDE_CTRL_REG 0x024 +#define BSPI_FLEX_MODE_ENABLE_REG 0x028 +#define BSPI_BITS_PER_CYCLE_REG0x02
Re: [PATCH v1] driver: spi: add bcm iproc qspi support.
On Mon, Oct 11, 2021 at 12:03 AM Bharat Gooty wrote: > > + Roman > Thanks for the review Jagan. Will look and get back to you. > > Thanks, > -Bharat > > On Fri, Oct 8, 2021 at 5:57 PM Jagan Teki wrote: >> >> On Wed, Aug 25, 2021 at 6:55 PM Bharat Kumar Reddy Gooty >> wrote: >> > >> > From: Rayagonda Kokatanur >> > >> > IPROC qspi driver supports both BSPI and MSPI modes. >> > >> > Signed-off-by: Rayagonda Kokatanur >> > Signed-off-by: Bharat Gooty >> > --- >> > drivers/spi/Kconfig | 6 + >> > drivers/spi/Makefile | 1 + >> > drivers/spi/iproc_qspi.c | 736 +++ >> > drivers/spi/iproc_qspi.h | 18 + >> > 4 files changed, 761 insertions(+) >> > create mode 100644 drivers/spi/iproc_qspi.c >> > create mode 100644 drivers/spi/iproc_qspi.h >> > >> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig >> > index e12699bec7..3253d6badf 100644 >> > --- a/drivers/spi/Kconfig >> > +++ b/drivers/spi/Kconfig >> > @@ -178,6 +178,12 @@ config ICH_SPI >> > access the SPI NOR flash on platforms embedding this Intel >> > ICH IP core. >> > >> > +config IPROC_QSPI >> > + bool "QSPI driver for BCM iProc QSPI Controller" >> > + help >> > + This selects the BCM iProc QSPI controller. >> > + This driver support spi flash single, quad and memory reads. >> > + >> > config KIRKWOOD_SPI >> > bool "Marvell Kirkwood SPI Driver" >> > help >> > diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile >> > index d2f24bccef..8697631870 100644 >> > --- a/drivers/spi/Makefile >> > +++ b/drivers/spi/Makefile >> > @@ -33,6 +33,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o >> > obj-$(CONFIG_FSL_ESPI) += fsl_espi.o >> > obj-$(CONFIG_SYNQUACER_SPI) += spi-synquacer.o >> > obj-$(CONFIG_ICH_SPI) += ich.o >> > +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o >> > obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o >> > obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o >> > obj-$(CONFIG_MPC8XX_SPI) += mpc8xx_spi.o >> > diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c >> > new file mode 100644 >> > index 00..89c6a56858 >> > --- /dev/null >> > +++ b/drivers/spi/iproc_qspi.c >> > @@ -0,0 +1,736 @@ >> > +// SPDX-License-Identifier: GPL-2.0+ >> > +/* >> > + * Copyright 2020-2021 Broadcom >> > + */ >> > + >> > +#include >> > +#include >> > +#include >> > +#include >> > +#include >> > +#include >> > +#include >> > +#include >> >> Why spi-nor header in spi driver? Should we use spi-mem instead? >> >> > +#include "iproc_qspi.h" >> > + >> > +/* 175MHz */ >> > +#define QSPI_AXI_CLK 17500 >> > +#define QSPI_DEF_SCK_FREQ 5000 >> > +#define QSPI_WAIT_TIMEOUT_MS 200U >> > +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) >> > + >> > +/* Chip attributes */ >> > +#define SPBR_MIN 8U >> > +#define SPBR_MAX 255U >> > +#define NUM_CDRAM 16U >> > + >> > +#define CDRAM_PCS0 2 >> > +#define CDRAM_CONT BIT(7) >> > +#define CDRAM_BITS_EN BIT(6) >> > +#define CDRAM_QUAD_MODEBIT(8) >> > +#define CDRAM_RBIT_INPUT BIT(10) >> > +#define MSPI_SPE BIT(6) >> > +#define MSPI_CONT_AFTER_CMDBIT(7) >> > + >> > +/* Register fields */ >> > +#define MSPI_SPCR0_MSB_BITS_8 0x0020 >> > +#define BSPI_RAF_CONTROL_START_MASK0x0001 >> > +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 >> > +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 >> > +#define BSPI_BITS_PER_PHASE_ADDR_MARK 0x0001 >> > +#define BSPI_BITS_PER_CYCLE_DATA_SHIFT 0 >> > +#define BSPI_BITS_PER_CYCLE_ADDR_SHIFT 16 >> > +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 >> > +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 >> > +#define BSPI_STRAP_OVERRIDE_SHIFT 0 >> > + >> > +/* MSPI registers */ >> > +#define MSPI_SPCR0_LSB_REG 0x000 >> > +#define MSPI_SPCR0_MSB_REG 0x004 >> > +#define MSPI_SPCR1_LSB_REG 0x008 >> > +#define MSPI_SPCR1_MSB_REG 0x00c >> > +#define MSPI_NEWQP_REG 0x010 >> > +#define MSPI_ENDQP_REG 0x014 >> > +#define MSPI_SPCR2_REG 0x018 >> > +#define MSPI_STATUS_REG0x020 >> > +#define MSPI_CPTQP_REG 0x024 >> > +#define MSPI_TXRAM_REG 0x040 >> > +#define MSPI_RXRAM_REG 0x0c0 >> > +#define MSPI_CDRAM_REG 0x140 >> > +#define MSPI_WRITE_LOCK_REG0x180 >> > +#define MSPI_DISABLE_FLUSH_GEN_REG 0x184 >> > + >>
Re: [PATCH v3 3/3] pinctrl: single: Add tests for request API
+Bharat Gooty
On Tue, Oct 5, 2021 at 9:50 AM Roman Bacik wrote:
>
> Add request tests to dm_test_pinctrl_single with corresponding node in
> test.dts
>
> Signed-off-by: Roman Bacik
>
> ---
>
> Changes in v3:
> - Add request API test to dm_test_pinctrl_single
>
> arch/sandbox/dts/test.dts | 17 +
> test/dm/pinmux.c | 13 +
> 2 files changed, 30 insertions(+)
>
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> index e27d106466b4..0a9f24092eb6 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -1517,6 +1517,23 @@
> };
> };
>
> + pinctrl-single-gpio-range {
> + compatible = "pinctrl-single";
> + reg = <0x 0x238>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + pinctrl-single,register-width = <32>;
> + pinctrl-single,function-mask = <7>;
> +
> + pinctrl-single,gpio-range = < 0 2 1 2 3 0>;
> +
> + range: gpio-range {
> + #pinctrl-single,gpio-range-cells = <3>;
> + };
> + };
> +
> hwspinlock@0 {
> compatible = "sandbox,hwspinlock";
> };
> diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c
> index 265df4ccb979..d4a8a7907006 100644
> --- a/test/dm/pinmux.c
> +++ b/test/dm/pinmux.c
> @@ -132,6 +132,19 @@ static int dm_test_pinctrl_single(struct unit_test_state
> *uts)
> test_muxing(159, "0x004c 0x UNCLAIMED");
> ret = pinctrl_get_pin_muxing(dev, 160, buf, sizeof(buf));
> ut_asserteq(-EINVAL, ret);
> + ut_assertok(uclass_get_device_by_name(UCLASS_PINCTRL,
> + "pinctrl-single-gpio-range",
> ));
> + ut_asserteq(142, pinctrl_get_pins_count(dev));
> + ut_assertok(pinctrl_request(dev, 0, 0));
> + test_muxing(0, "0x 0x0001 UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 1, 0));
> + test_muxing(1, "0x0004 0x0001 UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 2, 0));
> + test_muxing(2, "0x0008 0x UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 3, 0));
> + test_muxing(3, "0x000c 0x UNCLAIMED");
> + ut_assertok(pinctrl_request(dev, 4, 0));
> + test_muxing(4, "0x0010 0x UNCLAIMED");
> return 0;
> }
>
> --
> 2.17.1
>
--
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with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
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smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH v3 3/3] pinctrl: single: Add tests for request API
Add request tests to dm_test_pinctrl_single with corresponding node in
test.dts
Signed-off-by: Roman Bacik
---
Changes in v3:
- Add request API test to dm_test_pinctrl_single
arch/sandbox/dts/test.dts | 17 +
test/dm/pinmux.c | 13 +
2 files changed, 30 insertions(+)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e27d106466b4..0a9f24092eb6 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1517,6 +1517,23 @@
};
};
+ pinctrl-single-gpio-range {
+ compatible = "pinctrl-single";
+ reg = <0x 0x238>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <7>;
+
+ pinctrl-single,gpio-range = < 0 2 1 2 3 0>;
+
+ range: gpio-range {
+ #pinctrl-single,gpio-range-cells = <3>;
+ };
+ };
+
hwspinlock@0 {
compatible = "sandbox,hwspinlock";
};
diff --git a/test/dm/pinmux.c b/test/dm/pinmux.c
index 265df4ccb979..d4a8a7907006 100644
--- a/test/dm/pinmux.c
+++ b/test/dm/pinmux.c
@@ -132,6 +132,19 @@ static int dm_test_pinctrl_single(struct unit_test_state
*uts)
test_muxing(159, "0x004c 0x UNCLAIMED");
ret = pinctrl_get_pin_muxing(dev, 160, buf, sizeof(buf));
ut_asserteq(-EINVAL, ret);
+ ut_assertok(uclass_get_device_by_name(UCLASS_PINCTRL,
+ "pinctrl-single-gpio-range",
));
+ ut_asserteq(142, pinctrl_get_pins_count(dev));
+ ut_assertok(pinctrl_request(dev, 0, 0));
+ test_muxing(0, "0x 0x0001 UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 1, 0));
+ test_muxing(1, "0x0004 0x0001 UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 2, 0));
+ test_muxing(2, "0x0008 0x UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 3, 0));
+ test_muxing(3, "0x000c 0x UNCLAIMED");
+ ut_assertok(pinctrl_request(dev, 4, 0));
+ test_muxing(4, "0x0010 0x UNCLAIMED");
return 0;
}
--
2.17.1
--
This electronic communication and the information and any files transmitted
with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
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please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH v3 2/3] pinctrl: single: Add request() api
From: Bharat Gooty
Add pinctrl_ops->request api to configure pctrl
pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Reviewed-by: Simon Glass
Signed-off-by: Roman Bacik
---
(no changes since v2)
Changes in v2:
- simplify comment before struct single_gpiofunc_range
- add pinctrl-single binding document from Linux
- return error code from single-probe()
drivers/pinctrl/pinctrl-single.c | 34
1 file changed, 34 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index 5ed225f2a839..a4ec6a54fdcd 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -250,6 +250,39 @@ static int single_get_pin_muxing(struct udevice *dev,
unsigned int pin,
return 0;
}
+static int single_request(struct udevice *dev, int pin, int flags)
+{
+ struct single_priv *priv = dev_get_priv(dev);
+ struct single_pdata *pdata = dev_get_plat(dev);
+ struct single_gpiofunc_range *frange = NULL;
+ struct list_head *pos, *tmp;
+ phys_addr_t reg;
+ int mux_bytes = 0;
+ u32 data;
+
+ /* If function mask is null, needn't enable it. */
+ if (!pdata->mask)
+ return -ENOTSUPP;
+
+ list_for_each_safe(pos, tmp, >gpiofuncs) {
+ frange = list_entry(pos, struct single_gpiofunc_range, node);
+ if ((pin >= frange->offset + frange->npins) ||
+ pin < frange->offset)
+ continue;
+
+ mux_bytes = pdata->width / BITS_PER_BYTE;
+ reg = pdata->base + pin * mux_bytes;
+
+ data = single_read(dev, reg);
+ data &= ~pdata->mask;
+ data |= frange->gpiofunc;
+ single_write(dev, data, reg);
+ break;
+ }
+
+ return 0;
+}
+
static struct single_func *single_allocate_function(struct udevice *dev,
unsigned int group_pins)
{
@@ -591,6 +624,7 @@ const struct pinctrl_ops single_pinctrl_ops = {
.get_pin_name = single_get_pin_name,
.set_state = single_set_state,
.get_pin_muxing = single_get_pin_muxing,
+ .request = single_request,
};
static const struct udevice_id single_pinctrl_match[] = {
--
2.17.1
--
This electronic communication and the information and any files transmitted
with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
copying, distributing, dissemination, forwarding, printing, or copying of
this e-mail is strictly prohibited. If you received this e-mail in error,
please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH v3 1/3] pinctrl: single: Parse gpio details from dt
From: Bharat Gooty Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- (no changes since v1) .../pinctrl/pinctrl-single.txt| 255 ++ drivers/pinctrl/pinctrl-single.c | 56 2 files changed, 311 insertions(+) create mode 100644 doc/device-tree-bindings/pinctrl/pinctrl-single.txt diff --git a/doc/device-tree-bindings/pinctrl/pinctrl-single.txt b/doc/device-tree-bindings/pinctrl/pinctrl-single.txt new file mode 100644 index ..e705acd3612c --- /dev/null +++ b/doc/device-tree-bindings/pinctrl/pinctrl-single.txt @@ -0,0 +1,255 @@ +One-register-per-pin type device tree based pinctrl driver + +Required properties: +- compatible : "pinctrl-single" or "pinconf-single". + "pinctrl-single" means that pinconf isn't supported. + "pinconf-single" means that generic pinconf is supported. + +- reg : offset and length of the register set for the mux registers + +- #pinctrl-cells : number of cells in addition to the index, set to 1 + for pinctrl-single,pins and 2 for pinctrl-single,bits + +- pinctrl-single,register-width : pinmux register access width in bits + +- pinctrl-single,function-mask : mask of allowed pinmux function bits + in the pinmux register + +Optional properties: +- pinctrl-single,function-off : function off mode for disabled state if + available and same for all registers; if not specified, disabling of + pin functions is ignored + +- pinctrl-single,bit-per-mux : boolean to indicate that one register controls + more than one pin, for which "pinctrl-single,function-mask" property specifies + position mask of pin. + +- pinctrl-single,drive-strength : array of value that are used to configure + drive strength in the pinmux register. They're value of drive strength + current and drive strength mask. + + /* drive strength current, mask */ + pinctrl-single,power-source = <0x30 0xf0>; + +- pinctrl-single,bias-pullup : array of value that are used to configure the + input bias pullup in the pinmux register. + + /* input, enabled pullup bits, disabled pullup bits, mask */ + pinctrl-single,bias-pullup = <0 1 0 1>; + +- pinctrl-single,bias-pulldown : array of value that are used to configure the + input bias pulldown in the pinmux register. + + /* input, enabled pulldown bits, disabled pulldown bits, mask */ + pinctrl-single,bias-pulldown = <2 2 0 2>; + + * Two bits to control input bias pullup and pulldown: User should use +pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means +pullup, and the other one bit means pulldown. + * Three bits to control input bias enable, pullup and pulldown. User should +use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias +enable bit should be included in pullup or pulldown bits. + * Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no property as +pinctrl-single,bias-disable. Because pinctrl single driver could implement +it by calling pulldown, pullup disabled. + +- pinctrl-single,input-schmitt : array of value that are used to configure + input schmitt in the pinmux register. In some silicons, there're two input + schmitt value (rising-edge & falling-edge) in the pinmux register. + + /* input schmitt value, mask */ + pinctrl-single,input-schmitt = <0x30 0x70>; + +- pinctrl-single,input-schmitt-enable : array of value that are used to + configure input schmitt enable or disable in the pinmux register. + + /* input, enable bits, disable bits, mask */ + pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>; + +- pinctrl-single,low-power-mode : array of value that are used to configure + low power mode of this pin. For some silicons, the low power mode will + control the output of the pin when the pad including the pin enter low + power mode. + /* low power mode value, mask */ + pinctrl-single,low-power-mode = <0x288 0x388>; + +- pinctrl-single,gpio-range : list of value that are used to configure a GPIO + range. They're value of subnode phandle, pin base in pinctrl device, pin + number in this range, GPIO function value of this GPIO range. + The number of parameters is depend on #pinctrl-single,gpio-range-cells + property. + + /* pin base, nr pins & gpio function */ + pinctrl-single,gpio-range = < 0 3 0 3 9 1>; + +- interrupt-controller : standard interrupt controller binding if using + interrupts for wake-up events for example. In this case pinctrl-single + is set up as a chained interrupt c
RE: [PATCH v2 1/2] pinctrl: single: Parse gpio details from dt
> -Original Message- > From: Roman Bacik > Sent: Friday, October 1, 2021 3:40 PM > To: U-Boot Mailing List > Cc: Bharat Gooty ; Rayagonda Kokatanur > ; Roman Bacik > ; Dario Binacchi ; > Pratyush Yadav ; Simon Glass ; > Vignesh Raghavendra > Subject: [PATCH v2 1/2] pinctrl: single: Parse gpio details from dt > > From: Bharat Gooty > > Parse different gpio properties from dt as part of probe > function. This detail is required to enable pinctrl pad > later when gpio lines are requested. > > Signed-off-by: Rayagonda Kokatanur > > Signed-off-by: Bharat Gooty > Acked-by: Rayagonda Kokatanur > Signed-off-by: Roman Bacik > --- > > - modified comment before struct single_fpiofunc_range > - add pinctrl-single binding from Linux > - return error from single-probe() > - there is no test to be updated I will add tests to dm_test_pinctrl_single() in test/dm/pinmux.c and add a test node to arch/sandbox/dts/test.dts in version 3. > > .../pinctrl/pinctrl-single.txt| 255 ++ > drivers/pinctrl/pinctrl-single.c | 56 > 2 files changed, 311 insertions(+) > create mode 100644 doc/device-tree-bindings/pinctrl/pinctrl-single.txt > > diff --git a/doc/device-tree-bindings/pinctrl/pinctrl-single.txt b/doc/device- > tree-bindings/pinctrl/pinctrl-single.txt > new file mode 100644 > index ..e705acd3612c > --- /dev/null > +++ b/doc/device-tree-bindings/pinctrl/pinctrl-single.txt > @@ -0,0 +1,255 @@ > +One-register-per-pin type device tree based pinctrl driver > + > +Required properties: > +- compatible : "pinctrl-single" or "pinconf-single". > + "pinctrl-single" means that pinconf isn't supported. > + "pinconf-single" means that generic pinconf is supported. > + > +- reg : offset and length of the register set for the mux registers > + > +- #pinctrl-cells : number of cells in addition to the index, set to 1 > + for pinctrl-single,pins and 2 for pinctrl-single,bits > + > +- pinctrl-single,register-width : pinmux register access width in bits > + > +- pinctrl-single,function-mask : mask of allowed pinmux function bits > + in the pinmux register > + > +Optional properties: > +- pinctrl-single,function-off : function off mode for disabled state if > + available and same for all registers; if not specified, disabling of > + pin functions is ignored > + > +- pinctrl-single,bit-per-mux : boolean to indicate that one register controls > + more than one pin, for which "pinctrl-single,function-mask" property > specifies > + position mask of pin. > + > +- pinctrl-single,drive-strength : array of value that are used to configure > + drive strength in the pinmux register. They're value of drive strength > + current and drive strength mask. > + > + /* drive strength current, mask */ > + pinctrl-single,power-source = <0x30 0xf0>; > + > +- pinctrl-single,bias-pullup : array of value that are used to configure the > + input bias pullup in the pinmux register. > + > + /* input, enabled pullup bits, disabled pullup bits, mask */ > + pinctrl-single,bias-pullup = <0 1 0 1>; > + > +- pinctrl-single,bias-pulldown : array of value that are used to configure the > + input bias pulldown in the pinmux register. > + > + /* input, enabled pulldown bits, disabled pulldown bits, mask > */ > + pinctrl-single,bias-pulldown = <2 2 0 2>; > + > + * Two bits to control input bias pullup and pulldown: User should use > +pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means > +pullup, and the other one bit means pulldown. > + * Three bits to control input bias enable, pullup and pulldown. User should > +use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias > +enable bit should be included in pullup or pulldown bits. > + * Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no > property as > +pinctrl-single,bias-disable. Because pinctrl single driver could implement > +it by calling pulldown, pullup disabled. > + > +- pinctrl-single,input-schmitt : array of value that are used to configure > + input schmitt in the pinmux register. In some silicons, there're two input > + schmitt value (rising-edge & falling-edge) in the pinmux register. > + > + /* input schmitt value, mask */ > + pinctrl-single,input-schmitt = <0x30 0x70>; > + > +- pinctrl-single,input-schmitt-enable : array of value that are used to > + configure input schmitt enable or disable in the pinmux register. > + > +
[PATCH v2 2/2] pinctrl: single: Add request() api
From: Bharat Gooty
Add pinctrl_ops->request api to configure pctrl
pad register in gpio mode.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Gooty
Acked-by: Rayagonda Kokatanur
Reviewed-by: Simon Glass
Signed-off-by: Roman Bacik
---
(no changes since v1)
drivers/pinctrl/pinctrl-single.c | 34
1 file changed, 34 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-single.c b/drivers/pinctrl/pinctrl-single.c
index c68d48d7fbcc..1c250add1d73 100644
--- a/drivers/pinctrl/pinctrl-single.c
+++ b/drivers/pinctrl/pinctrl-single.c
@@ -250,6 +250,39 @@ static int single_get_pin_muxing(struct udevice *dev,
unsigned int pin,
return 0;
}
+static int single_request(struct udevice *dev, int pin, int flags)
+{
+ struct single_priv *priv = dev_get_priv(dev);
+ struct single_pdata *pdata = dev_get_plat(dev);
+ struct single_gpiofunc_range *frange = NULL;
+ struct list_head *pos, *tmp;
+ phys_addr_t reg;
+ int mux_bytes = 0;
+ u32 data;
+
+ /* If function mask is null, needn't enable it. */
+ if (!pdata->mask)
+ return -ENOTSUPP;
+
+ list_for_each_safe(pos, tmp, >gpiofuncs) {
+ frange = list_entry(pos, struct single_gpiofunc_range, node);
+ if ((pin >= frange->offset + frange->npins) ||
+ pin < frange->offset)
+ continue;
+
+ mux_bytes = pdata->width / BITS_PER_BYTE;
+ reg = pdata->base + pin * mux_bytes;
+
+ data = single_read(dev, reg);
+ data &= ~pdata->mask;
+ data |= frange->gpiofunc;
+ single_write(dev, data, reg);
+ break;
+ }
+
+ return 0;
+}
+
static struct single_func *single_allocate_function(struct udevice *dev,
unsigned int group_pins)
{
@@ -590,6 +623,7 @@ const struct pinctrl_ops single_pinctrl_ops = {
.get_pin_name = single_get_pin_name,
.set_state = single_set_state,
.get_pin_muxing = single_get_pin_muxing,
+ .request = single_request,
};
static const struct udevice_id single_pinctrl_match[] = {
--
2.17.1
--
This electronic communication and the information and any files transmitted
with it, or attached to it, are confidential and are intended solely for
the use of the individual or entity to whom it is addressed and may contain
information that is confidential, legally privileged, protected by privacy
laws, or otherwise restricted from disclosure to anyone else. If you are
not the intended recipient or the person responsible for delivering the
e-mail to the intended recipient, you are hereby notified that any use,
copying, distributing, dissemination, forwarding, printing, or copying of
this e-mail is strictly prohibited. If you received this e-mail in error,
please return the e-mail to the sender, delete it from your computer, and
destroy any printed copy of it.
smime.p7s
Description: S/MIME Cryptographic Signature
[PATCH v2 1/2] pinctrl: single: Parse gpio details from dt
From: Bharat Gooty Parse different gpio properties from dt as part of probe function. This detail is required to enable pinctrl pad later when gpio lines are requested. Signed-off-by: Rayagonda Kokatanur Signed-off-by: Bharat Gooty Acked-by: Rayagonda Kokatanur Signed-off-by: Roman Bacik --- - modified comment before struct single_fpiofunc_range - add pinctrl-single binding from Linux - return error from single-probe() - there is no test to be updated .../pinctrl/pinctrl-single.txt| 255 ++ drivers/pinctrl/pinctrl-single.c | 56 2 files changed, 311 insertions(+) create mode 100644 doc/device-tree-bindings/pinctrl/pinctrl-single.txt diff --git a/doc/device-tree-bindings/pinctrl/pinctrl-single.txt b/doc/device-tree-bindings/pinctrl/pinctrl-single.txt new file mode 100644 index ..e705acd3612c --- /dev/null +++ b/doc/device-tree-bindings/pinctrl/pinctrl-single.txt @@ -0,0 +1,255 @@ +One-register-per-pin type device tree based pinctrl driver + +Required properties: +- compatible : "pinctrl-single" or "pinconf-single". + "pinctrl-single" means that pinconf isn't supported. + "pinconf-single" means that generic pinconf is supported. + +- reg : offset and length of the register set for the mux registers + +- #pinctrl-cells : number of cells in addition to the index, set to 1 + for pinctrl-single,pins and 2 for pinctrl-single,bits + +- pinctrl-single,register-width : pinmux register access width in bits + +- pinctrl-single,function-mask : mask of allowed pinmux function bits + in the pinmux register + +Optional properties: +- pinctrl-single,function-off : function off mode for disabled state if + available and same for all registers; if not specified, disabling of + pin functions is ignored + +- pinctrl-single,bit-per-mux : boolean to indicate that one register controls + more than one pin, for which "pinctrl-single,function-mask" property specifies + position mask of pin. + +- pinctrl-single,drive-strength : array of value that are used to configure + drive strength in the pinmux register. They're value of drive strength + current and drive strength mask. + + /* drive strength current, mask */ + pinctrl-single,power-source = <0x30 0xf0>; + +- pinctrl-single,bias-pullup : array of value that are used to configure the + input bias pullup in the pinmux register. + + /* input, enabled pullup bits, disabled pullup bits, mask */ + pinctrl-single,bias-pullup = <0 1 0 1>; + +- pinctrl-single,bias-pulldown : array of value that are used to configure the + input bias pulldown in the pinmux register. + + /* input, enabled pulldown bits, disabled pulldown bits, mask */ + pinctrl-single,bias-pulldown = <2 2 0 2>; + + * Two bits to control input bias pullup and pulldown: User should use +pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means +pullup, and the other one bit means pulldown. + * Three bits to control input bias enable, pullup and pulldown. User should +use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias +enable bit should be included in pullup or pulldown bits. + * Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no property as +pinctrl-single,bias-disable. Because pinctrl single driver could implement +it by calling pulldown, pullup disabled. + +- pinctrl-single,input-schmitt : array of value that are used to configure + input schmitt in the pinmux register. In some silicons, there're two input + schmitt value (rising-edge & falling-edge) in the pinmux register. + + /* input schmitt value, mask */ + pinctrl-single,input-schmitt = <0x30 0x70>; + +- pinctrl-single,input-schmitt-enable : array of value that are used to + configure input schmitt enable or disable in the pinmux register. + + /* input, enable bits, disable bits, mask */ + pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>; + +- pinctrl-single,low-power-mode : array of value that are used to configure + low power mode of this pin. For some silicons, the low power mode will + control the output of the pin when the pad including the pin enter low + power mode. + /* low power mode value, mask */ + pinctrl-single,low-power-mode = <0x288 0x388>; + +- pinctrl-single,gpio-range : list of value that are used to configure a GPIO + range. They're value of subnode phandle, pin base in pinctrl device, pin + number in this range, GPIO function value of this GPIO range. + The number of parameters is depend on #pinctrl-single,gpio-range-cells + property. + + /* pin base, nr pins & gpio function */ + pinctrl-single,gpio-range = < 0 3 0 3 9 1>; + +- interrupt-controller : standard int
