Re: [U-Boot] [PATCH v3 04/10] SPI: Add Orion SPI driver
On 06/03/2013 07:31 PM, Sascha Silbe wrote: From: Sebastian Hesselbarth This adds an SPI driver for Marvell Dove SoCs. This driver is taken from kirkwood_spi but removes mpp configuration as dove has dedicated spi pins. As a future clean-up step, the code for orion5x, kirkwood and dove could be merged, with MPP configuration being be handled as part of cpu/board-specific setup. Signed-off-by: Sebastian Hesselbarth Signed-off-by: Sascha Silbe --- v3->v4: renamed to dove, adjusted description, removed unused variable, made checkpatch clean Sascha, renaming it to dove_spi to obfuscate it is actually a copy of kirkwood_spi that will also work for orion5x and mv78x00 does _not_ match my intention when I posted this driver. Feel free to pick up the patches but it should remain generic for all Orion SoCs. kirkwood_spi has mpp stuff inside that is totally wrong there, move it to board setup and just rename kirkwood_spi to something more generic. Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 05/10] SPI: Add Dove SPI driver
On 06/12/2013 08:58 PM, Jagan Teki wrote: On 03-06-2013 23:50, Jagan Teki wrote: Looks ok to me as per coding style after a quick look. On Mon, May 27, 2013 at 12:06 AM, Sascha Silbe wrote: From: Sebastian Hesselbarth This adds an SPI driver for Marvell Dove SoCs. This driver is taken from kirkwood_spi but removes mpp configuration as dove has dedicated spi pins. As a future clean-up step, the code for orion5x, kirkwood and dove could be merged, with MPP configuration being be handled as part of cpu/board-specific setup. Signed-off-by: Sebastian Hesselbarth Signed-off-by: Sascha Silbe --- v3->v4: renamed to dove, adjusted description, removed unused variable, made checkpatch clean [...] Any update on this. Is any of you even listening? Please do _not_ name it after Dove! It is compatible with _at least_ Kirkwood, Orion5x and MV78x00. Now is the chance to have a common name or you will end up with either non-sense naming or four copies of that very driver. Originally, it was named after the Linux group of SoCs compatible with Dove (orion-spi), IIRC Prafulla suggested mv-spi. Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 05/10] SPI: Add Dove SPI driver
On 06/12/2013 09:30 PM, Jagan Teki wrote: On Thu, Jun 13, 2013 at 12:56 AM, Sebastian Hesselbarth wrote: Is any of you even listening? Please do _not_ name it after Dove! It is compatible with _at least_ Kirkwood, Orion5x and MV78x00. Now is the chance to have a common name or you will end up with either non-sense naming or four copies of that very driver. Originally, it was named after the Linux group of SoCs compatible with Dove (orion-spi), IIRC Prafulla suggested mv-spi. Common to use means orion_spi instead of Dove? Either orion_spi as it was named originally, or mv_spi as Prafulla suggested. Then move mpp (pinctrl) from kirkwood_spi to corresponding boards, switch to orion_/mv_spi, and remove kirkwood_spi. I suggest orion_spi, but Prafulla had his word so it should be mv_spi I guess. Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 05/10] SPI: Add Dove SPI driver
On 06/25/2013 09:33 PM, Sascha Silbe wrote: Sebastian Hesselbarth writes: Either orion_spi as it was named originally, or mv_spi as Prafulla suggested. Then move mpp (pinctrl) from kirkwood_spi to corresponding boards, switch to orion_/mv_spi, and remove kirkwood_spi. I suggest orion_spi, but Prafulla had his word so it should be mv_spi I guess. I've given it a try and modified the Kirkwood GPIO and SPI drivers rather than duplicating their code. As I neither know the Dove SoCs nor have any hardware using them, I don't feel comfortable merging this with any existing orion code. For similar reasons and also for a lack of time I've left the MPP support code in place, just protected with CONFIG_KIRKWOOD. Sascha, I was under the impression that you resent the patches because you have a CuBox you want to get supported. Anyway, I will not get back to u-boot Dove support anytime soon. It just takes to long to get any valuable review/ack from Marvell maintainer. As for the naming: there's already a GPIO driver called mvgpio that looks quite different from the Kirkwood / Dove one. Naming the latter one mv_gpio would work for the build tools, but needlessly cause confusion to developers. Therefore I chose to keep the current names of the Kirkwood drivers (kw_gpio, kirkwood_spi). If anyone has a better suggestion, I'm happy to change the names. Naming was the main discussion of this patch set back then, there have been some "???" on the mpp stuff. I suggested several times not to use "mv" as I knew that Marvell PXA also uses "mv" as prefix all over. The PXA SPI controller is based on different IP. Unfortunately PXA naming is not consitent over SoCs, Dove is also nick-named PXA510 sometimes. Actually, we are merging Orion SoCs and Armada 370/XP to mach-mvebu - so the best name would be mvebu_spi as the spi controller is also in Armada 370/XP. But Prafulla is u-boot Marvell maintainer, he said to use mv prefix - not my call anymore. Sebastian, does the resulting code still match your intentions or would you like me to remove your Signed-off-by from those two patches when posting the updated patch series? Uhm, did you forget to send code? I will not likely get back to Dove support on u-boot. I cannot really re-test on Kirkwood and it just takes to long to get feedback. I suggest to remove my Signed-off-by and especially the MAINTAINERS entry. Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v4 05/10] SPI: Add Dove SPI driver
On 06/25/2013 10:38 PM, Sascha Silbe wrote: Sebastian Hesselbarth writes: [...] I was under the impression that you resent the patches because you have a CuBox you want to get supported. Exactly. I'd like to see support for CuBox enter mainline U-Boot. However, there's also a limit to the amount of time I can afford to spend on it (both per week and in total). TBH, I would have hoped the _vendor_ (SolidRun) would take a more active role in this. For that reason I'm now going to evaluate a Wandboard Quad, where more effort seems to get spent on upstreaming (not to mention that the schematics are available, which makes working on board support a lot easier). When I ordered the CuBox Pro, the then-existing Wandboard variants (Solo and DualLite) lacked SATA support, but the Quad meets my requirements. From what I know, Rabeeh would love to add support for CuBox to u-boot. But I guess his spare time is very limited, too. Naming was the main discussion of this patch set back then, there have been some "???" on the mpp stuff. I suggested several times not to use "mv" as I knew that Marvell PXA also uses "mv" as prefix all over. The PXA SPI controller is based on different IP. Unfortunately PXA naming is not consitent over SoCs, Dove is also nick-named PXA510 sometimes. Actually, we are merging Orion SoCs and Armada 370/XP to mach-mvebu - so the best name would be mvebu_spi as the spi controller is also in Armada 370/XP. You're confusing me even more than I already was. :) It's probably best to leave this reorganisation to someone else who better knows the relationships between the several SoC families from Marvell. Linux has some good overview of the non-PXA Marvell SoCs. Naming is a mess and IP is reused often. But from what I can say, Orion matches Dove, Kirkwood, Orion5x, and Discovery Innovation (mv78x00). Armada 370/XP share some of the peripheral IP but especially irq is different. With respect to SPI, mvebu (Orion + Armada 370/XP) maybe matches best as it is used in all of them with minor differences. PXA type SoCs use a different IP for SPI. [...] Uhm, did you forget to send code? No, I was holding back until I knew whether you still feel comfortable being associated with the patches. I'll send them out now. Ok, I will try to give it a review at least. Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v5 3/8] GPIO: add Dove support to Kirkwood GPIO driver
On 06/25/2013 11:27 PM, Sascha Silbe wrote:
The GPIO support of Dove is very similar to that on Kirkwood (and
possibly orion5x as well). Instead of duplicating the code, we tweak
the Kirkwood driver so it works for Dove, too.
Signed-off-by: Sascha Silbe
---
[...]
diff --git a/drivers/gpio/kw_gpio.c b/drivers/gpio/kw_gpio.c
index 51a826d..d6fdb69 100644
--- a/drivers/gpio/kw_gpio.c
+++ b/drivers/gpio/kw_gpio.c
@@ -1,7 +1,11 @@
/*
- * arch/arm/plat-orion/gpio.c
+ * Marvell Dove and Kirkwood SoC GPIO handling
*
- * Marvell Orion SoC GPIO handling.
+ * Sebastian Hesselbarth
+ *
+ * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
+ * Removed orion_gpiochip struct and kernel level irq handling.
+ * Dieter Kiermaier dk-arm-li...@gmx.de
*
[...]
int kw_gpio_is_valid(unsigned pin, int mode)
@@ -88,7 +88,7 @@ int kw_gpio_is_valid(unsigned pin, int mode)
}
err_out:
- printf("%s: invalid GPIO %d\n", __func__, pin);
+printf("%s: invalid GPIO %d/%d\n", __func__, pin, GPIO_MAX);
nit: indent with TAB
Sebastian
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Re: [U-Boot] [PATCH v5 1/8] ARM: dove: add support for Marvell Dove SoC
On 06/25/2013 11:27 PM, Sascha Silbe wrote: This patch adds initial support for the armv7-based Marvell Dove SoC (88AP510). Signed-off-by: Sascha Silbe --- v4->v5: some adjustments for the GPIO and SPI driver changes [...] diff --git a/arch/arm/include/asm/arch-dove/config.h b/arch/arm/include/asm/arch-dove/config.h new file mode 100644 index 000..38bf6ce --- /dev/null +++ b/arch/arm/include/asm/arch-dove/config.h @@ -0,0 +1,153 @@ +/* + * Marvell SoC config + * + * Sebastian Hesselbarth + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _DOVE_CONFIG_H +#define _DOVE_CONFIG_H + +#include + +#define CONFIG_ARMV7 /* Basic Architecture */ +#define CONFIG_DOVE/* SOC Family Name */ +#define CONFIG_SHEEVA_88SV581 /* CPU Core subversion */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + /* default Dcache Line length for Dove */ +#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH +#define CONFIG_SYS_DCACHE_OFF /* Disable DCache by default */ + +/* + * By default kwbimage.cfg from board specific folder is used + * If for some board, different configuration file need to be used, + * CONFIG_SYS_KWD_CONFIG should be defined in board specific header file + */ +#ifndef CONFIG_SYS_KWD_CONFIG +#defineCONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg +#endif /* CONFIG_SYS_KWD_CONFIG */ + +/* Dove has 2k of Security SRAM, use it for SP */ +#define CONFIG_SYS_INIT_SP_ADDR0xC8012000 Actually, DOVE_DEFADR_SASRAM remaps security SRAM to 0xc800. Maybe it just works because addresses are wrapped around each 2k bytes. I suggest to set the above to 0xc8000800 or use (DOVE_DEFADR_SASRAM | 0x800) +#define CONFIG_NR_DRAM_BANKS_MAX 2 + +#define CONFIG_I2C_MVTWSI_BASE DOVE_TWSI_BASE +#define MV_UART_CONSOLE_BASE DOVE_UART0_BASE +#define MV_SATA_BASE DOVE_SATA_BASE +#define MV_SATA_PORT0_OFFSET DOVE_SATA_PORT0_OFFSET + +/* + * NAND configuration + */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_NAND_KIRKWOOD 1 +#define CONFIG_SYS_NAND_BASE 0xD800 /* MV_DEFADR_NANDF */ +#define NAND_ALLOW_ERASE_ALL 1 +#endif Knowing the SoC now better, I can say that NAND controller is kind of different from Kirkwood. Especially, the above NAND_BASE relies on a proper address window remap that is not done yet on Dove init code. I suggest to remove the whole NAND ifdef above until proper NAND driver is available. [...] +/* CONFIG_CMD_IDE requires some #defines for ATA registers */ +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_IDE_MAXDEVICE 2 Dove SoC only has a single SATA port, so I guess above defines should be set to 1. [...] diff --git a/arch/arm/include/asm/arch-dove/cpu.h b/arch/arm/include/asm/arch-dove/cpu.h new file mode 100644 index 000..718dd59 --- /dev/null +++ b/arch/arm/include/asm/arch-dove/cpu.h @@ -0,0 +1,204 @@ +/* + * Marvell Dove SoC CPU + * + * Sebastian Hesselbarth + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _DOVECPU_H +#define _DOVECPU_H + +#include + +#ifndef __ASSEMBLY__ + +#define DOVECPU_WIN_CTRL_DATA(size, target, attr, en) (en | (target<< 4) \ + | (attr<< 8) | (dove_winctrl_calcsize(size)<< 16)) + +#define DOVEGBE_PORT_SERIAL_CONTROL1_REG (DOVE_EGIGA_BASE + 0x44c) +#define DOVE_REG_PCIE_DEVID
Re: [U-Boot] [PATCH v5 5/8] SPI: add Dove support to Kirkwood SPI driver
On 06/25/2013 11:27 PM, Sascha Silbe wrote:
The SPI support on Dove is very similar to that on Kirkwood (and
possibly orion5x as well). Instead of duplicating the code, we tweak
the Kirkwood driver so it works for Dove, too.
Signed-off-by: Sascha Silbe
---
v4->v5: Modify Kirkwood driver rather than duplicating it.
The patch description might do with slightly more detail, but I'd
like some feedback on the approach first. The patch itself should be
pretty self-explanatory.
arch/arm/include/asm/arch-kirkwood/spi.h | 27 --
drivers/spi/kirkwood_spi.c | 47 +---
2 files changed, 43 insertions(+), 31 deletions(-)
diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h
b/arch/arm/include/asm/arch-kirkwood/spi.h
index 113f258..4145f62 100644
--- a/arch/arm/include/asm/arch-kirkwood/spi.h
+++ b/arch/arm/include/asm/arch-kirkwood/spi.h
@@ -27,16 +27,6 @@
#ifndef __KW_SPI_H__
#define __KW_SPI_H__
-/* SPI Registers on kirkwood SOC */
-struct kwspi_registers {
- u32 ctrl; /* 0x10600 */
- u32 cfg;/* 0x10604 */
- u32 dout; /* 0x10608 */
- u32 din;/* 0x1060c */
- u32 irq_cause; /* 0x10610 */
- u32 irq_mask; /* 0x10614 */
-};
-
/* They are used to define CONFIG_SYS_KW_SPI_MPP
* each of the below #defines selects which mpp is
* configured for each SPI signal in spi_claim_bus
@@ -48,21 +38,4 @@ struct kwspi_registers {
#define SCK_MPP10 (1<< 1)
#define MISO_MPP11(1<< 2)
-#define KWSPI_CLKPRESCL_MASK 0x1f
-#define KWSPI_CLKPRESCL_MIN0x12
-#define KWSPI_CSN_ACT 1 /* Activates serial memory interface */
-#define KWSPI_SMEMRDY (1<< 1) /* SerMem Data xfer ready */
-#define KWSPI_IRQUNMASK1 /* unmask SPI interrupt */
-#define KWSPI_IRQMASK 0 /* mask SPI interrupt */
-#define KWSPI_SMEMRDIRQ1 /* SerMem data xfer ready irq */
-#define KWSPI_XFERLEN_1BYTE0
-#define KWSPI_XFERLEN_2BYTE(1<< 5)
-#define KWSPI_XFERLEN_MASK (1<< 5)
-#define KWSPI_ADRLEN_1BYTE 0
-#define KWSPI_ADRLEN_2BYTE 1<< 8
-#define KWSPI_ADRLEN_3BYTE 2<< 8
-#define KWSPI_ADRLEN_4BYTE 3<< 8
-#define KWSPI_ADRLEN_MASK 3<< 8
-#define KWSPI_TIMEOUT 1
-
#endif /* __KW_SPI_H__ */
diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index caa91e3..4e4c814 100644
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -28,23 +28,58 @@
#include
#include
#include
-#include
-#include
-#include
+#include
-static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE;
+/* SPI Registers on Dove/Kirkwood SOC */
+struct kwspi_registers {
+ u32 ctrl; /* 0x00 */
+ u32 cfg;/* 0x04 */
+ u32 dout; /* 0x08 */
+ u32 din;/* 0x0c */
+ u32 irq_cause; /* 0x10 */
+ u32 irq_mask; /* 0x14 */
+};
+#if defined(CONFIG_KIRKWOOD)
+static struct kwspi_registers *spireg =
+(struct kwspi_registers *)KW_SPI_BASE;
+#elif defined(CONFIG_DOVE)
+static struct kwspi_registers *spireg =
+(struct kwspi_registers *)DOVE_SPI_BASE;
+#endif
+
+#define KWSPI_CLKPRESCL_MASK 0x1f
+#define KWSPI_CLKPRESCL_MIN0x12
After I looked deeper in Dove FS SPI registers today, I can now say that
Dove SPI allows some more prescaler settings. Nothing critical, as
kirkwood_spi finds the closest spi clock rate less that requested
frequency. By not using the extended prescaler, you may end up with
spi clock running slower than possible but it will not break anything.
Sebastian
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Re: [U-Boot] [PATCH v5 8/8] Boards: Add support for SolidRun CuBox
On 06/25/2013 11:27 PM, Sascha Silbe wrote: With latest support for Marvell Dove SoC, add the SolidRun CuBox as the very first board with that SoC. Three variants are provided: 1. A regular SPI boot image for CuBox (1GiB) The CuBox (without "Pro") has 1GiB of memory. 2. A regular SPI boot image for CuBox Pro (2GiB) The CuBox Pro has 2GiB of memory. Because larger SDRAM chips are used, tRFC needs to be longer than on the 1GiB variant. 3. A UART boot image for both CuBox and CuBox Pro This is just for recovery purposes, so the smaller memory map (on CuBox Pro) and slower SDRAM access (on CuBox) doesn't matter. Having a single image that works on both hardware variants is quite convenient during recovery. Signed-off-by: Sascha Silbe --- [...] diff --git a/boards.cfg b/boards.cfg index c0c4282..3605d3a 100644 --- a/boards.cfg +++ b/boards.cfg @@ -331,6 +331,9 @@ dalmore arm armv7:arm720t dalmore nvidia colibri_t20_iris arm armv7:arm720t colibri_t20_iris toradextegra20 u8500_href arm armv7 u8500 st-ericssonu8500 snowball arm armv7 snowball st-ericssonu8500 +cuboxarm armv7 cubox solidrun dovecubox:CUBOX_1GB +cubox_proarm armv7 cubox solidrun dovecubox:CUBOX_2GB +cubox_uart arm armv7 cubox solidrun dovecubox:CUBOX_UART_BOOT How about CUBOX_SPI_1GB, CUBOX_SPI_2GB, CUBOX_UART ? Also, sort order in boards.cfg should be ARCH (arm), CPU (armv7), SoC (dove), Vendor (solidrun), Target kzm9garm armv7 kzm9g kmc rmobile armadillo-800eva arm armv7 armadillo-800eva atmark-techno rmobile zynq arm armv7 zynq xilinx zynq diff --git a/include/configs/cubox.h b/include/configs/cubox.h new file mode 100644 index 000..7d5845c --- /dev/null +++ b/include/configs/cubox.h @@ -0,0 +1,185 @@ +/* + * SolidRun CuBox config + * + * Sebastian Hesselbarth + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#ifndef _CONFIG_CUBOX_H +#define _CONFIG_CUBOX_H +#include + +/* + * Version number information + */ +#define CONFIG_IDENT_STRING"SolidRun CuBox" + +#undef CONFIG_SYS_KWD_CONFIG +#if defined(CONFIG_CUBOX_UART_BOOT) +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-uart.cfg +#elif defined(CONFIG_CUBOX_1GB) +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-spi-1gb.cfg +#elif defined(CONFIG_CUBOX_2GB) +#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-spi-2gb.cfg +#endif ditto wrt to CONFIG_CUBOX_* Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 01/10] ARM: dove: add support for Marvell Dove SoC
Prafulla,
thanks for the review. I added some notes below at your comments.
On 02/11/2013 04:39 AM, Prafulla Wadaskar wrote:
[...]
diff --git a/arch/arm/cpu/armv7/dove/mpp.c
b/arch/arm/cpu/armv7/dove/mpp.c
new file mode 100644
index 000..ed24b38
--- /dev/null
+++ b/arch/arm/cpu/armv7/dove/mpp.c
@@ -0,0 +1,318 @@
[...]
+/*
+ * MPP0-23 have standard MPP register layout
+ */
+static void dove_mpp_std_set(u16 config)
+{
+ u8 num = MPP_NUM(config);
+ u32 off = (num / MPPS_PER_REG) * MPP_BITS;
+ u32 shift = (num % MPPS_PER_REG) * MPP_BITS;
+ u32 reg;
+
+ /* configure standard MPP pin */
+ reg = readl(MPP_CTRL(off));
+ reg&= ~(MPP_MASK<< shift);
+ reg |= MPP_SEL(config)<< shift;
+ writel(reg, MPP_CTRL(off));
+
+ /* configure gpio capabilities */
+ if (MPP_GPIO(config))
+ orion_gpio_set_valid(num, GPIO_INPUT_OK | GPIO_OUTPUT_OK);
+ else
+ orion_gpio_set_valid(num, 0);
Why it is orion_gpio*? it should be generic API call or SoC specific.
Dove is reusing orion gpio, orion refers to the SoC family not orion5x.
+}
+
+/*
+ * MPP0-15 also allow to mux PMU functions
+ */
+static void dove_mpp_pmu_set(u16 config)
+{
+ u8 num = MPP_NUM(config);
+
+ if (MPP_SEL(config) == PMU) {
+ /* enable PMU on MPP */
+ writel(readl(MPP_PMU_GENERAL_CTRL) | (1<< num),
+MPP_PMU_GENERAL_CTRL);
+ /* disable gpio capabilities */
+ orion_gpio_set_valid(num, 0);
I think you are trying to reuse the framework implemented by orion,
You may move generic part from orion to common area so that you can use it.
Using other SoC direct calls doesn't sound good to me.
Kirkwood and others using orion_gpio have very regular layout of mpp pins and
gpio functionality, i.e. you have one pin with one mpp layout and if you want
it to be gpio you choose "gpio" as it's mpp function.
Well, Dove is different here. You first have mpp0-15 which can be either
"normal" mpp pins _or_ assigned to power management unit (pmu). Then there
are mpp groups where more than one pin is controlled by a single mpp register
value. As there are some groups that have some of the pins configured as gpios
while others carry a special function, I chose to have gpio capabilities
configured by mpp code not by gpio function.
[...]
diff --git a/arch/arm/include/asm/arch-dove/config.h
b/arch/arm/include/asm/arch-dove/config.h
new file mode 100644
index 000..2d94a48
--- /dev/null
+++ b/arch/arm/include/asm/arch-dove/config.h
@@ -0,0 +1,153 @@
[...]
+/*
+ * By default kwbimage.cfg from board specific folder is used
I think you should use dvbimage.cfg naming convention, since kwb stands for
Kirkwood boot image, same way it will be dove boot image
With recent discussion about renaming kwboot to mvboot, shouldn't this
become mvbimage.cfg?
+ * If for some board, different configuration file need to be used,
+ * CONFIG_SYS_KWD_CONFIG should be defined in board specific header
file
+ */
+#ifndef CONFIG_SYS_KWD_CONFIG
+#define CONFIG_SYS_KWD_CONFIG
$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage.cfg
+#endif /* CONFIG_SYS_KWD_CONFIG */
Same: change all references to DOVE, secondly do you think DV is better than
DOVE to shorten then name everywhere like KW for Kirkwood?
Ditto, rename KWD to MV or MVB?
[...]
+/*
+ * SPI Flash configuration
+ */
+#ifdef CONFIG_CMD_SF
+#define CONFIG_HARD_SPI 1
+#define CONFIG_ORION_SPI 1
+#define ORION_SPI_BASE DOVE_SPI_BASE
???
Again, Orion refers to SoC family and Dove is reusing the driver.
Sebastian
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Re: [U-Boot] [PATCH v3 02/10] GPIO: add gpio driver for Orion SoCs
On 02/11/2013 04:39 AM, Prafulla Wadaskar wrote: -Original Message- From: Sebastian Hesselbarth [mailto:sebastian.hesselba...@gmail.com] Sent: 17 January 2013 00:55 To: Sebastian Hesselbarth Cc: u-boot@lists.denx.de; Rabeeh Khoury; Albert Aribaud; Prafulla Wadaskar; Andy Fleming; Joe Hershberger; Daniel Stodden; Luka Perkov Subject: [PATCH v3 02/10] GPIO: add gpio driver for Orion SoCs This adds a gpio driver for Marvell Orion SoCs, i.e. orion5x, kirkwood, dove. This is based on kw_gpio but as gpio capabilities depend heavily on the mpp configuration for dove, it allows to set gpi/gpo capabilities from mpp. This should be compatible with the current kw_gpio and porting mpp of kirkwood and orion5x is appreciated. Nack, your patch series is for dove, you shouldn't add for orion, unless you are using it. If you think this is common framework can be used across the other marvell SoCs, we have strategy to name it like mv_*** So you may name this driver as mv_gpio Prafulla, I still think that mv_ as a prefix is too short. Remember that Marvell also has pxa SoCs and with latest SoCs handling of gpio may change dramatically. We should rather stick to orion_ for Orion5x, Kirkwood, Dove or move to mvebu_ for above plus Armada XP/370. Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3 08/10] NET: mvgbe: add support for Dove
On 02/11/2013 04:39 AM, Prafulla Wadaskar wrote: -Original Message- From: Sebastian Hesselbarth [mailto:sebastian.hesselba...@gmail.com] Sent: 17 January 2013 00:55 To: Sebastian Hesselbarth Cc: u-boot@lists.denx.de; Rabeeh Khoury; Albert Aribaud; Prafulla Wadaskar; Andy Fleming; Joe Hershberger; Daniel Stodden; Luka Perkov Subject: [PATCH v3 08/10] NET: mvgbe: add support for Dove Marvell Dove also uses mvgbe as ethernet driver, therefore add support for Dove to reuse the current driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov --- drivers/net/mvgbe.c |2 ++ drivers/net/mvgbe.h |7 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 192c989..590ea0b 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -43,6 +43,8 @@ #include #elif defined(CONFIG_ORION5X) #include +#elif defined(CONFIG_DOVE) +#include #endif #include "mvgbe.h" diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index d8a5429..7f5d98f 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -308,10 +308,17 @@ #define EBAR_TARGET_GUNIT 0x0007 /* Window attrib */ +#if defined(CONFIG_DOVE) +#define EBAR_DRAM_CS0 0x +#define EBAR_DRAM_CS1 0x +#define EBAR_DRAM_CS2 0x +#define EBAR_DRAM_CS3 0x What does this means? May you please explain? These are ORed with other BAR values within mvgbe and control access of mvgbe bus master to sdram. In contrast to Kirkwood, Dove has only one sdram target interface with attribute 0x0 while Kirkwood has four different target IDs each for one sdram bank. Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 00/10] Add Marvell Dove and SolidRun CuBox
This patch set add support for the Marvell Dove 88AP510 SoC and the SolidRun CuBox board based on that SoC. The patch set is divided into the four following sections: (1) Patches 1-5: Add support for the Dove SoC and related drivers. Where possible drivers from Marvell Kirkwood are reused (mvsata, mvgbe), or forked to allow more generic usage (SPI, GPIO). The SDHCI driver is different and a new driver is added for it. The forked drivers can also be reused on Kirkwood but that would have required patching existing boards. (2) Patches 6-8: Allow mvgbe to use the phylib API, add support for 88E1310 PHY and allow Dove to use the driver. (3) Patch 9 Add the SolidRun CuBox as the first board based on Marvell Dove SoC. (4) Patch 10 Add support for different UART boot mode found on Dove. Sebastian Hesselbarth (10): ARM: dove: add support for Marvell Dove SoC GPIO: add gpio driver for Orion SoCs MMC: sdhci: Add support for dove sdhci SPI: Add Orion SPI driver block: mvsata: add dove include NET: phy: add 88E1310 PHY initialization NET: mvgbe: add phylib support NET: mvgbe: add support for Dove Boards: Add support for SolidRun CuBox tools: Add support for Dove to kwboot arch/arm/cpu/armv7/dove/Makefile| 49 + arch/arm/cpu/armv7/dove/cpu.c | 266 ++ arch/arm/cpu/armv7/dove/dram.c | 116 +++ arch/arm/cpu/armv7/dove/lowlevel_init.S | 83 arch/arm/cpu/armv7/dove/mpp.c | 319 +++ arch/arm/cpu/armv7/dove/timer.c | 176 + arch/arm/cpu/armv7/dove/usb.c | 101 ++ arch/arm/include/asm/arch-dove/config.h | 153 +++ arch/arm/include/asm/arch-dove/cpu.h| 204 arch/arm/include/asm/arch-dove/dove.h | 93 + arch/arm/include/asm/arch-dove/gpio.h | 35 arch/arm/include/asm/arch-dove/mpp.h| 283 +++ board/solidrun/cubox/Makefile | 45 + board/solidrun/cubox/cubox.c| 141 ++ board/solidrun/cubox/kwbimage.cfg | 76 boards.cfg |1 + drivers/block/mvsata_ide.c |2 + drivers/gpio/Makefile |1 + drivers/gpio/orion_gpio.c | 167 drivers/mmc/Makefile|1 + drivers/mmc/dove_sdhci.c| 101 ++ drivers/net/mvgbe.c | 70 ++- drivers/net/mvgbe.h |7 + drivers/net/phy/marvell.c | 48 + drivers/spi/Makefile|1 + drivers/spi/orion_spi.c | 217 + include/configs/cubox.h | 175 + include/orion_gpio.h| 64 +++ tools/Makefile |2 + tools/kwboot.c | 44 - 30 files changed, 3033 insertions(+), 8 deletions(-) create mode 100644 arch/arm/cpu/armv7/dove/Makefile create mode 100644 arch/arm/cpu/armv7/dove/cpu.c create mode 100644 arch/arm/cpu/armv7/dove/dram.c create mode 100644 arch/arm/cpu/armv7/dove/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/dove/mpp.c create mode 100644 arch/arm/cpu/armv7/dove/timer.c create mode 100644 arch/arm/cpu/armv7/dove/usb.c create mode 100644 arch/arm/include/asm/arch-dove/config.h create mode 100644 arch/arm/include/asm/arch-dove/cpu.h create mode 100644 arch/arm/include/asm/arch-dove/dove.h create mode 100644 arch/arm/include/asm/arch-dove/gpio.h create mode 100644 arch/arm/include/asm/arch-dove/mpp.h create mode 100644 board/solidrun/cubox/Makefile create mode 100644 board/solidrun/cubox/cubox.c create mode 100644 board/solidrun/cubox/kwbimage.cfg create mode 100644 drivers/gpio/orion_gpio.c create mode 100644 drivers/mmc/dove_sdhci.c create mode 100644 drivers/spi/orion_spi.c create mode 100644 include/configs/cubox.h create mode 100644 include/orion_gpio.h --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Dieter Kiermaier -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/10] GPIO: add gpio driver for Orion SoCs
This adds a gpio driver for Marvell Orion SoCs, i.e. orion5x, kirkwood,
dove. This is based on kw_gpio but as gpio capabilities depend heavily
on the mpp configuration for dove, it allows to set gpi/gpo capabilities
from mpp. This should be compatible with the current kw_gpio and porting
mpp of kirkwood and orion5x is appreciated.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Dieter Kiermaier
---
drivers/gpio/Makefile |1 +
drivers/gpio/orion_gpio.c | 167 +
include/orion_gpio.h | 64 +
3 files changed, 232 insertions(+)
create mode 100644 drivers/gpio/orion_gpio.c
create mode 100644 include/orion_gpio.h
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index d50ac3b..6fc163b 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB:= $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
+COBJS-$(CONFIG_ORION_GPIO) += orion_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP)+= mvmfp.o
diff --git a/drivers/gpio/orion_gpio.c b/drivers/gpio/orion_gpio.c
new file mode 100644
index 000..209354d
--- /dev/null
+++ b/drivers/gpio/orion_gpio.c
@@ -0,0 +1,167 @@
+/*
+ * Marvell Orion SoC GPIO handling.
+ *
+ * Sebastian Hesselbarth
+ *
+ * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
+ * Removed orion_gpiochip struct and kernel level irq handling.
+ * Dieter Kiermaier dk-arm-li...@gmx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
+static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
+
+void __set_direction(unsigned pin, int input)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_IO_CONF(base));
+ if (input)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_IO_CONF(base));
+
+ u = readl(GPIO_IO_CONF(base));
+}
+
+void __set_level(unsigned pin, int high)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_OUT(base));
+ if (high)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_OUT(base));
+}
+
+void __set_blinking(unsigned pin, int blink)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_BLINK_EN(base));
+ if (blink)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_BLINK_EN(base));
+}
+
+int orion_gpio_is_valid(unsigned pin, int mode)
+{
+ if (pin < GPIO_MAX) {
+ if ((mode & GPIO_INPUT_OK) &&
+ !test_bit(pin, gpio_valid_input))
+ goto err_out;
+
+ if ((mode & GPIO_OUTPUT_OK) &&
+ !test_bit(pin, gpio_valid_output))
+ goto err_out;
+ return 0;
+ }
+
+err_out:
+ printf("%s: invalid GPIO %d/%d\n", __func__, pin, GPIO_MAX);
+ return 1;
+}
+
+void orion_gpio_set_valid(unsigned pin, int mode)
+{
+ if (mode & GPIO_INPUT_OK)
+ __set_bit(pin, gpio_valid_input);
+ else
+ __clear_bit(pin, gpio_valid_input);
+ if (mode & GPIO_OUTPUT_OK)
+ __set_bit(pin, gpio_valid_output);
+ else
+ __clear_bit(pin, gpio_valid_output);
+}
+
+/*
+ * GENERIC_GPIO primitives.
+ */
+int orion_gpio_direction_input(unsigned pin)
+{
+ if (orion_gpio_is_valid(pin, GPIO_INPUT_OK) != 0)
+ return 1;
+
+ /* Configure GPIO direction. */
+ __set_direction(pin, 1);
+
+ return 0;
+}
+
+int orion_gpio_direction_output(unsigned pin, int value)
+{
+
[U-Boot] [PATCH 04/10] SPI: Add Orion SPI driver
This adds an SPI driver found on Marvell Orion SoCs. This driver is
taken from kirkwood_spi but removes mpp configuration as dove has
dedicated spi pins. To have a common driver for orion5x, kirkwood,
and dove, mpp configuration should be handled in some cpu/board-specific
setup.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Dieter Kiermaier
---
drivers/spi/Makefile|1 +
drivers/spi/orion_spi.c | 217 +++
2 files changed, 218 insertions(+)
create mode 100644 drivers/spi/orion_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index f0b82c6..679ba61 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -34,6 +34,7 @@ COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
COBJS-$(CONFIG_CF_SPI) += cf_spi.o
COBJS-$(CONFIG_CF_QSPI) += cf_qspi.o
COBJS-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
+COBJS-$(CONFIG_ORION_SPI) += orion_spi.o
COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
diff --git a/drivers/spi/orion_spi.c b/drivers/spi/orion_spi.c
new file mode 100644
index 000..8a50531
--- /dev/null
+++ b/drivers/spi/orion_spi.c
@@ -0,0 +1,217 @@
+/*
+ * Marvell Orion SoCs common spi driver
+ *
+ * Sebastian Hesselbarth
+ * based on kirkwood_spi.c written by
+ * Prafulla Wadaskar
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/* SPI Registers on orion SOC */
+struct orionspi_registers {
+ u32 ctrl; /* 0x00 */
+ u32 cfg;/* 0x04 */
+ u32 dout; /* 0x08 */
+ u32 din;/* 0x0c */
+ u32 irq_cause; /* 0x10 */
+ u32 irq_mask; /* 0x14 */
+};
+
+#define ORIONSPI_CLKPRESCL_MASK0x1f
+#define ORIONSPI_CLKPRESCL_MIN 0x12
+#define ORIONSPI_CSN_ACT 1 /* Activates serial memory interface */
+#define ORIONSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */
+#define ORIONSPI_IRQUNMASK 1 /* unmask SPI interrupt */
+#define ORIONSPI_IRQMASK 0 /* mask SPI interrupt */
+#define ORIONSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */
+#define ORIONSPI_XFERLEN_1BYTE 0
+#define ORIONSPI_XFERLEN_2BYTE (1 << 5)
+#define ORIONSPI_XFERLEN_MASK (1 << 5)
+#define ORIONSPI_ADRLEN_1BYTE 0
+#define ORIONSPI_ADRLEN_2BYTE (1 << 8)
+#define ORIONSPI_ADRLEN_3BYTE (2 << 8)
+#define ORIONSPI_ADRLEN_4BYTE (3 << 8)
+#define ORIONSPI_ADRLEN_MASK (3 << 8)
+#define ORIONSPI_TIMEOUT 1
+
+static struct orionspi_registers *spireg =
+ (struct orionspi_registers *)ORION_SPI_BASE;
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct spi_slave *slave;
+ u32 data;
+ u32 kwspi_mpp_config[] = { 0, 0 };
+
+ if (!spi_cs_is_valid(bus, cs))
+ return NULL;
+
+ slave = malloc(sizeof(struct spi_slave));
+ if (!slave)
+ return NULL;
+
+ slave->bus = bus;
+ slave->cs = cs;
+
+ writel(~ORIONSPI_CSN_ACT | ORIONSPI_SMEMRDY, &spireg->ctrl);
+
+ /* calculate spi clock prescaller using max_hz */
+ data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;
+ data = data < ORIONSPI_CLKPRESCL_MIN ? ORIONSPI_CLKPRESCL_MIN : data;
+ data = data > ORIONSPI_CLKPRESCL_MASK ? ORIONSPI_CLKPRESCL_MASK : data;
+
+ /* program spi clock prescaller using max_hz */
+ writel(ORIONSPI_ADRLEN_3BYTE | data, &spireg->cfg);
+ debug("data = 0x%08x\n", data);
+
+ writel(ORIONSPI_SMEMRDIRQ, &spireg->irq_cause);
+ writel(ORIONSPI_IRQMASK, &spireg->irq_mask);
+
+ return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ free(slave);
+}
+
+#if defined(CONFIG_SYS_KW_SPI_MPP)
+u32 spi_mpp_backup[4];
+#endif
+
+__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave)
+{
+ return 0;
[U-Boot] [PATCH 05/10] block: mvsata: add dove include
Dove SoC also uses mvsata, therefore add a SoC specific include to allow to reuse the mvsata ide driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Dieter Kiermaier --- drivers/block/mvsata_ide.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c index a88d0f7..9918f80 100644 --- a/drivers/block/mvsata_ide.c +++ b/drivers/block/mvsata_ide.c @@ -29,6 +29,8 @@ #include #elif defined(CONFIG_KIRKWOOD) #include +#elif defined(CONFIG_DOVE) +#include #endif /* SATA port registers */ -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/10] NET: phy: add 88E1310 PHY initialization
This adds PHY initialization for Marvell Alaska 88E1310 PHY.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Dieter Kiermaier
---
drivers/net/phy/marvell.c | 48 +
1 file changed, 48 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index e51e799..e920212 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -89,6 +89,12 @@
#define MIIM_88E1149_PHY_PAGE 29
+/* 88E1310 PHY defines */
+#define MIIM_88E1310_PHY_LED_CTRL 16
+#define MIIM_88E1310_PHY_IRQ_EN18
+#define MIIM_88E1310_PHY_RGMII_CTRL21
+#define MIIM_88E1310_PHY_PAGE 22
+
/* Marvell 88E1011S */
static int m88e1011s_config(struct phy_device *phydev)
{
@@ -394,6 +400,37 @@ static int m88e1149_config(struct phy_device *phydev)
return 0;
}
+/* Marvell 88E1310 */
+static int m88e1310_config(struct phy_device *phydev)
+{
+ u16 reg;
+
+ /* LED link and activity */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0003);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL);
+ reg = (reg & ~0xf) | 0x1;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL, reg);
+
+ /* Set LED2/INT to INT mode, low active */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0003);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN);
+ reg = (reg & 0x77ff) | 0x0880;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN, reg);
+
+ /* Set RGMII delay */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0002);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL);
+ reg |= 0x0030;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL, reg);
+
+ /* Ensure to return to page 0 */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x);
+
+ genphy_config_aneg(phydev);
+ phy_reset(phydev);
+
+ return 0;
+}
static struct phy_driver M88E1011S_driver = {
.name = "Marvell 88E1011S",
@@ -455,8 +492,19 @@ static struct phy_driver M88E1149S_driver = {
.shutdown = &genphy_shutdown,
};
+static struct phy_driver M88E1310_driver = {
+ .name = "Marvell 88E1310",
+ .uid = 0x01410e90,
+ .mask = 0xff0,
+ .features = PHY_GBIT_FEATURES,
+ .config = &m88e1310_config,
+ .startup = &m88e1011s_startup,
+ .shutdown = &genphy_shutdown,
+};
+
int phy_marvell_init(void)
{
+ phy_register(&M88E1310_driver);
phy_register(&M88E1149S_driver);
phy_register(&M88E1145_driver);
phy_register(&M88E1121R_driver);
--
1.7.10.4
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[U-Boot] [PATCH 07/10] NET: mvgbe: add phylib support
This add phylib support to the Marvell GBE driver.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Dieter Kiermaier
---
drivers/net/mvgbe.c | 68 ---
1 file changed, 64 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index 47bf27c..192c989 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -52,7 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define MV_PHY_ADR_REQUEST 0xee
#define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi)
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+#if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/*
* smi_reg_read - miiphy_read callback function.
*
@@ -184,6 +184,24 @@ static int smi_reg_write(const char *devname, u8 phy_adr,
u8 reg_ofs, u16 data)
}
#endif
+#if defined(CONFIG_PHYLIB)
+int mvgbe_phy_read(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr)
+{
+ u16 data;
+ int ret;
+ ret = smi_reg_read(bus->name, phyAddr, regAddr, &data);
+ if (ret)
+ return ret;
+ return data;
+}
+
+int mvgbe_phy_write(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr,
+ u16 data)
+{
+ return smi_reg_write(bus->name, phyAddr, regAddr, data);
+}
+#endif
+
/* Stop and checks all queues */
static void stop_queue(u32 * qreg)
{
@@ -467,8 +485,9 @@ static int mvgbe_init(struct eth_device *dev)
/* Enable port Rx. */
MVGBE_REG_WR(regs->rqc, (1 << RXUQ));
-#if (defined (CONFIG_MII) || defined (CONFIG_CMD_MII)) \
-&& defined (CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
+#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
+ && !defined(CONFIG_PHYLIB) \
+ && defined(CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
/* Wait up to 5s for the link status */
for (i = 0; i < 5; i++) {
u16 phyadr;
@@ -647,6 +666,45 @@ static int mvgbe_recv(struct eth_device *dev)
return 0;
}
+#if defined(CONFIG_PHYLIB)
+int mvgbe_phylib_init(struct eth_device *dev, int phyid)
+{
+ struct mii_dev *bus;
+ struct phy_device *phydev;
+ int ret;
+
+ bus = mdio_alloc();
+ if (!bus) {
+ printf("mdio_alloc failed\n");
+ return -ENOMEM;
+ }
+ bus->read = mvgbe_phy_read;
+ bus->write = mvgbe_phy_write;
+ sprintf(bus->name, dev->name);
+
+ ret = mdio_register(bus);
+ if (ret) {
+ printf("mdio_register failed\n");
+ free(bus);
+ return -ENOMEM;
+ }
+
+ /* Set phy address of the port */
+ mvgbe_phy_write(bus, MV_PHY_ADR_REQUEST, 0, MV_PHY_ADR_REQUEST, phyid);
+
+ phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RGMII);
+ if (!phydev) {
+ printf("phy_connect failed\n");
+ return -ENODEV;
+ }
+
+ phy_config(phydev);
+ phy_startup(phydev);
+
+ return 0;
+}
+#endif
+
int mvgbe_initialize(bd_t *bis)
{
struct mvgbe_device *dmvgbe;
@@ -729,7 +787,9 @@ error1:
eth_register(dev);
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+#if defined(CONFIG_PHYLIB)
+ mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum);
+#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name, smi_reg_read, smi_reg_write);
/* Set phy address of the port */
miiphy_write(dev->name, MV_PHY_ADR_REQUEST,
--
1.7.10.4
___
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http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/10] NET: mvgbe: add support for Dove
Marvell Dove also uses mvgbe as ethernet driver, therefore add support for Dove to reuse the current driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Dieter Kiermaier --- drivers/net/mvgbe.c |2 ++ drivers/net/mvgbe.h |7 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 192c989..590ea0b 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -43,6 +43,8 @@ #include #elif defined(CONFIG_ORION5X) #include +#elif defined(CONFIG_DOVE) +#include #endif #include "mvgbe.h" diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index d8a5429..7f5d98f 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -308,10 +308,17 @@ #define EBAR_TARGET_GUNIT 0x0007 /* Window attrib */ +#if defined(CONFIG_DOVE) +#define EBAR_DRAM_CS0 0x +#define EBAR_DRAM_CS1 0x +#define EBAR_DRAM_CS2 0x +#define EBAR_DRAM_CS3 0x +#else #define EBAR_DRAM_CS0 0x0E00 #define EBAR_DRAM_CS1 0x0D00 #define EBAR_DRAM_CS2 0x0B00 #define EBAR_DRAM_CS3 0x0700 +#endif /* DRAM Target interface */ #define EBAR_DRAM_NO_CACHE_COHERENCY 0x -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/10] Boards: Add support for SolidRun CuBox
With latest support for Marvell Dove SoC, add the SolidRun CuBox as
the very first board with that SoC.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Dieter Kiermaier
---
board/solidrun/cubox/Makefile | 45 ++
board/solidrun/cubox/cubox.c | 141 ++
board/solidrun/cubox/kwbimage.cfg | 76
boards.cfg|1 +
include/configs/cubox.h | 175 +
5 files changed, 438 insertions(+)
create mode 100644 board/solidrun/cubox/Makefile
create mode 100644 board/solidrun/cubox/cubox.c
create mode 100644 board/solidrun/cubox/kwbimage.cfg
create mode 100644 include/configs/cubox.h
diff --git a/board/solidrun/cubox/Makefile b/board/solidrun/cubox/Makefile
new file mode 100644
index 000..c771d72
--- /dev/null
+++ b/board/solidrun/cubox/Makefile
@@ -0,0 +1,45 @@
+#
+# SolidRun CuBox Makefile
+#
+# Sebastian Hesselbarth
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := cubox.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/solidrun/cubox/cubox.c b/board/solidrun/cubox/cubox.c
new file mode 100644
index 000..70c016f
--- /dev/null
+++ b/board/solidrun/cubox/cubox.c
@@ -0,0 +1,141 @@
+/*
+ * SolidRun CuBox board support
+ *
+ * Sebastian Hesselbarth
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static u16 mpp_config[] = {
+ MPP0_GPIO,
+ MPP1_GPIO, /* USB power enable */
+ MPP2_GPIO, /* USB over-current indication */
+ MPP3_GPIO, /* micro button beneath eSATA port */
+ MPP4_GPIO,
+ MPP5_GPIO,
+ MPP6_GPIO,
+ MPP7_GPIO,
+
+ MPP8_GPIO,
+ MPP9_GPIO,
+ MPP10_GPIO,
+ MPP11_GPIO,
+ MPP12_GPIO, /* SDIO0 card detect */
+ MPP13_AUDIO1_EXTCLK, /* Si5351a audio clock output */
+ MPP14_GPIO,
+ MPP15_GPIO,
+
+ MPP16_GPIO,
+ MPP17_GPIO,
+ MPP18_GPIO, /* Red front LED */
+ MPP19_UART3_RXD, /* IR sensor */
+ MPP20_GPIO,
+ MPP21_GPIO,
+ MPP22_GPIO,
+ MPP23_GPIO,
+
+ MPP_CAMERA_GPIO,
+ MPP_SDIO0_SDIO, /* SDIO0 */
+ MPP_SDIO1_GPIO,
+ MPP_AUDIO1_I2S_SPDIFO, /* SPDIF and HDMI audio */
+ MPP_SPI_SPI, /* SPI */
+ MPP_UART1_GPIO,
+ MPP_NAND_GPO,
+
+ MPP_AUDIO0_I2S,
+ MPP_TWSI_OPTION1, /* TWSI on dedicated pins */
+ 0 };
+
+int board_early_init_f(void)
+{
+ struct dove_gpio_init gpp = {
+ .val0 = 0x00010186,
+ .oe0_n = 0x,
+ .val1 = 0x018000c0,
+ .oe1_n = 0x,
+ .val2 = 0x,
+ .oe2_n = 0x
[U-Boot] [PATCH 10/10] tools: Add support for Dove to kwboot
On Dove kwboot can also be used to boot an u-boot image into RAM.
In contrast to Kirkwood, Dove does not support the UART boot mode
sequence but requires the UART boot mode to be selected through
strap pins. The SolidRun CuBox has a push button to allow uart
boot mode but fails on the boot sequence sent by kwboot.
This patch adds another cmdline option to allow to send a boot
image without the boot sequence and adds support for Dove.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Dieter Kiermaier
---
tools/Makefile |2 ++
tools/kwboot.c | 44
2 files changed, 42 insertions(+), 4 deletions(-)
diff --git a/tools/Makefile b/tools/Makefile
index 686840a..845384f 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -73,6 +73,7 @@ BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
+BIN_FILES-$(CONFIG_DOVE) += kwboot$(SFX)
# Source files which exist outside the tools directory
EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
@@ -104,6 +105,7 @@ NOPED_OBJ_FILES-y += os_support.o
OBJ_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1.o
NOPED_OBJ_FILES-y += ublimage.o
OBJ_FILES-$(CONFIG_KIRKWOOD) += kwboot.o
+OBJ_FILES-$(CONFIG_DOVE) += kwboot.o
# Don't build by default
#ifeq ($(ARCH),ppc)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..199678a 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -293,6 +293,30 @@ kwboot_bootmsg(int tty, void *msg)
}
static int
+kwboot_bootmsg_uartmode(int tty)
+{
+ int rc;
+ char c;
+
+ kwboot_printv("Please reboot the target into UART boot mode...");
+
+ do {
+ rc = tcflush(tty, TCIOFLUSH);
+ if (rc)
+ break;
+
+ rc = kwboot_tty_recv(tty, &c, 1, KWBOOT_MSG_RSP_TIMEO);
+
+ kwboot_spinner();
+
+ } while (rc || c != NAK);
+
+ kwboot_printv("\n");
+
+ return rc;
+}
+
+static int
kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
size_t size, int pnum)
{
@@ -601,10 +625,11 @@ static void
kwboot_usage(FILE *stream, char *progname)
{
fprintf(stream,
- "Usage: %s -b [ -p ] [ -t ] "
+ "Usage: %s -b [ -p ] [ -t ] [ -u ] "
"[-B ] \n", progname);
fprintf(stream, "\n");
fprintf(stream, " -b : boot \n");
+ fprintf(stream, " -u: target requires UART boot mode (e.g. Dove)\n");
fprintf(stream, " -p: patch to type 0x69 (uart boot)\n");
fprintf(stream, "\n");
fprintf(stream, " -t: mini terminal\n");
@@ -617,7 +642,7 @@ int
main(int argc, char **argv)
{
const char *ttypath, *imgpath;
- int rv, rc, tty, term, prot, patch;
+ int rv, rc, tty, uartmode, term, prot, patch;
void *bootmsg;
void *img;
size_t size;
@@ -628,6 +653,7 @@ main(int argc, char **argv)
bootmsg = NULL;
imgpath = NULL;
img = NULL;
+ uartmode = 0;
term = 0;
patch = 0;
size = 0;
@@ -636,7 +662,7 @@ main(int argc, char **argv)
kwboot_verbose = isatty(STDOUT_FILENO);
do {
- int c = getopt(argc, argv, "hb:ptB:");
+ int c = getopt(argc, argv, "hb:ptuB:");
if (c < 0)
break;
@@ -654,6 +680,10 @@ main(int argc, char **argv)
term = 1;
break;
+ case 'u':
+ uartmode = 1;
+ break;
+
case 'B':
speed = kwboot_tty_speed(atoi(optarg));
if (speed == -1)
@@ -702,7 +732,13 @@ main(int argc, char **argv)
}
}
- if (bootmsg) {
+ if (uartmode) {
+ rc = kwboot_bootmsg_uartmode(tty);
+ if (rc) {
+ perror("bootmsg");
+ goto out;
+ }
+ } else if (bootmsg) {
rc = kwboot_bootmsg(tty, bootmsg);
if (rc) {
perror("bootmsg");
--
1.7.10.4
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 00/10] Add Marvell Dove and SolidRun CuBox
This patch set add support for the Marvell Dove 88AP510 SoC and the SolidRun CuBox board based on that SoC. The patch set is divided into the four following sections: (1) Patches 1-5: Add support for the Dove SoC and related drivers. Where possible drivers from Marvell Kirkwood are reused (mvsata, mvgbe), or forked to allow more generic usage (SPI, GPIO). The SDHCI driver is different and a new driver is added for it. The forked drivers can also be reused on Kirkwood but that would have required patching existing boards. (2) Patches 6-8: Allow mvgbe to use the phylib API, add support for 88E1310 PHY and allow Dove to use the driver. (3) Patch 9 Add the SolidRun CuBox as the first board based on Marvell Dove SoC. (4) Patch 10 Add support for different UART boot mode found on Dove. Changelog: v1->v2: respect review comments by Luka Perkov - fix commenting styles and typos - add MAINTAINERS entry - also update kwboot.1 manpage Sebastian Hesselbarth (10): ARM: dove: add support for Marvell Dove SoC GPIO: add gpio driver for Orion SoCs MMC: sdhci: Add support for dove sdhci SPI: Add Orion SPI driver block: mvsata: add dove include NET: phy: add 88E1310 PHY initialization NET: mvgbe: add phylib support NET: mvgbe: add support for Dove Boards: Add support for SolidRun CuBox tools: Add support for Dove to kwboot MAINTAINERS |4 + arch/arm/cpu/armv7/dove/Makefile| 49 + arch/arm/cpu/armv7/dove/cpu.c | 266 ++ arch/arm/cpu/armv7/dove/dram.c | 118 arch/arm/cpu/armv7/dove/lowlevel_init.S | 83 arch/arm/cpu/armv7/dove/mpp.c | 318 +++ arch/arm/cpu/armv7/dove/timer.c | 176 + arch/arm/cpu/armv7/dove/usb.c | 101 ++ arch/arm/include/asm/arch-dove/config.h | 153 +++ arch/arm/include/asm/arch-dove/cpu.h| 204 arch/arm/include/asm/arch-dove/dove.h | 93 + arch/arm/include/asm/arch-dove/gpio.h | 35 arch/arm/include/asm/arch-dove/mpp.h| 283 +++ board/solidrun/cubox/Makefile | 45 + board/solidrun/cubox/cubox.c| 141 ++ board/solidrun/cubox/kwbimage.cfg | 76 boards.cfg |1 + doc/kwboot.1| 13 +- drivers/block/mvsata_ide.c |2 + drivers/gpio/Makefile |1 + drivers/gpio/orion_gpio.c | 167 drivers/mmc/Makefile|1 + drivers/mmc/dove_sdhci.c| 101 ++ drivers/net/mvgbe.c | 70 ++- drivers/net/mvgbe.h |7 + drivers/net/phy/marvell.c | 48 + drivers/spi/Makefile|1 + drivers/spi/orion_spi.c | 217 + include/configs/cubox.h | 175 + include/orion_gpio.h| 64 +++ tools/Makefile |2 + tools/kwboot.c | 44 - 32 files changed, 3048 insertions(+), 11 deletions(-) create mode 100644 arch/arm/cpu/armv7/dove/Makefile create mode 100644 arch/arm/cpu/armv7/dove/cpu.c create mode 100644 arch/arm/cpu/armv7/dove/dram.c create mode 100644 arch/arm/cpu/armv7/dove/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/dove/mpp.c create mode 100644 arch/arm/cpu/armv7/dove/timer.c create mode 100644 arch/arm/cpu/armv7/dove/usb.c create mode 100644 arch/arm/include/asm/arch-dove/config.h create mode 100644 arch/arm/include/asm/arch-dove/cpu.h create mode 100644 arch/arm/include/asm/arch-dove/dove.h create mode 100644 arch/arm/include/asm/arch-dove/gpio.h create mode 100644 arch/arm/include/asm/arch-dove/mpp.h create mode 100644 board/solidrun/cubox/Makefile create mode 100644 board/solidrun/cubox/cubox.c create mode 100644 board/solidrun/cubox/kwbimage.cfg create mode 100644 drivers/gpio/orion_gpio.c create mode 100644 drivers/mmc/dove_sdhci.c create mode 100644 drivers/spi/orion_spi.c create mode 100644 include/configs/cubox.h create mode 100644 include/orion_gpio.h --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 02/10] GPIO: add gpio driver for Orion SoCs
This adds a gpio driver for Marvell Orion SoCs, i.e. orion5x, kirkwood,
dove. This is based on kw_gpio but as gpio capabilities depend heavily
on the mpp configuration for dove, it allows to set gpi/gpo capabilities
from mpp. This should be compatible with the current kw_gpio and porting
mpp of kirkwood and orion5x is appreciated.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/gpio/Makefile |1 +
drivers/gpio/orion_gpio.c | 167 +
include/orion_gpio.h | 64 +
3 files changed, 232 insertions(+)
create mode 100644 drivers/gpio/orion_gpio.c
create mode 100644 include/orion_gpio.h
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index d50ac3b..6fc163b 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -26,6 +26,7 @@ include $(TOPDIR)/config.mk
LIB:= $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
+COBJS-$(CONFIG_ORION_GPIO) += orion_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP)+= mvmfp.o
diff --git a/drivers/gpio/orion_gpio.c b/drivers/gpio/orion_gpio.c
new file mode 100644
index 000..209354d
--- /dev/null
+++ b/drivers/gpio/orion_gpio.c
@@ -0,0 +1,167 @@
+/*
+ * Marvell Orion SoC GPIO handling.
+ *
+ * Sebastian Hesselbarth
+ *
+ * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
+ * Removed orion_gpiochip struct and kernel level irq handling.
+ * Dieter Kiermaier dk-arm-li...@gmx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
+static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
+
+void __set_direction(unsigned pin, int input)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_IO_CONF(base));
+ if (input)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_IO_CONF(base));
+
+ u = readl(GPIO_IO_CONF(base));
+}
+
+void __set_level(unsigned pin, int high)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_OUT(base));
+ if (high)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_OUT(base));
+}
+
+void __set_blinking(unsigned pin, int blink)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_BLINK_EN(base));
+ if (blink)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_BLINK_EN(base));
+}
+
+int orion_gpio_is_valid(unsigned pin, int mode)
+{
+ if (pin < GPIO_MAX) {
+ if ((mode & GPIO_INPUT_OK) &&
+ !test_bit(pin, gpio_valid_input))
+ goto err_out;
+
+ if ((mode & GPIO_OUTPUT_OK) &&
+ !test_bit(pin, gpio_valid_output))
+ goto err_out;
+ return 0;
+ }
+
+err_out:
+ printf("%s: invalid GPIO %d/%d\n", __func__, pin, GPIO_MAX);
+ return 1;
+}
+
+void orion_gpio_set_valid(unsigned pin, int mode)
+{
+ if (mode & GPIO_INPUT_OK)
+ __set_bit(pin, gpio_valid_input);
+ else
+ __clear_bit(pin, gpio_valid_input);
+ if (mode & GPIO_OUTPUT_OK)
+ __set_bit(pin, gpio_valid_output);
+ else
+ __clear_bit(pin, gpio_valid_output);
+}
+
+/*
+ * GENERIC_GPIO primitives.
+ */
+int orion_gpio_direction_input(unsigned pin)
+{
+ if (orion_gpio_is_valid(pin, GPIO_INPUT_OK) != 0)
+ return 1;
+
+ /* Configure GPIO direction. */
+ __set_direction(pin, 1);
+
+ return 0;
+}
+
+int orion_gpio_direction_output(unsigned pin, int value)
+{
+
[U-Boot] [PATCH v2 05/10] block: mvsata: add dove include
Dove SoC also uses mvsata, therefore add a SoC specific include to allow to reuse the mvsata ide driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov --- drivers/block/mvsata_ide.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c index a88d0f7..9918f80 100644 --- a/drivers/block/mvsata_ide.c +++ b/drivers/block/mvsata_ide.c @@ -29,6 +29,8 @@ #include #elif defined(CONFIG_KIRKWOOD) #include +#elif defined(CONFIG_DOVE) +#include #endif /* SATA port registers */ -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 06/10] NET: phy: add 88E1310 PHY initialization
This adds PHY initialization for Marvell Alaska 88E1310 PHY.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/net/phy/marvell.c | 48 +
1 file changed, 48 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index e51e799..e920212 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -89,6 +89,12 @@
#define MIIM_88E1149_PHY_PAGE 29
+/* 88E1310 PHY defines */
+#define MIIM_88E1310_PHY_LED_CTRL 16
+#define MIIM_88E1310_PHY_IRQ_EN18
+#define MIIM_88E1310_PHY_RGMII_CTRL21
+#define MIIM_88E1310_PHY_PAGE 22
+
/* Marvell 88E1011S */
static int m88e1011s_config(struct phy_device *phydev)
{
@@ -394,6 +400,37 @@ static int m88e1149_config(struct phy_device *phydev)
return 0;
}
+/* Marvell 88E1310 */
+static int m88e1310_config(struct phy_device *phydev)
+{
+ u16 reg;
+
+ /* LED link and activity */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0003);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL);
+ reg = (reg & ~0xf) | 0x1;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL, reg);
+
+ /* Set LED2/INT to INT mode, low active */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0003);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN);
+ reg = (reg & 0x77ff) | 0x0880;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN, reg);
+
+ /* Set RGMII delay */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0002);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL);
+ reg |= 0x0030;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL, reg);
+
+ /* Ensure to return to page 0 */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x);
+
+ genphy_config_aneg(phydev);
+ phy_reset(phydev);
+
+ return 0;
+}
static struct phy_driver M88E1011S_driver = {
.name = "Marvell 88E1011S",
@@ -455,8 +492,19 @@ static struct phy_driver M88E1149S_driver = {
.shutdown = &genphy_shutdown,
};
+static struct phy_driver M88E1310_driver = {
+ .name = "Marvell 88E1310",
+ .uid = 0x01410e90,
+ .mask = 0xff0,
+ .features = PHY_GBIT_FEATURES,
+ .config = &m88e1310_config,
+ .startup = &m88e1011s_startup,
+ .shutdown = &genphy_shutdown,
+};
+
int phy_marvell_init(void)
{
+ phy_register(&M88E1310_driver);
phy_register(&M88E1149S_driver);
phy_register(&M88E1145_driver);
phy_register(&M88E1121R_driver);
--
1.7.10.4
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 04/10] SPI: Add Orion SPI driver
This adds an SPI driver found on Marvell Orion SoCs. This driver is
taken from kirkwood_spi but removes mpp configuration as dove has
dedicated spi pins. To have a common driver for orion5x, kirkwood,
and dove, mpp configuration should be handled in some cpu/board-specific
setup.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/spi/Makefile|1 +
drivers/spi/orion_spi.c | 217 +++
2 files changed, 218 insertions(+)
create mode 100644 drivers/spi/orion_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index f0b82c6..679ba61 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -34,6 +34,7 @@ COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o
COBJS-$(CONFIG_CF_SPI) += cf_spi.o
COBJS-$(CONFIG_CF_QSPI) += cf_qspi.o
COBJS-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
+COBJS-$(CONFIG_ORION_SPI) += orion_spi.o
COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
diff --git a/drivers/spi/orion_spi.c b/drivers/spi/orion_spi.c
new file mode 100644
index 000..8a50531
--- /dev/null
+++ b/drivers/spi/orion_spi.c
@@ -0,0 +1,217 @@
+/*
+ * Marvell Orion SoCs common spi driver
+ *
+ * Sebastian Hesselbarth
+ * based on kirkwood_spi.c written by
+ * Prafulla Wadaskar
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/* SPI Registers on orion SOC */
+struct orionspi_registers {
+ u32 ctrl; /* 0x00 */
+ u32 cfg;/* 0x04 */
+ u32 dout; /* 0x08 */
+ u32 din;/* 0x0c */
+ u32 irq_cause; /* 0x10 */
+ u32 irq_mask; /* 0x14 */
+};
+
+#define ORIONSPI_CLKPRESCL_MASK0x1f
+#define ORIONSPI_CLKPRESCL_MIN 0x12
+#define ORIONSPI_CSN_ACT 1 /* Activates serial memory interface */
+#define ORIONSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */
+#define ORIONSPI_IRQUNMASK 1 /* unmask SPI interrupt */
+#define ORIONSPI_IRQMASK 0 /* mask SPI interrupt */
+#define ORIONSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */
+#define ORIONSPI_XFERLEN_1BYTE 0
+#define ORIONSPI_XFERLEN_2BYTE (1 << 5)
+#define ORIONSPI_XFERLEN_MASK (1 << 5)
+#define ORIONSPI_ADRLEN_1BYTE 0
+#define ORIONSPI_ADRLEN_2BYTE (1 << 8)
+#define ORIONSPI_ADRLEN_3BYTE (2 << 8)
+#define ORIONSPI_ADRLEN_4BYTE (3 << 8)
+#define ORIONSPI_ADRLEN_MASK (3 << 8)
+#define ORIONSPI_TIMEOUT 1
+
+static struct orionspi_registers *spireg =
+ (struct orionspi_registers *)ORION_SPI_BASE;
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct spi_slave *slave;
+ u32 data;
+ u32 kwspi_mpp_config[] = { 0, 0 };
+
+ if (!spi_cs_is_valid(bus, cs))
+ return NULL;
+
+ slave = malloc(sizeof(struct spi_slave));
+ if (!slave)
+ return NULL;
+
+ slave->bus = bus;
+ slave->cs = cs;
+
+ writel(~ORIONSPI_CSN_ACT | ORIONSPI_SMEMRDY, &spireg->ctrl);
+
+ /* calculate spi clock prescaller using max_hz */
+ data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;
+ data = data < ORIONSPI_CLKPRESCL_MIN ? ORIONSPI_CLKPRESCL_MIN : data;
+ data = data > ORIONSPI_CLKPRESCL_MASK ? ORIONSPI_CLKPRESCL_MASK : data;
+
+ /* program spi clock prescaller using max_hz */
+ writel(ORIONSPI_ADRLEN_3BYTE | data, &spireg->cfg);
+ debug("data = 0x%08x\n", data);
+
+ writel(ORIONSPI_SMEMRDIRQ, &spireg->irq_cause);
+ writel(ORIONSPI_IRQMASK, &spireg->irq_mask);
+
+ return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ free(slave);
+}
+
+#if defined(CONFIG_SYS_KW_SPI_MPP)
+u32 spi_mpp_backup[4];
+#endif
+
+__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave)
+{
+ return 0;
[U-Boot] [PATCH v2 07/10] NET: mvgbe: add phylib support
This add phylib support to the Marvell GBE driver.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/net/mvgbe.c | 68 ---
1 file changed, 64 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index 47bf27c..192c989 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -52,7 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define MV_PHY_ADR_REQUEST 0xee
#define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi)
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+#if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/*
* smi_reg_read - miiphy_read callback function.
*
@@ -184,6 +184,24 @@ static int smi_reg_write(const char *devname, u8 phy_adr,
u8 reg_ofs, u16 data)
}
#endif
+#if defined(CONFIG_PHYLIB)
+int mvgbe_phy_read(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr)
+{
+ u16 data;
+ int ret;
+ ret = smi_reg_read(bus->name, phyAddr, regAddr, &data);
+ if (ret)
+ return ret;
+ return data;
+}
+
+int mvgbe_phy_write(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr,
+ u16 data)
+{
+ return smi_reg_write(bus->name, phyAddr, regAddr, data);
+}
+#endif
+
/* Stop and checks all queues */
static void stop_queue(u32 * qreg)
{
@@ -467,8 +485,9 @@ static int mvgbe_init(struct eth_device *dev)
/* Enable port Rx. */
MVGBE_REG_WR(regs->rqc, (1 << RXUQ));
-#if (defined (CONFIG_MII) || defined (CONFIG_CMD_MII)) \
-&& defined (CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
+#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
+ && !defined(CONFIG_PHYLIB) \
+ && defined(CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
/* Wait up to 5s for the link status */
for (i = 0; i < 5; i++) {
u16 phyadr;
@@ -647,6 +666,45 @@ static int mvgbe_recv(struct eth_device *dev)
return 0;
}
+#if defined(CONFIG_PHYLIB)
+int mvgbe_phylib_init(struct eth_device *dev, int phyid)
+{
+ struct mii_dev *bus;
+ struct phy_device *phydev;
+ int ret;
+
+ bus = mdio_alloc();
+ if (!bus) {
+ printf("mdio_alloc failed\n");
+ return -ENOMEM;
+ }
+ bus->read = mvgbe_phy_read;
+ bus->write = mvgbe_phy_write;
+ sprintf(bus->name, dev->name);
+
+ ret = mdio_register(bus);
+ if (ret) {
+ printf("mdio_register failed\n");
+ free(bus);
+ return -ENOMEM;
+ }
+
+ /* Set phy address of the port */
+ mvgbe_phy_write(bus, MV_PHY_ADR_REQUEST, 0, MV_PHY_ADR_REQUEST, phyid);
+
+ phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RGMII);
+ if (!phydev) {
+ printf("phy_connect failed\n");
+ return -ENODEV;
+ }
+
+ phy_config(phydev);
+ phy_startup(phydev);
+
+ return 0;
+}
+#endif
+
int mvgbe_initialize(bd_t *bis)
{
struct mvgbe_device *dmvgbe;
@@ -729,7 +787,9 @@ error1:
eth_register(dev);
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+#if defined(CONFIG_PHYLIB)
+ mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum);
+#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name, smi_reg_read, smi_reg_write);
/* Set phy address of the port */
miiphy_write(dev->name, MV_PHY_ADR_REQUEST,
--
1.7.10.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 08/10] NET: mvgbe: add support for Dove
Marvell Dove also uses mvgbe as ethernet driver, therefore add support for Dove to reuse the current driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov --- drivers/net/mvgbe.c |2 ++ drivers/net/mvgbe.h |7 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 192c989..590ea0b 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -43,6 +43,8 @@ #include #elif defined(CONFIG_ORION5X) #include +#elif defined(CONFIG_DOVE) +#include #endif #include "mvgbe.h" diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index d8a5429..7f5d98f 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -308,10 +308,17 @@ #define EBAR_TARGET_GUNIT 0x0007 /* Window attrib */ +#if defined(CONFIG_DOVE) +#define EBAR_DRAM_CS0 0x +#define EBAR_DRAM_CS1 0x +#define EBAR_DRAM_CS2 0x +#define EBAR_DRAM_CS3 0x +#else #define EBAR_DRAM_CS0 0x0E00 #define EBAR_DRAM_CS1 0x0D00 #define EBAR_DRAM_CS2 0x0B00 #define EBAR_DRAM_CS3 0x0700 +#endif /* DRAM Target interface */ #define EBAR_DRAM_NO_CACHE_COHERENCY 0x -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 09/10] Boards: Add support for SolidRun CuBox
With latest support for Marvell Dove SoC, add the SolidRun CuBox as
the very first board with that SoC.
Signed-off-by: Sebastian Hesselbarth
---
Changelog:
v1->v2:
- add MAINTAINERS entry and fix a typo
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
MAINTAINERS |4 +
board/solidrun/cubox/Makefile | 45 ++
board/solidrun/cubox/cubox.c | 141 ++
board/solidrun/cubox/kwbimage.cfg | 76
boards.cfg|1 +
include/configs/cubox.h | 175 +
6 files changed, 442 insertions(+)
create mode 100644 board/solidrun/cubox/Makefile
create mode 100644 board/solidrun/cubox/cubox.c
create mode 100644 board/solidrun/cubox/kwbimage.cfg
create mode 100644 include/configs/cubox.h
diff --git a/MAINTAINERS b/MAINTAINERS
index c430574..d315cb6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -677,6 +677,10 @@ Stefan Herbrechtsmeier
dns325 ARM926EJS (Kirkwood SoC)
+Sebastian Hesselbarth
+
+ cubox ARM ARMV7 (Dove SoC)
+
Vaibhav Hiremath
am3517_evm ARM ARMV7 (AM35x SoC)
diff --git a/board/solidrun/cubox/Makefile b/board/solidrun/cubox/Makefile
new file mode 100644
index 000..c771d72
--- /dev/null
+++ b/board/solidrun/cubox/Makefile
@@ -0,0 +1,45 @@
+#
+# SolidRun CuBox Makefile
+#
+# Sebastian Hesselbarth
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := cubox.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/solidrun/cubox/cubox.c b/board/solidrun/cubox/cubox.c
new file mode 100644
index 000..70c016f
--- /dev/null
+++ b/board/solidrun/cubox/cubox.c
@@ -0,0 +1,141 @@
+/*
+ * SolidRun CuBox board support
+ *
+ * Sebastian Hesselbarth
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static u16 mpp_config[] = {
+ MPP0_GPIO,
+ MPP1_GPIO, /* USB power enable */
+ MPP2_GPIO, /* USB over-current indication */
+ MPP3_GPIO, /* micro button beneath eSATA port */
+ MPP4_GPIO,
+ MPP5_GPIO,
+ MPP6_GPIO,
+ MPP7_GPIO,
+
+ MPP8_GPIO,
+ MPP9_GPIO,
+ MPP10_GPIO,
+ MPP11_GPIO,
+ MPP12_GPIO, /* SDIO0 card detect */
+ MPP13_AUDIO1_EXTCLK, /* Si5351a audio clock output */
+ MPP14_GPIO,
+ MPP15_GPIO,
+
+ MPP16_GPIO,
+ MPP17_GPIO,
+ MPP18_GPIO, /* Red front LED */
+ MPP19_UART3_RXD, /* IR sensor */
+ MPP20_GPIO,
+ MPP21_GPIO,
+ MPP22_GPIO,
+ MPP23_GPIO,
+
+ MPP_CAMERA_GPIO,
+ MPP_SDIO0_SDIO, /* SDIO0 */
+ MPP_SDIO1_GPIO,
+ MPP_AUDIO1_I2S_SPDIFO, /* SPDIF and HDMI audio */
+ MPP_SPI_SPI, /*
[U-Boot] [PATCH v2 10/10] tools: Add support for Dove to kwboot
On Dove kwboot can also be used to boot an u-boot image into RAM.
In contrast to Kirkwood, Dove does not support the UART boot mode
sequence but requires the UART boot mode to be selected through
strap pins. The SolidRun CuBox has a push button to allow uart
boot mode but fails on the boot sequence sent by kwboot.
This patch adds another cmdline option to allow to send a boot
image without the boot sequence and adds support for Dove.
Signed-off-by: Sebastian Hesselbarth
---
Changelog:
v1->v2:
- also update kwboot.1 manpage
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
doc/kwboot.1 | 13 ++---
tools/Makefile |2 ++
tools/kwboot.c | 44
3 files changed, 52 insertions(+), 7 deletions(-)
diff --git a/doc/kwboot.1 b/doc/kwboot.1
index ed08398..3e26acc 100644
--- a/doc/kwboot.1
+++ b/doc/kwboot.1
@@ -1,17 +1,18 @@
-.TH KWBOOT 1 "2012-05-19"
+.TH KWBOOT 1 "2012-12-02"
.SH NAME
-kwboot \- Boot Marvell Kirkwood SoCs over a serial link.
+kwboot \- Boot Marvell Kirkwood/Dove SoCs over a serial link.
.SH SYNOPSIS
.B kwboot
.RB [ "-b \fIimage\fP" ]
.RB [ "-p" ]
.RB [ "-t" ]
+.RB [ "-u" ]
.RB [ "-B \fIbaudrate\fP" ]
.RB \fITTY\fP
.SH "DESCRIPTION"
-The \fBmkimage\fP program boots boards based on Marvell's Kirkwood
+The \fBmkimage\fP program boots boards based on Marvell's Kirkwood/Dove
platform over their integrated UART. Boot image files will typically
contain a second stage boot loader, such as U-Boot. The image file
must conform to Marvell's BootROM firmware image format
@@ -68,6 +69,12 @@ If standard I/O streams connect to a console, this mode will
terminate
after receiving 'ctrl-\\' followed by 'c' from console input.
.TP
+.BI "\-u"
+Disables the UART boot mode sequence for platforms that do not support
+it (e.g. Dove). Usually, the UART boot mode can be selected by pressing
+a push button on power-up.
+
+.TP
.BI "\-B \fIbaudrate\fP"
Adjust the baud rate on \fITTY\fP. Default rate is 115200.
diff --git a/tools/Makefile b/tools/Makefile
index 686840a..845384f 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -73,6 +73,7 @@ BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
+BIN_FILES-$(CONFIG_DOVE) += kwboot$(SFX)
# Source files which exist outside the tools directory
EXT_OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += common/env_embedded.o
@@ -104,6 +105,7 @@ NOPED_OBJ_FILES-y += os_support.o
OBJ_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1.o
NOPED_OBJ_FILES-y += ublimage.o
OBJ_FILES-$(CONFIG_KIRKWOOD) += kwboot.o
+OBJ_FILES-$(CONFIG_DOVE) += kwboot.o
# Don't build by default
#ifeq ($(ARCH),ppc)
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..199678a 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -293,6 +293,30 @@ kwboot_bootmsg(int tty, void *msg)
}
static int
+kwboot_bootmsg_uartmode(int tty)
+{
+ int rc;
+ char c;
+
+ kwboot_printv("Please reboot the target into UART boot mode...");
+
+ do {
+ rc = tcflush(tty, TCIOFLUSH);
+ if (rc)
+ break;
+
+ rc = kwboot_tty_recv(tty, &c, 1, KWBOOT_MSG_RSP_TIMEO);
+
+ kwboot_spinner();
+
+ } while (rc || c != NAK);
+
+ kwboot_printv("\n");
+
+ return rc;
+}
+
+static int
kwboot_xm_makeblock(struct kwboot_block *block, const void *data,
size_t size, int pnum)
{
@@ -601,10 +625,11 @@ static void
kwboot_usage(FILE *stream, char *progname)
{
fprintf(stream,
- "Usage: %s -b [ -p ] [ -t ] "
+ "Usage: %s -b [ -p ] [ -t ] [ -u ] "
"[-B ] \n", progname);
fprintf(stream, "\n");
fprintf(stream, " -b : boot \n");
+ fprintf(stream, " -u: target requires UART boot mode (e.g. Dove)\n");
fprintf(stream, " -p: patch to type 0x69 (uart boot)\n");
fprintf(stream, "\n");
fprintf(stream, " -t: mini terminal\n");
@@ -617,7 +642,7 @@ int
main(int argc, char **argv)
{
const char *ttypath, *imgpath;
- int rv, rc, tty, term, prot, patch;
+ int rv, rc, tty, uartmode, term, prot, patch;
void *bootmsg;
void *img;
size_t size;
@@ -628,6 +653,7 @@ main(int argc, char **argv)
bootmsg = NULL;
imgpath = NULL;
img = NULL;
+ uartmode = 0;
term = 0;
patch = 0;
size = 0;
@@ -636,7 +662,7 @@ main(int argc, char **argv)
Re: [U-Boot] [PATCH 10/10] tools: Add support for Dove to kwboot
On 12/05/2012 11:15 PM, Daniel Stodden wrote: On Sun, 2012-12-02 at 20:15 +0100, Luka Perkov wrote: On Sun, Dec 02, 2012 at 03:36:22PM +0100, Sebastian Hesselbarth wrote: On Dove kwboot can also be used to boot an u-boot image into RAM. In contrast to Kirkwood, Dove does not support the UART boot mode sequence but requires the UART boot mode to be selected through strap pins. The SolidRun CuBox has a push button to allow uart boot mode but fails on the boot sequence sent by kwboot. ... since the protocol remains the same, and just doesn't take a boot message while polling, better to keep the bootmsg_call() intact and just make the option parsing flip the message type? The original BootROM had a couple more message, the tool just no immediate use for that. Eventual options to change message type wasn't unanticipated. Ok, no message at all was. Sketchy patch attached for your consideration. Beware, I can't test it right now. Hi Daniel, I tried your patch and except that you forgot to add 'n' to the getopt call, it works as expected. Also, while I've got nothing against adding a flag for that, I'm partly wondering whether this took a patch at all -- what's the target behavior if you keep shooting it with the original boot message? I would assume it would keep responding with NAKs. But doesn't? I tried original kwboot and it failed, then I checked the DS for the boot sequence and finally found out, that Dove doesn't support the "force into UART boot mode" sequence. But your are right, if I reboot Dove into UART boot mode it makes no difference if you send the sequence or not. It works on both kwboot modes. It just doesn't work if you are doing a normal boot of Dove, as it ignores the sequence sent. So finally, we have three options: - leave kwboot as is and hope the user will know about Dove's inability to use the boot sequence - add a note to usage() and kwboot that Dove doen't like the sequence - add an option to kwboot as you are proposing Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/10] tools: Add support for Dove to kwboot
On 12/06/2012 07:18 PM, Daniel Stodden wrote: On Thu, 2012-12-06 at 11:59 +0100, Sebastian Hesselbarth wrote: So finally, we have three options: - leave kwboot as is and hope the user will know about Dove's inability to use the boot sequence - add a note to usage() and kwboot that Dove doen't like the sequence - add an option to kwboot as you are proposing Okay, here's a deal. We've got a bit of a backward compatibility problem anyway. Dave Purdy was so kind to write up a summary of popular devices known working and not working. That's mainly a matter of firmware revisions. [1] - Let's add a message selector, -m or so. Kirkwood specs list two types, let's make those -mdebug and -muart. If we add -m debug, maybe that even results in someone on the web being ultimately able to explain wth debug mode does :) Default is -m uart, that's what's going on right now. - We add -mnone for pin-selected uart boot mode. - Maybe a slightly less specific printv message. - But most importantly, we add a COMPATIBILITY section to the manpage, and explain the difference between core revisions there. We could drop the none case. But then again, if the target isn't reset yet, then not scribbling into getties and stuff where it's avoidable might be preferred by those who can. So why not. Could you try to read us the boot firmware revision you're running? It's described under the link below. Not sure if it works on your platform though. Daniel, I did a little testing with kwboot and boot sequence. First, BootROM version of my Dove is 2.33. The BootROM version address is a little different what is given on the webpage (003c instead of ff3c). CuBox>> md 003c 1 003c: 02333... Dove does not support UART boot sequences. It has to be selected by reset strapping, i.e. if there is no push button as on the cubox it will be difficult for most of the users ;) I also tested the above on the Mirabox (Armada 370) and except that the BootROM there, prints out some message after reset it works if I first call kwboot with -b and then with -n or delay xmodem call by a second. BootROM version on Armada 370 is 1.08 and the version register address is very different. It resets if I try to read ff3c or 003c and I have neither a DS nor the u-boot source available. Finally, I tested kwboot on 88F6282 (aka Armada 300) and there BootROM version is 1.21 (on ff3c) and it does work as with Kirkwood (i.e. send boot sequence). I think, for the patch set, that I will remove patch 10 from it and leave the required modifications up to you? Sebastian ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 00/10] Add Marvell Dove and SolidRun CuBox
This patch set add support for the Marvell Dove 88AP510 SoC and the SolidRun CuBox board based on that SoC. The patch set is divided into the four following sections: (1) Patches 1-5: Add support for the Dove SoC and related drivers. Where possible drivers from Marvell Kirkwood are reused (mvsata, mvgbe), or forked to allow more generic usage (SPI, GPIO). The SDHCI driver is different and a new driver is added for it. The forked drivers can also be reused on Kirkwood but that would have required patching existing boards. (2) Patches 6-8: Allow mvgbe to use the phylib API, add support for 88E1310 PHY and allow Dove to use the driver. (3) Patch 9 Add the SolidRun CuBox as the first board based on Marvell Dove SoC. (4) Patch 10 Add support for different UART boot mode found on Dove. Changelog: v1->v2: - respect review comments by Luka Perkov - fix commenting styles and typos - add MAINTAINERS entry - also update kwboot.1 manpage v2->v3: - integrate kwboot patch from Daniel Stodden - rebase on release v2013.01 Sebastian Hesselbarth (10): ARM: dove: add support for Marvell Dove SoC GPIO: add gpio driver for Orion SoCs MMC: sdhci: Add support for dove sdhci SPI: Add Orion SPI driver block: mvsata: add dove include NET: phy: add 88E1310 PHY initialization NET: mvgbe: add phylib support NET: mvgbe: add support for Dove Boards: Add support for SolidRun CuBox tools: Add support for Dove to kwboot MAINTAINERS |4 + arch/arm/cpu/armv7/dove/Makefile| 49 + arch/arm/cpu/armv7/dove/cpu.c | 266 ++ arch/arm/cpu/armv7/dove/dram.c | 118 arch/arm/cpu/armv7/dove/lowlevel_init.S | 83 arch/arm/cpu/armv7/dove/mpp.c | 318 +++ arch/arm/cpu/armv7/dove/timer.c | 176 + arch/arm/cpu/armv7/dove/usb.c | 101 ++ arch/arm/include/asm/arch-dove/config.h | 153 +++ arch/arm/include/asm/arch-dove/cpu.h| 204 arch/arm/include/asm/arch-dove/dove.h | 93 + arch/arm/include/asm/arch-dove/gpio.h | 35 arch/arm/include/asm/arch-dove/mpp.h| 283 +++ board/solidrun/cubox/Makefile | 45 + board/solidrun/cubox/cubox.c| 141 ++ board/solidrun/cubox/kwbimage.cfg | 76 boards.cfg |1 + doc/kwboot.1| 13 +- drivers/block/mvsata_ide.c |2 + drivers/gpio/Makefile |1 + drivers/gpio/orion_gpio.c | 167 drivers/mmc/Makefile|1 + drivers/mmc/dove_sdhci.c| 101 ++ drivers/net/mvgbe.c | 70 ++- drivers/net/mvgbe.h |7 + drivers/net/phy/marvell.c | 48 + drivers/spi/Makefile|1 + drivers/spi/orion_spi.c | 217 + include/configs/cubox.h | 175 + include/orion_gpio.h| 64 +++ tools/Makefile |2 + tools/kwboot.c | 25 ++- 32 files changed, 3027 insertions(+), 13 deletions(-) create mode 100644 arch/arm/cpu/armv7/dove/Makefile create mode 100644 arch/arm/cpu/armv7/dove/cpu.c create mode 100644 arch/arm/cpu/armv7/dove/dram.c create mode 100644 arch/arm/cpu/armv7/dove/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/dove/mpp.c create mode 100644 arch/arm/cpu/armv7/dove/timer.c create mode 100644 arch/arm/cpu/armv7/dove/usb.c create mode 100644 arch/arm/include/asm/arch-dove/config.h create mode 100644 arch/arm/include/asm/arch-dove/cpu.h create mode 100644 arch/arm/include/asm/arch-dove/dove.h create mode 100644 arch/arm/include/asm/arch-dove/gpio.h create mode 100644 arch/arm/include/asm/arch-dove/mpp.h create mode 100644 board/solidrun/cubox/Makefile create mode 100644 board/solidrun/cubox/cubox.c create mode 100644 board/solidrun/cubox/kwbimage.cfg create mode 100644 drivers/gpio/orion_gpio.c create mode 100644 drivers/mmc/dove_sdhci.c create mode 100644 drivers/spi/orion_spi.c create mode 100644 include/configs/cubox.h create mode 100644 include/orion_gpio.h --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 09/10] Boards: Add support for SolidRun CuBox
With latest support for Marvell Dove SoC, add the SolidRun CuBox as
the very first board with that SoC.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
MAINTAINERS |4 +
board/solidrun/cubox/Makefile | 45 ++
board/solidrun/cubox/cubox.c | 141 ++
board/solidrun/cubox/kwbimage.cfg | 76
boards.cfg|1 +
include/configs/cubox.h | 175 +
6 files changed, 442 insertions(+)
create mode 100644 board/solidrun/cubox/Makefile
create mode 100644 board/solidrun/cubox/cubox.c
create mode 100644 board/solidrun/cubox/kwbimage.cfg
create mode 100644 include/configs/cubox.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 28c052d..6fc8618 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -684,6 +684,10 @@ Stefan Herbrechtsmeier
dns325 ARM926EJS (Kirkwood SoC)
+Sebastian Hesselbarth
+
+ cubox ARM ARMV7 (Dove SoC)
+
Vaibhav Hiremath
am3517_evm ARM ARMV7 (AM35x SoC)
diff --git a/board/solidrun/cubox/Makefile b/board/solidrun/cubox/Makefile
new file mode 100644
index 000..c771d72
--- /dev/null
+++ b/board/solidrun/cubox/Makefile
@@ -0,0 +1,45 @@
+#
+# SolidRun CuBox Makefile
+#
+# Sebastian Hesselbarth
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := cubox.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/solidrun/cubox/cubox.c b/board/solidrun/cubox/cubox.c
new file mode 100644
index 000..70c016f
--- /dev/null
+++ b/board/solidrun/cubox/cubox.c
@@ -0,0 +1,141 @@
+/*
+ * SolidRun CuBox board support
+ *
+ * Sebastian Hesselbarth
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static u16 mpp_config[] = {
+ MPP0_GPIO,
+ MPP1_GPIO, /* USB power enable */
+ MPP2_GPIO, /* USB over-current indication */
+ MPP3_GPIO, /* micro button beneath eSATA port */
+ MPP4_GPIO,
+ MPP5_GPIO,
+ MPP6_GPIO,
+ MPP7_GPIO,
+
+ MPP8_GPIO,
+ MPP9_GPIO,
+ MPP10_GPIO,
+ MPP11_GPIO,
+ MPP12_GPIO, /* SDIO0 card detect */
+ MPP13_AUDIO1_EXTCLK, /* Si5351a audio clock output */
+ MPP14_GPIO,
+ MPP15_GPIO,
+
+ MPP16_GPIO,
+ MPP17_GPIO,
+ MPP18_GPIO, /* Red front LED */
+ MPP19_UART3_RXD, /* IR sensor */
+ MPP20_GPIO,
+ MPP21_GPIO,
+ MPP22_GPIO,
+ MPP23_GPIO,
+
+ MPP_CAMERA_GPIO,
+ MPP_SDIO0_SDIO, /* SDIO0 */
+ MPP_SDIO1_GPIO,
+ MPP_AUDIO1_I2S_SPDIFO, /* SPDIF and HDMI audio */
+ MPP_SPI_SPI, /* SPI */
+ MPP_UART1_GPIO,
+ MPP_NAND_GPO,
+
+ MPP_AUDIO0_I2S
[U-Boot] [PATCH v3 08/10] NET: mvgbe: add support for Dove
Marvell Dove also uses mvgbe as ethernet driver, therefore add support for Dove to reuse the current driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov --- drivers/net/mvgbe.c |2 ++ drivers/net/mvgbe.h |7 +++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c index 192c989..590ea0b 100644 --- a/drivers/net/mvgbe.c +++ b/drivers/net/mvgbe.c @@ -43,6 +43,8 @@ #include #elif defined(CONFIG_ORION5X) #include +#elif defined(CONFIG_DOVE) +#include #endif #include "mvgbe.h" diff --git a/drivers/net/mvgbe.h b/drivers/net/mvgbe.h index d8a5429..7f5d98f 100644 --- a/drivers/net/mvgbe.h +++ b/drivers/net/mvgbe.h @@ -308,10 +308,17 @@ #define EBAR_TARGET_GUNIT 0x0007 /* Window attrib */ +#if defined(CONFIG_DOVE) +#define EBAR_DRAM_CS0 0x +#define EBAR_DRAM_CS1 0x +#define EBAR_DRAM_CS2 0x +#define EBAR_DRAM_CS3 0x +#else #define EBAR_DRAM_CS0 0x0E00 #define EBAR_DRAM_CS1 0x0D00 #define EBAR_DRAM_CS2 0x0B00 #define EBAR_DRAM_CS3 0x0700 +#endif /* DRAM Target interface */ #define EBAR_DRAM_NO_CACHE_COHERENCY 0x -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 05/10] block: mvsata: add dove include
Dove SoC also uses mvsata, therefore add a SoC specific include to allow to reuse the mvsata ide driver. Signed-off-by: Sebastian Hesselbarth --- Cc: u-boot@lists.denx.de Cc: Sebastian Hesselbarth Cc: Rabeeh Khoury Cc: Albert Aribaud Cc: Prafulla Wadaskar Cc: Andy Fleming Cc: Joe Hershberger Cc: Daniel Stodden Cc: Luka Perkov -- drivers/block/mvsata_ide.c |2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/block/mvsata_ide.c b/drivers/block/mvsata_ide.c index a88d0f7..9918f80 100644 --- a/drivers/block/mvsata_ide.c +++ b/drivers/block/mvsata_ide.c @@ -29,6 +29,8 @@ #include #elif defined(CONFIG_KIRKWOOD) #include +#elif defined(CONFIG_DOVE) +#include #endif /* SATA port registers */ -- 1.7.10.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 06/10] NET: phy: add 88E1310 PHY initialization
This adds PHY initialization for Marvell Alaska 88E1310 PHY.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/net/phy/marvell.c | 48 +
1 file changed, 48 insertions(+)
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 4b27198..1205166 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -89,6 +89,12 @@
#define MIIM_88E1149_PHY_PAGE 29
+/* 88E1310 PHY defines */
+#define MIIM_88E1310_PHY_LED_CTRL 16
+#define MIIM_88E1310_PHY_IRQ_EN18
+#define MIIM_88E1310_PHY_RGMII_CTRL21
+#define MIIM_88E1310_PHY_PAGE 22
+
/* Marvell 88E1011S */
static int m88e1011s_config(struct phy_device *phydev)
{
@@ -394,6 +400,37 @@ static int m88e1149_config(struct phy_device *phydev)
return 0;
}
+/* Marvell 88E1310 */
+static int m88e1310_config(struct phy_device *phydev)
+{
+ u16 reg;
+
+ /* LED link and activity */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0003);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL);
+ reg = (reg & ~0xf) | 0x1;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_LED_CTRL, reg);
+
+ /* Set LED2/INT to INT mode, low active */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0003);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN);
+ reg = (reg & 0x77ff) | 0x0880;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_IRQ_EN, reg);
+
+ /* Set RGMII delay */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x0002);
+ reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL);
+ reg |= 0x0030;
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_RGMII_CTRL, reg);
+
+ /* Ensure to return to page 0 */
+ phy_write(phydev, MDIO_DEVAD_NONE, MIIM_88E1310_PHY_PAGE, 0x);
+
+ genphy_config_aneg(phydev);
+ phy_reset(phydev);
+
+ return 0;
+}
static struct phy_driver M88E1011S_driver = {
.name = "Marvell 88E1011S",
@@ -465,8 +502,19 @@ static struct phy_driver M88E1149S_driver = {
.shutdown = &genphy_shutdown,
};
+static struct phy_driver M88E1310_driver = {
+ .name = "Marvell 88E1310",
+ .uid = 0x01410e90,
+ .mask = 0xff0,
+ .features = PHY_GBIT_FEATURES,
+ .config = &m88e1310_config,
+ .startup = &m88e1011s_startup,
+ .shutdown = &genphy_shutdown,
+};
+
int phy_marvell_init(void)
{
+ phy_register(&M88E1310_driver);
phy_register(&M88E1149S_driver);
phy_register(&M88E1145_driver);
phy_register(&M88E1121R_driver);
--
1.7.10.4
___
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[U-Boot] [PATCH v3 04/10] SPI: Add Orion SPI driver
This adds an SPI driver found on Marvell Orion SoCs. This driver is
taken from kirkwood_spi but removes mpp configuration as dove has
dedicated spi pins. To have a common driver for orion5x, kirkwood,
and dove, mpp configuration should be handled in some cpu/board-specific
setup.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/spi/Makefile|1 +
drivers/spi/orion_spi.c | 217 +++
2 files changed, 218 insertions(+)
create mode 100644 drivers/spi/orion_spi.c
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 824d357..624bb72 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -35,6 +35,7 @@ COBJS-$(CONFIG_CF_SPI) += cf_spi.o
COBJS-$(CONFIG_CF_QSPI) += cf_qspi.o
COBJS-$(CONFIG_DAVINCI_SPI) += davinci_spi.o
COBJS-$(CONFIG_EXYNOS_SPI) += exynos_spi.o
+COBJS-$(CONFIG_ORION_SPI) += orion_spi.o
COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o
COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o
COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o
diff --git a/drivers/spi/orion_spi.c b/drivers/spi/orion_spi.c
new file mode 100644
index 000..8a50531
--- /dev/null
+++ b/drivers/spi/orion_spi.c
@@ -0,0 +1,217 @@
+/*
+ * Marvell Orion SoCs common spi driver
+ *
+ * Sebastian Hesselbarth
+ * based on kirkwood_spi.c written by
+ * Prafulla Wadaskar
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+/* SPI Registers on orion SOC */
+struct orionspi_registers {
+ u32 ctrl; /* 0x00 */
+ u32 cfg;/* 0x04 */
+ u32 dout; /* 0x08 */
+ u32 din;/* 0x0c */
+ u32 irq_cause; /* 0x10 */
+ u32 irq_mask; /* 0x14 */
+};
+
+#define ORIONSPI_CLKPRESCL_MASK0x1f
+#define ORIONSPI_CLKPRESCL_MIN 0x12
+#define ORIONSPI_CSN_ACT 1 /* Activates serial memory interface */
+#define ORIONSPI_SMEMRDY (1 << 1) /* SerMem Data xfer ready */
+#define ORIONSPI_IRQUNMASK 1 /* unmask SPI interrupt */
+#define ORIONSPI_IRQMASK 0 /* mask SPI interrupt */
+#define ORIONSPI_SMEMRDIRQ 1 /* SerMem data xfer ready irq */
+#define ORIONSPI_XFERLEN_1BYTE 0
+#define ORIONSPI_XFERLEN_2BYTE (1 << 5)
+#define ORIONSPI_XFERLEN_MASK (1 << 5)
+#define ORIONSPI_ADRLEN_1BYTE 0
+#define ORIONSPI_ADRLEN_2BYTE (1 << 8)
+#define ORIONSPI_ADRLEN_3BYTE (2 << 8)
+#define ORIONSPI_ADRLEN_4BYTE (3 << 8)
+#define ORIONSPI_ADRLEN_MASK (3 << 8)
+#define ORIONSPI_TIMEOUT 1
+
+static struct orionspi_registers *spireg =
+ (struct orionspi_registers *)ORION_SPI_BASE;
+
+struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int mode)
+{
+ struct spi_slave *slave;
+ u32 data;
+ u32 kwspi_mpp_config[] = { 0, 0 };
+
+ if (!spi_cs_is_valid(bus, cs))
+ return NULL;
+
+ slave = malloc(sizeof(struct spi_slave));
+ if (!slave)
+ return NULL;
+
+ slave->bus = bus;
+ slave->cs = cs;
+
+ writel(~ORIONSPI_CSN_ACT | ORIONSPI_SMEMRDY, &spireg->ctrl);
+
+ /* calculate spi clock prescaller using max_hz */
+ data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10;
+ data = data < ORIONSPI_CLKPRESCL_MIN ? ORIONSPI_CLKPRESCL_MIN : data;
+ data = data > ORIONSPI_CLKPRESCL_MASK ? ORIONSPI_CLKPRESCL_MASK : data;
+
+ /* program spi clock prescaller using max_hz */
+ writel(ORIONSPI_ADRLEN_3BYTE | data, &spireg->cfg);
+ debug("data = 0x%08x\n", data);
+
+ writel(ORIONSPI_SMEMRDIRQ, &spireg->irq_cause);
+ writel(ORIONSPI_IRQMASK, &spireg->irq_mask);
+
+ return slave;
+}
+
+void spi_free_slave(struct spi_slave *slave)
+{
+ free(slave);
+}
+
+#if defined(CONFIG_SYS_KW_SPI_MPP)
+u32 spi_mpp_backup[4];
+#endif
+
+__attribute__((weak)) int board_spi_claim_bus(struct spi_slave *slave)
+{
+ return 0;
[U-Boot] [PATCH v3 07/10] NET: mvgbe: add phylib support
This add phylib support to the Marvell GBE driver.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/net/mvgbe.c | 68 ---
1 file changed, 64 insertions(+), 4 deletions(-)
diff --git a/drivers/net/mvgbe.c b/drivers/net/mvgbe.c
index 47bf27c..192c989 100644
--- a/drivers/net/mvgbe.c
+++ b/drivers/net/mvgbe.c
@@ -52,7 +52,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define MV_PHY_ADR_REQUEST 0xee
#define MVGBE_SMI_REG (((struct mvgbe_registers *)MVGBE0_BASE)->smi)
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+#if defined(CONFIG_PHYLIB) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/*
* smi_reg_read - miiphy_read callback function.
*
@@ -184,6 +184,24 @@ static int smi_reg_write(const char *devname, u8 phy_adr,
u8 reg_ofs, u16 data)
}
#endif
+#if defined(CONFIG_PHYLIB)
+int mvgbe_phy_read(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr)
+{
+ u16 data;
+ int ret;
+ ret = smi_reg_read(bus->name, phyAddr, regAddr, &data);
+ if (ret)
+ return ret;
+ return data;
+}
+
+int mvgbe_phy_write(struct mii_dev *bus, int phyAddr, int devAddr, int regAddr,
+ u16 data)
+{
+ return smi_reg_write(bus->name, phyAddr, regAddr, data);
+}
+#endif
+
/* Stop and checks all queues */
static void stop_queue(u32 * qreg)
{
@@ -467,8 +485,9 @@ static int mvgbe_init(struct eth_device *dev)
/* Enable port Rx. */
MVGBE_REG_WR(regs->rqc, (1 << RXUQ));
-#if (defined (CONFIG_MII) || defined (CONFIG_CMD_MII)) \
-&& defined (CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
+#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
+ && !defined(CONFIG_PHYLIB) \
+ && defined(CONFIG_SYS_FAULT_ECHO_LINK_DOWN)
/* Wait up to 5s for the link status */
for (i = 0; i < 5; i++) {
u16 phyadr;
@@ -647,6 +666,45 @@ static int mvgbe_recv(struct eth_device *dev)
return 0;
}
+#if defined(CONFIG_PHYLIB)
+int mvgbe_phylib_init(struct eth_device *dev, int phyid)
+{
+ struct mii_dev *bus;
+ struct phy_device *phydev;
+ int ret;
+
+ bus = mdio_alloc();
+ if (!bus) {
+ printf("mdio_alloc failed\n");
+ return -ENOMEM;
+ }
+ bus->read = mvgbe_phy_read;
+ bus->write = mvgbe_phy_write;
+ sprintf(bus->name, dev->name);
+
+ ret = mdio_register(bus);
+ if (ret) {
+ printf("mdio_register failed\n");
+ free(bus);
+ return -ENOMEM;
+ }
+
+ /* Set phy address of the port */
+ mvgbe_phy_write(bus, MV_PHY_ADR_REQUEST, 0, MV_PHY_ADR_REQUEST, phyid);
+
+ phydev = phy_connect(bus, phyid, dev, PHY_INTERFACE_MODE_RGMII);
+ if (!phydev) {
+ printf("phy_connect failed\n");
+ return -ENODEV;
+ }
+
+ phy_config(phydev);
+ phy_startup(phydev);
+
+ return 0;
+}
+#endif
+
int mvgbe_initialize(bd_t *bis)
{
struct mvgbe_device *dmvgbe;
@@ -729,7 +787,9 @@ error1:
eth_register(dev);
-#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+#if defined(CONFIG_PHYLIB)
+ mvgbe_phylib_init(dev, PHY_BASE_ADR + devnum);
+#elif defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name, smi_reg_read, smi_reg_write);
/* Set phy address of the port */
miiphy_write(dev->name, MV_PHY_ADR_REQUEST,
--
1.7.10.4
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3 02/10] GPIO: add gpio driver for Orion SoCs
This adds a gpio driver for Marvell Orion SoCs, i.e. orion5x, kirkwood,
dove. This is based on kw_gpio but as gpio capabilities depend heavily
on the mpp configuration for dove, it allows to set gpi/gpo capabilities
from mpp. This should be compatible with the current kw_gpio and porting
mpp of kirkwood and orion5x is appreciated.
Signed-off-by: Sebastian Hesselbarth
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
drivers/gpio/Makefile |1 +
drivers/gpio/orion_gpio.c | 167 +
include/orion_gpio.h | 64 +
3 files changed, 232 insertions(+)
create mode 100644 drivers/gpio/orion_gpio.c
create mode 100644 include/orion_gpio.h
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 2d97b4f..b0ad2b5 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libgpio.o
COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o
COBJS-$(CONFIG_INTEL_ICH6_GPIO)+= intel_ich6_gpio.o
+COBJS-$(CONFIG_ORION_GPIO) += orion_gpio.o
COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o
COBJS-$(CONFIG_MARVELL_GPIO) += mvgpio.o
COBJS-$(CONFIG_MARVELL_MFP)+= mvmfp.o
diff --git a/drivers/gpio/orion_gpio.c b/drivers/gpio/orion_gpio.c
new file mode 100644
index 000..209354d
--- /dev/null
+++ b/drivers/gpio/orion_gpio.c
@@ -0,0 +1,167 @@
+/*
+ * Marvell Orion SoC GPIO handling.
+ *
+ * Sebastian Hesselbarth
+ *
+ * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver.
+ * Removed orion_gpiochip struct and kernel level irq handling.
+ * Dieter Kiermaier dk-arm-li...@gmx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+static unsigned long gpio_valid_input[BITS_TO_LONGS(GPIO_MAX)];
+static unsigned long gpio_valid_output[BITS_TO_LONGS(GPIO_MAX)];
+
+void __set_direction(unsigned pin, int input)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_IO_CONF(base));
+ if (input)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_IO_CONF(base));
+
+ u = readl(GPIO_IO_CONF(base));
+}
+
+void __set_level(unsigned pin, int high)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_OUT(base));
+ if (high)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_OUT(base));
+}
+
+void __set_blinking(unsigned pin, int blink)
+{
+ u32 base = GPIO_BASE(pin);
+ u32 u;
+
+ u = readl(GPIO_BLINK_EN(base));
+ if (blink)
+ u |= 1 << (pin & 31);
+ else
+ u &= ~(1 << (pin & 31));
+ writel(u, GPIO_BLINK_EN(base));
+}
+
+int orion_gpio_is_valid(unsigned pin, int mode)
+{
+ if (pin < GPIO_MAX) {
+ if ((mode & GPIO_INPUT_OK) &&
+ !test_bit(pin, gpio_valid_input))
+ goto err_out;
+
+ if ((mode & GPIO_OUTPUT_OK) &&
+ !test_bit(pin, gpio_valid_output))
+ goto err_out;
+ return 0;
+ }
+
+err_out:
+ printf("%s: invalid GPIO %d/%d\n", __func__, pin, GPIO_MAX);
+ return 1;
+}
+
+void orion_gpio_set_valid(unsigned pin, int mode)
+{
+ if (mode & GPIO_INPUT_OK)
+ __set_bit(pin, gpio_valid_input);
+ else
+ __clear_bit(pin, gpio_valid_input);
+ if (mode & GPIO_OUTPUT_OK)
+ __set_bit(pin, gpio_valid_output);
+ else
+ __clear_bit(pin, gpio_valid_output);
+}
+
+/*
+ * GENERIC_GPIO primitives.
+ */
+int orion_gpio_direction_input(unsigned pin)
+{
+ if (orion_gpio_is_valid(pin, GPIO_INPUT_OK) != 0)
+ return 1;
+
+ /* Configure GPIO direction. */
+ __set_direction(pin, 1);
+
+ return 0;
+}
+
+int orion_gpio_direction_output(unsigned pin
[U-Boot] [PATCH v3 10/10] tools: Add support for Dove to kwboot
On Dove kwboot can also be used to boot an u-boot image into RAM.
In contrast to Kirkwood, Dove does not support the UART boot mode
sequence but requires the UART boot mode to be selected through
strap pins. The SolidRun CuBox has a push button to allow uart
boot mode but fails on the boot sequence sent by kwboot.
This patch adds another cmdline option to allow to send a boot
image without the boot sequence and adds support for Dove.
Signed-off-by: Sebastian Hesselbarth
Signed-off-by: Daniel Stodden
---
Cc: u-boot@lists.denx.de
Cc: Sebastian Hesselbarth
Cc: Rabeeh Khoury
Cc: Albert Aribaud
Cc: Prafulla Wadaskar
Cc: Andy Fleming
Cc: Joe Hershberger
Cc: Daniel Stodden
Cc: Luka Perkov
---
doc/kwboot.1 | 13 ++---
tools/Makefile |2 ++
tools/kwboot.c | 25 +++--
3 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/doc/kwboot.1 b/doc/kwboot.1
index 25fe69a..ab4551b 100644
--- a/doc/kwboot.1
+++ b/doc/kwboot.1
@@ -1,17 +1,18 @@
-.TH KWBOOT 1 "2012-05-19"
+.TH KWBOOT 1 "2013-01-16"
.SH NAME
-kwboot \- Boot Marvell Kirkwood SoCs over a serial link.
+kwboot \- Boot Marvell Kirkwood/Dove SoCs over a serial link.
.SH SYNOPSIS
.B kwboot
.RB [ "-b \fIimage\fP" ]
+.RB [ "-n" ]
.RB [ "-p" ]
.RB [ "-t" ]
.RB [ "-B \fIbaudrate\fP" ]
.RB \fITTY\fP
.SH "DESCRIPTION"
-The \fBmkimage\fP program boots boards based on Marvell's Kirkwood
+The \fBmkimage\fP program boots boards based on Marvell's Kirkwood/Dove
platform over their integrated UART. Boot image files will typically
contain a second stage boot loader, such as U-Boot. The image file
must conform to Marvell's BootROM firmware image format
@@ -68,6 +69,12 @@ If standard I/O streams connect to a console, this mode will
terminate
after receiving 'ctrl-\\' followed by 'c' from console input.
.TP
+.BI "\-u"
+Disables the UART boot mode sequence for platforms that do not support
+it (e.g. Dove). Usually, the UART boot mode must be selected by pressing
+a push button on power-up.
+
+.TP
.BI "\-B \fIbaudrate\fP"
Adjust the baud rate on \fITTY\fP. Default rate is 115200.
diff --git a/tools/Makefile b/tools/Makefile
index 686840a..4816812 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -72,6 +72,7 @@ BIN_FILES-$(CONFIG_SMDK5250) += mksmdk5250spl$(SFX)
BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
+BIN_FILES-$(CONFIG_DOVE) += kwboot$(SFX)
BIN_FILES-$(CONFIG_KIRKWOOD) += kwboot$(SFX)
# Source files which exist outside the tools directory
@@ -103,6 +104,7 @@ OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
NOPED_OBJ_FILES-y += os_support.o
OBJ_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1.o
NOPED_OBJ_FILES-y += ublimage.o
+OBJ_FILES-$(CONFIG_DOVE) += kwboot.o
OBJ_FILES-$(CONFIG_KIRKWOOD) += kwboot.o
# Don't build by default
diff --git a/tools/kwboot.c b/tools/kwboot.c
index e773f01..1e4edb6 100644
--- a/tools/kwboot.c
+++ b/tools/kwboot.c
@@ -37,6 +37,10 @@ static unsigned char kwboot_msg_boot[] = {
0xBB, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77
};
+static unsigned char kwboot_msg_none[] = {
+ 0x00
+};
+
#define KWBOOT_MSG_REQ_DELAY 10 /* ms */
#define KWBOOT_MSG_RSP_TIMEO 50 /* ms */
@@ -268,17 +272,21 @@ kwboot_bootmsg(int tty, void *msg)
int rc;
char c;
- kwboot_printv("Sending boot message. Please reboot the target...");
+ kwboot_printv(msg != kwboot_msg_none
+ ? "Sending boot message. Please reboot the target..."
+ : "Sensing target. Please reboot target into UART mode...");
do {
rc = tcflush(tty, TCIOFLUSH);
if (rc)
break;
- rc = kwboot_tty_send(tty, msg, 8);
- if (rc) {
- usleep(KWBOOT_MSG_REQ_DELAY * 1000);
- continue;
+ if (msg != kwboot_msg_none) {
+ rc = kwboot_tty_send(tty, msg, 8);
+ if (rc) {
+ usleep(KWBOOT_MSG_REQ_DELAY * 1000);
+ continue;
+ }
}
rc = kwboot_tty_recv(tty, &c, 1, KWBOOT_MSG_RSP_TIMEO);
@@ -607,6 +615,7 @@ kwboot_usage(FILE *stream, char *progname)
fprintf(stream, " -b : boot \n");
fprintf(stream, " -p: patch to type 0x69 (uart boot)\n");
fprintf(stream, "\n");
+ fprintf(stream, " -n: don't send boot message\n");
fprintf(stream, " -t: mini terminal\n");
fprintf(stream, "\n");
fprintf(stream, " -B : set baud rate\n");
@@ -636,7 +645,7 @@ main(int argc, char **argv)
kwboot
Re: [U-Boot] [PATCH v3 00/10] Add Marvell Dove and SolidRun CuBox
On 02/11/2013 04:39 AM, Prafulla Wadaskar wrote: -Original Message- From: Sebastian Hesselbarth [mailto:sebastian.hesselba...@gmail.com] Sent: 17 January 2013 00:55 To: Sebastian Hesselbarth Cc: u-boot@lists.denx.de; Rabeeh Khoury; Albert Aribaud; Prafulla Wadaskar; Andy Fleming; Joe Hershberger; Daniel Stodden; Luka Perkov Subject: [PATCH v3 00/10] Add Marvell Dove and SolidRun CuBox This patch set add support for the Marvell Dove 88AP510 SoC and the SolidRun CuBox board based on that SoC. The patch set is divided into the four following sections: Dear Sabastian First of all I express my thanks for initiating this Soc Support in the u-boot. Secondly I express my apology since I could not review then immediately. Please find my comments for entire patch series Prafulla, thanks for the detailled review! I will quickly give some comments about some of your review questions and will do a full re-review later. * About the orion/dove/kirkwood naming convention in linux kernel (that this patch set picks up): When I started hacking on linux and marvell SoCs in particular there was support for orion5x, mv78xx0, kirkwood, and dove. As those SoCs share a bunch of internal peripherals (you might know better) the drivers shared between those SoCs were prepended with "orion_" that should reflect the family of SoCs with that peripherals. I personally find the naming collision with orion5x "unlucky" but that is the way it is. Then there came some effort to also mainline Armada 370/XP series that of course also share "orion" drivers. The final name for all SoCs (including "orion") was mvebu as it is the only common naming scheme that fit (mvebu stands for some business unit within Marvell). Plans for using just "marvell" or "mv" were rejected because there are also pxa SoCs from marvell sitting in the kernel tree. They likely share some of the internal peripherals but that is not reflected within kernel tree, as there are two different hacking communities I guess. New drivers that fit all SoCs (namely pinctrl and gpio, because linux API changes required new drivers from scratch) get mvebu_, drivers that still fit in "orion" get orion_, new soc specific ones get either dove_, kirkwood_, armada_370_, or whatever the code name of that SoC is. Old driver names remain untouched even if they are reused on Armada 370/XP. Whenever I used orion_ in this patch set this refers to orion as in SoC family, not orion5x that you might have been irritated with. * About the kwboot/kwbimage patches: u-boot has kwboot for kirkwood since ages, but the general functionality to boot through UART boot mode also applies to above SoCs. I took kwbimage to reflect that kwboot should be used for booting this image. IMHO introducing new abbreviated image names like dvbimage will just distract people from using the correct tool to boot it. kwboot will not be renamed, will it? * About the ordering of patches/patch sets: (1) Patches 1-5: I have suggestions to break down your patches as mentioned below Add support for the Dove SoC and related drivers. Where possible drivers from Marvell Kirkwood are reused (mvsata, mvgbe), or forked to allow more generic usage (SPI, GPIO). The SDHCI driver is different and a new driver is added for it. The forked drivers can also be reused on Kirkwood but that would have required patching existing boards. (2) Patches 6-8: Allow mvgbe to use the phylib API, add support for 88E1310 PHY and allow Dove to use the driver. (3) Patch 9 Add the SolidRun CuBox as the first board based on Marvell Dove SoC. (4) Patch 10 Add support for different UART boot mode found on Dove. Changelog: v1->v2: - respect review comments by Luka Perkov - fix commenting styles and typos - add MAINTAINERS entry - also update kwboot.1 manpage v2->v3: - integrate kwboot patch from Daniel Stodden - rebase on release v2013.01 Sebastian Hesselbarth (10): ARM: dove: add support for Marvell Dove SoC GPIO: add gpio driver for Orion SoCs MMC: sdhci: Add support for dove sdhci SPI: Add Orion SPI driver block: mvsata: add dove include NET: phy: add 88E1310 PHY initialization NET: mvgbe: add phylib support NET: mvgbe: add support for Dove Boards: Add support for SolidRun CuBox tools: Add support for Dove to kwboot MAINTAINERS |4 + arch/arm/cpu/armv7/dove/Makefile| 49 + arch/arm/cpu/armv7/dove/cpu.c | 266 ++ arch/arm/cpu/armv7/dove/dram.c | 118 arch/arm/cpu/armv7/dove/lowlevel_init.S | 83 arch/arm/cpu/armv7/dove/mpp.c | 318 +++ arch/arm/cpu/armv7/dove/timer.c | 176 + arch/arm/cpu/armv7/dove/usb.c | 101 ++ arch/arm/include/asm/arch-dove/config.h | 153 +++ arch/arm/include/asm/arch-dove/cpu.h
