Re: [PATCH] arm: moxa: add nport6600 platform
On Tue, 1 Aug 2023 at 17:27, Tom Rini wrote: > > On Tue, Aug 01, 2023 at 01:11:28PM +0300, Sergei Antonov wrote: > > On Mon, 31 Jul 2023 at 21:59, Tom Rini wrote: > > > > > > On Mon, Jul 31, 2023 at 09:43:29PM +0300, Sergei Antonov wrote: > > > > > > > Support for NPort 6600 Series RS-232/422/485 secure terminal servers. > > > > > > > > Technical specifications: > > > > FA526 ARMv4 CPU, 64 MB of RAM, 16 MB NOR flash, 100 Mbit/s Ethernet, > > > > optional expansion modules, up to 32 RS-232/422/485 ports. > > > > > > > > Signed-off-by: Sergei Antonov > > > > --- > > > > arch/arm/Kconfig | 9 +++ > > > > arch/arm/dts/nport6600.dts | 134 +++ > > > > > > Where does the device tree come from? > > > > From the datasheet, testing, and a similar dts in Linux: > > https://github.com/torvalds/linux/tree/master/arch/arm/boot/dts/moxa > > It needs to be the same dts as in Linux, and re-synced periodically. > The -u-boot.dtsi file can be used for changes that are still being > staged to Linux, but shouldn't be used indefinitely. There is no dts in Linux for the device (a family of devices) I am submitting. Linux has a dts for a similar device. > > > > diff --git a/board/moxa/nport6600/nport6600.c > > > > b/board/moxa/nport6600/nport6600.c > > > > new file mode 100644 > > > > index ..88fa98c315fd > > > > --- /dev/null > > > > +++ b/board/moxa/nport6600/nport6600.c > > > > @@ -0,0 +1,78 @@ > > > > +// SPDX-License-Identifier: GPL-2.0-or-later > > > > + > > > > +#include > > > > OK. Compiles without it. > > > > > New files must not add common.h > > > > > > > diff --git a/include/configs/nport6600.h b/include/configs/nport6600.h > > > > new file mode 100644 > > > > index ..c70cc7e1ac72 > > > > --- /dev/null > > > > +++ b/include/configs/nport6600.h > > > [snip] > > > > +#define __io > > > > > > What's this for? > > > > Removing it leads to warnings: > > > > .../u-boot/drivers/serial/ns16550.c: In function ‘serial_out_dynamic’: > > .../u-boot/drivers/serial/ns16550.c:111:17: warning: implicit > > declaration of function ‘outb’ [-Wimplicit-function-declaration] > > 111 | outb(value, addr); > > | ^~~~ > > .../u-boot/drivers/serial/ns16550.c: In function ‘serial_in_dynamic’: > > .../u-boot/drivers/serial/ns16550.c:131:24: warning: implicit > > declaration of function ‘inb’; did you mean ‘isb’? > > [-Wimplicit-function-declaration] > > 131 | return inb(addr); > > |^~~ > > |isb > > > > and then linking errors: > > > > .../armv4/lib/gcc/armv4-linux-gnueabi/13.0.1/../../../../armv4-linux-gnueabi/bin/ld: > > /tmp/ccIta0uJ.ltrans12.ltrans.o: in function `ns16550_writeb.isra.0': > > .../u-boot/drivers/serial/ns16550.c:111: undefined reference to `outb' > > .../armv4/lib/gcc/armv4-linux-gnueabi/13.0.1/../../../../armv4-linux-gnueabi/bin/ld: > > /tmp/ccIta0uJ.ltrans12.ltrans.o: in function `ns16550_readb.isra.0': > > .../u-boot/drivers/serial/ns16550.c:131: undefined reference to `inb' > > Oh, you need to be enabling CONFIG_DM_SERIAL. It IS enabled.
Re: [PATCH] arm: moxa: add nport6600 platform
On Mon, 31 Jul 2023 at 21:59, Tom Rini wrote: > > On Mon, Jul 31, 2023 at 09:43:29PM +0300, Sergei Antonov wrote: > > > Support for NPort 6600 Series RS-232/422/485 secure terminal servers. > > > > Technical specifications: > > FA526 ARMv4 CPU, 64 MB of RAM, 16 MB NOR flash, 100 Mbit/s Ethernet, > > optional expansion modules, up to 32 RS-232/422/485 ports. > > > > Signed-off-by: Sergei Antonov > > --- > > arch/arm/Kconfig | 9 +++ > > arch/arm/dts/nport6600.dts | 134 +++ > > Where does the device tree come from? >From the datasheet, testing, and a similar dts in Linux: https://github.com/torvalds/linux/tree/master/arch/arm/boot/dts/moxa > > diff --git a/board/moxa/nport6600/nport6600.c > > b/board/moxa/nport6600/nport6600.c > > new file mode 100644 > > index ..88fa98c315fd > > --- /dev/null > > +++ b/board/moxa/nport6600/nport6600.c > > @@ -0,0 +1,78 @@ > > +// SPDX-License-Identifier: GPL-2.0-or-later > > + > > +#include OK. Compiles without it. > New files must not add common.h > > > diff --git a/include/configs/nport6600.h b/include/configs/nport6600.h > > new file mode 100644 > > index ..c70cc7e1ac72 > > --- /dev/null > > +++ b/include/configs/nport6600.h > [snip] > > +#define __io > > What's this for? Removing it leads to warnings: .../u-boot/drivers/serial/ns16550.c: In function ‘serial_out_dynamic’: .../u-boot/drivers/serial/ns16550.c:111:17: warning: implicit declaration of function ‘outb’ [-Wimplicit-function-declaration] 111 | outb(value, addr); | ^~~~ .../u-boot/drivers/serial/ns16550.c: In function ‘serial_in_dynamic’: .../u-boot/drivers/serial/ns16550.c:131:24: warning: implicit declaration of function ‘inb’; did you mean ‘isb’? [-Wimplicit-function-declaration] 131 | return inb(addr); |^~~ |isb and then linking errors: .../armv4/lib/gcc/armv4-linux-gnueabi/13.0.1/../../../../armv4-linux-gnueabi/bin/ld: /tmp/ccIta0uJ.ltrans12.ltrans.o: in function `ns16550_writeb.isra.0': .../u-boot/drivers/serial/ns16550.c:111: undefined reference to `outb' .../armv4/lib/gcc/armv4-linux-gnueabi/13.0.1/../../../../armv4-linux-gnueabi/bin/ld: /tmp/ccIta0uJ.ltrans12.ltrans.o: in function `ns16550_readb.isra.0': .../u-boot/drivers/serial/ns16550.c:131: undefined reference to `inb'
[PATCH] arm: moxa: add nport6600 platform
Support for NPort 6600 Series RS-232/422/485 secure terminal servers.
Technical specifications:
FA526 ARMv4 CPU, 64 MB of RAM, 16 MB NOR flash, 100 Mbit/s Ethernet,
optional expansion modules, up to 32 RS-232/422/485 ports.
Signed-off-by: Sergei Antonov
---
arch/arm/Kconfig | 9 +++
arch/arm/dts/nport6600.dts | 134 +++
board/moxa/nport6600/Kconfig | 15
board/moxa/nport6600/MAINTAINERS | 7 ++
board/moxa/nport6600/Makefile| 3 +
board/moxa/nport6600/nport6600.c | 78 ++
configs/nport6600_defconfig | 129 +
include/configs/nport6600.h | 13 +++
8 files changed, 388 insertions(+)
create mode 100644 arch/arm/dts/nport6600.dts
create mode 100644 board/moxa/nport6600/Kconfig
create mode 100644 board/moxa/nport6600/MAINTAINERS
create mode 100644 board/moxa/nport6600/Makefile
create mode 100644 board/moxa/nport6600/nport6600.c
create mode 100644 configs/nport6600_defconfig
create mode 100644 include/configs/nport6600.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 97c25b4f146d..de5b746b93c9 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -705,6 +705,14 @@ config TARGET_BCMNS3
ARMv8 Cortex-A72 processors targeting a broad range of networking
applications.
+config TARGET_NPORT6600
+ bool "Support NPort 6600"
+ select CPU_ARM720T
+ help
+ Support for NPort 6600 Series RS-232/422/485 secure terminal servers.
+ FA526 ARMv4 CPU, 64 MB of RAM, 16 MB NOR flash, 100 Mbit/s Ethernet,
+ optional expansion modules, up to 32 RS-232/422/485 ports.
+
config ARCH_EXYNOS
bool "Samsung EXYNOS"
select DM
@@ -2312,6 +2320,7 @@ source "board/hisilicon/hikey960/Kconfig"
source "board/hisilicon/poplar/Kconfig"
source "board/isee/igep003x/Kconfig"
source "board/kontron/sl28/Kconfig"
+source "board/moxa/nport6600/Kconfig"
source "board/myir/mys_6ulx/Kconfig"
source "board/samsung/common/Kconfig"
source "board/siemens/common/Kconfig"
diff --git a/arch/arm/dts/nport6600.dts b/arch/arm/dts/nport6600.dts
new file mode 100644
index ..ea268ed16d9b
--- /dev/null
+++ b/arch/arm/dts/nport6600.dts
@@ -0,0 +1,134 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+
+#include
+
+/ {
+ model = "MOXA NPort 6600 Series";
+ compatible = "moxa,nport6600";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x400>;
+ };
+
+ ahb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges;
+ bootph-all;
+
+ apb {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ bootph-all;
+
+ uart1: serial@98200020 {
+ compatible = "ns16550a";
+ reg = <0x98200020 0x20>;
+ reg-io-width = <4>;
+ reg-shift = <2>;
+ clock-frequency = <14745600>;
+ no-loopback-test;
+ bootph-all;
+ status = "okay";
+ };
+
+ timer: timer@9840 {
+ compatible = "faraday,fttmr010-timer";
+ reg = <0x9840 0x40>;
+ clock-frequency = <1200>;
+ };
+
+ wdt: wdt@9850 {
+ compatible = "faraday,ftwdt010";
+ reg = <0x9850 0x20>;
+ };
+
+ gpio: gpio@9870 {
+ compatible = "faraday,ftgpio010";
+ reg = <0x9870 0x20>;
+ nr-gpios = <32>;
+ #gpio-cells = <2>;
+ };
+
+ rtc {
+ compatible = "holtek,ht1380";
+ rst-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ clk-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
+ dat-gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
+
[PATCH] pci: ftpci100: add new driver implementation
Add a new DM driver supporting FTPCI100 IP used in SoC designs.
This implementation is not based on the old non-DM ftpci100 code
dropped from U-Boot.
Enable the driver in sandbox_defconfig to test compilability.
Signed-off-by: Sergei Antonov
---
configs/sandbox_defconfig | 1 +
drivers/pci/Kconfig| 6 +++
drivers/pci/Makefile | 1 +
drivers/pci/pci_ftpci100.c | 95 ++
4 files changed, 103 insertions(+)
create mode 100644 drivers/pci/pci_ftpci100.c
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index b6c4f735f2bd..c8538d4a193c 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -233,6 +233,7 @@ CONFIG_MUX_MMIO=y
CONFIG_NVME_PCI=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCI_SANDBOX=y
+CONFIG_PCI_FTPCI100=y
CONFIG_PHY=y
CONFIG_PHY_SANDBOX=y
CONFIG_PINCTRL=y
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index aca439d92139..f0678921e99d 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -125,6 +125,12 @@ config PCIE_APPLE
Say Y here if you want to enable PCIe controller support on
Apple SoCs.
+config PCI_FTPCI100
+ bool "Enable Faraday FTPCI100 PCI Bridge Controller driver"
+ help
+ Say Y here if you want to enable Faraday FTPCI100 PCI.
+ FTPCI100 IP is used in SoC chip designs.
+
config PCI_GT64120
bool "GT64120 PCI support"
depends on MIPS
diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile
index 11f60c6991d9..033dce98a4e1 100644
--- a/drivers/pci/Makefile
+++ b/drivers/pci/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_PCI) += pci_auto_common.o pci_common.o
obj-$(CONFIG_PCIE_ECAM_GENERIC) += pcie_ecam_generic.o
obj-$(CONFIG_PCIE_ECAM_SYNQUACER) += pcie_ecam_synquacer.o
obj-$(CONFIG_PCIE_APPLE) += pcie_apple.o
+obj-$(CONFIG_PCI_FTPCI100) += pci_ftpci100.o
obj-$(CONFIG_PCI_GT64120) += pci_gt64120.o
obj-$(CONFIG_PCI_MPC85XX) += pci_mpc85xx.o
obj-$(CONFIG_PCI_MSC01) += pci_msc01.o
diff --git a/drivers/pci/pci_ftpci100.c b/drivers/pci/pci_ftpci100.c
new file mode 100644
index ..a1775445005a
--- /dev/null
+++ b/drivers/pci/pci_ftpci100.c
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include
+#include
+#include
+#include
+
+struct ftpci100_data {
+ void *reg_base;
+};
+
+/* AHB Control Registers */
+struct ftpci100_ahbc {
+ u32 iosize; /* 0x00 - I/O Space Size Signal */
+ u32 prot; /* 0x04 - AHB Protection */
+ u32 rsved[8]; /* 0x08-0x24 - Reserved */
+ u32 conf; /* 0x28 - PCI Configuration */
+ u32 data; /* 0x2c - PCI Configuration DATA */
+};
+
+static int ftpci100_read_config(const struct udevice *dev, pci_dev_t bdf,
+ uint offset, ulong *valuep,
+ enum pci_size_t size)
+{
+ struct ftpci100_data *priv = dev_get_priv(dev);
+ struct ftpci100_ahbc *regs = priv->reg_base;
+ u32 data;
+
+ out_le32(®s->conf, PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf),
PCI_FUNC(bdf), offset));
+ data = in_le32(®s->data);
+ *valuep = pci_conv_32_to_size(data, offset, size);
+
+ return 0;
+}
+
+static int ftpci100_write_config(struct udevice *dev, pci_dev_t bdf,
+uint offset, ulong value,
+enum pci_size_t size)
+{
+ struct ftpci100_data *priv = dev_get_priv(dev);
+ struct ftpci100_ahbc *regs = priv->reg_base;
+ u32 data;
+
+ out_le32(®s->conf, PCI_CONF1_ADDRESS(PCI_BUS(bdf), PCI_DEV(bdf),
PCI_FUNC(bdf), offset));
+
+ if (size == PCI_SIZE_32) {
+ data = value;
+ } else {
+ u32 old = in_le32(®s->data);
+
+ data = pci_conv_size_to_32(old, value, offset, size);
+ }
+
+ out_le32(®s->data, data);
+
+ return 0;
+}
+
+static int ftpci100_probe(struct udevice *dev)
+{
+ struct ftpci100_data *priv = dev_get_priv(dev);
+ struct pci_region *io, *mem;
+ int count;
+
+ count = pci_get_regions(dev, &io, &mem, NULL);
+ if (count != 2) {
+ printf("%s: wrong count of regions: %d != 2\n", dev->name,
count);
+ return -EINVAL;
+ }
+
+ priv->reg_base = phys_to_virt(io->phys_start);
+ if (!priv->reg_base)
+ return -EINVAL;
+
+ return 0;
+}
+
+static const struct dm_pci_ops ftpci100_ops = {
+ .read_config= ftpci100_read_config,
+ .write_config = ftpci100_write_config,
+};
+
+static const struct udevice_id ftpci100_ids[] = {
+ { .compatible = "faraday,ftpci100" },
+ { }
+};
+
+U_BOOT_DRIVER(ftpci100_pci) = {
+ .name = "ftpci100_pci",
+ .id = UCLASS_PCI,
+ .of_match = ftpci100_ids,
+ .ops= &ftpci100_ops,
+ .probe = ftpci100_probe,
+ .priv_auto = sizeof(struct ftpci100_data),
+};
--
2.37.2
[PATCH] watchdog: ftwdt010: need to reset watchdog in ftwdt010_wdt_start()
ftwdt010_wdt_start() has to call ftwdt010_wdt_reset() after setting-up
the timeout in the same fashion ftwdt010_wdt_expire_now() does it.
Without this patch the "wdt start " command does not actually start
the watchdog timer until the "wdt reset" command is executed.
Signed-off-by: Sergei Antonov
---
drivers/watchdog/ftwdt010_wdt.c | 40 +
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c
index a6b33b17209d..1f5f301b1251 100644
--- a/drivers/watchdog/ftwdt010_wdt.c
+++ b/drivers/watchdog/ftwdt010_wdt.c
@@ -25,8 +25,27 @@ struct ftwdt010_wdt_priv {
struct ftwdt010_wdt __iomem *regs;
};
+static int ftwdt010_wdt_reset(struct udevice *dev)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wdt *wd = priv->regs;
+
+ debug("Reset WDT..\n");
+
+ /* clear control register */
+ writel(0, &wd->wdcr);
+
+ /* Write Magic number */
+ writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart);
+
+ /* Enable WDT */
+ writel(FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE, &wd->wdcr);
+
+ return 0;
+}
+
/*
- * Set the watchdog time interval.
+ * Set the watchdog time interval and start the timer.
* Counter is 32 bit.
*/
static int ftwdt010_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
@@ -52,24 +71,7 @@ static int ftwdt010_wdt_start(struct udevice *dev, u64
timeout_ms, ulong flags)
writel(reg, &wd->wdload);
- return 0;
-}
-
-static int ftwdt010_wdt_reset(struct udevice *dev)
-{
- struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
- struct ftwdt010_wdt *wd = priv->regs;
-
- /* clear control register */
- writel(0, &wd->wdcr);
-
- /* Write Magic number */
- writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart);
-
- /* Enable WDT */
- writel((FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE), &wd->wdcr);
-
- return 0;
+ return ftwdt010_wdt_reset(dev);
}
static int ftwdt010_wdt_stop(struct udevice *dev)
--
2.37.2
[PATCH] axi: fix a warning
Fix an enum/integer mismatch encountered in 'sandbox_defconfig' build.
.../u-boot/drivers/axi/axi-emul-uclass.c:16:5: warning: conflicting types for
‘axi_sandbox_get_emul’ due to enum/integer mismatch; have ‘int(struct udevice
*, ulong, enum axi_size_t, struct udevice **)’ {aka ‘int(struct udevice *,
long unsigned int, enum axi_size_t, struct udevice **)’} [-Wenum-int-mismatch]
16 | int axi_sandbox_get_emul(struct udevice *bus, ulong address,
| ^~~~
In file included from .../u-boot/drivers/axi/axi-emul-uclass.c:14:
.../u-boot/arch/sandbox/include/asm/axi.h:48:5: note: previous declaration of
‘axi_sandbox_get_emul’ with type ‘int(struct udevice *, ulong, uint, struct
udevice **)’ {aka ‘int(struct udevice *, long unsigned int, unsigned int,
struct udevice **)’}
48 | int axi_sandbox_get_emul(struct udevice *bus, ulong address, uint
length,
| ^~~~
Make function declaration match function definition.
Cc: Mario Six
Signed-off-by: Sergei Antonov
---
arch/sandbox/include/asm/axi.h | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/sandbox/include/asm/axi.h b/arch/sandbox/include/asm/axi.h
index d483f7b65a02..a93975c6534b 100644
--- a/arch/sandbox/include/asm/axi.h
+++ b/arch/sandbox/include/asm/axi.h
@@ -7,6 +7,8 @@
#ifndef __asm_axi_h
#define __asm_axi_h
+#include
+
#define axi_emul_get_ops(dev) ((struct axi_emul_ops *)(dev)->driver->ops)
/**
@@ -14,10 +16,10 @@
* @bus: The AXI bus from which to retrieve a emulation device
* @address: The address of a transfer that should be handled by a emulation
* device
- * @length: The data width of a transfer that should be handled by a emulation
+ * @size:The data width of a transfer that should be handled by a emulation
* device
* @emulp: Pointer to a buffer receiving the emulation device that handles
- * the transfer specified by the address and length parameters
+ * the transfer specified by the address and size parameters
*
* To test the AXI uclass, we implement a simple AXI emulation device, which is
* a virtual device on a AXI bus that exposes a simple storage interface: When
@@ -45,7 +47,7 @@
* Return: 0 of OK, -ENODEV if no device capable of handling the specified
*transfer exists or the device could not be retrieved
*/
-int axi_sandbox_get_emul(struct udevice *bus, ulong address, uint length,
+int axi_sandbox_get_emul(struct udevice *bus, ulong address, enum axi_size_t
size,
struct udevice **emulp);
/**
* axi_get_store() - Get address of internal storage of a emulated AXI device
--
2.37.2
Re: [PATCH v2] sandbox: fix a compilation error
On Tue, 13 Jun 2023 at 17:58, Simon Glass wrote: > The problem with this is it then cannot be built on non-sandbox > boards. I think v1 was OK. Before the patch as well as after the patch: if CONFIG_SANDBOX_SDL declaration of sandbox_sdl_set_bpp() else definition of sandbox_sdl_set_bpp() returning error end This patch only moves code to another header file in arch/sandbox/include/asm. How can a non-sandbox build fail because of this patch?
[PATCH v2] sandbox: fix a compilation error
With sandbox and sandbox64 configurations:
In file included from .../u-boot/include/test/test.h:156,
from .../u-boot/include/test/lib.h:9,
from .../u-boot/test/lib/test_crc8.c:8:
.../u-boot/arch/sandbox/include/asm/test.h: In function ‘sandbox_sdl_set_bpp’:
.../u-boot/arch/sandbox/include/asm/test.h:323:17: error: ‘ENOSYS’ undeclared
(first use in this function)
323 | return -ENOSYS;
| ^~
Per Tom Rini's suggestion:
move that function prototype over to arch/sandbox/include/asm/sdl.h
and make test/dm/video.c include
Cc: Simon Glass
Suggested-by: Tom Rini
Signed-off-by: Sergei Antonov
---
v2:
* move the function to another file instead of including
arch/sandbox/include/asm/sdl.h | 23 +++
arch/sandbox/include/asm/test.h | 25 -
test/dm/video.c | 1 +
3 files changed, 24 insertions(+), 25 deletions(-)
diff --git a/arch/sandbox/include/asm/sdl.h b/arch/sandbox/include/asm/sdl.h
index 56dcb84803d3..ee4991f7c24a 100644
--- a/arch/sandbox/include/asm/sdl.h
+++ b/arch/sandbox/include/asm/sdl.h
@@ -7,6 +7,7 @@
#define __SANDBOX_SDL_H
#include
+#include
#ifdef CONFIG_SANDBOX_SDL
@@ -87,6 +88,22 @@ int sandbox_sdl_sound_stop(void);
*/
int sandbox_sdl_sound_init(int rate, int channels);
+/**
+ * sandbox_sdl_set_bpp() - Set the depth of the sandbox display
+ *
+ * The device must not be active when this function is called. It activiates it
+ * before returning.
+ *
+ * This updates the depth value and adjusts a few other settings accordingly.
+ * It must be called before the display is probed.
+ *
+ * @dev: Device to adjust
+ * @l2bpp: depth to set
+ * Return: 0 if the device was already active, other error if it fails to probe
+ * after the change
+ */
+int sandbox_sdl_set_bpp(struct udevice *dev, enum video_log2_bpp l2bpp);
+
#else
static inline int sandbox_sdl_init_display(int width, int height, int log2_bpp,
bool double_size)
@@ -134,6 +151,12 @@ static inline int sandbox_sdl_sound_init(int rate, int
channels)
return -ENODEV;
}
+static inline int sandbox_sdl_set_bpp(struct udevice *dev,
+ enum video_log2_bpp l2bpp)
+{
+ return -ENOSYS;
+}
+
#endif
#endif
diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index e482271fe975..17159f8d674a 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -8,7 +8,6 @@
#ifndef __ASM_TEST_H
#define __ASM_TEST_H
-#include
#include
struct unit_test_state;
@@ -300,30 +299,6 @@ void sandbox_cros_ec_set_test_flags(struct udevice *dev,
uint flags);
*/
int sandbox_cros_ec_get_pwm_duty(struct udevice *dev, uint index, uint *duty);
-#if IS_ENABLED(CONFIG_SANDBOX_SDL)
-/**
- * sandbox_sdl_set_bpp() - Set the depth of the sandbox display
- *
- * The device must not be active when this function is called. It activiates it
- * before returning.
- *
- * This updates the depth value and adjusts a few other settings accordingly.
- * It must be called before the display is probed.
- *
- * @dev: Device to adjust
- * @l2bpp: depth to set
- * Return: 0 if the device was already active, other error if it fails to probe
- * after the change
- */
-int sandbox_sdl_set_bpp(struct udevice *dev, enum video_log2_bpp l2bpp);
-#else
-static inline int sandbox_sdl_set_bpp(struct udevice *dev,
- enum video_log2_bpp l2bpp)
-{
- return -ENOSYS;
-}
-#endif
-
/**
* sandbox_set_fake_efi_mgr_dev() - Control EFI bootmgr producing valid
bootflow
*
diff --git a/test/dm/video.c b/test/dm/video.c
index 30778157d940..1c63d16bd28b 100644
--- a/test/dm/video.c
+++ b/test/dm/video.c
@@ -15,6 +15,7 @@
#include
#include
#include
+#include
#include
#include
#include
--
2.37.2
[PATCH] sandbox: fix a compilation error
With sandbox and sandbox64 configurations: In file included from .../u-boot/include/test/test.h:156, from .../u-boot/include/test/lib.h:9, from .../u-boot/test/lib/test_crc8.c:8: .../u-boot/arch/sandbox/include/asm/test.h: In function ‘sandbox_sdl_set_bpp’: .../u-boot/arch/sandbox/include/asm/test.h:323:17: error: ‘ENOSYS’ undeclared (first use in this function) 323 | return -ENOSYS; | ^~ Cc: Tom Rini Cc: Simon Glass Signed-off-by: Sergei Antonov --- arch/sandbox/include/asm/test.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h index e482271fe975..86968ea6d345 100644 --- a/arch/sandbox/include/asm/test.h +++ b/arch/sandbox/include/asm/test.h @@ -8,6 +8,7 @@ #ifndef __ASM_TEST_H #define __ASM_TEST_H +#include #include #include -- 2.37.2
[PATCH] hash: fix a memory leak
memalign() returns a pointer which is to be freed by free(). To call
unmap_sysmem() is incorrect, furthermore it was called in a wrong scope.
Also add a check for allocation error.
Fixes: d7af2baa49c6 ("crypto/fsl: Fix HW accelerated hash commands")
Cc: Breno Lima
Signed-off-by: Sergei Antonov
---
common/hash.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/common/hash.c b/common/hash.c
index 9a52d6073ceb..cbffdfd6db36 100644
--- a/common/hash.c
+++ b/common/hash.c
@@ -586,6 +586,8 @@ int hash_command(const char *algo_name, int flags, struct
cmd_tbl *cmdtp,
output = memalign(ARCH_DMA_MINALIGN,
sizeof(uint32_t) * HASH_MAX_DIGEST_SIZE);
+ if (!output)
+ return CMD_RET_FAILURE;
buf = map_sysmem(addr, len);
algo->hash_func_ws(buf, len, output, algo->chunk_size);
@@ -602,6 +604,7 @@ int hash_command(const char *algo_name, int flags, struct
cmd_tbl *cmdtp,
flags & HASH_FLAG_ENV)) {
printf("ERROR: %s does not contain a valid "
"%s sum\n", *argv, algo->name);
+ free(output);
return 1;
}
if (memcmp(output, vsum, algo->digest_size) != 0) {
@@ -612,6 +615,7 @@ int hash_command(const char *algo_name, int flags, struct
cmd_tbl *cmdtp,
for (i = 0; i < algo->digest_size; i++)
printf("%02x", vsum[i]);
puts(" ** ERROR **\n");
+ free(output);
return 1;
}
} else {
@@ -622,10 +626,10 @@ int hash_command(const char *algo_name, int flags, struct
cmd_tbl *cmdtp,
store_result(algo, output, *argv,
flags & HASH_FLAG_ENV);
}
- unmap_sysmem(output);
-
}
+ free(output);
+
/* Horrible code size hack for boards that just want crc32 */
} else {
ulong crc;
--
2.37.2
Trouble building sandbox
Hello! I get a build error with sandbox and sandbox64 configurations in the latest master. Using gcc version 12.2.0 (Ubuntu 12.2.0-3ubuntu1). In file included from .../u-Boot-Zlib/u-boot/include/test/test.h:156, from .../u-boot/include/test/lib.h:9, from .../u-boot/test/lib/test_crc8.c:8: .../u-boot/arch/sandbox/include/asm/test.h: In function ‘sandbox_sdl_set_bpp’: .../u-boot/arch/sandbox/include/asm/test.h:323:17: error: ‘ENOSYS’ undeclared (first use in this function) 323 | return -ENOSYS; | ^~ It is fixed by adding #include to arch/sandbox/include/asm/test.h Should I submit a patch? Or is it fixed somewhere else?
Re: [PATCH v4 1/3] net: ipv6: Add support for default gateway discovery.
On Sat, 6 May 2023 at 17:53, Tom Rini wrote: > > On Fri, Apr 21, 2023 at 05:08:21PM -0700, emohand...@linux.microsoft.com > wrote: > > > From: Ehsan Mohandesi > > > > In IPv6, the default gateway and prefix length are determined by receiving > > a router advertisement as defined in - > > https://www.rfc-editor.org/rfc/rfc4861. > > > > Add support for sending router solicitation (RS) and processing router > > advertisements (RA). > > > > If the RA has prefix info option and following conditions are met, then > > gatewayip6 and net_prefix_length of ip6addr env variables are initialized. > > These are later consumed by IPv6 code for non-local destination IP. > > > > - "Router Lifetime" != 0 > > - Prefix is NOT link-local prefix (0xfe80::/10) > > - L flag is 1 > > - "Valid Lifetime" != 0 > > > > Timing Parameters: > > - MAX_RTR_SOLICITATION_DELAY (0-1s) > > - RTR_SOLICITATION_INTERVAL (4s) (min retransmit delay) > > - MAX_RTR_SOLICITATIONS (3 RS transmissions) > > > > The functionality is enabled by CONFIG_IPV6_ROUTER_DISCOVERY and invoked > > automatically from net_init_loop(). > > > > Signed-off-by: Ehsan Mohandesi > > Tested-by: Viacheslav Mitrofanov Reviewed-by: > > Tested-by: Viacheslav Mitrofanov > > Reviewed-by: Viacheslav Mitrofanov > > Tested-by: Sergei Antonov > > Reviewed-by: Sergei Antonov > > Applied to u-boot/master, thanks! Hey! It was added without "__packed", see https://lists.denx.de/pipermail/u-boot/2023-May/517370.html
Re: [PATCH v4 1/3] net: ipv6: Add support for default gateway discovery.
On Sat, 22 Apr 2023 at 03:08, wrote:
> + if (prefix->on_link && ntohl(prefix->valid_lifetime))
> {
> + net_prefix_length = prefix->prefix_len;
> + net_gateway6 = ip6->saddr;
> + return 0;
Is it OK that prefix->prefix_len is used, but prefix->prefix is not?
Just curious.
Re: [PATCH v4 1/3] net: ipv6: Add support for default gateway discovery.
On Sat, 22 Apr 2023 at 03:08, wrote:
>
> From: Ehsan Mohandesi
Hello, Ehsan! Good patch, but one little change is needed.
> +struct icmp6_ra_prefix_info {
> + u8 type; /* Type is 3 for Prefix Information. */
> + u8 len;/* Len is 4 for Prefix Information. */
> + /* The number of leading bits in the Prefix that are valid. */
> + u8 prefix_len;
> + u8 reserved1:6,/* MUST be ignored by the receiver. */
> + aac:1, /* autonomous address-configuration flag */
> + /* Indicates that this prefix can be used for on-link determination.
> */
> + on_link:1;
> + /*
> +* The length of time in seconds that the prefix is valid for the
> +* purpose of on-link determination.
> +*/
> + __be32 valid_lifetime;
> + /* The length of time addresses remain preferred. */
> + __be32 preferred_lifetime;
> + __be32 reserved2; /* MUST be ignored by the receiver. */
> + /*
> +* Prefix is an IP address or a prefix of an IP address. The Prefix
> +* Length field contains the number of valid leading bits in the
> prefix.
> +* The bits in the prefix after the prefix length are reserved and
> MUST
> +* be initialized to zero by the sender and ignored by the receiver.
> +*/
> + struct in6_addr prefix;
> +};
Here it should end with:
} __packed;
Because this structure may be placed at a badly aligned offset within
a packet. For example, at offset 0x46 within Ethernet packet.
Other than that:
Tested-by: Sergei Antonov
Reviewed-by: Sergei Antonov
[PATCH v2] watchdog: ftwdt010: return a previously deleted driver now ported to DM
The ftwdt010 watchdog driver was deleted by
commit 11232139e399 ("nds32: Remove the architecture")
Return it to the codebase in a DM compatible form. Enable it in
sandbox_defconfig to test compilability.
Another platform using ftwdt010 will be submitted later.
Signed-off-by: Sergei Antonov
Reviewed-by: Stefan Roese
---
v2:
* "imply WATCHDOG" in Kconfig like other watchdog drivers do
* (by Stefan Roese) make .compatible string the same as in Linux driver
configs/sandbox_defconfig | 1 +
drivers/watchdog/Kconfig| 7 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/ftwdt010_wdt.c | 132
include/faraday/ftwdt010_wdt.h | 3 -
5 files changed, 141 insertions(+), 3 deletions(-)
create mode 100644 drivers/watchdog/ftwdt010_wdt.c
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index cbace259f8..1025aa9fe9 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -322,6 +322,7 @@ CONFIG_WDT=y
CONFIG_WDT_GPIO=y
CONFIG_WDT_SANDBOX=y
CONFIG_WDT_ALARM_SANDBOX=y
+CONFIG_WDT_FTWDT010=y
CONFIG_FS_CBFS=y
CONFIG_FS_CRAMFS=y
CONFIG_ADDR_MAP=y
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index b5ac8f7f50..8f78df509a 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -359,4 +359,11 @@ config SPL_WDT
Enable driver model for watchdog timer in SPL.
This is similar to CONFIG_WDT in U-Boot.
+config WDT_FTWDT010
+ bool "Faraday Technology ftwdt010 watchdog timer support"
+ depends on WDT
+ imply WATCHDOG
+ help
+ Faraday Technology ftwdt010 watchdog is an architecture independent
+ watchdog. It is usually used in SoC chip design.
endmenu
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 446d961d7d..fffa338bef 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_WDT_BOOKE) += booke_wdt.o
obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
obj-$(CONFIG_WDT_ORION) += orion_wdt.o
obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
+obj-$(CONFIG_WDT_FTWDT010) += ftwdt010_wdt.o
obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c
new file mode 100644
index 00..a6b33b1720
--- /dev/null
+++ b/drivers/watchdog/ftwdt010_wdt.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Watchdog driver for the FTWDT010 Watch Dog Driver
+ *
+ * (c) Copyright 2004 Faraday Technology Corp. (www.faraday-tech.com)
+ * Based on sa1100_wdt.c by Oleg Drokin
+ * Based on SoftDog driver by Alan Cox
+ *
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Macpaul Lin, Andes Technology Corporation
+ *
+ * 27/11/2004 Initial release, Faraday.
+ * 12/01/2011 Port to u-boot, Macpaul Lin.
+ * 22/08/2022 Port to DM
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct ftwdt010_wdt_priv {
+ struct ftwdt010_wdt __iomem *regs;
+};
+
+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int ftwdt010_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wdt *wd = priv->regs;
+ unsigned int reg;
+
+ debug("Activating WDT %llu ms\n", timeout_ms);
+
+ /* Check if disabled */
+ if (readl(&wd->wdcr) & ~FTWDT010_WDCR_ENABLE) {
+ printf("sorry, watchdog is disabled\n");
+ return -1;
+ }
+
+ /*
+* In a 66MHz system,
+* if you set WDLOAD as 0x03EF1480 (6600)
+* the reset timer is 1 second.
+*/
+ reg = FTWDT010_WDLOAD(timeout_ms * FTWDT010_TIMEOUT_FACTOR);
+
+ writel(reg, &wd->wdload);
+
+ return 0;
+}
+
+static int ftwdt010_wdt_reset(struct udevice *dev)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wdt *wd = priv->regs;
+
+ /* clear control register */
+ writel(0, &wd->wdcr);
+
+ /* Write Magic number */
+ writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart);
+
+ /* Enable WDT */
+ writel((FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE), &wd->wdcr);
+
+ return 0;
+}
+
+static int ftwdt010_wdt_stop(struct udevice *dev)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wdt *wd = priv->regs;
+
+ debug("Deactivating WDT..\n");
+
+ /*
+* It was defined with CONFIG_WATCHDOG_NOWAYOUT in Linux
+*
+* Shut off the timer.
+* Lock it in if it's a module and we defined ...NOWAYOUT
+*/
+ writel(0, &wd->wdcr);
+ return 0;
+}
+
+static int ftwdt010_wdt_expire_now(struct udevice *dev,
Re: [PATCH] watchdog: ftwdt010: return a previously deleted driver now ported to DM
On Mon, 13 Feb 2023 at 16:52, Sergei Antonov wrote:
>
> The ftwdt010 watchdog driver was deleted by
> commit 11232139e399 ("nds32: Remove the architecture")
>
> Return it to the codebase in a DM compatible form. Enable it in
> sandbox_defconfig to test compilability.
> Another platform using ftwdt010 will be submitted later.
>
> Signed-off-by: Sergei Antonov
+Tom
Hello! Let me remind of this patch. It has been a month without any feedback.
[PATCH] timer: fttmr010: return a previously deleted driver now ported to DM
The fttmr010 timer driver was deleted by
commit 29fc6f24926e ("ARM: remove a320evb board support")
The original source file was: arch/arm/cpu/arm920t/a320/timer.c
Return the driver to the codebase in a DM compatible form.
A platform using fttmr010 will be submitted later.
This hardware is described in the datasheet [1], starting from page 348.
According to the datasheet, there is a Revision Register at offset 0x3C,
which is not present in 'struct fttmr010'. Add it and debug() print
revision in probe function.
[1]
https://bitbucket.org/Kasreyn/mkrom-uc7112lx/src/master/documents/FIC8120_DS_v1.2.pdf
Signed-off-by: Sergei Antonov
---
drivers/timer/Kconfig | 7 +++
drivers/timer/Makefile | 1 +
drivers/timer/fttmr010_timer.c | 92 ++
include/faraday/fttmr010.h | 1 +
4 files changed, 101 insertions(+)
create mode 100644 drivers/timer/fttmr010_timer.c
diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index f32bd16227e3..915b2af160c1 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -145,6 +145,13 @@ config DESIGNWARE_APB_TIMER
Enables support for the Designware APB Timer driver. This timer is
present on Altera SoCFPGA SoCs.
+config FTTMR010_TIMER
+ bool "Faraday Technology timer support"
+ depends on TIMER
+ help
+ Select this to enable support for the timer found on
+ devices using Faraday Technology's IP.
+
config GXP_TIMER
bool "HPE GXP Timer"
depends on TIMER
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index 3c92113fc6fd..cdc20f5e946e 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o
obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o
obj-$(CONFIG_CADENCE_TTC_TIMER)+= cadence-ttc.o
obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
+obj-$(CONFIG_FTTMR010_TIMER) += fttmr010_timer.o
obj-$(CONFIG_GXP_TIMER)+= gxp-timer.o
obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
obj-$(CONFIG_NOMADIK_MTU_TIMER)+= nomadik-mtu-timer.o
diff --git a/drivers/timer/fttmr010_timer.c b/drivers/timer/fttmr010_timer.c
new file mode 100644
index ..b6289e646109
--- /dev/null
+++ b/drivers/timer/fttmr010_timer.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang
+ *
+ * 23/08/2022 Port to DM
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define TIMER_LOAD_VAL 0x
+
+struct fttmr010_timer_priv {
+ struct fttmr010 __iomem *regs;
+};
+
+static u64 fttmr010_timer_get_count(struct udevice *dev)
+{
+ struct fttmr010_timer_priv *priv = dev_get_priv(dev);
+ struct fttmr010 *tmr = priv->regs;
+ u32 now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
+
+ /* increment tbu if tbl has rolled over */
+ if (now < gd->arch.tbl)
+ gd->arch.tbu++;
+ gd->arch.tbl = now;
+
+ return ((u64)gd->arch.tbu << 32) | gd->arch.tbl;
+}
+
+static int fttmr010_timer_probe(struct udevice *dev)
+{
+ struct fttmr010_timer_priv *priv = dev_get_priv(dev);
+ struct fttmr010 *tmr;
+ unsigned int cr;
+
+ priv->regs = dev_read_addr_ptr(dev);
+ if (!priv->regs)
+ return -EINVAL;
+ tmr = priv->regs;
+
+ debug("Faraday FTTMR010 timer revision 0x%08X\n",
readl(&tmr->revision));
+
+ /* disable timers */
+ writel(0, &tmr->cr);
+
+ /* setup timer */
+ writel(TIMER_LOAD_VAL, &tmr->timer3_load);
+ writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
+ writel(0, &tmr->timer3_match1);
+ writel(0, &tmr->timer3_match2);
+
+ /* we don't want timer to issue interrupts */
+ writel(FTTMR010_TM3_MATCH1 |
+ FTTMR010_TM3_MATCH2 |
+ FTTMR010_TM3_OVERFLOW,
+ &tmr->interrupt_mask);
+
+ cr = readl(&tmr->cr);
+ cr |= FTTMR010_TM3_CLOCK; /* use external clock */
+ cr |= FTTMR010_TM3_ENABLE;
+ writel(cr, &tmr->cr);
+
+ gd->arch.tbl = 0;
+ gd->arch.tbu = 0;
+
+ return 0;
+}
+
+static const struct timer_ops fttmr010_timer_ops = {
+ .get_count = fttmr010_timer_get_count,
+};
+
+static const struct udevice_id fttmr010_timer_ids[] = {
+ { .compatible = "faraday,fttmr010-timer" },
+ {}
+};
+
+U_BOOT_DRIVER(fttmr010_timer) = {
+ .name = "fttmr010_timer",
+ .id = UCLASS_TIMER,
+ .of_match = fttmr010_timer_ids,
+ .priv_auto = sizeof(struct fttmr010_timer_priv),
+ .probe = fttmr010_timer_probe,
+ .ops = &fttmr010_timer_ops,
+};
diff --git a/include/faraday/fttmr0
[PATCH] watchdog: ftwdt010: return a previously deleted driver now ported to DM
The ftwdt010 watchdog driver was deleted by
commit 11232139e399 ("nds32: Remove the architecture")
Return it to the codebase in a DM compatible form. Enable it in
sandbox_defconfig to test compilability.
Another platform using ftwdt010 will be submitted later.
Signed-off-by: Sergei Antonov
---
configs/sandbox_defconfig | 1 +
drivers/watchdog/Kconfig| 7 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/ftwdt010_wdt.c | 132
include/faraday/ftwdt010_wdt.h | 3 -
5 files changed, 141 insertions(+), 3 deletions(-)
create mode 100644 drivers/watchdog/ftwdt010_wdt.c
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 34c342b6f587..0c57e97bcb7e 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -320,6 +320,7 @@ CONFIG_WDT=y
CONFIG_WDT_GPIO=y
CONFIG_WDT_SANDBOX=y
CONFIG_WDT_ALARM_SANDBOX=y
+CONFIG_WDT_FTWDT010=y
CONFIG_FS_CBFS=y
CONFIG_FS_CRAMFS=y
CONFIG_ADDR_MAP=y
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index b5ac8f7f50dc..a4c8dac99046 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -161,6 +161,13 @@ config WDT_CORTINA
This driver support all CPU ISAs supported by Cortina
Access CA SoCs.
+config WDT_FTWDT010
+ bool "Faraday Technology ftwdt010 watchdog timer support"
+ depends on WDT
+ help
+ Faraday Technology ftwdt010 watchdog is an architecture independent
+ watchdog. It is usually used in SoC chip design.
+
config WDT_GPIO
bool "External gpio watchdog support"
depends on WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 446d961d7d2e..fffa338bef2f 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_WDT_BOOKE) += booke_wdt.o
obj-$(CONFIG_WDT_CORTINA) += cortina_wdt.o
obj-$(CONFIG_WDT_ORION) += orion_wdt.o
obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
+obj-$(CONFIG_WDT_FTWDT010) += ftwdt010_wdt.o
obj-$(CONFIG_WDT_GPIO) += gpio_wdt.o
obj-$(CONFIG_WDT_MAX6370) += max6370_wdt.o
obj-$(CONFIG_WDT_MESON_GXBB) += meson_gxbb_wdt.o
diff --git a/drivers/watchdog/ftwdt010_wdt.c b/drivers/watchdog/ftwdt010_wdt.c
new file mode 100644
index ..5f4e42e58a47
--- /dev/null
+++ b/drivers/watchdog/ftwdt010_wdt.c
@@ -0,0 +1,132 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Watchdog driver for the FTWDT010 Watch Dog Driver
+ *
+ * (c) Copyright 2004 Faraday Technology Corp. (www.faraday-tech.com)
+ * Based on sa1100_wdt.c by Oleg Drokin
+ * Based on SoftDog driver by Alan Cox
+ *
+ * Copyright (C) 2011 Andes Technology Corporation
+ * Macpaul Lin, Andes Technology Corporation
+ *
+ * 27/11/2004 Initial release, Faraday.
+ * 12/01/2011 Port to u-boot, Macpaul Lin.
+ * 22/08/2022 Port to DM
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct ftwdt010_wdt_priv {
+ struct ftwdt010_wdt __iomem *regs;
+};
+
+/*
+ * Set the watchdog time interval.
+ * Counter is 32 bit.
+ */
+static int ftwdt010_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wdt *wd = priv->regs;
+ unsigned int reg;
+
+ debug("Activating WDT %llu ms\n", timeout_ms);
+
+ /* Check if disabled */
+ if (readl(&wd->wdcr) & ~FTWDT010_WDCR_ENABLE) {
+ printf("sorry, watchdog is disabled\n");
+ return -1;
+ }
+
+ /*
+* In a 66MHz system,
+* if you set WDLOAD as 0x03EF1480 (6600)
+* the reset timer is 1 second.
+*/
+ reg = FTWDT010_WDLOAD(timeout_ms * FTWDT010_TIMEOUT_FACTOR);
+
+ writel(reg, &wd->wdload);
+
+ return 0;
+}
+
+static int ftwdt010_wdt_reset(struct udevice *dev)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wdt *wd = priv->regs;
+
+ /* clear control register */
+ writel(0, &wd->wdcr);
+
+ /* Write Magic number */
+ writel(FTWDT010_WDRESTART_MAGIC, &wd->wdrestart);
+
+ /* Enable WDT */
+ writel((FTWDT010_WDCR_RST | FTWDT010_WDCR_ENABLE), &wd->wdcr);
+
+ return 0;
+}
+
+static int ftwdt010_wdt_stop(struct udevice *dev)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wdt *wd = priv->regs;
+
+ debug("Deactivating WDT..\n");
+
+ /*
+* It was defined with CONFIG_WATCHDOG_NOWAYOUT in Linux
+*
+* Shut off the timer.
+* Lock it in if it's a module and we defined ...NOWAYOUT
+*/
+ writel(0, &wd->wdcr);
+ return 0;
+}
+
+static int ftwdt010_wdt_expire_now(struct udevice *dev, ulong flags)
+{
+ struct ftwdt010_wdt_priv *priv = dev_get_priv(dev);
+ struct ftwdt010_wd
Re: [PATCH v2 2/3] net: ftmac100: simplify priv->iobase casting
On Fri, 3 Feb 2023 at 01:05, Tom Rini wrote: > > On Thu, Jan 19, 2023 at 10:51:15PM +0300, Sergei Antonov wrote: > > > Replace 'phys_addr_t iobase' with 'struct ftmac100 *ftmac100' > > in order to cast once on assignment and remove casting in a > > number of other places. > > > > Signed-off-by: Sergei Antonov > > Reviewed-by: Ramon Fried > > This introduces: >riscv32: + ae350_rv32 > +(ae350_rv32) drivers/net/ftmac100.c: In function 'ftmac100_of_to_plat': > +(ae350_rv32) drivers/net/ftmac100.c:317:26: error: cast to pointer from > integer of different size [-Werror=int-to-pointer-cast] > +(ae350_rv32) 317 | priv->ftmac100 = (struct ftmac100 > *)pdata->iobase; Thanks! I have just sent a v3 of the patch in which cast is replaced with phys_to_virt().
[PATCH v3 3/3] net: ftmac100: add mii read and write callbacks
Register mii_bus with read and write callbacks to allow the 'mii'
command to work. Use a timeout of 10 ms to wait for the R/W
operations to complete.
Signed-off-by: Sergei Antonov
---
v2 -> v3:
no change
v1 -> v2:
* fix a typo in the description
* add a dependency from MII to Kconfig
drivers/net/Kconfig| 1 +
drivers/net/ftmac100.c | 103 +
drivers/net/ftmac100.h | 9
3 files changed, 113 insertions(+)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 62d2c03849af..6006cfc82d50 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -406,6 +406,7 @@ config FSL_FM_10GEC_REGULAR_NOTATION
config FTMAC100
bool "Ftmac100 Ethernet Support"
+ select MII
help
This MAC is present in Andestech SoCs.
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index e7b9d88ea9cd..fae3adc3de34 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -12,9 +12,13 @@
#include
#include
#include
+#include
+#include
+#include
#include
#include
#include
+#include
#include "ftmac100.h"
#include
@@ -23,12 +27,16 @@ DECLARE_GLOBAL_DATA_PTR;
#define ETH_ZLEN 60
+/* Timeout for a mdio read/write operation */
+#define FTMAC100_MDIO_TIMEOUT_USEC 1
+
struct ftmac100_data {
struct ftmac100_txdes txdes[1];
struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
const char *name;
struct ftmac100 *ftmac100;
+ struct mii_dev *bus;
};
/*
@@ -322,10 +330,104 @@ static int ftmac100_of_to_plat(struct udevice *dev)
return 0;
}
+/*
+ * struct mii_bus functions
+ */
+static int ftmac100_mdio_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
+{
+ struct ftmac100_data *priv = bus->priv;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
+ int phycr = FTMAC100_PHYCR_PHYAD(addr) |
+ FTMAC100_PHYCR_REGAD(reg) |
+ FTMAC100_PHYCR_MIIRD;
+ int ret;
+
+ writel(phycr, &ftmac100->phycr);
+
+ ret = readl_poll_timeout(&ftmac100->phycr, phycr,
+!(phycr & FTMAC100_PHYCR_MIIRD),
+FTMAC100_MDIO_TIMEOUT_USEC);
+ if (ret)
+ pr_err("%s: mdio read failed (addr=0x%x reg=0x%x)\n",
+ bus->name, addr, reg);
+ else
+ ret = phycr & FTMAC100_PHYCR_MIIRDATA;
+
+ return ret;
+}
+
+static int ftmac100_mdio_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
+{
+ struct ftmac100_data *priv = bus->priv;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
+ int phycr = FTMAC100_PHYCR_PHYAD(addr) |
+ FTMAC100_PHYCR_REGAD(reg) |
+ FTMAC100_PHYCR_MIIWR;
+ int ret;
+
+ writel(value, &ftmac100->phywdata);
+ writel(phycr, &ftmac100->phycr);
+
+ ret = readl_poll_timeout(&ftmac100->phycr, phycr,
+!(phycr & FTMAC100_PHYCR_MIIWR),
+FTMAC100_MDIO_TIMEOUT_USEC);
+ if (ret)
+ pr_err("%s: mdio write failed (addr=0x%x reg=0x%x)\n",
+ bus->name, addr, reg);
+
+ return ret;
+}
+
+static int ftmac100_mdio_init(struct udevice *dev)
+{
+ struct ftmac100_data *priv = dev_get_priv(dev);
+ struct mii_dev *bus;
+ int ret;
+
+ bus = mdio_alloc();
+ if (!bus)
+ return -ENOMEM;
+
+ bus->read = ftmac100_mdio_read;
+ bus->write = ftmac100_mdio_write;
+ bus->priv = priv;
+
+ ret = mdio_register_seq(bus, dev_seq(dev));
+ if (ret) {
+ mdio_free(bus);
+ return ret;
+ }
+
+ priv->bus = bus;
+
+ return 0;
+}
+
static int ftmac100_probe(struct udevice *dev)
{
struct ftmac100_data *priv = dev_get_priv(dev);
priv->name = dev->name;
+ int ret = 0;
+
+ ret = ftmac100_mdio_init(dev);
+ if (ret) {
+ dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
+ goto out;
+ }
+
+out:
+ return ret;
+}
+
+static int ftmac100_remove(struct udevice *dev)
+{
+ struct ftmac100_data *priv = dev_get_priv(dev);
+
+ mdio_unregister(priv->bus);
+ mdio_free(priv->bus);
+
return 0;
}
@@ -354,6 +456,7 @@ U_BOOT_DRIVER(ftmac100) = {
.bind = ftmac100_bind,
.of_to_plat = ftmac100_of_to_plat,
.probe = ftmac100_probe,
+ .remove = ftmac100_remove,
.ops= &ftmac100_ops,
.priv_auto = sizeof(struct ftmac100_data),
.plat_auto = sizeof(struct eth_pdata),
diff --git a/drivers/net/ftmac100.h b/drivers
[PATCH v3 2/3] net: ftmac100: simplify priv->iobase casting
Replace 'phys_addr_t iobase' with 'struct ftmac100 *ftmac100' in
struct ftmac100_data. It allows to remove casting in a number of places.
Since priv->iobase is phys_addr_t, use phys_to_virt() to make
a pointer from it.
Signed-off-by: Sergei Antonov
---
v2 -> v3:
Fix the following warning by using phys_to_virt() to get a pointer from
phys_addr_t.
(ae350_rv32) drivers/net/ftmac100.c:317:26: error: cast to pointer from integer
of different size [-Werror=int-to-pointer-cast]
(ae350_rv32) 317 | priv->ftmac100 = (struct ftmac100 *)pdata->iobase;
v1 -> v2:
no change
drivers/net/ftmac100.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index 7c89d7f67b8d..e7b9d88ea9cd 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -28,7 +28,7 @@ struct ftmac100_data {
struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
const char *name;
- phys_addr_t iobase;
+ struct ftmac100 *ftmac100;
};
/*
@@ -36,7 +36,7 @@ struct ftmac100_data {
*/
static void ftmac100_reset(struct ftmac100_data *priv)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
debug ("%s()\n", __func__);
@@ -57,7 +57,7 @@ static void ftmac100_reset(struct ftmac100_data *priv)
static void ftmac100_set_mac(struct ftmac100_data *priv ,
const unsigned char *mac)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
unsigned int maddr = mac[0] << 8 | mac[1];
unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
@@ -72,7 +72,7 @@ static void ftmac100_set_mac(struct ftmac100_data *priv ,
*/
static void _ftmac100_halt(struct ftmac100_data *priv)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
debug ("%s()\n", __func__);
writel (0, &ftmac100->maccr);
}
@@ -82,7 +82,7 @@ static void _ftmac100_halt(struct ftmac100_data *priv)
*/
static int _ftmac100_init(struct ftmac100_data *priv, unsigned char
enetaddr[6])
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
struct ftmac100_txdes *txdes = priv->txdes;
struct ftmac100_rxdes *rxdes = priv->rxdes;
unsigned int maccr;
@@ -187,7 +187,7 @@ static int __ftmac100_recv(struct ftmac100_data *priv)
*/
static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
struct ftmac100_txdes *curr_des = priv->txdes;
ulong start;
@@ -314,7 +314,7 @@ static int ftmac100_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
const char *mac;
pdata->iobase = dev_read_addr(dev);
- priv->iobase = pdata->iobase;
+ priv->ftmac100 = phys_to_virt(pdata->iobase);
mac = dtbmacaddr(0);
if (mac)
memcpy(pdata->enetaddr , mac , 6);
--
2.34.1
[PATCH v3 1/3] net: ftmac100: change driver name from nds32_mac to ftmac100
So it will be named similarly to the related ftgmac100 driver.
The old name 'nds32_mac' is not referred to anywhere in U-Boot.
Signed-off-by: Sergei Antonov
Reviewed-by: Ramon Fried
---
v2 -> v3:
no change
v1 -> v2:
no change
drivers/net/ftmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index f710c271c64b..7c89d7f67b8d 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -348,7 +348,7 @@ static const struct udevice_id ftmac100_ids[] = {
};
U_BOOT_DRIVER(ftmac100) = {
- .name = "nds32_mac",
+ .name = "ftmac100",
.id = UCLASS_ETH,
.of_match = ftmac100_ids,
.bind = ftmac100_bind,
--
2.34.1
Re: [PATCH 3/3] net: ftmac100: add mii read and write callbacks
On Tue, 10 Jan 2023 at 20:13, Ramon Fried wrote: > Reviewed-by: Ramon Fried Hello, Ramon! I have just submitted a v2 of this patch. The only substantial difference there is a Kconfig addition. If you are fine with it, could you please give it your "Reviewed-by"?
[PATCH v2 3/3] net: ftmac100: add mii read and write callbacks
Register mii_bus with read and write callbacks to allow the 'mii'
command to work. Use a timeout of 10 ms to wait for the R/W
operations to complete.
Signed-off-by: Sergei Antonov
---
v1 -> v2:
* fix a typo in the description
* add a dependency from MII to Kconfig
* rebase to the current master
drivers/net/Kconfig| 1 +
drivers/net/ftmac100.c | 103 +
drivers/net/ftmac100.h | 9
3 files changed, 113 insertions(+)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 7873538cc2df..017931956990 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -406,6 +406,7 @@ config FSL_FM_10GEC_REGULAR_NOTATION
config FTMAC100
bool "Ftmac100 Ethernet Support"
+ select MII
help
This MAC is present in Andestech SoCs.
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index cc88ea17ffe7..1cf109b278cc 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -12,9 +12,13 @@
#include
#include
#include
+#include
+#include
+#include
#include
#include
#include
+#include
#include "ftmac100.h"
#include
@@ -23,12 +27,16 @@ DECLARE_GLOBAL_DATA_PTR;
#define ETH_ZLEN 60
+/* Timeout for a mdio read/write operation */
+#define FTMAC100_MDIO_TIMEOUT_USEC 1
+
struct ftmac100_data {
struct ftmac100_txdes txdes[1];
struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
const char *name;
struct ftmac100 *ftmac100;
+ struct mii_dev *bus;
};
/*
@@ -322,10 +330,104 @@ static int ftmac100_of_to_plat(struct udevice *dev)
return 0;
}
+/*
+ * struct mii_bus functions
+ */
+static int ftmac100_mdio_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
+{
+ struct ftmac100_data *priv = bus->priv;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
+ int phycr = FTMAC100_PHYCR_PHYAD(addr) |
+ FTMAC100_PHYCR_REGAD(reg) |
+ FTMAC100_PHYCR_MIIRD;
+ int ret;
+
+ writel(phycr, &ftmac100->phycr);
+
+ ret = readl_poll_timeout(&ftmac100->phycr, phycr,
+!(phycr & FTMAC100_PHYCR_MIIRD),
+FTMAC100_MDIO_TIMEOUT_USEC);
+ if (ret)
+ pr_err("%s: mdio read failed (addr=0x%x reg=0x%x)\n",
+ bus->name, addr, reg);
+ else
+ ret = phycr & FTMAC100_PHYCR_MIIRDATA;
+
+ return ret;
+}
+
+static int ftmac100_mdio_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
+{
+ struct ftmac100_data *priv = bus->priv;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
+ int phycr = FTMAC100_PHYCR_PHYAD(addr) |
+ FTMAC100_PHYCR_REGAD(reg) |
+ FTMAC100_PHYCR_MIIWR;
+ int ret;
+
+ writel(value, &ftmac100->phywdata);
+ writel(phycr, &ftmac100->phycr);
+
+ ret = readl_poll_timeout(&ftmac100->phycr, phycr,
+!(phycr & FTMAC100_PHYCR_MIIWR),
+FTMAC100_MDIO_TIMEOUT_USEC);
+ if (ret)
+ pr_err("%s: mdio write failed (addr=0x%x reg=0x%x)\n",
+ bus->name, addr, reg);
+
+ return ret;
+}
+
+static int ftmac100_mdio_init(struct udevice *dev)
+{
+ struct ftmac100_data *priv = dev_get_priv(dev);
+ struct mii_dev *bus;
+ int ret;
+
+ bus = mdio_alloc();
+ if (!bus)
+ return -ENOMEM;
+
+ bus->read = ftmac100_mdio_read;
+ bus->write = ftmac100_mdio_write;
+ bus->priv = priv;
+
+ ret = mdio_register_seq(bus, dev_seq(dev));
+ if (ret) {
+ mdio_free(bus);
+ return ret;
+ }
+
+ priv->bus = bus;
+
+ return 0;
+}
+
static int ftmac100_probe(struct udevice *dev)
{
struct ftmac100_data *priv = dev_get_priv(dev);
priv->name = dev->name;
+ int ret = 0;
+
+ ret = ftmac100_mdio_init(dev);
+ if (ret) {
+ dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
+ goto out;
+ }
+
+out:
+ return ret;
+}
+
+static int ftmac100_remove(struct udevice *dev)
+{
+ struct ftmac100_data *priv = dev_get_priv(dev);
+
+ mdio_unregister(priv->bus);
+ mdio_free(priv->bus);
+
return 0;
}
@@ -354,6 +456,7 @@ U_BOOT_DRIVER(ftmac100) = {
.bind = ftmac100_bind,
.of_to_plat = ftmac100_of_to_plat,
.probe = ftmac100_probe,
+ .remove = ftmac100_remove,
.ops= &ftmac100_ops,
.priv_auto = sizeof(struct ftmac100_data),
.plat_auto = sizeof(struct eth_pdata),
diff --git a/drivers/net/ftmac100.h b/drivers/ne
[PATCH v2 2/3] net: ftmac100: simplify priv->iobase casting
Replace 'phys_addr_t iobase' with 'struct ftmac100 *ftmac100'
in order to cast once on assignment and remove casting in a
number of other places.
Signed-off-by: Sergei Antonov
Reviewed-by: Ramon Fried
---
v1 -> v2:
no change
drivers/net/ftmac100.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index b3da9479ea5e..bb39e837bbe7 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -28,7 +28,7 @@ struct ftmac100_data {
struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
const char *name;
- phys_addr_t iobase;
+ struct ftmac100 *ftmac100;
};
/*
@@ -36,7 +36,7 @@ struct ftmac100_data {
*/
static void ftmac100_reset(struct ftmac100_data *priv)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
debug ("%s()\n", __func__);
@@ -57,7 +57,7 @@ static void ftmac100_reset(struct ftmac100_data *priv)
static void ftmac100_set_mac(struct ftmac100_data *priv ,
const unsigned char *mac)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
unsigned int maddr = mac[0] << 8 | mac[1];
unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
@@ -72,7 +72,7 @@ static void ftmac100_set_mac(struct ftmac100_data *priv ,
*/
static void _ftmac100_halt(struct ftmac100_data *priv)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
debug ("%s()\n", __func__);
writel (0, &ftmac100->maccr);
}
@@ -82,7 +82,7 @@ static void _ftmac100_halt(struct ftmac100_data *priv)
*/
static int _ftmac100_init(struct ftmac100_data *priv, unsigned char
enetaddr[6])
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
struct ftmac100_txdes *txdes = priv->txdes;
struct ftmac100_rxdes *rxdes = priv->rxdes;
unsigned int maccr;
@@ -187,7 +187,7 @@ static int __ftmac100_recv(struct ftmac100_data *priv)
*/
static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
struct ftmac100_txdes *curr_des = priv->txdes;
ulong start;
@@ -400,7 +400,7 @@ static int ftmac100_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
const char *mac;
pdata->iobase = dev_read_addr(dev);
- priv->iobase = pdata->iobase;
+ priv->ftmac100 = (struct ftmac100 *)pdata->iobase;
mac = dtbmacaddr(0);
if (mac)
memcpy(pdata->enetaddr , mac , 6);
--
2.34.1
[PATCH v2 1/3] net: ftmac100: change driver name from nds32_mac to ftmac100
So it will be named similarly to the related ftgmac100 driver.
The old name 'nds32_mac' is not referred to anywhere in U-Boot.
Signed-off-by: Sergei Antonov
Reviewed-by: Ramon Fried
---
v1 -> v2:
no change
drivers/net/ftmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index c30ace96bb13..b3da9479ea5e 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -434,7 +434,7 @@ static const struct udevice_id ftmac100_ids[] = {
};
U_BOOT_DRIVER(ftmac100) = {
- .name = "nds32_mac",
+ .name = "ftmac100",
.id = UCLASS_ETH,
.of_match = ftmac100_ids,
.bind = ftmac100_bind,
--
2.34.1
Making assembler listing files?
Hello! Why is not there a scripts/makelst file? Command "make net/net6.lst" produces error output: MKLST net/net6.lst /bin/bash: .../u-boot/scripts/makelst: No such file or directory I was only able to create a listing when I copied scripts/makelst from Linux source tree.
Re: [PATCH] net: ipv6: fix alignment errors on ARM
On Thu, 19 Jan 2023 at 11:18, Vyacheslav V. Mitrofanov
wrote:
>
> On Wed, 2023-01-18 at 20:52 +0300, Sergei Antonov wrote:
> > Commands "ping6" and "tftpboot ... -ipv6" did not work on ARM because
> > machine code expects 4-byte alignment and some structures from net6.h
> > are not aligned in memory.
> >
> > Fix by adding __packed, since it is already used in this file.
> >
> > Signed-off-by: Sergei Antonov
> > ---
> > include/net6.h | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/include/net6.h b/include/net6.h
> > index 9b3de028e6dc..2d7c5a096046 100644
> > --- a/include/net6.h
> > +++ b/include/net6.h
> > @@ -24,7 +24,7 @@ struct in6_addr {
> > #define s6_addrin6_u.u6_addr8
> > #define s6_addr16 in6_u.u6_addr16
> > #define s6_addr32 in6_u.u6_addr32
> > -};
> > +} __packed;
> >
> > #define IN6ADDRSZ sizeof(struct in6_addr)
> > #define INETHADDRSZsizeof(net_ethaddr)
> > @@ -62,7 +62,7 @@ struct ip6_hdr {
> > u8 hop_limit;
> > struct in6_addr saddr;
> > struct in6_addr daddr;
> > -};
> > +} __packed;
> > #define IP6_HDR_SIZE (sizeof(struct ip6_hdr))
> >
> > /* struct udp_hdr - User Datagram Protocol header */
> > @@ -164,7 +164,7 @@ struct icmp6hdr {
> > #define icmp6_addrconf_managed icmp6_dataun.u_nd_ra.managed
> > #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other
> > #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime
> > -};
> > +} __packed;
> >
> > extern struct in6_addr const net_null_addr_ip6;/* NULL IPv6
> > address */
> > extern struct in6_addr net_gateway6; /* Our gateways IPv6 address
> > */
> > --
> > 2.34.1
> >
> Hello, Sergei!
>
> I didn't get you a little bit. You mean holes between fields of
> structures or alignment of the beginning?
No, it is not about holes between fields. It is about the address at
which a structure is placed in memory. In combination with store
merging it leads to unaligned memory access. At least for struct
ip6_hdr, which I studied using assembly listing files. The struct
ip6_hdr is not placed at 4-byte aligned address because it is 14 bytes
off from the beginning of the Ethernet packet.
Also see how the corresponding IPv4 struct ip_hdr from net.h was fixed
by commit 704f3acfcf553. I should have referred to it in my commit
description.
> Frankly speaking I always thought that in that kind of structure like
> below it is not necessary. To be honest I disassembled the same code on
> arm and there were no holes.
The following code from net6.c
int ip6_add_hdr(uchar *xip, struct in6_addr *src, struct in6_addr *dest,
int nextheader, int hoplimit, int payload_len)
{
struct ip6_hdr *ip6 = (struct ip6_hdr *)xip;
ip6->version = 6;
ip6->priority = 0;
ip6->flow_lbl[0] = 0;
ip6->flow_lbl[1] = 0;
ip6->flow_lbl[2] = 0;
is optimized into:
801ab138: e3a02060mov r2, #96 @ 0x60
801ab13c: e1a04000mov r4, r0
801ab140: e5802000str r2, [r0]
The last instruction does all 5 different assignments from C code at once.
[PATCH] net: ipv6: fix alignment errors on ARM
Commands "ping6" and "tftpboot ... -ipv6" did not work on ARM because
machine code expects 4-byte alignment and some structures from net6.h
are not aligned in memory.
Fix by adding __packed, since it is already used in this file.
Signed-off-by: Sergei Antonov
---
include/net6.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/net6.h b/include/net6.h
index 9b3de028e6dc..2d7c5a096046 100644
--- a/include/net6.h
+++ b/include/net6.h
@@ -24,7 +24,7 @@ struct in6_addr {
#define s6_addrin6_u.u6_addr8
#define s6_addr16 in6_u.u6_addr16
#define s6_addr32 in6_u.u6_addr32
-};
+} __packed;
#define IN6ADDRSZ sizeof(struct in6_addr)
#define INETHADDRSZsizeof(net_ethaddr)
@@ -62,7 +62,7 @@ struct ip6_hdr {
u8 hop_limit;
struct in6_addr saddr;
struct in6_addr daddr;
-};
+} __packed;
#define IP6_HDR_SIZE (sizeof(struct ip6_hdr))
/* struct udp_hdr - User Datagram Protocol header */
@@ -164,7 +164,7 @@ struct icmp6hdr {
#define icmp6_addrconf_managed icmp6_dataun.u_nd_ra.managed
#define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other
#define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime
-};
+} __packed;
extern struct in6_addr const net_null_addr_ip6;/* NULL IPv6 address */
extern struct in6_addr net_gateway6; /* Our gateways IPv6 address */
--
2.34.1
Re: [PATCH] ns16550: Fix DM serial operation with non-DM SPL
On Tue, 17 Jan 2023 at 19:14, Andre Przywara wrote: > > On Tue, 17 Jan 2023 16:12:54 +0300 > Sergei Antonov wrote: > > Hi Sergei, > > > On Tue, 17 Jan 2023 at 15:10, Andre Przywara wrote: > > > > > -#if CONFIG_IS_ENABLED(DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE) > > > +#if CONFIG_IS_ENABLED(DM_SERIAL) > > > /* > > > * For driver model we always use one byte per register, and sort out the > > > * differences in the driver > > > */ > > > +#undef CONFIG_SYS_NS16550_REG_SIZE > > > #define CONFIG_SYS_NS16550_REG_SIZE (-1) > > > #endif > > > > What if I have DM_SERIAL and a 16550 UART with 32-bit registers? > > So does that break for you? > Because it should still work, I think, since (as the comment says) we just > use the struct to get the register *number*. The actual register size is > worked out from the DT, and multiplied in later. > > > Before 9591b63531fa the register size of 8 was enforced for DM_SERIAL. > > 8? Or 4? Oh, I meant 8-bit. So under DM_SERIAL: CONFIG_SYS_NS16550_REG_SIZE is -1 UART_REG(x) is unsigned char x > What does your reg-shift DT property say? Is that in your DT? I did not have "reg-shift" property. Thanks for telling about it. Now that I have these properties in DT my UART works. reg-io-width = <4>; reg-shift = <2>; I also had to add this config parameter to make debug uart work: CONFIG_DEBUG_UART_SHIFT=2 Thanks!
Re: [PATCH] ns16550: Fix DM serial operation with non-DM SPL
On Tue, 17 Jan 2023 at 15:10, Andre Przywara wrote: > -#if CONFIG_IS_ENABLED(DM_SERIAL) && !defined(CONFIG_SYS_NS16550_REG_SIZE) > +#if CONFIG_IS_ENABLED(DM_SERIAL) > /* > * For driver model we always use one byte per register, and sort out the > * differences in the driver > */ > +#undef CONFIG_SYS_NS16550_REG_SIZE > #define CONFIG_SYS_NS16550_REG_SIZE (-1) > #endif What if I have DM_SERIAL and a 16550 UART with 32-bit registers? Before 9591b63531fa the register size of 8 was enforced for DM_SERIAL.
[PATCH 3/3] net: ftmac100: add mii read and write callbacks
Register mii_bus with read and write callbacks tp allow the 'mii'
command to work. Use a timeout of 10 ms to wait for the R/W
operations to complete.
Signed-off-by: Sergei Antonov
---
drivers/net/ftmac100.c | 103 +
drivers/net/ftmac100.h | 9
2 files changed, 112 insertions(+)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index bb39e837bbe7..10395c94f9d1 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -12,9 +12,13 @@
#include
#include
#include
+#include
+#include
+#include
#include
#include
#include
+#include
#include "ftmac100.h"
#ifdef CONFIG_DM_ETH
@@ -23,12 +27,16 @@ DECLARE_GLOBAL_DATA_PTR;
#endif
#define ETH_ZLEN 60
+/* Timeout for a mdio read/write operation */
+#define FTMAC100_MDIO_TIMEOUT_USEC 1
+
struct ftmac100_data {
struct ftmac100_txdes txdes[1];
struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
const char *name;
struct ftmac100 *ftmac100;
+ struct mii_dev *bus;
};
/*
@@ -408,10 +416,104 @@ static int ftmac100_of_to_plat(struct udevice *dev)
return 0;
}
+/*
+ * struct mii_bus functions
+ */
+static int ftmac100_mdio_read(struct mii_dev *bus, int addr, int devad,
+ int reg)
+{
+ struct ftmac100_data *priv = bus->priv;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
+ int phycr = FTMAC100_PHYCR_PHYAD(addr) |
+ FTMAC100_PHYCR_REGAD(reg) |
+ FTMAC100_PHYCR_MIIRD;
+ int ret;
+
+ writel(phycr, &ftmac100->phycr);
+
+ ret = readl_poll_timeout(&ftmac100->phycr, phycr,
+!(phycr & FTMAC100_PHYCR_MIIRD),
+FTMAC100_MDIO_TIMEOUT_USEC);
+ if (ret)
+ pr_err("%s: mdio read failed (addr=0x%x reg=0x%x)\n",
+ bus->name, addr, reg);
+ else
+ ret = phycr & FTMAC100_PHYCR_MIIRDATA;
+
+ return ret;
+}
+
+static int ftmac100_mdio_write(struct mii_dev *bus, int addr, int devad,
+ int reg, u16 value)
+{
+ struct ftmac100_data *priv = bus->priv;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
+ int phycr = FTMAC100_PHYCR_PHYAD(addr) |
+ FTMAC100_PHYCR_REGAD(reg) |
+ FTMAC100_PHYCR_MIIWR;
+ int ret;
+
+ writel(value, &ftmac100->phywdata);
+ writel(phycr, &ftmac100->phycr);
+
+ ret = readl_poll_timeout(&ftmac100->phycr, phycr,
+!(phycr & FTMAC100_PHYCR_MIIWR),
+FTMAC100_MDIO_TIMEOUT_USEC);
+ if (ret)
+ pr_err("%s: mdio write failed (addr=0x%x reg=0x%x)\n",
+ bus->name, addr, reg);
+
+ return ret;
+}
+
+static int ftmac100_mdio_init(struct udevice *dev)
+{
+ struct ftmac100_data *priv = dev_get_priv(dev);
+ struct mii_dev *bus;
+ int ret;
+
+ bus = mdio_alloc();
+ if (!bus)
+ return -ENOMEM;
+
+ bus->read = ftmac100_mdio_read;
+ bus->write = ftmac100_mdio_write;
+ bus->priv = priv;
+
+ ret = mdio_register_seq(bus, dev_seq(dev));
+ if (ret) {
+ mdio_free(bus);
+ return ret;
+ }
+
+ priv->bus = bus;
+
+ return 0;
+}
+
static int ftmac100_probe(struct udevice *dev)
{
struct ftmac100_data *priv = dev_get_priv(dev);
priv->name = dev->name;
+ int ret = 0;
+
+ ret = ftmac100_mdio_init(dev);
+ if (ret) {
+ dev_err(dev, "Failed to initialize mdiobus: %d\n", ret);
+ goto out;
+ }
+
+out:
+ return ret;
+}
+
+static int ftmac100_remove(struct udevice *dev)
+{
+ struct ftmac100_data *priv = dev_get_priv(dev);
+
+ mdio_unregister(priv->bus);
+ mdio_free(priv->bus);
+
return 0;
}
@@ -440,6 +542,7 @@ U_BOOT_DRIVER(ftmac100) = {
.bind = ftmac100_bind,
.of_to_plat = ftmac100_of_to_plat,
.probe = ftmac100_probe,
+ .remove = ftmac100_remove,
.ops= &ftmac100_ops,
.priv_auto = sizeof(struct ftmac100_data),
.plat_auto = sizeof(struct eth_pdata),
diff --git a/drivers/net/ftmac100.h b/drivers/net/ftmac100.h
index 75a49f628a69..21d339f835bf 100644
--- a/drivers/net/ftmac100.h
+++ b/drivers/net/ftmac100.h
@@ -92,6 +92,15 @@ struct ftmac100 {
#define FTMAC100_MACCR_RX_MULTIPKT (1 << 16)
#define FTMAC100_MACCR_RX_BROADPKT (1 << 17)
+/*
+ * PHY control register
+ */
+#define FTMAC100_PHYCR_MIIRDATA0x
+#define FTMAC100_PHYCR_PHYAD(x)(((x) & 0x1f) << 16)
+#define FTMAC100_PHYCR_REGAD(x)(((x) & 0x1f) << 21)
+#define FTMAC100_PHYCR_MIIWR BIT(27)
+#define FTMAC100_PHYCR_MIIRD BIT(26)
+
/*
* Transmit descriptor, aligned to 16 bytes
*/
--
2.34.1
[PATCH 2/3] net: ftmac100: simplify priv->iobase casting
Replace 'phys_addr_t iobase' with 'struct ftmac100 *ftmac100'
in order to cast once on assignment and remove casting in a
number of other places.
Signed-off-by: Sergei Antonov
---
drivers/net/ftmac100.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index b3da9479ea5e..bb39e837bbe7 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -28,7 +28,7 @@ struct ftmac100_data {
struct ftmac100_rxdes rxdes[PKTBUFSRX];
int rx_index;
const char *name;
- phys_addr_t iobase;
+ struct ftmac100 *ftmac100;
};
/*
@@ -36,7 +36,7 @@ struct ftmac100_data {
*/
static void ftmac100_reset(struct ftmac100_data *priv)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
debug ("%s()\n", __func__);
@@ -57,7 +57,7 @@ static void ftmac100_reset(struct ftmac100_data *priv)
static void ftmac100_set_mac(struct ftmac100_data *priv ,
const unsigned char *mac)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
unsigned int maddr = mac[0] << 8 | mac[1];
unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
@@ -72,7 +72,7 @@ static void ftmac100_set_mac(struct ftmac100_data *priv ,
*/
static void _ftmac100_halt(struct ftmac100_data *priv)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
debug ("%s()\n", __func__);
writel (0, &ftmac100->maccr);
}
@@ -82,7 +82,7 @@ static void _ftmac100_halt(struct ftmac100_data *priv)
*/
static int _ftmac100_init(struct ftmac100_data *priv, unsigned char
enetaddr[6])
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
struct ftmac100_txdes *txdes = priv->txdes;
struct ftmac100_rxdes *rxdes = priv->rxdes;
unsigned int maccr;
@@ -187,7 +187,7 @@ static int __ftmac100_recv(struct ftmac100_data *priv)
*/
static int _ftmac100_send(struct ftmac100_data *priv, void *packet, int length)
{
- struct ftmac100 *ftmac100 = (struct ftmac100 *)(uintptr_t)priv->iobase;
+ struct ftmac100 *ftmac100 = priv->ftmac100;
struct ftmac100_txdes *curr_des = priv->txdes;
ulong start;
@@ -400,7 +400,7 @@ static int ftmac100_of_to_plat(struct udevice *dev)
struct eth_pdata *pdata = dev_get_plat(dev);
const char *mac;
pdata->iobase = dev_read_addr(dev);
- priv->iobase = pdata->iobase;
+ priv->ftmac100 = (struct ftmac100 *)pdata->iobase;
mac = dtbmacaddr(0);
if (mac)
memcpy(pdata->enetaddr , mac , 6);
--
2.34.1
[PATCH 1/3] net: ftmac100: change driver name from nds32_mac to ftmac100
So it will be named similarly to the related ftgmac100 driver.
The old name 'nds32_mac' is not referred to anywhere in U-Boot.
Signed-off-by: Sergei Antonov
---
drivers/net/ftmac100.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c
index c30ace96bb13..b3da9479ea5e 100644
--- a/drivers/net/ftmac100.c
+++ b/drivers/net/ftmac100.c
@@ -434,7 +434,7 @@ static const struct udevice_id ftmac100_ids[] = {
};
U_BOOT_DRIVER(ftmac100) = {
- .name = "nds32_mac",
+ .name = "ftmac100",
.id = UCLASS_ETH,
.of_match = ftmac100_ids,
.bind = ftmac100_bind,
--
2.34.1
[PATCH v3] rtc: add ht1380 driver
Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds
, minutes, hours, day of the week, date, month and year information.
Datasheet:
https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf
Signed-off-by: Sergei Antonov
---
v3:
Suggested by Simon Glass:
* remove extra brackets
* pass GPIOD_IS_OUT to gpio_request_by_name() and drop the extra code below
* add text to Kconfig: how it is connected, i.e. three GPIOs
* rename dts names to plural: rst/clk/dat-gpios
Suggested by Tom Rini:
* enable on sandbox so that it gets build tested
v2:
* The RESET pin is now to be described as ACTIVE_LOW in dts.
Changes suggested by Simon Glass:
* a more detailed driver description in Kconfig
* multi-line comments' style
* enum for 0x80 and the 0x20 at top of file
* lower-case hex constants
* function comments for ht1380_reset_on/off
* blank line before returns
configs/sandbox_defconfig | 1 +
drivers/rtc/Kconfig | 9 ++
drivers/rtc/Makefile | 1 +
drivers/rtc/ht1380.c | 329 ++
4 files changed, 340 insertions(+)
create mode 100644 drivers/rtc/ht1380.c
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index 404e4a3324a2..f9c996b4299d 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -334,3 +334,4 @@ CONFIG_UNIT_TEST=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_IPV6=y
+CONFIG_RTC_HT1380=y
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 23963271928a..04ca2914f1be 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -220,4 +220,13 @@ config RTC_ZYNQMP
Say "yes" here to support the on chip real time clock
present on Xilinx ZynqMP SoC.
+config RTC_HT1380
+ bool "Enable Holtek HT1380/HT1381 RTC driver"
+ depends on DM_RTC && DM_GPIO
+ help
+ Say "yes" here to get support for Holtek HT1380/HT1381
+ Serial Timekeeper IC which provides seconds, minutes, hours,
+ day of the week, date, month and year information. It is to be
+ connected via 3 GPIO pins which work as reset, clock, and data.
+
endmenu
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 009dd9d28c95..f3164782b605 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_RTC_DS3231) += ds3231.o
obj-$(CONFIG_RTC_DS3232) += ds3232.o
obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o
obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
+obj-$(CONFIG_RTC_HT1380) += ht1380.o
obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o
obj-$(CONFIG_RTC_IMXDI) += imxdi.o
obj-$(CONFIG_RTC_ISL1208) += isl1208.o
diff --git a/drivers/rtc/ht1380.c b/drivers/rtc/ht1380.c
new file mode 100644
index ..85fcee3e71e6
--- /dev/null
+++ b/drivers/rtc/ht1380.c
@@ -0,0 +1,329 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Holtek HT1380/HT1381 Serial Timekeeper Chip
+ *
+ * Communication with the chip is vendor-specific.
+ * It is done via 3 GPIO pins: reset, clock, and data.
+ * Describe in .dts this way:
+ *
+ * rtc {
+ * compatible = "holtek,ht1380";
+ * rst-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ * clk-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
+ * dat-gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ * };
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct ht1380_priv {
+ struct gpio_desc rst_desc;
+ struct gpio_desc clk_desc;
+ struct gpio_desc dat_desc;
+};
+
+enum registers {
+ SEC,
+ MIN,
+ HOUR,
+ MDAY,
+ MONTH,
+ WDAY,
+ YEAR,
+ WP,
+ N_REGS
+};
+
+enum hour_mode {
+ AMPM_MODE = 0x80, /* RTC is in AM/PM mode */
+ PM_NOW = 0x20,/* set if PM, clear if AM */
+};
+
+static const int BURST = 0xbe;
+static const int READ = 1;
+
+static void ht1380_half_period_delay(void)
+{
+ /*
+* Delay for half a period. 1 us complies with the 500 KHz maximum
+* input serial clock limit given by the datasheet.
+*/
+ udelay(1);
+}
+
+static int ht1380_send_byte(struct ht1380_priv *priv, int byte)
+{
+ int ret;
+
+ for (int bit = 0; bit < 8; bit++) {
+ ret = dm_gpio_set_value(&priv->dat_desc, byte >> bit & 1);
+ if (ret)
+ break;
+ ht1380_half_period_delay();
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 1);
+ if (ret)
+ break;
+ ht1380_half_period_delay();
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 0);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+/*
+ * Leave reset state. The transfer operation can then be started.
+ */
+static int ht1380_reset_off(struct ht1380_priv *priv)
+{
+ const unsigned int T_CC = 4; /* us, Reset to Clock Setup */
+ int ret
Re: [PATCH] rtc: add ht1380 driver
On Thu, 8 Dec 2022 at 00:52, Simon Glass wrote: > > > Is this some sort of I2C protocol? > > > > Like I2C it uses a pin for clock and a pin for data in/out. Unlike I2C > > it does not use addressing. I am not sure whether this driver can > > utilize some of the existing I2C code in U-Boot. Wrote my own bit > > banging routines. > > Yes you can use i2c, by setting the offset_len to 0, e.g. with: > >u-boot,i2c-offset-len = <0>; I2C transmits/receives bytes most significant bit first (msb), but this device needs lsb.
Re: [PATCH] rtc: add ht1380 driver
On Wed, 7 Dec 2022 at 04:08, Simon Glass wrote:
>
> Hi Sergei,
>
> On Tue, 6 Dec 2022 at 23:07, Sergei Antonov wrote:
> >
> > Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds
> > , minutes, hours, day of the week, date, month and year information.
> >
> > Datasheet:
> > https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf
> >
> > Signed-off-by: Sergei Antonov
> > ---
> >
> > v2:
> > * The RESET pin is now to be described as ACTIVE_LOW in dts.
> >
> > Changes suggested by Simon Glass:
> > * a more detailed driver description in Kconfig
> > * multi-line comments' style
> > * enum for 0x80 and the 0x20 at top of file
> > * lower-case hex constants
> > * function comments for ht1380_reset_on/off
> > * blank line before returns
> >
> > PROTECT remains in a function scope for the sake of locality of definitions.
> >
> > drivers/rtc/Kconfig | 8 +
> > drivers/rtc/Makefile | 1 +
> > drivers/rtc/ht1380.c | 337 +++
> > 3 files changed, 346 insertions(+)
> > create mode 100644 drivers/rtc/ht1380.c
> >
> > diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> > index 23963271928a..eed48e35a578 100644
> > --- a/drivers/rtc/Kconfig
> > +++ b/drivers/rtc/Kconfig
> > @@ -220,4 +220,12 @@ config RTC_ZYNQMP
> > Say "yes" here to support the on chip real time clock
> > present on Xilinx ZynqMP SoC.
> >
> > +config RTC_HT1380
> > + bool "Enable Holtek HT1380/HT1381 RTC driver"
> > + depends on DM_RTC && DM_GPIO
> > + help
> > + Say "yes" here to get support for Holtek HT1380/HT1381
> > + Serial Timekeeper IC which provides seconds, minutes, hours,
> > + day of the week, date, month and year information.
>
> Perhaps mention how it is connected, i.e. three GPIOs.
>
> > +
> > endmenu
> > diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
> > index 009dd9d28c95..f3164782b605 100644
> > --- a/drivers/rtc/Makefile
> > +++ b/drivers/rtc/Makefile
> > @@ -24,6 +24,7 @@ obj-$(CONFIG_RTC_DS3231) += ds3231.o
> > obj-$(CONFIG_RTC_DS3232) += ds3232.o
> > obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o
> > obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
> > +obj-$(CONFIG_RTC_HT1380) += ht1380.o
> > obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o
> > obj-$(CONFIG_RTC_IMXDI) += imxdi.o
> > obj-$(CONFIG_RTC_ISL1208) += isl1208.o
> > diff --git a/drivers/rtc/ht1380.c b/drivers/rtc/ht1380.c
> > new file mode 100644
> > index ..25335227d893
> > --- /dev/null
> > +++ b/drivers/rtc/ht1380.c
> > @@ -0,0 +1,337 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Holtek HT1380/HT1381 Serial Timekeeper Chip
> > + *
> > + * Communication with the chip is vendor-specific.
> > + * It is done via 3 GPIO pins: reset, clock, and data.
> > + * Describe in .dts this way:
> > + *
> > + * rtc {
> > + * compatible = "holtek,ht1380";
> > + * rst-gpio = <&gpio 19 GPIO_ACTIVE_LOW>;
> > + * clk-gpio = <&gpio 20 GPIO_ACTIVE_HIGH>;
> > + * dat-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
> > + * };
>
> Is there a binding file for this?
Not in the U-Boot repo yet. I am going to submit a .dts file binding
to this driver. But I need to submit 2 more device drivers first. I
guess, submitting .dts should be the final step.
> I believe the standard name should be rst-gpios (i.e. plural)?
I grepped files in arch/arm/dts and it was not clear. There were more
plural names however. So I can change it to plural in v3.
> > + *
> > + */
> > +
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +struct ht1380_priv {
> > + struct gpio_desc rst_desc;
> > + struct gpio_desc clk_desc;
> > + struct gpio_desc dat_desc;
> > +};
> > +
> > +enum registers {
> > + SEC,
> > + MIN,
> > + HOUR,
> > + MDAY,
> > + MONTH,
> > + WDAY,
> > + YEAR,
> > + WP,
> > + N_REGS
> > +};
> > +
> > +enum hour_mode {
> > + AMPM_MODE = 0x80, /* RTC is in AM/PM mode */
> > + PM_NOW = 0x20,/* set if PM, clear if AM */
> > +};
> > +
> > +static const int BURST = 0xbe;
> > +static const int READ = 1;
&
[PATCH] rtc: add ht1380 driver
Support Holtek HT1380/HT1381 Serial Timekeeper Chip. It provides seconds
, minutes, hours, day of the week, date, month and year information.
Datasheet:
https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf
Signed-off-by: Sergei Antonov
---
v2:
* The RESET pin is now to be described as ACTIVE_LOW in dts.
Changes suggested by Simon Glass:
* a more detailed driver description in Kconfig
* multi-line comments' style
* enum for 0x80 and the 0x20 at top of file
* lower-case hex constants
* function comments for ht1380_reset_on/off
* blank line before returns
PROTECT remains in a function scope for the sake of locality of definitions.
drivers/rtc/Kconfig | 8 +
drivers/rtc/Makefile | 1 +
drivers/rtc/ht1380.c | 337 +++
3 files changed, 346 insertions(+)
create mode 100644 drivers/rtc/ht1380.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 23963271928a..eed48e35a578 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -220,4 +220,12 @@ config RTC_ZYNQMP
Say "yes" here to support the on chip real time clock
present on Xilinx ZynqMP SoC.
+config RTC_HT1380
+ bool "Enable Holtek HT1380/HT1381 RTC driver"
+ depends on DM_RTC && DM_GPIO
+ help
+ Say "yes" here to get support for Holtek HT1380/HT1381
+ Serial Timekeeper IC which provides seconds, minutes, hours,
+ day of the week, date, month and year information.
+
endmenu
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 009dd9d28c95..f3164782b605 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_RTC_DS3231) += ds3231.o
obj-$(CONFIG_RTC_DS3232) += ds3232.o
obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o
obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
+obj-$(CONFIG_RTC_HT1380) += ht1380.o
obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o
obj-$(CONFIG_RTC_IMXDI) += imxdi.o
obj-$(CONFIG_RTC_ISL1208) += isl1208.o
diff --git a/drivers/rtc/ht1380.c b/drivers/rtc/ht1380.c
new file mode 100644
index ..25335227d893
--- /dev/null
+++ b/drivers/rtc/ht1380.c
@@ -0,0 +1,337 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Holtek HT1380/HT1381 Serial Timekeeper Chip
+ *
+ * Communication with the chip is vendor-specific.
+ * It is done via 3 GPIO pins: reset, clock, and data.
+ * Describe in .dts this way:
+ *
+ * rtc {
+ * compatible = "holtek,ht1380";
+ * rst-gpio = <&gpio 19 GPIO_ACTIVE_LOW>;
+ * clk-gpio = <&gpio 20 GPIO_ACTIVE_HIGH>;
+ * dat-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
+ * };
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct ht1380_priv {
+ struct gpio_desc rst_desc;
+ struct gpio_desc clk_desc;
+ struct gpio_desc dat_desc;
+};
+
+enum registers {
+ SEC,
+ MIN,
+ HOUR,
+ MDAY,
+ MONTH,
+ WDAY,
+ YEAR,
+ WP,
+ N_REGS
+};
+
+enum hour_mode {
+ AMPM_MODE = 0x80, /* RTC is in AM/PM mode */
+ PM_NOW = 0x20,/* set if PM, clear if AM */
+};
+
+static const int BURST = 0xbe;
+static const int READ = 1;
+
+static void ht1380_half_period_delay(void)
+{
+ /*
+* Delay for half a period. 1 us complies with the 500 KHz maximum
+* input serial clock limit given by the datasheet.
+*/
+ udelay(1);
+}
+
+static int ht1380_send_byte(struct ht1380_priv *priv, int byte)
+{
+ int ret;
+
+ for (int bit = 0; bit < 8; bit++) {
+ ret = dm_gpio_set_value(&priv->dat_desc, byte >> bit & 1);
+ if (ret)
+ break;
+ ht1380_half_period_delay();
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 1);
+ if (ret)
+ break;
+ ht1380_half_period_delay();
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 0);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+/*
+ * Leave reset state. The transfer operation can then be started.
+ */
+static int ht1380_reset_off(struct ht1380_priv *priv)
+{
+ const unsigned int T_CC = 4; /* us, Reset to Clock Setup */
+ int ret;
+
+ /*
+* Leave RESET state.
+* Make sure we make the minimal delay required by the datasheet.
+*/
+ ret = dm_gpio_set_value(&priv->rst_desc, 0);
+ udelay(T_CC);
+
+ return ret;
+}
+
+/*
+ * Enter reset state. Completes the transfer operation.
+ */
+static int ht1380_reset_on(struct ht1380_priv *priv)
+{
+ const unsigned int T_CWH = 4; /* us, Reset Inactive Time */
+ int ret;
+
+ /*
+* Enter RESET state.
+* Make sure we make the minimal delay required by the datasheet.
+*/
+ ret = dm_gpio_set_value(&priv->rst_desc, 1);
+ udelay(T_CWH);
Re: [PATCH] rtc: add ht1380 driver
On Wed, 26 Oct 2022 at 14:34, Sergei Antonov wrote:
>
> On Wed, 26 Oct 2022 at 02:35, Simon Glass wrote:
>
> > > +static void ht1380_half_period_delay(void)
> > > +{
> > > + /* Delay for half a period. 1 us complies with the 500 KHz maximum
> > > + input serial clock limit given by the datasheet. */
> >
> > /*
> > * Delay for half...
> > * second line
> > */
> >
> > Please fix globally.
>
> OK. I was confused by doc/develop/codingstyle.rst:
> * The exception for net files to the `multi-line comment
> <https://www.kernel.org/doc/html/latest/process/coding-style.html#commenting>`_
> applies only to Linux, not to U-Boot.
> What is the U-Boot style of multi-line comments remains a mystery to me.
Tom,
could you please clarify what is U-Boot style for multi-line comments?
I can not draw it from doc/develop/codingstyle.rst
Re: [PATCH] rtc: add ht1380 driver
On Wed, 26 Oct 2022 at 02:35, Simon Glass wrote:
> > +static void ht1380_half_period_delay(void)
> > +{
> > + /* Delay for half a period. 1 us complies with the 500 KHz maximum
> > + input serial clock limit given by the datasheet. */
>
> /*
> * Delay for half...
> * second line
> */
>
> Please fix globally.
OK. I was confused by doc/develop/codingstyle.rst:
* The exception for net files to the `multi-line comment
`_
applies only to Linux, not to U-Boot.
What is the U-Boot style of multi-line comments remains a mystery to me.
> > +static int ht1380_reset_on(struct ht1380_priv *priv)
>
> function comment - does it stay in reset state or automatically exit?
It stays in reset state. Until the counterpart function
ht1380_reset_off is called.
> > + /* Correctness check: some registers are always > 0 */
> > + if (!reg[MDAY] || !reg[MONTH] || !reg[WDAY])
> > + goto exit;
> > +
> > + tm->tm_sec = bcd2bin(reg[SEC]);
> > + tm->tm_min = bcd2bin(reg[MIN]);
> > + if (reg[HOUR] & 0x80) {
>
> I suggest having an enum or #define for 0x80 and the 0x20 below
Oh. I hoped so much for /* */ comments put after lines with 0x80 and 0x20.
> > + /* AM-PM Mode, range is 01-12 */
> > + tm->tm_hour = bcd2bin(reg[HOUR] & 0x1F) % 12;
> > + if (reg[HOUR] & 0x20) {
> > + /* it is PM (otherwise AM) */
> > + tm->tm_hour += 12;
> > + }
> > + } else {
> > + /* 24-hour Mode, range is 0-23 */
> > + tm->tm_hour = bcd2bin(reg[HOUR]);
> > + }
> > + tm->tm_mday = bcd2bin(reg[MDAY]);
> > + tm->tm_mon = bcd2bin(reg[MONTH]);
> > + tm->tm_year = 2000 + bcd2bin(reg[YEAR]);
> > + tm->tm_wday = bcd2bin(reg[WDAY]) - 1;
> > + tm->tm_yday = 0;
> > + tm->tm_isdst = 0;
> > +
> > + ret = 0;
> > +
> > +exit:
> > + ht1380_reset_on(priv);
> > + return ret;
> > +}
> > +
> > +static int ht1380_write_protection_off(struct ht1380_priv *priv)
> > +{
> > + int ret;
> > + const int PROTECT = 0x8E;
>
> Define at top of file, e.g. in an enum
What about locality of definitions?
Thanks for your quick comments.
[PATCH] rtc: add ht1380 driver
Support Holtek HT1380/HT1381 Serial Timekeeper Chip.
Datasheet:
https://www.holtek.com.tw/documents/10179/11842/ht1380_1v130.pdf
Signed-off-by: Sergei Antonov
---
drivers/rtc/Kconfig | 7 +
drivers/rtc/Makefile | 1 +
drivers/rtc/ht1380.c | 303 +++
3 files changed, 311 insertions(+)
create mode 100644 drivers/rtc/ht1380.c
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 23963271928a..f62ee43b0f89 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -220,4 +220,11 @@ config RTC_ZYNQMP
Say "yes" here to support the on chip real time clock
present on Xilinx ZynqMP SoC.
+config RTC_HT1380
+ bool "Enable Holtek HT1380/HT1381 RTC driver"
+ depends on DM_RTC && DM_GPIO
+ help
+ Say "yes" here to get support for Holtek HT1380/HT1381
+ Serial Timekeeper Chip.
+
endmenu
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index d621be622848..d04ac8fb0938 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -24,6 +24,7 @@ obj-$(CONFIG_RTC_DS3231) += ds3231.o
obj-$(CONFIG_RTC_DS3232) += ds3232.o
obj-$(CONFIG_RTC_EMULATION) += emul_rtc.o
obj-$(CONFIG_RTC_FTRTC010) += ftrtc010.o
+obj-$(CONFIG_RTC_HT1380) += ht1380.o
obj-$(CONFIG_SANDBOX) += i2c_rtc_emul.o
obj-$(CONFIG_RTC_IMXDI) += imxdi.o
obj-$(CONFIG_RTC_ISL1208) += isl1208.o
diff --git a/drivers/rtc/ht1380.c b/drivers/rtc/ht1380.c
new file mode 100644
index ..af28b5f25fcd
--- /dev/null
+++ b/drivers/rtc/ht1380.c
@@ -0,0 +1,303 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Holtek HT1380/HT1381 Serial Timekeeper Chip
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+struct ht1380_priv {
+ struct gpio_desc rst_desc;
+ struct gpio_desc clk_desc;
+ struct gpio_desc dat_desc;
+};
+
+enum registers {
+ SEC,
+ MIN,
+ HOUR,
+ MDAY,
+ MONTH,
+ WDAY,
+ YEAR,
+ WP,
+ N_REGS
+};
+
+static const int BURST = 0xBE;
+static const int READ = 1;
+
+static void ht1380_half_period_delay(void)
+{
+ /* Delay for half a period. 1 us complies with the 500 KHz maximum
+ input serial clock limit given by the datasheet. */
+ udelay(1);
+}
+
+static int ht1380_send_byte(struct ht1380_priv *priv, int byte)
+{
+ int ret;
+
+ for (int bit = 0; bit < 8; bit++) {
+ ret = dm_gpio_set_value(&priv->dat_desc, byte >> bit & 1);
+ if (ret)
+ break;
+ ht1380_half_period_delay();
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 1);
+ if (ret)
+ break;
+ ht1380_half_period_delay();
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 0);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+
+static int ht1380_reset_off(struct ht1380_priv *priv)
+{
+ const unsigned int T_CC = 4; /* us, Reset to Clock Setup */
+ int ret;
+
+ /* Go out of RESET state.
+ Make sure we make the minimal delay required by the datasheet. */
+ ret = dm_gpio_set_value(&priv->rst_desc, 1);
+ udelay(T_CC);
+ return ret;
+}
+
+static int ht1380_reset_on(struct ht1380_priv *priv)
+{
+ const unsigned int T_CWH = 4; /* us, Reset Inactive Time */
+ int ret;
+
+ /* Enter RESET state.
+ Make sure we make the minimal delay required by the datasheet. */
+ ret = dm_gpio_set_value(&priv->rst_desc, 0);
+ udelay(T_CWH);
+ return ret;
+}
+
+static int ht1380_rtc_get(struct udevice *dev, struct rtc_time *tm)
+{
+ struct ht1380_priv *priv = dev_get_priv(dev);
+ int ret, i, bit, reg[N_REGS];
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 0);
+ if (ret)
+ return ret;
+
+ ret = dm_gpio_set_dir_flags(&priv->dat_desc, GPIOD_IS_OUT);
+ if (ret)
+ return ret;
+
+ ret = ht1380_reset_off(priv);
+ if (ret)
+ goto exit;
+
+ ret = ht1380_send_byte(priv, BURST + READ);
+ if (ret)
+ goto exit;
+
+ ret = dm_gpio_set_dir_flags(&priv->dat_desc, GPIOD_IS_IN);
+ if (ret)
+ goto exit;
+
+ for (i = 0; i < N_REGS; i++) {
+ reg[i] = 0;
+
+ for (bit = 0; bit < 8; bit++) {
+ ht1380_half_period_delay();
+
+ ret = dm_gpio_set_value(&priv->clk_desc, 1);
+ if (ret)
+ goto exit;
+ ht1380_half_period_delay();
+
+ reg[i] |= dm_gpio_get_value(&priv->dat_desc) << bit;
+ ret = dm_gpio_set_value(&priv->clk_desc, 0);
+ if (ret)
+
i2c-gpio: condition is always false
Hello!
Please look at this code from drivers/i2c/i2c-gpio.c:
static int i2c_gpio_of_to_plat(struct udevice *dev)
{
struct i2c_gpio_bus *bus = dev_get_priv(dev);
int ret;
/* "gpios" is deprecated and replaced by "sda-gpios" + "scl-gpios". */
ret = gpio_request_list_by_name(dev, "gpios", bus->gpios,
ARRAY_SIZE(bus->gpios), 0);
if (ret == -ENOENT) {
The condition is always false because in
gpio_request_list_by_name_nodev(), if entry is not found, this code
will work:
if (ret == -ENOENT)
break;
and then
return count;
return zero.
[PATCH] i2c: i2c-gpio: add newline
Add newline at the end of the printed string.
Signed-off-by: Sergei Antonov
---
drivers/i2c/i2c-gpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index 1aedad5c8ede..4ed9e9e7cddd 100644
--- a/drivers/i2c/i2c-gpio.c
+++ b/drivers/i2c/i2c-gpio.c
@@ -362,7 +362,7 @@ static int i2c_gpio_of_to_plat(struct udevice *dev)
return 0;
error:
- pr_err("Can't get %s gpios! Error: %d", dev->name, ret);
+ pr_err("Can't get %s gpios! Error: %d\n", dev->name, ret);
return ret;
}
--
2.34.1
Re: [PATCH v3] gpio: ftgpio010: Add support for Faraday Technology FTGPIO010
On Mon, 12 Sept 2022 at 13:11, Sergei Antonov wrote: > > Add Faraday Technology's FTGPIO010 controller driver. > > Signed-off-by: Sergei Antonov > --- > v2 -> v3: > Implement .get_function to make "gpio status" command work. > > v1 -> v2: > Replace setbits_le32() with a simpler function out_le32(). > Replace readl() with in_le32() to respect endianness. +andre.przywara +pali +sr +samuel Hello! There has been no feedback to this patch. Anyone? I think it is ready to be committed.
[PATCH v3] gpio: ftgpio010: Add support for Faraday Technology FTGPIO010
Add Faraday Technology's FTGPIO010 controller driver.
Signed-off-by: Sergei Antonov
---
v2 -> v3:
Implement .get_function to make "gpio status" command work.
v1 -> v2:
Replace setbits_le32() with a simpler function out_le32().
Replace readl() with in_le32() to respect endianness.
drivers/gpio/Kconfig | 6 +++
drivers/gpio/Makefile| 1 +
drivers/gpio/ftgpio010.c | 111 +++
3 files changed, 118 insertions(+)
create mode 100644 drivers/gpio/ftgpio010.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index c949f9d2f7cc..2a60478b476a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -605,4 +605,10 @@ config TURRIS_OMNIA_MCU
help
Support for GPIOs on MCU connected to Turris Omnia via i2c.
+config FTGPIO010
+ bool "Faraday Technology FTGPIO010 driver"
+ depends on DM_GPIO
+ help
+ Support for GPIOs on Faraday Technology's FTGPIO010 controller.
+
endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9d718a554e59..eee7908871d8 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -75,3 +75,4 @@ obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
+obj-$(CONFIG_FTGPIO010)+= ftgpio010.o
diff --git a/drivers/gpio/ftgpio010.c b/drivers/gpio/ftgpio010.c
new file mode 100644
index ..6c091d4fd874
--- /dev/null
+++ b/drivers/gpio/ftgpio010.c
@@ -0,0 +1,111 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Faraday Technology's FTGPIO010 controller.
+ */
+
+#include
+#include
+#include
+#include
+
+struct ftgpio010_regs {
+ u32 out;
+ u32 in;
+ u32 direction; // 1 - output
+ u32 reserved;
+ u32 set;
+ u32 clear;
+};
+
+struct ftgpio010_plat {
+ struct ftgpio010_regs __iomem *regs;
+};
+
+static int ftgpio010_direction_input(struct udevice *dev, unsigned int pin)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ clrbits_le32(®s->direction, 1 << pin);
+ return 0;
+}
+
+static int ftgpio010_direction_output(struct udevice *dev, unsigned int pin,
+ int val)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ /* change the data first, then the direction. to avoid glitch */
+ out_le32(val ? ®s->set : ®s->clear, 1 << pin);
+ setbits_le32(®s->direction, 1 << pin);
+
+ return 0;
+}
+
+static int ftgpio010_get_value(struct udevice *dev, unsigned int pin)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ return in_le32(®s->in) >> pin & 1;
+}
+
+static int ftgpio010_set_value(struct udevice *dev, unsigned int pin, int val)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ out_le32(val ? ®s->set : ®s->clear, 1 << pin);
+ return 0;
+}
+
+static int ftgpio010_get_function(struct udevice *dev, unsigned int pin)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ if (in_le32(®s->direction) >> pin & 1)
+ return GPIOF_OUTPUT;
+ return GPIOF_INPUT;
+}
+
+static int ftgpio010_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->gpio_count = ofnode_read_u32_default(dev_ofnode(dev),
+ "nr-gpios", 32);
+ return 0;
+}
+
+static int ftgpio010_of_to_plat(struct udevice *dev)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+
+ plat->regs = dev_read_addr_ptr(dev);
+ return 0;
+}
+
+static const struct dm_gpio_ops ftgpio010_ops = {
+ .direction_input= ftgpio010_direction_input,
+ .direction_output = ftgpio010_direction_output,
+ .get_value = ftgpio010_get_value,
+ .set_value = ftgpio010_set_value,
+ .get_function = ftgpio010_get_function,
+};
+
+static const struct udevice_id ftgpio010_ids[] = {
+ { .compatible = "faraday,ftgpio010" },
+ { }
+};
+
+U_BOOT_DRIVER(ftgpio010) = {
+ .name = "ftgpio010",
+ .id = UCLASS_GPIO,
+ .of_match = ftgpio010_ids,
+ .ops= &ftgpio010_ops,
+ .of_to_plat = ftgpio010_of_to_plat,
+ .plat_auto = sizeof(struct ftgpio010_plat),
+ .probe = ftgpio010_probe,
+};
--
2.34.1
Re: [PATCH] lib: zlib: Use post-increment only in inffast.c.
On Sun, 11 Sept 2022 at 11:47, Jit Loon Lim wrote: > > From: Chin Liang See > > An old inffast.c optimization turns out to not be optimal anymore > with modern compilers, and furthermore was not compliant with the > C standard, for which decrementing a pointer before its allocated > memory is undefined. Per the recommendation of a security audit of > the zlib code by Trail of Bits and TrustInSoft, in support of the > Mozilla Foundation, this "optimization" was removed, in order to > avoid the possibility of undefined behavior. A similar change was merged into an official zlib in 2016: https://github.com/madler/zlib/commit/9aaec95e82117 It makes me wonder can zlib be used as an external project in U-Boot? To be up to date with zlib development.
Re: [PATCH] scripts: config_whitelist: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
On Sat, 10 Sept 2022 at 17:18, Tom Rini wrote:
>
> On Sun, Sep 04, 2022 at 06:54:29PM +0300, Sergei Antonov wrote:
> > On Sun, 4 Sept 2022 at 18:30, Tom Rini wrote:
> > >
> > > On Sun, Sep 04, 2022 at 06:28:56PM +0300, Sergei Antonov wrote:
> > > > On Sun, 4 Sept 2022 at 18:23, Tom Rini wrote:
> > > > > > > > > What type must it be in Kconfig? Note, it is an array
> > > > > > > > > initializer
> > > > > > > > > similar to CONFIG_SYS_BAUDRATE_TABLE.
> > > > > > > >
> > > > > > > > Ah, ugh. So, it's also currently unused code, what does it look
> > > > > > > > like in
> > > > > > > > the platform you're making use of this on?
> > > > > > >
> > > > > > > In my _defconfig I use this line:
> > > > > > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST="{{0x8000, 0x4}}"
> > > > > > > To protect the first 256 KB of flash memory.
> > > > > >
> > > > > > Please, disregard the previous message. I was too hasty to reply.
> > > > > >
> > > > > > I have include/configs/myplatform.h file which contains this line:
> > > > > > #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST {{0x8000, 0x4}}
> > > > > >
> > > > > > And I could not convert it to Kconfig string parameter.
> > > > >
> > > > > Can this information be obtained from an existing device tree binding
> > > > > on
> > > > > the platform?
> > > >
> > > > Device tree exists. No, DT does not currently contain this
> > > > information. But it can be added.
> > >
> > > OK. But, is there an existing binding, or would it be a new one?
> >
> > I am using an existing "cfi-flash" driver:
> > nor@8000 {
> > #address-cells = <1>;
> > #size-cells = <1>;
> > compatible = "cfi-flash";
> > reg = <0x8000 0x0>;
> > ...
> > }
>
> Getting back to this, sorry, I meant if there was a property we could
> use or some other way to infer this from the device tree. I see the
> partition binding has a way to mark things as read-only, which we could
> use as a hint (and with a new Kconfig option) to say that partitions
> that are marked as read only are then also protected.
Can "read-only;" in .dts be such a hint? Here is what I have in .my .dts:
nor@8000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x8000 0x0>;
partitions {
...
mtd1 {
label = "bios";
reg = <0x0 0x4>;
read-only;
};
Re: [PATCH] scripts: config_whitelist: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
On Sun, 4 Sept 2022 at 18:30, Tom Rini wrote:
>
> On Sun, Sep 04, 2022 at 06:28:56PM +0300, Sergei Antonov wrote:
> > On Sun, 4 Sept 2022 at 18:23, Tom Rini wrote:
> > > > > > > What type must it be in Kconfig? Note, it is an array initializer
> > > > > > > similar to CONFIG_SYS_BAUDRATE_TABLE.
> > > > > >
> > > > > > Ah, ugh. So, it's also currently unused code, what does it look
> > > > > > like in
> > > > > > the platform you're making use of this on?
> > > > >
> > > > > In my _defconfig I use this line:
> > > > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST="{{0x8000, 0x4}}"
> > > > > To protect the first 256 KB of flash memory.
> > > >
> > > > Please, disregard the previous message. I was too hasty to reply.
> > > >
> > > > I have include/configs/myplatform.h file which contains this line:
> > > > #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST {{0x8000, 0x4}}
> > > >
> > > > And I could not convert it to Kconfig string parameter.
> > >
> > > Can this information be obtained from an existing device tree binding on
> > > the platform?
> >
> > Device tree exists. No, DT does not currently contain this
> > information. But it can be added.
>
> OK. But, is there an existing binding, or would it be a new one?
I am using an existing "cfi-flash" driver:
nor@8000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x8000 0x0>;
...
}
Re: [PATCH] scripts: config_whitelist: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
On Sun, 4 Sept 2022 at 18:23, Tom Rini wrote:
> > > > > What type must it be in Kconfig? Note, it is an array initializer
> > > > > similar to CONFIG_SYS_BAUDRATE_TABLE.
> > > >
> > > > Ah, ugh. So, it's also currently unused code, what does it look like in
> > > > the platform you're making use of this on?
> > >
> > > In my _defconfig I use this line:
> > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST="{{0x8000, 0x4}}"
> > > To protect the first 256 KB of flash memory.
> >
> > Please, disregard the previous message. I was too hasty to reply.
> >
> > I have include/configs/myplatform.h file which contains this line:
> > #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST {{0x8000, 0x4}}
> >
> > And I could not convert it to Kconfig string parameter.
>
> Can this information be obtained from an existing device tree binding on
> the platform?
Device tree exists. No, DT does not currently contain this
information. But it can be added.
[PATCH v2] gpio: ftgpio010: Add support for Faraday Technology FTGPIO010
Add Faraday Technology's FTGPIO010 controller driver.
Signed-off-by: Sergei Antonov
---
v1 -> v2:
Replace setbits_le32() with a simpler function out_le32().
Replace readl() with in_le32() to respect endianness.
drivers/gpio/Kconfig | 6 +++
drivers/gpio/Makefile| 1 +
drivers/gpio/ftgpio010.c | 100 +++
3 files changed, 107 insertions(+)
create mode 100644 drivers/gpio/ftgpio010.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index c949f9d2f7cc..2a60478b476a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -605,4 +605,10 @@ config TURRIS_OMNIA_MCU
help
Support for GPIOs on MCU connected to Turris Omnia via i2c.
+config FTGPIO010
+ bool "Faraday Technology FTGPIO010 driver"
+ depends on DM_GPIO
+ help
+ Support for GPIOs on Faraday Technology's FTGPIO010 controller.
+
endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9d718a554e59..eee7908871d8 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -75,3 +75,4 @@ obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
+obj-$(CONFIG_FTGPIO010)+= ftgpio010.o
diff --git a/drivers/gpio/ftgpio010.c b/drivers/gpio/ftgpio010.c
new file mode 100644
index ..fa6b180963d3
--- /dev/null
+++ b/drivers/gpio/ftgpio010.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Faraday Technology's FTGPIO010 controller.
+ */
+
+#include
+#include
+#include
+#include
+
+struct ftgpio010_regs {
+ u32 out;
+ u32 in;
+ u32 direction;
+ u32 reserved;
+ u32 set;
+ u32 clear;
+};
+
+struct ftgpio010_plat {
+ struct ftgpio010_regs __iomem *regs;
+};
+
+static int ftgpio010_direction_input(struct udevice *dev, unsigned int pin)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ clrbits_le32(®s->direction, 1 << pin);
+ return 0;
+}
+
+static int ftgpio010_direction_output(struct udevice *dev, unsigned int pin,
+ int val)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ /* change the data first, then the direction. to avoid glitch */
+ out_le32(val ? ®s->set : ®s->clear, 1 << pin);
+ setbits_le32(®s->direction, 1 << pin);
+
+ return 0;
+}
+
+static int ftgpio010_get_value(struct udevice *dev, unsigned int pin)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ return in_le32(®s->in) >> pin & 1;
+}
+
+static int ftgpio010_set_value(struct udevice *dev, unsigned int pin, int val)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ out_le32(val ? ®s->set : ®s->clear, 1 << pin);
+ return 0;
+}
+
+static int ftgpio010_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->gpio_count = ofnode_read_u32_default(dev_ofnode(dev),
+ "nr-gpios", 32);
+ return 0;
+}
+
+static int ftgpio010_of_to_plat(struct udevice *dev)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+
+ plat->regs = dev_read_addr_ptr(dev);
+ return 0;
+}
+
+static const struct dm_gpio_ops ftgpio010_ops = {
+ .direction_input= ftgpio010_direction_input,
+ .direction_output = ftgpio010_direction_output,
+ .get_value = ftgpio010_get_value,
+ .set_value = ftgpio010_set_value,
+};
+
+static const struct udevice_id ftgpio010_ids[] = {
+ { .compatible = "faraday,ftgpio010" },
+ { }
+};
+
+U_BOOT_DRIVER(ftgpio010) = {
+ .name = "ftgpio010",
+ .id = UCLASS_GPIO,
+ .of_match = ftgpio010_ids,
+ .ops= &ftgpio010_ops,
+ .of_to_plat = ftgpio010_of_to_plat,
+ .plat_auto = sizeof(struct ftgpio010_plat),
+ .probe = ftgpio010_probe,
+};
--
2.34.1
Re: [PATCH] scripts: config_whitelist: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
On Sun, 4 Sept 2022 at 12:23, Sergei Antonov wrote:
>
> On Sat, 3 Sept 2022 at 19:16, Tom Rini wrote:
> >
> > On Sat, Sep 03, 2022 at 05:49:50PM +0300, Sergei Antonov wrote:
> > > On Sat, 3 Sept 2022 at 17:31, Tom Rini wrote:
> > > >
> > > > On Sat, Sep 03, 2022 at 05:30:30PM +0300, Sergei Antonov wrote:
> > > >
> > > > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST is a feature of
> > > > > drivers/mtd/cfi_flash.c
> > > > > driver. It allows to specify a range of protected eraseblocks on
> > > > > flash memory.
> > > > >
> > > > > Fixes build error:
> > > > > Error: You must add new CONFIG options using Kconfig
> > > > > The following new ad-hoc CONFIG options were detected:
> > > > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST
> > > > >
> > > > > Signed-off-by: Sergei Antonov
> > > > > ---
> > > > > scripts/config_whitelist.txt | 1 +
> > > > > 1 file changed, 1 insertion(+)
> > > >
> > > > Please move this to Kconfig so that it can be enabled, thanks.
> > >
> > > What type must it be in Kconfig? Note, it is an array initializer
> > > similar to CONFIG_SYS_BAUDRATE_TABLE.
> >
> > Ah, ugh. So, it's also currently unused code, what does it look like in
> > the platform you're making use of this on?
>
> In my _defconfig I use this line:
> CONFIG_SYS_FLASH_AUTOPROTECT_LIST="{{0x8000, 0x4}}"
> To protect the first 256 KB of flash memory.
Please, disregard the previous message. I was too hasty to reply.
I have include/configs/myplatform.h file which contains this line:
#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST {{0x8000, 0x4}}
And I could not convert it to Kconfig string parameter.
Re: [PATCH] scripts: config_whitelist: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
On Sat, 3 Sept 2022 at 19:16, Tom Rini wrote:
>
> On Sat, Sep 03, 2022 at 05:49:50PM +0300, Sergei Antonov wrote:
> > On Sat, 3 Sept 2022 at 17:31, Tom Rini wrote:
> > >
> > > On Sat, Sep 03, 2022 at 05:30:30PM +0300, Sergei Antonov wrote:
> > >
> > > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST is a feature of
> > > > drivers/mtd/cfi_flash.c
> > > > driver. It allows to specify a range of protected eraseblocks on flash
> > > > memory.
> > > >
> > > > Fixes build error:
> > > > Error: You must add new CONFIG options using Kconfig
> > > > The following new ad-hoc CONFIG options were detected:
> > > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST
> > > >
> > > > Signed-off-by: Sergei Antonov
> > > > ---
> > > > scripts/config_whitelist.txt | 1 +
> > > > 1 file changed, 1 insertion(+)
> > >
> > > Please move this to Kconfig so that it can be enabled, thanks.
> >
> > What type must it be in Kconfig? Note, it is an array initializer
> > similar to CONFIG_SYS_BAUDRATE_TABLE.
>
> Ah, ugh. So, it's also currently unused code, what does it look like in
> the platform you're making use of this on?
In my _defconfig I use this line:
CONFIG_SYS_FLASH_AUTOPROTECT_LIST="{{0x8000, 0x4}}"
To protect the first 256 KB of flash memory.
[PATCH] gpio: ftgpio010: Add support for Faraday Technology FTGPIO010
Add Faraday Technology's FTGPIO010 controller driver.
Signed-off-by: Sergei Antonov
---
drivers/gpio/Kconfig | 6 +++
drivers/gpio/Makefile| 1 +
drivers/gpio/ftgpio010.c | 100 +++
3 files changed, 107 insertions(+)
create mode 100644 drivers/gpio/ftgpio010.c
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index c949f9d2f7cc..2a60478b476a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -605,4 +605,10 @@ config TURRIS_OMNIA_MCU
help
Support for GPIOs on MCU connected to Turris Omnia via i2c.
+config FTGPIO010
+ bool "Faraday Technology FTGPIO010 driver"
+ depends on DM_GPIO
+ help
+ Support for GPIOs on Faraday Technology's FTGPIO010 controller.
+
endif
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9d718a554e59..eee7908871d8 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -75,3 +75,4 @@ obj-$(CONFIG_SL28CPLD_GPIO) += sl28cpld-gpio.o
obj-$(CONFIG_ZYNQMP_GPIO_MODEPIN) += zynqmp_gpio_modepin.o
obj-$(CONFIG_SLG7XL45106_I2C_GPO) += gpio_slg7xl45106.o
obj-$(CONFIG_$(SPL_TPL_)TURRIS_OMNIA_MCU) += turris_omnia_mcu.o
+obj-$(CONFIG_FTGPIO010)+= ftgpio010.o
diff --git a/drivers/gpio/ftgpio010.c b/drivers/gpio/ftgpio010.c
new file mode 100644
index ..7e846a58d50c
--- /dev/null
+++ b/drivers/gpio/ftgpio010.c
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Faraday Technology's FTGPIO010 controller.
+ */
+
+#include
+#include
+#include
+#include
+
+struct ftgpio010_regs {
+ u32 out;
+ u32 in;
+ u32 direction;
+ u32 reserved;
+ u32 set;
+ u32 clear;
+};
+
+struct ftgpio010_plat {
+ struct ftgpio010_regs __iomem *regs;
+};
+
+static int ftgpio010_direction_input(struct udevice *dev, unsigned int pin)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ clrbits_le32(®s->direction, 1 << pin);
+ return 0;
+}
+
+static int ftgpio010_direction_output(struct udevice *dev, unsigned int pin,
+ int val)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ /* change the data first, then the direction. to avoid glitch */
+ setbits_le32(val ? ®s->set : ®s->clear, 1 << pin);
+ setbits_le32(®s->direction, 1 << pin);
+
+ return 0;
+}
+
+static int ftgpio010_get_value(struct udevice *dev, unsigned int pin)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ return (readl(®s->in) >> pin) & 1;
+}
+
+static int ftgpio010_set_value(struct udevice *dev, unsigned int pin, int val)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+ struct ftgpio010_regs *const regs = plat->regs;
+
+ setbits_le32(val ? ®s->set : ®s->clear, 1 << pin);
+ return 0;
+}
+
+static int ftgpio010_probe(struct udevice *dev)
+{
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->gpio_count = ofnode_read_u32_default(dev_ofnode(dev),
+ "nr-gpios", 32);
+ return 0;
+}
+
+static int ftgpio010_of_to_plat(struct udevice *dev)
+{
+ struct ftgpio010_plat *plat = dev_get_plat(dev);
+
+ plat->regs = dev_read_addr_ptr(dev);
+ return 0;
+}
+
+static const struct dm_gpio_ops ftgpio010_ops = {
+ .direction_input= ftgpio010_direction_input,
+ .direction_output = ftgpio010_direction_output,
+ .get_value = ftgpio010_get_value,
+ .set_value = ftgpio010_set_value,
+};
+
+static const struct udevice_id ftgpio010_ids[] = {
+ { .compatible = "faraday,ftgpio010" },
+ { }
+};
+
+U_BOOT_DRIVER(ftgpio010) = {
+ .name = "ftgpio010",
+ .id = UCLASS_GPIO,
+ .of_match = ftgpio010_ids,
+ .ops= &ftgpio010_ops,
+ .of_to_plat = ftgpio010_of_to_plat,
+ .plat_auto = sizeof(struct ftgpio010_plat),
+ .probe = ftgpio010_probe,
+};
--
2.34.1
Re: [PATCH] scripts: config_whitelist: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
On Sat, 3 Sept 2022 at 17:31, Tom Rini wrote: > > On Sat, Sep 03, 2022 at 05:30:30PM +0300, Sergei Antonov wrote: > > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST is a feature of drivers/mtd/cfi_flash.c > > driver. It allows to specify a range of protected eraseblocks on flash > > memory. > > > > Fixes build error: > > Error: You must add new CONFIG options using Kconfig > > The following new ad-hoc CONFIG options were detected: > > CONFIG_SYS_FLASH_AUTOPROTECT_LIST > > > > Signed-off-by: Sergei Antonov > > --- > > scripts/config_whitelist.txt | 1 + > > 1 file changed, 1 insertion(+) > > Please move this to Kconfig so that it can be enabled, thanks. What type must it be in Kconfig? Note, it is an array initializer similar to CONFIG_SYS_BAUDRATE_TABLE.
[PATCH] scripts: config_whitelist: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
CONFIG_SYS_FLASH_AUTOPROTECT_LIST is a feature of drivers/mtd/cfi_flash.c driver. It allows to specify a range of protected eraseblocks on flash memory. Fixes build error: Error: You must add new CONFIG options using Kconfig The following new ad-hoc CONFIG options were detected: CONFIG_SYS_FLASH_AUTOPROTECT_LIST Signed-off-by: Sergei Antonov --- scripts/config_whitelist.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 22a0f2bf8a5d..d2e4e5375baf 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -633,6 +633,7 @@ CONFIG_SYS_FLASH0 CONFIG_SYS_FLASH1 CONFIG_SYS_FLASH1_BASE_PHYS CONFIG_SYS_FLASH1_BASE_PHYS_EARLY +CONFIG_SYS_FLASH_AUTOPROTECT_LIST CONFIG_SYS_FLASH_BANKS_LIST CONFIG_SYS_FLASH_BANKS_SIZES CONFIG_SYS_FLASH_BASE -- 2.34.1
[PATCH] mmc: ftsdc010: make command timeout 250 ms as in the comment
Get rid of discrepancy beween comment /* 250 ms */ and code which shifts by 4 thus dividing by 16. So change code to shift by 2 and make the timeout value 250 ms. Signed-off-by: Sergei Antonov --- drivers/mmc/ftsdc010_mci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index 570d54cf9d8f..cabb747fbbdb 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -30,7 +30,7 @@ #include #include -#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 4) /* 250 ms */ +#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */ #define CFG_RST_TIMEOUT CONFIG_SYS_HZ /* 1 sec reset timeout */ #if CONFIG_IS_ENABLED(OF_PLATDATA) -- 2.34.1
Using SYS_FLASH_AUTOPROTECT_LIST
Hello! Should CONFIG_SYS_FLASH_AUTOPROTECT_LIST be added to scripts/config_whitelist.txt ? I am trying to use it to auto-protect a critical area of flash and 'make' fails on config check: Error: You must add new CONFIG options using Kconfig The following new ad-hoc CONFIG options were detected: CONFIG_SYS_FLASH_AUTOPROTECT_LIST
[PATCH] dm: core: fix a typo in help text
Signed-off-by: Sergei Antonov
---
cmd/dm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/dm.c b/cmd/dm.c
index eb40f0865fe0..218be85795d4 100644
--- a/cmd/dm.c
+++ b/cmd/dm.c
@@ -87,7 +87,7 @@ static char dm_help_text[] =
"dm drivers Dump list of drivers with uclass and instances\n"
DM_MEM_HELP
"dm staticDump list of drivers with static platform data\n"
- "dn tree Dump tree of driver model devices ('*' = activated)\n"
+ "dm tree Dump tree of driver model devices ('*' = activated)\n"
"dm uclassDump list of instances for each uclass"
;
#endif
--
2.34.1
Re: [PATCH] arm: ARMv4 assembly compatibility
On Sat, 20 Aug 2022 at 22:13, Tom Rini wrote: > So, my recollection at the time was that we were / had removed all > upstream platforms that were using a core design that didn't accept "bx > lr". If you're going to upstream the rest of your platform, please do a > v2 that also updates the comment Andre pointed out. But by itself, the > general policy is that we support platforms that are upstream, and > anything else is functionally dead code. Yes, I am going to upstream the rest of my platform. It will involve resurrecting some removed non-DM drivers and porting them to DM. Submitting now the v2 of the patch with an updated commend.
[PATCH v2] arm: ARMv4 assembly compatibility
There is currently a problem that U-Boot can not work on ARMv4
because assembly imlementations of memcpy() and some other functions
use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
should be used instead).
A working preprocessor-based solution to this problem is found in
arch/arm/lib/relocate.S. Move it to the "ret" macro in
arch/arm/include/asm/assembler.h and change all "bx lr" code
to "ret lr" in functions that may run on ARMv4. Linux source code
deals with this problem in the same manner.
v1 -> v2:
Comment update. Pointed out by Andre Przywara.
Signed-off-by: Sergei Antonov
CC: Samuel Holland
CC: Ye Li
CC: Simon Glass
CC: Andre Przywara
CC: Marek Vasut
CC: Sean Anderson
CC: Tom Rini
---
arch/arm/include/asm/assembler.h | 10 --
arch/arm/lib/lib1funcs.S | 8
arch/arm/lib/memcpy.S| 6 +++---
arch/arm/lib/relocate.S | 10 ++
arch/arm/lib/setjmp.S| 4 ++--
5 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index b14691858601..8d42ef4823e9 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -58,16 +58,22 @@
#endif
/*
- * We only support cores that support at least Thumb-1 and thus we use
- * 'bx lr'
+ * Use 'bx lr' everywhere except ARMv4 (without 'T') where only 'mov pc, lr'
+ * works
*/
.irpc,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
.macro ret\c, reg
+
+ /* ARMv4- don't know bx lr but the assembler fails to see that */
+#ifdef __ARM_ARCH_4__
+ mov\c pc, \reg
+#else
.ifeqs "\reg", "lr"
bx\c\reg
.else
mov\c pc, \reg
.endif
+#endif
.endm
.endr
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S
index 700eee5fbbe0..7ff4446dd644 100644
--- a/arch/arm/lib/lib1funcs.S
+++ b/arch/arm/lib/lib1funcs.S
@@ -377,7 +377,7 @@ ENTRY(__gnu_thumb1_case_sqi)
lslsr1, r1, #1
add lr, lr, r1
pop {r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_sqi)
.popsection
@@ -391,7 +391,7 @@ ENTRY(__gnu_thumb1_case_uqi)
lslsr1, r1, #1
add lr, lr, r1
pop {r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_uqi)
.popsection
@@ -406,7 +406,7 @@ ENTRY(__gnu_thumb1_case_shi)
lslsr1, r1, #1
add lr, lr, r1
pop {r0, r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_shi)
.popsection
@@ -421,7 +421,7 @@ ENTRY(__gnu_thumb1_case_uhi)
lslsr1, r1, #1
add lr, lr, r1
pop {r0, r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_uhi)
.popsection
#endif
diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
index eee7a219ce36..a1c996f94ef2 100644
--- a/arch/arm/lib/memcpy.S
+++ b/arch/arm/lib/memcpy.S
@@ -59,7 +59,7 @@
#endif
ENTRY(memcpy)
cmp r0, r1
- bxeqlr
+ reteq lr
enter r4, lr
@@ -148,7 +148,7 @@ ENTRY(memcpy)
str1b r0, ip, cs, abort=21f
exitr4, lr
- bx lr
+ ret lr
9: rsb ip, ip, #4
cmp ip, #2
@@ -258,7 +258,7 @@ ENTRY(memcpy)
.macro copy_abort_end
ldmfd sp!, {r4, lr}
- bx lr
+ ret lr
.endm
ENDPROC(memcpy)
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index 5102bfabde4a..dd6f2e3bd5e0 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -61,7 +61,7 @@ ENTRY(relocate_vectors)
stmia r1!, {r2-r8,r10}
#endif
#endif
- bx lr
+ ret lr
ENDPROC(relocate_vectors)
@@ -127,13 +127,7 @@ relocate_done:
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
#endif
- /* ARMv4- don't know bx lr but the assembler fails to see that */
-
-#ifdef __ARM_ARCH_4__
- mov pc, lr
-#else
- bx lr
-#endif
+ ret lr
ENDPROC(relocate_code)
diff --git a/arch/arm/lib/setjmp.S b/arch/arm/lib/setjmp.S
index 176a1d5315bf..2f041aeef01c 100644
--- a/arch/arm/lib/setjmp.S
+++ b/arch/arm/lib/setjmp.S
@@ -17,7 +17,7 @@ ENTRY(setjmp)
mov ip, sp
stm a1, {v1-v8, ip, lr}
mov a1, #0
- bx lr
+ ret lr
ENDPROC(setjmp)
.popsection
@@ -31,6 +31,6 @@ ENTRY(longjmp)
bne 1f
mov a1, #1
1:
- bx lr
+ ret lr
ENDPROC(longjmp)
.popsection
--
2.34.1
Re: [PATCH] arm: ARMv4 assembly compatibility
On Tue, 16 Aug 2022 at 19:17, Andre Przywara wrote:
>
> On Wed, 10 Aug 2022 12:04:46 +0300
> Sergei Antonov wrote:
>
> Hi,
>
> > There is currently a problem that U-Boot can not work on ARMv4
> > because assembly imlementations of memcpy() and some other functions
> > use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
> > should be used instead).
>
> So there is a comment in the current code, right above what's shown here in
> the first hunk, which says:
> /*
> * We only support cores that support at least Thumb-1 and thus we use
> * 'bx lr'
> */
I did not notice it. Thanks.
> This was added by Tom in commit 431afb4ef9fe, when he removed some code
> very close to what you are adding back now.
>
> So what is the story here? This commit seems to suggest U-Boot doesn't support
> even ARMv5 without "T", has this changed? There are probably other code
> places which would need adjustment to run on ARMv4?
I can not explain why there was __ARM_ARCH_5E__ in the removed code. I
am dealing with the issue that ARMv4 ("four" without letter "t") does
not understand "bx lr" while ARMv4T does. The device on which I run
modern U-Boot has FA526 - a CPU similar to ARM810 which is ARMv4
without Thumb. Its MIDR register is 0x66015261 which means that
Architecture=1.
> Tom, can you say why support for Thumb-less code / older architectures was
> dropped? No users, I guess?
>
> Sergei, can you say what is this for? Are you adding support for a SoC
> with an ARM810 core from 1996?
Yes.
And U-Boot for this device is already working: able to boot Linux and
do TFTP stuff. My company is going to use it on hundreds of devices.
It would be great for us to not have to patch U-Boot locally and have
ARMv4-compatible assembly in the mainline.
Re: [PATCH] arm: ARMv4 assembly compatibility
On Wed, 10 Aug 2022 at 12:05, Sergei Antonov wrote:
>
> There is currently a problem that U-Boot can not work on ARMv4
> because assembly imlementations of memcpy() and some other functions
> use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
> should be used instead).
Hello! There has been no replies to this message. I hope it did not
make it into spam folders. The proposed patch allows U-Boot to run on
ARMv4 systems without breaking (or even changing) other systems.
Please, consider it.
[PATCH] arm: ARMv4 assembly compatibility
There is currently a problem that U-Boot can not work on ARMv4
because assembly imlementations of memcpy() and some other functions
use "bx lr" instruction that is not available on ARMv4 ("mov pc, lr"
should be used instead).
A working preprocessor-based solution to this problem is found in
arch/arm/lib/relocate.S. Move it to the "ret" macro in
arch/arm/include/asm/assembler.h and change all "bx lr" code
to "ret lr" in functions that may run on ARMv4. Linux source code
deals with this problem in the same manner.
Signed-off-by: Sergei Antonov
CC: Samuel Holland
CC: Ye Li
CC: Simon Glass
CC: Andre Przywara
CC: Marek Vasut
CC: Sean Anderson
CC: Tom Rini
CC: Wolfgang Denk
---
arch/arm/include/asm/assembler.h | 6 ++
arch/arm/lib/lib1funcs.S | 8
arch/arm/lib/memcpy.S| 6 +++---
arch/arm/lib/relocate.S | 10 ++
arch/arm/lib/setjmp.S| 4 ++--
5 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h
index b146918586..911f7a1b49 100644
--- a/arch/arm/include/asm/assembler.h
+++ b/arch/arm/include/asm/assembler.h
@@ -63,11 +63,17 @@
*/
.irpc,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
.macro ret\c, reg
+
+ /* ARMv4- don't know bx lr but the assembler fails to see that */
+#ifdef __ARM_ARCH_4__
+ mov\c pc, \reg
+#else
.ifeqs "\reg", "lr"
bx\c\reg
.else
mov\c pc, \reg
.endif
+#endif
.endm
.endr
diff --git a/arch/arm/lib/lib1funcs.S b/arch/arm/lib/lib1funcs.S
index 700eee5fbb..7ff4446dd6 100644
--- a/arch/arm/lib/lib1funcs.S
+++ b/arch/arm/lib/lib1funcs.S
@@ -377,7 +377,7 @@ ENTRY(__gnu_thumb1_case_sqi)
lslsr1, r1, #1
add lr, lr, r1
pop {r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_sqi)
.popsection
@@ -391,7 +391,7 @@ ENTRY(__gnu_thumb1_case_uqi)
lslsr1, r1, #1
add lr, lr, r1
pop {r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_uqi)
.popsection
@@ -406,7 +406,7 @@ ENTRY(__gnu_thumb1_case_shi)
lslsr1, r1, #1
add lr, lr, r1
pop {r0, r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_shi)
.popsection
@@ -421,7 +421,7 @@ ENTRY(__gnu_thumb1_case_uhi)
lslsr1, r1, #1
add lr, lr, r1
pop {r0, r1}
- bx lr
+ ret lr
ENDPROC(__gnu_thumb1_case_uhi)
.popsection
#endif
diff --git a/arch/arm/lib/memcpy.S b/arch/arm/lib/memcpy.S
index eee7a219ce..a1c996f94e 100644
--- a/arch/arm/lib/memcpy.S
+++ b/arch/arm/lib/memcpy.S
@@ -59,7 +59,7 @@
#endif
ENTRY(memcpy)
cmp r0, r1
- bxeqlr
+ reteq lr
enter r4, lr
@@ -148,7 +148,7 @@ ENTRY(memcpy)
str1b r0, ip, cs, abort=21f
exitr4, lr
- bx lr
+ ret lr
9: rsb ip, ip, #4
cmp ip, #2
@@ -258,7 +258,7 @@ ENTRY(memcpy)
.macro copy_abort_end
ldmfd sp!, {r4, lr}
- bx lr
+ ret lr
.endm
ENDPROC(memcpy)
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index 5102bfabde..dd6f2e3bd5 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -61,7 +61,7 @@ ENTRY(relocate_vectors)
stmia r1!, {r2-r8,r10}
#endif
#endif
- bx lr
+ ret lr
ENDPROC(relocate_vectors)
@@ -127,13 +127,7 @@ relocate_done:
mcr p15, 0, r0, c7, c10, 4 /* drain write buffer */
#endif
- /* ARMv4- don't know bx lr but the assembler fails to see that */
-
-#ifdef __ARM_ARCH_4__
- mov pc, lr
-#else
- bx lr
-#endif
+ ret lr
ENDPROC(relocate_code)
diff --git a/arch/arm/lib/setjmp.S b/arch/arm/lib/setjmp.S
index 176a1d5315..2f041aeef0 100644
--- a/arch/arm/lib/setjmp.S
+++ b/arch/arm/lib/setjmp.S
@@ -17,7 +17,7 @@ ENTRY(setjmp)
mov ip, sp
stm a1, {v1-v8, ip, lr}
mov a1, #0
- bx lr
+ ret lr
ENDPROC(setjmp)
.popsection
@@ -31,6 +31,6 @@ ENTRY(longjmp)
bne 1f
mov a1, #1
1:
- bx lr
+ ret lr
ENDPROC(longjmp)
.popsection
--
2.32.0
cmd_process warning
Hello!
There is an annoying warning about conflicting return types:
common/command.c:586:20: warning: conflicting types for 'cmd_process'
due to enum/integer mismatch; have 'enum command_ret_t(int, int,
char * const*, int *, ulong *)' {aka 'enum command_ret_t(int, int,
char * const*, int *, long unsigned int *)'} [-Wenum-int-mismatch]
In file included from common/command.c:13:
include/command.h:234:5: note: previous declaration of 'cmd_process'
with type 'int(int, int, char * const*, int *, long unsigned int *)'
It can be fixed by replacing 'int' with 'enum command_ret_t' in
include/command.h
[PATCH] meson: axg: search dtb for meson-axg-usb-ctrl on board axg
USB controller for AXG is described as meson-axg-usb-ctrl,
see arch/arm/dts/meson-axg.dtsi
Look for that name instead of meson-gxl-usb-ctrl.
Signed-off-by: Sergei Antonov
---
arch/arm/mach-meson/board-axg.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-meson/board-axg.c b/arch/arm/mach-meson/board-axg.c
index 71ac65c636..236ec81579 100644
--- a/arch/arm/mach-meson/board-axg.c
+++ b/arch/arm/mach-meson/board-axg.c
@@ -106,7 +106,7 @@ int board_usb_init(int index, enum usb_init_type init)
/* find the usb glue node */
node = fdt_node_offset_by_compatible(blob, -1,
-"amlogic,meson-gxl-usb-ctrl");
+"amlogic,meson-axg-usb-ctrl");
if (node < 0) {
debug("Not found usb-control node\n");
return -ENODEV;
@@ -192,7 +192,7 @@ int board_usb_cleanup(int index, enum usb_init_type init)
/* find the usb glue node */
node = fdt_node_offset_by_compatible(blob, -1,
-"amlogic,meson-gxl-usb-ctrl");
+"amlogic,meson-axg-usb-ctrl");
if (node < 0) {
debug("Not found usb-control node\n");
return -ENODEV;
--
2.32.0
