from:"Shimoda, Yoshihiro"

[U-Boot] [PATCH 2/3 v2] net: sh-eth: add support for SH7753

2013-12-17 Thread Shimoda, Yoshihiro

SH7753 has two fast ethernet controllers and two gigabit ethernet
controllers. It is similar to SH7757.

Signed-off-by: Yoshihiro Shimoda 
---
 about v2:
  - The patch doesn't remove the CONFIG_CPU_SH7752.

 drivers/net/sh_eth.h |8 ++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 8aa7109..331c07c 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -287,7 +287,9 @@ static const u16 
sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0
-#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
+#elif defined(CONFIG_CPU_SH7757) || \
+   defined(CONFIG_CPU_SH7752) || \
+   defined(CONFIG_CPU_SH7753)
 #if defined(CONFIG_SH_ETHER_USE_GETHER)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0
@@ -356,7 +358,9 @@ enum DMAC_T_BIT {

 /* GECMR */
 enum GECMR_BIT {
-#if defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
+#if defined(CONFIG_CPU_SH7757) || \
+   defined(CONFIG_CPU_SH7752) || \
+   defined(CONFIG_CPU_SH7753)
GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,
 #else
GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00,
-- 
1.7.1

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 3/3 v2] serial_sh: add support for SH7753

2013-12-17 Thread Shimoda, Yoshihiro

Signed-off-by: Yoshihiro Shimoda 
---
 about v2:
  - The patch doesn't remove the CONFIG_CPU_SH7752.

 drivers/serial/serial_sh.h |4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 556b868..f5e9854 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -143,7 +143,9 @@ struct uart_port {
 #elif defined(CONFIG_H8S2678)
 # define SCSCR_INIT(port)  0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define H8300_SCI_DR(ch) (*(volatile char *)(P1DR + h8300_sci_pins[ch].port))
-#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
+#elif defined(CONFIG_CPU_SH7757) || \
+   defined(CONFIG_CPU_SH7752) || \
+   defined(CONFIG_CPU_SH7753)
 # define SCSPTR0 0xfe4b0020
 # define SCSPTR1 0xfe4b0020
 # define SCSPTR2 0xfe4b0020
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 1/3 v2] sh: add support for sh7753evb board

2013-12-17 Thread Shimoda, Yoshihiro

The SH7753 EVB board has SH7753, 512MB DDR3-SDRAM, SPI ROM,
Gigabit Ethernet, and eMMC.

This patch support the following functions:
 - 512MB DDR3-SDRAM, SCIF4, SPI ROM, Gigabit Ethernet, eMMC

Signed-off-by: Yoshihiro Shimoda 
---
 about v2:
  - The patch doesn't remove the sh7752evb source codes.

 arch/sh/include/asm/cpu_sh4.h   |2 +
 arch/sh/include/asm/cpu_sh7753.h|  197 +++
 board/renesas/sh7753evb/Makefile|7 +
 board/renesas/sh7753evb/lowlevel_init.S |  416 +++
 board/renesas/sh7753evb/sh7753evb.c |  326 
 board/renesas/sh7753evb/spi-boot.c  |  134 ++
 board/renesas/sh7753evb/u-boot.lds  |   81 ++
 boards.cfg  |1 +
 doc/README.sh7753evb|   67 +
 include/configs/sh7753evb.h |  137 ++
 10 files changed, 1368 insertions(+), 0 deletions(-)
 create mode 100644 arch/sh/include/asm/cpu_sh7753.h
 create mode 100644 board/renesas/sh7753evb/Makefile
 create mode 100644 board/renesas/sh7753evb/lowlevel_init.S
 create mode 100644 board/renesas/sh7753evb/sh7753evb.c
 create mode 100644 board/renesas/sh7753evb/spi-boot.c
 create mode 100644 board/renesas/sh7753evb/u-boot.lds
 create mode 100644 doc/README.sh7753evb
 create mode 100644 include/configs/sh7753evb.h

diff --git a/arch/sh/include/asm/cpu_sh4.h b/arch/sh/include/asm/cpu_sh4.h
index 9181d59..9f48e4f 100644
--- a/arch/sh/include/asm/cpu_sh4.h
+++ b/arch/sh/include/asm/cpu_sh4.h
@@ -37,6 +37,8 @@
 # include 
 #elif defined (CONFIG_CPU_SH7752)
 # include 
+#elif defined (CONFIG_CPU_SH7753)
+# include 
 #elif defined (CONFIG_CPU_SH7757)
 # include 
 #elif defined (CONFIG_CPU_SH7763)
diff --git a/arch/sh/include/asm/cpu_sh7753.h b/arch/sh/include/asm/cpu_sh7753.h
new file mode 100644
index 000..cd0e0bb
--- /dev/null
+++ b/arch/sh/include/asm/cpu_sh7753.h
@@ -0,0 +1,197 @@
+/*
+ * Copyright (C) 2012  Renesas Solutions Corp.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef _ASM_CPU_SH7753_H_
+#define _ASM_CPU_SH7753_H_
+
+#define CCR0xFF1C
+#define WTCNT  0xFFCC
+#define CCR_CACHE_INIT 0x090b
+#define CACHE_OC_NUM_WAYS  1
+
+#ifndef __ASSEMBLY__   /* put C only stuff in this section */
+/* MMU */
+struct mmu_regs {
+   unsigned intreserved[4];
+   unsigned intmmucr;
+};
+#define MMU_BASE   ((struct mmu_regs *)0xff00)
+
+/* Watchdog */
+#define WTCSR0 0xffcc0002
+#define WRSTCSR_R  0xffcc0003
+#define WRSTCSR_W  0xffcc0002
+#define WTCSR_PREFIX   0xa500
+#define WRSTCSR_PREFIX 0x6900
+#define WRSTCSR_WOVF_PREFIX0x9600
+
+/* SCIF */
+#define SCIF0_BASE 0xfe4b  /* The real name is SCIF2 */
+#define SCIF1_BASE 0xfe4c  /* The real name is SCIF3 */
+#define SCIF2_BASE 0xfe4d  /* The real name is SCIF4 */
+
+/* TMU0 */
+#define TMU_BASE0xFE43
+
+/* ETHER, GETHER MAC address */
+struct ether_mac_regs {
+   unsigned intreserved[114];
+   unsigned intmahr;
+   unsigned intreserved2;
+   unsigned intmalr;
+};
+#define GETHER0_MAC_BASE   ((struct ether_mac_regs *)0xfee0400)
+#define GETHER1_MAC_BASE   ((struct ether_mac_regs *)0xfee0c00)
+#define ETHER0_MAC_BASE((struct ether_mac_regs *)0xfef)
+#define ETHER1_MAC_BASE((struct ether_mac_regs *)0xfef0800)
+
+/* GETHER */
+struct gether_control_regs {
+   unsigned intgbecont;
+};
+#define GETHER_CONTROL_BASE((struct gether_control_regs *)0xffc10100)
+#define GBECONT_RMII1  0x0002
+#define GBECONT_RMII0  0x0001
+
+/* SerMux */
+struct sermux_regs {
+   unsigned char   smr0;
+   unsigned char   smr1;
+   unsigned char   smr2;
+   unsigned char   smr3;
+   unsigned char   smr4;
+   unsigned char   smr5;
+};
+#define SERMUX_BASE((struct sermux_regs *)0xfe47)
+
+
+/* USB0/1 */
+struct usb_common_regs {
+   unsigned short  reserved[129];
+   unsigned short  suspmode;
+};
+#define USB0_COMMON_BASE   ((struct usb_common_regs *)0xfe45)
+#define USB1_COMMON_BASE   ((struct usb_common_regs *)0xfe4f)
+
+struct usb0_phy_regs {
+   unsigned short  reset;
+   unsigned short  reserved[4];
+   unsigned short  portsel;
+};
+#define USB0_PHY_BASE  ((struct usb0_phy_regs *)0xfe5f)
+
+struct usb1_port_regs {
+   unsigned intport1sel;
+   unsigned intreserved;
+   unsigned intusb1intsts;
+};
+#define USB1_PORT_BASE ((struct usb1_port_regs *)0xfe4f2000)
+
+struct usb1_alignment_regs {
+   unsigned intehcidatac;  /* 0xfe4fe018 */
+   unsigned intreserved[63];
+   unsigned intohcidatac;
+};
+#define USB1_ALIGNMENT_BASE((struct usb1_alignment_regs *)0xfe4fe018)
+
+/* GPIO */
+struct gpio_regs {
+   unsigned short  pacr;
+   unsigned s

[U-Boot] [PATCH 3/3] serial_sh: add support for the SH7753 instead of SH7752

2013-12-16 Thread Shimoda, Yoshihiro

This patch changes the support for SH7752 to SH7753.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/serial/serial_sh.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index 556b868..c832252 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -143,7 +143,7 @@ struct uart_port {
 #elif defined(CONFIG_H8S2678)
 # define SCSCR_INIT(port)  0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define H8300_SCI_DR(ch) (*(volatile char *)(P1DR + h8300_sci_pins[ch].port))
-#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7753)
 # define SCSPTR0 0xfe4b0020
 # define SCSPTR1 0xfe4b0020
 # define SCSPTR2 0xfe4b0020
-- 
1.7.1

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 2/3] net: sh-eth: add support for SH7753 instead of SH7752

2013-12-16 Thread Shimoda, Yoshihiro

SH7753 has two fast ethernet controllers and two gigabit ethernet
controllers. It is similar to SH7757.

This patch changes the support for SH7752 to SH7753.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/net/sh_eth.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 8aa7109..579b8ac 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -287,7 +287,7 @@ static const u16 
sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0
-#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7753)
 #if defined(CONFIG_SH_ETHER_USE_GETHER)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0
-- 
1.7.1

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] net: sh_eth: add support for SH7752

2012-11-04 Thread Shimoda, Yoshihiro

SH7752 has two fast ethernet controllers and two gigabit ethernet
controllers. It is similar to SH7757.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/net/sh_eth.c |4 ++--
 drivers/net/sh_eth.h |4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 2d9cc32..e6fc8c8 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -417,7 +417,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
printf(SHETHER_NAME ": 100Base/");
 #if defined(SH_ETH_TYPE_GETHER)
sh_eth_write(eth, GECMR_100B, GECMR);
-#elif defined(CONFIG_CPU_SH7757)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
sh_eth_write(eth, 1, RTRATE);
 #elif defined(CONFIG_CPU_SH7724)
val = ECMR_RTM;
@@ -426,7 +426,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
printf(SHETHER_NAME ": 10Base/");
 #if defined(SH_ETH_TYPE_GETHER)
sh_eth_write(eth, GECMR_10B, GECMR);
-#elif defined(CONFIG_CPU_SH7757)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
sh_eth_write(eth, 0, RTRATE);
 #endif
}
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 61d2df9..568fafe 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -288,7 +288,7 @@ static const u16 
sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0
-#elif defined(CONFIG_CPU_SH7757)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
 #if defined(CONFIG_SH_ETHER_USE_GETHER)
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0
@@ -346,7 +346,7 @@ enum DMAC_T_BIT {

 /* GECMR */
 enum GECMR_BIT {
-#if defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,
 #else
GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00,
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] sh: add support for sh7752evb board

2012-11-04 Thread Shimoda, Yoshihiro

The R0P7752C0RZ board has SH7752, 512MB DDR3-SDRAM, SPI ROM,
Gigabit Ethernet, and eMMC.

This patch supports the following functions:
 - 512MB DDR3-SDRAM, SCIF4, SPI ROM, Gigabit Ethernet, eMMC

Signed-off-by: Yoshihiro Shimoda 
---
 MAINTAINERS |1 +
 arch/sh/include/asm/cpu_sh4.h   |2 +
 arch/sh/include/asm/cpu_sh7752.h|  211 ++
 board/renesas/sh7752evb/Makefile|   36 +++
 board/renesas/sh7752evb/lowlevel_init.S |  460 +++
 board/renesas/sh7752evb/sh7752evb.c |  330 ++
 board/renesas/sh7752evb/spi-boot.c  |  116 
 board/renesas/sh7752evb/u-boot.lds  |   97 +++
 boards.cfg  |1 +
 doc/README.sh7752evb|   67 +
 include/configs/sh7752evb.h |  153 ++
 11 files changed, 1474 insertions(+), 0 deletions(-)
 create mode 100644 arch/sh/include/asm/cpu_sh7752.h
 create mode 100644 board/renesas/sh7752evb/Makefile
 create mode 100644 board/renesas/sh7752evb/lowlevel_init.S
 create mode 100644 board/renesas/sh7752evb/sh7752evb.c
 create mode 100644 board/renesas/sh7752evb/spi-boot.c
 create mode 100644 board/renesas/sh7752evb/u-boot.lds
 create mode 100644 doc/README.sh7752evb
 create mode 100644 include/configs/sh7752evb.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 2daee7d..d7f49e9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1184,6 +1184,7 @@ Mark Jonas 
 Yoshihiro Shimoda 

MS7720SESH7720
+   R0P7752RZ   SH7752
R0P77570030RL   SH7757
R0P77850011RL   SH7785

diff --git a/arch/sh/include/asm/cpu_sh4.h b/arch/sh/include/asm/cpu_sh4.h
index f1f49fe..af5c56f 100644
--- a/arch/sh/include/asm/cpu_sh4.h
+++ b/arch/sh/include/asm/cpu_sh4.h
@@ -48,6 +48,8 @@
 # include 
 #elif defined (CONFIG_CPU_SH7734)
 # include 
+#elif defined (CONFIG_CPU_SH7752)
+# include 
 #elif defined (CONFIG_CPU_SH7757)
 # include 
 #elif defined (CONFIG_CPU_SH7763)
diff --git a/arch/sh/include/asm/cpu_sh7752.h b/arch/sh/include/asm/cpu_sh7752.h
new file mode 100644
index 000..f0ad0e8
--- /dev/null
+++ b/arch/sh/include/asm/cpu_sh7752.h
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2012  Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef _ASM_CPU_SH7752_H_
+#define _ASM_CPU_SH7752_H_
+
+#define CCR0xFF1C
+#define WTCNT  0xFFCC
+#define CCR_CACHE_INIT 0x090b
+#define CACHE_OC_NUM_WAYS  1
+
+#ifndef __ASSEMBLY__   /* put C only stuff in this section */
+/* MMU */
+struct mmu_regs {
+   unsigned intreserved[4];
+   unsigned intmmucr;
+};
+#define MMU_BASE   ((struct mmu_regs *)0xff00)
+
+/* Watchdog */
+#define WTCSR0 0xffcc0002
+#define WRSTCSR_R  0xffcc0003
+#define WRSTCSR_W  0xffcc0002
+#define WTCSR_PREFIX   0xa500
+#define WRSTCSR_PREFIX 0x6900
+#define WRSTCSR_WOVF_PREFIX0x9600
+
+/* SCIF */
+#define SCIF0_BASE 0xfe4b  /* The real name is SCIF2 */
+#define SCIF1_BASE 0xfe4c  /* The real name is SCIF3 */
+#define SCIF2_BASE 0xfe4d  /* The real name is SCIF4 */
+
+/* TMU0 */
+#define TMU_BASE0xFE43
+
+/* ETHER, GETHER MAC address */
+struct ether_mac_regs {
+   unsigned intreserved[114];
+   unsigned intmahr;
+   unsigned intreserved2;
+   unsigned intmalr;
+};
+#define GETHER0_MAC_BASE   ((struct ether_mac_regs *)0xfee0400)
+#define GETHER1_MAC_BASE   ((struct ether_mac_regs *)0xfee0c00)
+#define ETHER0_MAC_BASE((struct ether_mac_regs *)0xfef)
+#define ETHER1_MAC_BASE((struct ether_mac_regs *)0xfef0800)
+
+/* GETHER */
+struct gether_control_regs {
+   unsigned intgbecont;
+};
+#define GETHER_CONTROL_BASE((struct gether_control_regs *)0xffc10100)
+#define GBECONT_RMII1  0x0002
+#define GBECONT_RMII0  0x0001
+
+/* SerMux */
+struct sermux_regs {
+   unsigned char   smr0;
+   unsigned char   smr1;
+   unsigned char   smr2;
+   unsigned char   smr3;
+   unsigned char   smr4;
+   unsigned char   smr5;
+};
+#define SERMUX_BASE((struct sermux_regs *)0xfe47)
+
+
+/* USB0/1 */
+struct usb_

[U-Boot] [PATCH] serial_sh: Add support Renesas SH7752

2012-11-04 Thread Shimoda, Yoshihiro

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/serial/serial_sh.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h
index a4e..7e38a3f 100644
--- a/drivers/serial/serial_sh.h
+++ b/drivers/serial/serial_sh.h
@@ -143,7 +143,7 @@ struct uart_port {
 #elif defined(CONFIG_H8S2678)
 # define SCSCR_INIT(port)  0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
 # define H8300_SCI_DR(ch) (*(volatile char *)(P1DR + h8300_sci_pins[ch].port))
-#elif defined(CONFIG_CPU_SH7757)
+#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752)
 # define SCSPTR0 0xfe4b0020
 # define SCSPTR1 0xfe4b0020
 # define SCSPTR2 0xfe4b0020
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] sh: fix trigger_address_error()

2012-11-04 Thread Shimoda, Yoshihiro

The function should set BL bit, but it should not clear other flags.
So, the patch uses set_bl_bit() instead of a local asm code.

Signed-off-by: Yoshihiro Shimoda 
---
 arch/sh/include/asm/system.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/sh/include/asm/system.h b/arch/sh/include/asm/system.h
index 56fd77a..24b5ce8 100644
--- a/arch/sh/include/asm/system.h
+++ b/arch/sh/include/asm/system.h
@@ -274,8 +274,8 @@ void enable_hlt(void);

 static inline void trigger_address_error(void)
 {
+   set_bl_bit();
__asm__ __volatile__ (
-   "ldc %0, sr\n\t"
"mov.l @%1, %0"
:
: "r" (0x1000), "r" (0x8001)
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] sh: modify checkcpu() for SH-4A

2012-07-23 Thread Shimoda, Yoshihiro

Even if using CPU is SH-4A, the previous code always put "SH4".
This patch fixes it.

Signed-off-by: Yoshihiro Shimoda 
---
 arch/sh/cpu/sh4/cpu.c |4 
 1 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/sh/cpu/sh4/cpu.c b/arch/sh/cpu/sh4/cpu.c
index f136758..7da1ef7 100644
--- a/arch/sh/cpu/sh4/cpu.c
+++ b/arch/sh/cpu/sh4/cpu.c
@@ -29,7 +29,11 @@

 int checkcpu(void)
 {
+#ifdef CONFIG_SH4A
+   puts("CPU: SH-4A\n");
+#else
puts("CPU: SH4\n");
+#endif
return 0;
 }

-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code

2012-07-23 Thread Shimoda, Yoshihiro

Hi,

Thank you for the reply. I will wait until it is merged.

Best regards,
Yoshihiro Shimoda

2012/07/23 15:27, Nobuhiro Iwamatsu wrote:
> Hi,
> 
> Perhaps, your patch already are in Joe' patch queue, I think.
>   http://patchwork.ozlabs.org/patch/167486/
> 
> Nobuhiro
> 
> 2012/7/23 Shimoda, Yoshihiro :
>> Hi Iwamatsu-san,
>>
>> Thank for the test and Acked-by:
>>
>> Today I checked remotes/origin/{master,next} in u-boot-net.git,
>> but, the patches have not applied yet.
>> Should I resend the patches?
>>
>> Best regards,
>> Yoshihiro Shimoda
>>
>> 2012/06/29 10:55, Nobuhiro Iwamatsu wrote:
>>> Tested-off-by: Nobuhiro Iwamatsu 
>>> Acked-by: Nobuhiro Iwamatsu 
>>>
>>> 2012/6/27 Shimoda, Yoshihiro :
>>>> The SH7757's ETHER can work using the SH7724's setting. So, the patch
>>>> modifies it.
>>>>
>>>> Signed-off-by: Yoshihiro Shimoda 
>>>> ---
>>>>  drivers/net/sh_eth.c |9 +
>>>>  drivers/net/sh_eth.h |   14 ++
>>>>  2 files changed, 3 insertions(+), 20 deletions(-)
>>>>
>>>> diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
>>>> index bb57e4d..1825059 100644
>>>> --- a/drivers/net/sh_eth.c
>>>> +++ b/drivers/net/sh_eth.c
>>>> @@ -376,12 +376,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t 
>>>> *bd)
>>>>outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
>>>>
>>>>/* Configure e-mac registers */
>>>> -#if defined(CONFIG_CPU_SH7757)
>>>> -   outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP |
>>>> -   ECSIPR_MPDIP | ECSIPR_ICDIP, ECSIPR(port));
>>>> -#else
>>>>outl(0, ECSIPR(port));
>>>> -#endif
>>>>
>>>>/* Set Mac address */
>>>>val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
>>>> @@ -395,14 +390,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, 
>>>> bd_t *bd)
>>>>  #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
>>>>outl(0, PIPR(port));
>>>>  #endif
>>>> -#if !defined(CONFIG_CPU_SH7724)
>>>> +#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
>>>>outl(APR_AP, APR(port));
>>>>outl(MPR_MP, MPR(port));
>>>>  #endif
>>>>  #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
>>>>outl(TPAUSER_TPAUSE, TPAUSER(port));
>>>> -#elif defined(CONFIG_CPU_SH7757)
>>>> -   outl(TPAUSER_UNLIMITED, TPAUSER(port));
>>>>  #endif
>>>>
>>>>  #if defined(CONFIG_CPU_SH7734)
>>>> diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
>>>> index 50f4b69..5276be3 100644
>>>> --- a/drivers/net/sh_eth.h
>>>> +++ b/drivers/net/sh_eth.h
>>>> @@ -319,7 +319,7 @@ enum EESR_BIT {
>>>>EESR_FTC  = 0x0020, EESR_TDE  = 0x0010,
>>>>EESR_TFE  = 0x0008, EESR_FRC  = 0x0004,
>>>>EESR_RDE  = 0x0002, EESR_RFE  = 0x0001,
>>>> -#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
>>>> +#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
>>>>EESR_CND  = 0x0800,
>>>>  #endif
>>>>EESR_DLC  = 0x0400,
>>>> @@ -426,9 +426,7 @@ enum FELIC_MODE_BIT {
>>>>  #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
>>>>  #define ECMR_CHG_DM(ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | 
>>>> ECMR_RXF | \
>>>>ECMR_TXF | ECMR_MCT)
>>>> -#elif CONFIG_CPU_SH7757
>>>> -#define ECMR_CHG_DM(ECMR_ZPF)
>>>> -#elif CONFIG_CPU_SH7724
>>>> +#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757
>>>>  #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
>>>>  #else
>>>>  #define ECMR_CHG_DM(ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | 
>>>> ECMR_MCT)
>>>> @@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT {
>>>>
>>>>  /* APR */
>>>>  enum APR_BIT {
>>>> -#ifdef CONFIG_CPU_SH7757
>>>> -   APR_AP = 0x0001,
>>>> -#else
>>>>APR_AP = 0x0004,
>>>> -#endif
>>>>  };
>>>>
>>>>  /* MPR */
>>>>  enum MPR_BIT {
>>>> -#ifdef CONFIG_CPU_SH7757
>>>> -   MPR_MP = 0x0001,
>>>> -#else
>>>>MPR_MP = 0x0006,
>>>> -#endif
>>>>  };
>>>>
>>>>  /* TRSCER */
>>>> --
>>>> 1.7.1
>>>
>>
>>
>> --
>> Yoshihiro Shimoda 
>> EC No.
>> ___
>> U-Boot mailing list
>> U-Boot@lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot
> 
> 
> 


-- 
Yoshihiro Shimoda 
EC No.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code

2012-07-22 Thread Shimoda, Yoshihiro

Hi Iwamatsu-san,

Thank for the test and Acked-by:

Today I checked remotes/origin/{master,next} in u-boot-net.git,
but, the patches have not applied yet.
Should I resend the patches?

Best regards,
Yoshihiro Shimoda

2012/06/29 10:55, Nobuhiro Iwamatsu wrote:
> Tested-off-by: Nobuhiro Iwamatsu 
> Acked-by: Nobuhiro Iwamatsu 
> 
> 2012/6/27 Shimoda, Yoshihiro :
>> The SH7757's ETHER can work using the SH7724's setting. So, the patch
>> modifies it.
>>
>> Signed-off-by: Yoshihiro Shimoda 
>> ---
>>  drivers/net/sh_eth.c |9 +
>>  drivers/net/sh_eth.h |   14 ++
>>  2 files changed, 3 insertions(+), 20 deletions(-)
>>
>> diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
>> index bb57e4d..1825059 100644
>> --- a/drivers/net/sh_eth.c
>> +++ b/drivers/net/sh_eth.c
>> @@ -376,12 +376,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t 
>> *bd)
>>outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
>>
>>/* Configure e-mac registers */
>> -#if defined(CONFIG_CPU_SH7757)
>> -   outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP |
>> -   ECSIPR_MPDIP | ECSIPR_ICDIP, ECSIPR(port));
>> -#else
>>outl(0, ECSIPR(port));
>> -#endif
>>
>>/* Set Mac address */
>>val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
>> @@ -395,14 +390,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t 
>> *bd)
>>  #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
>>outl(0, PIPR(port));
>>  #endif
>> -#if !defined(CONFIG_CPU_SH7724)
>> +#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
>>outl(APR_AP, APR(port));
>>outl(MPR_MP, MPR(port));
>>  #endif
>>  #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
>>outl(TPAUSER_TPAUSE, TPAUSER(port));
>> -#elif defined(CONFIG_CPU_SH7757)
>> -   outl(TPAUSER_UNLIMITED, TPAUSER(port));
>>  #endif
>>
>>  #if defined(CONFIG_CPU_SH7734)
>> diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
>> index 50f4b69..5276be3 100644
>> --- a/drivers/net/sh_eth.h
>> +++ b/drivers/net/sh_eth.h
>> @@ -319,7 +319,7 @@ enum EESR_BIT {
>>EESR_FTC  = 0x0020, EESR_TDE  = 0x0010,
>>EESR_TFE  = 0x0008, EESR_FRC  = 0x0004,
>>EESR_RDE  = 0x0002, EESR_RFE  = 0x0001,
>> -#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
>> +#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
>>EESR_CND  = 0x0800,
>>  #endif
>>EESR_DLC  = 0x0400,
>> @@ -426,9 +426,7 @@ enum FELIC_MODE_BIT {
>>  #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
>>  #define ECMR_CHG_DM(ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | 
>> ECMR_RXF | \
>>ECMR_TXF | ECMR_MCT)
>> -#elif CONFIG_CPU_SH7757
>> -#define ECMR_CHG_DM(ECMR_ZPF)
>> -#elif CONFIG_CPU_SH7724
>> +#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757
>>  #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
>>  #else
>>  #define ECMR_CHG_DM(ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | 
>> ECMR_MCT)
>> @@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT {
>>
>>  /* APR */
>>  enum APR_BIT {
>> -#ifdef CONFIG_CPU_SH7757
>> -   APR_AP = 0x0001,
>> -#else
>>APR_AP = 0x0004,
>> -#endif
>>  };
>>
>>  /* MPR */
>>  enum MPR_BIT {
>> -#ifdef CONFIG_CPU_SH7757
>> -   MPR_MP = 0x0001,
>> -#else
>>MPR_MP = 0x0006,
>> -#endif
>>  };
>>
>>  /* TRSCER */
>> --
>> 1.7.1
> 


-- 
Yoshihiro Shimoda 
EC No.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 4/4] net: sh_eth: add support for SH7757's GETHER

2012-06-26 Thread Shimoda, Yoshihiro

SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's
GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757,
the driver handles the GETHER.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/net/sh_eth.h |9 +
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 13003ec..3703c55 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -282,8 +282,13 @@ static const u16 
sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = {
 #define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0
 #elif defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_SH_ETHER_USE_GETHER)
+#define SH_ETH_TYPE_GETHER
+#define BASE_IO_ADDR   0xfee0
+#else
 #define SH_ETH_TYPE_ETHER
 #define BASE_IO_ADDR   0xfef0
+#endif
 #elif defined(CONFIG_CPU_SH7724)
 #define SH_ETH_TYPE_ETHER
 #define BASE_IO_ADDR   0xA460
@@ -331,7 +336,11 @@ enum DMAC_T_BIT {

 /* GECMR */
 enum GECMR_BIT {
+#if defined(CONFIG_CPU_SH7757)
+   GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00,
+#else
GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00,
+#endif
 };

 /* EDRRR*/
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 3/4] net: sh_eth: modify the definitions of regsiter

2012-06-26 Thread Shimoda, Yoshihiro

The previous code had many similar definitions in each CPU.

This patch borrows from the sh_eth driver of Linux kernel.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/net/sh_eth.c |  108 -
 drivers/net/sh_eth.h |  331 +++---
 2 files changed, 258 insertions(+), 181 deletions(-)

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 262762d..7b429e8 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -76,8 +76,8 @@ int sh_eth_send(struct eth_device *dev, void *packet, int len)
port_info->tx_desc_cur->td0 = TD_TACT | TD_TFP;

/* Restart the transmitter if disabled */
-   if (!(inl(EDTRR(port)) & EDTRR_TRNS))
-   outl(EDTRR_TRNS, EDTRR(port));
+   if (!(sh_eth_read(eth, EDTRR) & EDTRR_TRNS))
+   sh_eth_write(eth, EDTRR_TRNS, EDTRR);

/* Wait until packet is transmitted */
timeout = TIMEOUT_CNT;
@@ -129,25 +129,24 @@ int sh_eth_recv(struct eth_device *dev)
}

/* Restart the receiver if disabled */
-   if (!(inl(EDRRR(port)) & EDRRR_R))
-   outl(EDRRR_R, EDRRR(port));
+   if (!(sh_eth_read(eth, EDRRR) & EDRRR_R))
+   sh_eth_write(eth, EDRRR_R, EDRRR);

return len;
 }

 static int sh_eth_reset(struct sh_eth_dev *eth)
 {
-   int port = eth->port;
 #if defined(SH_ETH_TYPE_GETHER)
int ret = 0, i;

/* Start e-dmac transmitter and receiver */
-   outl(EDSR_ENALL, EDSR(port));
+   sh_eth_write(eth, EDSR_ENALL, EDSR);

/* Perform a software reset and wait for it to complete */
-   outl(EDMR_SRST, EDMR(port));
+   sh_eth_write(eth, EDMR_SRST, EDMR);
for (i = 0; i < TIMEOUT_CNT ; i++) {
-   if (!(inl(EDMR(port)) & EDMR_SRST))
+   if (!(sh_eth_read(eth, EDMR) & EDMR_SRST))
break;
udelay(1000);
}
@@ -159,9 +158,9 @@ static int sh_eth_reset(struct sh_eth_dev *eth)

return ret;
 #else
-   outl(inl(EDMR(port)) | EDMR_SRST, EDMR(port));
+   sh_eth_write(eth, sh_eth_read(eth, EDMR) | EDMR_SRST, EDMR);
udelay(3000);
-   outl(inl(EDMR(port)) & ~EDMR_SRST, EDMR(port));
+   sh_eth_write(eth, sh_eth_read(eth, EDMR) & ~EDMR_SRST, EDMR);

return 0;
 #endif
@@ -207,11 +206,11 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)

/* Point the controller to the tx descriptor list. Must use physical
   addresses */
-   outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
+   sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDLAR);
 #if defined(SH_ETH_TYPE_GETHER)
-   outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
-   outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
-   outl(0x01, TDFFR(port));/* Last discriptor bit */
+   sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDFAR);
+   sh_eth_write(eth, ADDR_TO_PHY(cur_tx_desc), TDFXR);
+   sh_eth_write(eth, 0x01, TDFFR);/* Last discriptor bit */
 #endif

 err:
@@ -275,11 +274,11 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)
cur_rx_desc->rd0 |= RD_RDLE;

/* Point the controller to the rx descriptor list */
-   outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
+   sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDLAR);
 #if defined(SH_ETH_TYPE_GETHER)
-   outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
-   outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
-   outl(RDFFR_RDLF, RDFFR(port));
+   sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDFAR);
+   sh_eth_write(eth, ADDR_TO_PHY(cur_rx_desc), RDFXR);
+   sh_eth_write(eth, RDFFR_RDLF, RDFFR);
 #endif

return ret;
@@ -364,38 +363,39 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
struct phy_device *phy;

/* Configure e-dmac registers */
-   outl((inl(EDMR(port)) & ~EMDR_DESC_R) | EDMR_EL, EDMR(port));
-   outl(0, EESIPR(port));
-   outl(0, TRSCER(port));
-   outl(0, TFTR(port));
-   outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port));
-   outl(RMCR_RST, RMCR(port));
+   sh_eth_write(eth, (sh_eth_read(eth, EDMR) & ~EMDR_DESC_R) | EDMR_EL,
+EDMR);
+   sh_eth_write(eth, 0, EESIPR);
+   sh_eth_write(eth, 0, TRSCER);
+   sh_eth_write(eth, 0, TFTR);
+   sh_eth_write(eth, (FIFO_SIZE_T | FIFO_SIZE_R), FDR);
+   sh_eth_write(eth, RMCR_RST, RMCR);
 #if defined(SH_ETH_TYPE_GETHER)
-   outl(0, RPADIR(port));
+   sh_eth_write(eth, 0, RPADIR);
 #endif
-   outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
+   sh_eth_write(eth, (FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR);

/* Configure e-mac registers */
-   outl(0, ECSIPR(port));
+   sh_eth_write(eth, 0, ECSIPR);

/* Set Mac address */
val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
dev->enetaddr[2] << 8 | dev->enetaddr[3

[U-Boot] [PATCH 2/4] net: sh_eth: add SH_ETH_TYPE_ condition

2012-06-26 Thread Shimoda, Yoshihiro

At the moment, the driver supports the following CPUs:
 - GETHER (Gigabit Ethernet) : SH7763, SH7734
 - ETHER  (Fast Ethernet): SH7724, SH7757

And the driver had the following "#if":

 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
 - Those are for GETHER

 #if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
 - This is for ETHER

So, for clean up the code, this patch adds SH_ETH_TYPE_GETHER and
SH_ETH_TYPE_ETHER. And then, the patch modifies the above "#if".

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/net/sh_eth.c |   22 +-
 drivers/net/sh_eth.h |   43 +++
 2 files changed, 32 insertions(+), 33 deletions(-)

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 1825059..262762d 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -1,5 +1,5 @@
 /*
- * sh_eth.c - Driver for Renesas SH7763's ethernet controler.
+ * sh_eth.c - Driver for Renesas ethernet controler.
  *
  * Copyright (C) 2008, 2011 Renesas Solutions Corp.
  * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu
@@ -138,7 +138,7 @@ int sh_eth_recv(struct eth_device *dev)
 static int sh_eth_reset(struct sh_eth_dev *eth)
 {
int port = eth->port;
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
int ret = 0, i;

/* Start e-dmac transmitter and receiver */
@@ -208,7 +208,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth)
/* Point the controller to the tx descriptor list. Must use physical
   addresses */
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port));
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port));
outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port));
outl(0x01, TDFFR(port));/* Last discriptor bit */
@@ -276,7 +276,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth)

/* Point the controller to the rx descriptor list */
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port));
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port));
outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port));
outl(RDFFR_RDLF, RDFFR(port));
@@ -370,7 +370,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(0, TFTR(port));
outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port));
outl(RMCR_RST, RMCR(port));
-#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
+#if defined(SH_ETH_TYPE_GETHER)
outl(0, RPADIR(port));
 #endif
outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));
@@ -387,14 +387,10 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl(val, MALR(port));

outl(RFLR_RFL_MIN, RFLR(port));
-#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
+#if defined(SH_ETH_TYPE_GETHER)
outl(0, PIPR(port));
-#endif
-#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
outl(APR_AP, APR(port));
outl(MPR_MP, MPR(port));
-#endif
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(TPAUSER_TPAUSE, TPAUSER(port));
 #endif

@@ -415,7 +411,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
/* Set the transfer speed */
if (phy->speed == 100) {
printf(SHETHER_NAME ": 100Base/");
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(GECMR_100B, GECMR(port));
 #elif defined(CONFIG_CPU_SH7757)
outl(1, RTRATE(port));
@@ -424,13 +420,13 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 #endif
} else if (phy->speed == 10) {
printf(SHETHER_NAME ": 10Base/");
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
outl(GECMR_10B, GECMR(port));
 #elif defined(CONFIG_CPU_SH7757)
outl(0, RTRATE(port));
 #endif
}
-#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
+#if defined(SH_ETH_TYPE_GETHER)
else if (phy->speed == 1000) {
printf(SHETHER_NAME ": 1000Base/");
outl(GECMR_1000B, GECMR(port));
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 5276be3..401ef69 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -99,6 +99,7 @@ struct sh_eth_dev {

 /* Register Address */
 #ifdef CONFIG_CPU_SH7763
+#define SH_ETH_TYPE_GETHER
 #define BASE_IO_ADDR   0xfee0

 #define EDSR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x)
@@ -137,6 +138,7 @@ struct sh_eth_dev {
 #define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c0)

 #elif defined(CONFIG_CPU_SH7757)
+#define SH_ETH_TYPE_ETHER
 #define BASE_IO_ADDR   0xfef00

[U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code

2012-06-26 Thread Shimoda, Yoshihiro

The SH7757's ETHER can work using the SH7724's setting. So, the patch
modifies it.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/net/sh_eth.c |9 +
 drivers/net/sh_eth.h |   14 ++
 2 files changed, 3 insertions(+), 20 deletions(-)

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index bb57e4d..1825059 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -376,12 +376,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port));

/* Configure e-mac registers */
-#if defined(CONFIG_CPU_SH7757)
-   outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP |
-   ECSIPR_MPDIP | ECSIPR_ICDIP, ECSIPR(port));
-#else
outl(0, ECSIPR(port));
-#endif

/* Set Mac address */
val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 |
@@ -395,14 +390,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd)
 #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724)
outl(0, PIPR(port));
 #endif
-#if !defined(CONFIG_CPU_SH7724)
+#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
outl(APR_AP, APR(port));
outl(MPR_MP, MPR(port));
 #endif
 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
outl(TPAUSER_TPAUSE, TPAUSER(port));
-#elif defined(CONFIG_CPU_SH7757)
-   outl(TPAUSER_UNLIMITED, TPAUSER(port));
 #endif

 #if defined(CONFIG_CPU_SH7734)
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 50f4b69..5276be3 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -319,7 +319,7 @@ enum EESR_BIT {
EESR_FTC  = 0x0020, EESR_TDE  = 0x0010,
EESR_TFE  = 0x0008, EESR_FRC  = 0x0004,
EESR_RDE  = 0x0002, EESR_RFE  = 0x0001,
-#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757)
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
EESR_CND  = 0x0800,
 #endif
EESR_DLC  = 0x0400,
@@ -426,9 +426,7 @@ enum FELIC_MODE_BIT {
 #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
 #define ECMR_CHG_DM(ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | 
ECMR_RXF | \
ECMR_TXF | ECMR_MCT)
-#elif CONFIG_CPU_SH7757
-#define ECMR_CHG_DM(ECMR_ZPF)
-#elif CONFIG_CPU_SH7724
+#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757
 #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF)
 #else
 #define ECMR_CHG_DM(ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT)
@@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT {

 /* APR */
 enum APR_BIT {
-#ifdef CONFIG_CPU_SH7757
-   APR_AP = 0x0001,
-#else
APR_AP = 0x0004,
-#endif
 };

 /* MPR */
 enum MPR_BIT {
-#ifdef CONFIG_CPU_SH7757
-   MPR_MP = 0x0001,
-#else
MPR_MP = 0x0006,
-#endif
 };

 /* TRSCER */
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] [PATCH] net/sh-ether: Fix build by removing ECSIPR_BRCRXIP and other

2012-06-21 Thread Shimoda, Yoshihiro

Hi,

2012/06/06 11:39, Nobuhiro Iwamatsu wrote:
> When support sh7734 of sh-ether, ECSIPR_BRCRXIP and other were removed.
> Therefore SH7757 and SH7724 can not build. This revise this probelem.
> 
> Signed-off-by: Nobuhiro Iwamatsu 

I tested this patch. And, it is good.

Tested-by: Yoshihiro Shimoda 

Best regards,
Yoshihiro Shimoda
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

Re: [U-Boot] net: sh_eth: fix build error when CONFIG_CPU_SH7757 is set

2012-06-20 Thread Shimoda, Yoshihiro

Hi,

2012/06/21 15:51, Nobuhiro Iwamatsu wrote:
> Hi,
> 
> This patch already send to this ML
>   http://lists.denx.de/pipermail/u-boot/2012-June/125789.html

Thank you for the information.
I will test the patch.

Best regards,
Yoshihiro Shimoda
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] net: sh_eth: fix build error when CONFIG_CPU_SH7757 is set

2012-06-20 Thread Shimoda, Yoshihiro

This patch fixes the following build error when CONFIG_CPU_SH7757 is set:

In file included from sh_eth.c:32:
sh_eth.h:466: error: expected identifier before ‘}’ token
sh_eth.c: In function ‘sh_eth_config’:
sh_eth.c:380: error: ‘ECSIPR_BRCRXIP’ undeclared (first use in this function)
sh_eth.c:380: error: (Each undeclared identifier is reported only once
sh_eth.c:380: error: for each function it appears in.)
sh_eth.c:380: error: ‘ECSIPR_PSRTOIP’ undeclared (first use in this function)
sh_eth.c:380: error: ‘ECSIPR_LCHNGIP’ undeclared (first use in this function)
sh_eth.c:380: error: ‘ECSIPR_MPDIP’ undeclared (first use in this function)
sh_eth.c:380: error: ‘ECSIPR_ICDIP’ undeclared (first use in this function)
make[1]: *** [sh_eth.o] Error 1

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/net/sh_eth.h |4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index a1ba68b..f2bd734 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -452,9 +452,11 @@ enum ECSR_STATUS_BIT {

 /* ECSIPR */
 enum ECSIPR_STATUS_MASK_BIT {
-#if defined(CONFIG_CPU_SH7724)
+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
+   ECSIPR_BRCRXIP = 0x20,
ECSIPR_PSRTOIP = 0x10,
ECSIPR_LCHNGIP = 0x04,
+   ECSIPR_MPDIP = 0x02,
ECSIPR_ICDIP = 0x01,
 #elif defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
ECSIPR_PSRTOIP = 0x10,
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] mmc: fix capacity calculation when EXT_CSD_SEC_CNT is used

2012-06-07 Thread Shimoda, Yoshihiro

Since the type of "ext_csd" was array of char, the following
calculation might fail when the value of ext_csd[EXT_CSD_SEC_CNT]
was minus.

capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
| ext_csd[EXT_CSD_SEC_CNT + 1] << 8
| ext_csd[EXT_CSD_SEC_CNT + 2] << 16
| ext_csd[EXT_CSD_SEC_CNT + 3] << 24;

So, this patch changes the type of "ext_csd" to array of u8.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/mmc/mmc.c |   10 +-
 1 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 596732e..b781201 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -668,7 +668,7 @@ int mmc_send_op_cond(struct mmc *mmc)
 }


-int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd)
+int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 {
struct mmc_cmd cmd;
struct mmc_data data;
@@ -680,7 +680,7 @@ int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd)
cmd.cmdarg = 0;
cmd.flags = 0;

-   data.dest = ext_csd;
+   data.dest = (char *)ext_csd;
data.blocks = 1;
data.blocksize = 512;
data.flags = MMC_DATA_READ;
@@ -716,7 +716,7 @@ int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)

 int mmc_change_freq(struct mmc *mmc)
 {
-   ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
+   ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
char cardtype;
int err;

@@ -978,8 +978,8 @@ int mmc_startup(struct mmc *mmc)
uint mult, freq;
u64 cmult, csize, capacity;
struct mmc_cmd cmd;
-   ALLOC_CACHE_ALIGN_BUFFER(char, ext_csd, 512);
-   ALLOC_CACHE_ALIGN_BUFFER(char, test_csd, 512);
+   ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
+   ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, 512);
int timeout = 1000;

 #ifdef CONFIG_MMC_SPI_CRC_ON
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] mmc: sh_mmcif: enable MMC_MODE_HC

2012-06-07 Thread Shimoda, Yoshihiro

The controller can control high capacity cards. So, the patch adds
the flag. If the flag is not set, "mmcinfo" will fail when a high
capacity card is used.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/mmc/sh_mmcif.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 2835e24..4588568 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -593,7 +593,7 @@ int mmcif_mmc_init(void)
mmc->f_max = CLKDEV_EMMC_DATA;
mmc->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT |
-MMC_MODE_8BIT;
+MMC_MODE_8BIT | MMC_MODE_HC;
memcpy(mmc->name, DRIVER_NAME, sizeof(DRIVER_NAME));
mmc->send_cmd = sh_mmcif_request;
mmc->set_ios = sh_mmcif_set_ios;
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] sh: sh7757lcr: add supporting for MMCIF

2012-03-05 Thread Shimoda, Yoshihiro

The sh7757lcr has 2GByte eMMC chip. This patch supports it.

Signed-off-by: Yoshihiro Shimoda 
---
 board/renesas/sh7757lcr/sh7757lcr.c |5 +
 doc/README.sh7757lcr|1 +
 include/configs/sh7757lcr.h |   11 +++
 3 files changed, 17 insertions(+), 0 deletions(-)

diff --git a/board/renesas/sh7757lcr/sh7757lcr.c 
b/board/renesas/sh7757lcr/sh7757lcr.c
index a62be24..adae9ce 100644
--- a/board/renesas/sh7757lcr/sh7757lcr.c
+++ b/board/renesas/sh7757lcr/sh7757lcr.c
@@ -263,6 +263,11 @@ int dram_init(void)
return 0;
 }

+int board_mmc_init(bd_t *bis)
+{
+   return mmcif_mmc_init();
+}
+
 static int get_sh_eth_mac_raw(unsigned char *buf, int size)
 {
struct spi_flash *spi;
diff --git a/doc/README.sh7757lcr b/doc/README.sh7757lcr
index 37c1a7a..3e9c1c1 100644
--- a/doc/README.sh7757lcr
+++ b/doc/README.sh7757lcr
@@ -12,6 +12,7 @@ The R0P7757LC0030RL(board config name:sh7757lcr) has the 
following device:
  - SPI ROM 8MB
  - 2D Graphic controller
  - Ethernet controller
+ - eMMC 2GB


 configuration for This board:
diff --git a/include/configs/sh7757lcr.h b/include/configs/sh7757lcr.h
index c1f9ce8..73d2a87 100644
--- a/include/configs/sh7757lcr.h
+++ b/include/configs/sh7757lcr.h
@@ -49,6 +49,10 @@
 #define CONFIG_CMD_MD5SUM
 #define CONFIG_MD5
 #define CONFIG_CMD_LOADS
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_DOS_PARTITION
+#define CONFIG_MAC_PARTITION

 #define CONFIG_BAUDRATE115200
 #define CONFIG_BOOTDELAY   3
@@ -123,6 +127,13 @@
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO   1

+/* MMCIF */
+#define CONFIG_MMC 1
+#define CONFIG_GENERIC_MMC 1
+#define CONFIG_SH_MMCIF1
+#define CONFIG_SH_MMCIF_ADDR   0xffcb
+#define CONFIG_SH_MMCIF_CLK4800
+
 /* SH7757 board */
 #define SH7757LCR_SDRAM_PHYS_TOP   0x4000
 #define SH7757LCR_GRA_OFFSET   0x1f00
-- 
1.7.1
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH] sh_spi: Add 4 chip select signals supporting

2012-03-05 Thread Shimoda, Yoshihiro

The module has 4 chip select signals. This patch supports it.

Signed-off-by: Yoshihiro Shimoda 
---
 drivers/spi/sh_spi.c |   19 ---
 drivers/spi/sh_spi.h |4 +++-
 2 files changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/sh_spi.c b/drivers/spi/sh_spi.c
index 78c7f1a..e944b23 100644
--- a/drivers/spi/sh_spi.c
+++ b/drivers/spi/sh_spi.c
@@ -1,7 +1,7 @@
 /*
  * SH SPI driver
  *
- * Copyright (C) 2011 Renesas Solutions Corp.
+ * Copyright (C) 2011-2012 Renesas Solutions Corp.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -82,6 +82,19 @@ void spi_init(void)
 {
 }

+static void sh_spi_set_cs(struct sh_spi *ss, unsigned int cs)
+{
+   unsigned long val = 0;
+
+   if (cs & 0x01)
+   val |= SH_SPI_SSS0;
+   if (cs & 0x02)
+   val |= SH_SPI_SSS1;
+
+   sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4);
+   sh_spi_set_bit(val, &ss->regs->cr4);
+}
+
 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
 {
@@ -104,6 +117,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, 
unsigned int cs,
sh_spi_write(0x00, &ss->regs->cr1);
/* CR3 init */
sh_spi_write(0x00, &ss->regs->cr3);
+   sh_spi_set_cs(ss, cs);

clear_fifo(ss);

@@ -242,8 +256,7 @@ int  spi_xfer(struct spi_slave *slave, unsigned int bitlen, 
const void *dout,

 int  spi_cs_is_valid(unsigned int bus, unsigned int cs)
 {
-   /* This driver supports "bus = 0" and "cs = 0" only. */
-   if (!bus && !cs)
+   if (!bus && cs < SH_SPI_NUM_CS)
return 1;
else
return 0;
diff --git a/drivers/spi/sh_spi.h b/drivers/spi/sh_spi.h
index dd8f937..96b4b68 100644
--- a/drivers/spi/sh_spi.h
+++ b/drivers/spi/sh_spi.h
@@ -60,10 +60,12 @@ struct sh_spi_regs {
 #define SH_SPI_TBFI0x40
 #define SH_SPI_RBEI0x20
 #define SH_SPI_RBFI0x10
+#define SH_SPI_SSS10x08
 #define SH_SPI_WPABRT  0x04
-#define SH_SPI_SSS 0x01
+#define SH_SPI_SSS00x01

 #define SH_SPI_FIFO_SIZE   32
+#define SH_SPI_NUM_CS  4

 struct sh_spi {
struct spi_slaveslave;
-- 
1.7.1

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH 2/3 v2] net: sh-eth: add support for SH7753

[U-Boot] [PATCH 3/3 v2] serial_sh: add support for SH7753

[U-Boot] [PATCH 1/3 v2] sh: add support for sh7753evb board

[U-Boot] [PATCH 3/3] serial_sh: add support for the SH7753 instead of SH7752

[U-Boot] [PATCH 2/3] net: sh-eth: add support for SH7753 instead of SH7752

[U-Boot] [PATCH] net: sh_eth: add support for SH7752

[U-Boot] [PATCH] sh: add support for sh7752evb board

[U-Boot] [PATCH] serial_sh: Add support Renesas SH7752

[U-Boot] [PATCH] sh: fix trigger_address_error()

[U-Boot] [PATCH] sh: modify checkcpu() for SH-4A

Re: [U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code

Re: [U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code

[U-Boot] [PATCH 4/4] net: sh_eth: add support for SH7757's GETHER

[U-Boot] [PATCH 3/4] net: sh_eth: modify the definitions of regsiter

[U-Boot] [PATCH 2/4] net: sh_eth: add SH_ETH_TYPE_ condition

[U-Boot] [PATCH 1/4] net: sh_eth: clean up for the SH7757's code

Re: [U-Boot] [PATCH] net/sh-ether: Fix build by removing ECSIPR_BRCRXIP and other

Re: [U-Boot] net: sh_eth: fix build error when CONFIG_CPU_SH7757 is set

[U-Boot] net: sh_eth: fix build error when CONFIG_CPU_SH7757 is set

[U-Boot] [PATCH] mmc: fix capacity calculation when EXT_CSD_SEC_CNT is used

[U-Boot] [PATCH] mmc: sh_mmcif: enable MMC_MODE_HC

[U-Boot] [PATCH] sh: sh7757lcr: add supporting for MMCIF

[U-Boot] [PATCH] sh_spi: Add 4 chip select signals supporting

23 matches

Site Navigation

Mail list logo

Footer information