[U-Boot] [PATCH 2/2] arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

[Tetsuyuki Kobayashi]

Add CONFIG_SYS_GENERIC_BOARD to enable generic board for kzm9g.
See doc/README.generic-board

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 include/configs/kzm9g.h |1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 4d11c7d..5a13ad1 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -15,6 +15,7 @@
 #define CONFIG_KZM_A9_GT
 #define CONFIG_RMOBILE_BOARD_STRINGKMC KZM-A9-GT
 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
+#define CONFIG_SYS_GENERIC_BOARD
 
 #include asm/arch/rmobile.h
 
-- 
1.7.9.5

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[U-Boot] [PATCH 1/2] i2c: sh_i2c: bugfix: i2c probe command does now work

[Tetsuyuki Kobayashi]

This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C 
framework.

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 
2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 
47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 
7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does 
not read device at all. This patch changes read length to 1.


Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 drivers/i2c/sh_i2c.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index cc19100..264c2e6 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -269,7 +269,7 @@ static int sh_i2c_write(struct i2c_adapter *adap, uint8_t 
chip, uint addr,
 static int
 sh_i2c_probe(struct i2c_adapter *adap, u8 dev)
 {
-   return sh_i2c_read(adap, dev, 0, 0, NULL, 0);
+   return sh_i2c_read(adap, dev, 0, 0, NULL, 1);
 }
 
 static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,
-- 
1.7.9.5

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[U-Boot] [PATCH 0/2] i2c: sh_i2c: bugfix: i2c probe command does now work

[Tetsuyuki Kobayashi]

Hello, I found i2c probe command bug on kzm9g board and fixed it.
I know it is the last minute to v2014.04, but I want these patches merged. 
Please review.

Tetsuyuki Kobayashi (2):
  i2c: sh_i2c: bugfix: i2c probe command does now work
  arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

 drivers/i2c/sh_i2c.c|2 +-
 include/configs/kzm9g.h |1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
1.7.9.5

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Re: [U-Boot] [PATCH 1/2] i2c: sh_i2c: bugfix: i2c probe command does now work

[Tetsuyuki Kobayashi]

I am sorry. The title was typo.
i2c: sh_i2c: bugfix: i2c probe command does not work


(2014/04/14 11:21), Tetsuyuki Kobayashi wrote:
 This is regression of commit 2035d77d i2c: sh_i2c: Update to new 
 CONFIG_SYS_I2C framework.
 
 Before commit 2035d77d, i2c probe command works properly on kzm9g board.
 
 KZM-A9-GT# i2c probe
 Valid chip addresses: 0C 12 1D 32 39 3D 40 60
 
 After commit 2035d77d, i2c probe command does not work.
 
 KZM-A9-GT# i2c probe
 Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 
 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 
 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 
 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 
 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 
 7A 7B 7C 7D 7E 7F
 
 sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does 
 not read device at all. This patch changes read length to 1.
 
 
 Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
 ---
   drivers/i2c/sh_i2c.c |2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)
 
 diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
 index cc19100..264c2e6 100644
 --- a/drivers/i2c/sh_i2c.c
 +++ b/drivers/i2c/sh_i2c.c
 @@ -269,7 +269,7 @@ static int sh_i2c_write(struct i2c_adapter *adap, uint8_t 
 chip, uint addr,
   static int
   sh_i2c_probe(struct i2c_adapter *adap, u8 dev)
   {
 - return sh_i2c_read(adap, dev, 0, 0, NULL, 0);
 + return sh_i2c_read(adap, dev, 0, 0, NULL, 1);
   }
   
   static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,
 

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Re: [U-Boot] [PATCH v2 1/2] i2c: sh_i2c: bugfix: i2c probe command does not work

[Tetsuyuki Kobayashi]

Hello, Nobihiro, Heiko

I found bug in this patch.

When I change read length 0 to 1, I have to change buffer address NULL 
to some valid memory address.


I am going to v3 patch as soon as possible.

(2014/04/14 15:09), Nobuhiro Iwamatsu wrote:

Hi,

2014-04-14 14:22 GMT+09:00 Heiko Schocher h...@denx.de:

Hello Tetsuyuki

Am 14.04.2014 06:45, schrieb Tetsuyuki Kobayashi:


This is regression of commit 2035d77d i2c: sh_i2c: Update to new
CONFIG_SYS_I2C framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10
11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29
2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42
43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B
5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74
75 76 77 78 79 7A 7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it
does not read device at all. This patch changes read length to 1.

Signed-off-by: Tetsuyuki Kobayashik...@kmckk.co.jp
---
   drivers/i2c/sh_i2c.c |2 +-
   1 file changed, 1 insertion(+), 1 deletion(-)



I could not find your patch in patchwork ... so I think
it go through u-boot-sh.git, so:

Acked-by: Heiko Schocher h...@denx.de



Thanks!
I think the reason that is not registered in the patchwork, the
subject is because he is 0/2.
Tetsuyuki, could you re-send this patch?


Thanks!

bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany


Best regards,
   Nobuhiro



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[U-Boot] [PATCH v2 2/2] arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

[Tetsuyuki Kobayashi]

Add CONFIG_SYS_GENERIC_BOARD to enable generic board for kzm9g.
See doc/README.generic-board

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 include/configs/kzm9g.h |1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 4d11c7d..5a13ad1 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -15,6 +15,7 @@
 #define CONFIG_KZM_A9_GT
 #define CONFIG_RMOBILE_BOARD_STRINGKMC KZM-A9-GT
 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
+#define CONFIG_SYS_GENERIC_BOARD
 
 #include asm/arch/rmobile.h
 
-- 
1.7.9.5

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[U-Boot] [PATCH v2 1/2] i2c: sh_i2c: bugfix: i2c probe command does not work

[Tetsuyuki Kobayashi]

This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C 
framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 
2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 
47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 
7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does 
not read device at all. This patch changes read length to 1.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 drivers/i2c/sh_i2c.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index cc19100..264c2e6 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -269,7 +269,7 @@ static int sh_i2c_write(struct i2c_adapter *adap, uint8_t 
chip, uint addr,
 static int
 sh_i2c_probe(struct i2c_adapter *adap, u8 dev)
 {
-   return sh_i2c_read(adap, dev, 0, 0, NULL, 0);
+   return sh_i2c_read(adap, dev, 0, 0, NULL, 1);
 }
 
 static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,
-- 
1.7.9.5

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[U-Boot] [PATCH v2 0/2] i2c: sh_i2c: bugfix: i2c probe command does not work

[Tetsuyuki Kobayashi]

Hello, 
I found i2c probe command bug on kzm9g board and fixed it.
The v1 patches are faild to post because I was not subscribing u-boot ML.

Changes for v2:
  - correct typo in commit message.

Tetsuyuki Kobayashi (2):
  i2c: sh_i2c: bugfix: i2c probe command does now work
  arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

 drivers/i2c/sh_i2c.c|2 +-
 include/configs/kzm9g.h |1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
1.7.9.5

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Re: [U-Boot] [PATCH v2 2/2] arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

[Tetsuyuki Kobayashi]

Hi,

(2014/04/14 15:12), Nobuhiro Iwamatsu wrote:

Hi,

2014-04-14 14:24 GMT+09:00 Heiko Schocher h...@denx.de:

Hello Tetsuyuki,

Am 14.04.2014 06:45, schrieb Tetsuyuki Kobayashi:


Add CONFIG_SYS_GENERIC_BOARD to enable generic board for kzm9g.
See doc/README.generic-board



Hmm.. I did not find doc/README.generic-board in current mainline
tree ...

[...]



Maybe, doc/README.generic-board meanes README.


I worked on v2014.04-rc3 and missed reverting Start the deprecation 
process for generic board.

doc/README.generic-board was deleted now.
Anyway, I post revised v3 patch.




beside of that:

Acked-by: Heiko Schocher h...@denx.de




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[U-Boot] [PATCH v3 1/2] i2c: sh_i2c: bugfix: i2c probe command does not work

[Tetsuyuki Kobayashi]

This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C 
framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 
2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 
47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 
7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does 
not read device at all. This patch prepares dummy buffer and read data into it.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
  - correct typo in commit message.

Changes for v3:
  - prepare dummy data buffer and use it to avoid NULL access.

 drivers/i2c/sh_i2c.c |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index cc19100..e7e9692 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -269,7 +269,9 @@ static int sh_i2c_write(struct i2c_adapter *adap, uint8_t 
chip, uint addr,
 static int
 sh_i2c_probe(struct i2c_adapter *adap, u8 dev)
 {
-   return sh_i2c_read(adap, dev, 0, 0, NULL, 0);
+   u8 dummy[1];
+
+   return sh_i2c_read(adap, dev, 0, 0, dummy, sizeof dummy);
 }
 
 static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,
-- 
1.7.9.5

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[U-Boot] [PATCH v3 0/2] kzm9g i2c bugfix and CONFIG_SYS_GENERIC_BOARD

[Tetsuyuki Kobayashi]

Hello, 
I found i2c probe command bug on kzm9g board and fixed it.
Also, add CONFIG_SYS_GENERIC_BOARD for kzm9g board.

Changes for v2:
  - correct typo in commit message.

Changes for v3:
  - prepare dummy data buffer and use it to avoid NULL access.

Tetsuyuki Kobayashi (2):
  i2c: sh_i2c: bugfix: i2c probe command does not work
  arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

 drivers/i2c/sh_i2c.c|4 +++-
 include/configs/kzm9g.h |1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

-- 
1.7.9.5

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[U-Boot] [PATCH v3 2/2] arm: kzm9g: Add CONFIG_SYS_GENERIC_BOARD

[Tetsuyuki Kobayashi]

Add CONFIG_SYS_GENERIC_BOARD to use common/board_[fr].c for kzm9g.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v3:
  - change commit message.

 include/configs/kzm9g.h |1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 4d11c7d..5a13ad1 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -15,6 +15,7 @@
 #define CONFIG_KZM_A9_GT
 #define CONFIG_RMOBILE_BOARD_STRINGKMC KZM-A9-GT
 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
+#define CONFIG_SYS_GENERIC_BOARD
 
 #include asm/arch/rmobile.h
 
-- 
1.7.9.5

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Re: [U-Boot] [PATCH v3 1/2] i2c: sh_i2c: bugfix: i2c probe command does not work

[Tetsuyuki Kobayashi]

(2014/04/15 4:17), Tom Rini wrote:

On Mon, Apr 14, 2014 at 05:13:57PM +0900, Tetsuyuki Kobayashi wrote:

This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C 
framework

Before commit 2035d77d, i2c probe command works properly on kzm9g board.

KZM-A9-GT# i2c probe
Valid chip addresses: 0C 12 1D 32 39 3D 40 60

After commit 2035d77d, i2c probe command does not work.

KZM-A9-GT# i2c probe
Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 
13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 
2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 
47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 
61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 
7B 7C 7D 7E 7F

sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does 
not read device at all. This patch prepares dummy buffer and read data into it.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
   - correct typo in commit message.

Changes for v3:
   - prepare dummy data buffer and use it to avoid NULL access.

  drivers/i2c/sh_i2c.c |4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index cc19100..e7e9692 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -269,7 +269,9 @@ static int sh_i2c_write(struct i2c_adapter *adap, uint8_t 
chip, uint addr,
  static int
  sh_i2c_probe(struct i2c_adapter *adap, u8 dev)
  {
-   return sh_i2c_read(adap, dev, 0, 0, NULL, 0);
+   u8 dummy[1];
+
+   return sh_i2c_read(adap, dev, 0, 0, dummy, sizeof dummy);
  }

  static unsigned int sh_i2c_set_bus_speed(struct i2c_adapter *adap,


I will take this patch as-is, but please use sizeof(foo) rather than
sizeof foo.  It's valid but uncommon syntax for the project, thanks!


I understand about sizeof(foo).

Anyway thank you very much!
U-Boot v2014.04 works fine on kzm9g board.


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[U-Boot] Regression: bootz command fails in v2013.07-rc2

[Tetsuyuki Kobayashi]

Hello,

I found bootz command causes 'undefined instruction' exception
on KZM-A9-GT board (armv7) in v2013.07-rc2.

KZM-A9-GT# tftp zImage.kzm9g.v310; bootz
smc911x: detected LAN9221 controller
smc911x: phy initialized
smc911x: MAC 00:01:9b:04:04:05
Using smc911x-0 device
TFTP from server 192.168.1.110; our IP address is 192.168.1.162
Filename 'zImage.kzm9g.v310'.
Load address: 0x4300
Loading: #
 #
 #
 #
 #
 #
 #
 #
 1.8 MiB/s
done
Bytes transferred = 2453603 (257063 hex)
undefined instruction
pc : [0500661a]  lr : [5ff8c078]
sp : 5fee99d0  ip : 0001 fp : 5fee9bc5
r10: 0001  r9 : 5fee9ea8 r8 : 5fee9f48
r7 : 00010209  r6 : 00d9 r5 : 014015c5  r4 : 0500571c
r3 : 05005717  r2 : 05005717 r1 : 0014  r0 : 05005717
Flags: nzCv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...



At v2013.07-rc1, it was good.
I tried 'git bisect' and got this result.

$ git bisect good
35fc84fa1ff51e15ecd3e464dac87eb105ffed30 is the first bad commit
commit 35fc84fa1ff51e15ecd3e464dac87eb105ffed30
Author: Simon Glass s...@chromium.org
Date:   Tue Jun 11 11:14:47 2013 -0700

Refactor the bootm command to reduce code duplication

Please take a look.

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Re: [U-Boot] [PATCH v3] BUGFIX: arm: data abort in get_bad_stack_swi

[Tetsuyuki Kobayashi]

Hello Albert

How about this patch?

(04/05/2013 07:12 PM), Tetsuyuki Kobayashi wrote:
 When swi instruction is executed, it is expected to get message
 software interrupt in console and dump registers and reboot, as
 do_software_interrupt() in arch/arm/lib/interrupts.c.
 But, actually it causes data abort accessing wrong address in 
 get_bad_stack_swi
 macro in arch/arm/cpu/v7/start.S.
 This patch fixes this problem.
 
 The same mistake in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S.
 
 Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
 ---
 Changes for v2:
 - added arch/arm/cpu/{arm1136,arm1176,pxa}/start.S
 Changes for v3:
 - restore lr register in all 4 files.
   Only arm/arm/cpu/armv7/start.S is tested on KZM-A9-GT board.
 
  arch/arm/cpu/arm1136/start.S |3 ++-
  arch/arm/cpu/arm1176/start.S |4 +++-
  arch/arm/cpu/armv7/start.S   |3 ++-
  arch/arm/cpu/pxa/start.S |3 ++-
  4 files changed, 9 insertions(+), 4 deletions(-)
 
 diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
 index eba2324..bccfdbf 100644
 --- a/arch/arm/cpu/arm1136/start.S
 +++ b/arch/arm/cpu/arm1136/start.S
 @@ -392,8 +392,9 @@ cpu_init_crit:
   str r0, [r13]   @ save R0's value.
   ldr r0, IRQ_STACK_START_IN  @ get data regions start
   str lr, [r0]@ save caller lr in position 0 
 of saved stack
 - mrs r0, spsr@ get the spsr
 + mrs lr, spsr@ get the spsr
   str lr, [r0, #4]@ save spsr in position 1 of 
 saved stack
 + ldr lr, [r0]@ restore lr
   ldr r0, [r13]   @ restore r0
   add r13, r13, #4@ pop stack entry
   .endm
 diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
 index 3c291fb..694f79d 100644
 --- a/arch/arm/cpu/arm1176/start.S
 +++ b/arch/arm/cpu/arm1176/start.S
 @@ -480,9 +480,11 @@ phy_last_jump:
   /* save caller lr in position 0 of saved stack */
   str lr, [r0]
   /* get the spsr */
 - mrs r0, spsr
 + mrs lr, spsr
   /* save spsr in position 1 of saved stack */
   str lr, [r0, #4]
 + /* restore lr */
 + ldr lr, [r0]
   /* restore r0 */
   ldr r0, [r13]
   /* pop stack entry */
 diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
 index 36a4c3c..e5e157b 100644
 --- a/arch/arm/cpu/armv7/start.S
 +++ b/arch/arm/cpu/armv7/start.S
 @@ -465,9 +465,10 @@ ENDPROC(cpu_init_crit)
   @ spots for abort stack
   str lr, [r0]@ save caller lr in position 0
   @ of saved stack
 - mrs r0, spsr@ get the spsr
 + mrs lr, spsr@ get the spsr
   str lr, [r0, #4]@ save spsr in position 1 of
   @ saved stack
 + ldr lr, [r0]@ restore lr
   ldr r0, [r13]   @ restore r0
   add r13, r13, #4@ pop stack entry
   .endm
 diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
 index 456a783..9c525e8 100644
 --- a/arch/arm/cpu/pxa/start.S
 +++ b/arch/arm/cpu/pxa/start.S
 @@ -387,8 +387,9 @@ cpu_init_crit:
   str r0, [r13]   @ save R0's value.
   ldr r0, IRQ_STACK_START_IN  @ get data regions start
   str lr, [r0]@ save caller lr in position 0 
 of saved stack
 - mrs r0, spsr@ get the spsr
 + mrs lr, spsr@ get the spsr
   str lr, [r0, #4]@ save spsr in position 1 of 
 saved stack
 + ldr lr, [r0]@ restore lr
   ldr r0, [r13]   @ restore r0
   add r13, r13, #4@ pop stack entry
   .endm
 

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Re: [U-Boot] [PATCH v2] BUGFIX: arm: data abort in get_bad_stack_swi

[Tetsuyuki Kobayashi]

Hi Albert

(04/05/2013 04:04 PM), Albert ARIBAUD wrote:
 Hi Tetsuyuki,
 
 On Fri,  5 Apr 2013 10:45:14 +0900, Tetsuyuki Kobayashi
 k...@kmckk.co.jp wrote:
 
 When swi instruction is executed, it is expected to get message
 software interrupt in console and dump registers and reboot, as
 do_software_interrupt() in arch/arm/lib/interrupts.c.
 But, actually it causes data abort accessing wrong address in 
 get_bad_stack_swi
 macro in arch/arm/cpu/v7/start.S.
 This patch fixes this problem.

 The same mistake in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S.

 Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
 ---
 Changes for v2:
 - added arch/arm/cpu/{arm1136,arm1176,pxa}/start.S
   (But not tested, because I don't have test boards of them)
   arm/arm/cpu/armv7/start.S is tested on KZM-A9-GT board.

  arch/arm/cpu/arm1136/start.S |2 +-
  arch/arm/cpu/arm1176/start.S |2 +-
  arch/arm/cpu/armv7/start.S   |2 +-
  arch/arm/cpu/pxa/start.S |2 +-
  4 files changed, 4 insertions(+), 4 deletions(-)

 diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
 index eba2324..7b9db2b 100644
 --- a/arch/arm/cpu/arm1136/start.S
 +++ b/arch/arm/cpu/arm1136/start.S
 @@ -392,7 +392,7 @@ cpu_init_crit:
  str r0, [r13]   @ save R0's value.
  ldr r0, IRQ_STACK_START_IN  @ get data regions start
  str lr, [r0]@ save caller lr in position 0 
 of saved stack
 -mrs r0, spsr@ get the spsr
 +mrs lr, spsr@ get the spsr
  str lr, [r0, #4]@ save spsr in position 1 of 
 saved stack
  ldr r0, [r13]   @ restore r0
  add r13, r13, #4@ pop stack entry
 
 Sorry for not checking this in V1, but I see that get_bad_stack_swi does
 not preserve lr, so when bad_save_user_regs is expanded, it will save
 the wrong value for lr. You need to restore lr from [r0] before you
 restore r0 from [r13].

Thank you, I was not aware that.
The dumped lr value was wrong.
I am going to post V3 patch for all 4 files.

 
 diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
 
 diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
 
 diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
 
 Ditto for all four files, of course.
 
 Amicalement,
 

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[U-Boot] [PATCH v3] BUGFIX: arm: data abort in get_bad_stack_swi

[Tetsuyuki Kobayashi]

When swi instruction is executed, it is expected to get message
software interrupt in console and dump registers and reboot, as
do_software_interrupt() in arch/arm/lib/interrupts.c.
But, actually it causes data abort accessing wrong address in get_bad_stack_swi
macro in arch/arm/cpu/v7/start.S.
This patch fixes this problem.

The same mistake in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- added arch/arm/cpu/{arm1136,arm1176,pxa}/start.S
Changes for v3:
- restore lr register in all 4 files.
  Only arm/arm/cpu/armv7/start.S is tested on KZM-A9-GT board.

 arch/arm/cpu/arm1136/start.S |3 ++-
 arch/arm/cpu/arm1176/start.S |4 +++-
 arch/arm/cpu/armv7/start.S   |3 ++-
 arch/arm/cpu/pxa/start.S |3 ++-
 4 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index eba2324..bccfdbf 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -392,8 +392,9 @@ cpu_init_crit:
str r0, [r13]   @ save R0's value.
ldr r0, IRQ_STACK_START_IN  @ get data regions start
str lr, [r0]@ save caller lr in position 0 
of saved stack
-   mrs r0, spsr@ get the spsr
+   mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of 
saved stack
+   ldr lr, [r0]@ restore lr
ldr r0, [r13]   @ restore r0
add r13, r13, #4@ pop stack entry
.endm
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 3c291fb..694f79d 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -480,9 +480,11 @@ phy_last_jump:
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */
-   mrs r0, spsr
+   mrs lr, spsr
/* save spsr in position 1 of saved stack */
str lr, [r0, #4]
+   /* restore lr */
+   ldr lr, [r0]
/* restore r0 */
ldr r0, [r13]
/* pop stack entry */
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 36a4c3c..e5e157b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -465,9 +465,10 @@ ENDPROC(cpu_init_crit)
@ spots for abort stack
str lr, [r0]@ save caller lr in position 0
@ of saved stack
-   mrs r0, spsr@ get the spsr
+   mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of
@ saved stack
+   ldr lr, [r0]@ restore lr
ldr r0, [r13]   @ restore r0
add r13, r13, #4@ pop stack entry
.endm
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 456a783..9c525e8 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -387,8 +387,9 @@ cpu_init_crit:
str r0, [r13]   @ save R0's value.
ldr r0, IRQ_STACK_START_IN  @ get data regions start
str lr, [r0]@ save caller lr in position 0 
of saved stack
-   mrs r0, spsr@ get the spsr
+   mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of 
saved stack
+   ldr lr, [r0]@ restore lr
ldr r0, [r13]   @ restore r0
add r13, r13, #4@ pop stack entry
.endm
-- 
1.7.9.5

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Re: [U-Boot] [PATCH] BUGFIX: arm: armv7: data abort in get_bad_stack_swi

[Tetsuyuki Kobayashi]

(04/04/2013 03:24 PM), Albert ARIBAUD wrote:
 The can you please submit a V2 patch fixing all four of them?
 
 s/The/Then/ (and s//coffee, too)
 
 Amicalement,
 
OK. I will do it tomorrow.

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[U-Boot] [PATCH v2] BUGFIX: arm: data abort in get_bad_stack_swi

[Tetsuyuki Kobayashi]

When swi instruction is executed, it is expected to get message
software interrupt in console and dump registers and reboot, as
do_software_interrupt() in arch/arm/lib/interrupts.c.
But, actually it causes data abort accessing wrong address in get_bad_stack_swi
macro in arch/arm/cpu/v7/start.S.
This patch fixes this problem.

The same mistake in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- added arch/arm/cpu/{arm1136,arm1176,pxa}/start.S
  (But not tested, because I don't have test boards of them)
  arm/arm/cpu/armv7/start.S is tested on KZM-A9-GT board.

 arch/arm/cpu/arm1136/start.S |2 +-
 arch/arm/cpu/arm1176/start.S |2 +-
 arch/arm/cpu/armv7/start.S   |2 +-
 arch/arm/cpu/pxa/start.S |2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index eba2324..7b9db2b 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -392,7 +392,7 @@ cpu_init_crit:
str r0, [r13]   @ save R0's value.
ldr r0, IRQ_STACK_START_IN  @ get data regions start
str lr, [r0]@ save caller lr in position 0 
of saved stack
-   mrs r0, spsr@ get the spsr
+   mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of 
saved stack
ldr r0, [r13]   @ restore r0
add r13, r13, #4@ pop stack entry
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 3c291fb..8534fb8 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -480,7 +480,7 @@ phy_last_jump:
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */
-   mrs r0, spsr
+   mrs lr, spsr
/* save spsr in position 1 of saved stack */
str lr, [r0, #4]
/* restore r0 */
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 36a4c3c..9bf950b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -465,7 +465,7 @@ ENDPROC(cpu_init_crit)
@ spots for abort stack
str lr, [r0]@ save caller lr in position 0
@ of saved stack
-   mrs r0, spsr@ get the spsr
+   mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of
@ saved stack
ldr r0, [r13]   @ restore r0
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 456a783..18131bb 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -387,7 +387,7 @@ cpu_init_crit:
str r0, [r13]   @ save R0's value.
ldr r0, IRQ_STACK_START_IN  @ get data regions start
str lr, [r0]@ save caller lr in position 0 
of saved stack
-   mrs r0, spsr@ get the spsr
+   mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of 
saved stack
ldr r0, [r13]   @ restore r0
add r13, r13, #4@ pop stack entry
-- 
1.7.9.5

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[U-Boot] [PATCH] BUGFIX: arm: armv7: data abort in get_bad_stack_swi

[Tetsuyuki Kobayashi]

When swi instruction is executed, it is expected to get message
software interrupt in console and dump registers and reboot, as
do_software_interrupt() in arch/arm/lib/interrupts.c.
Actually it causes data abort in get_bad_stack_swi macro in
arch/arm/cpu/v7/start.S.
This patch fixes this problem.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Hello, I found this bug on KZM-A9-GT board (aka. kzm9g) on
v2013.04-rc2. And tested this patch on the board.
I found the same typo in arch/arm/cpu/{arm1136,arm1176,pxa}/start.S.

 arch/arm/cpu/armv7/start.S |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 36a4c3c..9bf950b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -465,7 +465,7 @@ ENDPROC(cpu_init_crit)
@ spots for abort stack
str lr, [r0]@ save caller lr in position 0
@ of saved stack
-   mrs r0, spsr@ get the spsr
+   mrs lr, spsr@ get the spsr
str lr, [r0, #4]@ save spsr in position 1 of
@ saved stack
ldr r0, [r13]   @ restore r0
-- 
1.7.9.5

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Re: [U-Boot] [PATCH] arm: bugfix: Move vector table before jumping relocated code

[Tetsuyuki Kobayashi]

Hello, Joel

(2012/12/22 0:17), Joel A Fernandes wrote:

Hi Tesuyuki and friends,

I had a question with this patch.

On Wed, Jun 27, 2012 at 8:27 PM, Tetsuyuki Kobayashi k...@kmckk.co.jp wrote:

This patch moves vector table before jumping relocated code.

Signed-off-by: Tetsuyuki Kobayashik...@kmckk.co.jp
---
   arch/arm/cpu/armv7/start.S |   12 
   1 file changed, 12 insertions(+)

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 52f7f6e..5098f7b 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -277,6 +277,18 @@ jump_2_ram:
 mcr p15, 0, r0, c7, c10, 4  @ DSB
 mcr p15, 0, r0, c7, c5, 4   @ ISB
   #endif
+/*
+ * Move vector table
+ */
+#if !defined(CONFIG_TEGRA2)
+#if !(defined(CONFIG_OMAP44XX)  defined(CONFIG_SPL_BUILD))

+   /* Set vector address in CP15 VBAR register */
+   ldr r0, =_start
+   add r0, r0, r9
+   mcr p15, 0, r0, c12, c0, 0  @Set VBAR
+#endif


Why is c12 (VBAR) setup only for SPL builds? Because main u-boot does
relocation too, shouldn't we setup c12 to point to new table addr
after relocation?


You may mis-understand. ! means NOT.



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[U-Boot] [PATCH 0/2] arm: rmobile: kzm9g: Adjust initial hardware setting

[Tetsuyuki Kobayashi]

Hello Albert,

After long term test for KZM-A9-GT board (aka. kzm9g), I found some adjustment
for initial hardware setting.
I hope this patch set merged to v2013.01 release.


Tetsuyuki Kobayashi (2):
  arm: rmobile: kzm9g: Adjust SDRAM setting
  arm: rmobile: kzm9g: Adjust ETM trace clock

 board/kmc/kzm9g/kzm9g.c |   19 +++
 1 file changed, 15 insertions(+), 4 deletions(-)

-- 
1.7.9.5

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[U-Boot] [PATCH 1/2] arm: rmobile: kzm9g: Adjust SDRAM setting

[Tetsuyuki Kobayashi]

After stress test, I found some of kzm9g board occures memory failure.
This patch adust SDRAM setting.
- Enlarge drivability on both SDRAM controller and SDRAM itself
- Raise core voltage

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 board/kmc/kzm9g/kzm9g.c |   17 ++---
 1 file changed, 14 insertions(+), 3 deletions(-)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 54f25e0..1aeb5fe 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -84,7 +84,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
writel(0x0017040a, sbsc-sdwcr01);
writel(0x31020707, sbsc-sdwcr10);
writel(0x0017040a, sbsc-sdwcr11);
-   writel(0x0555, sbsc-sddrvcr0);
+   writel(0x07ff, sbsc-sddrvcr0); /* Enlarge drivability of 
LPDQS0-3, LPCLK */
writel(0x3000, sbsc-sdwcr2);
 
writel(readl(sbsc-sdpcr) | 0x80, sbsc-sdpcr);
@@ -112,7 +112,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
writel(0x0, SDMRA1A);
writel(0x0402, sbsc-sdmracr0);
writel(0x0, SDMRA1A);
-   writel(0x0403, sbsc-sdmracr0);
+   writel(0x0203, sbsc-sdmracr0); /* MR3 register DS=2 */
writel(0x0, SDMRA1A);
writel(0x0, SDMRA2A);
} else {
@@ -120,7 +120,7 @@ static void sbsc_init(struct sh73a0_sbsc *sbsc)
writel(0x0, SDMRA1B);
writel(0x0402, sbsc-sdmracr0);
writel(0x0, SDMRA1B);
-   writel(0x0403, sbsc-sdmracr0);
+   writel(0x0203, sbsc-sdmracr0); /* MR3 register DS=2 */
writel(0x0, SDMRA1B);
writel(0x0, SDMRA2B);
}
@@ -301,8 +301,19 @@ int board_early_init_f(void)
return 0;
 }
 
+void adjust_core_voltage(void)
+{
+   u8 data;
+
+   i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+   data = 0x35;
+   i2c_set_bus_num(0);
+   i2c_write(0x40, 3, 1, data, 1);
+}
+
 int board_init(void)
 {
+   adjust_core_voltage();
sh73a0_pinmux_init();
 
 /* SCIFA 4 */
-- 
1.7.9.5

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[U-Boot] [PATCH 2/2] arm: rmobile: kzm9g: Adjust ETM trace clock

[Tetsuyuki Kobayashi]

Set ETM TRCLK down to 78MHz to get clear wave form.
This patch makes difference only when you use ETM trace connecting JTAG 
debugger.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 board/kmc/kzm9g/kzm9g.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 1aeb5fe..0d895c2 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -195,7 +195,7 @@ void s_init(void)
 
/* FRQCR Init */
writel(0x0012453C, cpg-frqcra);
-   writel(0x80331350, cpg-frqcrb);
+   writel(0x80431350, cpg-frqcrb);/* ETM TRCLK  78MHz */
cmp_loop(cpg-frqcrb, 0x8000, 0x0);
writel(0x0B0B, cpg-frqcrd);
cmp_loop(cpg-frqcrd, 0x8000, 0x0);
-- 
1.7.9.5

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[U-Boot] [PATCH 0/2] [RFC] DEBUG: relocate to fixed address

[Tetsuyuki Kobayashi]

Hello,

U-Boot from NOR flash relocates itself to RAM erea. The relocation address is
calaculated at runtime to get maxium contiguous space to load kernel. So it may
vary after code changed. In the early debug phase it would be easier to handle
if the relocation address does not change per build.

My idea is define fixed address as CONFIG_DEBUG_RELOC_FIX_ADDR in config file
and relocate to the address. Then you don't need to execute 'bdinfo' command to
get actual relocated address. It is done by the first patch.

The second patch is for u-boot_r, which is linked for fixed relocation address.
When you want to symbolic debug after relocation, flash 'u-boot.bin' and
load symbol from 'u-boot_r' to debugger.
(CF. When you want to symblic debug before relocation, load symbol from 'u-boot'
 to debugger.)

This patch set is based on v2013.01-rc1. (Tell me if I should rebase.)
This is for ARM, but similar change could apply for other arch.


Tetsuyuki Kobayashi (2):
  DEBUG: fix relocation address
  DEBUG: make u-boot_r which is linked for fixed relocation address

 Makefile|7 +--
 arch/arm/lib/board.c|9 -
 config.mk   |5 +
 include/configs/kzm9g.h |4 
 4 files changed, 22 insertions(+), 3 deletions(-)

-- 
1.7.9.5

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[U-Boot] [PATCH 1/2] DEBUG: fix relocation address

[Tetsuyuki Kobayashi]

U-Boot from NOR flash relocates itself to RAM erea. The relocation address is
calaculated at runtime to get maxium contiguous space to load kernel. So it may
vary after code changed. In the early debug phase it would be easier to handle
if the relocation address does not change.
This patch sets relocation address to fixed address specified by
CONFIG_DEBUG_RELOC_FIX_ADDR. If there is no enough space after
CONFIG_DEBUG_RELOC_FIX_ADDR, it is ignored.
patch to kzm9g.h is a example. CONFIG_DEBUG_RELOC_FIX_ADDR should be defined at
each config file.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 arch/arm/lib/board.c|9 -
 include/configs/kzm9g.h |4 
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 92cad9a..340aa6e 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -377,7 +377,14 @@ void board_init_f(ulong bootflag)
addr = ~(4096 - 1);
 
debug(Reserving %ldk for U-Boot at: %08lx\n, gd-mon_len  10, addr);
-
+#ifdef CONFIG_DEBUG_RELOC_FIX_ADDR
+   if (addr = CONFIG_DEBUG_RELOC_FIX_ADDR) {
+   addr = CONFIG_DEBUG_RELOC_FIX_ADDR;
+   debug(Fixing relocation address to %08lx\n, addr);
+   } else {
+   debug(CONFIG_DEBUG_RELOC_FIX_ADDR is ignored. It should be 
less than %08lx\n, addr);
+   }
+#endif
 #ifndef CONFIG_SPL_BUILD
/*
 * reserve memory for malloc() arena
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 4898fb6..f96ea3e 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -23,6 +23,10 @@
 
 #undef DEBUG
 
+/* Uncomment this to relocate to fixed address */
+/*#define CONFIG_DEBUG_RELOC_FIX_ADDR 0x5f80 */
+
+
 #define CONFIG_RMOBILE
 #define CONFIG_SH73A0
 #define CONFIG_KZM_A9_GT
-- 
1.7.9.5

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[U-Boot] [PATCH 2/2] DEBUG: make u-boot_r which is linked for fixed relocation address

[Tetsuyuki Kobayashi]

If CONFIG_DEBUG_RELOC_FIX_ADDR is defined, make u-boot_r.
u-boot_r is ELF file which is linked for fixed relocation address specified by
CONFIG_DEBUG_RELOC_FIX_ADDR. Feed this file to debugger to get relocated symbol
addresses.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 Makefile  |7 +--
 config.mk |5 +
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index bc15209..56d87cd 100644
--- a/Makefile
+++ b/Makefile
@@ -405,6 +405,9 @@ ALL-$(CONFIG_NAND_U_BOOT) += $(obj)u-boot-nand.bin
 ALL-$(CONFIG_ONENAND_U_BOOT) += $(obj)u-boot-onenand.bin
 ALL-$(CONFIG_SPL) += $(obj)spl/u-boot-spl.bin
 ALL-$(CONFIG_OF_SEPARATE) += $(obj)u-boot.dtb $(obj)u-boot-dtb.bin
+ifneq ($(CONFIG_DEBUG_RELOC_FIX_ADDR),)
+ALL-y += $(obj)u-boot_r
+endif
 
 # enable combined SPL/u-boot/dtb rules for tegra
 ifeq ($(SOC),tegra20)
@@ -540,10 +543,10 @@ GEN_UBOOT = \
cd $(LNDIR)  $(LD) $(LDFLAGS) $(LDFLAGS_$(@F)) \
$$UNDEF_LST $(__OBJS) \
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-   -Map u-boot.map -o u-boot
+   -Map u-boot.map -o $(notdir $@)
 endif
 
-$(obj)u-boot:  depend \
+$(obj)u-boot $(obj)u-boot_r:   depend \
$(SUBDIR_TOOLS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) 
$(obj)u-boot.lds
$(GEN_UBOOT)
 ifeq ($(CONFIG_KALLSYMS),y)
diff --git a/config.mk b/config.mk
index b7cd481..99b3b11 100644
--- a/config.mk
+++ b/config.mk
@@ -269,9 +269,14 @@ LDFLAGS += $(PLATFORM_LDFLAGS)
 LDFLAGS_FINAL += -Bstatic
 
 LDFLAGS_u-boot += -T $(obj)u-boot.lds $(LDFLAGS_FINAL)
+LDFLAGS_u-boot_r := $(LDFLAGS_u-boot)
+
 ifneq ($(CONFIG_SYS_TEXT_BASE),)
 LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
 endif
+ifneq ($(CONFIG_DEBUG_RELOC_FIX_ADDR),)
+LDFLAGS_u-boot_r += -Ttext $(CONFIG_DEBUG_RELOC_FIX_ADDR)
+endif
 
 LDFLAGS_u-boot-spl += -T $(obj)u-boot-spl.lds $(LDFLAGS_FINAL)
 ifneq ($(CONFIG_SPL_TEXT_BASE),)
-- 
1.7.9.5

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[U-Boot] [PATCH] serial: serial_sh: bugfix: autoboot fails if serial console is not connected

[Tetsuyuki Kobayashi]

On kzm9g board (rmobile SoC), autoboot fails if serial console cable is not
connected.  When serial cable is not connected, serial error occurs and
some garbage comes in data register.
sh_serial_tstc() in serial_sh.c does not check error status and misunderstand
there is some input data.  It is the reason that autoboot fails.
This patch adds checking error status in sh_serial_tstc().

This patch is based on v2013.01-rc1 tag of u-boot master git.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Hello Iwamatsu-san,

I checked this patch only on kzm9g board. Other SH or rmobile SoC might
have the same problem.

 drivers/serial/serial_sh.c |   20 +---
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index 3c931d0..ee1f2d7 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -117,6 +117,14 @@ static int serial_rx_fifo_level(void)
return scif_rxfill(sh_sci);
 }
 
+static void handle_error(void)
+{
+   sci_in(sh_sci, SCxSR);
+   sci_out(sh_sci, SCxSR, SCxSR_ERROR_CLEAR(sh_sci));
+   sci_in(sh_sci, SCLSR);
+   sci_out(sh_sci, SCLSR, 0x00);
+}
+
 void serial_raw_putc(const char c)
 {
while (1) {
@@ -138,16 +146,14 @@ static void sh_serial_putc(const char c)
 
 static int sh_serial_tstc(void)
 {
+   if (sci_in(sh_sci, SCxSR)  SCIF_ERRORS) {
+   handle_error();
+   return 0;
+   }
+
return serial_rx_fifo_level() ? 1 : 0;
 }
 
-void handle_error(void)
-{
-   sci_in(sh_sci, SCxSR);
-   sci_out(sh_sci, SCxSR, SCxSR_ERROR_CLEAR(sh_sci));
-   sci_in(sh_sci, SCLSR);
-   sci_out(sh_sci, SCLSR, 0x00);
-}
 
 int serial_getc_check(void)
 {
-- 
1.7.9.5

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[U-Boot] [PATCH] arm: rmobile: bugfix: wrong register saving in lowlevel_init

[Tetsuyuki Kobayashi]

lowlevel_init() of rmobile badly assumed that ip register holds return address.
The commit 63ee53a7 armv7 cpu_init_crit: Simplify code breaks this assumption.
This patch removes this bad assumption and simplify code.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Hello, Albert
Hello, Tom
Thank you for merging my patches.

I checked current u-boot-master and found kzm9g board fails to boot because bug.
This bugfix patch solves it.
I think 2012.10 release should have this bugfix.

Iwamatsu-san, could you double check this patch?


 arch/arm/cpu/armv7/rmobile/lowlevel_init.S |   12 +---
 1 file changed, 1 insertion(+), 11 deletions(-)

diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init.S 
b/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
index 1bd391e..4fdca06 100644
--- a/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
@@ -76,17 +76,7 @@ loop0:
bne  loop0
 
ldr sp, MERAM_STACK
-
-   str ip, [sp]/* stash old link register */
-   mov ip, lr  /* save link reg across call */
-
-   bl  s_init
-
-   ldr ip, [sp]/* restore save ip */
-   mov lr, ip  /* restore link reg */
-
-   /* back to arch calling code */
-   mov pc, lr
+   b s_init
 
.pool
.align 4
-- 
1.7.9.5

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Re: [U-Boot] [RESEND PATCH v2 0/9] i2c for R-mobile

[Tetsuyuki Kobayashi]

Iwamatu-san,
Thank you for review.

(2012/09/13 14:26), Nobuhiro Iwamatsu wrote:

Hi,

Thank you for this work.
If you have a time, could you update sh_i2c using set/clrbits functions?
these functions  is included in asm/io.h.

For example, you can change from
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
to
clrbits_8(base-iccr, SH_I2C_ICCR_ICE);


OK. I will try it.

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[U-Boot] [PATCH v3 00/10] i2c for R-mobile

[Tetsuyuki Kobayashi]

Hi, Iwamatsu-san
Hello, Heiko

Iwamatu-san, thank you for review. This is v3 patch for sh_i2c.
Changes for v3:
 - call i2c_finish before returning i2c_probe, i2c_read, i2c_write even if 
error occured. Without this, it fails to boot Linux kernel after using i2c 
probe command.
 - use setbits/clrbits macro as Iwamatsu-san pointed.

Please check patch 5,6 and 10. The rest is not changed.

This patch set is based on arm/rmobile branch of u-boot-sh.git.


Tetsuyuki Kobayashi (10):
  i2c: sh_i2c.c: support iccl and icch extension
  i2c: sh_i2c.c: correct BUSY bit define in ICSR
  i2c: sh_i2c.c: adjust for SH73A0
  i2c: sh_i2c.c: support I2C2, I2C3 and I2C4
  i2c: sh_i2c: enable i2c_probe
  i2c: sh_i2c.c: check error in i2c_read and i2c_write
  i2c: sh_i2c.c: remove unused function
  arm: rmobile: kzm9g: enable I2C1
  arm: rmobile: kzm9g: enable I2C2
  i2c: sh_i2c: use setbits/clrbits macro

 board/kmc/kzm9g/kzm9g.c |7 ++-
 drivers/i2c/sh_i2c.c|  139 ---
 include/configs/kzm9g.h |8 ++-
 3 files changed, 107 insertions(+), 47 deletions(-)

-- 
1.7.9.5

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[U-Boot] [PATCH v3 01/10] i2c: sh_i2c.c: support iccl and icch extension

[Tetsuyuki Kobayashi]

R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and 
icch.
This patch add support for the extentin bits.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - define CONFIG_SH_I2C_8BIT at board config file and replace HAS_ICIC67.
Changes for v3:
 - none

 drivers/i2c/sh_i2c.c|   30 ++
 include/configs/kzm9g.h |1 +
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index fd8cb92..b98fce5 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -48,7 +48,13 @@ static struct sh_i2c *base;
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
 
-static u8 iccl, icch;
+#ifdef CONFIG_SH_I2C_8BIT
+/* store 8th bit of iccl and icch in ICIC register */
+#define SH_I2C_ICIC_ICCLB8 (1  7)
+#define SH_I2C_ICIC_ICCHB8 (1  6)
+#endif
+
+static u16 iccl, icch;
 
 #define IRQ_WAIT 1000
 
@@ -92,12 +98,20 @@ static void irq_busy(struct sh_i2c *base)
 
 static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
+   u8 icic = 0;
+
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
 
-   writeb(iccl, base-iccl);
-   writeb(icch, base-icch);
-   writeb(0, base-icic);
+   writeb(iccl  0xff, base-iccl);
+   writeb(icch  0xff, base-icch);
+#ifdef CONFIG_SH_I2C_8BIT
+   if (iccl  0xff)
+   icic |= SH_I2C_ICIC_ICCLB8;
+   if (icch  0xff)
+   icic |= SH_I2C_ICIC_ICCHB8;
+#endif
+   writeb(icic, base-icic);
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
@@ -222,18 +236,18 @@ void i2c_init(int speed, int slaveaddr)
denom = speed * (CONFIG_SH_I2C_DATA_HIGH + CONFIG_SH_I2C_DATA_LOW);
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   iccl = (u8)((num/denom) + 1);
+   iccl = (u16)((num/denom) + 1);
else
-   iccl = (u8)(num/denom);
+   iccl = (u16)(num/denom);
 
/* Calculate the value for icch. From the data sheet:
   icch = (p clock / transfer rate) * (H / (L + H)) */
num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_HIGH;
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   icch = (u8)((num/denom) + 1);
+   icch = (u16)((num/denom) + 1);
else
-   icch = (u8)(num/denom);
+   icch = (u16)(num/denom);
 }
 
 /*
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index a1ae718..8877516 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -155,6 +155,7 @@
 /* I2C */
 #define CONFIG_CMD_I2C
 #define CONFIG_SH_I2C 1
+#define CONFIG_SH_I2C_8BIT
 #define CONFIG_HARD_I2C
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_MAX_I2C_BUS  (2)
-- 
1.7.9.5

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[U-Boot] [PATCH v3 02/10] i2c: sh_i2c.c: correct BUSY bit define in ICSR

[Tetsuyuki Kobayashi]

Correct BUSY bit define in ICSR from (13) to (14).

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - none
Changes for v3:
 - none

 drivers/i2c/sh_i2c.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index b98fce5..03dfa7a 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -43,7 +43,7 @@ static struct sh_i2c *base;
 #define SH_I2C_ICCR_SCP(1  0)
 
 /* ICSR / ICIC */
-#define SH_IC_BUSY (1  3)
+#define SH_IC_BUSY (1  4)
 #define SH_IC_TACK (1  2)
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
-- 
1.7.9.5

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[U-Boot] [PATCH v3 03/10] i2c: sh_i2c.c: adjust for SH73A0

[Tetsuyuki Kobayashi]

Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, i2c md and i2c mw command on U-Boot work properly on 
KZM-A9-GT board.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - none
Changes for v3:
 - none

 drivers/i2c/sh_i2c.c|4 
 include/configs/kzm9g.h |2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 03dfa7a..6c6a141 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -151,8 +151,12 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
u8 ret;
 
+#if defined(CONFIG_SH73A0)
+   i2c_set_addr(base, id, reg, 0);
+#else
i2c_set_addr(base, id, reg, 1);
udelay(100);
+#endif
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 8877516..abeab69 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -164,7 +164,7 @@
 #define CONFIG_SYS_I2C_SLAVE(0x7F)
 #define CONFIG_SH_I2C_DATA_HIGH (4)
 #define CONFIG_SH_I2C_DATA_LOW  (5)
-#define CONFIG_SH_I2C_CLOCK (4166)
+#define CONFIG_SH_I2C_CLOCK (10400) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0 (0xE682)
 #define CONFIG_SH_I2C_BASE1 (0xE6822000)
 
-- 
1.7.9.5

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[U-Boot] [PATCH v3 04/10] i2c: sh_i2c.c: support I2C2, I2C3 and I2C4

[Tetsuyuki Kobayashi]

sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new
Changes for v3:
 - none

 drivers/i2c/sh_i2c.c|   15 +++
 include/configs/kzm9g.h |5 -
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 6c6a141..d524619 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -200,6 +200,21 @@ int i2c_set_bus_num(unsigned int bus)
case 1:
base = (void *)CONFIG_SH_I2C_BASE1;
break;
+#ifdef CONFIG_SH_I2C_BASE2
+   case 2:
+   base = (void *)CONFIG_SH_I2C_BASE2;
+   break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE3
+   case 3:
+   base = (void *)CONFIG_SH_I2C_BASE3;
+   break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE4
+   case 4:
+   base = (void *)CONFIG_SH_I2C_BASE4;
+   break;
+#endif
default:
return -1;
}
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index abeab69..6a0b6c5 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -158,7 +158,7 @@
 #define CONFIG_SH_I2C_8BIT
 #define CONFIG_HARD_I2C
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS  (2)
+#define CONFIG_SYS_MAX_I2C_BUS  (5)
 #define CONFIG_SYS_I2C_MODULE
 #define CONFIG_SYS_I2C_SPEED(10) /* 100 kHz */
 #define CONFIG_SYS_I2C_SLAVE(0x7F)
@@ -167,5 +167,8 @@
 #define CONFIG_SH_I2C_CLOCK (10400) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0 (0xE682)
 #define CONFIG_SH_I2C_BASE1 (0xE6822000)
+#define CONFIG_SH_I2C_BASE2 (0xE6824000)
+#define CONFIG_SH_I2C_BASE3 (0xE6826000)
+#define CONFIG_SH_I2C_BASE4 (0xE6828000)
 
 #endif /* __KZM9G_H */
-- 
1.7.9.5

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[U-Boot] [PATCH v3 05/10] i2c: sh_i2c: enable i2c_probe

[Tetsuyuki Kobayashi]

Before this patch i2c_probe() always returned 0 and i2c probe command did not 
work properly.

Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call 
this function.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new
Changes for v3:
 - call i2c_finish before returning i2c_probe.

 drivers/i2c/sh_i2c.c |   32 +++-
 1 file changed, 27 insertions(+), 5 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index d524619..1f5104c 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -85,6 +85,20 @@ static void irq_dte(struct sh_i2c *base)
}
 }
 
+static int irq_dte_with_tack(struct sh_i2c *base)
+{
+   int i;
+
+   for (i = 0 ; i  IRQ_WAIT ; i++) {
+   if (SH_IC_DTE  readb(base-icsr))
+   break;
+   if (SH_IC_TACK  readb(base-icsr))
+   return -1;
+   udelay(10);
+   }
+   return 0;
+}
+
 static void irq_busy(struct sh_i2c *base)
 {
int i;
@@ -96,9 +110,9 @@ static void irq_busy(struct sh_i2c *base)
}
 }
 
-static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
+static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
-   u8 icic = 0;
+   u8 icic = SH_IC_TACK;
 
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
@@ -116,14 +130,18 @@ static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 
reg, int stop)
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
 
+   writeb(readb(base-icsr)  ~SH_IC_TACK, base-icsr);
writeb(id  1, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
writeb(reg, base-icdr);
if (stop)
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS), base-iccr);
 
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
+   return 0;
 }
 
 static void i2c_finish(struct sh_i2c *base)
@@ -321,5 +339,9 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int 
len)
  */
 int i2c_probe(u8 chip)
 {
-   return 0;
+   int ret;
+
+   ret = i2c_set_addr(base, chip, 0, 1);
+   i2c_finish(base);
+   return ret;
 }
-- 
1.7.9.5

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[U-Boot] [PATCH v3 06/10] i2c: sh_i2c.c: check error in i2c_read and i2c_write

[Tetsuyuki Kobayashi]

Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero 
when error.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new
Changes for v3:
 - call i2c_finsih before returning i2c_{read,write} even if error occured.

 drivers/i2c/sh_i2c.c |   50 --
 1 file changed, 32 insertions(+), 18 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 1f5104c..6a5ecba 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -150,29 +150,37 @@ static void i2c_finish(struct sh_i2c *base)
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
 }
 
-static void i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
+static int i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
 {
-   i2c_set_addr(base, id, reg, 0);
+   int ret = -1;
+   if (i2c_set_addr(base, id, reg, 0) != 0)
+   goto exit0;
udelay(10);
 
writeb(val, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   goto exit0;
 
writeb((SH_I2C_ICCR_ICE | SH_I2C_ICCR_RTS), base-iccr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   goto exit0;
irq_busy(base);
-
+   ret = 0;
+exit0:
i2c_finish(base);
+   return ret;
 }
 
-static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
+static int i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
-   u8 ret;
+   int ret = -1;
 
 #if defined(CONFIG_SH73A0)
-   i2c_set_addr(base, id, reg, 0);
+   if (i2c_set_addr(base, id, reg, 0) != 0)
+   goto exit0;
 #else
-   i2c_set_addr(base, id, reg, 1);
+   if (i2c_set_addr(base, id, reg, 1) != 0)
+   goto exit0;
udelay(100);
 #endif
 
@@ -180,17 +188,19 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
irq_dte(base);
 
writeb(id  1 | 0x01, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   goto exit0;
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), base-iccr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   goto exit0;
 
-   ret = readb(base-icdr);
+   ret = readb(base-icdr)  0xff;
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RACK), base-iccr);
readb(base-icdr); /* Dummy read */
irq_busy(base);
-
+exit0:
i2c_finish(base);
 
return ret;
@@ -302,10 +312,14 @@ void i2c_init(int speed, int slaveaddr)
  */
 int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 {
+   int ret;
int i = 0;
-   for (i = 0 ; i  len ; i++)
-   buffer[i] = i2c_raw_read(base, chip, addr + i);
-
+   for (i = 0 ; i  len ; i++) {
+   ret = i2c_raw_read(base, chip, addr + i);
+   if (ret  0)
+   return -1;
+   buffer[i] = ret  0xff;
+   }
return 0;
 }
 
@@ -326,8 +340,8 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int 
len)
 {
int i = 0;
for (i = 0; i  len ; i++)
-   i2c_raw_write(base, chip, addr + i, buffer[i]);
-
+   if (i2c_raw_write(base, chip, addr + i, buffer[i]) != 0)
+   return -1;
return 0;
 }
 
-- 
1.7.9.5

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[U-Boot] [PATCH v3 07/10] i2c: sh_i2c.c: remove unused function

[Tetsuyuki Kobayashi]

irq_wait() was not used. So removed it to elminate compiler warnings.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new
Changes for v3:
 - none

 drivers/i2c/sh_i2c.c |   16 
 1 file changed, 16 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 6a5ecba..afcb503 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -58,22 +58,6 @@ static u16 iccl, icch;
 
 #define IRQ_WAIT 1000
 
-static void irq_wait(struct sh_i2c *base)
-{
-   int i;
-   u8 status;
-
-   for (i = 0 ; i  IRQ_WAIT ; i++) {
-   status = readb(base-icsr);
-   if (SH_IC_WAIT  status)
-   break;
-
-   udelay(10);
-   }
-
-   writeb(status  ~SH_IC_WAIT, base-icsr);
-}
-
 static void irq_dte(struct sh_i2c *base)
 {
int i;
-- 
1.7.9.5

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[U-Boot] [PATCH v3 08/10] arm: rmobile: kzm9g: enable I2C1

[Tetsuyuki Kobayashi]

Supply clock to I2C1 and release resetting.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new
Changes for v3:
 - none

 board/kmc/kzm9g/kzm9g.c |5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 0679be6..93ca9d7 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -43,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SMSTPCR1_CMT0  (1  24)
 #define SMSTPCR1_I2C0  (1  16)
 #define SMSTPCR3_USB   (1  22)
+#define SMSTPCR3_I2C1  (1  23)
 
 #define PORT32CR (0xE6051020)
 #define PORT33CR (0xE6051021)
@@ -300,8 +301,8 @@ int board_early_init_f(void)
 
clrbits_le32(cpg-smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
clrbits_le32(cpg_srcr-srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
-   clrbits_le32(cpg-smstpcr3, SMSTPCR3_USB);
-   clrbits_le32(cpg_srcr-srcr3, SMSTPCR3_USB);
+   clrbits_le32(cpg-smstpcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
+   clrbits_le32(cpg_srcr-srcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
writel(VCLKCR1_D, cpg-vclkcr1);
 
/* Setup SCIF4 / workaround */
-- 
1.7.9.5

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[U-Boot] [PATCH v3 09/10] arm: rmobile: kzm9g: enable I2C2

[Tetsuyuki Kobayashi]

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new
Changes for v3:
 - none

 board/kmc/kzm9g/kzm9g.c |2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 93ca9d7..22f581a 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -370,6 +370,8 @@ int board_init(void)
gpio_direction_output(GPIO_PORT15, 1);
 
/* I2C */
+   gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
+   gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);
gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);
 
-- 
1.7.9.5

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[U-Boot] [PATCH v3 10/10] i2c: sh_i2c: use setbits/clrbits macro

[Tetsuyuki Kobayashi]

Use setbits/clrbits macro when read-modify-write register.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v3:
 - new

 drivers/i2c/sh_i2c.c |8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index afcb503..44ba90e 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -98,8 +98,8 @@ static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, 
int stop)
 {
u8 icic = SH_IC_TACK;
 
-   writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
-   writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
+   clrbits_8(base-iccr, SH_I2C_ICCR_ICE);
+   setbits_8(base-iccr, SH_I2C_ICCR_ICE);
 
writeb(iccl  0xff, base-iccl);
writeb(icch  0xff, base-icch);
@@ -114,7 +114,7 @@ static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, 
int stop)
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
 
-   writeb(readb(base-icsr)  ~SH_IC_TACK, base-icsr);
+   clrbits_8(base-icsr, SH_IC_TACK);
writeb(id  1, base-icdr);
if (irq_dte_with_tack(base) != 0)
return -1;
@@ -131,7 +131,7 @@ static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, 
int stop)
 static void i2c_finish(struct sh_i2c *base)
 {
writeb(0, base-icsr);
-   writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
+   clrbits_8(base-iccr, SH_I2C_ICCR_ICE);
 }
 
 static int i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
-- 
1.7.9.5

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[U-Boot] [PATCH v2 1/9] i2c: sh_i2c.c: support iccl and icch extension

[Tetsuyuki Kobayashi]

R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and 
icch.
This patch add support for the extentin bits.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - define CONFIG_SH_I2C_8BIT at board config file and replace HAS_ICIC67.


 drivers/i2c/sh_i2c.c|   30 ++
 include/configs/kzm9g.h |1 +
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index fd8cb92..b98fce5 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -48,7 +48,13 @@ static struct sh_i2c *base;
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
 
-static u8 iccl, icch;
+#ifdef CONFIG_SH_I2C_8BIT
+/* store 8th bit of iccl and icch in ICIC register */
+#define SH_I2C_ICIC_ICCLB8 (1  7)
+#define SH_I2C_ICIC_ICCHB8 (1  6)
+#endif
+
+static u16 iccl, icch;
 
 #define IRQ_WAIT 1000
 
@@ -92,12 +98,20 @@ static void irq_busy(struct sh_i2c *base)
 
 static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
+   u8 icic = 0;
+
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
 
-   writeb(iccl, base-iccl);
-   writeb(icch, base-icch);
-   writeb(0, base-icic);
+   writeb(iccl  0xff, base-iccl);
+   writeb(icch  0xff, base-icch);
+#ifdef CONFIG_SH_I2C_8BIT
+   if (iccl  0xff)
+   icic |= SH_I2C_ICIC_ICCLB8;
+   if (icch  0xff)
+   icic |= SH_I2C_ICIC_ICCHB8;
+#endif
+   writeb(icic, base-icic);
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
@@ -222,18 +236,18 @@ void i2c_init(int speed, int slaveaddr)
denom = speed * (CONFIG_SH_I2C_DATA_HIGH + CONFIG_SH_I2C_DATA_LOW);
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   iccl = (u8)((num/denom) + 1);
+   iccl = (u16)((num/denom) + 1);
else
-   iccl = (u8)(num/denom);
+   iccl = (u16)(num/denom);
 
/* Calculate the value for icch. From the data sheet:
   icch = (p clock / transfer rate) * (H / (L + H)) */
num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_HIGH;
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   icch = (u8)((num/denom) + 1);
+   icch = (u16)((num/denom) + 1);
else
-   icch = (u8)(num/denom);
+   icch = (u16)(num/denom);
 }
 
 /*
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index a1ae718..8877516 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -155,6 +155,7 @@
 /* I2C */
 #define CONFIG_CMD_I2C
 #define CONFIG_SH_I2C 1
+#define CONFIG_SH_I2C_8BIT
 #define CONFIG_HARD_I2C
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_MAX_I2C_BUS  (2)
-- 
1.7.9.5

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[U-Boot] [PATCH v2 7/9] i2c: sh_i2c.c: remove unused function

[Tetsuyuki Kobayashi]

irq_wait() was not used. So removed it to elminate compiler warnings.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c |   16 
 1 file changed, 16 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index e3ee804..60bad52 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -58,22 +58,6 @@ static u16 iccl, icch;
 
 #define IRQ_WAIT 1000
 
-static void irq_wait(struct sh_i2c *base)
-{
-   int i;
-   u8 status;
-
-   for (i = 0 ; i  IRQ_WAIT ; i++) {
-   status = readb(base-icsr);
-   if (SH_IC_WAIT  status)
-   break;
-
-   udelay(10);
-   }
-
-   writeb(status  ~SH_IC_WAIT, base-icsr);
-}
-
 static void irq_dte(struct sh_i2c *base)
 {
int i;
-- 
1.7.9.5

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[U-Boot] [PATCH v2 9/9] arm: rmobile: kzm9g: enable I2C2

[Tetsuyuki Kobayashi]

Set gpio config for I2C2. 

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 board/kmc/kzm9g/kzm9g.c |2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 93ca9d7..22f581a 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -370,6 +370,8 @@ int board_init(void)
gpio_direction_output(GPIO_PORT15, 1);
 
/* I2C */
+   gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
+   gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);
gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);
 
-- 
1.7.9.5

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[U-Boot] [PATCH v2 4/9] i2c: sh_i2c.c: support I2C2, I2C3 and I2C4

[Tetsuyuki Kobayashi]

sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c|   15 +++
 include/configs/kzm9g.h |5 -
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 6c6a141..d524619 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -200,6 +200,21 @@ int i2c_set_bus_num(unsigned int bus)
case 1:
base = (void *)CONFIG_SH_I2C_BASE1;
break;
+#ifdef CONFIG_SH_I2C_BASE2
+   case 2:
+   base = (void *)CONFIG_SH_I2C_BASE2;
+   break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE3
+   case 3:
+   base = (void *)CONFIG_SH_I2C_BASE3;
+   break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE4
+   case 4:
+   base = (void *)CONFIG_SH_I2C_BASE4;
+   break;
+#endif
default:
return -1;
}
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index abeab69..6a0b6c5 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -158,7 +158,7 @@
 #define CONFIG_SH_I2C_8BIT
 #define CONFIG_HARD_I2C
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS  (2)
+#define CONFIG_SYS_MAX_I2C_BUS  (5)
 #define CONFIG_SYS_I2C_MODULE
 #define CONFIG_SYS_I2C_SPEED(10) /* 100 kHz */
 #define CONFIG_SYS_I2C_SLAVE(0x7F)
@@ -167,5 +167,8 @@
 #define CONFIG_SH_I2C_CLOCK (10400) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0 (0xE682)
 #define CONFIG_SH_I2C_BASE1 (0xE6822000)
+#define CONFIG_SH_I2C_BASE2 (0xE6824000)
+#define CONFIG_SH_I2C_BASE3 (0xE6826000)
+#define CONFIG_SH_I2C_BASE4 (0xE6828000)
 
 #endif /* __KZM9G_H */
-- 
1.7.9.5

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[U-Boot] [PATCH v2 0/9] i2c for R-mobile

[Tetsuyuki Kobayashi]

Hi, Iwamatsu-san
Hello, Heiko

Iwamatu-san, thank you for review. This is v2 patch for sh_i2c.
Now i2c dev and i2c probe also work properly on KZM-A9-GT board.
I think this modification is common for R-mobile, but I have SH73A0 document 
only. Iwamatu-san, please review this.

This patch set is based on arm/rmobile branch of u-boot-sh.git.

Tetsuyuki Kobayashi (9):
  i2c: sh_i2c.c: support iccl and icch extension
  i2c: sh_i2c.c: correct BUSY bit define in ICSR
  i2c: sh_i2c.c: adjust for SH73A0
  i2c: sh_i2c.c: support I2C2, I2C3 and I2C4
  i2c: sh_i2c: enable i2c_probe
  i2c: sh_i2c.c: check error in i2c_read and i2c_write
  i2c: sh_i2c.c: remove unused function
  arm: rmobile: kzm9g: enable I2C1
  arm: rmobile: kzm9g: enable I2C2

 board/kmc/kzm9g/kzm9g.c |7 ++-
 drivers/i2c/sh_i2c.c|  120 +--
 include/configs/kzm9g.h |8 +++-
 3 files changed, 95 insertions(+), 40 deletions(-)

-- 
1.7.9.5

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[U-Boot] [PATCH v2 6/9] i2c: sh_i2c.c: check error in i2c_read and i2c_write

[Tetsuyuki Kobayashi]

Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero 
when error.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c |   44 
 1 file changed, 28 insertions(+), 16 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 25dbc43..e3ee804 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -151,29 +151,35 @@ static void i2c_finish(struct sh_i2c *base)
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
 }
 
-static void i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
+static int i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
 {
-   i2c_set_addr(base, id, reg, 0);
+   if (i2c_set_addr(base, id, reg, 0) != 0)
+   return -1;
udelay(10);
 
writeb(val, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
writeb((SH_I2C_ICCR_ICE | SH_I2C_ICCR_RTS), base-iccr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
irq_busy(base);
 
i2c_finish(base);
+   return 0;
 }
 
-static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
+static int i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
-   u8 ret;
+   int ret;
 
 #if defined(CONFIG_SH73A0)
-   i2c_set_addr(base, id, reg, 0);
+   if (i2c_set_addr(base, id, reg, 0) != 0)
+   return -1;
 #else
-   i2c_set_addr(base, id, reg, 1);
+   if (i2c_set_addr(base, id, reg, 1) != 0)
+   return -1;
udelay(100);
 #endif
 
@@ -181,12 +187,14 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
irq_dte(base);
 
writeb(id  1 | 0x01, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), base-iccr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
-   ret = readb(base-icdr);
+   ret = readb(base-icdr)  0xff;
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RACK), base-iccr);
readb(base-icdr); /* Dummy read */
@@ -303,10 +311,14 @@ void i2c_init(int speed, int slaveaddr)
  */
 int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 {
+   int ret;
int i = 0;
-   for (i = 0 ; i  len ; i++)
-   buffer[i] = i2c_raw_read(base, chip, addr + i);
-
+   for (i = 0 ; i  len ; i++) {
+   ret = i2c_raw_read(base, chip, addr + i);
+   if (ret  0)
+   return -1;
+   buffer[i] = ret  0xff;
+   }
return 0;
 }
 
@@ -327,8 +339,8 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int 
len)
 {
int i = 0;
for (i = 0; i  len ; i++)
-   i2c_raw_write(base, chip, addr + i, buffer[i]);
-
+   if (i2c_raw_write(base, chip, addr + i, buffer[i]) != 0)
+   return -1;
return 0;
 }
 
-- 
1.7.9.5

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[U-Boot] [PATCH v2 8/9] arm: rmobile: kzm9g: enable I2C1

[Tetsuyuki Kobayashi]

Supply clock to I2C1 and release resetting.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 board/kmc/kzm9g/kzm9g.c |5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 0679be6..93ca9d7 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -43,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SMSTPCR1_CMT0  (1  24)
 #define SMSTPCR1_I2C0  (1  16)
 #define SMSTPCR3_USB   (1  22)
+#define SMSTPCR3_I2C1  (1  23)
 
 #define PORT32CR (0xE6051020)
 #define PORT33CR (0xE6051021)
@@ -300,8 +301,8 @@ int board_early_init_f(void)
 
clrbits_le32(cpg-smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
clrbits_le32(cpg_srcr-srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
-   clrbits_le32(cpg-smstpcr3, SMSTPCR3_USB);
-   clrbits_le32(cpg_srcr-srcr3, SMSTPCR3_USB);
+   clrbits_le32(cpg-smstpcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
+   clrbits_le32(cpg_srcr-srcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
writel(VCLKCR1_D, cpg-vclkcr1);
 
/* Setup SCIF4 / workaround */
-- 
1.7.9.5

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[U-Boot] [PATCH v2 3/9] i2c: sh_i2c.c: adjust for SH73A0

[Tetsuyuki Kobayashi]

Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, i2c md and i2c mw command on U-Boot work properly on 
KZM-A9-GT board.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - none

 drivers/i2c/sh_i2c.c|4 
 include/configs/kzm9g.h |2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 03dfa7a..6c6a141 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -151,8 +151,12 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
u8 ret;
 
+#if defined(CONFIG_SH73A0)
+   i2c_set_addr(base, id, reg, 0);
+#else
i2c_set_addr(base, id, reg, 1);
udelay(100);
+#endif
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 8877516..abeab69 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -164,7 +164,7 @@
 #define CONFIG_SYS_I2C_SLAVE(0x7F)
 #define CONFIG_SH_I2C_DATA_HIGH (4)
 #define CONFIG_SH_I2C_DATA_LOW  (5)
-#define CONFIG_SH_I2C_CLOCK (4166)
+#define CONFIG_SH_I2C_CLOCK (10400) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0 (0xE682)
 #define CONFIG_SH_I2C_BASE1 (0xE6822000)
 
-- 
1.7.9.5

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[U-Boot] [PATCH v2 2/9] i2c: sh_i2c.c: correct BUSY bit define in ICSR

[Tetsuyuki Kobayashi]

Correct BUSY bit define in ICSR from (13) to (14).

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - none

 drivers/i2c/sh_i2c.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index b98fce5..03dfa7a 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -43,7 +43,7 @@ static struct sh_i2c *base;
 #define SH_I2C_ICCR_SCP(1  0)
 
 /* ICSR / ICIC */
-#define SH_IC_BUSY (1  3)
+#define SH_IC_BUSY (1  4)
 #define SH_IC_TACK (1  2)
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
-- 
1.7.9.5

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[U-Boot] [PATCH v2 5/9] i2c: sh_i2c: enable i2c_probe

[Tetsuyuki Kobayashi]

Before this patch i2c_probe() always returned 0 and i2c probe command did not 
work properly.

Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call 
this function.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c |   29 -
 1 file changed, 24 insertions(+), 5 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index d524619..25dbc43 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -85,6 +85,21 @@ static void irq_dte(struct sh_i2c *base)
}
 }
 
+static int irq_dte_with_tack(struct sh_i2c *base)
+{
+   int i;
+   int ret = 0;
+
+   for (i = 0 ; i  IRQ_WAIT ; i++) {
+   if (SH_IC_DTE  readb(base-icsr))
+   break;
+   if (SH_IC_TACK  readb(base-icsr))
+   return -1;
+   udelay(10);
+   }
+   return ret;
+}
+
 static void irq_busy(struct sh_i2c *base)
 {
int i;
@@ -96,9 +111,9 @@ static void irq_busy(struct sh_i2c *base)
}
 }
 
-static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
+static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
-   u8 icic = 0;
+   u8 icic = SH_IC_TACK;
 
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
@@ -116,14 +131,18 @@ static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 
reg, int stop)
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
 
+   writeb(readb(base-icsr)  ~SH_IC_TACK, base-icsr);
writeb(id  1, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
writeb(reg, base-icdr);
if (stop)
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS), base-iccr);
 
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
+   return 0;
 }
 
 static void i2c_finish(struct sh_i2c *base)
@@ -321,5 +340,5 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int 
len)
  */
 int i2c_probe(u8 chip)
 {
-   return 0;
+   return i2c_set_addr(base, chip, 0, 1);
 }
-- 
1.7.9.5

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[U-Boot] [RESEND PATCH v2 0/9] i2c for R-mobile

[Tetsuyuki Kobayashi]

Some mails seems to be missing. I am sending again..


Hi, Iwamatsu-san
Hello, Heiko

Iwamatu-san, thank you for review. This is v2 patch for sh_i2c.
Now i2c dev and i2c probe also work properly on KZM-A9-GT board.
I think this modification is common for R-mobile, but I have SH73A0 document 
only. Iwamatu-san, please review this.

This patch set is based on arm/rmobile branch of u-boot-sh.git.

Tetsuyuki Kobayashi (9):
  i2c: sh_i2c.c: support iccl and icch extension
  i2c: sh_i2c.c: correct BUSY bit define in ICSR
  i2c: sh_i2c.c: adjust for SH73A0
  i2c: sh_i2c.c: support I2C2, I2C3 and I2C4
  i2c: sh_i2c: enable i2c_probe
  i2c: sh_i2c.c: check error in i2c_read and i2c_write
  i2c: sh_i2c.c: remove unused function
  arm: rmobile: kzm9g: enable I2C1
  arm: rmobile: kzm9g: enable I2C2

 board/kmc/kzm9g/kzm9g.c |7 ++-
 drivers/i2c/sh_i2c.c|  120 +--
 include/configs/kzm9g.h |8 +++-
 3 files changed, 95 insertions(+), 40 deletions(-)

-- 
1.7.9.5

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[U-Boot] [PATCH v2 1/9] i2c: sh_i2c.c: support iccl and icch extension

[Tetsuyuki Kobayashi]

R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and 
icch.
This patch add support for the extentin bits.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - define CONFIG_SH_I2C_8BIT at board config file and replace HAS_ICIC67.


 drivers/i2c/sh_i2c.c|   30 ++
 include/configs/kzm9g.h |1 +
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index fd8cb92..b98fce5 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -48,7 +48,13 @@ static struct sh_i2c *base;
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
 
-static u8 iccl, icch;
+#ifdef CONFIG_SH_I2C_8BIT
+/* store 8th bit of iccl and icch in ICIC register */
+#define SH_I2C_ICIC_ICCLB8 (1  7)
+#define SH_I2C_ICIC_ICCHB8 (1  6)
+#endif
+
+static u16 iccl, icch;
 
 #define IRQ_WAIT 1000
 
@@ -92,12 +98,20 @@ static void irq_busy(struct sh_i2c *base)
 
 static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
+   u8 icic = 0;
+
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
 
-   writeb(iccl, base-iccl);
-   writeb(icch, base-icch);
-   writeb(0, base-icic);
+   writeb(iccl  0xff, base-iccl);
+   writeb(icch  0xff, base-icch);
+#ifdef CONFIG_SH_I2C_8BIT
+   if (iccl  0xff)
+   icic |= SH_I2C_ICIC_ICCLB8;
+   if (icch  0xff)
+   icic |= SH_I2C_ICIC_ICCHB8;
+#endif
+   writeb(icic, base-icic);
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
@@ -222,18 +236,18 @@ void i2c_init(int speed, int slaveaddr)
denom = speed * (CONFIG_SH_I2C_DATA_HIGH + CONFIG_SH_I2C_DATA_LOW);
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   iccl = (u8)((num/denom) + 1);
+   iccl = (u16)((num/denom) + 1);
else
-   iccl = (u8)(num/denom);
+   iccl = (u16)(num/denom);
 
/* Calculate the value for icch. From the data sheet:
   icch = (p clock / transfer rate) * (H / (L + H)) */
num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_HIGH;
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   icch = (u8)((num/denom) + 1);
+   icch = (u16)((num/denom) + 1);
else
-   icch = (u8)(num/denom);
+   icch = (u16)(num/denom);
 }
 
 /*
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index a1ae718..8877516 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -155,6 +155,7 @@
 /* I2C */
 #define CONFIG_CMD_I2C
 #define CONFIG_SH_I2C 1
+#define CONFIG_SH_I2C_8BIT
 #define CONFIG_HARD_I2C
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_MAX_I2C_BUS  (2)
-- 
1.7.9.5

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[U-Boot] [PATCH v2 2/9] i2c: sh_i2c.c: correct BUSY bit define in ICSR

[Tetsuyuki Kobayashi]

Correct BUSY bit define in ICSR from (13) to (14).

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - none

 drivers/i2c/sh_i2c.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index b98fce5..03dfa7a 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -43,7 +43,7 @@ static struct sh_i2c *base;
 #define SH_I2C_ICCR_SCP(1  0)
 
 /* ICSR / ICIC */
-#define SH_IC_BUSY (1  3)
+#define SH_IC_BUSY (1  4)
 #define SH_IC_TACK (1  2)
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
-- 
1.7.9.5

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[U-Boot] [PATCH v2 3/9] i2c: sh_i2c.c: adjust for SH73A0

[Tetsuyuki Kobayashi]

Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, i2c md and i2c mw command on U-Boot work properly on 
KZM-A9-GT board.

Acked-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - none

 drivers/i2c/sh_i2c.c|4 
 include/configs/kzm9g.h |2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 03dfa7a..6c6a141 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -151,8 +151,12 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
u8 ret;
 
+#if defined(CONFIG_SH73A0)
+   i2c_set_addr(base, id, reg, 0);
+#else
i2c_set_addr(base, id, reg, 1);
udelay(100);
+#endif
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 8877516..abeab69 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -164,7 +164,7 @@
 #define CONFIG_SYS_I2C_SLAVE(0x7F)
 #define CONFIG_SH_I2C_DATA_HIGH (4)
 #define CONFIG_SH_I2C_DATA_LOW  (5)
-#define CONFIG_SH_I2C_CLOCK (4166)
+#define CONFIG_SH_I2C_CLOCK (10400) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0 (0xE682)
 #define CONFIG_SH_I2C_BASE1 (0xE6822000)
 
-- 
1.7.9.5

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[U-Boot] [PATCH v2 4/9] i2c: sh_i2c.c: support I2C2, I2C3 and I2C4

[Tetsuyuki Kobayashi]

sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c|   15 +++
 include/configs/kzm9g.h |5 -
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 6c6a141..d524619 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -200,6 +200,21 @@ int i2c_set_bus_num(unsigned int bus)
case 1:
base = (void *)CONFIG_SH_I2C_BASE1;
break;
+#ifdef CONFIG_SH_I2C_BASE2
+   case 2:
+   base = (void *)CONFIG_SH_I2C_BASE2;
+   break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE3
+   case 3:
+   base = (void *)CONFIG_SH_I2C_BASE3;
+   break;
+#endif
+#ifdef CONFIG_SH_I2C_BASE4
+   case 4:
+   base = (void *)CONFIG_SH_I2C_BASE4;
+   break;
+#endif
default:
return -1;
}
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index abeab69..6a0b6c5 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -158,7 +158,7 @@
 #define CONFIG_SH_I2C_8BIT
 #define CONFIG_HARD_I2C
 #define CONFIG_I2C_MULTI_BUS
-#define CONFIG_SYS_MAX_I2C_BUS  (2)
+#define CONFIG_SYS_MAX_I2C_BUS  (5)
 #define CONFIG_SYS_I2C_MODULE
 #define CONFIG_SYS_I2C_SPEED(10) /* 100 kHz */
 #define CONFIG_SYS_I2C_SLAVE(0x7F)
@@ -167,5 +167,8 @@
 #define CONFIG_SH_I2C_CLOCK (10400) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0 (0xE682)
 #define CONFIG_SH_I2C_BASE1 (0xE6822000)
+#define CONFIG_SH_I2C_BASE2 (0xE6824000)
+#define CONFIG_SH_I2C_BASE3 (0xE6826000)
+#define CONFIG_SH_I2C_BASE4 (0xE6828000)
 
 #endif /* __KZM9G_H */
-- 
1.7.9.5

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[U-Boot] [PATCH v2 5/9] i2c: sh_i2c: enable i2c_probe

[Tetsuyuki Kobayashi]

Before this patch i2c_probe() always returned 0 and i2c probe command did not 
work properly.

Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call 
this function.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c |   29 -
 1 file changed, 24 insertions(+), 5 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index d524619..25dbc43 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -85,6 +85,21 @@ static void irq_dte(struct sh_i2c *base)
}
 }
 
+static int irq_dte_with_tack(struct sh_i2c *base)
+{
+   int i;
+   int ret = 0;
+
+   for (i = 0 ; i  IRQ_WAIT ; i++) {
+   if (SH_IC_DTE  readb(base-icsr))
+   break;
+   if (SH_IC_TACK  readb(base-icsr))
+   return -1;
+   udelay(10);
+   }
+   return ret;
+}
+
 static void irq_busy(struct sh_i2c *base)
 {
int i;
@@ -96,9 +111,9 @@ static void irq_busy(struct sh_i2c *base)
}
 }
 
-static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
+static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
-   u8 icic = 0;
+   u8 icic = SH_IC_TACK;
 
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
@@ -116,14 +131,18 @@ static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 
reg, int stop)
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
 
+   writeb(readb(base-icsr)  ~SH_IC_TACK, base-icsr);
writeb(id  1, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
writeb(reg, base-icdr);
if (stop)
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS), base-iccr);
 
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
+   return 0;
 }
 
 static void i2c_finish(struct sh_i2c *base)
@@ -321,5 +340,5 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int 
len)
  */
 int i2c_probe(u8 chip)
 {
-   return 0;
+   return i2c_set_addr(base, chip, 0, 1);
 }
-- 
1.7.9.5

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[U-Boot] [PATCH v2 6/9] i2c: sh_i2c.c: check error in i2c_read and i2c_write

[Tetsuyuki Kobayashi]

Before this patch, i2c_{read,write} always returned 0.
Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero 
when error.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c |   44 
 1 file changed, 28 insertions(+), 16 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 25dbc43..e3ee804 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -151,29 +151,35 @@ static void i2c_finish(struct sh_i2c *base)
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
 }
 
-static void i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
+static int i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 val)
 {
-   i2c_set_addr(base, id, reg, 0);
+   if (i2c_set_addr(base, id, reg, 0) != 0)
+   return -1;
udelay(10);
 
writeb(val, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
writeb((SH_I2C_ICCR_ICE | SH_I2C_ICCR_RTS), base-iccr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
irq_busy(base);
 
i2c_finish(base);
+   return 0;
 }
 
-static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
+static int i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
-   u8 ret;
+   int ret;
 
 #if defined(CONFIG_SH73A0)
-   i2c_set_addr(base, id, reg, 0);
+   if (i2c_set_addr(base, id, reg, 0) != 0)
+   return -1;
 #else
-   i2c_set_addr(base, id, reg, 1);
+   if (i2c_set_addr(base, id, reg, 1) != 0)
+   return -1;
udelay(100);
 #endif
 
@@ -181,12 +187,14 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
irq_dte(base);
 
writeb(id  1 | 0x01, base-icdr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_SCP), base-iccr);
-   irq_dte(base);
+   if (irq_dte_with_tack(base) != 0)
+   return -1;
 
-   ret = readb(base-icdr);
+   ret = readb(base-icdr)  0xff;
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RACK), base-iccr);
readb(base-icdr); /* Dummy read */
@@ -303,10 +311,14 @@ void i2c_init(int speed, int slaveaddr)
  */
 int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
 {
+   int ret;
int i = 0;
-   for (i = 0 ; i  len ; i++)
-   buffer[i] = i2c_raw_read(base, chip, addr + i);
-
+   for (i = 0 ; i  len ; i++) {
+   ret = i2c_raw_read(base, chip, addr + i);
+   if (ret  0)
+   return -1;
+   buffer[i] = ret  0xff;
+   }
return 0;
 }
 
@@ -327,8 +339,8 @@ int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int 
len)
 {
int i = 0;
for (i = 0; i  len ; i++)
-   i2c_raw_write(base, chip, addr + i, buffer[i]);
-
+   if (i2c_raw_write(base, chip, addr + i, buffer[i]) != 0)
+   return -1;
return 0;
 }
 
-- 
1.7.9.5

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[U-Boot] [PATCH v2 7/9] i2c: sh_i2c.c: remove unused function

[Tetsuyuki Kobayashi]

irq_wait() was not used. So removed it to elminate compiler warnings.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 drivers/i2c/sh_i2c.c |   16 
 1 file changed, 16 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index e3ee804..60bad52 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -58,22 +58,6 @@ static u16 iccl, icch;
 
 #define IRQ_WAIT 1000
 
-static void irq_wait(struct sh_i2c *base)
-{
-   int i;
-   u8 status;
-
-   for (i = 0 ; i  IRQ_WAIT ; i++) {
-   status = readb(base-icsr);
-   if (SH_IC_WAIT  status)
-   break;
-
-   udelay(10);
-   }
-
-   writeb(status  ~SH_IC_WAIT, base-icsr);
-}
-
 static void irq_dte(struct sh_i2c *base)
 {
int i;
-- 
1.7.9.5

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[U-Boot] [PATCH v2 8/9] arm: rmobile: kzm9g: enable I2C1

[Tetsuyuki Kobayashi]

Supply clock to I2C1 and release resetting.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 board/kmc/kzm9g/kzm9g.c |5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 0679be6..93ca9d7 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -43,6 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define SMSTPCR1_CMT0  (1  24)
 #define SMSTPCR1_I2C0  (1  16)
 #define SMSTPCR3_USB   (1  22)
+#define SMSTPCR3_I2C1  (1  23)
 
 #define PORT32CR (0xE6051020)
 #define PORT33CR (0xE6051021)
@@ -300,8 +301,8 @@ int board_early_init_f(void)
 
clrbits_le32(cpg-smstpcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
clrbits_le32(cpg_srcr-srcr1, (SMSTPCR1_CMT0|SMSTPCR1_I2C0));
-   clrbits_le32(cpg-smstpcr3, SMSTPCR3_USB);
-   clrbits_le32(cpg_srcr-srcr3, SMSTPCR3_USB);
+   clrbits_le32(cpg-smstpcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
+   clrbits_le32(cpg_srcr-srcr3, (SMSTPCR3_USB|SMSTPCR3_I2C1));
writel(VCLKCR1_D, cpg-vclkcr1);
 
/* Setup SCIF4 / workaround */
-- 
1.7.9.5

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[U-Boot] [PATCH v2 9/9] arm: rmobile: kzm9g: enable I2C2

[Tetsuyuki Kobayashi]

Set gpio config for I2C2. 

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - new

 board/kmc/kzm9g/kzm9g.c |2 ++
 1 file changed, 2 insertions(+)

diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 93ca9d7..22f581a 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -370,6 +370,8 @@ int board_init(void)
gpio_direction_output(GPIO_PORT15, 1);
 
/* I2C */
+   gpio_request(GPIO_FN_PORT237_I2C_SCL2, NULL);
+   gpio_request(GPIO_FN_PORT236_I2C_SDA2, NULL);
gpio_request(GPIO_FN_PORT27_I2C_SCL3, NULL);
gpio_request(GPIO_FN_PORT28_I2C_SDA3, NULL);
 
-- 
1.7.9.5

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[U-Boot] [PATCH 0/3] i2c for R-mobile

[Tetsuyuki Kobayashi]

Hi, Iwamatsu-san

I managed to work i2c on KZM-A9-GT board. Now i2c md and i2c mw for i2c 
channel 0 work properly.
I think this modification is common for R-mobile, but I have SH73A0 document 
only. Iwamatu-san, plese review this.

This patch set is based on arm/rmobile branch of u-boot-sh.git.

Tetsuyuki Kobayashi (3):
  i2c: sh_i2c.c: support iccl and icch extension
  i2c: sh_i2c.c: correct BUSY bit define in ICSR
  i2c: sh_i2c.c: adjust for SH73A0

 drivers/i2c/sh_i2c.c|   38 +-
 include/configs/kzm9g.h |2 +-
 2 files changed, 30 insertions(+), 10 deletions(-)

-- 
1.7.9.5

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[U-Boot] [PATCH 2/3] i2c: sh_i2c.c: correct BUSY bit define in ICSR

[Tetsuyuki Kobayashi]

Correct BUSY bit define in ICSR from (13) to (14).

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Iwamatsu-san,
I guess this was mistake. But I don't have technical document other than SH73A0.
Could you verify?

 drivers/i2c/sh_i2c.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 59402ba..84f1f5b 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -43,7 +43,7 @@ static struct sh_i2c *base;
 #define SH_I2C_ICCR_SCP(1  0)
 
 /* ICSR / ICIC */
-#define SH_IC_BUSY (1  3)
+#define SH_IC_BUSY (1  4)
 #define SH_IC_TACK (1  2)
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
-- 
1.7.9.5

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[U-Boot] [PATCH 3/3] i2c: sh_i2c.c: adjust for SH73A0

[Tetsuyuki Kobayashi]

Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0.
After this patch, i2c md and i2c mw command on U-Boot work properly on 
KZM-A9-GT board.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 drivers/i2c/sh_i2c.c|4 
 include/configs/kzm9g.h |2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index 84f1f5b..e8efdc9 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -153,8 +153,12 @@ static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
 {
u8 ret;
 
+#if defined(CONFIG_SH73A0)
+   i2c_set_addr(base, id, reg, 0);
+#else
i2c_set_addr(base, id, reg, 1);
udelay(100);
+#endif
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index a1ae718..5eccd29 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -163,7 +163,7 @@
 #define CONFIG_SYS_I2C_SLAVE(0x7F)
 #define CONFIG_SH_I2C_DATA_HIGH (4)
 #define CONFIG_SH_I2C_DATA_LOW  (5)
-#define CONFIG_SH_I2C_CLOCK (4166)
+#define CONFIG_SH_I2C_CLOCK (10400) /* 104 MHz */
 #define CONFIG_SH_I2C_BASE0 (0xE682)
 #define CONFIG_SH_I2C_BASE1 (0xE6822000)
 
-- 
1.7.9.5

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[U-Boot] [PATCH 1/3] i2c: sh_i2c.c: support iccl and icch extension

[Tetsuyuki Kobayashi]

R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and 
icch.
This patch add support for the extentin bits.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 drivers/i2c/sh_i2c.c |   32 
 1 file changed, 24 insertions(+), 8 deletions(-)

diff --git a/drivers/i2c/sh_i2c.c b/drivers/i2c/sh_i2c.c
index fd8cb92..59402ba 100644
--- a/drivers/i2c/sh_i2c.c
+++ b/drivers/i2c/sh_i2c.c
@@ -48,7 +48,15 @@ static struct sh_i2c *base;
 #define SH_IC_WAIT (1  1)
 #define SH_IC_DTE  (1  0)
 
-static u8 iccl, icch;
+#if defined(CONFIG_SH73A0)
+#define HAS_ICIC67
+#endif
+#ifdef HAS_ICIC67
+#define SH_I2C_ICIC_ICCLB8 (1  7)
+#define SH_I2C_ICIC_ICCHB8 (1  6)
+#endif
+
+static u16 iccl, icch;
 
 #define IRQ_WAIT 1000
 
@@ -92,12 +100,20 @@ static void irq_busy(struct sh_i2c *base)
 
 static void i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg, int stop)
 {
+   u8 icic = 0;
+
writeb(readb(base-iccr)  ~SH_I2C_ICCR_ICE, base-iccr);
writeb(readb(base-iccr) | SH_I2C_ICCR_ICE, base-iccr);
 
-   writeb(iccl, base-iccl);
-   writeb(icch, base-icch);
-   writeb(0, base-icic);
+   writeb(iccl  0xff, base-iccl);
+   writeb(icch  0xff, base-icch);
+#ifdef HAS_ICIC67
+   if (iccl  0xff)
+   icic |= SH_I2C_ICIC_ICCLB8;
+   if (icch  0xff)
+   icic |= SH_I2C_ICIC_ICCHB8;
+#endif
+   writeb(icic, base-icic);
 
writeb((SH_I2C_ICCR_ICE|SH_I2C_ICCR_RTS|SH_I2C_ICCR_BUSY), base-iccr);
irq_dte(base);
@@ -222,18 +238,18 @@ void i2c_init(int speed, int slaveaddr)
denom = speed * (CONFIG_SH_I2C_DATA_HIGH + CONFIG_SH_I2C_DATA_LOW);
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   iccl = (u8)((num/denom) + 1);
+   iccl = (u16)((num/denom) + 1);
else
-   iccl = (u8)(num/denom);
+   iccl = (u16)(num/denom);
 
/* Calculate the value for icch. From the data sheet:
   icch = (p clock / transfer rate) * (H / (L + H)) */
num = CONFIG_SH_I2C_CLOCK * CONFIG_SH_I2C_DATA_HIGH;
tmp = num * 10 / denom;
if (tmp % 10 = 5)
-   icch = (u8)((num/denom) + 1);
+   icch = (u16)((num/denom) + 1);
else
-   icch = (u8)(num/denom);
+   icch = (u16)(num/denom);
 }
 
 /*
-- 
1.7.9.5

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Re: [U-Boot] [RFC][PATCH v3] net: nfs: make NFS_TIMEOUT configurable

[Tetsuyuki Kobayashi]

Dear Joe Hershberger,

How is this patch's status?

(2012/07/04 17:25), Tetsuyuki Kobayashi wrote:

NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to 
adjust.
This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a 
board specific config file.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
- remove a wrong #error line
Changes for v3:
- add CONFIG_NFS_TIMEOUT after CONFIG_ARP_TIMEOUT in README file
- align #ifndef - #else - #endif format as same as tftp.c

  README|7 +++
  net/nfs.c |6 +-
  2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/README b/README
index 67dc444..9a18a5c 100644
--- a/README
+++ b/README
@@ -2140,6 +2140,13 @@ The following options need to be configured:

Timeout waiting for an ARP reply in milliseconds.

+   CONFIG_NFS_TIMEOUT
+
+   Timeout in milliseconds used in NFS protocol.
+   If you encounter ERROR: Cannot umount in nfs command,
+   try longer timeout such as
+   #define CONFIG_NFS_TIMEOUT 1UL
+
  - Command Interpreter:
CONFIG_AUTO_COMPLETE

diff --git a/net/nfs.c b/net/nfs.c
index 5b99763..7f2393f 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -31,7 +31,11 @@

  #define HASHES_PER_LINE 65/* Number of loading hashes per line*/
  #define NFS_RETRY_COUNT 30
-#define NFS_TIMEOUT 2000UL
+#ifndef CONFIG_NFS_TIMEOUT
+# define NFS_TIMEOUT 2000UL
+#else
+# define NFS_TIMEOUT CONFIG_NFS_TIMEOUT
+#endif

  static int fs_mounted;
  static unsigned long rpc_id;




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Re: [U-Boot] [RFC][PATCH v3] net: nfs: make NFS_TIMEOUT configurable

[Tetsuyuki Kobayashi]

Hi Joe, Tom,

(2012/07/13 1:40), Joe Hershberger wrote:

Hi Tom,

On Thu, Jul 12, 2012 at 11:30 AM, Tom Rini tr...@ti.com wrote:

On Thu, Jul 12, 2012 at 11:16:00AM -0500, Joe Hershberger wrote:

Hi Tetsuyuki Kobayashi,

On Thu, Jul 12, 2012 at 2:30 AM, Tetsuyuki Kobayashi k...@kmckk.co.jp wrote:

Dear Joe Hershberger,

How is this patch's status?


Someone marked it as RFC in patchwork, so I lost track of it.


That would be me (went and took everything with RFC in the subject,
marked it as RFC).  Sorry for the inconvienece!


No problem... the RFC should have been removed from the subject line
if Tetsuyuki Kobayashi expected it to be applied.


OK. I will do so in next time. Thank you.



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Re: [U-Boot] Ethernet on PandaBoard

[Tetsuyuki Kobayashi]

Hi Gray,

On 2012/07/12, at 0:13, Gary Thomas wrote:

 On 2012-07-11 07:08, Gary Thomas wrote:
 I just tried rev 211e47549b668c7cdd8658c0413a272f0d0495d4 (v2012.07-rc1)
 for my PandaBoard.  Sadly, this is failing when I try to use the onboard
 ethernet (EHCI USB based) controller:
 
 U-Boot SPL 2012.07-rc1 (Jul 11 2012 - 06:56:00)
 OMAP4430 ES2.2
 OMAP SD/MMC: 0
 reading u-boot.img
 reading u-boot.img
 
 
 U-Boot 2012.07-rc1 (Jul 11 2012 - 06:56:00)
 
 CPU  : OMAP4430 ES2.2
 Board: OMAP4 Panda
 I2C:   ready
 DRAM:  1 GiB
 MMC:   OMAP SD/MMC: 0
 Using default environment
 
 In:serial
 Out:   serial
 Err:   serial
 Net:   No ethernet found.
 Hit any key to stop autoboot:  0
 Panda # usb start
 (Re)start USB...
 USB:   Register 1313 NbrPorts 3
 data abort
 pc : [bff9acb0]  lr : [bff9ac91]
 sp : bff08e28  ip : 000f fp : 
 r10: bff0a370  r9 : 0002 r8 : bff08f68
 r7 : bffbb070  r6 :  r5 : bffaee04  r4 : 1313
 r3 : bffaee04  r2 : 9800 r1 : 000a  r0 : 0019
 Flags: Nzcv  IRQs off  FIQs off  Mode SVC_32
 Resetting CPU ...
 
 Anyone else see this?  Ideas?
 
 How do I map these addresses (PC=0xbff9acb0) to the ones in my
 u-boot ELF image (so I can figure out what went wrong)?
 
 Thanks
 
 
 This turns out to be related to access to the wHubCharacteristics
 field in a hub descriptor.  This field is u16, but not u16 aligned,
 hence the data abort.
 
 Has something changed recently?  I have a version of U-Boot built
 for this board based on 2011.06 from the meta-ti tree which does
 not suffer from these problems.
 


How about this patch?

[PATCH] arm: armv7: add compile option  -mno-unaligned-access if available
http://lists.denx.de/pipermail/u-boot/2012-July/127260.html


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Re: [U-Boot] [PATCH v2 0/5] arm: rmobile: kzm9g: enable booting Linux kernel

[Tetsuyuki Kobayashi]

Hi, Iwamatsu-san

I found another bug and fixed it right now.
I will add another patch in this patch series.
I will post v3 soon. Please wait to apply v2.


(2012/07/07 20:23), Tetsuyuki Kobayashi wrote:

Hi, Iwamatsu-san

I made v2 patch set for kzm9g.
Please revert my previous 3 patches and apply this patch set.

After this patch set, LTSI kernel can boot on KZM-A9-GT board.
It seems stable as before.

Tetsuyuki Kobayashi (5):
   arm: rmobile: kzm9g: Modify sdram area
   arm: rmobile: kzm9g: Adjust low level hardware setting
   arm: rmobile: kzm9g: change prompt to board specific
   arm: rmobile: kzm9g: Add dummy member to struct sh73a0_rwdt
   MAINTAINERS: Add Tetsuyuki Kobayshi for kzm9g

  MAINTAINERS|1 +
  arch/arm/include/asm/arch-rmobile/sh73a0.h |6 +-
  board/kmc/kzm9g/kzm9g.c|2 ++
  include/configs/kzm9g.h|7 ---
  4 files changed, 12 insertions(+), 4 deletions(-)




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Re: [U-Boot] [PATCH] net: bugfix: NetSetTimeout assumes CONFIG_SYS_HZ=1000

[Tetsuyuki Kobayashi]

Dear Wolfgang Denk,

(07/09/2012 04:58 AM), Wolfgang Denk wrote:
 Dear Tetsuyuki Kobayashi,
 
 In message 4fe85b87.6090...@kmckk.co.jp you wrote:
 NetSetTimeout sets incorrect value to timeDelta when CONFIG_SYS_HZ != 1000.
 
 Your patch is OK per se, but please note that it is a mandatory
 requirement that CONFIG_SYS_HZ == 1000.  So if you have any board
 where this is not the case, this board needs to be fixed, too.

Thank you for reviewing my patch.

I didn't know that it is a mandatory requirement that CONFIG_SYS_HZ == 1000.
I grep'ed for CONFIG_SYS_HZ in README and under doc/, but I could not find any 
description about it.

  $ grep -r CONFIG_SYS_HZ README doc/*
  doc/README.LED:(CONFIG_SYS_HZ / N) where N is the frequency of the blink. 
Typical values

And I couldn't find that what value should be return in ulong get_timer(ulong 
base);
I hope how to implement system timer documented.

Best regards,

Tetsuyuki Kobayashi



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Re: [U-Boot] [STATUS] ARM - many build problems

[Tetsuyuki Kobayashi]

Dear Wolfgang Denk,

(07/09/2012 07:25 AM), Wolfgang Denk wrote:

 cpu.c: In function 'save_boot_params_default':
 cpu.c:48:1: warning: -fstack-usage not supported for this target
 [enabled by default]
 /bin/sh: line 1: exit: too many arguments
 make[1]: *** [/work/wd/tmp-arm/dts/dt.dtb] Error 1
 make: *** [/work/wd/tmp-arm/u-boot.dtb] Error 2
 make: *** Waiting for unfinished jobs
 
 
 The build warnings are all of the warning: -fstack-usage not
 supported for this target kind also shown in this example.

I am sorry for stopping your hands.
My patch causes this warning. It is already pointed by Tom, but merged 
accidentally.
[PATCH v3] arm: bugfix: save_boot_params_default accesses uninitalized stack 
when -O0
http://lists.denx.de/pipermail/u-boot/2012-July/127693.html
Please revert this to stop warnings.

I have posted the update patch.
[PATCH v5] arm: bugfix: save_boot_params_default accesses uninitalized stack 
when -O0
http://lists.denx.de/pipermail/u-boot/2012-July/127844.html

Tom, Albert, please review my v5 patch.
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[U-Boot] [PATCH v5] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Tetsuyuki Kobayashi]

save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).
This patch removes save_boot_params_default() and put the equivalent in start.S

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Hi Tom, Albert,

I rewrite it again.
I tested it quickly on my kzm9g board, and also build it for omap4_panda and
checked the generated code by objdump command.

Changes for v2:
 - include linux/compiler.h and use __naked instead of __attribute__((naked))

Changes for v3:
 - move __naked after void
 - reformat comments

Changes for v4:
 - v3 causes following warnings
  cpu.c: In function 'save_boot_params_default':
  cpu.c:48:1: warning: -fstack-usage not supported for this target [enabled by 
default]
 - move save_boot_params_default() and save_boot_params() from cpu.c to start.S
   and write them in asm language

Changes for v5
 - rename save_boot_parames_default() to save_boot_params() and drop aliasing
 - move the code after relocate_code (nearer to callee)
 - modify commit log

 arch/arm/cpu/armv7/cpu.c   |7 ---
 arch/arm/cpu/armv7/start.S |   14 ++
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c6fa8ef..b0677f4 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -37,13 +37,6 @@
 #include asm/cache.h
 #include asm/armv7.h
 
-void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
-{
-}
-
-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
-   __attribute__((weak, alias(save_boot_params_default)));
-
 int cleanup_before_linux(void)
 {
/*
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 261835b..bf734fb 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -293,6 +293,20 @@ ENDPROC(relocate_code)
 
 /*
  *
+ * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
+ * __attribute__((weak));
+ *
+ * Stack pointer is not yet initialized at this moment
+ * Don't save anything to stack even if compiled with -O0
+ *
+ */
+ENTRY(save_boot_params)
+   bx  lr  @ back to my caller
+ENDPROC(save_boot_params)
+   .weak   save_boot_params
+
+/*
+ *
  * cpu_init_cp15
  *
  * Setup CP15 registers (cache, MMU, TLBs). The I-cache is turned on unless
-- 
1.7.9.5 
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Re: [U-Boot] [PATCH 0/3] arm: rmobile: kzm9g: enable booting Linux kernel

[Tetsuyuki Kobayashi]

Hi Albert,

(2012/07/06 22:46), Albert ARIBAUD wrote:

Hi Tetsuyuki,

On Fri, 06 Jul 2012 16:48:05 +0900, Tetsuyuki Kobayashi
k...@kmckk.co.jp wrote:

Hi, Iwamatsu-san

(2012/07/06 9:12), Nobuhiro Iwamatsu wrote:


BTW, do you become a maintainer of kzm9g board?
If it becomes a maintainer, please send the patch to MAINTAINERS
file.


Thank you. I will send it later.


Just in case: I prefer the patch to MAINTAINERS to be in the same
series as the rest of the new board support.


OK.

Iwamatsu-san,
Now I have another patch for kzm9g.
So I will make updated patch series including 5 patches.
(previous 3 patches + MAINTAINERS + new patch)



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[U-Boot] [PATCH v2 0/5] arm: rmobile: kzm9g: enable booting Linux kernel

[Tetsuyuki Kobayashi]

Hi, Iwamatsu-san

I made v2 patch set for kzm9g.
Please revert my previous 3 patches and apply this patch set.

After this patch set, LTSI kernel can boot on KZM-A9-GT board.
It seems stable as before.

Tetsuyuki Kobayashi (5):
  arm: rmobile: kzm9g: Modify sdram area
  arm: rmobile: kzm9g: Adjust low level hardware setting
  arm: rmobile: kzm9g: change prompt to board specific
  arm: rmobile: kzm9g: Add dummy member to struct sh73a0_rwdt
  MAINTAINERS: Add Tetsuyuki Kobayshi for kzm9g

 MAINTAINERS|1 +
 arch/arm/include/asm/arch-rmobile/sh73a0.h |6 +-
 board/kmc/kzm9g/kzm9g.c|2 ++
 include/configs/kzm9g.h|7 ---
 4 files changed, 12 insertions(+), 4 deletions(-)

-- 
1.7.9.5 
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[U-Boot] [PATCH v2 1/5] arm: rmobile: kzm9g: Modify sdram area

[Tetsuyuki Kobayashi]

Reserve first 16MB for RT-CPU (as same as kernel config).

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
Signed-off-by: Nobuhiro Iwamatsu iwama...@nigauri.org
---
Changes for v2:
 - No change. Just rebased.

 include/configs/kzm9g.h |5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 7567d46..bcf2cd8 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -97,8 +97,9 @@
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
 CONFIG_SYS_INIT_RAM_SIZE - \
 GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_SDRAM_BASE  KZM_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE  PHYS_SDRAM_SIZE
+#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
+#define CONFIG_SYS_SDRAM_BASE  (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
+#define CONFIG_SYS_SDRAM_SIZE  (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
 
 #define CONFIG_SYS_MONITOR_BASE(KZM_FLASH_BASE)
-- 
1.7.9.5 
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[U-Boot] [PATCH v2 2/5] arm: rmobile: kzm9g: Adjust low level hardware setting

[Tetsuyuki Kobayashi]

Adjust low level hardware setting in s_init.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
Signed-off-by: Nobuhiro Iwamatsu iwama...@nigauri.org
---
Changes for v2:
 - No change. Just rebased.

 arch/arm/include/asm/arch-rmobile/sh73a0.h |4 +++-
 board/kmc/kzm9g/kzm9g.c|2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-rmobile/sh73a0.h 
b/arch/arm/include/asm/arch-rmobile/sh73a0.h
index 605dd44..ad59be7 100644
--- a/arch/arm/include/asm/arch-rmobile/sh73a0.h
+++ b/arch/arm/include/asm/arch-rmobile/sh73a0.h
@@ -229,7 +229,9 @@ struct sh73a0_sbsc_cpg {
volatile u32 smstpcr3;
volatile u32 smstpcr4;
volatile u32 smstpcr5;
-   volatile u32 dummy11[10]; /* 0x148 .. 0x16c */
+   volatile u32 dummy11[2]; /* 0x148 .. 0x14c */
+   volatile u32 cpgxxcs4;
+   volatile u32 dummy12[7]; /* 0x154 .. 0x16c */
volatile u32 dvfscr2;
volatile u32 dvfscr3;
volatile u32 dvfscr4;
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index 8d7c61a..3716483 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -163,6 +163,7 @@ void s_init(void)
#define LIFEC_SEC_SRC_BIT   (1  15)
writel(readl(LIFEC_SEC_SRC)  ~LIFEC_SEC_SRC_BIT, LIFEC_SEC_SRC);
 
+   clrbits_le32(cpg-smstpcr3, (1  15));
clrbits_le32(cpg_srcr-srcr3, (1  15));
clrbits_le32(cpg-smstpcr2, (1  18));
clrbits_le32(cpg_srcr-srcr2, (1  18));
@@ -266,6 +267,7 @@ void s_init(void)
 
writel(0x0b0b, cpg-frqcrd);
cmp_loop(cpg-frqcrd, 0x8000, 0x0);
+   writel(0xfffc, cpg-cpgxxcs4);
 }
 
 int board_early_init_f(void)
-- 
1.7.9.5 
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[U-Boot] [PATCH v2 3/5] arm: rmobile: kzm9g: change prompt to board specific

[Tetsuyuki Kobayashi]

Change U-Boot prompt to board specific one.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
Signed-off-by: Nobuhiro Iwamatsu iwama...@nigauri.org
---
Changes for v2:
 - No change. Just rebased.

 include/configs/kzm9g.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index bcf2cd8..bd157d9 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -70,7 +70,7 @@
 
 /* prompt */
 #define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT   
+#define CONFIG_SYS_PROMPT  KZM-A9-GT# 
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_PBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
-- 
1.7.9.5 
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[U-Boot] [PATCH v2 4/5] arm: rmobile: kzm9g: Add dummy member to struct sh73a0_rwdt

[Tetsuyuki Kobayashi]

Add dummy member to struct sh73a0_rwdt in sh73a0.h.
Without this, initializing watch dog timer goes wrong.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - New

 arch/arm/include/asm/arch-rmobile/sh73a0.h |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/arch-rmobile/sh73a0.h 
b/arch/arm/include/asm/arch-rmobile/sh73a0.h
index ad59be7..74d1c48 100644
--- a/arch/arm/include/asm/arch-rmobile/sh73a0.h
+++ b/arch/arm/include/asm/arch-rmobile/sh73a0.h
@@ -60,7 +60,9 @@
 /* RWDT */
 struct sh73a0_rwdt {
volatile u16 rwtcnt0;   /* 0x00 */
+   volatile u16 dummy0;/* 0x02 */
volatile u16 rwtcsra0;  /* 0x04 */
+   volatile u16 dummy1;/* 0x06 */
volatile u16 rwtcsrb0;  /* 0x08 */
 };
 
-- 
1.7.9.5 
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[U-Boot] [PATCH v2 5/5] MAINTAINERS: Add Tetsuyuki Kobayshi for kzm9g

[Tetsuyuki Kobayashi]

Add Tetsuyuki Kobayshi for kzm9g in MAINTAINERS file.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - New

 MAINTAINERS |1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 45446f4..55a6c1b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -947,6 +947,7 @@ Vladimir Zapolskiy v...@mleia.com
devkit3250  lpc32xx
 
 Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
+Tetsuyuki Kobayashi k...@kmckk.co.jp
 
kzm9g   SH73A0 (RMOBILE SoC)
 
-- 
1.7.9.5 
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[U-Boot] [PATCH v4] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Tetsuyuki Kobayashi]

save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Hi Tom, Albert,

I rewrite them in asm language and put it to start.S.
No warning now.
I tested it quickly on my kzm9g board.

Changes for v2:
 - include linux/compiler.h and use __naked instead of __attribute__((naked))

Changes for v3:
 - move __naked after void
 - reformat comments

Changes for v4:
 - v3 causes following warnings
  cpu.c: In function 'save_boot_params_default':
  cpu.c:48:1: warning: -fstack-usage not supported for this target [enabled by 
default]
 - move save_boot_params_default() and save_boot_params() from cpu.c to start.S
   and write them in asm language

 arch/arm/cpu/armv7/cpu.c   |7 ---
 arch/arm/cpu/armv7/start.S |   15 +++
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c6fa8ef..b0677f4 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -37,13 +37,6 @@
 #include asm/cache.h
 #include asm/armv7.h
 
-void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
-{
-}
-
-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
-   __attribute__((weak, alias(save_boot_params_default)));
-
 int cleanup_before_linux(void)
 {
/*
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 261835b..4feade5 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -350,6 +350,21 @@ ENTRY(cpu_init_crit)
 ENDPROC(cpu_init_crit)
 #endif
 
+/*
+ *
+ * void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)   
+ *
+ * Stack pointer is not yet initialized
+ * Don't save anything to stack even if compiled with -O0
+ * 
+ */
+ENTRY(save_boot_params_default)
+   bx  lr  @ back to my caller
+ENDPROC(save_boot_params_default)
+
+   .weak   save_boot_params
+   .setsave_boot_params, save_boot_params_default
+
 #ifndef CONFIG_SPL_BUILD
 /*
  *
--
1.7.9.5 
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Re: [U-Boot] [PATCH 0/3] arm: rmobile: kzm9g: enable booting Linux kernel

[Tetsuyuki Kobayashi]

Hi, Iwamatsu-san

(2012/07/06 9:12), Nobuhiro Iwamatsu wrote:


BTW, do you become a maintainer of kzm9g board?
If it becomes a maintainer, please send the patch to MAINTAINERS file.


Thank you. I will send it later.

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Re: [U-Boot] [PATCH] arm: rmobile: Support build with gcc-4.6 or later

[Tetsuyuki Kobayashi]

Hello, Iwamatsu-san

(2012/07/06 9:06), Nobuhiro Iwamatsu wrote:
 Latest rmobile code was tested by using old gcc (gcc-4.4).
 When we use gcc-4.6 (or later), the build is made, but does not work.
 This solves a problem not to work by add -march=armv5 to compiple option
 when we built in gcc-4.6 (or later).
 I tested by linaro's compiler version 2012.04-20120426.

Yes. I know recent gcc causes problem because of unaligned access.
There are 2 different proposals, but neither accepted.

[PATCH] arm: enable unaligned access on ARMv7
http://lists.denx.de/pipermail/u-boot/2012-June/125754.html

[PATCH] arm: armv7: add compile option -mno-unaligned-access if available
http://lists.denx.de/pipermail/u-boot/2012-July/127260.html

This patch is the third one.

 --- a/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
 +++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init.S
 @@ -49,8 +49,6 @@ wait_interrupt:
   str r2, [r1]
   
   wait_loop:
 - wfi
 -
   ldr r2, [r1, #0xC]
   str r2, [r1, #0x10]

I know wfi instruction causes compile error in -march=armv5.
Without this, it works but not so good because 2nd CPU wastes cycles.

I wonder, is there any cheat such as .word 0x (putting instruction code 
directly)
or something.

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Re: [U-Boot] [PATCH v4 4/6] armv7: Use -march=armv7-a and thereby enable Thumb-2

[Tetsuyuki Kobayashi]

Hello,

On 2012/07/07, at 8:02, Marek Vasut wrote:

 Dear Aneesh V,
 
 Enable -march=armv7-a for armv7 platforms if the tool-chain
 supports it. This in turn results in Thumb-2 code generated
 for these platforms if CONFIG_SYS_THUMB_BUILD is enabled.
 
 Signed-off-by: Aneesh V ane...@ti.com
 ---
 
 For some reason, this patch breaks USB EHCI on mx51 efika boards. The board 
 just 
 freezes instead of detecting USB devices. Reverting this patch fixes the 
 issue.
 
 Note I use gcc 4.7.1 (!), might be compiler issue?
 
 Tom, can you try on one of your beagle-dogs please? :)
 

Just for your information,
I doubt unaligned access causes this problem.

My investigation is here,
http://lists.denx.de/pipermail/u-boot/2012-June/127020.html
My patch
[PATCH] arm: armv7: add compile option  -mno-unaligned-access if available
http://lists.denx.de/pipermail/u-boot/2012-July/127260.html


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Re: [U-Boot] [PATCH v2 1/5] arm: rmobile: Add basic support for Renesas R-Mobile

[Tetsuyuki Kobayashi]

Thank you, Iwamatu-san.

But I am afraid that [PATCH v2 2/5] is missing. I didn't recieve it.

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Re: [U-Boot] [PATCH v2 5/5] arm: rmobile: Add supoprt for KMC KZM-A9-GT board

[Tetsuyuki Kobayashi]

Hello, Iwamatsu-san

(2012/07/05 16:01), Nobuhiro Iwamatsu wrote:


diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
new file mode 100644
index 000..3f38f69
--- /dev/null
+++ b/board/kmc/kzm9g/kzm9g.c

[...]

+void s_init(void)
+{

[...]

+   /* Secure control register Init */
+   #define LIFEC_SEC_SRC_BIT   (1  15)
+   writel(readl(LIFEC_SEC_SRC)  ~LIFEC_SEC_SRC_BIT, LIFEC_SEC_SRC);


(1  15) ?
It seems strange. typo of (1  15) ?

-   actux1:FLASH1X8

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
new file mode 100644
index 000..62ecadc
--- /dev/null
+++ b/include/configs/kzm9g.h

[...]

+
+#ifndef __KZM_A9_GT_H
+#define __KZM_A9_GT_H


Trivial.
__KZM9G_H


+#endif /* __KZM_A9_GT_H */


__KZM9G_H


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[U-Boot] [PATCH 0/3] arm: rmobile: kzm9g: enable booting Linux kernel

[Tetsuyuki Kobayashi]

Hello, Iwamatu-san

I rebased u-boot-sh.git arm/rmobile branch and reworked my patches.
After this patch set, LTSI kernel can boot on KZM-A9-GT board.

But I found it is not stable. It needs more work.


Tetsuyuki Kobayashi (3):
  arm: rmobile: kzm9g: Modify sdram area
  arm: rmobile: kzm9g: Adjust low level hardware setting
  arm: rmobile: kzm9g: change prompt to board specific

 arch/arm/include/asm/arch-rmobile/sh73a0.h |4 +++-
 board/kmc/kzm9g/kzm9g.c|2 ++
 include/configs/kzm9g.h|7 ---
 3 files changed, 9 insertions(+), 4 deletions(-)

-- 1.7.9.5 
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[U-Boot] [PATCH 1/3] arm: rmobile: kzm9g: Modify sdram area

[Tetsuyuki Kobayashi]

Reserve first 16MB for RT-CPU (as same as kernel config).

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 include/configs/kzm9g.h |5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 62ecadc..5e9b417 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -97,8 +97,9 @@
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_INIT_RAM_ADDR + \
 CONFIG_SYS_INIT_RAM_SIZE - \
 GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_SDRAM_BASE  KZM_SDRAM_BASE
-#define CONFIG_SYS_SDRAM_SIZE  PHYS_SDRAM_SIZE
+#define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024)
+#define CONFIG_SYS_SDRAM_BASE  (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
+#define CONFIG_SYS_SDRAM_SIZE  (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
 #define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
 
 #define CONFIG_SYS_MONITOR_BASE(KZM_FLASH_BASE)
--
 1.7.9.5 
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[U-Boot] [PATCH 2/3] arm: rmobile: kzm9g: Adjust low level hardware setting

[Tetsuyuki Kobayashi]

Adjust low level hardware setting in s_init.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 arch/arm/include/asm/arch-rmobile/sh73a0.h |4 +++-
 board/kmc/kzm9g/kzm9g.c|2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-rmobile/sh73a0.h 
b/arch/arm/include/asm/arch-rmobile/sh73a0.h
index 605dd44..ad59be7 100644
--- a/arch/arm/include/asm/arch-rmobile/sh73a0.h
+++ b/arch/arm/include/asm/arch-rmobile/sh73a0.h
@@ -229,7 +229,9 @@ struct sh73a0_sbsc_cpg {
volatile u32 smstpcr3;
volatile u32 smstpcr4;
volatile u32 smstpcr5;
-   volatile u32 dummy11[10]; /* 0x148 .. 0x16c */
+   volatile u32 dummy11[2]; /* 0x148 .. 0x14c */
+   volatile u32 cpgxxcs4;
+   volatile u32 dummy12[7]; /* 0x154 .. 0x16c */
volatile u32 dvfscr2;
volatile u32 dvfscr3;
volatile u32 dvfscr4;
diff --git a/board/kmc/kzm9g/kzm9g.c b/board/kmc/kzm9g/kzm9g.c
index dea62d8..ebb2480 100644
--- a/board/kmc/kzm9g/kzm9g.c
+++ b/board/kmc/kzm9g/kzm9g.c
@@ -163,6 +163,7 @@ void s_init(void)
#define LIFEC_SEC_SRC_BIT   (1  15)
writel(readl(LIFEC_SEC_SRC)  ~LIFEC_SEC_SRC_BIT, LIFEC_SEC_SRC);
 
+   clrbits_le32(cpg-smstpcr3, (1  15));
clrbits_le32(cpg_srcr-srcr3, (1  15));
clrbits_le32(cpg-smstpcr2, (1  18));
clrbits_le32(cpg_srcr-srcr2, (1  18));
@@ -266,6 +267,7 @@ void s_init(void)
 
writel(0x0b0b, cpg-frqcrd);
cmp_loop(cpg-frqcrd, 0x8000, 0x0);
+   writel(0xfffc, cpg-cpgxxcs4);
 }
 
 int board_early_init_f(void)
--
 1.7.9.5 
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[U-Boot] [PATCH 3/3] arm: rmobile: kzm9g: change prompt to board specific

[Tetsuyuki Kobayashi]

Change U-Boot prompt to board specific one.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 include/configs/kzm9g.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index 5e9b417..a473bc8 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -70,7 +70,7 @@
 
 /* prompt */
 #define CONFIG_SYS_LONGHELP
-#define CONFIG_SYS_PROMPT   
+#define CONFIG_SYS_PROMPT  KZM-A9-GT# 
 #define CONFIG_SYS_CBSIZE  256
 #define CONFIG_SYS_PBSIZE  256
 #define CONFIG_SYS_MAXARGS 16
--
 1.7.9.5 
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[U-Boot] [RFC][PATCH v3] net: nfs: make NFS_TIMEOUT configurable

[Tetsuyuki Kobayashi]

NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to 
adjust.
This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a 
board specific config file.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
   - remove a wrong #error line
Changes for v3:
   - add CONFIG_NFS_TIMEOUT after CONFIG_ARP_TIMEOUT in README file
   - align #ifndef - #else - #endif format as same as tftp.c

 README|7 +++
 net/nfs.c |6 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/README b/README
index 67dc444..9a18a5c 100644
--- a/README
+++ b/README
@@ -2140,6 +2140,13 @@ The following options need to be configured:
 
Timeout waiting for an ARP reply in milliseconds.
 
+   CONFIG_NFS_TIMEOUT
+
+   Timeout in milliseconds used in NFS protocol.
+   If you encounter ERROR: Cannot umount in nfs command,
+   try longer timeout such as
+   #define CONFIG_NFS_TIMEOUT 1UL
+
 - Command Interpreter:
CONFIG_AUTO_COMPLETE
 
diff --git a/net/nfs.c b/net/nfs.c
index 5b99763..7f2393f 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -31,7 +31,11 @@
 
 #define HASHES_PER_LINE 65 /* Number of loading hashes per line  */
 #define NFS_RETRY_COUNT 30
-#define NFS_TIMEOUT 2000UL
+#ifndef CONFIG_NFS_TIMEOUT
+# define NFS_TIMEOUT 2000UL
+#else
+# define NFS_TIMEOUT CONFIG_NFS_TIMEOUT
+#endif
 
 static int fs_mounted;
 static unsigned long rpc_id;
-- 
1.7.9.5 
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Re: [U-Boot] [PATCH] arm: armv7: add compile option -mno-unaligned-access if available

[Tetsuyuki Kobayashi]

Hello, Måns
Thank you for summarizing.

I am not against you.
I'm OK either Allow unaligned access in U-Boot setting or
Specify compiler not to generate unaligned memory access
or other.
I just want to solve hung-up by unaligned access.
I follow custodian's decision.

(2012/07/03 1:14), Måns Rullgård wrote:

Lucas Stachd...@lynxeye.de  writes:


Am Montag, den 02.07.2012, 10:53 +0100 schrieb Måns Rullgård:

Tetsuyuki Kobayashik...@kmckk.co.jp  writes:


Recent compiler generates unaligned memory access in armv7 default.
But current U-Boot does not allow unaligned memory access, so it causes
data abort exception.
This patch add compile option -mno-unaligned-access if it is available.


Why not allow unaligned accesses instead?


IMHO, our recent discussion showed that both ways are wrong.
-mno-unaligned-access works around misaligned data on the software
level, while allowing unaligned access does on the hardware level.

What we really want is no unaligned access in U-Boot at all. Just
because -mno-unaligned-access is the default on ARMv5, we should not
consider it a gold standard.


It's slightly more complicated than that.  Data can be misaligned for a
variety of reasons:

1. Errors in software.
2. Specified by a file format or communication protocol.
3. Deliberately misaligned by the compiler.

Misaligned data of type 1 should of course be fixed properly, not worked
around in any way.

Type 2 happens all the time, and has to be dealt with one way or
another.  If the hardware supports unaligned accesses, this is usually
faster than reading a byte at a time.

When targeting ARMv6 and later, recent gcc versions have started issuing
deliberate unaligned accesses where previously byte by byte accesses
would have been done.  This happens with packed structs and sometimes
to write multiple smaller values at once, typically when
zero-initialising things.  These unaligned accesses are *good*.  They
make code smaller and faster.

The real problem here is that u-boot is setting the strict alignment
checking flag, invalidating the assumption of the compiler that the
system allows unaligned accesses.  For ARMv5 and earlier, setting this
flag is usually advisable since it makes finding accidental unaligned
accesses much easier.

This was debated in the context of the kernel a while ago, ultimately
leading to strict alignment being disabled for ARMv6 and up [1].

[1] 
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=commitdiff;h=8428e84d42179c2a00f5f6450866e70d802d1d05



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[U-Boot] [RFC][PATCH] net: nfs: make NFS_TIMEOUT configurable

[Tetsuyuki Kobayashi]

NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to 
adjust.
This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a 
board specific config file.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Hello, 

I made a patch from Joe's idea.

 net/nfs.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/net/nfs.c b/net/nfs.c
index 5b99763..6e65c5a 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -31,7 +31,12 @@
 
 #define HASHES_PER_LINE 65 /* Number of loading hashes per line  */
 #define NFS_RETRY_COUNT 30
+#ifdef CONFIG_NFS_TIMEOUT
+#define NFS_TIMEOUT CONFIG_NFS_TIMEOUT
+#error 
+#else
 #define NFS_TIMEOUT 2000UL
+#endif
 
 static int fs_mounted;
 static unsigned long rpc_id;
-- 
1.7.9.5
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Re: [U-Boot] [RFC][PATCH] net: nfs: make NFS_TIMEOUT configurable

[Tetsuyuki Kobayashi]

Hello Joe, thanks to responding.

On 2012/07/03, at 22:47, Joe Hershberger wrote:

 
 
 On Jul 3, 2012, at 6:22 AM, Tetsuyuki Kobayashi k...@kmckk.co.jp wrote:
 
 NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs 
 to adjust.
 This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in 
 a board specific config file.
 
 Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
 ---
 Hello, 
 
 I made a patch from Joe's idea.
 
 net/nfs.c |5 +
 1 file changed, 5 insertions(+)
 
 diff --git a/net/nfs.c b/net/nfs.c
 index 5b99763..6e65c5a 100644
 --- a/net/nfs.c
 +++ b/net/nfs.c
 @@ -31,7 +31,12 @@
 
 #define HASHES_PER_LINE 65/* Number of loading hashes per line*/
 #define NFS_RETRY_COUNT 30
 +#ifdef CONFIG_NFS_TIMEOUT
 +#define NFS_TIMEOUT CONFIG_NFS_TIMEOUT
 +#error 
 
 Why error?
 
Oh, I'm sorry. It is mistake. I checked both case inserting #error and forgot 
to remove..
I will post V2.

 +#else
 #define NFS_TIMEOUT 2000UL
 +#endif
 
 static int fs_mounted;
 static unsigned long rpc_id;
 -- 
 1.7.9.5

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[U-Boot] [RFC][PATCH v2] net: nfs: make NFS_TIMEOUT configurable

[Tetsuyuki Kobayashi]

NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to 
adjust.
This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a 
board specific config file.
For example,
#define CONFIG_NFS_TIMEOUT 1UL

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
   - remove a wrong #error line

 net/nfs.c |4 
 1 file changed, 4 insertions(+)

diff --git a/net/nfs.c b/net/nfs.c
index 5b99763..3a7f123 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -31,7 +31,11 @@
 
 #define HASHES_PER_LINE 65 /* Number of loading hashes per line  */
 #define NFS_RETRY_COUNT 30
+#ifdef CONFIG_NFS_TIMEOUT
+#define NFS_TIMEOUT CONFIG_NFS_TIMEOUT
+#else
 #define NFS_TIMEOUT 2000UL
+#endif
 
 static int fs_mounted;
 static unsigned long rpc_id;
-- 
1.7.9.5
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[U-Boot] [PATCH] arm: armv7: add compile option -mno-unaligned-access if available

[Tetsuyuki Kobayashi]

Recent compiler generates unaligned memory access in armv7 default.
But current U-Boot does not allow unaligned memory access, so it causes
data abort exception.
This patch add compile option -mno-unaligned-access if it is available.

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
 arch/arm/cpu/armv7/config.mk |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 5407cb6..560c084 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -26,6 +26,8 @@ PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
 # supported by more tool-chains
 PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5)
 PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7)
+PF_CPPFLAGS_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
+PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_NO_UNALIGNED)
 
 # =
 #
-- 1.7.9.5 
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[U-Boot] [PATCH v2] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Tetsuyuki Kobayashi]

save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - include linux/compiler.h and use __naked instead of __attribute__((naked))


 arch/arm/cpu/armv7/cpu.c |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c6fa8ef..3e2a75c 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -36,9 +36,13 @@
 #include asm/system.h
 #include asm/cache.h
 #include asm/armv7.h
+#include linux/compiler.h
 
+__naked /* don't save anything to stack even if compiled with -O0 */
 void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
 {
+   /* stack is not yet initialized */
+   asm(bx lr);
 }
 
 void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
-- 
1.7.9.5

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[U-Boot] [PATCH v2] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Tetsuyuki Kobayashi]

save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).

Signed-off-by: Tetsuyuki Kobayashi k...@kmckk.co.jp
---
Changes for v2:
 - include linux/compiler.h and use __naked instead of __attribute__((naked))


 arch/arm/cpu/armv7/cpu.c |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c6fa8ef..3e2a75c 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -36,9 +36,13 @@
 #include asm/system.h
 #include asm/cache.h
 #include asm/armv7.h
+#include linux/compiler.h
 
+__naked /* don't save anything to stack even if compiled with -O0 */
 void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
 {
+   /* stack is not yet initialized */
+   asm(bx lr);
 }
 
 void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
-- 1.7.9.5 

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Re: [U-Boot] [PATCH v2] arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0

[Tetsuyuki Kobayashi]

I'm sorry. This post is missing In-Reply-To. I sent again. Discard this.

(2012/06/28 20:17), Tetsuyuki Kobayashi wrote:

save_boot_params_default() in cpu.c accesses uninitialized stack area
when it compiled with -O0 (not optimized).

Signed-off-by: Tetsuyuki Kobayashik...@kmckk.co.jp
---
Changes for v2:
  - includelinux/compiler.h  and use __naked instead of __attribute__((naked))


  arch/arm/cpu/armv7/cpu.c |4 
  1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c6fa8ef..3e2a75c 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -36,9 +36,13 @@
  #includeasm/system.h
  #includeasm/cache.h
  #includeasm/armv7.h
+#includelinux/compiler.h

+__naked /* don't save anything to stack even if compiled with -O0 */
  void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
  {
+   /* stack is not yet initialized */
+   asm(bx lr);
  }

  void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)


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Re: [U-Boot] [PATCH] arm: rmobile: kzm9g: Adjust hardware setting in lowlevel_init.S

[Tetsuyuki Kobayashi]

Hi Albert

(2012/06/27 6:22), Albert ARIBAUD wrote:


On Tue, 26 Jun 2012 11:30:16 +0900, Tetsuyuki Kobayashi
k...@kmckk.co.jp  wrote:


This patch depends on
  Nobuhiro Iwamatsu's arm: rmobile: Add supoprt for KMC KZM-A9-GT board
  Tetsuyuki Kobayashi's arm: rmobile: kzm9g: Modify sdram area


Seems like a series to me -- you should post it as such, with patches
numbered 1/N, 2/N etc. Should be easy as you probably already have them
as a series of commits above master; git format-patch should generate
the mails alright.


OK. I am studying git format-patch and git send-email.

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Re: [U-Boot] [PATCH] arm: enable unaligned access on ARMv7

[Tetsuyuki Kobayashi]

Hi Rob and all,


 Am Dienstag, den 05.06.2012, 12:42 -0600 schrieb Stephen Warren:
 On 06/05/2012 11:47 AM, Lucas Stach wrote:
 Recent toolchains default to using the hardware feature for
 unaligned access on ARM v7, rather than doing the software
 fallback. According to ARM this is safe as all v7 implementations
 have to support this feature.
 (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/BABJFFAE.html)

 To avoid CPU hangs when doing unaligned memory access, we have to
 turn off alignment checking in our CPU initialisation code.
 (http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0491c/CIHCGCFD.html)

 Does this behavior change trickle down to Linux/... too, or would
 an OS completely re-initialize this state, and hence not be
 affected?


 Linux in particular does reinitialize this state and I expect any
 reasonable OS to do so.

 Then what is the point of enabling it on U-Boot? Does it fix some issue
 whereby some mis-aligned piece of data cannot be properly aligned?

 
 This is a new optimization feature in gcc 4.7 (and backported to some
 4.6 versions like the ubuntu 12.04 arm cross compiler (4.6.3)):
 
 http://lists.linaro.org/pipermail/linaro-dev/2012-June/012360.html
 
 http://seabright.co.nz/2012/06/11/kernel-not-booting-with-linaro-gcc/
 
 If you don't want to enable unaligned accesses, then
 -mno-unaligned-access needs to be added.
 

I verified it. Option -mno-unaligned-access works good.


include/mtd/cfi_flash.h

/* CFI standard query structure */
struct cfi_qry {
u8  qry[3];
u16 p_id;  -- unaligned!
...
} __attribute__((packed));


$ ${CROSS_COMPILE}gcc --version
arm-none-eabi-gcc (GNU Tools for ARM Embedded Processors) 4.6.2 20110921 
(release) [ARM/embedded-4_6-branch revision 182083]
Copyright (C) 2011 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

=
Compiled without --mno-unaligned-access
$ ${CROSS_COMPILE}objdump -d -S u-boot 

info-vendor = le16_to_cpu(qry.p_id);
cc88:   e3003a1cmovwr3, #2588   ; 0xa1c
cc8c:   e1dd11bbldrhr1, [sp, #27]  -- this is unaligned 
access
cc90:   ...
cc94:   e18410b3strhr1, [r4, r3]


=
Compiled with --mno-unaligned-access
$ ${CROSS_COMPILE}objdump -d -S u-boot 


info-vendor = le16_to_cpu(qry.p_id);
cce8:   e5dd101cldrbr1, [sp, #28]  --
ccec:   e5dd301bldrbr3, [sp, #27]  -- separated 2 byte 
accesses
ccf0:   ...
ccf4:   e1831401orr r1, r3, r1, lsl #8
ccf8:   e3003a1cmovwr3, #2588   ; 0xa1c
ccfc:   e18410b3strhr1, [r4, r3]

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