[U-Boot] [PATCH] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. T1040D4RDB is re-designed T1040RDB board with following changes : - Support of DDR4 memory - Support of 0x66 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 - Support of QE-TDM Similarily T1042D4RDB is a Freescale reference board that hosts the T1040 SoC. T1042D4RDB is re-designed T1042RDB board with following changes : - Support of DDR4 memory - Support for 0x86 serdes protocol which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 3 SGMII on DTSEC1, DTSEC2 DTSEC3 - Support of DIU Signed-off-by: Vijay Rai vijay@freescale.com Signed-off-by: Priyanka Jain priyanka.j...@freescale.com --- changes from v2: - adds SGMII suport using CPLD - removes extra endif changes from v3: - removes checkpatch error changes from v4: - wrong use of defined MACRO in eth.c file, adds macro properly changes from v5: - updates README files, t1040d4_rcw.cfg and t1042d4_rcw.cfg - update DDR settings board/freescale/t104xrdb/MAINTAINERS |8 board/freescale/t104xrdb/README | 75 -- board/freescale/t104xrdb/cpld.h |2 + board/freescale/t104xrdb/ddr.c |6 +++ board/freescale/t104xrdb/ddr.h |9 +++- board/freescale/t104xrdb/eth.c | 20 +++- board/freescale/t104xrdb/t1040d4_rcw.cfg |7 +++ board/freescale/t104xrdb/t1042d4_rcw.cfg |7 +++ board/freescale/t104xrdb/t104xrdb.c | 21 + configs/T1040D4RDB_NAND_defconfig|5 ++ configs/T1040D4RDB_SDCARD_defconfig |5 ++ configs/T1040D4RDB_SPIFLASH_defconfig|5 ++ configs/T1040D4RDB_defconfig |4 ++ configs/T1042D4RDB_NAND_defconfig|5 ++ configs/T1042D4RDB_SDCARD_defconfig |5 ++ configs/T1042D4RDB_SPIFLASH_defconfig|5 ++ configs/T1042D4RDB_defconfig |4 ++ include/configs/T104xRDB.h | 42 + 18 files changed, 220 insertions(+), 15 deletions(-) create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg create mode 100644 configs/T1040D4RDB_NAND_defconfig create mode 100644 configs/T1040D4RDB_SDCARD_defconfig create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig create mode 100644 configs/T1040D4RDB_defconfig create mode 100644 configs/T1042D4RDB_NAND_defconfig create mode 100644 configs/T1042D4RDB_SDCARD_defconfig create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig create mode 100644 configs/T1042D4RDB_defconfig diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 13d9be9..32e044f 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h F: configs/T1040RDB_defconfig F: configs/T1040RDB_NAND_defconfig F: configs/T1040RDB_SPIFLASH_defconfig +F: configs/T1040D4RDB_defconfig +F: configs/T1040D4RDB_NAND_defconfig +F: configs/T1040D4RDB_SPIFLASH_defconfig F: configs/T1042RDB_defconfig +F: configs/T1042D4RDB_defconfig +F: configs/T1042D4RDB_NAND_defconfig +F: configs/T1042D4RDB_SPIFLASH_defconfig F: configs/T1042RDB_PI_defconfig F: configs/T1042RDB_PI_NAND_defconfig F: configs/T1042RDB_PI_SPIFLASH_defconfig @@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD #M:- S: Maintained F: configs/T1040RDB_SDCARD_defconfig +F: configs/T1040D4RDB_SDCARD_defconfig +F: configs/T1042D4RDB_SDCARD_defconfig F: configs/T1042RDB_PI_SDCARD_defconfig T1040RDB_SECURE_BOOT BOARD diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index ac95b5e..66538e2 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -12,6 +12,17 @@ The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. (a personality of T1040 SoC). The board is similar to T1040RDB but is designed specially with low power features targeted for Printing Image Market. +The T1040D4RDB is a Freescale reference board that hosts the T1040 SoC. +The board is re-designed T1040RDB board with following changes : +- Support of DDR4 memory and some enhancements + +The T1042D4RDB is a Freescale reference board that hosts the T1042 SoC. +The board is re-designed T1040RDB board with following changes : +- Support of DDR4 memory +- Support for 0x86 serdes protocol which can support following interfaces +- 2 RGMII's on DTSEC4, DTSEC5 +- 3 SGMII on DTSEC1, DTSEC2 DTSEC3 + Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB - Board Si ProtocolTargeted Market @@ -19,6 +30,8 @@ Board Si
[U-Boot] [PATCH V4] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
T1040D4RDB is re-designed T1040RDB board with following changes :
- Support of DDR4 memory
- Support of 0x66 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
- Support of QE-TDM
Similarily T1042D4RDB is a Freescale reference board that hosts the T1040
SoC. T1042D4RDB is re-designed T1042RDB board with following changes :
- Support of DDR4 memory
- Support for 0x86 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 3 SGMII on DTSEC1, DTSEC2 DTSEC3
- Support of DIU
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
changes from v2 :
- removes checkpatch error
board/freescale/t104xrdb/MAINTAINERS |8 ++
board/freescale/t104xrdb/ddr.c |6
board/freescale/t104xrdb/ddr.h | 13 -
board/freescale/t104xrdb/eth.c | 20 +++--
board/freescale/t104xrdb/t1040d4_rcw.cfg |7 +
board/freescale/t104xrdb/t1042d4_rcw.cfg |7 +
board/freescale/t104xrdb/t104xrdb.c | 17 +--
configs/T1040D4RDB_NAND_defconfig|5
configs/T1040D4RDB_SDCARD_defconfig |5
configs/T1040D4RDB_SPIFLASH_defconfig|5
configs/T1040D4RDB_defconfig |4 +++
configs/T1042D4RDB_NAND_defconfig|5
configs/T1042D4RDB_SDCARD_defconfig |5
configs/T1042D4RDB_SPIFLASH_defconfig|5
configs/T1042D4RDB_defconfig |4 +++
include/configs/T104xRDB.h | 46 --
16 files changed, 148 insertions(+), 14 deletions(-)
create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg
create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg
create mode 100644 configs/T1040D4RDB_NAND_defconfig
create mode 100644 configs/T1040D4RDB_SDCARD_defconfig
create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1040D4RDB_defconfig
create mode 100644 configs/T1042D4RDB_NAND_defconfig
create mode 100644 configs/T1042D4RDB_SDCARD_defconfig
create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1042D4RDB_defconfig
diff --git a/board/freescale/t104xrdb/MAINTAINERS
b/board/freescale/t104xrdb/MAINTAINERS
index 13d9be9..32e044f 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
F: configs/T1040RDB_defconfig
F: configs/T1040RDB_NAND_defconfig
F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040D4RDB_defconfig
+F: configs/T1040D4RDB_NAND_defconfig
+F: configs/T1040D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_defconfig
+F: configs/T1042D4RDB_defconfig
+F: configs/T1042D4RDB_NAND_defconfig
+F: configs/T1042D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_PI_defconfig
F: configs/T1042RDB_PI_NAND_defconfig
F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
#M:-
S: Maintained
F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040D4RDB_SDCARD_defconfig
+F: configs/T1042D4RDB_SDCARD_defconfig
F: configs/T1042RDB_PI_SDCARD_defconfig
T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index e1148e5..3c4eabf 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -91,8 +91,14 @@ found:
popts-zq_en = 1;
/* DHC_EN =1, ODT = 75 Ohm */
+#ifdef CONFIG_SYS_FSL_DDR4
+ popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
+ popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
+ DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
+#else
popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+#endif
}
#if defined(CONFIG_DEEP_SLEEP)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index ab1c32d..eb6ec70 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2
*/
+#ifdef CONFIG_SYS_FSL_DDR4
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+ {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09},
+ {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C},
+#elif defined(CONFIG_SYS_FSL_DDR3)
{2, 833, 4, 4, 6, 0x06060607, 0x08080807},
{2, 833, 0, 4, 6, 0x06060607, 0x08080807},
{2, 1350, 4, 4, 7
[U-Boot] [PATCH V5] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
T1040D4RDB is re-designed T1040RDB board with following changes :
- Support of DDR4 memory
- Support of 0x66 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
- Support of QE-TDM
Similarily T1042D4RDB is a Freescale reference board that hosts the T1040
SoC. T1042D4RDB is re-designed T1042RDB board with following changes :
- Support of DDR4 memory
- Support for 0x86 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 3 SGMII on DTSEC1, DTSEC2 DTSEC3
- Support of DIU
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
changes from v2:
- adds SGMII suport using CPLD
- removes extra endif
changes from v3:
- removes checkpatch error
changes from v4:
- wrong use of defined MACRO in eth.c file, adds macro properly
board/freescale/t104xrdb/MAINTAINERS |8 ++
board/freescale/t104xrdb/ddr.c |6
board/freescale/t104xrdb/ddr.h | 13 -
board/freescale/t104xrdb/eth.c | 20 +++--
board/freescale/t104xrdb/t1040d4_rcw.cfg |7 +
board/freescale/t104xrdb/t1042d4_rcw.cfg |7 +
board/freescale/t104xrdb/t104xrdb.c | 17 +--
configs/T1040D4RDB_NAND_defconfig|5
configs/T1040D4RDB_SDCARD_defconfig |5
configs/T1040D4RDB_SPIFLASH_defconfig|5
configs/T1040D4RDB_defconfig |4 +++
configs/T1042D4RDB_NAND_defconfig|5
configs/T1042D4RDB_SDCARD_defconfig |5
configs/T1042D4RDB_SPIFLASH_defconfig|5
configs/T1042D4RDB_defconfig |4 +++
include/configs/T104xRDB.h | 46 --
16 files changed, 148 insertions(+), 14 deletions(-)
create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg
create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg
create mode 100644 configs/T1040D4RDB_NAND_defconfig
create mode 100644 configs/T1040D4RDB_SDCARD_defconfig
create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1040D4RDB_defconfig
create mode 100644 configs/T1042D4RDB_NAND_defconfig
create mode 100644 configs/T1042D4RDB_SDCARD_defconfig
create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1042D4RDB_defconfig
diff --git a/board/freescale/t104xrdb/MAINTAINERS
b/board/freescale/t104xrdb/MAINTAINERS
index 13d9be9..32e044f 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
F: configs/T1040RDB_defconfig
F: configs/T1040RDB_NAND_defconfig
F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040D4RDB_defconfig
+F: configs/T1040D4RDB_NAND_defconfig
+F: configs/T1040D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_defconfig
+F: configs/T1042D4RDB_defconfig
+F: configs/T1042D4RDB_NAND_defconfig
+F: configs/T1042D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_PI_defconfig
F: configs/T1042RDB_PI_NAND_defconfig
F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
#M:-
S: Maintained
F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040D4RDB_SDCARD_defconfig
+F: configs/T1042D4RDB_SDCARD_defconfig
F: configs/T1042RDB_PI_SDCARD_defconfig
T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index e1148e5..3c4eabf 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -91,8 +91,14 @@ found:
popts-zq_en = 1;
/* DHC_EN =1, ODT = 75 Ohm */
+#ifdef CONFIG_SYS_FSL_DDR4
+ popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
+ popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
+ DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
+#else
popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+#endif
}
#if defined(CONFIG_DEEP_SLEEP)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index ab1c32d..eb6ec70 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2
*/
+#ifdef CONFIG_SYS_FSL_DDR4
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+ {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09},
+ {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C},
+#elif defined
[U-Boot] [PATCH v3] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
T1040D4RDB is re-designed T1040RDB board with following changes :
- Support of DDR4 memory
- Support of 0x66 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
- Support of QE-TDM
Similarily T1042D4RDB is a Freescale reference board that hosts the T1040
SoC. T1042D4RDB is re-designed T1042RDB board with following changes :
- Support of DDR4 memory
- Support for 0x86 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 3 SGMII on DTSEC1, DTSEC2 DTSEC3
- Support of DIU
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
changes from v2 :
- removes checkpatch error
board/freescale/t104xrdb/MAINTAINERS |8 ++
board/freescale/t104xrdb/ddr.c |6
board/freescale/t104xrdb/ddr.h | 13 -
board/freescale/t104xrdb/eth.c | 20 +++--
board/freescale/t104xrdb/t1040d4_rcw.cfg |7 +
board/freescale/t104xrdb/t1042d4_rcw.cfg |7 +
board/freescale/t104xrdb/t104xrdb.c | 17 +--
configs/T1040D4RDB_NAND_defconfig|5
configs/T1040D4RDB_SDCARD_defconfig |5
configs/T1040D4RDB_SPIFLASH_defconfig|5
configs/T1040D4RDB_defconfig |4 +++
configs/T1042D4RDB_NAND_defconfig|5
configs/T1042D4RDB_SDCARD_defconfig |5
configs/T1042D4RDB_SPIFLASH_defconfig|5
configs/T1042D4RDB_defconfig |4 +++
include/configs/T104xRDB.h | 46 --
16 files changed, 148 insertions(+), 14 deletions(-)
create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg
create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg
create mode 100644 configs/T1040D4RDB_NAND_defconfig
create mode 100644 configs/T1040D4RDB_SDCARD_defconfig
create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1040D4RDB_defconfig
create mode 100644 configs/T1042D4RDB_NAND_defconfig
create mode 100644 configs/T1042D4RDB_SDCARD_defconfig
create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1042D4RDB_defconfig
diff --git a/board/freescale/t104xrdb/MAINTAINERS
b/board/freescale/t104xrdb/MAINTAINERS
index 13d9be9..32e044f 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
F: configs/T1040RDB_defconfig
F: configs/T1040RDB_NAND_defconfig
F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040D4RDB_defconfig
+F: configs/T1040D4RDB_NAND_defconfig
+F: configs/T1040D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_defconfig
+F: configs/T1042D4RDB_defconfig
+F: configs/T1042D4RDB_NAND_defconfig
+F: configs/T1042D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_PI_defconfig
F: configs/T1042RDB_PI_NAND_defconfig
F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
#M:-
S: Maintained
F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040D4RDB_SDCARD_defconfig
+F: configs/T1042D4RDB_SDCARD_defconfig
F: configs/T1042RDB_PI_SDCARD_defconfig
T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index e1148e5..3c4eabf 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -91,8 +91,14 @@ found:
popts-zq_en = 1;
/* DHC_EN =1, ODT = 75 Ohm */
+#ifdef CONFIG_SYS_FSL_DDR4
+ popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
+ popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
+ DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
+#else
popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+#endif
}
#if defined(CONFIG_DEEP_SLEEP)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index ab1c32d..eb6ec70 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2
*/
+#ifdef CONFIG_SYS_FSL_DDR4
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+ {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09},
+ {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C},
+#elif defined(CONFIG_SYS_FSL_DDR3)
{2, 833, 4, 4, 6, 0x06060607, 0x08080807},
{2, 833, 0, 4, 6, 0x06060607, 0x08080807},
{2, 1350, 4, 4, 7
[U-Boot] [PATCH: V3] mpc85xx/T104xD4RDB: Add T104xD4RDB boards support
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
T1040D4RDB is re-designed T1040RDB board with following changes :
- Support of DDR4 memory
- Support of 0x66 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
- Support of QE-TDM
Similarily T1042D4RDB is a Freescale reference board that hosts the T1040
SoC. T1042D4RDB is re-designed T1042RDB board with following changes :
- Support of DDR4 memory
- Support for 0x86 serdes protocol which can support following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 3 SGMII on DTSEC1, DTSEC2 DTSEC3
- Support of DIU
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
Changes from V2:
- adds SGMII suport using CPLD
- removes extra endif
board/freescale/t104xrdb/MAINTAINERS |8 ++
board/freescale/t104xrdb/ddr.c |6
board/freescale/t104xrdb/ddr.h | 13 -
board/freescale/t104xrdb/eth.c | 20 +++--
board/freescale/t104xrdb/t1040d4_rcw.cfg |7 +
board/freescale/t104xrdb/t1042d4_rcw.cfg |7 +
board/freescale/t104xrdb/t104xrdb.c | 19 +---
configs/T1040D4RDB_NAND_defconfig|5
configs/T1040D4RDB_SDCARD_defconfig |5
configs/T1040D4RDB_SPIFLASH_defconfig|5
configs/T1040D4RDB_defconfig |4 +++
configs/T1042D4RDB_NAND_defconfig|5
configs/T1042D4RDB_SDCARD_defconfig |5
configs/T1042D4RDB_SPIFLASH_defconfig|5
configs/T1042D4RDB_defconfig |4 +++
include/configs/T104xRDB.h | 46 --
16 files changed, 148 insertions(+), 16 deletions(-)
create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg
create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg
create mode 100644 configs/T1040D4RDB_NAND_defconfig
create mode 100644 configs/T1040D4RDB_SDCARD_defconfig
create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1040D4RDB_defconfig
create mode 100644 configs/T1042D4RDB_NAND_defconfig
create mode 100644 configs/T1042D4RDB_SDCARD_defconfig
create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1042D4RDB_defconfig
diff --git a/board/freescale/t104xrdb/MAINTAINERS
b/board/freescale/t104xrdb/MAINTAINERS
index 13d9be9..32e044f 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
F: configs/T1040RDB_defconfig
F: configs/T1040RDB_NAND_defconfig
F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040D4RDB_defconfig
+F: configs/T1040D4RDB_NAND_defconfig
+F: configs/T1040D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_defconfig
+F: configs/T1042D4RDB_defconfig
+F: configs/T1042D4RDB_NAND_defconfig
+F: configs/T1042D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_PI_defconfig
F: configs/T1042RDB_PI_NAND_defconfig
F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
#M:-
S: Maintained
F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040D4RDB_SDCARD_defconfig
+F: configs/T1042D4RDB_SDCARD_defconfig
F: configs/T1042RDB_PI_SDCARD_defconfig
T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index e1148e5..3c4eabf 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -91,8 +91,14 @@ found:
popts-zq_en = 1;
/* DHC_EN =1, ODT = 75 Ohm */
+#ifdef CONFIG_SYS_FSL_DDR4
+ popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
+ popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
+ DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
+#else
popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+#endif
}
#if defined(CONFIG_DEEP_SLEEP)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index ab1c32d..eb6ec70 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2
*/
+#ifdef CONFIG_SYS_FSL_DDR4
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+ {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09},
+ {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C},
+#elif defined(CONFIG_SYS_FSL_DDR3)
{2, 833, 4, 4, 6, 0x06060607, 0x08080807},
{2, 833, 0, 4, 6, 0x06060607, 0x08080807
[U-Boot] [PATCH v3] powerpc/t1040qds: Add support of SD boot for T1040QDS Board
Add support of 2 stage SD boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- Update tlb and ddr accordingly
Add T1040QDS_SDCARD_defconfig
Update t1040_pbi.cfg to support errata A-007662, A-008007 and LAW for CPC1
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
changes from v2:
- Updated Copyright to 2015
- Updated board_need_mem_reset, now it resets DDR by default, earlier
it was disabling the reset for NOR boot which is wrong
- tested NOR boot and SD boot
arch/powerpc/cpu/mpc85xx/Kconfig |1 +
board/freescale/t1040qds/MAINTAINERS |5 +
board/freescale/t1040qds/Makefile | 10 +-
board/freescale/t1040qds/ddr.c |4 +
board/freescale/t1040qds/spl.c | 160
board/freescale/t1040qds/t1040_pbi.cfg | 16 +++-
board/freescale/t1040qds/tlb.c | 11 +++
configs/T1040QDS_SDCARD_defconfig |5 +
include/configs/T1040QDS.h | 88 ++
9 files changed, 277 insertions(+), 23 deletions(-)
create mode 100644 board/freescale/t1040qds/spl.c
create mode 100644 configs/T1040QDS_SDCARD_defconfig
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index adb5bd3..635f649 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -109,6 +109,7 @@ config TARGET_T102XRDB
config TARGET_T1040QDS
bool Support T1040QDS
+ select SUPPORT_SPL
config TARGET_T104XRDB
bool Support T104xRDB
diff --git a/board/freescale/t1040qds/MAINTAINERS
b/board/freescale/t1040qds/MAINTAINERS
index 83f6b3c..44d56b6 100644
--- a/board/freescale/t1040qds/MAINTAINERS
+++ b/board/freescale/t1040qds/MAINTAINERS
@@ -6,6 +6,11 @@ F: include/configs/T1040QDS.h
F: configs/T1040QDS_defconfig
F: configs/T1040QDS_D4_defconfig
+T1040QDS_SDCARD BOARD
+M: Priyanka Jain priyanka.j...@freescale.com
+S: Maintained
+F: configs/T1040QDS_SDCARD_defconfig
+
T1040QDS_SECURE_BOOT BOARD
M: Aneesh Bansal aneesh.ban...@freescale.com
S: Maintained
diff --git a/board/freescale/t1040qds/Makefile
b/board/freescale/t1040qds/Makefile
index 19ed21b..27eed4c 100644
--- a/board/freescale/t1040qds/Makefile
+++ b/board/freescale/t1040qds/Makefile
@@ -4,10 +4,14 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+else
obj-y += t1040qds.o
-obj-y += ddr.o
+obj-y += eth.o
obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_FSL_DIU_FB) += diu.o
+endif
+obj-y += ddr.o
obj-y += law.o
obj-y += tlb.o
-obj-y += eth.o
-obj-y += diu.o
diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c
index 8240240..74ad109 100644
--- a/board/freescale/t1040qds/ddr.c
+++ b/board/freescale/t1040qds/ddr.c
@@ -118,6 +118,7 @@ phys_size_t initdram(int board_type)
{
phys_size_t dram_size;
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
puts(Initializingusing SPD\n);
dram_size = fsl_ddr_sdram();
@@ -126,6 +127,9 @@ phys_size_t initdram(int board_type)
dram_size *= 0x10;
puts(DDR: );
+#else
+ dram_size = fsl_ddr_sdram_size();
+#endif
#if defined(CONFIG_DEEP_SLEEP) !defined(CONFIG_SPL_BUILD)
fsl_dp_resume();
diff --git a/board/freescale/t1040qds/spl.c b/board/freescale/t1040qds/spl.c
new file mode 100644
index 000..51c5fbd
--- /dev/null
+++ b/board/freescale/t1040qds/spl.c
@@ -0,0 +1,160 @@
+/* Copyright 2015 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include ns16550.h
+#include nand.h
+#include i2c.h
+#include mmc.h
+#include fsl_esdhc.h
+#include spi_flash.h
+#include ../common/qixis.h
+#include t1040qds_qixis.h
+#include asm/mpc85xx_gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+phys_size_t get_effective_memsize(void)
+{
+ return CONFIG_SYS_L3_SIZE;
+}
+
+unsigned long get_board_sys_clk(void)
+{
+ u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+
+ switch (sysclk_conf 0x0F) {
+ case QIXIS_SYSCLK_64:
+ return 6400;
+ case QIXIS_SYSCLK_83:
+ return 8333;
+ case QIXIS_SYSCLK_100:
+ return 1;
+ case QIXIS_SYSCLK_125:
+ return 12500;
+ case QIXIS_SYSCLK_133:
+ return 1;
+ case QIXIS_SYSCLK_150:
+ return 15000;
+ case QIXIS_SYSCLK_160:
+ return 16000;
+ case QIXIS_SYSCLK_166:
+ return 1;
+ }
+ return ;
+}
+
+unsigned long get_board_ddr_clk(void
[U-Boot] [PATCH] powerpc/T104xD4RDB: Add T1040/T1042D4RDB boards support
T1040D4RDB is a Freescale reference board that hosts the T1040 SoC.
It is similar to T1040RDB board with the following differences :
- Has DDR4 memory
- PHY ports have different PHY addresses
- RTC support
- Both QE-TDM and DIU connector
T1040D4RDB supports 0x66 serdes protocol with following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
T1042D4RDB is variant of T1040D4RDB which hosts T1042 SoC
(Personality of T1040 without L2 switch)
T1042D4RDB supports 0x86 serdes protocol with following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 3 SGMII on DTSEC1, DTSEC2 DTSEC3
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
board/freescale/t104xrdb/MAINTAINERS |8 ++
board/freescale/t104xrdb/ddr.c |7 +
board/freescale/t104xrdb/ddr.h | 12
board/freescale/t104xrdb/eth.c | 20 +++--
board/freescale/t104xrdb/t1040d4_rcw.cfg |7 +
board/freescale/t104xrdb/t1042d4_rcw.cfg |7 +
configs/T1040D4RDB_NAND_defconfig|5
configs/T1040D4RDB_SDCARD_defconfig |5
configs/T1040D4RDB_SPIFLASH_defconfig|5
configs/T1040D4RDB_defconfig |4 +++
configs/T1042D4RDB_NAND_defconfig|5
configs/T1042D4RDB_SDCARD_defconfig |5
configs/T1042D4RDB_SPIFLASH_defconfig|5
configs/T1042D4RDB_defconfig |4 +++
include/configs/T104xRDB.h | 46 --
15 files changed, 134 insertions(+), 11 deletions(-)
create mode 100644 board/freescale/t104xrdb/t1040d4_rcw.cfg
create mode 100644 board/freescale/t104xrdb/t1042d4_rcw.cfg
create mode 100644 configs/T1040D4RDB_NAND_defconfig
create mode 100644 configs/T1040D4RDB_SDCARD_defconfig
create mode 100644 configs/T1040D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1040D4RDB_defconfig
create mode 100644 configs/T1042D4RDB_NAND_defconfig
create mode 100644 configs/T1042D4RDB_SDCARD_defconfig
create mode 100644 configs/T1042D4RDB_SPIFLASH_defconfig
create mode 100644 configs/T1042D4RDB_defconfig
diff --git a/board/freescale/t104xrdb/MAINTAINERS
b/board/freescale/t104xrdb/MAINTAINERS
index 13d9be9..32e044f 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
F: configs/T1040RDB_defconfig
F: configs/T1040RDB_NAND_defconfig
F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040D4RDB_defconfig
+F: configs/T1040D4RDB_NAND_defconfig
+F: configs/T1040D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_defconfig
+F: configs/T1042D4RDB_defconfig
+F: configs/T1042D4RDB_NAND_defconfig
+F: configs/T1042D4RDB_SPIFLASH_defconfig
F: configs/T1042RDB_PI_defconfig
F: configs/T1042RDB_PI_NAND_defconfig
F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
#M:-
S: Maintained
F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040D4RDB_SDCARD_defconfig
+F: configs/T1042D4RDB_SDCARD_defconfig
F: configs/T1042RDB_PI_SDCARD_defconfig
T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index e1148e5..217c8ea 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -91,9 +91,16 @@ found:
popts-zq_en = 1;
/* DHC_EN =1, ODT = 75 Ohm */
+#ifdef CONFIG_SYS_FSL_DDR4
+ popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
+ popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
+ DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
+#else
popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+#endif
}
+#endif
#if defined(CONFIG_DEEP_SLEEP)
void board_mem_sleep_setup(void)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index ab1c32d..5d7124a 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -28,6 +28,13 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2
*/
+#ifdef CONFIG_SYS_FSL_DDR4
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+ {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 1666, 0, 4, 6, 0x0708090B, 0x0C0D0E09},
+ {1, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A},
+ {1, 2200, 0, 4, 7, 0x08090A0D, 0x0F0F100C},
+#elif defined(CONFIG_SYS_FSL_DDR3)
{2, 833, 4, 4, 6, 0x06060607, 0x08080807},
{2, 833, 0, 4, 6, 0x06060607, 0x08080807},
{2, 1350, 4, 4, 7, 0x0708080A, 0x0A0B0C09},
@@ -40,9 +47,14 @@ static const struct board_specific_parameters udimm0
[U-Boot] [PATCH] mpc85xx/t104xrdb : remove raw timing parameter
This board actually uses DIMM, so removing unnecessary raw timing
parameter code.
Signed-off-by: Vijay Rai vijay@freescale.com
---
board/freescale/t104xrdb/ddr.c | 15 ---
board/freescale/t104xrdb/ddr.h | 29 -
include/configs/T104xRDB.h |1 -
3 files changed, 45 deletions(-)
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 5aa11b1..e1148e5 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -16,21 +16,6 @@
DECLARE_GLOBAL_DATA_PTR;
-int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
- unsigned int controller_number,
- unsigned int dimm_number)
-{
- const char dimm_model[] = RAW timing DDR;
-
- if ((controller_number == 0) (dimm_number == 0)) {
- memcpy(pdimm, ddr_raw_timing, sizeof(dimm_params_t));
- memset(pdimm-mpart, 0, sizeof(pdimm-mpart));
- memcpy(pdimm-mpart, dimm_model, sizeof(dimm_model) - 1);
- }
-
- return 0;
-}
-
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
unsigned int ctrl_num)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index 09b30b9..ab1c32d 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -6,35 +6,6 @@
#ifndef __DDR_H__
#define __DDR_H__
-dimm_params_t ddr_raw_timing = {
- .n_ranks = 2,
- .rank_density = 2147483648u,
- .capacity = 4294967296u,
- .primary_sdram_width = 64,
- .ec_sdram_width = 8,
- .registered_dimm = 0,
- .mirrored_dimm = 0,
- .n_row_addr = 15,
- .n_col_addr = 10,
- .n_banks_per_sdram_device = 8,
- .edc_config = 2,/* ECC */
- .burst_lengths_bitmask = 0x0c,
- .tckmin_x_ps = 1071,
- .caslat_x = 0xfe 4, /* 5,6,7,8,9,10,11 */
- .taa_ps = 13125,
- .twr_ps = 15000,
- .trcd_ps = 13125,
- .trrd_ps = 6000,
- .trp_ps = 13125,
- .tras_ps = 34000,
- .trc_ps = 48125,
- .trfc_ps = 26,
- .twtr_ps = 7500,
- .trtp_ps = 7500,
- .refresh_rate_ps = 780,
- .tfaw_ps = 35000,
-};
-
struct board_specific_parameters {
u32 n_ranks;
u32 datarate_mhz_high;
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index d47f1be..5263318 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -220,7 +220,6 @@
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
#define CONFIG_DDR_SPD
-#define CONFIG_SYS_DDR_RAW_TIMING
#define CONFIG_SYS_FSL_DDR3
#define CONFIG_SYS_SPD_BUS_NUM 0
--
1.7.9.5
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[U-Boot] [PATCH] mpc85xx/T104xRDB_D4: Add support for T104xRDB DDR4 boards
T1040RDB_D4 board is a variant of T1040RDB(DDR3) board with DDR4 memory.
Similarily T1042RDB_D4 is a variant of T1042RDB(DDR3) board with DDR4
memory.
Changes related to Ethernet
- Add support for 0x66 serdes protocol for T1040RDB_D4 Board
- Add support for 0x86 serdes protocol for T1042RDB_D4 Board
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
board/freescale/t104xrdb/MAINTAINERS |8 +
board/freescale/t104xrdb/ddr.c|8 +
board/freescale/t104xrdb/ddr.h| 12
board/freescale/t104xrdb/eth.c| 20 +++--
board/freescale/t104xrdb/t1040_d4_rcw.cfg |7 +
board/freescale/t104xrdb/t1042_d4_rcw.cfg |7 +
configs/T1040RDB_D4_NAND_defconfig|5
configs/T1040RDB_D4_SDCARD_defconfig |5
configs/T1040RDB_D4_SPIFLASH_defconfig|5
configs/T1040RDB_D4_defconfig |4 +++
configs/T1042RDB_D4_NAND_defconfig|5
configs/T1042RDB_D4_SDCARD_defconfig |5
configs/T1042RDB_D4_SPIFLASH_defconfig|5
configs/T1042RDB_D4_defconfig |4 +++
include/configs/T104xRDB.h| 46 +++--
15 files changed, 135 insertions(+), 11 deletions(-)
create mode 100644 board/freescale/t104xrdb/t1040_d4_rcw.cfg
create mode 100644 board/freescale/t104xrdb/t1042_d4_rcw.cfg
create mode 100644 configs/T1040RDB_D4_NAND_defconfig
create mode 100644 configs/T1040RDB_D4_SDCARD_defconfig
create mode 100644 configs/T1040RDB_D4_SPIFLASH_defconfig
create mode 100644 configs/T1040RDB_D4_defconfig
create mode 100644 configs/T1042RDB_D4_NAND_defconfig
create mode 100644 configs/T1042RDB_D4_SDCARD_defconfig
create mode 100644 configs/T1042RDB_D4_SPIFLASH_defconfig
create mode 100644 configs/T1042RDB_D4_defconfig
diff --git a/board/freescale/t104xrdb/MAINTAINERS
b/board/freescale/t104xrdb/MAINTAINERS
index b61e1c0..fc3bebb 100644
--- a/board/freescale/t104xrdb/MAINTAINERS
+++ b/board/freescale/t104xrdb/MAINTAINERS
@@ -6,7 +6,13 @@ F: include/configs/T104xRDB.h
F: configs/T1040RDB_defconfig
F: configs/T1040RDB_NAND_defconfig
F: configs/T1040RDB_SPIFLASH_defconfig
+F: configs/T1040RDB_D4_defconfig
+F: configs/T1040RDB_D4_NAND_defconfig
+F: configs/T1040RDB_D4_SPIFLASH_defconfig
F: configs/T1042RDB_defconfig
+F: configs/T1042RDB_D4_defconfig
+F: configs/T1042RDB_D4_NAND_defconfig
+F: configs/T1042RDB_D4_SPIFLASH_defconfig
F: configs/T1042RDB_PI_defconfig
F: configs/T1042RDB_PI_NAND_defconfig
F: configs/T1042RDB_PI_SPIFLASH_defconfig
@@ -15,6 +21,8 @@ T1040RDB_SDCARD BOARD
#M:-
S: Maintained
F: configs/T1040RDB_SDCARD_defconfig
+F: configs/T1040RDB_D4_SDCARD_defconfig
+F: configs/T1042RDB_D4_SDCARD_defconfig
F: configs/T1042RDB_PI_SDCARD_defconfig
T1040RDB_SECURE_BOOT BOARD
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 5aa11b1..b5083fe 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -16,6 +16,7 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_SYS_FSL_DDR3
int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
unsigned int controller_number,
unsigned int dimm_number)
@@ -30,6 +31,7 @@ int fsl_ddr_get_dimm_params(dimm_params_t *pdimm,
return 0;
}
+#endif
void fsl_ddr_board_options(memctl_options_t *popts,
dimm_params_t *pdimm,
@@ -106,8 +108,14 @@ found:
popts-zq_en = 1;
/* DHC_EN =1, ODT = 75 Ohm */
+#ifdef CONFIG_SYS_FSL_DDR4
+ popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm);
+ popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) |
+ DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */
+#else
popts-ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm);
popts-ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm);
+#endif
}
#if defined(CONFIG_DEEP_SLEEP)
diff --git a/board/freescale/t104xrdb/ddr.h b/board/freescale/t104xrdb/ddr.h
index 09b30b9..15175aa 100644
--- a/board/freescale/t104xrdb/ddr.h
+++ b/board/freescale/t104xrdb/ddr.h
@@ -6,6 +6,7 @@
#ifndef __DDR_H__
#define __DDR_H__
+#ifdef CONFIG_SYS_FSL_DDR3
dimm_params_t ddr_raw_timing = {
.n_ranks = 2,
.rank_density = 2147483648u,
@@ -34,6 +35,7 @@ dimm_params_t ddr_raw_timing = {
.refresh_rate_ps = 780,
.tfaw_ps = 35000,
};
+#endif
struct board_specific_parameters {
u32 n_ranks;
@@ -57,6 +59,13 @@ static const struct board_specific_parameters udimm0[] = {
* num| hi| rank| clk| wrlvl | wrlvl
* ranks| mhz| GB |adjst| start | ctl2
*/
+#ifdef CONFIG_SYS_FSL_DDR4
+ {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A},
+ {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A
[U-Boot] [PATCH v2] powerpc/t1040qds: Add support of SD boot for T1040QDS Board
Add support of 2 stage SD boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- Update tlb and ddr accordingly
Add T1040QDS_SDCARD_defconfig
Update t1040_pbi.cfg to support errata A-007662, A-008007 and LAW for CPC1
Signed-off-by: Vijay Rai vijay@freescale.com
---
changes from v1:
-Updated Kconfig to support SPL option for T1040QDS
arch/powerpc/cpu/mpc85xx/Kconfig |1 +
board/freescale/t1040qds/MAINTAINERS |5 ++
board/freescale/t1040qds/Makefile | 10 ++-
board/freescale/t1040qds/ddr.c |5 +-
board/freescale/t1040qds/spl.c | 155
board/freescale/t1040qds/t1040_pbi.cfg | 16 +++-
board/freescale/t1040qds/t1040qds.c|6 +-
board/freescale/t1040qds/tlb.c | 11 +++
configs/T1040QDS_SDCARD_defconfig |5 ++
include/configs/T1040QDS.h | 79 +---
10 files changed, 273 insertions(+), 20 deletions(-)
create mode 100644 board/freescale/t1040qds/spl.c
create mode 100644 configs/T1040QDS_SDCARD_defconfig
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 7501eb4..7177c83 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -120,6 +120,7 @@ config TARGET_T102XRDB
config TARGET_T1040QDS
bool Support T1040QDS
+ select SUPPORT_SPL
config TARGET_T104XRDB
bool Support T104xRDB
diff --git a/board/freescale/t1040qds/MAINTAINERS
b/board/freescale/t1040qds/MAINTAINERS
index 83f6b3c..44d56b6 100644
--- a/board/freescale/t1040qds/MAINTAINERS
+++ b/board/freescale/t1040qds/MAINTAINERS
@@ -6,6 +6,11 @@ F: include/configs/T1040QDS.h
F: configs/T1040QDS_defconfig
F: configs/T1040QDS_D4_defconfig
+T1040QDS_SDCARD BOARD
+M: Priyanka Jain priyanka.j...@freescale.com
+S: Maintained
+F: configs/T1040QDS_SDCARD_defconfig
+
T1040QDS_SECURE_BOOT BOARD
M: Aneesh Bansal aneesh.ban...@freescale.com
S: Maintained
diff --git a/board/freescale/t1040qds/Makefile
b/board/freescale/t1040qds/Makefile
index 19ed21b..27eed4c 100644
--- a/board/freescale/t1040qds/Makefile
+++ b/board/freescale/t1040qds/Makefile
@@ -4,10 +4,14 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+else
obj-y += t1040qds.o
-obj-y += ddr.o
+obj-y += eth.o
obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_FSL_DIU_FB) += diu.o
+endif
+obj-y += ddr.o
obj-y += law.o
obj-y += tlb.o
-obj-y += eth.o
-obj-y += diu.o
diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c
index 43f952f..6147430 100644
--- a/board/freescale/t1040qds/ddr.c
+++ b/board/freescale/t1040qds/ddr.c
@@ -104,13 +104,16 @@ phys_size_t initdram(int board_type)
{
phys_size_t dram_size;
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
puts(Initializingusing SPD\n);
dram_size = fsl_ddr_sdram();
dram_size = setup_ddr_tlbs(dram_size / 0x10);
dram_size *= 0x10;
-
puts(DDR: );
+#else
+ dram_size = fsl_ddr_sdram_size();
+#endif
return dram_size;
}
diff --git a/board/freescale/t1040qds/spl.c b/board/freescale/t1040qds/spl.c
new file mode 100644
index 000..b601c95
--- /dev/null
+++ b/board/freescale/t1040qds/spl.c
@@ -0,0 +1,155 @@
+/* Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include ns16550.h
+#include nand.h
+#include i2c.h
+#include mmc.h
+#include fsl_esdhc.h
+#include spi_flash.h
+#include ../common/qixis.h
+#include t1040qds_qixis.h
+#include asm/mpc85xx_gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+phys_size_t get_effective_memsize(void)
+{
+ return CONFIG_SYS_L3_SIZE;
+}
+
+unsigned long get_board_sys_clk(void)
+{
+ u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+
+ switch (sysclk_conf 0x0F) {
+ case QIXIS_SYSCLK_64:
+ return 6400;
+ case QIXIS_SYSCLK_83:
+ return 8333;
+ case QIXIS_SYSCLK_100:
+ return 1;
+ case QIXIS_SYSCLK_125:
+ return 12500;
+ case QIXIS_SYSCLK_133:
+ return 1;
+ case QIXIS_SYSCLK_150:
+ return 15000;
+ case QIXIS_SYSCLK_160:
+ return 16000;
+ case QIXIS_SYSCLK_166:
+ return 1;
+ }
+ return ;
+}
+
+unsigned long get_board_ddr_clk(void)
+{
+ u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+
+ switch ((ddrclk_conf 0x30) 4) {
+ case QIXIS_DDRCLK_100:
+ return 1;
+ case QIXIS_DDRCLK_125
[U-Boot] [PATCH] powerpc/t104x: Convert to use generic board code
Convert T1040QDS and T1040RDB to use generic board code. Signed-off-by: Vijay Rai vijay@freescale.com --- Tested for : NOR, NAND, SPI, SD bootloader for T104xRDB boards NOR bootloader for T104xQDS Boards include/configs/T1040QDS.h |2 ++ include/configs/T104xRDB.h |2 ++ 2 files changed, 4 insertions(+) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 1d0664d..22932e9 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -28,6 +28,8 @@ */ #define CONFIG_T1040QDS #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 2bb86e4..4b12639 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -12,6 +12,8 @@ */ #define CONFIG_T104xRDB #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/t1040qds: Add support of SD boot for T1040QDS Board
Add support of 2 stage SD boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(160KB). This further
initialise DDR using SPD environment and copy u-boot(768 KB) from NAND to DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for SPL framework
- Add spl.c which defines board_init_f, board_init_r
- Update tlb and ddr accordingly
Add T1040QDS_SDCARD_defconfig
Update t1040_pbi.cfg to support errata A-007662, A-008007 and LAW for CPC1
Signed-off-by: Vijay Rai vijay@freescale.com
---
board/freescale/t1040qds/MAINTAINERS |5 ++
board/freescale/t1040qds/Makefile | 10 ++-
board/freescale/t1040qds/ddr.c |5 +-
board/freescale/t1040qds/spl.c | 155
board/freescale/t1040qds/t1040_pbi.cfg | 16 +++-
board/freescale/t1040qds/t1040qds.c|6 +-
board/freescale/t1040qds/tlb.c | 11 +++
configs/T1040QDS_SDCARD_defconfig |5 ++
include/configs/T1040QDS.h | 85 ++
9 files changed, 275 insertions(+), 23 deletions(-)
create mode 100644 board/freescale/t1040qds/spl.c
create mode 100644 configs/T1040QDS_SDCARD_defconfig
diff --git a/board/freescale/t1040qds/MAINTAINERS
b/board/freescale/t1040qds/MAINTAINERS
index 83f6b3c..44d56b6 100644
--- a/board/freescale/t1040qds/MAINTAINERS
+++ b/board/freescale/t1040qds/MAINTAINERS
@@ -6,6 +6,11 @@ F: include/configs/T1040QDS.h
F: configs/T1040QDS_defconfig
F: configs/T1040QDS_D4_defconfig
+T1040QDS_SDCARD BOARD
+M: Priyanka Jain priyanka.j...@freescale.com
+S: Maintained
+F: configs/T1040QDS_SDCARD_defconfig
+
T1040QDS_SECURE_BOOT BOARD
M: Aneesh Bansal aneesh.ban...@freescale.com
S: Maintained
diff --git a/board/freescale/t1040qds/Makefile
b/board/freescale/t1040qds/Makefile
index 19ed21b..27eed4c 100644
--- a/board/freescale/t1040qds/Makefile
+++ b/board/freescale/t1040qds/Makefile
@@ -4,10 +4,14 @@
# SPDX-License-Identifier: GPL-2.0+
#
+ifdef CONFIG_SPL_BUILD
+obj-y += spl.o
+else
obj-y += t1040qds.o
-obj-y += ddr.o
+obj-y += eth.o
obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_FSL_DIU_FB) += diu.o
+endif
+obj-y += ddr.o
obj-y += law.o
obj-y += tlb.o
-obj-y += eth.o
-obj-y += diu.o
diff --git a/board/freescale/t1040qds/ddr.c b/board/freescale/t1040qds/ddr.c
index 43f952f..6147430 100644
--- a/board/freescale/t1040qds/ddr.c
+++ b/board/freescale/t1040qds/ddr.c
@@ -104,13 +104,16 @@ phys_size_t initdram(int board_type)
{
phys_size_t dram_size;
+#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_RAMBOOT_PBL)
puts(Initializingusing SPD\n);
dram_size = fsl_ddr_sdram();
dram_size = setup_ddr_tlbs(dram_size / 0x10);
dram_size *= 0x10;
-
puts(DDR: );
+#else
+ dram_size = fsl_ddr_sdram_size();
+#endif
return dram_size;
}
diff --git a/board/freescale/t1040qds/spl.c b/board/freescale/t1040qds/spl.c
new file mode 100644
index 000..b601c95
--- /dev/null
+++ b/board/freescale/t1040qds/spl.c
@@ -0,0 +1,155 @@
+/* Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#include common.h
+#include malloc.h
+#include ns16550.h
+#include nand.h
+#include i2c.h
+#include mmc.h
+#include fsl_esdhc.h
+#include spi_flash.h
+#include ../common/qixis.h
+#include t1040qds_qixis.h
+#include asm/mpc85xx_gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+phys_size_t get_effective_memsize(void)
+{
+ return CONFIG_SYS_L3_SIZE;
+}
+
+unsigned long get_board_sys_clk(void)
+{
+ u8 sysclk_conf = QIXIS_READ(brdcfg[1]);
+
+ switch (sysclk_conf 0x0F) {
+ case QIXIS_SYSCLK_64:
+ return 6400;
+ case QIXIS_SYSCLK_83:
+ return 8333;
+ case QIXIS_SYSCLK_100:
+ return 1;
+ case QIXIS_SYSCLK_125:
+ return 12500;
+ case QIXIS_SYSCLK_133:
+ return 1;
+ case QIXIS_SYSCLK_150:
+ return 15000;
+ case QIXIS_SYSCLK_160:
+ return 16000;
+ case QIXIS_SYSCLK_166:
+ return 1;
+ }
+ return ;
+}
+
+unsigned long get_board_ddr_clk(void)
+{
+ u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
+
+ switch ((ddrclk_conf 0x30) 4) {
+ case QIXIS_DDRCLK_100:
+ return 1;
+ case QIXIS_DDRCLK_125:
+ return 12500;
+ case QIXIS_DDRCLK_133:
+ return 1;
+ }
+ return ;
+}
+
+#define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF80
+void board_init_f(ulong bootflag)
+{
+ u32 plat_ratio, sys_clk, uart_clk;
+#ifdef CONFIG_SPL_NAND_BOOT
+ u32 porsr1, pinctl;
+#endif
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+
+#ifdef CONFIG_SPL_NAND_BOOT
+ /*
+* There is T1040 SoC issue where NOR, FPGA
[U-Boot] [PATCH] powerpc/t104xrdb: make T104x board compliant in u-boot
When booted with upstream code, it shows error in u-boot that board is not compliant. This patch will make board compliant with upstream code changes in u-boot. Signed-off-by: Vijay Rai vijay@freescale.com --- include/configs/T1040QDS.h |2 ++ include/configs/T104xRDB.h |2 ++ 2 files changed, 4 insertions(+) diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index ebee89a..602cc94 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -28,6 +28,8 @@ */ #define CONFIG_T1040QDS #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index c4bf0d6..341dad9 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -12,6 +12,8 @@ */ #define CONFIG_T104xRDB #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_DISPLAY_BOARDINFO #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] powerpc/t104xrdb: Disable DTSEC1 and DTSEC2 on T1042RDB
As the board was basically designed for T1040RDB so there are 5 DTSEC ports,
DTSEC1 and DTSEC2 are connected to L2 switch and not usable in T1042 mode
only 3 ports DTSEC3 to DTSEC5 are usable
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
board/freescale/t104xrdb/eth.c |2 +-
drivers/net/fm/t1040.c | 15 +++
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c
index c8b6c67..f84ee2d 100644
--- a/board/freescale/t104xrdb/eth.c
+++ b/board/freescale/t104xrdb/eth.c
@@ -47,7 +47,7 @@ int board_eth_init(bd_t *bis)
case PHY_INTERFACE_MODE_SGMII:
/* T1042RDB doesn't supports SGMII on DTSEC1 DTSEC2 */
if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i))
- fm_info_set_phy_address(i, 0);
+ fm_disable_port(i);
/* T1042RDB only supports SGMII on DTSEC3 */
fm_info_set_phy_address(FM1_DTSEC3,
CONFIG_SYS_SGMII1_PHY_ADDR);
diff --git a/drivers/net/fm/t1040.c b/drivers/net/fm/t1040.c
index bcc871d..1e03662 100644
--- a/drivers/net/fm/t1040.c
+++ b/drivers/net/fm/t1040.c
@@ -10,6 +10,21 @@
#include asm/immap_85xx.h
#include asm/fsl_serdes.h
+u32 port_to_devdisr[] = {
+ [FM1_DTSEC1] = FSL_CORENET_DEVDISR2_DTSEC1_1,
+ [FM1_DTSEC2] = FSL_CORENET_DEVDISR2_DTSEC1_2,
+ [FM1_DTSEC3] = FSL_CORENET_DEVDISR2_DTSEC1_3,
+ [FM1_DTSEC4] = FSL_CORENET_DEVDISR2_DTSEC1_4,
+ [FM1_DTSEC5] = FSL_CORENET_DEVDISR2_DTSEC1_5,
+};
+
+void fman_disable_port(enum fm_port port)
+{
+ ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+ setbits_be32(gur-devdisr2, port_to_devdisr[port]);
+}
+
phy_interface_t fman_port_enet_if(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
--
1.7.9.5
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[U-Boot] [PATCH v4] powerpc/t104xrdb: Add T1042RDB board support
T1042RDB is a Freescale reference board that hosts the T1042 SoC (and variants). The board is similar to T1040RDB, T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). T1042RDB is configured with serdes protocol 0x86 which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 DTSEC1, DTSEC2 are not connected on board. This Patch - add T1042RDB support - updates README file for T1042RDB details and update commands for switching to alternate banks from vBank0 to vBank4 and vice versa This patch also does minor clean ups for fdt defines for T1042RDB and T1042RDB_PI board Signed-off-by: Vijay Rai vijay@freescale.com Signed-off-by: Priyanka Jain priyanka.j...@freescale.com --- changes for v4: There are some changes regarding Kconfig, Added configs/T1042RDB_defconfig file to support T1042RDB,added T1042RDB as config option into board/freescale/t104xrdb/MAINTAINERS board/freescale/t104xrdb/MAINTAINERS |1 + board/freescale/t104xrdb/README | 17 +++-- board/freescale/t104xrdb/eth.c | 10 ++ configs/T1042RDB_defconfig |4 include/configs/T104xRDB.h | 15 --- 5 files changed, 38 insertions(+), 9 deletions(-) create mode 100644 configs/T1042RDB_defconfig diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 364b0a9..62aae2f 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -6,6 +6,7 @@ F: include/configs/T104xRDB.h F: configs/T1040RDB_defconfig F: configs/T1040RDB_NAND_defconfig F: configs/T1040RDB_SPIFLASH_defconfig +F: configs/T1042RDB_defconfig F: configs/T1042RDB_PI_defconfig F: configs/T1042RDB_PI_NAND_defconfig F: configs/T1042RDB_PI_SPIFLASH_defconfig diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index cdbe1fa..a0f5fa9 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -4,10 +4,23 @@ The T1040RDB is a Freescale reference board that hosts the T1040 SoC (and variants). Variants inclued T1042 presonality of T1040, in which case T1040RDB can also be called T1042RDB. +The T1042RDB is a Freescale reference board that hosts the T1042 SoC +(and variants). The board is similar to T1040RDB, T1040 is a reduced +personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). + The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. (a personality of T1040 SoC). The board is similar to T1040RDB but is designed specially with low power features targeted for Printing Image Market. +Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB +- +Board Si ProtocolTargeted Market +- +T1040RDB T1040 0x66Networking +T1040RDB T1042 0x86Networking +T1042RDB_PIT1042 0x06Printing Imaging + + T1040 SoC Overview -- The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA @@ -194,10 +207,10 @@ The below commands apply to the board Commands for switching to alternate bank. 1. To change from vbank0 to vbank4 - = qixis_reset altbank (it will boot using vbank4) + = cpld reset altbank (it will boot using vbank4) 2.To change from vbank4 to vbank0 - = qixis reset (it will boot using vbank0) + = cpld reset (it will boot using vbank0) NAND boot with 2 Stage boot loader -- diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 63e5f90..c8b6c67 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,6 +43,16 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042RDB doesn't supports SGMII on DTSEC1 DTSEC2 */ + if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) + fm_info_set_phy_address(i, 0); + /* T1042RDB only supports SGMII on DTSEC3 */ + fm_info_set_phy_address(FM1_DTSEC3, + CONFIG_SYS_SGMII1_PHY_ADDR); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig new file mode 100644 index 000..85eceb9 --- /dev/null +++ b/configs
[U-Boot] [PATCH v3] powerpc/t104xrdb: Add T1042RDB board support
T1042RDB is a Freescale reference board that hosts the T1042 SoC (and variants). The board is similar to T1040RDB, T1042 is a reduced personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). T1042RDB is configured with serdes protocol 0x86 which can support following interfaces - 2 RGMII's on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 DTSEC1, DTSEC2 are not connected on board. This Patch - add T1042RDB support - updates README file for T1042RDB details and update commands for switching to alternate banks from vBank0 to vBank4 and vice versa This patch also does minor clean ups for fdt defines for T1042RDB and T1042RDB_PI board Signed-off-by: Vijay Rai vijay@freescale.com Signed-off-by: Priyanka Jain priyanka.j...@freescale.com --- board/freescale/t104xrdb/README | 17 +++-- board/freescale/t104xrdb/eth.c | 10 ++ boards.cfg |1 + include/configs/T104xRDB.h | 15 --- 4 files changed, 34 insertions(+), 9 deletions(-) diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index cdbe1fa..a0f5fa9 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -4,10 +4,23 @@ The T1040RDB is a Freescale reference board that hosts the T1040 SoC (and variants). Variants inclued T1042 presonality of T1040, in which case T1040RDB can also be called T1042RDB. +The T1042RDB is a Freescale reference board that hosts the T1042 SoC +(and variants). The board is similar to T1040RDB, T1040 is a reduced +personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). + The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. (a personality of T1040 SoC). The board is similar to T1040RDB but is designed specially with low power features targeted for Printing Image Market. +Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB +- +Board Si ProtocolTargeted Market +- +T1040RDB T1040 0x66Networking +T1040RDB T1042 0x86Networking +T1042RDB_PIT1042 0x06Printing Imaging + + T1040 SoC Overview -- The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA @@ -194,10 +207,10 @@ The below commands apply to the board Commands for switching to alternate bank. 1. To change from vbank0 to vbank4 - = qixis_reset altbank (it will boot using vbank4) + = cpld reset altbank (it will boot using vbank4) 2.To change from vbank4 to vbank0 - = qixis reset (it will boot using vbank0) + = cpld reset (it will boot using vbank0) NAND boot with 2 Stage boot loader -- diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 63e5f90..c8b6c67 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,6 +43,16 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042RDB doesn't supports SGMII on DTSEC1 DTSEC2 */ + if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) + fm_info_set_phy_address(i, 0); + /* T1042RDB only supports SGMII on DTSEC3 */ + fm_info_set_phy_address(FM1_DTSEC3, + CONFIG_SYS_SGMII1_PHY_ADDR); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; diff --git a/boards.cfg b/boards.cfg index 110dd9d..711058b 100644 --- a/boards.cfg +++ b/boards.cfg @@ -927,6 +927,7 @@ Active powerpc mpc85xx- freescale t104xrdb Active powerpc mpc85xx- freescale t104xrdb T1040RDB_SDCARD T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - Active powerpc mpc85xx- freescale t104xrdb T1040RDB_SECURE_BOOT T104xRDB:PPC_T1040,SECURE_BOOT,T1040RDB Aneesh Bansal aneesh.ban...@freescale.com Active powerpc mpc85xx- freescale t104xrdb T1040RDB_SPIFLASH T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH
[U-Boot] [PATCH v2] powerpc/t104xrdb: Add T1042RDB board support
T1042RDB is a Freescale reference board that hosts the T1042 SoC (and variants). The board is similar to T1040RDB, It is a reduced personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). T1042RDB is configured with serdes protocol 0x86 which can support following interfaces - 2 RGMIIS on DTSEC4, DTSEC5 - 1 SGMII on DTSEC3 This Patch also updates README file(added T1042RDB details and updated commands for switching to alternate banks from vBank0 to vBank4 and vice versa) This patch also does minor clean ups for fdt defines for T1042RDB and T1042RDB_PI board Signed-off-by: Vijay Rai vijay@freescale.com Signed-off-by: Priyanka Jain priyanka.j...@freescale.com --- board/freescale/t104xrdb/README | 17 +++-- boards.cfg |1 + include/configs/T104xRDB.h | 15 +-- 3 files changed, 25 insertions(+), 8 deletions(-) diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index cdbe1fa..ad0f75c 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -4,10 +4,23 @@ The T1040RDB is a Freescale reference board that hosts the T1040 SoC (and variants). Variants inclued T1042 presonality of T1040, in which case T1040RDB can also be called T1042RDB. +The T1042RDB is a Freescale reference board that hosts the T1042 SoC +(and variants). The board is similar to T1040RDB, It is a reduced +personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). + The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. (a personality of T1040 SoC). The board is similar to T1040RDB but is designed specially with low power features targeted for Printing Image Market. +Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB +- +Board Si ProtocolTargeted Market +- +T1040RDB T1040 0x66Networking +T1040RDB T1042 0x86Networking +T1042RDB_PIT1042 0x06Printing Imaging + + T1040 SoC Overview -- The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA @@ -194,10 +207,10 @@ The below commands apply to the board Commands for switching to alternate bank. 1. To change from vbank0 to vbank4 - = qixis_reset altbank (it will boot using vbank4) + = cpld reset altbank (it will boot using vbank4) 2.To change from vbank4 to vbank0 - = qixis reset (it will boot using vbank0) + = cpld reset (it will boot using vbank0) NAND boot with 2 Stage boot loader -- diff --git a/boards.cfg b/boards.cfg index 1ba2081..d36f852 100644 --- a/boards.cfg +++ b/boards.cfg @@ -928,6 +928,7 @@ Active powerpc mpc85xx- freescale t104xrdb Active powerpc mpc85xx- freescale t104xrdb T1040RDB_SDCARD T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD - Active powerpc mpc85xx- freescale t104xrdb T1040RDB_SECURE_BOOT T104xRDB:PPC_T1040,SECURE_BOOT,T1040RDB Aneesh Bansal aneesh.ban...@freescale.com Active powerpc mpc85xx- freescale t104xrdb T1040RDB_SPIFLASH T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH Priyanka Jain priyanka.j...@freescale.com +Active powerpc mpc85xx- freescale t104xrdb T1042RDB T104xRDB:PPC_T1042,T1042RDB Priyanka Jain priyanka.j...@freescale.com Active powerpc mpc85xx- freescale t104xrdb T1042RDB_PI T104xRDB:PPC_T1042,T1042RDB_PI Priyanka Jain priyanka.j...@freescale.com Active powerpc mpc85xx- freescale t104xrdb T1042RDB_PI_NAND T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND Priyanka Jain priyanka.j...@freescale.com Active powerpc mpc85xx- freescale t104xrdb T1042RDB_PI_SDCARD T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD
[U-Boot] [PATCH] powerpc/t104xrdb: Add Support of rcw for T1042RDB in u-boot
This patch adds support of rcw for T1042RDB, it does following: - Add t1042_rcw.cfg file for serdes protocol 0x86 for T1042RDB - Renames t1042_pi_rcw.cfg file from t1042_rcw.cfg and also updates comments for valid serdes protocol - Also updates CONFIG_SYS_FSL_PBL_RCW for T1042RDB Signed-off-by: Vijay Rai vijay@freescale.com Signed-off-by: Priyanka Jain priyanka.j...@freescale.com --- include/configs/T104xRDB.h |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index c3eb019..eeac104 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -19,7 +19,7 @@ #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg #endif #ifdef CONFIG_T1042RDB_PI -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg #endif #ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2] powerpc/t104xrdb: Add Support of rcw for T1042RDB in u-boot
This patch adds support of rcw for T1042RDB, it makes following changes : - Adds t1042_rcw.cfg file for serdes protocol 0x86 for T1042RDB - Renames t1042_pi_rcw.cfg file from t1042_rcw.cfg and also updates comments for valid serdes protocol which is 0x06 - Also updates CONFIG_SYS_FSL_PBL_RCW for T1042RDB Signed-off-by: Vijay Rai vijay@freescale.com Signed-off-by: Priyanka Jain priyanka.j...@freescale.com --- board/freescale/t104xrdb/t1042_pi_rcw.cfg |7 +++ board/freescale/t104xrdb/t1042_rcw.cfg|8 include/configs/T104xRDB.h|3 +++ 3 files changed, 14 insertions(+), 4 deletions(-) create mode 100644 board/freescale/t104xrdb/t1042_pi_rcw.cfg diff --git a/board/freescale/t104xrdb/t1042_pi_rcw.cfg b/board/freescale/t104xrdb/t1042_pi_rcw.cfg new file mode 100644 index 000..57de89a --- /dev/null +++ b/board/freescale/t104xrdb/t1042_pi_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x06 +0c18000e 0e00 +0602 0042 e8106000 0100 + 00030810 + 01fe0a06 diff --git a/board/freescale/t104xrdb/t1042_rcw.cfg b/board/freescale/t104xrdb/t1042_rcw.cfg index a3ea8ad..db4d52f 100644 --- a/board/freescale/t104xrdb/t1042_rcw.cfg +++ b/board/freescale/t104xrdb/t1042_rcw.cfg @@ -1,7 +1,7 @@ #PBL preamble and RCW header aa55aa55 010e0100 -# serdes protocol 0x66 +# serdes protocol 0x86 0c18000e 0e00 -0602 0042 e8106000 0100 - 00030810 - 01fe0a06 +8602 8002 ec027000 0100 + 00032810 + 0342500f diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 1e6c79a..eeac104 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -19,6 +19,9 @@ #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg #endif #ifdef CONFIG_T1042RDB_PI +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg +#endif +#ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif -- 1.7.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] driver/qe: update status of QE microcode
This Patch updates error print for QE which should be easily understood
Signed-off-by: Vijay Rai vijay@freescale.com
---
drivers/qe/qe.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 9c5fbd1..df468d4 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -333,7 +333,7 @@ int qe_upload_firmware(const struct qe_firmware *firmware)
/* Check the magic */
if ((hdr-magic[0] != 'Q') || (hdr-magic[1] != 'E') ||
(hdr-magic[2] != 'F')) {
- printf(Not a microcode\n);
+ printf(QE microcode not found\n);
#ifdef CONFIG_DEEP_SLEEP
setbits_be32(gur-devdisr, MPC85xx_DEVDISR_QE_DISABLE);
#endif
--
1.7.9.5
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[U-Boot] [PATCH] powerpc/t104xrdb: Add T1042RDB board support
T1042RDB is Freescale Reference Design Board supporting the T1042
QorIQ Power Architecture processor. T1042 is a reduced personality
of T1040 SoC without Integrated 8-port Gigabit. The board is designed
with low power features targeted for Printing Image Market.
T1042RDB board Overview
---
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Two on-board RGMII 10/100/1G ethernet ports.
- SERDES Connections, 8 lanes supporting:
- PCI
- SGMII
- SATA 2.0
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
- IFC/Local Bus
- NAND flash: 1GB 8-bit NAND flash
- NOR: 128MB 16-bit NOR Flash
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- CPLD
- Clocks
- System and DDR clock (SYSCLK, ?DDRCLK?)
- SERDES clocks
- Video
- DIU supports video at up to 1280x1024x32bpp
- HDMI connector
- Power Supplies
- USB
- Supports two USB 2.0 ports with integrated PHYs
- Two type A ports with 5V@1.5A per port.
- SDHC
- SDHC/SDXC connector
- SPI
- On-board 64MB SPI flash
- I2C
- Device connected: EEPROM, thermal monitor, VID controller, RTC
- Other IO
- Two Serial ports
- ProfiBus port
T1042RDB is configured as serdes protocol 0x86 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5
1 SGMII on DTSEC3
Comments updated for 0x06 protocol in place of 0x66 protocol for T1042RDB_PI
This patch also does minor clean ups for fdt defines for T1042RDB_PI board
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
board/freescale/t104xrdb/t1042_rcw.cfg |2 +-
boards.cfg |1 +
include/configs/T104xRDB.h | 15 +--
3 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/board/freescale/t104xrdb/t1042_rcw.cfg
b/board/freescale/t104xrdb/t1042_rcw.cfg
index a3ea8ad..57de89a 100644
--- a/board/freescale/t104xrdb/t1042_rcw.cfg
+++ b/board/freescale/t104xrdb/t1042_rcw.cfg
@@ -1,6 +1,6 @@
#PBL preamble and RCW header
aa55aa55 010e0100
-# serdes protocol 0x66
+# serdes protocol 0x06
0c18000e 0e00
0602 0042 e8106000 0100
00030810
diff --git a/boards.cfg b/boards.cfg
index b8cfead..a989ea2 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -961,6 +961,7 @@ Active powerpc mpc85xx- freescale
t104xrdb
Active powerpc mpc85xx- freescale t104xrdb
T1040RDB_SDCARD
T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD
-
Active powerpc mpc85xx- freescale t104xrdb
T1040RDB_SECURE_BOOT
T104xRDB:PPC_T1040,SECURE_BOOT,T1040RDB
Aneesh Bansal
aneesh.ban...@freescale.com
Active powerpc mpc85xx- freescale t104xrdb
T1040RDB_SPIFLASH
T104xRDB:PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH
Priyanka Jain
priyanka.j...@freescale.com
+Active powerpc mpc85xx- freescale t104xrdb
T1042RDB T104xRDB:PPC_T1042,T1042RDB
Priyanka Jain priyanka.j...@freescale.com
Active powerpc mpc85xx- freescale t104xrdb
T1042RDB_PI T104xRDB:PPC_T1042,T1042RDB_PI
Priyanka Jain priyanka.j...@freescale.com
Active powerpc mpc85xx- freescale t104xrdb
T1042RDB_PI_NAND
T104xRDB:PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND
Priyanka Jain
priyanka.j...@freescale.com
[U-Boot] [PATCH] powerpc/t1040qds: Initialize EPHY2 clock to RGMII only
From FPGAv9 onwards, new bits added for EPHY2 signal mux.
Setting FPGA register brdcfg9 EPHY2 bits to '0' to initialize EPHY2 clock to
RGMII mode.
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
board/freescale/t1040qds/eth.c|4 +++-
board/freescale/t1040qds/t1040qds_qixis.h |4
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/board/freescale/t1040qds/eth.c b/board/freescale/t1040qds/eth.c
index 3077b4a..1929bba 100644
--- a/board/freescale/t1040qds/eth.c
+++ b/board/freescale/t1040qds/eth.c
@@ -355,7 +355,9 @@ static void set_brdcfg9_for_gtx_clk(void)
{
u8 brdcfg9;
brdcfg9 = QIXIS_READ(brdcfg[9]);
- brdcfg9 |= (1 5);
+/* Initializing EPHY2 clock to RGMII mode */
+ brdcfg9 = ~(BRDCFG9_EPHY2_MASK);
+ brdcfg9 |= (BRDCFG9_EPHY2_VAL);
QIXIS_WRITE(brdcfg[9], brdcfg9);
}
diff --git a/board/freescale/t1040qds/t1040qds_qixis.h
b/board/freescale/t1040qds/t1040qds_qixis.h
index 98d2d39..cef8ad0 100644
--- a/board/freescale/t1040qds/t1040qds_qixis.h
+++ b/board/freescale/t1040qds/t1040qds_qixis.h
@@ -17,6 +17,10 @@
#define BRDCFG5_IMX_MASK 0xC0
#define BRDCFG5_IMX_DIU0x80
+/* BRDCFG9[2] controls EPHY2 Clock */
+#define BRDCFG9_EPHY2_MASK 0x20
+#define BRDCFG9_EPHY2_VAL 0x00
+
/* BRDCFG15[3] controls LCD Panel Powerdown*/
#define BRDCFG15_LCDPD_MASK0x10
#define BRDCFG15_LCDPD_ENABLED 0x00
--
1.7.9.5
___
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[U-Boot] [PATCH] powerpc/85xx: Enhance get_sys_info() to check clocking mode
T1040 and it's variants provide Single Oscillator Source Reference Clock Mode.
In this mode, single onboard oscillator(DIFF_SYSCLK) can provide the reference
clock
(100MHz) to the following PLLs:
• Platform PLL
• Core PLLs
• USB PLL
• DDR PLL, etc
The cfg_eng_use0 of porsr1 register identifies whether the SYSCLK
(single-ended) or
DIFF_SYSCLK (differential) is selected as the clock input to the chip.
get_sys_info has been enhanced to add the diff_sysclk so that the
various drivers can be made aware of ths diff sysclk configuration and
act accordingly.
Other changes:
-single_src to ddr_refclk_sel, as it is use for checking ddr reference clock
-Removed the print of single_src from get_sys_info as this will be
-printed whenever somebody calls get_sys_info which is not appropriate.
-Add print of single_src in checkcpu as it is called only once during
initialization
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
Signed-off-by: Vijay Rai vijay@freescale.com
---
arch/powerpc/cpu/mpc85xx/cpu.c|5 +
arch/powerpc/cpu/mpc85xx/speed.c | 21 +
arch/powerpc/include/asm/immap_85xx.h |6 ++
include/e500.h|3 +++
4 files changed, 27 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index cb7efc9..0697123 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -129,6 +129,11 @@ int checkcpu (void)
get_sys_info(sysinfo);
+#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
+ if (sysinfo.diff_sysclk == 1)
+ puts(Single Source Clock Configuration\n);
+#endif
+
puts(Clock Configuration:);
for_each_cpu(i, core, nr_cores, mask) {
if (!(i 3))
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 74e3c1b..d516d4e 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -74,28 +74,33 @@ void get_sys_info(sys_info_t *sys_info)
uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS];
unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
uint mem_pll_rat;
-#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
- uint single_src;
-#endif
sys_info-freq_systembus = sysclk;
#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
+ uint ddr_refclk_sel;
+ unsigned int porsr1_sys_clk;
+ porsr1_sys_clk = in_be32(gur-porsr1) FSL_DCFG_PORSR1_SYSCLK_SHIFT
+FSL_DCFG_PORSR1_SYSCLK_MASK;
+ if (porsr1_sys_clk == FSL_DCFG_PORSR1_SYSCLK_DIFF)
+ sys_info-diff_sysclk = 1;
+ else
+ sys_info-diff_sysclk = 0;
+
/*
* DDR_REFCLK_SEL rcw bit is used to determine if DDR PLLS
* are driven by separate DDR Refclock or single source
* differential clock.
*/
- single_src = (in_be32(gur-rcwsr[5])
+ ddr_refclk_sel = (in_be32(gur-rcwsr[5])
FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT)
FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_MASK;
/*
-* For single source clocking, both ddrclock and syclock
+* For single source clocking, both ddrclock and sysclock
* are driven by differential sysclock.
*/
- if (single_src == FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK) {
- printf(Single Source Clock Configuration\n);
+ if (ddr_refclk_sel == FSL_CORENET2_RCWSR5_DDR_REFCLK_SINGLE_CLK)
sys_info-freq_ddrbus = CONFIG_SYS_CLK_FREQ;
- } else
+ else
#endif
#ifdef CONFIG_DDR_CLK_FREQ
sys_info-freq_ddrbus = CONFIG_DDR_CLK_FREQ;
diff --git a/arch/powerpc/include/asm/immap_85xx.h
b/arch/powerpc/include/asm/immap_85xx.h
index a178187..3ca142d 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -1583,6 +1583,12 @@ typedef struct cpc_corenet {
typedef struct ccsr_gur {
u32 porsr1; /* POR status 1 */
u32 porsr2; /* POR status 2 */
+#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
+#defineFSL_DCFG_PORSR1_SYSCLK_SHIFT15
+#defineFSL_DCFG_PORSR1_SYSCLK_MASK 0x1
+#defineFSL_DCFG_PORSR1_SYSCLK_SINGLE_ENDED 0x1
+#defineFSL_DCFG_PORSR1_SYSCLK_DIFF 0x0
+#endif
u8 res_008[0x20-0x8];
u32 gpporcr1; /* General-purpose POR configuration */
u32 gpporcr2; /* General-purpose POR configuration 2 */
diff --git a/include/e500.h b/include/e500.h
index 0c24326..5884a22 100644
--- a/include/e500.h
+++ b/include/e500.h
@@ -24,6 +24,9 @@ typedef struct
#ifdef CONFIG_SYS_DPAA_PME
unsigned long freq_pme;
#endif
+#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
+ unsigned char diff_sysclk;
+#endif
} MPC85xx_SYS_INFO;
#endif /* _ASMLANGUAGE */
--
1.6.5.6
[U-Boot] [U-BOOT] [PATCH v3] powerpc/t104xrdb: Unification of T104xRDB header files
T1040RDB, T1042RDB header files are very similar so merged into new header file
T104xRDB.
T104xRDB header file can support both T1040RDB and T1042RDB_PI header.
Patch makes following changes
-Update Boards.cfg file for T1040RDB and T1042RDB_PI
-Add new T104xRDB header file
-Delete T1040RDB, T1042RDB_PI header file
Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
---
v3:
- Rebasing to top of the tree
boards.cfg |4 +-
include/configs/T1042RDB_PI.h | 695
include/configs/{T1040RDB.h = T104xRDB.h} | 57 ++-
3 files changed, 35 insertions(+), 721 deletions(-)
delete mode 100644 include/configs/T1042RDB_PI.h
rename include/configs/{T1040RDB.h = T104xRDB.h} (95%)
diff --git a/boards.cfg b/boards.cfg
index 69c8936..5afca26 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -932,8 +932,8 @@ Active powerpc mpc85xx- freescale
p2041rdb
Active powerpc mpc85xx- freescale p2041rdb
P2041RDB_SPIFLASH
P2041RDB:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF4
-
Active powerpc mpc85xx- freescale p2041rdb
P2041RDB_SRIO_PCIE_BOOT
P2041RDB:SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4
-
Active powerpc mpc85xx- freescale t1040qds
T1040QDS T1040QDS:PPC_T1040
Poonam Aggrwal poonam.aggr...@freescale.com
-Active powerpc mpc85xx- freescale t104xrdb
T1040RDB T1040RDB:PPC_T1040
Poonam Aggrwal poonam.aggr...@freescale.com
-Active powerpc mpc85xx- freescale t104xrdb
T1042RDB_PI T1042RDB_PI:PPC_T1042
Poonam Aggrwal poonam.aggr...@freescale.com
+Active powerpc mpc85xx- freescale t104xrdb
T1040RDB T104xRDB:PPC_T1040,T1040RDB
Priyanka Jain priyanka.j...@freescale.com
+Active powerpc mpc85xx- freescale t104xrdb
T1042RDB_PI T104xRDB:PPC_T1042,T1042RDB_PI
Priyanka Jain priyanka.j...@freescale.com
Active powerpc mpc85xx- freescale t208xqds
T2080QDS T208xQDS:PPC_T2080
-
Active powerpc mpc85xx- freescale t208xqds
T2080QDS_NAND
T208xQDS:PPC_T2080,RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF4
-
Active powerpc mpc85xx- freescale t208xqds
T2080QDS_SDCARD
T208xQDS:PPC_T2080,RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF4
-
diff --git a/include/configs/T1042RDB_PI.h b/include/configs/T1042RDB_PI.h
deleted file mode 100644
index 68656e6..000
--- a/include/configs/T1042RDB_PI.h
+++ /dev/null
@@ -1,695 +0,0 @@
-/*
- * Copyright 2013 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * T1042RDB_PI board configuration file
- */
-#define CONFIG_T104xRDB
-#define
