[PATCH] board: ti: rm-cfg: Update rm-cfg to reflect new resource reservation
With the latest TIFS firmware, an additional virtual interrupt and event is reserved for TIFS usage on am62x and am62ax devices. Update the rm-cfg to reflect this new reservation. Signed-off-by: Vishal Mahaveer --- board/ti/am62ax/rm-cfg.yaml | 8 board/ti/am62x/rm-cfg.yaml | 8 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml index 73e8e15f66..cbd087de79 100644 --- a/board/ti/am62ax/rm-cfg.yaml +++ b/board/ti/am62ax/rm-cfg.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ -# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ # # Resource management configuration for AM62A # @@ -519,13 +519,13 @@ rm-cfg: reserved: 0 - start_resource: 44 -num_resource: 36 +num_resource: 35 type: 1802 host_id: 35 reserved: 0 - start_resource: 44 -num_resource: 36 +num_resource: 35 type: 1802 host_id: 36 reserved: 0 @@ -567,7 +567,7 @@ rm-cfg: reserved: 0 - start_resource: 1038 -num_resource: 498 +num_resource: 497 type: 1805 host_id: 128 reserved: 0 diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml index 725f7c83f0..26d99b03b8 100644 --- a/board/ti/am62x/rm-cfg.yaml +++ b/board/ti/am62x/rm-cfg.yaml @@ -1,5 +1,5 @@ # SPDX-License-Identifier: GPL-2.0+ -# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ +# Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ # # Resource management configuration for AM62X # @@ -513,13 +513,13 @@ rm-cfg: reserved: 0 - start_resource: 44 -num_resource: 36 +num_resource: 35 type: 1802 host_id: 35 reserved: 0 - start_resource: 44 -num_resource: 36 +num_resource: 35 type: 1802 host_id: 36 reserved: 0 @@ -555,7 +555,7 @@ rm-cfg: reserved: 0 - start_resource: 909 -num_resource: 627 +num_resource: 626 type: 1805 host_id: 128 reserved: 0 -- 2.43.0
[PATCH 1/4] board: ti: am62x/am62ax: Formatting updates to board config files
Minor formatting updates to the rm board configuration file for am62x and am62ax boards. Signed-off-by: Vishal Mahaveer --- board/ti/am62ax/rm-cfg.yaml | 454 +--- board/ti/am62x/rm-cfg.yaml | 445 +-- 2 files changed, 326 insertions(+), 573 deletions(-) diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml index 15c4017bda..422f6fef98 100644 --- a/board/ti/am62ax/rm-cfg.yaml +++ b/board/ti/am62ax/rm-cfg.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0+ # Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ # -# Resource management configuration for AM62ax +# Resource management configuration for AM62A # --- @@ -18,234 +18,234 @@ rm-cfg: host_cfg_entries: - #1 host_id: 12 -allowed_atype : 0x2A -allowed_qos : 0x -allowed_orderid : 0x -allowed_priority : 0x -allowed_sched_priority : 0xAA +allowed_atype: 0x2A +allowed_qos: 0x +allowed_orderid: 0x +allowed_priority: 0x +allowed_sched_priority: 0xAA - #2 host_id: 30 -allowed_atype : 0x2A -allowed_qos : 0x -allowed_orderid : 0x -allowed_priority : 0x -allowed_sched_priority : 0xAA +allowed_atype: 0x2A +allowed_qos: 0x +allowed_orderid: 0x +allowed_priority: 0x +allowed_sched_priority: 0xAA - #3 host_id: 36 -allowed_atype : 0x2A -allowed_qos : 0x -allowed_orderid : 0x -allowed_priority : 0x -allowed_sched_priority : 0xAA +allowed_atype: 0x2A +allowed_qos: 0x +allowed_orderid: 0x +allowed_priority: 0x +allowed_sched_priority: 0xAA - #4 host_id: 0 -allowed_atype : 0 -allowed_qos : 0 -allowed_orderid : 0 -allowed_priority : 0 -allowed_sched_priority : 0 +allowed_atype: 0 +allowed_qos: 0 +allowed_orderid: 0 +allowed_priority: 0 +allowed_sched_priority: 0 - #5 host_id: 0 -allowed_atype : 0 -allowed_qos : 0 -allowed_orderid : 0 -allowed_priority : 0 -allowed_sched_priority : 0 +allowed_atype: 0 +allowed_qos: 0 +allowed_orderid: 0 +allowed_priority: 0 +allowed_sched_priority: 0 - #6 host_id: 0 -allowed_atype : 0 -allowed_qos : 0 -allowed_orderid : 0 -allowed_priority : 0 -allowed_sched_priority : 0 +allowed_atype: 0 +allowed_qos: 0 +allowed_orderid: 0 +allowed_priority: 0 +allowed_sched_priority: 0 - #7 host_id: 0 -allowed_atype : 0 -allowed_qos : 0 -allowed_orderid : 0 -allowed_priority : 0 -allowed_sched_priority : 0 +allowed_atype: 0 +allowed_qos: 0 +allowed_orderid: 0 +allowed_priority: 0 +allowed_sched_priority: 0 - #8 host_id: 0 -allowed_atype : 0 -allowed_qos : 0 -allowed_orderid : 0 -allowed_priority : 0 -allowed_sched_priority : 0 +allowed_atype: 0 +allowed_qos: 0 +allowed_orderid: 0 +allowed_priority: 0 +allowed_sched_priority: 0 - #9 host_id: 0 -allowed_atype : 0 -allowed_qos : 0 -allowed_orderid : 0 -allowed_priority : 0 -allowed_sched_priority : 0 +allowed_atype: 0 +allowed_qos: 0
[PATCH 3/4] board: ti: am62x/am62ax: Update MCU GPIO interrupt allocation in board config
Share the MCU GPIO interrupts between A53 core and DM R5 core. Allocating 2 instances each to A53 and DM R5. Signed-off-by: Vishal Mahaveer --- board/ti/am62ax/rm-cfg.yaml | 16 ++-- board/ti/am62x/rm-cfg.yaml | 16 ++-- 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml index 6e15366431..1fb7d64cb8 100644 --- a/board/ti/am62ax/rm-cfg.yaml +++ b/board/ti/am62ax/rm-cfg.yaml @@ -244,7 +244,7 @@ rm-cfg: subhdr: magic: 0x7B25 size: 8 -resasg_entries_size: 1048 +resasg_entries_size: 1064 reserved: 0 resasg_entries: - @@ -285,10 +285,22 @@ rm-cfg: reserved: 0 - start_resource: 0 -num_resource: 4 +num_resource: 2 type: 320 host_id: 12 reserved: 0 +- +start_resource: 2 +num_resource: 2 +type: 320 +host_id: 35 +reserved: 0 +- +start_resource: 2 +num_resource: 2 +type: 320 +host_id: 36 +reserved: 0 - start_resource: 4 num_resource: 4 diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml index a278675475..5a265ed1e8 100644 --- a/board/ti/am62x/rm-cfg.yaml +++ b/board/ti/am62x/rm-cfg.yaml @@ -244,7 +244,7 @@ rm-cfg: subhdr: magic: 0x7B25 size: 8 -resasg_entries_size: 960 +resasg_entries_size: 976 reserved: 0 resasg_entries: - @@ -285,10 +285,22 @@ rm-cfg: reserved: 0 - start_resource: 0 -num_resource: 4 +num_resource: 2 type: 320 host_id: 12 reserved: 0 +- +start_resource: 2 +num_resource: 2 +type: 320 +host_id: 35 +reserved: 0 +- +start_resource: 2 +num_resource: 2 +type: 320 +host_id: 36 +reserved: 0 - start_resource: 4 num_resource: 4 -- 2.36.1
[PATCH 2/4] board: ti: am62ax: Add C7x resource allocation entries to board config
Update am62ax rm-cfg with allocation entries for C7x core. Following updates are added for C7x: - Share split BCDMA tx and rx channels between DM R5 and C7x - Share rings for split BCDMA tx and rx channels between DM R5 and C7x - Add Global events and Virtual interrupts for C7x Signed-off-by: Vishal Mahaveer --- board/ti/am62ax/rm-cfg.yaml | 46 +++-- 1 file changed, 29 insertions(+), 17 deletions(-) diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml index 422f6fef98..6e15366431 100644 --- a/board/ti/am62ax/rm-cfg.yaml +++ b/board/ti/am62ax/rm-cfg.yaml @@ -24,26 +24,26 @@ rm-cfg: allowed_priority: 0x allowed_sched_priority: 0xAA - #2 -host_id: 30 +host_id: 20 allowed_atype: 0x2A allowed_qos: 0x allowed_orderid: 0x allowed_priority: 0x allowed_sched_priority: 0xAA - #3 -host_id: 36 +host_id: 30 allowed_atype: 0x2A allowed_qos: 0x allowed_orderid: 0x allowed_priority: 0x allowed_sched_priority: 0xAA - #4 -host_id: 0 -allowed_atype: 0 -allowed_qos: 0 -allowed_orderid: 0 -allowed_priority: 0 -allowed_sched_priority: 0 +host_id: 36 +allowed_atype: 0x2A +allowed_qos: 0x +allowed_orderid: 0x +allowed_priority: 0x +allowed_sched_priority: 0xAA - #5 host_id: 0 allowed_atype: 0 @@ -244,7 +244,7 @@ rm-cfg: subhdr: magic: 0x7B25 size: 8 -resasg_entries_size: 1032 +resasg_entries_size: 1048 reserved: 0 resasg_entries: - @@ -323,7 +323,7 @@ rm-cfg: start_resource: 18 num_resource: 6 type: 1677 -host_id: 35 +host_id: 20 reserved: 0 - start_resource: 18 @@ -353,7 +353,7 @@ rm-cfg: start_resource: 72 num_resource: 6 type: 1678 -host_id: 35 +host_id: 20 reserved: 0 - start_resource: 72 @@ -383,7 +383,7 @@ rm-cfg: start_resource: 44 num_resource: 6 type: 1679 -host_id: 35 +host_id: 20 reserved: 0 - start_resource: 44 @@ -413,7 +413,7 @@ rm-cfg: start_resource: 18 num_resource: 6 type: 1696 -host_id: 35 +host_id: 20 reserved: 0 - start_resource: 18 @@ -443,7 +443,7 @@ rm-cfg: start_resource: 18 num_resource: 6 type: 1697 -host_id: 35 +host_id: 20 reserved: 0 - start_resource: 18 @@ -473,7 +473,7 @@ rm-cfg: start_resource: 12 num_resource: 6 type: 1698 -host_id: 35 +host_id: 20 reserved: 0 - start_resource: 12 @@ -495,10 +495,16 @@ rm-cfg: reserved: 0 - start_resource: 6 -num_resource: 34 +num_resource: 26 type: 1802 host_id: 12 reserved: 0 +- +start_resource: 32 +num_resource: 8 +type: 1802 +host_id: 20 +reserved: 0 - start_resource: 44 num_resource: 36 @@ -543,7 +549,13 @@ rm-cfg: reserved: 0 - start_resource: 910 -num_resource: 626 +num_resource: 128 +type: 1805 +host_id: 20 +reserved: 0 +- +start_resource: 1038 +num_resource: 498 type: 1805 host_id: 128 reserved: 0 -- 2.36.1
[PATCH 4/4] board: ti: am62x/am62ax: Update virtual interrupt allocations in board config
Updates as a result of TIFS core now reserving a virtual interrupt for enabling interrupts between DM to TIFS core. Because of this change other virtual interrupt counts decrease by one. Signed-off-by: Vishal Mahaveer --- board/ti/am62ax/rm-cfg.yaml | 22 +++--- board/ti/am62x/rm-cfg.yaml | 20 ++-- 2 files changed, 21 insertions(+), 21 deletions(-) diff --git a/board/ti/am62ax/rm-cfg.yaml b/board/ti/am62ax/rm-cfg.yaml index 1fb7d64cb8..b9f3668c07 100644 --- a/board/ti/am62ax/rm-cfg.yaml +++ b/board/ti/am62ax/rm-cfg.yaml @@ -518,14 +518,14 @@ rm-cfg: host_id: 20 reserved: 0 - -start_resource: 44 -num_resource: 36 +start_resource: 45 +num_resource: 35 type: 1802 host_id: 35 reserved: 0 - -start_resource: 44 -num_resource: 36 +start_resource: 45 +num_resource: 35 type: 1802 host_id: 36 reserved: 0 @@ -536,38 +536,38 @@ rm-cfg: host_id: 30 reserved: 0 - -start_resource: 14 +start_resource: 15 num_resource: 512 type: 1805 host_id: 12 reserved: 0 - -start_resource: 526 +start_resource: 527 num_resource: 256 type: 1805 host_id: 35 reserved: 0 - -start_resource: 526 +start_resource: 527 num_resource: 256 type: 1805 host_id: 36 reserved: 0 - -start_resource: 782 +start_resource: 783 num_resource: 128 type: 1805 host_id: 30 reserved: 0 - -start_resource: 910 +start_resource: 911 num_resource: 128 type: 1805 host_id: 20 reserved: 0 - -start_resource: 1038 -num_resource: 498 +start_resource: 1039 +num_resource: 497 type: 1805 host_id: 128 reserved: 0 diff --git a/board/ti/am62x/rm-cfg.yaml b/board/ti/am62x/rm-cfg.yaml index 5a265ed1e8..c06232f6dd 100644 --- a/board/ti/am62x/rm-cfg.yaml +++ b/board/ti/am62x/rm-cfg.yaml @@ -512,14 +512,14 @@ rm-cfg: host_id: 12 reserved: 0 - -start_resource: 44 -num_resource: 36 +start_resource: 45 +num_resource: 35 type: 1802 host_id: 35 reserved: 0 - -start_resource: 44 -num_resource: 36 +start_resource: 45 +num_resource: 35 type: 1802 host_id: 36 reserved: 0 @@ -530,32 +530,32 @@ rm-cfg: host_id: 30 reserved: 0 - -start_resource: 13 +start_resource: 14 num_resource: 512 type: 1805 host_id: 12 reserved: 0 - -start_resource: 525 +start_resource: 526 num_resource: 256 type: 1805 host_id: 35 reserved: 0 - -start_resource: 525 +start_resource: 526 num_resource: 256 type: 1805 host_id: 36 reserved: 0 - -start_resource: 781 +start_resource: 782 num_resource: 128 type: 1805 host_id: 30 reserved: 0 - -start_resource: 909 -num_resource: 627 +start_resource: 910 +num_resource: 626 type: 1805 host_id: 128 reserved: 0 -- 2.36.1
[PATCH 0/4] board: ti: Update to latest board configuration
This patch series brings in the latest board configurations for am62 and am62a device. Patch "board: ti: am62x/am62ax: Update virtual interrupt allocations in board config" is needed for booting with the latest TIFS and DM firmware [1]. [1] https://git.ti.com/cgit/processor-firmware/ti-linux-firmware/log/?h=ti-linux-firmware SHA: e891ddc65c55bfa7111e4f45834b7c26444dff72 U-boot boot log - https://gist.github.com/vishalmti/6b38fb80d557478131d5aaed5aeb3596 Vishal Mahaveer (4): board: ti: am62x/am62ax: Formatting updates to board config files board: ti: am62ax: Add C7x resource allocation entries to board config board: ti: am62x/am62ax: Update MCU GPIO interrupt allocation in board config board: ti: am62x/am62ax: Update virtual interrupt allocations in board config board/ti/am62ax/rm-cfg.yaml | 522 +++- board/ti/am62x/rm-cfg.yaml | 481 + 2 files changed, 396 insertions(+), 607 deletions(-) -- 2.36.1
[RESEND PATCH 1/1] clk: ti: k3-pll: Add calibration support for non fractional mode
PLL calibration needs to be enabled when operating in non fractional
mode. Add the sequence to do a fast calibration when using PLL
in this mode.
Signed-off-by: Vishal Mahaveer
---
drivers/clk/ti/clk-k3-pll.c | 81 ++---
1 file changed, 75 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/ti/clk-k3-pll.c b/drivers/clk/ti/clk-k3-pll.c
index bf762c558ef..c1158c13290 100644
--- a/drivers/clk/ti/clk-k3-pll.c
+++ b/drivers/clk/ti/clk-k3-pll.c
@@ -25,6 +25,23 @@
#define PLL_16FFT_FREQ_CTRL0 0x30
#define PLL_16FFT_FREQ_CTRL1 0x34
#define PLL_16FFT_DIV_CTRL 0x38
+#define PLL_16FFT_CAL_CTRL 0x60
+#define PLL_16FFT_CAL_STAT 0x64
+
+/* CAL STAT register bits */
+#define PLL_16FFT_CAL_STAT_CAL_LOCKBIT(31)
+
+/* CFG register bits */
+#define PLL_16FFT_CFG_PLL_TYPE_SHIFT (0)
+#define PLL_16FFT_CFG_PLL_TYPE_MASK(0x3 << 0)
+#define PLL_16FFT_CFG_PLL_TYPE_FRACF 1
+
+/* CAL CTRL register bits */
+#define PLL_16FFT_CAL_CTRL_CAL_EN BIT(31)
+#define PLL_16FFT_CAL_CTRL_FAST_CAL BIT(20)
+#define PLL_16FFT_CAL_CTRL_CAL_BYP BIT(15)
+#define PLL_16FFT_CAL_CTRL_CAL_CNT_SHIFT16
+#define PLL_16FFT_CAL_CTRL_CAL_CNT_MASK (0x7 << 16)
/* CTRL register bits */
#define PLL_16FFT_CTRL_BYPASS_EN BIT(31)
@@ -40,9 +57,14 @@
/* DIV CTRL register bits */
#define PLL_16FFT_DIV_CTRL_REF_DIV_MASK0x3f
-#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_BITS 24
+/* HSDIV register bits*/
#define PLL_16FFT_HSDIV_CTRL_CLKOUT_EN BIT(15)
+/* FREQ_CTRL1 bits */
+#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_BITS 24
+#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_MASK 0xff
+#define PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_SHIFT 0
+
/* KICK register magic values */
#define PLL_KICK0_VALUE0x68ef3490
#define PLL_KICK1_VALUE0xd172bc5a
@@ -63,18 +85,65 @@ static int ti_pll_wait_for_lock(struct clk *clk)
{
struct ti_pll_clk *pll = to_clk_pll(clk);
u32 stat;
+ u32 cfg;
+ u32 cal;
+ u32 freq_ctrl1;
int i;
+ u32 pllfm;
+ u32 pll_type;
+ int success;
for (i = 0; i < 10; i++) {
stat = readl(pll->reg + PLL_16FFT_STAT);
- if (stat & PLL_16FFT_STAT_LOCK)
- return 0;
+ if (stat & PLL_16FFT_STAT_LOCK) {
+ success = 1;
+ break;
+ }
}
- printf("%s: pll (%s) failed to lock\n", __func__,
- clk->dev->name);
+ /* Enable calibration if not in fractional mode of the FRACF PLL */
+ freq_ctrl1 = readl(pll->reg + PLL_16FFT_FREQ_CTRL1);
+ pllfm = freq_ctrl1 & PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_MASK;
+ pllfm >>= PLL_16FFT_FREQ_CTRL1_FB_DIV_FRAC_SHIFT;
+ cfg = readl(pll->reg + PLL_16FFT_CFG);
+ pll_type = (cfg & PLL_16FFT_CFG_PLL_TYPE_MASK) >>
PLL_16FFT_CFG_PLL_TYPE_SHIFT;
+
+ if (success && pll_type == PLL_16FFT_CFG_PLL_TYPE_FRACF && pllfm == 0) {
+ cal = readl(pll->reg + PLL_16FFT_CAL_CTRL);
- return -EBUSY;
+ /* Enable calibration for FRACF */
+ cal |= PLL_16FFT_CAL_CTRL_CAL_EN;
+
+ /* Enable fast cal mode */
+ cal |= PLL_16FFT_CAL_CTRL_FAST_CAL;
+
+ /* Disable calibration bypass */
+ cal &= ~PLL_16FFT_CAL_CTRL_CAL_BYP;
+
+ /* Set CALCNT to 2 */
+ cal &= ~PLL_16FFT_CAL_CTRL_CAL_CNT_MASK;
+ cal |= 2 << PLL_16FFT_CAL_CTRL_CAL_CNT_SHIFT;
+
+ /* Note this register does not readback the written value. */
+ writel(cal, pll->reg + PLL_16FFT_CAL_CTRL);
+
+ success = 0;
+ for (i = 0; i < 10; i++) {
+ stat = readl(pll->reg + PLL_16FFT_CAL_STAT);
+ if (stat & PLL_16FFT_CAL_STAT_CAL_LOCK) {
+ success = 1;
+ break;
+ }
+ }
+ }
+
+ if (success == 0) {
+ printf("%s: pll (%s) failed to lock\n", __func__,
+ clk->dev->name);
+ return -EBUSY;
+ } else {
+ return 0;
+ }
}
static ulong ti_pll_clk_get_rate(struct clk *clk)
--
2.36.1
[U-Boot] [PATCH] ARM: DRA72x: Add support for detection of DRA71x SR 2.1
DRA71x processors are reduced pin and software compatible
derivative of DRA72 processors. Add support for detection
of SR2.1 version of DRA71x family of processors.
Signed-off-by: Vishal Mahaveer <vish...@ti.com>
---
arch/arm/include/asm/arch-omap5/omap.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
arch/arm/mach-omap2/omap5/hw_data.c| 2 ++
arch/arm/mach-omap2/omap5/hwinit.c | 3 +++
arch/arm/mach-omap2/omap5/sdram.c | 2 ++
board/ti/dra7xx/evm.c | 3 +++
6 files changed, 12 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap5/omap.h
b/arch/arm/include/asm/arch-omap5/omap.h
index b047f0d..6705544 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -63,6 +63,7 @@
#define DRA752_CONTROL_ID_CODE_ES2_0 0x2B99002F
#define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F
#define DRA722_CONTROL_ID_CODE_ES2_0 0x1B9BC02F
+#define DRA722_CONTROL_ID_CODE_ES2_1 0x2B9BC02F
/* UART */
#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000)
diff --git a/arch/arm/include/asm/omap_common.h
b/arch/arm/include/asm/omap_common.h
index ef5c481..46ee9c2 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -766,6 +766,7 @@ static inline u8 is_dra72x(void)
#define DRA752_ES2_0 0x07520200
#define DRA722_ES1_0 0x07220100
#define DRA722_ES2_0 0x07220200
+#define DRA722_ES2_1 0x07220210
/*
* silicon device type
diff --git a/arch/arm/mach-omap2/omap5/hw_data.c
b/arch/arm/mach-omap2/omap5/hw_data.c
index 4ad6b53..06a9fd2 100644
--- a/arch/arm/mach-omap2/omap5/hw_data.c
+++ b/arch/arm/mach-omap2/omap5/hw_data.c
@@ -719,6 +719,7 @@ void __weak hw_data_init(void)
case DRA722_ES1_0:
case DRA722_ES2_0:
+ case DRA722_ES2_1:
*prcm = _prcm;
*dplls_data = _dplls;
*ctrl = _ctrl;
@@ -753,6 +754,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
*regs = _dra72x_es1;
break;
case DRA722_ES2_0:
+ case DRA722_ES2_1:
*regs = _dra72x_es2;
break;
diff --git a/arch/arm/mach-omap2/omap5/hwinit.c
b/arch/arm/mach-omap2/omap5/hwinit.c
index afe59e0..d53900f 100644
--- a/arch/arm/mach-omap2/omap5/hwinit.c
+++ b/arch/arm/mach-omap2/omap5/hwinit.c
@@ -377,6 +377,9 @@ void init_omap_revision(void)
case DRA722_CONTROL_ID_CODE_ES2_0:
*omap_si_rev = DRA722_ES2_0;
break;
+ case DRA722_CONTROL_ID_CODE_ES2_1:
+ *omap_si_rev = DRA722_ES2_1;
+ break;
default:
*omap_si_rev = OMAP5430_SILICON_ID_INVALID;
}
diff --git a/arch/arm/mach-omap2/omap5/sdram.c
b/arch/arm/mach-omap2/omap5/sdram.c
index 7712923..684b5bc 100644
--- a/arch/arm/mach-omap2/omap5/sdram.c
+++ b/arch/arm/mach-omap2/omap5/sdram.c
@@ -481,6 +481,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz);
break;
case DRA722_ES2_0:
+ case DRA722_ES2_1:
*regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2;
*size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2);
break;
@@ -714,6 +715,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
case DRA752_ES2_0:
case DRA722_ES1_0:
case DRA722_ES2_0:
+ case DRA722_ES2_1:
bug_00339_regs_ptr = dra_bug_00339_regs;
*iterations = sizeof(dra_bug_00339_regs)/
sizeof(dra_bug_00339_regs[0]);
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 93d3d0b..58feb15 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -236,6 +236,7 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs
**regs)
break;
case DRA722_ES1_0:
case DRA722_ES2_0:
+ case DRA722_ES2_1:
if (ram_size < CONFIG_MAX_MEM_MAPPED)
*regs = _1_regs_ddr3_666_mhz_1cs_dra_es1;
else
@@ -299,6 +300,7 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs
**dmm_lisa_regs)
break;
case DRA722_ES1_0:
case DRA722_ES2_0:
+ case DRA722_ES2_1:
default:
if (ram_size < CONFIG_MAX_MEM_MAPPED)
*dmm_lisa_regs = _map_2G_x_2;
@@ -643,6 +645,7 @@ void recalibrate_iodelay(void)
switch (omap_revision()) {
case DRA722_ES1_0:
case DRA722_ES2_0:
+ case DRA722_ES2_1:
pads = dra72x_core_padconf_array_common;
npads = ARRAY_SIZE(dra72x_core_padconf_array_common);
if (board_is_dra71x_evm()) {
--
1.9.1
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[U-Boot] [PATCH V2] ti: qspi: set flash quad bit based on quad support flag
Update op_mode_rx flag based on CONFIG_QSPI_QUAD_SUPPORT flag, instead of platform. Signed-off-by: Vishal Mahaveer vish...@ti.com Reviewed-by: Jagan Teki jt...@openedev.com --- Re-sending, because missed copying Tom Rini http://marc.info/?l=u-bootm=143948953129327w=2 drivers/spi/ti_qspi.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index 3356c0f..af40ec8 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -106,7 +106,6 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) slave-memory_map = (void *)MMAP_START_ADDR_DRA; #else slave-memory_map = (void *)MMAP_START_ADDR_AM43x; - slave-op_mode_rx = 8; #endif #ifdef CONFIG_QSPI_QUAD_SUPPORT @@ -114,6 +113,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_slave *qslave) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); + slave-op_mode_rx = SPI_OPM_RX_QOF; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | -- 1.7.4.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
