Re: [U-Boot] [PATCH] i2c: xiic: Record xilinx i2c with Zynq fragment
On Fri, Sep 07, 2018 at 08:02:05AM +0200, Michal Simek wrote: > Include xilinx soft i2c controller to Zynq fragment to make clear who is > responsible for it. > > Signed-off-by: Michal Simek Applied to for-current, thanks! signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] i2c: xiic: Record xilinx i2c with Zynq fragment
On Fri, Sep 07, 2018 at 08:02:05AM +0200, Michal Simek wrote: > Include xilinx soft i2c controller to Zynq fragment to make clear who is > responsible for it. > > Signed-off-by: Michal Simek Cool, thanks! > --- > > Normally we are handling all these drivers via one fragment to make sure > that there is only one central contact. Another reason is that people are > changing and their responsibility is moving time to time. This is fine with me, but what about sorting the entries? I don't care much because it is "your" entry, yet I thought I mention it. Let me know if I should apply this as-is nonetheless. > > --- > MAINTAINERS | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 9ad052aeac39..d870cb57c887 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2311,6 +2311,7 @@ F: drivers/clocksource/cadence_ttc_timer.c > F: drivers/i2c/busses/i2c-cadence.c > F: drivers/mmc/host/sdhci-of-arasan.c > F: drivers/edac/synopsys_edac.c > +F: drivers/i2c/busses/i2c-xiic.c > > ARM64 PORT (AARCH64 ARCHITECTURE) > M: Catalin Marinas > -- > 1.9.1 > signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
On Wed, Dec 05, 2012 at 09:35:26PM -0200, Fabio Estevam wrote:
> Hi Wolfram,
>
> On Wed, Dec 5, 2012 at 6:48 PM, Wolfram Sang wrote:
>
> > diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
> > index 4701be8..e38e151 100644
> > --- a/drivers/mtd/nand/mxs_nand.c
> > +++ b/drivers/mtd/nand/mxs_nand.c
> > @@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_nand_info *info)
> > {
> > struct mxs_gpmi_regs *gpmi_regs =
> > (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
> > + struct mxs_bch_regs *bch_regs =
> > + (struct mxs_bch_regs *)MXS_BCH_BASE;
> > int i = 0, j;
> >
> > info->desc = malloc(sizeof(struct mxs_dma_desc *) *
> > @@ -1081,6 +1083,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
> >
> > /* Reset the GPMI block. */
> > mxs_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg);
> > + mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);
>
> In your kernel patch you only do the reset for mx23, but here you do
> it for mx28.
>
> Which one is correct?
Both patches are correct. Check the kernel code again, please,
especially the function arguments.
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[U-Boot] [PATCH] mtd: nand: mxs: reset BCH earlier, too, to avoid NAND startup problems
It could happen (1 out of 100 times) that NAND did not start up correctly after
warm rebooting, so we end up with various failures or DMA timed out due to a
stalled BCH. When resetting BCH together with GPMI, the issue could not be
observed anymore (after 1+ reboots). We probably need the consistent state
already before sending commands to NAND. This behaviour was observed in barebox
and kernel, so I assume it affects U-Boot as well. I chose to keep the extra
reset for BCH when changing the flash layout to be on the safe side.
Signed-off-by: Wolfram Sang
---
Only compile tested. Test case was to repeatedly reboot into a simple userspace
on a UBI volume. Either the bootloader failed to find its data or the kernel
could not mount the UBI volume once in a while. (Yes, the kernel could not
mount the UBI although it was itself loaded correctly from NAND. So, it is some
set-up issue.) This was nasty to debug, so I thought I let you know...
drivers/mtd/nand/mxs_nand.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 4701be8..e38e151 100644
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -1058,6 +1058,8 @@ int mxs_nand_init(struct mxs_nand_info *info)
{
struct mxs_gpmi_regs *gpmi_regs =
(struct mxs_gpmi_regs *)MXS_GPMI_BASE;
+ struct mxs_bch_regs *bch_regs =
+ (struct mxs_bch_regs *)MXS_BCH_BASE;
int i = 0, j;
info->desc = malloc(sizeof(struct mxs_dma_desc *) *
@@ -1081,6 +1083,7 @@ int mxs_nand_init(struct mxs_nand_info *info)
/* Reset the GPMI block. */
mxs_reset_block(&gpmi_regs->hw_gpmi_ctrl0_reg);
+ mxs_reset_block(&bch_regs->hw_bch_ctrl_reg);
/*
* Choose NAND mode, set IRQ polarity, disable write protection and
--
1.7.10.4
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[U-Boot] [PATCH] apbh_dma: return error value on timeout
When a timeout occurs, the return value is prepared but never returned. Fix that. Signed-off-by: Uwe Kleine-König Signed-off-by: Wolfram Sang Cc: Marek Vasut --- drivers/dma/apbh_dma.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index 69a1042..4000974 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -606,7 +606,7 @@ int mxs_dma_wait_complete(uint32_t timeout, unsigned int chan) mxs_dma_reset(chan); } - return 0; + return ret; } /* -- 1.7.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/15] iMX28: Add I2C bus driver
> Oh I2C, not SPI. Sorry. > > Will add Based on line, cheers! Cool, thanks. -- Pengutronix e.K. | Wolfram Sang| Industrial Linux Solutions | http://www.pengutronix.de/ | signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 05/15] iMX28: Add I2C bus driver
> > > diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
> > > new file mode 100644
> > > index 000..9f380a0
> > > --- /dev/null
> > > +++ b/drivers/i2c/mxs_i2c.c
> > > @@ -0,0 +1,240 @@
> > > +/*
> > > + * Freescale i.MX28 I2C Driver
> > > + *
> > > + * Copyright (C) 2011 Marek Vasut
> > > + * on behalf of DENX Software Engineering GmbH
> >
> > Do you mind adding the copyrights from the kernel driver here? It looks
> > quite inspired to me, even if you didn't like some of the variable names
> > and defines :)
>
> Bits are from the STMP3xxx driver, not much though.
Could you point me to that driver? Maybe it needs fixing as well,
because that pattern for example:
+ off = i;
+ for (; i < off + blen; i++) {
+ data >>= 8;
+ data |= buf[i - off] << 24;
+ if ((i & 3) == 2)
+ writel(data, &i2c_regs->hw_i2c_data);
+ }
+
+ remain = 24 - ((i & 3) * 8);
+ if (remain)
+ writel(data >> remain, &i2c_regs->hw_i2c_data);
is highly similar to my reimplementation of the "let's feed the buffer
code" in the kernel (to name one example). Check current linus-git:
for (i = 0; i < len; i++) {
data >>= 8;
data |= buf[i] << 24;
if ((i & 3) == 2)
writel(data, i2c->regs + MXS_I2C_DATA);
}
/* Write out the remaining bytes if any */
shifts_left = 24 - (i & 3) * 8;
if (shifts_left)
writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA);
I'd be very surprised if two programmers would come up with two routines
that equal?
Regards,
Wolfram
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Re: [U-Boot] [PATCH 05/15] iMX28: Add I2C bus driver
Hi Marek, On Mon, Sep 12, 2011 at 06:06:39AM +0200, Marek Vasut wrote: > Signed-off-by: Marek Vasut > Cc: Heiko Schocher > Cc: Stefano Babic > Cc: Wolfgang Denk > Cc: Detlev Zundel > --- > drivers/i2c/Makefile |1 + > drivers/i2c/mxs_i2c.c | 240 > + > 2 files changed, 241 insertions(+), 0 deletions(-) > create mode 100644 drivers/i2c/mxs_i2c.c > > diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile > index a48047a..2fb521e 100644 > --- a/drivers/i2c/Makefile > +++ b/drivers/i2c/Makefile > @@ -31,6 +31,7 @@ COBJS-$(CONFIG_FSL_I2C) += fsl_i2c.o > COBJS-$(CONFIG_I2C_MVTWSI) += mvtwsi.o > COBJS-$(CONFIG_I2C_MV) += mv_i2c.o > COBJS-$(CONFIG_I2C_MXC) += mxc_i2c.o > +COBJS-$(CONFIG_I2C_MXS) += mxs_i2c.o > COBJS-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o > COBJS-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o > COBJS-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o > diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c > new file mode 100644 > index 000..9f380a0 > --- /dev/null > +++ b/drivers/i2c/mxs_i2c.c > @@ -0,0 +1,240 @@ > +/* > + * Freescale i.MX28 I2C Driver > + * > + * Copyright (C) 2011 Marek Vasut > + * on behalf of DENX Software Engineering GmbH Do you mind adding the copyrights from the kernel driver here? It looks quite inspired to me, even if you didn't like some of the variable names and defines :) Regards, Wolfram -- Pengutronix e.K. | Wolfram Sang| Industrial Linux Solutions | http://www.pengutronix.de/ | signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] nand/davinci: make sure ECC calculation has really started
Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.
See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.
Signed-off-by: Wolfram Sang
Cc: Sandeep Paulraj
---
drivers/mtd/nand/davinci_nand.c | 15 ++-
1 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 4ca738e..c5a86d6 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -484,7 +484,20 @@ static int nand_davinci_4bit_correct_data(struct mtd_info
*mtd, uint8_t *dat,
__raw_writel(1 << 13, &davinci_emif_regs->nandfcr);
/*
-* Wait for the corr_state field (bits 8 to 11)in the
+* Wait for the corr_state field (bits 8 to 11) in the
+* NAND Flash Status register to be not equal to 0x0, 0x1, 0x2, or 0x3.
+* Otherwise ECC calculation has not even begun and the next loop might
+* fail because of a false positive!
+*/
+ i = NAND_TIMEOUT;
+ do {
+ val = __raw_readl(&davinci_emif_regs->nandfsr);
+ val &= 0xc00;
+ i--;
+ } while ((i > 0) && !val);
+
+ /*
+* Wait for the corr_state field (bits 8 to 11) in the
* NAND Flash Status register to be equal to 0x0, 0x1, 0x2, or 0x3.
*/
i = NAND_TIMEOUT;
--
1.7.1
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Re: [U-Boot] MPC5200B: Trouble with config pins
On Fri, Nov 21, 2008 at 08:09:20AM -0700, Grant Likely wrote: > Juergen, I haven't seen this behaviour. Have you asked you Freescale FAE? > > Hey John, have you ever seen this sort of issue? To keep you updated: It was the PHY which would drive the lines high if the reset signal was "too long". Next revision of the PHY will have this fixed. (Yeah, next revision, sigh...) All the best, Wolfram -- Dipl.-Ing. Wolfram Sang | http://www.pengutronix.de Pengutronix - Linux Solutions for Science and Industry signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
