Re: [PATCH 1/6] include: env: phytec: overlays: Add extension command
On Tue, 2024-07-09 at 15:47 +0200, Wadim Egorov wrote:
>
>
> Am 09.07.24 um 15:31 schrieb Daniel Schultz:
> > Hi Yannic,
> >
> > On 09.07.24 08:49, Yannic Moog wrote:
> > > Hello Daniel,
> > >
> > > On Sun, 2024-07-07 at 23:07 -0700, Daniel Schultz wrote:
> > > > Add a new environment routine to apply extensions. Our SOM detection
> > > > adds overlays via the extension framework to alter the kernel
> > > > device-tree according to the flashed EEPROM image.
> > > >
> > > > Signed-off-by: Daniel Schultz
> > > > ---
> > > > include/env/phytec/overlays.env | 20
> > > > 1 file changed, 20 insertions(+)
> > > >
> > > > diff --git a/include/env/phytec/overlays.env
> > > > b/include/env/phytec/overlays.env
> > > > index 78721cde654..50110e731bd 100644
> > > > --- a/include/env/phytec/overlays.env
> > > > +++ b/include/env/phytec/overlays.env
> > > > @@ -23,6 +23,16 @@ mmc_apply_overlays=
> > > > fi;
> > > > done;
> > > > fi;
> > > > +#ifdef CONFIG_CMD_EXTENSION
> > > > +mmc_apply_extensions=
> > > > + setenv extension_overlay_addr ${fdtoverlay_addr_r};
> > > > + setenv extension_overlay_cmd 'load mmc ${mmcdev}:${mmcpart}
> > > > + ${fdtoverlay_addr_r} ${extension_overlay_name}';
> > > > + extension scan;
> > > > + extension apply all;
> > > > +#else
> > > > +mmc_apply_extensions=echo "no extension command"
> > > Do you think it makes sense to make this fail? I would think
> > > "apply_extensions" would be
> > > unsuccessful if extensions are not working.
> >
> > Technically, you don't need our SOM detection overlays. They just make
> > the boot nicer and you don't have any probe errors or other error
> > messages. So, in my opinion, it's better not apply them instead of
> > stopping the entire boot.
>
> My recommendation is to embed all SoM variant related overlays into
> u-boot.img's FIT using binman.
Didn't think binman would be used for that, but I share your opinion regarding
overlay packaging.
Yannic
>
> This makes the extension command obsolete, and especially the handling
> for loading of overlays from different boot sources / storage devices.
>
> Having them available directly in the u-boot binary resolves the issue
> of not found overlays.
>
> We do not know how users will proceed after u-boot booted and if the
> overlays will be available to the "extension setup". Better to have
> everything in place and fixup to the best we know using our SoM data
> stored in the EEPROM.
>
> This kind of overlays should be applied regardless of the boot device.
>
> >
> > Regards,
> > Daniel
> >
> > >
> > > Yannic
> > >
> > > > +#endif
> > > > net_load_bootenv=${get_cmd} ${bootenv_addr_r} ${bootenv}
> > > > net_load_overlay=${get_cmd} ${fdtoverlay_addr_r} ${overlay}
> > > > net_apply_overlays=
> > > > @@ -36,3 +46,13 @@ net_apply_overlays=
> > > > fi;
> > > > done;
> > > > fi;
> > > > +#ifdef CONFIG_CMD_EXTENSION
> > > > +net_apply_extensions=
> > > > + setenv extension_overlay_addr ${fdtoverlay_addr_r};
> > > > + setenv extension_overlay_cmd '${get_cmd} ${fdtoverlay_addr_r}
> > > > + ${extension_overlay_name}';
> > > > + extension scan;
> > > > + extension apply all;
> > > > +#else
> > > > +net_apply_extensions=echo "no extension command"
> > > > +#endif
Re: [PATCH 1/6] include: env: phytec: overlays: Add extension command
Hello Daniel,
On Sun, 2024-07-07 at 23:07 -0700, Daniel Schultz wrote:
> Add a new environment routine to apply extensions. Our SOM detection
> adds overlays via the extension framework to alter the kernel
> device-tree according to the flashed EEPROM image.
>
> Signed-off-by: Daniel Schultz
> ---
> include/env/phytec/overlays.env | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/include/env/phytec/overlays.env b/include/env/phytec/overlays.env
> index 78721cde654..50110e731bd 100644
> --- a/include/env/phytec/overlays.env
> +++ b/include/env/phytec/overlays.env
> @@ -23,6 +23,16 @@ mmc_apply_overlays=
> fi;
> done;
> fi;
> +#ifdef CONFIG_CMD_EXTENSION
> +mmc_apply_extensions=
> + setenv extension_overlay_addr ${fdtoverlay_addr_r};
> + setenv extension_overlay_cmd 'load mmc ${mmcdev}:${mmcpart}
> + ${fdtoverlay_addr_r} ${extension_overlay_name}';
> + extension scan;
> + extension apply all;
> +#else
> +mmc_apply_extensions=echo "no extension command"
Do you think it makes sense to make this fail? I would think "apply_extensions"
would be
unsuccessful if extensions are not working.
Yannic
> +#endif
> net_load_bootenv=${get_cmd} ${bootenv_addr_r} ${bootenv}
> net_load_overlay=${get_cmd} ${fdtoverlay_addr_r} ${overlay}
> net_apply_overlays=
> @@ -36,3 +46,13 @@ net_apply_overlays=
> fi;
> done;
> fi;
> +#ifdef CONFIG_CMD_EXTENSION
> +net_apply_extensions=
> + setenv extension_overlay_addr ${fdtoverlay_addr_r};
> + setenv extension_overlay_cmd '${get_cmd} ${fdtoverlay_addr_r}
> + ${extension_overlay_name}';
> + extension scan;
> + extension apply all;
> +#else
> +net_apply_extensions=echo "no extension command"
> +#endif
[PATCH 1/2] arm: imx8mm-phycore: move to OF_UPSTREAM
The PHYCORE_IMX8MM is used by the phyBOARD-Polis and the
phyGATE-Tauri-L. Migrate both boards to OF_UPSTREAM. Linux kernel device
trees for both boards can be used as is, corresponding U-Boot device
tree files are removed. U-Boot tweaks are kept unchanged.
Signed-off-by: Yannic Moog
---
arch/arm/dts/Makefile | 2 -
arch/arm/dts/imx8mm-phyboard-polis-rdk.dts | 460 ---
arch/arm/dts/imx8mm-phycore-som.dtsi | 440 --
arch/arm/dts/imx8mm-phygate-tauri-l.dts| 489 -
arch/arm/mach-imx/imx8m/Kconfig| 1 +
board/phytec/phycore_imx8mm/MAINTAINERS| 3 -
configs/imx8mm-phygate-tauri-l_defconfig | 2 +-
configs/phycore-imx8mm_defconfig | 2 +-
8 files changed, 3 insertions(+), 1396 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c9f1b25ad64..480f8ff569d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1016,8 +1016,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-kontron-bl-osm-s.dtb \
imx8mm-mx8menlo.dtb \
imx8mm-phg.dtb \
- imx8mm-phyboard-polis-rdk.dtb \
- imx8mm-phygate-tauri-l.dtb \
imx8mn-bsh-smm-s2.dtb \
imx8mn-bsh-smm-s2pro.dtb \
imx8mq-cm.dtb \
diff --git a/arch/arm/dts/imx8mm-phyboard-polis-rdk.dts
b/arch/arm/dts/imx8mm-phyboard-polis-rdk.dts
deleted file mode 100644
index 03e7679217b..000
--- a/arch/arm/dts/imx8mm-phyboard-polis-rdk.dts
+++ /dev/null
@@ -1,460 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2022 PHYTEC Messtechnik GmbH
- * Author: Teresa Remmet
- */
-
-/dts-v1/;
-
-#include
-#include
-#include
-#include "imx8mm-phycore-som.dtsi"
-
-/ {
- model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
- compatible = "phytec,imx8mm-phyboard-polis-rdk",
-"phytec,imx8mm-phycore-som", "fsl,imx8mm";
-
- chosen {
- stdout-path =
- };
-
- bt_osc_32k: bt-lp-clock {
- compatible = "fixed-clock";
- clock-frequency = <32768>;
- clock-output-names = "bt_osc_32k";
- #clock-cells = <0>;
- };
-
- can_osc_40m: can-clock {
- compatible = "fixed-clock";
- clock-frequency = <4000>;
- clock-output-names = "can_osc_40m";
- #clock-cells = <0>;
- };
-
- fan {
- compatible = "gpio-fan";
- gpios = < 8 GPIO_ACTIVE_HIGH>;
- gpio-fan,speed-map = <0 0
- 13000 1>;
- pinctrl-names = "default";
- pinctrl-0 = <_fan>;
- #cooling-cells = <2>;
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-names = "default";
- pinctrl-0 = <_leds>;
-
- led-0 {
- color = ;
- function = LED_FUNCTION_DISK;
- gpios = < 1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc2";
- };
-
- led-1 {
- color = ;
- function = LED_FUNCTION_DISK;
- gpios = < 15 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc1";
- };
-
- led-2 {
- color = ;
- function = LED_FUNCTION_CPU;
- gpios = < 14 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- };
- };
-
- usdhc1_pwrseq: pwr-seq {
- compatible = "mmc-pwrseq-simple";
- post-power-on-delay-ms = <100>;
- power-off-delay-us = <60>;
- reset-gpios = < 7 GPIO_ACTIVE_LOW>;
- };
-
- reg_can_en: regulator-can-en {
- compatible = "regulator-fixed";
- gpio = < 9 GPIO_ACTIVE_LOW>;
- pinctrl-names = "default";
- pinctrl-0 = <_can_en>;
- regulator-max-microvolt = <330>;
- regulator-min-microvolt = <330>;
- regulator-name = "CAN_EN";
- startup-delay-us = <20>;
- };
-
- reg_usb_otg1_vbus: regulator-usb-otg1 {
- compatible = "regulator-fixed";
- gpio = < 12 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- pinctrl-names = "default";
- pinctrl-0 = <_usbotg1pwrgrp>;
- regulator-name = "usb_otg1_vbus";
-
[PATCH 2/2] arm: imx8mp-phycore: move to OF_UPSTREAM
The PHYCORE_IMX8MP is used by the phyBOARD-Pollux. Migrate board to
OF_UPSTREAM. Linux kernel device tree for the board can be used as is,
corresponding U-Boot device tree files are removed. U-Boot tweaks are
kept unchanged.
Signed-off-by: Yannic Moog
---
arch/arm/dts/Makefile | 1 -
arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 361
arch/arm/dts/imx8mp-phycore-som.dtsi| 323 -
arch/arm/mach-imx/imx8m/Kconfig | 1 +
board/phytec/phycore_imx8mp/MAINTAINERS | 1 -
configs/phycore-imx8mp_defconfig| 2 +-
6 files changed, 2 insertions(+), 687 deletions(-)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 480f8ff569d..d09d0d84bec 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1033,7 +1033,6 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mp-dhcom-pdk3-overlay-rev100.dtbo \
imx8mp-icore-mx8mp-edimm2.2.dtb \
imx8mp-msc-sm2s.dtb \
- imx8mp-phyboard-pollux-rdk.dtb \
imx8mq-pico-pi.dtb \
imx8mq-kontron-pitx-imx8m.dtb \
imx8mq-librem5-r4.dtb
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
deleted file mode 100644
index c8640cac3ed..000
--- a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
+++ /dev/null
@@ -1,361 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2020 PHYTEC Messtechnik GmbH
- * Author: Teresa Remmet
- */
-
-/dts-v1/;
-
-#include
-#include
-#include "imx8mp-phycore-som.dtsi"
-
-/ {
- model = "PHYTEC phyBOARD-Pollux i.MX8MP";
- compatible = "phytec,imx8mp-phyboard-pollux-rdk",
-"phytec,imx8mp-phycore-som", "fsl,imx8mp";
-
- chosen {
- stdout-path =
- };
-
- reg_can1_stby: regulator-can1-stby {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1_reg>;
- gpio = < 20 GPIO_ACTIVE_LOW>;
- regulator-max-microvolt = <330>;
- regulator-min-microvolt = <330>;
- regulator-name = "can1-stby";
- };
-
- reg_can2_stby: regulator-can2-stby {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2_reg>;
- gpio = < 21 GPIO_ACTIVE_LOW>;
- regulator-max-microvolt = <330>;
- regulator-min-microvolt = <330>;
- regulator-name = "can2-stby";
- };
-
- reg_usb1_vbus: regulator-usb1-vbus {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_usb1_vbus>;
- gpio = < 12 GPIO_ACTIVE_LOW>;
- regulator-max-microvolt = <500>;
- regulator-min-microvolt = <500>;
- regulator-name = "usb1_host_vbus";
- };
-
- reg_usdhc2_vmmc: regulator-usdhc2 {
- compatible = "regulator-fixed";
- pinctrl-names = "default";
- pinctrl-0 = <_reg_usdhc2_vmmc>;
- regulator-name = "VSD_3V3";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- gpio = < 19 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- startup-delay-us = <100>;
- off-on-delay-us = <12000>;
- };
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_eqos>;
- phy-mode = "rgmii-id";
- phy-handle = <>;
- status = "okay";
-
- mdio {
- compatible = "snps,dwmac-mdio";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ethphy0: ethernet-phy@1 {
- compatible = "ethernet-phy-ieee802.3-c22";
- reg = <0x1>;
- ti,rx-internal-delay = ;
- ti,tx-internal-delay = ;
- ti,fifo-depth = ;
- ti,clk-output-sel = ;
- enet-phy-lane-no-swap;
- };
- };
-};
-
-/* CAN FD */
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan1>;
- xceiver-supply = <_can1_stby>;
- status = "okay";
-};
-
- {
- pinctrl-names = "default";
- pinctrl-0 = <_flexcan2>;
- xceiver-supply = <_can2_stby>;
- status = "okay";
-};
-
- {
- clock-frequency = <
[PATCH 0/2] Migrate PHYTEC imx8m boards to OF_UPSTREAM
- update MAINTAINERS - delete synced dt files - imply OF_UPSTREAM - update default device tree --- Yannic Moog (2): arm: imx8mm-phycore: move to OF_UPSTREAM arm: imx8mp-phycore: move to OF_UPSTREAM arch/arm/dts/Makefile | 3 - arch/arm/dts/imx8mm-phyboard-polis-rdk.dts | 460 -- arch/arm/dts/imx8mm-phycore-som.dtsi| 440 - arch/arm/dts/imx8mm-phygate-tauri-l.dts | 489 arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 361 arch/arm/dts/imx8mp-phycore-som.dtsi| 323 -- arch/arm/mach-imx/imx8m/Kconfig | 2 + board/phytec/phycore_imx8mm/MAINTAINERS | 3 - board/phytec/phycore_imx8mp/MAINTAINERS | 1 - configs/imx8mm-phygate-tauri-l_defconfig| 2 +- configs/phycore-imx8mm_defconfig| 2 +- configs/phycore-imx8mp_defconfig| 2 +- 12 files changed, 5 insertions(+), 2083 deletions(-) --- base-commit: cecb5fbb42c8b3de3d5a7df40bc01d1fdf4731d3 change-id: 20240523-phytec_imx8_of_upstream-0a7d440038c9 Best regards, -- Yannic Moog
Re: [PATCH v3 2/3] configs: imx93-phyboard-segin: Add USB support
Hi Fabio, hi Marek, On Sun, 2024-03-24 at 15:00 -0300, Fabio Estevam wrote: > On Thu, Mar 21, 2024 at 4:17 PM Marek Vasut wrote: > > > $ git grep -i usb.*phytec configs > > configs/phycore_pcl063_defconfig:CONFIG_USB_GADGET_MANUFACTURER="Phytec" > > configs/phycore_pcl063_ull_defconfig:CONFIG_USB_GADGET_MANUFACTURER="Phytec" > > > > It would be good to be consistent. > > > > Also, what is the vendor/product number those two boards use ? > > They both use: > > CONFIG_USB_GADGET_VENDOR_NUM=0x01b67 > CONFIG_USB_GADGET_PRODUCT_NUM=0x4fff > > configs/phycore-imx8mp_defconfig has: > > CONFIG_USB_GADGET_MANUFACTURER="FSL" > CONFIG_USB_GADGET_VENDOR_NUM=0x0525 > CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5 > > I agree we should make this consistent. > > To not block this series, I applied it, but it would be great if > > Phytec could submit > a separate series making it consistent across their boards. We'll take care of that. Thank you for the feedback. Yannic > > Thanks
[PATCH] board: phytec: phycore_imx8mp.env fix netboot issues
The "run netargs" command should come later in the "netboot" command
order when using dhcp since it sets the server and client ip addresses.
The previous order led to misconfigured kernel boot params and thus
kernel panic when serverip was not manually set.
Further, following Linux FHS 3.0, change the nfsroot default directory
to /srv/nfs.
Fixes: 60f64bec414e ("board: phytec: phycore_imx8mp: Add fec support")
Signed-off-by: Yannic Moog
---
Depends on [1] which is on next already.
[1]
https://lore.kernel.org/u-boot/20240312085957.902398-1-l.anderw...@phytec.de/
---
board/phytec/phycore_imx8mp/phycore_imx8mp.env | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
index fae3e992654..7f6c5fd2c76 100644
--- a/board/phytec/phycore_imx8mp/phycore_imx8mp.env
+++ b/board/phytec/phycore_imx8mp/phycore_imx8mp.env
@@ -46,17 +46,17 @@ netargs=
nfsroot=${serverip}:${nfsroot},v3,tcp
netboot=
echo Booting from net ...;
- run netargs;
if test ${ip_dyn} = yes; then
setenv get_cmd dhcp;
else
setenv get_cmd tftp;
fi;
${get_cmd} ${loadaddr} ${image};
+ run netargs;
if ${get_cmd} ${fdt_addr} ${fdt_file}; then
booti ${loadaddr} - ${fdt_addr};
else
echo WARN: Cannot load the DT;
fi;
-nfsroot=/nfs
+nfsroot=/srv/nfs
sd_dev=1
---
base-commit: 86b79cf131b64eadae023a127921893d30503093
change-id: 20240322-phycore_mx8mp_netboot_fixes-337ceb4ba0cc
Best regards,
--
Yannic Moog
Re: [PATCH v4] board: phytec: phycore-imx93: Add phyBOARD-Segin-i.MX93 support
On Tue, 2024-01-30 at 15:50 +0100, Mathieu Othacehe wrote: > Add initial support for the PHYTEC phyBOARD-Segin-i.MX93 board based on > the PHYTEC phyCORE-i.MX93 SoM. > > Supported features: > - 1GB LPDDR4 RAM > - eMMC > - external SD > - FEC Ethernet > - debug UART > - watchdog > > Signed-off-by: Mathieu Othacehe Reviewed-by: Yannic Moog > --- > Hello, > > This new revision fixes the remarks of Primoz. The configuration is now > aligned on the savedefconfig output. The FEC Ethernet is also tested to be > working if this patch is in: > > https://patchwork.ozlabs.org/project/uboot/patch/20240130124337.497748-1-primoz.fi...@norik.com/ > > The proposed patch has been rebased on top of 6faba41. > > Thanks, > > Mathieu > > v3: https://lists.denx.de/pipermail/u-boot/2024-January/544493.html > > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi | 293 > arch/arm/dts/imx93-phyboard-segin.dts | 117 ++ > arch/arm/dts/imx93-phycore-som.dtsi | 126 ++ > arch/arm/mach-imx/imx9/Kconfig | 6 + > board/phytec/phycore_imx93/Kconfig | 13 + > board/phytec/phycore_imx93/MAINTAINERS | 10 + > board/phytec/phycore_imx93/Makefile | 14 + > board/phytec/phycore_imx93/lpddr4_timing.c | 1546 + > board/phytec/phycore_imx93/phycore-imx93.c | 42 + > board/phytec/phycore_imx93/phycore_imx93.env | 73 + > board/phytec/phycore_imx93/spl.c | 148 ++ > configs/imx93-phyboard-segin_defconfig | 138 ++ > doc/board/phytec/imx93-phyboard-segin.rst | 61 + > doc/board/phytec/index.rst | 1 + > include/configs/phycore_imx93.h | 28 + > 16 files changed, 2618 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/imx93-phyboard-segin-u-boot.dtsi > create mode 100644 arch/arm/dts/imx93-phyboard-segin.dts > create mode 100644 arch/arm/dts/imx93-phycore-som.dtsi > create mode 100644 board/phytec/phycore_imx93/Kconfig > create mode 100644 board/phytec/phycore_imx93/MAINTAINERS > create mode 100644 board/phytec/phycore_imx93/Makefile > create mode 100644 board/phytec/phycore_imx93/lpddr4_timing.c > create mode 100644 board/phytec/phycore_imx93/phycore-imx93.c > create mode 100644 board/phytec/phycore_imx93/phycore_imx93.env > create mode 100644 board/phytec/phycore_imx93/spl.c > create mode 100644 configs/imx93-phyboard-segin_defconfig > create mode 100644 doc/board/phytec/imx93-phyboard-segin.rst > create mode 100644 include/configs/phycore_imx93.h > >
Re: [PATCH] Add Phytec i.MX93 support
On Wed, 2024-01-24 at 14:30 +0100, Mathieu Othacehe wrote: > > Hello Yannic, > > > As a heads-up: you need to rebase as am62 (doc) got applied by Tom. > > Noted. > > > Is the trusted-firmware-a upstream version working? If so, please use that > > instead. > > It is but only on the master branch, so it might be better to stick to > the nxp-imx repository until a lts release is created. Ok, sounds reasonable. > > > > +#include > > > > I don't see a specific reason to have this include separate?! Group it with > > the others, please. > > Many other include files place it here, right after the > BOOT_TARGET_DEVICES macro, so I guess there must be a reason, even > though I am unsure why :). See doc/develop/distro.rst for information. The reason to have this separate is to have this wrapped in ifdefs. Since you have this unconditionally, you may move this include as far as I can tell. > > Thanks, > > Mathieu
Re: [PATCH] Add Phytec i.MX93 support
Hello Mathieu As a heads-up: you need to rebase as am62 (doc) got applied by Tom. On Wed, 2024-01-17 at 08:52 +0100, Mathieu Othacehe wrote: > Add support for the Phytec i.MX93 Segin evaluation kit. The SoM consists > of an NXP i.MX93 dual A55 CPU. The SoM is mounted on a Phytec Segin SBC. > > Signed-off-by: Mathieu Othacehe > --- > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/imx93-phycore-segin-u-boot.dtsi | 274 +++ > arch/arm/dts/imx93-phycore-segin.dts | 95 + > arch/arm/dts/imx93-phycore-som.dtsi | 64 + > arch/arm/mach-imx/imx9/Kconfig | 6 + > board/phytec/common/mmc.c | 49 + > board/phytec/imx93_phycore/Kconfig | 21 + > board/phytec/imx93_phycore/MAINTAINERS | 10 + > board/phytec/imx93_phycore/Makefile | 16 + > board/phytec/imx93_phycore/imx93_phycore.c | 89 + > board/phytec/imx93_phycore/imx93_phycore.env | 96 + > .../phytec/imx93_phycore/lpddr4_timing_1GB.c | 1546 + > board/phytec/imx93_phycore/spl.c | 181 ++ > configs/imx93_phycore_defconfig | 147 ++ > doc/board/phytec/imx93_phycore.rst | 68 + > doc/board/phytec/index.rst | 1 + > include/configs/imx93_phycore.h | 47 + > 17 files changed, 2712 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/imx93-phycore-segin-u-boot.dtsi > create mode 100644 arch/arm/dts/imx93-phycore-segin.dts > create mode 100644 arch/arm/dts/imx93-phycore-som.dtsi > create mode 100644 board/phytec/common/mmc.c > create mode 100644 board/phytec/imx93_phycore/Kconfig > create mode 100644 board/phytec/imx93_phycore/MAINTAINERS > create mode 100644 board/phytec/imx93_phycore/Makefile > create mode 100644 board/phytec/imx93_phycore/imx93_phycore.c > create mode 100644 board/phytec/imx93_phycore/imx93_phycore.env > create mode 100644 board/phytec/imx93_phycore/lpddr4_timing_1GB.c > create mode 100644 board/phytec/imx93_phycore/spl.c > create mode 100644 configs/imx93_phycore_defconfig > create mode 100644 doc/board/phytec/imx93_phycore.rst > create mode 100644 include/configs/imx93_phycore.h > > > > diff --git a/doc/board/phytec/imx93_phycore.rst > b/doc/board/phytec/imx93_phycore.rst > new file mode 100644 > index 000..f9b87691cdc > --- /dev/null > +++ b/doc/board/phytec/imx93_phycore.rst > @@ -0,0 +1,68 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > + > +imx93_phytec > + rename it to phyCORE-i.MX 93 please, as this is the official name. See https://www.phytec.eu/en/produkte/system-on-modules/phycore-imx-91-93/ > + > +U-Boot for the NXP i.MX93 Phytec SoM of a Segin board Same here; Use official naming, please. > + > +Quick Start > +--- > + > +- Get and Build the ARM Trusted firmware > +- Get the DDR firmware > +- Get ahab-container.img > +- Build U-Boot > +- Boot > + > +Get and Build the ARM Trusted firmware > +-- > + > +Note: srctree is U-Boot source directory > +Get ATF from: https://github.com/nxp-imx/imx-atf/ Is the trusted-firmware-a upstream version working? If so, please use that instead. > +branch: lf_v2.8 > + > +.. code-block:: bash > + > + $ unset LDFLAGS > + $ make PLAT=imx93 bl31 > + $ cp build/imx93/release/bl31.bin $(srctree) > + > +Get the DDR firmware > + > + > +.. code-block:: bash > + > + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.21.bin > + $ chmod +x firmware-imx-8.21.bin > + $ ./firmware-imx-8.21.bin > + $ cp firmware-imx-8.21/firmware/ddr/synopsys/lpddr4*.bin $(srctree) > + > +Get ahab-container.img > +--- > + > +.. code-block:: bash > + > + $ wget > https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-sentinel-0.10.bin > + $ chmod +x firmware-sentinel-0.10.bin > + $ ./firmware-sentinel-0.10.bin > + $ cp firmware-sentinel-0.10/mx93a0-ahab-container.img $(srctree) > + > +Build U-Boot > + > + > +.. code-block:: bash > + > + $ export CROSS_COMPILE=aarch64-poky-linux- Leave this as generic as possible please. ARM toolchain should be sufficient. > + $ make imx93_phytec_defconfig > + $ make > + > +Burn the flash.bin to MicroSD card offset 32KB: > + > +.. code-block:: bash > + > + $ dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=notrunc > + > +Boot > + > + > +Set Boot switch to SD boot Add info to what position(s) the boot switches must be set. > diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst > index 9996bce9741..a740f0cbae4 100644 > --- a/doc/board/phytec/index.rst > +++ b/doc/board/phytec/index.rst > @@ -7,5 +7,6 @@ PHYTEC > :maxdepth: 2 > > imx8mm-phygate-tauri-l > + imx93_phycore > phycore-imx8mm > phycore-imx8mp > diff --git a/include/configs/imx93_phycore.h b/include/configs/imx93_phycore.h > new file mode 100644 > index
Re: [Upstream] [PATCH] Add Phytec i.MX93 support
Hi Mathieu On Thu, 2024-01-18 at 12:04 +0100, Mathieu Othacehe wrote: > > Hi, > > Thanks for the review! > > > s/imx93_phycore/phycore_imx93 > > > > To fit into existing PHYTEC boards already in tree. > > I deliberately picked that order so that it is aligned with most imx > boards already supported by u-boot. > > The supported imx93 boards follow that pattern: > > - imx93_var_som > - imx93_evk > > So it felt natural to have: > > - imx93_phycore > > Plus the kernel device-trees are also following that order: > > - imx93-phycore-xxx > > On the other hand, it is true that the existing phycore boards use the > phytec_* pattern: > > - phycore_am335x_r2 > - phycore_imx8mm > - phycore_imx8mp > - phycore_rk3288/ > > So that will be confusing no matter the option that we choose. > > I will come up with a v2 fixing your other remarks, but I think that > this should be addressed beforehand. We decided not to alter the names after the fact, but for imx8 product family we noticed the same problem. Anyway, to avoid this whole issue, please name the defconfig and the device tree to imx93-phyboard- segin. This avoids the challenge of naming configs when you have multiple carrier boards supported for the same SoM. Further, for the board/phytec/ dir, only phytec board code is in there, so you may stick to the phytec naming convention (i.e. phycore_imx93 as Primoz suggested). This also allows to reuse the phycore code (see imx8mm-phygate-tauri-l for reference). Yannic > > Thanks, > > Mathieu > ___ > upstream mailing list > upstr...@lists.phytec.de > http://lists.phytec.de/cgi-bin/mailman/listinfo/upstream
[PATCH v2] board: phytec: fix link error when disabling PHYTEC_SOM_DETECTION
Commit aa7858fe5e2e ("board: phytec: som_detection: move definitions to
source file") moved function definitions from header to source file.
Makefile however was not updated to unconditionally (from
[..]_SOM_DETECTION) build the imx8 and phytec som detection units.
Also remove unused includes that cause build failures on arm 32bit
boards. SoM detection shall support 32bit boards as well, but arch
specific code should not be included in the generic module.
Fixes: aa7858fe5e2e ("board: phytec: som_detection: move definitions to source
file")
Signed-off-by: Yannic Moog
---
Changes in v2:
- change imx8m_som_detection to conditionally compile when arch is IMX8M
- remove unused includes
- Add reasoning in commit message
---
board/phytec/common/Makefile | 4 ++--
board/phytec/common/phytec_som_detection.c | 2 --
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/board/phytec/common/Makefile b/board/phytec/common/Makefile
index fe28964ce21..35c81741306 100644
--- a/board/phytec/common/Makefile
+++ b/board/phytec/common/Makefile
@@ -7,5 +7,5 @@ ifdef CONFIG_SPL_BUILD
obj- := __dummy__.o
endif
-obj-$(CONFIG_PHYTEC_SOM_DETECTION) += phytec_som_detection.o
-obj-$(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) += imx8m_som_detection.o
+obj-y += phytec_som_detection.o
+obj-$(CONFIG_ARCH_IMX8M) += imx8m_som_detection.o
diff --git a/board/phytec/common/phytec_som_detection.c
b/board/phytec/common/phytec_som_detection.c
index 1b10923b62f..c73bf9721b2 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -5,8 +5,6 @@
*/
#include
-#include
-#include
#include
#include
#include
---
base-commit: 7a59d520ef0bfd29b339cba5282149271d5ac3b2
change-id: 20240111-wip-y-moog-phytec-de-som-detection-fixup-5cade747a48a
Best regards,
--
Yannic Moog
Re: [PATCH] board: phytec: fix link error when disabling PHYTEC_SOM_DETECTION
Hi Fabio
On Fri, 2024-01-12 at 14:55 -0300, Fabio Estevam wrote:
> Hi Yannic,
>
> On Thu, Jan 11, 2024 at 5:27 AM Yannic Moog wrote:
> >
> > Commit aa7858fe5e2e ("board: phytec: som_detection: move definitions to
> > source file") moved function definitions from header to source file.
> > Makefile however was not updated to unconditionally build the imx8 and
> > phytec som detection units. Fix this.
> >
> > Fixes: aa7858fe5e2e ("board: phytec: som_detection: move definitions to
> > source file")
> > Signed-off-by: Yannic Moog
>
> This causes build failure:
>
> https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/769421
Thank you, I will send an updated version.
[PATCH] board: phytec: fix link error when disabling PHYTEC_SOM_DETECTION
Commit aa7858fe5e2e ("board: phytec: som_detection: move definitions to
source file") moved function definitions from header to source file.
Makefile however was not updated to unconditionally build the imx8 and
phytec som detection units. Fix this.
Fixes: aa7858fe5e2e ("board: phytec: som_detection: move definitions to source
file")
Signed-off-by: Yannic Moog
---
board/phytec/common/Makefile | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/board/phytec/common/Makefile b/board/phytec/common/Makefile
index fe28964ce21..5f8e8435413 100644
--- a/board/phytec/common/Makefile
+++ b/board/phytec/common/Makefile
@@ -7,5 +7,4 @@ ifdef CONFIG_SPL_BUILD
obj- := __dummy__.o
endif
-obj-$(CONFIG_PHYTEC_SOM_DETECTION) += phytec_som_detection.o
-obj-$(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) += imx8m_som_detection.o
+obj-y += phytec_som_detection.o imx8m_som_detection.o
---
base-commit: 7a59d520ef0bfd29b339cba5282149271d5ac3b2
change-id: 20240111-wip-y-moog-phytec-de-som-detection-fixup-5cade747a48a
Best regards,
--
Yannic Moog
[PATCH v2 2/3] doc: board: phytec: Add phyGATE-Tauri board documentation
Add brief documentation on how to build a bootable U-Boot image for the phyGATE-Tauri-L. Signed-off-by: Yannic Moog --- board/phytec/phycore_imx8mm/MAINTAINERS | 2 + doc/board/phytec/imx8mm-phygate-tauri-l.rst | 60 + doc/board/phytec/index.rst | 1 + 3 files changed, 63 insertions(+) diff --git a/board/phytec/phycore_imx8mm/MAINTAINERS b/board/phytec/phycore_imx8mm/MAINTAINERS index 05d48ba2472..cf6f92c07e5 100644 --- a/board/phytec/phycore_imx8mm/MAINTAINERS +++ b/board/phytec/phycore_imx8mm/MAINTAINERS @@ -10,4 +10,6 @@ F:arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi F: board/phytec/phycore_imx8mm/ F: configs/imx8mm-phygate-tauri-l_defconfig F: configs/phycore-imx8mm_defconfig +F: doc/board/phytec/imx8mm-phygate-tauri-l.rst +F: doc/board/phytec/index.rst F: include/configs/phycore_imx8mm.h diff --git a/doc/board/phytec/imx8mm-phygate-tauri-l.rst b/doc/board/phytec/imx8mm-phygate-tauri-l.rst new file mode 100644 index 000..28b614fd144 --- /dev/null +++ b/doc/board/phytec/imx8mm-phygate-tauri-l.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +phyGATE-Tauri-L-i.MX 8M Mini + + +The phyGATE-Tauri-L-i.MX 8M Mini with 2GB of main memory is supported. + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get ddr firmware +- Build U-Boot +- Boot + +Build the ARM Trusted firmware binary +- + +.. code-block:: bash + + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + $ export CROSS_COMPILE=aarch64-linux-gnu + $ export IMX_BOOT_UART_BASE=0x3088 + $ make PLAT=imx8mm bl31 + +Get the ddr firmware + + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.23.bin + $ chmod +x firmware-imx-8.23.bin + $ ./firmware-imx-8.23.bin + +Build U-Boot for SD card + + +Copy binaries +^ + +.. code-block:: bash + + $ cp /build/imx8mm/release/bl31.bin . + $ cp firmware-imx-8.23/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot + + +.. code-block:: bash + + $ make imx8mm-phygate-tauri-l_defconfig + $ make flash.bin + +Flash SD card +^ + +.. code-block:: bash + + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst index a5b442045ed..9996bce9741 100644 --- a/doc/board/phytec/index.rst +++ b/doc/board/phytec/index.rst @@ -6,5 +6,6 @@ PHYTEC .. toctree:: :maxdepth: 2 + imx8mm-phygate-tauri-l phycore-imx8mm phycore-imx8mp -- 2.34.1
[PATCH v2 3/3] board: phytec: MAINTAINERS: add missing phytec doc files
Add rst documentation files to the respective MAINTAINERS file for PHYTEC boards. Signed-off-by: Yannic Moog --- board/phytec/phycore_imx8mm/MAINTAINERS | 1 + board/phytec/phycore_imx8mp/MAINTAINERS | 1 + 2 files changed, 2 insertions(+) diff --git a/board/phytec/phycore_imx8mm/MAINTAINERS b/board/phytec/phycore_imx8mm/MAINTAINERS index cf6f92c07e5..e46e3691bac 100644 --- a/board/phytec/phycore_imx8mm/MAINTAINERS +++ b/board/phytec/phycore_imx8mm/MAINTAINERS @@ -12,4 +12,5 @@ F:configs/imx8mm-phygate-tauri-l_defconfig F: configs/phycore-imx8mm_defconfig F: doc/board/phytec/imx8mm-phygate-tauri-l.rst F: doc/board/phytec/index.rst +F: doc/board/phytec/phycore_imx8mm.rst F: include/configs/phycore_imx8mm.h diff --git a/board/phytec/phycore_imx8mp/MAINTAINERS b/board/phytec/phycore_imx8mp/MAINTAINERS index cb7ce558a81..d3beb978d3a 100644 --- a/board/phytec/phycore_imx8mp/MAINTAINERS +++ b/board/phytec/phycore_imx8mp/MAINTAINERS @@ -6,4 +6,5 @@ F: arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts F: arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi F: board/phytec/phycore_imx8mp/ F: configs/phycore-imx8mp_defconfig +F: doc/board/phytec/phycore-imx8mp.rst F: include/configs/phycore_imx8mp.h -- 2.34.1
[PATCH v2 1/3] Add support for phyGATE-Tauri-L-iMX8MM
phyGATE-Tauri-L-iMX8MM is a Gateway based on the phycore-imx8mm SoM.
As a result, all the board code of the phycore-imx8mm is used.
Device tree synced with kernel v6.7.
Signed-off-by: Yannic Moog
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi | 70
arch/arm/dts/imx8mm-phygate-tauri-l.dts | 489
board/phytec/phycore_imx8mm/MAINTAINERS | 3 +
configs/imx8mm-phygate-tauri-l_defconfig| 115 ++
5 files changed, 678 insertions(+)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 773c2546131..d456a524b36 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1076,6 +1076,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-mx8menlo.dtb \
imx8mm-phg.dtb \
imx8mm-phyboard-polis-rdk.dtb \
+ imx8mm-phygate-tauri-l.dtb \
imx8mm-venice.dtb \
imx8mm-venice-gw71xx-0x.dtb \
imx8mm-venice-gw72xx-0x.dtb \
diff --git a/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
b/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
new file mode 100644
index 000..f59f119374f
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ */
+
+#include "imx8mm-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ bootph-pre-ram;
+ };
+};
+
+_uart3 {
+ bootph-pre-ram;
+};
+
+_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+_usdhc2 {
+ bootph-pre-ram;
+};
+
+_usdhc3 {
+ bootph-pre-ram;
+};
+
+_wdog {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/imx8mm-phygate-tauri-l.dts
b/arch/arm/dts/imx8mm-phygate-tauri-l.dts
new file mode 100644
index 000..968f475b9a9
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phygate-tauri-l.dts
@@ -0,0 +1,489 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 PHYTEC Messtechnik GmbH
+ */
+
+/dts-v1/;
+
+#include
+#include
+#include "imx8mm-phycore-som.dtsi"
+
+/ {
+ model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
+ compatible = "phytec,imx8mm-phygate-tauri-l",
+"phytec,imx8mm-phycore-som", "fsl,imx8mm";
+
+ chosen {
+ stdout-path =
+ };
+
+ can_osc_40m: clock-can {
+ compatible = "fixed-clock";
+ clock-frequency = <4000>;
+ clock-output-names = "can_osc_40m";
+ #clock-cells = <0>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_gpiokeys>;
+
+ key {
+ gpios = < 9 GPIO_ACTIVE_LOW>;
+ label = "KEY-A";
+ linux,code = ;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_leds>;
+
+ led-1 {
+ color = ;
+ gpios = < 5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+
+ led-2 {
+ color = ;
+ gpios = < 30 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+ };
+
+ usdhc1_pwrseq: pwr-seq {
+ compatible = "mmc-pwrseq-simple";
+ post-power-on-delay-ms = <100>;
+ power-off-delay-us = <60>;
+ reset-gpios = < 7 GPIO_ACTIVE_LOW>;
+ };
+
+ reg_usb_hub_vbus: regulator-hub-otg1 {
+ compatible = "regulator-fixed";
+ gpio = < 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <_usbhubpwr>;
+ regulator-name = "usb_hub_vbus";
+ regulator-max-microvolt = <500>;
+ regulator-min-microvolt = <500>;
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1 {
+ compatible = "regulator-fixed";
+ gpio = < 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+
[PATCH v2 0/3] This series adds support for the phyGATE-Tauri-L.
The config is minimal and mostly a copy from the phycore-imx8mm. SPI
(flash) is disabled as it is not populated by default.
Also add documentation for the phyGATE-Tauri-L board. While at it, add
the other PHYTEC doc files to MAINTAINERS; they were missing for
existing phycore-imx8m{m,p} doc.
---
Changes in v2:
- readd TIDP83867; is populated on the SoM by default
- remove remnants from SPI config options (savedefconfig)
- add doc/board/phytec files to MAINTAINERS
---
Yannic Moog (3):
Add support for phyGATE-Tauri-L-iMX8MM
doc: board: phytec: Add phyGATE-Tauri board documentation
board: phytec: MAINTAINERS: add missing phytec doc files
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi | 70
arch/arm/dts/imx8mm-phygate-tauri-l.dts | 489
board/phytec/phycore_imx8mm/MAINTAINERS | 6 +
board/phytec/phycore_imx8mp/MAINTAINERS | 1 +
configs/imx8mm-phygate-tauri-l_defconfig| 115 ++
doc/board/phytec/imx8mm-phygate-tauri-l.rst | 60 +++
doc/board/phytec/index.rst | 1 +
8 files changed, 743 insertions(+)
---
base-commit: c5e461fbf7cc72f0c1c8a79226b6a5170e56cb4d
change-id: 20231220-wip-y-moog-phytec-de-tauri-l_upstream-08c9648ac653
Best regards,
--
Yannic Moog
[PATCH 2/2] doc: board: phytec: Add phyGATE-Tauri board documentation
Add brief documentation on how to build a bootable U-Boot image for the phyGATE-Tauri-L. Signed-off-by: Yannic Moog --- doc/board/phytec/imx8mm-phygate-tauri-l.rst | 60 + doc/board/phytec/index.rst | 1 + 2 files changed, 61 insertions(+) diff --git a/doc/board/phytec/imx8mm-phygate-tauri-l.rst b/doc/board/phytec/imx8mm-phygate-tauri-l.rst new file mode 100644 index 000..28b614fd144 --- /dev/null +++ b/doc/board/phytec/imx8mm-phygate-tauri-l.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +phyGATE-Tauri-L-i.MX 8M Mini + + +The phyGATE-Tauri-L-i.MX 8M Mini with 2GB of main memory is supported. + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get ddr firmware +- Build U-Boot +- Boot + +Build the ARM Trusted firmware binary +- + +.. code-block:: bash + + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + $ export CROSS_COMPILE=aarch64-linux-gnu + $ export IMX_BOOT_UART_BASE=0x3088 + $ make PLAT=imx8mm bl31 + +Get the ddr firmware + + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.23.bin + $ chmod +x firmware-imx-8.23.bin + $ ./firmware-imx-8.23.bin + +Build U-Boot for SD card + + +Copy binaries +^ + +.. code-block:: bash + + $ cp /build/imx8mm/release/bl31.bin . + $ cp firmware-imx-8.23/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot + + +.. code-block:: bash + + $ make imx8mm-phygate-tauri-l_defconfig + $ make flash.bin + +Flash SD card +^ + +.. code-block:: bash + + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst index a5b442045ed..9996bce9741 100644 --- a/doc/board/phytec/index.rst +++ b/doc/board/phytec/index.rst @@ -6,5 +6,6 @@ PHYTEC .. toctree:: :maxdepth: 2 + imx8mm-phygate-tauri-l phycore-imx8mm phycore-imx8mp -- 2.34.1
[PATCH 1/2] Add support for phyGATE-Tauri-L-iMX8MM
phyGATE-Tauri-L-iMX8MM is a Gateway based on the phycore-imx8mm SoM.
As a result, all the board code of the phycore-imx8mm is used.
Device tree synced with kernel v6.7.
Signed-off-by: Yannic Moog
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi | 70
arch/arm/dts/imx8mm-phygate-tauri-l.dts | 489
board/phytec/phycore_imx8mm/MAINTAINERS | 3 +
configs/imx8mm-phygate-tauri-l_defconfig| 117 ++
5 files changed, 680 insertions(+)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 773c2546131..d456a524b36 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1076,6 +1076,7 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mm-mx8menlo.dtb \
imx8mm-phg.dtb \
imx8mm-phyboard-polis-rdk.dtb \
+ imx8mm-phygate-tauri-l.dtb \
imx8mm-venice.dtb \
imx8mm-venice-gw71xx-0x.dtb \
imx8mm-venice-gw72xx-0x.dtb \
diff --git a/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
b/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
new file mode 100644
index 000..f59f119374f
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2024 PHYTEC Messtechnik GmbH
+ */
+
+#include "imx8mm-u-boot.dtsi"
+
+/ {
+ wdt-reboot {
+ compatible = "wdt-reboot";
+ wdt = <>;
+ bootph-pre-ram;
+ };
+};
+
+_uart3 {
+ bootph-pre-ram;
+};
+
+_usdhc2_gpio {
+ bootph-pre-ram;
+};
+
+_usdhc2 {
+ bootph-pre-ram;
+};
+
+_usdhc3 {
+ bootph-pre-ram;
+};
+
+_wdog {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
+
+ {
+ bootph-pre-ram;
+};
diff --git a/arch/arm/dts/imx8mm-phygate-tauri-l.dts
b/arch/arm/dts/imx8mm-phygate-tauri-l.dts
new file mode 100644
index 000..968f475b9a9
--- /dev/null
+++ b/arch/arm/dts/imx8mm-phygate-tauri-l.dts
@@ -0,0 +1,489 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 PHYTEC Messtechnik GmbH
+ */
+
+/dts-v1/;
+
+#include
+#include
+#include "imx8mm-phycore-som.dtsi"
+
+/ {
+ model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
+ compatible = "phytec,imx8mm-phygate-tauri-l",
+"phytec,imx8mm-phycore-som", "fsl,imx8mm";
+
+ chosen {
+ stdout-path =
+ };
+
+ can_osc_40m: clock-can {
+ compatible = "fixed-clock";
+ clock-frequency = <4000>;
+ clock-output-names = "can_osc_40m";
+ #clock-cells = <0>;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_gpiokeys>;
+
+ key {
+ gpios = < 9 GPIO_ACTIVE_LOW>;
+ label = "KEY-A";
+ linux,code = ;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <_leds>;
+
+ led-1 {
+ color = ;
+ gpios = < 5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+
+ led-2 {
+ color = ;
+ gpios = < 30 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ };
+ };
+
+ usdhc1_pwrseq: pwr-seq {
+ compatible = "mmc-pwrseq-simple";
+ post-power-on-delay-ms = <100>;
+ power-off-delay-us = <60>;
+ reset-gpios = < 7 GPIO_ACTIVE_LOW>;
+ };
+
+ reg_usb_hub_vbus: regulator-hub-otg1 {
+ compatible = "regulator-fixed";
+ gpio = < 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+ pinctrl-0 = <_usbhubpwr>;
+ regulator-name = "usb_hub_vbus";
+ regulator-max-microvolt = <500>;
+ regulator-min-microvolt = <500>;
+ };
+
+ reg_usb_otg1_vbus: regulator-usb-otg1 {
+ compatible = "regulator-fixed";
+ gpio = < 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ pinctrl-names = "default";
+
[PATCH 0/2] This series adds support for the phyGATE-Tauri-L.
The config is minimal and mostly a copy from the phycore-imx8mm. TI PHY and SPI (flash) are disabled as they are not populated by default. --- Yannic Moog (2): Add support for phyGATE-Tauri-L-iMX8MM doc: board: phytec: Add phyGATE-Tauri board documentation arch/arm/dts/Makefile | 1 + arch/arm/dts/imx8mm-phygate-tauri-l-u-boot.dtsi | 70 arch/arm/dts/imx8mm-phygate-tauri-l.dts | 489 board/phytec/phycore_imx8mm/MAINTAINERS | 3 + configs/imx8mm-phygate-tauri-l_defconfig| 117 ++ doc/board/phytec/imx8mm-phygate-tauri-l.rst | 60 +++ doc/board/phytec/index.rst | 1 + 7 files changed, 741 insertions(+) --- base-commit: c5e461fbf7cc72f0c1c8a79226b6a5170e56cb4d change-id: 20231220-wip-y-moog-phytec-de-tauri-l_upstream-08c9648ac653 Best regards, -- Yannic Moog
[PATCH v2 4/5] board: phytec: som_detection: move definitions to source file
Move all function definitions in {phytec|imx8m}_som_detection from the
header to the source file to prevent potential linker error regarding
multiple definitions. Also move the #if blocks with the definitions.
Signed-off-by: Yannic Moog
---
board/phytec/common/imx8m_som_detection.c | 32
board/phytec/common/imx8m_som_detection.h | 32
board/phytec/common/phytec_som_detection.c | 39 ++
board/phytec/common/phytec_som_detection.h | 38 -
4 files changed, 71 insertions(+), 70 deletions(-)
diff --git a/board/phytec/common/imx8m_som_detection.c
b/board/phytec/common/imx8m_som_detection.c
index a229eae152d..214b75db3b0 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -15,6 +15,8 @@
extern struct phytec_eeprom_data eeprom_data;
+#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
+
/* Check if the SoM is actually one of the following products:
* - i.MX8MM
* - i.MX8MN
@@ -166,3 +168,33 @@ u8 __maybe_unused phytec_get_imx8mp_rtc(struct
phytec_eeprom_data *data)
debug("%s: rtc: %u\n", __func__, rtc);
return rtc;
}
+
+#else
+
+inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+{
+ return -1;
+}
+
+inline u8 __maybe_unused
+phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
diff --git a/board/phytec/common/imx8m_som_detection.h
b/board/phytec/common/imx8m_som_detection.h
index 442085cfe97..0176347414f 100644
--- a/board/phytec/common/imx8m_som_detection.h
+++ b/board/phytec/common/imx8m_som_detection.h
@@ -13,42 +13,10 @@
#define PHYTEC_IMX8MM_SOM 69
#define PHYTEC_IMX8MP_SOM 70
-#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
-
int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data);
-#else
-
-inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
-{
- return -1;
-}
-
-inline u8 __maybe_unused
-phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
-
#endif /* _PHYTEC_IMX8M_SOM_DETECTION_H */
diff --git a/board/phytec/common/phytec_som_detection.c
b/board/phytec/common/phytec_som_detection.c
index 724b8e844b6..f879702df45 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -16,6 +16,8 @@
struct phytec_eeprom_data eeprom_data;
+#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION)
+
int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr, int addr_fallback)
{
@@ -201,3 +203,40 @@ u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data
*data)
return api2->pcb_rev;
}
+
+#else
+
+inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
+int bus_num, int addr,
+int addr_fallback)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data
*data)
+{
+}
+
+inline char *__maybe_unused phytec_get_opt(struct phytec_eeprom_data *data)
+{
+ return NULL;
+}
+
+u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+#endif /* IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION) */
diff
[PATCH v2 5/5] board: phytec: phytec_som_detection: fix uninitialized bug
When som_type does not match any case, it is uninitialized and the
function still tries to print the SoM info. Rather, this is an error
condition and the function should abort prematurely. Highlight this by
printing an error message and returning early.
Signed-off-by: Yannic Moog
---
board/phytec/common/phytec_som_detection.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/phytec/common/phytec_som_detection.c
b/board/phytec/common/phytec_som_detection.c
index f879702df45..1b10923b62f 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -161,7 +161,8 @@ void __maybe_unused phytec_print_som_info(struct
phytec_eeprom_data *data)
sub_som_type2 = 2;
break;
default:
- break;
+ pr_err("%s: Invalid SoM type: %i", __func__,
api2->som_type);
+ return;
};
printf("SoM: %s-%03u-%s-%03u ",
--
2.34.1
[PATCH v2 0/5] This series fixes various bugs in the phytec som_detection unit.
--- Changes in v2: - fixed accidental squashing of changes -> split into 2 separate patches --- Yannic Moog (5): board: phytec: imx8m_som_detection: change phytec_imx8m_detect return type board: phytec: imx8m_som_detection: fix uninitialized pointer bug board: phytec: phytec_som_detection: fix eeprom_data zero check board: phytec: som_detection: move definitions to source file board: phytec: phytec_som_detection: fix uninitialized bug board/phytec/common/imx8m_som_detection.c | 40 +++--- board/phytec/common/imx8m_som_detection.h | 34 +- board/phytec/common/phytec_som_detection.c | 46 -- board/phytec/common/phytec_som_detection.h | 38 4 files changed, 80 insertions(+), 78 deletions(-) --- base-commit: 8f5043ee6d378d7c10d947cf48b047a5954ef5b3 change-id: 20231218-wip-y-moog-phytec-de-upstream_som_detection_fixes-b442a1e16334 Best regards, -- Yannic Moog
[PATCH v2 3/5] board: phytec: phytec_som_detection: fix eeprom_data zero check
In phytec_eeprom_data_init, after reading eeprom data into buffer, it is
checked whether all bytes are 0x0 by iterating over chunks of the
buffer. The offset, or index of the chunk, was never changed, leading to
repeated comparison of only the first chunk. Use array notation and
access chunk via array index to compare all chunks of the buffer.
Signed-off-by: Yannic Moog
---
board/phytec/common/phytec_som_detection.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/phytec/common/phytec_som_detection.c
b/board/phytec/common/phytec_som_detection.c
index 55562731270..724b8e844b6 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -83,8 +83,8 @@ int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
}
ptr = (int *)data;
- for (i = 0; i < sizeof(struct phytec_eeprom_data); i += sizeof(ptr))
- if (*ptr != 0x0)
+ for (i = 0; i < sizeof(struct phytec_eeprom_data); i++)
+ if (ptr[i] != 0x0)
break;
if (i == sizeof(struct phytec_eeprom_data)) {
--
2.34.1
[PATCH v2 2/5] board: phytec: imx8m_som_detection: fix uninitialized pointer bug
Pointer in phytec_imx8m_detect was accessed without checking it first.
Fix this by moving the pointer check in front of any accesses.
Signed-off-by: Yannic Moog
---
board/phytec/common/imx8m_som_detection.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/phytec/common/imx8m_som_detection.c
b/board/phytec/common/imx8m_som_detection.c
index 45f5767c565..a229eae152d 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -28,13 +28,13 @@ int __maybe_unused phytec_imx8m_detect(struct
phytec_eeprom_data *data)
char *opt;
u8 som;
+ if (!data)
+ data = _data;
+
/* We can not do the check for early API revisions */
if (data->api_rev < PHYTEC_API_REV2)
return -1;
- if (!data)
- data = _data;
-
som = data->data.data_api2.som_no;
debug("%s: som id: %u\n", __func__, som);
--
2.34.1
[PATCH v2 1/5] board: phytec: imx8m_som_detection: change phytec_imx8m_detect return type
phytec_imx8m_detect returns -1 on error, but the return type is u8
leading to 255 return values. Fix this by changing the return type to
int; there is no reason to keep it as u8 .
Signed-off-by: Yannic Moog
---
board/phytec/common/imx8m_som_detection.c | 2 +-
board/phytec/common/imx8m_som_detection.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/phytec/common/imx8m_som_detection.c
b/board/phytec/common/imx8m_som_detection.c
index c6c96ed19cb..45f5767c565 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -23,7 +23,7 @@ extern struct phytec_eeprom_data eeprom_data;
*
* Returns 0 in case it's a known SoM. Otherwise, returns -1.
*/
-u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
char *opt;
u8 som;
diff --git a/board/phytec/common/imx8m_som_detection.h
b/board/phytec/common/imx8m_som_detection.h
index 88d3037bf36..442085cfe97 100644
--- a/board/phytec/common/imx8m_som_detection.h
+++ b/board/phytec/common/imx8m_som_detection.h
@@ -15,7 +15,7 @@
#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
-u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
+int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data);
@@ -23,7 +23,7 @@ u8 __maybe_unused phytec_get_imx8m_eth(struct
phytec_eeprom_data *data);
#else
-inline u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
return -1;
}
--
2.34.1
Re: [PATCH 3/4] board: phytec: phytec_som_detection: fix eeprom_data zero check
Hello Teresa,
On Wed, 2023-12-20 at 09:24 +0100, Teresa Remmet wrote:
> Hello Yannic,
>
> Am Mittwoch, dem 20.12.2023 um 09:19 +0100 schrieb Yannic Moog:
> > In phytec_eeprom_data_init, after reading eeprom data into buffer, it
> > is
> > checked whether all bytes are 0x0 by iterating over chunks of the
> > buffer. The offset, or index of the chunk, was never changed, leading
> > to
> > repeated comparison of only the first chunk. Use array notation and
> > access chunk via array index to compare all chunks of the buffer.
>
> it seems that you have here accidentally two patches in one.
> Please check.
I see, will update; Thanks
Yannic
>
> Teresa
>
> >
> > Signed-off-by: Yannic Moog
> > ---
> > board/phytec/common/imx8m_som_detection.c | 32
> > ++
> > board/phytec/common/imx8m_som_detection.h | 32
> > --
> > board/phytec/common/phytec_som_detection.c | 43
> > --
> > board/phytec/common/phytec_som_detection.h | 38
> > --
> > 4 files changed, 73 insertions(+), 72 deletions(-)
> >
> > diff --git a/board/phytec/common/imx8m_som_detection.c
> > b/board/phytec/common/imx8m_som_detection.c
> > index a229eae152d..214b75db3b0 100644
> > --- a/board/phytec/common/imx8m_som_detection.c
> > +++ b/board/phytec/common/imx8m_som_detection.c
> > @@ -15,6 +15,8 @@
> >
> > extern struct phytec_eeprom_data eeprom_data;
> >
> > +#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
> > +
> > /* Check if the SoM is actually one of the following products:
> > * - i.MX8MM
> > * - i.MX8MN
> > @@ -166,3 +168,33 @@ u8 __maybe_unused phytec_get_imx8mp_rtc(struct
> > phytec_eeprom_data *data)
> > debug("%s: rtc: %u\n", __func__, rtc);
> > return rtc;
> > }
> > +
> > +#else
> > +
> > +inline int __maybe_unused phytec_imx8m_detect(struct
> > phytec_eeprom_data *data)
> > +{
> > + return -1;
> > +}
> > +
> > +inline u8 __maybe_unused
> > +phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
> > +{
> > + return PHYTEC_EEPROM_INVAL;
> > +}
> > +
> > +inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct
> > phytec_eeprom_data *data)
> > +{
> > + return PHYTEC_EEPROM_INVAL;
> > +}
> > +
> > +inline u8 __maybe_unused phytec_get_imx8m_spi(struct
> > phytec_eeprom_data *data)
> > +{
> > + return PHYTEC_EEPROM_INVAL;
> > +}
> > +
> > +inline u8 __maybe_unused phytec_get_imx8m_eth(struct
> > phytec_eeprom_data *data)
> > +{
> > + return PHYTEC_EEPROM_INVAL;
> > +}
> > +
> > +#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
> > diff --git a/board/phytec/common/imx8m_som_detection.h
> > b/board/phytec/common/imx8m_som_detection.h
> > index 442085cfe97..0176347414f 100644
> > --- a/board/phytec/common/imx8m_som_detection.h
> > +++ b/board/phytec/common/imx8m_som_detection.h
> > @@ -13,42 +13,10 @@
> > #define PHYTEC_IMX8MM_SOM 69
> > #define PHYTEC_IMX8MP_SOM 70
> >
> > -#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
> > -
> > int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data
> > *data);
> > u8 __maybe_unused phytec_get_imx8m_ddr_size(struct
> > phytec_eeprom_data *data);
> > u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data
> > *data);
> > u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data
> > *data);
> > u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data
> > *data);
> >
> > -#else
> > -
> > -inline int __maybe_unused phytec_imx8m_detect(struct
> > phytec_eeprom_data *data)
> > -{
> > - return -1;
> > -}
> > -
> > -inline u8 __maybe_unused
> > -phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
> > -{
> > - return PHYTEC_EEPROM_INVAL;
> > -}
> > -
> > -inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct
> > phytec_eeprom_data *data)
> > -{
> > - return PHYTEC_EEPROM_INVAL;
> > -}
> > -
> > -inline u8 __maybe_unused phytec_get_imx8m_spi(struct
> > phytec_eeprom_data *data)
> > -{
> > - return PHYTEC_EEPROM_INVAL;
> > -}
> > -
> > -inline u8 __maybe_unused phytec_get_imx8m_eth(struct
> > phytec_eeprom_data *data)
> > -{
> > - return PHYTEC_EEPROM_I
[PATCH 3/4] board: phytec: phytec_som_detection: fix eeprom_data zero check
In phytec_eeprom_data_init, after reading eeprom data into buffer, it is
checked whether all bytes are 0x0 by iterating over chunks of the
buffer. The offset, or index of the chunk, was never changed, leading to
repeated comparison of only the first chunk. Use array notation and
access chunk via array index to compare all chunks of the buffer.
Signed-off-by: Yannic Moog
---
board/phytec/common/imx8m_som_detection.c | 32 ++
board/phytec/common/imx8m_som_detection.h | 32 --
board/phytec/common/phytec_som_detection.c | 43 --
board/phytec/common/phytec_som_detection.h | 38 --
4 files changed, 73 insertions(+), 72 deletions(-)
diff --git a/board/phytec/common/imx8m_som_detection.c
b/board/phytec/common/imx8m_som_detection.c
index a229eae152d..214b75db3b0 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -15,6 +15,8 @@
extern struct phytec_eeprom_data eeprom_data;
+#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
+
/* Check if the SoM is actually one of the following products:
* - i.MX8MM
* - i.MX8MN
@@ -166,3 +168,33 @@ u8 __maybe_unused phytec_get_imx8mp_rtc(struct
phytec_eeprom_data *data)
debug("%s: rtc: %u\n", __func__, rtc);
return rtc;
}
+
+#else
+
+inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+{
+ return -1;
+}
+
+inline u8 __maybe_unused
+phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
diff --git a/board/phytec/common/imx8m_som_detection.h
b/board/phytec/common/imx8m_som_detection.h
index 442085cfe97..0176347414f 100644
--- a/board/phytec/common/imx8m_som_detection.h
+++ b/board/phytec/common/imx8m_som_detection.h
@@ -13,42 +13,10 @@
#define PHYTEC_IMX8MM_SOM 69
#define PHYTEC_IMX8MP_SOM 70
-#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
-
int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data);
-#else
-
-inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
-{
- return -1;
-}
-
-inline u8 __maybe_unused
-phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-inline u8 __maybe_unused phytec_get_imx8m_eth(struct phytec_eeprom_data *data)
-{
- return PHYTEC_EEPROM_INVAL;
-}
-
-#endif /* IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) */
-
#endif /* _PHYTEC_IMX8M_SOM_DETECTION_H */
diff --git a/board/phytec/common/phytec_som_detection.c
b/board/phytec/common/phytec_som_detection.c
index 55562731270..f879702df45 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -16,6 +16,8 @@
struct phytec_eeprom_data eeprom_data;
+#if IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION)
+
int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
int bus_num, int addr, int addr_fallback)
{
@@ -83,8 +85,8 @@ int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
}
ptr = (int *)data;
- for (i = 0; i < sizeof(struct phytec_eeprom_data); i += sizeof(ptr))
- if (*ptr != 0x0)
+ for (i = 0; i < sizeof(struct phytec_eeprom_data); i++)
+ if (ptr[i] != 0x0)
break;
if (i == sizeof(struct phytec_eeprom_data)) {
@@ -201,3 +203,40 @@ u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data
*data)
return api2->pcb_rev;
}
+
+#else
+
+inline int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
+ int bus_num, int addr)
+{
+ return PHYTEC_EEPROM_INVAL;
+}
+
+inline int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data *data,
+int bus_num, int addr,
+int addr_fallback)
+{
+ return PHYTEC_EEPROM_
[PATCH 4/4] board: phytec: phytec_som_detection: fix uninitialized bug
When som_type does not match any case, it is uninitialized and the
function still tries to print the SoM info. Rather, this is an error
condition and the function should abort prematurely. Highlight this by
printing an error message and returning early.
Signed-off-by: Yannic Moog
---
board/phytec/common/phytec_som_detection.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/board/phytec/common/phytec_som_detection.c
b/board/phytec/common/phytec_som_detection.c
index f879702df45..1b10923b62f 100644
--- a/board/phytec/common/phytec_som_detection.c
+++ b/board/phytec/common/phytec_som_detection.c
@@ -161,7 +161,8 @@ void __maybe_unused phytec_print_som_info(struct
phytec_eeprom_data *data)
sub_som_type2 = 2;
break;
default:
- break;
+ pr_err("%s: Invalid SoM type: %i", __func__,
api2->som_type);
+ return;
};
printf("SoM: %s-%03u-%s-%03u ",
--
2.34.1
[PATCH 2/4] board: phytec: imx8m_som_detection: fix uninitialized pointer bug
Pointer in phytec_imx8m_detect was accessed without checking it first.
Fix this by moving the pointer check in front of any accesses.
Signed-off-by: Yannic Moog
---
board/phytec/common/imx8m_som_detection.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/phytec/common/imx8m_som_detection.c
b/board/phytec/common/imx8m_som_detection.c
index 45f5767c565..a229eae152d 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -28,13 +28,13 @@ int __maybe_unused phytec_imx8m_detect(struct
phytec_eeprom_data *data)
char *opt;
u8 som;
+ if (!data)
+ data = _data;
+
/* We can not do the check for early API revisions */
if (data->api_rev < PHYTEC_API_REV2)
return -1;
- if (!data)
- data = _data;
-
som = data->data.data_api2.som_no;
debug("%s: som id: %u\n", __func__, som);
--
2.34.1
[PATCH 1/4] board: phytec: imx8m_som_detection: change phytec_imx8m_detect return type
phytec_imx8m_detect returns -1 on error, but the return type is u8
leading to 255 return values. Fix this by changing the return type to
int; there is no reason to keep it as u8 .
Signed-off-by: Yannic Moog
---
board/phytec/common/imx8m_som_detection.c | 2 +-
board/phytec/common/imx8m_som_detection.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/board/phytec/common/imx8m_som_detection.c
b/board/phytec/common/imx8m_som_detection.c
index c6c96ed19cb..45f5767c565 100644
--- a/board/phytec/common/imx8m_som_detection.c
+++ b/board/phytec/common/imx8m_som_detection.c
@@ -23,7 +23,7 @@ extern struct phytec_eeprom_data eeprom_data;
*
* Returns 0 in case it's a known SoM. Otherwise, returns -1.
*/
-u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
char *opt;
u8 som;
diff --git a/board/phytec/common/imx8m_som_detection.h
b/board/phytec/common/imx8m_som_detection.h
index 88d3037bf36..442085cfe97 100644
--- a/board/phytec/common/imx8m_som_detection.h
+++ b/board/phytec/common/imx8m_som_detection.h
@@ -15,7 +15,7 @@
#if IS_ENABLED(CONFIG_PHYTEC_IMX8M_SOM_DETECTION)
-u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
+int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_ddr_size(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8mp_rtc(struct phytec_eeprom_data *data);
u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data *data);
@@ -23,7 +23,7 @@ u8 __maybe_unused phytec_get_imx8m_eth(struct
phytec_eeprom_data *data);
#else
-inline u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
+inline int __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data *data)
{
return -1;
}
--
2.34.1
[PATCH 0/4] This series fixes various bugs in the phytec som_detection unit.
--- Yannic Moog (4): board: phytec: imx8m_som_detection: change phytec_imx8m_detect return type board: phytec: imx8m_som_detection: fix uninitialized pointer bug board: phytec: phytec_som_detection: fix eeprom_data zero check board: phytec: phytec_som_detection: fix uninitialized bug board/phytec/common/imx8m_som_detection.c | 40 +++--- board/phytec/common/imx8m_som_detection.h | 34 +- board/phytec/common/phytec_som_detection.c | 46 -- board/phytec/common/phytec_som_detection.h | 38 4 files changed, 80 insertions(+), 78 deletions(-) --- base-commit: 8f5043ee6d378d7c10d947cf48b047a5954ef5b3 change-id: 20231218-wip-y-moog-phytec-de-upstream_som_detection_fixes-b442a1e16334 Best regards, -- Yannic Moog
Re: [PATCH v2 6/6] board: phytec: phycore_imx8mp: Add 4000MTS RAM timings based on PCB rev
On Thu, 2023-08-17 at 10:57 +0200, Teresa Remmet wrote:
> Starting with PCB revision 3 we can safely make use of higher RAM
> frequency again. Make use of the EEPROM detection to determine the
> revision and use the updated RAM timings for new SoMs.
>
> Signed-off-by: Teresa Remmet
Reviewed-by: Yannic Moog
Tested-by: Yannic Moog
> --
> Changes in v2:
> - Fix wrong RAM Timing values as pointed out by Yannic
> ---
> board/phytec/phycore_imx8mp/spl.c | 61
> +++
> 1 file changed, 61 insertions(+)
>
> diff --git a/board/phytec/phycore_imx8mp/spl.c
> b/board/phytec/phycore_imx8mp/spl.c
> index 49406f2eafad..d38f6368fe36 100644
> --- a/board/phytec/phycore_imx8mp/spl.c
> +++ b/board/phytec/phycore_imx8mp/spl.c
> @@ -46,6 +46,67 @@ void spl_dram_init(void)
> if (!ret)
> phytec_print_som_info(NULL);
>
> + ret = phytec_get_rev(NULL);
> + if (ret >= 3 && ret != PHYTEC_EEPROM_INVAL) {
> + dram_timing.ddrc_cfg[3].val = 0x1323;
> + dram_timing.ddrc_cfg[4].val = 0x1e84800;
> + dram_timing.ddrc_cfg[5].val = 0x7a0118;
> + dram_timing.ddrc_cfg[8].val = 0xc00307a3;
> + dram_timing.ddrc_cfg[9].val = 0xc5;
> + dram_timing.ddrc_cfg[10].val = 0xf4003f;
> + dram_timing.ddrc_cfg[11].val = 0xf3;
> + dram_timing.ddrc_cfg[14].val = 0x2028222a;
> + dram_timing.ddrc_cfg[15].val = 0x8083f;
> + dram_timing.ddrc_cfg[16].val = 0xe0e000;
> + dram_timing.ddrc_cfg[17].val = 0x12040a12;
> + dram_timing.ddrc_cfg[18].val = 0x2050f0f;
> + dram_timing.ddrc_cfg[19].val = 0x1010009;
> + dram_timing.ddrc_cfg[20].val = 0x502;
> + dram_timing.ddrc_cfg[21].val = 0x20800;
> + dram_timing.ddrc_cfg[22].val = 0xe12;
> + dram_timing.ddrc_cfg[23].val = 0x120;
> + dram_timing.ddrc_cfg[24].val = 0xc80064;
> + dram_timing.ddrc_cfg[25].val = 0x3e8001e;
> + dram_timing.ddrc_cfg[26].val = 0x3207a12;
> + dram_timing.ddrc_cfg[28].val = 0x4a3820e;
> + dram_timing.ddrc_cfg[30].val = 0x230e;
> + dram_timing.ddrc_cfg[37].val = 0x799;
> + dram_timing.ddrc_cfg[38].val = 0x9141d1c;
> + dram_timing.ddrc_cfg[74].val = 0x302;
> + dram_timing.ddrc_cfg[83].val = 0x599;
> + dram_timing.ddrc_cfg[99].val = 0x302;
> + dram_timing.ddrc_cfg[108].val = 0x599;
> + dram_timing.ddrphy_cfg[66].val = 0x18;
> + dram_timing.ddrphy_cfg[75].val = 0x1e3;
> + dram_timing.ddrphy_cfg[77].val = 0x1e3;
> + dram_timing.ddrphy_cfg[79].val = 0x1e3;
> + dram_timing.ddrphy_cfg[145].val = 0x3e8;
> + dram_timing.fsp_msg[0].drate = 4000;
> + dram_timing.fsp_msg[0].fsp_cfg[1].val = 0xfa0;
> + dram_timing.fsp_msg[0].fsp_cfg[10].val = 0x3ff4;
> + dram_timing.fsp_msg[0].fsp_cfg[11].val = 0xf3;
> + dram_timing.fsp_msg[0].fsp_cfg[15].val = 0x3ff4;
> + dram_timing.fsp_msg[0].fsp_cfg[16].val = 0xf3;
> + dram_timing.fsp_msg[0].fsp_cfg[22].val = 0xf400;
> + dram_timing.fsp_msg[0].fsp_cfg[23].val = 0xf33f;
> + dram_timing.fsp_msg[0].fsp_cfg[28].val = 0xf400;
> + dram_timing.fsp_msg[0].fsp_cfg[29].val = 0xf33f;
> + dram_timing.fsp_msg[3].drate = 4000;
> + dram_timing.fsp_msg[3].fsp_cfg[1].val = 0xfa0;
> + dram_timing.fsp_msg[3].fsp_cfg[11].val = 0x3ff4;
> + dram_timing.fsp_msg[3].fsp_cfg[12].val = 0xf3;
> + dram_timing.fsp_msg[3].fsp_cfg[16].val = 0x3ff4;
> + dram_timing.fsp_msg[3].fsp_cfg[17].val = 0xf3;
> + dram_timing.fsp_msg[3].fsp_cfg[23].val = 0xf400;
> + dram_timing.fsp_msg[3].fsp_cfg[24].val = 0xf33f;
> + dram_timing.fsp_msg[3].fsp_cfg[29].val = 0xf400;
> + dram_timing.fsp_msg[3].fsp_cfg[30].val = 0xf33f;
> + dram_timing.ddrphy_pie[480].val = 0x465;
> + dram_timing.ddrphy_pie[481].val = 0xfa;
> + dram_timing.ddrphy_pie[482].val = 0x9c4;
> + dram_timing.fsp_table[0] = 4000;
> + }
> +
> out:
> ddr_init(_timing);
> }
Re: [PATCH v2 5/6] board: phytec: common: phytec_som_detection: Add helper for PCB revision
On Thu, 2023-08-17 at 10:57 +0200, Teresa Remmet wrote:
> Add helper function to read out the PCB revision of a PHYTEC SoM.
>
> Signed-off-by: Teresa Remmet
Reviewed-by: Yannic Moog
Tested-by: Yannic Moog
> ---
> Changes in v2:
> - none
> ---
> board/phytec/common/phytec_som_detection.c | 15 +++
> board/phytec/common/phytec_som_detection.h | 5 +
> 2 files changed, 20 insertions(+)
>
> diff --git a/board/phytec/common/phytec_som_detection.c
> b/board/phytec/common/phytec_som_detection.c
> index 366bdd4ace4b..55562731270b 100644
> --- a/board/phytec/common/phytec_som_detection.c
> +++ b/board/phytec/common/phytec_som_detection.c
> @@ -186,3 +186,18 @@ char * __maybe_unused phytec_get_opt(struct
> phytec_eeprom_data *data)
>
> return opt;
> }
> +
> +u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
> +{
> + struct phytec_api2_data *api2;
> +
> + if (!data)
> + data = _data;
> +
> + if (data->api_rev < PHYTEC_API_REV2)
> + return PHYTEC_EEPROM_INVAL;
> +
> + api2 = >data.data_api2;
> +
> + return api2->pcb_rev;
> +}
> diff --git a/board/phytec/common/phytec_som_detection.h
> b/board/phytec/common/phytec_som_detection.h
> index 01f7e4652ddb..c68e2302cc42 100644
> --- a/board/phytec/common/phytec_som_detection.h
> +++ b/board/phytec/common/phytec_som_detection.h
> @@ -68,6 +68,7 @@ int phytec_eeprom_data_init(struct
> phytec_eeprom_data *data,
> void __maybe_unused phytec_print_som_info(struct phytec_eeprom_data
> *data);
>
> char * __maybe_unused phytec_get_opt(struct phytec_eeprom_data
> *data);
> +u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data);
>
> #else
>
> @@ -99,6 +100,10 @@ inline char *__maybe_unused phytec_get_opt(struct
> phytec_eeprom_data *data)
> return NULL;
> }
>
> +u8 __maybe_unused phytec_get_rev(struct phytec_eeprom_data *data)
> +{
> + return PHYTEC_EEPROM_INVAL;
> +}
> #endif /* IS_ENABLED(CONFIG_PHYTEC_SOM_DETECTION) */
>
> #endif /* _PHYTEC_SOM_DETECTION_H */
Re: [PATCH v2 4/6] board: phytec: phycore_imx8mp: Update 2GB RAM Timings
On Thu, 2023-08-17 at 10:57 +0200, Teresa Remmet wrote:
> Due to PCB layout constraints in PCB revisions until including 1549.2,
> a RAM frequency of 2 GHz can cause rare instabilities. Set the RAM
> frequency to 1.5 GHz to achieve a stable system under all conditions.
>
> Signed-off-by: Teresa Remmet
Reviewed-by: Yannic Moog
Tested-by: Yannic Moog
> ---
> Changes in v2:
> - none
> ---
> board/phytec/phycore_imx8mp/lpddr4_timing.c | 278 ++-
> -
> 1 file changed, 135 insertions(+), 143 deletions(-)
>
> diff --git a/board/phytec/phycore_imx8mp/lpddr4_timing.c
> b/board/phytec/phycore_imx8mp/lpddr4_timing.c
> index e59dd74377cb..f2707b859606 100644
> --- a/board/phytec/phycore_imx8mp/lpddr4_timing.c
> +++ b/board/phytec/phycore_imx8mp/lpddr4_timing.c
> @@ -13,63 +13,68 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = {
> { 0x3d400304, 0x1 },
> { 0x3d400030, 0x1 },
> { 0x3d40, 0xa1080020 },
> - { 0x3d400020, 0x323 },
> - { 0x3d400024, 0x1e84800 },
> - { 0x3d400064, 0x7a0118 },
> - { 0x3d4000d0, 0xc00307a3 },
> - { 0x3d4000d4, 0xc5 },
> - { 0x3d4000dc, 0xf4003f },
> - { 0x3d4000e0, 0x33 },
> + { 0x3d400020, 0x1223 },
> + { 0x3d400024, 0x16e3600 },
> + { 0x3d400064, 0x5b00d2 },
> + { 0x3d400070, 0x7027f90 },
> + { 0x3d400074, 0x790 },
> + { 0x3d4000d0, 0xc00305ba },
> + { 0x3d4000d4, 0x94 },
> + { 0x3d4000dc, 0xd4002d },
> + { 0x3d4000e0, 0xf1 },
> { 0x3d4000e8, 0x660048 },
> { 0x3d4000ec, 0x160048 },
> - { 0x3d400100, 0x2028222a },
> - { 0x3d400104, 0x807bf },
> - { 0x3d40010c, 0xe0e000 },
> - { 0x3d400110, 0x12040a12 },
> - { 0x3d400114, 0x2050f0f },
> - { 0x3d400118, 0x1010009 },
> - { 0x3d40011c, 0x501 },
> - { 0x3d400130, 0x20800 },
> - { 0x3d400134, 0xe12 },
> - { 0x3d400138, 0x120 },
> - { 0x3d400144, 0xc80064 },
> - { 0x3d400180, 0x3e8001e },
> - { 0x3d400184, 0x3207a12 },
> + { 0x3d400100, 0x191e1920 },
> + { 0x3d400104, 0x60630 },
> + { 0x3d40010c, 0xb0b000 },
> + { 0x3d400110, 0xe04080e },
> + { 0x3d400114, 0x2040c0c },
> + { 0x3d400118, 0x1010007 },
> + { 0x3d40011c, 0x401 },
> + { 0x3d400130, 0x20600 },
> + { 0x3d400134, 0xc12 },
> + { 0x3d400138, 0xd8 },
> + { 0x3d400144, 0x96004b },
> + { 0x3d400180, 0x2ee0017 },
> + { 0x3d400184, 0x2605b8e },
> { 0x3d400188, 0x0 },
> - { 0x3d400190, 0x49f820e },
> + { 0x3d400190, 0x49b820a },
> { 0x3d400194, 0x80303 },
> - { 0x3d4001b4, 0x1f0e },
> + { 0x3d4001b4, 0x1b0a },
> { 0x3d4001a0, 0xe0400018 },
> { 0x3d4001a4, 0xdf00e4 },
> { 0x3d4001a8, 0x8000 },
> { 0x3d4001b0, 0x11 },
> - { 0x3d4001c0, 0x1 },
> + { 0x3d4001c0, 0x7 },
> { 0x3d4001c4, 0x1 },
> { 0x3d4000f4, 0xc99 },
> - { 0x3d400108, 0x9121c1c },
> + { 0x3d400108, 0x7101817 },
> { 0x3d400200, 0x1f },
> + { 0x3d400208, 0x0 },
> { 0x3d40020c, 0x0 },
> { 0x3d400210, 0x1f1f },
> { 0x3d400204, 0x80808 },
> { 0x3d400214, 0x7070707 },
> { 0x3d400218, 0x7070707 },
> - { 0x3d40021c, 0xf07 },
> - { 0x3d400250, 0x1f05 },
> - { 0x3d400254, 0x1f },
> - { 0x3d400264, 0x90003ff },
> - { 0x3d40026c, 0x20003ff },
> + { 0x3d40021c, 0xf0f },
> + { 0x3d400250, 0x1705 },
> + { 0x3d400254, 0x2c },
> + { 0x3d40025c, 0x430 },
> + { 0x3d400264, 0x900093e7 },
> + { 0x3d40026c, 0x2005574 },
> { 0x3d400400, 0x111 },
> + { 0x3d400404, 0x72ff },
> { 0x3d400408, 0x72ff },
> - { 0x3d400494, 0x1000e00 },
> - { 0x3d400498, 0x3ff },
> - { 0x3d40049c, 0x1000e00 },
> - { 0x3d4004a0, 0x3ff },
> - { 0x3d402020, 0x21 },
> + { 0x3d400494, 0x2100e07 },
> + { 0x3d400498, 0x620096 },
> + { 0x3d40049c, 0x1100e07 },
> + { 0x3d4004a0, 0xc8012c },
> + { 0x3d402020, 0x1021 },
> { 0x3d402024, 0x30d400 },
> - { 0x3d402050, 0x20d040 },
> + { 0x3d402050, 0x20d000 },
> { 0x3d402064, 0xc001c },
> { 0x3d4020dc, 0x84 },
> - { 0x3d4020e0, 0x33 },
> + { 0x3d4020e0, 0xf3 },
> { 0x3d4020e8, 0x660048 },
> { 0x3d4020ec, 0x160048 },
> { 0x3d402100, 0xa040305 },
> @@ -89,12 +94,12 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = {
>
Re: [PATCH v2 3/6] board: phytec: phycore-imx8mp: Add EEPROM detection initialisation
On Thu, 2023-08-17 at 10:57 +0200, Teresa Remmet wrote:
> Add EEPROM detection initialisation for phyCORE-i.MX8MM and
> print SoM information during boot when successful.
>
> Signed-off-by: Teresa Remmet
Reviewed-by: Yannic Moog
Tested-by: Yannic Moog
> ---
> Changes in v2:
> - removed superfluous goto
> ---
> board/phytec/phycore_imx8mp/Kconfig | 1 +
> board/phytec/phycore_imx8mp/spl.c | 17 +
> configs/phycore-imx8mp_defconfig | 1 +
> 3 files changed, 19 insertions(+)
>
> diff --git a/board/phytec/phycore_imx8mp/Kconfig
> b/board/phytec/phycore_imx8mp/Kconfig
> index c053a46fc9d1..f846d10bad9e 100644
> --- a/board/phytec/phycore_imx8mp/Kconfig
> +++ b/board/phytec/phycore_imx8mp/Kconfig
> @@ -12,4 +12,5 @@ config SYS_CONFIG_NAME
> config IMX_CONFIG
> default "board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg"
>
> +source "board/phytec/common/Kconfig"
> endif
> diff --git a/board/phytec/phycore_imx8mp/spl.c
> b/board/phytec/phycore_imx8mp/spl.c
> index faed6fc3b76d..49406f2eafad 100644
> --- a/board/phytec/phycore_imx8mp/spl.c
> +++ b/board/phytec/phycore_imx8mp/spl.c
> @@ -21,8 +21,13 @@
> #include
> #include
>
> +#include "../common/imx8m_som_detection.h"
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> +#define EEPROM_ADDR 0x51
> +#define EEPROM_ADDR_FALLBACK 0x59
> +
> int spl_board_boot_device(enum boot_device boot_dev_spl)
> {
> return BOOT_DEVICE_BOOTROM;
> @@ -30,6 +35,18 @@ int spl_board_boot_device(enum boot_device
> boot_dev_spl)
>
> void spl_dram_init(void)
> {
> + int ret;
> +
> + ret = phytec_eeprom_data_setup_fallback(NULL, 0, EEPROM_ADDR,
> + EEPROM_ADDR_FALLBACK);
> + if (ret)
> + goto out;
> +
> + ret = phytec_imx8m_detect(NULL);
> + if (!ret)
> + phytec_print_som_info(NULL);
> +
> +out:
> ddr_init(_timing);
> }
>
> diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-
> imx8mp_defconfig
> index 7bf404be860b..7937e15e6422 100644
> --- a/configs/phycore-imx8mp_defconfig
> +++ b/configs/phycore-imx8mp_defconfig
> @@ -12,6 +12,7 @@ CONFIG_DM_GPIO=y
> CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk"
> CONFIG_SPL_TEXT_BASE=0x92
> CONFIG_TARGET_PHYCORE_IMX8MP=y
> +CONFIG_PHYTEC_SOM_DETECTION=y
> CONFIG_SYS_PROMPT="u-boot=> "
> CONFIG_SYS_MONITOR_LEN=524288
> CONFIG_SPL_MMC=y
Re: [PATCH v2 2/6] board: phytec: common: Add imx8m specific EEPROM detection support
On Thu, 2023-08-17 at 10:57 +0200, Teresa Remmet wrote:
> Add imx8m specific detection part. Which includes checking the
> EEPROM data for article number options.
>
> Signed-off-by: Teresa Remmet
Reviewed-by: Yannic Moog
Tested-by: Yannic Moog
> ---
> Changes in v2:
> - remove blank line at EOF
> - fix string conversion to integer
> - fix typo s/revsions/revisions
> ---
> board/phytec/common/Kconfig | 8 ++
> board/phytec/common/Makefile | 1 +
> board/phytec/common/imx8m_som_detection.c | 168
> ++
> board/phytec/common/imx8m_som_detection.h | 54 +++
> 4 files changed, 231 insertions(+)
> create mode 100644 board/phytec/common/imx8m_som_detection.c
> create mode 100644 board/phytec/common/imx8m_som_detection.h
>
> diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig
> index d614d45b1d60..3b1c5aa0d02b 100644
> --- a/board/phytec/common/Kconfig
> +++ b/board/phytec/common/Kconfig
> @@ -3,3 +3,11 @@ config PHYTEC_SOM_DETECTION
> select SPL_CRC8 if SPL
> help
> Support of I2C EEPROM based SoM detection.
> +
> +config PHYTEC_IMX8M_SOM_DETECTION
> + bool "Support SoM detection for i.MX8M PHYTEC platforms"
> + depends on ARCH_IMX8M && PHYTEC_SOM_DETECTION
> + default y
> + help
> + Support of I2C EEPROM based SoM detection. Supported
> + for PHYTEC i.MX8MM/i.MX8MP boards
> diff --git a/board/phytec/common/Makefile
> b/board/phytec/common/Makefile
> index 5fe8725ef684..fe28964ce21c 100644
> --- a/board/phytec/common/Makefile
> +++ b/board/phytec/common/Makefile
> @@ -8,3 +8,4 @@ obj- := __dummy__.o
> endif
>
> obj-$(CONFIG_PHYTEC_SOM_DETECTION) += phytec_som_detection.o
> +obj-$(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) += imx8m_som_detection.o
> diff --git a/board/phytec/common/imx8m_som_detection.c
> b/board/phytec/common/imx8m_som_detection.c
> new file mode 100644
> index ..c6c96ed19cb3
> --- /dev/null
> +++ b/board/phytec/common/imx8m_som_detection.c
> @@ -0,0 +1,168 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2023 PHYTEC Messtechnik GmbH
> + * Author: Teresa Remmet
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "imx8m_som_detection.h"
> +
> +extern struct phytec_eeprom_data eeprom_data;
> +
> +/* Check if the SoM is actually one of the following products:
> + * - i.MX8MM
> + * - i.MX8MN
> + * - i.MX8MP
> + * - i.MX8MQ
> + *
> + * Returns 0 in case it's a known SoM. Otherwise, returns -1.
> + */
> +u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data
> *data)
> +{
> + char *opt;
> + u8 som;
> +
> + /* We can not do the check for early API revisions */
> + if (data->api_rev < PHYTEC_API_REV2)
> + return -1;
> +
> + if (!data)
> + data = _data;
> +
> + som = data->data.data_api2.som_no;
> + debug("%s: som id: %u\n", __func__, som);
> +
> + opt = phytec_get_opt(data);
> + if (!opt)
> + return -1;
> +
> + if (som == PHYTEC_IMX8MP_SOM && is_imx8mp())
> + return 0;
> +
> + if (som == PHYTEC_IMX8MM_SOM) {
> + if ((PHYTEC_GET_OPTION(opt[0]) != 0) &&
> + (PHYTEC_GET_OPTION(opt[1]) == 0) && is_imx8mm())
> + return 0;
> + else if ((PHYTEC_GET_OPTION(opt[0]) == 0) &&
> + (PHYTEC_GET_OPTION(opt[1]) != 0) &&
> is_imx8mn())
> + return 0;
> + }
> +
> + if (som == PHYTEC_IMX8MQ_SOM && is_imx8mq())
> + return 0;
> +
> + pr_err("%s: SoM ID does not match. Wrong EEPROM data?\n",
> __func__);
> + return -1;
> +}
> +
> +/*
> + * All PHYTEC i.MX8M boards have RAM size definition at the
> + * same location.
> + */
> +u8 __maybe_unused phytec_get_imx8m_ddr_size(struct phytec_eeprom_data
> *data)
> +{
> + char *opt;
> + u8 ddr_id;
> +
> + if (!data)
> + data = _data;
> +
> + opt = phytec_get_opt(data);
> + if (opt)
> + ddr_id = PHYTEC_GET_OPTION(opt[2]);
> + else
> + ddr_id = PHYTEC_EEPROM_INVAL;
> +
> + debug("%s: ddr id: %u\n", __func__, ddr_id);
> + return ddr_id;
> +}
> +
> +/*
> + * Filter SPI-NOR flash information. All i.MX8M boards have this at
> + * the same location.
&g
Re: [PATCH v2 1/6] board: phytec: Add common PHYTEC SoM detection
On Thu, 2023-08-17 at 10:57 +0200, Teresa Remmet wrote:
> Recent shipped PHYTEC SoMs come with an i2c EEPROM containing
> information about the hardware such as board revision and variant.
> This can be used for RAM detection and loading device tree overlays
> during kernel start.
>
> Signed-off-by: Teresa Remmet
Reviewed-by: Yannic Moog
Tested-by: Yannic Moog
> ---
> Changes in v2:
> - none
> ---
> board/phytec/common/Kconfig | 5 +
> board/phytec/common/Makefile | 10 ++
> board/phytec/common/phytec_som_detection.c | 188
> +
> board/phytec/common/phytec_som_detection.h | 104
> 4 files changed, 307 insertions(+)
> create mode 100644 board/phytec/common/Kconfig
> create mode 100644 board/phytec/common/Makefile
> create mode 100644 board/phytec/common/phytec_som_detection.c
> create mode 100644 board/phytec/common/phytec_som_detection.h
>
> diff --git a/board/phytec/common/Kconfig b/board/phytec/common/Kconfig
> new file mode 100644
> index ..d614d45b1d60
> --- /dev/null
> +++ b/board/phytec/common/Kconfig
> @@ -0,0 +1,5 @@
> +config PHYTEC_SOM_DETECTION
> + bool "Support SoM detection for PHYTEC platforms"
> + select SPL_CRC8 if SPL
> + help
> + Support of I2C EEPROM based SoM detection.
> diff --git a/board/phytec/common/Makefile
> b/board/phytec/common/Makefile
> new file mode 100644
> index ..5fe8725ef684
> --- /dev/null
> +++ b/board/phytec/common/Makefile
> @@ -0,0 +1,10 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +# Copyright (C) 2023 PHYTEC Messtechnik GmbH
> +# Author: Teresa Remmet
> +
> +ifdef CONFIG_SPL_BUILD
> +# necessary to create built-in.o
> +obj- := __dummy__.o
> +endif
> +
> +obj-$(CONFIG_PHYTEC_SOM_DETECTION) += phytec_som_detection.o
> diff --git a/board/phytec/common/phytec_som_detection.c
> b/board/phytec/common/phytec_som_detection.c
> new file mode 100644
> index ..366bdd4ace4b
> --- /dev/null
> +++ b/board/phytec/common/phytec_som_detection.c
> @@ -0,0 +1,188 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2023 PHYTEC Messtechnik GmbH
> + * Author: Teresa Remmet
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "phytec_som_detection.h"
> +
> +struct phytec_eeprom_data eeprom_data;
> +
> +int phytec_eeprom_data_setup_fallback(struct phytec_eeprom_data
> *data,
> + int bus_num, int addr, int
> addr_fallback)
> +{
> + int ret;
> +
> + ret = phytec_eeprom_data_init(data, bus_num, addr);
> + if (ret) {
> + pr_err("%s: init failed. Trying fall back address
> 0x%x\n",
> + __func__, addr_fallback);
> + ret = phytec_eeprom_data_init(data, bus_num,
> addr_fallback);
> + }
> +
> + if (ret)
> + pr_err("%s: EEPROM data init failed\n", __func__);
> +
> + return ret;
> +}
> +
> +int phytec_eeprom_data_setup(struct phytec_eeprom_data *data,
> + int bus_num, int addr)
> +{
> + int ret;
> +
> + ret = phytec_eeprom_data_init(data, bus_num, addr);
> + if (ret)
> + pr_err("%s: EEPROM data init failed\n", __func__);
> +
> + return ret;
> +}
> +
> +int phytec_eeprom_data_init(struct phytec_eeprom_data *data,
> + int bus_num, int addr)
> +{
> + int ret, i;
> + unsigned int crc;
> + int *ptr;
> +
> + if (!data)
> + data = _data;
> +
> +#if CONFIG_IS_ENABLED(DM_I2C)
> + struct udevice *dev;
> +
> + ret = i2c_get_chip_for_busnum(bus_num, addr, 2, );
> + if (ret) {
> + pr_err("%s: i2c EEPROM not found: %i.\n", __func__,
> ret);
> + return ret;
> + }
> +
> + ret = dm_i2c_read(dev, 0, (uint8_t *)data,
> + sizeof(struct phytec_eeprom_data));
> + if (ret) {
> + pr_err("%s: Unable to read EEPROM data\n", __func__);
> + return ret;
> + }
> +#else
> + i2c_set_bus_num(bus_num);
> + ret = i2c_read(addr, 0, 2, (uint8_t *)data,
> + sizeof(struct phytec_eeprom_data));
> +#endif
> +
> + if (data->api_rev == 0xff) {
> + pr_err("%s: EEPROM is not flashed. Prototype?\n",
> __func__);
> + return -EINVAL;
> + }
> +
> +
Re: [PATCH v1 0/4] Port gen_compile_commands.py from Linux to U-Boot
Hello Joao, On Sun, 2023-08-20 at 21:04 +0200, Joao Marcos Costa wrote: > Hello U-Boot community, > > I'm submitting a patch series that ports the gen_compile_commands.py > script from the Linux kernel's sources to U-Boot. This script, > originally > located in scripts/clang-tools/gen_compile_commands.py, enables the > generation of compile_commands.json files for improved code > navigation > and analysis. The series consists of four patches: the initial script > import and the necessary modifications for U-Boot compatibility. > > Your feedback on these contributions would be greatly appreciated. > > Best regards, > > Joao Marcos Costa (4): > scripts: Port Linux's gen_compile_commands.py to U-Boot > scripts/gen_compile_commands.py: adapt _LINE_PATTERN > scripts/gen_compile_commands.py: fix docstring > scripts/gen_compile_commands.py: add acknowledgments Can you also add a patch to add the compile_commands.json to .gitignore, please? Yannic > > scripts/gen_compile_commands.py | 229 > > 1 file changed, 229 insertions(+) > create mode 100755 scripts/gen_compile_commands.py >
Re: [PATCH v2 0/6] PHYTEC SoM detection for phyCORE-i.MX8MP
Hi Fabio On Thu, 2023-08-24 at 08:52 -0300, Fabio Estevam wrote: > Hi Yannic, > > On Thu, Aug 17, 2023 at 5:57 AM Teresa Remmet > wrote: > > > > second version of the series to add support for EEPROM SoM > > detection used > > by different PHYTEC SoMs. The EEPROM data consist of 32 bytes > > containing > > information like PCB revision, RAM size and other SoM specific > > configuration. > > > > For SoMs of the i.MX8M family the data is written to two areas of > > the > > used i2c EEPROM. > > > > We initally add the detection support for phyCORE-i.MX8MP. Due to > > layout > > constraints phyCORE-i.MX8MP SoMs with PCB revision 2 and older can > > only > > make use of a lower RAM frequency. This changes with the use of > > newer PCB > > revisions. We make use of the factory flashed EEPROM data to detect > > the > > PCB revision and select the fitting RAM settings. > > > > Changes in v2: > > - fix wrong RAM Timing values as pointed out by Yannic > > - removed superfluous goto > > - removed blank line at EOF > > - fix string conversion to integer > > - fix typo s/revsions/revisions > > Could you please help review v2? Yes, I will do it early next week. > > Thanks
Re: [PATCH 4/6] board: phytec: phycore_imx8mp: Update 2GB RAM Timings
Hello Teresa,
On Tue, 2023-07-18 at 15:35 +0200, Teresa Remmet wrote:
> Due to PCB layout constraints in PCB revisions until including
> 1549.2,
> a RAM frequency of 2 GHz can cause rare instabilities. Set the RAM
> frequency to 1.5 GHz to achieve a stable system under all conditions.
>
> Signed-off-by: Teresa Remmet
> ---
> board/phytec/phycore_imx8mp/lpddr4_timing.c | 278 ++
> --
> 1 file changed, 135 insertions(+), 143 deletions(-)
>
> diff --git a/board/phytec/phycore_imx8mp/lpddr4_timing.c
> b/board/phytec/phycore_imx8mp/lpddr4_timing.c
> index e59dd74377cb..f2707b859606 100644
> --- a/board/phytec/phycore_imx8mp/lpddr4_timing.c
> +++ b/board/phytec/phycore_imx8mp/lpddr4_timing.c
> @@ -13,63 +13,68 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = {
> { 0x3d400304, 0x1 },
> { 0x3d400030, 0x1 },
> { 0x3d40, 0xa1080020 },
> - { 0x3d400020, 0x323 },
> - { 0x3d400024, 0x1e84800 },
> - { 0x3d400064, 0x7a0118 },
> - { 0x3d4000d0, 0xc00307a3 },
> - { 0x3d4000d4, 0xc5 },
> - { 0x3d4000dc, 0xf4003f },
> - { 0x3d4000e0, 0x33 },
> + { 0x3d400020, 0x1223 },
> + { 0x3d400024, 0x16e3600 },
> + { 0x3d400064, 0x5b00d2 },
> + { 0x3d400070, 0x7027f90 },
> + { 0x3d400074, 0x790 },
> + { 0x3d4000d0, 0xc00305ba },
> + { 0x3d4000d4, 0x94 },
> + { 0x3d4000dc, 0xd4002d },
> + { 0x3d4000e0, 0xf1 },
> { 0x3d4000e8, 0x660048 },
> { 0x3d4000ec, 0x160048 },
> - { 0x3d400100, 0x2028222a },
> - { 0x3d400104, 0x807bf },
> - { 0x3d40010c, 0xe0e000 },
> - { 0x3d400110, 0x12040a12 },
> - { 0x3d400114, 0x2050f0f },
> - { 0x3d400118, 0x1010009 },
> - { 0x3d40011c, 0x501 },
> - { 0x3d400130, 0x20800 },
> - { 0x3d400134, 0xe12 },
> - { 0x3d400138, 0x120 },
> - { 0x3d400144, 0xc80064 },
> - { 0x3d400180, 0x3e8001e },
> - { 0x3d400184, 0x3207a12 },
> + { 0x3d400100, 0x191e1920 },
> + { 0x3d400104, 0x60630 },
> + { 0x3d40010c, 0xb0b000 },
> + { 0x3d400110, 0xe04080e },
> + { 0x3d400114, 0x2040c0c },
> + { 0x3d400118, 0x1010007 },
> + { 0x3d40011c, 0x401 },
> + { 0x3d400130, 0x20600 },
> + { 0x3d400134, 0xc12 },
> + { 0x3d400138, 0xd8 },
> + { 0x3d400144, 0x96004b },
> + { 0x3d400180, 0x2ee0017 },
> + { 0x3d400184, 0x2605b8e },
> { 0x3d400188, 0x0 },
> - { 0x3d400190, 0x49f820e },
> + { 0x3d400190, 0x49b820a },
> { 0x3d400194, 0x80303 },
> - { 0x3d4001b4, 0x1f0e },
> + { 0x3d4001b4, 0x1b0a },
> { 0x3d4001a0, 0xe0400018 },
> { 0x3d4001a4, 0xdf00e4 },
> { 0x3d4001a8, 0x8000 },
> { 0x3d4001b0, 0x11 },
> - { 0x3d4001c0, 0x1 },
> + { 0x3d4001c0, 0x7 },
> { 0x3d4001c4, 0x1 },
> { 0x3d4000f4, 0xc99 },
> - { 0x3d400108, 0x9121c1c },
> + { 0x3d400108, 0x7101817 },
> { 0x3d400200, 0x1f },
> + { 0x3d400208, 0x0 },
Are you sure this line is correct? Recheck, please.
Yannic
> { 0x3d40020c, 0x0 },
> { 0x3d400210, 0x1f1f },
> { 0x3d400204, 0x80808 },
> { 0x3d400214, 0x7070707 },
> { 0x3d400218, 0x7070707 },
> - { 0x3d40021c, 0xf07 },
> - { 0x3d400250, 0x1f05 },
> - { 0x3d400254, 0x1f },
> - { 0x3d400264, 0x90003ff },
> - { 0x3d40026c, 0x20003ff },
> + { 0x3d40021c, 0xf0f },
> + { 0x3d400250, 0x1705 },
> + { 0x3d400254, 0x2c },
> + { 0x3d40025c, 0x430 },
> + { 0x3d400264, 0x900093e7 },
> + { 0x3d40026c, 0x2005574 },
> { 0x3d400400, 0x111 },
> + { 0x3d400404, 0x72ff },
> { 0x3d400408, 0x72ff },
> - { 0x3d400494, 0x1000e00 },
> - { 0x3d400498, 0x3ff },
> - { 0x3d40049c, 0x1000e00 },
> - { 0x3d4004a0, 0x3ff },
> - { 0x3d402020, 0x21 },
> + { 0x3d400494, 0x2100e07 },
> + { 0x3d400498, 0x620096 },
> + { 0x3d40049c, 0x1100e07 },
> + { 0x3d4004a0, 0xc8012c },
> + { 0x3d402020, 0x1021 },
> { 0x3d402024, 0x30d400 },
> - { 0x3d402050, 0x20d040 },
> + { 0x3d402050, 0x20d000 },
> { 0x3d402064, 0xc001c },
> { 0x3d4020dc, 0x84 },
> - { 0x3d4020e0, 0x33 },
> + { 0x3d4020e0, 0xf3 },
> { 0x3d4020e8, 0x660048 },
> { 0x3d4020ec, 0x160048 },
> { 0x3d402100, 0xa040305 },
> @@ -89,12 +94,12 @@ static struct dram_cfg_param ddr_ddrc_cfg[] = {
> { 0x3d402194, 0x80303 },
> { 0x3d4021b4, 0x100 },
> { 0x3d4020f4, 0xc99 },
> - { 0x3d403020, 0x21 },
> + { 0x3d403020, 0x1021 },
> { 0x3d403024, 0xc3500 },
> - { 0x3d403050, 0x20d040 },
> + { 0x3d403050, 0x20d000 },
> { 0x3d403064, 0x30007 },
> { 0x3d4030dc, 0x84 },
> - { 0x3d4030e0, 0x33 },
> + {
Re: [PATCH 6/6] board: phytec: phycore_imx8mp: Add 4000MTS RAM timings based on PCB rev
Hello Teresa,
On Tue, 2023-07-18 at 15:35 +0200, Teresa Remmet wrote:
> Starting with PCB revision 3 we can safely make use of higher RAM
> frequency again. Make use of the EEPROM detection to determine the
> revision and use the updated RAM timings for new SoMs.
>
> Signed-off-by: Teresa Remmet
> ---
> board/phytec/phycore_imx8mp/spl.c | 61
> +++
> 1 file changed, 61 insertions(+)
>
> diff --git a/board/phytec/phycore_imx8mp/spl.c
> b/board/phytec/phycore_imx8mp/spl.c
> index e084fe081987..2929c3c50001 100644
> --- a/board/phytec/phycore_imx8mp/spl.c
> +++ b/board/phytec/phycore_imx8mp/spl.c
> @@ -48,6 +48,67 @@ void spl_dram_init(void)
>
> phytec_print_som_info(NULL);
>
> + ret = phytec_get_rev(NULL);
> + if (ret >= 3 && ret != PHYTEC_EEPROM_INVAL) {
> + dram_timing.ddrc_cfg[3].val = 0x1233;
I believe you swapped to digits here, it should be 0x1323.
> + dram_timing.ddrc_cfg[4].val = 0x1e84800;
> + dram_timing.ddrc_cfg[5].val = 0x7a0118;
> + dram_timing.ddrc_cfg[8].val = 0xc00307a3;
> + dram_timing.ddrc_cfg[9].val = 0xc5;
> + dram_timing.ddrc_cfg[10].val = 0xf4003f;
> + dram_timing.ddrc_cfg[11].val = 0xf3;
> + dram_timing.ddrc_cfg[14].val = 0x2028222a;
> + dram_timing.ddrc_cfg[15].val = 0x8083f;
> + dram_timing.ddrc_cfg[16].val = 0xe0e000;
> + dram_timing.ddrc_cfg[17].val = 0x12040a12;
> + dram_timing.ddrc_cfg[18].val = 0x2050f0f;
> + dram_timing.ddrc_cfg[19].val = 0x1010009;
> + dram_timing.ddrc_cfg[20].val = 0x502;
> + dram_timing.ddrc_cfg[21].val = 0x20800;
> + dram_timing.ddrc_cfg[22].val = 0xe12;
> + dram_timing.ddrc_cfg[23].val = 0x120;
> + dram_timing.ddrc_cfg[24].val = 0xc80064;
> + dram_timing.ddrc_cfg[25].val = 0x3e8001e;
> + dram_timing.ddrc_cfg[26].val = 0x3207a12;
> + dram_timing.ddrc_cfg[28].val = 0x4a3820e;
> + dram_timing.ddrc_cfg[30].val = 0x230e;
> + dram_timing.ddrc_cfg[37].val = 0x799;
> + dram_timing.ddrc_cfg[38].val = 0x9141d1c;
> + dram_timing.ddrc_cfg[74].val = 0x302;
> + dram_timing.ddrc_cfg[83].val = 0x599;
> + dram_timing.ddrc_cfg[99].val = 0x302;
> + dram_timing.ddrc_cfg[108].val = 0x599;
> + dram_timing.ddrphy_cfg[66].val = 0x18;
> + dram_timing.ddrphy_cfg[75].val = 0x1e3;
> + dram_timing.ddrphy_cfg[77].val = 0x1e3;
> + dram_timing.ddrphy_cfg[79].val = 0x1e3;
> + dram_timing.ddrphy_cfg[145].val = 0x3e8;
> + dram_timing.fsp_msg[0].drate = 4000;
> + dram_timing.fsp_msg[0].fsp_cfg[1].val = 0xfa0;
> + dram_timing.fsp_msg[0].fsp_cfg[10].val = 0x3ff4;
> + dram_timing.fsp_msg[0].fsp_cfg[11].val = 0xf3;
> + dram_timing.fsp_msg[0].fsp_cfg[15].val = 0x3ff4;
> + dram_timing.fsp_msg[0].fsp_cfg[16].val = 0xf3;
> + dram_timing.fsp_msg[0].fsp_cfg[22].val = 0xf400;
> + dram_timing.fsp_msg[0].fsp_cfg[23].val = 0xf33f;
> + dram_timing.fsp_msg[0].fsp_cfg[28].val = 0xf400;
> + dram_timing.fsp_msg[0].fsp_cfg[29].val = 0xf33f;
> + dram_timing.fsp_msg[3].drate = 4000;
> + dram_timing.fsp_msg[3].fsp_cfg[1].val = 0xbb8;
And for this entry, I get 0xfa0.
Yannic
> + dram_timing.fsp_msg[3].fsp_cfg[11].val = 0x3ff4;
> + dram_timing.fsp_msg[3].fsp_cfg[12].val = 0xf3;
> + dram_timing.fsp_msg[3].fsp_cfg[16].val = 0x3ff4;
> + dram_timing.fsp_msg[3].fsp_cfg[17].val = 0xf3;
> + dram_timing.fsp_msg[3].fsp_cfg[23].val = 0xf400;
> + dram_timing.fsp_msg[3].fsp_cfg[24].val = 0xf33f;
> + dram_timing.fsp_msg[3].fsp_cfg[29].val = 0xf400;
> + dram_timing.fsp_msg[3].fsp_cfg[30].val = 0xf33f;
> + dram_timing.ddrphy_pie[480].val = 0x465;
> + dram_timing.ddrphy_pie[481].val = 0xfa;
> + dram_timing.ddrphy_pie[482].val = 0x9c4;
> + dram_timing.fsp_table[0] = 4000;
> + }
> +
> out:
> ddr_init(_timing);
> }
Re: [PATCH 3/6] board: phytec: phycore-imx8mp: Add EEPROM detection initialisation
Hello Teresa,
On Tue, 2023-07-18 at 15:35 +0200, Teresa Remmet wrote:
> Add EEPROM detection initialisation for phyCORE-i.MX8MM and
> print SoM information during boot when successful.
>
> Signed-off-by: Teresa Remmet
> ---
> board/phytec/phycore_imx8mp/Kconfig | 1 +
> board/phytec/phycore_imx8mp/spl.c | 19 +++
> configs/phycore-imx8mp_defconfig | 1 +
> 3 files changed, 21 insertions(+)
>
> diff --git a/board/phytec/phycore_imx8mp/Kconfig
> b/board/phytec/phycore_imx8mp/Kconfig
> index c053a46fc9d1..f846d10bad9e 100644
> --- a/board/phytec/phycore_imx8mp/Kconfig
> +++ b/board/phytec/phycore_imx8mp/Kconfig
> @@ -12,4 +12,5 @@ config SYS_CONFIG_NAME
> config IMX_CONFIG
> default "board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg"
>
> +source "board/phytec/common/Kconfig"
> endif
> diff --git a/board/phytec/phycore_imx8mp/spl.c
> b/board/phytec/phycore_imx8mp/spl.c
> index faed6fc3b76d..e084fe081987 100644
> --- a/board/phytec/phycore_imx8mp/spl.c
> +++ b/board/phytec/phycore_imx8mp/spl.c
> @@ -21,8 +21,13 @@
> #include
> #include
>
> +#include "../common/imx8m_som_detection.h"
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> +#define EEPROM_ADDR 0x51
> +#define EEPROM_ADDR_FALLBACK 0x59
> +
> int spl_board_boot_device(enum boot_device boot_dev_spl)
> {
> return BOOT_DEVICE_BOOTROM;
> @@ -30,6 +35,20 @@ int spl_board_boot_device(enum boot_device
> boot_dev_spl)
>
> void spl_dram_init(void)
> {
> + int ret;
> +
> + ret = phytec_eeprom_data_setup_fallback(NULL, 0, EEPROM_ADDR,
> + EEPROM_ADDR_FALLBACK)
> ;
> + if (ret)
> + goto out;
> +
> + ret = phytec_imx8m_detect(NULL);
> + if (ret)
> + goto out;
> +
> + phytec_print_som_info(NULL);
> +
Is it better to do a ddr_init here and then return? For safety reasons.
Yannic
> +out:
> ddr_init(_timing);
> }
>
> diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-
> imx8mp_defconfig
> index 7bf404be860b..7937e15e6422 100644
> --- a/configs/phycore-imx8mp_defconfig
> +++ b/configs/phycore-imx8mp_defconfig
> @@ -12,6 +12,7 @@ CONFIG_DM_GPIO=y
> CONFIG_DEFAULT_DEVICE_TREE="imx8mp-phyboard-pollux-rdk"
> CONFIG_SPL_TEXT_BASE=0x92
> CONFIG_TARGET_PHYCORE_IMX8MP=y
> +CONFIG_PHYTEC_SOM_DETECTION=y
> CONFIG_SYS_PROMPT="u-boot=> "
> CONFIG_SYS_MONITOR_LEN=524288
> CONFIG_SPL_MMC=y
Re: [PATCH 2/6] board: phytec: common: Add imx8m specific EEPROM detection support
Hi Teresa,
On Tue, 2023-07-18 at 15:35 +0200, Teresa Remmet wrote:
> Add imx8m specific detection part. Which includes checking the
> EEPROM data for article number options.
>
> Signed-off-by: Teresa Remmet
> ---
> board/phytec/common/Kconfig | 8 +
> board/phytec/common/Makefile | 1 +
> board/phytec/common/imx8m_som_detection.c | 169
> ++
> board/phytec/common/imx8m_som_detection.h | 54 +++
> 4 files changed, 232 insertions(+)
> create mode 100644 board/phytec/common/imx8m_som_detection.c
> create mode 100644 board/phytec/common/imx8m_som_detection.h
>
> diff --git a/board/phytec/common/Kconfig
> b/board/phytec/common/Kconfig
> index d614d45b1d60..3b1c5aa0d02b 100644
> --- a/board/phytec/common/Kconfig
> +++ b/board/phytec/common/Kconfig
> @@ -3,3 +3,11 @@ config PHYTEC_SOM_DETECTION
> select SPL_CRC8 if SPL
> help
> Support of I2C EEPROM based SoM detection.
> +
> +config PHYTEC_IMX8M_SOM_DETECTION
> + bool "Support SoM detection for i.MX8M PHYTEC platforms"
> + depends on ARCH_IMX8M && PHYTEC_SOM_DETECTION
> + default y
> + help
> + Support of I2C EEPROM based SoM detection. Supported
> + for PHYTEC i.MX8MM/i.MX8MP boards
> diff --git a/board/phytec/common/Makefile
> b/board/phytec/common/Makefile
> index 5fe8725ef684..fe28964ce21c 100644
> --- a/board/phytec/common/Makefile
> +++ b/board/phytec/common/Makefile
> @@ -8,3 +8,4 @@ obj- := __dummy__.o
> endif
>
> obj-$(CONFIG_PHYTEC_SOM_DETECTION) += phytec_som_detection.o
> +obj-$(CONFIG_PHYTEC_IMX8M_SOM_DETECTION) += imx8m_som_detection.o
> diff --git a/board/phytec/common/imx8m_som_detection.c
> b/board/phytec/common/imx8m_som_detection.c
> new file mode 100644
> index ..a732d619fcf3
> --- /dev/null
> +++ b/board/phytec/common/imx8m_som_detection.c
> @@ -0,0 +1,169 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2023 PHYTEC Messtechnik GmbH
> + * Author: Teresa Remmet
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include "imx8m_som_detection.h"
> +
> +extern struct phytec_eeprom_data eeprom_data;
> +
> +/* Check if the SoM is actually one of the following products:
> + * - i.MX8MM
> + * - i.MX8MN
> + * - i.MX8MP
> + * - i.MX8MQ
> + *
> + * Returns 0 in case it's a known SoM. Otherwise, returns -1.
> + */
> +u8 __maybe_unused phytec_imx8m_detect(struct phytec_eeprom_data
> *data)
> +{
> + char *opt;
> + u8 som;
> +
> + /* We can not do the check for early API revsions */
> + if (data->api_rev < PHYTEC_API_REV2)
> + return -1;
> +
> + if (!data)
> + data = _data;
> +
> + som = data->data.data_api2.som_no;
> + debug("%s: som id: %u\n", __func__, som);
> +
> + opt = phytec_get_opt(data);
> + if (!opt)
> + return -1;
> +
> + if (som == PHYTEC_IMX8MP_SOM && is_imx8mp())
> + return 0;
> +
> + if (som == PHYTEC_IMX8MM_SOM) {
> + if ((PHYTEC_GET_OPTION(opt[0]) != 0) &&
> + (PHYTEC_GET_OPTION(opt[1]) == 0) && is_imx8mm())
> + return 0;
> + else if ((PHYTEC_GET_OPTION(opt[0]) == 0) &&
> + (PHYTEC_GET_OPTION(opt[1]) != 0) &&
> is_imx8mn())
> + return 0;
> + }
> +
> + if (som == PHYTEC_IMX8MQ_SOM && is_imx8mq())
> + return 0;
> +
> + pr_err("%s: SoM ID does not match. Wrong EEPROM data?\n",
> __func__);
> + return -1;
> +}
> +
> +/*
> + * All PHYTEC i.MX8M boards have RAM size definition at the
> + * same location.
> + */
> +u8 __maybe_unused phytec_get_imx8m_ddr_size(struct
> phytec_eeprom_data *data)
> +{
> + char *opt;
> + u8 ddr_id;
> +
> + if (!data)
> + data = _data;
> +
> + opt = phytec_get_opt(data);
> + if (opt)
> + ddr_id = PHYTEC_GET_OPTION(opt[2]) - '0';
Is the "- '0'" a bug? While testing, I noticed that the RAM size is not
detected correctly and looking at the macro definiton this - '0' case
is already covered. I assume in this line you meant to simply call the
macro.
Regards,
Yannic
> + else
> + ddr_id = PHYTEC_EEPROM_INVAL;
> +
> + debug("%s: ddr id: %u\n", __func__, ddr_id);
> + return ddr_id;
> +}
> +
> +/*
> + * Filter SPI-NOR flash information. All i.MX8M boards have this at
> + * the same location.
> + * returns: 0x0 if no SPI is populated. Otherwise a board depended
> + * code for the size. PHYTEC_EEPROM_INVAL when the data is invalid.
> + */
> +u8 __maybe_unused phytec_get_imx8m_spi(struct phytec_eeprom_data
> *data)
> +{
> + char *opt;
> + u8 spi;
> +
> + if (!data)
> + data = _data;
> +
> + if (data->api_rev < PHYTEC_API_REV2)
> + return PHYTEC_EEPROM_INVAL;
> +
> + opt = phytec_get_opt(data);
> +
[PATCH 2/2] doc: board: phytec: add phycore_imx8mp
Add documentation on how to build a bootable U-Boot image for the PHYTEC phyCORE-i.MX 8M Plus. Signed-off-by: Yannic Moog --- doc/board/phytec/index.rst | 1 + doc/board/phytec/phycore-imx8mp.rst | 60 + 2 files changed, 61 insertions(+) create mode 100644 doc/board/phytec/phycore-imx8mp.rst diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst index 30292d0d76..a5b442045e 100644 --- a/doc/board/phytec/index.rst +++ b/doc/board/phytec/index.rst @@ -7,3 +7,4 @@ PHYTEC :maxdepth: 2 phycore-imx8mm + phycore-imx8mp diff --git a/doc/board/phytec/phycore-imx8mp.rst b/doc/board/phytec/phycore-imx8mp.rst new file mode 100644 index 00..fda751aeff --- /dev/null +++ b/doc/board/phytec/phycore-imx8mp.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +phyCORE-i.MX 8M Plus + + +The phyCORE-i.MX 8M Plus with 2GB of main memory is supported. + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get ddr firmware +- Build U-Boot +- Boot + +Build the ARM Trusted firmware binary +- + +.. code-block:: bash + + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + $ export CROSS_COMPILE=aarch64-linux-gnu + $ export IMX_BOOT_UART_BASE=0x3086 + $ make PLAT=imx8mp bl31 + +Get the ddr firmware + + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.19.bin + $ chmod +x firmware-imx-8.19.bin + $ ./firmware-imx-8.19.bin + +Build U-Boot for SD card + + +Copy binaries +^ + +.. code-block:: bash + + $ cp /build/imx8mp/release/bl31.bin . + $ cp firmware-imx-8.19/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot + + +.. code-block:: bash + + $ make phycore-imx8mp_defconfig + $ make flash.bin + +Flash SD card +^ + +.. code-block:: bash + + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=32 conv=sync -- 2.34.1
[PATCH 1/2] doc: board: phytec: add phycore_imx8mm
Add documentation on how to build a bootable U-Boot image for the PHYTEC phyCORE-i.MX 8M Mini. Signed-off-by: Yannic Moog --- doc/board/index.rst | 1 + doc/board/phytec/index.rst | 9 + doc/board/phytec/phycore-imx8mm.rst | 60 + 3 files changed, 70 insertions(+) create mode 100644 doc/board/phytec/index.rst create mode 100644 doc/board/phytec/phycore-imx8mm.rst diff --git a/doc/board/index.rst b/doc/board/index.rst index 9ef25b1091..ce1fbe2fff 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -32,6 +32,7 @@ Board-specific doc nokia/index nxp/index openpiton/index + phytec/index purism/index qualcomm/index renesas/index diff --git a/doc/board/phytec/index.rst b/doc/board/phytec/index.rst new file mode 100644 index 00..30292d0d76 --- /dev/null +++ b/doc/board/phytec/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +PHYTEC +== + +.. toctree:: + :maxdepth: 2 + + phycore-imx8mm diff --git a/doc/board/phytec/phycore-imx8mm.rst b/doc/board/phytec/phycore-imx8mm.rst new file mode 100644 index 00..e9dc225990 --- /dev/null +++ b/doc/board/phytec/phycore-imx8mm.rst @@ -0,0 +1,60 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +phyCORE-i.MX 8M Mini + + +The phyCORE-i.MX 8M Mini with 2GB of main memory is supported. + +Quick Start +--- + +- Build the ARM Trusted firmware binary +- Get ddr firmware +- Build U-Boot +- Boot + +Build the ARM Trusted firmware binary +- + +.. code-block:: bash + + $ git clone https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git + $ cd trusted-firmware-a + $ export CROSS_COMPILE=aarch64-linux-gnu + $ export IMX_BOOT_UART_BASE=0x3088 + $ make PLAT=imx8mm bl31 + +Get the ddr firmware + + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.19.bin + $ chmod +x firmware-imx-8.19.bin + $ ./firmware-imx-8.19.bin + +Build U-Boot for SD card + + +Copy binaries +^ + +.. code-block:: bash + + $ cp /build/imx8mm/release/bl31.bin . + $ cp firmware-imx-8.19/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot + + +.. code-block:: bash + + $ make phycore-imx8mm_defconfig + $ make flash.bin + +Flash SD card +^ + +.. code-block:: bash + + $ sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33 conv=sync -- 2.34.1
