Re: [U-Boot] [v3] arm: Fixed the offset for the no relocation.
On 06/09/12 03:22, Stefano Babic wrote: > On 05/09/2012 16:45, Zhong Hongbo wrote: >> On 04/09/12 23:57, Stefano Babic wrote: >>> On 04/09/2012 16:03, Zhong Hongbo wrote: >>>> On 03/09/12 08:14, Marek Vasut wrote: >>>>> Dear Zhong Hongbo, >>>>> >>>>>> From: Zhong Hongbo >>>>>> >>>>>> When the u-boot address of destination equal to __start, >>>>>> no relocation. relocation offset(r9) = 0. >>>>> >>>>> Good, now what kind of issue does this patch fix? >>>> Hi Marek >>>> >>>> When you adopt CONFIG_SPL_BUILD framework, no CONFIG_NAND_SPL, if the >>>> addr of destination is equal to _start, we should skip u-boot relocation. >>>> >>>> In the last, u-boot will count the dest addr, see the below: >>>> >>>> >>>> adr r1, _start >>>> add lr, r0, r1 >>>> add lr, lr, r9 >>>> >>>> Here, lr = lr + r9, r9 is the offset of u-boot, So when it do not neet >>>> to reolocat, we need to set the zero value for r9 register. >>>> >>>> /* setup parameters for board_init_r */ >>>> mov r0, r5 /* gd_t */ >>>> mov r1, r6 /* dest_addr */ >>>> /* jump to it ... */ >>>> mov pc, lr >>> >>> I can confirm this issue - I see this when I ported SPL to a MX35 board. >>> However, clearing r9 was not enough. I had to fix also _rel_dyn_* to >>> make SPL working, and I did changing the start.S in the same way start.S >>> for arv7 is built. >>> >>> Do you not have these issues ? >> Hi Stefano, >> >> That is enough for my smdk6400 board. > > Hi Stefano, > Ok, thanks. Then I will post a patch on top of yours, but here my: > > Tested-by: Stefano Babic > > Tested on a i.MX35 board (ARM1136) with SPL. Ok, Thanks, BR, hongbo > > Regards, > Stefano > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v3] arm: Fixed the offset for the no relocation.
On 04/09/12 23:57, Stefano Babic wrote: > On 04/09/2012 16:03, Zhong Hongbo wrote: >> On 03/09/12 08:14, Marek Vasut wrote: >>> Dear Zhong Hongbo, >>> >>>> From: Zhong Hongbo >>>> >>>> When the u-boot address of destination equal to __start, >>>> no relocation. relocation offset(r9) = 0. >>> >>> Good, now what kind of issue does this patch fix? >> Hi Marek >> >> When you adopt CONFIG_SPL_BUILD framework, no CONFIG_NAND_SPL, if the >> addr of destination is equal to _start, we should skip u-boot relocation. >> >> In the last, u-boot will count the dest addr, see the below: >> >> >> adr r1, _start >> add lr, r0, r1 >> add lr, lr, r9 >> >> Here, lr = lr + r9, r9 is the offset of u-boot, So when it do not neet >> to reolocat, we need to set the zero value for r9 register. >> >> /* setup parameters for board_init_r */ >> mov r0, r5 /* gd_t */ >> mov r1, r6 /* dest_addr */ >> /* jump to it ... */ >> mov pc, lr > > I can confirm this issue - I see this when I ported SPL to a MX35 board. > However, clearing r9 was not enough. I had to fix also _rel_dyn_* to > make SPL working, and I did changing the start.S in the same way start.S > for arv7 is built. > > Do you not have these issues ? Hi Stefano, That is enough for my smdk6400 board. Thanks, hongbo > > Regards, > Stefano > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V2] disk/partition: Fix the depend for all the partitions file
On 02/09/12 20:40, Wolfgang Denk wrote: > Dear Zhong Hongbo, > > In message <1345075118-3131-1-git-send-email-bocui...@gmail.com> you wrote: >> From: Zhong Hongbo >> >> all the patitions should depend CONFIG_PARTITIONS, no the >> CONFIG_CMD_$(device). The device symbol may be SATA, SCSI, >> USB, MMC, SYSTEMACE. Or else when the filesystem command be >> enabled, But board's configure file can not include any >> CONFIG_CMD_$(device), The u-boot will fail build. For example: >> CONFIG_CMD_EXT2 is defined in smdk6400.h, but the boards can >> not define any disk device. The error information of build as >> following: >> >> common/cmd_ext2.c:191: undefined reference to `get_partition_info' >> fs/ext2/libext2fs.o: In function `ext2fs_set_blk_dev': >> fs/ext2/dev.c:44: undefined reference to `get_partition_info' >> >> Signed-off-by: Zhong Hongbo > > Can you PLEASE make sure to have the string "PATCH" included with all > patches you are posting? Ok > > As is, your submissions get both lost to patchwork and to the > respective maintainer's attention. I will add CONFIG_PARTITIONS to all the boards and test it. If all the boards can compile successful, I will re-send the patch. Thanks, hongbo > > Best regards, > > Wolfgang Denk > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V2] disk/partition: Fix the depend for all the partitions file
On 02/09/12 20:41, Wolfgang Denk wrote: > Dear Zhong Hongbo, > > In message <1345075118-3131-1-git-send-email-bocui...@gmail.com> you wrote: >> From: Zhong Hongbo >> >> all the patitions should depend CONFIG_PARTITIONS, no the >> CONFIG_CMD_$(device). The device symbol may be SATA, SCSI, >> USB, MMC, SYSTEMACE. Or else when the filesystem command be >> enabled, But board's configure file can not include any >> CONFIG_CMD_$(device), The u-boot will fail build. For example: >> CONFIG_CMD_EXT2 is defined in smdk6400.h, but the boards can >> not define any disk device. The error information of build as >> following: >> >> common/cmd_ext2.c:191: undefined reference to `get_partition_info' >> fs/ext2/libext2fs.o: In function `ext2fs_set_blk_dev': >> fs/ext2/dev.c:44: undefined reference to `get_partition_info' >> >> Signed-off-by: Zhong Hongbo >> --- >> Change for V2: >> - Add Signed-off-by. >> --- >> disk/part.c | 21 +++-- >> disk/part_amiga.c |6 +- >> disk/part_dos.c |7 +-- >> disk/part_efi.c |7 +-- >> disk/part_iso.c |7 +-- >> disk/part_mac.c |7 +-- >> 6 files changed, 8 insertions(+), 47 deletions(-) > > Hm did you make sure that all related board config files actually > define CONFIG_PARTITIONS ? No, Do you think that I should add "CONFIG_PARTITIONS" to all the boards? and try compile it? I will do it recently. Thanks, hongbo > > I doubt so. > > Best regards, > > Wolfgang Denk > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v3] arm: Fixed the offset for the no relocation.
On 03/09/12 08:14, Marek Vasut wrote: > Dear Zhong Hongbo, > >> From: Zhong Hongbo >> >> When the u-boot address of destination equal to __start, >> no relocation. relocation offset(r9) = 0. > > Good, now what kind of issue does this patch fix? Hi Marek When you adopt CONFIG_SPL_BUILD framework, no CONFIG_NAND_SPL, if the addr of destination is equal to _start, we should skip u-boot relocation. In the last, u-boot will count the dest addr, see the below: adr r1, _start add lr, r0, r1 add lr, lr, r9 Here, lr = lr + r9, r9 is the offset of u-boot, So when it do not neet to reolocat, we need to set the zero value for r9 register. /* setup parameters for board_init_r */ mov r0, r5 /* gd_t */ mov r1, r6 /* dest_addr */ /* jump to it ... */ mov pc, lr Thanks, hongbo > >> Signed-off-by: Zhong Hongbo >> --- >> Change for V3: >> - Drop the change of arm720t, It has already merge the change. >> Change for V2: >> - Clean a line for arm1176. > > [...] > > Best regards, > Marek Vasut > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [v3] arm: Fixed the offset for the no relocation.
Sorry, Add Albert to the thread. Thanks, hongbo On 02/09/12 14:49, Zhong Hongbo wrote: > From: Zhong Hongbo > > When the u-boot address of destination equal to __start, > no relocation. relocation offset(r9) = 0. > > Signed-off-by: Zhong Hongbo > --- > Change for V3: > - Drop the change of arm720t, It has already merge the change. > Change for V2: > - Clean a line for arm1176. > --- > arch/arm/cpu/arm1136/start.S |1 + > arch/arm/cpu/arm1176/start.S |1 + > arch/arm/cpu/arm920t/start.S |1 + > arch/arm/cpu/arm925t/start.S |1 + > arch/arm/cpu/arm926ejs/start.S |1 + > arch/arm/cpu/arm946es/start.S |1 + > arch/arm/cpu/arm_intcm/start.S |1 + > arch/arm/cpu/ixp/start.S |1 + > arch/arm/cpu/lh7a40x/start.S |1 + > arch/arm/cpu/pxa/start.S |1 + > arch/arm/cpu/s3c44b0/start.S |1 + > arch/arm/cpu/sa1100/start.S|1 + > 12 files changed, 12 insertions(+) > > diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S > index 2483c63..3752af9 100644 > --- a/arch/arm/cpu/arm1136/start.S > +++ b/arch/arm/cpu/arm1136/start.S > @@ -190,6 +190,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S > index d613641..667a0e0 100644 > --- a/arch/arm/cpu/arm1176/start.S > +++ b/arch/arm/cpu/arm1176/start.S > @@ -252,6 +252,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S > index 9b8604e..14c9156 100644 > --- a/arch/arm/cpu/arm920t/start.S > +++ b/arch/arm/cpu/arm920t/start.S > @@ -210,6 +210,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S > index 1a54416..3a483f6 100644 > --- a/arch/arm/cpu/arm925t/start.S > +++ b/arch/arm/cpu/arm925t/start.S > @@ -204,6 +204,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S > index 6f05f1a..1b530dc 100644 > --- a/arch/arm/cpu/arm926ejs/start.S > +++ b/arch/arm/cpu/arm926ejs/start.S > @@ -235,6 +235,7 @@ stack_setup: > adr r0, _start > sub r9, r6, r0 /* r9 <- relocation offset */ > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S > index b4d1d2d..30e2183 100644 > --- a/arch/arm/cpu/arm946es/start.S > +++ b/arch/arm/cpu/arm946es/start.S > @@ -175,6 +175,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S > index b85e7d4..a133d19 100644 > --- a/arch/arm/cpu/arm_intcm/start.S > +++ b/arch/arm/cpu/arm_intcm/start.S > @@ -171,6 +171,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for
[U-Boot] [v3] arm: Fixed the offset for the no relocation.
From: Zhong Hongbo When the u-boot address of destination equal to __start, no relocation. relocation offset(r9) = 0. Signed-off-by: Zhong Hongbo --- Change for V3: - Drop the change of arm720t, It has already merge the change. Change for V2: - Clean a line for arm1176. --- arch/arm/cpu/arm1136/start.S |1 + arch/arm/cpu/arm1176/start.S |1 + arch/arm/cpu/arm920t/start.S |1 + arch/arm/cpu/arm925t/start.S |1 + arch/arm/cpu/arm926ejs/start.S |1 + arch/arm/cpu/arm946es/start.S |1 + arch/arm/cpu/arm_intcm/start.S |1 + arch/arm/cpu/ixp/start.S |1 + arch/arm/cpu/lh7a40x/start.S |1 + arch/arm/cpu/pxa/start.S |1 + arch/arm/cpu/s3c44b0/start.S |1 + arch/arm/cpu/sa1100/start.S|1 + 12 files changed, 12 insertions(+) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 2483c63..3752af9 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -190,6 +190,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index d613641..667a0e0 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -252,6 +252,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 9b8604e..14c9156 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -210,6 +210,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 1a54416..3a483f6 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -204,6 +204,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..1b530dc 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -235,6 +235,7 @@ stack_setup: adr r0, _start sub r9, r6, r0 /* r9 <- relocation offset */ cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index b4d1d2d..30e2183 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -175,6 +175,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index b85e7d4..a133d19 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -171,6 +171,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index 59c359a..c12f1a7 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -273,6 +273,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff -
Re: [U-Boot] [V2] arm: Fixed the offset for the no relocation.
Hi Albert, Sorry for any noisy. This patch affect some SPL arm booting. So it is very important, Now I found that Allen send a patch to fix arm720t platform for the same issue. So I hope this patch can be merged early, If you think the patch have some issue, please point it to me. Thanks, hongbo On 08/01/2012 11:03 PM, Zhong Hongbo wrote: > From: Zhong Hongbo > > When the u-boot address of destination equal to __start, > no relocation. relocation offset(r9) = 0. > > Signed-off-by: Zhong Hongbo > --- > Change for V2: > - Clean a line for arm1176 > --- > arch/arm/cpu/arm1136/start.S |1 + > arch/arm/cpu/arm1176/start.S |1 + > arch/arm/cpu/arm720t/start.S |1 + > arch/arm/cpu/arm920t/start.S |1 + > arch/arm/cpu/arm925t/start.S |1 + > arch/arm/cpu/arm926ejs/start.S |1 + > arch/arm/cpu/arm946es/start.S |1 + > arch/arm/cpu/arm_intcm/start.S |1 + > arch/arm/cpu/ixp/start.S |1 + > arch/arm/cpu/lh7a40x/start.S |1 + > arch/arm/cpu/pxa/start.S |1 + > arch/arm/cpu/s3c44b0/start.S |1 + > arch/arm/cpu/sa1100/start.S|1 + > 13 files changed, 13 insertions(+), 0 deletions(-) > > diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S > index 2483c63..3752af9 100644 > --- a/arch/arm/cpu/arm1136/start.S > +++ b/arch/arm/cpu/arm1136/start.S > @@ -190,6 +190,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S > index d613641..667a0e0 100644 > --- a/arch/arm/cpu/arm1176/start.S > +++ b/arch/arm/cpu/arm1176/start.S > @@ -252,6 +252,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S > index 3b97e80..913065b 100644 > --- a/arch/arm/cpu/arm720t/start.S > +++ b/arch/arm/cpu/arm720t/start.S > @@ -167,6 +167,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S > index 9b8604e..14c9156 100644 > --- a/arch/arm/cpu/arm920t/start.S > +++ b/arch/arm/cpu/arm920t/start.S > @@ -210,6 +210,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S > index 1a54416..3a483f6 100644 > --- a/arch/arm/cpu/arm925t/start.S > +++ b/arch/arm/cpu/arm925t/start.S > @@ -204,6 +204,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S > index 6f05f1a..1b530dc 100644 > --- a/arch/arm/cpu/arm926ejs/start.S > +++ b/arch/arm/cpu/arm926ejs/start.S > @@ -235,6 +235,7 @@ stack_setup: > adr r0, _start > sub r9, r6, r0 /* r9 <- relocation offset */ > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S > index b4d1d2d..30e2183 100644 > --- a/arch/arm/cpu/arm946es/start.S > +++ b/arch/arm/cpu/arm946es/start.S > @@ -175,6 +175,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6
Re: [U-Boot] [PATCH v9 07/15] ARM: Fix arm720t SPL build
On 08/18/2012 05:17 AM, Allen Martin wrote: > On Thu, Aug 16, 2012 at 04:03:15PM -0700, Zhong Hongbo wrote: >> On 08/17/2012 05:04 AM, Allen Martin wrote: >>> @@ -167,6 +177,7 @@ stack_setup: >>> >>> adr r0, _start >>> cmp r0, r6 >>> + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ >> Hi Allen, >> >> I have already do a patch to fix all the arm common issue: >> >> http://patchwork.ozlabs.org/patch/174471/ >> [V2] arm: Fixed the offset for the no relocation. >> Hi Allen > > Thanks for pointing that out, what's the status of that patch? At first, I fix the issue in arm1176 and send it in my s3c64xx patch thread, But Albert suggest me to correct all the arm platform. > Is it being reviewed for u-boot/master? Up to now, I have not o receive any response from the patch. > My patch is being carried in the u-boot-tegra/master tree and Tom is about to > issue a pull request for > u-boot-arm. If your patch is going up first I can rebase mine on top > of that. Ok, Thanks, hongbo > > -Allen > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9 07/15] ARM: Fix arm720t SPL build
On 08/17/2012 05:04 AM, Allen Martin wrote: > Take a few SPL fixes from armv7 and apply them to arm720t: > -Use dummy exception handlers for SPL build > -Initialize relocation register r9 to 0 for the case of no relocation > -ifdef out interrupt handler code > > Signed-off-by: Allen Martin > Acked-by: Stephen Warren > Tested-by: Thierry Reding > Signed-off-by: Tom Warren > --- > arch/arm/cpu/arm720t/start.S | 13 + > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S > index 3b97e80..dc047b8 100644 > --- a/arch/arm/cpu/arm720t/start.S > +++ b/arch/arm/cpu/arm720t/start.S > @@ -51,6 +51,15 @@ _start: b reset > ldr pc, _irq > ldr pc, _fiq > > +#ifdef CONFIG_SPL_BUILD > +_undefined_instruction: .word _undefined_instruction > +_software_interrupt: .word _software_interrupt > +_prefetch_abort: .word _prefetch_abort > +_data_abort: .word _data_abort > +_not_used: .word _not_used > +_irq:.word _irq > +_fiq:.word _fiq > +#else > _undefined_instruction: .word undefined_instruction > _software_interrupt: .word software_interrupt > _prefetch_abort: .word prefetch_abort > @@ -58,6 +67,7 @@ _data_abort:.word data_abort > _not_used: .word not_used > _irq:.word irq > _fiq:.word fiq > +#endif /* CONFIG_SPL_BUILD */ > > .balignl 16,0xdeadbeef > > @@ -167,6 +177,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ Hi Allen, I have already do a patch to fix all the arm common issue: http://patchwork.ozlabs.org/patch/174471/ [V2] arm: Fixed the offset for the no relocation. Thanks, hongbo > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > @@ -427,6 +438,7 @@ lock_loop: > mov pc, lr > > > +#ifndef CONFIG_SPL_BUILD > /* > * > * > @@ -589,6 +601,7 @@ fiq: > bl do_fiq > > #endif > +#endif /* CONFIG_SPL_BUILD */ > > #if defined(CONFIG_NETARM) > .align 5 > f ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V2] disk/partition: Fix the depend for all the partitions file
From: Zhong Hongbo
all the patitions should depend CONFIG_PARTITIONS, no the
CONFIG_CMD_$(device). The device symbol may be SATA, SCSI,
USB, MMC, SYSTEMACE. Or else when the filesystem command be
enabled, But board's configure file can not include any
CONFIG_CMD_$(device), The u-boot will fail build. For example:
CONFIG_CMD_EXT2 is defined in smdk6400.h, but the boards can
not define any disk device. The error information of build as
following:
common/cmd_ext2.c:191: undefined reference to `get_partition_info'
fs/ext2/libext2fs.o: In function `ext2fs_set_blk_dev':
fs/ext2/dev.c:44: undefined reference to `get_partition_info'
Signed-off-by: Zhong Hongbo
---
Change for V2:
- Add Signed-off-by.
---
disk/part.c | 21 +++--
disk/part_amiga.c |6 +-
disk/part_dos.c |7 +--
disk/part_efi.c |7 +--
disk/part_iso.c |7 +--
disk/part_mac.c |7 +--
6 files changed, 8 insertions(+), 47 deletions(-)
diff --git a/disk/part.c b/disk/part.c
index 76f3939..d296a55 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -34,12 +34,7 @@
#define PRINTF(fmt,args...)
#endif
-#if (defined(CONFIG_CMD_IDE) || \
- defined(CONFIG_CMD_SATA) || \
- defined(CONFIG_CMD_SCSI) || \
- defined(CONFIG_CMD_USB) || \
- defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
+#ifdef CONFIG_PARTITIONS
struct block_drvr {
char *name;
@@ -103,12 +98,7 @@ block_dev_desc_t *get_dev(char* ifname, int dev)
}
#endif
-#if (defined(CONFIG_CMD_IDE) || \
- defined(CONFIG_CMD_SATA) || \
- defined(CONFIG_CMD_SCSI) || \
- defined(CONFIG_CMD_USB) || \
- defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
+#ifdef CONFIG_PARTITIONS
/* - */
/*
@@ -238,12 +228,7 @@ void dev_print (block_dev_desc_t *dev_desc)
}
#endif
-#if (defined(CONFIG_CMD_IDE) || \
- defined(CONFIG_CMD_SATA) || \
- defined(CONFIG_CMD_SCSI) || \
- defined(CONFIG_CMD_USB) || \
- defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
+#ifdef CONFIG_PARTITIONS
#if defined(CONFIG_MAC_PARTITION) || \
defined(CONFIG_DOS_PARTITION) || \
diff --git a/disk/part_amiga.c b/disk/part_amiga.c
index dc7d462..5df55c8 100644
--- a/disk/part_amiga.c
+++ b/disk/part_amiga.c
@@ -26,11 +26,7 @@
#include
#include "part_amiga.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
#undef AMIGA_DEBUG
diff --git a/disk/part_dos.c b/disk/part_dos.c
index a43dd9c..b49ebe2 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -35,12 +35,7 @@
#include
#include "part_dos.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* Convert char[4] in little endian format to the host format integer
*/
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 02927a0..22dc0ea 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -37,12 +37,7 @@
#include "part_efi.h"
#include
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* Convert char[2] in little endian format to the host format integer
*/
diff --git a/disk/part_iso.c b/disk/part_iso.c
index 4401790..f929563 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -25,12 +25,7 @@
#include
#include "part_iso.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* #define ISO_PART_DEBUG */
diff --git a/disk/part_mac.c b/disk/part_mac.c
index c1afc8c..c3b2aa3 100644
--- a/disk/part_mac.c
+++ b/disk/part_mac.c
@@ -34,12 +34,7 @@
#include
#include "part_mac.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* stdlib.h causes some compatibility problems; should fixe these! -- wd */
#ifndef __ldiv_t_defined
--
1.7.5.4
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[U-Boot] [PATCH 13/14] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V4: - None. Change for V3: - Replace ELFIN with S3C64XX for all the variable of cpu.h - Change __S3C6400_H__ into __CPU__H__ Change for V2: - New. --- arch/arm/cpu/arm1176/s3c64xx/pwm.c |2 +- arch/arm/cpu/arm1176/s3c64xx/reset.c|2 +- arch/arm/cpu/arm1176/s3c64xx/speed.c|2 +- arch/arm/cpu/arm1176/s3c64xx/srom.c |2 +- arch/arm/cpu/arm1176/s3c64xx/timer.c|2 +- arch/arm/include/asm/arch-s3c64xx/cpu.h | 89 +++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 89 --- board/samsung/smdk6400/dmc_init.c |2 +- board/samsung/smdk6400/lowlevel_init.S | 26 board/samsung/smdk6400/smdk6400.c |2 +- drivers/mtd/nand/s3c64xx.c |2 +- drivers/serial/s3c64xx.c|2 +- drivers/usb/host/s3c64xx-hcd.c |2 +- 13 files changed, 112 insertions(+), 112 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c b/arch/arm/cpu/arm1176/s3c64xx/pwm.c index fff2c68..534901a 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c @@ -27,7 +27,7 @@ #include #include #include -#include +#include #include int pwm_enable(int pwm_id) diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.c b/arch/arm/cpu/arm1176/s3c64xx/reset.c index 773cffa..03cb306 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/reset.c +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include void reset_cpu(ulong addr) diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c index 05b44b9..5e68090 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/speed.c +++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c @@ -32,7 +32,7 @@ #include #include -#include +#include #include #define APLL 0 diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c b/arch/arm/cpu/arm1176/s3c64xx/srom.c index f1b2b34..92fb7af 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/srom.c +++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include /* * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the * band width control and bank control registers diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c index 47d7731..eebd0c0 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h b/arch/arm/include/asm/arch-s3c64xx/cpu.h new file mode 100644 index 000..90c5328 --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h @@ -0,0 +1,89 @@ +/* + * (C) Copyright 2007 + * Byungjae Lee, Samsung Erectronics, bj...@samsung.com. + * - only support for S3C6400 + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/ + * NAME: cpu.h + * + * Based on S3C6400 User's manual Rev 0.0 + / + +#ifndef __CPU_H__ +#define __CPU_H__ + +#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400) +#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration! +#endif + +#define S3C64XX_UART_CHANNELS 3 +#define S3C64XX_SPI_CHANNELS 2 + +#include + +#define S3C64XX_CLOCK_POWER_BASE 0x7e00f000 +#define S3C64XX_GPIO_BASE 0x7f008000 +#define S3C64XX_MEM_SYS_CFG0x7e00f120 +#define S3C64XX_SROM_BASE 0x7000 +#define S3C64XX_DMC0_BASE 0x7e00 +#define S3C64XX_DMC1_BASE 0x7e001000 +#define S3C64XX_NAND_BASE 0x7020 +#define S3C64XX_VIC0_BASE 0x7120 +#define S3C64XX_VIC1_BASE 0x7130 +#define S3C64XX_WATCHDOG_BASE 0x7E004000 +#define S3C64XX_UART_BASE
[U-Boot] [PATCH 14/14] S3C6400: Remove the unused variable for S3C6400
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V4: - None. Change for V3: - None. Change for V2: - None. --- include/configs/smdk6400.h | 15 --- 1 files changed, 0 insertions(+), 15 deletions(-) diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index b770463..e005be1 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -108,9 +108,6 @@ #define CONFIG_CMD_LOADB #define CONFIG_CMD_SAVEENV #define CONFIG_CMD_NAND -#if defined(CONFIG_BOOT_ONENAND) -#define CONFIG_CMD_ONENAND -#endif #define CONFIG_CMD_PING #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT @@ -266,13 +263,6 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63} -/* None of these are currently implemented. Left from the original Samsung - * version for reference -#define CONFIG_BOOT_NOR -#define CONFIG_BOOT_MOVINAND -#define CONFIG_BOOT_ONENAND -*/ - #define CONFIG_SPL #define CONFIG_SPL_NAND #define CONFIG_SPL_NAND_SIMPLE @@ -283,11 +273,6 @@ #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_NAND_S3C64XX -/* Unimplemented or unsupported. See comment above. -#define CONFIG_ONENAND -#define CONFIG_MOVINAND -*/ - /* Settings as above boot configuration */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_BOOTARGS"console=ttySAC,115200" -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 12/14] S3C6400: clear memory init variable
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V4:
- None.
Change for V3:
- Replace the magic numbers with variable name.
- Use C language to implement memory initialization.
Change for V2:
- None.
---
arch/arm/include/asm/arch-s3c64xx/dmc.h | 62 +
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 178 +--
board/samsung/smdk6400/Makefile |3 +-
board/samsung/smdk6400/dmc_init.c | 110 +
board/samsung/smdk6400/lowlevel_init.S |2 +-
board/samsung/smdk6400/mem_init.S | 135
board/samsung/smdk6400/setup.h | 85 +
7 files changed, 265 insertions(+), 310 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/dmc.h
create mode 100644 board/samsung/smdk6400/dmc_init.c
delete mode 100644 board/samsung/smdk6400/mem_init.S
diff --git a/arch/arm/include/asm/arch-s3c64xx/dmc.h
b/arch/arm/include/asm/arch-s3c64xx/dmc.h
new file mode 100644
index 000..758e750
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/dmc.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2012
+ * Zhong Hongbo
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#ifndef __ASM_ARCH_DMC_H__
+#define __ASM_ARCH_DMC_H__
+
+#ifndef __ASSEMBLY__
+
+struct s3c64xx_dmc {
+ unsigned intmemstat;
+ unsigned intmemcmd;
+ unsigned intdirectcmd;
+ unsigned intmemcfg;
+ unsigned intrefresh;
+ unsigned intcaslat;
+ unsigned intt_dqss;
+ unsigned intt_mrd;
+ unsigned intt_ras;
+ unsigned intt_rc;
+ unsigned intt_rcd;
+ unsigned intt_rfc;
+ unsigned intt_rp;
+ unsigned intt_rrd;
+ unsigned intt_wr;
+ unsigned intt_wtr;
+ unsigned intt_xp;
+ unsigned intt_xsr;
+ unsigned intt_esr;
+ unsigned intmemcfg2;
+#if defined(CONFIG_S3C6410)
+ unsigned intmemcfg3;
+ unsigned char res1[0xac];
+#else
+ unsigned char res1[0xb0];
+#endif
+ unsigned intid_0_cfg[16];
+ unsigned char res2[0xc0];
+ unsigned intchip_0_cfg;
+ unsigned intchip_1_cfg;
+ unsigned char res3[0xf8];
+ unsigned intuser_status;
+ unsigned intuser_config;
+};
+#endif
+#endif
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 1da327a..45a8918 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -41,191 +41,18 @@
#include
#define ELFIN_CLOCK_POWER_BASE 0x7e00f000
-
-/*
- * GPIO
- */
#define ELFIN_GPIO_BASE0x7f008000
-
-/*
- * Bus Matrix
- */
#define ELFIN_MEM_SYS_CFG 0x7e00f120
-
-#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12)
-
-#define S3C64XX_MEM_SYS_CFG_NAND 0x0008
-
-/*
- * Memory controller
- */
#define ELFIN_SROM_BASE0x7000
-
-/*
- * SDRAM Controller
- */
#define ELFIN_DMC0_BASE0x7e00
#define ELFIN_DMC1_BASE0x7e001000
-
-#define INDEX_DMC_MEMC_STATUS 0x00
-#define INDEX_DMC_MEMC_CMD 0x04
-#define INDEX_DMC_DIRECT_CMD 0x08
-#define INDEX_DMC_MEMORY_CFG 0x0C
-#define INDEX_DMC_REFRESH_PRD 0x10
-#define INDEX_DMC_CAS_LATENCY 0x14
-#define INDEX_DMC_T_DQSS 0x18
-#define INDEX_DMC_T_MRD0x1C
-#define INDEX_DMC_T_RAS0x20
-#define INDEX_DMC_T_RC 0x24
-#define INDEX_DMC_T_RCD0x28
-#define INDEX_DMC_T_RFC0x2C
-#define INDEX_DMC_T_RP 0x30
-#define INDEX_DMC_T_RRD0x34
-#define INDEX_DMC_T_WR 0x38
-#define INDEX_DMC_T_WTR0x3C
-#define INDEX_DMC_T_XP 0x40
-#define INDEX_DMC_T_XSR0x44
-#define INDEX_DMC_T_ESR0x48
-#define INDEX_DMC_MEMORY_CFG2 0x4C
-#define INDEX_DMC_CHIP_0_CFG 0x200
-#define INDEX_DMC_CHIP_1_CFG 0x204
-#define INDEX_DMC_CHIP_2_CFG 0x208
-#define INDEX_DMC_CHIP_3_CFG 0x20C
-#define INDEX_DMC_USER_STATUS 0x300
-#define INDEX_DMC_USER_CONFIG 0x304
-
-/*
- * Memory Chip direct command
- */
-#define DMC_NOP0 0x0c
-#define DM
[U-Boot] [PATCH 11/14] S3c64xx: clear GPIO, Interrupt, Watchdog variable.
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V4: - None. Change for V3: - Replace the magic numbers with the variable name. Change for V2: - None. --- arch/arm/include/asm/arch-s3c64xx/gpio.h | 38 arch/arm/include/asm/arch-s3c64xx/interrupt.h | 31 +++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 258 - board/samsung/smdk6400/lowlevel_init.S| 16 +- board/samsung/smdk6400/setup.h| 11 +- 5 files changed, 86 insertions(+), 268 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/gpio.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/interrupt.h diff --git a/arch/arm/include/asm/arch-s3c64xx/gpio.h b/arch/arm/include/asm/arch-s3c64xx/gpio.h new file mode 100644 index 000..979173c --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/gpio.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2012 + * Zhong Hongbo + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_GPIO_H_ +#define __ASM_ARM_ARCH_GPIO_H_ + +#define GPACON_OFFSET 0x00 +#define GPADAT_OFFSET 0x04 +#define GPAPUD_OFFSET 0x08 + +#define GPNCON_OFFSET 0x830 +#define GPNDAT_OFFSET 0x834 +#define GPNPUD_OFFSET 0x838 + +#define GPKCON0_OFFSET 0x800 +#define GPKCON1_OFFSET 0x804 +#define GPKDAT_OFFSET 0x808 +#define GPKPUD_OFFSET 0x80C + +#endif diff --git a/arch/arm/include/asm/arch-s3c64xx/interrupt.h b/arch/arm/include/asm/arch-s3c64xx/interrupt.h new file mode 100644 index 000..49e3ae4 --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/interrupt.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2012 + * Zhong Hongbo + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_INTERRUPT_H_ +#define __ASM_ARM_ARCH_INTERRUPT_H_ + +#define INTMOD 0x0C/* VIC INT SELECT (IRQ or FIQ) */ +#define INTUNMSK 0x10/* VIC INT EN (write 1 to unmask) */ +#define INTMSK 0x14/* VIC INT EN CLEAR (write 1 to mask) */ +#define INTSUBMSK 0x1C/* VIC SOFT INT CLEAR */ +#define VECTADDR 0xF00 /* VIC ADDRESS */ +#define EINTPEND_OFFSET0x924 +#endif diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h index b1537c1..1da327a 100644 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h @@ -47,172 +47,6 @@ */ #define ELFIN_GPIO_BASE0x7f008000 -#define GPACON_OFFSET 0x00 -#define GPADAT_OFFSET 0x04 -#define GPAPUD_OFFSET 0x08 -#define GPACONSLP_OFFSET 0x0C -#define GPAPUDSLP_OFFSET 0x10 -#define GPBCON_OFFSET 0x20 -#define GPBDAT_OFFSET 0x24 -#define GPBPUD_OFFSET 0x28 -#define GPBCONSLP_OFFSET 0x2C -#define GPBPUDSLP_OFFSET 0x30 -#define GPCCON_OFFSET 0x40 -#define GPCDAT_OFFSET 0x44 -#define GPCPUD_OFFSET 0x48 -#define GPCCONSLP_OFFSET 0x4C -#define GPCPUDSLP_OFFSET 0x50 -#define GPDCON_OFFSET 0x60 -#define GPDDAT_OFFSET 0x64 -#define GPDPUD_OFFSET 0x68 -#define GPDCONSLP_OFFSET 0x6C -#define GPDPUDSLP_OFFSET 0x70 -#define GPECON_OFFSET 0x80 -#define GPEDAT_OFFSET 0x84 -#define GPEPUD_OFFSET 0x88 -#define GPECONSLP_OFFSET 0x8C -#define GPEPUDSLP_OFFSET 0x90 -#define GPFCON_OFFSET 0xA0 -#define GPFDAT_OFFSET 0xA4 -#define GPFPUD_OFFSET 0xA8 -#define GPFCONSLP_OFFSET 0xAC
[U-Boot] [PATCH 10/14] S3C64XX: Switch to use read/writel to operation clock system
From: Zhong Hongbo
Switch to use read/writel function and clear the relevant variable.
Signed-off-by: Zhong Hongbo
---
Change for V4:
- None.
Change for V3:
- Use C language to re-write reset function.
- Replace the magic numbers witch variale name.
Change for V2:
- merge clock patch.
- Change the type of return for s3c64xx_get_base_clock function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |6 +-
arch/arm/cpu/arm1176/s3c64xx/reset.S| 34
arch/arm/cpu/arm1176/s3c64xx/reset.c| 39 +
arch/arm/cpu/arm1176/s3c64xx/speed.c| 50 +--
arch/arm/include/asm/arch-s3c64xx/clock.h | 163
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 219 +--
board/samsung/smdk6400/lowlevel_init.S |3 +
board/samsung/smdk6400/setup.h | 47 ++
drivers/usb/host/s3c64xx-hcd.c | 30 -
9 files changed, 321 insertions(+), 270 deletions(-)
delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.S
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h
create mode 100644 board/samsung/smdk6400/setup.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 28786bf..16be887 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -28,13 +28,11 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-SOBJS = reset.o
-
-COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o
+COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o reset.o
COBJS-y+= timer.o
COBJS-$(CONFIG_PWM) += pwm.o
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+OBJS := $(addprefix $(obj), $(COBJS-y))
all: $(obj).depend $(START) $(LIB)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S
b/arch/arm/cpu/arm1176/s3c64xx/reset.S
deleted file mode 100644
index eae572e..000
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2009 Samsung Electronics.
- * Minkyu Kang
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include
-
-.globl reset_cpu
-reset_cpu:
- ldr r1, =ELFIN_CLOCK_POWER_BASE
- ldr r2, [r1, #SYS_ID_OFFSET]
- ldr r3, =0x
- and r2, r3, r2, lsr #12
- str r2, [r1, #SW_RST_OFFSET]
-_loop_forever:
- b _loop_forever
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.c
b/arch/arm/cpu/arm1176/s3c64xx/reset.c
new file mode 100644
index 000..773cffa
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2012
+ * Zhong Hongbo
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+
+void reset_cpu(ulong addr)
+{
+ unsigned long sys_id;
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
+
+ sys_id = readl(&clk->sys_id);
+ sys_id >>= 12;
+ sys_id &= 0x;
+ writel(sys_id, &clk->sw_rst);
+}
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c
b/arch/arm/cpu/arm1176/s3c64xx/speed.c
index 11962ac..05b44b9 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
@@ -31,12 +31,13 @@
*/
#include
+#include
#include
+#include
#define APLL 0
#defin
[U-Boot] [PATCH 08/14] S3C6400: Delete nand_spl for S3C6400
From: Zhong Hongbo
The old spl use nand_spl directory file to support
nand flash boot. We will adopt the new SPL framework
to implement it.
Signed-off-by: Zhong Hongbo
---
Change for V4:
- Adjust the patch's order.
Change for V3:
- Delete u-boot-nand.lds.
Change for V2:
- None.
---
board/samsung/smdk6400/config.mk | 28 ---
board/samsung/smdk6400/u-boot-nand.lds | 84
boards.cfg |4 +-
include/configs/smdk6400.h |2 +-
nand_spl/board/samsung/smdk6400/Makefile | 117
nand_spl/board/samsung/smdk6400/config.mk | 40 --
nand_spl/board/samsung/smdk6400/u-boot.lds | 78 --
7 files changed, 3 insertions(+), 350 deletions(-)
delete mode 100644 board/samsung/smdk6400/config.mk
delete mode 100644 board/samsung/smdk6400/u-boot-nand.lds
delete mode 100644 nand_spl/board/samsung/smdk6400/Makefile
delete mode 100644 nand_spl/board/samsung/smdk6400/config.mk
delete mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds
diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk
deleted file mode 100644
index 93a1a0d..000
--- a/board/samsung/smdk6400/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering,
-# David Mueller, ELSOFT AG,
-#
-# (C) Copyright 2008
-# Guennadi Liakhovetki, DENX Software Engineering,
-#
-# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu
-#
-# see http://www.samsung.com/ for more information on SAMSUNG
-
-# On SMDK6400 we use the 64 MB SDRAM bank at
-#
-# 0x5000 to 0x5800
-#
-# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000
-#
-# we load ourselves to 0x57e0 without MMU
-# with MMU, load address is changed to 0xc7e0
-#
-# download area is 0x5000c000
-
-ifndef CONFIG_NAND_SPL
-CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT)
-else
-CONFIG_SYS_TEXT_BASE = 0
-endif
diff --git a/board/samsung/smdk6400/u-boot-nand.lds
b/board/samsung/smdk6400/u-boot-nand.lds
deleted file mode 100644
index f162815..000
--- a/board/samsung/smdk6400/u-boot-nand.lds
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering,
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering,
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x;
-
- . = ALIGN(4);
- .text :
- {
- arch/arm/cpu/arm1176/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- .mmudata : { *(.mmudata) }
-
- . = ALIGN(4);
-
- .rel.dyn : {
- __rel_dyn_start = .;
- *(.rel*)
- __rel_dyn_end = .;
- }
-
- .dynsym : {
- __dynsym_start = .;
- *(.dynsym)
- }
-
- _end = .;
-
- .bss __rel_dyn_start (OVERLAY) : {
- __bss_start = .;
- *(.bss)
- . = ALIGN(4);
- __bss_end__ = .;
- }
-
- /DISCARD/ : { *(.dynstr*) }
- /DISCARD/ : { *(.dynamic*) }
- /DISCARD/ : { *(.plt*) }
- /DISCARD/ : { *(.interp*) }
- /DISCARD/ : { *(.gnu*) }
-}
diff --git a/boards.cfg b/boards.cfg
index 0363b41..491459a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -47,8 +47,8 @@ flea3arm arm1136 -
CarMedi
mx35pdk arm arm1136 -
freescale mx35
apollon arm arm1136 apollon
- omap24xx
omap2420h4 arm arm1136 - ti
omap24x
[U-Boot] [PATCH 09/14] S3C64XX: Change SROM init to use read/write operation
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V4:
- None.
Change for V3:
- None.
Change for V2:
- Change the type of return for s3c64xx_get_base_sromc function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +-
arch/arm/cpu/arm1176/s3c64xx/srom.c | 51 +++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 13 +++
arch/arm/include/asm/arch-s3c64xx/sromc.h | 49 +
board/samsung/smdk6400/smdk6400.c | 38 ++--
include/configs/smdk6400.h |1 +
6 files changed, 134 insertions(+), 20 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/srom.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/sromc.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 2f37431..28786bf 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o
SOBJS = reset.o
-COBJS-$(CONFIG_S3C64XX)+= speed.o
+COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o
COBJS-y+= timer.o
COBJS-$(CONFIG_PWM) += pwm.o
diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c
b/arch/arm/cpu/arm1176/s3c64xx/srom.c
new file mode 100644
index 000..f1b2b34
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2012
+ * Zhong Hongbo
+ * base on arch/arm/cpu/armv7/s5p-common/sromc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+/*
+ * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM
+ * srom_bw_conf - SMC Band witdh reg configuration value
+ * srom_bc_conf - SMC Bank Control reg configuration value
+ */
+void s3c64xx_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
+{
+ u32 tmp;
+ struct s3c64xx_sromc *srom =
+ (struct s3c64xx_sromc *)s3c64xx_get_base_sromc();
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= srom_bw_conf;
+
+ writel(tmp, &srom->bw);
+
+ /* Configure SMC_BC register */
+ writel(srom_bc_conf, &srom->bc[srom_bank]);
+}
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index b884763..d2ee9d2 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -471,14 +471,6 @@
*/
#define ELFIN_SROM_BASE0x7000
-#define SROM_BW_REG__REG(ELFIN_SROM_BASE + 0x0)
-#define SROM_BC0_REG __REG(ELFIN_SROM_BASE + 0x4)
-#define SROM_BC1_REG __REG(ELFIN_SROM_BASE + 0x8)
-#define SROM_BC2_REG __REG(ELFIN_SROM_BASE + 0xC)
-#define SROM_BC3_REG __REG(ELFIN_SROM_BASE + 0x10)
-#define SROM_BC4_REG __REG(ELFIN_SROM_BASE + 0x14)
-#define SROM_BC5_REG __REG(ELFIN_SROM_BASE + 0x18)
-
/*
* SDRAM Controller
*/
@@ -722,6 +714,11 @@ static inline unsigned long s3c64xx_get_base_timer(void)
{
return ELFIN_TIMER_BASE;
}
+
+static inline unsigned long s3c64xx_get_base_sromc(void)
+{
+ return ELFIN_SROM_BASE;
+}
#endif
#endif /*__S3C6400_H__*/
diff --git a/arch/arm/include/asm/arch-s3c64xx/sromc.h
b/arch/arm/include/asm/arch-s3c64xx/sromc.h
new file mode 100644
index 000..fcad635
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/sromc.h
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * base on arch/arm/include/asm/arch-s5pc1xx/sromc.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You
[U-Boot] [PATCH 07/14] S3C6400: Adopt SPL framwork to support spl for nand flash
From: Zhong Hongbo Adopt the new SPL framework to implement the SPL booting of the nand flash for S3C6400. Signed-off-by: Zhong Hongbo --- Change for V4: - Adjust the patch's order. Change for V3: - None. Change for V2: - seprate some code. --- arch/arm/cpu/arm1176/start.S| 16 +--- board/samsung/smdk6400/Makefile | 29 +- board/samsung/smdk6400/lowlevel_init.S | 22 ++-- board/samsung/smdk6400/smdk6400_nand_spl.c | 61 ++-- board/samsung/smdk6400/tools/mksmdk6400_image.c | 117 +++ drivers/mtd/nand/s3c64xx.c |4 +- include/configs/smdk6400.h | 21 +++-- 7 files changed, 221 insertions(+), 49 deletions(-) create mode 100644 board/samsung/smdk6400/tools/mksmdk6400_image.c diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index d613641..761b7fe 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -51,7 +51,7 @@ .globl _start _start: b reset -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -164,7 +164,7 @@ cpu_init_crit: * When booting from NAND - it has definitely been a reset, so, no need * to flush caches and disable the MMU */ -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * flush v4 I/D caches */ @@ -357,21 +357,14 @@ clbss_l:cmp r0, r1 /* clear loop... */ add r0, r0, #4 b clbss_l clbss_e: -#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on #endif -#endif /* * We are done. Do not return, instead branch to second part of board * initialization, now running from RAM. */ -#ifdef CONFIG_NAND_SPL - ldr pc, _nand_boot - -_nand_boot: .word nand_boot -#else ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 @@ -384,7 +377,6 @@ _nand_boot: .word nand_boot _board_init_r_ofs: .word board_init_r - _start -#endif _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -398,7 +390,7 @@ _mmu_table_base: .word mmu_table #endif -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * we assume that cache operation is done before. (eg. cleanup_before_linux()) * actually, we don't need to do anything about cache if not use d-cache in @@ -576,4 +568,4 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile index 645c8e2..f7fa667 100644 --- a/board/samsung/smdk6400/Makefile +++ b/board/samsung/smdk6400/Makefile @@ -28,15 +28,34 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(BOARD).o +ifndef CONFIG_SPL_BUILD COBJS-y:= smdk6400.o +endif + SOBJS := lowlevel_init.o mem_init.o -SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) -SOBJS := $(addprefix $(obj),$(SOBJS)) +ifdef CONFIG_SPL_BUILD +COBJS-y += smdk6400_nand_spl.o +endif + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) + +ALL:= $(obj).depend $(LIB) + +ifdef CONFIG_SPL_BUILD +ALL+= $(OBJTREE)/tools/mk$(BOARD)spl +endif + +all: $(ALL) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) -$(LIB):$(obj).depend $(SOBJS) $(OBJS) - $(call cmd_link_o_target, $(SOBJS) $(OBJS)) +ifdef CONFIG_SPL_BUILD +$(OBJTREE)/tools/mk$(BOARD)spl:tools/mksmdk6400_image.c + $(HOSTCC) tools/mksmdk6400_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl +endif # diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 45887f3..93172e7 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -84,18 +84,12 @@ lowlevel_init: str r3, [r0, #oVECTADDR] str r3, [r1, #oVECTADDR] +#ifdef CONFIG_SPL_BUILD /* init system clock */ - bl system_clock_init + bl system_clock_init -#ifndef CONFIG_NAND_SPL - /* for UART */ - bl uart_asm_init -#endif - -#ifdef CONFIG_BOOT_NAND /* simple init for NAND */ - bl nand_asm_init -#endif + bl nand_asm_init /* Memory subsystem address 0x7e00f120 */ ldr r0, =ELFIN_MEM_SYS_CFG @@ -105,6 +99,12 @@ lowlevel_init: str r1, [r0] bl mem_ctrl_asm_init +#endif + +#ifndef CONFIG_SPL_BUILD + /* for UART */ + bl uart_asm_init +#endif /* Wakeup support. Don't know if it's going to be used, untested. */ ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFS
[U-Boot] [PATCH 06/14] S3C64xx: mov cpu_init.S to the board directory
From: Zhong Hongbo It just only do the memory init. The memory depend on the design of board. Signed-off-by: Zhong Hongbo --- Change for V4: - None. Change for V3: - None. Change for V2: - None. --- arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +- arch/arm/cpu/arm1176/s3c64xx/cpu_init.S | 135 --- board/samsung/smdk6400/Makefile |2 +- board/samsung/smdk6400/mem_init.S | 135 +++ 4 files changed, 137 insertions(+), 137 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S create mode 100644 board/samsung/smdk6400/mem_init.S diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile index 93f..2f37431 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile @@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o SOBJS = reset.o -COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o +COBJS-$(CONFIG_S3C64XX)+= speed.o COBJS-y+= timer.o COBJS-$(CONFIG_PWM) += pwm.o diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S deleted file mode 100644 index df88cba..000 --- a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400 - * - * Copyright (C) 2008 - * Guennadi Liakhovetki, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - - .globl mem_ctrl_asm_init -mem_ctrl_asm_init: - /* DMC1 base address 0x7e001000 */ - ldr r0, =ELFIN_DMC1_BASE - - ldr r1, =0x4 - str r1, [r0, #INDEX_DMC_MEMC_CMD] - - ldr r1, =DMC_DDR_REFRESH_PRD - str r1, [r0, #INDEX_DMC_REFRESH_PRD] - - ldr r1, =DMC_DDR_CAS_LATENCY - str r1, [r0, #INDEX_DMC_CAS_LATENCY] - - ldr r1, =DMC_DDR_t_DQSS - str r1, [r0, #INDEX_DMC_T_DQSS] - - ldr r1, =DMC_DDR_t_MRD - str r1, [r0, #INDEX_DMC_T_MRD] - - ldr r1, =DMC_DDR_t_RAS - str r1, [r0, #INDEX_DMC_T_RAS] - - ldr r1, =DMC_DDR_t_RC - str r1, [r0, #INDEX_DMC_T_RC] - - ldr r1, =DMC_DDR_t_RCD - ldr r2, =DMC_DDR_schedule_RCD - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RCD] - - ldr r1, =DMC_DDR_t_RFC - ldr r2, =DMC_DDR_schedule_RFC - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RFC] - - ldr r1, =DMC_DDR_t_RP - ldr r2, =DMC_DDR_schedule_RP - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RP] - - ldr r1, =DMC_DDR_t_RRD - str r1, [r0, #INDEX_DMC_T_RRD] - - ldr r1, =DMC_DDR_t_WR - str r1, [r0, #INDEX_DMC_T_WR] - - ldr r1, =DMC_DDR_t_WTR - str r1, [r0, #INDEX_DMC_T_WTR] - - ldr r1, =DMC_DDR_t_XP - str r1, [r0, #INDEX_DMC_T_XP] - - ldr r1, =DMC_DDR_t_XSR - str r1, [r0, #INDEX_DMC_T_XSR] - - ldr r1, =DMC_DDR_t_ESR - str r1, [r0, #INDEX_DMC_T_ESR] - - ldr r1, =DMC1_MEM_CFG - str r1, [r0, #INDEX_DMC_MEMORY_CFG] - - ldr r1, =DMC1_MEM_CFG2 - str r1, [r0, #INDEX_DMC_MEMORY_CFG2] - - ldr r1, =DMC1_CHIP0_CFG - str r1, [r0, #INDEX_DMC_CHIP_0_CFG] - - ldr r1, =DMC_DDR_32_CFG - str r1, [r0, #INDEX_DMC_USER_CONFIG] - - /* DMC0 DDR Chip 0 configuration direct command reg */ - ldr r1, =DMC_NOP0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Precharge All */ - ldr r1, =DMC_PA0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Auto Refresh 2 time */ - ldr r1, =DMC_AR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* MRS */ - ldr r1, =DMC_mDDR_EMR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Mode Reg */ - ldr r1, =DMC_mDDR_MR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Enable DMC1 */ - mov r1, #0x0 - str r1
[U-Boot] [PATCH 05/14] S3C64XX: reference s5p cpu time system for s3c64xx timer
From: Zhong Hongbo
The old s3c64xx timer is not work normal, Adopt s5p time design,
It work perfect.
Signed-off-by: Zhong Hongbo
---
Change for V4:
- None.
Change for V3:
- None.
Change for V2:
- Delete const key word for the variable of struct s3c_timer
---
arch/arm/cpu/arm1176/s3c64xx/timer.c | 193 --
1 files changed, 93 insertions(+), 100 deletions(-)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c
b/arch/arm/cpu/arm1176/s3c64xx/timer.c
index f16a37b..47d7731 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
@@ -1,23 +1,8 @@
/*
- * (C) Copyright 2003
- * Texas Instruments
+ * Copyright (C) 2012
+ * Zhong Hongbo
*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Marius Groeger
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Alex Zuepke
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering,
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd.
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering,
+ * based on arch/arm/cpu/armv7/s5p-common/timer.c
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -39,64 +24,29 @@
*/
#include
-#include
+#include
#include
-#include
-
-static ulong timer_load_val;
+#include
+#include
-#define PRESCALER 167
+DECLARE_GLOBAL_DATA_PTR;
-static s3c64xx_timers *s3c64xx_get_base_timers(void)
-{
- return (s3c64xx_timers *)ELFIN_TIMER_BASE;
-}
+static unsigned long get_current_tick(void);
/* macro to read the 16 bit timer */
-static inline ulong read_timer(void)
+static inline struct s3c_timer *s3c_get_base_timer(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- return timers->TCNTO4;
+ return (struct s3c_timer *)s3c64xx_get_base_timer();
}
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
int timer_init(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- /* use PWM Timer 4 because it has no output */
- /*
-* We use the following scheme for the timer:
-* Prescaler is hard fixed at 167, divider at 1/4.
-* This gives at PCLK frequency 66MHz approx. 10us ticks
-* The timer is set to wrap after 100s, at 66MHz this obviously
-* happens after 10,000,000 ticks. A long variable can thus
-* keep values up to 40,000s, i.e., 11 hours. This should be
-* enough for most uses:-) Possible optimizations: select a
-* binary-friendly frequency, e.g., 1ms / 128. Also calculate
-* the prescaler automatically for other PCLK frequencies.
-*/
- timers->TCFG0 = PRESCALER << 8;
- if (timer_load_val == 0) {
- timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
- timers->TCFG1 = (timers->TCFG1 & ~0xf) | 0x2;
- }
-
- /* load value for 10 ms timeout */
- lastdec = timers->TCNTB4 = timer_load_val;
- /* auto load, manual update of Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO |
- TCON_4_UPDATE;
+ /* PWM Timer 4 */
+ pwm_init(4, MUX_DIV_2, 0);
+ pwm_config(4, 0, 0);
+ pwm_enable(4);
- /* auto load, start Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO | COUNT_4_ON;
- timestamp = 0;
+ reset_timer_masked();
return 0;
}
@@ -104,57 +54,100 @@ int timer_init(void)
/*
* timer without interrupts
*/
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
+unsigned long get_timer(unsigned long base)
{
- ulong now = read_timer();
+ return get_timer_masked() - base;
+}
- if (lastdec >= now) {
- /* normal mode */
- timestamp += lastdec - now;
+/* delay x useconds */
+void __udelay(unsigned long usec)
+{
+ struct s3c_timer *timer = s3c_get_base_timer();
+ unsigned long tmo, tmp, count_value;
+
+ count_value = readl(&timer->tcntb4);
+
+ if (usec >= 1000) {
+ /*
+* if "big" number, spread normalization
+* to seconds
+* 1. start to normalize for usec to ticks per sec
+* 2. find number of "ticks" to wait to achieve target
+* 3. finish normalize.
+*/
+ tmo = usec / 1000;
+ tmo *= (CONFIG_SYS_HZ * count_value);
+ tmo /= 1000;
} else {
- /* we have an overflow ... */
- timestamp += lastdec + timer_load_val - now;
+ /
[U-Boot] [PATCH 04/14] S3C64XX: add pwm for s3c64xx support
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V4:
- None.
Change for V3:
- None.
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_nand function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |1 +
arch/arm/cpu/arm1176/s3c64xx/pwm.c | 188 +++
arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 56 ++---
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 59 -
include/configs/smdk6400.h |3 +
6 files changed, 271 insertions(+), 106 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm.h
delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 0785b19..93f 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -32,6 +32,7 @@ SOBJS = reset.o
COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM) += pwm.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
new file mode 100644
index 000..fff2c68
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
@@ -0,0 +1,188 @@
+/*
+ * Copyright (C) 2012
+ * Zhong Hongbo
+ *
+ * based on arch/arm/cpu/armv7/s5p-common/pwm.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int pwm_enable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon |= TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon &= ~TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_PCLK();
+
+ for (div = 2; div <= 16; div *= 2) {
+ if ((tin_parent_rate / (div << 16)) < freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long tcmp;
+
+ /*
+* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits.
+*/
+ if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns > period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+
+ /* Note, counters count down */
+ tcmp = duty_ns / tin_ns;
+ tcmp = tcnt - tcmp;
+
+ /*
+* the pwm hw only checks the compare register after a decrement,
+* so the pin never toggles if tcmp = tcnt
+*/
+ if (tcmp == tcnt)
+ tcmp--;
+
+ if (tcmp < 0)
+ tcmp = 0;
+
+ /* Update the PWM register block. */
+ offset = pwm_id * 3;
+ if (pwm_id < 4) {
+ writel(tcnt, &pwm->tc
[U-Boot] [PATCH 03/14] S3C64XX: Use readl/writel to operate uart
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V4:
- None.
Change for v3:
- None.
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_uart function.
- Delete const for the local variable.
---
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 65 +--
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 31 -
arch/arm/include/asm/arch-s3c64xx/uart.h| 54 ++
board/samsung/smdk6400/lowlevel_init.S |8 ---
drivers/serial/s3c64xx.c| 50 +
5 files changed, 87 insertions(+), 121 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/uart.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index d6c5dd9..77b9509 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -582,62 +582,6 @@
*/
#define ELFIN_UART_BASE0x7F005000
-#define ELFIN_UART0_OFFSET 0x
-#define ELFIN_UART1_OFFSET 0x0400
-#define ELFIN_UART2_OFFSET 0x0800
-
-#define ULCON_OFFSET 0x00
-#define UCON_OFFSET0x04
-#define UFCON_OFFSET 0x08
-#define UMCON_OFFSET 0x0C
-#define UTRSTAT_OFFSET 0x10
-#define UERSTAT_OFFSET 0x14
-#define UFSTAT_OFFSET 0x18
-#define UMSTAT_OFFSET 0x1C
-#define UTXH_OFFSET0x20
-#define URXH_OFFSET0x24
-#define UBRDIV_OFFSET 0x28
-#define UDIVSLOT_OFFSET0x2C
-#define UINTP_OFFSET 0x30
-#define UINTSP_OFFSET 0x34
-#define UINTM_OFFSET 0x38
-
-#define ULCON0_REG __REG(0x7F005000)
-#define UCON0_REG __REG(0x7F005004)
-#define UFCON0_REG __REG(0x7F005008)
-#define UMCON0_REG __REG(0x7F00500C)
-#define UTRSTAT0_REG __REG(0x7F005010)
-#define UERSTAT0_REG __REG(0x7F005014)
-#define UFSTAT0_REG__REG(0x7F005018)
-#define UMSTAT0_REG__REG(0x7F00501c)
-#define UTXH0_REG __REG(0x7F005020)
-#define URXH0_REG __REG(0x7F005024)
-#define UBRDIV0_REG__REG(0x7F005028)
-#define UDIVSLOT0_REG __REG(0x7F00502c)
-#define UINTP0_REG __REG(0x7F005030)
-#define UINTSP0_REG__REG(0x7F005034)
-#define UINTM0_REG __REG(0x7F005038)
-
-#define ULCON1_REG __REG(0x7F005400)
-#define UCON1_REG __REG(0x7F005404)
-#define UFCON1_REG __REG(0x7F005408)
-#define UMCON1_REG __REG(0x7F00540C)
-#define UTRSTAT1_REG __REG(0x7F005410)
-#define UERSTAT1_REG __REG(0x7F005414)
-#define UFSTAT1_REG__REG(0x7F005418)
-#define UMSTAT1_REG__REG(0x7F00541c)
-#define UTXH1_REG __REG(0x7F005420)
-#define URXH1_REG __REG(0x7F005424)
-#define UBRDIV1_REG__REG(0x7F005428)
-#define UDIVSLOT1_REG __REG(0x7F00542c)
-#define UINTP1_REG __REG(0x7F005430)
-#define UINTSP1_REG__REG(0x7F005434)
-#define UINTM1_REG __REG(0x7F005438)
-
-#define UTRSTAT_TX_EMPTY (1 << 2)
-#define UTRSTAT_RX_READY (1 << 0)
-#define UART_ERR_MASK 0xF
-
/*
* PWM timer
*/
@@ -804,17 +748,12 @@
#define DMC_DDR_USER_CONFIG1
#ifndef __ASSEMBLY__
-enum s3c64xx_uarts_nr {
- S3C64XX_UART0,
- S3C64XX_UART1,
- S3C64XX_UART2,
-};
#include "s3c64x0.h"
-static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
+static inline unsigned long s3c64xx_get_base_uart(void)
{
- return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
+ return ELFIN_UART_BASE;
}
static inline unsigned long s3c64xx_get_base_nand(void)
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
index 0bbf1d0..7add68c 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
@@ -40,37 +40,6 @@
#include
-/* UART (see manual chapter 11) */
-typedef struct {
- volatile u32ULCON;
- volatile u32UCON;
- volatile u32UFCON;
- volatile u32UMCON;
- volatile u32UTRSTAT;
- volatile u32UERSTAT;
- volatile u32UFSTAT;
- volatile u32UMSTAT;
-#ifdef __BIG_ENDIAN
- volatile u8 res1[3];
- volatile u8 UTXH;
- volatile u8 res2[3];
- volatile u8 URXH;
-#else /* Little Endian */
- volatile u8 UTXH;
- volatile u8 res1[3];
- volatile u8 URXH;
- volatile u8 res2[3];
-#endif
- volatile u32UBRDIV;
-#ifdef __BIG_ENDIAN
- volatile u8 res3[2];
- volatile u16UDIVSLOT;
-#else
- volatile u16UDIVSLOT;
-
[U-Boot] [PATCH 02/14] S3C64XX: Switch to use readl/writel to operate nand flash
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V4:
- None.
Change for V3:
- Replace the magic numbers with variable name.
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_uart function.
- Delete const for the local variable.
---
arch/arm/include/asm/arch-s3c64xx/nand.h| 72
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 79 ++-
board/samsung/smdk6400/lowlevel_init.S |1 +
drivers/mtd/nand/s3c64xx.c | 58 +---
4 files changed, 116 insertions(+), 94 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/nand.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/nand.h
b/arch/arm/include/asm/arch-s3c64xx/nand.h
new file mode 100644
index 000..a1bf3ab
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/nand.h
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_NAND_H__
+#define __ASM_ARCH_NAND_H__
+
+#define NFCONF_OFFSET 0x00
+#define NFCONT_OFFSET 0x04
+
+#define NFCONF_ECC_4BIT(1<<24)
+
+#define NFCONT_ECC_ENC (1<<18)
+#define NFCONT_WP (1<<16)
+#define NFCONT_MECCLOCK(1<<7)
+#define NFCONT_SECCLOCK(1<<6)
+#define NFCONT_INITMECC(1<<5)
+#define NFCONT_INITSECC(1<<4)
+#define NFCONT_INITECC (NFCONT_INITMECC | NFCONT_INITSECC)
+#define NFCONT_CS_ALT (1<<2)
+#define NFCONT_CS (1<<1)
+#define NFCONT_ENABLE (1<<0)
+
+#define NFSTAT_ECCENCDONE (1<<7)
+#define NFSTAT_ECCDECDONE (1<<6)
+#define NFSTAT_RnB (1<<0)
+
+#define NFESTAT0_ECCBUSY (1<<31)
+
+#ifndef __ASSEMBLY__
+/* NAND FLASH */
+struct s3c64xx_nand {
+ u32 nfconf;
+ u32 nfcont;
+ u32 nfcmmd;
+ u32 nfaddr;
+ u32 nfdata;
+ u32 nfmeccdata0;
+ u32 nfmeccdata1;
+ u32 nfseccdata0;
+ u32 nfsblk;
+ u32 nfeblk;
+ u32 nfstat;
+ u32 nfestat0;
+ u32 nfestat1;
+ u32 nfmecc0;
+ u32 nfmecc1;
+ u32 nfsecc;
+ u32 nfmlcbitpt;
+};
+#endif
+
+#endif
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 10b3324..d6c5dd9 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -556,80 +556,6 @@
*/
#define ELFIN_NAND_BASE0x7020
-#define NFCONF_OFFSET 0x00
-#define NFCONT_OFFSET 0x04
-#define NFCMMD_OFFSET 0x08
-#define NFADDR_OFFSET 0x0c
-#define NFDATA_OFFSET 0x10
-#define NFMECCDATA0_OFFSET 0x14
-#define NFMECCDATA1_OFFSET 0x18
-#define NFSECCDATA0_OFFSET 0x1c
-#define NFSBLK_OFFSET 0x20
-#define NFEBLK_OFFSET 0x24
-#define NFSTAT_OFFSET 0x28
-#define NFESTAT0_OFFSET0x2c
-#define NFESTAT1_OFFSET0x30
-#define NFMECC0_OFFSET 0x34
-#define NFMECC1_OFFSET 0x38
-#define NFSECC_OFFSET 0x3c
-#define NFMLCBITPT_OFFSET 0x40
-
-#define NFCONF (ELFIN_NAND_BASE + NFCONF_OFFSET)
-#define NFCONT (ELFIN_NAND_BASE + NFCONT_OFFSET)
-#define NFCMMD (ELFIN_NAND_BASE + NFCMMD_OFFSET)
-#define NFADDR (ELFIN_NAND_BASE + NFADDR_OFFSET)
-#define NFDATA (ELFIN_NAND_BASE + NFDATA_OFFSET)
-#define NFMECCDATA0(ELFIN_NAND_BASE + NFMECCDATA0_OFFSET)
-#define NFMECCDATA1(ELFIN_NAND_BASE + NFMECCDATA1_OFFSET)
-#define NFSECCDATA0(ELFIN_NAND_BASE + NFSECCDATA0_OFFSET)
-#define NFSBLK (ELFIN_NAND_BASE + NFSBLK_OFFSET)
-#define NFEBLK (ELFIN_NAND_BASE + NFEBLK_OFFSET)
-#define NFSTAT (ELFIN_NAND_BASE + NFSTAT_OFFSET)
-#define NFESTAT0 (ELFIN_NAND_BASE + NFESTAT0_
[U-Boot] [PATCH 01/14] smdk6400: Move smdk6400 board from Makefile to boards.cfg
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V4: - None. Change for V3: - None. Change for V2: - None. --- Makefile | 20 board/samsung/smdk6400/config.mk |4 +--- boards.cfg |2 ++ include/configs/smdk6400.h |2 +- 4 files changed, 4 insertions(+), 24 deletions(-) diff --git a/Makefile b/Makefile index d57c15e..8af1d5d 100644 --- a/Makefile +++ b/Makefile @@ -711,26 +711,6 @@ SX1_config:unconfig fi; @$(MKCONFIG) -n $@ SX1 arm arm925t sx1 -# -## ARM1176 Systems -# -smdk6400_noUSB_config \ -smdk6400_config: unconfig - @mkdir -p $(obj)include $(obj)board/samsung/smdk6400 - @mkdir -p $(obj)nand_spl/board/samsung/smdk6400 - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then \ - echo "RAM_TEXT = 0x57e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - else \ - echo "RAM_TEXT = 0xc7e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - fi - @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - -# -# - clean: @rm -f $(obj)examples/standalone/82559_eeprom \ $(obj)examples/standalone/atmel_df_pow2\ diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk index 6f04c2f..93a1a0d 100644 --- a/board/samsung/smdk6400/config.mk +++ b/board/samsung/smdk6400/config.mk @@ -21,10 +21,8 @@ # # download area is 0x5000c000 -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - ifndef CONFIG_NAND_SPL -CONFIG_SYS_TEXT_BASE = $(RAM_TEXT) +CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT) else CONFIG_SYS_TEXT_BASE = 0 endif diff --git a/boards.cfg b/boards.cfg index 2d36d83..0363b41 100644 --- a/boards.cfg +++ b/boards.cfg @@ -47,6 +47,8 @@ flea3arm arm1136 - CarMedi mx35pdk arm arm1136 - freescale mx35 apollon arm arm1136 apollon - omap24xx omap2420h4 arm arm1136 - ti omap24xx +smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0xc7e0 +smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0x57e0 tnetv107x_evmarm arm1176 tnetv107xevmti tnetv107x integratorap_cm720t arm arm720t integrator armltd - integratorap:CM720T integratorap_cm920t arm arm920t integrator armltd - integratorap:CM920T diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 04caeef..47326d6 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -54,7 +54,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ1200 -#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc000) +#if !defined(CONFIG_NAND_U_BOOT) && (CONFIG_SYS_TEXT_BASE >= 0xc000) #define CONFIG_ENABLE_MMU #endif -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] V4 S3C64XX: Switch all I/O to use readl/writel functio and Clear SMDK64XX
V4: 1. Adjust SPL patch order 2. seperate the patch of "arm1176: Fixed No relocation.", It is a common issue for arm platform. I sent it for other thread. V3: 1. Replace ELFIN with S3C64XX for all the variable of cpu.h. 2. Change __S3C6400_H__ into __CPU__H__. 3. Use C language to implement memory initialization. 4. Use C language to re-write reset function. 5. Delete u-boot-nand.lds. V2: 1. Modify the type of return for s3c64xx_get_base_nand 2. Add patch 0014 to support s3c6410 board 3. Adjust patch for mix content. V1: This serial patch intent to: 1. Switch all I/O to use readl/writel function 2. Change nand_spl to use SPL framework 3. S3C64XX serial includes s3c6400 and s3c6410, Here seprate cpu and board file to support to board's of s3c6410. I test this patch on my s3c6410 development board. the log as following: U-Boot 2012.07-rc3-00016-g351ea73 (Jul 28 2012 - 16:55:32) for DMATEK6410 CPU: S3C64XX@532MHz Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz (ASYNC Mode) Board: DMATEK6410 DRAM: 128 MiB WARNING: Caches not enabled NAND: 128 MiB *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial Net: dm9000 Zhong Hongbo (14): smdk6400: Move smdk6400 board from Makefile to boards.cfg S3C64XX: Switch to use readl/writel to operate nand flash S3C64XX: Use readl/writel to operate uart S3C64XX: add pwm for s3c64xx support S3C64XX: reference s5p cpu time system for s3c64xx timer S3C64xx: mov cpu_init.S to the board directory S3C6400: Adopt SPL framwork to support spl for nand flash S3C6400: Delete nand_spl for S3C6400 S3C64XX: Change SROM init to use read/write operation S3C64XX: Switch to use read/writel to operation clock system S3c64xx: clear GPIO, Interrupt, Watchdog variable. S3C6400: clear memory init variable S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board S3C6400: Remove the unused variable for S3C6400 Makefile| 20 - arch/arm/cpu/arm1176/s3c64xx/Makefile |7 +- arch/arm/cpu/arm1176/s3c64xx/cpu_init.S | 135 arch/arm/cpu/arm1176/s3c64xx/pwm.c | 188 + arch/arm/cpu/arm1176/s3c64xx/reset.S| 34 - arch/arm/cpu/arm1176/s3c64xx/reset.c| 39 + arch/arm/cpu/arm1176/s3c64xx/speed.c| 52 +- arch/arm/cpu/arm1176/s3c64xx/srom.c | 51 ++ arch/arm/cpu/arm1176/s3c64xx/timer.c| 195 +++--- arch/arm/cpu/arm1176/start.S| 16 +- arch/arm/include/asm/arch-s3c64xx/clock.h | 163 arch/arm/include/asm/arch-s3c64xx/cpu.h | 89 +++ arch/arm/include/asm/arch-s3c64xx/dmc.h | 62 ++ arch/arm/include/asm/arch-s3c64xx/gpio.h| 38 + arch/arm/include/asm/arch-s3c64xx/interrupt.h | 31 + arch/arm/include/asm/arch-s3c64xx/nand.h| 72 ++ arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 895 --- arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 90 --- arch/arm/include/asm/arch-s3c64xx/sromc.h | 49 ++ arch/arm/include/asm/arch-s3c64xx/uart.h| 54 ++ board/samsung/smdk6400/Makefile | 30 +- board/samsung/smdk6400/config.mk| 30 - board/samsung/smdk6400/dmc_init.c | 110 +++ board/samsung/smdk6400/lowlevel_init.S | 76 +- board/samsung/smdk6400/setup.h | 137 board/samsung/smdk6400/smdk6400.c | 40 +- board/samsung/smdk6400/smdk6400_nand_spl.c | 61 ++- board/samsung/smdk6400/tools/mksmdk6400_image.c | 117 +++ board/samsung/smdk6400/u-boot-nand.lds | 84 --- boards.cfg |2 + drivers/mtd/nand/s3c64xx.c | 64 +- drivers/serial/s3c64xx.c| 52 +- drivers/usb/host/s3c64xx-hcd.c | 32 +- include/configs/smdk6400.h | 40 +- nand_spl/board/samsung/smdk6400/Makefile| 117 --- nand_spl/board/samsung/smdk6400/config.mk | 40 - nand_spl/board/samsung/smdk6400/u-boot.lds | 78 -- 38 files changed, 1667 insertions(+), 1793 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.S create mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.c create mode 100644 arch/arm/cpu/arm1176/s3c64xx/srom.c create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/dmc.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/gpio.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/interrupt.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/nand.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm
Re: [U-Boot] [PATCH] disk/partition: Fix the depend for all the partitions file
On 08/08/2012 04:58 AM, Wolfgang Denk wrote: > Dear Zhong Hongbo, > > In message <1342860534-4710-1-git-send-email-bocui...@gmail.com> you wrote: >> From: Zhong Hongbo >> >> all the patitions should depend CONFIG_PARTITIONS, no the >> CONFIG_CMD_$(device). The device symbol may be SATA, SCSI, >> USB, MMC, SYSTEMACE. Or else when the filesystem command be >> enabled, But board's configure file can not include any >> CONFIG_CMD_$(device), The u-boot will fail build. For example: >> CONFIG_CMD_EXT2 is defined in smdk6400.h, but the boards can >> not define any disk device. The error of build as following: >> --- > > It appears some text is missing here - most of all you SoB line... Hi Wolfgang, Ok, I will fix it. Thanks, hongbo > > Best regards, > > Wolfgang Denk > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V3 08/15] S3C6400: Adopt SPL framwork to support spl for nand flash
On 08/11/2012 07:30 AM, Scott Wood wrote: > On 07/28/2012 04:35 AM, Zhong Hongbo wrote: >> From: Zhong Hongbo >> >> Adopt the new SPL framework to implement the SPL booting of >> the nand flash for S3C6400. >> >> Signed-off-by: Zhong Hongbo >> --- >> Change for V3: >> - None. >> Change for V2: >> - seprate some code. >> --- > > This breaks bisectability -- you should make the new SPL work before or > at the same time as you eliminate the old SPL. Hi Scott, Do you think that I should do this patch according： At first, I should do the new SPL work patch, the next step is to eliminate the old SPL. If I am wrong, please point it to me. Thanks, hongbo > > -Scott > > > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V2] arm: Fixed the offset for the no relocation.
From: Zhong Hongbo When the u-boot address of destination equal to __start, no relocation. relocation offset(r9) = 0. Signed-off-by: Zhong Hongbo --- Change for V2: - Clean a line for arm1176 --- arch/arm/cpu/arm1136/start.S |1 + arch/arm/cpu/arm1176/start.S |1 + arch/arm/cpu/arm720t/start.S |1 + arch/arm/cpu/arm920t/start.S |1 + arch/arm/cpu/arm925t/start.S |1 + arch/arm/cpu/arm926ejs/start.S |1 + arch/arm/cpu/arm946es/start.S |1 + arch/arm/cpu/arm_intcm/start.S |1 + arch/arm/cpu/ixp/start.S |1 + arch/arm/cpu/lh7a40x/start.S |1 + arch/arm/cpu/pxa/start.S |1 + arch/arm/cpu/s3c44b0/start.S |1 + arch/arm/cpu/sa1100/start.S|1 + 13 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 2483c63..3752af9 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -190,6 +190,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index d613641..667a0e0 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -252,6 +252,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 3b97e80..913065b 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -167,6 +167,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 9b8604e..14c9156 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -210,6 +210,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 1a54416..3a483f6 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -204,6 +204,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..1b530dc 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -235,6 +235,7 @@ stack_setup: adr r0, _start sub r9, r6, r0 /* r9 <- relocation offset */ cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index b4d1d2d..30e2183 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -175,6 +175,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index b85e7d4..a133d19 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -171,6 +171,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm
Re: [U-Boot] [PATCH] arm: Fixed the offset for the no relocation.
On 08/01/2012 10:50 PM, Zhong Hongbo wrote: > From: Zhong Hongbo > > When the u-boot address of destination equal to __start, > no relocation. relocation offset(r9) = 0. > > Signed-off-by: Zhong Hongbo > --- > arch/arm/cpu/arm1136/start.S |1 + > arch/arm/cpu/arm1176/start.S |2 +- > arch/arm/cpu/arm720t/start.S |1 + > arch/arm/cpu/arm920t/start.S |1 + > arch/arm/cpu/arm925t/start.S |1 + > arch/arm/cpu/arm926ejs/start.S |1 + > arch/arm/cpu/arm946es/start.S |1 + > arch/arm/cpu/arm_intcm/start.S |1 + > arch/arm/cpu/ixp/start.S |1 + > arch/arm/cpu/lh7a40x/start.S |1 + > arch/arm/cpu/pxa/start.S |1 + > arch/arm/cpu/s3c44b0/start.S |1 + > arch/arm/cpu/sa1100/start.S|1 + > 13 files changed, 13 insertions(+), 1 deletions(-) > > diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S > index 2483c63..3752af9 100644 > --- a/arch/arm/cpu/arm1136/start.S > +++ b/arch/arm/cpu/arm1136/start.S > @@ -190,6 +190,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S > index dd1b73b..7de4af2 100644 > --- a/arch/arm/cpu/arm1176/start.S > +++ b/arch/arm/cpu/arm1176/start.S > @@ -252,7 +252,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > - moveq r9, #0 Sorry, I base on my smdk64xx serial patch. Will send V2 to fix it. Thanks, hongbo > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S > index 3b97e80..913065b 100644 > --- a/arch/arm/cpu/arm720t/start.S > +++ b/arch/arm/cpu/arm720t/start.S > @@ -167,6 +167,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S > index 9b8604e..14c9156 100644 > --- a/arch/arm/cpu/arm920t/start.S > +++ b/arch/arm/cpu/arm920t/start.S > @@ -210,6 +210,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S > index 1a54416..3a483f6 100644 > --- a/arch/arm/cpu/arm925t/start.S > +++ b/arch/arm/cpu/arm925t/start.S > @@ -204,6 +204,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S > index 6f05f1a..1b530dc 100644 > --- a/arch/arm/cpu/arm926ejs/start.S > +++ b/arch/arm/cpu/arm926ejs/start.S > @@ -235,6 +235,7 @@ stack_setup: > adr r0, _start > sub r9, r6, r0 /* r9 <- relocation offset */ > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy loop */ > ldr r3, _bss_start_ofs > diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S > index b4d1d2d..30e2183 100644 > --- a/arch/arm/cpu/arm946es/start.S > +++ b/arch/arm/cpu/arm946es/start.S > @@ -175,6 +175,7 @@ stack_setup: > > adr r0, _start > cmp r0, r6 > + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ > beq clear_bss /* skip relocation */ > mov r1, r6 /* r1 <- scratch for copy_loop */ > ldr r3, _bss_sta
[U-Boot] [PATCH] arm: Fixed the offset for the no relocation.
From: Zhong Hongbo When the u-boot address of destination equal to __start, no relocation. relocation offset(r9) = 0. Signed-off-by: Zhong Hongbo --- arch/arm/cpu/arm1136/start.S |1 + arch/arm/cpu/arm1176/start.S |2 +- arch/arm/cpu/arm720t/start.S |1 + arch/arm/cpu/arm920t/start.S |1 + arch/arm/cpu/arm925t/start.S |1 + arch/arm/cpu/arm926ejs/start.S |1 + arch/arm/cpu/arm946es/start.S |1 + arch/arm/cpu/arm_intcm/start.S |1 + arch/arm/cpu/ixp/start.S |1 + arch/arm/cpu/lh7a40x/start.S |1 + arch/arm/cpu/pxa/start.S |1 + arch/arm/cpu/s3c44b0/start.S |1 + arch/arm/cpu/sa1100/start.S|1 + 13 files changed, 13 insertions(+), 1 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 2483c63..3752af9 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -190,6 +190,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index dd1b73b..7de4af2 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -252,7 +252,7 @@ stack_setup: adr r0, _start cmp r0, r6 - moveq r9, #0 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 3b97e80..913065b 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -167,6 +167,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 9b8604e..14c9156 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -210,6 +210,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 1a54416..3a483f6 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -204,6 +204,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 6f05f1a..1b530dc 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -235,6 +235,7 @@ stack_setup: adr r0, _start sub r9, r6, r0 /* r9 <- relocation offset */ cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index b4d1d2d..30e2183 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -175,6 +175,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index b85e7d4..a133d19 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -171,6 +171,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */ beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cp
Re: [U-Boot] [V3 09/15] arm1176: Fixed No relocation.
On 07/29/2012 06:12 PM, Albert ARIBAUD wrote: > Hi Zhong, > > On Sat, 28 Jul 2012 17:35:42 +0800, Zhong Hongbo wrote: >> From: Zhong Hongbo >> >> When It do not need to relocat for u-boot, >> the offset(r9) of relocation should be set zero. >> >> Signed-off-by: Zhong Hongbo >> --- >> Change for V3: >> - Replace mov with moveq. >> Change for V2: >> - Seprate some code. >> --- >> arch/arm/cpu/arm1176/start.S |1 + >> 1 files changed, 1 insertions(+), 0 deletions(-) >> >> diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S >> index 761b7fe..dd1b73b 100644 >> --- a/arch/arm/cpu/arm1176/start.S >> +++ b/arch/arm/cpu/arm1176/start.S >> @@ -252,6 +252,7 @@ stack_setup: >> >> adr r0, _start >> cmp r0, r6 >> +moveq r9, #0 >> beq clear_bss /* skip relocation */ >> mov r1, r6 /* r1 <- scratch for copy_loop */ >> ldr r3, _bss_start_ofs > > I suspect this goes for other ARM arches as well, does it not? > Please fix globally. > > (considering this is the second time in a small period where such a global > fixing is needed, I'll have a look at commonalizing start.S files across > all ARM arches if possible and submit a patch for the coming window -- unless > someone else has this ongoing already) Hi Albert, I will send a patch to modify the global arm platform. Minkyu, I will separate the patch from this serial. Thanks, hongbo > > Amicalement, > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V3 09/15] arm1176: Fixed No relocation.
Hi Albert, On 07/29/2012 06:50 PM, Zhong Hongbo wrote: > On 07/29/2012 06:12 PM, Albert ARIBAUD wrote: >> Hi Zhong, >> >> On Sat, 28 Jul 2012 17:35:42 +0800, Zhong Hongbo wrote: >>> From: Zhong Hongbo >>> >>> When It do not need to relocat for u-boot, >>> the offset(r9) of relocation should be set zero. >>> >>> Signed-off-by: Zhong Hongbo >>> --- >>> Change for V3: >>> - Replace mov with moveq. >>> Change for V2: >>> - Seprate some code. >>> --- >>> arch/arm/cpu/arm1176/start.S |1 + >>> 1 files changed, 1 insertions(+), 0 deletions(-) >>> >>> diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S >>> index 761b7fe..dd1b73b 100644 >>> --- a/arch/arm/cpu/arm1176/start.S >>> +++ b/arch/arm/cpu/arm1176/start.S >>> @@ -252,6 +252,7 @@ stack_setup: >>> >>> adr r0, _start >>> cmp r0, r6 >>> + moveq r9, #0 >>> beq clear_bss /* skip relocation */ >>> mov r1, r6 /* r1 <- scratch for copy_loop */ >>> ldr r3, _bss_start_ofs >> >> I suspect this goes for other ARM arches as well, does it not? > > I think all the arm need it. >> Please fix globally. > > Ok, I will do it. >> >> (considering this is the second time in a small period where such a global >> fixing is needed, I'll have a look at commonalizing start.S files across >> all ARM arches if possible and submit a patch for the coming window -- unless >> someone else has this ongoing already) > Do your mean is that you will fix the issue? Sorry, s/your/you and s/is//. I should said as following: Do you mean that you will fix the issue? Thanks hongbo > > Thank >> >> Amicalement, >> > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V3 09/15] arm1176: Fixed No relocation.
On 07/29/2012 06:12 PM, Albert ARIBAUD wrote: > Hi Zhong, > > On Sat, 28 Jul 2012 17:35:42 +0800, Zhong Hongbo wrote: >> From: Zhong Hongbo >> >> When It do not need to relocat for u-boot, >> the offset(r9) of relocation should be set zero. >> >> Signed-off-by: Zhong Hongbo >> --- >> Change for V3: >> - Replace mov with moveq. >> Change for V2: >> - Seprate some code. >> --- >> arch/arm/cpu/arm1176/start.S |1 + >> 1 files changed, 1 insertions(+), 0 deletions(-) >> >> diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S >> index 761b7fe..dd1b73b 100644 >> --- a/arch/arm/cpu/arm1176/start.S >> +++ b/arch/arm/cpu/arm1176/start.S >> @@ -252,6 +252,7 @@ stack_setup: >> >> adr r0, _start >> cmp r0, r6 >> +moveq r9, #0 >> beq clear_bss /* skip relocation */ >> mov r1, r6 /* r1 <- scratch for copy_loop */ >> ldr r3, _bss_start_ofs > > I suspect this goes for other ARM arches as well, does it not? I think all the arm need it. > Please fix globally. Ok, I will do it. > > (considering this is the second time in a small period where such a global > fixing is needed, I'll have a look at commonalizing start.S files across > all ARM arches if possible and submit a patch for the coming window -- unless > someone else has this ongoing already) Do your mean is that you will fix the issue? Thank > > Amicalement, > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V3 15/15] S3C6400: Remove the unused variable for S3C6400
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V3: - None. Change for V2: - None. --- include/configs/smdk6400.h | 15 --- 1 files changed, 0 insertions(+), 15 deletions(-) diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index fa5b1c5..2b49647 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -108,9 +108,6 @@ #define CONFIG_CMD_LOADB #define CONFIG_CMD_SAVEENV #define CONFIG_CMD_NAND -#if defined(CONFIG_BOOT_ONENAND) -#define CONFIG_CMD_ONENAND -#endif #define CONFIG_CMD_PING #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT @@ -266,13 +263,6 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63} -/* None of these are currently implemented. Left from the original Samsung - * version for reference -#define CONFIG_BOOT_NOR -#define CONFIG_BOOT_MOVINAND -#define CONFIG_BOOT_ONENAND -*/ - #define CONFIG_SPL #define CONFIG_SPL_NAND #define CONFIG_SPL_NAND_SIMPLE @@ -283,11 +273,6 @@ #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_NAND_S3C64XX -/* Unimplemented or unsupported. See comment above. -#define CONFIG_ONENAND -#define CONFIG_MOVINAND -*/ - /* Settings as above boot configuration */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_BOOTARGS"console=ttySAC,115200" -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V3 14/15] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V3: - Replace ELFIN with S3C64XX for all the variable of cpu.h - Change __S3C6400_H__ into __CPU__H__ Change for V2: - New. --- arch/arm/cpu/arm1176/s3c64xx/pwm.c |2 +- arch/arm/cpu/arm1176/s3c64xx/reset.c|2 +- arch/arm/cpu/arm1176/s3c64xx/speed.c|2 +- arch/arm/cpu/arm1176/s3c64xx/srom.c |2 +- arch/arm/cpu/arm1176/s3c64xx/timer.c|2 +- arch/arm/include/asm/arch-s3c64xx/cpu.h | 89 +++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 89 --- board/samsung/smdk6400/dmc_init.c |2 +- board/samsung/smdk6400/lowlevel_init.S | 26 board/samsung/smdk6400/smdk6400.c |2 +- drivers/mtd/nand/s3c64xx.c |2 +- drivers/serial/s3c64xx.c|2 +- drivers/usb/host/s3c64xx-hcd.c |2 +- 13 files changed, 112 insertions(+), 112 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c b/arch/arm/cpu/arm1176/s3c64xx/pwm.c index d46470a..004dcd8 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include int pwm_enable(int pwm_id) diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.c b/arch/arm/cpu/arm1176/s3c64xx/reset.c index 773cffa..03cb306 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/reset.c +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.c @@ -23,7 +23,7 @@ #include #include -#include +#include #include void reset_cpu(ulong addr) diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c index 05b44b9..5e68090 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/speed.c +++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c @@ -32,7 +32,7 @@ #include #include -#include +#include #include #define APLL 0 diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c b/arch/arm/cpu/arm1176/s3c64xx/srom.c index f1b2b34..92fb7af 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/srom.c +++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include /* * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the * band width control and bank control registers diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c index 47d7731..eebd0c0 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include #include diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h b/arch/arm/include/asm/arch-s3c64xx/cpu.h new file mode 100644 index 000..90c5328 --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h @@ -0,0 +1,89 @@ +/* + * (C) Copyright 2007 + * Byungjae Lee, Samsung Erectronics, bj...@samsung.com. + * - only support for S3C6400 + * + * (C) Copyright 2008 + * Guennadi Liakhovetki, DENX Software Engineering, + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/ + * NAME: cpu.h + * + * Based on S3C6400 User's manual Rev 0.0 + / + +#ifndef __CPU_H__ +#define __CPU_H__ + +#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400) +#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration! +#endif + +#define S3C64XX_UART_CHANNELS 3 +#define S3C64XX_SPI_CHANNELS 2 + +#include + +#define S3C64XX_CLOCK_POWER_BASE 0x7e00f000 +#define S3C64XX_GPIO_BASE 0x7f008000 +#define S3C64XX_MEM_SYS_CFG0x7e00f120 +#define S3C64XX_SROM_BASE 0x7000 +#define S3C64XX_DMC0_BASE 0x7e00 +#define S3C64XX_DMC1_BASE 0x7e001000 +#define S3C64XX_NAND_BASE 0x7020 +#define S3C64XX_VIC0_BASE 0x7120 +#define S3C64XX_VIC1_BASE 0x7130 +#define S3C64XX_WATCHDOG_BASE 0x7E004000 +#define S3C64XX_UART_BASE 0x7F005000 +#define S3C64
[U-Boot] [V3 13/15] S3C6400: clear memory init variable
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V3:
- Replace the magic numbers with variable name.
- Use C language to implement memory initialization.
Change for V2:
- None.
---
arch/arm/include/asm/arch-s3c64xx/dmc.h | 62 +
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 178 +--
board/samsung/smdk6400/Makefile |3 +-
board/samsung/smdk6400/dmc_init.c | 110 +
board/samsung/smdk6400/lowlevel_init.S |2 +-
board/samsung/smdk6400/mem_init.S | 135
board/samsung/smdk6400/setup.h | 85 +
7 files changed, 265 insertions(+), 310 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/dmc.h
create mode 100644 board/samsung/smdk6400/dmc_init.c
delete mode 100644 board/samsung/smdk6400/mem_init.S
diff --git a/arch/arm/include/asm/arch-s3c64xx/dmc.h
b/arch/arm/include/asm/arch-s3c64xx/dmc.h
new file mode 100644
index 000..758e750
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/dmc.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2012
+ * Zhong Hongbo
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#ifndef __ASM_ARCH_DMC_H__
+#define __ASM_ARCH_DMC_H__
+
+#ifndef __ASSEMBLY__
+
+struct s3c64xx_dmc {
+ unsigned intmemstat;
+ unsigned intmemcmd;
+ unsigned intdirectcmd;
+ unsigned intmemcfg;
+ unsigned intrefresh;
+ unsigned intcaslat;
+ unsigned intt_dqss;
+ unsigned intt_mrd;
+ unsigned intt_ras;
+ unsigned intt_rc;
+ unsigned intt_rcd;
+ unsigned intt_rfc;
+ unsigned intt_rp;
+ unsigned intt_rrd;
+ unsigned intt_wr;
+ unsigned intt_wtr;
+ unsigned intt_xp;
+ unsigned intt_xsr;
+ unsigned intt_esr;
+ unsigned intmemcfg2;
+#if defined(CONFIG_S3C6410)
+ unsigned intmemcfg3;
+ unsigned char res1[0xac];
+#else
+ unsigned char res1[0xb0];
+#endif
+ unsigned intid_0_cfg[16];
+ unsigned char res2[0xc0];
+ unsigned intchip_0_cfg;
+ unsigned intchip_1_cfg;
+ unsigned char res3[0xf8];
+ unsigned intuser_status;
+ unsigned intuser_config;
+};
+#endif
+#endif
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 1da327a..45a8918 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -41,191 +41,18 @@
#include
#define ELFIN_CLOCK_POWER_BASE 0x7e00f000
-
-/*
- * GPIO
- */
#define ELFIN_GPIO_BASE0x7f008000
-
-/*
- * Bus Matrix
- */
#define ELFIN_MEM_SYS_CFG 0x7e00f120
-
-#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12)
-
-#define S3C64XX_MEM_SYS_CFG_NAND 0x0008
-
-/*
- * Memory controller
- */
#define ELFIN_SROM_BASE0x7000
-
-/*
- * SDRAM Controller
- */
#define ELFIN_DMC0_BASE0x7e00
#define ELFIN_DMC1_BASE0x7e001000
-
-#define INDEX_DMC_MEMC_STATUS 0x00
-#define INDEX_DMC_MEMC_CMD 0x04
-#define INDEX_DMC_DIRECT_CMD 0x08
-#define INDEX_DMC_MEMORY_CFG 0x0C
-#define INDEX_DMC_REFRESH_PRD 0x10
-#define INDEX_DMC_CAS_LATENCY 0x14
-#define INDEX_DMC_T_DQSS 0x18
-#define INDEX_DMC_T_MRD0x1C
-#define INDEX_DMC_T_RAS0x20
-#define INDEX_DMC_T_RC 0x24
-#define INDEX_DMC_T_RCD0x28
-#define INDEX_DMC_T_RFC0x2C
-#define INDEX_DMC_T_RP 0x30
-#define INDEX_DMC_T_RRD0x34
-#define INDEX_DMC_T_WR 0x38
-#define INDEX_DMC_T_WTR0x3C
-#define INDEX_DMC_T_XP 0x40
-#define INDEX_DMC_T_XSR0x44
-#define INDEX_DMC_T_ESR0x48
-#define INDEX_DMC_MEMORY_CFG2 0x4C
-#define INDEX_DMC_CHIP_0_CFG 0x200
-#define INDEX_DMC_CHIP_1_CFG 0x204
-#define INDEX_DMC_CHIP_2_CFG 0x208
-#define INDEX_DMC_CHIP_3_CFG 0x20C
-#define INDEX_DMC_USER_STATUS 0x300
-#define INDEX_DMC_USER_CONFIG 0x304
-
-/*
- * Memory Chip direct command
- */
-#define DMC_NOP0 0x0c
-#define DMC_NOP1 0x1c
-#define D
[U-Boot] [V3 12/15] S3c64xx: clear GPIO, Interrupt, Watchdog variable.
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V3: - Replace the magic numbers with the variable name. Change for V2: - None. --- arch/arm/include/asm/arch-s3c64xx/gpio.h | 38 arch/arm/include/asm/arch-s3c64xx/interrupt.h | 31 +++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 258 - board/samsung/smdk6400/lowlevel_init.S| 16 +- board/samsung/smdk6400/setup.h| 11 +- 5 files changed, 86 insertions(+), 268 deletions(-) create mode 100644 arch/arm/include/asm/arch-s3c64xx/gpio.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/interrupt.h diff --git a/arch/arm/include/asm/arch-s3c64xx/gpio.h b/arch/arm/include/asm/arch-s3c64xx/gpio.h new file mode 100644 index 000..979173c --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/gpio.h @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2012 + * Zhong Hongbo + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_GPIO_H_ +#define __ASM_ARM_ARCH_GPIO_H_ + +#define GPACON_OFFSET 0x00 +#define GPADAT_OFFSET 0x04 +#define GPAPUD_OFFSET 0x08 + +#define GPNCON_OFFSET 0x830 +#define GPNDAT_OFFSET 0x834 +#define GPNPUD_OFFSET 0x838 + +#define GPKCON0_OFFSET 0x800 +#define GPKCON1_OFFSET 0x804 +#define GPKDAT_OFFSET 0x808 +#define GPKPUD_OFFSET 0x80C + +#endif diff --git a/arch/arm/include/asm/arch-s3c64xx/interrupt.h b/arch/arm/include/asm/arch-s3c64xx/interrupt.h new file mode 100644 index 000..49e3ae4 --- /dev/null +++ b/arch/arm/include/asm/arch-s3c64xx/interrupt.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2012 + * Zhong Hongbo + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARM_ARCH_INTERRUPT_H_ +#define __ASM_ARM_ARCH_INTERRUPT_H_ + +#define INTMOD 0x0C/* VIC INT SELECT (IRQ or FIQ) */ +#define INTUNMSK 0x10/* VIC INT EN (write 1 to unmask) */ +#define INTMSK 0x14/* VIC INT EN CLEAR (write 1 to mask) */ +#define INTSUBMSK 0x1C/* VIC SOFT INT CLEAR */ +#define VECTADDR 0xF00 /* VIC ADDRESS */ +#define EINTPEND_OFFSET0x924 +#endif diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h index b1537c1..1da327a 100644 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h @@ -47,172 +47,6 @@ */ #define ELFIN_GPIO_BASE0x7f008000 -#define GPACON_OFFSET 0x00 -#define GPADAT_OFFSET 0x04 -#define GPAPUD_OFFSET 0x08 -#define GPACONSLP_OFFSET 0x0C -#define GPAPUDSLP_OFFSET 0x10 -#define GPBCON_OFFSET 0x20 -#define GPBDAT_OFFSET 0x24 -#define GPBPUD_OFFSET 0x28 -#define GPBCONSLP_OFFSET 0x2C -#define GPBPUDSLP_OFFSET 0x30 -#define GPCCON_OFFSET 0x40 -#define GPCDAT_OFFSET 0x44 -#define GPCPUD_OFFSET 0x48 -#define GPCCONSLP_OFFSET 0x4C -#define GPCPUDSLP_OFFSET 0x50 -#define GPDCON_OFFSET 0x60 -#define GPDDAT_OFFSET 0x64 -#define GPDPUD_OFFSET 0x68 -#define GPDCONSLP_OFFSET 0x6C -#define GPDPUDSLP_OFFSET 0x70 -#define GPECON_OFFSET 0x80 -#define GPEDAT_OFFSET 0x84 -#define GPEPUD_OFFSET 0x88 -#define GPECONSLP_OFFSET 0x8C -#define GPEPUDSLP_OFFSET 0x90 -#define GPFCON_OFFSET 0xA0 -#define GPFDAT_OFFSET 0xA4 -#define GPFPUD_OFFSET 0xA8 -#define GPFCONSLP_OFFSET 0xAC -#define GPFPUDSLP_OFFSET
[U-Boot] [V3 11/15] S3C64XX: Switch to use read/writel to operation clock system
From: Zhong Hongbo
Switch to use read/writel function and clear the relevant variable.
Signed-off-by: Zhong Hongbo
---
Change for V3:
- Use C language to re-write reset function.
- Replace the magic numbers witch variale name.
Change for V2:
- merge clock patch.
- Change the type of return for s3c64xx_get_base_clock function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |6 +-
arch/arm/cpu/arm1176/s3c64xx/reset.S| 34
arch/arm/cpu/arm1176/s3c64xx/reset.c| 39 +
arch/arm/cpu/arm1176/s3c64xx/speed.c| 50 +--
arch/arm/include/asm/arch-s3c64xx/clock.h | 163
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 219 +--
board/samsung/smdk6400/lowlevel_init.S |3 +
board/samsung/smdk6400/setup.h | 47 ++
drivers/usb/host/s3c64xx-hcd.c | 30 -
9 files changed, 321 insertions(+), 270 deletions(-)
delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.S
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h
create mode 100644 board/samsung/smdk6400/setup.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 28786bf..16be887 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -28,13 +28,11 @@ include $(TOPDIR)/config.mk
LIB= $(obj)lib$(SOC).o
-SOBJS = reset.o
-
-COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o
+COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o reset.o
COBJS-y+= timer.o
COBJS-$(CONFIG_PWM) += pwm.o
-OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+OBJS := $(addprefix $(obj), $(COBJS-y))
all: $(obj).depend $(START) $(LIB)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S
b/arch/arm/cpu/arm1176/s3c64xx/reset.S
deleted file mode 100644
index eae572e..000
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2009 Samsung Electronics.
- * Minkyu Kang
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include
-
-.globl reset_cpu
-reset_cpu:
- ldr r1, =ELFIN_CLOCK_POWER_BASE
- ldr r2, [r1, #SYS_ID_OFFSET]
- ldr r3, =0x
- and r2, r3, r2, lsr #12
- str r2, [r1, #SW_RST_OFFSET]
-_loop_forever:
- b _loop_forever
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.c
b/arch/arm/cpu/arm1176/s3c64xx/reset.c
new file mode 100644
index 000..773cffa
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.c
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2012
+ * Zhong Hongbo
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+
+void reset_cpu(ulong addr)
+{
+ unsigned long sys_id;
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
+
+ sys_id = readl(&clk->sys_id);
+ sys_id >>= 12;
+ sys_id &= 0x;
+ writel(sys_id, &clk->sw_rst);
+}
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c
b/arch/arm/cpu/arm1176/s3c64xx/speed.c
index 11962ac..05b44b9 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
@@ -31,12 +31,13 @@
*/
#include
+#include
#include
+#include
#define APLL 0
#defin
[U-Boot] [V3 10/15] S3C64XX: Change SROM init to use read/write operation
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V3:
- None.
Change for V2:
- Change the type of return for s3c64xx_get_base_sromc function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +-
arch/arm/cpu/arm1176/s3c64xx/srom.c | 51 +++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 13 +++
arch/arm/include/asm/arch-s3c64xx/sromc.h | 49 +
board/samsung/smdk6400/smdk6400.c | 38 ++--
include/configs/smdk6400.h |1 +
6 files changed, 134 insertions(+), 20 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/srom.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/sromc.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 2f37431..28786bf 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o
SOBJS = reset.o
-COBJS-$(CONFIG_S3C64XX)+= speed.o
+COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o
COBJS-y+= timer.o
COBJS-$(CONFIG_PWM) += pwm.o
diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c
b/arch/arm/cpu/arm1176/s3c64xx/srom.c
new file mode 100644
index 000..f1b2b34
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2012
+ * Zhong Hongbo
+ * base on arch/arm/cpu/armv7/s5p-common/sromc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+/*
+ * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM
+ * srom_bw_conf - SMC Band witdh reg configuration value
+ * srom_bc_conf - SMC Bank Control reg configuration value
+ */
+void s3c64xx_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
+{
+ u32 tmp;
+ struct s3c64xx_sromc *srom =
+ (struct s3c64xx_sromc *)s3c64xx_get_base_sromc();
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= srom_bw_conf;
+
+ writel(tmp, &srom->bw);
+
+ /* Configure SMC_BC register */
+ writel(srom_bc_conf, &srom->bc[srom_bank]);
+}
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index b884763..d2ee9d2 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -471,14 +471,6 @@
*/
#define ELFIN_SROM_BASE0x7000
-#define SROM_BW_REG__REG(ELFIN_SROM_BASE + 0x0)
-#define SROM_BC0_REG __REG(ELFIN_SROM_BASE + 0x4)
-#define SROM_BC1_REG __REG(ELFIN_SROM_BASE + 0x8)
-#define SROM_BC2_REG __REG(ELFIN_SROM_BASE + 0xC)
-#define SROM_BC3_REG __REG(ELFIN_SROM_BASE + 0x10)
-#define SROM_BC4_REG __REG(ELFIN_SROM_BASE + 0x14)
-#define SROM_BC5_REG __REG(ELFIN_SROM_BASE + 0x18)
-
/*
* SDRAM Controller
*/
@@ -722,6 +714,11 @@ static inline unsigned long s3c64xx_get_base_timer(void)
{
return ELFIN_TIMER_BASE;
}
+
+static inline unsigned long s3c64xx_get_base_sromc(void)
+{
+ return ELFIN_SROM_BASE;
+}
#endif
#endif /*__S3C6400_H__*/
diff --git a/arch/arm/include/asm/arch-s3c64xx/sromc.h
b/arch/arm/include/asm/arch-s3c64xx/sromc.h
new file mode 100644
index 000..fcad635
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/sromc.h
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * base on arch/arm/include/asm/arch-s5pc1xx/sromc.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a cop
[U-Boot] [V3 09/15] arm1176: Fixed No relocation.
From: Zhong Hongbo When It do not need to relocat for u-boot, the offset(r9) of relocation should be set zero. Signed-off-by: Zhong Hongbo --- Change for V3: - Replace mov with moveq. Change for V2: - Seprate some code. --- arch/arm/cpu/arm1176/start.S |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 761b7fe..dd1b73b 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -252,6 +252,7 @@ stack_setup: adr r0, _start cmp r0, r6 + moveq r9, #0 beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V3 07/15] S3C6400: Delete nand_spl for S3C6400
From: Zhong Hongbo
The old spl use nand_spl directory file to support
nand flash boot. We will adopt the new SPL framework
to implement it.
Signed-off-by: Zhong Hongbo
---
Change for V3:
- Delete u-boot-nand.lds.
Change for V2:
- None.
---
board/samsung/smdk6400/config.mk | 28 ---
board/samsung/smdk6400/u-boot-nand.lds | 84
boards.cfg |4 +-
include/configs/smdk6400.h |2 +-
nand_spl/board/samsung/smdk6400/Makefile | 117
nand_spl/board/samsung/smdk6400/config.mk | 40 --
nand_spl/board/samsung/smdk6400/u-boot.lds | 78 --
7 files changed, 3 insertions(+), 350 deletions(-)
delete mode 100644 board/samsung/smdk6400/config.mk
delete mode 100644 board/samsung/smdk6400/u-boot-nand.lds
delete mode 100644 nand_spl/board/samsung/smdk6400/Makefile
delete mode 100644 nand_spl/board/samsung/smdk6400/config.mk
delete mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds
diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk
deleted file mode 100644
index 93a1a0d..000
--- a/board/samsung/smdk6400/config.mk
+++ /dev/null
@@ -1,28 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering,
-# David Mueller, ELSOFT AG,
-#
-# (C) Copyright 2008
-# Guennadi Liakhovetki, DENX Software Engineering,
-#
-# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu
-#
-# see http://www.samsung.com/ for more information on SAMSUNG
-
-# On SMDK6400 we use the 64 MB SDRAM bank at
-#
-# 0x5000 to 0x5800
-#
-# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000
-#
-# we load ourselves to 0x57e0 without MMU
-# with MMU, load address is changed to 0xc7e0
-#
-# download area is 0x5000c000
-
-ifndef CONFIG_NAND_SPL
-CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT)
-else
-CONFIG_SYS_TEXT_BASE = 0
-endif
diff --git a/board/samsung/smdk6400/u-boot-nand.lds
b/board/samsung/smdk6400/u-boot-nand.lds
deleted file mode 100644
index f162815..000
--- a/board/samsung/smdk6400/u-boot-nand.lds
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering,
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering,
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
- . = 0x;
-
- . = ALIGN(4);
- .text :
- {
- arch/arm/cpu/arm1176/start.o (.text)
- *(.text)
- }
-
- . = ALIGN(4);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(4);
- .data : { *(.data) }
-
- . = ALIGN(4);
- .got : { *(.got) }
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = ALIGN(4);
- .mmudata : { *(.mmudata) }
-
- . = ALIGN(4);
-
- .rel.dyn : {
- __rel_dyn_start = .;
- *(.rel*)
- __rel_dyn_end = .;
- }
-
- .dynsym : {
- __dynsym_start = .;
- *(.dynsym)
- }
-
- _end = .;
-
- .bss __rel_dyn_start (OVERLAY) : {
- __bss_start = .;
- *(.bss)
- . = ALIGN(4);
- __bss_end__ = .;
- }
-
- /DISCARD/ : { *(.dynstr*) }
- /DISCARD/ : { *(.dynamic*) }
- /DISCARD/ : { *(.plt*) }
- /DISCARD/ : { *(.interp*) }
- /DISCARD/ : { *(.gnu*) }
-}
diff --git a/boards.cfg b/boards.cfg
index 0363b41..491459a 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -47,8 +47,8 @@ flea3arm arm1136 -
CarMedi
mx35pdk arm arm1136 -
freescale mx35
apollon arm arm1136 apollon
- omap24xx
omap2420h4 arm arm1136 - ti
omap24xx
-smdk6400 arm arm1176
[U-Boot] [V3 08/15] S3C6400: Adopt SPL framwork to support spl for nand flash
From: Zhong Hongbo Adopt the new SPL framework to implement the SPL booting of the nand flash for S3C6400. Signed-off-by: Zhong Hongbo --- Change for V3: - None. Change for V2: - seprate some code. --- arch/arm/cpu/arm1176/start.S| 16 +--- board/samsung/smdk6400/Makefile | 29 +- board/samsung/smdk6400/lowlevel_init.S | 22 ++-- board/samsung/smdk6400/smdk6400_nand_spl.c | 61 ++-- board/samsung/smdk6400/tools/mksmdk6400_image.c | 117 +++ drivers/mtd/nand/s3c64xx.c |4 +- include/configs/smdk6400.h | 21 +++-- 7 files changed, 221 insertions(+), 49 deletions(-) create mode 100644 board/samsung/smdk6400/tools/mksmdk6400_image.c diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index d613641..761b7fe 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -51,7 +51,7 @@ .globl _start _start: b reset -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -164,7 +164,7 @@ cpu_init_crit: * When booting from NAND - it has definitely been a reset, so, no need * to flush caches and disable the MMU */ -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * flush v4 I/D caches */ @@ -357,21 +357,14 @@ clbss_l:cmp r0, r1 /* clear loop... */ add r0, r0, #4 b clbss_l clbss_e: -#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on #endif -#endif /* * We are done. Do not return, instead branch to second part of board * initialization, now running from RAM. */ -#ifdef CONFIG_NAND_SPL - ldr pc, _nand_boot - -_nand_boot: .word nand_boot -#else ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 @@ -384,7 +377,6 @@ _nand_boot: .word nand_boot _board_init_r_ofs: .word board_init_r - _start -#endif _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -398,7 +390,7 @@ _mmu_table_base: .word mmu_table #endif -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * we assume that cache operation is done before. (eg. cleanup_before_linux()) * actually, we don't need to do anything about cache if not use d-cache in @@ -576,4 +568,4 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile index 645c8e2..f7fa667 100644 --- a/board/samsung/smdk6400/Makefile +++ b/board/samsung/smdk6400/Makefile @@ -28,15 +28,34 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(BOARD).o +ifndef CONFIG_SPL_BUILD COBJS-y:= smdk6400.o +endif + SOBJS := lowlevel_init.o mem_init.o -SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) -SOBJS := $(addprefix $(obj),$(SOBJS)) +ifdef CONFIG_SPL_BUILD +COBJS-y += smdk6400_nand_spl.o +endif + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) + +ALL:= $(obj).depend $(LIB) + +ifdef CONFIG_SPL_BUILD +ALL+= $(OBJTREE)/tools/mk$(BOARD)spl +endif + +all: $(ALL) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) -$(LIB):$(obj).depend $(SOBJS) $(OBJS) - $(call cmd_link_o_target, $(SOBJS) $(OBJS)) +ifdef CONFIG_SPL_BUILD +$(OBJTREE)/tools/mk$(BOARD)spl:tools/mksmdk6400_image.c + $(HOSTCC) tools/mksmdk6400_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl +endif # diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 45887f3..93172e7 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -84,18 +84,12 @@ lowlevel_init: str r3, [r0, #oVECTADDR] str r3, [r1, #oVECTADDR] +#ifdef CONFIG_SPL_BUILD /* init system clock */ - bl system_clock_init + bl system_clock_init -#ifndef CONFIG_NAND_SPL - /* for UART */ - bl uart_asm_init -#endif - -#ifdef CONFIG_BOOT_NAND /* simple init for NAND */ - bl nand_asm_init -#endif + bl nand_asm_init /* Memory subsystem address 0x7e00f120 */ ldr r0, =ELFIN_MEM_SYS_CFG @@ -105,6 +99,12 @@ lowlevel_init: str r1, [r0] bl mem_ctrl_asm_init +#endif + +#ifndef CONFIG_SPL_BUILD + /* for UART */ + bl uart_asm_init +#endif /* Wakeup support. Don't know if it's going to be used, untested. */ ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) @@ -244,7 +244,7 @@ wait_for_async: mov pc,
[U-Boot] [V3 06/15] S3C64xx: mov cpu_init.S to the board directory
From: Zhong Hongbo It just only do the memory init. The memory depend on the design of board. Signed-off-by: Zhong Hongbo --- Change for V3: - None. Change for V2: - None. --- arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +- arch/arm/cpu/arm1176/s3c64xx/cpu_init.S | 135 --- board/samsung/smdk6400/Makefile |2 +- board/samsung/smdk6400/mem_init.S | 135 +++ 4 files changed, 137 insertions(+), 137 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S create mode 100644 board/samsung/smdk6400/mem_init.S diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile index 93f..2f37431 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile @@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o SOBJS = reset.o -COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o +COBJS-$(CONFIG_S3C64XX)+= speed.o COBJS-y+= timer.o COBJS-$(CONFIG_PWM) += pwm.o diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S deleted file mode 100644 index df88cba..000 --- a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400 - * - * Copyright (C) 2008 - * Guennadi Liakhovetki, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - - .globl mem_ctrl_asm_init -mem_ctrl_asm_init: - /* DMC1 base address 0x7e001000 */ - ldr r0, =ELFIN_DMC1_BASE - - ldr r1, =0x4 - str r1, [r0, #INDEX_DMC_MEMC_CMD] - - ldr r1, =DMC_DDR_REFRESH_PRD - str r1, [r0, #INDEX_DMC_REFRESH_PRD] - - ldr r1, =DMC_DDR_CAS_LATENCY - str r1, [r0, #INDEX_DMC_CAS_LATENCY] - - ldr r1, =DMC_DDR_t_DQSS - str r1, [r0, #INDEX_DMC_T_DQSS] - - ldr r1, =DMC_DDR_t_MRD - str r1, [r0, #INDEX_DMC_T_MRD] - - ldr r1, =DMC_DDR_t_RAS - str r1, [r0, #INDEX_DMC_T_RAS] - - ldr r1, =DMC_DDR_t_RC - str r1, [r0, #INDEX_DMC_T_RC] - - ldr r1, =DMC_DDR_t_RCD - ldr r2, =DMC_DDR_schedule_RCD - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RCD] - - ldr r1, =DMC_DDR_t_RFC - ldr r2, =DMC_DDR_schedule_RFC - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RFC] - - ldr r1, =DMC_DDR_t_RP - ldr r2, =DMC_DDR_schedule_RP - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RP] - - ldr r1, =DMC_DDR_t_RRD - str r1, [r0, #INDEX_DMC_T_RRD] - - ldr r1, =DMC_DDR_t_WR - str r1, [r0, #INDEX_DMC_T_WR] - - ldr r1, =DMC_DDR_t_WTR - str r1, [r0, #INDEX_DMC_T_WTR] - - ldr r1, =DMC_DDR_t_XP - str r1, [r0, #INDEX_DMC_T_XP] - - ldr r1, =DMC_DDR_t_XSR - str r1, [r0, #INDEX_DMC_T_XSR] - - ldr r1, =DMC_DDR_t_ESR - str r1, [r0, #INDEX_DMC_T_ESR] - - ldr r1, =DMC1_MEM_CFG - str r1, [r0, #INDEX_DMC_MEMORY_CFG] - - ldr r1, =DMC1_MEM_CFG2 - str r1, [r0, #INDEX_DMC_MEMORY_CFG2] - - ldr r1, =DMC1_CHIP0_CFG - str r1, [r0, #INDEX_DMC_CHIP_0_CFG] - - ldr r1, =DMC_DDR_32_CFG - str r1, [r0, #INDEX_DMC_USER_CONFIG] - - /* DMC0 DDR Chip 0 configuration direct command reg */ - ldr r1, =DMC_NOP0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Precharge All */ - ldr r1, =DMC_PA0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Auto Refresh 2 time */ - ldr r1, =DMC_AR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* MRS */ - ldr r1, =DMC_mDDR_EMR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Mode Reg */ - ldr r1, =DMC_mDDR_MR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Enable DMC1 */ - mov r1, #0x0 - str r1, [r0, #INDEX_DMC_MEMC_CMD] - -check_dmc1_
[U-Boot] [V3 05/15] S3C64XX: reference s5p cpu time system for s3c64xx timer
From: Zhong Hongbo
The old s3c64xx timer is not work normal, Adopt s5p time design,
It work perfect.
Signed-off-by: Zhong Hongbo
---
Change for V3:
- None.
Change for V2:
- Delete const key word for the variable of struct s3c_timer
---
arch/arm/cpu/arm1176/s3c64xx/timer.c | 193 --
1 files changed, 93 insertions(+), 100 deletions(-)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c
b/arch/arm/cpu/arm1176/s3c64xx/timer.c
index f16a37b..47d7731 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
@@ -1,23 +1,8 @@
/*
- * (C) Copyright 2003
- * Texas Instruments
+ * Copyright (C) 2012
+ * Zhong Hongbo
*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Marius Groeger
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Alex Zuepke
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering,
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd.
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering,
+ * based on arch/arm/cpu/armv7/s5p-common/timer.c
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -39,64 +24,29 @@
*/
#include
-#include
+#include
#include
-#include
-
-static ulong timer_load_val;
+#include
+#include
-#define PRESCALER 167
+DECLARE_GLOBAL_DATA_PTR;
-static s3c64xx_timers *s3c64xx_get_base_timers(void)
-{
- return (s3c64xx_timers *)ELFIN_TIMER_BASE;
-}
+static unsigned long get_current_tick(void);
/* macro to read the 16 bit timer */
-static inline ulong read_timer(void)
+static inline struct s3c_timer *s3c_get_base_timer(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- return timers->TCNTO4;
+ return (struct s3c_timer *)s3c64xx_get_base_timer();
}
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
int timer_init(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- /* use PWM Timer 4 because it has no output */
- /*
-* We use the following scheme for the timer:
-* Prescaler is hard fixed at 167, divider at 1/4.
-* This gives at PCLK frequency 66MHz approx. 10us ticks
-* The timer is set to wrap after 100s, at 66MHz this obviously
-* happens after 10,000,000 ticks. A long variable can thus
-* keep values up to 40,000s, i.e., 11 hours. This should be
-* enough for most uses:-) Possible optimizations: select a
-* binary-friendly frequency, e.g., 1ms / 128. Also calculate
-* the prescaler automatically for other PCLK frequencies.
-*/
- timers->TCFG0 = PRESCALER << 8;
- if (timer_load_val == 0) {
- timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
- timers->TCFG1 = (timers->TCFG1 & ~0xf) | 0x2;
- }
-
- /* load value for 10 ms timeout */
- lastdec = timers->TCNTB4 = timer_load_val;
- /* auto load, manual update of Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO |
- TCON_4_UPDATE;
+ /* PWM Timer 4 */
+ pwm_init(4, MUX_DIV_2, 0);
+ pwm_config(4, 0, 0);
+ pwm_enable(4);
- /* auto load, start Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO | COUNT_4_ON;
- timestamp = 0;
+ reset_timer_masked();
return 0;
}
@@ -104,57 +54,100 @@ int timer_init(void)
/*
* timer without interrupts
*/
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
+unsigned long get_timer(unsigned long base)
{
- ulong now = read_timer();
+ return get_timer_masked() - base;
+}
- if (lastdec >= now) {
- /* normal mode */
- timestamp += lastdec - now;
+/* delay x useconds */
+void __udelay(unsigned long usec)
+{
+ struct s3c_timer *timer = s3c_get_base_timer();
+ unsigned long tmo, tmp, count_value;
+
+ count_value = readl(&timer->tcntb4);
+
+ if (usec >= 1000) {
+ /*
+* if "big" number, spread normalization
+* to seconds
+* 1. start to normalize for usec to ticks per sec
+* 2. find number of "ticks" to wait to achieve target
+* 3. finish normalize.
+*/
+ tmo = usec / 1000;
+ tmo *= (CONFIG_SYS_HZ * count_value);
+ tmo /= 1000;
} else {
- /* we have an overflow ... */
- timestamp += lastdec + timer_load_val - now;
+ /* else small number, don't kill
[U-Boot] [V3 04/15] S3C64XX: add pwm for s3c64xx support
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V3:
- None.
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_nand function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |1 +
arch/arm/cpu/arm1176/s3c64xx/pwm.c | 189 +++
arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 56 ++---
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 59 -
include/configs/smdk6400.h |3 +
6 files changed, 272 insertions(+), 106 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm.h
delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 0785b19..93f 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -32,6 +32,7 @@ SOBJS = reset.o
COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM) += pwm.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
new file mode 100644
index 000..d46470a
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2012
+ *
+ * Zhong Hongbo
+ *
+ * based on arch/arm/cpu/armv7/s5p-common/sromc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int pwm_enable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon |= TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon &= ~TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_PCLK();
+
+ for (div = 2; div <= 16; div *= 2) {
+ if ((tin_parent_rate / (div << 16)) < freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long tcmp;
+
+ /*
+* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits.
+*/
+ if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns > period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+
+ /* Note, counters count down */
+ tcmp = duty_ns / tin_ns;
+ tcmp = tcnt - tcmp;
+
+ /*
+* the pwm hw only checks the compare register after a decrement,
+* so the pin never toggles if tcmp = tcnt
+*/
+ if (tcmp == tcnt)
+ tcmp--;
+
+ if (tcmp < 0)
+ tcmp = 0;
+
+ /* Update the PWM register block. */
+ offset = pwm_id * 3;
+ if (pwm_id < 4) {
+ writel(tcnt, &pwm->tcntb0 + offset);
+ wri
[U-Boot] [V3 03/15] S3C64XX: Use readl/writel to operate uart
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for v3:
- None.
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_uart function.
- Delete const for the local variable.
---
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 65 +--
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 31 -
arch/arm/include/asm/arch-s3c64xx/uart.h| 54 ++
board/samsung/smdk6400/lowlevel_init.S |8 ---
drivers/serial/s3c64xx.c| 50 +
5 files changed, 87 insertions(+), 121 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/uart.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index d6c5dd9..77b9509 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -582,62 +582,6 @@
*/
#define ELFIN_UART_BASE0x7F005000
-#define ELFIN_UART0_OFFSET 0x
-#define ELFIN_UART1_OFFSET 0x0400
-#define ELFIN_UART2_OFFSET 0x0800
-
-#define ULCON_OFFSET 0x00
-#define UCON_OFFSET0x04
-#define UFCON_OFFSET 0x08
-#define UMCON_OFFSET 0x0C
-#define UTRSTAT_OFFSET 0x10
-#define UERSTAT_OFFSET 0x14
-#define UFSTAT_OFFSET 0x18
-#define UMSTAT_OFFSET 0x1C
-#define UTXH_OFFSET0x20
-#define URXH_OFFSET0x24
-#define UBRDIV_OFFSET 0x28
-#define UDIVSLOT_OFFSET0x2C
-#define UINTP_OFFSET 0x30
-#define UINTSP_OFFSET 0x34
-#define UINTM_OFFSET 0x38
-
-#define ULCON0_REG __REG(0x7F005000)
-#define UCON0_REG __REG(0x7F005004)
-#define UFCON0_REG __REG(0x7F005008)
-#define UMCON0_REG __REG(0x7F00500C)
-#define UTRSTAT0_REG __REG(0x7F005010)
-#define UERSTAT0_REG __REG(0x7F005014)
-#define UFSTAT0_REG__REG(0x7F005018)
-#define UMSTAT0_REG__REG(0x7F00501c)
-#define UTXH0_REG __REG(0x7F005020)
-#define URXH0_REG __REG(0x7F005024)
-#define UBRDIV0_REG__REG(0x7F005028)
-#define UDIVSLOT0_REG __REG(0x7F00502c)
-#define UINTP0_REG __REG(0x7F005030)
-#define UINTSP0_REG__REG(0x7F005034)
-#define UINTM0_REG __REG(0x7F005038)
-
-#define ULCON1_REG __REG(0x7F005400)
-#define UCON1_REG __REG(0x7F005404)
-#define UFCON1_REG __REG(0x7F005408)
-#define UMCON1_REG __REG(0x7F00540C)
-#define UTRSTAT1_REG __REG(0x7F005410)
-#define UERSTAT1_REG __REG(0x7F005414)
-#define UFSTAT1_REG__REG(0x7F005418)
-#define UMSTAT1_REG__REG(0x7F00541c)
-#define UTXH1_REG __REG(0x7F005420)
-#define URXH1_REG __REG(0x7F005424)
-#define UBRDIV1_REG__REG(0x7F005428)
-#define UDIVSLOT1_REG __REG(0x7F00542c)
-#define UINTP1_REG __REG(0x7F005430)
-#define UINTSP1_REG__REG(0x7F005434)
-#define UINTM1_REG __REG(0x7F005438)
-
-#define UTRSTAT_TX_EMPTY (1 << 2)
-#define UTRSTAT_RX_READY (1 << 0)
-#define UART_ERR_MASK 0xF
-
/*
* PWM timer
*/
@@ -804,17 +748,12 @@
#define DMC_DDR_USER_CONFIG1
#ifndef __ASSEMBLY__
-enum s3c64xx_uarts_nr {
- S3C64XX_UART0,
- S3C64XX_UART1,
- S3C64XX_UART2,
-};
#include "s3c64x0.h"
-static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
+static inline unsigned long s3c64xx_get_base_uart(void)
{
- return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
+ return ELFIN_UART_BASE;
}
static inline unsigned long s3c64xx_get_base_nand(void)
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
index 0bbf1d0..7add68c 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
@@ -40,37 +40,6 @@
#include
-/* UART (see manual chapter 11) */
-typedef struct {
- volatile u32ULCON;
- volatile u32UCON;
- volatile u32UFCON;
- volatile u32UMCON;
- volatile u32UTRSTAT;
- volatile u32UERSTAT;
- volatile u32UFSTAT;
- volatile u32UMSTAT;
-#ifdef __BIG_ENDIAN
- volatile u8 res1[3];
- volatile u8 UTXH;
- volatile u8 res2[3];
- volatile u8 URXH;
-#else /* Little Endian */
- volatile u8 UTXH;
- volatile u8 res1[3];
- volatile u8 URXH;
- volatile u8 res2[3];
-#endif
- volatile u32UBRDIV;
-#ifdef __BIG_ENDIAN
- volatile u8 res3[2];
- volatile u16UDIVSLOT;
-#else
- volatile u16UDIVSLOT;
- volatile u8 res3[2];
-
[U-Boot] [V3 02/15] S3C64XX: Switch to use readl/writel to operate nand flash
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V3:
- Replace the magic numbers with variable name.
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_uart function.
- Delete const for the local variable.
---
arch/arm/include/asm/arch-s3c64xx/nand.h| 72
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 79 ++-
board/samsung/smdk6400/lowlevel_init.S |1 +
drivers/mtd/nand/s3c64xx.c | 58 +---
4 files changed, 116 insertions(+), 94 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/nand.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/nand.h
b/arch/arm/include/asm/arch-s3c64xx/nand.h
new file mode 100644
index 000..a1bf3ab
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/nand.h
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_NAND_H__
+#define __ASM_ARCH_NAND_H__
+
+#define NFCONF_OFFSET 0x00
+#define NFCONT_OFFSET 0x04
+
+#define NFCONF_ECC_4BIT(1<<24)
+
+#define NFCONT_ECC_ENC (1<<18)
+#define NFCONT_WP (1<<16)
+#define NFCONT_MECCLOCK(1<<7)
+#define NFCONT_SECCLOCK(1<<6)
+#define NFCONT_INITMECC(1<<5)
+#define NFCONT_INITSECC(1<<4)
+#define NFCONT_INITECC (NFCONT_INITMECC | NFCONT_INITSECC)
+#define NFCONT_CS_ALT (1<<2)
+#define NFCONT_CS (1<<1)
+#define NFCONT_ENABLE (1<<0)
+
+#define NFSTAT_ECCENCDONE (1<<7)
+#define NFSTAT_ECCDECDONE (1<<6)
+#define NFSTAT_RnB (1<<0)
+
+#define NFESTAT0_ECCBUSY (1<<31)
+
+#ifndef __ASSEMBLY__
+/* NAND FLASH */
+struct s3c64xx_nand {
+ u32 nfconf;
+ u32 nfcont;
+ u32 nfcmmd;
+ u32 nfaddr;
+ u32 nfdata;
+ u32 nfmeccdata0;
+ u32 nfmeccdata1;
+ u32 nfseccdata0;
+ u32 nfsblk;
+ u32 nfeblk;
+ u32 nfstat;
+ u32 nfestat0;
+ u32 nfestat1;
+ u32 nfmecc0;
+ u32 nfmecc1;
+ u32 nfsecc;
+ u32 nfmlcbitpt;
+};
+#endif
+
+#endif
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 10b3324..d6c5dd9 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -556,80 +556,6 @@
*/
#define ELFIN_NAND_BASE0x7020
-#define NFCONF_OFFSET 0x00
-#define NFCONT_OFFSET 0x04
-#define NFCMMD_OFFSET 0x08
-#define NFADDR_OFFSET 0x0c
-#define NFDATA_OFFSET 0x10
-#define NFMECCDATA0_OFFSET 0x14
-#define NFMECCDATA1_OFFSET 0x18
-#define NFSECCDATA0_OFFSET 0x1c
-#define NFSBLK_OFFSET 0x20
-#define NFEBLK_OFFSET 0x24
-#define NFSTAT_OFFSET 0x28
-#define NFESTAT0_OFFSET0x2c
-#define NFESTAT1_OFFSET0x30
-#define NFMECC0_OFFSET 0x34
-#define NFMECC1_OFFSET 0x38
-#define NFSECC_OFFSET 0x3c
-#define NFMLCBITPT_OFFSET 0x40
-
-#define NFCONF (ELFIN_NAND_BASE + NFCONF_OFFSET)
-#define NFCONT (ELFIN_NAND_BASE + NFCONT_OFFSET)
-#define NFCMMD (ELFIN_NAND_BASE + NFCMMD_OFFSET)
-#define NFADDR (ELFIN_NAND_BASE + NFADDR_OFFSET)
-#define NFDATA (ELFIN_NAND_BASE + NFDATA_OFFSET)
-#define NFMECCDATA0(ELFIN_NAND_BASE + NFMECCDATA0_OFFSET)
-#define NFMECCDATA1(ELFIN_NAND_BASE + NFMECCDATA1_OFFSET)
-#define NFSECCDATA0(ELFIN_NAND_BASE + NFSECCDATA0_OFFSET)
-#define NFSBLK (ELFIN_NAND_BASE + NFSBLK_OFFSET)
-#define NFEBLK (ELFIN_NAND_BASE + NFEBLK_OFFSET)
-#define NFSTAT (ELFIN_NAND_BASE + NFSTAT_OFFSET)
-#define NFESTAT0 (ELFIN_NAND_BASE + NFESTAT0_OFFSET)
[U-Boot] [V3 01/15] smdk6400: Move smdk6400 board from Makefile to boards.cfg
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V3: - None Change for V2: - None --- Makefile | 20 board/samsung/smdk6400/config.mk |4 +--- boards.cfg |2 ++ include/configs/smdk6400.h |2 +- 4 files changed, 4 insertions(+), 24 deletions(-) diff --git a/Makefile b/Makefile index d57c15e..8af1d5d 100644 --- a/Makefile +++ b/Makefile @@ -711,26 +711,6 @@ SX1_config:unconfig fi; @$(MKCONFIG) -n $@ SX1 arm arm925t sx1 -# -## ARM1176 Systems -# -smdk6400_noUSB_config \ -smdk6400_config: unconfig - @mkdir -p $(obj)include $(obj)board/samsung/smdk6400 - @mkdir -p $(obj)nand_spl/board/samsung/smdk6400 - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then \ - echo "RAM_TEXT = 0x57e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - else \ - echo "RAM_TEXT = 0xc7e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - fi - @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - -# -# - clean: @rm -f $(obj)examples/standalone/82559_eeprom \ $(obj)examples/standalone/atmel_df_pow2\ diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk index 6f04c2f..93a1a0d 100644 --- a/board/samsung/smdk6400/config.mk +++ b/board/samsung/smdk6400/config.mk @@ -21,10 +21,8 @@ # # download area is 0x5000c000 -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - ifndef CONFIG_NAND_SPL -CONFIG_SYS_TEXT_BASE = $(RAM_TEXT) +CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT) else CONFIG_SYS_TEXT_BASE = 0 endif diff --git a/boards.cfg b/boards.cfg index 2d36d83..0363b41 100644 --- a/boards.cfg +++ b/boards.cfg @@ -47,6 +47,8 @@ flea3arm arm1136 - CarMedi mx35pdk arm arm1136 - freescale mx35 apollon arm arm1136 apollon - omap24xx omap2420h4 arm arm1136 - ti omap24xx +smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0xc7e0 +smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0x57e0 tnetv107x_evmarm arm1176 tnetv107xevmti tnetv107x integratorap_cm720t arm arm720t integrator armltd - integratorap:CM720T integratorap_cm920t arm arm920t integrator armltd - integratorap:CM920T diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 04caeef..47326d6 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -54,7 +54,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ1200 -#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc000) +#if !defined(CONFIG_NAND_U_BOOT) && (CONFIG_SYS_TEXT_BASE >= 0xc000) #define CONFIG_ENABLE_MMU #endif -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] V3: S3c64xx: Switch all I/O to use readl/writel functio and Clear variable
V3: 1. Replace ELFIN with S3C64XX for all the variable of cpu.h. 2. Change __S3C6400_H__ into __CPU__H__. 3. Use C language to implement memory initialization. 4. Use C language to re-write reset function. 5. Delete u-boot-nand.lds. V2: 1. Modify the type of return for s3c64xx_get_base_nand 2. Add patch 0014 to support s3c6410 board 3. Adjust patch for mix content. V1: This serial patch intent to: 1. Switch all I/O to use readl/writel function 2. Change nand_spl to use SPL framework 3. S3C64XX serial includes s3c6400 and s3c6410, Here seprate cpu and board file to support to board's of s3c6410. I test this patch on my s3c6410 development board. the log as following: U-Boot 2012.07-rc3-00016-g351ea73 (Jul 28 2012 - 16:55:32) for DMATEK6410 CPU: S3C64XX@532MHz Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz (ASYNC Mode) Board: DMATEK6410 DRAM: 128 MiB WARNING: Caches not enabled NAND: 128 MiB *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial Net: dm9000 Zhong Hongbo (15): smdk6400: Move smdk6400 board from Makefile to boards.cfg S3C64XX: Switch to use readl/writel to operate nand flash S3C64XX: Use readl/writel to operate uart S3C64XX: add pwm for s3c64xx support S3C64XX: reference s5p cpu time system for s3c64xx timer S3C64xx: mov cpu_init.S to the board directory S3C6400: Delete nand_spl for S3C6400 S3C6400: Adopt SPL framwork to support spl for nand flash arm1176: Fixed No relocation. S3C64XX: Change SROM init to use read/write operation S3C64XX: Switch to use read/writel to operation clock system S3c64xx: clear GPIO, Interrupt, Watchdog variable. S3C6400: clear memory init variable S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board S3C6400: Remove the unused variable for S3C6400 Makefile| 20 - arch/arm/cpu/arm1176/s3c64xx/Makefile |7 +- arch/arm/cpu/arm1176/s3c64xx/cpu_init.S | 135 arch/arm/cpu/arm1176/s3c64xx/pwm.c | 188 + arch/arm/cpu/arm1176/s3c64xx/reset.S| 34 - arch/arm/cpu/arm1176/s3c64xx/reset.c| 39 + arch/arm/cpu/arm1176/s3c64xx/speed.c| 52 +- arch/arm/cpu/arm1176/s3c64xx/srom.c | 51 ++ arch/arm/cpu/arm1176/s3c64xx/timer.c| 195 +++--- arch/arm/cpu/arm1176/start.S| 17 +- arch/arm/include/asm/arch-s3c64xx/clock.h | 163 arch/arm/include/asm/arch-s3c64xx/cpu.h | 89 +++ arch/arm/include/asm/arch-s3c64xx/dmc.h | 62 ++ arch/arm/include/asm/arch-s3c64xx/gpio.h| 38 + arch/arm/include/asm/arch-s3c64xx/interrupt.h | 31 + arch/arm/include/asm/arch-s3c64xx/nand.h| 72 ++ arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++ arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 895 --- arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 90 --- arch/arm/include/asm/arch-s3c64xx/sromc.h | 49 ++ arch/arm/include/asm/arch-s3c64xx/uart.h| 54 ++ board/samsung/smdk6400/Makefile | 30 +- board/samsung/smdk6400/config.mk| 30 - board/samsung/smdk6400/dmc_init.c | 110 +++ board/samsung/smdk6400/lowlevel_init.S | 76 +- board/samsung/smdk6400/setup.h | 137 board/samsung/smdk6400/smdk6400.c | 40 +- board/samsung/smdk6400/smdk6400_nand_spl.c | 61 ++- board/samsung/smdk6400/tools/mksmdk6400_image.c | 117 +++ board/samsung/smdk6400/u-boot-nand.lds | 84 --- boards.cfg |2 + drivers/mtd/nand/s3c64xx.c | 64 +- drivers/serial/s3c64xx.c| 52 +- drivers/usb/host/s3c64xx-hcd.c | 32 +- include/configs/smdk6400.h | 40 +- nand_spl/board/samsung/smdk6400/Makefile| 117 --- nand_spl/board/samsung/smdk6400/config.mk | 40 - nand_spl/board/samsung/smdk6400/u-boot.lds | 78 -- 38 files changed, 1668 insertions(+), 1793 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.S create mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.c create mode 100644 arch/arm/cpu/arm1176/s3c64xx/srom.c create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/dmc.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/gpio.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/interrupt.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/nand.h create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm.h delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h c
Re: [U-Boot] [V2 14/15] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board
Hi Minkyu, On 07/24/2012 10:38 AM, Minkyu Kang wrote: > Dear Zhong Hongbo, > > On 14 July 2012 01:11, Zhong Hongbo wrote: >> From: Zhong Hongbo >> >> Signed-off-by: Zhong Hongbo >> --- >> Change for V2: >> - New. >> --- >> arch/arm/cpu/arm1176/s3c64xx/pwm.c |2 +- >> arch/arm/cpu/arm1176/s3c64xx/reset.S|2 +- >> arch/arm/cpu/arm1176/s3c64xx/speed.c|2 +- >> arch/arm/cpu/arm1176/s3c64xx/srom.c |2 +- >> arch/arm/cpu/arm1176/s3c64xx/timer.c|2 +- >> arch/arm/include/asm/arch-s3c64xx/cpu.h | 83 >> ++ >> arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 84 >> --- >> board/samsung/smdk6400/lowlevel_init.S |2 +- >> board/samsung/smdk6400/mem_init.S |2 +- >> board/samsung/smdk6400/smdk6400.c |2 +- >> drivers/mtd/nand/s3c64xx.c |2 +- >> drivers/serial/s3c64xx.c|2 +- >> drivers/usb/host/s3c64xx-hcd.c |2 +- >> 13 files changed, 94 insertions(+), 95 deletions(-) >> create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h >> delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h >> >> diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c >> b/arch/arm/cpu/arm1176/s3c64xx/pwm.c >> index d1d70ff..02822fc 100644 >> --- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c >> +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c >> @@ -28,7 +28,7 @@ >> #include >> #include >> #include >> -#include >> +#include >> #include >> >> int pwm_enable(int pwm_id) >> diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S >> b/arch/arm/cpu/arm1176/s3c64xx/reset.S >> index 9e5ee84..ee96d6c 100644 >> --- a/arch/arm/cpu/arm1176/s3c64xx/reset.S >> +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S >> @@ -21,7 +21,7 @@ >> * MA 02111-1307 USA >> */ >> >> -#include >> +#include >> >> .globl reset_cpu >> reset_cpu: >> diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c >> b/arch/arm/cpu/arm1176/s3c64xx/speed.c >> index 05b44b9..5e68090 100644 >> --- a/arch/arm/cpu/arm1176/s3c64xx/speed.c >> +++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c >> @@ -32,7 +32,7 @@ >> >> #include >> #include >> -#include >> +#include >> #include >> >> #define APLL 0 >> diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c >> b/arch/arm/cpu/arm1176/s3c64xx/srom.c >> index f1b2b34..92fb7af 100644 >> --- a/arch/arm/cpu/arm1176/s3c64xx/srom.c >> +++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c >> @@ -25,7 +25,7 @@ >> #include >> #include >> #include >> -#include >> +#include >> /* >> * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the >> * band width control and bank control registers >> diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c >> b/arch/arm/cpu/arm1176/s3c64xx/timer.c >> index 47d7731..eebd0c0 100644 >> --- a/arch/arm/cpu/arm1176/s3c64xx/timer.c >> +++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c >> @@ -25,7 +25,7 @@ >> >> #include >> #include >> -#include >> +#include >> #include >> #include >> >> diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h >> b/arch/arm/include/asm/arch-s3c64xx/cpu.h >> new file mode 100644 >> index 000..5c8dd9d >> --- /dev/null >> +++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h >> @@ -0,0 +1,83 @@ >> +/* >> + * (C) Copyright 2007 >> + * Byungjae Lee, Samsung Erectronics, bj...@samsung.com. >> + * - only support for S3C6400 >> + * >> + * (C) Copyright 2008 >> + * Guennadi Liakhovetki, DENX Software Engineering, >> + * >> + * This program is free software; you can redistribute it and/or >> + * modify it under the terms of the GNU General Public License as >> + * published by the Free Software Foundation; either version 2 of >> + * the License, or (at your option) any later version. >> + * >> + * This program is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + * >> + * You should have received a copy of the GNU General Public License >> + * along with this program; if not, write to the Free Software >> + * Foundation, Inc., 59 Temple Place, S
Re: [U-Boot] [V2 11/15] S3C64XX: Switch to use read/writel to operation clock system
On 07/24/2012 04:58 PM, Minkyu Kang wrote: > Dear Zhong Hongbo, > > On 14 July 2012 01:11, Zhong Hongbo wrote: >> From: Zhong Hongbo >> >> Switch to use read/writel function and clear the relevant variable. >> >> Signed-off-by: Zhong Hongbo >> --- >> Change for V2: >> - merge clock patch. >> - Change the type of return for s3c64xx_get_base_clock function. >> --- >> arch/arm/cpu/arm1176/s3c64xx/reset.S|4 +- >> arch/arm/cpu/arm1176/s3c64xx/speed.c| 50 +-- >> arch/arm/include/asm/arch-s3c64xx/clock.h | 147 ++ >> arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 219 >> +-- >> board/samsung/smdk6400/lowlevel_init.S | 64 - >> drivers/usb/host/s3c64xx-hcd.c | 30 - >> 6 files changed, 243 insertions(+), 271 deletions(-) >> create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h >> >> diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S >> b/arch/arm/cpu/arm1176/s3c64xx/reset.S >> index eae572e..9e5ee84 100644 >> --- a/arch/arm/cpu/arm1176/s3c64xx/reset.S >> +++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S >> @@ -26,9 +26,9 @@ >> .globl reset_cpu >> reset_cpu: >> ldr r1, =ELFIN_CLOCK_POWER_BASE >> - ldr r2, [r1, #SYS_ID_OFFSET] >> + ldr r2, [r1, #0x118]@ SYS_ID_OFFSET >> ldr r3, =0x >> and r2, r3, r2, lsr #12 >> - str r2, [r1, #SW_RST_OFFSET] >> + str r2, [r1, #0x114]@ SW_RST_OFFSET > > Don't use magic numbers. Ok, I will keep the old method. > And I think this file can be converted to C file. Yes, I will do it. > >> _loop_forever: >> b _loop_forever >> diff --git a/board/samsung/smdk6400/lowlevel_init.S >> b/board/samsung/smdk6400/lowlevel_init.S >> index 6cc7567..79d5ab3 100644 >> --- a/board/samsung/smdk6400/lowlevel_init.S >> +++ b/board/samsung/smdk6400/lowlevel_init.S >> @@ -106,7 +106,7 @@ lowlevel_init: >> #endif >> >> /* Wakeup support. Don't know if it's going to be used, untested. */ >> - ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) >> + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0x904) @ RST_STAT_OFFSET >> ldr r1, [r0] >> bic r1, r1, #0xfff7 >> cmp r1, #0x8 >> @@ -119,23 +119,24 @@ lowlevel_init: >> wakeup_reset: >> >> /* Clear wakeup status register */ >> - ldr r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET) >> + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0x908) @ WAKEUP_STAT_OFFSET >> ldr r1, [r0] >> str r1, [r0] >> >> /* LED test */ >> ldr r0, =ELFIN_GPIO_BASE >> ldr r1, =0x3000 >> - str r1, [r0, #GPNDAT_OFFSET] >> + str r1, [r0, #0x834]@ GPNDAT_OFFSET >> >> /* Load return address and jump to kernel */ >> - ldr r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET) >> + ldr r0, =(ELFIN_CLOCK_POWER_BASE + 0xa00) @ INF_REG0_OFFSET >> /* r1 = physical address of s3c6400_cpu_resume function */ >> ldr r1, [r0] >> /* Jump to kernel (sleep-s3c6400.S) */ >> mov pc, r1 >> nop >> nop >> + >> /* >> * system_clock_init: Initialize core clock and bus clock. >> * void system_clock_init(void) >> @@ -144,10 +145,10 @@ system_clock_init: >> ldr r0, =ELFIN_CLOCK_POWER_BASE /* 0x7e00f000 */ >> >> #ifdef CONFIG_SYNC_MODE >> - ldr r1, [r0, #OTHERS_OFFSET] >> + ldr r1, [r0, #0x900]@ OTHERS_OFFSET >> mov r2, #0x40 >> orr r1, r1, r2 >> - str r1, [r0, #OTHERS_OFFSET] >> + str r1, [r0, #0x900] >> >> nop >> nop >> @@ -157,10 +158,10 @@ system_clock_init: >> >> ldr r2, =0x80 >> orr r1, r1, r2 >> - str r1, [r0, #OTHERS_OFFSET] >> + str r1, [r0, #0x900] >> >> check_syncack: >> - ldr r1, [r0, #OTHERS_OFFSET] >> + ldr r1, [r0, #0x900] >> ldr r2, =0xf00 >> and r1, r1, r2 >> cmp r1, #0xf00 >> @@ -177,69 +178,58 @@ check_syncack: >> * seem to make much sense on S3C6400. >> */ >> #ifndef CONFIG_S3C6400 >> - ldr
[U-Boot] [PATCH] disk/partition: Fix the depend for all the partitions file
From: Zhong Hongbo
all the patitions should depend CONFIG_PARTITIONS, no the
CONFIG_CMD_$(device). The device symbol may be SATA, SCSI,
USB, MMC, SYSTEMACE. Or else when the filesystem command be
enabled, But board's configure file can not include any
CONFIG_CMD_$(device), The u-boot will fail build. For example:
CONFIG_CMD_EXT2 is defined in smdk6400.h, but the boards can
not define any disk device. The error of build as following:
---
disk/part.c | 21 +++--
disk/part_amiga.c |6 +-
disk/part_dos.c |7 +--
disk/part_efi.c |7 +--
disk/part_iso.c |7 +--
disk/part_mac.c |7 +--
6 files changed, 8 insertions(+), 47 deletions(-)
diff --git a/disk/part.c b/disk/part.c
index 76f3939..d296a55 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -34,12 +34,7 @@
#define PRINTF(fmt,args...)
#endif
-#if (defined(CONFIG_CMD_IDE) || \
- defined(CONFIG_CMD_SATA) || \
- defined(CONFIG_CMD_SCSI) || \
- defined(CONFIG_CMD_USB) || \
- defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
+#ifdef CONFIG_PARTITIONS
struct block_drvr {
char *name;
@@ -103,12 +98,7 @@ block_dev_desc_t *get_dev(char* ifname, int dev)
}
#endif
-#if (defined(CONFIG_CMD_IDE) || \
- defined(CONFIG_CMD_SATA) || \
- defined(CONFIG_CMD_SCSI) || \
- defined(CONFIG_CMD_USB) || \
- defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
+#ifdef CONFIG_PARTITIONS
/* - */
/*
@@ -238,12 +228,7 @@ void dev_print (block_dev_desc_t *dev_desc)
}
#endif
-#if (defined(CONFIG_CMD_IDE) || \
- defined(CONFIG_CMD_SATA) || \
- defined(CONFIG_CMD_SCSI) || \
- defined(CONFIG_CMD_USB) || \
- defined(CONFIG_MMC) || \
- defined(CONFIG_SYSTEMACE) )
+#ifdef CONFIG_PARTITIONS
#if defined(CONFIG_MAC_PARTITION) || \
defined(CONFIG_DOS_PARTITION) || \
diff --git a/disk/part_amiga.c b/disk/part_amiga.c
index dc7d462..5df55c8 100644
--- a/disk/part_amiga.c
+++ b/disk/part_amiga.c
@@ -26,11 +26,7 @@
#include
#include "part_amiga.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
#undef AMIGA_DEBUG
diff --git a/disk/part_dos.c b/disk/part_dos.c
index a43dd9c..b49ebe2 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -35,12 +35,7 @@
#include
#include "part_dos.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* Convert char[4] in little endian format to the host format integer
*/
diff --git a/disk/part_efi.c b/disk/part_efi.c
index 02927a0..22dc0ea 100644
--- a/disk/part_efi.c
+++ b/disk/part_efi.c
@@ -37,12 +37,7 @@
#include "part_efi.h"
#include
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* Convert char[2] in little endian format to the host format integer
*/
diff --git a/disk/part_iso.c b/disk/part_iso.c
index 4401790..f929563 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -25,12 +25,7 @@
#include
#include "part_iso.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* #define ISO_PART_DEBUG */
diff --git a/disk/part_mac.c b/disk/part_mac.c
index c1afc8c..c3b2aa3 100644
--- a/disk/part_mac.c
+++ b/disk/part_mac.c
@@ -34,12 +34,7 @@
#include
#include "part_mac.h"
-#if defined(CONFIG_CMD_IDE) || \
-defined(CONFIG_CMD_SCSI) || \
-defined(CONFIG_CMD_SATA) || \
-defined(CONFIG_CMD_USB) || \
-defined(CONFIG_MMC) || \
-defined(CONFIG_SYSTEMACE)
+#ifdef CONFIG_PARTITIONS
/* stdlib.h causes some compatibility problems; should fixe these! -- wd */
#ifndef __ldiv_t_defined
--
1.7.5.4
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[U-Boot] [PATCH] SMDK6400: Add MAINTAINERS entry
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- MAINTAINERS |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index fd0c65c..84413de 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -959,6 +959,10 @@ Vladimir Zapolskiy devkit3250 lpc32xx +Zhong Hongbo + + SMDK6400ARM1176 (S3C6400 SoC) + - Unknown / orphaned boards: @@ -971,7 +975,6 @@ Unknown / orphaned boards: imx31_phycore_eet i.MX31 Guennadi Liakhovetski / resigned mx31ads i.MX31 Guennadi Liakhovetski / resigned - SMDK6400 S3C6400 Guennadi Liakhovetski / resigned # # x86 Systems: # -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] SMDK6400: Add MAINTAINERS entry
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- MAINTAINERS |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index fd0c65c..84413de 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -959,6 +959,10 @@ Vladimir Zapolskiy devkit3250 lpc32xx +Zhong Hongbo + + SMDK6400ARM1176 (S3C6400 SoC) + - Unknown / orphaned boards: @@ -971,7 +975,6 @@ Unknown / orphaned boards: imx31_phycore_eet i.MX31 Guennadi Liakhovetski / resigned mx31ads i.MX31 Guennadi Liakhovetski / resigned - SMDK6400 S3C6400 Guennadi Liakhovetski / resigned # # x86 Systems: # -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] I apply to maintain S3C6400 board for u-boot
Hi Wolfgang Denk, On 07/20/2012 03:11 PM, Wolfgang Denk wrote: > Dear Hongbo, > > In message <5007fbbf.7040...@gmail.com> you wrote: >> >> I get some information from MAINTAINERS file. I know The board of >> S3C6400 is a orphaned board. Also I have not the board, But I have a >> S3C6410 board in my hand. In my development u-boot for my board, I know >> the S3C6410 replace the s3c6400, and they use the same arm1176 >> architecture. So I think that I can help do a little thing for S3C6400's >> u-boot. > > Thanks for volunteering. If you want to take over responsbility for a > board (even an orphaned one) then please send a patch that adds you to > the MAINTAINERS file. OK > >> In the recently, I send the patch serial of S3C6400. This patch >> is very important for S3C64XX. It clear the old method to operate the >> I/O port, and adopt the new SPL boot to reduce the code number. I expect >> get the advice for this patch. But I wait for a long time, I do not know >> who can help me to review this patch? who can merge this patch? > > Please don't be discouraged by missing comments - in general the rule > is "No news is Good News", i. e. receiving no comments is often better > than receiving a large number of deep-going change requests ;-) Good to know. > > These boards use Samsung SoCs, so the Samsung custodian (Minkyu Kang, > on cc:) is supposed to process these, but please note that the merge > window is currently closed, which might explain for lack of comments. Thanks for your explanation. Thanks, hongbo > >> If anyone believe me, I will continue to maintain the board, Maybe I >> have some limitation, Such as I have a poor english. But I believe I >> can keep the board can work normal in u-boot mainline, and I will reply >> the email about S3C64xx CPU in time. > > Thanks you very much in advance. Your efforts are highly appreciated. > > Best regards, > > Wolfgang Denk > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V2 04/15] S3C64XX: add pwm for s3c64xx support
Hi Minkyu,
I notice this patch are delegated to you. But the patchwork miss the
patch 4.
If you need me to do anything, Please let me know.
Thanks,
hongbo
On 07/14/2012 12:11 AM, Zhong Hongbo wrote:
> From: Zhong Hongbo
>
> Signed-off-by: Zhong Hongbo
> ---
> Change for V2:
> - Change the type of the return value from unsinged int
> to unsinged long for s3c64xx_get_base_nand function.
> ---
> arch/arm/cpu/arm1176/s3c64xx/Makefile |1 +
> arch/arm/cpu/arm1176/s3c64xx/pwm.c | 189
> +++
> arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++
> arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 56 ++---
> arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 59 -
> include/configs/smdk6400.h |3 +
> 6 files changed, 272 insertions(+), 106 deletions(-)
> create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c
> create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm.h
> delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
>
> diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
> b/arch/arm/cpu/arm1176/s3c64xx/Makefile
> index 0785b19..93f 100644
> --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
> +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
> @@ -32,6 +32,7 @@ SOBJS = reset.o
>
> COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o
> COBJS-y += timer.o
> +COBJS-$(CONFIG_PWM) += pwm.o
>
> OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
>
> diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
> b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
> new file mode 100644
> index 000..d1d70ff
> --- /dev/null
> +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
> @@ -0,0 +1,189 @@
> +/*
> + * Copyright (C) 2012
> + *
> + * Zhong Hongbo
> + *
> + * based on arch/arm/cpu/armv7/s5p-common/sromc.c
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +int pwm_enable(int pwm_id)
> +{
> + const struct s3c_timer *pwm =
> + (struct s3c_timer *)s3c64xx_get_base_timer();
> + unsigned long tcon;
> +
> + tcon = readl(&pwm->tcon);
> + tcon |= TCON_START(pwm_id);
> +
> + writel(tcon, &pwm->tcon);
> +
> + return 0;
> +}
> +
> +void pwm_disable(int pwm_id)
> +{
> + const struct s3c_timer *pwm =
> + (struct s3c_timer *)s3c64xx_get_base_timer();
> + unsigned long tcon;
> +
> + tcon = readl(&pwm->tcon);
> + tcon &= ~TCON_START(pwm_id);
> +
> + writel(tcon, &pwm->tcon);
> +}
> +
> +static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
> +{
> + unsigned long tin_parent_rate;
> + unsigned int div;
> +
> + tin_parent_rate = get_PCLK();
> +
> + for (div = 2; div <= 16; div *= 2) {
> + if ((tin_parent_rate / (div << 16)) < freq)
> + return tin_parent_rate / div;
> + }
> +
> + return tin_parent_rate / 16;
> +}
> +
> +#define NS_IN_HZ (10UL)
> +
> +int pwm_config(int pwm_id, int duty_ns, int period_ns)
> +{
> + const struct s3c_timer *pwm =
> + (struct s3c_timer *)s3c64xx_get_base_timer();
> + unsigned int offset;
> + unsigned long tin_rate;
> + unsigned long tin_ns;
> + unsigned long period;
> + unsigned long tcon;
> + unsigned long tcnt;
> + unsigned long tcmp;
> +
> + /*
> + * We currently avoid using 64bit arithmetic by using the
> + * fact that anything faster than 1GHz is easily representable
> + * by 32bits.
> + */
> + if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
> + return -ERANGE;
> +
> + if (duty_ns > period_ns)
> + return -E
Re: [U-Boot] I apply to maintain S3C6400 board for u-boot
On 07/19/2012 08:21 PM, Zhong Hongbo wrote: > Hi Denx, > > I get some information from MAINTAINERS file. I know The board of > S3C6400 is a orphaned board. Also I have not the board, But I have a > S3C6410 board in my hand. In my development u-boot for my board, I know > the S3C6410 replace the s3c6400, and they use the same arm1176 > architecture. So I think that I can help do a little thing for S3C6400's > u-boot. > > In the recently, I send the patch serial of S3C6400. This patch > is very important for S3C64XX. It clear the old method to operate the > I/O port, and adopt the new SPL boot to reduce the code number. I expect > get the advice for this patch. But I wait for a long time, I do not know > who can help me to review this patch? who can merge this patch? Sorry, I check the patchwork. I found this patch are delegated to Minkyu Kang. But I can not receive the notify email. Thanks, hongbo > > If anyone believe me, I will continue to maintain the board, Maybe I > have some limitation, Such as I have a poor english. But I believe I > can keep the board can work normal in u-boot mainline, and I will reply > the email about S3C64xx CPU in time. > > What do you think it? > > Thanks > hongbo > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] I apply to maintain S3C6400 board for u-boot
Hi Denx, I get some information from MAINTAINERS file. I know The board of S3C6400 is a orphaned board. Also I have not the board, But I have a S3C6410 board in my hand. In my development u-boot for my board, I know the S3C6410 replace the s3c6400, and they use the same arm1176 architecture. So I think that I can help do a little thing for S3C6400's u-boot. In the recently, I send the patch serial of S3C6400. This patch is very important for S3C64XX. It clear the old method to operate the I/O port, and adopt the new SPL boot to reduce the code number. I expect get the advice for this patch. But I wait for a long time, I do not know who can help me to review this patch? who can merge this patch? If anyone believe me, I will continue to maintain the board, Maybe I have some limitation, Such as I have a poor english. But I believe I can keep the board can work normal in u-boot mainline, and I will reply the email about S3C64xx CPU in time. What do you think it? Thanks hongbo ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [V2 04/15] S3C64XX: add pwm for s3c64xx support
resend again, I receive Message undeliverable
On 07/14/2012 12:11 AM, Zhong Hongbo wrote:
> From: Zhong Hongbo
>
> Signed-off-by: Zhong Hongbo
> ---
> Change for V2:
> - Change the type of the return value from unsinged int
> to unsinged long for s3c64xx_get_base_nand function.
> ---
> arch/arm/cpu/arm1176/s3c64xx/Makefile |1 +
> arch/arm/cpu/arm1176/s3c64xx/pwm.c | 189
> +++
> arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++
> arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 56 ++---
> arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 59 -
> include/configs/smdk6400.h |3 +
> 6 files changed, 272 insertions(+), 106 deletions(-)
> create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c
> create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm.h
> delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
>
> diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
> b/arch/arm/cpu/arm1176/s3c64xx/Makefile
> index 0785b19..93f 100644
> --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
> +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
> @@ -32,6 +32,7 @@ SOBJS = reset.o
>
> COBJS-$(CONFIG_S3C6400) += cpu_init.o speed.o
> COBJS-y += timer.o
> +COBJS-$(CONFIG_PWM) += pwm.o
>
> OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
>
> diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
> b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
> new file mode 100644
> index 000..d1d70ff
> --- /dev/null
> +++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
> @@ -0,0 +1,189 @@
> +/*
> + * Copyright (C) 2012
> + *
> + * Zhong Hongbo
> + *
> + * based on arch/arm/cpu/armv7/s5p-common/sromc.c
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +int pwm_enable(int pwm_id)
> +{
> + const struct s3c_timer *pwm =
> + (struct s3c_timer *)s3c64xx_get_base_timer();
> + unsigned long tcon;
> +
> + tcon = readl(&pwm->tcon);
> + tcon |= TCON_START(pwm_id);
> +
> + writel(tcon, &pwm->tcon);
> +
> + return 0;
> +}
> +
> +void pwm_disable(int pwm_id)
> +{
> + const struct s3c_timer *pwm =
> + (struct s3c_timer *)s3c64xx_get_base_timer();
> + unsigned long tcon;
> +
> + tcon = readl(&pwm->tcon);
> + tcon &= ~TCON_START(pwm_id);
> +
> + writel(tcon, &pwm->tcon);
> +}
> +
> +static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
> +{
> + unsigned long tin_parent_rate;
> + unsigned int div;
> +
> + tin_parent_rate = get_PCLK();
> +
> + for (div = 2; div <= 16; div *= 2) {
> + if ((tin_parent_rate / (div << 16)) < freq)
> + return tin_parent_rate / div;
> + }
> +
> + return tin_parent_rate / 16;
> +}
> +
> +#define NS_IN_HZ (10UL)
> +
> +int pwm_config(int pwm_id, int duty_ns, int period_ns)
> +{
> + const struct s3c_timer *pwm =
> + (struct s3c_timer *)s3c64xx_get_base_timer();
> + unsigned int offset;
> + unsigned long tin_rate;
> + unsigned long tin_ns;
> + unsigned long period;
> + unsigned long tcon;
> + unsigned long tcnt;
> + unsigned long tcmp;
> +
> + /*
> + * We currently avoid using 64bit arithmetic by using the
> + * fact that anything faster than 1GHz is easily representable
> + * by 32bits.
> + */
> + if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
> + return -ERANGE;
> +
> + if (duty_ns > period_ns)
> + return -EINVAL;
> +
> + period = NS_IN_HZ / period_ns;
> +
> + /* Check to see if we are changing the
[U-Boot] [V2 15/15] S3C6400: Remove the unused variable for S3C6400
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V2: - None. --- include/configs/smdk6400.h | 15 --- 1 files changed, 0 insertions(+), 15 deletions(-) diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 46241e2..b8b9d1a 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -108,9 +108,6 @@ #define CONFIG_CMD_LOADB #define CONFIG_CMD_SAVEENV #define CONFIG_CMD_NAND -#if defined(CONFIG_BOOT_ONENAND) -#define CONFIG_CMD_ONENAND -#endif #define CONFIG_CMD_PING #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT @@ -266,13 +263,6 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63} -/* None of these are currently implemented. Left from the original Samsung - * version for reference -#define CONFIG_BOOT_NOR -#define CONFIG_BOOT_MOVINAND -#define CONFIG_BOOT_ONENAND -*/ - #define CONFIG_SPL #define CONFIG_SPL_NAND #define CONFIG_SPL_NAND_SIMPLE @@ -283,11 +273,6 @@ #define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_NAND_S3C64XX -/* Unimplemented or unsupported. See comment above. -#define CONFIG_ONENAND -#define CONFIG_MOVINAND -*/ - /* Settings as above boot configuration */ #define CONFIG_ENV_IS_IN_NAND #define CONFIG_BOOTARGS"console=ttySAC,115200" -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V2 14/15] S3C64XX: Move s3c6400.h to cpu.h to support s3c6410 board
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V2:
- New.
---
arch/arm/cpu/arm1176/s3c64xx/pwm.c |2 +-
arch/arm/cpu/arm1176/s3c64xx/reset.S|2 +-
arch/arm/cpu/arm1176/s3c64xx/speed.c|2 +-
arch/arm/cpu/arm1176/s3c64xx/srom.c |2 +-
arch/arm/cpu/arm1176/s3c64xx/timer.c|2 +-
arch/arm/include/asm/arch-s3c64xx/cpu.h | 83 ++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 84 ---
board/samsung/smdk6400/lowlevel_init.S |2 +-
board/samsung/smdk6400/mem_init.S |2 +-
board/samsung/smdk6400/smdk6400.c |2 +-
drivers/mtd/nand/s3c64xx.c |2 +-
drivers/serial/s3c64xx.c|2 +-
drivers/usb/host/s3c64xx-hcd.c |2 +-
13 files changed, 94 insertions(+), 95 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/cpu.h
delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
index d1d70ff..02822fc 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
@@ -28,7 +28,7 @@
#include
#include
#include
-#include
+#include
#include
int pwm_enable(int pwm_id)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S
b/arch/arm/cpu/arm1176/s3c64xx/reset.S
index 9e5ee84..ee96d6c 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S
@@ -21,7 +21,7 @@
* MA 02111-1307 USA
*/
-#include
+#include
.globl reset_cpu
reset_cpu:
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c
b/arch/arm/cpu/arm1176/s3c64xx/speed.c
index 05b44b9..5e68090 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
@@ -32,7 +32,7 @@
#include
#include
-#include
+#include
#include
#define APLL 0
diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c
b/arch/arm/cpu/arm1176/s3c64xx/srom.c
index f1b2b34..92fb7af 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/srom.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c
@@ -25,7 +25,7 @@
#include
#include
#include
-#include
+#include
/*
* s3c64xx_config_sromc() - select the proper SROMC Bank and configure the
* band width control and bank control registers
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c
b/arch/arm/cpu/arm1176/s3c64xx/timer.c
index 47d7731..eebd0c0 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
@@ -25,7 +25,7 @@
#include
#include
-#include
+#include
#include
#include
diff --git a/arch/arm/include/asm/arch-s3c64xx/cpu.h
b/arch/arm/include/asm/arch-s3c64xx/cpu.h
new file mode 100644
index 000..5c8dd9d
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/cpu.h
@@ -0,0 +1,83 @@
+/*
+ * (C) Copyright 2007
+ * Byungjae Lee, Samsung Erectronics, bj...@samsung.com.
+ * - only support for S3C6400
+ *
+ * (C) Copyright 2008
+ * Guennadi Liakhovetki, DENX Software Engineering,
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/
+ * NAME: s3c64XX.h
+ *
+ * Based on S3C64XX User's manual Rev 0.0
+ /
+
+#ifndef __ASM_ARCH_CPU_H__
+#define __ASM_ARCH_CPU_H__
+
+#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
+#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
+#endif
+
+#define S3C64XX_UART_CHANNELS 3
+#define S3C64XX_SPI_CHANNELS 2
+
+#include
+
+#define ELFIN_CLOCK_POWER_BASE 0x7e00f000
+#define ELFIN_GPIO_BASE0x7f008000
+#define ELFIN_SROM_BASE0x7000
+#define ELFIN_DMC0_BASE0x7e00
+#define ELFIN_DMC1_BASE0x7e001000
+#define ELFIN_MEM_SYS_CFG 0x7e00f120
+#define ELFIN_NAND_BASE0x7020
+#define ELFIN_VIC0_BASE_ADDR 0x7120
+#define ELFIN_VIC1_BASE_ADDR 0x7130
+#define ELFIN_WATCHDOG_BASE0x7E004000
+#define ELFIN_UART_BASE0x7F005000
+#define ELFIN_TIMER_BASE 0x7F006000
+
+#ifndef __ASSEMBLY__
+static inline unsigned int s3c64xx_get_base_uart(void)
+{
+ return ELFIN_UART_BASE;
+}
+
+static inline
[U-Boot] [V2 13/15] S3C6400: clear memory init variable
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V2: - None. --- arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 173 +-- board/samsung/smdk6400/lowlevel_init.S | 13 +-- board/samsung/smdk6400/mem_init.S | 114 +- 3 files changed, 63 insertions(+), 237 deletions(-) diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h index 8d12cfa..6e22cd5 100644 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h @@ -41,189 +41,18 @@ #include #define ELFIN_CLOCK_POWER_BASE 0x7e00f000 - -/* - * GPIO - */ #define ELFIN_GPIO_BASE0x7f008000 - -/* - * Bus Matrix - */ -#define ELFIN_MEM_SYS_CFG 0x7e00f120 - -#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12) - -/* - * Memory controller - */ #define ELFIN_SROM_BASE0x7000 - -/* - * SDRAM Controller - */ #define ELFIN_DMC0_BASE0x7e00 #define ELFIN_DMC1_BASE0x7e001000 - -#define INDEX_DMC_MEMC_STATUS 0x00 -#define INDEX_DMC_MEMC_CMD 0x04 -#define INDEX_DMC_DIRECT_CMD 0x08 -#define INDEX_DMC_MEMORY_CFG 0x0C -#define INDEX_DMC_REFRESH_PRD 0x10 -#define INDEX_DMC_CAS_LATENCY 0x14 -#define INDEX_DMC_T_DQSS 0x18 -#define INDEX_DMC_T_MRD0x1C -#define INDEX_DMC_T_RAS0x20 -#define INDEX_DMC_T_RC 0x24 -#define INDEX_DMC_T_RCD0x28 -#define INDEX_DMC_T_RFC0x2C -#define INDEX_DMC_T_RP 0x30 -#define INDEX_DMC_T_RRD0x34 -#define INDEX_DMC_T_WR 0x38 -#define INDEX_DMC_T_WTR0x3C -#define INDEX_DMC_T_XP 0x40 -#define INDEX_DMC_T_XSR0x44 -#define INDEX_DMC_T_ESR0x48 -#define INDEX_DMC_MEMORY_CFG2 0x4C -#define INDEX_DMC_CHIP_0_CFG 0x200 -#define INDEX_DMC_CHIP_1_CFG 0x204 -#define INDEX_DMC_CHIP_2_CFG 0x208 -#define INDEX_DMC_CHIP_3_CFG 0x20C -#define INDEX_DMC_USER_STATUS 0x300 -#define INDEX_DMC_USER_CONFIG 0x304 - -/* - * Memory Chip direct command - */ -#define DMC_NOP0 0x0c -#define DMC_NOP1 0x1c -#define DMC_PA00x00/* Precharge all */ -#define DMC_PA10x10 -#define DMC_AR00x04/* Autorefresh */ -#define DMC_AR10x14 -#define DMC_SDR_MR00x080032/* MRS, CAS 3, Burst Length 4 */ -#define DMC_SDR_MR10x180032 -#define DMC_DDR_MR00x080162 -#define DMC_DDR_MR10x180162 -#define DMC_mDDR_MR0 0x080032/* CAS 3, Burst Length 4 */ -#define DMC_mDDR_MR1 0x180032 -#define DMC_mSDR_EMR0 0x0a/* EMRS, DS:Full, PASR:Full Array */ -#define DMC_mSDR_EMR1 0x1a -#define DMC_DDR_EMR0 0x09 -#define DMC_DDR_EMR1 0x19 -#define DMC_mDDR_EMR0 0x0a/* DS:Full, PASR:Full Array */ -#define DMC_mDDR_EMR1 0x1a - -/* - * Definitions for memory configuration - * Set memory configuration - * active_chips= 1'b0 (1 chip) - * qos_master_chip = 3'b000(ARID[3:0]) - * memory burst= 3'b010(burst 4) - * stop_mem_clock = 1'b0(disable dynamical stop) - * auto_power_down = 1'b0(disable auto power-down mode) - * power_down_prd = 6'b00_(0 cycle for auto power-down) - * ap_bit = 1'b0 (bit position of auto-precharge is 10) - * row_bits= 3'b010(# row address 13) - * column_bits = 3'b010(# column address 10 ) - * - * Set user configuration - * 2'b10=SDRAM/mSDRAM, 2'b11=DDR, 2'b01=mDDR - * - * Set chip select for chip [n] - * row bank control, bank address 0x3000_ ~ 0x37ff_ - * CHIP_[n]_CFG=0x30F8, 30: ADDR[31:24], F8: Mask[31:24] - */ - -/* - * Nand flash controller - */ +#define ELFIN_MEM_SYS_CFG 0x7e00f120 #define ELFIN_NAND_BASE0x7020 - -/* - * Interrupt - */ #define ELFIN_VIC0_BASE_ADDR 0x7120 #define ELFIN_VIC1_BASE_ADDR 0x7130 - -/* - * Watchdog timer - */ #define ELFIN_WATCHDOG_BASE0x7E004000 - -/* - * UART - */ #define ELFIN_UART_BASE0x7F005000 - -/* - * PWM timer - */ #define ELFIN_TIMER_BASE 0x7F006000 -/*--- - * Physical Memory Map - */ -#define DMC1_MEM_CFG 0x00010012 /* burst 4, 13-bit row, 10-bit col */ -#define DMC1_MEM_CFG2 0xB45 -#define DMC1_CHIP0_CFG 0x150F8 /* 0x5000_~0x57ff_ (128 MiB) */ -#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */ - -/* Memory Parameters */ -/* DDR Parameters */ -#define DDR_tREFRESH 7800/* ns */ -#define DDR_tRAS 45 /* ns (min: 45ns)*/ -#define DDR_tRC68 /* ns (min: 67.5ns)*/ -#define DDR_tRCD 23 /* ns (min: 22.5ns)*/ -#define DDR_tRFC 80 /* n
[U-Boot] [V2 12/15] S3c64xx: clear GPIO, Interrupt, Watchdog variable.
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V2: - None. --- arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 260 --- board/samsung/smdk6400/lowlevel_init.S | 23 ++-- 2 files changed, 11 insertions(+), 272 deletions(-) diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h index b1537c1..8d12cfa 100644 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h @@ -47,172 +47,6 @@ */ #define ELFIN_GPIO_BASE0x7f008000 -#define GPACON_OFFSET 0x00 -#define GPADAT_OFFSET 0x04 -#define GPAPUD_OFFSET 0x08 -#define GPACONSLP_OFFSET 0x0C -#define GPAPUDSLP_OFFSET 0x10 -#define GPBCON_OFFSET 0x20 -#define GPBDAT_OFFSET 0x24 -#define GPBPUD_OFFSET 0x28 -#define GPBCONSLP_OFFSET 0x2C -#define GPBPUDSLP_OFFSET 0x30 -#define GPCCON_OFFSET 0x40 -#define GPCDAT_OFFSET 0x44 -#define GPCPUD_OFFSET 0x48 -#define GPCCONSLP_OFFSET 0x4C -#define GPCPUDSLP_OFFSET 0x50 -#define GPDCON_OFFSET 0x60 -#define GPDDAT_OFFSET 0x64 -#define GPDPUD_OFFSET 0x68 -#define GPDCONSLP_OFFSET 0x6C -#define GPDPUDSLP_OFFSET 0x70 -#define GPECON_OFFSET 0x80 -#define GPEDAT_OFFSET 0x84 -#define GPEPUD_OFFSET 0x88 -#define GPECONSLP_OFFSET 0x8C -#define GPEPUDSLP_OFFSET 0x90 -#define GPFCON_OFFSET 0xA0 -#define GPFDAT_OFFSET 0xA4 -#define GPFPUD_OFFSET 0xA8 -#define GPFCONSLP_OFFSET 0xAC -#define GPFPUDSLP_OFFSET 0xB0 -#define GPGCON_OFFSET 0xC0 -#define GPGDAT_OFFSET 0xC4 -#define GPGPUD_OFFSET 0xC8 -#define GPGCONSLP_OFFSET 0xCC -#define GPGPUDSLP_OFFSET 0xD0 -#define GPHCON0_OFFSET 0xE0 -#define GPHCON1_OFFSET 0xE4 -#define GPHDAT_OFFSET 0xE8 -#define GPHPUD_OFFSET 0xEC -#define GPHCONSLP_OFFSET 0xF0 -#define GPHPUDSLP_OFFSET 0xF4 -#define GPICON_OFFSET 0x100 -#define GPIDAT_OFFSET 0x104 -#define GPIPUD_OFFSET 0x108 -#define GPICONSLP_OFFSET 0x10C -#define GPIPUDSLP_OFFSET 0x110 -#define GPJCON_OFFSET 0x120 -#define GPJDAT_OFFSET 0x124 -#define GPJPUD_OFFSET 0x128 -#define GPJCONSLP_OFFSET 0x12C -#define GPJPUDSLP_OFFSET 0x130 -#define MEM0DRVCON_OFFSET 0x1D0 -#define MEM1DRVCON_OFFSET 0x1D4 -#define GPKCON0_OFFSET 0x800 -#define GPKCON1_OFFSET 0x804 -#define GPKDAT_OFFSET 0x808 -#define GPKPUD_OFFSET 0x80C -#define GPLCON0_OFFSET 0x810 -#define GPLCON1_OFFSET 0x814 -#define GPLDAT_OFFSET 0x818 -#define GPLPUD_OFFSET 0x81C -#define GPMCON_OFFSET 0x820 -#define GPMDAT_OFFSET 0x824 -#define GPMPUD_OFFSET 0x828 -#define GPNCON_OFFSET 0x830 -#define GPNDAT_OFFSET 0x834 -#define GPNPUD_OFFSET 0x838 -#define GPOCON_OFFSET 0x140 -#define GPODAT_OFFSET 0x144 -#define GPOPUD_OFFSET 0x148 -#define GPOCONSLP_OFFSET 0x14C -#define GPOPUDSLP_OFFSET 0x150 -#define GPPCON_OFFSET 0x160 -#define GPPDAT_OFFSET 0x164 -#define GPPPUD_OFFSET 0x168 -#define GPPCONSLP_OFFSET 0x16C -#define GPPPUDSLP_OFFSET 0x170 -#define GPQCON_OFFSET 0x180 -#define GPQDAT_OFFSET 0x184 -#define GPQPUD_OFFSET 0x188 -#define GPQCONSLP_OFFSET 0x18C -#define GPQPUDSLP_OFFSET 0x190 - -#define EINTPEND_OFFSET0x924 - -#define GPACON_REG __REG(ELFIN_GPIO_BASE + GPACON_OFFSET) -#define GPADAT_REG __REG(ELFIN_GPIO_BASE + GPADAT_OFFSET) -#define GPAPUD_REG __REG(ELFIN_GPIO_BASE + GPAPUD_OFFSET) -#define GPACONSLP_REG __REG(ELFIN_GPIO_BASE + GPACONSLP_OFFSET) -#define GPAPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET) -#define GPBCON_REG __REG(ELFIN_GPIO_BASE + GPBCON_OFFSET) -#define GPBDAT_REG __REG(ELFIN_GPIO_BASE + GPBDAT_OFFSET) -#define GPBPUD_REG __REG(ELFIN_GPIO_BASE + GPBPUD_OFFSET) -#define GPBCONSLP_REG __REG(ELFIN_GPIO_BASE + GPBCONSLP_OFFSET) -#define GPBPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET) -#define GPCCON_REG __REG(ELFIN_GPIO_BASE + GPCCON_OFFSET) -#define GPCDAT_REG __REG(ELFIN_GPIO_BASE + GPCDAT_OFFSET) -#define GPCPUD_REG __REG(ELFIN_GPIO_BASE + GPCPUD_OFFSET) -#define GPCCONSLP_REG __REG(ELFIN_GPIO_BASE + GPCCONSLP_OFFSET) -#define GPCPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET) -#define GPDCON_REG __REG(ELFIN_GPIO_BASE + GPDCON_OFFSET) -#define GPDDAT_REG __REG(ELFIN_GPIO_BASE + GPDDAT_OFFSET) -#define GPDPUD_REG __REG(ELFIN_GPIO_BASE
[U-Boot] [V2 11/15] S3C64XX: Switch to use read/writel to operation clock system
From: Zhong Hongbo
Switch to use read/writel function and clear the relevant variable.
Signed-off-by: Zhong Hongbo
---
Change for V2:
- merge clock patch.
- Change the type of return for s3c64xx_get_base_clock function.
---
arch/arm/cpu/arm1176/s3c64xx/reset.S|4 +-
arch/arm/cpu/arm1176/s3c64xx/speed.c| 50 +--
arch/arm/include/asm/arch-s3c64xx/clock.h | 147 ++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 219 +--
board/samsung/smdk6400/lowlevel_init.S | 64 -
drivers/usb/host/s3c64xx-hcd.c | 30 -
6 files changed, 243 insertions(+), 271 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S
b/arch/arm/cpu/arm1176/s3c64xx/reset.S
index eae572e..9e5ee84 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S
@@ -26,9 +26,9 @@
.globl reset_cpu
reset_cpu:
ldr r1, =ELFIN_CLOCK_POWER_BASE
- ldr r2, [r1, #SYS_ID_OFFSET]
+ ldr r2, [r1, #0x118]@ SYS_ID_OFFSET
ldr r3, =0x
and r2, r3, r2, lsr #12
- str r2, [r1, #SW_RST_OFFSET]
+ str r2, [r1, #0x114]@ SW_RST_OFFSET
_loop_forever:
b _loop_forever
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c
b/arch/arm/cpu/arm1176/s3c64xx/speed.c
index 11962ac..05b44b9 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
@@ -31,12 +31,13 @@
*/
#include
+#include
#include
+#include
#define APLL 0
#define MPLL 1
#define EPLL 2
-
/* - */
/*
* NOTE: This describes the proper use of this file.
@@ -50,17 +51,20 @@
static ulong get_PLLCLK(int pllreg)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
+
ulong r, m, p, s;
switch (pllreg) {
case APLL:
- r = APLL_CON_REG;
+ r = readl(&clk->apll_con);
break;
case MPLL:
- r = MPLL_CON_REG;
+ r = readl(&clk->mpll_con);
break;
case EPLL:
- r = EPLL_CON0_REG;
+ r = readl(&clk->epll_con0);
break;
default:
hang();
@@ -76,9 +80,11 @@ static ulong get_PLLCLK(int pllreg)
/* return ARMCORE frequency */
ulong get_ARMCLK(void)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
ulong div;
- div = CLK_DIV0_REG;
+ div = readl(&clk->clk_div0);
return get_PLLCLK(APLL) / ((div & 0x7) + 1);
}
@@ -92,16 +98,20 @@ ulong get_FCLK(void)
/* return HCLK frequency */
ulong get_HCLK(void)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
ulong fclk;
+ ulong other;
- uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
- uint hclk_div = ((CLK_DIV0_REG >> 8) & 0x1) + 1;
+ uint hclkx2_div = ((readl(&clk->clk_div0) >> 9) & 0x7) + 1;
+ uint hclk_div = ((readl(&clk->clk_div0) >> 8) & 0x1) + 1;
/*
* Bit 7 exists on s3c6410, and not on s3c6400, it is reserved on
* s3c6400 and is always 0, and it is indeed running in ASYNC mode
*/
- if (OTHERS_REG & 0x80)
+ other = readl(&clk->others);
+ if (other & 0x80)
fclk = get_FCLK(); /* SYNC Mode*/
else
fclk = get_PLLCLK(MPLL);/* ASYNC Mode */
@@ -112,11 +122,15 @@ ulong get_HCLK(void)
/* return PCLK frequency */
ulong get_PCLK(void)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
ulong fclk;
- uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
- uint pre_div = ((CLK_DIV0_REG >> 12) & 0xf) + 1;
+ uint hclkx2_div = ((readl(&clk->clk_div0) >> 9) & 0x7) + 1;
+ uint pre_div = ((readl(&clk->clk_div0) >> 12) & 0xf) + 1;
+ ulong other;
- if (OTHERS_REG & 0x80)
+ other = readl(&clk->others);
+ if (other & 0x80)
fclk = get_FCLK(); /* SYNC Mode*/
else
fclk = get_PLLCLK(MPLL);/* ASYNC Mode */
@@ -132,14 +146,20 @@ ulong get_UCLK(void)
int print_cpuinfo(void)
{
- printf("\nCPU: S3C6400@%luMHz\n", get_ARMCLK() / 100);
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
+ ulong other;
+
+ printf("\nCPU: S3C64XX@%luMHz\n", get_ARMCLK() / 100);
pr
[U-Boot] [V2 10/15] S3C64XX: Change SROM init to use read/write operation
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V2:
- Change the type of return for s3c64xx_get_base_sromc function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +-
arch/arm/cpu/arm1176/s3c64xx/srom.c | 51 +++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 13 +++
arch/arm/include/asm/arch-s3c64xx/sromc.h | 49 +
board/samsung/smdk6400/smdk6400.c | 38 ++--
include/configs/smdk6400.h |1 +
6 files changed, 134 insertions(+), 20 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/srom.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/sromc.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 2f37431..28786bf 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o
SOBJS = reset.o
-COBJS-$(CONFIG_S3C64XX)+= speed.o
+COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o
COBJS-y+= timer.o
COBJS-$(CONFIG_PWM) += pwm.o
diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c
b/arch/arm/cpu/arm1176/s3c64xx/srom.c
new file mode 100644
index 000..f1b2b34
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2012
+ * Zhong Hongbo
+ * base on arch/arm/cpu/armv7/s5p-common/sromc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+/*
+ * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM
+ * srom_bw_conf - SMC Band witdh reg configuration value
+ * srom_bc_conf - SMC Bank Control reg configuration value
+ */
+void s3c64xx_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
+{
+ u32 tmp;
+ struct s3c64xx_sromc *srom =
+ (struct s3c64xx_sromc *)s3c64xx_get_base_sromc();
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= srom_bw_conf;
+
+ writel(tmp, &srom->bw);
+
+ /* Configure SMC_BC register */
+ writel(srom_bc_conf, &srom->bc[srom_bank]);
+}
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index b884763..d2ee9d2 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -471,14 +471,6 @@
*/
#define ELFIN_SROM_BASE0x7000
-#define SROM_BW_REG__REG(ELFIN_SROM_BASE + 0x0)
-#define SROM_BC0_REG __REG(ELFIN_SROM_BASE + 0x4)
-#define SROM_BC1_REG __REG(ELFIN_SROM_BASE + 0x8)
-#define SROM_BC2_REG __REG(ELFIN_SROM_BASE + 0xC)
-#define SROM_BC3_REG __REG(ELFIN_SROM_BASE + 0x10)
-#define SROM_BC4_REG __REG(ELFIN_SROM_BASE + 0x14)
-#define SROM_BC5_REG __REG(ELFIN_SROM_BASE + 0x18)
-
/*
* SDRAM Controller
*/
@@ -722,6 +714,11 @@ static inline unsigned long s3c64xx_get_base_timer(void)
{
return ELFIN_TIMER_BASE;
}
+
+static inline unsigned long s3c64xx_get_base_sromc(void)
+{
+ return ELFIN_SROM_BASE;
+}
#endif
#endif /*__S3C6400_H__*/
diff --git a/arch/arm/include/asm/arch-s3c64xx/sromc.h
b/arch/arm/include/asm/arch-s3c64xx/sromc.h
new file mode 100644
index 000..fcad635
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/sromc.h
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * base on arch/arm/include/asm/arch-s5pc1xx/sromc.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
[U-Boot] [V2 09/15] arm1176: Fixed No relocation.
From: Zhong Hongbo When It do not need to relocat for u-boot, the offset(r9) of relocation should be set zero. Signed-off-by: Zhong Hongbo --- Change for V2: - This fix is seprated from nand_spl patch. --- arch/arm/cpu/arm1176/start.S |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 26a3533..de2cb39 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -252,6 +252,7 @@ stack_setup: adr r0, _start cmp r0, r6 + mov r9, #0 beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V2 08/15] S3C6400: Adopt SPL framwork to support spl for nand flash
From: Zhong Hongbo Adopt the new SPL framework to implement the SPL booting of the nand flash for S3C6400. Signed-off-by: Zhong Hongbo --- Change for V2: - seprate some code. --- arch/arm/cpu/arm1176/start.S| 16 +--- board/samsung/smdk6400/Makefile | 29 +- board/samsung/smdk6400/lowlevel_init.S | 18 ++-- board/samsung/smdk6400/smdk6400_nand_spl.c | 61 ++-- board/samsung/smdk6400/tools/mksmdk6400_image.c | 117 +++ drivers/mtd/nand/s3c64xx.c |4 +- include/configs/smdk6400.h | 21 +++-- 7 files changed, 219 insertions(+), 47 deletions(-) create mode 100644 board/samsung/smdk6400/tools/mksmdk6400_image.c diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 848144a..26a3533 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -51,7 +51,7 @@ .globl _start _start: b reset -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -164,7 +164,7 @@ cpu_init_crit: * When booting from NAND - it has definitely been a reset, so, no need * to flush caches and disable the MMU */ -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * flush v4 I/D caches */ @@ -356,21 +356,14 @@ clbss_l:str r2, [r0]/* clear loop...*/ cmp r0, r1 bne clbss_l -#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on #endif -#endif /* * We are done. Do not return, instead branch to second part of board * initialization, now running from RAM. */ -#ifdef CONFIG_NAND_SPL - ldr pc, _nand_boot - -_nand_boot: .word nand_boot -#else ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 @@ -383,7 +376,6 @@ _nand_boot: .word nand_boot _board_init_r_ofs: .word board_init_r - _start -#endif _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -397,7 +389,7 @@ _mmu_table_base: .word mmu_table #endif -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * we assume that cache operation is done before. (eg. cleanup_before_linux()) * actually, we don't need to do anything about cache if not use d-cache in @@ -575,4 +567,4 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile index 645c8e2..f7fa667 100644 --- a/board/samsung/smdk6400/Makefile +++ b/board/samsung/smdk6400/Makefile @@ -28,15 +28,34 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(BOARD).o +ifndef CONFIG_SPL_BUILD COBJS-y:= smdk6400.o +endif + SOBJS := lowlevel_init.o mem_init.o -SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) -SOBJS := $(addprefix $(obj),$(SOBJS)) +ifdef CONFIG_SPL_BUILD +COBJS-y += smdk6400_nand_spl.o +endif + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) + +ALL:= $(obj).depend $(LIB) + +ifdef CONFIG_SPL_BUILD +ALL+= $(OBJTREE)/tools/mk$(BOARD)spl +endif + +all: $(ALL) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) -$(LIB):$(obj).depend $(SOBJS) $(OBJS) - $(call cmd_link_o_target, $(SOBJS) $(OBJS)) +ifdef CONFIG_SPL_BUILD +$(OBJTREE)/tools/mk$(BOARD)spl:tools/mksmdk6400_image.c + $(HOSTCC) tools/mksmdk6400_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl +endif # diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 1142be1..6cc7567 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -83,18 +83,12 @@ lowlevel_init: str r3, [r0, #oVECTADDR] str r3, [r1, #oVECTADDR] +#ifdef CONFIG_SPL_BUILD /* init system clock */ bl system_clock_init -#ifndef CONFIG_NAND_SPL - /* for UART */ - bl uart_asm_init -#endif - -#ifdef CONFIG_BOOT_NAND /* simple init for NAND */ bl nand_asm_init -#endif /* Memory subsystem address 0x7e00f120 */ ldr r0, =ELFIN_MEM_SYS_CFG @@ -104,6 +98,12 @@ lowlevel_init: str r1, [r0] bl mem_ctrl_asm_init +#endif + +#ifndef CONFIG_SPL_BUILD + /* for UART */ + bl uart_asm_init +#endif /* Wakeup support. Don't know if it's going to be used, untested. */ ldr r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET) @@ -243,7 +243,7 @@ wait_for_async: mov pc, lr -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * uart_asm_init: Initial
[U-Boot] [V2 07/15] S3C6400: Delete nand_spl for S3C6400
From: Zhong Hongbo The old spl use nand_spl directory file to support nand flash boot. We will adopt the new SPL framework to implement it. Signed-off-by: Zhong Hongbo --- Change for V2: - None. --- board/samsung/smdk6400/config.mk | 28 --- boards.cfg |4 +- include/configs/smdk6400.h |2 +- nand_spl/board/samsung/smdk6400/Makefile | 117 nand_spl/board/samsung/smdk6400/config.mk | 40 -- nand_spl/board/samsung/smdk6400/u-boot.lds | 78 -- 6 files changed, 3 insertions(+), 266 deletions(-) delete mode 100644 board/samsung/smdk6400/config.mk delete mode 100644 nand_spl/board/samsung/smdk6400/Makefile delete mode 100644 nand_spl/board/samsung/smdk6400/config.mk delete mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk deleted file mode 100644 index 93a1a0d..000 --- a/board/samsung/smdk6400/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, -# David Mueller, ELSOFT AG, -# -# (C) Copyright 2008 -# Guennadi Liakhovetki, DENX Software Engineering, -# -# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu -# -# see http://www.samsung.com/ for more information on SAMSUNG - -# On SMDK6400 we use the 64 MB SDRAM bank at -# -# 0x5000 to 0x5800 -# -# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000 -# -# we load ourselves to 0x57e0 without MMU -# with MMU, load address is changed to 0xc7e0 -# -# download area is 0x5000c000 - -ifndef CONFIG_NAND_SPL -CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT) -else -CONFIG_SYS_TEXT_BASE = 0 -endif diff --git a/boards.cfg b/boards.cfg index a6ca01f..cc18700 100644 --- a/boards.cfg +++ b/boards.cfg @@ -47,8 +47,8 @@ flea3arm arm1136 - CarMedi mx35pdk arm arm1136 - freescale mx35 apollon arm arm1136 apollon - omap24xx omap2420h4 arm arm1136 - ti omap24xx -smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0xc7e0 -smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0x57e0 +smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:SYS_TEXT_BASE=0x57e0 +smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:SYS_TEXT_BASE=0xc7e0 tnetv107x_evmarm arm1176 tnetv107xevmti tnetv107x integratorap_cm720t arm arm720t integrator armltd - integratorap:CM720T integratorap_cm920t arm arm920t integrator armltd - integratorap:CM920T diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 3642a5c..06b85bf 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -54,7 +54,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ1200 -#if !defined(CONFIG_NAND_U_BOOT) && (CONFIG_SYS_TEXT_BASE >= 0xc000) +#if !defined(CONFIG_SPL_BUILD) && (CONFIG_SYS_TEXT_BASE >= 0xc000) #define CONFIG_ENABLE_MMU #endif diff --git a/nand_spl/board/samsung/smdk6400/Makefile b/nand_spl/board/samsung/smdk6400/Makefile deleted file mode 100644 index c9e75ba..000 --- a/nand_spl/board/samsung/smdk6400/Makefile +++ /dev/null @@ -1,117 +0,0 @@ -# -# (C) Copyright 2006-2007 -# Stefan Roese, DENX Software Engineering, s...@denx.de. -# -# (C) Copyright 2008 -# Guennadi Liakhovetki, DENX Software Engineering, -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -CONFIG_NAND_SPL= y - -include $(TOPDIR)/config.mk -include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk - -nandobj
[U-Boot] [V2 06/15] S3C64xx: mov cpu_init.S to the board directory
From: Zhong Hongbo It just only do the memory init. The memory depend on the design of board. Signed-off-by: Zhong Hongbo --- Change for V2: - None. --- arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +- arch/arm/cpu/arm1176/s3c64xx/cpu_init.S | 135 --- board/samsung/smdk6400/Makefile |2 +- board/samsung/smdk6400/mem_init.S | 135 +++ 4 files changed, 137 insertions(+), 137 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S create mode 100644 board/samsung/smdk6400/mem_init.S diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile index 93f..2f37431 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile @@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o SOBJS = reset.o -COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o +COBJS-$(CONFIG_S3C64XX)+= speed.o COBJS-y+= timer.o COBJS-$(CONFIG_PWM) += pwm.o diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S deleted file mode 100644 index df88cba..000 --- a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400 - * - * Copyright (C) 2008 - * Guennadi Liakhovetki, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - - .globl mem_ctrl_asm_init -mem_ctrl_asm_init: - /* DMC1 base address 0x7e001000 */ - ldr r0, =ELFIN_DMC1_BASE - - ldr r1, =0x4 - str r1, [r0, #INDEX_DMC_MEMC_CMD] - - ldr r1, =DMC_DDR_REFRESH_PRD - str r1, [r0, #INDEX_DMC_REFRESH_PRD] - - ldr r1, =DMC_DDR_CAS_LATENCY - str r1, [r0, #INDEX_DMC_CAS_LATENCY] - - ldr r1, =DMC_DDR_t_DQSS - str r1, [r0, #INDEX_DMC_T_DQSS] - - ldr r1, =DMC_DDR_t_MRD - str r1, [r0, #INDEX_DMC_T_MRD] - - ldr r1, =DMC_DDR_t_RAS - str r1, [r0, #INDEX_DMC_T_RAS] - - ldr r1, =DMC_DDR_t_RC - str r1, [r0, #INDEX_DMC_T_RC] - - ldr r1, =DMC_DDR_t_RCD - ldr r2, =DMC_DDR_schedule_RCD - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RCD] - - ldr r1, =DMC_DDR_t_RFC - ldr r2, =DMC_DDR_schedule_RFC - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RFC] - - ldr r1, =DMC_DDR_t_RP - ldr r2, =DMC_DDR_schedule_RP - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RP] - - ldr r1, =DMC_DDR_t_RRD - str r1, [r0, #INDEX_DMC_T_RRD] - - ldr r1, =DMC_DDR_t_WR - str r1, [r0, #INDEX_DMC_T_WR] - - ldr r1, =DMC_DDR_t_WTR - str r1, [r0, #INDEX_DMC_T_WTR] - - ldr r1, =DMC_DDR_t_XP - str r1, [r0, #INDEX_DMC_T_XP] - - ldr r1, =DMC_DDR_t_XSR - str r1, [r0, #INDEX_DMC_T_XSR] - - ldr r1, =DMC_DDR_t_ESR - str r1, [r0, #INDEX_DMC_T_ESR] - - ldr r1, =DMC1_MEM_CFG - str r1, [r0, #INDEX_DMC_MEMORY_CFG] - - ldr r1, =DMC1_MEM_CFG2 - str r1, [r0, #INDEX_DMC_MEMORY_CFG2] - - ldr r1, =DMC1_CHIP0_CFG - str r1, [r0, #INDEX_DMC_CHIP_0_CFG] - - ldr r1, =DMC_DDR_32_CFG - str r1, [r0, #INDEX_DMC_USER_CONFIG] - - /* DMC0 DDR Chip 0 configuration direct command reg */ - ldr r1, =DMC_NOP0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Precharge All */ - ldr r1, =DMC_PA0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Auto Refresh 2 time */ - ldr r1, =DMC_AR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* MRS */ - ldr r1, =DMC_mDDR_EMR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Mode Reg */ - ldr r1, =DMC_mDDR_MR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Enable DMC1 */ - mov r1, #0x0 - str r1, [r0, #INDEX_DMC_MEMC_CMD] - -check_dmc1_ready: - ldr r1
[U-Boot] [V2 05/15] S3C64XX: reference s5p cpu time system for s3c64xx timer
From: Zhong Hongbo
The old s3c64xx timer is not work normal, Adopt s5p time design,
It work perfect.
Signed-off-by: Zhong Hongbo
---
Change for V2:
- Delete const key word for the variable of struct s3c_timer.
---
arch/arm/cpu/arm1176/s3c64xx/timer.c | 193 --
1 files changed, 93 insertions(+), 100 deletions(-)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c
b/arch/arm/cpu/arm1176/s3c64xx/timer.c
index f16a37b..47d7731 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
@@ -1,23 +1,8 @@
/*
- * (C) Copyright 2003
- * Texas Instruments
+ * Copyright (C) 2012
+ * Zhong Hongbo
*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Marius Groeger
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Alex Zuepke
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering,
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd.
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering,
+ * based on arch/arm/cpu/armv7/s5p-common/timer.c
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -39,64 +24,29 @@
*/
#include
-#include
+#include
#include
-#include
-
-static ulong timer_load_val;
+#include
+#include
-#define PRESCALER 167
+DECLARE_GLOBAL_DATA_PTR;
-static s3c64xx_timers *s3c64xx_get_base_timers(void)
-{
- return (s3c64xx_timers *)ELFIN_TIMER_BASE;
-}
+static unsigned long get_current_tick(void);
/* macro to read the 16 bit timer */
-static inline ulong read_timer(void)
+static inline struct s3c_timer *s3c_get_base_timer(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- return timers->TCNTO4;
+ return (struct s3c_timer *)s3c64xx_get_base_timer();
}
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
int timer_init(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- /* use PWM Timer 4 because it has no output */
- /*
-* We use the following scheme for the timer:
-* Prescaler is hard fixed at 167, divider at 1/4.
-* This gives at PCLK frequency 66MHz approx. 10us ticks
-* The timer is set to wrap after 100s, at 66MHz this obviously
-* happens after 10,000,000 ticks. A long variable can thus
-* keep values up to 40,000s, i.e., 11 hours. This should be
-* enough for most uses:-) Possible optimizations: select a
-* binary-friendly frequency, e.g., 1ms / 128. Also calculate
-* the prescaler automatically for other PCLK frequencies.
-*/
- timers->TCFG0 = PRESCALER << 8;
- if (timer_load_val == 0) {
- timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
- timers->TCFG1 = (timers->TCFG1 & ~0xf) | 0x2;
- }
-
- /* load value for 10 ms timeout */
- lastdec = timers->TCNTB4 = timer_load_val;
- /* auto load, manual update of Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO |
- TCON_4_UPDATE;
+ /* PWM Timer 4 */
+ pwm_init(4, MUX_DIV_2, 0);
+ pwm_config(4, 0, 0);
+ pwm_enable(4);
- /* auto load, start Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO | COUNT_4_ON;
- timestamp = 0;
+ reset_timer_masked();
return 0;
}
@@ -104,57 +54,100 @@ int timer_init(void)
/*
* timer without interrupts
*/
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
+unsigned long get_timer(unsigned long base)
{
- ulong now = read_timer();
+ return get_timer_masked() - base;
+}
- if (lastdec >= now) {
- /* normal mode */
- timestamp += lastdec - now;
+/* delay x useconds */
+void __udelay(unsigned long usec)
+{
+ struct s3c_timer *timer = s3c_get_base_timer();
+ unsigned long tmo, tmp, count_value;
+
+ count_value = readl(&timer->tcntb4);
+
+ if (usec >= 1000) {
+ /*
+* if "big" number, spread normalization
+* to seconds
+* 1. start to normalize for usec to ticks per sec
+* 2. find number of "ticks" to wait to achieve target
+* 3. finish normalize.
+*/
+ tmo = usec / 1000;
+ tmo *= (CONFIG_SYS_HZ * count_value);
+ tmo /= 1000;
} else {
- /* we have an overflow ... */
- timestamp += lastdec + timer_load_val - now;
+ /* else small number, don't kill it prior to HZ multiply */
+
[U-Boot] [V2 04/15] S3C64XX: add pwm for s3c64xx support
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_nand function.
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |1 +
arch/arm/cpu/arm1176/s3c64xx/pwm.c | 189 +++
arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 56 ++---
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 59 -
include/configs/smdk6400.h |3 +
6 files changed, 272 insertions(+), 106 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm.h
delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 0785b19..93f 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -32,6 +32,7 @@ SOBJS = reset.o
COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM) += pwm.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
new file mode 100644
index 000..d1d70ff
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2012
+ *
+ * Zhong Hongbo
+ *
+ * based on arch/arm/cpu/armv7/s5p-common/sromc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int pwm_enable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon |= TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon &= ~TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_PCLK();
+
+ for (div = 2; div <= 16; div *= 2) {
+ if ((tin_parent_rate / (div << 16)) < freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long tcmp;
+
+ /*
+* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits.
+*/
+ if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns > period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+
+ /* Note, counters count down */
+ tcmp = duty_ns / tin_ns;
+ tcmp = tcnt - tcmp;
+
+ /*
+* the pwm hw only checks the compare register after a decrement,
+* so the pin never toggles if tcmp = tcnt
+*/
+ if (tcmp == tcnt)
+ tcmp--;
+
+ if (tcmp < 0)
+ tcmp = 0;
+
+ /* Update the PWM register block. */
+ offset = pwm_id * 3;
+ if (pwm_id < 4) {
+ writel(tcnt, &pwm->tcntb0 + offset);
+ writel(tcmp, &
[U-Boot] [V2 03/15] S3C64XX: Use readl/writel to operate uart
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_uart function.
- Delete const for the local variable.
---
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 65 +--
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 31 -
arch/arm/include/asm/arch-s3c64xx/uart.h| 54 ++
board/samsung/smdk6400/lowlevel_init.S |8 ---
drivers/serial/s3c64xx.c| 50 +
5 files changed, 87 insertions(+), 121 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/uart.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index d6c5dd9..77b9509 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -582,62 +582,6 @@
*/
#define ELFIN_UART_BASE0x7F005000
-#define ELFIN_UART0_OFFSET 0x
-#define ELFIN_UART1_OFFSET 0x0400
-#define ELFIN_UART2_OFFSET 0x0800
-
-#define ULCON_OFFSET 0x00
-#define UCON_OFFSET0x04
-#define UFCON_OFFSET 0x08
-#define UMCON_OFFSET 0x0C
-#define UTRSTAT_OFFSET 0x10
-#define UERSTAT_OFFSET 0x14
-#define UFSTAT_OFFSET 0x18
-#define UMSTAT_OFFSET 0x1C
-#define UTXH_OFFSET0x20
-#define URXH_OFFSET0x24
-#define UBRDIV_OFFSET 0x28
-#define UDIVSLOT_OFFSET0x2C
-#define UINTP_OFFSET 0x30
-#define UINTSP_OFFSET 0x34
-#define UINTM_OFFSET 0x38
-
-#define ULCON0_REG __REG(0x7F005000)
-#define UCON0_REG __REG(0x7F005004)
-#define UFCON0_REG __REG(0x7F005008)
-#define UMCON0_REG __REG(0x7F00500C)
-#define UTRSTAT0_REG __REG(0x7F005010)
-#define UERSTAT0_REG __REG(0x7F005014)
-#define UFSTAT0_REG__REG(0x7F005018)
-#define UMSTAT0_REG__REG(0x7F00501c)
-#define UTXH0_REG __REG(0x7F005020)
-#define URXH0_REG __REG(0x7F005024)
-#define UBRDIV0_REG__REG(0x7F005028)
-#define UDIVSLOT0_REG __REG(0x7F00502c)
-#define UINTP0_REG __REG(0x7F005030)
-#define UINTSP0_REG__REG(0x7F005034)
-#define UINTM0_REG __REG(0x7F005038)
-
-#define ULCON1_REG __REG(0x7F005400)
-#define UCON1_REG __REG(0x7F005404)
-#define UFCON1_REG __REG(0x7F005408)
-#define UMCON1_REG __REG(0x7F00540C)
-#define UTRSTAT1_REG __REG(0x7F005410)
-#define UERSTAT1_REG __REG(0x7F005414)
-#define UFSTAT1_REG__REG(0x7F005418)
-#define UMSTAT1_REG__REG(0x7F00541c)
-#define UTXH1_REG __REG(0x7F005420)
-#define URXH1_REG __REG(0x7F005424)
-#define UBRDIV1_REG__REG(0x7F005428)
-#define UDIVSLOT1_REG __REG(0x7F00542c)
-#define UINTP1_REG __REG(0x7F005430)
-#define UINTSP1_REG__REG(0x7F005434)
-#define UINTM1_REG __REG(0x7F005438)
-
-#define UTRSTAT_TX_EMPTY (1 << 2)
-#define UTRSTAT_RX_READY (1 << 0)
-#define UART_ERR_MASK 0xF
-
/*
* PWM timer
*/
@@ -804,17 +748,12 @@
#define DMC_DDR_USER_CONFIG1
#ifndef __ASSEMBLY__
-enum s3c64xx_uarts_nr {
- S3C64XX_UART0,
- S3C64XX_UART1,
- S3C64XX_UART2,
-};
#include "s3c64x0.h"
-static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
+static inline unsigned long s3c64xx_get_base_uart(void)
{
- return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
+ return ELFIN_UART_BASE;
}
static inline unsigned long s3c64xx_get_base_nand(void)
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
index 0bbf1d0..7add68c 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
@@ -40,37 +40,6 @@
#include
-/* UART (see manual chapter 11) */
-typedef struct {
- volatile u32ULCON;
- volatile u32UCON;
- volatile u32UFCON;
- volatile u32UMCON;
- volatile u32UTRSTAT;
- volatile u32UERSTAT;
- volatile u32UFSTAT;
- volatile u32UMSTAT;
-#ifdef __BIG_ENDIAN
- volatile u8 res1[3];
- volatile u8 UTXH;
- volatile u8 res2[3];
- volatile u8 URXH;
-#else /* Little Endian */
- volatile u8 UTXH;
- volatile u8 res1[3];
- volatile u8 URXH;
- volatile u8 res2[3];
-#endif
- volatile u32UBRDIV;
-#ifdef __BIG_ENDIAN
- volatile u8 res3[2];
- volatile u16UDIVSLOT;
-#else
- volatile u16UDIVSLOT;
- volatile u8 res3[2];
-#endif
-} s3c64xx_uart;
-
/* PWM TIMER
[U-Boot] [V2 02/15] S3C64XX: Switch to use readl/writel to operate nand flash
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
Change for V2:
- Change the type of the return value from unsinged int
to unsinged long for s3c64xx_get_base_nand function.
- Delete const for the local variable.
---
arch/arm/include/asm/arch-s3c64xx/nand.h| 69 +++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 79 ++-
board/samsung/smdk6400/lowlevel_init.S |8 ++--
drivers/mtd/nand/s3c64xx.c | 58 +---
4 files changed, 116 insertions(+), 98 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/nand.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/nand.h
b/arch/arm/include/asm/arch-s3c64xx/nand.h
new file mode 100644
index 000..51e4d34
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/nand.h
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_NAND_H__
+#define __ASM_ARCH_NAND_H__
+
+#define NFCONF_ECC_4BIT(1<<24)
+
+#define NFCONT_ECC_ENC (1<<18)
+#define NFCONT_WP (1<<16)
+#define NFCONT_MECCLOCK(1<<7)
+#define NFCONT_SECCLOCK(1<<6)
+#define NFCONT_INITMECC(1<<5)
+#define NFCONT_INITSECC(1<<4)
+#define NFCONT_INITECC (NFCONT_INITMECC | NFCONT_INITSECC)
+#define NFCONT_CS_ALT (1<<2)
+#define NFCONT_CS (1<<1)
+#define NFCONT_ENABLE (1<<0)
+
+#define NFSTAT_ECCENCDONE (1<<7)
+#define NFSTAT_ECCDECDONE (1<<6)
+#define NFSTAT_RnB (1<<0)
+
+#define NFESTAT0_ECCBUSY (1<<31)
+
+#ifndef __ASSEMBLY__
+/* NAND FLASH */
+struct s3c64xx_nand {
+ u32 nfconf;
+ u32 nfcont;
+ u32 nfcmmd;
+ u32 nfaddr;
+ u32 nfdata;
+ u32 nfmeccdata0;
+ u32 nfmeccdata1;
+ u32 nfseccdata0;
+ u32 nfsblk;
+ u32 nfeblk;
+ u32 nfstat;
+ u32 nfestat0;
+ u32 nfestat1;
+ u32 nfmecc0;
+ u32 nfmecc1;
+ u32 nfsecc;
+ u32 nfmlcbitpt;
+};
+#endif
+
+#endif
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 10b3324..d6c5dd9 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -556,80 +556,6 @@
*/
#define ELFIN_NAND_BASE0x7020
-#define NFCONF_OFFSET 0x00
-#define NFCONT_OFFSET 0x04
-#define NFCMMD_OFFSET 0x08
-#define NFADDR_OFFSET 0x0c
-#define NFDATA_OFFSET 0x10
-#define NFMECCDATA0_OFFSET 0x14
-#define NFMECCDATA1_OFFSET 0x18
-#define NFSECCDATA0_OFFSET 0x1c
-#define NFSBLK_OFFSET 0x20
-#define NFEBLK_OFFSET 0x24
-#define NFSTAT_OFFSET 0x28
-#define NFESTAT0_OFFSET0x2c
-#define NFESTAT1_OFFSET0x30
-#define NFMECC0_OFFSET 0x34
-#define NFMECC1_OFFSET 0x38
-#define NFSECC_OFFSET 0x3c
-#define NFMLCBITPT_OFFSET 0x40
-
-#define NFCONF (ELFIN_NAND_BASE + NFCONF_OFFSET)
-#define NFCONT (ELFIN_NAND_BASE + NFCONT_OFFSET)
-#define NFCMMD (ELFIN_NAND_BASE + NFCMMD_OFFSET)
-#define NFADDR (ELFIN_NAND_BASE + NFADDR_OFFSET)
-#define NFDATA (ELFIN_NAND_BASE + NFDATA_OFFSET)
-#define NFMECCDATA0(ELFIN_NAND_BASE + NFMECCDATA0_OFFSET)
-#define NFMECCDATA1(ELFIN_NAND_BASE + NFMECCDATA1_OFFSET)
-#define NFSECCDATA0(ELFIN_NAND_BASE + NFSECCDATA0_OFFSET)
-#define NFSBLK (ELFIN_NAND_BASE + NFSBLK_OFFSET)
-#define NFEBLK (ELFIN_NAND_BASE + NFEBLK_OFFSET)
-#define NFSTAT (ELFIN_NAND_BASE + NFSTAT_OFFSET)
-#define NFESTAT0 (ELFIN_NAND_BASE + NFESTAT0_OFFSET)
-#define NFESTAT1 (ELFIN_NAND_BASE + NFESTAT1_OFFSET)
-#define NFMECC0(ELFIN_NAND_BASE + NFMECC0_OFFSET)
-#defi
[U-Boot] [V2 01/15] SMDK6400: Move smdk6400 board from Makefile to boards.cfg
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Change for V2: - None --- Makefile | 20 board/samsung/smdk6400/config.mk |4 +--- boards.cfg |2 ++ include/configs/smdk6400.h |2 +- 4 files changed, 4 insertions(+), 24 deletions(-) diff --git a/Makefile b/Makefile index 0197239..e3af33f 100644 --- a/Makefile +++ b/Makefile @@ -695,26 +695,6 @@ SX1_config:unconfig fi; @$(MKCONFIG) -n $@ SX1 arm arm925t sx1 -# -## ARM1176 Systems -# -smdk6400_noUSB_config \ -smdk6400_config: unconfig - @mkdir -p $(obj)include $(obj)board/samsung/smdk6400 - @mkdir -p $(obj)nand_spl/board/samsung/smdk6400 - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then \ - echo "RAM_TEXT = 0x57e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - else \ - echo "RAM_TEXT = 0xc7e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - fi - @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - -# -# - clean: @rm -f $(obj)examples/standalone/82559_eeprom \ $(obj)examples/standalone/atmel_df_pow2\ diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk index 6f04c2f..93a1a0d 100644 --- a/board/samsung/smdk6400/config.mk +++ b/board/samsung/smdk6400/config.mk @@ -21,10 +21,8 @@ # # download area is 0x5000c000 -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - ifndef CONFIG_NAND_SPL -CONFIG_SYS_TEXT_BASE = $(RAM_TEXT) +CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT) else CONFIG_SYS_TEXT_BASE = 0 endif diff --git a/boards.cfg b/boards.cfg index 9205070..a6ca01f 100644 --- a/boards.cfg +++ b/boards.cfg @@ -47,6 +47,8 @@ flea3arm arm1136 - CarMedi mx35pdk arm arm1136 - freescale mx35 apollon arm arm1136 apollon - omap24xx omap2420h4 arm arm1136 - ti omap24xx +smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0xc7e0 +smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0x57e0 tnetv107x_evmarm arm1176 tnetv107xevmti tnetv107x integratorap_cm720t arm arm720t integrator armltd - integratorap:CM720T integratorap_cm920t arm arm920t integrator armltd - integratorap:CM920T diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 04caeef..47326d6 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -54,7 +54,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ1200 -#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc000) +#if !defined(CONFIG_NAND_U_BOOT) && (CONFIG_SYS_TEXT_BASE >= 0xc000) #define CONFIG_ENABLE_MMU #endif -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] V2 S3c64xx: Switch all I/O to use readl/writel functio and Clear variable
V2: 1. Modify the type of return for s3c64xx_get_base_nand 2. Add patch 0014 to support s3c6410 board 3. Adjust patch for mix content. V1: This serial patch intent to: 1. Switch all I/O to use readl/writel function 2. Change nand_spl to use SPL framework 3. S3C64XX serial includes s3c6400 and s3c6410, Here seprate cpu and board file to support to board's of s3c6410. I test this patch on my s3c6410 development board. the log as following: U-Boot 2012.04.01-10905-g9fa0c77 (Jul 07 2012 - 15:50:57) for SMDK6400 CPU: S3C64XX@532MHz Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz (ASYNC Mode) Board: DMATEK6410 DRAM: 128 MiB WARNING: Caches not enabled NAND: 128 MiB *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial Net: dm9000 Hit any key to stop autoboot: 0 DMATEK6410 # ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 02/13] S3C64XX: Switch to use readl/writel to operate nand flash
Hi Scott,
On 07/10/2012 11:36 PM, Scott Wood wrote:
> On 07/10/2012 08:00 AM, Zhong Hongbo wrote:
>> On 07/10/2012 08:29 PM, Zhong Hongbo wrote:
>>> On 07/10/2012 06:19 AM, Scott Wood wrote:
>>>> On 07/07/2012 04:57 AM, Zhong Hongbo wrote:
>>>>> @@ -89,15 +96,16 @@ static void s3c_nand_select_chip(struct mtd_info
>>>>> *mtd, int chip)
>>>>> */
>>>>> static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned
>>>>> int ctrl)
>>>>> {
>>>>> + struct s3c64xx_nand *const nand = s3c_get_base_nand();
>>>>
>>>> Is there any benefit to declaring local variables const like this?
>>>
>>> I reference the nand driver of S5PXX CPU. So ...
>> Sorry, I make a mistake, The S5PXX have not nand flash support. When i
>> do the patch, I use the format as following：
>>
>> struct s3c64xx_nand *nand = s3c_get_base_nand();
>>
>> But when I use checkpatch.pl script to check the patch. more and more
>> waring about the line, it said that you should add 'const' before nand
>> variable.
>
> Could you paste the exact output from checkpatch.pl?
Just redo the patch, I can not reproduce the issue. Thank you for your
point.
Thanks,
hongbo
>
> -Scott
>
>
>
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Re: [U-Boot] [PATCH 02/13] S3C64XX: Switch to use readl/writel to operate nand flash
On 07/10/2012 08:29 PM, Zhong Hongbo wrote:
> On 07/10/2012 06:19 AM, Scott Wood wrote:
>> On 07/07/2012 04:57 AM, Zhong Hongbo wrote:
>>> +static inline unsigned int s3c64xx_get_base_nand(void)
>>> +{
>>> + return ELFIN_NAND_BASE;
>>> +}
>>
>> unsigned long or uintptr_t would be more appropriate, even if U-Boot is
>> unlikely to be 64-bit any time soon.
>
> Ok, I will fix it in V2.
>
> Thanks,
> hongbo
>>
>> Or better, "struct s3c64xx_nand *".
>>
>>> @@ -89,15 +96,16 @@ static void s3c_nand_select_chip(struct mtd_info *mtd,
>>> int chip)
>>> */
>>> static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int
>>> ctrl)
>>> {
>>> + struct s3c64xx_nand *const nand = s3c_get_base_nand();
>>
>> Is there any benefit to declaring local variables const like this?
>
> I reference the nand driver of S5PXX CPU. So ...
Sorry, I make a mistake, The S5PXX have not nand flash support. When i
do the patch, I use the format as following：
struct s3c64xx_nand *nand = s3c_get_base_nand();
But when I use checkpatch.pl script to check the patch. more and more
waring about the line, it said that you should add 'const' before nand
variable.
Thanks,
hongbo
>
> Why
>> this one and not all the others that never get altered?
>
> Ok, I will change it. And i just found the S3c64XX is orphaned board.
> So Thanks you for the foucus it!
>
> Thanks,
> hongbo
>>
>> -Scott
>>
>>
>
>
>
>
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Re: [U-Boot] S3c64xx: Switch all I/O to use readl/writel function
Add Guennadi to the loop. Thanks, hongbo On 07/07/2012 05:56 PM, Zhong Hongbo wrote: > This serial patch intent to: > 1. Switch all I/O to use readl/writel function > 2. Change nand_spl to use SPL framework > 3. S3C64XX serial includes s3c6400 and s3c6410, > Here seprate cpu and board file to support to board's of s3c6410. > > > I test this patch on my s3c6410 development board. the log as following: > > U-Boot 2012.04.01-10905-g9fa0c77 (Jul 07 2012 - 15:50:57) for SMDK6400 > > > CPU: S3C64XX@532MHz > Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz (ASYNC Mode) > Board: DMATEK6410 > DRAM: 128 MiB > WARNING: Caches not enabled > NAND: 128 MiB > *** Warning - bad CRC, using default environment > > In:serial > Out: serial > Err: serial > Net: dm9000 > Hit any key to stop autoboot: 0 > DMATEK6410 # > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V4] arm: Fix to mistake clean the memory space
From: Zhong Hongbo In currently, when __bss_start is equal to __bss_end__, The bss loop will clear all the things in memory space. But just only when __bss_end__ greater than __bss_start__, we do the clear bss section operation. Signed-off-by: Zhong Hongbo --- Change for V1 - Fixed bss clear operation, no just skip it. - Adjust the commit information Change for V2 - Modify all the bss clean operation for arm platform - Adjust the title Change for V3 - Modify the history information and the tag ot the patch --- arch/arm/cpu/arm1136/start.S |8 +--- arch/arm/cpu/arm1176/start.S |9 + arch/arm/cpu/arm720t/start.S |8 +--- arch/arm/cpu/arm920t/start.S |8 +--- arch/arm/cpu/arm925t/start.S |8 +--- arch/arm/cpu/arm946es/start.S |8 +--- arch/arm/cpu/arm_intcm/start.S |8 +--- arch/arm/cpu/armv7/start.S |8 +--- arch/arm/cpu/ixp/start.S |8 +--- arch/arm/cpu/lh7a40x/start.S |8 +--- arch/arm/cpu/pxa/start.S |8 +--- arch/arm/cpu/s3c44b0/start.S |8 +--- arch/arm/cpu/sa1100/start.S|8 +--- 13 files changed, 65 insertions(+), 40 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index c0db96c..2483c63 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -251,10 +251,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* #ifndef CONFIG_SPL_BUILD */ /* diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 848144a..d613641 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -351,11 +351,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l - + b clbss_l +clbss_e: #ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 540e3c2..3b97e80 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -228,10 +228,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 8c5612c..9b8604e 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -271,10 +271,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index dbb93ef..1a54416 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -265,10 +265,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 89ba558..b4d1d2d 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S
Re: [U-Boot] [V3] arm: Fix to mistake clean the memory space
On 07/07/2012 05:58 PM, Albert ARIBAUD wrote: > Hi Zhong Hongbo, > > On Sat, 7 Jul 2012 17:47:16 +0800, Zhong Hongbo wrote: >> From: Zhong Hongbo >> >> In currently, when __bss_start is equal to __bss_end__, >> The bss loop will clear all the things in memory space. >> >> But just only when __bss_end__ greater than __bss_start__, >> we do the clear bss section operation. >> >> Signed-off-by: Zhong Hongbo >> --- >> Change for V2 >> - Fixed bss clear operation, no just skip it. >> - Adjust the commit information >> Change for V3 >> - Modify all the bss clean operation for arm platform >> - Adjust the title >> --- > > Almost there... The PATCH part is missing, i.e. you should not tag "[V3]" > but "[PATCH V3]". Ok, > > Just to make sure patchwork gets it right, please repost a V4 of this > properly tagged with "[PATCH V4]". Ok, Thanks, hongbo > > Amicalement, > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 13/13] S3C6400: Clear system clock variable
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 26 --
board/samsung/smdk6400/lowlevel_init.S |6 +++---
2 files changed, 3 insertions(+), 29 deletions(-)
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index b254282..acc6a37 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -53,32 +53,6 @@
#define ELFIN_UART_BASE0x7F005000
#define ELFIN_TIMER_BASE 0x7F006000
-#define STARTUP_AMDIV 533
-#define STARTUP_MDIV 533
-#define STARTUP_PDIV 6
-#define STARTUP_SDIV 1
-
-#defineSTARTUP_PCLKDIV 3
-#define STARTUP_HCLKX2DIV 1
-#define STARTUP_HCLKDIV1
-#define STARTUP_MPLLDIV1
-#define STARTUP_APLLDIV0
-
-#define CLK_DIV_VAL((STARTUP_PCLKDIV << 12) | (STARTUP_HCLKX2DIV << 9) | \
- (STARTUP_HCLKDIV << 8) | (STARTUP_MPLLDIV<<4) | STARTUP_APLLDIV)
-#define MPLL_VAL ((1 << 31) | (STARTUP_MDIV << 16) | \
- (STARTUP_PDIV << 8) | STARTUP_SDIV)
-#define STARTUP_MPLL (((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \
- STARTUP_PDIV) * STARTUP_MDIV)
-
-#define APLL_VAL ((1 << 31) | (STARTUP_AMDIV << 16) | \
- (STARTUP_PDIV << 8) | STARTUP_SDIV)
-#define STARTUP_APLL (((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \
- STARTUP_PDIV) * STARTUP_AMDIV)
-#define STARTUP_HCLK (STARTUP_MPLL / (STARTUP_HCLKX2DIV + 1) / \
- (STARTUP_HCLKDIV + 1))
-
-
#ifndef __ASSEMBLY__
static inline unsigned int s3c64xx_get_base_uart(void)
{
diff --git a/board/samsung/smdk6400/lowlevel_init.S
b/board/samsung/smdk6400/lowlevel_init.S
index 3feb164..7ccee59 100644
--- a/board/samsung/smdk6400/lowlevel_init.S
+++ b/board/samsung/smdk6400/lowlevel_init.S
@@ -199,13 +199,13 @@ wait_for_async:
bic r1, r1, #0x3
bic r1, r1, #0xff00
bic r1, r1, #0xff
- ldr r2, =CLK_DIV_VAL
+ ldr r2, =0x3310
orr r1, r1, r2
str r1, [r0, #0x20]
- ldr r1, =APLL_VAL
+ ldr r1, =0x82150601
str r1, [r0, #0x0c] @ APLL_CON_OFFSET
- ldr r1, =MPLL_VAL
+ ldr r1, =0x82150601
str r1, [r0, #0x10] @ MPLL_CON_OFFSET
/* FOUT of EPLL is 96MHz */
--
1.7.5.4
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[U-Boot] [PATCH 11/13] S3c64xx: clear GPIO, Interrupt, Watchdog flag.
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 294 +-- board/samsung/smdk6400/lowlevel_init.S | 50 ++--- board/samsung/smdk6400/mem_init.S |4 + 3 files changed, 30 insertions(+), 318 deletions(-) diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h index d15b37b..736cea2 100644 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h @@ -47,172 +47,6 @@ */ #define ELFIN_GPIO_BASE0x7f008000 -#define GPACON_OFFSET 0x00 -#define GPADAT_OFFSET 0x04 -#define GPAPUD_OFFSET 0x08 -#define GPACONSLP_OFFSET 0x0C -#define GPAPUDSLP_OFFSET 0x10 -#define GPBCON_OFFSET 0x20 -#define GPBDAT_OFFSET 0x24 -#define GPBPUD_OFFSET 0x28 -#define GPBCONSLP_OFFSET 0x2C -#define GPBPUDSLP_OFFSET 0x30 -#define GPCCON_OFFSET 0x40 -#define GPCDAT_OFFSET 0x44 -#define GPCPUD_OFFSET 0x48 -#define GPCCONSLP_OFFSET 0x4C -#define GPCPUDSLP_OFFSET 0x50 -#define GPDCON_OFFSET 0x60 -#define GPDDAT_OFFSET 0x64 -#define GPDPUD_OFFSET 0x68 -#define GPDCONSLP_OFFSET 0x6C -#define GPDPUDSLP_OFFSET 0x70 -#define GPECON_OFFSET 0x80 -#define GPEDAT_OFFSET 0x84 -#define GPEPUD_OFFSET 0x88 -#define GPECONSLP_OFFSET 0x8C -#define GPEPUDSLP_OFFSET 0x90 -#define GPFCON_OFFSET 0xA0 -#define GPFDAT_OFFSET 0xA4 -#define GPFPUD_OFFSET 0xA8 -#define GPFCONSLP_OFFSET 0xAC -#define GPFPUDSLP_OFFSET 0xB0 -#define GPGCON_OFFSET 0xC0 -#define GPGDAT_OFFSET 0xC4 -#define GPGPUD_OFFSET 0xC8 -#define GPGCONSLP_OFFSET 0xCC -#define GPGPUDSLP_OFFSET 0xD0 -#define GPHCON0_OFFSET 0xE0 -#define GPHCON1_OFFSET 0xE4 -#define GPHDAT_OFFSET 0xE8 -#define GPHPUD_OFFSET 0xEC -#define GPHCONSLP_OFFSET 0xF0 -#define GPHPUDSLP_OFFSET 0xF4 -#define GPICON_OFFSET 0x100 -#define GPIDAT_OFFSET 0x104 -#define GPIPUD_OFFSET 0x108 -#define GPICONSLP_OFFSET 0x10C -#define GPIPUDSLP_OFFSET 0x110 -#define GPJCON_OFFSET 0x120 -#define GPJDAT_OFFSET 0x124 -#define GPJPUD_OFFSET 0x128 -#define GPJCONSLP_OFFSET 0x12C -#define GPJPUDSLP_OFFSET 0x130 -#define MEM0DRVCON_OFFSET 0x1D0 -#define MEM1DRVCON_OFFSET 0x1D4 -#define GPKCON0_OFFSET 0x800 -#define GPKCON1_OFFSET 0x804 -#define GPKDAT_OFFSET 0x808 -#define GPKPUD_OFFSET 0x80C -#define GPLCON0_OFFSET 0x810 -#define GPLCON1_OFFSET 0x814 -#define GPLDAT_OFFSET 0x818 -#define GPLPUD_OFFSET 0x81C -#define GPMCON_OFFSET 0x820 -#define GPMDAT_OFFSET 0x824 -#define GPMPUD_OFFSET 0x828 -#define GPNCON_OFFSET 0x830 -#define GPNDAT_OFFSET 0x834 -#define GPNPUD_OFFSET 0x838 -#define GPOCON_OFFSET 0x140 -#define GPODAT_OFFSET 0x144 -#define GPOPUD_OFFSET 0x148 -#define GPOCONSLP_OFFSET 0x14C -#define GPOPUDSLP_OFFSET 0x150 -#define GPPCON_OFFSET 0x160 -#define GPPDAT_OFFSET 0x164 -#define GPPPUD_OFFSET 0x168 -#define GPPCONSLP_OFFSET 0x16C -#define GPPPUDSLP_OFFSET 0x170 -#define GPQCON_OFFSET 0x180 -#define GPQDAT_OFFSET 0x184 -#define GPQPUD_OFFSET 0x188 -#define GPQCONSLP_OFFSET 0x18C -#define GPQPUDSLP_OFFSET 0x190 - -#define EINTPEND_OFFSET0x924 - -#define GPACON_REG __REG(ELFIN_GPIO_BASE + GPACON_OFFSET) -#define GPADAT_REG __REG(ELFIN_GPIO_BASE + GPADAT_OFFSET) -#define GPAPUD_REG __REG(ELFIN_GPIO_BASE + GPAPUD_OFFSET) -#define GPACONSLP_REG __REG(ELFIN_GPIO_BASE + GPACONSLP_OFFSET) -#define GPAPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET) -#define GPBCON_REG __REG(ELFIN_GPIO_BASE + GPBCON_OFFSET) -#define GPBDAT_REG __REG(ELFIN_GPIO_BASE + GPBDAT_OFFSET) -#define GPBPUD_REG __REG(ELFIN_GPIO_BASE + GPBPUD_OFFSET) -#define GPBCONSLP_REG __REG(ELFIN_GPIO_BASE + GPBCONSLP_OFFSET) -#define GPBPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET) -#define GPCCON_REG __REG(ELFIN_GPIO_BASE + GPCCON_OFFSET) -#define GPCDAT_REG __REG(ELFIN_GPIO_BASE + GPCDAT_OFFSET) -#define GPCPUD_REG __REG(ELFIN_GPIO_BASE + GPCPUD_OFFSET) -#define GPCCONSLP_REG __REG(ELFIN_GPIO_BASE + GPCCONSLP_OFFSET) -#define GPCPUDSLP_REG __REG(ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET) -#define GPDCON_REG __REG(ELFIN_GPIO_BASE + GPDCON_OFFSET) -#define GPDDAT_REG __REG(ELFIN_GPIO_BASE + GPDDAT_OFFSET) -#define GPDPUD_REG
[U-Boot] [PATCH 12/13] S3C6400: clear memory init variable
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 173 +-- board/samsung/smdk6400/mem_init.S | 110 +- 2 files changed, 56 insertions(+), 227 deletions(-) diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h index 736cea2..b254282 100644 --- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h +++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h @@ -41,124 +41,16 @@ #include #define ELFIN_CLOCK_POWER_BASE 0x7e00f000 - -/* - * GPIO - */ #define ELFIN_GPIO_BASE0x7f008000 - -/* - * Bus Matrix - */ -#define ELFIN_MEM_SYS_CFG 0x7e00f120 - -#define S3C64XX_MEM_SYS_CFG_16BIT (1 << 12) - -/* - * Memory controller - */ #define ELFIN_SROM_BASE0x7000 - -/* - * SDRAM Controller - */ #define ELFIN_DMC0_BASE0x7e00 #define ELFIN_DMC1_BASE0x7e001000 - -#define INDEX_DMC_MEMC_STATUS 0x00 -#define INDEX_DMC_MEMC_CMD 0x04 -#define INDEX_DMC_DIRECT_CMD 0x08 -#define INDEX_DMC_MEMORY_CFG 0x0C -#define INDEX_DMC_REFRESH_PRD 0x10 -#define INDEX_DMC_CAS_LATENCY 0x14 -#define INDEX_DMC_T_DQSS 0x18 -#define INDEX_DMC_T_MRD0x1C -#define INDEX_DMC_T_RAS0x20 -#define INDEX_DMC_T_RC 0x24 -#define INDEX_DMC_T_RCD0x28 -#define INDEX_DMC_T_RFC0x2C -#define INDEX_DMC_T_RP 0x30 -#define INDEX_DMC_T_RRD0x34 -#define INDEX_DMC_T_WR 0x38 -#define INDEX_DMC_T_WTR0x3C -#define INDEX_DMC_T_XP 0x40 -#define INDEX_DMC_T_XSR0x44 -#define INDEX_DMC_T_ESR0x48 -#define INDEX_DMC_MEMORY_CFG2 0x4C -#define INDEX_DMC_CHIP_0_CFG 0x200 -#define INDEX_DMC_CHIP_1_CFG 0x204 -#define INDEX_DMC_CHIP_2_CFG 0x208 -#define INDEX_DMC_CHIP_3_CFG 0x20C -#define INDEX_DMC_USER_STATUS 0x300 -#define INDEX_DMC_USER_CONFIG 0x304 - -/* - * Memory Chip direct command - */ -#define DMC_NOP0 0x0c -#define DMC_NOP1 0x1c -#define DMC_PA00x00/* Precharge all */ -#define DMC_PA10x10 -#define DMC_AR00x04/* Autorefresh */ -#define DMC_AR10x14 -#define DMC_SDR_MR00x080032/* MRS, CAS 3, Burst Length 4 */ -#define DMC_SDR_MR10x180032 -#define DMC_DDR_MR00x080162 -#define DMC_DDR_MR10x180162 -#define DMC_mDDR_MR0 0x080032/* CAS 3, Burst Length 4 */ -#define DMC_mDDR_MR1 0x180032 -#define DMC_mSDR_EMR0 0x0a/* EMRS, DS:Full, PASR:Full Array */ -#define DMC_mSDR_EMR1 0x1a -#define DMC_DDR_EMR0 0x09 -#define DMC_DDR_EMR1 0x19 -#define DMC_mDDR_EMR0 0x0a/* DS:Full, PASR:Full Array */ -#define DMC_mDDR_EMR1 0x1a - -/* - * Definitions for memory configuration - * Set memory configuration - * active_chips= 1'b0 (1 chip) - * qos_master_chip = 3'b000(ARID[3:0]) - * memory burst= 3'b010(burst 4) - * stop_mem_clock = 1'b0(disable dynamical stop) - * auto_power_down = 1'b0(disable auto power-down mode) - * power_down_prd = 6'b00_(0 cycle for auto power-down) - * ap_bit = 1'b0 (bit position of auto-precharge is 10) - * row_bits= 3'b010(# row address 13) - * column_bits = 3'b010(# column address 10 ) - * - * Set user configuration - * 2'b10=SDRAM/mSDRAM, 2'b11=DDR, 2'b01=mDDR - * - * Set chip select for chip [n] - * row bank control, bank address 0x3000_ ~ 0x37ff_ - * CHIP_[n]_CFG=0x30F8, 30: ADDR[31:24], F8: Mask[31:24] - */ - -/* - * Nand flash controller - */ +#define ELFIN_MEM_SYS_CFG 0x7e00f120 #define ELFIN_NAND_BASE0x7020 - -/* - * Interrupt - */ #define ELFIN_VIC0_BASE_ADDR 0x7120 #define ELFIN_VIC1_BASE_ADDR 0x7130 - -/* - * Watchdog timer - */ #define ELFIN_WATCHDOG_BASE0x7E004000 - -/* - * UART - */ #define ELFIN_UART_BASE0x7F005000 - -/* - * PWM timer - */ #define ELFIN_TIMER_BASE 0x7F006000 #define STARTUP_AMDIV 533 @@ -187,69 +79,6 @@ (STARTUP_HCLKDIV + 1)) -/*--- - * Physical Memory Map - */ -#define DMC1_MEM_CFG 0x00010012 /* burst 4, 13-bit row, 10-bit col */ -#define DMC1_MEM_CFG2 0xB45 -#define DMC1_CHIP0_CFG 0x150F8 /* 0x5000_~0x57ff_ (128 MiB) */ -#define DMC_DDR_32_CFG 0x0 /* 32bit, DDR */ - -/* Memory Parameters */ -/* DDR Parameters */ -#define DDR_tREFRESH 7800/* ns */ -#define DDR_tRAS 45 /* ns (min: 45ns)*/ -#define DDR_tRC68 /* ns (min: 67.5ns)*/ -#define DDR_tRCD 23 /* ns (min: 22.5ns)*/ -#define DDR_tRFC 80 /* n
[U-Boot] [PATCH 10/13] S3C64XX: Switch to use read/writel to operation clock system
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
arch/arm/cpu/arm1176/s3c64xx/reset.S|4 +-
arch/arm/cpu/arm1176/s3c64xx/speed.c| 50 ++---
arch/arm/include/asm/arch-s3c64xx/clock.h | 147 +++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 167 +--
board/samsung/smdk6400/lowlevel_init.S | 58 --
drivers/usb/host/s3c64xx-hcd.c | 30 +-
6 files changed, 240 insertions(+), 216 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/clock.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S
b/arch/arm/cpu/arm1176/s3c64xx/reset.S
index eae572e..9e5ee84 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
+++ b/arch/arm/cpu/arm1176/s3c64xx/reset.S
@@ -26,9 +26,9 @@
.globl reset_cpu
reset_cpu:
ldr r1, =ELFIN_CLOCK_POWER_BASE
- ldr r2, [r1, #SYS_ID_OFFSET]
+ ldr r2, [r1, #0x118]@ SYS_ID_OFFSET
ldr r3, =0x
and r2, r3, r2, lsr #12
- str r2, [r1, #SW_RST_OFFSET]
+ str r2, [r1, #0x114]@ SW_RST_OFFSET
_loop_forever:
b _loop_forever
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c
b/arch/arm/cpu/arm1176/s3c64xx/speed.c
index 11962ac..05b44b9 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/speed.c
@@ -31,12 +31,13 @@
*/
#include
+#include
#include
+#include
#define APLL 0
#define MPLL 1
#define EPLL 2
-
/* - */
/*
* NOTE: This describes the proper use of this file.
@@ -50,17 +51,20 @@
static ulong get_PLLCLK(int pllreg)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
+
ulong r, m, p, s;
switch (pllreg) {
case APLL:
- r = APLL_CON_REG;
+ r = readl(&clk->apll_con);
break;
case MPLL:
- r = MPLL_CON_REG;
+ r = readl(&clk->mpll_con);
break;
case EPLL:
- r = EPLL_CON0_REG;
+ r = readl(&clk->epll_con0);
break;
default:
hang();
@@ -76,9 +80,11 @@ static ulong get_PLLCLK(int pllreg)
/* return ARMCORE frequency */
ulong get_ARMCLK(void)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
ulong div;
- div = CLK_DIV0_REG;
+ div = readl(&clk->clk_div0);
return get_PLLCLK(APLL) / ((div & 0x7) + 1);
}
@@ -92,16 +98,20 @@ ulong get_FCLK(void)
/* return HCLK frequency */
ulong get_HCLK(void)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
ulong fclk;
+ ulong other;
- uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
- uint hclk_div = ((CLK_DIV0_REG >> 8) & 0x1) + 1;
+ uint hclkx2_div = ((readl(&clk->clk_div0) >> 9) & 0x7) + 1;
+ uint hclk_div = ((readl(&clk->clk_div0) >> 8) & 0x1) + 1;
/*
* Bit 7 exists on s3c6410, and not on s3c6400, it is reserved on
* s3c6400 and is always 0, and it is indeed running in ASYNC mode
*/
- if (OTHERS_REG & 0x80)
+ other = readl(&clk->others);
+ if (other & 0x80)
fclk = get_FCLK(); /* SYNC Mode*/
else
fclk = get_PLLCLK(MPLL);/* ASYNC Mode */
@@ -112,11 +122,15 @@ ulong get_HCLK(void)
/* return PCLK frequency */
ulong get_PCLK(void)
{
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
ulong fclk;
- uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
- uint pre_div = ((CLK_DIV0_REG >> 12) & 0xf) + 1;
+ uint hclkx2_div = ((readl(&clk->clk_div0) >> 9) & 0x7) + 1;
+ uint pre_div = ((readl(&clk->clk_div0) >> 12) & 0xf) + 1;
+ ulong other;
- if (OTHERS_REG & 0x80)
+ other = readl(&clk->others);
+ if (other & 0x80)
fclk = get_FCLK(); /* SYNC Mode*/
else
fclk = get_PLLCLK(MPLL);/* ASYNC Mode */
@@ -132,14 +146,20 @@ ulong get_UCLK(void)
int print_cpuinfo(void)
{
- printf("\nCPU: S3C6400@%luMHz\n", get_ARMCLK() / 100);
+ struct s3c64xx_clock *clk =
+ (struct s3c64xx_clock *)s3c64xx_get_base_clock();
+ ulong other;
+
+ printf("\nCPU: S3C64XX@%luMHz\n", get_ARMCLK() / 100);
printf(" Fclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz ",
get_FCLK() / 100, get_HCLK() / 100,
get_PCLK() / 100);
- if (OTHERS_REG &
[U-Boot] [PATCH 09/13] S3C64XX: Change SROM init to use read/write operation
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +-
arch/arm/cpu/arm1176/s3c64xx/srom.c | 52 +++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 13 +++
arch/arm/include/asm/arch-s3c64xx/sromc.h | 49 +
board/samsung/smdk6400/smdk6400.c | 38 ++--
include/configs/smdk6400.h |1 +
6 files changed, 135 insertions(+), 20 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/srom.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/sromc.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 2f37431..28786bf 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o
SOBJS = reset.o
-COBJS-$(CONFIG_S3C64XX)+= speed.o
+COBJS-$(CONFIG_S3C64XX)+= speed.o srom.o
COBJS-y+= timer.o
COBJS-$(CONFIG_PWM) += pwm.o
diff --git a/arch/arm/cpu/arm1176/s3c64xx/srom.c
b/arch/arm/cpu/arm1176/s3c64xx/srom.c
new file mode 100644
index 000..297bc2d
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/srom.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2012
+ * Zhong Hongbo
+ * base on arch/arm/cpu/armv7/s5p-common/sromc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+/*
+ * s3c64xx_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM
+ * srom_bw_conf - SMC Band witdh reg configuration value
+ * srom_bc_conf - SMC Bank Control reg configuration value
+ */
+void s3c64xx_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf)
+{
+ u32 tmp;
+ struct s3c64xx_sromc *srom =
+ (struct s3c64xx_sromc *)s3c64xx_get_base_sromc();
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= srom_bw_conf;
+
+ writel(tmp, &srom->bw);
+
+ /* Configure SMC_BC register */
+ writel(srom_bc_conf, &srom->bc[srom_bank]);
+}
+
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 1d7d2b6..4da95ca 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -471,14 +471,6 @@
*/
#define ELFIN_SROM_BASE0x7000
-#define SROM_BW_REG__REG(ELFIN_SROM_BASE + 0x0)
-#define SROM_BC0_REG __REG(ELFIN_SROM_BASE + 0x4)
-#define SROM_BC1_REG __REG(ELFIN_SROM_BASE + 0x8)
-#define SROM_BC2_REG __REG(ELFIN_SROM_BASE + 0xC)
-#define SROM_BC3_REG __REG(ELFIN_SROM_BASE + 0x10)
-#define SROM_BC4_REG __REG(ELFIN_SROM_BASE + 0x14)
-#define SROM_BC5_REG __REG(ELFIN_SROM_BASE + 0x18)
-
/*
* SDRAM Controller
*/
@@ -721,6 +713,11 @@ static inline unsigned int s3c64xx_get_base_timer(void)
{
return ELFIN_TIMER_BASE;
}
+
+static inline unsigned int s3c64xx_get_base_sromc(void)
+{
+ return ELFIN_SROM_BASE;
+}
#endif
#endif /*__S3C6400_H__*/
diff --git a/arch/arm/include/asm/arch-s3c64xx/sromc.h
b/arch/arm/include/asm/arch-s3c64xx/sromc.h
new file mode 100644
index 000..fcad635
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/sromc.h
@@ -0,0 +1,49 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * base on arch/arm/include/asm/arch-s5pc1xx/sromc.h
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temp
[U-Boot] [PATCH 08/13] S3C6400: Adopt SPL framwork to support spl for nand flash
From: Zhong Hongbo Adopt the new SPL framework to implement the SPL booting of the nand flash for S3C6400. Signed-off-by: Zhong Hongbo --- arch/arm/cpu/arm1176/start.S| 17 +--- board/samsung/smdk6400/Makefile | 29 +- board/samsung/smdk6400/lowlevel_init.S |4 +- board/samsung/smdk6400/smdk6400_nand_spl.c | 61 ++-- board/samsung/smdk6400/tools/mksmdk6400_image.c | 117 +++ drivers/mtd/nand/s3c64xx.c |4 +- include/configs/smdk6400.h | 34 ++- 7 files changed, 211 insertions(+), 55 deletions(-) create mode 100644 board/samsung/smdk6400/tools/mksmdk6400_image.c diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 848144a..de2cb39 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -51,7 +51,7 @@ .globl _start _start: b reset -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -164,7 +164,7 @@ cpu_init_crit: * When booting from NAND - it has definitely been a reset, so, no need * to flush caches and disable the MMU */ -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * flush v4 I/D caches */ @@ -252,6 +252,7 @@ stack_setup: adr r0, _start cmp r0, r6 + mov r9, #0 beq clear_bss /* skip relocation */ mov r1, r6 /* r1 <- scratch for copy_loop */ ldr r3, _bss_start_ofs @@ -356,21 +357,14 @@ clbss_l:str r2, [r0]/* clear loop...*/ cmp r0, r1 bne clbss_l -#ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on #endif -#endif /* * We are done. Do not return, instead branch to second part of board * initialization, now running from RAM. */ -#ifdef CONFIG_NAND_SPL - ldr pc, _nand_boot - -_nand_boot: .word nand_boot -#else ldr r0, _board_init_r_ofs adr r1, _start add lr, r0, r1 @@ -383,7 +377,6 @@ _nand_boot: .word nand_boot _board_init_r_ofs: .word board_init_r - _start -#endif _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -397,7 +390,7 @@ _mmu_table_base: .word mmu_table #endif -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * we assume that cache operation is done before. (eg. cleanup_before_linux()) * actually, we don't need to do anything about cache if not use d-cache in @@ -575,4 +568,4 @@ fiq: get_bad_stack bad_save_user_regs bl do_fiq -#endif /* CONFIG_NAND_SPL */ +#endif /* CONFIG_SPL_BUILD */ diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile index 645c8e2..f7fa667 100644 --- a/board/samsung/smdk6400/Makefile +++ b/board/samsung/smdk6400/Makefile @@ -28,15 +28,34 @@ include $(TOPDIR)/config.mk LIB= $(obj)lib$(BOARD).o +ifndef CONFIG_SPL_BUILD COBJS-y:= smdk6400.o +endif + SOBJS := lowlevel_init.o mem_init.o -SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) -SOBJS := $(addprefix $(obj),$(SOBJS)) +ifdef CONFIG_SPL_BUILD +COBJS-y += smdk6400_nand_spl.o +endif + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) + +ALL:= $(obj).depend $(LIB) + +ifdef CONFIG_SPL_BUILD +ALL+= $(OBJTREE)/tools/mk$(BOARD)spl +endif + +all: $(ALL) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) -$(LIB):$(obj).depend $(SOBJS) $(OBJS) - $(call cmd_link_o_target, $(SOBJS) $(OBJS)) +ifdef CONFIG_SPL_BUILD +$(OBJTREE)/tools/mk$(BOARD)spl:tools/mksmdk6400_image.c + $(HOSTCC) tools/mksmdk6400_image.c -o $(OBJTREE)/tools/mk$(BOARD)spl +endif # diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S index 1142be1..81e5c6a 100644 --- a/board/samsung/smdk6400/lowlevel_init.S +++ b/board/samsung/smdk6400/lowlevel_init.S @@ -86,7 +86,7 @@ lowlevel_init: /* init system clock */ bl system_clock_init -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* for UART */ bl uart_asm_init #endif @@ -243,7 +243,7 @@ wait_for_async: mov pc, lr -#ifndef CONFIG_NAND_SPL +#ifndef CONFIG_SPL_BUILD /* * uart_asm_init: Initialize UART's pins */ diff --git a/board/samsung/smdk6400/smdk6400_nand_spl.c b/board/samsung/smdk6400/smdk6400_nand_spl.c index a023284..34649a2 100644 --- a/board/samsung/smdk6400/smdk6400_nand_spl.c +++ b/board/samsung/smdk6400/smdk6400_nand_spl.c @@ -1,13 +1,6 @@ /* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) C
[U-Boot] [PATCH 07/13] S3C6400: Delete nand_spl for S3C6400
From: Zhong Hongbo The old spl use nand_spl directory file to support nand flash boot. We will adopt the new SPL framework to implement it. Signed-off-by: Zhong Hongbo --- board/samsung/smdk6400/config.mk | 28 --- boards.cfg |4 +- include/configs/smdk6400.h |4 +- nand_spl/board/samsung/smdk6400/Makefile | 117 nand_spl/board/samsung/smdk6400/config.mk | 40 -- nand_spl/board/samsung/smdk6400/u-boot.lds | 78 -- 6 files changed, 4 insertions(+), 267 deletions(-) delete mode 100644 board/samsung/smdk6400/config.mk delete mode 100644 nand_spl/board/samsung/smdk6400/Makefile delete mode 100644 nand_spl/board/samsung/smdk6400/config.mk delete mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk deleted file mode 100644 index 93a1a0d..000 --- a/board/samsung/smdk6400/config.mk +++ /dev/null @@ -1,28 +0,0 @@ -# -# (C) Copyright 2002 -# Gary Jennejohn, DENX Software Engineering, -# David Mueller, ELSOFT AG, -# -# (C) Copyright 2008 -# Guennadi Liakhovetki, DENX Software Engineering, -# -# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu -# -# see http://www.samsung.com/ for more information on SAMSUNG - -# On SMDK6400 we use the 64 MB SDRAM bank at -# -# 0x5000 to 0x5800 -# -# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000 -# -# we load ourselves to 0x57e0 without MMU -# with MMU, load address is changed to 0xc7e0 -# -# download area is 0x5000c000 - -ifndef CONFIG_NAND_SPL -CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT) -else -CONFIG_SYS_TEXT_BASE = 0 -endif diff --git a/boards.cfg b/boards.cfg index a6ca01f..cc18700 100644 --- a/boards.cfg +++ b/boards.cfg @@ -47,8 +47,8 @@ flea3arm arm1136 - CarMedi mx35pdk arm arm1136 - freescale mx35 apollon arm arm1136 apollon - omap24xx omap2420h4 arm arm1136 - ti omap24xx -smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0xc7e0 -smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0x57e0 +smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:SYS_TEXT_BASE=0x57e0 +smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:SYS_TEXT_BASE=0xc7e0 tnetv107x_evmarm arm1176 tnetv107xevmti tnetv107x integratorap_cm720t arm arm720t integrator armltd - integratorap:CM720T integratorap_cm920t arm arm920t integrator armltd - integratorap:CM920T diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 3642a5c..b38d015 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -54,7 +54,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ1200 -#if !defined(CONFIG_NAND_U_BOOT) && (CONFIG_SYS_TEXT_BASE >= 0xc000) +#if !defined(CONFIG_SPL_BUILD) && (CONFIG_SYS_TEXT_BASE >= 0xc000) #define CONFIG_ENABLE_MMU #endif @@ -113,7 +113,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT -#define CONFIG_CMD_EXT2 #define CONFIG_BOOTDELAY 3 @@ -288,6 +287,7 @@ #if !defined(CONFIG_ENABLE_MMU) #define CONFIG_CMD_USB 1 +#define CONFIG_CMD_EXT2 #define CONFIG_USB_S3C64XX #define CONFIG_USB_OHCI_NEW1 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x7430 diff --git a/nand_spl/board/samsung/smdk6400/Makefile b/nand_spl/board/samsung/smdk6400/Makefile deleted file mode 100644 index c9e75ba..000 --- a/nand_spl/board/samsung/smdk6400/Makefile +++ /dev/null @@ -1,117 +0,0 @@ -# -# (C) Copyright 2006-2007 -# Stefan Roese, DENX Software Engineering, s...@denx.de. -# -# (C) Copyright 2008 -# Guennadi Liakhovetki, DENX Software Engineering, -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public Li
[U-Boot] [PATCH 06/13] S3C64xx: mov cpu_init.S to the board directory
From: Zhong Hongbo It just only do the memory init. The memory depend on the design of board. Signed-off-by: Zhong Hongbo --- arch/arm/cpu/arm1176/s3c64xx/Makefile |2 +- arch/arm/cpu/arm1176/s3c64xx/cpu_init.S | 135 --- board/samsung/smdk6400/Makefile |2 +- board/samsung/smdk6400/mem_init.S | 135 +++ 4 files changed, 137 insertions(+), 137 deletions(-) delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S create mode 100644 board/samsung/smdk6400/mem_init.S diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile index 93f..2f37431 100644 --- a/arch/arm/cpu/arm1176/s3c64xx/Makefile +++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile @@ -30,7 +30,7 @@ LIB = $(obj)lib$(SOC).o SOBJS = reset.o -COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o +COBJS-$(CONFIG_S3C64XX)+= speed.o COBJS-y+= timer.o COBJS-$(CONFIG_PWM) += pwm.o diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S deleted file mode 100644 index df88cba..000 --- a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400 - * - * Copyright (C) 2008 - * Guennadi Liakhovetki, DENX Software Engineering, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - - .globl mem_ctrl_asm_init -mem_ctrl_asm_init: - /* DMC1 base address 0x7e001000 */ - ldr r0, =ELFIN_DMC1_BASE - - ldr r1, =0x4 - str r1, [r0, #INDEX_DMC_MEMC_CMD] - - ldr r1, =DMC_DDR_REFRESH_PRD - str r1, [r0, #INDEX_DMC_REFRESH_PRD] - - ldr r1, =DMC_DDR_CAS_LATENCY - str r1, [r0, #INDEX_DMC_CAS_LATENCY] - - ldr r1, =DMC_DDR_t_DQSS - str r1, [r0, #INDEX_DMC_T_DQSS] - - ldr r1, =DMC_DDR_t_MRD - str r1, [r0, #INDEX_DMC_T_MRD] - - ldr r1, =DMC_DDR_t_RAS - str r1, [r0, #INDEX_DMC_T_RAS] - - ldr r1, =DMC_DDR_t_RC - str r1, [r0, #INDEX_DMC_T_RC] - - ldr r1, =DMC_DDR_t_RCD - ldr r2, =DMC_DDR_schedule_RCD - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RCD] - - ldr r1, =DMC_DDR_t_RFC - ldr r2, =DMC_DDR_schedule_RFC - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RFC] - - ldr r1, =DMC_DDR_t_RP - ldr r2, =DMC_DDR_schedule_RP - orr r1, r1, r2 - str r1, [r0, #INDEX_DMC_T_RP] - - ldr r1, =DMC_DDR_t_RRD - str r1, [r0, #INDEX_DMC_T_RRD] - - ldr r1, =DMC_DDR_t_WR - str r1, [r0, #INDEX_DMC_T_WR] - - ldr r1, =DMC_DDR_t_WTR - str r1, [r0, #INDEX_DMC_T_WTR] - - ldr r1, =DMC_DDR_t_XP - str r1, [r0, #INDEX_DMC_T_XP] - - ldr r1, =DMC_DDR_t_XSR - str r1, [r0, #INDEX_DMC_T_XSR] - - ldr r1, =DMC_DDR_t_ESR - str r1, [r0, #INDEX_DMC_T_ESR] - - ldr r1, =DMC1_MEM_CFG - str r1, [r0, #INDEX_DMC_MEMORY_CFG] - - ldr r1, =DMC1_MEM_CFG2 - str r1, [r0, #INDEX_DMC_MEMORY_CFG2] - - ldr r1, =DMC1_CHIP0_CFG - str r1, [r0, #INDEX_DMC_CHIP_0_CFG] - - ldr r1, =DMC_DDR_32_CFG - str r1, [r0, #INDEX_DMC_USER_CONFIG] - - /* DMC0 DDR Chip 0 configuration direct command reg */ - ldr r1, =DMC_NOP0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Precharge All */ - ldr r1, =DMC_PA0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Auto Refresh 2 time */ - ldr r1, =DMC_AR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* MRS */ - ldr r1, =DMC_mDDR_EMR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Mode Reg */ - ldr r1, =DMC_mDDR_MR0 - str r1, [r0, #INDEX_DMC_DIRECT_CMD] - - /* Enable DMC1 */ - mov r1, #0x0 - str r1, [r0, #INDEX_DMC_MEMC_CMD] - -check_dmc1_ready: - ldr r1, [r0, #INDEX_DMC_MEMC_STATUS] - mov
[U-Boot] [PATCH 05/13] S3C64XX: reference s5p cpu time system for s3c64xx timer
From: Zhong Hongbo
The old s3c64xx timer is not work normal, Adopt s5p time design,
It work perfect.
Signed-off-by: Zhong Hongbo
---
arch/arm/cpu/arm1176/s3c64xx/timer.c | 195 --
1 files changed, 94 insertions(+), 101 deletions(-)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c
b/arch/arm/cpu/arm1176/s3c64xx/timer.c
index f16a37b..7904d09 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
+++ b/arch/arm/cpu/arm1176/s3c64xx/timer.c
@@ -1,23 +1,8 @@
/*
- * (C) Copyright 2003
- * Texas Instruments
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Marius Groeger
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH
- * Alex Zuepke
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering,
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd.
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering,
+ * Copyright (C) 2009 Samsung Electronics
+ * Heungjun Kim
+ * Inki Dae
+ * Minkyu Kang
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -39,64 +24,29 @@
*/
#include
-#include
+#include
#include
-#include
-
-static ulong timer_load_val;
+#include
+#include
-#define PRESCALER 167
+DECLARE_GLOBAL_DATA_PTR;
-static s3c64xx_timers *s3c64xx_get_base_timers(void)
-{
- return (s3c64xx_timers *)ELFIN_TIMER_BASE;
-}
+static unsigned long get_current_tick(void);
/* macro to read the 16 bit timer */
-static inline ulong read_timer(void)
+static inline struct s3c_timer *s3c_get_base_timer(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- return timers->TCNTO4;
+ return (struct s3c_timer *)s3c64xx_get_base_timer();
}
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
int timer_init(void)
{
- s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
- /* use PWM Timer 4 because it has no output */
- /*
-* We use the following scheme for the timer:
-* Prescaler is hard fixed at 167, divider at 1/4.
-* This gives at PCLK frequency 66MHz approx. 10us ticks
-* The timer is set to wrap after 100s, at 66MHz this obviously
-* happens after 10,000,000 ticks. A long variable can thus
-* keep values up to 40,000s, i.e., 11 hours. This should be
-* enough for most uses:-) Possible optimizations: select a
-* binary-friendly frequency, e.g., 1ms / 128. Also calculate
-* the prescaler automatically for other PCLK frequencies.
-*/
- timers->TCFG0 = PRESCALER << 8;
- if (timer_load_val == 0) {
- timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
- timers->TCFG1 = (timers->TCFG1 & ~0xf) | 0x2;
- }
-
- /* load value for 10 ms timeout */
- lastdec = timers->TCNTB4 = timer_load_val;
- /* auto load, manual update of Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO |
- TCON_4_UPDATE;
+ /* PWM Timer 4 */
+ pwm_init(4, MUX_DIV_2, 0);
+ pwm_config(4, 0, 0);
+ pwm_enable(4);
- /* auto load, start Timer 4 */
- timers->TCON = (timers->TCON & ~0x0070) | TCON_4_AUTO | COUNT_4_ON;
- timestamp = 0;
+ reset_timer_masked();
return 0;
}
@@ -104,57 +54,100 @@ int timer_init(void)
/*
* timer without interrupts
*/
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
+unsigned long get_timer(unsigned long base)
{
- ulong now = read_timer();
+ return get_timer_masked() - base;
+}
- if (lastdec >= now) {
- /* normal mode */
- timestamp += lastdec - now;
+/* delay x useconds */
+void __udelay(unsigned long usec)
+{
+ struct s3c_timer *const timer = s3c_get_base_timer();
+ unsigned long tmo, tmp, count_value;
+
+ count_value = readl(&timer->tcntb4);
+
+ if (usec >= 1000) {
+ /*
+* if "big" number, spread normalization
+* to seconds
+* 1. start to normalize for usec to ticks per sec
+* 2. find number of "ticks" to wait to achieve target
+* 3. finish normalize.
+*/
+ tmo = usec / 1000;
+ tmo *= (CONFIG_SYS_HZ * count_value);
+ tmo /= 1000;
} else {
- /* we have an overflow ... */
- timestamp += lastdec + timer_load_val - now;
+ /* else small number, don't kill it prior to HZ multiply */
+ tmo = usec * CONFIG_SYS_HZ * count_value;
+
[U-Boot] [PATCH 04/13] S3C64XX: add pwm for s3c64xx support
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
arch/arm/cpu/arm1176/s3c64xx/Makefile |1 +
arch/arm/cpu/arm1176/s3c64xx/pwm.c | 189 +++
arch/arm/include/asm/arch-s3c64xx/pwm.h | 70 ++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 57 ++---
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 59 -
include/configs/smdk6400.h |3 +
6 files changed, 272 insertions(+), 107 deletions(-)
create mode 100644 arch/arm/cpu/arm1176/s3c64xx/pwm.c
create mode 100644 arch/arm/include/asm/arch-s3c64xx/pwm.h
delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile
b/arch/arm/cpu/arm1176/s3c64xx/Makefile
index 0785b19..93f 100644
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ b/arch/arm/cpu/arm1176/s3c64xx/Makefile
@@ -32,6 +32,7 @@ SOBJS = reset.o
COBJS-$(CONFIG_S3C6400)+= cpu_init.o speed.o
COBJS-y+= timer.o
+COBJS-$(CONFIG_PWM) += pwm.o
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
diff --git a/arch/arm/cpu/arm1176/s3c64xx/pwm.c
b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
new file mode 100644
index 000..d1d70ff
--- /dev/null
+++ b/arch/arm/cpu/arm1176/s3c64xx/pwm.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2012
+ *
+ * Zhong Hongbo
+ *
+ * based on arch/arm/cpu/armv7/s5p-common/sromc.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+int pwm_enable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon |= TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+
+ return 0;
+}
+
+void pwm_disable(int pwm_id)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned long tcon;
+
+ tcon = readl(&pwm->tcon);
+ tcon &= ~TCON_START(pwm_id);
+
+ writel(tcon, &pwm->tcon);
+}
+
+static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
+{
+ unsigned long tin_parent_rate;
+ unsigned int div;
+
+ tin_parent_rate = get_PCLK();
+
+ for (div = 2; div <= 16; div *= 2) {
+ if ((tin_parent_rate / (div << 16)) < freq)
+ return tin_parent_rate / div;
+ }
+
+ return tin_parent_rate / 16;
+}
+
+#define NS_IN_HZ (10UL)
+
+int pwm_config(int pwm_id, int duty_ns, int period_ns)
+{
+ const struct s3c_timer *pwm =
+ (struct s3c_timer *)s3c64xx_get_base_timer();
+ unsigned int offset;
+ unsigned long tin_rate;
+ unsigned long tin_ns;
+ unsigned long period;
+ unsigned long tcon;
+ unsigned long tcnt;
+ unsigned long tcmp;
+
+ /*
+* We currently avoid using 64bit arithmetic by using the
+* fact that anything faster than 1GHz is easily representable
+* by 32bits.
+*/
+ if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
+ return -ERANGE;
+
+ if (duty_ns > period_ns)
+ return -EINVAL;
+
+ period = NS_IN_HZ / period_ns;
+
+ /* Check to see if we are changing the clock rate of the PWM */
+ tin_rate = pwm_calc_tin(pwm_id, period);
+
+ tin_ns = NS_IN_HZ / tin_rate;
+ tcnt = period_ns / tin_ns;
+
+ /* Note, counters count down */
+ tcmp = duty_ns / tin_ns;
+ tcmp = tcnt - tcmp;
+
+ /*
+* the pwm hw only checks the compare register after a decrement,
+* so the pin never toggles if tcmp = tcnt
+*/
+ if (tcmp == tcnt)
+ tcmp--;
+
+ if (tcmp < 0)
+ tcmp = 0;
+
+ /* Update the PWM register block. */
+ offset = pwm_id * 3;
+ if (pwm_id < 4) {
+ writel(tcnt, &pwm->tcntb0 + offset);
+ writel(tcmp, &pwm->tcmpb0 + offset);
+ }
+
+ tcon = readl(&pwm->tcon);
+ tcon |= TCON_UPDATE(pwm_id);
+ if (pwm_id < 4)
[U-Boot] [PATCH 03/13] S3C64XX: Use readl/writel to operate uart
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 65 +--
arch/arm/include/asm/arch-s3c64xx/s3c64x0.h | 31 -
arch/arm/include/asm/arch-s3c64xx/uart.h| 54 ++
board/samsung/smdk6400/lowlevel_init.S |8 ---
drivers/serial/s3c64xx.c| 50 +
5 files changed, 87 insertions(+), 121 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/uart.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 5cb8976..c6b41e8 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -582,62 +582,6 @@
*/
#define ELFIN_UART_BASE0x7F005000
-#define ELFIN_UART0_OFFSET 0x
-#define ELFIN_UART1_OFFSET 0x0400
-#define ELFIN_UART2_OFFSET 0x0800
-
-#define ULCON_OFFSET 0x00
-#define UCON_OFFSET0x04
-#define UFCON_OFFSET 0x08
-#define UMCON_OFFSET 0x0C
-#define UTRSTAT_OFFSET 0x10
-#define UERSTAT_OFFSET 0x14
-#define UFSTAT_OFFSET 0x18
-#define UMSTAT_OFFSET 0x1C
-#define UTXH_OFFSET0x20
-#define URXH_OFFSET0x24
-#define UBRDIV_OFFSET 0x28
-#define UDIVSLOT_OFFSET0x2C
-#define UINTP_OFFSET 0x30
-#define UINTSP_OFFSET 0x34
-#define UINTM_OFFSET 0x38
-
-#define ULCON0_REG __REG(0x7F005000)
-#define UCON0_REG __REG(0x7F005004)
-#define UFCON0_REG __REG(0x7F005008)
-#define UMCON0_REG __REG(0x7F00500C)
-#define UTRSTAT0_REG __REG(0x7F005010)
-#define UERSTAT0_REG __REG(0x7F005014)
-#define UFSTAT0_REG__REG(0x7F005018)
-#define UMSTAT0_REG__REG(0x7F00501c)
-#define UTXH0_REG __REG(0x7F005020)
-#define URXH0_REG __REG(0x7F005024)
-#define UBRDIV0_REG__REG(0x7F005028)
-#define UDIVSLOT0_REG __REG(0x7F00502c)
-#define UINTP0_REG __REG(0x7F005030)
-#define UINTSP0_REG__REG(0x7F005034)
-#define UINTM0_REG __REG(0x7F005038)
-
-#define ULCON1_REG __REG(0x7F005400)
-#define UCON1_REG __REG(0x7F005404)
-#define UFCON1_REG __REG(0x7F005408)
-#define UMCON1_REG __REG(0x7F00540C)
-#define UTRSTAT1_REG __REG(0x7F005410)
-#define UERSTAT1_REG __REG(0x7F005414)
-#define UFSTAT1_REG__REG(0x7F005418)
-#define UMSTAT1_REG__REG(0x7F00541c)
-#define UTXH1_REG __REG(0x7F005420)
-#define URXH1_REG __REG(0x7F005424)
-#define UBRDIV1_REG__REG(0x7F005428)
-#define UDIVSLOT1_REG __REG(0x7F00542c)
-#define UINTP1_REG __REG(0x7F005430)
-#define UINTSP1_REG__REG(0x7F005434)
-#define UINTM1_REG __REG(0x7F005438)
-
-#define UTRSTAT_TX_EMPTY (1 << 2)
-#define UTRSTAT_RX_READY (1 << 0)
-#define UART_ERR_MASK 0xF
-
/*
* PWM timer
*/
@@ -804,17 +748,12 @@
#define DMC_DDR_USER_CONFIG1
#ifndef __ASSEMBLY__
-enum s3c64xx_uarts_nr {
- S3C64XX_UART0,
- S3C64XX_UART1,
- S3C64XX_UART2,
-};
#include "s3c64x0.h"
-static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
+static inline unsigned int s3c64xx_get_base_uart(void)
{
- return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
+ return ELFIN_UART_BASE;
}
static inline unsigned int s3c64xx_get_base_nand(void)
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
index 0bbf1d0..7add68c 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
@@ -40,37 +40,6 @@
#include
-/* UART (see manual chapter 11) */
-typedef struct {
- volatile u32ULCON;
- volatile u32UCON;
- volatile u32UFCON;
- volatile u32UMCON;
- volatile u32UTRSTAT;
- volatile u32UERSTAT;
- volatile u32UFSTAT;
- volatile u32UMSTAT;
-#ifdef __BIG_ENDIAN
- volatile u8 res1[3];
- volatile u8 UTXH;
- volatile u8 res2[3];
- volatile u8 URXH;
-#else /* Little Endian */
- volatile u8 UTXH;
- volatile u8 res1[3];
- volatile u8 URXH;
- volatile u8 res2[3];
-#endif
- volatile u32UBRDIV;
-#ifdef __BIG_ENDIAN
- volatile u8 res3[2];
- volatile u16UDIVSLOT;
-#else
- volatile u16UDIVSLOT;
- volatile u8 res3[2];
-#endif
-} s3c64xx_uart;
-
/* PWM TIMER (see manual chapter 10) */
typedef struct {
volatile u32TCNTB;
diff --git a/arch/arm/include/asm/arch-s3c64xx/uart.h
b/arch/arm/include/asm/arch-s3c64xx/uart.h
new file mode 100644
[U-Boot] [PATCH 02/13] S3C64XX: Switch to use readl/writel to operate nand flash
From: Zhong Hongbo
Signed-off-by: Zhong Hongbo
---
arch/arm/include/asm/arch-s3c64xx/nand.h| 69 +++
arch/arm/include/asm/arch-s3c64xx/s3c6400.h | 79 ++-
board/samsung/smdk6400/lowlevel_init.S |8 ++--
drivers/mtd/nand/s3c64xx.c | 58 +---
4 files changed, 116 insertions(+), 98 deletions(-)
create mode 100644 arch/arm/include/asm/arch-s3c64xx/nand.h
diff --git a/arch/arm/include/asm/arch-s3c64xx/nand.h
b/arch/arm/include/asm/arch-s3c64xx/nand.h
new file mode 100644
index 000..51e4d34
--- /dev/null
+++ b/arch/arm/include/asm/arch-s3c64xx/nand.h
@@ -0,0 +1,69 @@
+/*
+ * (C) Copyright 2012
+ * Zhong Hongbo
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_ARCH_NAND_H__
+#define __ASM_ARCH_NAND_H__
+
+#define NFCONF_ECC_4BIT(1<<24)
+
+#define NFCONT_ECC_ENC (1<<18)
+#define NFCONT_WP (1<<16)
+#define NFCONT_MECCLOCK(1<<7)
+#define NFCONT_SECCLOCK(1<<6)
+#define NFCONT_INITMECC(1<<5)
+#define NFCONT_INITSECC(1<<4)
+#define NFCONT_INITECC (NFCONT_INITMECC | NFCONT_INITSECC)
+#define NFCONT_CS_ALT (1<<2)
+#define NFCONT_CS (1<<1)
+#define NFCONT_ENABLE (1<<0)
+
+#define NFSTAT_ECCENCDONE (1<<7)
+#define NFSTAT_ECCDECDONE (1<<6)
+#define NFSTAT_RnB (1<<0)
+
+#define NFESTAT0_ECCBUSY (1<<31)
+
+#ifndef __ASSEMBLY__
+/* NAND FLASH */
+struct s3c64xx_nand {
+ u32 nfconf;
+ u32 nfcont;
+ u32 nfcmmd;
+ u32 nfaddr;
+ u32 nfdata;
+ u32 nfmeccdata0;
+ u32 nfmeccdata1;
+ u32 nfseccdata0;
+ u32 nfsblk;
+ u32 nfeblk;
+ u32 nfstat;
+ u32 nfestat0;
+ u32 nfestat1;
+ u32 nfmecc0;
+ u32 nfmecc1;
+ u32 nfsecc;
+ u32 nfmlcbitpt;
+};
+#endif
+
+#endif
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
index 10b3324..5cb8976 100644
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
@@ -556,80 +556,6 @@
*/
#define ELFIN_NAND_BASE0x7020
-#define NFCONF_OFFSET 0x00
-#define NFCONT_OFFSET 0x04
-#define NFCMMD_OFFSET 0x08
-#define NFADDR_OFFSET 0x0c
-#define NFDATA_OFFSET 0x10
-#define NFMECCDATA0_OFFSET 0x14
-#define NFMECCDATA1_OFFSET 0x18
-#define NFSECCDATA0_OFFSET 0x1c
-#define NFSBLK_OFFSET 0x20
-#define NFEBLK_OFFSET 0x24
-#define NFSTAT_OFFSET 0x28
-#define NFESTAT0_OFFSET0x2c
-#define NFESTAT1_OFFSET0x30
-#define NFMECC0_OFFSET 0x34
-#define NFMECC1_OFFSET 0x38
-#define NFSECC_OFFSET 0x3c
-#define NFMLCBITPT_OFFSET 0x40
-
-#define NFCONF (ELFIN_NAND_BASE + NFCONF_OFFSET)
-#define NFCONT (ELFIN_NAND_BASE + NFCONT_OFFSET)
-#define NFCMMD (ELFIN_NAND_BASE + NFCMMD_OFFSET)
-#define NFADDR (ELFIN_NAND_BASE + NFADDR_OFFSET)
-#define NFDATA (ELFIN_NAND_BASE + NFDATA_OFFSET)
-#define NFMECCDATA0(ELFIN_NAND_BASE + NFMECCDATA0_OFFSET)
-#define NFMECCDATA1(ELFIN_NAND_BASE + NFMECCDATA1_OFFSET)
-#define NFSECCDATA0(ELFIN_NAND_BASE + NFSECCDATA0_OFFSET)
-#define NFSBLK (ELFIN_NAND_BASE + NFSBLK_OFFSET)
-#define NFEBLK (ELFIN_NAND_BASE + NFEBLK_OFFSET)
-#define NFSTAT (ELFIN_NAND_BASE + NFSTAT_OFFSET)
-#define NFESTAT0 (ELFIN_NAND_BASE + NFESTAT0_OFFSET)
-#define NFESTAT1 (ELFIN_NAND_BASE + NFESTAT1_OFFSET)
-#define NFMECC0(ELFIN_NAND_BASE + NFMECC0_OFFSET)
-#define NFMECC1(ELFIN_NAND_BASE + NFMECC1_OFFSET)
-#define NFSECC (ELFIN_NAND_BASE + NFSECC_OFFSET)
-#define NFMLCBITPT (ELFIN_NAND_BASE + NFMLCBITPT_OFFSE
[U-Boot] [PATCH 01/13] smdk6400: Move smdk6400 board from Makefile to boards.cfg
From: Zhong Hongbo Signed-off-by: Zhong Hongbo --- Makefile | 20 board/samsung/smdk6400/config.mk |4 +--- boards.cfg |2 ++ include/configs/smdk6400.h |2 +- 4 files changed, 4 insertions(+), 24 deletions(-) diff --git a/Makefile b/Makefile index 0197239..e3af33f 100644 --- a/Makefile +++ b/Makefile @@ -695,26 +695,6 @@ SX1_config:unconfig fi; @$(MKCONFIG) -n $@ SX1 arm arm925t sx1 -# -## ARM1176 Systems -# -smdk6400_noUSB_config \ -smdk6400_config: unconfig - @mkdir -p $(obj)include $(obj)board/samsung/smdk6400 - @mkdir -p $(obj)nand_spl/board/samsung/smdk6400 - @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - @if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then \ - echo "RAM_TEXT = 0x57e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - else \ - echo "RAM_TEXT = 0xc7e0" >> $(obj)board/samsung/smdk6400/config.tmp;\ - fi - @$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx - @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk - -# -# - clean: @rm -f $(obj)examples/standalone/82559_eeprom \ $(obj)examples/standalone/atmel_df_pow2\ diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk index 6f04c2f..93a1a0d 100644 --- a/board/samsung/smdk6400/config.mk +++ b/board/samsung/smdk6400/config.mk @@ -21,10 +21,8 @@ # # download area is 0x5000c000 -sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp - ifndef CONFIG_NAND_SPL -CONFIG_SYS_TEXT_BASE = $(RAM_TEXT) +CONFIG_SYS_TEXT_BASE = $(CONFIG_RAM_TEXT) else CONFIG_SYS_TEXT_BASE = 0 endif diff --git a/boards.cfg b/boards.cfg index 9205070..a6ca01f 100644 --- a/boards.cfg +++ b/boards.cfg @@ -47,6 +47,8 @@ flea3arm arm1136 - CarMedi mx35pdk arm arm1136 - freescale mx35 apollon arm arm1136 apollon - omap24xx omap2420h4 arm arm1136 - ti omap24xx +smdk6400 arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0xc7e0 +smdk6400_nousb arm arm1176 smdk6400 samsungs3c64xx smdk6400:NAND_U_BOOT,RAM_TEXT=0x57e0 tnetv107x_evmarm arm1176 tnetv107xevmti tnetv107x integratorap_cm720t arm arm720t integrator armltd - integratorap:CM720T integratorap_cm920t arm arm920t integrator armltd - integratorap:CM920T diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 04caeef..47326d6 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -54,7 +54,7 @@ /* input clock of PLL: SMDK6400 has 12MHz input clock */ #define CONFIG_SYS_CLK_FREQ1200 -#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc000) +#if !defined(CONFIG_NAND_U_BOOT) && (CONFIG_SYS_TEXT_BASE >= 0xc000) #define CONFIG_ENABLE_MMU #endif -- 1.7.5.4 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] S3c64xx: Switch all I/O to use readl/writel function
This serial patch intent to: 1. Switch all I/O to use readl/writel function 2. Change nand_spl to use SPL framework 3. S3C64XX serial includes s3c6400 and s3c6410, Here seprate cpu and board file to support to board's of s3c6410. I test this patch on my s3c6410 development board. the log as following: U-Boot 2012.04.01-10905-g9fa0c77 (Jul 07 2012 - 15:50:57) for SMDK6400 CPU: S3C64XX@532MHz Fclk = 532MHz, Hclk = 133MHz, Pclk = 66MHz (ASYNC Mode) Board: DMATEK6410 DRAM: 128 MiB WARNING: Caches not enabled NAND: 128 MiB *** Warning - bad CRC, using default environment In:serial Out: serial Err: serial Net: dm9000 Hit any key to stop autoboot: 0 DMATEK6410 # ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] armv7: Fix to mistake clean the memory space
On 07/07/2012 03:29 PM, Andreas Bießmann wrote: > Dear Zhong Hongbo, > > Am Freitag, 6. Juli 2012 schrieb Zhong Hongbo : > > On 07/06/2012 09:57 PM, Andreas Bießmann wrote: > > Dear Zhong Hongbo, > > > > On 06.07.2012 15:50, Zhong Hongbo wrote: > >> On 07/06/2012 09:23 PM, Andreas Bießmann wrote: > >>> On 06.07.2012 14:20, Zhong Hongbo wrote: > >>>> From: Zhong Hongbo > > >>>> > >>>> In currently, when __bss_start is equal to __bss_end__, > >>>> The bss loop will clear all the things in memory space. > >>>> > >>>> But just only when __bss_end__ greater than __bss_start__, > >>>> we do the clear bss section operation. > >>>> > >>>> Signed-off-by: Hongbo Zhong > > >>>> Signed-off-by: Andreas Bießmann > > >>> > >>> well this is wrong, I would maybe ack it > Hi Andreas, > > How I do it? Signed-off-by or Reviewed-by? > > > you do not need to put these lines in at all, the reviewer will reply > your mail with the correct line (Acked-by, Reviewed-by, Tested-by) in > it. A tool called patchwork will then provide some convenience for the > custodians. He just pulls the mbox file from patchwork which has all the > collected lines in it. The resulting commit in the custodian repository > will contain all these linesgathered while in review process. > You ought to put some other people on cc so they can review the patch. > This can easily achieved by putting a 'cc: ' into the patch. > Git will then put these addresses on cc automagicly. Ok, Thanks, hongbo > > Best regards > > Andreas Bießmann > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [V3] arm: Fix to mistake clean the memory space
From: Zhong Hongbo In currently, when __bss_start is equal to __bss_end__, The bss loop will clear all the things in memory space. But just only when __bss_end__ greater than __bss_start__, we do the clear bss section operation. Signed-off-by: Zhong Hongbo --- Change for V2 - Fixed bss clear operation, no just skip it. - Adjust the commit information Change for V3 - Modify all the bss clean operation for arm platform - Adjust the title --- arch/arm/cpu/arm1136/start.S |8 +--- arch/arm/cpu/arm1176/start.S |9 + arch/arm/cpu/arm720t/start.S |8 +--- arch/arm/cpu/arm920t/start.S |8 +--- arch/arm/cpu/arm925t/start.S |8 +--- arch/arm/cpu/arm946es/start.S |8 +--- arch/arm/cpu/arm_intcm/start.S |8 +--- arch/arm/cpu/armv7/start.S |8 +--- arch/arm/cpu/ixp/start.S |8 +--- arch/arm/cpu/lh7a40x/start.S |8 +--- arch/arm/cpu/pxa/start.S |8 +--- arch/arm/cpu/s3c44b0/start.S |8 +--- arch/arm/cpu/sa1100/start.S|8 +--- 13 files changed, 65 insertions(+), 40 deletions(-) diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index c0db96c..2483c63 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -251,10 +251,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: #endif /* #ifndef CONFIG_SPL_BUILD */ /* diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 848144a..d613641 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -351,11 +351,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l - + b clbss_l +clbss_e: #ifndef CONFIG_NAND_SPL bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 540e3c2..3b97e80 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -228,10 +228,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index 8c5612c..9b8604e 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -271,10 +271,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index dbb93ef..1a54416 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -265,10 +265,12 @@ clear_bss: add r1, r1, r4 mov r2, #0x /* clear*/ -clbss_l:strr2, [r0]/* clear loop...*/ +clbss_l:cmpr0, r1 /* clear loop... */ + bhs clbss_e /* if reached end of bss, exit */ + str r2, [r0] add r0, r0, #4 - cmp r0, r1 - bne clbss_l + b clbss_l +clbss_e: bl coloured_LED_init bl red_led_on diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 89ba558..b4d1d2d 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -236,10 +236,12 @@ clear_bss: add r1, r1, r4 mov r2
Re: [U-Boot] [PATCH] armv7: Fix to mistake clean the memory space
On 07/06/2012 11:26 PM, Albert ARIBAUD wrote: > Hi Zhong Hongbo, > > On Fri, 06 Jul 2012 22:04:21 +0800, Zhong Hongbo > wrote: >> On 07/06/2012 09:57 PM, Andreas Bießmann wrote: >>> Dear Zhong Hongbo, >>> >>> On 06.07.2012 15:50, Zhong Hongbo wrote: >>>> On 07/06/2012 09:23 PM, Andreas Bießmann wrote: >>>>> On 06.07.2012 14:20, Zhong Hongbo wrote: >>>>>> From: Zhong Hongbo >>>>>> >>>>>> In currently, when __bss_start is equal to __bss_end__, >>>>>> The bss loop will clear all the things in memory space. >>>>>> >>>>>> But just only when __bss_end__ greater than __bss_start__, >>>>>> we do the clear bss section operation. >>>>>> >>>>>> Signed-off-by: Hongbo Zhong >>>>>> Signed-off-by: Andreas Bießmann >>>>> >>>>> well this is wrong, I would maybe ack it >>>> >>>> Ok >>> >>> After sending I doubt my statement was correct, but I found a source >>> http://www.denx.de/wiki/view/U-Boot/Patches#Review_Process_Git_Tags >> >> he, Ye, I think we(You, Albert and me) are involved in the development >> of the patch. > > It could be said of any reviewer that they are "involved in the > development of the patch", yet not all reviewers's Signed-off-by is > added to evey patch they review. There is a Reviewed-by tag for > reviewers. > > I personally do not consider it would make sense to have my > Signed-off-by on this patch. Ok, I am doing the patch. Thanks, hongbo > > Amicalement, > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] armv7: Fix to mistake clean the memory space
On 07/06/2012 09:57 PM, Andreas Bießmann wrote: > Dear Zhong Hongbo, > > On 06.07.2012 15:50, Zhong Hongbo wrote: >> On 07/06/2012 09:23 PM, Andreas Bießmann wrote: >>> On 06.07.2012 14:20, Zhong Hongbo wrote: >>>> From: Zhong Hongbo >>>> >>>> In currently, when __bss_start is equal to __bss_end__, >>>> The bss loop will clear all the things in memory space. >>>> >>>> But just only when __bss_end__ greater than __bss_start__, >>>> we do the clear bss section operation. >>>> >>>> Signed-off-by: Hongbo Zhong >>>> Signed-off-by: Andreas Bießmann >>> >>> well this is wrong, I would maybe ack it >> >> Ok > > After sending I doubt my statement was correct, but I found a source > http://www.denx.de/wiki/view/U-Boot/Patches#Review_Process_Git_Tags he, Ye, I think we(You, Albert and me) are involved in the development of the patch. > >>> >>>> Signed-off-by: Albert ARIBAUD >>>> --- >>> >>> Some more formal things ... >>> >>> This is the third version of this type of patch. Therefore it should >>> have a version history here and some version information in the subject >>> ([PATCH v3] maybe). Please read http://www.denx.de/wiki/view/U-Boot/Patches >>> especially >>> http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions >>> >> >> Thanks, I just see the format of patch. I will add the version >> information to the next review. >> >>> BTW: The content looks sane. >>> >> >> I will send v3 for this. > > a last formal thing to mention: The subject should (now) say 'arm: ...' > not 'armv7: ...'. Ok. Thanks, hongbo > > Best regards > > Andreas Bießmann > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] armv7: Fix to mistake clean the memory space
On 07/06/2012 09:23 PM, Andreas Bießmann wrote: > On 06.07.2012 14:20, Zhong Hongbo wrote: >> From: Zhong Hongbo >> >> In currently, when __bss_start is equal to __bss_end__, >> The bss loop will clear all the things in memory space. >> >> But just only when __bss_end__ greater than __bss_start__, >> we do the clear bss section operation. >> >> Signed-off-by: Hongbo Zhong >> Signed-off-by: Andreas Bießmann > > well this is wrong, I would maybe ack it Ok > >> Signed-off-by: Albert ARIBAUD >> --- > > Some more formal things ... > > This is the third version of this type of patch. Therefore it should > have a version history here and some version information in the subject > ([PATCH v3] maybe). Please read http://www.denx.de/wiki/view/U-Boot/Patches > especially > http://www.denx.de/wiki/view/U-Boot/Patches#Sending_updated_patch_versions > Thanks, I just see the format of patch. I will add the version information to the next review. > BTW: The content looks sane. > I will send v3 for this. Thanks, hongbo > Best regards > > Andreas Bießmann > > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
