[PATCH 3/5] roc-pc-rk3399: Add support for add-on board run-time detection

[sunil]

From: Suniel Mahesh 

roc-pc-rk3399 target has an add-on board, this add-on board hosts
a CW2015 chip which is connected as slave to I2C2. In order to
dynamically detect this add-on board at runtime, I2C2 is probed in
SPL. If probe is successfull then a corresponding dtb is loaded, else
regular dtb is loaded for the u-boot proper.

Signed-off-by: Suniel Mahesh 
Signed-off-by: Jagan Teki 
---
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 56 +
 configs/roc-pc-rk3399_defconfig |  2 ++
 2 files changed, 58 insertions(+)

diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index 7c3a803..b3cbfaa 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -32,6 +32,62 @@ out:
 }
 #endif
 
+#if !defined(CONFIG_TPL_BUILD) && defined(CONFIG_SPL_BUILD)
+
+#include 
+
+#define BUS_NUM2
+#define ROC_RK3399_MEZZ_BAT_ADDR   0x62
+
+enum roc_rk3399_pc_board_type {
+   ROC_RK3399_PC,  /* roc-rk3399-pc base board */
+   ROC_RK3399_MEZZ_M2_POE, /* roc-rk3399-Mezz M.2 PoE */
+};
+
+int board_early_init_f(void)
+{
+   struct udevice *bus, *dev;
+   int ret;
+
+   /* default board type */
+   gd->board_type = ROC_RK3399_PC;
+
+   ret = uclass_get_device_by_seq(UCLASS_I2C, BUS_NUM, &bus);
+   if (ret) {
+   debug("failed to get i2c bus 2\n");
+   return ret;
+   }
+
+   ret = dm_i2c_probe(bus, ROC_RK3399_MEZZ_BAT_ADDR, 0, &dev);
+   if (ret) {
+   debug("failed to probe i2c2 battery controller IC\n");
+   return ret;
+   }
+
+   gd->board_type = ROC_RK3399_MEZZ_M2_POE;
+
+   return 0;
+}
+
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+   if (gd->board_type == ROC_RK3399_PC) {
+   if (!strcmp(name, "rk3399-roc-pc.dtb"))
+   return 0;
+   }
+
+   if (gd->board_type == ROC_RK3399_MEZZ_M2_POE) {
+   if (!strcmp(name, "rk3399-roc-pc-mezzanine.dtb"))
+   return 0;
+   }
+
+   return -EINVAL;
+}
+#endif
+
+#endif /* CONFIG_SPL_BUILD */
+
 #if defined(CONFIG_TPL_BUILD)
 
 #define GPIO0_BASE  0xff72
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index 4d1a077..e56fd3d 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -10,6 +10,7 @@ CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
 CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_BOARD_TYPES=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
@@ -25,6 +26,7 @@ CONFIG_CMD_USB=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
+CONFIG_OF_LIST="rk3399-roc-pc rk3399-roc-pc-mezzanine"
 CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-- 
2.7.4

[PATCH 0/5] Enable I2C in SPL, support runtime detection of add-on board

[sunil]

From: Suniel Mahesh 

This patch series adds runtime detection of add-on board(ROC-RK3399-PC 
Mezzanine) by
enabling I2C in SPL.
This add on board hosts a CW2015 chip which is connected as slave to I2C2. In 
order
to dynamically detect this add-on board at runtime, I2C2 is probed in SPL. If 
probe
is successfull then a corresponding dtb is loaded, else regular dtb is loaded 
for
the u-boot proper.

Patch #1 moves board initialiation code after rk3399 init is done. Patch #2 
enables
I2C in SPL for any add-on board detection at run time. Patch #3 adds support for
add-on board run-time detection. Patch #4 drops ROC-RK3399-PC Mezzanine board 
as this
is an add-on board, it will be detected at runtime. Patch #5 enables PCIe/M.2 
and NVMe,
as this add-on board has a PCIe/M.2.

Jagan Teki (1):
  rockchip: spl: Move board_early_init_f after cpu timer

Suniel Mahesh (4):
  roc-pc-rk3399: Enable I2C in SPL for add-on board detection
  roc-pc-rk3399: Add support for add-on board run-time detection
  rk3399: drop ROC-RK3399-PC Mezzanine board
  roc-pc-rk3399: Enable PCIe/M.2, NVMe

 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi  | 13 +
 arch/arm/mach-rockchip/spl.c|  5 +-
 board/firefly/roc-pc-rk3399/MAINTAINERS |  2 -
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 56 ++
 configs/roc-pc-mezzanine-rk3399_defconfig   | 74 -
 configs/roc-pc-rk3399_defconfig | 10 +++-
 6 files changed, 81 insertions(+), 79 deletions(-)
 delete mode 100644 configs/roc-pc-mezzanine-rk3399_defconfig

-- 
2.7.4

[PATCH 1/5] rockchip: spl: Move board_early_init_f after cpu timer

[sunil]

From: Jagan Teki 

Custom board_early_init_f not only deal with simple gpio
configuration but also have a possibility to access clocks
to process any clock related operations like checking reset
cause state and etc.

So, call it once the rockchip timer initialization done instead
of calling first place of board_init_f which doesn't have any
rockchip init code before.

This specific concern was tested with checking reset reason
via board_early_init_f, which indeed require a clk probe.

Signed-off-by: Jagan Teki 
Tested-by: Suniel Mahesh 
---
 arch/arm/mach-rockchip/spl.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index ec2f66d..82586fe 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -124,8 +124,6 @@ void board_init_f(ulong dummy)
debug("\nspl:debug uart enabled in %s\n", __func__);
 #endif
 
-   board_early_init_f();
-
ret = spl_early_init();
if (ret) {
printf("spl_early_init() failed: %d\n", ret);
@@ -139,6 +137,9 @@ void board_init_f(ulong dummy)
/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
timer_init();
 #endif
+
+   board_early_init_f();
+
 #if !defined(CONFIG_TPL) || defined(CONFIG_SPL_OS_BOOT)
debug("\nspl:init dram\n");
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
-- 
2.7.4

[PATCH 2/5] roc-pc-rk3399: Enable I2C in SPL for add-on board detection

[sunil]

From: Suniel Mahesh 

This patch enables I2C in SPL for any add-on board detection
at run time.

Signed-off-by: Suniel Mahesh 
Signed-off-by: Jagan Teki 
---
 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 13 +
 configs/roc-pc-rk3399_defconfig|  5 -
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi 
b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 141dd0b..6de30d4 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -56,3 +56,16 @@
 &vcc_sdio {
regulator-always-on;
 };
+
+&pcfg_pull_none_12ma {
+   u-boot,dm-pre-reloc;
+};
+
+&i2c2 {
+   u-boot,dm-pre-reloc;
+   status= "okay";
+};
+
+&i2c2_xfer {
+   u-boot,dm-pre-reloc;
+};
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index 76e76c1..4d1a077 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -13,19 +13,22 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 CONFIG_SPL_STACK_R=y
 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
+CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_TPL=y
 CONFIG_TPL_GPIO_SUPPORT=y
 CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks 
assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_ROCKCHIP_GPIO=y
 CONFIG_SYS_I2C_ROCKCHIP=y
 CONFIG_MISC=y
-- 
2.7.4

[PATCH 4/5] rk3399: drop ROC-RK3399-PC Mezzanine board

[sunil]

From: Suniel Mahesh 

As we have added runtime detection support for ROC-RK3399-PC Mezzanine
board, which is an add-on board and as indicated in earlier commit, we
are dropping separate defconfig file and support.

see commit f417d71ea78b ("rk3399: Add ROC-RK3399-PC Mezzanine board")

Signed-off-by: Suniel Mahesh 
Signed-off-by: Jagan Teki 
---
 board/firefly/roc-pc-rk3399/MAINTAINERS   |  2 -
 configs/roc-pc-mezzanine-rk3399_defconfig | 74 ---
 2 files changed, 76 deletions(-)
 delete mode 100644 configs/roc-pc-mezzanine-rk3399_defconfig

diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS 
b/board/firefly/roc-pc-rk3399/MAINTAINERS
index 68a5b75..7564dd2 100644
--- a/board/firefly/roc-pc-rk3399/MAINTAINERS
+++ b/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -1,8 +1,6 @@
 ROC-RK3399-PC
 M: Levin Du 
-M: Suniel Mahesh 
 S: Maintained
 F: board/firefly/roc-pc-rk3399
 F: include/configs/roc-pc-rk3399.h
 F: configs/roc-pc-rk3399_defconfig
-F: configs/roc-pc-mezzanine-rk3399_defconfig
diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig 
b/configs/roc-pc-mezzanine-rk3399_defconfig
deleted file mode 100644
index ff49413..000
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ /dev/null
@@ -1,74 +0,0 @@
-CONFIG_ARM=y
-CONFIG_ARCH_ROCKCHIP=y
-CONFIG_SYS_TEXT_BASE=0x0020
-CONFIG_ENV_OFFSET=0x3F8000
-CONFIG_ROCKCHIP_RK3399=y
-CONFIG_TARGET_ROC_PC_RK3399=y
-CONFIG_NR_DRAM_BANKS=1
-CONFIG_DEBUG_UART_BASE=0xFF1A
-CONFIG_DEBUG_UART_CLOCK=2400
-CONFIG_DEBUG_UART=y
-CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
-CONFIG_DISPLAY_BOARDINFO_LATE=y
-# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
-CONFIG_SPL_STACK_R=y
-CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x1
-CONFIG_TPL=y
-CONFIG_TPL_GPIO_SUPPORT=y
-CONFIG_CMD_BOOTZ=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_PCI=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_TIME=y
-CONFIG_SPL_OF_CONTROL=y
-CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine"
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
-CONFIG_ENV_IS_IN_MMC=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ROCKCHIP_GPIO=y
-CONFIG_SYS_I2C_ROCKCHIP=y
-CONFIG_MISC=y
-CONFIG_MMC_DW=y
-CONFIG_MMC_DW_ROCKCHIP=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_DM_ETH=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_GMAC_ROCKCHIP=y
-CONFIG_NVME=y
-CONFIG_PCI=y
-CONFIG_PHY_ROCKCHIP_INNO_USB2=y
-CONFIG_PHY_ROCKCHIP_TYPEC=y
-CONFIG_PMIC_RK8XX=y
-CONFIG_REGULATOR_PWM=y
-CONFIG_REGULATOR_RK8XX=y
-CONFIG_PWM_ROCKCHIP=y
-CONFIG_RAM_RK3399_LPDDR4=y
-CONFIG_DM_RESET=y
-CONFIG_BAUDRATE=150
-CONFIG_DEBUG_UART_SHIFT=2
-CONFIG_ROCKCHIP_SPI=y
-CONFIG_SYSRESET=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_GENERIC=y
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GENERIC=y
-CONFIG_USB_KEYBOARD=y
-CONFIG_USB_HOST_ETHER=y
-CONFIG_USB_ETHER_ASIX=y
-CONFIG_USB_ETHER_ASIX88179=y
-CONFIG_USB_ETHER_MCS7830=y
-CONFIG_USB_ETHER_RTL8152=y
-CONFIG_USB_ETHER_SMSC95XX=y
-CONFIG_DM_VIDEO=y
-CONFIG_DISPLAY=y
-CONFIG_VIDEO_ROCKCHIP=y
-CONFIG_DISPLAY_ROCKCHIP_HDMI=y
-CONFIG_SPL_TINY_MEMSET=y
-CONFIG_ERRNO_STR=y
-- 
2.7.4

[PATCH 5/5] roc-pc-rk3399: Enable PCIe/M.2, NVMe

[sunil]

From: Suniel Mahesh 

ROC-RK3399-PC Mezzanine is an add-on board for roc-pc-rk3399 target
and it hosts a PCIe/M.2 interface. As we have added runtime detection
support for this add-on board, this patch enables PCIe/M.2, NVMe so that
SSD's which have a PCIe/M.2 interface can be detected.

=> nvme scan
=> nvme device

IDE device 0: Vendor: 0x144d Rev: 2B2QEXM7 Prod: S4EUNG0N104275H
Type: Hard Disk
Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)

Signed-off-by: Suniel Mahesh 
Signed-off-by: Jagan Teki 
---
 configs/roc-pc-rk3399_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index e56fd3d..ae08be1 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -22,6 +22,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
+CONFIG_CMD_PCI=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
@@ -42,6 +43,8 @@ CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
+CONFIG_NVME=y
+CONFIG_PCI=y
 CONFIG_PHY_ROCKCHIP_INNO_USB2=y
 CONFIG_PHY_ROCKCHIP_TYPEC=y
 CONFIG_PMIC_RK8XX=y
-- 
2.7.4

[PATCH] rockchip: Fix spl mmc boot device ofpath

[sunil]

From: Suniel Mahesh 

Linux v5.7-rc1 dts(i) sync has changed the sdmmc node from
dwmmc@fe32 to mmc@fe32 and this ofpath is being
used in rockchip spl bootdevice code.

So, update the ofpath with a new node name.

Fixes: 167efc2c7a46 ("arm64: dts: rk3399: Sync v5.7-rc1 from Linux"
Signed-off-by: Suniel Mahesh 
Signed-off-by: Jagan Teki 
---
 arch/arm/mach-rockchip/rk3399/rk3399.c| 4 ++--
 board/theobroma-systems/puma_rk3399/puma-rk3399.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c 
b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 09b0d6e..4fda93b 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -28,7 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
[BROM_BOOTSOURCE_EMMC] = "/sdhci@fe33",
[BROM_BOOTSOURCE_SPINOR] = "/spi@ff1d",
-   [BROM_BOOTSOURCE_SD] = "/dwmmc@fe32",
+   [BROM_BOOTSOURCE_SD] = "/mmc@fe32",
 };
 
 static struct mm_region rk3399_mem_map[] = {
@@ -176,7 +176,7 @@ const char *spl_decode_boot_device(u32 boot_device)
u32 boot_device;
const char *ofpath;
} spl_boot_devices_tbl[] = {
-   { BOOT_DEVICE_MMC1, "/dwmmc@fe32" },
+   { BOOT_DEVICE_MMC1, "/mmc@fe32" },
{ BOOT_DEVICE_MMC2, "/sdhci@fe33" },
{ BOOT_DEVICE_SPI, "/spi@ff1d" },
};
diff --git a/board/theobroma-systems/puma_rk3399/puma-rk3399.c 
b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
index 561579d..f7f08ae 100644
--- a/board/theobroma-systems/puma_rk3399/puma-rk3399.c
+++ b/board/theobroma-systems/puma_rk3399/puma-rk3399.c
@@ -77,7 +77,7 @@ static int setup_boottargets(void)
}
 
/*
-* Only run, if booting from mmc1 (i.e. /dwmmc@fe32) and
+* Only run, if booting from mmc1 (i.e. /mmc@fe32) and
 * only consider cases where the default boot-order first
 * tries to boot from mmc0 (eMMC) and then from mmc1
 * (i.e. external SD).
@@ -85,7 +85,7 @@ static int setup_boottargets(void)
 * In other words: the SD card will be moved to earlier in the
 * order, if U-Boot was also loaded from the SD-card.
 */
-   if (!strcmp(boot_device, "/dwmmc@fe32")) {
+   if (!strcmp(boot_device, "/mmc@fe32")) {
char *mmc0, *mmc1;
 
debug("%s: booted from SD-Card\n", __func__);
-- 
2.7.4

[PATCH 1/3] arm: dts: rockchip: rk3399-roc-pc: Add RTC child node for RK808 PMIC

[sunil]

From: Suniel Mahesh 

Rockchip RK808 PMIC is a multi function device which hosts a Real Time
Clock along with other devices. Add a child RTC node so that it can be
bound and probed once the master pmic node completes probe.

Signed-off-by: Suniel Mahesh 
---
 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi 
b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 5746442..7d189c8 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -20,3 +20,11 @@
regulator-min-microvolt = <43>;
regulator-init-microvolt = <95>;
 };
+
+&rk808 {
+   rtc {
+   rkrtc: rk808-rtc {
+   status="okay";
+   };
+   };
+};
-- 
2.7.4

[PATCH 0/3] Add support for Rockchip RK808 PMIC RTC device

[sunil]

From: Suniel Mahesh 

This patch series adds support for Rockchip RK808 PMIC RTC device.

Patch #1, adds a child node under RK808 PMIC node. Patch #2 binds
this child device with its parent RK808 PMIC. Patch #3 adds the rtc
driver. 

The RK808 PMIC RTC has a hardware bug. It counts 31 days for november
month and the weeks register counts 0 - 7.

This driver does a temporary fix, where as in if date is Nov 31, then it resets
the date to Dec 1(this happens only if date cmd is queried from u-boot command 
line/script).
Similarly for the weeks register, 0(sun) - 6(sat). If 7 is encountered then it 
is reset to zero.

u-boot generally loads linux/other binary. Linux has a full fledged
driver implemented along with a workaround.
https://lkml.org/lkml/2015/12/2/1202 

Is this changeset acceptable ? please comment.

Suniel Mahesh (3):
  arm: dts: rockchip: rk3399-roc-pc: Add RTC child node for RK808 PMIC
  power: pmic: rk8xx: bind rk808 RTC
  rtc: Add base support for the RK808 PMIC RTC

 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi |   8 ++
 configs/roc-pc-rk3399_defconfig|   2 +
 drivers/power/pmic/rk8xx.c |  19 +++-
 drivers/rtc/Kconfig|   8 ++
 drivers/rtc/Makefile   |   1 +
 drivers/rtc/rk808-rtc.c| 169 +
 6 files changed, 206 insertions(+), 1 deletion(-)
 create mode 100644 drivers/rtc/rk808-rtc.c

-- 
2.7.4

[PATCH 2/3] power: pmic: rk8xx: bind rk808 RTC

[sunil]

From: Suniel Mahesh 

RK808 PMIC is a multi functional device with an RTC. In order to access
RTC, bind to its parent device i.e. RK808 PMIC.

Signed-off-by: Suniel Mahesh 
---
 drivers/power/pmic/rk8xx.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 52e6d9d..8d6b64e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -24,6 +24,11 @@ static const struct pmic_child_info pmic_children_info[] = {
{ },
 };
 
+static const struct pmic_child_info rtc_info[] = {
+   { .prefix = "rk808-rtc", .driver = "rk808_rtc"},
+   { },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
return RK808_NUM_OF_REGS;
@@ -59,7 +64,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t 
*buff, int len)
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 static int rk8xx_bind(struct udevice *dev)
 {
-   ofnode regulators_node;
+   ofnode regulators_node, rtc_node;
int children;
 
regulators_node = dev_read_subnode(dev, "regulators");
@@ -75,6 +80,18 @@ static int rk8xx_bind(struct udevice *dev)
if (!children)
debug("%s: %s - no child found\n", __func__, dev->name);
 
+   rtc_node = dev_read_subnode(dev, "rtc");
+   if (!ofnode_valid(rtc_node)) {
+   debug("%s: %s rtc subnode not found!\n", __func__, dev->name);
+   return -ENXIO;
+   }
+
+   debug("%s: '%s' - found rtc subnode\n", __func__, dev->name);
+
+   children = pmic_bind_children(dev, rtc_node, rtc_info);
+   if (!children)
+   debug("%s: %s - no child found\n", __func__, dev->name);
+
/* Always return success for this device */
return 0;
 }
-- 
2.7.4

[PATCH 3/3] rtc: Add base support for the RK808 PMIC RTC

[sunil]

From: Suniel Mahesh 

Rockchip RK808 PMIC provides an integrated RTC module. It is
commonly used with Rockchip SoCs. Add basic support to access
date and time.

Signed-off-by: Suniel Mahesh 
---
Note:
1. The RK808 PMIC RTC has a hardware bug. It counts 31 days
for november month and the weeks register counts 0 - 7.

2. This driver does a temporary fix, where as in if date is Nov 31,
then it resets the date to Dec 1(this happens only if date cmd is queried
from u-boot command line/script). Similarly for the weeks register, 0(sun)
- 6(sat). If 7 is encountered then it is reset to zero.

3. u-boot generally loads linux/other binary. Linux has a full fledged
driver implemented along with a workaround.
https://lkml.org/lkml/2015/12/2/1202

4. Is this change acceptable ? please comment
---
 configs/roc-pc-rk3399_defconfig |   2 +
 drivers/rtc/Kconfig |   8 ++
 drivers/rtc/Makefile|   1 +
 drivers/rtc/rk808-rtc.c | 165 
 4 files changed, 176 insertions(+)
 create mode 100644 drivers/rtc/rk808-rtc.c

diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index be76524..e98d680 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DATE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
@@ -39,6 +40,7 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_RTC=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM_RK3399_LPDDR4=y
 CONFIG_BAUDRATE=150
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 59e2fc4..6cf1abb 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -75,6 +75,14 @@ config RTC_ISL1208
  This driver supports reading and writing the RTC/calendar and detects
  total power failures.
 
+config RTC_RK808
+   bool "Enable Rockchip RK8XX RTC driver"
+depends on DM_RTC && PMIC_RK8XX
+   default y
+   help
+ Basic support for Rockchip RK808 PMIC Real Time Clock devices for 
+ time and date.
+
 config RTC_RV3029
bool "Enable RV3029 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 12eb449..63e2c34 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
 obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
 obj-$(CONFIG_RTC_PL031) += pl031.o
 obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
+obj-$(CONFIG_RTC_RK808) += rk808-rtc.o
 obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
 obj-$(CONFIG_RTC_RV3029) += rv3029.o
 obj-$(CONFIG_RTC_RV8803) += rv8803.o
diff --git a/drivers/rtc/rk808-rtc.c b/drivers/rtc/rk808-rtc.c
new file mode 100644
index 000..b63cced
--- /dev/null
+++ b/drivers/rtc/rk808-rtc.c
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RTC driver for Rockchip RK808 PMIC.
+ *
+ * Copyright (C) 2020 Amarula Solutions(India).
+ * Suniel Mahesh 
+ *
+ * Based on code from Linux kernel:
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Chris Zhong 
+ * Author: Zhang Qing 
+ *
+ * Date & Time support (no alarms and interrupts)
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* RTC_CTRL_REG bitfields */
+#define BIT_RTC_CTRL_REG_STOP_RTC_MBIT(0)
+
+/* RK808 has a shadowed register for saving a "frozen" RTC time.
+ * When user setting "GET_TIME" to 1, the time will save in this shadowed
+ * register. If set "READSEL" to 1, user read rtc time register, actually
+ * get the time of that moment. If we need the real time, clr this bit.
+ */
+
+#define BIT_RTC_CTRL_REG_RTC_GET_TIME  BIT(6)
+#define BIT_RTC_CTRL_REG_RTC_READSEL_M BIT(7)
+#define RTC_STATUS_MASK0xFE
+
+#define SECONDS_REG_MSK0x7F
+#define MINUTES_REG_MAK0x7F
+#define HOURS_REG_MSK  0x3F
+#define DAYS_REG_MSK   0x3F
+#define MONTHS_REG_MSK 0x1F
+#define YEARS_REG_MSK  0xFF
+#define WEEKS_REG_MSK  0x7
+
+/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
+
+#define NUM_TIME_REGS  (REG_WEEKS - REG_SECONDS + 1)
+
+static int rk808_rtc_set(struct udevice *dev, const struct rtc_time *tm)
+{
+   u8 rtc_data[NUM_TIME_REGS];
+
+   debug("RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
+   tm->tm_year, tm->tm_mon, tm->tm_mday,
+   tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+   rtc_data[0] = bin2bcd(tm->tm_sec);
+   rtc_data[1] = bin2bcd(tm->tm_min);
+   rtc_data[2] = bin2bcd(tm->tm_hour);
+   rtc_data[3] = bin2bcd(tm->tm_mday);
+   rtc_data[4] = bin2bcd(tm->tm_mon);
+   rtc

[RESEND PATCH] arm: dts: rockchip: rk3399-roc-pc: Enable FE1.1 USB 2.0 HUB on roc-rk3399-pc

[sunil]

From: Suniel Mahesh 

roc-rk3399-pc has an FE1.1 USB 2.0 HUB which connects two USB ports
(HOST1 and HOST2). For end devices to work we need to enable USB hub
so that HOST detects there presence and enumerates them accordingly.
This requires explicit pinctrl within gpio enablement.

Signed-off-by: Suniel Mahesh 
Reviewed-by: Kever Yang 
---
Note:
1. patch was reviewed, but not committed to mainline
2. tested this on roc-rk3399-pc board version roc-rk3399-pc-v1.1-a 2018-9-25
---
 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi 
b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 5746442..598e0e2 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -14,6 +14,16 @@
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
+
+   vcc_hub_en: vcc_hub_en-regulator {
+   compatible = "regulator-fixed";
+   enable-active-high;
+   gpio = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&hub_rst>;
+   regulator-name = "vcc_hub_en";
+   regulator-always-on;
+   };
 };
 
 &vdd_log {
-- 
2.7.4

[PATCH v2] rockchip: board: roc-pc-rk3399: Remove support for push button

[sunil]

From: Suniel Mahesh 

In case of a power interruption, human intervention is required which
is not desirable if the device is installed at a remote location. Drop
yellow LED as it is not much of use. Keep red LED(diy-led) as it is, to
indicate board in full power mode.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- no changes
- An explanation for why this patch is required is already sent
  in the thread. Let me know if you need any more changes.
- Tested on firefly roc-pc-rk3399, an rk3399 based target.
---
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 16 +---
 1 file changed, 1 insertion(+), 15 deletions(-)

diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index de9185a..0fe1914 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #ifndef CONFIG_SPL_BUILD
 int board_early_init_f(void)
@@ -34,26 +33,13 @@ out:
 
 #if defined(CONFIG_TPL_BUILD)
 
-#define PMUGRF_BASE 0xff32
 #define GPIO0_BASE  0xff72
 
 int board_early_init_f(void)
 {
struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
-   struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
 
-   /**
-* 1. Glow yellow LED, termed as low power
-* 2. Poll for on board power key press
-* 3. Once 2 done, off yellow and glow red LED, termed as full power
-* 4. Continue booting...
-*/
-   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
-
-   spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
-   while (readl(&gpio0->ext_port) & 0x20);
-
-   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+   /* Turn on red LED, indicating full power mode */
spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
 
return 0;
-- 
2.7.4

[PATCH v2 1/4] arm: dts: rockchip: rk3399-roc-pc: Add RTC child node for RK808 PMIC

[sunil]

From: Suniel Mahesh 

Rockchip RK808 PMIC is a multi function device which hosts a Real Time
Clock along with other devices. Add a child RTC node so that it can be
bound and probed once the master pmic node completes probe.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:
- no changes
---
 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi 
b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 5746442..7d189c8 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -20,3 +20,11 @@
regulator-min-microvolt = <43>;
regulator-init-microvolt = <95>;
 };
+
+&rk808 {
+   rtc {
+   rkrtc: rk808-rtc {
+   status="okay";
+   };
+   };
+};
-- 
2.7.4

[PATCH v2 3/4] rtc: rk8xx: Add base support for the RK808 PMIC RTC

[sunil]

From: Suniel Mahesh 

Rockchip RK808 PMIC provides an integrated RTC module. It is
commonly used with Rockchip SoCs. Add basic support to access
date and time.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:
-  moved corresponding configs which enable rtc into a seperate
   patch.
- changed subject line.

Note:
1. The RK808 PMIC RTC has a hardware bug. It counts 31 days
for november month and the weeks register counts 0 - 7.

2. This driver does a temporary fix, where as in if date is Nov 31,
then it resets the date to Dec 1(this happens only if date cmd is queried
from u-boot command line/script). Similarly for the weeks register, 0(sun)
- 6(sat). If 7 is encountered then it is reset to zero.

3. u-boot generally loads linux/other binary. Linux has a full fledged
driver implemented along with a workaround.
https://lkml.org/lkml/2015/12/2/1202

4. Is this change acceptable ? please comment
---
 drivers/rtc/Kconfig |   8 +++
 drivers/rtc/Makefile|   1 +
 drivers/rtc/rk808-rtc.c | 165 
 3 files changed, 174 insertions(+)
 create mode 100644 drivers/rtc/rk808-rtc.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 59e2fc4..a754d1b 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -75,6 +75,14 @@ config RTC_ISL1208
  This driver supports reading and writing the RTC/calendar and detects
  total power failures.
 
+config RTC_RK808
+   bool "Enable Rockchip RK8XX RTC driver"
+depends on DM_RTC && PMIC_RK8XX
+   default y
+   help
+ Basic support for Rockchip RK808 PMIC Real Time Clock devices for
+ time and date.
+
 config RTC_RV3029
bool "Enable RV3029 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 12eb449..63e2c34 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
 obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
 obj-$(CONFIG_RTC_PL031) += pl031.o
 obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
+obj-$(CONFIG_RTC_RK808) += rk808-rtc.o
 obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
 obj-$(CONFIG_RTC_RV3029) += rv3029.o
 obj-$(CONFIG_RTC_RV8803) += rv8803.o
diff --git a/drivers/rtc/rk808-rtc.c b/drivers/rtc/rk808-rtc.c
new file mode 100644
index 000..b63cced
--- /dev/null
+++ b/drivers/rtc/rk808-rtc.c
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RTC driver for Rockchip RK808 PMIC.
+ *
+ * Copyright (C) 2020 Amarula Solutions(India).
+ * Suniel Mahesh 
+ *
+ * Based on code from Linux kernel:
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Chris Zhong 
+ * Author: Zhang Qing 
+ *
+ * Date & Time support (no alarms and interrupts)
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* RTC_CTRL_REG bitfields */
+#define BIT_RTC_CTRL_REG_STOP_RTC_MBIT(0)
+
+/* RK808 has a shadowed register for saving a "frozen" RTC time.
+ * When user setting "GET_TIME" to 1, the time will save in this shadowed
+ * register. If set "READSEL" to 1, user read rtc time register, actually
+ * get the time of that moment. If we need the real time, clr this bit.
+ */
+
+#define BIT_RTC_CTRL_REG_RTC_GET_TIME  BIT(6)
+#define BIT_RTC_CTRL_REG_RTC_READSEL_M BIT(7)
+#define RTC_STATUS_MASK0xFE
+
+#define SECONDS_REG_MSK0x7F
+#define MINUTES_REG_MAK0x7F
+#define HOURS_REG_MSK  0x3F
+#define DAYS_REG_MSK   0x3F
+#define MONTHS_REG_MSK 0x1F
+#define YEARS_REG_MSK  0xFF
+#define WEEKS_REG_MSK  0x7
+
+/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
+
+#define NUM_TIME_REGS  (REG_WEEKS - REG_SECONDS + 1)
+
+static int rk808_rtc_set(struct udevice *dev, const struct rtc_time *tm)
+{
+   u8 rtc_data[NUM_TIME_REGS];
+
+   debug("RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
+   tm->tm_year, tm->tm_mon, tm->tm_mday,
+   tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+   rtc_data[0] = bin2bcd(tm->tm_sec);
+   rtc_data[1] = bin2bcd(tm->tm_min);
+   rtc_data[2] = bin2bcd(tm->tm_hour);
+   rtc_data[3] = bin2bcd(tm->tm_mday);
+   rtc_data[4] = bin2bcd(tm->tm_mon);
+   rtc_data[5] = bin2bcd(tm->tm_year - 2000);
+   rtc_data[6] = bin2bcd(tm->tm_wday);
+
+/* Stop RTC while updating the RTC registers */
+   pmic_clrsetbits(dev->parent, REG_RTC_CTRL, 0,
+   BIT_RTC_CTRL_REG_STOP_RTC_M);
+   pmic_write(dev->parent, REG_SECONDS, rtc_data, NUM_TIME_REGS);
+
+/* Start RTC again */
+   pmic_clrsetbits(dev->parent, REG_RTC_CTRL,
+   BIT_RTC_CTRL_REG_STOP_RTC_M, 0);
+   return 0;
+}
+
+static int rk808_rtc_get

[PATCH v2 0/4] Add support for Rockchip RK808 PMIC RTC device

[sunil]

From: Suniel Mahesh 

This patch series adds support for Rockchip RK808 PMIC RTC device.

Patch #1, adds a child node under RK808 PMIC node. Patch #2 binds
this child device with its parent RK808 PMIC. Patch #3 adds the rtc
driver. Patch #4 enables DM RTC, adds date command for the target.

The RK808 PMIC RTC has a hardware bug. It counts 31 days for november
month and the weeks register counts 0 - 7.

This driver does a temporary fix, where as in if date is Nov 31, then it resets
the date to Dec 1(this happens only if date cmd is queried from u-boot command 
line/script).
Similarly for the weeks register, 0(sun) - 6(sat). If 7 is encountered then it 
is reset to zero.

u-boot generally loads linux/other binary. Linux has a full fledged
driver implemented along with a workaround.
https://lkml.org/lkml/2015/12/2/1202
---
changes for v2:
- changed the description of the patch
- earlier it was a three patch series. code which was enabling RTC DM and date 
command
  is split into a seperate patch as suggested by kever yang. patch#3 is split 
into patch#4.
---
Suniel Mahesh (4):
  arm: dts: rockchip: rk3399-roc-pc: Add RTC child node for RK808 PMIC
  power: pmic: rk8xx: bind rk808 RTC
  rtc: rk8xx: Add base support for the RK808 PMIC RTC
  configs: roc-rk3399-pc: Enable DM for RTC and commands

 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi |   8 ++
 configs/roc-pc-rk3399_defconfig|   2 +
 drivers/power/pmic/rk8xx.c |  19 +++-
 drivers/rtc/Kconfig|   8 ++
 drivers/rtc/Makefile   |   1 +
 drivers/rtc/rk808-rtc.c| 165 +
 6 files changed, 202 insertions(+), 1 deletion(-)
 create mode 100644 drivers/rtc/rk808-rtc.c

-- 
2.7.4

[PATCH v2 4/4] configs: roc-rk3399-pc: Enable DM for RTC and commands

[sunil]

From: Suniel Mahesh 

Enable rtc driver DM for rk808 PMIC's, also enable date command.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:
- new patch
---
 configs/roc-pc-rk3399_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index be76524..e98d680 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DATE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
@@ -39,6 +40,7 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_RTC=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM_RK3399_LPDDR4=y
 CONFIG_BAUDRATE=150
-- 
2.7.4

[PATCH v2 2/4] power: pmic: rk8xx: bind rk808 RTC

[sunil]

From: Suniel Mahesh 

RK808 PMIC is a multi functional device with an RTC. In order to access
RTC, bind to its parent device i.e. RK808 PMIC.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:
- no changes
---
 drivers/power/pmic/rk8xx.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 52e6d9d..8d6b64e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -24,6 +24,11 @@ static const struct pmic_child_info pmic_children_info[] = {
{ },
 };
 
+static const struct pmic_child_info rtc_info[] = {
+   { .prefix = "rk808-rtc", .driver = "rk808_rtc"},
+   { },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
return RK808_NUM_OF_REGS;
@@ -59,7 +64,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t 
*buff, int len)
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 static int rk8xx_bind(struct udevice *dev)
 {
-   ofnode regulators_node;
+   ofnode regulators_node, rtc_node;
int children;
 
regulators_node = dev_read_subnode(dev, "regulators");
@@ -75,6 +80,18 @@ static int rk8xx_bind(struct udevice *dev)
if (!children)
debug("%s: %s - no child found\n", __func__, dev->name);
 
+   rtc_node = dev_read_subnode(dev, "rtc");
+   if (!ofnode_valid(rtc_node)) {
+   debug("%s: %s rtc subnode not found!\n", __func__, dev->name);
+   return -ENXIO;
+   }
+
+   debug("%s: '%s' - found rtc subnode\n", __func__, dev->name);
+
+   children = pmic_bind_children(dev, rtc_node, rtc_info);
+   if (!children)
+   debug("%s: %s - no child found\n", __func__, dev->name);
+
/* Always return success for this device */
return 0;
 }
-- 
2.7.4

[PATCH v3 4/4] configs: roc-rk3399-pc: Enable DM for RTC and commands

[sunil]

From: Suniel Mahesh 

Enable rtc driver DM for rk808 PMIC's, also enable date command.

Signed-off-by: Suniel Mahesh 
---
Changes for v3:
- no changes

Changes for v2:
- new patch
---
 configs/roc-pc-rk3399_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index be76524..e98d680 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -20,6 +20,7 @@ CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DATE=y
 CONFIG_CMD_TIME=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
@@ -39,6 +40,7 @@ CONFIG_GMAC_ROCKCHIP=y
 CONFIG_PMIC_RK8XX=y
 CONFIG_REGULATOR_PWM=y
 CONFIG_REGULATOR_RK8XX=y
+CONFIG_DM_RTC=y
 CONFIG_PWM_ROCKCHIP=y
 CONFIG_RAM_RK3399_LPDDR4=y
 CONFIG_BAUDRATE=150
-- 
2.7.4

[PATCH v3 0/4] Add support for Rockchip RK808 PMIC RTC device

[sunil]

From: Suniel Mahesh 

This patch series adds support for Rockchip RK808 PMIC RTC device.

Patch #1, adds a child node under RK808 PMIC node. Patch #2 binds
this child device with its parent RK808 PMIC. Patch #3 adds the rtc
driver. Patch #4 enables DM RTC, adds date command for the target.

The RK808 PMIC RTC has a hardware bug. It counts 31 days for november
month and the weeks register counts 0 - 7.

This driver does a temporary fix, where as in if date is Nov 31, then it resets
the date to Dec 1(this happens only if date cmd is queried from u-boot command 
line/script).
Similarly for the weeks register, 0(sun) - 6(sat). If 7 is encountered then it 
is reset to zero.

u-boot generally loads linux/other binary. Linux has a full fledged
driver implemented along with a workaround.
https://lkml.org/lkml/2015/12/2/1202
---
Changes for v3:
- forgot to add reviewed by tag for first two patches, added the tag.

Changes for v2:
- changed the description of the patch
- earlier it was a three patch series. code which was enabling RTC DM and date 
command
  is split into a seperate patch as suggested by kever yang. patch#3 is split 
into patch#4.
---
Suniel Mahesh (4):
  arm: dts: rockchip: rk3399-roc-pc: Add RTC child node for RK808 PMIC
  power: pmic: rk8xx: bind rk808 RTC
  rtc: rk8xx: Add base support for the RK808 PMIC RTC
  configs: roc-rk3399-pc: Enable DM for RTC and commands

 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi |   8 ++
 configs/roc-pc-rk3399_defconfig|   2 +
 drivers/power/pmic/rk8xx.c |  19 +++-
 drivers/rtc/Kconfig|   8 ++
 drivers/rtc/Makefile   |   1 +
 drivers/rtc/rk808-rtc.c| 165 +
 6 files changed, 202 insertions(+), 1 deletion(-)
 create mode 100644 drivers/rtc/rk808-rtc.c

-- 
2.7.4

[PATCH v3 1/4] arm: dts: rockchip: rk3399-roc-pc: Add RTC child node for RK808 PMIC

[sunil]

From: Suniel Mahesh 

Rockchip RK808 PMIC is a multi function device which hosts a Real Time
Clock along with other devices. Add a child RTC node so that it can be
bound and probed once the master pmic node completes probe.

Signed-off-by: Suniel Mahesh 
Reviewed-by: Kever Yang 
---
Changes for v3:
- added reviewed by tag

Changes for v2:
- no changes
---
 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi 
b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 5746442..7d189c8 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -20,3 +20,11 @@
regulator-min-microvolt = <43>;
regulator-init-microvolt = <95>;
 };
+
+&rk808 {
+   rtc {
+   rkrtc: rk808-rtc {
+   status="okay";
+   };
+   };
+};
-- 
2.7.4

[PATCH v3 2/4] power: pmic: rk8xx: bind rk808 RTC

[sunil]

From: Suniel Mahesh 

RK808 PMIC is a multi functional device with an RTC. In order to access
RTC, bind to its parent device i.e. RK808 PMIC.

Signed-off-by: Suniel Mahesh 
Reviewed-by: Kever Yang 
---
Changes for v3:
- added reviewed by tag

Changes for v2:
- no changes
---
 drivers/power/pmic/rk8xx.c | 19 ++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/power/pmic/rk8xx.c b/drivers/power/pmic/rk8xx.c
index 52e6d9d..8d6b64e 100644
--- a/drivers/power/pmic/rk8xx.c
+++ b/drivers/power/pmic/rk8xx.c
@@ -24,6 +24,11 @@ static const struct pmic_child_info pmic_children_info[] = {
{ },
 };
 
+static const struct pmic_child_info rtc_info[] = {
+   { .prefix = "rk808-rtc", .driver = "rk808_rtc"},
+   { },
+};
+
 static int rk8xx_reg_count(struct udevice *dev)
 {
return RK808_NUM_OF_REGS;
@@ -59,7 +64,7 @@ static int rk8xx_read(struct udevice *dev, uint reg, uint8_t 
*buff, int len)
 #if CONFIG_IS_ENABLED(PMIC_CHILDREN)
 static int rk8xx_bind(struct udevice *dev)
 {
-   ofnode regulators_node;
+   ofnode regulators_node, rtc_node;
int children;
 
regulators_node = dev_read_subnode(dev, "regulators");
@@ -75,6 +80,18 @@ static int rk8xx_bind(struct udevice *dev)
if (!children)
debug("%s: %s - no child found\n", __func__, dev->name);
 
+   rtc_node = dev_read_subnode(dev, "rtc");
+   if (!ofnode_valid(rtc_node)) {
+   debug("%s: %s rtc subnode not found!\n", __func__, dev->name);
+   return -ENXIO;
+   }
+
+   debug("%s: '%s' - found rtc subnode\n", __func__, dev->name);
+
+   children = pmic_bind_children(dev, rtc_node, rtc_info);
+   if (!children)
+   debug("%s: %s - no child found\n", __func__, dev->name);
+
/* Always return success for this device */
return 0;
 }
-- 
2.7.4

[PATCH v3 3/4] rtc: rk8xx: Add base support for the RK808 PMIC RTC

[sunil]

From: Suniel Mahesh 

Rockchip RK808 PMIC provides an integrated RTC module. It is
commonly used with Rockchip SoCs. Add basic support to access
date and time.

Signed-off-by: Suniel Mahesh 
---
Changes for v3:
- no changes

Changes for v2:
-  moved corresponding configs which enable rtc into a seperate
   patch.
-  changed subject line.

Note:
1. The RK808 PMIC RTC has a hardware bug. It counts 31 days
for november month and the weeks register counts 0 - 7.

2. This driver does a temporary fix, where as in if date is Nov 31,
then it resets the date to Dec 1(this happens only if date cmd is queried
from u-boot command line/script). Similarly for the weeks register, 0(sun)
- 6(sat). If 7 is encountered then it is reset to zero.

3. u-boot generally loads linux/other binary. Linux has a full fledged
driver implemented along with a workaround.
https://lkml.org/lkml/2015/12/2/1202

4. Is this change acceptable ? please comment
---
 drivers/rtc/Kconfig |   8 +++
 drivers/rtc/Makefile|   1 +
 drivers/rtc/rk808-rtc.c | 165 
 3 files changed, 174 insertions(+)
 create mode 100644 drivers/rtc/rk808-rtc.c

diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 59e2fc4..a754d1b 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -75,6 +75,14 @@ config RTC_ISL1208
  This driver supports reading and writing the RTC/calendar and detects
  total power failures.
 
+config RTC_RK808
+   bool "Enable Rockchip RK8XX RTC driver"
+depends on DM_RTC && PMIC_RK8XX
+   default y
+   help
+ Basic support for Rockchip RK808 PMIC Real Time Clock devices for
+ time and date.
+
 config RTC_RV3029
bool "Enable RV3029 driver"
depends on DM_RTC
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 12eb449..63e2c34 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_RTC_PCF8563) += pcf8563.o
 obj-$(CONFIG_RTC_PCF2127) += pcf2127.o
 obj-$(CONFIG_RTC_PL031) += pl031.o
 obj-$(CONFIG_RTC_PT7C4338) += pt7c4338.o
+obj-$(CONFIG_RTC_RK808) += rk808-rtc.o
 obj-$(CONFIG_RTC_RS5C372A) += rs5c372.o
 obj-$(CONFIG_RTC_RV3029) += rv3029.o
 obj-$(CONFIG_RTC_RV8803) += rv8803.o
diff --git a/drivers/rtc/rk808-rtc.c b/drivers/rtc/rk808-rtc.c
new file mode 100644
index 000..b63cced
--- /dev/null
+++ b/drivers/rtc/rk808-rtc.c
@@ -0,0 +1,165 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * RTC driver for Rockchip RK808 PMIC.
+ *
+ * Copyright (C) 2020 Amarula Solutions(India).
+ * Suniel Mahesh 
+ *
+ * Based on code from Linux kernel:
+ * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
+ * Author: Chris Zhong 
+ * Author: Zhang Qing 
+ *
+ * Date & Time support (no alarms and interrupts)
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* RTC_CTRL_REG bitfields */
+#define BIT_RTC_CTRL_REG_STOP_RTC_MBIT(0)
+
+/* RK808 has a shadowed register for saving a "frozen" RTC time.
+ * When user setting "GET_TIME" to 1, the time will save in this shadowed
+ * register. If set "READSEL" to 1, user read rtc time register, actually
+ * get the time of that moment. If we need the real time, clr this bit.
+ */
+
+#define BIT_RTC_CTRL_REG_RTC_GET_TIME  BIT(6)
+#define BIT_RTC_CTRL_REG_RTC_READSEL_M BIT(7)
+#define RTC_STATUS_MASK0xFE
+
+#define SECONDS_REG_MSK0x7F
+#define MINUTES_REG_MAK0x7F
+#define HOURS_REG_MSK  0x3F
+#define DAYS_REG_MSK   0x3F
+#define MONTHS_REG_MSK 0x1F
+#define YEARS_REG_MSK  0xFF
+#define WEEKS_REG_MSK  0x7
+
+/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
+
+#define NUM_TIME_REGS  (REG_WEEKS - REG_SECONDS + 1)
+
+static int rk808_rtc_set(struct udevice *dev, const struct rtc_time *tm)
+{
+   u8 rtc_data[NUM_TIME_REGS];
+
+   debug("RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
+   tm->tm_year, tm->tm_mon, tm->tm_mday,
+   tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
+
+   rtc_data[0] = bin2bcd(tm->tm_sec);
+   rtc_data[1] = bin2bcd(tm->tm_min);
+   rtc_data[2] = bin2bcd(tm->tm_hour);
+   rtc_data[3] = bin2bcd(tm->tm_mday);
+   rtc_data[4] = bin2bcd(tm->tm_mon);
+   rtc_data[5] = bin2bcd(tm->tm_year - 2000);
+   rtc_data[6] = bin2bcd(tm->tm_wday);
+
+/* Stop RTC while updating the RTC registers */
+   pmic_clrsetbits(dev->parent, REG_RTC_CTRL, 0,
+   BIT_RTC_CTRL_REG_STOP_RTC_M);
+   pmic_write(dev->parent, REG_SECONDS, rtc_data, NUM_TIME_REGS);
+
+/* Start RTC again */
+   pmic_clrsetbits(dev->parent, REG_RTC_CTRL,
+   BIT_RTC_CTRL_REG_STOP_RTC_M, 0);
+   return 0;

[2/5] roc-rk3399-pc: Configure the leds only during POR

[sunil]

As far as linux reboot is concerned, once reboot is done, there is no led 
status 
indication when in u-boot. Since its a reboot and board has entered full 
power mode, enabling RED led would be fine I guess.
 
Suniel

[PATCH] arm: dts: rockchip: rk3399-roc-pc: Enable FE1.1 USB 2.0 HUB on roc-rk3399-pc

[sunil]

From: Suniel Mahesh 

roc-rk3399-pc has an FE1.1 USB 2.0 HUB which connects two USB ports
(HOST1 and HOST2). For end devices to work we need to enable USB hub
so that HOST detects there presence and enumerates them accordingly.
This requires explicit pinctrl within gpio enablement.

Signed-off-by: Suniel Mahesh 
---
Note:
1. tested this on roc-rk3399-pc board version roc-rk3399-pc-v1.1-a 2018-9-25
2. after this changeset, HOST1 works but HOST2 still doesnt work. I have
tested them with linux-next, linux-rockchip and Firefly's source (both u-boot
and kernel), HOST2 doesn't work.
3. Request to test this changetest who have access to target and please advice
on HOST2
---
 arch/arm/dts/rk3399-roc-pc-u-boot.dtsi | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi 
b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
index 5746442..598e0e2 100644
--- a/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
@@ -14,6 +14,16 @@
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
+
+   vcc_hub_en: vcc_hub_en-regulator {
+   compatible = "regulator-fixed";
+   enable-active-high;
+   gpio = <&gpio2 RK_PA4 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&hub_rst>;
+   regulator-name = "vcc_hub_en";
+   regulator-always-on;
+   };
 };
 
 &vdd_log {
-- 
2.7.4

[PATCH] Revert "board: roc-pc-rk3399: Add support for onboard LED's and push button to indicate power mode"

[sunil]

From: Suniel Mahesh 

In case of a power interruption, human intervention is required which
is not desirable if the device is installed at a remote location. Keep
red LED as it is to indicate board in full power mode.

This reverts partially the commit 5a6d3d1fbca70d7f528c685292d64c4cd0106aa6.

Signed-off-by: Suniel Mahesh 
---
Note:
- patch tested on rk3399-roc-pc
- code related to button press is removed
---
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 16 +---
 1 file changed, 1 insertion(+), 15 deletions(-)

diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index de9185a..0fe1914 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #ifndef CONFIG_SPL_BUILD
 int board_early_init_f(void)
@@ -34,26 +33,13 @@ out:
 
 #if defined(CONFIG_TPL_BUILD)
 
-#define PMUGRF_BASE 0xff32
 #define GPIO0_BASE  0xff72
 
 int board_early_init_f(void)
 {
struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
-   struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
 
-   /**
-* 1. Glow yellow LED, termed as low power
-* 2. Poll for on board power key press
-* 3. Once 2 done, off yellow and glow red LED, termed as full power
-* 4. Continue booting...
-*/
-   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
-
-   spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
-   while (readl(&gpio0->ext_port) & 0x20);
-
-   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+   /* Turn on red LED, indicating full power mode */
spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
 
return 0;
-- 
2.7.4

[PATCH] rockchip: board: roc-pc-rk3399: Remove support for push button

[sunil]

From: Suniel Mahesh 

In case of a power interruption, human intervention is required which
is not desirable if the device is installed at a remote location. Drop
yellow LED as it is not much of use. Keep red LED(diy-led) as it is, to
indicate board in full power mode.

Signed-off-by: Suniel Mahesh 
---
Note:
- patch tested on rk3399-roc-pc
- code related to button press is removed
---
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 16 +---
 1 file changed, 1 insertion(+), 15 deletions(-)

diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index de9185a..0fe1914 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #ifndef CONFIG_SPL_BUILD
 int board_early_init_f(void)
@@ -34,26 +33,13 @@ out:
 
 #if defined(CONFIG_TPL_BUILD)
 
-#define PMUGRF_BASE 0xff32
 #define GPIO0_BASE  0xff72
 
 int board_early_init_f(void)
 {
struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
-   struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
 
-   /**
-* 1. Glow yellow LED, termed as low power
-* 2. Poll for on board power key press
-* 3. Once 2 done, off yellow and glow red LED, termed as full power
-* 4. Continue booting...
-*/
-   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
-
-   spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
-   while (readl(&gpio0->ext_port) & 0x20);
-
-   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+   /* Turn on red LED, indicating full power mode */
spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
 
return 0;
-- 
2.7.4

[PATCH v2 2/2] board: roc-pc-rk3399: Add support for onboard LED's and push button to indicate power mode

[sunil]

From: Suniel Mahesh 

Added support for onboard LED's and push button. When powered board will be
in low power mode(yellow LED), on button press, board enters full power mode
(red LED) and boots u-boot.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- Tested on firefly roc-pc-rk3399, an rk3399 based target.
---
 arch/arm/mach-rockchip/tpl.c|  7 +++
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 32 +
 configs/roc-pc-rk3399_defconfig |  1 +
 3 files changed, 40 insertions(+)

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 31a3eb4..a2b8d31 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -40,11 +40,18 @@ __weak void rockchip_stimer_init(void)
   TIMER_CONTROL_REG);
 }
 
+__weak int board_early_init_f(void)
+{
+   return 0;
+}
+
 void board_init_f(ulong dummy)
 {
struct udevice *dev;
int ret;
 
+   board_early_init_f();
+
 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
/*
 * Debug UART can be used from here if required:
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
index d47dba8..de9185a 100644
--- a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -7,6 +7,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #ifndef CONFIG_SPL_BUILD
 int board_early_init_f(void)
@@ -27,3 +31,31 @@ out:
return 0;
 }
 #endif
+
+#if defined(CONFIG_TPL_BUILD)
+
+#define PMUGRF_BASE 0xff32
+#define GPIO0_BASE  0xff72
+
+int board_early_init_f(void)
+{
+   struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
+   struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
+
+   /**
+* 1. Glow yellow LED, termed as low power
+* 2. Poll for on board power key press
+* 3. Once 2 done, off yellow and glow red LED, termed as full power
+* 4. Continue booting...
+*/
+   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
+
+   spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
+   while (readl(&gpio0->ext_port) & 0x20);
+
+   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+   spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
+
+   return 0;
+}
+#endif
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index 5a82029..36c0e0e 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -57,3 +57,4 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_TPL_GPIO_SUPPORT=y
-- 
2.7.4

[PATCH 2/2] board: roc-rk3399-pc: Add support for onboard LED's and push button to indicate power mode

[sunil]

From: Suniel Mahesh 

Added support for onboard LED's and push button. When powered board will be
in low power mode(yellow LED), on button press, board enters full power mode
(red LED) and boots u-boot.

Signed-off-by: Suniel Mahesh 
---
 arch/arm/mach-rockchip/tpl.c|  7 ++
 board/firefly/roc-rk3399-pc/roc-rk3399-pc.c | 33 +
 configs/roc-pc-rk3399_defconfig |  1 +
 3 files changed, 41 insertions(+)

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index 31a3eb4..a2b8d31 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -40,11 +40,18 @@ __weak void rockchip_stimer_init(void)
   TIMER_CONTROL_REG);
 }
 
+__weak int board_early_init_f(void)
+{
+   return 0;
+}
+
 void board_init_f(ulong dummy)
 {
struct udevice *dev;
int ret;
 
+   board_early_init_f();
+
 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
/*
 * Debug UART can be used from here if required:
diff --git a/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c 
b/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c
index b9049ab..8f23ce2 100644
--- a/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c
+++ b/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c
@@ -7,6 +7,10 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
 
 #ifndef CONFIG_SPL_BUILD
 int board_early_init_f(void)
@@ -28,3 +32,32 @@ out:
return 0;
 }
 #endif
+
+#if defined(CONFIG_TPL_BUILD) || \
+   (!defined(CONFIG_TPL) && defined(CONFIG_SPL_BUILD))
+
+#define PMUGRF_BASE 0xff32
+#define GPIO0_BASE  0xff72
+
+int board_early_init_f(void)
+{
+   struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE;
+   struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE;
+
+   /**
+* 1. Glow yellow LED, termed as low power
+* 2. Poll for on board power key press
+* 3. Once 2 done, off yellow and glow red LED, termed as full power
+* 4. Continue booting...
+*/
+   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1);
+
+   spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL);
+   while (readl(&gpio0->ext_port) & 0x20);
+
+   spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0);
+   spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1);
+
+   return 0;
+}
+#endif
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index c7187dc..79bdf34 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -57,3 +57,4 @@ CONFIG_USB_ETHER_RTL8152=y
 CONFIG_USB_ETHER_SMSC95XX=y
 CONFIG_SPL_TINY_MEMSET=y
 CONFIG_ERRNO_STR=y
+CONFIG_TPL_GPIO_SUPPORT=y
-- 
2.7.4

[PATCH 1/2] rockchip: rk3399: split roc-rk3399-pc out of evb_rk3399

[sunil]

From: Suniel Mahesh 

roc-rk3399-pc board has one user button & three user LED's. Currently
we don't have any code support for these devices. Since button and LED's are
specific to roc-rk3399-pc board, split it into its own board file and add any
code support here.

Signed-off-by: Suniel Mahesh 
---
 arch/arm/mach-rockchip/rk3399/Kconfig   | 20 +++
 board/firefly/roc-rk3399-pc/Kconfig | 16 +++
 board/firefly/roc-rk3399-pc/MAINTAINERS |  6 ++
 board/firefly/roc-rk3399-pc/Makefile|  7 +++
 board/firefly/roc-rk3399-pc/roc-rk3399-pc.c | 30 +
 board/rockchip/evb_rk3399/MAINTAINERS   |  6 --
 configs/roc-pc-rk3399_defconfig |  1 +
 include/configs/roc-rk3399-pc.h | 22 +
 8 files changed, 102 insertions(+), 6 deletions(-)
 create mode 100644 board/firefly/roc-rk3399-pc/Kconfig
 create mode 100644 board/firefly/roc-rk3399-pc/MAINTAINERS
 create mode 100644 board/firefly/roc-rk3399-pc/Makefile
 create mode 100644 board/firefly/roc-rk3399-pc/roc-rk3399-pc.c
 create mode 100644 include/configs/roc-rk3399-pc.h

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig 
b/arch/arm/mach-rockchip/rk3399/Kconfig
index f994152..23214ca 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -81,6 +81,25 @@ config TARGET_ROCKPRO64_RK3399
   * GPIO expansion ports
   * DC 12V/2A
 
+config TARGET_ROC_RK3399_PC
+   bool "Firefly ROC-RK3399-PC board"
+   help
+ ROC-RK3399-PC is SBC produced by Firefly. Key features:
+
+  * Rockchip RK3399
+  * 4GB Dual-Channel LPDDR4 64-bit
+  * SD card slot
+  * eMMC socket
+  * 16MB SPI Flash
+  * Gigabit ethernet
+  * PCIe
+  * HDMI In/Out, DP, MIPI DSI/CSI, eDP
+  * USB 3.0, 2.0
+  * USB Type C power and data
+  * GPIO expansion ports
+  * wide voltage input(5V-15V), dual cell battery
+  * Wifi/BT accessible via expansion board M.2
+
 endchoice
 
 config ROCKCHIP_BOOT_MODE_REG
@@ -128,5 +147,6 @@ source "board/theobroma-systems/puma_rk3399/Kconfig"
 source "board/vamrs/rock960_rk3399/Kconfig"
 source "board/google/gru/Kconfig"
 source "board/pine64/rockpro64_rk3399/Kconfig"
+source "board/firefly/roc-rk3399-pc/Kconfig"
 
 endif
diff --git a/board/firefly/roc-rk3399-pc/Kconfig 
b/board/firefly/roc-rk3399-pc/Kconfig
new file mode 100644
index 000..26dce89
--- /dev/null
+++ b/board/firefly/roc-rk3399-pc/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_ROC_RK3399_PC
+
+config SYS_BOARD
+default "roc-rk3399-pc"
+
+config SYS_VENDOR
+default "firefly"
+
+config SYS_CONFIG_NAME
+default "roc-rk3399-pc"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+def_bool y
+
+endif
+
diff --git a/board/firefly/roc-rk3399-pc/MAINTAINERS 
b/board/firefly/roc-rk3399-pc/MAINTAINERS
new file mode 100644
index 000..0dbd953
--- /dev/null
+++ b/board/firefly/roc-rk3399-pc/MAINTAINERS
@@ -0,0 +1,6 @@
+ROC-RK3399-PC
+M: Levin Du 
+S: Maintained
+F: board/firefly/roc-rk3399-pc
+F: include/configs/roc-rk3399-pc.h
+F: configs/roc-pc-rk3399_defconfig
diff --git a/board/firefly/roc-rk3399-pc/Makefile 
b/board/firefly/roc-rk3399-pc/Makefile
new file mode 100644
index 000..200dab0
--- /dev/null
+++ b/board/firefly/roc-rk3399-pc/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += roc-rk3399-pc.o
diff --git a/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c 
b/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c
new file mode 100644
index 000..b9049ab
--- /dev/null
+++ b/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_f(void)
+{
+   struct udevice *regulator;
+   int ret;
+
+   ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
+   if (ret) {
+   debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+   goto out;
+   }
+
+   ret = regulator_set_enable(regulator, true);
+   if (ret)
+   debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
+
+out:
+   return 0;
+}
+#endif
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS 
b/board/rockchip/evb_rk3399/MAINTAINERS
index eab4c4c..0834254 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -55,12 +55,6 @@ F:   configs/orangepi-rk3399_defconfig
 F: arch/arm/dts/rk3399-u-boot.dtsi
 F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi
 
-ROC-RK3399-PC
-M: Levin Du 
-S: Maintained
-F: configs/roc-pc-rk3399_defconfig
-F: arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
-
 ROCK-PI-4
 M: Akash Gajjar 
 M: Jagan Teki

[PATCH v2 1/2] rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399

[sunil]

From: Suniel Mahesh 

roc-pc-rk3399 board has one user button & three user LED's. Currently
we don't have any code support for these devices. Since button and LED's are
specific to roc-pc-rk3399 board, split it into its own board file and add code
support here.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- changed board directory and corresponding files naming convention from
  roc-rk3399-pc to roc-pc-rk3399.
- Tested on firefly roc-pc-rk3399, an rk3399 based target.
---
 arch/arm/mach-rockchip/rk3399/Kconfig   | 20 
 board/firefly/roc-pc-rk3399/Kconfig | 16 
 board/firefly/roc-pc-rk3399/MAINTAINERS |  6 ++
 board/firefly/roc-pc-rk3399/Makefile|  7 +++
 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c | 29 +
 board/rockchip/evb_rk3399/MAINTAINERS   |  6 --
 configs/roc-pc-rk3399_defconfig |  1 +
 include/configs/roc-pc-rk3399.h | 22 ++
 8 files changed, 101 insertions(+), 6 deletions(-)
 create mode 100644 board/firefly/roc-pc-rk3399/Kconfig
 create mode 100644 board/firefly/roc-pc-rk3399/MAINTAINERS
 create mode 100644 board/firefly/roc-pc-rk3399/Makefile
 create mode 100644 board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
 create mode 100644 include/configs/roc-pc-rk3399.h

diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig 
b/arch/arm/mach-rockchip/rk3399/Kconfig
index f994152..0dc43c2 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -81,6 +81,25 @@ config TARGET_ROCKPRO64_RK3399
   * GPIO expansion ports
   * DC 12V/2A
 
+config TARGET_ROC_PC_RK3399
+   bool "Firefly ROC-RK3399-PC board"
+   help
+ ROC-RK3399-PC is SBC produced by Firefly. Key features:
+
+  * Rockchip RK3399
+  * 4GB Dual-Channel LPDDR4 64-bit
+  * SD card slot
+  * eMMC socket
+  * 16MB SPI Flash
+  * Gigabit ethernet
+  * PCIe
+  * HDMI In/Out, DP, MIPI DSI/CSI, eDP
+  * USB 3.0, 2.0
+  * USB Type C power and data
+  * GPIO expansion ports
+  * wide voltage input(5V-15V), dual cell battery
+  * Wifi/BT accessible via expansion board M.2
+
 endchoice
 
 config ROCKCHIP_BOOT_MODE_REG
@@ -128,5 +147,6 @@ source "board/theobroma-systems/puma_rk3399/Kconfig"
 source "board/vamrs/rock960_rk3399/Kconfig"
 source "board/google/gru/Kconfig"
 source "board/pine64/rockpro64_rk3399/Kconfig"
+source "board/firefly/roc-pc-rk3399/Kconfig"
 
 endif
diff --git a/board/firefly/roc-pc-rk3399/Kconfig 
b/board/firefly/roc-pc-rk3399/Kconfig
new file mode 100644
index 000..720fbbb
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_ROC_PC_RK3399
+
+config SYS_BOARD
+default "roc-pc-rk3399"
+
+config SYS_VENDOR
+default "firefly"
+
+config SYS_CONFIG_NAME
+default "roc-pc-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+def_bool y
+
+endif
+
diff --git a/board/firefly/roc-pc-rk3399/MAINTAINERS 
b/board/firefly/roc-pc-rk3399/MAINTAINERS
new file mode 100644
index 000..7564dd2
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/MAINTAINERS
@@ -0,0 +1,6 @@
+ROC-RK3399-PC
+M: Levin Du 
+S: Maintained
+F: board/firefly/roc-pc-rk3399
+F: include/configs/roc-pc-rk3399.h
+F: configs/roc-pc-rk3399_defconfig
diff --git a/board/firefly/roc-pc-rk3399/Makefile 
b/board/firefly/roc-pc-rk3399/Makefile
new file mode 100644
index 000..29c79b2
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/Makefile
@@ -0,0 +1,7 @@
+#
+# (C) Copyright 2016 Rockchip Electronics Co., Ltd
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y  += roc-pc-rk3399.o
diff --git a/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c 
b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
new file mode 100644
index 000..d47dba8
--- /dev/null
+++ b/board/firefly/roc-pc-rk3399/roc-pc-rk3399.c
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2016 Rockchip Electronics Co., Ltd
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#ifndef CONFIG_SPL_BUILD
+int board_early_init_f(void)
+{
+   struct udevice *regulator;
+   int ret;
+
+   ret = regulator_get_by_platname("vcc5v0_host", ®ulator);
+   if (ret) {
+   debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret);
+   goto out;
+   }
+
+   ret = regulator_set_enable(regulator, true);
+   if (ret)
+   debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret);
+out:
+   return 0;
+}
+#endif
diff --git a/board/rockchip/evb_rk3399/MAINTAINERS 
b/board/rockchip/evb_rk3399/MAINTAINERS
index eab4c4c..0834254 100644
--- a/board/rockchip/evb_rk3399/MAINTAINERS
+++ b/board/rockchip/evb_rk3399/MAINTAINERS
@@ -55,12 +55,6 @@ F:   configs/orangepi-rk3399_defconfig
 F: arch/arm/dts/rk3399-u-boot.dtsi
 F: arch/arm/dts/rk3399-orangepi-u-boot.dtsi
 
-ROC-RK3

[U-Boot] [PATCH] arm: dts: am33xx: Remove redundant interrupt-parent property

[sunil . m]

From: Suniel Mahesh 

Interrupt-parent property is defined in the root node as
"interrupt-parent = <&intc>". This interrupt-parent value becomes
the default for the system, so removed redundant "interrupt-parent"
property from mmc, mac, lcdc and tscadc nodes.

Signed-off-by: Suniel Mahesh 
---
 arch/arm/dts/am33xx.dtsi | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index b26e21b..14caee7 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -315,7 +315,6 @@
&edma 25>;
dma-names = "tx", "rx";
interrupts = <64>;
-   interrupt-parent = <&intc>;
reg = <0x4806 0x1000>;
status = "disabled";
};
@@ -328,7 +327,6 @@
&edma 3>;
dma-names = "tx", "rx";
interrupts = <28>;
-   interrupt-parent = <&intc>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
@@ -338,7 +336,6 @@
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
-   interrupt-parent = <&intc>;
reg = <0x4781 0x1000>;
status = "disabled";
};
@@ -724,7 +721,6 @@
   0x4a101200 0x100>;
#address-cells = <1>;
#size-cells = <1>;
-   interrupt-parent = <&intc>;
/*
 * c0_rx_thresh_pend
 * c0_rx_pend
@@ -787,7 +783,6 @@
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
@@ -796,7 +791,6 @@
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
-- 
1.9.1

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[U-Boot] [PATCH] arm: dts: am33xx: Remove redundant interrupt-parent property

[sunil . m]

From: Suniel Mahesh 

Upstream Linux has the Interrupt-parent property being removed
from mmc, mac, lcdc and tscadc sub nodes in the dtsi file.
Interrupt-parent property is already defined in the root node.
Therefore, update the dtsi to mimic this change and remove duplicates.

Signed-off-by: Suniel Mahesh 
---
Note:
- Compile tested on latest u-boot mainline tree no build issues.
- commit information upstream Linux:
  arm: dts: am33xx: Remove redundant interrupt-parent property
  sha1: de09eb52a1cceb6f80464a008c67c7bebb242314
---
 arch/arm/dts/am33xx.dtsi | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index b26e21b..14caee7 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -315,7 +315,6 @@
&edma 25>;
dma-names = "tx", "rx";
interrupts = <64>;
-   interrupt-parent = <&intc>;
reg = <0x4806 0x1000>;
status = "disabled";
};
@@ -328,7 +327,6 @@
&edma 3>;
dma-names = "tx", "rx";
interrupts = <28>;
-   interrupt-parent = <&intc>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
@@ -338,7 +336,6 @@
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
-   interrupt-parent = <&intc>;
reg = <0x4781 0x1000>;
status = "disabled";
};
@@ -724,7 +721,6 @@
   0x4a101200 0x100>;
#address-cells = <1>;
#size-cells = <1>;
-   interrupt-parent = <&intc>;
/*
 * c0_rx_thresh_pend
 * c0_rx_pend
@@ -787,7 +783,6 @@
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
@@ -796,7 +791,6 @@
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
-- 
1.9.1

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[U-Boot] [RESEND PATCH] arm: dts: am33xx: Remove redundant interrupt-parent property

[sunil . m]

From: Suniel Mahesh 

Upstream Linux has the Interrupt-parent property being removed
from mmc, mac, lcdc and tscadc sub nodes in the dtsi file.
Interrupt-parent property is already defined in the root node.
Therefore, update the dtsi to mimic this change and remove duplicates.

Signed-off-by: Suniel Mahesh 
---
Note:
- Compile tested on latest u-boot mainline tree no build issues.
- commit information upstream Linux:
  arm: dts: am33xx: Remove redundant interrupt-parent property
  sha1: de09eb52a1cceb6f80464a008c67c7bebb242314
---
 arch/arm/dts/am33xx.dtsi | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index b26e21b..14caee7 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -315,7 +315,6 @@
&edma 25>;
dma-names = "tx", "rx";
interrupts = <64>;
-   interrupt-parent = <&intc>;
reg = <0x4806 0x1000>;
status = "disabled";
};
@@ -328,7 +327,6 @@
&edma 3>;
dma-names = "tx", "rx";
interrupts = <28>;
-   interrupt-parent = <&intc>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
@@ -338,7 +336,6 @@
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
-   interrupt-parent = <&intc>;
reg = <0x4781 0x1000>;
status = "disabled";
};
@@ -724,7 +721,6 @@
   0x4a101200 0x100>;
#address-cells = <1>;
#size-cells = <1>;
-   interrupt-parent = <&intc>;
/*
 * c0_rx_thresh_pend
 * c0_rx_pend
@@ -787,7 +783,6 @@
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
@@ -796,7 +791,6 @@
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
-- 
1.9.1

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[U-Boot] [PATCH v2] arm: dts: am33xx: sync DTS with Linux 4.13-rc4

[sunil . m]

From: Suniel Mahesh 

This re-syncs AM33xx DTS file with current file from
Linux v4.13-rc4 to ensure a consistent configuration. Upstream
Linux removed the redundant Interrupt-parent property from mmc,
mac, lcdc and tscadc sub nodes.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:
- Made corrections as suggested by Tom Rini
- Rebased and compile tested on latest u-boot mainline tree no build issues.

Note:
- commit information upstream Linux:
  arm: dts: am33xx: Remove redundant interrupt-parent property
  sha1: de09eb52a1cceb6f80464a008c67c7bebb242314
---
 arch/arm/dts/am33xx.dtsi | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/dts/am33xx.dtsi b/arch/arm/dts/am33xx.dtsi
index b26e21b..14caee7 100644
--- a/arch/arm/dts/am33xx.dtsi
+++ b/arch/arm/dts/am33xx.dtsi
@@ -315,7 +315,6 @@
&edma 25>;
dma-names = "tx", "rx";
interrupts = <64>;
-   interrupt-parent = <&intc>;
reg = <0x4806 0x1000>;
status = "disabled";
};
@@ -328,7 +327,6 @@
&edma 3>;
dma-names = "tx", "rx";
interrupts = <28>;
-   interrupt-parent = <&intc>;
reg = <0x481d8000 0x1000>;
status = "disabled";
};
@@ -338,7 +336,6 @@
ti,hwmods = "mmc3";
ti,needs-special-reset;
interrupts = <29>;
-   interrupt-parent = <&intc>;
reg = <0x4781 0x1000>;
status = "disabled";
};
@@ -724,7 +721,6 @@
   0x4a101200 0x100>;
#address-cells = <1>;
#size-cells = <1>;
-   interrupt-parent = <&intc>;
/*
 * c0_rx_thresh_pend
 * c0_rx_pend
@@ -787,7 +783,6 @@
lcdc: lcdc@4830e000 {
compatible = "ti,am33xx-tilcdc";
reg = <0x4830e000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <36>;
ti,hwmods = "lcdc";
status = "disabled";
@@ -796,7 +791,6 @@
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
-   interrupt-parent = <&intc>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
-- 
1.9.1

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[U-Boot] [PATCH] drivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro

[sunil . m]

From: Suniel Mahesh 

__be32_to_cpu() accepts argument of type __be32. This patch changes type of
the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which is then passed
to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32

Signed-off-by: Suniel Mahesh 
Signed-off-by: Karthik Tummala 
---
Note:
- Build was carried out with the above changes, no build errors
  reported.
---
 drivers/mmc/mmc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 3cdf6a4..3d4da4c 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -882,8 +882,8 @@ static int sd_change_freq(struct mmc *mmc)
 {
int err;
struct mmc_cmd cmd;
-   ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
-   ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
+   ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
+   ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
struct mmc_data data;
int timeout;
 
-- 
1.9.1

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[U-Boot] [PATCH] drivers: mmc: Avoid memory leak in case of failure

[sunil . m]

From: Suniel Mahesh 

priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().

Signed-off-by: Suniel Mahesh 
Signed-off-by: Raghu Bharadwaj 
---
 drivers/mmc/exynos_dw_mmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 40f7892..84ef2da 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -168,6 +168,7 @@ static int exynos_dwmci_get_config(const void *blob, int 
node,
 
if (host->dev_index > 4) {
printf("DWMMC%d: Can't get the dev index\n", host->dev_index);
+   free(priv);
return -EINVAL;
}
 
@@ -178,6 +179,7 @@ static int exynos_dwmci_get_config(const void *blob, int 
node,
base = fdtdec_get_addr(blob, node, "reg");
if (!base) {
printf("DWMMC%d: Can't get base address\n", host->dev_index);
+   free(priv);
return -EINVAL;
}
host->ioaddr = (void *)base;
@@ -187,6 +189,7 @@ static int exynos_dwmci_get_config(const void *blob, int 
node,
if (err) {
printf("DWMMC%d: Can't get sdr-timings for devider\n",
host->dev_index);
+   free(priv);
return -EINVAL;
}
 
-- 
1.9.1

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[U-Boot] [PATCH v2] drivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro

[sunil . m]

From: Suniel Mahesh 

__be32_to_cpu() accepts argument of type __be32. This patch changes
type of the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which
is then passed to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32

Signed-off-by: Suniel Mahesh 
Signed-off-by: Karthik Tummala 
---
Changes for v2:
- rebased on latest u-boot tree (2017.11.rc1)
- patch was accepted long time ago, but not applied to u-boot-mmc,
  please apply.
---
Note:
Tested on latest u-boot mainline tree, no build issues.
---
 drivers/mmc/mmc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 38d2e07..8716ac7 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -882,8 +882,8 @@ static int sd_change_freq(struct mmc *mmc)
 {
int err;
struct mmc_cmd cmd;
-   ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
-   ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
+   ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
+   ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
struct mmc_data data;
int timeout;
 
-- 
1.9.1

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[U-Boot] [PATCH v2] drivers: mmc: Avoid memory leak in case of failure

[sunil . m]

From: Suniel Mahesh 

priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().

Signed-off-by: Suniel Mahesh 
Signed-off-by: Raghu Bharadwaj 
---
Changes for v2:
- rebased on latest u-boot tree (2017.11.rc1)
- patch was accepted long time ago, but not applied to u-boot-mmc,
  please apply.
---
Note:
Tested on latest u-boot mainline tree, no build issues.
---
 drivers/mmc/exynos_dw_mmc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
index 40f7892..84ef2da 100644
--- a/drivers/mmc/exynos_dw_mmc.c
+++ b/drivers/mmc/exynos_dw_mmc.c
@@ -168,6 +168,7 @@ static int exynos_dwmci_get_config(const void *blob, int 
node,
 
if (host->dev_index > 4) {
printf("DWMMC%d: Can't get the dev index\n", host->dev_index);
+   free(priv);
return -EINVAL;
}
 
@@ -178,6 +179,7 @@ static int exynos_dwmci_get_config(const void *blob, int 
node,
base = fdtdec_get_addr(blob, node, "reg");
if (!base) {
printf("DWMMC%d: Can't get base address\n", host->dev_index);
+   free(priv);
return -EINVAL;
}
host->ioaddr = (void *)base;
@@ -187,6 +189,7 @@ static int exynos_dwmci_get_config(const void *blob, int 
node,
if (err) {
printf("DWMMC%d: Can't get sdr-timings for devider\n",
host->dev_index);
+   free(priv);
return -EINVAL;
}
 
-- 
1.9.1

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[U-Boot] [U-Boot-Users] mpc8641hpcn linker script and the bootpg section

[sunil khatri]

hello sir 

i m new to bootloader but i have studied its architecture and tried to
dig deep into source code.i found u have worked on this and want ur help
our company is designing a new board based on mpc8641 processor we are
using mpc8641hpcn type board except that we dnt erequire all the
pheripherals on our board we just interested in four ethernet ports and
thts it.it would be a great help if u tell me what changes are to be
made in uboot source and in which folder/file.

thnx and regards 
sunil khatri
rtts india.
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[U-Boot] [PATCH] Makefile: clean build generated SPL binary for TI AM65x

[sunil . m]

From: Suniel Mahesh 

TI AM65x platforms (evm and HS) generate an SPL image
'tispl.bin*' and there is no rule for cleanup.
Added entry for cleanup in clean target.

Signed-off-by: Suniel Mahesh 
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index c1e39a0..008bee4 100644
--- a/Makefile
+++ b/Makefile
@@ -1846,7 +1846,7 @@ clean: $(clean-dirs)
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
-type f -print | xargs rm -f \
-   bl31.c bl31.elf bl31_*.bin image.map
+   bl31.c bl31.elf bl31_*.bin image.map tispl.bin*
 
 # mrproper - Delete all generated files, including .config
 #
-- 
2.7.4

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[U-Boot] [PATCH] arm: omap2: am43xx: Enable CONFIG_DM_USB

[sunil . m]

From: Suniel Mahesh 

Enable CONFIG_DM_USB to remove compile warning for
am43xx based targets:

= WARNING ==
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


Signed-off-by: Suniel Mahesh 
---
 configs/am43xx_evm_qspiboot_defconfig | 1 +
 configs/am43xx_evm_rtconly_defconfig  | 1 +
 configs/am43xx_hs_evm_defconfig   | 1 +
 3 files changed, 3 insertions(+)

diff --git a/configs/am43xx_evm_qspiboot_defconfig 
b/configs/am43xx_evm_qspiboot_defconfig
index 06268ba..b1bf670 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -50,6 +50,7 @@ CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_TI_QSPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
diff --git a/configs/am43xx_evm_rtconly_defconfig 
b/configs/am43xx_evm_rtconly_defconfig
index caf761b..3064f31 100644
--- a/configs/am43xx_evm_rtconly_defconfig
+++ b/configs/am43xx_evm_rtconly_defconfig
@@ -49,6 +49,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index d634ab1..8be2102 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -59,6 +59,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
-- 
2.7.4

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[U-Boot] [PATCH 1/2] arm: am437x: cm-t43: Add device tree, enable OF_CONTROL

[sunil . m]

From: Suniel Mahesh 

Add device tree from Linux for driver model conversion
and enable OF_CONTROL. This will remove the following compile
warning:
==
Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=' argument
===
Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh 
---
 arch/arm/dts/Makefile  |   3 +-
 arch/arm/dts/am437x-cm-t43.dts | 420 +
 configs/cm_t43_defconfig   |   2 +
 3 files changed, 424 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/am437x-cm-t43.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index aac1b83..62da168 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -302,7 +302,8 @@ dtb-$(CONFIG_AM33XX) += \
 dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb\
am43x-epos-evm.dtb \
am437x-idk-evm.dtb \
-   am4372-generic.dtb
+   am4372-generic.dtb \
+   am437x-cm-t43.dtb
 dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb
 dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
 dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
diff --git a/arch/arm/dts/am437x-cm-t43.dts b/arch/arm/dts/am437x-cm-t43.dts
new file mode 100644
index 000..063113a
--- /dev/null
+++ b/arch/arm/dts/am437x-cm-t43.dts
@@ -0,0 +1,420 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
+ */
+
+/dts-v1/;
+
+#include 
+#include 
+#include 
+#include "am4372.dtsi"
+
+/ {
+   model = "CompuLab CM-T43";
+   compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
+
+   leds {
+   compatible = "gpio-leds";
+
+   ledb {
+   label = "cm-t43:green";
+   gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
+   linux,default-trigger = "heartbeat";
+   };
+   };
+
+   vmmc_3v3: fixedregulator-v3_3 {
+   compatible = "regulator-fixed";
+   regulator-name = "vmmc_3v3";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-always-on;
+   enable-active-high;
+   };
+};
+
+&am43xx_pinmux {
+   pinctrl-names = "default";
+   pinctrl-0 = <&cm_t43_led_pins>;
+
+   cm_t43_led_pins: cm_t43_led_pins {
+   pinctrl-single,pins = <
+   AM4372_IOPAD(0xa78, MUX_MODE7)
+   >;
+   };
+
+   i2c0_pins: i2c0_pins {
+   pinctrl-single,pins = <
+   AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | 
MUX_MODE0)  /* i2c0_sda.i2c0_sda */
+   AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | 
MUX_MODE0)  /* i2c0_scl.i2c0_scl */
+   >;
+   };
+
+   emmc_pins: emmc_pins {
+   pinctrl-single,pins = <
+   AM4372_IOPAD(0x820, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad8.mmc1_dat0 */
+   AM4372_IOPAD(0x824, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad9.mmc1_dat1 */
+   AM4372_IOPAD(0x828, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad10.mmc1_dat2 */
+   AM4372_IOPAD(0x82c, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad11.mmc1_dat3 */
+   AM4372_IOPAD(0x830, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad12.mmc1_dat4 */
+   AM4372_IOPAD(0x834, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad13.mmc1_dat5 */
+   AM4372_IOPAD(0x838, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad14.mmc1_dat6 */
+   AM4372_IOPAD(0x83c, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_ad15.mmc1_dat7 */
+   AM4372_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_csn1.mmc1_clk */
+   AM4372_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* 
gpmc_csn2.mmc1_cmd */
+   >;
+   };
+
+   spi0_pins: pinmux_spi0_pins {
+   pinctrl-single,pins = <
+   AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* 
spi0_sclk.spi0_sclk */
+   AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* 
spi0_d0.spi0_d0 */
+   AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* 
spi0_d1.spi0_d1 */
+   AM4372_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0) /* 
spi0_cs0.spi0_cs0 */
+   >;
+   };
+
+   nand_flash_x8: nand_flash_x8 {
+   pinctrl-single,pins = <
+   AM4372_IOPAD(0x800, PIN_INPUT | PULL_DISABLE | 
MUX_MODE0)
+   AM4372_IOPAD(0x804, PIN_INPUT | PULL_DISABLE | 
MUX_MODE0)
+   AM4372_IOPAD(0x808, PIN_INPUT | PULL_DISABLE | 
MUX_MODE0)
+   AM4372_IOPAD(0x80c, PIN_INPUT | PULL_DISABLE | 
MUX_MODE0)
+   AM4372_IOPAD(

[U-Boot] [PATCH 2/2] arm: am437x: cm-t43: Enable DM for MMC, USB, SPI, SPI_FLASH, enable BLK

[sunil . m]

From: Suniel Mahesh 

Enable driver model for USB, MMC, SPI and SPI_FLASH. Also enable BLK.
This will remove the following compile warnings:

= WARNING ==
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.

= WARNING ==
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.

= WARNING ==
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.

Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh 
---
 configs/cm_t43_defconfig | 5 +
 1 file changed, 5 insertions(+)

diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig
index dbc0f7e..44d727f 100644
--- a/configs/cm_t43_defconfig
+++ b/configs/cm_t43_defconfig
@@ -54,9 +54,13 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM=y
 CONFIG_DM_GPIO=y
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 CONFIG_NAND=y
+CONFIG_DM_SPI=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=4800
 CONFIG_SPI_FLASH_ATMEL=y
 CONFIG_SPI_FLASH_EON=y
@@ -72,6 +76,7 @@ CONFIG_DM_SERIAL=y
 CONFIG_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_OMAP_USB_PHY=y
-- 
2.7.4

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[U-Boot] [PATCH] arm: imx6: cm_fx6: Enable DM SPI and SPI_FLASH, fix SPL build errors

[sunil . m]

From: Suniel Mahesh 

Enable driver model for SPI and SPI_FLASH to remove the following
compile warning on CM-FX6 SOM:
= WARNING ==
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.


This change introduced SPL build error as shown:

In file included from include/common.h:47:0,
 from drivers/mtd/spi/sf_probe.c:10:
drivers/mtd/spi/sf_probe.c: In function 'spi_flash_std_probe':
drivers/mtd/spi/sf_probe.c:149:54: error: dereferencing pointer to incomplete 
type 'struct dm_spi_slave_platdata'
scripts/Makefile.build:278: recipe for target 'spl/drivers/mtd/spi/sf_probe.o' 
failed
make[3]: *** [spl/drivers/mtd/spi/sf_probe.o] Error 1
scripts/Makefile.build:432: recipe for target 'spl/drivers/mtd/spi' failed
make[2]: *** [spl/drivers/mtd/spi] Error 2

Disabling DM for SPI support(SPI and SF) in SPL resolves the issue.
Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh 
---
 configs/cm_fx6_defconfig | 2 ++
 include/configs/cm_fx6.h | 7 +++
 2 files changed, 9 insertions(+)

diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index fd0db4d..d236875 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -62,6 +62,7 @@ CONFIG_FSL_USDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
 CONFIG_SPI_FLASH_ATMEL=y
@@ -77,6 +78,7 @@ CONFIG_MII=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index b957e9c..4dd2b40 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -163,6 +163,13 @@
 /* APBH DMA is required for NAND support */
 #endif
 
+/* SPI Flash Configs */
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_DM_SPI
+#undef CONFIG_DM_SPI_FLASH
+#undef CONFIG_SPI_FLASH_MTD
+#endif
+
 /* Ethernet */
 #define CONFIG_FEC_MXC
 #define CONFIG_FEC_MXC_PHYADDR 0
-- 
2.7.4

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[U-Boot] [PATCH] watchdog: omap_wdt: Fix WDT target reset when booted from emmc

[sunil . m]

From: Suniel Mahesh 

AM335X based beaglebone black target gets reset by DM converted watchdog
if booted from emmc around 60sec. Fixed this by moving driver's private struct
variable initialization at different places in the driver to driver's probe.
Tested on Beaglebone Black.

Cc: Grygorii Strashko 
Fixes: 7659ea32 ("watchdog: omap_wdt: Convert watchdog driver to use DT and DM")
Reported-by: Sam Protsenko 
Signed-off-by: Suniel Mahesh 
---
 drivers/watchdog/omap_wdt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index d5857be..284cfbb 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -150,7 +150,6 @@ static int omap3_wdt_reset(struct udevice *dev)
 {
struct omap3_wdt_priv *priv = dev_get_priv(dev);
 
-   priv->wdt_trgr_pattern = 0x1234;
 /*
  * Somebody just triggered watchdog reset and write to WTGR register
  * is in progress. It is resetting right now, no need to trigger it
@@ -231,6 +230,7 @@ static int omap3_wdt_probe(struct udevice *dev)
if (!priv->regs)
return -EINVAL;
 
+   priv->wdt_trgr_pattern = 0x1234;
debug("%s: Probing wdt%u\n", __func__, dev->seq);
return 0;
 }
-- 
2.7.4

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[U-Boot] [PATCH 1/2] board: cm_fx6: Enable DM support for video, fix build error

[sunil . m]

From: Suniel Mahesh 

Enable driver model for Video to remove the following
compile warning on CM-FX6 SOM based target:

= WARNING ==
This board does not use CONFIG_DM_VIDEO Please update
the board to use CONFIG_DM_VIDEO before the v2019.07 release.


This change introduced build error as shown:

LD  u-boot
drivers/built-in.o: In function ipu_displays_init'
arm-linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509
Makefile:1621: recipe for target 'u-boot' failed
make: *** [u-boot] Error 1

The DM converted video driver calls ipu_displays_init
in its probe, which inturn calls relevant board_video_skip.
Defining ipu_displays_init in the board file fixes build error.
Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh 
---
 board/compulab/cm_fx6/cm_fx6.c | 5 +
 configs/cm_fx6_defconfig   | 1 +
 2 files changed, 6 insertions(+)

diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c
index feb7a71..38dca2e 100644
--- a/board/compulab/cm_fx6/cm_fx6.c
+++ b/board/compulab/cm_fx6/cm_fx6.c
@@ -146,6 +146,11 @@ int board_video_skip(void)
 static inline void cm_fx6_setup_display(void) {}
 #endif /* CONFIG_VIDEO_IPUV3 */
 
+int ipu_displays_init(void)
+{
+   return board_video_skip();
+}
+
 #ifdef CONFIG_DWC_AHSATA
 static int cm_fx6_issd_gpios[] = {
/* The order of the GPIOs in the array is important! */
diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index a27cdd7..8288095 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -86,4 +86,5 @@ CONFIG_USB_KEYBOARD=y
 CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
 CONFIG_VIDEO_IPUV3=y
 CONFIG_VIDEO=y
+CONFIG_DM_VIDEO=y
 CONFIG_FDT_FIXUP_PARTITIONS=y
-- 
2.7.4

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[U-Boot] [PATCH 2/2] board: cm_fx6: Enable CONFIG_DM_ETH

[sunil . m]

From: Suniel Mahesh 

Enable CONFIG_DM_ETH to remove compile warning on CM-FX6
SOM based target:

= WARNING ==
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release.


Signed-off-by: Suniel Mahesh 
---
 configs/cm_fx6_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 8288095..1eb288b 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -80,6 +80,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
 CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
+CONFIG_DM_ETH=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_USB_KEYBOARD=y
-- 
2.7.4

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[U-Boot] [RESEND PATCH] arm: imx6: cm_fx6: Enable DM SPI and SPI_FLASH, fix SPL build errors

[sunil . m]

From: Suniel Mahesh 

Enable driver model for SPI and SPI_FLASH to remove the following
compile warning on CM-FX6 SOM:
= WARNING ==
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.


This change introduced SPL build error as shown:

In file included from include/common.h:47:0,
 from drivers/mtd/spi/sf_probe.c:10:
drivers/mtd/spi/sf_probe.c: In function 'spi_flash_std_probe':
drivers/mtd/spi/sf_probe.c:149:54: error: dereferencing pointer to incomplete 
type 'struct dm_spi_slave_platdata'
scripts/Makefile.build:278: recipe for target 'spl/drivers/mtd/spi/sf_probe.o' 
failed
make[3]: *** [spl/drivers/mtd/spi/sf_probe.o] Error 1
scripts/Makefile.build:432: recipe for target 'spl/drivers/mtd/spi' failed
make[2]: *** [spl/drivers/mtd/spi] Error 2

Disabling DM for SPI support(SPI and SF) in SPL resolves the issue.
Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh 
---
 configs/cm_fx6_defconfig | 2 ++
 include/configs/cm_fx6.h | 7 +++
 2 files changed, 9 insertions(+)

diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig
index 218d3d6..ca9895e 100644
--- a/configs/cm_fx6_defconfig
+++ b/configs/cm_fx6_defconfig
@@ -66,6 +66,7 @@ CONFIG_FSL_USDHC=y
 CONFIG_NAND=y
 CONFIG_NAND_MXS=y
 CONFIG_SPI_FLASH=y
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SF_DEFAULT_MODE=0
 CONFIG_SF_DEFAULT_SPEED=2500
 CONFIG_SPI_FLASH_ATMEL=y
@@ -82,6 +83,7 @@ CONFIG_MII=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_MXC_SPI=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index eb29f07..53ae5f0 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -153,6 +153,13 @@
 /* APBH DMA is required for NAND support */
 #endif
 
+/* SPI Flash Configs */
+#if defined(CONFIG_SPL_BUILD)
+#undef CONFIG_DM_SPI
+#undef CONFIG_DM_SPI_FLASH
+#undef CONFIG_SPI_FLASH_MTD
+#endif
+
 /* Ethernet */
 #define CONFIG_FEC_MXC
 #define CONFIG_FEC_MXC_PHYADDR 0
-- 
2.7.4

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[U-Boot] [PATCH 1/2] configs: am335x_boneblack_vboot_defconfig: Fix regression by enabling BLK and DM support, disable in SPL

[sunil . m]

From: Suniel Mahesh 

This patch adds BLK and DM support for verified boot on TI AM335x
chipsets. The following compile warnings are removed:

= WARNING ==
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.

= WARNING ==
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


BLK and DM_MMC are enabled by default in SPL as well, which is
making the build to break with an overflow(spl image doesn't
fit into SRAM because of size constraints).

  LD  spl/drivers/built-in.o
  LD  spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 116 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

For the above reason BLK and DM_MMC is disabled in SPL.
Built and tested on AM335x device (BeagleboneBlack).

Signed-off-by: Suniel Mahesh 
---
 configs/am335x_boneblack_vboot_defconfig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/am335x_boneblack_vboot_defconfig 
b/configs/am335x_boneblack_vboot_defconfig
index 9ccbd68..a6c32ac 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -33,7 +33,7 @@ CONFIG_OF_CONTROL=y
 CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-# CONFIG_BLK is not set
+# CONFIG_SPL_BLK is not set
 CONFIG_BOOTCOUNT_LIMIT=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
@@ -42,6 +42,7 @@ CONFIG_DM_I2C=y
 CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
+# CONFIG_SPL_DM_MMC is not set
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=2400
 CONFIG_SPI_FLASH_WINBOND=y
-- 
1.9.1

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[U-Boot] [PATCH 2/2] configs: am335x_boneblack_vboot_defconfig: Add DM for SPI and Flash devices

[sunil . m]

From: Suniel Mahesh 

This patch adds SPI and SPI_FLASH DM support for verified boot on
TI AM335 chipsets. The following compile warning is removed:

= WARNING ==
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


Built and tested on AM335x device (BeagleboneBlack).

Signed-off-by: Suniel Mahesh 
---
 configs/am335x_boneblack_vboot_defconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/configs/am335x_boneblack_vboot_defconfig 
b/configs/am335x_boneblack_vboot_defconfig
index a6c32ac..a7fcde6 100644
--- a/configs/am335x_boneblack_vboot_defconfig
+++ b/configs/am335x_boneblack_vboot_defconfig
@@ -43,6 +43,7 @@ CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_OMAP_HS=y
 # CONFIG_SPL_DM_MMC is not set
+CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SF_DEFAULT_SPEED=2400
 CONFIG_SPI_FLASH_WINBOND=y
@@ -51,6 +52,7 @@ CONFIG_PHY_GIGE=y
 CONFIG_MII=y
 CONFIG_DRIVER_TI_CPSW=y
 CONFIG_SPI=y
+CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
-- 
1.9.1

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[U-Boot] [PATCH v2 1/2] watchdog: omap_wdt: Convert watchdog driver to use DT and DM

[sunil . m]

From: Suniel Mahesh 

This patch adds device tree and driver model watchdog support,
converts the legacy omap watchdog driver to driver model for
TI AM335x chipsets. The following compile warning is removed:

= WARNING ==
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


CONFIG_HW_WATCHDOG is no more a default option for AM33XX devices
after DT/DM conversion, adjusted kconfig accordingly.

DM watchdog support is enabled by default in SPL. The SPL image
doesn't fit into SRAM because of size constraints and build breaks
with an overflow. For this reason DM watchdog support should be
disabled in SPL, driver code should be adjusted accordingly to serve
this purpose.
Built and tested on AM335x device (BeagleboneBlack), compile tested
for all other AM33xx based boards.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- changed description a bit to make more sense.
- Travis CI build is performed on am33xx, omap branches apart from others.
  
https://travis-ci.org/sunielmahesh/u-boot/builds/566028250?utm_medium=notification&utm_source=email";
---
 arch/arm/include/asm/ti-common/omap_wdt.h |   5 ++
 configs/am335x_evm_defconfig  |   2 +
 drivers/watchdog/Kconfig  |   9 ++-
 drivers/watchdog/Makefile |   1 +
 drivers/watchdog/omap_wdt.c   | 114 ++
 5 files changed, 130 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/ti-common/omap_wdt.h 
b/arch/arm/include/asm/ti-common/omap_wdt.h
index 7d72e3a..fbc421b 100644
--- a/arch/arm/include/asm/ti-common/omap_wdt.h
+++ b/arch/arm/include/asm/ti-common/omap_wdt.h
@@ -56,4 +56,9 @@ struct wd_timer {
unsigned int wdt_unfr;  /* offset 0x100 */
 };
 
+struct omap3_wdt_priv {
+   struct wd_timer *regs;
+   unsigned int wdt_trgr_pattern;
+};
+
 #endif /* __OMAP_WDT_H__ */
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index ff96f19..fa6b030 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
+CONFIG_WDT=y
+CONFIG_WDT_OMAP3=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_DM_USB_GADGET=y
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index ccda432..c2a63c3 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -37,7 +37,6 @@ config OMAP_WATCHDOG
bool "TI OMAP watchdog driver"
depends on ARCH_OMAP2PLUS
select HW_WATCHDOG
-   default y if AM33XX
help
  Say Y here to enable the OMAP3+ watchdog driver.
 
@@ -122,6 +121,14 @@ config WDT_MTK
  The watchdog timer is stopped when initialized.
  It performs full SoC reset.
 
+config WDT_OMAP3
+bool "TI OMAP watchdog timer support"
+depends on WDT && ARCH_OMAP2PLUS
+default y if AM33XX
+help
+ This enables OMAP3+ watchdog timer driver, which can be
+ found on some TI chipsets and inline with driver model.
+
 config WDT_ORION
bool "Orion watchdog timer support"
depends on WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 97aa6a8..c40667a 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
 obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
 obj-$(CONFIG_WDT_MTK) += mtk_wdt.o
+obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o
 obj-$(CONFIG_WDT_SP805) += sp805_wdt.o
 obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt.o
 obj-$(CONFIG_WDT_TANGIER) += tangier_wdt.o
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 343adb0..86f7cf1 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -42,10 +42,14 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* Hardware timeout in seconds */
 #define WDT_HW_TIMEOUT 60
 
+#if !CONFIG_IS_ENABLED(WDT)
 static unsigned int wdt_trgr_pattern = 0x1234;
 
 void hw_watchdog_reset(void)
@@ -134,3 +138,113 @@ void hw_watchdog_init(void)
while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR)
;
 }
+#else
+static int omap3_wdt_reset(struct udevice *dev)
+{
+   struct omap3_wdt_priv *priv = dev_get_priv(dev);
+
+   priv->wdt_trgr_pattern = 0x1234;
+/*
+ * Somebody just triggered watchdog reset and write to WTGR register
+ * is in progress. It is resetting right now, no need to trigger it
+ * again
+ */
+   if ((readl(&priv->regs->wdtwwps)) & WDT_WWPS_PEND_WTGR)
+   return 0;
+
+   priv->wdt_trgr_pattern = ~(priv->wdt_trgr_pattern);
+   writel(priv->wdt_trgr_pattern, &priv->regs->wdtwtgr);
+/*
+ * Don't wait

[U-Boot] [PATCH v2 2/2] watchdog: omap_wdt: Disable DM watchdog support in SPL

[sunil . m]

From: Suniel Mahesh 

This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog driver on TI AM335x chipsets.

The following build error is reported if DM watchdog support was
enabled in SPL:

  CC  spl/drivers/usb/gadget/rndis.o
  LD  spl/drivers/usb/gadget/built-in.o
  LD  spl/drivers/usb/musb-new/built-in.o
  LD  spl/drivers/built-in.o
  LD  spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing
to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG,
now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset
is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed
this by simply calling hw_watchdog_reset in watchdog_reset.

Built and tested on AM335x device (BeagleboneBlack), compile tested for
all other AM33xx/omap2 based boards.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- changed description a bit to make more sense.
- As suggested by Tom Rini, Travis CI build is performed on
  am33xx, omap branches apart from others, it is a success.
  
https://travis-ci.org/sunielmahesh/u-boot/builds/566028250?utm_medium=notification&utm_source=email";
---
 arch/arm/mach-omap2/boot-common.c | 2 +-
 configs/am335x_evm_defconfig  | 1 +
 drivers/watchdog/omap_wdt.c   | 7 +++
 include/watchdog.h| 2 +-
 4 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/boot-common.c 
b/arch/arm/mach-omap2/boot-common.c
index c8b8ac6..c9549aa 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -208,7 +208,7 @@ void spl_board_init(void)
 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
arch_misc_init();
 #endif
-#if defined(CONFIG_HW_WATCHDOG)
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
hw_watchdog_init();
 #endif
 #ifdef CONFIG_AM33XX
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index fa6b030..c0f7ccc 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -60,6 +60,7 @@ CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_WDT=y
 CONFIG_WDT_OMAP3=y
+# CONFIG_SPL_WDT is not set
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_DM_USB_GADGET=y
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 86f7cf1..d5857be 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -138,7 +138,14 @@ void hw_watchdog_init(void)
while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR)
;
 }
+
+void watchdog_reset(void)
+{
+   hw_watchdog_reset();
+}
+
 #else
+
 static int omap3_wdt_reset(struct udevice *dev)
 {
struct omap3_wdt_priv *priv = dev_get_priv(dev);
diff --git a/include/watchdog.h b/include/watchdog.h
index 3a357de..41c9aa7 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -77,7 +77,7 @@ int init_func_watchdog_reset(void);
  * Prototypes from $(CPU)/cpu.c.
  */
 
-#if defined(CONFIG_HW_WATCHDOG) && !defined(__ASSEMBLY__)
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) && 
!defined(__ASSEMBLY__)
void hw_watchdog_init(void);
 #endif
 
-- 
2.7.4

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[U-Boot] [PATCH] Makefile: clean *dtb_HS

[sunil . m]

From: Suniel Mahesh 

All TI HS platforms generate HS images/binaries along with
the normal images. These *dtb_HS are generated in dts dir
and there is no rule for cleanup. Added entry for cleanup
in clean and distclean targets.

Signed-off-by: Suniel Mahesh 
---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 3b0864a..c740fde 100644
--- a/Makefile
+++ b/Makefile
@@ -1840,7 +1840,7 @@ clean: $(clean-dirs)
-o -name '*.symtypes' -o -name 'modules.order' \
-o -name modules.builtin -o -name '.tmp_*.o.*' \
-o -name 'dsdt.aml' -o -name 'dsdt.asl.tmp' -o -name 'dsdt.c' \
-   -o -name '*.efi' -o -name '*.gcno' -o -name '*.so' \) \
+   -o -name '*.efi' -o -name '*.gcno' -o -name '*.so' -o -name 
'*_HS' \) \
-type f -print | xargs rm -f \
bl31.c bl31.elf bl31_*.bin image.map
 
@@ -1868,7 +1868,7 @@ distclean: mrproper
\( -name '*.orig' -o -name '*.rej' -o -name '*~' \
-o -name '*.bak' -o -name '#*#' -o -name '.*.orig' \
-o -name '.*.rej' -o -name '*%' -o -name 'core' \
-   -o -name '*.pyc' \) \
+   -o -name '*.pyc' -o -name '*_HS' \) \
-type f -print | xargs rm -f
@rm -f boards.cfg CHANGELOG
 
-- 
2.7.4

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[U-Boot] [PATCH v2] arm: dts: Makefile: clean *dtb_HS

[sunil . m]

From: Suniel Mahesh 

TI HS platforms generate *dtb_HS binary blobs and there is no
rule for cleanup. Added entry for cleanup in clean-files target.

Signed-off-by: Suniel Mahesh 
---
Changes for v2:

- changed description to fit the change done.
- As suggested by Lokesh Vutla, moved cleaning process
  to dts/Makefile
---
 arch/arm/dts/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e021888..5f4e05d 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -806,4 +806,4 @@ PHONY += dtbs
 dtbs: $(addprefix $(obj)/, $(dtb-y))
@:
 
-clean-files := *.dtb
+clean-files := *.dtb *_HS
-- 
2.7.4

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[U-Boot] [PATCH] arm: omap2: am43xx: Enable CONFIG_BLK

[sunil . m]

From: Suniel Mahesh 

With DM_MMC enabled, enable CONFIG_BLK to remove this
compile warning for am43xx based targets:

= WARNING ==
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


Targets were compile tested, build was clean.

Signed-off-by: Suniel Mahesh 
---
 configs/am43xx_evm_defconfig  | 2 +-
 configs/am43xx_evm_qspiboot_defconfig | 2 +-
 configs/am43xx_evm_rtconly_defconfig  | 2 +-
 configs/am43xx_evm_usbhost_boot_defconfig | 2 +-
 configs/am43xx_hs_evm_defconfig   | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig
index 4bb5dfe..152f489e 100644
--- a/configs/am43xx_evm_defconfig
+++ b/configs/am43xx_evm_defconfig
@@ -37,7 +37,7 @@ CONFIG_REGMAP=y
 CONFIG_SPL_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_SPL_SYSCON=y
-# CONFIG_BLK is not set
+CONFIG_BLK=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
diff --git a/configs/am43xx_evm_qspiboot_defconfig 
b/configs/am43xx_evm_qspiboot_defconfig
index 7806b33..09f73d8 100644
--- a/configs/am43xx_evm_qspiboot_defconfig
+++ b/configs/am43xx_evm_qspiboot_defconfig
@@ -34,7 +34,7 @@ CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM=y
-# CONFIG_BLK is not set
+CONFIG_BLK=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
diff --git a/configs/am43xx_evm_rtconly_defconfig 
b/configs/am43xx_evm_rtconly_defconfig
index 1af908a..37a1f2b 100644
--- a/configs/am43xx_evm_rtconly_defconfig
+++ b/configs/am43xx_evm_rtconly_defconfig
@@ -29,7 +29,7 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
 CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM=y
-# CONFIG_BLK is not set
+CONFIG_BLK=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
diff --git a/configs/am43xx_evm_usbhost_boot_defconfig 
b/configs/am43xx_evm_usbhost_boot_defconfig
index fc474aa..dbc2fe1 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -41,7 +41,7 @@ CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm 
am437x-idk-evm"
 CONFIG_ENV_IS_IN_FAT=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM=y
-# CONFIG_BLK is not set
+CONFIG_BLK=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig
index fad564d..0a993b0 100644
--- a/configs/am43xx_hs_evm_defconfig
+++ b/configs/am43xx_hs_evm_defconfig
@@ -40,7 +40,7 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm"
 CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DM=y
-# CONFIG_BLK is not set
+CONFIG_BLK=y
 CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
-- 
2.7.4

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[U-Boot] [PATCH] board: ti: am43xx_evm_usbboot: Enable DM for USB, fix SPL build errors

[sunil . m]

From: Suniel Mahesh 

To address the following warning message:

= WARNING ==
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


CONFIG_DM_USB is enabled, this resulted in SPL build errors:

drivers/built-in.o: In function 'xhci_dwc3_probe':
u-boot/drivers/usb/host/xhci-dwc3.c:155: undefined reference to 
'usb_get_dr_mode'
scripts/Makefile.spl:404: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1721: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2

Enabling usb common library and usb ethernet drivers in SPL
does the job. Target was compile tested, build was clean.

Signed-off-by: Suniel Mahesh 
---
 configs/am43xx_evm_usbhost_boot_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/am43xx_evm_usbhost_boot_defconfig 
b/configs/am43xx_evm_usbhost_boot_defconfig
index dbc2fe1..bd012d3 100644
--- a/configs/am43xx_evm_usbhost_boot_defconfig
+++ b/configs/am43xx_evm_usbhost_boot_defconfig
@@ -14,6 +14,8 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_MTD_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_USB_GADGET=y
+CONFIG_SPL_USB_ETHER=y
 CONFIG_SPL_USB_HOST_SUPPORT=y
 CONFIG_SPL_USB_STORAGE=y
 CONFIG_CMD_SPL=y
@@ -61,6 +63,7 @@ CONFIG_TI_QSPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_USB=y
+CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_DWC3=y
-- 
2.7.4

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[U-Boot] [PATCH 2/2] watchdog: omap_wdt: Disable DM watchdog support in SPL

[sunil . m]

From: Suniel Mahesh 

This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog on TI AM335x chipsets.

The following build error is reported if DM watchdog support was enabled in SPL:

  CC  spl/drivers/usb/gadget/rndis.o
  LD  spl/drivers/usb/gadget/built-in.o
  LD  spl/drivers/usb/musb-new/built-in.o
  LD  spl/drivers/built-in.o
  LD  spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2

Tested on BeagleboneBlack board.

Signed-off-by: Suniel Mahesh 
---
Notes:
- CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG, earlier WATCHDOG_RESET
  macro used to point to hw_watchdog_reset() in include/watchdog.h.
  Now since we use CONFIG_WATCHDOG, here WATCHDOG_RESET macro points to
  watchdog_reset(). This watchdog_reset() is not defined anywhere and needs
  to be defined. Fixed this by simply calling hw_watchdog_reset() in
  watchdog_reset() (driver/watchdog/omap_wdt.c). Hope this is ok
- CONFIG_SPL_DM is disabled in board defconfig file. Hope this
  is ok
- there are 13 boards I think which are using AM335X SOC. All
  these board defconfig files to be changed if this gets accepted
  to follow DM/DT WDT in u-boot and non DM/DT in spl.
- This patch series is heavily dependant on:
  https://patchwork.ozlabs.org/patch/1112591/
  waiting for it to get applied.
---
 arch/arm/mach-omap2/boot-common.c | 2 +-
 configs/am335x_evm_defconfig  | 1 +
 drivers/watchdog/omap_wdt.c   | 7 +++
 include/watchdog.h| 2 +-
 4 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-omap2/boot-common.c 
b/arch/arm/mach-omap2/boot-common.c
index c8b8ac6..c9549aa 100644
--- a/arch/arm/mach-omap2/boot-common.c
+++ b/arch/arm/mach-omap2/boot-common.c
@@ -208,7 +208,7 @@ void spl_board_init(void)
 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
arch_misc_init();
 #endif
-#if defined(CONFIG_HW_WATCHDOG)
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
hw_watchdog_init();
 #endif
 #ifdef CONFIG_AM33XX
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index fa6b030..c0f7ccc 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -60,6 +60,7 @@ CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_WDT=y
 CONFIG_WDT_OMAP3=y
+# CONFIG_SPL_WDT is not set
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_DM_USB_GADGET=y
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 86f7cf1..d5857be 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -138,7 +138,14 @@ void hw_watchdog_init(void)
while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR)
;
 }
+
+void watchdog_reset(void)
+{
+   hw_watchdog_reset();
+}
+
 #else
+
 static int omap3_wdt_reset(struct udevice *dev)
 {
struct omap3_wdt_priv *priv = dev_get_priv(dev);
diff --git a/include/watchdog.h b/include/watchdog.h
index 3a357de..41c9aa7 100644
--- a/include/watchdog.h
+++ b/include/watchdog.h
@@ -77,7 +77,7 @@ int init_func_watchdog_reset(void);
  * Prototypes from $(CPU)/cpu.c.
  */
 
-#if defined(CONFIG_HW_WATCHDOG) && !defined(__ASSEMBLY__)
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG) && 
!defined(__ASSEMBLY__)
void hw_watchdog_init(void);
 #endif
 
-- 
1.9.1

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[U-Boot] [PATCH 1/2] watchdog: omap_wdt: Convert watchdog driver to use DT and DM

[sunil . m]

From: Suniel Mahesh 

This patch adds device tree and driver model watchdog support,
converts the legacy omap watchdog driver to driver model for
TI AM335x chipsets. The following compile warning is removed:

= WARNING ==
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.


DM watchdog support if enabled in SPL, spl image doesn't fit into
SRAM because of size constraints and build breaks with an overflow.
For this reason DM watchdog support should be disabled in SPL. The
driver code should be adjusted accordingly to serve this purpose.
Tested on BeagleboneBlack board.

Signed-off-by: Suniel Mahesh 
---
Notes:
- DM watchdog support if enabled in SPL, spl image doesn't
  fit into SRAM because of size constraints.
- Disabling DM watchdog support in SPL, another patch follows.
- This patch series is heavily dependant on:
  https://patchwork.ozlabs.org/patch/1112591/
  waiting for it to get applied.
---
 arch/arm/include/asm/ti-common/omap_wdt.h |   5 ++
 configs/am335x_evm_defconfig  |   2 +
 drivers/watchdog/Kconfig  |  10 ++-
 drivers/watchdog/Makefile |   1 +
 drivers/watchdog/omap_wdt.c   | 114 ++
 5 files changed, 131 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/ti-common/omap_wdt.h 
b/arch/arm/include/asm/ti-common/omap_wdt.h
index 7d72e3a..fbc421b 100644
--- a/arch/arm/include/asm/ti-common/omap_wdt.h
+++ b/arch/arm/include/asm/ti-common/omap_wdt.h
@@ -56,4 +56,9 @@ struct wd_timer {
unsigned int wdt_unfr;  /* offset 0x100 */
 };
 
+struct omap3_wdt_priv {
+   struct wd_timer *regs;
+   unsigned int wdt_trgr_pattern;
+};
+
 #endif /* __OMAP_WDT_H__ */
diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig
index ff96f19..fa6b030 100644
--- a/configs/am335x_evm_defconfig
+++ b/configs/am335x_evm_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM_SPI=y
 CONFIG_OMAP3_SPI=y
 CONFIG_TIMER=y
 CONFIG_OMAP_TIMER=y
+CONFIG_WDT=y
+CONFIG_WDT_OMAP3=y
 CONFIG_USB=y
 CONFIG_DM_USB=y
 CONFIG_DM_USB_GADGET=y
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index e5a7bb3..93ebc47 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -37,7 +37,7 @@ config OMAP_WATCHDOG
bool "TI OMAP watchdog driver"
depends on ARCH_OMAP2PLUS
select HW_WATCHDOG
-   default y if AM33XX
+   default y if !AM33XX
help
  Say Y here to enable the OMAP3+ watchdog driver.
 
@@ -122,6 +122,14 @@ config WDT_MTK
  The watchdog timer is stopped when initialized.
  It performs full SoC reset.
 
+config WDT_OMAP3
+bool "TI OMAP watchdog timer support"
+depends on WDT && ARCH_OMAP2PLUS
+default y if AM33XX
+help
+ This enables OMAP3+ watchdog timer driver, which can be
+ found on some TI chipsets and inline with driver model.
+
 config WDT_ORION
bool "Orion watchdog timer support"
depends on WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 97aa6a8..c40667a 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_WDT_CDNS) += cdns_wdt.o
 obj-$(CONFIG_WDT_MPC8xx) += mpc8xx_wdt.o
 obj-$(CONFIG_WDT_MT7621) += mt7621_wdt.o
 obj-$(CONFIG_WDT_MTK) += mtk_wdt.o
+obj-$(CONFIG_WDT_OMAP3) += omap_wdt.o
 obj-$(CONFIG_WDT_SP805) += sp805_wdt.o
 obj-$(CONFIG_WDT_STM32MP) += stm32mp_wdt.o
 obj-$(CONFIG_WDT_TANGIER) += tangier_wdt.o
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 343adb0..86f7cf1 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -42,10 +42,14 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* Hardware timeout in seconds */
 #define WDT_HW_TIMEOUT 60
 
+#if !CONFIG_IS_ENABLED(WDT)
 static unsigned int wdt_trgr_pattern = 0x1234;
 
 void hw_watchdog_reset(void)
@@ -134,3 +138,113 @@ void hw_watchdog_init(void)
while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WSPR)
;
 }
+#else
+static int omap3_wdt_reset(struct udevice *dev)
+{
+   struct omap3_wdt_priv *priv = dev_get_priv(dev);
+
+   priv->wdt_trgr_pattern = 0x1234;
+/*
+ * Somebody just triggered watchdog reset and write to WTGR register
+ * is in progress. It is resetting right now, no need to trigger it
+ * again
+ */
+   if ((readl(&priv->regs->wdtwwps)) & WDT_WWPS_PEND_WTGR)
+   return 0;
+
+   priv->wdt_trgr_pattern = ~(priv->wdt_trgr_pattern);
+   writel(priv->wdt_trgr_pattern, &priv->regs->wdtwtgr);
+/*
+ * Don't wait for posted write to complete, i.e. don't check
+ * WDT_WWPS_PEND_WTGR bit in WWPS register. There is no writes to
+ * W

[U-Boot] [PATCH v3] arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

[Sunil Mohan Adapa]

A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4&id=02bb66b347ff8115f53948f86b884e008ba385b9

This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree and a64-olinuxino_defconfig.

changes:

v3: Squash two separate patches into a single one.

v2: Separate device tree for emmc models.

Signed-off-by: Sunil Mohan Adapa 
Reviewed-by: Jagan Teki 
---
 arch/arm/dts/Makefile  |  1 +
 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts | 23 ++
 board/sunxi/MAINTAINERS|  5 +
 configs/a64-olinuxino-emmc_defconfig   | 17 
 4 files changed, 46 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
 create mode 100644 configs/a64-olinuxino-emmc_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 05ff624c07..d28906a63b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -530,6 +530,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-nanopi-a64.dtb \
sun50i-a64-oceanic-5205-5inmfd.dtb \
sun50i-a64-olinuxino.dtb \
+   sun50i-a64-olinuxino-emmc.dtb \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-lts.dtb \
sun50i-a64-pine64-plus.dtb \
diff --git a/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts 
b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
new file mode 100644
index 00..96ab0227e8
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Martin Ayotte 
+ * Copyright (C) 2019 Sunil Mohan Adapa 
+ */
+
+#include "sun50i-a64-olinuxino.dts"
+
+/ {
+   model = "Olimex A64-Olinuxino-eMMC";
+   compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&mmc2_pins>;
+   vmmc-supply = <®_dcdc1>;
+   vqmmc-supply = <®_dcdc1>;
+   bus-width = <8>;
+   non-removable;
+   cap-mmc-hw-reset;
+   status = "okay";
+};
diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index c7e9d3eda0..442ff3d9cd 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -106,6 +106,11 @@ M: Jagan Teki 
 S: Maintained
 F: configs/a64-olinuxino_defconfig
 
+A64-OLINUXINO-EMMC BOARD
+M: Sunil Mohan Adapa 
+S: Maintained
+F: configs/a64-olinuxino-emmc_defconfig
+
 A80 OPTIMUS BOARD
 M: Chen-Yu Tsai 
 S: Maintained
diff --git a/configs/a64-olinuxino-emmc_defconfig 
b/configs/a64-olinuxino-emmc_defconfig
new file mode 100644
index 00..56153e38a7
--- /dev/null
+++ b/configs/a64-olinuxino-emmc_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_USE_PREBOOT=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc"
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-- 
2.20.1

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Re: [U-Boot] [PATCH v2 0/2] arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

[Sunil Mohan Adapa]

On 06/09/19 9:05 pm, Jagan Teki wrote:
> On Fri, Aug 23, 2019 at 1:56 AM Sunil Mohan Adapa  wrote:
>>
>> This is a follow up a patch that didn't create a separate dts:
>> https://lists.denx.de/pipermail/u-boot/2019-July/379109.html
>>
>> A64 OLinuXino board from Olimex has three variants with onboard eMMC:
>> A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
>> addition, there are two variants without eMMC. One without eMMC and one with 
>> SPI
>> flash. This suggests the need for separate device tree for the three eMMC
>> variants.
>>
>> The Linux kernel upstream has chosen to create and use a separate device tree
>> for the eMMC variants instead of adding eMMC support existing device tree. 
>> These
>> changes to Linux kernel are queued for Linux 5.4.
>>
>> https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4&id=02bb66b347ff8115f53948f86b884e008ba385b9
>>
>> This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
>> device-tree.
>>
>> Changes:
>>
>> v2: Separate device tree for emmc models.
>>
>> Sunil Mohan Adapa (2):
>>   arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)
>>   configs: sun50i: Add support for Olimex A64-Olinuxino-eMMC
> 
> Please squash and send it as single patch, all look fine to me.
> 
> Reviewed-by: Jagan Teki 
> 

Thank you for reviewing the patch. I have posted v3 with the two patches
squashed.

-- 
Sunil



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[U-Boot] [PATCH] sunxi: dts: a64-olinuxino: Fix regression to eMMC support

[Sunil Mohan Adapa]

Description for eMMC is missing the DTS causing eMMC to regress after
DM_MMC was enabled for sunxi in
a7cca5793774ee139b75a704d6efaa4d29f09f93.

Signed-off-by: Sunil Mohan Adapa 
Tested-by: Sunil Mohan Adapa 
Cc: linux-su...@googlegroups.com
---
 arch/arm/dts/sun50i-a64-olinuxino.dts | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/dts/sun50i-a64-olinuxino.dts 
b/arch/arm/dts/sun50i-a64-olinuxino.dts
index f7a4bcca..74db6300 100644
--- a/arch/arm/dts/sun50i-a64-olinuxino.dts
+++ b/arch/arm/dts/sun50i-a64-olinuxino.dts
@@ -155,6 +155,17 @@
};
 };
 
+&mmc2 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&mmc2_pins>;
+   vmmc-supply = <®_dcdc1>;
+   vqmmc-supply = <®_dcdc1>;
+   bus-width = <8>;
+   non-removable;
+   cap-mmc-hw-reset;
+   status = "okay";
+};
+
 &ohci0 {
status = "okay";
 };
-- 
2.20.1

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[U-Boot] [PATCH v2 0/2] arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

[Sunil Mohan Adapa]

This is a follow up a patch that didn't create a separate dts:
https://lists.denx.de/pipermail/u-boot/2019-July/379109.html

A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4&id=02bb66b347ff8115f53948f86b884e008ba385b9

This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree.

Changes:

v2: Separate device tree for emmc models.

Sunil Mohan Adapa (2):
  arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)
  configs: sun50i: Add support for Olimex A64-Olinuxino-eMMC

 arch/arm/dts/Makefile  |  1 +
 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts | 23 ++
 board/sunxi/MAINTAINERS|  5 +
 configs/a64-olinuxino-emmc_defconfig   | 17 
 4 files changed, 46 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
 create mode 100644 configs/a64-olinuxino-emmc_defconfig

-- 
2.20.1

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[U-Boot] [PATCH v2 2/2] configs: sun50i: Add support for Olimex A64-Olinuxino-eMMC

[Sunil Mohan Adapa]

A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4&id=02bb66b347ff8115f53948f86b884e008ba385b9

Based on a64-olinuxino_defconfig.

This patch has been tested on A64-OLinuXino-1Ge16GW.

Signed-off-by: Sunil Mohan Adapa 
---
 board/sunxi/MAINTAINERS  |  5 +
 configs/a64-olinuxino-emmc_defconfig | 17 +
 2 files changed, 22 insertions(+)
 create mode 100644 configs/a64-olinuxino-emmc_defconfig

diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS
index c7e9d3eda0..442ff3d9cd 100644
--- a/board/sunxi/MAINTAINERS
+++ b/board/sunxi/MAINTAINERS
@@ -106,6 +106,11 @@ M: Jagan Teki 
 S: Maintained
 F: configs/a64-olinuxino_defconfig
 
+A64-OLINUXINO-EMMC BOARD
+M: Sunil Mohan Adapa 
+S: Maintained
+F: configs/a64-olinuxino-emmc_defconfig
+
 A80 OPTIMUS BOARD
 M: Chen-Yu Tsai 
 S: Maintained
diff --git a/configs/a64-olinuxino-emmc_defconfig 
b/configs/a64-olinuxino-emmc_defconfig
new file mode 100644
index 00..56153e38a7
--- /dev/null
+++ b/configs/a64-olinuxino-emmc_defconfig
@@ -0,0 +1,17 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_SPL=y
+CONFIG_MACH_SUN50I=y
+CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_USE_PREBOOT=y
+# CONFIG_CMD_FLASH is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc"
+CONFIG_SUN8I_EMAC=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
-- 
2.20.1

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[U-Boot] [PATCH v2 1/2] arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

[Sunil Mohan Adapa]

A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/commit/?h=sunxi/dt-for-5.4&id=02bb66b347ff8115f53948f86b884e008ba385b9

This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree.

Signed-off-by: Sunil Mohan Adapa 
---
 arch/arm/dts/Makefile  |  1 +
 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts | 23 ++
 2 files changed, 24 insertions(+)
 create mode 100644 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 05ff624c07..d28906a63b 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -530,6 +530,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-nanopi-a64.dtb \
sun50i-a64-oceanic-5205-5inmfd.dtb \
sun50i-a64-olinuxino.dtb \
+   sun50i-a64-olinuxino-emmc.dtb \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-lts.dtb \
sun50i-a64-pine64-plus.dtb \
diff --git a/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts 
b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
new file mode 100644
index 00..96ab0227e8
--- /dev/null
+++ b/arch/arm/dts/sun50i-a64-olinuxino-emmc.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Martin Ayotte 
+ * Copyright (C) 2019 Sunil Mohan Adapa 
+ */
+
+#include "sun50i-a64-olinuxino.dts"
+
+/ {
+   model = "Olimex A64-Olinuxino-eMMC";
+   compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+   pinctrl-names = "default";
+   pinctrl-0 = <&mmc2_pins>;
+   vmmc-supply = <®_dcdc1>;
+   vqmmc-supply = <®_dcdc1>;
+   bus-width = <8>;
+   non-removable;
+   cap-mmc-hw-reset;
+   status = "okay";
+};
-- 
2.20.1

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[RFC PATCH 0/1] RISCV_EFI_BOOT_PROTOCOL support in U-boot

[Sunil V L]

This patch adds the support in u-boot for new RISCV_EFI_BOOT_PROTOCOL for RISC-V
UEFI platforms. This protocol is required to communicate the boot hart ID to the
bootloader/kernel which need to follow the EFI calling conventions.

The latest draft spec of this new protocol is available at
https://github.com/riscv-non-isa/riscv-uefi/releases/download/1.0-rc2/RISCV_UEFI_PROTOCOL-spec.pdf

This u-boot patch can be found in:
riscv_boot_protocol_rfc_v1 branch at https://github.com/vlsunil/u-boot.git

This patch is tested in qemu. To fully test the feature, we need
Linux changes which consume this protocol.
The linux patch can be found in:
riscv_boot_protocol_rfc_v1 branch at https://github.com/vlsunil/linux.git

Sunil V L (1):
  efi_loader: Enable RISCV_EFI_BOOT_PROTOCOL support

 include/efi_api.h  |  4 +++
 include/efi_loader.h   |  2 ++
 include/efi_riscv.h| 16 +
 lib/efi_loader/Kconfig |  7 
 lib/efi_loader/Makefile|  1 +
 lib/efi_loader/efi_riscv.c | 69 ++
 lib/efi_loader/efi_setup.c |  6 
 7 files changed, 105 insertions(+)
 create mode 100644 include/efi_riscv.h
 create mode 100644 lib/efi_loader/efi_riscv.c

-- 
2.25.1

[RFC PATCH 1/1] efi_loader: Enable RISCV_EFI_BOOT_PROTOCOL support

[Sunil V L]

This adds support for new RISCV_EFI_BOOT_PROTOCOL to
communicate the boot hart ID to bootloader/kernel on RISC-V
UEFI platforms.

Signed-off-by: Sunil V L 
---
 include/efi_api.h  |  4 +++
 include/efi_loader.h   |  2 ++
 include/efi_riscv.h| 16 +
 lib/efi_loader/Kconfig |  7 
 lib/efi_loader/Makefile|  1 +
 lib/efi_loader/efi_riscv.c | 69 ++
 lib/efi_loader/efi_setup.c |  6 
 7 files changed, 105 insertions(+)
 create mode 100644 include/efi_riscv.h
 create mode 100644 lib/efi_loader/efi_riscv.c

diff --git a/include/efi_api.h b/include/efi_api.h
index 8d5d835bd0..f123d0557c 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -438,6 +438,10 @@ struct efi_runtime_services {
EFI_GUID(0x607f766c, 0x7455, 0x42be, 0x93, \
 0x0b, 0xe4, 0xd7, 0x6d, 0xb2, 0x72, 0x0f)
 
+#define RISCV_EFI_BOOT_PROTOCOL_GUID \
+   EFI_GUID(0xccd15fec, 0x6f73, 0x4eec, 0x83, \
+0x95, 0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf)
+
 /**
  * struct efi_configuration_table - EFI Configuration Table
  *
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 701efcd2b6..1fa75b40fe 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -527,6 +527,8 @@ efi_status_t efi_disk_register(void);
 efi_status_t efi_rng_register(void);
 /* Called by efi_init_obj_list() to install EFI_TCG2_PROTOCOL */
 efi_status_t efi_tcg2_register(void);
+/* Called by efi_init_obj_list() to install RISCV_EFI_BOOT_PROTOCOL */
+efi_status_t efi_riscv_register(void);
 /* Called by efi_init_obj_list() to do initial measurement */
 efi_status_t efi_tcg2_do_initial_measurement(void);
 /* measure the pe-coff image, extend PCR and add Event Log */
diff --git a/include/efi_riscv.h b/include/efi_riscv.h
new file mode 100644
index 00..6beb2637f6
--- /dev/null
+++ b/include/efi_riscv.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * RISCV_EFI_BOOT_PROTOCOL
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc
+ */
+
+#include 
+
+#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x0001
+
+struct riscv_efi_boot_protocol {
+   u64 revision;
+   efi_status_t (EFIAPI *get_boot_hartid) (struct riscv_efi_boot_protocol 
*this,
+   efi_uintn_t *boot_hartid);
+};
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 24f9a2bb75..77ba6a7ea1 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -369,4 +369,11 @@ config EFI_ESRT
help
  Enabling this option creates the ESRT UEFI system table.
 
+config EFI_RISCV_BOOT_PROTOCOL
+   bool "RISCV_EFI_BOOT_PROTOCOL support"
+   default y
+   depends on RISCV
+   help
+ Provide a RISCV_EFI_BOOT_PROTOCOL implementation on RISC-V platform.
+
 endif
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index fd344cea29..b2c664d108 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_GENERATE_ACPI_TABLE) += efi_acpi.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += efi_smbios.o
 obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_rng.o
 obj-$(CONFIG_EFI_TCG2_PROTOCOL) += efi_tcg2.o
+obj-$(CONFIG_EFI_RISCV_BOOT_PROTOCOL) += efi_riscv.o
 obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_load_initrd.o
 obj-$(CONFIG_EFI_SIGNATURE_SUPPORT) += efi_signature.o
 
diff --git a/lib/efi_loader/efi_riscv.c b/lib/efi_loader/efi_riscv.c
new file mode 100644
index 00..91b8d2b927
--- /dev/null
+++ b/lib/efi_loader/efi_riscv.c
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Defines APIs that allow an OS to interact with UEFI firmware to query
+ * information about the boot hart ID.
+ *
+ * Copyright (c) 2022, Ventana Micro Systems Inc
+ */
+
+#define LOG_CATEGORY LOGC_EFI
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const efi_guid_t efi_guid_riscv_boot_protocol = 
RISCV_EFI_BOOT_PROTOCOL_GUID;
+static efi_uintn_t hartid;
+
+/**
+ * efi_riscv_get_boot_hartid() - return boot hart ID
+ *
+ * @this:  RISCV_EFI_BOOT_PROTOCOL instance
+ * @boot_hartidcaller allocated memory to return boot hart id
+
+ * Return: status code
+ */
+static efi_status_t EFIAPI
+efi_riscv_get_boot_hartid(struct riscv_efi_boot_protocol *this,
+   efi_uintn_t *boot_hartid)
+{
+   log_err(" efi_riscv_get_boot_hartid ENTER\n");
+   if ((this == NULL) || (boot_hartid == NULL))
+   return EFI_INVALID_PARAMETER;
+
+   *boot_hartid = hartid;
+
+   return EFI_SUCCESS;
+}
+
+static const struct riscv_efi_boot_protocol riscv_efi_boot_prot = {
+   .revision = RISCV_EFI_BOOT_PROTOCOL_REVISION,
+   .get_boot_hartid = efi_riscv_get_boot_hartid
+};
+
+/**
+ * efi_riscv_register() - register RISCV_EFI_BOOT_PROTOCOL
+ *
+ *
+ * Return: status code
+ */
+efi_status_t efi_riscv_register(void)
+{
+   efi_status

Re: [RFC PATCH 1/1] efi_loader: Enable RISCV_EFI_BOOT_PROTOCOL support

[Sunil V L]

Hi Heinrich,
On Thu, Jan 27, 2022 at 09:44:57AM +0100, Heinrich Schuchardt wrote:
> On 1/26/22 12:06, Sunil V L wrote:
> > This adds support for new RISCV_EFI_BOOT_PROTOCOL to
> > communicate the boot hart ID to bootloader/kernel on RISC-V
> > UEFI platforms.
> > 
> > Signed-off-by: Sunil V L 
> > ---
> >   include/efi_api.h  |  4 +++
> >   include/efi_loader.h   |  2 ++
> >   include/efi_riscv.h| 16 +
> >   lib/efi_loader/Kconfig |  7 
> >   lib/efi_loader/Makefile|  1 +
> >   lib/efi_loader/efi_riscv.c | 69 ++
> >   lib/efi_loader/efi_setup.c |  6 
> >   7 files changed, 105 insertions(+)
> >   create mode 100644 include/efi_riscv.h
> >   create mode 100644 lib/efi_loader/efi_riscv.c
> > 
> > diff --git a/include/efi_api.h b/include/efi_api.h
> > index 8d5d835bd0..f123d0557c 100644
> > --- a/include/efi_api.h
> > +++ b/include/efi_api.h
> > @@ -438,6 +438,10 @@ struct efi_runtime_services {
> > EFI_GUID(0x607f766c, 0x7455, 0x42be, 0x93, \
> >  0x0b, 0xe4, 0xd7, 0x6d, 0xb2, 0x72, 0x0f)
> > 
> > +#define RISCV_EFI_BOOT_PROTOCOL_GUID \
> > +   EFI_GUID(0xccd15fec, 0x6f73, 0x4eec, 0x83, \
> > +0x95, 0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf)
> > +
> >   /**
> >* struct efi_configuration_table - EFI Configuration Table
> >*
> > diff --git a/include/efi_loader.h b/include/efi_loader.h
> > index 701efcd2b6..1fa75b40fe 100644
> > --- a/include/efi_loader.h
> > +++ b/include/efi_loader.h
> > @@ -527,6 +527,8 @@ efi_status_t efi_disk_register(void);
> >   efi_status_t efi_rng_register(void);
> >   /* Called by efi_init_obj_list() to install EFI_TCG2_PROTOCOL */
> >   efi_status_t efi_tcg2_register(void);
> > +/* Called by efi_init_obj_list() to install RISCV_EFI_BOOT_PROTOCOL */
> > +efi_status_t efi_riscv_register(void);
> >   /* Called by efi_init_obj_list() to do initial measurement */
> >   efi_status_t efi_tcg2_do_initial_measurement(void);
> >   /* measure the pe-coff image, extend PCR and add Event Log */
> > diff --git a/include/efi_riscv.h b/include/efi_riscv.h
> > new file mode 100644
> > index 00..6beb2637f6
> > --- /dev/null
> > +++ b/include/efi_riscv.h
> > @@ -0,0 +1,16 @@
> > +/* SPDX-License-Identifier: GPL-2.0+ */
> > +/*
> > + * RISCV_EFI_BOOT_PROTOCOL
> > + *
> > + * Copyright (c) 2022 Ventana Micro Systems Inc
> > + */
> > +
> > +#include 
> > +
> > +#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x0001
> > +
> 
> Please, add Sphinx style comments to describe the structure.

Sure.

> 
> > +struct riscv_efi_boot_protocol {
> > +   u64 revision;
> > +   efi_status_t (EFIAPI *get_boot_hartid) (struct riscv_efi_boot_protocol 
> > *this,
> > +   efi_uintn_t *boot_hartid);
> > +};
> > diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
> > index 24f9a2bb75..77ba6a7ea1 100644
> > --- a/lib/efi_loader/Kconfig
> > +++ b/lib/efi_loader/Kconfig
> > @@ -369,4 +369,11 @@ config EFI_ESRT
> > help
> >   Enabling this option creates the ESRT UEFI system table.
> > 
> > +config EFI_RISCV_BOOT_PROTOCOL
> > +   bool "RISCV_EFI_BOOT_PROTOCOL support"
> > +   default y
> > +   depends on RISCV
> > +   help
> > + Provide a RISCV_EFI_BOOT_PROTOCOL implementation on RISC-V platform.
> > +
> >   endif
> > diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
> > index fd344cea29..b2c664d108 100644
> > --- a/lib/efi_loader/Makefile
> > +++ b/lib/efi_loader/Makefile
> > @@ -62,6 +62,7 @@ obj-$(CONFIG_GENERATE_ACPI_TABLE) += efi_acpi.o
> >   obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += efi_smbios.o
> >   obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_rng.o
> >   obj-$(CONFIG_EFI_TCG2_PROTOCOL) += efi_tcg2.o
> > +obj-$(CONFIG_EFI_RISCV_BOOT_PROTOCOL) += efi_riscv.o
> >   obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_load_initrd.o
> >   obj-$(CONFIG_EFI_SIGNATURE_SUPPORT) += efi_signature.o
> > 
> > diff --git a/lib/efi_loader/efi_riscv.c b/lib/efi_loader/efi_riscv.c
> > new file mode 100644
> > index 00..91b8d2b927
> > --- /dev/null
> > +++ b/lib/efi_loader/efi_riscv.c
> > @@ -0,0 +1,69 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Defines APIs that allow an OS to interact with UEFI firmware to query
> > + * information about the boot hart ID.
> > + *
> > + * Copyright (c)

[RFC PATCH V2 0/2] RISCV_EFI_BOOT_PROTOCOL support in U-boot

[Sunil V L]

This patch series adds the support in u-boot for new RISCV_EFI_BOOT_PROTOCOL 
for RISC-V
UEFI platforms. This protocol is required to communicate the boot hart ID to the
bootloader/kernel which need to follow the EFI calling conventions.

The latest draft spec of this new protocol is available at
https://github.com/riscv-non-isa/riscv-uefi/releases/download/1.0-rc2/RISCV_UEFI_PROTOCOL-spec.pdf

This u-boot patches can be found in:
riscv_boot_protocol_rfc_v2 branch at https://github.com/vlsunil/u-boot.git

These patches are tested in qemu. To fully test the feature, we need
Linux changes which consume this protocol.
The linux patch can be found in:
riscv_boot_protocol_rfc_v2 branch at https://github.com/vlsunil/linux.git

Changes since RFC V1:
- Used EFI_ENTRY/EXIT and removed need for static variable
- Addressed other comments from Heinrich
- Added unit test patch

Sunil V L (2):
  efi_loader: Enable RISCV_EFI_BOOT_PROTOCOL support
  efi_selftest: unit test for RISCV_EFI_BOOT_PROTOCOL

 include/efi_api.h |   4 +
 include/efi_loader.h  |   2 +
 include/efi_riscv.h   |  24 ++
 lib/efi_loader/Kconfig|   8 ++
 lib/efi_loader/Makefile   |   1 +
 lib/efi_loader/efi_riscv.c|  60 +
 lib/efi_loader/efi_setup.c|   6 ++
 lib/efi_selftest/Makefile |   1 +
 lib/efi_selftest/efi_selftest_riscv.c | 119 ++
 9 files changed, 225 insertions(+)
 create mode 100644 include/efi_riscv.h
 create mode 100644 lib/efi_loader/efi_riscv.c
 create mode 100644 lib/efi_selftest/efi_selftest_riscv.c

-- 
2.25.1

[RFC PATCH V2 1/2] efi_loader: Enable RISCV_EFI_BOOT_PROTOCOL support

[Sunil V L]

This adds support for new RISCV_EFI_BOOT_PROTOCOL to
communicate the boot hart ID to bootloader/kernel on RISC-V
UEFI platforms.

The specification of the protocol is hosted at:
https://github.com/riscv-non-isa/riscv-uefi

Signed-off-by: Sunil V L 
---
 include/efi_api.h  |  4 +++
 include/efi_loader.h   |  2 ++
 include/efi_riscv.h| 24 +++
 lib/efi_loader/Kconfig |  8 +
 lib/efi_loader/Makefile|  1 +
 lib/efi_loader/efi_riscv.c | 60 ++
 lib/efi_loader/efi_setup.c |  6 
 7 files changed, 105 insertions(+)
 create mode 100644 include/efi_riscv.h
 create mode 100644 lib/efi_loader/efi_riscv.c

diff --git a/include/efi_api.h b/include/efi_api.h
index 8d5d835bd0..f123d0557c 100644
--- a/include/efi_api.h
+++ b/include/efi_api.h
@@ -438,6 +438,10 @@ struct efi_runtime_services {
EFI_GUID(0x607f766c, 0x7455, 0x42be, 0x93, \
 0x0b, 0xe4, 0xd7, 0x6d, 0xb2, 0x72, 0x0f)
 
+#define RISCV_EFI_BOOT_PROTOCOL_GUID \
+   EFI_GUID(0xccd15fec, 0x6f73, 0x4eec, 0x83, \
+0x95, 0x3e, 0x69, 0xe4, 0xb9, 0x40, 0xbf)
+
 /**
  * struct efi_configuration_table - EFI Configuration Table
  *
diff --git a/include/efi_loader.h b/include/efi_loader.h
index 701efcd2b6..1fa75b40fe 100644
--- a/include/efi_loader.h
+++ b/include/efi_loader.h
@@ -527,6 +527,8 @@ efi_status_t efi_disk_register(void);
 efi_status_t efi_rng_register(void);
 /* Called by efi_init_obj_list() to install EFI_TCG2_PROTOCOL */
 efi_status_t efi_tcg2_register(void);
+/* Called by efi_init_obj_list() to install RISCV_EFI_BOOT_PROTOCOL */
+efi_status_t efi_riscv_register(void);
 /* Called by efi_init_obj_list() to do initial measurement */
 efi_status_t efi_tcg2_do_initial_measurement(void);
 /* measure the pe-coff image, extend PCR and add Event Log */
diff --git a/include/efi_riscv.h b/include/efi_riscv.h
new file mode 100644
index 00..4bd39c4366
--- /dev/null
+++ b/include/efi_riscv.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * RISCV_EFI_BOOT_PROTOCOL
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc
+ */
+
+#include 
+
+#define RISCV_EFI_BOOT_PROTOCOL_REVISION 0x0001
+
+/**
+ * struct riscv_efi_boot_protocol - RISCV_EFI_BOOT_PROTOCOL
+ * @revision:  Version of the protocol implemented
+ * @get_boot_hartid:   Get the boot hart ID
+ */
+struct riscv_efi_boot_protocol {
+   u64 revision;
+
+   efi_status_t (EFIAPI * get_boot_hartid) (struct riscv_efi_boot_protocol 
*this,
+efi_uintn_t *boot_hartid);
+};
+
+extern struct riscv_efi_boot_protocol riscv_efi_boot_prot;
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 24f9a2bb75..716436e1d3 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -369,4 +369,12 @@ config EFI_ESRT
help
  Enabling this option creates the ESRT UEFI system table.
 
+config EFI_RISCV_BOOT_PROTOCOL
+   bool "RISCV_EFI_BOOT_PROTOCOL support"
+   default y
+   depends on RISCV
+   help
+ Provide a RISCV_EFI_BOOT_PROTOCOL implementation on RISC-V
+ platforms.
+
 endif
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index fd344cea29..b2c664d108 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -62,6 +62,7 @@ obj-$(CONFIG_GENERATE_ACPI_TABLE) += efi_acpi.o
 obj-$(CONFIG_GENERATE_SMBIOS_TABLE) += efi_smbios.o
 obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_rng.o
 obj-$(CONFIG_EFI_TCG2_PROTOCOL) += efi_tcg2.o
+obj-$(CONFIG_EFI_RISCV_BOOT_PROTOCOL) += efi_riscv.o
 obj-$(CONFIG_EFI_LOAD_FILE2_INITRD) += efi_load_initrd.o
 obj-$(CONFIG_EFI_SIGNATURE_SUPPORT) += efi_signature.o
 
diff --git a/lib/efi_loader/efi_riscv.c b/lib/efi_loader/efi_riscv.c
new file mode 100644
index 00..bccfefd8fb
--- /dev/null
+++ b/lib/efi_loader/efi_riscv.c
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Defines APIs that allow an OS to interact with UEFI firmware to query
+ * information about the boot hart ID.
+ *
+ * Copyright (c) 2022, Ventana Micro Systems Inc
+ */
+
+#define LOG_CATEGORY LOGC_EFI
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const efi_guid_t efi_guid_riscv_boot_protocol = 
RISCV_EFI_BOOT_PROTOCOL_GUID;
+
+/**
+ * efi_riscv_get_boot_hartid() - return boot hart ID
+ * @this:  RISCV_EFI_BOOT_PROTOCOL instance
+ * @boot_hartid:   caller allocated memory to return boot hart id
+ * Return: status code
+ */
+static efi_status_t EFIAPI
+efi_riscv_get_boot_hartid(struct riscv_efi_boot_protocol *this,
+ efi_uintn_t *boot_hartid)
+{
+   EFI_ENTRY("%p, %p",  this, boot_hartid);
+
+   if (this != &riscv_efi_boot_prot || !boot_hartid)
+   return EFI_INVALID_PARAMETER;
+
+   *boot_hartid = gd->arch.boot_hart;
+
+   return EFI_EXIT(EFI_SUCCESS);
+}
+
+str

[RFC PATCH V2 2/2] efi_selftest: unit test for RISCV_EFI_BOOT_PROTOCOL

[Sunil V L]

Add a test for the RISCV_EFI_BOOT_PROTOCOL.

Signed-off-by: Sunil V L 
---
 lib/efi_selftest/Makefile |   1 +
 lib/efi_selftest/efi_selftest_riscv.c | 119 ++
 2 files changed, 120 insertions(+)
 create mode 100644 lib/efi_selftest/efi_selftest_riscv.c

diff --git a/lib/efi_selftest/Makefile b/lib/efi_selftest/Makefile
index 9ff6e1760c..0b05f8a591 100644
--- a/lib/efi_selftest/Makefile
+++ b/lib/efi_selftest/Makefile
@@ -64,6 +64,7 @@ obj-$(CONFIG_EFI_LOADER_HII) += efi_selftest_hii.o
 obj-$(CONFIG_EFI_RNG_PROTOCOL) += efi_selftest_rng.o
 obj-$(CONFIG_EFI_GET_TIME) += efi_selftest_rtc.o
 obj-$(CONFIG_EFI_TCG2_PROTOCOL) += efi_selftest_tcg2.o
+obj-$(CONFIG_EFI_RISCV_BOOT_PROTOCOL) += efi_selftest_riscv.o
 
 ifeq ($(CONFIG_GENERATE_ACPI_TABLE),)
 obj-y += efi_selftest_fdt.o
diff --git a/lib/efi_selftest/efi_selftest_riscv.c 
b/lib/efi_selftest/efi_selftest_riscv.c
new file mode 100644
index 00..9d2182e61f
--- /dev/null
+++ b/lib/efi_selftest/efi_selftest_riscv.c
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * efi_selftest_riscv
+ *
+ * Copyright (c) 2022 Ventana Micro Systems Inc
+ *
+ * Test the RISCV_EFI_BOOT_PROTOCOL.
+ *
+ * The following services are tested:
+ * get_boot_hartid
+ */
+
+#include 
+#include 
+#include 
+
+static const struct efi_system_table *systemtab;
+static const struct efi_boot_services *boottime;
+static const char *fdt;
+static const efi_guid_t riscv_efi_boot_protocol_guid = 
RISCV_EFI_BOOT_PROTOCOL_GUID;
+static const efi_guid_t fdt_guid = EFI_FDT_GUID;
+
+/**
+ * efi_st_get_config_table() - get configuration table
+ *
+ * @guid:  GUID of the configuration table
+ * Return: pointer to configuration table or NULL
+ */
+static void *efi_st_get_config_table(const efi_guid_t *guid)
+{
+   size_t i;
+
+   for (i = 0; i < systab.nr_tables; i++) {
+   if (!guidcmp(guid, &systemtab->tables[i].guid))
+   return systemtab->tables[i].table;
+   }
+   return NULL;
+}
+
+/*
+ * Setup unit test.
+ *
+ * @handle:handle of the loaded image
+ * @systable:  system table
+ * @return:EFI_ST_SUCCESS for success
+ */
+static int setup(const efi_handle_t img_handle,
+const struct efi_system_table *systable)
+{
+   systemtab = systable;
+   boottime = systable->boottime;
+
+   fdt = efi_st_get_config_table(&fdt_guid);
+
+   if (!fdt) {
+   efi_st_error("Missing device tree\n");
+   return EFI_ST_FAILURE;
+   }
+   return EFI_ST_SUCCESS;
+}
+
+/*
+ * Execute unit test.
+ *
+ * @return:EFI_ST_SUCCESS for success
+ */
+static int execute(void)
+{
+   efi_status_t ret;
+   struct riscv_efi_boot_protocol *prot;
+   efi_uintn_t efi_hartid, fdt_hartid;
+   int chosen_node, len;
+   const fdt32_t *prop;
+
+   /* Get riscv boot protocol */
+   ret = boottime->locate_protocol(&riscv_efi_boot_protocol_guid, NULL,
+   (void **)&prot);
+   if (ret != EFI_SUCCESS) {
+   efi_st_error("RISC-V Boot Protocol not available\n");
+   return EFI_ST_FAILURE;
+   }
+
+   /* Get Boot Hart ID from EFI protocol */
+   ret = prot->get_boot_hartid(prot, &efi_hartid);
+   if (ret != EFI_SUCCESS) {
+   efi_st_error("Could not retrieve boot hart ID\n");
+   return EFI_ST_FAILURE;
+   }
+
+   /* Get Boot Hart ID from FDT */
+   chosen_node = fdt_path_offset(fdt, "/chosen");
+   if (chosen_node < 0) {
+   efi_st_error("/chosen node not found\n");
+   return EFI_ST_FAILURE;
+   }
+
+   prop = fdt_getprop((void *)fdt, chosen_node, "boot-hartid", &len);
+   if (!prop || len != sizeof(u32)) {
+   efi_st_error("boot-hartid not found\n");
+   return EFI_ST_FAILURE;
+   }
+
+   fdt_hartid = fdt32_to_cpu(*prop);
+
+   /* Boot Hart ID should be same */
+   if (efi_hartid != fdt_hartid) {
+   efi_st_error("boot-hartid is not same in EFI and FDT\n");
+   return EFI_ST_FAILURE;
+   }
+
+   return EFI_ST_SUCCESS;
+}
+
+EFI_UNIT_TEST(riscv) = {
+   .name = "riscv",
+   .phase = EFI_EXECUTE_BEFORE_BOOTTIME_EXIT,
+   .setup = setup,
+   .execute = execute,
+};
-- 
2.25.1

Re: [PATCH 1/1] efi_loader: use EFI_EXIT in efi_riscv_get_boot_hartid

[Sunil V L]

On Wed, Jan 11, 2023 at 07:13:01PM +0100, Heinrich Schuchardt wrote:
> After calling EFI_ENTRY we have to call EFI_EXIT before returning.
> 
> Add a missing EFI_EXIT().
> 
> Fixes: 1ccf87165e38 ("efi_loader: Enable RISCV_EFI_BOOT_PROTOCOL support")
> Reported-by: Dave Jones 
> Signed-off-by: Heinrich Schuchardt 
> ---
>  lib/efi_loader/efi_riscv.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/lib/efi_loader/efi_riscv.c b/lib/efi_loader/efi_riscv.c
> index bccfefd8fb..064172755b 100644
> --- a/lib/efi_loader/efi_riscv.c
> +++ b/lib/efi_loader/efi_riscv.c
> @@ -31,7 +31,7 @@ efi_riscv_get_boot_hartid(struct riscv_efi_boot_protocol 
> *this,
>   EFI_ENTRY("%p, %p",  this, boot_hartid);
>  
>   if (this != &riscv_efi_boot_prot || !boot_hartid)
> - return EFI_INVALID_PARAMETER;
> + return EFI_EXIT(EFI_INVALID_PARAMETER);
>  
>   *boot_hartid = gd->arch.boot_hart;
>  

Reviewed-by: Sunil V L 

> -- 
> 2.37.2
> 

[U-Boot] TFTP Issue

[T K, Sunil Kumar]

Hi All,

When I start for TFTP I see below shown messages on my screen though I had set 
serverip properly. Can anyone please comment on the issue.

=

Retry count exceeded; starting again
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5

=


Thanks in advance!

Best Regards,
Sunil

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Re: [U-Boot] TFTP Issue

[T K, Sunil Kumar]

I use 

tftpboot  

Can you please let me know what are the other options and their syntax for 
loading a image?


-Original Message-
From: sywang [mailto:syw...@dongniannetworks.com] 
Sent: Friday, December 17, 2010 11:51 AM
To: T K, Sunil Kumar; u-boot@lists.denx.de
Subject: RE: [U-Boot] TFTP Issue


Do you have bootp or DHCP server? 


-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On
Behalf Of T K, Sunil Kumar
Sent: 2010年12月17日 14:14
To: 'u-boot@lists.denx.de'
Subject: [U-Boot] TFTP Issue

Hi All,

When I start for TFTP I see below shown messages on my screen though I had
set serverip properly. Can anyone please comment on the issue.

=

Retry count exceeded; starting again
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5

=


Thanks in advance!

Best Regards,
Sunil


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Re: [U-Boot] TFTP Issue

[T K, Sunil Kumar]

Hi All,



Can you please provide pointers to resolve this issue?



==



CCWMX51 # nfs 0x9400 10.80.1.126:u-boot.bin

Using FEC0 device

File transfer via NFS from server 10.80.1.126; our IP address is 192.168.42.30

Filename 'u-boot.bin/-u-boot.bin'.

Load address: 0x9400

Loading: ## Warning: gatewayip needed but not set

## Warning: gatewayip needed but not set

## Warning: gatewayip needed but not set

## Warning: gatewayip needed but not set



==



Even after setting the gatewayip I could see the error messages as shown below:





==



CCWMX51 # nfs 0x9400 10.80.1.126:u-boot.bin

Using FEC0 device

File transfer via NFS from server 10.80.1.126; our IP address is 192.168.42.30;

sending through gateway 10.80.1.1

Filename 'u-boot.bin/-u-boot.bin'.

Load address: 0x9400

Loading: *

ARP Retry count exceeded; starting again

Using FEC0 device

File transfer via NFS from server 10.80.1.126; our IP address is 192.168.42.30;

sending through gateway 10.80.1.1

Filename 'u-boot.bin/-u-boot.bin'.

Load address: 0x9400

Loading: *

ARP Retry count exceeded; starting again



==





Regards,

Sunil
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Re: [U-Boot] TFTP Issue

[T K, Sunil Kumar]

If you IP address is 192.168.42.30, then the gateway should have an
IP address in _your_ network, i. e. something starting 192.168.xx.xx

--> Yes. I agree with you.
Whatever gateway IP I have mentioned it is of server's gateway IP (In this case 
server is my PC. So I have given my PC gateway IP.) But earlier it was " 
gatewayip=0.0.0.0" and was working fine also.
Can't we go ahead without gatewayip?


Regards,
Sunil

-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de] 
Sent: Friday, December 17, 2010 3:49 PM
To: T K, Sunil Kumar
Cc: 'sywang'; 'u-boot@lists.denx.de'
Subject: Re: [U-Boot] TFTP Issue

Dear "T K, Sunil Kumar",

In message <674d2c24c8992f46817bbbf3ecae914f4ebf871...@blr-sms-exch01.digi.com> 
you wrote:
>
> ## Warning: gatewayip needed but not set

OK, this is a pretty clear message.

> Even after setting the gatewayip I could see the error messages as shown be=
> low:
...
> CCWMX51 # nfs 0x9400 10.80.1.126:u-boot.bin
...
> File transfer via NFS from server 10.80.1.126; our IP address is 
> 192.168.42.30;
> sending through gateway 10.80.1.1

If you IP address is 192.168.42.30, then the gateway should have an
IP address in _your_ network, i. e. something starting 192.168.xx.xx

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Q: Why do PCs have a reset button on the front?
A: Because they are expected to run Microsoft operating systems.
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Re: [U-Boot] TFTP Issue

[T K, Sunil Kumar]

Hi,

I downloaded freescale Android2.2 package for my IMX51 board. According to the 
instructions provided in the manual i loaded u-boot onto my device. But after 
this activity, its strange to see that my device is not getting started with 
the newly loaded u-boot of Freescale's Android2.2.

Can you please comment on this issue?

Here are the extracted logs:

===

CCWMX51 # printenv_dynamic

console=console=ttymxc1,38400

ebootaddr=0x9080

eimg=eboot-CCXMX51

ip=ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:ccwmx51js:eth0ff

loadaddr=0x9080

loadaddr_initrd=0x9060

kimg=uImage-ccwmx51js

npath=/exports/nfsroot-ccwmx51js

linuxloadaddr=0x9080

loadbootsc=yes

bootscript=ccwmx51js-bootscript

mmc_rpart=/dev/mmcblk0p2

netosloadaddr=CONFIG_NETOS_LOAD_ADDR

rimg=rootfs-ccwmx51js-128.jffs2

rootdelay=10

smtd=

snfs=root=nfs nfsroot=${serverip}:

std_bootarg=

uimg=u-boot-ccwmx51js.bin

usrimg=userfs-ccwmx51js-128.jffs2

wceloadaddr=0x9020

wimg=wce-CCXMX51

wzimg=wcez-CCXMX51

 

CCWMX51 # setenv uimg u-boot.bin

CCWMX51 # setenv serverip 10.80.1.126

CCWMX51 # saveenv

Saving Environment to Digi NVRAM...

Writing Parameters to NVRAM

CCWMX51 # update uboot

Partition marked read-only / fixed. Do you want to continue?(y/n)y

autoload was

BOOTP broadcast 1

DHCP client bound to address 10.80.1.116

Using FEC0 device

TFTP from server 10.80.1.126; our IP address is 10.80.1.116

Filename 'u-boot.bin'.

Load address: 0x9080

Loading: ###

done

Bytes transferred = 160248 (271f8 hex)

Calculated checksum = 0x8f75b383

Do you really want to overwrite U-Boot flash partition(y/n)y

Erasing:   complete

Writing:   complete

Verifying: complete

Reboot system so update takes effect

Update successful

CCWMX51 #

 

====


Regards,
Sunil
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