[U-Boot] [PATCH] ppc4xx: 460SX Eegier board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Adding Eiger board support for 460SX SoC.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 MAINTAINERS|4 +
 board/amcc/eiger/Makefile  |   48 +++
 board/amcc/eiger/config.mk |   30 +++
 board/amcc/eiger/eiger.c   |   91 +
 board/amcc/eiger/init.S|   67 +++
 boards.cfg |1 +
 include/configs/eiger.h|  192 
 7 files changed, 433 insertions(+), 0 deletions(-)
 create mode 100644 board/amcc/eiger/Makefile
 create mode 100644 board/amcc/eiger/config.mk
 create mode 100644 board/amcc/eiger/eiger.c
 create mode 100644 board/amcc/eiger/init.S
 create mode 100644 include/configs/eiger.h

diff --git a/MAINTAINERS b/MAINTAINERS
index f47fca5..9012092 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -310,6 +310,10 @@ Tirumala Marri tma...@apm.com
 
bluestone   APM821XX
 
+Tirumala Marri tma...@apm.com
+
+   eiger   460SX
+
 Reinhard Meyer r.me...@emk-elektronik.de
 
TOP860  MPC860T
diff --git a/board/amcc/eiger/Makefile b/board/amcc/eiger/Makefile
new file mode 100644
index 000..a381de0
--- /dev/null
+++ b/board/amcc/eiger/Makefile
@@ -0,0 +1,48 @@
+# Adding Makefile for Eiger board
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Authors: Tirumala R Marri tma...@apm.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  = $(BOARD).o
+SOBJS  = init.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak .depend *~
+
+#
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+
diff --git a/board/amcc/eiger/config.mk b/board/amcc/eiger/config.mk
new file mode 100644
index 000..aa6cbda
--- /dev/null
+++ b/board/amcc/eiger/config.mk
@@ -0,0 +1,30 @@
+# Adding config.mk for Eiger board
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Authors: Tirumala R Marri tma...@apm.com
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_CPPFLAGS += -DCONFIG_440=1
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
+
+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCONFIG_SYS_INIT_DBCR=0x8cff
+endif
diff --git a/board/amcc/eiger/eiger.c b/board/amcc/eiger/eiger.c
new file mode 100644
index 000..d5b569d
--- /dev/null
+++ b/board/amcc/eiger/eiger.c
@@ -0,0 +1,91 @@
+/*
+ * Adding board support for Eiger board
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple 

[U-Boot] [PATCH v6 0/2] Add support for new SoC APM821XX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V5:
  * Move CONFIG_SYS_PERIPHERAL_BASE  to apm821xx.h
  * MAKEALL change is not needed anymore
  * CONFIG_SYS_NOR_CS is not used anywhere.
  * CONFIG_PHY_RESET_R is not used anywhere
V6:
  * Correcting indentation.

Tirumala Marri (2):
  APM821xx: Add CPU support
  APM821xx: Add bluestone board support

 MAINTAINERS |4 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 ++-
 arch/powerpc/include/asm/apm821xx.h |   72 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 +
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 +
 board/amcc/bluestone/bluestone.c|  111 +++
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   60 +++
 boards.cfg  |1 +
 include/configs/bluestone.h |  178 +++
 18 files changed, 648 insertions(+), 19 deletions(-)
 create mode 100644 arch/powerpc/include/asm/apm821xx.h
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [PATCH v6 1/2] APM821xx: Add CPU support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V5:
  * Move CONFIG_SYS_PERIPHERAL_BASE  to apm821xx.h
V6:
  * Correcting indentation.
---
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +++--
 arch/powerpc/include/asm/apm821xx.h |   72 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +++---
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 ++
 arch/powerpc/include/asm/processor.h|1 +
 11 files changed, 202 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 6009b0c..67f1fff 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -250,6 +250,20 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM821XX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -590,6 +604,11 @@ int checkcpu (void)
strcpy(addstr, No Security support);
break;
 
+   case PVR_APM821XX_RA:
+   puts(APM821XX Rev. A);
+   strcpy(addstr, Security support);
+   break;
+
case PVR_VIRTEX5:
puts(440x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d54b30e..125241b 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -237,7 +237,8 @@ cpu_init_f (void)
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if !defined(CONFIG_APM821XX)  (defined(CONFIG_405EP) ||\
+   defined (CONFIG_405EX))  !defined(CONFIG_SYS_4xx_GPIO_TABLE)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -393,7 +394,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index abd4e91..09d6671 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -189,7 +189,7 @@ ulong get_PCI_freq (void)
 #elif defined(CONFIG_440)
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
 static u8 pll_fwdv_multi_bits[] = {
/* values for:  1 - 16 */
0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c,
@@ -250,6 +250,78 @@ u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv)
return 0;
 }
 
+#if defined(CONFIG_APM821XX)
+
+void get_sys_info(sys_info_t *sysInfo)
+{
+   unsigned long plld;
+   unsigned long temp;
+   unsigned long mul;
+   unsigned long cpudv;
+   unsigned long plb2dv;
+   unsigned long ddr2dv;
+
+   /* Calculate Forward divisor A and Feeback divisor */
+   mfcpr(CPR0_PLLD, plld);
+
+   temp = CPR0_PLLD_FWDVA(plld);
+   sysInfo-pllFwdDivA = get_cpr0_fwdv(temp);
+
+   temp = CPR0_PLLD_FDV(plld);
+   sysInfo-pllFbkDiv = get_cpr0_fbdv(temp);
+
+   /* Calculate OPB clock divisor */
+   mfcpr(CPR0_OPBD, temp);
+   temp = CPR0_OPBD_OPBDV(temp);
+   sysInfo-pllOpbDiv = temp ? temp : 4;
+
+   /* Calculate Peripheral clock divisor */
+   mfcpr(CPR0_PERD, temp);
+   temp = CPR0_PERD_PERDV(temp);
+   sysInfo-pllExtBusDiv = temp ? temp : 4;
+
+   /* Calculate CPU clock divisor */
+   mfcpr(CPR0_CPUD, temp);
+   temp = CPR0_CPUD_CPUDV(temp);
+   cpudv = temp ? temp : 8;
+
+   /* Calculate PLB2 clock divisor */
+   mfcpr(CPR0_PLB2D, temp);
+   temp = CPR0_PLB2D_PLB2DV(temp);
+   plb2dv = temp ? temp : 4;
+
+   /* Calculate DDR2 clock divisor */
+   mfcpr(CPR0_DDR2D, temp);
+   temp = 

[U-Boot] [PATCH v6 2/2] APM821xx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V5:
  * MAKEALL change is not needed anymore
  * CONFIG_SYS_NOR_CS is not used anywhere.
  * CONFIG_PHY_RESET_R is not used anywhere
V6:
  * Correcting indentation.
---
---
 MAINTAINERS  |4 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  111 +++
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   60 +
 boards.cfg   |1 +
 include/configs/bluestone.h  |  178 ++
 7 files changed, 446 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 0c6ce2b..e20055f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -500,6 +500,10 @@ Detlev Zundel d...@denx.de
 
inka4x0 MPC5200
 
+Tirumala Marri tma...@apm.com
+
+   bluestone   APM821XX
+
 -
 
 Unknown / orphaned boards:
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..fe8929c
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/apm821xx.h
+#include libfdt.h
+#include fdt_support.h
+#include i2c.h
+#include asm/processor.h
+#include asm/io.h
+#include asm/mmu.h
+#include asm/ppc4xx-gpio.h
+
+int board_early_init_f(void)
+{
+   /*
+* Setup the interrupt controller polarities, triggers, etc.
+*/
+   mtdcr(UIC0SR, 0x);  /* clear all */
+   mtdcr(UIC0ER, 0x);  /* disable all */
+   mtdcr(UIC0CR, 0x0005);  /* ATI  UIC1 crit are critical */
+   mtdcr(UIC0PR, 0x);  /* per ref-board manual */
+   mtdcr(UIC0TR, 0x);  /* per ref-board manual */
+   mtdcr(UIC0VR, 0x);  /* int31 highest, base=0x000 */
+   mtdcr(UIC0SR, 0x);  /* clear all */
+
+   mtdcr(UIC1SR, 0x);  /* clear all */
+   mtdcr(UIC1ER, 0x);  /* disable all 

[U-Boot] [PATCH v7 0/2] Add support for new SoC APM821XX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V6:
  * Correcting indentation.
V7:
  * Ordering defined(APM821XX) in cpu_init.c.
  * Correcting Typo Bloustone to Bluestone.

Tirumala Marri (2):
  APM821xx: Add CPU support
  APM821xx: Add bluestone board support

 MAINTAINERS |4 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 ++-
 arch/powerpc/include/asm/apm821xx.h |   72 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 +
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 +
 board/amcc/bluestone/bluestone.c|  111 +++
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   60 +++
 boards.cfg  |1 +
 include/configs/bluestone.h |  178 +++
 18 files changed, 648 insertions(+), 19 deletions(-)
 create mode 100644 arch/powerpc/include/asm/apm821xx.h
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [PATCH v7 1/2] APM821xx: Add CPU support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V6:
  * Correcting indentation.
V7:
  * Ordering defined(APM821XX) in cpu_init.c .
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +++--
 arch/powerpc/include/asm/apm821xx.h |   72 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +++---
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 ++
 arch/powerpc/include/asm/processor.h|1 +
 11 files changed, 202 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 6009b0c..67f1fff 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -250,6 +250,20 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM821XX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -590,6 +604,11 @@ int checkcpu (void)
strcpy(addstr, No Security support);
break;
 
+   case PVR_APM821XX_RA:
+   puts(APM821XX Rev. A);
+   strcpy(addstr, Security support);
+   break;
+
case PVR_VIRTEX5:
puts(440x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d54b30e..2a727b1 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -237,7 +237,8 @@ cpu_init_f (void)
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  \
+!defined(CONFIG_APM821XX) !defined(CONFIG_SYS_4xx_GPIO_TABLE)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -393,7 +394,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index abd4e91..09d6671 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -189,7 +189,7 @@ ulong get_PCI_freq (void)
 #elif defined(CONFIG_440)
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
 static u8 pll_fwdv_multi_bits[] = {
/* values for:  1 - 16 */
0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c,
@@ -250,6 +250,78 @@ u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv)
return 0;
 }
 
+#if defined(CONFIG_APM821XX)
+
+void get_sys_info(sys_info_t *sysInfo)
+{
+   unsigned long plld;
+   unsigned long temp;
+   unsigned long mul;
+   unsigned long cpudv;
+   unsigned long plb2dv;
+   unsigned long ddr2dv;
+
+   /* Calculate Forward divisor A and Feeback divisor */
+   mfcpr(CPR0_PLLD, plld);
+
+   temp = CPR0_PLLD_FWDVA(plld);
+   sysInfo-pllFwdDivA = get_cpr0_fwdv(temp);
+
+   temp = CPR0_PLLD_FDV(plld);
+   sysInfo-pllFbkDiv = get_cpr0_fbdv(temp);
+
+   /* Calculate OPB clock divisor */
+   mfcpr(CPR0_OPBD, temp);
+   temp = CPR0_OPBD_OPBDV(temp);
+   sysInfo-pllOpbDiv = temp ? temp : 4;
+
+   /* Calculate Peripheral clock divisor */
+   mfcpr(CPR0_PERD, temp);
+   temp = CPR0_PERD_PERDV(temp);
+   sysInfo-pllExtBusDiv = temp ? temp : 4;
+
+   /* Calculate CPU clock divisor */
+   mfcpr(CPR0_CPUD, temp);
+   temp = CPR0_CPUD_CPUDV(temp);
+   cpudv = temp ? temp : 8;
+
+   /* Calculate PLB2 clock divisor */
+   mfcpr(CPR0_PLB2D, temp);
+   temp = CPR0_PLB2D_PLB2DV(temp);
+   plb2dv = temp ? temp : 4;
+
+   /* Calculate DDR2 clock divisor */
+   mfcpr(CPR0_DDR2D, temp);
+   temp = CPR0_DDR2D_DDR2DV(temp);
+   

[U-Boot] [PATCH v7 2/2] APM821xx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V6:
  * Correcting indentation.
V7:
  * Correcting Typo Bloustone to Bluestone.
---
 MAINTAINERS  |4 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  111 +++
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   60 +
 boards.cfg   |1 +
 include/configs/bluestone.h  |  178 ++
 7 files changed, 446 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 0c6ce2b..e20055f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -500,6 +500,10 @@ Detlev Zundel d...@denx.de
 
inka4x0 MPC5200
 
+Tirumala Marri tma...@apm.com
+
+   bluestone   APM821XX
+
 -
 
 Unknown / orphaned boards:
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..fe8929c
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/apm821xx.h
+#include libfdt.h
+#include fdt_support.h
+#include i2c.h
+#include asm/processor.h
+#include asm/io.h
+#include asm/mmu.h
+#include asm/ppc4xx-gpio.h
+
+int board_early_init_f(void)
+{
+   /*
+* Setup the interrupt controller polarities, triggers, etc.
+*/
+   mtdcr(UIC0SR, 0x);  /* clear all */
+   mtdcr(UIC0ER, 0x);  /* disable all */
+   mtdcr(UIC0CR, 0x0005);  /* ATI  UIC1 crit are critical */
+   mtdcr(UIC0PR, 0x);  /* per ref-board manual */
+   mtdcr(UIC0TR, 0x);  /* per ref-board manual */
+   mtdcr(UIC0VR, 0x);  /* int31 highest, base=0x000 */
+   mtdcr(UIC0SR, 0x);  /* clear all */
+
+   mtdcr(UIC1SR, 0x);  /* clear all */
+   mtdcr(UIC1ER, 0x);  /* disable all */
+   mtdcr(UIC1CR, 0x);  /* all non-critical */
+   mtdcr(UIC1PR, 

[U-Boot] [PATCH v5 0/2] Add support for new SoC APM821XX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V4:
  * Rebasing with Stefan Roese tree
V5:
  * Move CONFIG_SYS_PERIPHERAL_BASE  to apm821xx.h
  * MAKEALL change is not needed anymore
  * CONFIG_SYS_NOR_CS is not used anywhere.
  * CONFIG_PHY_RESET_R is not used anywhere

Tirumala Marri (2):
  APM821xx: Add CPU support
  APM821xx: Add bluestone board support

 MAINTAINERS |4 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 ++-
 arch/powerpc/include/asm/apm821xx.h |   70 
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 +
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 +
 board/amcc/bluestone/bluestone.c|  111 +++
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   60 +++
 boards.cfg  |1 +
 include/configs/bluestone.h |  178 +++
 18 files changed, 646 insertions(+), 19 deletions(-)
 create mode 100644 arch/powerpc/include/asm/apm821xx.h
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/configs/bluestone.h

___
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[U-Boot] [PATCH v5 1/2] APM821xx: Add CPU support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V4:
  * Rebase with Stefan Roese tree
V5:
  * Move CONFIG_SYS_PERIPHERAL_BASE  to apm821xx.h
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +++--
 arch/powerpc/include/asm/apm821xx.h |   70 
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +++---
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 ++
 arch/powerpc/include/asm/processor.h|1 +
 11 files changed, 200 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 6009b0c..f3bdf18 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -250,6 +250,20 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM821XX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -590,6 +604,11 @@ int checkcpu (void)
strcpy(addstr, No Security support);
break;
 
+   case PVR_APM821XX_RA:
+   puts(APM821XX Rev. A);
+   strcpy(addstr, Security support);
+   break;
+
case PVR_VIRTEX5:
puts(440x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d54b30e..125241b 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -237,7 +237,8 @@ cpu_init_f (void)
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if !defined(CONFIG_APM821XX)  (defined(CONFIG_405EP) ||\
+   defined (CONFIG_405EX))  !defined(CONFIG_SYS_4xx_GPIO_TABLE)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -393,7 +394,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index abd4e91..09d6671 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -189,7 +189,7 @@ ulong get_PCI_freq (void)
 #elif defined(CONFIG_440)
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
 static u8 pll_fwdv_multi_bits[] = {
/* values for:  1 - 16 */
0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c,
@@ -250,6 +250,78 @@ u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv)
return 0;
 }
 
+#if defined(CONFIG_APM821XX)
+
+void get_sys_info(sys_info_t *sysInfo)
+{
+   unsigned long plld;
+   unsigned long temp;
+   unsigned long mul;
+   unsigned long cpudv;
+   unsigned long plb2dv;
+   unsigned long ddr2dv;
+
+   /* Calculate Forward divisor A and Feeback divisor */
+   mfcpr(CPR0_PLLD, plld);
+
+   temp = CPR0_PLLD_FWDVA(plld);
+   sysInfo-pllFwdDivA = get_cpr0_fwdv(temp);
+
+   temp = CPR0_PLLD_FDV(plld);
+   sysInfo-pllFbkDiv = get_cpr0_fbdv(temp);
+
+   /* Calculate OPB clock divisor */
+   mfcpr(CPR0_OPBD, temp);
+   temp = CPR0_OPBD_OPBDV(temp);
+   sysInfo-pllOpbDiv = temp ? temp : 4;
+
+   /* Calculate Peripheral clock divisor */
+   mfcpr(CPR0_PERD, temp);
+   temp = CPR0_PERD_PERDV(temp);
+   sysInfo-pllExtBusDiv = temp ? temp : 4;
+
+   /* Calculate CPU clock divisor */
+   mfcpr(CPR0_CPUD, temp);
+   temp = CPR0_CPUD_CPUDV(temp);
+   cpudv = temp ? temp : 8;
+
+   /* Calculate PLB2 clock divisor */
+   mfcpr(CPR0_PLB2D, temp);
+   temp = CPR0_PLB2D_PLB2DV(temp);
+   plb2dv = temp ? temp : 4;
+
+   /* Calculate DDR2 clock divisor */
+   mfcpr(CPR0_DDR2D, temp);
+   temp = 

[U-Boot] [PATCH v5 2/2] APM821xx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V4:
  * Rebasing with Stefan Roese tree
V5:
  * MAKEALL change is not needed anymore
  * CONFIG_SYS_NOR_CS is not used anywhere.
  * CONFIG_PHY_RESET_R is not used anywhere
---
 MAINTAINERS  |4 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  111 +++
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   60 +
 boards.cfg   |1 +
 include/configs/bluestone.h  |  178 ++
 7 files changed, 446 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 0c6ce2b..e20055f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -500,6 +500,10 @@ Detlev Zundel d...@denx.de
 
inka4x0 MPC5200
 
+Tirumala Marri tma...@apm.com
+
+   bluestone   APM821XX
+
 -
 
 Unknown / orphaned boards:
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..fe8929c
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/apm821xx.h
+#include libfdt.h
+#include fdt_support.h
+#include i2c.h
+#include asm/processor.h
+#include asm/io.h
+#include asm/mmu.h
+#include asm/ppc4xx-gpio.h
+
+int board_early_init_f(void)
+{
+   /*
+* Setup the interrupt controller polarities, triggers, etc.
+*/
+   mtdcr(UIC0SR, 0x);  /* clear all */
+   mtdcr(UIC0ER, 0x);  /* disable all */
+   mtdcr(UIC0CR, 0x0005);  /* ATI  UIC1 crit are critical */
+   mtdcr(UIC0PR, 0x);  /* per ref-board manual */
+   mtdcr(UIC0TR, 0x);  /* per ref-board manual */
+   mtdcr(UIC0VR, 0x);  /* int31 highest, base=0x000 */
+   mtdcr(UIC0SR, 0x);  /* clear all */
+
+   mtdcr(UIC1SR, 0x);  /* clear all */
+   mtdcr(UIC1ER, 0x);  /* disable 

[U-Boot] [PATCH v4 0/2] Add support for new SoC APM821XX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V3:
  * Missing TLB entry for CONFIG_SYS_BOOT_BASE_ADDR.
  * Move CONFIG_SYS_EBC_PB0AP etc to EBC area in the config file.
  * remove unused CONFIG_RTL8211CL_PHY.
  * Replace hard coded valued for CONFIG_SYS_EBC_CFG with
macro definitions.
  * Change APM82XXX to APM821XX
  * Modify the way cpu id is printed.
  * Correct inadvertent change.
  * Sort define list.
  * Remove comment for get_sys_info().
  * Define a symbolic constat CONFIG_SYS_OCM_SIZE.
  * Create apm821xx.h instead of using ppc440.h
  * board.cfg add the entry in sorted. 
  * use puts() if there is no formating needed.
  * Correct multiline comment.
V4:
  * Rebasing with Stefan Roese tree

Tirumala Marri (2):
  APM821xx: Add CPU support
  APM821xx: Add bluestone board support

 MAINTAINERS |4 +
 MAKEALL |1 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 ++-
 arch/powerpc/include/asm/apm821xx.h |   69 
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 +
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 +
 board/amcc/bluestone/bluestone.c|  111 +++
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   59 ++
 boards.cfg  |1 +
 include/configs/bluestone.h |  176 +++
 19 files changed, 643 insertions(+), 19 deletions(-)
 create mode 100644 arch/powerpc/include/asm/apm821xx.h
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [PATCH v4 1/2] APM821xx: Add CPU support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V3:  
  * Change APM82XXX to APM821XX
  * Modify the way cpu id is printed.
  * Correct inadvertent change.
  * Sort define list.
  * Remove comment for get_sys_info().
  * Define a symbolic constat ISRAM1_OCM_SIZE.
  * Create apm821xx.h instead of using ppc440.h
  * Correct multiline comment.
V4:
  * Rebase with Stefan Roese tree
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   19 
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   75 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +++--
 arch/powerpc/include/asm/apm821xx.h |   69 
 arch/powerpc/include/asm/ppc4xx-ebc.h   |3 +-
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +++---
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/ppc4xx.h   |4 ++
 arch/powerpc/include/asm/processor.h|1 +
 11 files changed, 199 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 6009b0c..f3bdf18 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -250,6 +250,20 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM821XX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -590,6 +604,11 @@ int checkcpu (void)
strcpy(addstr, No Security support);
break;
 
+   case PVR_APM821XX_RA:
+   puts(APM821XX Rev. A);
+   strcpy(addstr, Security support);
+   break;
+
case PVR_VIRTEX5:
puts(440x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index d54b30e..125241b 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -237,7 +237,8 @@ cpu_init_f (void)
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if !defined(CONFIG_APM821XX)  (defined(CONFIG_405EP) ||\
+   defined (CONFIG_405EX))  !defined(CONFIG_SYS_4xx_GPIO_TABLE)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -393,7 +394,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index abd4e91..09d6671 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -189,7 +189,7 @@ ulong get_PCI_freq (void)
 #elif defined(CONFIG_440)
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
 static u8 pll_fwdv_multi_bits[] = {
/* values for:  1 - 16 */
0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c,
@@ -250,6 +250,78 @@ u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv)
return 0;
 }
 
+#if defined(CONFIG_APM821XX)
+
+void get_sys_info(sys_info_t *sysInfo)
+{
+   unsigned long plld;
+   unsigned long temp;
+   unsigned long mul;
+   unsigned long cpudv;
+   unsigned long plb2dv;
+   unsigned long ddr2dv;
+
+   /* Calculate Forward divisor A and Feeback divisor */
+   mfcpr(CPR0_PLLD, plld);
+
+   temp = CPR0_PLLD_FWDVA(plld);
+   sysInfo-pllFwdDivA = get_cpr0_fwdv(temp);
+
+   temp = CPR0_PLLD_FDV(plld);
+   sysInfo-pllFbkDiv = get_cpr0_fbdv(temp);
+
+   /* Calculate OPB clock divisor */
+   mfcpr(CPR0_OPBD, temp);
+   temp = CPR0_OPBD_OPBDV(temp);
+   sysInfo-pllOpbDiv = temp ? temp : 4;
+
+   /* Calculate Peripheral clock divisor */
+   mfcpr(CPR0_PERD, temp);
+   temp = CPR0_PERD_PERDV(temp);
+   sysInfo-pllExtBusDiv = temp ? temp : 4;
+
+   /* Calculate CPU clock divisor */
+   mfcpr(CPR0_CPUD, temp);
+   temp = CPR0_CPUD_CPUDV(temp);
+   cpudv = temp ? temp : 8;
+
+   /* 

[U-Boot] [PATCH v4 2/2] APM821xx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V3:
  * Missing TLB entry for CONFIG_SYS_BOOT_BASE_ADDR.
  * Move CONFIG_SYS_EBC_PB0AP etc to EBC area in the config file.
  * remove unused CONFIG_RTL8211CL_PHY.
  * Replace hard coded valued for CONFIG_SYS_EBC_CFG with
macro definitions.
  * Change APM82XXX to APM821XX
  * board.cfg add the entry in sorted. 
  * use puts() if there is no formating needed.
V4:
  * Rebasing with Stefan Roese tree
---
 MAINTAINERS  |4 +
 MAKEALL  |1 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  111 
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   59 +
 boards.cfg   |1 +
 include/configs/bluestone.h  |  176 ++
 8 files changed, 444 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 0c6ce2b..e20055f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -500,6 +500,10 @@ Detlev Zundel d...@denx.de
 
inka4x0 MPC5200
 
+Tirumala Marri tma...@apm.com
+
+   bluestone   APM821XX
+
 -
 
 Unknown / orphaned boards:
diff --git a/MAKEALL b/MAKEALL
index 1b506d6..a2aa7d8 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -143,6 +143,7 @@ LIST_4xx=$(boards_by_cpu ppc4xx)
acadia_nand \
arches  \
bamboo_nand \
+   bluestone   \
canyonlands \
canyonlands_nand \
CPCI405 \
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..fe8929c
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/apm821xx.h
+#include libfdt.h
+#include fdt_support.h
+#include i2c.h
+#include asm/processor.h
+#include asm/io.h
+#include asm/mmu.h
+#include asm/ppc4xx-gpio.h
+
+int board_early_init_f(void)
+{
+   /*
+* Setup the interrupt controller 

[U-Boot] [v3 0/2] Add support for new SoC APM82XXX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM8 is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V1:
  * Squash some of the patches.
  * add space between || and \.
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning unused variable in cpu_init.c
  * Remove All rights reserved phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.
  * Remove top Makefile change.

V2:
  * Missing space before .
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE  CONFIG_SECTOR_REDUCE.
  * Spaces around.
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
  * Removed Defines added to 405ex.

V3:
  * Missing TLB entry for CONFIG_SYS_BOOT_BASE_ADDR.
  * Correct multiline comment.
  * Move CONFIG_SYS_EBC_PB0AP etc to EBC area in the config file.
  * remove unused CONFIG_RTL8211CL_PHY.
  * Replace hard coded valued for CONFIG_SYS_EBC_CFG with
macro definitions.
  * board.cfg add the entry in sorted. 
  * use puts() if there is no formating needed.
  * Change APM82XXX to APM821XX
  * Modify the way cpu id is printed.
  * Correct inadvertent change.
  * Sort define list.
  * Remove comment for get_sys_info().
  * Define a symbolic constat ISRAM1_OCM_SIZE.
  * Create apm821xx.h instead of using ppc440.h

Tirumala Marri (2):
  APM821xx: Add CPU support
  APM821xx: Add bluestone board support

 MAINTAINERS |3 +
 MAKEALL |1 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   36 ++-
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   76 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +-
 arch/powerpc/cpu/ppc4xx/tlb.c   |2 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 +
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 
 board/amcc/bluestone/bluestone.c|  111 +++
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   59 
 boards.cfg  |1 +
 include/apm821xx.h  |  493 +++
 include/configs/bluestone.h |  175 +++
 include/ppc4xx.h|   11 +-
 20 files changed, 1087 insertions(+), 25 deletions(-)
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/apm821xx.h
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [v3 1/2] APM821xx: Add CPU support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V1:
  * Squash some of the patches.
  * add space between || and \.
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning unused variable in cpu_init.c
V2:
  * Removed Defines added to 405ex.
V3:
  * Change APM82XXX to APM821XX
  * Modify the way cpu id is printed.
  * Correct inadvertent change.
  * Sort define list.
  * Remove comment for get_sys_info().
  * Define a symbolic constat ISRAM1_OCM_SIZE.
  * Create apm821xx.h instead of using ppc440.h
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   36 ++-
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   76 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +-
 arch/powerpc/cpu/ppc4xx/tlb.c   |2 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 +
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 include/apm821xx.h  |  493 +++
 include/ppc4xx.h|   11 +-
 12 files changed, 645 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..2c12907 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI)  !defined(CONFIG_IOP480)  \
-!defined(CONFIG_405)  !defined(CONFIG_405EX)
+!defined(CONFIG_405)  !defined(CONFIG_405EX)  \
+!defined(CONFIG_APM821XX)
 int pci_arbiter_enabled(void)
 {
 #if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM821XX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd-cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM821XX)
u32 reg;
 #endif
 
@@ -301,7 +317,9 @@ int checkcpu (void)
puts(CPU:   );
 
get_sys_info(sys_info);
-
+#if defined(CONFIG_APM821XX)
+   puts(APM PowerPC APM821XX);
+#else
 #if defined(CONFIG_XILINX_440)
puts(IBM PowerPC 4);
 #else
@@ -320,6 +338,7 @@ int checkcpu (void)
puts(40);
 #endif
 #endif
+#endif
 
switch (pvr) {
case PVR_405GP_RB:
@@ -598,7 +617,18 @@ int checkcpu (void)
puts(GX Rev. A);
strcpy(addstr, No Security support);
break;
+#if defined(CONFIG_APM821XX)
+   case PVR_APM821XX_RA:
+   mfsdr(SDR0_ECID3, reg);
+   if (reg  0x0020)
+   puts(181 Rev. A);
 
+   if (reg  0x0010)
+   strcpy(addstr, No Security support);
+   else
+   strcpy(addstr, Security support);
+   break;
+#endif
case PVR_VIRTEX5:
puts(x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index b31bd0b..009a35a 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -237,7 +237,8 @@ cpu_init_f (void)
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if !defined(CONFIG_APM821XX)  (defined(CONFIG_405EP) || \
+ defined(CONFIG_405EX))  !defined(CONFIG_SYS_4xx_GPIO_TABLE)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -393,7 +394,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..9538736 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ 

[U-Boot] [v3 2/2] APM821xx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM82XXX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
--
V1:
  * Remove All rights reserved phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.

V2:
  * Missing space before .
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE  CONFIG_SECTOR_REDUCE.
  * Spaces around.
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
V3:
  * Missing TLB entry for CONFIG_SYS_BOOT_BASE_ADDR.
  * Correct multiline comment.
  * Move CONFIG_SYS_EBC_PB0AP etc to EBC area in the config file.
  * remove unused CONFIG_RTL8211CL_PHY.
  * Replace hard coded valued for CONFIG_SYS_EBC_CFG with
macro definitions.
  * board.cfg add the entry in sorted. 
  * use puts() if there is no formating needed.
  * Change APM82XXX to APM821XX
---
 MAINTAINERS  |3 +
 MAKEALL  |1 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  111 
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   59 +
 boards.cfg   |1 +
 include/configs/bluestone.h  |  175 ++
 8 files changed, 442 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b91b0f..284d136 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -253,6 +253,9 @@ Feng Kan f...@amcc.com
 
redwood PPC4xx
 
+Tirumala Marri tma...@apm.com
+   bluestone   APM821XX
+
 Brad Kemp brad.k...@seranoa.com
 
ppmc8260MPC8260
diff --git a/MAKEALL b/MAKEALL
index b34ae33..02d5c17 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx=  \
ASH405  \
bamboo  \
bamboo_nand \
+   bluestone   \
bubinga \
CANBT   \
canyonlands \
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..9bf5da2
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This 

[U-Boot] [PATCH v3 0/2] Add support for new SoC APM821XX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V2:
  * Missing space before .
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE  CONFIG_SECTOR_REDUCE.
  * Spaces around.
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
  * Removed Defines added to 405ex.

V3:
  * Missing TLB entry for CONFIG_SYS_BOOT_BASE_ADDR.
  * Move CONFIG_SYS_EBC_PB0AP etc to EBC area in the config file.
  * remove unused CONFIG_RTL8211CL_PHY.
  * Replace hard coded valued for CONFIG_SYS_EBC_CFG with
macro definitions.
  * Change APM82XXX to APM821XX
  * Modify the way cpu id is printed.
  * Correct inadvertent change.
  * Sort define list.
  * Remove comment for get_sys_info().
  * Define a symbolic constat CONFIG_SYS_OCM_SIZE.
  * Create apm821xx.h instead of using ppc440.h
  * board.cfg add the entry in sorted. 
  * use puts() if there is no formating needed.
  * Correct multiline comment.

Tirumala Marri (2):
  APM821xx: Add CPU support
  APM821xx: Add bluestone board support

 MAINTAINERS |3 +
 MAKEALL |1 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   36 ++-
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   76 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +-
 arch/powerpc/cpu/ppc4xx/tlb.c   |2 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 +
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 
 board/amcc/bluestone/bluestone.c|  111 +++
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   59 
 boards.cfg  |1 +
 include/apm821xx.h  |  493 +++
 include/configs/bluestone.h |  175 +++
 include/ppc4xx.h|   11 +-
 20 files changed, 1087 insertions(+), 25 deletions(-)
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/apm821xx.h
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [PATCH v3 2/2] APM821xx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V2:
  * Missing space before .
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE  CONFIG_SECTOR_REDUCE.
  * Spaces around.
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
V3:
  * Missing TLB entry for CONFIG_SYS_BOOT_BASE_ADDR.
  * Move CONFIG_SYS_EBC_PB0AP etc to EBC area in the config file.
  * remove unused CONFIG_RTL8211CL_PHY.
  * Replace hard coded valued for CONFIG_SYS_EBC_CFG with
macro definitions.
  * Change APM82XXX to APM821XX
  * board.cfg add the entry in sorted. 
  * use puts() if there is no formating needed.
---
 MAINTAINERS  |3 +
 MAKEALL  |1 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  111 
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   59 +
 boards.cfg   |1 +
 include/configs/bluestone.h  |  175 ++
 8 files changed, 442 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b91b0f..284d136 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -253,6 +253,9 @@ Feng Kan f...@amcc.com
 
redwood PPC4xx
 
+Tirumala Marri tma...@apm.com
+   bluestone   APM821XX
+
 Brad Kemp brad.k...@seranoa.com
 
ppmc8260MPC8260
diff --git a/MAKEALL b/MAKEALL
index b34ae33..02d5c17 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx=  \
ASH405  \
bamboo  \
bamboo_nand \
+   bluestone   \
bubinga \
CANBT   \
canyonlands \
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..9bf5da2
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * 

[U-Boot] [PATCH v3 1/2] APM821xx: Add CPU support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
V2:
  * Removed Defines added to 405ex.
V3:  
  * Change APM82XXX to APM821XX
  * Modify the way cpu id is printed.
  * Correct inadvertent change.
  * Sort define list.
  * Remove comment for get_sys_info().
  * Define a symbolic constat ISRAM1_OCM_SIZE.
  * Create apm821xx.h instead of using ppc440.h
  * Correct multiline comment.
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   36 ++-
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |5 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   76 +-
 arch/powerpc/cpu/ppc4xx/start.S |   11 +-
 arch/powerpc/cpu/ppc4xx/tlb.c   |2 +
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 +
 arch/powerpc/include/asm/ppc4xx-isram.h |   14 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 include/apm821xx.h  |  493 +++
 include/ppc4xx.h|   11 +-
 12 files changed, 645 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..2c12907 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI)  !defined(CONFIG_IOP480)  \
-!defined(CONFIG_405)  !defined(CONFIG_405EX)
+!defined(CONFIG_405)  !defined(CONFIG_405EX)  \
+!defined(CONFIG_APM821XX)
 int pci_arbiter_enabled(void)
 {
 #if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM821XX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd-cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM821XX)
u32 reg;
 #endif
 
@@ -301,7 +317,9 @@ int checkcpu (void)
puts(CPU:   );
 
get_sys_info(sys_info);
-
+#if defined(CONFIG_APM821XX)
+   puts(APM PowerPC APM821XX);
+#else
 #if defined(CONFIG_XILINX_440)
puts(IBM PowerPC 4);
 #else
@@ -320,6 +338,7 @@ int checkcpu (void)
puts(40);
 #endif
 #endif
+#endif
 
switch (pvr) {
case PVR_405GP_RB:
@@ -598,7 +617,18 @@ int checkcpu (void)
puts(GX Rev. A);
strcpy(addstr, No Security support);
break;
+#if defined(CONFIG_APM821XX)
+   case PVR_APM821XX_RA:
+   mfsdr(SDR0_ECID3, reg);
+   if (reg  0x0020)
+   puts(181 Rev. A);
 
+   if (reg  0x0010)
+   strcpy(addstr, No Security support);
+   else
+   strcpy(addstr, Security support);
+   break;
+#endif
case PVR_VIRTEX5:
puts(x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index b31bd0b..009a35a 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -237,7 +237,8 @@ cpu_init_f (void)
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if !defined(CONFIG_APM821XX)  (defined(CONFIG_405EP) || \
+ defined(CONFIG_405EX))  !defined(CONFIG_SYS_4xx_GPIO_TABLE)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -393,7 +394,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM821XX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..9538736 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -189,7 +189,7 @@ ulong get_PCI_freq (void)
 #elif defined(CONFIG_440)
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) 

[U-Boot] [PATCH v2 0/2] Add support for new SoC APM82XXX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM8 is Applied Micro Circuits Corporations naming
convention for new line of SoCs.

V1:
  * Squash some of the patches.
  * add space between || and \.
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning unused variable in cpu_init.c
  * Remove All rights reserved phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.
  * Remove top Makefile change.

V2:
  * Missing space before .
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE  CONFIG_SECTOR_REDUCE.
  * Spaces around.
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
  * Removed Defines added to 405ex.

Tirumala Marri (2):
  APM82xxx: Add CPU and other peripheral support
  APM82xxx: Add bluestone board support

 MAINTAINERS |3 +
 MAKEALL |1 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   35 ++-
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |8 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   85 +++-
 arch/powerpc/cpu/ppc4xx/start.S |   10 ++-
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 +
 arch/powerpc/include/asm/ppc4xx-isram.h |8 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 +-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 ++
 board/amcc/bluestone/bluestone.c|  111 
 board/amcc/bluestone/config.mk  |   40 +++
 board/amcc/bluestone/init.S |   55 ++
 boards.cfg  |1 +
 include/configs/bluestone.h |  171 +++
 include/ppc440.h|   57 ++-
 include/ppc4xx.h|7 +-
 19 files changed, 641 insertions(+), 25 deletions(-)
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [PATCH v2 1/2] APM82xxx: Add CPU and other peripheral support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM82XXX is a new line of SoCs which are derivatives of
PPC44X family of processors.

This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB AHB bus, DDR and
Some common register definitions.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 V1:
  * Squash some of the patches.
  * add space between || and \.
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning unused variable in cpu_init.c
 V2:
  * Removed Defines added to 405ex.
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   35 -
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |8 ++-
 arch/powerpc/cpu/ppc4xx/speed.c |   85 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   10 +++-
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 ++
 arch/powerpc/include/asm/ppc4xx-isram.h |8 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   12 ++--
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 include/ppc440.h|   57 -
 include/ppc4xx.h|7 ++-
 11 files changed, 207 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..5fe5d8c 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI)  !defined(CONFIG_IOP480)  \
-!defined(CONFIG_405)  !defined(CONFIG_405EX)
+!defined(CONFIG_405)  !defined(CONFIG_405EX)  \
+!defined(CONFIG_APM82XXX)
 int pci_arbiter_enabled(void)
 {
 #if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM82XXX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd-cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM82XXX)
u32 reg;
 #endif
 
@@ -304,6 +320,8 @@ int checkcpu (void)
 
 #if defined(CONFIG_XILINX_440)
puts(IBM PowerPC 4);
+#elif defined(CONFIG_APM82XXX)
+   puts(APM PowerPC APM82);
 #else
puts(AMCC PowerPC 4);
 #endif
@@ -316,7 +334,7 @@ int checkcpu (void)
 #if defined(CONFIG_440)
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
puts(60);
-#else
+#elif !defined(CONFIG_APM82XXX)
puts(40);
 #endif
 #endif
@@ -598,7 +616,18 @@ int checkcpu (void)
puts(GX Rev. A);
strcpy(addstr, No Security support);
break;
+#if defined(CONFIG_APM82XXX)
+   case PVR_APM82XXX_RA:
+   mfsdr(SDR0_ECID3, reg);
+   if (reg  0x0020)
+   puts(181 Rev. A);
 
+   if (reg  0x0010)
+   strcpy(addstr, No Security support);
+   else
+   strcpy(addstr, Security support);
+   break;
+#endif
case PVR_VIRTEX5:
puts(x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index c04eede..8765059 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -222,13 +222,15 @@ void reconfigure_pll(u32 new_cpu_freq)
 void
 cpu_init_f (void)
 {
-#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX)
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || \
+   defined(CONFIG_460EX)
u32 val;
 #endif
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if (defined(CONFIG_405EP) || defined(CONFIG_405EX))  \
+   !defined(CONFIG_SYS_4xx_GPIO_TABLE)  !defined(CONFIG_APM82XXX)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -384,7 +386,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..b613275 100644
--- 

[U-Boot] [PATCH v2 2/2] APM82xxx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM82XXX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 V1:
  * Remove All rights reserved phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.

V2:
  * Missing space before .
  * SDR_AHB_CFG not used, remove.
  * boot device dfinitions are board specific ? removed.
  * APM82161_MASK not used, remove
  * set_mcsr() is already called in ddr init, no need to call here.
  * removed finding bootdevice function which is not used.
  * Add spaces in tlbentry() function.
  * Board early init function is empty remove.
  * Remove CONFIG_SYS_EXTSRAM_BASE.
  * Set CONFIG_SYS_FLASH_SIZE to 4MB
  * Remove CONFIG_SIZE_REDUCE  CONFIG_SECTOR_REDUCE.
  * Spaces around.
  * Correct the phy name CONFIG_M88E_PHY to CONFIG_RTL8211CL_PHY.
---
 MAINTAINERS  |3 +
 MAKEALL  |1 +
 board/amcc/bluestone/Makefile|   52 
 board/amcc/bluestone/bluestone.c |  111 
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   55 
 boards.cfg   |1 +
 include/configs/bluestone.h  |  171 ++
 8 files changed, 434 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b91b0f..ad7e598 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -253,6 +253,9 @@ Feng Kan f...@amcc.com
 
redwood PPC4xx
 
+Tirumala Marri tma...@apm.com
+   bluestone   APM82XXX
+
 Brad Kemp brad.k...@seranoa.com
 
ppmc8260MPC8260
diff --git a/MAKEALL b/MAKEALL
index b34ae33..02d5c17 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx=  \
ASH405  \
bamboo  \
bamboo_nand \
+   bluestone   \
bubinga \
CANBT   \
canyonlands \
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..182038f
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,111 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * 

[U-Boot] [PATCH v1 1/2] Add CPU and other peripheral support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM82XXX is a new line of SoCs which are derivatives of
PPC44X family of processors.

This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB AHB bus, DDR and
Some common register definitions.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 V1:
  * Squash some of the patches.
  * add space between || and \.
  * Add spaces around operators.
  * Unsigned int to u32.
  * Add empty line which was removed.
  * remove warning unused variable in cpu_init.c
---
 arch/powerpc/cpu/ppc4xx/cpu.c   |   35 -
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |8 ++-
 arch/powerpc/cpu/ppc4xx/speed.c |   85 ++-
 arch/powerpc/cpu/ppc4xx/start.S |   10 +++-
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 ++
 arch/powerpc/include/asm/ppc4xx-isram.h |8 ++-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   25 +++--
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 include/ppc440.h|   57 -
 include/ppc4xx.h|7 ++-
 11 files changed, 220 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..5fe5d8c 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI)  !defined(CONFIG_IOP480)  \
-!defined(CONFIG_405)  !defined(CONFIG_405EX)
+!defined(CONFIG_405)  !defined(CONFIG_405EX)  \
+!defined(CONFIG_APM82XXX)
 int pci_arbiter_enabled(void)
 {
 #if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM82XXX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd-cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM82XXX)
u32 reg;
 #endif
 
@@ -304,6 +320,8 @@ int checkcpu (void)
 
 #if defined(CONFIG_XILINX_440)
puts(IBM PowerPC 4);
+#elif defined(CONFIG_APM82XXX)
+   puts(APM PowerPC APM82);
 #else
puts(AMCC PowerPC 4);
 #endif
@@ -316,7 +334,7 @@ int checkcpu (void)
 #if defined(CONFIG_440)
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
puts(60);
-#else
+#elif !defined(CONFIG_APM82XXX)
puts(40);
 #endif
 #endif
@@ -598,7 +616,18 @@ int checkcpu (void)
puts(GX Rev. A);
strcpy(addstr, No Security support);
break;
+#if defined(CONFIG_APM82XXX)
+   case PVR_APM82XXX_RA:
+   mfsdr(SDR0_ECID3, reg);
+   if (reg  0x0020)
+   puts(181 Rev. A);
 
+   if (reg  0x0010)
+   strcpy(addstr, No Security support);
+   else
+   strcpy(addstr, Security support);
+   break;
+#endif
case PVR_VIRTEX5:
puts(x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index c04eede..5428909 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -222,13 +222,15 @@ void reconfigure_pll(u32 new_cpu_freq)
 void
 cpu_init_f (void)
 {
-#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX)
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || \
+   defined(CONFIG_460EX)
u32 val;
 #endif
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if (defined(CONFIG_405EP) || defined(CONFIG_405EX))  \
+   !defined(CONFIG_SYS_4xx_GPIO_TABLE)  !defined(CONFIG_APM82XXX)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -384,7 +386,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..b613275 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ 

[U-Boot] [PATCH v1 2/2] APM82xxx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM82XXX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 V1:
  * Remove All rights reserved phrase from headers.
  * Add empty line which was removed.
  * Move EBC definititions to bluestone_config.h file
  * Remove reconfigure_EBC() function.
  * Remove unused CONFIG_SDRAM16BIT_OFFSET.
  * Remove unused CONFIG_SDRAM_INFO_EEPROM_ADDR.
  * Add empty lines in bluestone.c file.
  * Replacing AC_R | AC_W | AC_X with AC_RWX.
  * Remove changes to main Makefile
  * Remove NAND references from config file.
  * Squash some of the patches.
  * Remove top Makefile change.
---
 MAINTAINERS  |3 +
 MAKEALL  |1 +
 board/amcc/bluestone/Makefile|   52 +++
 board/amcc/bluestone/bluestone.c |  162 +++
 board/amcc/bluestone/config.mk   |   40 +
 board/amcc/bluestone/init.S  |   55 
 boards.cfg   |1 +
 include/configs/bluestone.h  |  175 ++
 8 files changed, 489 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b91b0f..263c00b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -253,6 +253,9 @@ Feng Kan f...@amcc.com
 
redwood PPC4xx
 
+Tirumala Marritma...@apm.com
+   bluestone   APM82XXX
+
 Brad Kemp brad.k...@seranoa.com
 
ppmc8260MPC8260
diff --git a/MAKEALL b/MAKEALL
index b34ae33..02d5c17 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx=  \
ASH405  \
bamboo  \
bamboo_nand \
+   bluestone   \
bubinga \
CANBT   \
canyonlands \
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..41751c8
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# Author: Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..fbb70e3
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,162 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include ppc440.h
+#include libfdt.h
+#include fdt_support.h
+#include i2c.h
+#include asm/processor.h
+#include asm/io.h
+#include asm/mmu.h
+#include asm/gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+

[U-Boot] [PATCH 5/8] APM82xxx: Add UIC support

[tmarri]

From: Tirumala Marri tma...@apm.com

This patch adds Universal Interrupt Controller support for
APM82XXX processor.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 arch/powerpc/include/asm/ppc4xx-uic.h |5 +++--
 1 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc4xx-uic.h 
b/arch/powerpc/include/asm/ppc4xx-uic.h
index 782d045..238b70b 100644
--- a/arch/powerpc/include/asm/ppc4xx-uic.h
+++ b/arch/powerpc/include/asm/ppc4xx-uic.h
@@ -31,7 +31,7 @@
  */
 #if defined(CONFIG_440GX) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
 #define UIC_MAX4
 #elif defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
 defined(CONFIG_405EX)
@@ -252,7 +252,8 @@
 #define VECNUM_ETH0(32 + 28)
 #endif /* CONFIG_440SPE */
 
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) ||\
+defined(CONFIG_APM82XXX)
 /* UIC 0 */
 #define VECNUM_UIC2NCI 10
 #define VECNUM_UIC2CI  11
-- 
1.6.1.rc3

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[U-Boot] [PATCH 8/8] APM82xxx: Add top level common file changes

[tmarri]

From: Tirumala Marri tma...@apm.com

Add bluestone board name  to the board.cfg.
Change Makefile to include bluestone board support.
Modified MAINTAINERS file to include board maintainers name.
Modified to include blouestone entry in the MAKEALL file.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 MAINTAINERS |3 +++
 MAKEALL |1 +
 Makefile|7 +++
 boards.cfg  |1 +
 4 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b91b0f..263c00b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -253,6 +253,9 @@ Feng Kan f...@amcc.com
 
redwood PPC4xx
 
+Tirumala Marritma...@apm.com
+   bluestone   APM82XXX
+
 Brad Kemp brad.k...@seranoa.com
 
ppmc8260MPC8260
diff --git a/MAKEALL b/MAKEALL
index b34ae33..02d5c17 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -191,6 +191,7 @@ LIST_4xx=  \
ASH405  \
bamboo  \
bamboo_nand \
+   bluestone   \
bubinga \
CANBT   \
canyonlands \
diff --git a/Makefile b/Makefile
index 4f1cb1b..8cd5bd3 100644
--- a/Makefile
+++ b/Makefile
@@ -926,6 +926,13 @@ bamboo_nand_config:unconfig
@echo CONFIG_NAND_U_BOOT = y  $(obj)include/config.mk
@$(MKCONFIG) -n $@ -a bamboo powerpc ppc4xx bamboo amcc
 
+# Maui Bluestone board images
+bluestone_config:   unconfig
+   @mkdir -p $(obj)include
+   @echo #define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
+   tr '[:lower:]' '[:upper:]') $(obj)include/config.h
+   @$(MKCONFIG) -n $@ -a bluestone powerpc ppc4xx bluestone amcc
+
 # Arches, Canyonlands  Glacier use different U-Boot images
 arches_config \
 canyonlands_config \
diff --git a/boards.cfg b/boards.cfg
index 69c6897..48001d3 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -196,6 +196,7 @@ redwood powerpc ppc4xx  -   
amcc
 taihu  powerpc ppc4xx  -   amcc
 taishanpowerpc ppc4xx  -   amcc
 yucca  powerpc ppc4xx  -   amcc
+bluestone  powerpc ppc4xx  -   amcc
 AP1000 powerpc ppc4xx  ap1000  amirix
 CRAYL1 powerpc ppc4xx  L1  cray
 ADCIOP powerpc ppc4xx  adciop  esd
-- 
1.6.1.rc3

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[U-Boot] [PATCH 6/8] APM82xxx: Add SRAM support

[tmarri]

From: Tirumala Marri tma...@apm.com

This patch adds L2Cache/SRAM and OCM register definitions.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 arch/powerpc/include/asm/ppc4xx-isram.h |8 +---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc4xx-isram.h 
b/arch/powerpc/include/asm/ppc4xx-isram.h
index d6d17ac..b723401 100644
--- a/arch/powerpc/include/asm/ppc4xx-isram.h
+++ b/arch/powerpc/include/asm/ppc4xx-isram.h
@@ -25,7 +25,8 @@
 /*
  * Internal SRAM
  */
-#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||\
+defined(CONFIG_APM82XXX)
 #define ISRAM0_DCR_BASE 0x380
 #else
 #define ISRAM0_DCR_BASE 0x020
@@ -42,7 +43,8 @@
 #define ISRAM0_REVID   (ISRAM0_DCR_BASE+0x09)  /* SRAM bus revision id reg */
 #define ISRAM0_DPC (ISRAM0_DCR_BASE+0x0a)  /* SRAM data parity check reg */
 
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) ||\
+defined(CONFIG_APM82XXX)
 #define ISRAM1_DCR_BASE 0x0B0
 #define ISRAM1_SB0CR   (ISRAM1_DCR_BASE+0x00)  /* SRAM1 bank config 0*/
 #define ISRAM1_BEAR(ISRAM1_DCR_BASE+0x04)  /* SRAM1 bus error addr reg */
@@ -60,7 +62,7 @@
 #if defined (CONFIG_440GX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
 #define L2_CACHE_BASE  0x030
 #define L2_CACHE_CFG   (L2_CACHE_BASE+0x00)/* L2 Cache Config  */
 #define L2_CACHE_CMD   (L2_CACHE_BASE+0x01)/* L2 Cache Command */
-- 
1.6.1.rc3

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[U-Boot] [PATCH 3/8] APM82xxx: Add clock speed calculations

[tmarri]

From: Tirumala Marri tma...@apm.com

This patch adds support for speed calculations for different
IP blocks, based on the bootstrap values programmed into EPROM device.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 arch/powerpc/cpu/ppc4xx/speed.c |   85 ++-
 1 files changed, 84 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/speed.c b/arch/powerpc/cpu/ppc4xx/speed.c
index 906face..b613275 100644
--- a/arch/powerpc/cpu/ppc4xx/speed.c
+++ b/arch/powerpc/cpu/ppc4xx/speed.c
@@ -189,7 +189,7 @@ ulong get_PCI_freq (void)
 #elif defined(CONFIG_440)
 
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
 static u8 pll_fwdv_multi_bits[] = {
/* values for:  1 - 16 */
0x00, 0x01, 0x0f, 0x04, 0x09, 0x0a, 0x0d, 0x0e, 0x03, 0x0c,
@@ -250,6 +250,88 @@ u32 get_cpr0_fbdv(unsigned long cpr_reg_fbdv)
return 0;
 }
 
+#if defined(CONFIG_APM82XXX)
+
+/*
+ * Specific for APM82XXX
+ * Change:
+ * PLL registers reflect the current PLL setting of the chip.
+ * So unlike previous implementation that reads bootstrap
+ * registers to determine system clocking information, this
+ * implementation directly extracts the information from
+ * current PLL registers values.
+ */
+void get_sys_info(sys_info_t *sysInfo)
+{
+   unsigned long plld;
+   unsigned long temp;
+   unsigned long mul;
+   unsigned long cpudv;
+   unsigned long plb2dv;
+   unsigned long ddr2dv;
+
+   /* Calculate Forward divisor A and Feeback divisor */
+   mfcpr(CPR0_PLLD, plld);
+
+   temp = CPR0_PLLD_FWDVA(plld);
+   sysInfo-pllFwdDivA = get_cpr0_fwdv(temp);
+
+   temp = CPR0_PLLD_FDV(plld);
+   sysInfo-pllFbkDiv = get_cpr0_fbdv(temp);
+
+   /* Calculate OPB clock divisor */
+   mfcpr(CPR0_OPBD, temp);
+   temp = CPR0_OPBD_OPBDV(temp);
+   sysInfo-pllOpbDiv = temp ? temp : 4;
+
+   /* Calculate Peripheral clock divisor */
+   mfcpr(CPR0_PERD, temp);
+   temp = CPR0_PERD_PERDV(temp);
+   sysInfo-pllExtBusDiv = temp ? temp : 4;
+
+   /* Calculate CPU clock divisor */
+   mfcpr(CPR0_CPUD, temp);
+   temp = CPR0_CPUD_CPUDV(temp);
+   cpudv = temp ? temp : 8;
+
+   /* Calculate PLB2 clock divisor */
+   mfcpr(CPR0_PLB2D, temp);
+   temp = CPR0_PLB2D_PLB2DV(temp);
+   plb2dv = temp ? temp : 4;
+
+   /* Calculate DDR2 clock divisor */
+   mfcpr(CPR0_DDR2D, temp);
+   temp = CPR0_DDR2D_DDR2DV(temp);
+   ddr2dv = temp ? temp : 4;
+
+   /* Calculate 'M' based on feedback source */
+   mfcpr(CPR0_PLLC, temp);
+   temp = CPR0_PLLC_SEL(temp);
+   if (temp == 0) {
+   /* PLL internal feedback */
+   mul = sysInfo-pllFbkDiv;
+   } else {
+   /* PLL PerClk feedback */
+   mul = sysInfo-pllFwdDivA * sysInfo-pllFbkDiv * cpudv
+   * plb2dv * 2 * sysInfo-pllOpbDiv *
+ sysInfo-pllExtBusDiv;
+   }
+
+   /* Now calculate the individual clocks */
+   sysInfo-freqVCOMhz = (mul * CONFIG_SYS_CLK_FREQ) + (mul  1);
+   sysInfo-freqProcessor = sysInfo-freqVCOMhz /
+   sysInfo-pllFwdDivA / cpudv;
+   sysInfo-freqPLB = sysInfo-freqVCOMhz /
+   sysInfo-pllFwdDivA / cpudv / plb2dv / 2;
+   sysInfo-freqOPB = sysInfo-freqPLB / sysInfo-pllOpbDiv;
+   sysInfo-freqEBC = sysInfo-freqOPB / sysInfo-pllExtBusDiv;
+   sysInfo-freqDDR = sysInfo-freqVCOMhz /
+   sysInfo-pllFwdDivA / cpudv / ddr2dv / 2;
+   sysInfo-freqUART = sysInfo-freqPLB;
+}
+
+#else
+
 /*
  * AMCC_TODO: verify this routine against latest EAS, cause stuff changed
  *with latest EAS
@@ -307,6 +389,7 @@ void get_sys_info (sys_info_t * sysInfo)
 
return;
 }
+#endif
 
 #elif defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
-- 
1.6.1.rc3

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[U-Boot] [PATCH 4/8] APM82xxx: Add DDR support

[tmarri]

From: Tirumala Marri tma...@apm.com

This patch adds 32bit DDR2 static as well as dynamic
setting of different DRAM parameters like CAS and read/write
delays.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 arch/powerpc/include/asm/ppc4xx-sdram.h |   25 +++--
 1 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc4xx-sdram.h 
b/arch/powerpc/include/asm/ppc4xx-sdram.h
index 4ec1ef8..a6cdace 100644
--- a/arch/powerpc/include/asm/ppc4xx-sdram.h
+++ b/arch/powerpc/include/asm/ppc4xx-sdram.h
@@ -292,7 +292,7 @@
  */
 #if defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
 #define SDRAM_RXBAS_SDBA_MASK  0xFFE0  /* Base address */
 #define SDRAM_RXBAS_SDBA_ENCODE(n) ((u32)(((phys_size_t)(n)  2)  
0xFFE0))
 #define SDRAM_RXBAS_SDBA_DECODE(n) phys_size_t)(n))  0xFFE0)  2)
@@ -322,6 +322,7 @@
  * Revisit this file to check if all these 405EX defines are correct and
  * can be used in the common 44x_spd_ddr2 code as well. sr, 2008-06-02
  */
+#define SDRAM_MBXCF_BASE_ENCODE(n)  (((n)  0xFFC0)  3)
 #define SDRAM_RXBAS_SDSZ_MASK  PPC_REG_VAL(19, 0xF)
 #define SDRAM_RXBAS_SDSZ_4MB   PPC_REG_VAL(19, 0x0)
 #define SDRAM_RXBAS_SDSZ_8MB   PPC_REG_VAL(19, 0x1)
@@ -346,6 +347,18 @@
 #define SDRAM_RXBAS_SDSZ_2048  SDRAM_RXBAS_SDSZ_2048MB
 #define SDRAM_RXBAS_SDSZ_4096  SDRAM_RXBAS_SDSZ_4096MB
 #define SDRAM_RXBAS_SDSZ_8192  SDRAM_RXBAS_SDSZ_8192MB
+#define SDRAM_RXBAS_SDAM_MODE0  PPC_REG_VAL(23, 0x0)
+#define SDRAM_RXBAS_SDAM_MODE1  PPC_REG_VAL(23, 0x1)
+#define SDRAM_RXBAS_SDAM_MODE2  PPC_REG_VAL(23, 0x2)
+#define SDRAM_RXBAS_SDAM_MODE3  PPC_REG_VAL(23, 0x3)
+#define SDRAM_RXBAS_SDAM_MODE4  PPC_REG_VAL(23, 0x4)
+#define SDRAM_RXBAS_SDAM_MODE5  PPC_REG_VAL(23, 0x5)
+#define SDRAM_RXBAS_SDAM_MODE6  PPC_REG_VAL(23, 0x6)
+#define SDRAM_RXBAS_SDAM_MODE7  PPC_REG_VAL(23, 0x7)
+#define SDRAM_RXBAS_SDAM_MODE8  PPC_REG_VAL(23, 0x8)
+#define SDRAM_RXBAS_SDAM_MODE9  PPC_REG_VAL(23, 0x9)
+#define SDRAM_RXBAS_SDBE_DISABLEPPC_REG_VAL(31, 0x0)
+#define SDRAM_RXBAS_SDBE_ENABLE PPC_REG_VAL(31, 0x1)
 #endif /* CONFIG_405EX */
 
 /* The mode definitions are the same for all PPC4xx variants */
@@ -365,7 +378,7 @@
 /*
  * Memory controller registers
  */
-#ifdef CONFIG_405EX
+#if defined(CONFIG_405EX) || defined(CONFIG_APM82XXX)
 #define SDRAM_BESR 0x00/* PLB bus error status (read/clear) */
 #define SDRAM_BESRT0x01/* PLB bus error status (test/set)   */
 #define SDRAM_BEARL0x02/* PLB bus error address low */
@@ -375,9 +388,9 @@
 #define SDRAM_PLBOPT   0x08/* PLB slave options */
 #define SDRAM_PUABA0x09/* PLB upper address base*/
 #define SDRAM_MCSTAT   0x1F/* memory controller status  */
-#else /* CONFIG_405EX */
+#else /* CONFIG_405EX || CONFIG_APM82XXX*/
 #define SDRAM_MCSTAT   0x14/* memory controller status  */
-#endif /* CONFIG_405EX */
+#endif /* CONFIG_405EX || CONFIG_APM82XXX*/
 #define SDRAM_MCOPT1   0x20/* memory controller options 1   */
 #define SDRAM_MCOPT2   0x21/* memory controller options 2   */
 #define SDRAM_MODT00x22/* on die termination for bank 0 */
@@ -423,12 +436,12 @@
 #define SDRAM_MEMODE   0x89/* memory extended mode  */
 #define SDRAM_ECCES0x98/* ECC error status  */
 #define SDRAM_CID  0xA4/* core ID   */
-#ifndef CONFIG_405EX
+#if !defined(CONFIG_405EX)  !defined(CONFIG_APM82XXX)
 #define SDRAM_RID  0xA8/* revision ID   */
 #endif
 #define SDRAM_FCSR 0xB0/* feedback calibration status   */
 #define SDRAM_RTSR 0xB1/* run time status tracking  */
-#ifdef CONFIG_405EX
+#if  defined(CONFIG_405EX) || defined(CONFIG_APM82XXX)
 #define SDRAM_RID  0xF8/* revision ID   */
 #endif
 
-- 
1.6.1.rc3

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[U-Boot] [PATCH 7/8] APM82xxx: Add bluestone board support

[tmarri]

From: Tirumala Marri tma...@apm.com

Add support code for bluestone board wth APM82XXX processor based.
This patch includes early board init, misc init, configure EBC,
and initializes UIC.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 arch/powerpc/include/asm/ppc4xx-ebc.h |4 +
 board/amcc/bluestone/Makefile |   52 
 board/amcc/bluestone/bluestone.c  |  213 
 board/amcc/bluestone/config.mk|   40 ++
 board/amcc/bluestone/init.S   |   55 
 include/configs/bluestone.h   |  218 +
 6 files changed, 582 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc4xx-ebc.h 
b/arch/powerpc/include/asm/ppc4xx-ebc.h
index 9c17e46..245e487 100644
--- a/arch/powerpc/include/asm/ppc4xx-ebc.h
+++ b/arch/powerpc/include/asm/ppc4xx-ebc.h
@@ -73,6 +73,10 @@
 #define EBC_NUM_BANKS  3
 #endif
 
+#if defined(CONFIG_APM82XXX)
+#define EBC_NUM_BANKS   3
+#endif
+
 /* Bank Configuration Register */
 #define EBC_BXCR(n)(n)
 #define EBC_BXCR_BANK_SIZE(n)  (0x10  (((n)  EBC_BXCR_BS_MASK)  17))
diff --git a/board/amcc/bluestone/Makefile b/board/amcc/bluestone/Makefile
new file mode 100644
index 000..637d20d
--- /dev/null
+++ b/board/amcc/bluestone/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2010, Applied Micro Circuits Corporation
+# All rights reserved. Tirumala R Marri tma...@apm.com
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).a
+
+COBJS-y:= $(BOARD).o
+SOBJS  := init.o
+
+COBJS   := $(COBJS-y)
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(OBJS) $(SOBJS)
+   $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/amcc/bluestone/bluestone.c b/board/amcc/bluestone/bluestone.c
new file mode 100644
index 000..b13e84a
--- /dev/null
+++ b/board/amcc/bluestone/bluestone.c
@@ -0,0 +1,213 @@
+/*
+ * Bluestone board support
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * All rights reserved. Tirumala R Marri tma...@apm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include ppc440.h
+#include libfdt.h
+#include fdt_support.h
+#include i2c.h
+#include asm/processor.h
+#include asm/io.h
+#include asm/mmu.h
+#include asm/gpio.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define SDR_AHB_CFG0x370
+
+/* Define Boot devices */
+#define BOOT_FROM_8BIT_SRAM 0x00
+#define BOOT_FROM_8BIT_SRAM_FULL_ADDR   0x01
+#define BOOT_FROM_8BIT_NAND0x02
+#define BOOT_FROM_8BIT_NOR 0x03
+#define BOOT_FROM_8BIT_NOR_FULL_ADDR   0x04
+#define BOOT_DEVICE_UNKNOWN0xff
+
+#define APM82161_MASK  (u32)(0x1  21)
+
+/* NOR Flash */
+#define EBC_BXAP_NOR   (EBC_BXAP_BME_DISABLED   | \
+   EBC_BXAP_TWT_ENCODE(64)  | \
+   EBC_BXAP_BCE_DISABLE| \
+   EBC_BXAP_BCT_2TRANS | \
+   EBC_BXAP_CSN_ENCODE(1)  | \
+   EBC_BXAP_OEN_ENCODE(2)  | \
+  

[U-Boot] [PATCH 2/8] APM82xxx: Add Common register definitions

[tmarri]

From: Tirumala Marri tma...@apm.com

This patch adds APM82XXX specific definitions, which include
clock and boot strap.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 include/ppc440.h |   57 -
 include/ppc4xx.h |7 +++--
 2 files changed, 59 insertions(+), 5 deletions(-)

diff --git a/include/ppc440.h b/include/ppc440.h
index c807dda..3bd8e98 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -58,6 +58,25 @@
  | Clocking Controller
  
+*/
 /* values for clkcfga register - indirect addressing of these regs */
+#if defined(CONFIG_APM82XXX)
+#define CPR0_CLKUPD  0x0020
+#define CPR0_PLLC0x0040
+#define CPR0_PLLC_SEL(pllc)  (((pllc)  0x0100)  24)
+#define CPR0_PLLD0x0060
+#define CPR0_PLLD_FDV(plld) (((plld)  0xff00)  24)
+#define CPR0_PLLD_FWDVA(plld)(((plld)  0x000f)  16)
+#define CPR0_CPUD0x0080
+#define CPR0_CPUD_CPUDV(cpud)(((cpud)  0x0700)  24)
+#define CPR0_PLB2D   0x00a0
+#define CPR0_PLB2D_PLB2DV(plb2d) (((plb2d)  0x0600)  25)
+#define CPR0_OPBD0x00c0
+#define CPR0_OPBD_OPBDV(opbd)(((opbd)  0x0300)  24)
+#define CPR0_PERD   0x00e0
+#define CPR0_PERD_PERDV(perd)(((perd)  0x0300)  24)
+#define CPR0_DDR2D  0x0100
+#define CPR0_DDR2D_DDR2DV(ddr2d) (((ddr2d)  0x0600)  25)
+#define CLK_ICFG   0x0140
+#else
 #define CPR0_PLLC  0x0040
 #define CPR0_PLLD  0x0060
 #define CPR0_PRIMAD0   0x0080
@@ -67,6 +86,7 @@
 #define CPR0_MALD  0x0100
 #define CPR0_SPCID 0x0120
 #define CPR0_ICFG  0x0140
+#endif /*if defined(CONFIG_APM82XXX) */
 
 /* 440EPX boot strap options */
 #define BOOT_STRAP_OPTION_A0x
@@ -1275,7 +1295,36 @@
 #define SDR0_AHB_CFG   0x370
 #define SDR0_USB2HOST_CFG  0x371
 #endif /* CONFIG_460EX || CONFIG_460GT */
+#if defined(CONFIG_APM82XXX)
+
+#define SDR0_DDR0  0x00E1
+#define SDR0_DDR0_DDRM_ENCODE(n)   unsigned long)(n))0x03)29)
+#define SDR0_DDR0_DDRM_DECODE(n)   unsigned long)(n))29)0x03)
+#define SDR0_DDR0_TUNE_ENCODE(n)   unsigned long)(n))0x2FF)0)
+#define SDR0_DDR0_TUNE_DECODE(n)   unsigned long)(n))0)0x2FF)
 
+#define SDR_SDSTP1_RL_DECODE(x) ((x  0x000C)  18)
+#define SDR_SDSTP1_RL_EBC   0x0
+#define SDR_SDSTP1_RL_NDFC  0x2
+
+/* ECID */
+#define SDR0_ECID0 0x0080
+#define SDR0_ECID1 0x0081
+#define SDR0_ECID2 0x0082
+#define SDR0_ECID3 0x0083
+
+/* AHB config. */
+#define AHB_TOP 0xA4
+#define AHB_BOT 0xA5
+#define SDR0_AHB_CFG0x370
+
+/* DDR SDRAM Controller clock (CPR register)*/
+#define SDR0_DDRCE 0x00E0 /* SDR register */
+#define CPR0_DDR2D 0x0100 /* CPR register */
+#define CPR0_DDR2D_DDR2DV_ENCODE(n)unsigned long)(n))0x03)25)
+#define CPR0_DDR2D_DDR2DV_DECODE(n)unsigned long)(n))25)0x03)
+
+#endif
 #define SDR0_SDCS_SDD  (0x8000  31)
 
 #if defined(CONFIG_440GP)
@@ -1517,7 +1566,8 @@
 #define SDR0_EBC0  0x0100
 #define SDR0_SDSTP20x4001
 #define SDR0_SDSTP30x4001
-#elif defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) ||\
+  defined(CONFIG_APM82XXX)
 
 #define SDR0_SRST0 SDR0_SRST  /* for compatability reasons */
 #define SDR0_SRST0_BGO 0x8000 /* PLB to OPB bridge */
@@ -1909,9 +1959,12 @@
 
 #if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
-defined(CONFIG_460EX) || defined(CONFIG_460GT)
+defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
+defined(CONFIG_APM82XXX)
 #define GPIO0_BASE (CONFIG_SYS_PERIPHERAL_BASE+0x0B00)
+#if !defined(CONFIG_APM82XXX)
 #define GPIO1_BASE (CONFIG_SYS_PERIPHERAL_BASE+0x0C00)
+#endif
 
 #define GPIO0_OR   (GPIO0_BASE+0x0)
 #define GPIO0_TCR  (GPIO0_BASE+0x4)
diff --git a/include/ppc4xx.h b/include/ppc4xx.h
index ee30a4c..3224d5f 100644
--- a/include/ppc4xx.h
+++ b/include/ppc4xx.h
@@ -44,14 +44,15 @@
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
 #define CONFIG_SDRAM_PPC4xx_IBM_DDR2   /* IBM DDR(2) controller */
 #endif
 
 #if defined(CONFIG_440EP) || defined(CONFIG_440GR) ||  \
 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||\
 defined(CONFIG_405EZ) || defined(CONFIG_405EX) ||  \
-defined(CONFIG_460EX) || defined(CONFIG_460GT)
+defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
+defined(CONFIG_APM82XXX)
 #define CONFIG_NAND_NDFC
 #endif
 
@@ -61,7 +62,7 @@
 

[U-Boot] [PATCH 0/8] Add support for new SoC APM82XXX

[tmarri]

From: Tirumala Marri tma...@apm.com

APM8 is Applied Micro Circuits Corporations naming convention for new line 
of SoCs.

Tirumala Marri (8):
  APM82xxx: Add CPU support
  APM82xxx: Add Common register definitions
  APM82xxx: Add clock speed calculations
  APM82xxx: Add DDR support
  APM82xxx: Add UIC support
  APM82xxx: Add SRAM support
  APM82xxx: Add bluestone board support
  APM82xxx: Add top level common file changes

 MAINTAINERS |3 +
 MAKEALL |1 +
 Makefile|7 +
 arch/powerpc/cpu/ppc4xx/cpu.c   |   35 +-
 arch/powerpc/cpu/ppc4xx/cpu_init.c  |9 +-
 arch/powerpc/cpu/ppc4xx/speed.c |   85 -
 arch/powerpc/cpu/ppc4xx/start.S |   10 +-
 arch/powerpc/include/asm/ppc4xx-ebc.h   |4 +
 arch/powerpc/include/asm/ppc4xx-isram.h |8 +-
 arch/powerpc/include/asm/ppc4xx-sdram.h |   25 +++-
 arch/powerpc/include/asm/ppc4xx-uic.h   |5 +-
 arch/powerpc/include/asm/processor.h|1 +
 board/amcc/bluestone/Makefile   |   52 
 board/amcc/bluestone/bluestone.c|  213 ++
 board/amcc/bluestone/config.mk  |   40 ++
 board/amcc/bluestone/init.S |   55 
 boards.cfg  |1 +
 include/configs/bluestone.h |  218 +++
 include/ppc440.h|   57 -
 include/ppc4xx.h|7 +-
 20 files changed, 810 insertions(+), 26 deletions(-)
 create mode 100644 board/amcc/bluestone/Makefile
 create mode 100644 board/amcc/bluestone/bluestone.c
 create mode 100644 board/amcc/bluestone/config.mk
 create mode 100644 board/amcc/bluestone/init.S
 create mode 100644 include/configs/bluestone.h

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[U-Boot] [PATCH 1/8] APM82xxx: Add CPU support

[tmarri]

From: Tirumala Marri tma...@apm.com

APM82XXX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri tma...@apm.com
---
 arch/powerpc/cpu/ppc4xx/cpu.c|   35 +++--
 arch/powerpc/cpu/ppc4xx/cpu_init.c   |9 ---
 arch/powerpc/cpu/ppc4xx/start.S  |   10 +++-
 arch/powerpc/include/asm/processor.h |1 +
 4 files changed, 46 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/cpu/ppc4xx/cpu.c b/arch/powerpc/cpu/ppc4xx/cpu.c
index 851065c..5fe5d8c 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu.c
@@ -80,7 +80,8 @@ static int pci_async_enabled(void)
 #endif /* CONFIG_PCI */
 
 #if defined(CONFIG_PCI)  !defined(CONFIG_IOP480)  \
-!defined(CONFIG_405)  !defined(CONFIG_405EX)
+!defined(CONFIG_405)  !defined(CONFIG_405EX)  \
+!defined(CONFIG_APM82XXX)
 int pci_arbiter_enabled(void)
 {
 #if defined(CONFIG_405GP)
@@ -250,6 +251,21 @@ static char *bootstrap_str[] = {
 };
 static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
 #endif
+#if defined(CONFIG_APM82XXX)
+#define SDR0_PINSTP_SHIFT   29
+static char *bootstrap_str[] = {
+   RESERVED,
+   RESERVED,
+   RESERVED,
+   NAND (8 bits),
+   NOR  (8 bits),
+   NOR  (8 bits) w/PLL Bypassed,
+   I2C (Addr 0x54),
+   I2C (Addr 0x52),
+};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H' };
+#endif
+
 
 #if defined(SDR0_PINSTP_SHIFT)
 static int bootstrap_option(void)
@@ -285,7 +301,7 @@ int checkcpu (void)
uint pvr = get_pvr();
ulong clock = gd-cpu_clk;
char buf[32];
-#if defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#if defined(CONFIG_460EX) || defined(CONFIG_460GT) || defined(CONFIG_APM82XXX)
u32 reg;
 #endif
 
@@ -304,6 +320,8 @@ int checkcpu (void)
 
 #if defined(CONFIG_XILINX_440)
puts(IBM PowerPC 4);
+#elif defined(CONFIG_APM82XXX)
+   puts(APM PowerPC APM82);
 #else
puts(AMCC PowerPC 4);
 #endif
@@ -316,7 +334,7 @@ int checkcpu (void)
 #if defined(CONFIG_440)
 #if defined(CONFIG_460EX) || defined(CONFIG_460GT)
puts(60);
-#else
+#elif !defined(CONFIG_APM82XXX)
puts(40);
 #endif
 #endif
@@ -598,7 +616,18 @@ int checkcpu (void)
puts(GX Rev. A);
strcpy(addstr, No Security support);
break;
+#if defined(CONFIG_APM82XXX)
+   case PVR_APM82XXX_RA:
+   mfsdr(SDR0_ECID3, reg);
+   if (reg  0x0020)
+   puts(181 Rev. A);
 
+   if (reg  0x0010)
+   strcpy(addstr, No Security support);
+   else
+   strcpy(addstr, Security support);
+   break;
+#endif
case PVR_VIRTEX5:
puts(x5 VIRTEX5);
break;
diff --git a/arch/powerpc/cpu/ppc4xx/cpu_init.c 
b/arch/powerpc/cpu/ppc4xx/cpu_init.c
index c04eede..2308051 100644
--- a/arch/powerpc/cpu/ppc4xx/cpu_init.c
+++ b/arch/powerpc/cpu/ppc4xx/cpu_init.c
@@ -35,7 +35,6 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifndef CONFIG_SYS_PLL_RECONFIG
 #define CONFIG_SYS_PLL_RECONFIG0
 #endif
-
 #if defined(CONFIG_440EPX) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)
 static void reset_with_rli(void)
@@ -222,13 +221,15 @@ void reconfigure_pll(u32 new_cpu_freq)
 void
 cpu_init_f (void)
 {
-#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) || defined(CONFIG_460EX)
+#if defined(CONFIG_WATCHDOG) || defined(CONFIG_440GX) ||\
+   defined(CONFIG_460EX) || defined(CONFIG_APM82XXX)
u32 val;
 #endif
 
reconfigure_pll(CONFIG_SYS_PLL_RECONFIG);
 
-#if (defined(CONFIG_405EP) || defined (CONFIG_405EX))  
!defined(CONFIG_SYS_4xx_GPIO_TABLE)
+#if (defined(CONFIG_405EP) || defined(CONFIG_405EX))  \
+   !defined(CONFIG_SYS_4xx_GPIO_TABLE)  !defined(CONFIG_APM82XXX)
/*
 * GPIO0 setup (select GPIO or alternate function)
 */
@@ -384,7 +385,7 @@ cpu_init_f (void)
 #if defined(CONFIG_405EX) || \
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460EX) || defined(CONFIG_460GT)  || \
-defined(CONFIG_460SX)
+defined(CONFIG_460SX) || defined(CONFIG_APM82XXX)
/*
 * Set PLB4 arbiter (Segment 0 and 1) to 4 deep pipeline read
 */
diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index 5296dad..9cb818d 100644
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -700,7 +700,8 @@ _start:
 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
 defined(CONFIG_460SX)
mtdcr   L2_CACHE_CFG,r0 /* Ensure L2 Cache is off */
-#elif defined(CONFIG_460EX) || defined(CONFIG_460GT)
+#elif defined(CONFIG_460EX) || defined(CONFIG_460GT) || \
+  defined(CONFIG_APM82XXX)
lis r1, 0x
ori