Re: [U-Boot] [PATCH v1 2/2] imx: fix exception vectors relocation in i.MX27
On 11/11/14 17:46, Albert ARIBAUD wrote:
Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x) or
high (0x) vectors address, or setting VBAR to
U-Boot's base if applicable.
i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0x
and has only ROM at 0x; it is therefore not
possible to move or change its exception vectors.
Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.
Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.
Signed-off-by: Albert ARIBAUDalbert.u.b...@aribaud.net
---
arch/arm/cpu/arm926ejs/mx27/Makefile | 4 ++
arch/arm/cpu/arm926ejs/mx27/relocate.S | 49
arch/arm/lib/crt0.S| 5 +++
arch/arm/lib/relocate.S| 69 --
4 files changed, 99 insertions(+), 28 deletions(-)
create mode 100644 arch/arm/cpu/arm926ejs/mx27/relocate.S
diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile
b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 4976bbb..0edf144 100644
--- a/arch/arm/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
@@ -5,3 +5,7 @@
# SPDX-License-Identifier:GPL-2.0+
obj-y = generic.o reset.o timer.o
+
+ifndef CONFIG_SPL_BUILD
+obj-y += relocate.o
+endif
diff --git a/arch/arm/cpu/arm926ejs/mx27/relocate.S
b/arch/arm/cpu/arm926ejs/mx27/relocate.S
new file mode 100644
index 000..97003b3
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx27/relocate.S
@@ -0,0 +1,49 @@
+/*
+ * relocate - i.MX27-specific vector relocation
+ *
+ * Copyright (c) 2013 Albert ARIBAUDalbert.u.b...@aribaud.net
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#includeasm-offsets.h
+#includeconfig.h
+#includelinux/linkage.h
+
+/*
+ * The i.MX27 SoC is very specific with respect to exceptions: it
+ * does not provide RAM at the high vectors address (0x),
+ * thus only the low address (0x) is useable; but that is
+ * in ROM. Therefore, vectors cannot be changed at all.
+ *
+ * However, these ROM-based vectors actually just perform indirect
+ * calls through pointers located in RAM at SoC-specific addresses,
+ * as follows:
+ *
+ * Offset Exception Use by ROM code
+ * 0x reset indirect branch to [0x0014]
+ * 0x0004 undefined instruction indirect branch to [0xfef0]
+ * 0x0008 software interrupt indirect branch to [0xfef4]
+ * 0x000c prefetch abort indirect branch to [0xfef8]
+ * 0x0010 data abort indirect branch to [0xfefc]
+ * 0x0014 (reserved in ARMv5)vector to ROM reset: 0xc000
+ * 0x0018 IRQindirect branch to [0xff00]
+ * 0x001c FIQindirect branch to [0xff04]
+ *
+ * In order to initialize exceptions on i.MX27, we must copy U-Boot's
+ * indirect (not exception!) vector table into 0xfef0..0xff04
+ * taking care not to copy vectors 0x00 (reset) and 0x14 (reserved).
+ */
+
+ .section.text.relocate_vectors,ax,%progbits
+
+ENTRY(relocate_vectors)
+
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */
+ ldr r1, =0xFEF0
+ ldmia r0!, {r2-r8,r10} /* load all eight vectors */
+ stmia r1!, {r3-r6,r8,r10} /* only write supported vectors */
+
+ bx lr
+
+ENDPROC(relocate_vectors)
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 29cdad0..a33ad3e 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -104,6 +104,11 @@ clr_gd:
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */
b relocate_code
here:
+/*
+ * now relocate vectors
+ */
+
+ bl relocate_vectors
/* Set up final (full) environment */
diff --git a/arch/arm/lib/relocate.S b/arch/arm/lib/relocate.S
index 6ede41c..92f5314 100644
--- a/arch/arm/lib/relocate.S
+++ b/arch/arm/lib/relocate.S
@@ -11,6 +11,47 @@
#includelinux/linkage.h
/*
+ * Default/weak exception vectors relocation routine
+ *
+ * This routine covers the standard ARM cases: normal (0x),
+ * high (0x) and VBAR. SoCs which do not comply with any of
+ * the standard cases must provide their own, strong, version.
+ */
+
+ .section.text.relocate_vectors,ax,%progbits
+ .weak relocate_vectors
+
+ENTRY(relocate_vectors)
+
+#ifdef CONFIG_HAS_VBAR
+ /*
+* If the ARM processor has the security extensions,
+* use VBAR to relocate the exception vectors.
+*/
+ ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd-relocaddr */
+ mcr p15, 0, r0, c12, c0, 0 /* Set VBAR */
+#else
+ /*
+* Copy the relocated exception vectors to the
+*
Re: [U-Boot] [PATCH v4 2/4] apf27: add support for the armadeus APF27 board
Hi Stefano, On 29/07/13 11:43, Stefano Babic wrote: diff --git a/board/armadeus/apf27/splboot.S b/board/armadeus/apf27/splboot.S new file mode 100644 index 000..898e59b --- /dev/null +++ b/board/armadeus/apf27/splboot.S @@ -0,0 +1,528 @@ +/* + * IMX27 NAND Flash SPL (Secondary Program Loader) + * + * Copyright (c) 2008 Armadeus Project / eja + * + * Based on Freescale NAND SPL + * + * Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc. + * Copyright (c) 2008-2012 Eric Jarrigeeric.jarr...@armadeus.org + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#includeconfig.h +#includegenerated/asm-offsets.h +#includeversion.h +#includeasm/macro.h +#includeasm/arch/imx-regs.h +/* #includelinux/linkage.h */ +#include apf27.h + +/* + * Standard NAND flash commands + */ +#define NAND_CMD_READ0 0 + +/* Extended commands for large page devices */ +#define NAND_CMD_READSTART 0x30 +#define NAND_CMD_CACHEDPROG0x15 + +/* Status bits */ +#define NAND_STATUS_FAIL 0x01 +#define NAND_STATUS_FAIL_N10x02 +#define NAND_STATUS_TRUE_READY 0x20 +#define NAND_STATUS_READY 0x40 +#define NAND_STATUS_WP 0x80 + +#define IMX_NFC_MAIN_AREA0 (0xD800) +#define IMX_NFC_MAIN_AREA1 (0xD8000200) +#define IMX_NFC_SPARE_AREA0 (0xD8000800) +#define IMX_NFC_REGS(0xD8000E00) + +/* + * NFC registers address offset + */ +#define NFC_OFFSET_BUF_ADDR(0x04) /* Buffer Number for Page Data + Transfer To/From Flash Mem */ +#define NFC_OFFSET_FLASH_ADDR (0x06) /* NAND Flash Address */ +#define NFC_OFFSET_FLASH_CMD (0x08) /* NAND Flash Command */ +#define NFC_OFFSET_CONFIG (0x0A) /* NFC Internal Buffer Lock + Control */ +#define NFC_OFFSET_ECC_STATUS_RESULT (0x0C) /* Controller Status/Result of + Flash Operation */ +#define NFC_OFFSET_CONFIG1 (0x1A) /* Nand Flash Operation + Configuration 1 */ +#define NFC_OFFSET_CONFIG2 (0x1C) /* Nand Flash Operation + Configuration 2 */ + +/* NFC_ECC_STATUS_RESULT Status Register Bit Fields */ +#define NFC_ECC_STAT_ERM_SHFT (2) /* ERM shift */ +#define NFC_ECC_STAT_ERROR2 (11) /* non correctable error */ + +/* NFC_CONFIG Control Register Bit Fields */ +#define NFC_CONFIG_UNLOCKED (11) /* unlocked */ + +/* NFC_CONFIG1 Control Register Bit Fields */ +#define NFC_CONFIG1_ECC_EN (13) +#define NFC_CONFIG1_INT_MSK(14) + +/* NFC_CONFIG2 Control Register Bit Fields */ +#define NFC_CONFIG2_INT (115) /* Interrupt */ +#define NFC_CONFIG2_FDO_PAGE(13) /* Flash data output */ +#define NFC_CONFIG2_FDI (12) /* Flash data input */ +#define NFC_CONFIG2_FADD(11) /* Flash address input */ +#define NFC_CONFIG2_FCMD(10) /* Flash command input */ Using SPL, the storage driver (in your case, NAND) is not a special one, but the usual driver from u-boot is taken. In this case, code in mxc_nand, that supports mx27, should run. Instead of it, you embedded your own (ok, from Freescale code) driver in assembly. Is there any reason that forbid to take the general driver ? + + .macro nand_boot + +#ifdef CONFIG_BOOT_TRACE_REG According to README: each define whose name starts with CONFIG_ is an option - it can use generally in U-Boot code and must be documented. If your goal was to add something related to apf27 only, do not use a CONFIG_ name or add documentation for it. +/* + * If CONFIG_BOOT_TRACE_REG is a SDRAM address then be sure to use the following + * 2 command after SDRAM init + */ + +/* Backup state of previous boot to CONFIG_BOOT_TRACE_REG+4*/ +#define BACKUP_TRACE() \ + ldr r4, =CONFIG_BOOT_TRACE_REG; \ + ldr r3, [r4]; \ + str r3, [r4, #0x04]; + +/* Save a state of boot at CONFIG_BOOT_TRACE_REG */ +#define BOOT_TRACE(val)\ + ldr r4, =CONFIG_BOOT_TRACE_REG; \ + ldr r3, =val; \ + str r3, [r4]; +#else +#define
Re: [U-Boot] [PATCH 2/4] apf27: add support for the armadeus APF27 board
On 26/11/12 18:55, Albert ARIBAUD wrote:
+/*
+ * Fuse bank 1 row 8 is reserved for future use and therefore available for
+ * custormer use. The APF27 board uses this fuse to store the board revision:
+ * 0: initial board revision
+ * 1: first revision - Presence of the second RAM chip on the board is blown in
+ * fuse bank 1 row 9 bit 0 - No hardware change
+ * N: to be defined
(aside: I am somewhat surprised that something reserved for future
use can be considered available for customer use: reserved areas
are... reserved... thus probably not available -- future revisions of
the *IC* may actually exercize the reservation, causing a conflict
with the *board* assumptions. But hey, that's not a U-boot issue)
This is a reference to the freescale documentation.
It means that customer (here Armadeus) can use it to store
informations.
...
+int
+misc_init_r(void)
+{
+ char *s;
+ u_char * firmware_buffer = (u_char *)(CONFIG_SYS_LOAD_ADDR + \
+ CONFIG_SYS_MONITOR_LEN);
+ size_t size = 0;
+ size_t offset = -1;
+ char *autoload = getenv(firmware_autoload);
Is this used?
Yes, this function can be used if it's enable in the u-boot environment.
...
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+
+inline void lowlevel_init(void) {}
What's the point of defining lowlevel_init? If you don't do low level
inits, then you can define CONFIG_SKIP_LOWLEVEL_INIT in the board
config header file.
In fact lowlevel_init isn't only the call of a function, this is also
some low level init (like cache). I need this low level init, but
I don't need to call a function, so I only define an empty function.
...
regards,
Philippe
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Re: [U-Boot] [PATCH 3/4] apf27: add spl support for the apf27
On 26/11/12 19:02, Albert ARIBAUD wrote: Hi Philippe, On Mon, 29 Oct 2012 18:35:56 +0100, Philippe Reynestrem...@yahoo.fr wrote: Signed-off-by: Philippe Reynestrem...@yahoo.fr Signed-off-by: Eric Jarrigeeric.jarr...@armadeus.org create mode 100644 board/armadeus/apf27/start.S create mode 100644 board/armadeus/apf27/u-boot-spl.lds This is needed by 2/4 to get truly useable support. Please merge both patches. I've done it, and send a v3 this weed-end. Thanks a lot for the review. regards, Philippe ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
