Re: [NEW FEATURE] RFC: Add Intel GMBUS support
Hello, That is correct. The new later revision Baytrail chips do not reliably initialize video upon boot. I have taken a significant amount of time to analyze the issue. The SOCs produced after 2019 show this issue, although I dont have the specific SKU or stepping details as our production team has not been logging that data. We have several hundred of these SOCs in inventory and are seeing a 20% failure rate resulting in these boards being marked bad. The vendor (Advantech) uses an AMI BIOS on the SOM which we replace with U-Boot. The AMI BIOS is able to reliably initialize the video on the SOCs in question. I have captured the communication on the GMBUS for both the U-Boot initialization and the AMI initialization. Both can be clearly seen running the Intel VBIOS, but the vendors BIOS then additionally gathers data approx 100ms later from the GMBUS to be used to properly initialize the GPU. This can be seen on the google drive link below in the file "Logic-Capture.png". I have also done a register dump comparison between a known good SOC and a known bad SOC. The register "PIPEAFRAMECOUNT", offset 0x70040 can be seen that the monitor does not report back sufficient VSYNC on the newer silicon. This can be seen on the google drive link below in the file "Register-Comparison.png". I have also included the full register dumps in the text files. If you would like I can add the actual Logic capture files for further inspection. The Intel doc "intel-os-gfx-prm-vol10-display.pdf" does not show confidential or NDA so I believe this is a public document that we can use to implement the needed features. Google Drive with referenced data: https://drive.google.com/drive/folders/1OpXT7Faks2sfIKBIv-JmhEYeLzFYwvmF?usp=sharing Eric Schikschneit Senior Embedded Linux Engineer III NovaTech, LLC 13555 W. 107th Street | Lenexa, LS 66215 O: 913.451.1880 novatechautomation.com | NovaTechLinkedIn Receipt of this email implies compliance with our terms and conditions. From: Bin Meng Sent: Thursday, September 21, 2023 8:14 PM To: Eric Schikschneit; Simon Glass Cc: u-boot@lists.denx.de Subject: Re: [NEW FEATURE] RFC: Add Intel GMBUS support +Simon Hi Eric, On Fri, Sep 22, 2023 at 6:10 AM Eric Schikschneit wrote: > > I have begun working on adding support for the Intel Graphics Management bus > to U-Boot. Currently the x86 bring up process (as explored on the Baytrail > series of Atom SOCs) relys on the Intel Video BIOS to do all setup and > configuration of the GPU. This method of adding video support works on > earlier versions of the silicon. With later versions I have found that the > OEM BIOS needs to capture the monitor data over the GMBUS in order to > initialize the GPU properly. I have logic analyzer captures available for > anyone who is curious. My purpose for this patch is a skeleton placeholder > that I will be working from, and I am asking for community collaboration with > this. I have hardware available for testing as needed, and some details can > be provided upon request. Would you share the documentation that describes the Intel GM bus, if publicly available? Based on the info you provided, did you mean with later new revision BayTrail chips, the video bios initialization is not enough in U-Boot? AFAIU, the U-Boot BayTrail support relies on Intel FSP to do any chipset-specific work, including the video bios setup. Regards, Bin
[NEW FEATURE] RFC: Add Intel GMBUS support
I have begun working on adding support for the Intel Graphics Management bus to
U-Boot. Currently the x86 bring up process (as explored on the Baytrail series
of Atom SOCs) relys on the Intel Video BIOS to do all setup and configuration
of the GPU. This method of adding video support works on earlier versions of
the silicon. With later versions I have found that the OEM BIOS needs to
capture the monitor data over the GMBUS in order to initialize the GPU
properly. I have logic analyzer captures available for anyone who is curious.
My purpose for this patch is a skeleton placeholder that I will be working
from, and I am asking for community collaboration with this. I have hardware
available for testing as needed, and some details can be provided upon request.
Eric Schikschneit
Senior Embedded Linux Engineer III
NovaTech, LLC
13555 W. 107th Street | Lenexa, LS 66215
O: 913.451.1880
novatechautomation.com | NovaTechLinkedIn
Receipt of this email implies compliance with our terms and conditions.From 66ef768fce7c41fd784b622b92c07f201982a678 Mon Sep 17 00:00:00 2001
From: Eric Schikschneit
Date: Thu, 21 Sep 2023 16:11:23 -0500
Subject: [PATCH] WIP: Add Intel GMBUS support
This will allow uboot to communicate over the GMBUS to an attached
monitor to gather EDID information in order to properly setup video
during the boot process.
This is being tested as it is being developed on an Intel Bayrail SOC.
Signed-off-by: Eric Schikschneit
---
drivers/video/Kconfig | 5 +++
drivers/video/Makefile| 1 +
drivers/video/intel_gmbus.c | 77 +++
drivers/video/psb_intel_reg.h | 55 +
4 files changed, 138 insertions(+)
create mode 100644 drivers/video/intel_gmbus.c
create mode 100644 drivers/video/psb_intel_reg.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index ed0b21f2a7..7bc433d9af 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -683,4 +683,9 @@ config VIDEO_DT_SIMPLEFB
The video output is initialized by U-Boot, and kept by the
kernel.
+config VIDEO_INTEL_BAYTRAIL
+ bool "Enable GMBUS support for Intel Baytrail SOCs"
+ help
+ Enables support for interfacing with monitors to gather EDID
+ information to aid video bringup.
endmenu
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 0f41a23193..4ff710e41a 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_VIDEO_SIMPLE) += simplefb.o
obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
obj-$(CONFIG_VIDEO_VESA) += vesa.o
+obj-$(CONFIG_VIDEO_INTEL_BAYTRAIL) += intel_gmbus.o
obj-y += bridge/
obj-y += sunxi/
diff --git a/drivers/video/intel_gmbus.c b/drivers/video/intel_gmbus.c
new file mode 100644
index 00..e23e8030f2
--- /dev/null
+++ b/drivers/video/intel_gmbus.c
@@ -0,0 +1,77 @@
+/* This file is loosly based off of the file found in the linux kernel,
+ * modified for use with u-boot.
+ * File in kernel: drivers/gpu/drm/gma500/intel_gmbus.c
+ *
+ * Authors:
+ * Eric Schikschneit
+
+#include "psb_intel_reg.h"
+
+// struct intel_gpio {
+// struct i2c_adapter adapter;
+// struct i2c_algo_bit_data algo;
+// struct drm_psb_private *dev_priv;
+// u32 reg;
+// };
+
+#define GMBUS_REG_READ(reg) ioread32(dev_priv->gmbus_reg + (reg))
+#define GMBUS_REG_WRITE(reg, val) iowrite32((val), dev_priv->gmbus_reg + (reg))
+
+void intel_gmbus_i2c_reset() {
+}
+
+static void intel_gmbus_i2c_quirk_set() {
+}
+
+static u32 intel_gmbus_get_reserved() {
+return 0;
+}
+
+static void intel_gmbus_set_clock (void *data, int state_high) {
+}
+
+static int intel_gmbus_get_clock(void *data) {
+return 0;
+}
+
+static void intel_gmbus_set_data(void *data, int state_high) {
+}
+
+static int intel_gmbus_get_data(void *data) {
+return 0;
+}
+
+static struct i2c_adapter * intel_gmbus_gpio_create() { // Use u-boot compatible struct
+return;
+}
+
+static int intel_gmbus_i2c_quirk_xfer() {
+return 0;
+}
+
+static int intel_gmbus_xfer() {
+return 0;
+}
+
+static u32 intel_gmbus_func() {
+return 0;
+}
+
+void intel_gmbus_setup() {
+}
+
+void intel_gmbus_set_speed(struct pci_dev_t *dev) {
+}
+
+void intel_gmbus_get_speed(struct pci_dev_t *dev) {
+}
+
+void intel_gmbus_force_bit() {
+}
+
+void intel_gmbus_teardown() {
+}
+
diff --git a/drivers/video/psb_intel_reg.h b/drivers/video/psb_intel_reg.h
new file mode 100644
index 00..51ba722177
--- /dev/null
+++ b/drivers/video/psb_intel_reg.h
@@ -0,0 +1,55 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2009, Intel Corporation.
+ * Modified for uboot by Eric Schikschneit (eric.schikschn...@novatechautomation.com)
+ */
+#ifndef __PSB_INTEL_REG_H__
+#define __PSB_INTEL_REG_H__
+
+#define GMBUS0 0x5100 /* clock/port select */
+#define GMBUS_RATE_100KHZ (0<<8)
+#define GMBUS_RATE_50KHZ (1<<8)
+#define GMBUS_RATE_400KHZ (2<<8) /* reserved on Pineview */
+#define
Re: [NEW FEATURE] RFC: Add Intel GMBUS support
+Simon Hi Eric, On Fri, Sep 22, 2023 at 6:10 AM Eric Schikschneit wrote: > > I have begun working on adding support for the Intel Graphics Management bus > to U-Boot. Currently the x86 bring up process (as explored on the Baytrail > series of Atom SOCs) relys on the Intel Video BIOS to do all setup and > configuration of the GPU. This method of adding video support works on > earlier versions of the silicon. With later versions I have found that the > OEM BIOS needs to capture the monitor data over the GMBUS in order to > initialize the GPU properly. I have logic analyzer captures available for > anyone who is curious. My purpose for this patch is a skeleton placeholder > that I will be working from, and I am asking for community collaboration with > this. I have hardware available for testing as needed, and some details can > be provided upon request. Would you share the documentation that describes the Intel GM bus, if publicly available? Based on the info you provided, did you mean with later new revision BayTrail chips, the video bios initialization is not enough in U-Boot? AFAIU, the U-Boot BayTrail support relies on Intel FSP to do any chipset-specific work, including the video bios setup. Regards, Bin
