With the correct settings described in the device-tree the PHY settings
in the board init are no longer required. The values are taken from the
linux device tree.
Suggested-by: Michael Walle
Signed-off-by: Heiko Thiery
---
arch/arm/dts/imx8mn-evk.dtsi| 9 +
board/freescale/imx8mn_evk/imx8mn_evk.c | 16
2 files changed, 9 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/imx8mn-evk.dtsi b/arch/arm/dts/imx8mn-evk.dtsi
index 416fadb22b..4453a1a281 100644
--- a/arch/arm/dts/imx8mn-evk.dtsi
+++ b/arch/arm/dts/imx8mn-evk.dtsi
@@ -64,6 +64,15 @@
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
+ reset-gpios = < 22 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <1>;
+ qca,disable-smarteee;
+ vddio-supply = <>;
+
+ vddio: vddio-regulator {
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ };
};
};
};
diff --git a/board/freescale/imx8mn_evk/imx8mn_evk.c
b/board/freescale/imx8mn_evk/imx8mn_evk.c
index b24342fd5c..e35d505aea 100644
--- a/board/freescale/imx8mn_evk/imx8mn_evk.c
+++ b/board/freescale/imx8mn_evk/imx8mn_evk.c
@@ -27,22 +27,6 @@ static void setup_fec(void)
clrsetbits_le32(>gpr[1], 0x2000, 0);
}
-int board_phy_config(struct phy_device *phydev)
-{
- /* enable rgmii rxc skew and phy mode select to RGMII copper */
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
-
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
- phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
-
- if (phydev->drv->config)
- phydev->drv->config(phydev);
- return 0;
-}
-
int board_init(void)
{
setup_fec();
--
2.30.2