On Wed, 13 Mar 2024 13:33:23 +0800
lhdj...@126.com wrote:
Hi,
> From: lhdjply
>
> 111
There should be a proper commit message here, explaining *why* this
patch is needed.
So what does this patch or which problem does it solve?
Please note that I consider those "SUNxx_GPy_UARTz" symbols nonsense,
since they do not carry real information. I thought about replacing all
those pinmux defines with something like SUNXI_PINMUX_x, defined to
x, so say: "#define SUNXI_PINMUX_5 5".
Does that sound better to you?
Cheers,
Andre
>
> Signed-off-by: lhdjply
> ---
> arch/arm/mach-sunxi/board.c | 4 ++--
> include/sunxi_gpio.h| 6 ++
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
> index f4dbb2a740..b91c9629e4 100644
> --- a/arch/arm/mach-sunxi/board.c
> +++ b/arch/arm/mach-sunxi/board.c
> @@ -151,8 +151,8 @@ static int gpio_init(void)
> sunxi_gpio_set_cfgpin(SUNXI_GPE(3), 6);
> sunxi_gpio_set_pull(SUNXI_GPE(3), SUNXI_GPIO_PULL_UP);
> #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV)
> - sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPE_UART0);
> - sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPE_UART0);
> + sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPA_UART1);
> + sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPA_UART1);
> sunxi_gpio_set_pull(SUNXI_GPA(3), SUNXI_GPIO_PULL_UP);
> #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
> sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
> diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h
> index db3742c039..51258e3dd9 100644
> --- a/include/sunxi_gpio.h
> +++ b/include/sunxi_gpio.h
> @@ -108,6 +108,8 @@ enum sunxi_gpio_number {
> #define SUN8I_H3_GPA_UART0 2
> #define SUN8I_H3_GPA_UART2 2
>
> +#define SUNIV_GPA_UART1 5
> +
> #define SUN4I_GPB_PWM2
> #define SUN4I_GPB_TWI0 2
> #define SUN4I_GPB_TWI1 2
> @@ -130,12 +132,16 @@ enum sunxi_gpio_number {
>
> #define SUNXI_GPD_LCD0 2
> #define SUNXI_GPD_LVDS0 3
> +#define SUNIV_GPD_UART1 3
> +#define SUNIV_GPD_UART2 3
>
> #define SUNIV_GPE_UART0 5
> +#define SUNIV_GPE_UART2 3
>
> #define SUNXI_GPF_SDC0 2
> #define SUNXI_GPF_UART0 4
> #define SUN8I_GPF_UART0 3
> +#define SUNIV_GPF_UART0 3
>
> #define SUN4I_GPG_SDC1 4
> #define SUN5I_GPG_SDC1 2
