Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
On Mon, 5 Apr 2021 20:14:28 +0530, Aswath Govindraju wrote: > Enable HS400 speed mode by writing to HOST_CONTROL2 register. Applied to https://source.denx.de/u-boot/custodians/u-boot-ti.git for-rc, thanks! [1/1] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode https://source.denx.de/u-boot/custodians/u-boot-ti/-/commit/bda47bef7c -- Thanks and Regards, Lokesh
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
On Tue, Jul 20, 2021 at 09:40:22AM +0530, Lokesh Vutla wrote: > +Tom > > On 20/07/21 3:45 am, Jaehoon Chung wrote: > > Hi Aswath, > > > > On 7/19/21 3:48 PM, Aswath Govindraju wrote: > >> Hi Peng, > >> > >> On 09/06/21 8:56 pm, Aswath Govindraju wrote: > >>> Hi Peng, > >>> > >>> On 10/05/21 7:18 pm, Aswath Govindraju wrote: > Hi Peng, > > On 07/04/21 3:52 am, Jaehoon Chung wrote: > > On 4/5/21 11:44 PM, Aswath Govindraju wrote: > >> From: Faiz Abbas > >> > >> Enable HS400 speed mode by writing to HOST_CONTROL2 register. > >> > >> Signed-off-by: Faiz Abbas > >> Signed-off-by: Aswath Govindraju > > > > Reviewed-by: Jaehoon Chung > > > > Can you please pick this patch if there are no comments. > > >>> > >>> May I know if this okay to be merged ? > >>> > >> > >> A gentle reminder on this patch. This patch has other dependencies that > >> and are pending merge[1][2]. > > > > I don't have the permission to merge on u-boot-mmc git. > > I have the permission to merge on just u-boot-pmic..But I don't know > > whether it's the best way to apply this into my u-boot-pmic or not. :) > > > > I had been already reviewed about this patch.. > > So if want to pick this, I think there is no problem about applied together > > with below patches. > > > > Acked-by: Jaehoon Chung > > Tom, > Is it okay if I pick this patch as per above suggestion? Yes that's fine, thanks. -- Tom signature.asc Description: PGP signature
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
On 7/20/21 2:23 PM, Lokesh Vutla wrote: > > > On 20/07/21 10:51 am, Jaehoon Chung wrote: >> Hi Lokesh, >> >> On 7/20/21 1:10 PM, Lokesh Vutla wrote: >>> +Tom >>> >>> On 20/07/21 3:45 am, Jaehoon Chung wrote: Hi Aswath, On 7/19/21 3:48 PM, Aswath Govindraju wrote: > Hi Peng, > > On 09/06/21 8:56 pm, Aswath Govindraju wrote: >> Hi Peng, >> >> On 10/05/21 7:18 pm, Aswath Govindraju wrote: >>> Hi Peng, >>> >>> On 07/04/21 3:52 am, Jaehoon Chung wrote: On 4/5/21 11:44 PM, Aswath Govindraju wrote: > From: Faiz Abbas > > Enable HS400 speed mode by writing to HOST_CONTROL2 register. > > Signed-off-by: Faiz Abbas > Signed-off-by: Aswath Govindraju Reviewed-by: Jaehoon Chung >>> >>> Can you please pick this patch if there are no comments. >>> >> >> May I know if this okay to be merged ? >> > > A gentle reminder on this patch. This patch has other dependencies that > and are pending merge[1][2]. I don't have the permission to merge on u-boot-mmc git. I have the permission to merge on just u-boot-pmic..But I don't know whether it's the best way to apply this into my u-boot-pmic or not. :) I had been already reviewed about this patch.. So if want to pick this, I think there is no problem about applied together with below patches. Acked-by: Jaehoon Chung >>> >>> Tom, >>> Is it okay if I pick this patch as per above suggestion? >> >> Isn't it enough my Acked-by tag? > > Sure it is :). I just want to make sure Tom doesn't flag it in the PR. Thanks for explanation. :) Best Regards, Jaehoon Chung > > Thanks and regards, > Lokesh > >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
On 20/07/21 10:51 am, Jaehoon Chung wrote: > Hi Lokesh, > > On 7/20/21 1:10 PM, Lokesh Vutla wrote: >> +Tom >> >> On 20/07/21 3:45 am, Jaehoon Chung wrote: >>> Hi Aswath, >>> >>> On 7/19/21 3:48 PM, Aswath Govindraju wrote: Hi Peng, On 09/06/21 8:56 pm, Aswath Govindraju wrote: > Hi Peng, > > On 10/05/21 7:18 pm, Aswath Govindraju wrote: >> Hi Peng, >> >> On 07/04/21 3:52 am, Jaehoon Chung wrote: >>> On 4/5/21 11:44 PM, Aswath Govindraju wrote: From: Faiz Abbas Enable HS400 speed mode by writing to HOST_CONTROL2 register. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju >>> >>> Reviewed-by: Jaehoon Chung >>> >> >> Can you please pick this patch if there are no comments. >> > > May I know if this okay to be merged ? > A gentle reminder on this patch. This patch has other dependencies that and are pending merge[1][2]. >>> >>> I don't have the permission to merge on u-boot-mmc git. >>> I have the permission to merge on just u-boot-pmic..But I don't know >>> whether it's the best way to apply this into my u-boot-pmic or not. :) >>> >>> I had been already reviewed about this patch.. >>> So if want to pick this, I think there is no problem about applied together >>> with below patches. >>> >>> Acked-by: Jaehoon Chung >> >> Tom, >> Is it okay if I pick this patch as per above suggestion? > > Isn't it enough my Acked-by tag? Sure it is :). I just want to make sure Tom doesn't flag it in the PR. Thanks and regards, Lokesh
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Lokesh, On 7/20/21 1:10 PM, Lokesh Vutla wrote: > +Tom > > On 20/07/21 3:45 am, Jaehoon Chung wrote: >> Hi Aswath, >> >> On 7/19/21 3:48 PM, Aswath Govindraju wrote: >>> Hi Peng, >>> >>> On 09/06/21 8:56 pm, Aswath Govindraju wrote: Hi Peng, On 10/05/21 7:18 pm, Aswath Govindraju wrote: > Hi Peng, > > On 07/04/21 3:52 am, Jaehoon Chung wrote: >> On 4/5/21 11:44 PM, Aswath Govindraju wrote: >>> From: Faiz Abbas >>> >>> Enable HS400 speed mode by writing to HOST_CONTROL2 register. >>> >>> Signed-off-by: Faiz Abbas >>> Signed-off-by: Aswath Govindraju >> >> Reviewed-by: Jaehoon Chung >> > > Can you please pick this patch if there are no comments. > May I know if this okay to be merged ? >>> >>> A gentle reminder on this patch. This patch has other dependencies that >>> and are pending merge[1][2]. >> >> I don't have the permission to merge on u-boot-mmc git. >> I have the permission to merge on just u-boot-pmic..But I don't know whether >> it's the best way to apply this into my u-boot-pmic or not. :) >> >> I had been already reviewed about this patch.. >> So if want to pick this, I think there is no problem about applied together >> with below patches. >> >> Acked-by: Jaehoon Chung > > Tom, > Is it okay if I pick this patch as per above suggestion? Isn't it enough my Acked-by tag? Best Regards, Jaehoon Chung > > Thanks and regards, > Lokesh > >> >> Best Regards, >> Jaehoon Chung >> >>> >>> [1] - >>> https://protect2.fireeye.com/v1/url?k=bf905767-e00b6fae-bf91dc28-0cc47a336fae-6a3fa5daa309&q=1&e=ac3de2ef-41d1-4e60-952a-16e2b302cfdd&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D247000 >>> [2] - >>> https://protect2.fireeye.com/v1/url?k=c93699cd-96ada104-c9371282-0cc47a336fae-de6d85845da27eb0&q=1&e=ac3de2ef-41d1-4e60-952a-16e2b302cfdd&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D245579 >>> >>> Thanks, >>> Aswath >>> Thanks, Aswath > Thanks, > Aswath > >> Best Regards, >> Jaehoon Chung >> >>> --- >>> drivers/mmc/sdhci.c | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c >>> index d9ab6a0a839e..eea4701d8af5 100644 >>> --- a/drivers/mmc/sdhci.c >>> +++ b/drivers/mmc/sdhci.c >>> @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) >>> case MMC_HS_200: >>> reg |= SDHCI_CTRL_UHS_SDR104; >>> break; >>> + case MMC_HS_400: >>> + reg |= SDHCI_CTRL_HS400; >>> + break; >>> default: >>> reg |= SDHCI_CTRL_UHS_SDR12; >>> } >>> >> > >>> >>> >> >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
+Tom On 20/07/21 3:45 am, Jaehoon Chung wrote: > Hi Aswath, > > On 7/19/21 3:48 PM, Aswath Govindraju wrote: >> Hi Peng, >> >> On 09/06/21 8:56 pm, Aswath Govindraju wrote: >>> Hi Peng, >>> >>> On 10/05/21 7:18 pm, Aswath Govindraju wrote: Hi Peng, On 07/04/21 3:52 am, Jaehoon Chung wrote: > On 4/5/21 11:44 PM, Aswath Govindraju wrote: >> From: Faiz Abbas >> >> Enable HS400 speed mode by writing to HOST_CONTROL2 register. >> >> Signed-off-by: Faiz Abbas >> Signed-off-by: Aswath Govindraju > > Reviewed-by: Jaehoon Chung > Can you please pick this patch if there are no comments. >>> >>> May I know if this okay to be merged ? >>> >> >> A gentle reminder on this patch. This patch has other dependencies that >> and are pending merge[1][2]. > > I don't have the permission to merge on u-boot-mmc git. > I have the permission to merge on just u-boot-pmic..But I don't know whether > it's the best way to apply this into my u-boot-pmic or not. :) > > I had been already reviewed about this patch.. > So if want to pick this, I think there is no problem about applied together > with below patches. > > Acked-by: Jaehoon Chung Tom, Is it okay if I pick this patch as per above suggestion? Thanks and regards, Lokesh > > Best Regards, > Jaehoon Chung > >> >> [1] - >> https://protect2.fireeye.com/v1/url?k=bf905767-e00b6fae-bf91dc28-0cc47a336fae-6a3fa5daa309&q=1&e=ac3de2ef-41d1-4e60-952a-16e2b302cfdd&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D247000 >> [2] - >> https://protect2.fireeye.com/v1/url?k=c93699cd-96ada104-c9371282-0cc47a336fae-de6d85845da27eb0&q=1&e=ac3de2ef-41d1-4e60-952a-16e2b302cfdd&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D245579 >> >> Thanks, >> Aswath >> >>> Thanks, >>> Aswath >>> Thanks, Aswath > Best Regards, > Jaehoon Chung > >> --- >> drivers/mmc/sdhci.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c >> index d9ab6a0a839e..eea4701d8af5 100644 >> --- a/drivers/mmc/sdhci.c >> +++ b/drivers/mmc/sdhci.c >> @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) >> case MMC_HS_200: >> reg |= SDHCI_CTRL_UHS_SDR104; >> break; >> +case MMC_HS_400: >> +reg |= SDHCI_CTRL_HS400; >> +break; >> default: >> reg |= SDHCI_CTRL_UHS_SDR12; >> } >> > >>> >> >> >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Aswath, On 7/19/21 3:48 PM, Aswath Govindraju wrote: > Hi Peng, > > On 09/06/21 8:56 pm, Aswath Govindraju wrote: >> Hi Peng, >> >> On 10/05/21 7:18 pm, Aswath Govindraju wrote: >>> Hi Peng, >>> >>> On 07/04/21 3:52 am, Jaehoon Chung wrote: On 4/5/21 11:44 PM, Aswath Govindraju wrote: > From: Faiz Abbas > > Enable HS400 speed mode by writing to HOST_CONTROL2 register. > > Signed-off-by: Faiz Abbas > Signed-off-by: Aswath Govindraju Reviewed-by: Jaehoon Chung >>> >>> Can you please pick this patch if there are no comments. >>> >> >> May I know if this okay to be merged ? >> > > A gentle reminder on this patch. This patch has other dependencies that > and are pending merge[1][2]. I don't have the permission to merge on u-boot-mmc git. I have the permission to merge on just u-boot-pmic..But I don't know whether it's the best way to apply this into my u-boot-pmic or not. :) I had been already reviewed about this patch.. So if want to pick this, I think there is no problem about applied together with below patches. Acked-by: Jaehoon Chung Best Regards, Jaehoon Chung > > [1] - > https://protect2.fireeye.com/v1/url?k=bf905767-e00b6fae-bf91dc28-0cc47a336fae-6a3fa5daa309&q=1&e=ac3de2ef-41d1-4e60-952a-16e2b302cfdd&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D247000 > [2] - > https://protect2.fireeye.com/v1/url?k=c93699cd-96ada104-c9371282-0cc47a336fae-de6d85845da27eb0&q=1&e=ac3de2ef-41d1-4e60-952a-16e2b302cfdd&u=https%3A%2F%2Fpatchwork.ozlabs.org%2Fproject%2Fuboot%2Flist%2F%3Fseries%3D245579 > > Thanks, > Aswath > >> Thanks, >> Aswath >> >>> Thanks, >>> Aswath >>> Best Regards, Jaehoon Chung > --- > drivers/mmc/sdhci.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c > index d9ab6a0a839e..eea4701d8af5 100644 > --- a/drivers/mmc/sdhci.c > +++ b/drivers/mmc/sdhci.c > @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) > case MMC_HS_200: > reg |= SDHCI_CTRL_UHS_SDR104; > break; > + case MMC_HS_400: > + reg |= SDHCI_CTRL_HS400; > + break; > default: > reg |= SDHCI_CTRL_UHS_SDR12; > } > >>> >> > >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Peng, On 09/06/21 8:56 pm, Aswath Govindraju wrote: > Hi Peng, > > On 10/05/21 7:18 pm, Aswath Govindraju wrote: >> Hi Peng, >> >> On 07/04/21 3:52 am, Jaehoon Chung wrote: >>> On 4/5/21 11:44 PM, Aswath Govindraju wrote: From: Faiz Abbas Enable HS400 speed mode by writing to HOST_CONTROL2 register. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju >>> >>> Reviewed-by: Jaehoon Chung >>> >> >> Can you please pick this patch if there are no comments. >> > > May I know if this okay to be merged ? > A gentle reminder on this patch. This patch has other dependencies that and are pending merge[1][2]. [1] - https://patchwork.ozlabs.org/project/uboot/list/?series=247000 [2] - https://patchwork.ozlabs.org/project/uboot/list/?series=245579 Thanks, Aswath > Thanks, > Aswath > >> Thanks, >> Aswath >> >>> Best Regards, >>> Jaehoon Chung >>> --- drivers/mmc/sdhci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index d9ab6a0a839e..eea4701d8af5 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) case MMC_HS_200: reg |= SDHCI_CTRL_UHS_SDR104; break; + case MMC_HS_400: + reg |= SDHCI_CTRL_HS400; + break; default: reg |= SDHCI_CTRL_UHS_SDR12; } >>> >> >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Peng, On 10/05/21 7:18 pm, Aswath Govindraju wrote: > Hi Peng, > > On 07/04/21 3:52 am, Jaehoon Chung wrote: >> On 4/5/21 11:44 PM, Aswath Govindraju wrote: >>> From: Faiz Abbas >>> >>> Enable HS400 speed mode by writing to HOST_CONTROL2 register. >>> >>> Signed-off-by: Faiz Abbas >>> Signed-off-by: Aswath Govindraju >> >> Reviewed-by: Jaehoon Chung >> > > Can you please pick this patch if there are no comments. > May I know if this okay to be merged ? Thanks, Aswath > Thanks, > Aswath > >> Best Regards, >> Jaehoon Chung >> >>> --- >>> drivers/mmc/sdhci.c | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c >>> index d9ab6a0a839e..eea4701d8af5 100644 >>> --- a/drivers/mmc/sdhci.c >>> +++ b/drivers/mmc/sdhci.c >>> @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) >>> case MMC_HS_200: >>> reg |= SDHCI_CTRL_UHS_SDR104; >>> break; >>> + case MMC_HS_400: >>> + reg |= SDHCI_CTRL_HS400; >>> + break; >>> default: >>> reg |= SDHCI_CTRL_UHS_SDR12; >>> } >>> >> >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Peng, On 07/04/21 3:52 am, Jaehoon Chung wrote: > On 4/5/21 11:44 PM, Aswath Govindraju wrote: >> From: Faiz Abbas >> >> Enable HS400 speed mode by writing to HOST_CONTROL2 register. >> >> Signed-off-by: Faiz Abbas >> Signed-off-by: Aswath Govindraju > > Reviewed-by: Jaehoon Chung > Can you please pick this patch if there are no comments. Thanks, Aswath > Best Regards, > Jaehoon Chung > >> --- >> drivers/mmc/sdhci.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c >> index d9ab6a0a839e..eea4701d8af5 100644 >> --- a/drivers/mmc/sdhci.c >> +++ b/drivers/mmc/sdhci.c >> @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) >> case MMC_HS_200: >> reg |= SDHCI_CTRL_UHS_SDR104; >> break; >> +case MMC_HS_400: >> +reg |= SDHCI_CTRL_HS400; >> +break; >> default: >> reg |= SDHCI_CTRL_UHS_SDR12; >> } >> >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
On 4/5/21 11:44 PM, Aswath Govindraju wrote: > From: Faiz Abbas > > Enable HS400 speed mode by writing to HOST_CONTROL2 register. > > Signed-off-by: Faiz Abbas > Signed-off-by: Aswath Govindraju Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > drivers/mmc/sdhci.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c > index d9ab6a0a839e..eea4701d8af5 100644 > --- a/drivers/mmc/sdhci.c > +++ b/drivers/mmc/sdhci.c > @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) > case MMC_HS_200: > reg |= SDHCI_CTRL_UHS_SDR104; > break; > + case MMC_HS_400: > + reg |= SDHCI_CTRL_HS400; > + break; > default: > reg |= SDHCI_CTRL_UHS_SDR12; > } >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Aswath, On 4/6/21 5:26 PM, Aswath Govindraju wrote: > Hi Jaehoon, > > On 06/04/21 10:50 am, Aswath Govindraju wrote: >> Hi Jaehoon, >> >> On 06/04/21 3:48 am, Jaehoon Chung wrote: >>> Hi, >>> >>> On 4/5/21 11:44 PM, Aswath Govindraju wrote: From: Faiz Abbas Enable HS400 speed mode by writing to HOST_CONTROL2 register. >>> >>> I didn't find HS400 bit at HOST_CONTROL2 register. (I have checked SD >>> Specific v4.20) >>> If I missed something, let me know, plz. >>> >>> In include/sdhci.h, it mentioned to "Non-standard". >>> >> >> Thank you for pointing this out. >> >> Yes, this is not a part of SD specification and in the specification >> this field is marked as reserved. I have added this, as this bit mask >> has been defined in include/sdhci.h. Sorry about this. I'll post a >> respin taking this into a consideration. >> > > On the other hand, the same has been accepted in kernel i.e. setting > SDHCI_CTRL_HS400 bit in HOST_CONTROL2 register, drivers/mmc/host/sdhci.c > in sdhci_set_uhs_signaling(). I think although this bit has not been > mentioned in the specification, it seems it is used by many controllers > for HS400 mode. So, as this is not specific to a controller can setting > this, be allowed in the common sdhci_set_uhs_timing() function ? Frankly, i think that it can be used. Just I wondered that i missed something from Specification. :) Thanks for sharing information. I didn't check on kernel side. Best Regards, Jaehoon Chung > > Thanks, > Aswath > >> Thanks, >> Aswath >> >>> Best Regards, >>> Jaehoon Chung >>> Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- drivers/mmc/sdhci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index d9ab6a0a839e..eea4701d8af5 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) case MMC_HS_200: reg |= SDHCI_CTRL_UHS_SDR104; break; + case MMC_HS_400: + reg |= SDHCI_CTRL_HS400; + break; default: reg |= SDHCI_CTRL_UHS_SDR12; } >>> >> > >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Jaehoon, On 06/04/21 10:50 am, Aswath Govindraju wrote: > Hi Jaehoon, > > On 06/04/21 3:48 am, Jaehoon Chung wrote: >> Hi, >> >> On 4/5/21 11:44 PM, Aswath Govindraju wrote: >>> From: Faiz Abbas >>> >>> Enable HS400 speed mode by writing to HOST_CONTROL2 register. >> >> I didn't find HS400 bit at HOST_CONTROL2 register. (I have checked SD >> Specific v4.20) >> If I missed something, let me know, plz. >> >> In include/sdhci.h, it mentioned to "Non-standard". >> > > Thank you for pointing this out. > > Yes, this is not a part of SD specification and in the specification > this field is marked as reserved. I have added this, as this bit mask > has been defined in include/sdhci.h. Sorry about this. I'll post a > respin taking this into a consideration. > On the other hand, the same has been accepted in kernel i.e. setting SDHCI_CTRL_HS400 bit in HOST_CONTROL2 register, drivers/mmc/host/sdhci.c in sdhci_set_uhs_signaling(). I think although this bit has not been mentioned in the specification, it seems it is used by many controllers for HS400 mode. So, as this is not specific to a controller can setting this, be allowed in the common sdhci_set_uhs_timing() function ? Thanks, Aswath > Thanks, > Aswath > >> Best Regards, >> Jaehoon Chung >> >>> >>> Signed-off-by: Faiz Abbas >>> Signed-off-by: Aswath Govindraju >>> --- >>> drivers/mmc/sdhci.c | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c >>> index d9ab6a0a839e..eea4701d8af5 100644 >>> --- a/drivers/mmc/sdhci.c >>> +++ b/drivers/mmc/sdhci.c >>> @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) >>> case MMC_HS_200: >>> reg |= SDHCI_CTRL_UHS_SDR104; >>> break; >>> + case MMC_HS_400: >>> + reg |= SDHCI_CTRL_HS400; >>> + break; >>> default: >>> reg |= SDHCI_CTRL_UHS_SDR12; >>> } >>> >> >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi Jaehoon, On 06/04/21 3:48 am, Jaehoon Chung wrote: > Hi, > > On 4/5/21 11:44 PM, Aswath Govindraju wrote: >> From: Faiz Abbas >> >> Enable HS400 speed mode by writing to HOST_CONTROL2 register. > > I didn't find HS400 bit at HOST_CONTROL2 register. (I have checked SD > Specific v4.20) > If I missed something, let me know, plz. > > In include/sdhci.h, it mentioned to "Non-standard". > Thank you for pointing this out. Yes, this is not a part of SD specification and in the specification this field is marked as reserved. I have added this, as this bit mask has been defined in include/sdhci.h. Sorry about this. I'll post a respin taking this into a consideration. Thanks, Aswath > Best Regards, > Jaehoon Chung > >> >> Signed-off-by: Faiz Abbas >> Signed-off-by: Aswath Govindraju >> --- >> drivers/mmc/sdhci.c | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c >> index d9ab6a0a839e..eea4701d8af5 100644 >> --- a/drivers/mmc/sdhci.c >> +++ b/drivers/mmc/sdhci.c >> @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) >> case MMC_HS_200: >> reg |= SDHCI_CTRL_UHS_SDR104; >> break; >> +case MMC_HS_400: >> +reg |= SDHCI_CTRL_HS400; >> +break; >> default: >> reg |= SDHCI_CTRL_UHS_SDR12; >> } >> >
Re: [PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
Hi, On 4/5/21 11:44 PM, Aswath Govindraju wrote: > From: Faiz Abbas > > Enable HS400 speed mode by writing to HOST_CONTROL2 register. I didn't find HS400 bit at HOST_CONTROL2 register. (I have checked SD Specific v4.20) If I missed something, let me know, plz. In include/sdhci.h, it mentioned to "Non-standard". Best Regards, Jaehoon Chung > > Signed-off-by: Faiz Abbas > Signed-off-by: Aswath Govindraju > --- > drivers/mmc/sdhci.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c > index d9ab6a0a839e..eea4701d8af5 100644 > --- a/drivers/mmc/sdhci.c > +++ b/drivers/mmc/sdhci.c > @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) > case MMC_HS_200: > reg |= SDHCI_CTRL_UHS_SDR104; > break; > + case MMC_HS_400: > + reg |= SDHCI_CTRL_HS400; > + break; > default: > reg |= SDHCI_CTRL_UHS_SDR12; > } >
[PATCH] mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed mode
From: Faiz Abbas Enable HS400 speed mode by writing to HOST_CONTROL2 register. Signed-off-by: Faiz Abbas Signed-off-by: Aswath Govindraju --- drivers/mmc/sdhci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index d9ab6a0a839e..eea4701d8af5 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -507,6 +507,9 @@ void sdhci_set_uhs_timing(struct sdhci_host *host) case MMC_HS_200: reg |= SDHCI_CTRL_UHS_SDR104; break; + case MMC_HS_400: + reg |= SDHCI_CTRL_HS400; + break; default: reg |= SDHCI_CTRL_UHS_SDR12; } -- 2.17.1
