Re: [PATCH 02/18] rockchip: rk3588: sync rk3588s dtsi from v6.8-rc1
On 2024/1/23 22:49, Quentin Schulz wrote:
From: Heiko Stuebner
This brings the real host2_xhci node as well as the pmu1grf node and
spi0 to spi4 aliases from the next-20240110 Linux kernel. So also
adapt/remove the nodes and aliases in rk3588s-u-boot.dtsi
Signed-off-by: Heiko Stuebner
[sync with v6.8-rc1]
[remove spi0 to spi4 aliases from rk3588s-u-boot.dtsi]
Signed-off-by: Quentin Schulz
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588s-u-boot.dtsi | 36 ++
arch/arm/dts/rk3588s.dtsi| 152 +++
2 files changed, 156 insertions(+), 32 deletions(-)
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 9a5ffec926e..960ac4abda3 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -7,11 +7,6 @@
/ {
aliases {
- spi0 =
- spi1 =
- spi2 =
- spi3 =
- spi4 =
spi5 =
};
@@ -43,33 +38,6 @@
status = "disabled";
};
- usb_host2_xhci: usb@fcd0 {
- compatible = "rockchip,rk3588-dwc3", "rockchip,rk3568-dwc3",
"snps,dwc3";
- reg = <0x0 0xfcd0 0x0 0x40>;
- interrupts = ;
- clocks = < REF_CLK_USB3OTG2>, < SUSPEND_CLK_USB3OTG2>,
-< ACLK_USB3OTG2>, < CLK_UTMI_OTG2>,
-< CLK_PIPEPHY2_PIPE_U3_G>;
- clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi",
"pipe";
- dr_mode = "host";
- phys = <_psu PHY_TYPE_USB3>;
- phy-names = "usb3-phy";
- phy_type = "utmi_wide";
- resets = < SRST_A_USB3OTG2>;
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- snps,dis_rxdet_inp3_quirk;
- status = "disabled";
- };
-
- pmu1_grf: syscon@fd58a000 {
- bootph-all;
- compatible = "rockchip,rk3588-pmugrf", "syscon";
- reg = <0x0 0xfd58a000 0x0 0x2000>;
- };
-
usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -201,6 +169,10 @@
status = "okay";
};
+ {
+ bootph-all;
+};
+
_grf {
bootph-pre-ram;
status = "okay";
diff --git a/arch/arm/dts/rk3588s.dtsi b/arch/arm/dts/rk3588s.dtsi
index 61a9a11c3bb..36b1b7acfe6 100644
--- a/arch/arm/dts/rk3588s.dtsi
+++ b/arch/arm/dts/rk3588s.dtsi
@@ -18,6 +18,38 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ gpio0 =
+ gpio1 =
+ gpio2 =
+ gpio3 =
+ gpio4 =
+ i2c0 =
+ i2c1 =
+ i2c2 =
+ i2c3 =
+ i2c4 =
+ i2c5 =
+ i2c6 =
+ i2c7 =
+ i2c8 =
+ serial0 =
+ serial1 =
+ serial2 =
+ serial3 =
+ serial4 =
+ serial5 =
+ serial6 =
+ serial7 =
+ serial8 =
+ serial9 =
+ spi0 =
+ spi1 =
+ spi2 =
+ spi3 =
+ spi4 =
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -362,6 +394,11 @@
#clock-cells = <0>;
};
+ display_subsystem: display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <_out>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = ,
@@ -443,11 +480,47 @@
status = "disabled";
};
+ usb_host2_xhci: usb@fcd0 {
+ compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
+ reg = <0x0 0xfcd0 0x0 0x40>;
+ interrupts = ;
+ clocks = < REF_CLK_USB3OTG2>, < SUSPEND_CLK_USB3OTG2>,
+< ACLK_USB3OTG2>, < CLK_UTMI_OTG2>,
+< CLK_PIPEPHY2_PIPE_U3_G>;
+ clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi",
"pipe";
+ dr_mode = "host";
+ phys = <_psu PHY_TYPE_USB3>;
+ phy-names = "usb3-phy";
+ phy_type = "utmi_wide";
+ resets = < SRST_A_USB3OTG2>;
+ snps,dis_enblslpm_quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis_rxdet_inp3_quirk;
+ status = "disabled";
+ };
+
+
[PATCH 02/18] rockchip: rk3588: sync rk3588s dtsi from v6.8-rc1
From: Heiko Stuebner
This brings the real host2_xhci node as well as the pmu1grf node and
spi0 to spi4 aliases from the next-20240110 Linux kernel. So also
adapt/remove the nodes and aliases in rk3588s-u-boot.dtsi
Signed-off-by: Heiko Stuebner
[sync with v6.8-rc1]
[remove spi0 to spi4 aliases from rk3588s-u-boot.dtsi]
Signed-off-by: Quentin Schulz
---
arch/arm/dts/rk3588s-u-boot.dtsi | 36 ++
arch/arm/dts/rk3588s.dtsi| 152 +++
2 files changed, 156 insertions(+), 32 deletions(-)
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 9a5ffec926e..960ac4abda3 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -7,11 +7,6 @@
/ {
aliases {
- spi0 =
- spi1 =
- spi2 =
- spi3 =
- spi4 =
spi5 =
};
@@ -43,33 +38,6 @@
status = "disabled";
};
- usb_host2_xhci: usb@fcd0 {
- compatible = "rockchip,rk3588-dwc3", "rockchip,rk3568-dwc3",
"snps,dwc3";
- reg = <0x0 0xfcd0 0x0 0x40>;
- interrupts = ;
- clocks = < REF_CLK_USB3OTG2>, < SUSPEND_CLK_USB3OTG2>,
-< ACLK_USB3OTG2>, < CLK_UTMI_OTG2>,
-< CLK_PIPEPHY2_PIPE_U3_G>;
- clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi",
"pipe";
- dr_mode = "host";
- phys = <_psu PHY_TYPE_USB3>;
- phy-names = "usb3-phy";
- phy_type = "utmi_wide";
- resets = < SRST_A_USB3OTG2>;
- snps,dis_enblslpm_quirk;
- snps,dis-u2-freeclk-exists-quirk;
- snps,dis-del-phy-power-chg-quirk;
- snps,dis-tx-ipgap-linecheck-quirk;
- snps,dis_rxdet_inp3_quirk;
- status = "disabled";
- };
-
- pmu1_grf: syscon@fd58a000 {
- bootph-all;
- compatible = "rockchip,rk3588-pmugrf", "syscon";
- reg = <0x0 0xfd58a000 0x0 0x2000>;
- };
-
usbdpphy0_grf: syscon@fd5c8000 {
compatible = "rockchip,rk3588-usbdpphy-grf", "syscon";
reg = <0x0 0xfd5c8000 0x0 0x4000>;
@@ -201,6 +169,10 @@
status = "okay";
};
+ {
+ bootph-all;
+};
+
_grf {
bootph-pre-ram;
status = "okay";
diff --git a/arch/arm/dts/rk3588s.dtsi b/arch/arm/dts/rk3588s.dtsi
index 61a9a11c3bb..36b1b7acfe6 100644
--- a/arch/arm/dts/rk3588s.dtsi
+++ b/arch/arm/dts/rk3588s.dtsi
@@ -18,6 +18,38 @@
#address-cells = <2>;
#size-cells = <2>;
+ aliases {
+ gpio0 =
+ gpio1 =
+ gpio2 =
+ gpio3 =
+ gpio4 =
+ i2c0 =
+ i2c1 =
+ i2c2 =
+ i2c3 =
+ i2c4 =
+ i2c5 =
+ i2c6 =
+ i2c7 =
+ i2c8 =
+ serial0 =
+ serial1 =
+ serial2 =
+ serial3 =
+ serial4 =
+ serial5 =
+ serial6 =
+ serial7 =
+ serial8 =
+ serial9 =
+ spi0 =
+ spi1 =
+ spi2 =
+ spi3 =
+ spi4 =
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -362,6 +394,11 @@
#clock-cells = <0>;
};
+ display_subsystem: display-subsystem {
+ compatible = "rockchip,display-subsystem";
+ ports = <_out>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = ,
@@ -443,11 +480,47 @@
status = "disabled";
};
+ usb_host2_xhci: usb@fcd0 {
+ compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
+ reg = <0x0 0xfcd0 0x0 0x40>;
+ interrupts = ;
+ clocks = < REF_CLK_USB3OTG2>, < SUSPEND_CLK_USB3OTG2>,
+< ACLK_USB3OTG2>, < CLK_UTMI_OTG2>,
+< CLK_PIPEPHY2_PIPE_U3_G>;
+ clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi",
"pipe";
+ dr_mode = "host";
+ phys = <_psu PHY_TYPE_USB3>;
+ phy-names = "usb3-phy";
+ phy_type = "utmi_wide";
+ resets = < SRST_A_USB3OTG2>;
+ snps,dis_enblslpm_quirk;
+ snps,dis-u2-freeclk-exists-quirk;
+ snps,dis-del-phy-power-chg-quirk;
+ snps,dis-tx-ipgap-linecheck-quirk;
+ snps,dis_rxdet_inp3_quirk;
+ status = "disabled";
+ };
+
+ pmu1grf: syscon@fd58a000 {
+ compatible = "rockchip,rk3588-pmugrf",
