Re: [PATCH 1/1] video: mxsfb: fix pixel clock polarity
Hi Sébastien, On Fri, 26 Nov 2021 15:48:27 +0100 Sébastien Szymanski sebastien.szyman...@armadeus.com wrote: > DISPLAY_FLAGS_PIXDATA_NEGEDGE means the controller drives the data on > pixel clocks falling edge. That is DOTCLK_POL=0 (default) not 1. I wanted to apply this patch for release, but testing on i.MX6UL 14x14 EVK board shows that there is display flickering. So it seems wrong for the display used on the EVK board. -- Anatolij
Re: [PATCH 1/1] video: mxsfb: fix pixel clock polarity
Hi Sébastien, [Adding Anatolij] On Fri, Nov 26, 2021 at 1:49 PM Sébastien Szymanski wrote: > > DISPLAY_FLAGS_PIXDATA_NEGEDGE means the controller drives the data on > pixel clocks falling edge. That is DOTCLK_POL=0 (default) not 1. > > The same change has been made on the Linux's driver: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mxsfb?h=v5.16-rc2&id=53990e416bb7adaa59d045f325a47f31a11b75ee > > Signed-off-by: Sébastien Szymanski Reviewed-by: Fabio Estevam
[PATCH 1/1] video: mxsfb: fix pixel clock polarity
DISPLAY_FLAGS_PIXDATA_NEGEDGE means the controller drives the data on pixel clocks falling edge. That is DOTCLK_POL=0 (default) not 1. The same change has been made on the Linux's driver: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/gpu/drm/mxsfb?h=v5.16-rc2&id=53990e416bb7adaa59d045f325a47f31a11b75ee Signed-off-by: Sébastien Szymanski --- drivers/video/mxsfb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c index 98d2965711..7aeea4b23f 100644 --- a/drivers/video/mxsfb.c +++ b/drivers/video/mxsfb.c @@ -161,7 +161,7 @@ static void mxs_lcd_init(struct udevice *dev, u32 fb_addr, vdctrl0 |= LCDIF_VDCTRL0_HSYNC_POL; if(flags & DISPLAY_FLAGS_VSYNC_HIGH) vdctrl0 |= LCDIF_VDCTRL0_VSYNC_POL; - if(flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE) + if(flags & DISPLAY_FLAGS_PIXDATA_POSEDGE) vdctrl0 |= LCDIF_VDCTRL0_DOTCLK_POL; if(flags & DISPLAY_FLAGS_DE_HIGH) vdctrl0 |= LCDIF_VDCTRL0_ENABLE_POL; -- 2.32.0
