Re: [PATCH 2/3] arm: dts: imx8mn: Sync with Linux 6.3
On Wed, May 3, 2023 at 9:12 AM Tim Harvey wrote: > > On Thu, Apr 27, 2023 at 11:08 AM Fabio Estevam wrote: > > > > From: Fabio Estevam > > > > Sync imx8mn.dtsi with Linux 6.3. > > > > Signed-off-by: Fabio Estevam > > --- > > arch/arm/dts/imx8mn.dtsi | 46 ++-- > > 1 file changed, 35 insertions(+), 11 deletions(-) > > > > diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi > > index cb2836bfbd95..9e0ddd6b7a32 100644 > > --- a/arch/arm/dts/imx8mn.dtsi > > +++ b/arch/arm/dts/imx8mn.dtsi > > @@ -139,6 +139,7 @@ > > A53_L2: l2-cache0 { > > compatible = "cache"; > > cache-level = <2>; > > + cache-unified; > > cache-size = <0x8>; > > cache-line-size = <64>; > > cache-sets = <512>; > > @@ -295,6 +296,7 @@ > > sai2: sai@3002 { > > compatible = "fsl,imx8mn-sai", > > "fsl,imx8mq-sai"; > > reg = <0x3002 0x1>; > > + #sound-dai-cells = <0>; > > interrupts = > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk IMX8MN_CLK_SAI2_IPG>, > > <&clk IMX8MN_CLK_DUMMY>, > > @@ -309,6 +311,7 @@ > > sai3: sai@3003 { > > compatible = "fsl,imx8mn-sai", > > "fsl,imx8mq-sai"; > > reg = <0x3003 0x1>; > > + #sound-dai-cells = <0>; > > interrupts = > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk IMX8MN_CLK_SAI3_IPG>, > > <&clk IMX8MN_CLK_DUMMY>, > > @@ -323,6 +326,7 @@ > > sai5: sai@3005 { > > compatible = "fsl,imx8mn-sai", > > "fsl,imx8mq-sai"; > > reg = <0x3005 0x1>; > > + #sound-dai-cells = <0>; > > interrupts = > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk IMX8MN_CLK_SAI5_IPG>, > > <&clk IMX8MN_CLK_DUMMY>, > > @@ -339,6 +343,7 @@ > > sai6: sai@3006 { > > compatible = "fsl,imx8mn-sai", > > "fsl,imx8mq-sai"; > > reg = <0x3006 0x1>; > > + #sound-dai-cells = <0>; > > interrupts = > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk IMX8MN_CLK_SAI6_IPG>, > > <&clk IMX8MN_CLK_DUMMY>, > > @@ -396,6 +401,7 @@ > > sai7: sai@300b { > > compatible = "fsl,imx8mn-sai", > > "fsl,imx8mq-sai"; > > reg = <0x300b 0x1>; > > + #sound-dai-cells = <0>; > > interrupts = > IRQ_TYPE_LEVEL_HIGH>; > > clocks = <&clk IMX8MN_CLK_SAI7_IPG>, > > <&clk IMX8MN_CLK_DUMMY>, > > @@ -497,6 +503,8 @@ > > compatible = "fsl,imx8mn-tmu", > > "fsl,imx8mm-tmu"; > > reg = <0x3026 0x1>; > > clocks = <&clk IMX8MN_CLK_TMU_ROOT>; > > + nvmem-cells = <&tmu_calib>; > > + nvmem-cell-names = "calib"; > > #thermal-sensor-cells = <0>; > > }; > > > > @@ -551,7 +559,7 @@ > > reg = <0x3033 0x1>; > > }; > > > > - gpr: iomuxc-gpr@3034 { > > + gpr: syscon@3034 { > > compatible = "fsl,imx8mn-iomuxc-gpr", > > "syscon"; > > reg = <0x3034 0x1>; > > }; > > @@ -563,23 +571,40 @@ > > #address-cells = <1>; > > #size-cells = <1>; > > > > - imx8mn_uid: unique-id@410 { > > + /* > > +* The register address below maps to the > > MX8M > > +* Fusemap Description Table entries t
Re: [PATCH 2/3] arm: dts: imx8mn: Sync with Linux 6.3
On Thu, Apr 27, 2023 at 11:08 AM Fabio Estevam wrote: > > From: Fabio Estevam > > Sync imx8mn.dtsi with Linux 6.3. > > Signed-off-by: Fabio Estevam > --- > arch/arm/dts/imx8mn.dtsi | 46 ++-- > 1 file changed, 35 insertions(+), 11 deletions(-) > > diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi > index cb2836bfbd95..9e0ddd6b7a32 100644 > --- a/arch/arm/dts/imx8mn.dtsi > +++ b/arch/arm/dts/imx8mn.dtsi > @@ -139,6 +139,7 @@ > A53_L2: l2-cache0 { > compatible = "cache"; > cache-level = <2>; > + cache-unified; > cache-size = <0x8>; > cache-line-size = <64>; > cache-sets = <512>; > @@ -295,6 +296,7 @@ > sai2: sai@3002 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3002 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI2_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -309,6 +311,7 @@ > sai3: sai@3003 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3003 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI3_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -323,6 +326,7 @@ > sai5: sai@3005 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3005 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI5_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -339,6 +343,7 @@ > sai6: sai@3006 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3006 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI6_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -396,6 +401,7 @@ > sai7: sai@300b { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x300b 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI7_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -497,6 +503,8 @@ > compatible = "fsl,imx8mn-tmu", > "fsl,imx8mm-tmu"; > reg = <0x3026 0x1>; > clocks = <&clk IMX8MN_CLK_TMU_ROOT>; > + nvmem-cells = <&tmu_calib>; > + nvmem-cell-names = "calib"; > #thermal-sensor-cells = <0>; > }; > > @@ -551,7 +559,7 @@ > reg = <0x3033 0x1>; > }; > > - gpr: iomuxc-gpr@3034 { > + gpr: syscon@3034 { > compatible = "fsl,imx8mn-iomuxc-gpr", > "syscon"; > reg = <0x3034 0x1>; > }; > @@ -563,23 +571,40 @@ > #address-cells = <1>; > #size-cells = <1>; > > - imx8mn_uid: unique-id@410 { > + /* > +* The register address below maps to the MX8M > +* Fusemap Description Table entries this way. > +* Assuming > +* reg = ; > +* then > +* Fuse Address = (ADDR * 4) + 0x400 > +* Note
Re: [PATCH 2/3] arm: dts: imx8mn: Sync with Linux 6.3
On Thu, Apr 27, 2023 at 1:08 PM Fabio Estevam wrote: > > From: Fabio Estevam > > Sync imx8mn.dtsi with Linux 6.3. > > Signed-off-by: Fabio Estevam Reviewed-by: Adam Ford > --- > arch/arm/dts/imx8mn.dtsi | 46 ++-- > 1 file changed, 35 insertions(+), 11 deletions(-) > > diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi > index cb2836bfbd95..9e0ddd6b7a32 100644 > --- a/arch/arm/dts/imx8mn.dtsi > +++ b/arch/arm/dts/imx8mn.dtsi > @@ -139,6 +139,7 @@ > A53_L2: l2-cache0 { > compatible = "cache"; > cache-level = <2>; > + cache-unified; > cache-size = <0x8>; > cache-line-size = <64>; > cache-sets = <512>; > @@ -295,6 +296,7 @@ > sai2: sai@3002 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3002 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI2_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -309,6 +311,7 @@ > sai3: sai@3003 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3003 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI3_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -323,6 +326,7 @@ > sai5: sai@3005 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3005 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI5_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -339,6 +343,7 @@ > sai6: sai@3006 { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x3006 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI6_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -396,6 +401,7 @@ > sai7: sai@300b { > compatible = "fsl,imx8mn-sai", > "fsl,imx8mq-sai"; > reg = <0x300b 0x1>; > + #sound-dai-cells = <0>; > interrupts = IRQ_TYPE_LEVEL_HIGH>; > clocks = <&clk IMX8MN_CLK_SAI7_IPG>, > <&clk IMX8MN_CLK_DUMMY>, > @@ -497,6 +503,8 @@ > compatible = "fsl,imx8mn-tmu", > "fsl,imx8mm-tmu"; > reg = <0x3026 0x1>; > clocks = <&clk IMX8MN_CLK_TMU_ROOT>; > + nvmem-cells = <&tmu_calib>; > + nvmem-cell-names = "calib"; > #thermal-sensor-cells = <0>; > }; > > @@ -551,7 +559,7 @@ > reg = <0x3033 0x1>; > }; > > - gpr: iomuxc-gpr@3034 { > + gpr: syscon@3034 { > compatible = "fsl,imx8mn-iomuxc-gpr", > "syscon"; > reg = <0x3034 0x1>; > }; > @@ -563,23 +571,40 @@ > #address-cells = <1>; > #size-cells = <1>; > > - imx8mn_uid: unique-id@410 { > + /* > +* The register address below maps to the MX8M > +* Fusemap Description Table entries this way. > +* Assuming > +* reg = ; > +* then > +* Fuse Address = (ADDR * 4) + 0x400 > +
[PATCH 2/3] arm: dts: imx8mn: Sync with Linux 6.3
From: Fabio Estevam Sync imx8mn.dtsi with Linux 6.3. Signed-off-by: Fabio Estevam --- arch/arm/dts/imx8mn.dtsi | 46 ++-- 1 file changed, 35 insertions(+), 11 deletions(-) diff --git a/arch/arm/dts/imx8mn.dtsi b/arch/arm/dts/imx8mn.dtsi index cb2836bfbd95..9e0ddd6b7a32 100644 --- a/arch/arm/dts/imx8mn.dtsi +++ b/arch/arm/dts/imx8mn.dtsi @@ -139,6 +139,7 @@ A53_L2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; cache-size = <0x8>; cache-line-size = <64>; cache-sets = <512>; @@ -295,6 +296,7 @@ sai2: sai@3002 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x3002 0x1>; + #sound-dai-cells = <0>; interrupts = ; clocks = <&clk IMX8MN_CLK_SAI2_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -309,6 +311,7 @@ sai3: sai@3003 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x3003 0x1>; + #sound-dai-cells = <0>; interrupts = ; clocks = <&clk IMX8MN_CLK_SAI3_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -323,6 +326,7 @@ sai5: sai@3005 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x3005 0x1>; + #sound-dai-cells = <0>; interrupts = ; clocks = <&clk IMX8MN_CLK_SAI5_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -339,6 +343,7 @@ sai6: sai@3006 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x3006 0x1>; + #sound-dai-cells = <0>; interrupts = ; clocks = <&clk IMX8MN_CLK_SAI6_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -396,6 +401,7 @@ sai7: sai@300b { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x300b 0x1>; + #sound-dai-cells = <0>; interrupts = ; clocks = <&clk IMX8MN_CLK_SAI7_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -497,6 +503,8 @@ compatible = "fsl,imx8mn-tmu", "fsl,imx8mm-tmu"; reg = <0x3026 0x1>; clocks = <&clk IMX8MN_CLK_TMU_ROOT>; + nvmem-cells = <&tmu_calib>; + nvmem-cell-names = "calib"; #thermal-sensor-cells = <0>; }; @@ -551,7 +559,7 @@ reg = <0x3033 0x1>; }; - gpr: iomuxc-gpr@3034 { + gpr: syscon@3034 { compatible = "fsl,imx8mn-iomuxc-gpr", "syscon"; reg = <0x3034 0x1>; }; @@ -563,23 +571,40 @@ #address-cells = <1>; #size-cells = <1>; - imx8mn_uid: unique-id@410 { + /* +* The register address below maps to the MX8M +* Fusemap Description Table entries this way. +* Assuming +* reg = ; +* then +* Fuse Address = (ADDR * 4) + 0x400 +* Note that if SIZE is greater than 4, then +* each subsequent fuse is located at offset +* +0x10 in Fusemap Description Table (e.g. +* reg = <0x4 0x8> describes fuses 0x410 and +* 0x420). +*/ +