BCM4912 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts
and dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there to the console.
Signed-off-by: William Zhang
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile| 2 +
arch/arm/dts/bcm4912.dtsi| 128 +++
arch/arm/dts/bcm94912.dts| 30 ++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile| 1 +
arch/arm/mach-bcmbca/bcm4912/Kconfig | 17 +++
arch/arm/mach-bcmbca/bcm4912/Makefile| 5 +
arch/arm/mach-bcmbca/bcm4912/mmu_table.c | 32 ++
board/broadcom/bcmbca/Kconfig| 7 ++
configs/bcm94912_defconfig | 23
include/configs/bcm94912.h | 11 ++
12 files changed, 265 insertions(+)
create mode 100644 arch/arm/dts/bcm4912.dtsi
create mode 100644 arch/arm/dts/bcm94912.dts
create mode 100644 arch/arm/mach-bcmbca/bcm4912/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm4912/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm4912/mmu_table.c
create mode 100644 configs/bcm94912_defconfig
create mode 100644 include/configs/bcm94912.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a4751153524..65a6b1b21e77 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -219,6 +219,7 @@ F: board/broadcom/bcmbca/
F: drivers/timer/bcmbca-timer.c
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?4912
N: bcm[9]?63138
N: bcm[9]?63146
N: bcm[9]?63148
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f0615aba4960..74442b30f4d7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1165,6 +1165,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
+dtb-$(CONFIG_BCM4912) += \
+ bcm94912.dtb
dtb-$(CONFIG_BCM63138) += \
bcm963138.dtb
dtb-$(CONFIG_BCM63146) += \
diff --git a/arch/arm/dts/bcm4912.dtsi b/arch/arm/dts/bcm4912.dtsi
new file mode 100644
index ..3d016c2ce675
--- /dev/null
+++ b/arch/arm/dts/bcm4912.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include
+#include
+
+/ {
+ compatible = "brcm,bcm4912", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = ,
+ ,
+ ,
+ ;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = ,
+ ,
+ ,
+ ;
+ interrupt-affinity = <_0>, <_1>,
+ <_2>, <_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks =
