BCM4908 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added
under ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux git repository so the dts and dtsi
files are stripped down version of linux copies with mininum blocks
needed by u-boot.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile| 2 +
arch/arm/dts/bcm4908.dtsi| 127 +++
arch/arm/dts/bcm94908.dts| 30 ++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile| 1 +
arch/arm/mach-bcmbca/bcm4908/Kconfig | 17 +++
arch/arm/mach-bcmbca/bcm4908/Makefile| 5 +
arch/arm/mach-bcmbca/bcm4908/mmu_table.c | 32 ++
board/broadcom/bcmbca/Kconfig| 7 ++
configs/bcm94908_defconfig | 23
include/configs/bcm94908.h | 11 ++
12 files changed, 264 insertions(+)
create mode 100644 arch/arm/dts/bcm4908.dtsi
create mode 100644 arch/arm/dts/bcm94908.dts
create mode 100644 arch/arm/mach-bcmbca/bcm4908/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm4908/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm4908/mmu_table.c
create mode 100644 configs/bcm94908_defconfig
create mode 100644 include/configs/bcm94908.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 70e5cf3f5584..3f250942ced1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -219,6 +219,7 @@ F: board/broadcom/bcmbca/
F: drivers/timer/bcmbca-timer.c
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?4908
N: bcm[9]?4912
N: bcm[9]?63138
N: bcm[9]?63146
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 266bbc1f4386..9a6582d9c1c8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1165,6 +1165,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
+dtb-$(CONFIG_BCM4908) += \
+ bcm94908.dtb
dtb-$(CONFIG_BCM4912) += \
bcm94912.dtb
dtb-$(CONFIG_BCM63138) += \
diff --git a/arch/arm/dts/bcm4908.dtsi b/arch/arm/dts/bcm4908.dtsi
new file mode 100644
index ..0be5cfeeffa9
--- /dev/null
+++ b/arch/arm/dts/bcm4908.dtsi
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include
+#include
+
+/dts-v1/;
+
+/ {
+ compatible = "brcm,bcm4908", "brcm,bcmbca";
+
+ interrupt-parent = <>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 =
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x2>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x3>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ axi@8100 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0x8100 0x4000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>,
+
