Re: [PATCH V2 7/7] riscv: spl: andes: Move the DTB in front of kernel

[Leo Liang]

On Thu, Oct 12, 2023 at 02:35:09PM +0800, Randolph wrote:
> Originally, u-boot SPL will place the DTB directly after the kernel,
> but the size of the kernel does not include the BSS section, This
> means that u-boot SPL places the DTB in the kernel BSS section causing
> the DTB to be cleared by the kernel BSS initialisation.
> 
> Moving the DTB in front of the kernel can avoid this error.
> 
> Signed-off-by: Randolph 
> ---
>  board/AndesTech/ae350/ae350.c | 25 +
>  1 file changed, 25 insertions(+)

Reviewed-by: Leo Yu-Chi Liang 

[PATCH V2 7/7] riscv: spl: andes: Move the DTB in front of kernel

[Randolph]

Originally, u-boot SPL will place the DTB directly after the kernel,
but the size of the kernel does not include the BSS section, This
means that u-boot SPL places the DTB in the kernel BSS section causing
the DTB to be cleared by the kernel BSS initialisation.

Moving the DTB in front of the kernel can avoid this error.

Signed-off-by: Randolph 
---
 board/AndesTech/ae350/ae350.c | 25 +
 1 file changed, 25 insertions(+)

diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c
index 1c2288b6ce..d78ee403e6 100644
--- a/board/AndesTech/ae350/ae350.c
+++ b/board/AndesTech/ae350/ae350.c
@@ -19,6 +19,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -26,6 +28,29 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscellaneous platform dependent initializations
  */
 
+#if CONFIG_IS_ENABLED(LOAD_FIT) || CONFIG_IS_ENABLED(LOAD_FIT_FULL)
+#define ANDES_SPL_FDT_ADDR (CONFIG_TEXT_BASE - 0x10)
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+   /*
+* Originally, u-boot-spl will place DTB directly after the kernel,
+* but the size of the kernel did not include the BSS section, which
+* means u-boot-spl will place the DTB in the kernel BSS section
+* causing the DTB to be cleared by kernel BSS initializtion.
+* Moving DTB in front of the kernel can avoid the error.
+*/
+   if (ANDES_SPL_FDT_ADDR < 0) {
+   printf("%s: CONFIG_TEXT_BASE needs to be larger than 
0x10\n",
+  __func__);
+   hang();
+   }
+
+   memcpy((void *)ANDES_SPL_FDT_ADDR, spl_image->fdt_addr,
+  fdt_totalsize(spl_image->fdt_addr));
+   spl_image->fdt_addr = map_sysmem(ANDES_SPL_FDT_ADDR, 0);
+}
+#endif
+
 int board_init(void)
 {
gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
-- 
2.34.1